drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/flow_offload.h>
  35 #include <net/sch_generic.h>
  36 #include <net/pkt_cls.h>
  37 #include <net/tc_act/tc_gact.h>
  38 #include <net/tc_act/tc_skbedit.h>
  39 #include <linux/mlx5/fs.h>
  40 #include <linux/mlx5/device.h>
  41 #include <linux/rhashtable.h>
  42 #include <linux/refcount.h>
  43 #include <linux/completion.h>
  44 #include <net/tc_act/tc_mirred.h>
  45 #include <net/tc_act/tc_vlan.h>
  46 #include <net/tc_act/tc_tunnel_key.h>
  47 #include <net/tc_act/tc_pedit.h>
  48 #include <net/tc_act/tc_csum.h>
  49 #include <net/tc_act/tc_mpls.h>
  50 #include <net/psample.h>
  51 #include <net/arp.h>
  52 #include <net/ipv6_stubs.h>
  53 #include <net/bareudp.h>
  54 #include <net/bonding.h>
  55 #include "en.h"
  56 #include "en_rep.h"
  57 #include "en/rep/tc.h"
  58 #include "en/rep/neigh.h"
  59 #include "en_tc.h"
  60 #include "eswitch.h"
  61 #include "fs_core.h"
  62 #include "en/port.h"
  63 #include "en/tc_tun.h"
  64 #include "en/mapping.h"
  65 #include "en/tc_ct.h"
  66 #include "en/mod_hdr.h"
  67 #include "en/tc_priv.h"
  68 #include "en/tc_tun_encap.h"
  69 #include "esw/sample.h"
  70 #include "lib/devcom.h"
  71 #include "lib/geneve.h"
  72 #include "lib/fs_chains.h"
  73 #include "diag/en_tc_tracepoint.h"
  74 #include <asm/div64.h>
  75
  76 #define nic_chains(priv) ((priv)->fs.tc.chains)
  77 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)
  78
  79 #define MLX5E_TC_TABLE_NUM_GROUPS 4
  80 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(18)
  81
  82 struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[] = {
  83         [CHAIN_TO_REG] = {
  84                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
  85                 .moffset = 0,
  86                 .mlen = 2,
  87         },
  88         [VPORT_TO_REG] = {
  89                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
  90                 .moffset = 2,
  91                 .mlen = 2,
  92         },
  93         [TUNNEL_TO_REG] = {
  94                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_1,
  95                 .moffset = 1,
  96                 .mlen = ((ESW_TUN_OPTS_BITS + ESW_TUN_ID_BITS) / 8),
  97                 .soffset = MLX5_BYTE_OFF(fte_match_param,
  98                                          misc_parameters_2.metadata_reg_c_1),
  99         },
 100         [ZONE_TO_REG] = zone_to_reg_ct,
 101         [ZONE_RESTORE_TO_REG] = zone_restore_to_reg_ct,
 102         [CTSTATE_TO_REG] = ctstate_to_reg_ct,
 103         [MARK_TO_REG] = mark_to_reg_ct,
 104         [LABELS_TO_REG] = labels_to_reg_ct,
 105         [FTEID_TO_REG] = fteid_to_reg_ct,
 106         /* For NIC rules we store the retore metadata directly
 107          * into reg_b that is passed to SW since we don't
 108          * jump between steering domains.
 109          */
 110         [NIC_CHAIN_TO_REG] = {
 111                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_B,
 112                 .moffset = 0,
 113                 .mlen = 2,
 114         },
 115         [NIC_ZONE_RESTORE_TO_REG] = nic_zone_restore_to_reg_ct,
 116 };
 117
 118 /* To avoid false lock dependency warning set the tc_ht lock
 119  * class different than the lock class of the ht being used when deleting
 120  * last flow from a group and then deleting a group, we get into del_sw_flow_group()
 121  * which call rhashtable_destroy on fg->ftes_hash which will take ht->mutex but
 122  * it's different than the ht->mutex here.
 123  */
 124 static struct lock_class_key tc_ht_lock_key;
 125
 126 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow);
 127
 128 void
 129 mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
 130                             enum mlx5e_tc_attr_to_reg type,
 131                             u32 data,
 132                             u32 mask)
 133 {
 134         int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
 135         int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 136         void *headers_c = spec->match_criteria;
 137         void *headers_v = spec->match_value;
 138         void *fmask, *fval;
 139
 140         fmask = headers_c + soffset;
 141         fval = headers_v + soffset;
 142
 143         mask = (__force u32)(cpu_to_be32(mask)) >> (32 - (match_len * 8));
 144         data = (__force u32)(cpu_to_be32(data)) >> (32 - (match_len * 8));
 145
 146         memcpy(fmask, &mask, match_len);
 147         memcpy(fval, &data, match_len);
 148
 149         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;
 150 }
 151
 152 void
 153 mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
 154                                 enum mlx5e_tc_attr_to_reg type,
 155                                 u32 *data,
 156                                 u32 *mask)
 157 {
 158         int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
 159         int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 160         void *headers_c = spec->match_criteria;
 161         void *headers_v = spec->match_value;
 162         void *fmask, *fval;
 163
 164         fmask = headers_c + soffset;
 165         fval = headers_v + soffset;
 166
 167         memcpy(mask, fmask, match_len);
 168         memcpy(data, fval, match_len);
 169
 170         *mask = be32_to_cpu((__force __be32)(*mask << (32 - (match_len * 8))));
 171         *data = be32_to_cpu((__force __be32)(*data << (32 - (match_len * 8))));
 172 }
 173
 174 int
 175 mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev,
 176                                      struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 177                                      enum mlx5_flow_namespace_type ns,
 178                                      enum mlx5e_tc_attr_to_reg type,
 179                                      u32 data)
 180 {
 181         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 182         int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
 183         int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 184         char *modact;
 185         int err;
 186
 187         err = alloc_mod_hdr_actions(mdev, ns, mod_hdr_acts);
 188         if (err)
 189                 return err;
 190
 191         modact = mod_hdr_acts->actions +
 192                  (mod_hdr_acts->num_actions * MLX5_MH_ACT_SZ);
 193
 194         /* Firmware has 5bit length field and 0 means 32bits */
 195         if (mlen == 4)
 196                 mlen = 0;
 197
 198         MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
 199         MLX5_SET(set_action_in, modact, field, mfield);
 200         MLX5_SET(set_action_in, modact, offset, moffset * 8);
 201         MLX5_SET(set_action_in, modact, length, mlen * 8);
 202         MLX5_SET(set_action_in, modact, data, data);
 203         err = mod_hdr_acts->num_actions;
 204         mod_hdr_acts->num_actions++;
 205
 206         return err;
 207 }
 208
 209 static struct mlx5_tc_ct_priv *
 210 get_ct_priv(struct mlx5e_priv *priv)
 211 {
 212         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 213         struct mlx5_rep_uplink_priv *uplink_priv;
 214         struct mlx5e_rep_priv *uplink_rpriv;
 215
 216         if (is_mdev_switchdev_mode(priv->mdev)) {
 217                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 218                 uplink_priv = &uplink_rpriv->uplink_priv;
 219
 220                 return uplink_priv->ct_priv;
 221         }
 222
 223         return priv->fs.tc.ct;
 224 }
 225
 226 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
 227 static struct mlx5_esw_psample *
 228 get_sample_priv(struct mlx5e_priv *priv)
 229 {
 230         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 231         struct mlx5_rep_uplink_priv *uplink_priv;
 232         struct mlx5e_rep_priv *uplink_rpriv;
 233
 234         if (is_mdev_switchdev_mode(priv->mdev)) {
 235                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 236                 uplink_priv = &uplink_rpriv->uplink_priv;
 237
 238                 return uplink_priv->esw_psample;
 239         }
 240
 241         return NULL;
 242 }
 243 #endif
 244
 245 struct mlx5_flow_handle *
 246 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
 247                     struct mlx5_flow_spec *spec,
 248                     struct mlx5_flow_attr *attr)
 249 {
 250         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 251
 252         if (is_mdev_switchdev_mode(priv->mdev))
 253                 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 254
 255         return  mlx5e_add_offloaded_nic_rule(priv, spec, attr);
 256 }
 257
 258 void
 259 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
 260                     struct mlx5_flow_handle *rule,
 261                     struct mlx5_flow_attr *attr)
 262 {
 263         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 264
 265         if (is_mdev_switchdev_mode(priv->mdev)) {
 266                 mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 267
 268                 return;
 269         }
 270
 271         mlx5e_del_offloaded_nic_rule(priv, rule, attr);
 272 }
 273
 274 int
 275 mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
 276                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 277                           enum mlx5_flow_namespace_type ns,
 278                           enum mlx5e_tc_attr_to_reg type,
 279                           u32 data)
 280 {
 281         int ret = mlx5e_tc_match_to_reg_set_and_get_id(mdev, mod_hdr_acts, ns, type, data);
 282
 283         return ret < 0 ? ret : 0;
 284 }
 285
 286 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev,
 287                                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 288                                           enum mlx5e_tc_attr_to_reg type,
 289                                           int act_id, u32 data)
 290 {
 291         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 292         int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
 293         int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 294         char *modact;
 295
 296         modact = mod_hdr_acts->actions + (act_id * MLX5_MH_ACT_SZ);
 297
 298         /* Firmware has 5bit length field and 0 means 32bits */
 299         if (mlen == 4)
 300                 mlen = 0;
 301
 302         MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
 303         MLX5_SET(set_action_in, modact, field, mfield);
 304         MLX5_SET(set_action_in, modact, offset, moffset * 8);
 305         MLX5_SET(set_action_in, modact, length, mlen * 8);
 306         MLX5_SET(set_action_in, modact, data, data);
 307 }
 308
 309 struct mlx5e_hairpin {
 310         struct mlx5_hairpin *pair;
 311
 312         struct mlx5_core_dev *func_mdev;
 313         struct mlx5e_priv *func_priv;
 314         u32 tdn;
 315         u32 tirn;
 316
 317         int num_channels;
 318         struct mlx5e_rqt indir_rqt;
 319         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 320         struct mlx5e_ttc_table ttc;
 321 };
 322
 323 struct mlx5e_hairpin_entry {
 324         /* a node of a hash table which keeps all the  hairpin entries */
 325         struct hlist_node hairpin_hlist;
 326
 327         /* protects flows list */
 328         spinlock_t flows_lock;
 329         /* flows sharing the same hairpin */
 330         struct list_head flows;
 331         /* hpe's that were not fully initialized when dead peer update event
 332          * function traversed them.
 333          */
 334         struct list_head dead_peer_wait_list;
 335
 336         u16 peer_vhca_id;
 337         u8 prio;
 338         struct mlx5e_hairpin *hp;
 339         refcount_t refcnt;
 340         struct completion res_ready;
 341 };
 342
 343 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
 344                               struct mlx5e_tc_flow *flow);
 345
 346 struct mlx5e_tc_flow *mlx5e_flow_get(struct mlx5e_tc_flow *flow)
 347 {
 348         if (!flow || !refcount_inc_not_zero(&flow->refcnt))
 349                 return ERR_PTR(-EINVAL);
 350         return flow;
 351 }
 352
 353 void mlx5e_flow_put(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
 354 {
 355         if (refcount_dec_and_test(&flow->refcnt)) {
 356                 mlx5e_tc_del_flow(priv, flow);
 357                 kfree_rcu(flow, rcu_head);
 358         }
 359 }
 360
 361 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow)
 362 {
 363         return flow_flag_test(flow, ESWITCH);
 364 }
 365
 366 static bool mlx5e_is_ft_flow(struct mlx5e_tc_flow *flow)
 367 {
 368         return flow_flag_test(flow, FT);
 369 }
 370
 371 bool mlx5e_is_offloaded_flow(struct mlx5e_tc_flow *flow)
 372 {
 373         return flow_flag_test(flow, OFFLOADED);
 374 }
 375
 376 static int get_flow_name_space(struct mlx5e_tc_flow *flow)
 377 {
 378         return mlx5e_is_eswitch_flow(flow) ?
 379                 MLX5_FLOW_NAMESPACE_FDB : MLX5_FLOW_NAMESPACE_KERNEL;
 380 }
 381
 382 static struct mod_hdr_tbl *
 383 get_mod_hdr_table(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
 384 {
 385         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 386
 387         return get_flow_name_space(flow) == MLX5_FLOW_NAMESPACE_FDB ?
 388                 &esw->offloads.mod_hdr :
 389                 &priv->fs.tc.mod_hdr;
 390 }
 391
 392 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 393                                 struct mlx5e_tc_flow *flow,
 394                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 395 {
 396         struct mlx5_modify_hdr *modify_hdr;
 397         struct mlx5e_mod_hdr_handle *mh;
 398
 399         mh = mlx5e_mod_hdr_attach(priv->mdev, get_mod_hdr_table(priv, flow),
 400                                   get_flow_name_space(flow),
 401                                   &parse_attr->mod_hdr_acts);
 402         if (IS_ERR(mh))
 403                 return PTR_ERR(mh);
 404
 405         modify_hdr = mlx5e_mod_hdr_get(mh);
 406         flow->attr->modify_hdr = modify_hdr;
 407         flow->mh = mh;
 408
 409         return 0;
 410 }
 411
 412 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 413                                  struct mlx5e_tc_flow *flow)
 414 {
 415         /* flow wasn't fully initialized */
 416         if (!flow->mh)
 417                 return;
 418
 419         mlx5e_mod_hdr_detach(priv->mdev, get_mod_hdr_table(priv, flow),
 420                              flow->mh);
 421         flow->mh = NULL;
 422 }
 423
 424 static
 425 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 426 {
 427         struct net_device *netdev;
 428         struct mlx5e_priv *priv;
 429
 430         netdev = __dev_get_by_index(net, ifindex);
 431         priv = netdev_priv(netdev);
 432         return priv->mdev;
 433 }
 434
 435 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 436 {
 437         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {};
 438         void *tirc;
 439         int err;
 440
 441         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 442         if (err)
 443                 goto alloc_tdn_err;
 444
 445         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 446
 447         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 448         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 449         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 450
 451         err = mlx5_core_create_tir(hp->func_mdev, in, &hp->tirn);
 452         if (err)
 453                 goto create_tir_err;
 454
 455         return 0;
 456
 457 create_tir_err:
 458         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 459 alloc_tdn_err:
 460         return err;
 461 }
 462
 463 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 464 {
 465         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 466         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 467 }
 468
 469 static int mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 470 {
 471         struct mlx5e_priv *priv = hp->func_priv;
 472         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 473         u32 *indirection_rqt, rqn;
 474
 475         indirection_rqt = kcalloc(sz, sizeof(*indirection_rqt), GFP_KERNEL);
 476         if (!indirection_rqt)
 477                 return -ENOMEM;
 478
 479         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 480                                       hp->num_channels);
 481
 482         for (i = 0; i < sz; i++) {
 483                 ix = i;
 484                 if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR)
 485                         ix = mlx5e_bits_invert(i, ilog2(sz));
 486                 ix = indirection_rqt[ix];
 487                 rqn = hp->pair->rqn[ix];
 488                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 489         }
 490
 491         kfree(indirection_rqt);
 492         return 0;
 493 }
 494
 495 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 496 {
 497         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 498         struct mlx5e_priv *priv = hp->func_priv;
 499         struct mlx5_core_dev *mdev = priv->mdev;
 500         void *rqtc;
 501         u32 *in;
 502
 503         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 504         in = kvzalloc(inlen, GFP_KERNEL);
 505         if (!in)
 506                 return -ENOMEM;
 507
 508         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 509
 510         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 511         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 512
 513         err = mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 514         if (err)
 515                 goto out;
 516
 517         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 518         if (!err)
 519                 hp->indir_rqt.enabled = true;
 520
 521 out:
 522         kvfree(in);
 523         return err;
 524 }
 525
 526 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 527 {
 528         struct mlx5e_priv *priv = hp->func_priv;
 529         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 530         int tt, i, err;
 531         void *tirc;
 532
 533         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 534                 struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt);
 535
 536                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 537                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 538
 539                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 540                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 541                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 542                 mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
 543
 544                 err = mlx5_core_create_tir(hp->func_mdev, in,
 545                                            &hp->indir_tirn[tt]);
 546                 if (err) {
 547                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 548                         goto err_destroy_tirs;
 549                 }
 550         }
 551         return 0;
 552
 553 err_destroy_tirs:
 554         for (i = 0; i < tt; i++)
 555                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 556         return err;
 557 }
 558
 559 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 560 {
 561         int tt;
 562
 563         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 564                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 565 }
 566
 567 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 568                                          struct ttc_params *ttc_params)
 569 {
 570         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 571         int tt;
 572
 573         memset(ttc_params, 0, sizeof(*ttc_params));
 574
 575         ttc_params->any_tt_tirn = hp->tirn;
 576
 577         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 578                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 579
 580         ft_attr->max_fte = MLX5E_TTC_TABLE_SIZE;
 581         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 582         ft_attr->prio = MLX5E_TC_PRIO;
 583 }
 584
 585 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 586 {
 587         struct mlx5e_priv *priv = hp->func_priv;
 588         struct ttc_params ttc_params;
 589         int err;
 590
 591         err = mlx5e_hairpin_create_indirect_rqt(hp);
 592         if (err)
 593                 return err;
 594
 595         err = mlx5e_hairpin_create_indirect_tirs(hp);
 596         if (err)
 597                 goto err_create_indirect_tirs;
 598
 599         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 600         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 601         if (err)
 602                 goto err_create_ttc_table;
 603
 604         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 605                    hp->num_channels, hp->ttc.ft.t->id);
 606
 607         return 0;
 608
 609 err_create_ttc_table:
 610         mlx5e_hairpin_destroy_indirect_tirs(hp);
 611 err_create_indirect_tirs:
 612         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 613
 614         return err;
 615 }
 616
 617 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 618 {
 619         struct mlx5e_priv *priv = hp->func_priv;
 620
 621         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 622         mlx5e_hairpin_destroy_indirect_tirs(hp);
 623         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 624 }
 625
 626 static struct mlx5e_hairpin *
 627 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 628                      int peer_ifindex)
 629 {
 630         struct mlx5_core_dev *func_mdev, *peer_mdev;
 631         struct mlx5e_hairpin *hp;
 632         struct mlx5_hairpin *pair;
 633         int err;
 634
 635         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 636         if (!hp)
 637                 return ERR_PTR(-ENOMEM);
 638
 639         func_mdev = priv->mdev;
 640         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 641
 642         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 643         if (IS_ERR(pair)) {
 644                 err = PTR_ERR(pair);
 645                 goto create_pair_err;
 646         }
 647         hp->pair = pair;
 648         hp->func_mdev = func_mdev;
 649         hp->func_priv = priv;
 650         hp->num_channels = params->num_channels;
 651
 652         err = mlx5e_hairpin_create_transport(hp);
 653         if (err)
 654                 goto create_transport_err;
 655
 656         if (hp->num_channels > 1) {
 657                 err = mlx5e_hairpin_rss_init(hp);
 658                 if (err)
 659                         goto rss_init_err;
 660         }
 661
 662         return hp;
 663
 664 rss_init_err:
 665         mlx5e_hairpin_destroy_transport(hp);
 666 create_transport_err:
 667         mlx5_core_hairpin_destroy(hp->pair);
 668 create_pair_err:
 669         kfree(hp);
 670         return ERR_PTR(err);
 671 }
 672
 673 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 674 {
 675         if (hp->num_channels > 1)
 676                 mlx5e_hairpin_rss_cleanup(hp);
 677         mlx5e_hairpin_destroy_transport(hp);
 678         mlx5_core_hairpin_destroy(hp->pair);
 679         kvfree(hp);
 680 }
 681
 682 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 683 {
 684         return (peer_vhca_id << 16 | prio);
 685 }
 686
 687 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 688                                                      u16 peer_vhca_id, u8 prio)
 689 {
 690         struct mlx5e_hairpin_entry *hpe;
 691         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 692
 693         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 694                                hairpin_hlist, hash_key) {
 695                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio) {
 696                         refcount_inc(&hpe->refcnt);
 697                         return hpe;
 698                 }
 699         }
 700
 701         return NULL;
 702 }
 703
 704 static void mlx5e_hairpin_put(struct mlx5e_priv *priv,
 705                               struct mlx5e_hairpin_entry *hpe)
 706 {
 707         /* no more hairpin flows for us, release the hairpin pair */
 708         if (!refcount_dec_and_mutex_lock(&hpe->refcnt, &priv->fs.tc.hairpin_tbl_lock))
 709                 return;
 710         hash_del(&hpe->hairpin_hlist);
 711         mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 712
 713         if (!IS_ERR_OR_NULL(hpe->hp)) {
 714                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 715                            dev_name(hpe->hp->pair->peer_mdev->device));
 716
 717                 mlx5e_hairpin_destroy(hpe->hp);
 718         }
 719
 720         WARN_ON(!list_empty(&hpe->flows));
 721         kfree(hpe);
 722 }
 723
 724 #define UNKNOWN_MATCH_PRIO 8
 725
 726 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 727                                   struct mlx5_flow_spec *spec, u8 *match_prio,
 728                                   struct netlink_ext_ack *extack)
 729 {
 730         void *headers_c, *headers_v;
 731         u8 prio_val, prio_mask = 0;
 732         bool vlan_present;
 733
 734 #ifdef CONFIG_MLX5_CORE_EN_DCB
 735         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 736                 NL_SET_ERR_MSG_MOD(extack,
 737                                    "only PCP trust state supported for hairpin");
 738                 return -EOPNOTSUPP;
 739         }
 740 #endif
 741         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 742         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 743
 744         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 745         if (vlan_present) {
 746                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 747                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 748         }
 749
 750         if (!vlan_present || !prio_mask) {
 751                 prio_val = UNKNOWN_MATCH_PRIO;
 752         } else if (prio_mask != 0x7) {
 753                 NL_SET_ERR_MSG_MOD(extack,
 754                                    "masked priority match not supported for hairpin");
 755                 return -EOPNOTSUPP;
 756         }
 757
 758         *match_prio = prio_val;
 759         return 0;
 760 }
 761
 762 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 763                                   struct mlx5e_tc_flow *flow,
 764                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
 765                                   struct netlink_ext_ack *extack)
 766 {
 767         int peer_ifindex = parse_attr->mirred_ifindex[0];
 768         struct mlx5_hairpin_params params;
 769         struct mlx5_core_dev *peer_mdev;
 770         struct mlx5e_hairpin_entry *hpe;
 771         struct mlx5e_hairpin *hp;
 772         u64 link_speed64;
 773         u32 link_speed;
 774         u8 match_prio;
 775         u16 peer_id;
 776         int err;
 777
 778         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 779         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 780                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
 781                 return -EOPNOTSUPP;
 782         }
 783
 784         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 785         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
 786                                      extack);
 787         if (err)
 788                 return err;
 789
 790         mutex_lock(&priv->fs.tc.hairpin_tbl_lock);
 791         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 792         if (hpe) {
 793                 mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 794                 wait_for_completion(&hpe->res_ready);
 795
 796                 if (IS_ERR(hpe->hp)) {
 797                         err = -EREMOTEIO;
 798                         goto out_err;
 799                 }
 800                 goto attach_flow;
 801         }
 802
 803         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 804         if (!hpe) {
 805                 mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 806                 return -ENOMEM;
 807         }
 808
 809         spin_lock_init(&hpe->flows_lock);
 810         INIT_LIST_HEAD(&hpe->flows);
 811         INIT_LIST_HEAD(&hpe->dead_peer_wait_list);
 812         hpe->peer_vhca_id = peer_id;
 813         hpe->prio = match_prio;
 814         refcount_set(&hpe->refcnt, 1);
 815         init_completion(&hpe->res_ready);
 816
 817         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 818                  hash_hairpin_info(peer_id, match_prio));
 819         mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 820
 821         params.log_data_size = 15;
 822         params.log_data_size = min_t(u8, params.log_data_size,
 823                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 824         params.log_data_size = max_t(u8, params.log_data_size,
 825                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 826
 827         params.log_num_packets = params.log_data_size -
 828                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 829         params.log_num_packets = min_t(u8, params.log_num_packets,
 830                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 831
 832         params.q_counter = priv->q_counter;
 833         /* set hairpin pair per each 50Gbs share of the link */
 834         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 835         link_speed = max_t(u32, link_speed, 50000);
 836         link_speed64 = link_speed;
 837         do_div(link_speed64, 50000);
 838         params.num_channels = link_speed64;
 839
 840         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 841         hpe->hp = hp;
 842         complete_all(&hpe->res_ready);
 843         if (IS_ERR(hp)) {
 844                 err = PTR_ERR(hp);
 845                 goto out_err;
 846         }
 847
 848         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 849                    hp->tirn, hp->pair->rqn[0],
 850                    dev_name(hp->pair->peer_mdev->device),
 851                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 852
 853 attach_flow:
 854         if (hpe->hp->num_channels > 1) {
 855                 flow_flag_set(flow, HAIRPIN_RSS);
 856                 flow->attr->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 857         } else {
 858                 flow->attr->nic_attr->hairpin_tirn = hpe->hp->tirn;
 859         }
 860
 861         flow->hpe = hpe;
 862         spin_lock(&hpe->flows_lock);
 863         list_add(&flow->hairpin, &hpe->flows);
 864         spin_unlock(&hpe->flows_lock);
 865
 866         return 0;
 867
 868 out_err:
 869         mlx5e_hairpin_put(priv, hpe);
 870         return err;
 871 }
 872
 873 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 874                                    struct mlx5e_tc_flow *flow)
 875 {
 876         /* flow wasn't fully initialized */
 877         if (!flow->hpe)
 878                 return;
 879
 880         spin_lock(&flow->hpe->flows_lock);
 881         list_del(&flow->hairpin);
 882         spin_unlock(&flow->hpe->flows_lock);
 883
 884         mlx5e_hairpin_put(priv, flow->hpe);
 885         flow->hpe = NULL;
 886 }
 887
 888 struct mlx5_flow_handle *
 889 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
 890                              struct mlx5_flow_spec *spec,
 891                              struct mlx5_flow_attr *attr)
 892 {
 893         struct mlx5_flow_context *flow_context = &spec->flow_context;
 894         struct mlx5_fs_chains *nic_chains = nic_chains(priv);
 895         struct mlx5_nic_flow_attr *nic_attr = attr->nic_attr;
 896         struct mlx5e_tc_table *tc = &priv->fs.tc;
 897         struct mlx5_flow_destination dest[2] = {};
 898         struct mlx5_flow_act flow_act = {
 899                 .action = attr->action,
 900                 .flags    = FLOW_ACT_NO_APPEND,
 901         };
 902         struct mlx5_flow_handle *rule;
 903         struct mlx5_flow_table *ft;
 904         int dest_ix = 0;
 905
 906         flow_context->flags |= FLOW_CONTEXT_HAS_TAG;
 907         flow_context->flow_tag = nic_attr->flow_tag;
 908
 909         if (attr->dest_ft) {
 910                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 911                 dest[dest_ix].ft = attr->dest_ft;
 912                 dest_ix++;
 913         } else if (nic_attr->hairpin_ft) {
 914                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 915                 dest[dest_ix].ft = nic_attr->hairpin_ft;
 916                 dest_ix++;
 917         } else if (nic_attr->hairpin_tirn) {
 918                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 919                 dest[dest_ix].tir_num = nic_attr->hairpin_tirn;
 920                 dest_ix++;
 921         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 922                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 923                 if (attr->dest_chain) {
 924                         dest[dest_ix].ft = mlx5_chains_get_table(nic_chains,
 925                                                                  attr->dest_chain, 1,
 926                                                                  MLX5E_TC_FT_LEVEL);
 927                         if (IS_ERR(dest[dest_ix].ft))
 928                                 return ERR_CAST(dest[dest_ix].ft);
 929                 } else {
 930                         dest[dest_ix].ft = mlx5e_vlan_get_flowtable(priv->fs.vlan);
 931                 }
 932                 dest_ix++;
 933         }
 934
 935         if (dest[0].type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE &&
 936             MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
 937                 flow_act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL;
 938
 939         if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 940                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 941                 dest[dest_ix].counter_id = mlx5_fc_id(attr->counter);
 942                 dest_ix++;
 943         }
 944
 945         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 946                 flow_act.modify_hdr = attr->modify_hdr;
 947
 948         mutex_lock(&tc->t_lock);
 949         if (IS_ERR_OR_NULL(tc->t)) {
 950                 /* Create the root table here if doesn't exist yet */
 951                 tc->t =
 952                         mlx5_chains_get_table(nic_chains, 0, 1, MLX5E_TC_FT_LEVEL);
 953
 954                 if (IS_ERR(tc->t)) {
 955                         mutex_unlock(&tc->t_lock);
 956                         netdev_err(priv->netdev,
 957                                    "Failed to create tc offload table\n");
 958                         rule = ERR_CAST(priv->fs.tc.t);
 959                         goto err_ft_get;
 960                 }
 961         }
 962         mutex_unlock(&tc->t_lock);
 963
 964         if (attr->chain || attr->prio)
 965                 ft = mlx5_chains_get_table(nic_chains,
 966                                            attr->chain, attr->prio,
 967                                            MLX5E_TC_FT_LEVEL);
 968         else
 969                 ft = attr->ft;
 970
 971         if (IS_ERR(ft)) {
 972                 rule = ERR_CAST(ft);
 973                 goto err_ft_get;
 974         }
 975
 976         if (attr->outer_match_level != MLX5_MATCH_NONE)
 977                 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
 978
 979         rule = mlx5_add_flow_rules(ft, spec,
 980                                    &flow_act, dest, dest_ix);
 981         if (IS_ERR(rule))
 982                 goto err_rule;
 983
 984         return rule;
 985
 986 err_rule:
 987         if (attr->chain || attr->prio)
 988                 mlx5_chains_put_table(nic_chains,
 989                                       attr->chain, attr->prio,
 990                                       MLX5E_TC_FT_LEVEL);
 991 err_ft_get:
 992         if (attr->dest_chain)
 993                 mlx5_chains_put_table(nic_chains,
 994                                       attr->dest_chain, 1,
 995                                       MLX5E_TC_FT_LEVEL);
 996
 997         return ERR_CAST(rule);
 998 }
 999
1000 static int
1001 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
1002                       struct mlx5e_tc_flow_parse_attr *parse_attr,
1003                       struct mlx5e_tc_flow *flow,
1004                       struct netlink_ext_ack *extack)
1005 {
1006         struct mlx5_flow_attr *attr = flow->attr;
1007         struct mlx5_core_dev *dev = priv->mdev;
1008         struct mlx5_fc *counter = NULL;
1009         int err;
1010
1011         if (flow_flag_test(flow, HAIRPIN)) {
1012                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
1013                 if (err)
1014                         return err;
1015         }
1016
1017         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1018                 counter = mlx5_fc_create(dev, true);
1019                 if (IS_ERR(counter))
1020                         return PTR_ERR(counter);
1021
1022                 attr->counter = counter;
1023         }
1024
1025         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1026                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1027                 dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
1028                 if (err)
1029                         return err;
1030         }
1031
1032         if (flow_flag_test(flow, CT))
1033                 flow->rule[0] = mlx5_tc_ct_flow_offload(get_ct_priv(priv), flow, &parse_attr->spec,
1034                                                         attr, &parse_attr->mod_hdr_acts);
1035         else
1036                 flow->rule[0] = mlx5e_add_offloaded_nic_rule(priv, &parse_attr->spec,
1037                                                              attr);
1038
1039         return PTR_ERR_OR_ZERO(flow->rule[0]);
1040 }
1041
1042 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
1043                                   struct mlx5_flow_handle *rule,
1044                                   struct mlx5_flow_attr *attr)
1045 {
1046         struct mlx5_fs_chains *nic_chains = nic_chains(priv);
1047
1048         mlx5_del_flow_rules(rule);
1049
1050         if (attr->chain || attr->prio)
1051                 mlx5_chains_put_table(nic_chains, attr->chain, attr->prio,
1052                                       MLX5E_TC_FT_LEVEL);
1053
1054         if (attr->dest_chain)
1055                 mlx5_chains_put_table(nic_chains, attr->dest_chain, 1,
1056                                       MLX5E_TC_FT_LEVEL);
1057 }
1058
1059 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
1060                                   struct mlx5e_tc_flow *flow)
1061 {
1062         struct mlx5_flow_attr *attr = flow->attr;
1063         struct mlx5e_tc_table *tc = &priv->fs.tc;
1064
1065         flow_flag_clear(flow, OFFLOADED);
1066
1067         if (flow_flag_test(flow, CT))
1068                 mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1069         else if (!IS_ERR_OR_NULL(flow->rule[0]))
1070                 mlx5e_del_offloaded_nic_rule(priv, flow->rule[0], attr);
1071
1072         /* Remove root table if no rules are left to avoid
1073          * extra steering hops.
1074          */
1075         mutex_lock(&priv->fs.tc.t_lock);
1076         if (!mlx5e_tc_num_filters(priv, MLX5_TC_FLAG(NIC_OFFLOAD)) &&
1077             !IS_ERR_OR_NULL(tc->t)) {
1078                 mlx5_chains_put_table(nic_chains(priv), 0, 1, MLX5E_TC_FT_LEVEL);
1079                 priv->fs.tc.t = NULL;
1080         }
1081         mutex_unlock(&priv->fs.tc.t_lock);
1082
1083         kvfree(attr->parse_attr);
1084
1085         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1086                 mlx5e_detach_mod_hdr(priv, flow);
1087
1088         mlx5_fc_destroy(priv->mdev, attr->counter);
1089
1090         if (flow_flag_test(flow, HAIRPIN))
1091                 mlx5e_hairpin_flow_del(priv, flow);
1092
1093         kfree(flow->attr);
1094 }
1095
1096 struct mlx5_flow_handle *
1097 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
1098                            struct mlx5e_tc_flow *flow,
1099                            struct mlx5_flow_spec *spec,
1100                            struct mlx5_flow_attr *attr)
1101 {
1102         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
1103         struct mlx5_flow_handle *rule;
1104
1105         if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
1106                 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1107
1108         if (flow_flag_test(flow, CT)) {
1109                 mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
1110
1111                 rule = mlx5_tc_ct_flow_offload(get_ct_priv(flow->priv),
1112                                                flow, spec, attr,
1113                                                mod_hdr_acts);
1114 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
1115         } else if (flow_flag_test(flow, SAMPLE)) {
1116                 rule = mlx5_esw_sample_offload(get_sample_priv(flow->priv), spec, attr);
1117 #endif
1118         } else {
1119                 rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1120         }
1121
1122         if (IS_ERR(rule))
1123                 return rule;
1124
1125         if (attr->esw_attr->split_count) {
1126                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
1127                 if (IS_ERR(flow->rule[1])) {
1128                         if (flow_flag_test(flow, CT))
1129                                 mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1130                         else
1131                                 mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
1132                         return flow->rule[1];
1133                 }
1134         }
1135
1136         return rule;
1137 }
1138
1139 void mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
1140                                   struct mlx5e_tc_flow *flow,
1141                                   struct mlx5_flow_attr *attr)
1142 {
1143         flow_flag_clear(flow, OFFLOADED);
1144
1145         if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
1146                 goto offload_rule_0;
1147
1148         if (flow_flag_test(flow, CT)) {
1149                 mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1150                 return;
1151         }
1152
1153 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
1154         if (flow_flag_test(flow, SAMPLE)) {
1155                 mlx5_esw_sample_unoffload(get_sample_priv(flow->priv), flow->rule[0], attr);
1156                 return;
1157         }
1158 #endif
1159
1160         if (attr->esw_attr->split_count)
1161                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
1162
1163 offload_rule_0:
1164         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
1165 }
1166
1167 struct mlx5_flow_handle *
1168 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
1169                               struct mlx5e_tc_flow *flow,
1170                               struct mlx5_flow_spec *spec)
1171 {
1172         struct mlx5_flow_attr *slow_attr;
1173         struct mlx5_flow_handle *rule;
1174
1175         slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1176         if (!slow_attr)
1177                 return ERR_PTR(-ENOMEM);
1178
1179         memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1180         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1181         slow_attr->esw_attr->split_count = 0;
1182         slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
1183
1184         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
1185         if (!IS_ERR(rule))
1186                 flow_flag_set(flow, SLOW);
1187
1188         kfree(slow_attr);
1189
1190         return rule;
1191 }
1192
1193 void mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
1194                                        struct mlx5e_tc_flow *flow)
1195 {
1196         struct mlx5_flow_attr *slow_attr;
1197
1198         slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1199         if (!slow_attr) {
1200                 mlx5_core_warn(flow->priv->mdev, "Unable to alloc attr to unoffload slow path rule\n");
1201                 return;
1202         }
1203
1204         memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1205         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1206         slow_attr->esw_attr->split_count = 0;
1207         slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
1208         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
1209         flow_flag_clear(flow, SLOW);
1210         kfree(slow_attr);
1211 }
1212
1213 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1214  * function.
1215  */
1216 static void unready_flow_add(struct mlx5e_tc_flow *flow,
1217                              struct list_head *unready_flows)
1218 {
1219         flow_flag_set(flow, NOT_READY);
1220         list_add_tail(&flow->unready, unready_flows);
1221 }
1222
1223 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1224  * function.
1225  */
1226 static void unready_flow_del(struct mlx5e_tc_flow *flow)
1227 {
1228         list_del(&flow->unready);
1229         flow_flag_clear(flow, NOT_READY);
1230 }
1231
1232 static void add_unready_flow(struct mlx5e_tc_flow *flow)
1233 {
1234         struct mlx5_rep_uplink_priv *uplink_priv;
1235         struct mlx5e_rep_priv *rpriv;
1236         struct mlx5_eswitch *esw;
1237
1238         esw = flow->priv->mdev->priv.eswitch;
1239         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1240         uplink_priv = &rpriv->uplink_priv;
1241
1242         mutex_lock(&uplink_priv->unready_flows_lock);
1243         unready_flow_add(flow, &uplink_priv->unready_flows);
1244         mutex_unlock(&uplink_priv->unready_flows_lock);
1245 }
1246
1247 static void remove_unready_flow(struct mlx5e_tc_flow *flow)
1248 {
1249         struct mlx5_rep_uplink_priv *uplink_priv;
1250         struct mlx5e_rep_priv *rpriv;
1251         struct mlx5_eswitch *esw;
1252
1253         esw = flow->priv->mdev->priv.eswitch;
1254         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1255         uplink_priv = &rpriv->uplink_priv;
1256
1257         mutex_lock(&uplink_priv->unready_flows_lock);
1258         unready_flow_del(flow);
1259         mutex_unlock(&uplink_priv->unready_flows_lock);
1260 }
1261
1262 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv);
1263
1264 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev)
1265 {
1266         struct mlx5_core_dev *out_mdev, *route_mdev;
1267         struct mlx5e_priv *out_priv, *route_priv;
1268
1269         out_priv = netdev_priv(out_dev);
1270         out_mdev = out_priv->mdev;
1271         route_priv = netdev_priv(route_dev);
1272         route_mdev = route_priv->mdev;
1273
1274         if (out_mdev->coredev_type != MLX5_COREDEV_PF ||
1275             route_mdev->coredev_type != MLX5_COREDEV_VF)
1276                 return false;
1277
1278         return same_hw_devs(out_priv, route_priv);
1279 }
1280
1281 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev, u16 *vport)
1282 {
1283         struct mlx5e_priv *out_priv, *route_priv;
1284         struct mlx5_core_dev *route_mdev;
1285         struct mlx5_eswitch *esw;
1286         u16 vhca_id;
1287         int err;
1288
1289         out_priv = netdev_priv(out_dev);
1290         esw = out_priv->mdev->priv.eswitch;
1291         route_priv = netdev_priv(route_dev);
1292         route_mdev = route_priv->mdev;
1293
1294         vhca_id = MLX5_CAP_GEN(route_mdev, vhca_id);
1295         err = mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport);
1296         return err;
1297 }
1298
1299 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv,
1300                               struct mlx5e_tc_flow_parse_attr *parse_attr,
1301                               struct mlx5e_tc_flow *flow)
1302 {
1303         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts = &parse_attr->mod_hdr_acts;
1304         struct mlx5_modify_hdr *mod_hdr;
1305
1306         mod_hdr = mlx5_modify_header_alloc(priv->mdev,
1307                                            get_flow_name_space(flow),
1308                                            mod_hdr_acts->num_actions,
1309                                            mod_hdr_acts->actions);
1310         if (IS_ERR(mod_hdr))
1311                 return PTR_ERR(mod_hdr);
1312
1313         WARN_ON(flow->attr->modify_hdr);
1314         flow->attr->modify_hdr = mod_hdr;
1315
1316         return 0;
1317 }
1318
1319 static int
1320 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
1321                       struct mlx5e_tc_flow *flow,
1322                       struct netlink_ext_ack *extack)
1323 {
1324         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1325         struct net_device *out_dev, *encap_dev = NULL;
1326         struct mlx5e_tc_flow_parse_attr *parse_attr;
1327         struct mlx5_flow_attr *attr = flow->attr;
1328         bool vf_tun = false, encap_valid = true;
1329         struct mlx5_esw_flow_attr *esw_attr;
1330         struct mlx5_fc *counter = NULL;
1331         struct mlx5e_rep_priv *rpriv;
1332         struct mlx5e_priv *out_priv;
1333         u32 max_prio, max_chain;
1334         int err = 0;
1335         int out_index;
1336
1337         /* We check chain range only for tc flows.
1338          * For ft flows, we checked attr->chain was originally 0 and set it to
1339          * FDB_FT_CHAIN which is outside tc range.
1340          * See mlx5e_rep_setup_ft_cb().
1341          */
1342         max_chain = mlx5_chains_get_chain_range(esw_chains(esw));
1343         if (!mlx5e_is_ft_flow(flow) && attr->chain > max_chain) {
1344                 NL_SET_ERR_MSG_MOD(extack,
1345                                    "Requested chain is out of supported range");
1346                 err = -EOPNOTSUPP;
1347                 goto err_out;
1348         }
1349
1350         max_prio = mlx5_chains_get_prio_range(esw_chains(esw));
1351         if (attr->prio > max_prio) {
1352                 NL_SET_ERR_MSG_MOD(extack,
1353                                    "Requested priority is out of supported range");
1354                 err = -EOPNOTSUPP;
1355                 goto err_out;
1356         }
1357
1358         if (flow_flag_test(flow, TUN_RX)) {
1359                 err = mlx5e_attach_decap_route(priv, flow);
1360                 if (err)
1361                         goto err_out;
1362         }
1363
1364         if (flow_flag_test(flow, L3_TO_L2_DECAP)) {
1365                 err = mlx5e_attach_decap(priv, flow, extack);
1366                 if (err)
1367                         goto err_out;
1368         }
1369
1370         parse_attr = attr->parse_attr;
1371         esw_attr = attr->esw_attr;
1372
1373         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) {
1374                 int mirred_ifindex;
1375
1376                 if (!(esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP))
1377                         continue;
1378
1379                 mirred_ifindex = parse_attr->mirred_ifindex[out_index];
1380                 out_dev = __dev_get_by_index(dev_net(priv->netdev),
1381                                              mirred_ifindex);
1382                 err = mlx5e_attach_encap(priv, flow, out_dev, out_index,
1383                                          extack, &encap_dev, &encap_valid);
1384                 if (err)
1385                         goto err_out;
1386
1387                 if (esw_attr->dests[out_index].flags &
1388                     MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE)
1389                         vf_tun = true;
1390                 out_priv = netdev_priv(encap_dev);
1391                 rpriv = out_priv->ppriv;
1392                 esw_attr->dests[out_index].rep = rpriv->rep;
1393                 esw_attr->dests[out_index].mdev = out_priv->mdev;
1394         }
1395
1396         err = mlx5_eswitch_add_vlan_action(esw, attr);
1397         if (err)
1398                 goto err_out;
1399
1400         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
1401             !(attr->ct_attr.ct_action & TCA_CT_ACT_CLEAR)) {
1402                 if (vf_tun) {
1403                         err = mlx5e_tc_add_flow_mod_hdr(priv, parse_attr, flow);
1404                         if (err)
1405                                 goto err_out;
1406                 } else {
1407                         err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1408                         if (err)
1409                                 goto err_out;
1410                 }
1411         }
1412
1413         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1414                 counter = mlx5_fc_create(esw_attr->counter_dev, true);
1415                 if (IS_ERR(counter)) {
1416                         err = PTR_ERR(counter);
1417                         goto err_out;
1418                 }
1419
1420                 attr->counter = counter;
1421         }
1422
1423         /* we get here if one of the following takes place:
1424          * (1) there's no error
1425          * (2) there's an encap action and we don't have valid neigh
1426          */
1427         if (!encap_valid)
1428                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec);
1429         else
1430                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
1431
1432         if (IS_ERR(flow->rule[0])) {
1433                 err = PTR_ERR(flow->rule[0]);
1434                 goto err_out;
1435         }
1436         flow_flag_set(flow, OFFLOADED);
1437
1438         return 0;
1439
1440 err_out:
1441         flow_flag_set(flow, FAILED);
1442         return err;
1443 }
1444
1445 static bool mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow *flow)
1446 {
1447         struct mlx5_flow_spec *spec = &flow->attr->parse_attr->spec;
1448         void *headers_v = MLX5_ADDR_OF(fte_match_param,
1449                                        spec->match_value,
1450                                        misc_parameters_3);
1451         u32 geneve_tlv_opt_0_data = MLX5_GET(fte_match_set_misc3,
1452                                              headers_v,
1453                                              geneve_tlv_option_0_data);
1454
1455         return !!geneve_tlv_opt_0_data;
1456 }
1457
1458 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1459                                   struct mlx5e_tc_flow *flow)
1460 {
1461         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1462         struct mlx5_flow_attr *attr = flow->attr;
1463         struct mlx5_esw_flow_attr *esw_attr;
1464         bool vf_tun = false;
1465         int out_index;
1466
1467         esw_attr = attr->esw_attr;
1468         mlx5e_put_flow_tunnel_id(flow);
1469
1470         if (flow_flag_test(flow, NOT_READY))
1471                 remove_unready_flow(flow);
1472
1473         if (mlx5e_is_offloaded_flow(flow)) {
1474                 if (flow_flag_test(flow, SLOW))
1475                         mlx5e_tc_unoffload_from_slow_path(esw, flow);
1476                 else
1477                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1478         }
1479
1480         if (mlx5_flow_has_geneve_opt(flow))
1481                 mlx5_geneve_tlv_option_del(priv->mdev->geneve);
1482
1483         mlx5_eswitch_del_vlan_action(esw, attr);
1484
1485         if (flow->decap_route)
1486                 mlx5e_detach_decap_route(priv, flow);
1487
1488         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) {
1489                 if (esw_attr->dests[out_index].flags &
1490                     MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE)
1491                         vf_tun = true;
1492                 if (esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP) {
1493                         mlx5e_detach_encap(priv, flow, out_index);
1494                         kfree(attr->parse_attr->tun_info[out_index]);
1495                 }
1496         }
1497
1498         mlx5_tc_ct_match_del(get_ct_priv(priv), &flow->attr->ct_attr);
1499
1500         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1501                 dealloc_mod_hdr_actions(&attr->parse_attr->mod_hdr_acts);
1502                 if (vf_tun && attr->modify_hdr)
1503                         mlx5_modify_header_dealloc(priv->mdev, attr->modify_hdr);
1504                 else
1505                         mlx5e_detach_mod_hdr(priv, flow);
1506         }
1507         kvfree(attr->parse_attr);
1508         kvfree(attr->esw_attr->rx_tun_attr);
1509
1510         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1511                 mlx5_fc_destroy(esw_attr->counter_dev, attr->counter);
1512
1513         if (flow_flag_test(flow, L3_TO_L2_DECAP))
1514                 mlx5e_detach_decap(priv, flow);
1515
1516         kfree(flow->attr->esw_attr->sample);
1517         kfree(flow->attr);
1518 }
1519
1520 struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1521 {
1522         return flow->attr->counter;
1523 }
1524
1525 /* Iterate over tmp_list of flows attached to flow_list head. */
1526 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list)
1527 {
1528         struct mlx5e_tc_flow *flow, *tmp;
1529
1530         list_for_each_entry_safe(flow, tmp, flow_list, tmp_list)
1531                 mlx5e_flow_put(priv, flow);
1532 }
1533
1534 static void __mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1535 {
1536         struct mlx5_eswitch *esw = flow->priv->mdev->priv.eswitch;
1537
1538         if (!flow_flag_test(flow, ESWITCH) ||
1539             !flow_flag_test(flow, DUP))
1540                 return;
1541
1542         mutex_lock(&esw->offloads.peer_mutex);
1543         list_del(&flow->peer);
1544         mutex_unlock(&esw->offloads.peer_mutex);
1545
1546         flow_flag_clear(flow, DUP);
1547
1548         if (refcount_dec_and_test(&flow->peer_flow->refcnt)) {
1549                 mlx5e_tc_del_fdb_flow(flow->peer_flow->priv, flow->peer_flow);
1550                 kfree(flow->peer_flow);
1551         }
1552
1553         flow->peer_flow = NULL;
1554 }
1555
1556 static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1557 {
1558         struct mlx5_core_dev *dev = flow->priv->mdev;
1559         struct mlx5_devcom *devcom = dev->priv.devcom;
1560         struct mlx5_eswitch *peer_esw;
1561
1562         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1563         if (!peer_esw)
1564                 return;
1565
1566         __mlx5e_tc_del_fdb_peer_flow(flow);
1567         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1568 }
1569
1570 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1571                               struct mlx5e_tc_flow *flow)
1572 {
1573         if (mlx5e_is_eswitch_flow(flow)) {
1574                 mlx5e_tc_del_fdb_peer_flow(flow);
1575                 mlx5e_tc_del_fdb_flow(priv, flow);
1576         } else {
1577                 mlx5e_tc_del_nic_flow(priv, flow);
1578         }
1579 }
1580
1581 static int flow_has_tc_fwd_action(struct flow_cls_offload *f)
1582 {
1583         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1584         struct flow_action *flow_action = &rule->action;
1585         const struct flow_action_entry *act;
1586         int i;
1587
1588         flow_action_for_each(i, act, flow_action) {
1589                 switch (act->id) {
1590                 case FLOW_ACTION_GOTO:
1591                         return true;
1592                 default:
1593                         continue;
1594                 }
1595         }
1596
1597         return false;
1598 }
1599
1600 static int
1601 enc_opts_is_dont_care_or_full_match(struct mlx5e_priv *priv,
1602                                     struct flow_dissector_key_enc_opts *opts,
1603                                     struct netlink_ext_ack *extack,
1604                                     bool *dont_care)
1605 {
1606         struct geneve_opt *opt;
1607         int off = 0;
1608
1609         *dont_care = true;
1610
1611         while (opts->len > off) {
1612                 opt = (struct geneve_opt *)&opts->data[off];
1613
1614                 if (!(*dont_care) || opt->opt_class || opt->type ||
1615                     memchr_inv(opt->opt_data, 0, opt->length * 4)) {
1616                         *dont_care = false;
1617
1618                         if (opt->opt_class != htons(U16_MAX) ||
1619                             opt->type != U8_MAX) {
1620                                 NL_SET_ERR_MSG(extack,
1621                                                "Partial match of tunnel options in chain > 0 isn't supported");
1622                                 netdev_warn(priv->netdev,
1623                                             "Partial match of tunnel options in chain > 0 isn't supported");
1624                                 return -EOPNOTSUPP;
1625                         }
1626                 }
1627
1628                 off += sizeof(struct geneve_opt) + opt->length * 4;
1629         }
1630
1631         return 0;
1632 }
1633
1634 #define COPY_DISSECTOR(rule, diss_key, dst)\
1635 ({ \
1636         struct flow_rule *__rule = (rule);\
1637         typeof(dst) __dst = dst;\
1638 \
1639         memcpy(__dst,\
1640                skb_flow_dissector_target(__rule->match.dissector,\
1641                                          diss_key,\
1642                                          __rule->match.key),\
1643                sizeof(*__dst));\
1644 })
1645
1646 static int mlx5e_get_flow_tunnel_id(struct mlx5e_priv *priv,
1647                                     struct mlx5e_tc_flow *flow,
1648                                     struct flow_cls_offload *f,
1649                                     struct net_device *filter_dev)
1650 {
1651         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1652         struct netlink_ext_ack *extack = f->common.extack;
1653         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
1654         struct flow_match_enc_opts enc_opts_match;
1655         struct tunnel_match_enc_opts tun_enc_opts;
1656         struct mlx5_rep_uplink_priv *uplink_priv;
1657         struct mlx5_flow_attr *attr = flow->attr;
1658         struct mlx5e_rep_priv *uplink_rpriv;
1659         struct tunnel_match_key tunnel_key;
1660         bool enc_opts_is_dont_care = true;
1661         u32 tun_id, enc_opts_id = 0;
1662         struct mlx5_eswitch *esw;
1663         u32 value, mask;
1664         int err;
1665
1666         esw = priv->mdev->priv.eswitch;
1667         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1668         uplink_priv = &uplink_rpriv->uplink_priv;
1669
1670         memset(&tunnel_key, 0, sizeof(tunnel_key));
1671         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL,
1672                        &tunnel_key.enc_control);
1673         if (tunnel_key.enc_control.addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS)
1674                 COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1675                                &tunnel_key.enc_ipv4);
1676         else
1677                 COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1678                                &tunnel_key.enc_ipv6);
1679         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IP, &tunnel_key.enc_ip);
1680         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_PORTS,
1681                        &tunnel_key.enc_tp);
1682         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_KEYID,
1683                        &tunnel_key.enc_key_id);
1684         tunnel_key.filter_ifindex = filter_dev->ifindex;
1685
1686         err = mapping_add(uplink_priv->tunnel_mapping, &tunnel_key, &tun_id);
1687         if (err)
1688                 return err;
1689
1690         flow_rule_match_enc_opts(rule, &enc_opts_match);
1691         err = enc_opts_is_dont_care_or_full_match(priv,
1692                                                   enc_opts_match.mask,
1693                                                   extack,
1694                                                   &enc_opts_is_dont_care);
1695         if (err)
1696                 goto err_enc_opts;
1697
1698         if (!enc_opts_is_dont_care) {
1699                 memset(&tun_enc_opts, 0, sizeof(tun_enc_opts));
1700                 memcpy(&tun_enc_opts.key, enc_opts_match.key,
1701                        sizeof(*enc_opts_match.key));
1702                 memcpy(&tun_enc_opts.mask, enc_opts_match.mask,
1703                        sizeof(*enc_opts_match.mask));
1704
1705                 err = mapping_add(uplink_priv->tunnel_enc_opts_mapping,
1706                                   &tun_enc_opts, &enc_opts_id);
1707                 if (err)
1708                         goto err_enc_opts;
1709         }
1710
1711         value = tun_id << ENC_OPTS_BITS | enc_opts_id;
1712         mask = enc_opts_id ? TUNNEL_ID_MASK :
1713                              (TUNNEL_ID_MASK & ~ENC_OPTS_BITS_MASK);
1714
1715         if (attr->chain) {
1716                 mlx5e_tc_match_to_reg_match(&attr->parse_attr->spec,
1717                                             TUNNEL_TO_REG, value, mask);
1718         } else {
1719                 mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
1720                 err = mlx5e_tc_match_to_reg_set(priv->mdev,
1721                                                 mod_hdr_acts, MLX5_FLOW_NAMESPACE_FDB,
1722                                                 TUNNEL_TO_REG, value);
1723                 if (err)
1724                         goto err_set;
1725
1726                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1727         }
1728
1729         flow->tunnel_id = value;
1730         return 0;
1731
1732 err_set:
1733         if (enc_opts_id)
1734                 mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
1735                                enc_opts_id);
1736 err_enc_opts:
1737         mapping_remove(uplink_priv->tunnel_mapping, tun_id);
1738         return err;
1739 }
1740
1741 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow)
1742 {
1743         u32 enc_opts_id = flow->tunnel_id & ENC_OPTS_BITS_MASK;
1744         u32 tun_id = flow->tunnel_id >> ENC_OPTS_BITS;
1745         struct mlx5_rep_uplink_priv *uplink_priv;
1746         struct mlx5e_rep_priv *uplink_rpriv;
1747         struct mlx5_eswitch *esw;
1748
1749         esw = flow->priv->mdev->priv.eswitch;
1750         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1751         uplink_priv = &uplink_rpriv->uplink_priv;
1752
1753         if (tun_id)
1754                 mapping_remove(uplink_priv->tunnel_mapping, tun_id);
1755         if (enc_opts_id)
1756                 mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
1757                                enc_opts_id);
1758 }
1759
1760 u32 mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow *flow)
1761 {
1762         return flow->tunnel_id;
1763 }
1764
1765 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
1766                             struct flow_match_basic *match, bool outer,
1767                             void *headers_c, void *headers_v)
1768 {
1769         bool ip_version_cap;
1770
1771         ip_version_cap = outer ?
1772                 MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
1773                                           ft_field_support.outer_ip_version) :
1774                 MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
1775                                           ft_field_support.inner_ip_version);
1776
1777         if (ip_version_cap && match->mask->n_proto == htons(0xFFFF) &&
1778             (match->key->n_proto == htons(ETH_P_IP) ||
1779              match->key->n_proto == htons(ETH_P_IPV6))) {
1780                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_version);
1781                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version,
1782                          match->key->n_proto == htons(ETH_P_IP) ? 4 : 6);
1783         } else {
1784                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1785                          ntohs(match->mask->n_proto));
1786                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1787                          ntohs(match->key->n_proto));
1788         }
1789 }
1790
1791 u8 mlx5e_tc_get_ip_version(struct mlx5_flow_spec *spec, bool outer)
1792 {
1793         void *headers_v;
1794         u16 ethertype;
1795         u8 ip_version;
1796
1797         if (outer)
1798                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1799         else
1800                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, inner_headers);
1801
1802         ip_version = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_version);
1803         /* Return ip_version converted from ethertype anyway */
1804         if (!ip_version) {
1805                 ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1806                 if (ethertype == ETH_P_IP || ethertype == ETH_P_ARP)
1807                         ip_version = 4;
1808                 else if (ethertype == ETH_P_IPV6)
1809                         ip_version = 6;
1810         }
1811         return ip_version;
1812 }
1813
1814 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1815                              struct mlx5e_tc_flow *flow,
1816                              struct mlx5_flow_spec *spec,
1817                              struct flow_cls_offload *f,
1818                              struct net_device *filter_dev,
1819                              u8 *match_level,
1820                              bool *match_inner)
1821 {
1822         struct mlx5e_tc_tunnel *tunnel = mlx5e_get_tc_tun(filter_dev);
1823         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1824         struct netlink_ext_ack *extack = f->common.extack;
1825         bool needs_mapping, sets_mapping;
1826         int err;
1827
1828         if (!mlx5e_is_eswitch_flow(flow))
1829                 return -EOPNOTSUPP;
1830
1831         needs_mapping = !!flow->attr->chain;
1832         sets_mapping = !flow->attr->chain && flow_has_tc_fwd_action(f);
1833         *match_inner = !needs_mapping;
1834
1835         if ((needs_mapping || sets_mapping) &&
1836             !mlx5_eswitch_reg_c1_loopback_enabled(esw)) {
1837                 NL_SET_ERR_MSG(extack,
1838                                "Chains on tunnel devices isn't supported without register loopback support");
1839                 netdev_warn(priv->netdev,
1840                             "Chains on tunnel devices isn't supported without register loopback support");
1841                 return -EOPNOTSUPP;
1842         }
1843
1844         if (!flow->attr->chain) {
1845                 err = mlx5e_tc_tun_parse(filter_dev, priv, spec, f,
1846                                          match_level);
1847                 if (err) {
1848                         NL_SET_ERR_MSG_MOD(extack,
1849                                            "Failed to parse tunnel attributes");
1850                         netdev_warn(priv->netdev,
1851                                     "Failed to parse tunnel attributes");
1852                         return err;
1853                 }
1854
1855                 /* With mpls over udp we decapsulate using packet reformat
1856                  * object
1857                  */
1858                 if (!netif_is_bareudp(filter_dev))
1859                         flow->attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
1860                 err = mlx5e_tc_set_attr_rx_tun(flow, spec);
1861                 if (err)
1862                         return err;
1863         } else if (tunnel && tunnel->tunnel_type == MLX5E_TC_TUNNEL_TYPE_VXLAN) {
1864                 struct mlx5_flow_spec *tmp_spec;
1865
1866                 tmp_spec = kvzalloc(sizeof(*tmp_spec), GFP_KERNEL);
1867                 if (!tmp_spec) {
1868                         NL_SET_ERR_MSG_MOD(extack, "Failed to allocate memory for vxlan tmp spec");
1869                         netdev_warn(priv->netdev, "Failed to allocate memory for vxlan tmp spec");
1870                         return -ENOMEM;
1871                 }
1872                 memcpy(tmp_spec, spec, sizeof(*tmp_spec));
1873
1874                 err = mlx5e_tc_tun_parse(filter_dev, priv, tmp_spec, f, match_level);
1875                 if (err) {
1876                         kvfree(tmp_spec);
1877                         NL_SET_ERR_MSG_MOD(extack, "Failed to parse tunnel attributes");
1878                         netdev_warn(priv->netdev, "Failed to parse tunnel attributes");
1879                         return err;
1880                 }
1881                 err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);
1882                 kvfree(tmp_spec);
1883                 if (err)
1884                         return err;
1885         }
1886
1887         if (!needs_mapping && !sets_mapping)
1888                 return 0;
1889
1890         return mlx5e_get_flow_tunnel_id(priv, flow, f, filter_dev);
1891 }
1892
1893 static void *get_match_inner_headers_criteria(struct mlx5_flow_spec *spec)
1894 {
1895         return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1896                             inner_headers);
1897 }
1898
1899 static void *get_match_inner_headers_value(struct mlx5_flow_spec *spec)
1900 {
1901         return MLX5_ADDR_OF(fte_match_param, spec->match_value,
1902                             inner_headers);
1903 }
1904
1905 static void *get_match_outer_headers_criteria(struct mlx5_flow_spec *spec)
1906 {
1907         return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1908                             outer_headers);
1909 }
1910
1911 static void *get_match_outer_headers_value(struct mlx5_flow_spec *spec)
1912 {
1913         return MLX5_ADDR_OF(fte_match_param, spec->match_value,
1914                             outer_headers);
1915 }
1916
1917 static void *get_match_headers_value(u32 flags,
1918                                      struct mlx5_flow_spec *spec)
1919 {
1920         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
1921                 get_match_inner_headers_value(spec) :
1922                 get_match_outer_headers_value(spec);
1923 }
1924
1925 static void *get_match_headers_criteria(u32 flags,
1926                                         struct mlx5_flow_spec *spec)
1927 {
1928         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
1929                 get_match_inner_headers_criteria(spec) :
1930                 get_match_outer_headers_criteria(spec);
1931 }
1932
1933 static int mlx5e_flower_parse_meta(struct net_device *filter_dev,
1934                                    struct flow_cls_offload *f)
1935 {
1936         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1937         struct netlink_ext_ack *extack = f->common.extack;
1938         struct net_device *ingress_dev;
1939         struct flow_match_meta match;
1940
1941         if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))
1942                 return 0;
1943
1944         flow_rule_match_meta(rule, &match);
1945         if (!match.mask->ingress_ifindex)
1946                 return 0;
1947
1948         if (match.mask->ingress_ifindex != 0xFFFFFFFF) {
1949                 NL_SET_ERR_MSG_MOD(extack, "Unsupported ingress ifindex mask");
1950                 return -EOPNOTSUPP;
1951         }
1952
1953         ingress_dev = __dev_get_by_index(dev_net(filter_dev),
1954                                          match.key->ingress_ifindex);
1955         if (!ingress_dev) {
1956                 NL_SET_ERR_MSG_MOD(extack,
1957                                    "Can't find the ingress port to match on");
1958                 return -ENOENT;
1959         }
1960
1961         if (ingress_dev != filter_dev) {
1962                 NL_SET_ERR_MSG_MOD(extack,
1963                                    "Can't match on the ingress filter port");
1964                 return -EOPNOTSUPP;
1965         }
1966
1967         return 0;
1968 }
1969
1970 static bool skip_key_basic(struct net_device *filter_dev,
1971                            struct flow_cls_offload *f)
1972 {
1973         /* When doing mpls over udp decap, the user needs to provide
1974          * MPLS_UC as the protocol in order to be able to match on mpls
1975          * label fields.  However, the actual ethertype is IP so we want to
1976          * avoid matching on this, otherwise we'll fail the match.
1977          */
1978         if (netif_is_bareudp(filter_dev) && f->common.chain_index == 0)
1979                 return true;
1980
1981         return false;
1982 }
1983
1984 static int __parse_cls_flower(struct mlx5e_priv *priv,
1985                               struct mlx5e_tc_flow *flow,
1986                               struct mlx5_flow_spec *spec,
1987                               struct flow_cls_offload *f,
1988                               struct net_device *filter_dev,
1989                               u8 *inner_match_level, u8 *outer_match_level)
1990 {
1991         struct netlink_ext_ack *extack = f->common.extack;
1992         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1993                                        outer_headers);
1994         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1995                                        outer_headers);
1996         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1997                                     misc_parameters);
1998         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
1999                                     misc_parameters);
2000         void *misc_c_3 = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2001                                     misc_parameters_3);
2002         void *misc_v_3 = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2003                                     misc_parameters_3);
2004         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2005         struct flow_dissector *dissector = rule->match.dissector;
2006         u16 addr_type = 0;
2007         u8 ip_proto = 0;
2008         u8 *match_level;
2009         int err;
2010
2011         match_level = outer_match_level;
2012
2013         if (dissector->used_keys &
2014             ~(BIT(FLOW_DISSECTOR_KEY_META) |
2015               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2016               BIT(FLOW_DISSECTOR_KEY_BASIC) |
2017               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2018               BIT(FLOW_DISSECTOR_KEY_VLAN) |
2019               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
2020               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
2021               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
2022               BIT(FLOW_DISSECTOR_KEY_PORTS) |
2023               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
2024               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
2025               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
2026               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
2027               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
2028               BIT(FLOW_DISSECTOR_KEY_TCP) |
2029               BIT(FLOW_DISSECTOR_KEY_IP)  |
2030               BIT(FLOW_DISSECTOR_KEY_CT) |
2031               BIT(FLOW_DISSECTOR_KEY_ENC_IP) |
2032               BIT(FLOW_DISSECTOR_KEY_ENC_OPTS) |
2033               BIT(FLOW_DISSECTOR_KEY_ICMP) |
2034               BIT(FLOW_DISSECTOR_KEY_MPLS))) {
2035                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
2036                 netdev_dbg(priv->netdev, "Unsupported key used: 0x%x\n",
2037                            dissector->used_keys);
2038                 return -EOPNOTSUPP;
2039         }
2040
2041         if (mlx5e_get_tc_tun(filter_dev)) {
2042                 bool match_inner = false;
2043
2044                 err = parse_tunnel_attr(priv, flow, spec, f, filter_dev,
2045                                         outer_match_level, &match_inner);
2046                 if (err)
2047                         return err;
2048
2049                 if (match_inner) {
2050                         /* header pointers should point to the inner headers
2051                          * if the packet was decapsulated already.
2052                          * outer headers are set by parse_tunnel_attr.
2053                          */
2054                         match_level = inner_match_level;
2055                         headers_c = get_match_inner_headers_criteria(spec);
2056                         headers_v = get_match_inner_headers_value(spec);
2057                 }
2058         }
2059
2060         err = mlx5e_flower_parse_meta(filter_dev, f);
2061         if (err)
2062                 return err;
2063
2064         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC) &&
2065             !skip_key_basic(filter_dev, f)) {
2066                 struct flow_match_basic match;
2067
2068                 flow_rule_match_basic(rule, &match);
2069                 mlx5e_tc_set_ethertype(priv->mdev, &match,
2070                                        match_level == outer_match_level,
2071                                        headers_c, headers_v);
2072
2073                 if (match.mask->n_proto)
2074                         *match_level = MLX5_MATCH_L2;
2075         }
2076         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN) ||
2077             is_vlan_dev(filter_dev)) {
2078                 struct flow_dissector_key_vlan filter_dev_mask;
2079                 struct flow_dissector_key_vlan filter_dev_key;
2080                 struct flow_match_vlan match;
2081
2082                 if (is_vlan_dev(filter_dev)) {
2083                         match.key = &filter_dev_key;
2084                         match.key->vlan_id = vlan_dev_vlan_id(filter_dev);
2085                         match.key->vlan_tpid = vlan_dev_vlan_proto(filter_dev);
2086                         match.key->vlan_priority = 0;
2087                         match.mask = &filter_dev_mask;
2088                         memset(match.mask, 0xff, sizeof(*match.mask));
2089                         match.mask->vlan_priority = 0;
2090                 } else {
2091                         flow_rule_match_vlan(rule, &match);
2092                 }
2093                 if (match.mask->vlan_id ||
2094                     match.mask->vlan_priority ||
2095                     match.mask->vlan_tpid) {
2096                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2097                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2098                                          svlan_tag, 1);
2099                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2100                                          svlan_tag, 1);
2101                         } else {
2102                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2103                                          cvlan_tag, 1);
2104                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2105                                          cvlan_tag, 1);
2106                         }
2107
2108                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid,
2109                                  match.mask->vlan_id);
2110                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid,
2111                                  match.key->vlan_id);
2112
2113                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio,
2114                                  match.mask->vlan_priority);
2115                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio,
2116                                  match.key->vlan_priority);
2117
2118                         *match_level = MLX5_MATCH_L2;
2119                 }
2120         } else if (*match_level != MLX5_MATCH_NONE) {
2121                 /* cvlan_tag enabled in match criteria and
2122                  * disabled in match value means both S & C tags
2123                  * don't exist (untagged of both)
2124                  */
2125                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
2126                 *match_level = MLX5_MATCH_L2;
2127         }
2128
2129         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN)) {
2130                 struct flow_match_vlan match;
2131
2132                 flow_rule_match_cvlan(rule, &match);
2133                 if (match.mask->vlan_id ||
2134                     match.mask->vlan_priority ||
2135                     match.mask->vlan_tpid) {
2136                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2137                                 MLX5_SET(fte_match_set_misc, misc_c,
2138                                          outer_second_svlan_tag, 1);
2139                                 MLX5_SET(fte_match_set_misc, misc_v,
2140                                          outer_second_svlan_tag, 1);
2141                         } else {
2142                                 MLX5_SET(fte_match_set_misc, misc_c,
2143                                          outer_second_cvlan_tag, 1);
2144                                 MLX5_SET(fte_match_set_misc, misc_v,
2145                                          outer_second_cvlan_tag, 1);
2146                         }
2147
2148                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
2149                                  match.mask->vlan_id);
2150                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
2151                                  match.key->vlan_id);
2152                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
2153                                  match.mask->vlan_priority);
2154                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
2155                                  match.key->vlan_priority);
2156
2157                         *match_level = MLX5_MATCH_L2;
2158                         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
2159                 }
2160         }
2161
2162         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2163                 struct flow_match_eth_addrs match;
2164
2165                 flow_rule_match_eth_addrs(rule, &match);
2166                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2167                                              dmac_47_16),
2168                                 match.mask->dst);
2169                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2170                                              dmac_47_16),
2171                                 match.key->dst);
2172
2173                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2174                                              smac_47_16),
2175                                 match.mask->src);
2176                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2177                                              smac_47_16),
2178                                 match.key->src);
2179
2180                 if (!is_zero_ether_addr(match.mask->src) ||
2181                     !is_zero_ether_addr(match.mask->dst))
2182                         *match_level = MLX5_MATCH_L2;
2183         }
2184
2185         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
2186                 struct flow_match_control match;
2187
2188                 flow_rule_match_control(rule, &match);
2189                 addr_type = match.key->addr_type;
2190
2191                 /* the HW doesn't support frag first/later */
2192                 if (match.mask->flags & FLOW_DIS_FIRST_FRAG)
2193                         return -EOPNOTSUPP;
2194
2195                 if (match.mask->flags & FLOW_DIS_IS_FRAGMENT) {
2196                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
2197                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
2198                                  match.key->flags & FLOW_DIS_IS_FRAGMENT);
2199
2200                         /* the HW doesn't need L3 inline to match on frag=no */
2201                         if (!(match.key->flags & FLOW_DIS_IS_FRAGMENT))
2202                                 *match_level = MLX5_MATCH_L2;
2203         /* ***  L2 attributes parsing up to here *** */
2204                         else
2205                                 *match_level = MLX5_MATCH_L3;
2206                 }
2207         }
2208
2209         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2210                 struct flow_match_basic match;
2211
2212                 flow_rule_match_basic(rule, &match);
2213                 ip_proto = match.key->ip_proto;
2214
2215                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
2216                          match.mask->ip_proto);
2217                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
2218                          match.key->ip_proto);
2219
2220                 if (match.mask->ip_proto)
2221                         *match_level = MLX5_MATCH_L3;
2222         }
2223
2224         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
2225                 struct flow_match_ipv4_addrs match;
2226
2227                 flow_rule_match_ipv4_addrs(rule, &match);
2228                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2229                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
2230                        &match.mask->src, sizeof(match.mask->src));
2231                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2232                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
2233                        &match.key->src, sizeof(match.key->src));
2234                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2235                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2236                        &match.mask->dst, sizeof(match.mask->dst));
2237                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2238                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2239                        &match.key->dst, sizeof(match.key->dst));
2240
2241                 if (match.mask->src || match.mask->dst)
2242                         *match_level = MLX5_MATCH_L3;
2243         }
2244
2245         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
2246                 struct flow_match_ipv6_addrs match;
2247
2248                 flow_rule_match_ipv6_addrs(rule, &match);
2249                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2250                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
2251                        &match.mask->src, sizeof(match.mask->src));
2252                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2253                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
2254                        &match.key->src, sizeof(match.key->src));
2255
2256                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2257                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2258                        &match.mask->dst, sizeof(match.mask->dst));
2259                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2260                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2261                        &match.key->dst, sizeof(match.key->dst));
2262
2263                 if (ipv6_addr_type(&match.mask->src) != IPV6_ADDR_ANY ||
2264                     ipv6_addr_type(&match.mask->dst) != IPV6_ADDR_ANY)
2265                         *match_level = MLX5_MATCH_L3;
2266         }
2267
2268         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
2269                 struct flow_match_ip match;
2270
2271                 flow_rule_match_ip(rule, &match);
2272                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn,
2273                          match.mask->tos & 0x3);
2274                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn,
2275                          match.key->tos & 0x3);
2276
2277                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp,
2278                          match.mask->tos >> 2);
2279                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp,
2280                          match.key->tos  >> 2);
2281
2282                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit,
2283                          match.mask->ttl);
2284                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit,
2285                          match.key->ttl);
2286
2287                 if (match.mask->ttl &&
2288                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
2289                                                 ft_field_support.outer_ipv4_ttl)) {
2290                         NL_SET_ERR_MSG_MOD(extack,
2291                                            "Matching on TTL is not supported");
2292                         return -EOPNOTSUPP;
2293                 }
2294
2295                 if (match.mask->tos || match.mask->ttl)
2296                         *match_level = MLX5_MATCH_L3;
2297         }
2298
2299         /* ***  L3 attributes parsing up to here *** */
2300
2301         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
2302                 struct flow_match_ports match;
2303
2304                 flow_rule_match_ports(rule, &match);
2305                 switch (ip_proto) {
2306                 case IPPROTO_TCP:
2307                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2308                                  tcp_sport, ntohs(match.mask->src));
2309                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2310                                  tcp_sport, ntohs(match.key->src));
2311
2312                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2313                                  tcp_dport, ntohs(match.mask->dst));
2314                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2315                                  tcp_dport, ntohs(match.key->dst));
2316                         break;
2317
2318                 case IPPROTO_UDP:
2319                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2320                                  udp_sport, ntohs(match.mask->src));
2321                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2322                                  udp_sport, ntohs(match.key->src));
2323
2324                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2325                                  udp_dport, ntohs(match.mask->dst));
2326                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2327                                  udp_dport, ntohs(match.key->dst));
2328                         break;
2329                 default:
2330                         NL_SET_ERR_MSG_MOD(extack,
2331                                            "Only UDP and TCP transports are supported for L4 matching");
2332                         netdev_err(priv->netdev,
2333                                    "Only UDP and TCP transport are supported\n");
2334                         return -EINVAL;
2335                 }
2336
2337                 if (match.mask->src || match.mask->dst)
2338                         *match_level = MLX5_MATCH_L4;
2339         }
2340
2341         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_TCP)) {
2342                 struct flow_match_tcp match;
2343
2344                 flow_rule_match_tcp(rule, &match);
2345                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
2346                          ntohs(match.mask->flags));
2347                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
2348                          ntohs(match.key->flags));
2349
2350                 if (match.mask->flags)
2351                         *match_level = MLX5_MATCH_L4;
2352         }
2353         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ICMP)) {
2354                 struct flow_match_icmp match;
2355
2356                 flow_rule_match_icmp(rule, &match);
2357                 switch (ip_proto) {
2358                 case IPPROTO_ICMP:
2359                         if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
2360                               MLX5_FLEX_PROTO_ICMP))
2361                                 return -EOPNOTSUPP;
2362                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_type,
2363                                  match.mask->type);
2364                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_type,
2365                                  match.key->type);
2366                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_code,
2367                                  match.mask->code);
2368                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_code,
2369                                  match.key->code);
2370                         break;
2371                 case IPPROTO_ICMPV6:
2372                         if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
2373                               MLX5_FLEX_PROTO_ICMPV6))
2374                                 return -EOPNOTSUPP;
2375                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_type,
2376                                  match.mask->type);
2377                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_type,
2378                                  match.key->type);
2379                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_code,
2380                                  match.mask->code);
2381                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_code,
2382                                  match.key->code);
2383                         break;
2384                 default:
2385                         NL_SET_ERR_MSG_MOD(extack,
2386                                            "Code and type matching only with ICMP and ICMPv6");
2387                         netdev_err(priv->netdev,
2388                                    "Code and type matching only with ICMP and ICMPv6\n");
2389                         return -EINVAL;
2390                 }
2391                 if (match.mask->code || match.mask->type) {
2392                         *match_level = MLX5_MATCH_L4;
2393                         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_3;
2394                 }
2395         }
2396         /* Currenlty supported only for MPLS over UDP */
2397         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_MPLS) &&
2398             !netif_is_bareudp(filter_dev)) {
2399                 NL_SET_ERR_MSG_MOD(extack,
2400                                    "Matching on MPLS is supported only for MPLS over UDP");
2401                 netdev_err(priv->netdev,
2402                            "Matching on MPLS is supported only for MPLS over UDP\n");
2403                 return -EOPNOTSUPP;
2404         }
2405
2406         return 0;
2407 }
2408
2409 static int parse_cls_flower(struct mlx5e_priv *priv,
2410                             struct mlx5e_tc_flow *flow,
2411                             struct mlx5_flow_spec *spec,
2412                             struct flow_cls_offload *f,
2413                             struct net_device *filter_dev)
2414 {
2415         u8 inner_match_level, outer_match_level, non_tunnel_match_level;
2416         struct netlink_ext_ack *extack = f->common.extack;
2417         struct mlx5_core_dev *dev = priv->mdev;
2418         struct mlx5_eswitch *esw = dev->priv.eswitch;
2419         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2420         struct mlx5_eswitch_rep *rep;
2421         bool is_eswitch_flow;
2422         int err;
2423
2424         inner_match_level = MLX5_MATCH_NONE;
2425         outer_match_level = MLX5_MATCH_NONE;
2426
2427         err = __parse_cls_flower(priv, flow, spec, f, filter_dev,
2428                                  &inner_match_level, &outer_match_level);
2429         non_tunnel_match_level = (inner_match_level == MLX5_MATCH_NONE) ?
2430                                  outer_match_level : inner_match_level;
2431
2432         is_eswitch_flow = mlx5e_is_eswitch_flow(flow);
2433         if (!err && is_eswitch_flow) {
2434                 rep = rpriv->rep;
2435                 if (rep->vport != MLX5_VPORT_UPLINK &&
2436                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
2437                     esw->offloads.inline_mode < non_tunnel_match_level)) {
2438                         NL_SET_ERR_MSG_MOD(extack,
2439                                            "Flow is not offloaded due to min inline setting");
2440                         netdev_warn(priv->netdev,
2441                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
2442                                     non_tunnel_match_level, esw->offloads.inline_mode);
2443                         return -EOPNOTSUPP;
2444                 }
2445         }
2446
2447         flow->attr->inner_match_level = inner_match_level;
2448         flow->attr->outer_match_level = outer_match_level;
2449
2450
2451         return err;
2452 }
2453
2454 struct pedit_headers {
2455         struct ethhdr  eth;
2456         struct vlan_hdr vlan;
2457         struct iphdr   ip4;
2458         struct ipv6hdr ip6;
2459         struct tcphdr  tcp;
2460         struct udphdr  udp;
2461 };
2462
2463 struct pedit_headers_action {
2464         struct pedit_headers    vals;
2465         struct pedit_headers    masks;
2466         u32                     pedits;
2467 };
2468
2469 static int pedit_header_offsets[] = {
2470         [FLOW_ACT_MANGLE_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
2471         [FLOW_ACT_MANGLE_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
2472         [FLOW_ACT_MANGLE_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
2473         [FLOW_ACT_MANGLE_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
2474         [FLOW_ACT_MANGLE_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
2475 };
2476
2477 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
2478
2479 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
2480                          struct pedit_headers_action *hdrs)
2481 {
2482         u32 *curr_pmask, *curr_pval;
2483
2484         curr_pmask = (u32 *)(pedit_header(&hdrs->masks, hdr_type) + offset);
2485         curr_pval  = (u32 *)(pedit_header(&hdrs->vals, hdr_type) + offset);
2486
2487         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
2488                 goto out_err;
2489
2490         *curr_pmask |= mask;
2491         *curr_pval  |= (val & mask);
2492
2493         return 0;
2494
2495 out_err:
2496         return -EOPNOTSUPP;
2497 }
2498
2499 struct mlx5_fields {
2500         u8  field;
2501         u8  field_bsize;
2502         u32 field_mask;
2503         u32 offset;
2504         u32 match_offset;
2505 };
2506
2507 #define OFFLOAD(fw_field, field_bsize, field_mask, field, off, match_field) \
2508                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, field_bsize, field_mask, \
2509                  offsetof(struct pedit_headers, field) + (off), \
2510                  MLX5_BYTE_OFF(fte_match_set_lyr_2_4, match_field)}
2511
2512 /* masked values are the same and there are no rewrites that do not have a
2513  * match.
2514  */
2515 #define SAME_VAL_MASK(type, valp, maskp, matchvalp, matchmaskp) ({ \
2516         type matchmaskx = *(type *)(matchmaskp); \
2517         type matchvalx = *(type *)(matchvalp); \
2518         type maskx = *(type *)(maskp); \
2519         type valx = *(type *)(valp); \
2520         \
2521         (valx & maskx) == (matchvalx & matchmaskx) && !(maskx & (maskx ^ \
2522                                                                  matchmaskx)); \
2523 })
2524
2525 static bool cmp_val_mask(void *valp, void *maskp, void *matchvalp,
2526                          void *matchmaskp, u8 bsize)
2527 {
2528         bool same = false;
2529
2530         switch (bsize) {
2531         case 8:
2532                 same = SAME_VAL_MASK(u8, valp, maskp, matchvalp, matchmaskp);
2533                 break;
2534         case 16:
2535                 same = SAME_VAL_MASK(u16, valp, maskp, matchvalp, matchmaskp);
2536                 break;
2537         case 32:
2538                 same = SAME_VAL_MASK(u32, valp, maskp, matchvalp, matchmaskp);
2539                 break;
2540         }
2541
2542         return same;
2543 }
2544
2545 static struct mlx5_fields fields[] = {
2546         OFFLOAD(DMAC_47_16, 32, U32_MAX, eth.h_dest[0], 0, dmac_47_16),
2547         OFFLOAD(DMAC_15_0,  16, U16_MAX, eth.h_dest[4], 0, dmac_15_0),
2548         OFFLOAD(SMAC_47_16, 32, U32_MAX, eth.h_source[0], 0, smac_47_16),
2549         OFFLOAD(SMAC_15_0,  16, U16_MAX, eth.h_source[4], 0, smac_15_0),
2550         OFFLOAD(ETHERTYPE,  16, U16_MAX, eth.h_proto, 0, ethertype),
2551         OFFLOAD(FIRST_VID,  16, U16_MAX, vlan.h_vlan_TCI, 0, first_vid),
2552
2553         OFFLOAD(IP_DSCP, 8,    0xfc, ip4.tos,   0, ip_dscp),
2554         OFFLOAD(IP_TTL,  8,  U8_MAX, ip4.ttl,   0, ttl_hoplimit),
2555         OFFLOAD(SIPV4,  32, U32_MAX, ip4.saddr, 0, src_ipv4_src_ipv6.ipv4_layout.ipv4),
2556         OFFLOAD(DIPV4,  32, U32_MAX, ip4.daddr, 0, dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2557
2558         OFFLOAD(SIPV6_127_96, 32, U32_MAX, ip6.saddr.s6_addr32[0], 0,
2559                 src_ipv4_src_ipv6.ipv6_layout.ipv6[0]),
2560         OFFLOAD(SIPV6_95_64,  32, U32_MAX, ip6.saddr.s6_addr32[1], 0,
2561                 src_ipv4_src_ipv6.ipv6_layout.ipv6[4]),
2562         OFFLOAD(SIPV6_63_32,  32, U32_MAX, ip6.saddr.s6_addr32[2], 0,
2563                 src_ipv4_src_ipv6.ipv6_layout.ipv6[8]),
2564         OFFLOAD(SIPV6_31_0,   32, U32_MAX, ip6.saddr.s6_addr32[3], 0,
2565                 src_ipv4_src_ipv6.ipv6_layout.ipv6[12]),
2566         OFFLOAD(DIPV6_127_96, 32, U32_MAX, ip6.daddr.s6_addr32[0], 0,
2567                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[0]),
2568         OFFLOAD(DIPV6_95_64,  32, U32_MAX, ip6.daddr.s6_addr32[1], 0,
2569                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[4]),
2570         OFFLOAD(DIPV6_63_32,  32, U32_MAX, ip6.daddr.s6_addr32[2], 0,
2571                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[8]),
2572         OFFLOAD(DIPV6_31_0,   32, U32_MAX, ip6.daddr.s6_addr32[3], 0,
2573                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[12]),
2574         OFFLOAD(IPV6_HOPLIMIT, 8,  U8_MAX, ip6.hop_limit, 0, ttl_hoplimit),
2575         OFFLOAD(IP_DSCP, 16,  0xc00f, ip6, 0, ip_dscp),
2576
2577         OFFLOAD(TCP_SPORT, 16, U16_MAX, tcp.source,  0, tcp_sport),
2578         OFFLOAD(TCP_DPORT, 16, U16_MAX, tcp.dest,    0, tcp_dport),
2579         /* in linux iphdr tcp_flags is 8 bits long */
2580         OFFLOAD(TCP_FLAGS,  8,  U8_MAX, tcp.ack_seq, 5, tcp_flags),
2581
2582         OFFLOAD(UDP_SPORT, 16, U16_MAX, udp.source, 0, udp_sport),
2583         OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest,   0, udp_dport),
2584 };
2585
2586 static unsigned long mask_to_le(unsigned long mask, int size)
2587 {
2588         __be32 mask_be32;
2589         __be16 mask_be16;
2590
2591         if (size == 32) {
2592                 mask_be32 = (__force __be32)(mask);
2593                 mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
2594         } else if (size == 16) {
2595                 mask_be32 = (__force __be32)(mask);
2596                 mask_be16 = *(__be16 *)&mask_be32;
2597                 mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
2598         }
2599
2600         return mask;
2601 }
2602 static int offload_pedit_fields(struct mlx5e_priv *priv,
2603                                 int namespace,
2604                                 struct pedit_headers_action *hdrs,
2605                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2606                                 u32 *action_flags,
2607                                 struct netlink_ext_ack *extack)
2608 {
2609         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
2610         int i, action_size, first, last, next_z;
2611         void *headers_c, *headers_v, *action, *vals_p;
2612         u32 *s_masks_p, *a_masks_p, s_mask, a_mask;
2613         struct mlx5e_tc_mod_hdr_acts *mod_acts;
2614         struct mlx5_fields *f;
2615         unsigned long mask, field_mask;
2616         int err;
2617         u8 cmd;
2618
2619         mod_acts = &parse_attr->mod_hdr_acts;
2620         headers_c = get_match_headers_criteria(*action_flags, &parse_attr->spec);
2621         headers_v = get_match_headers_value(*action_flags, &parse_attr->spec);
2622
2623         set_masks = &hdrs[0].masks;
2624         add_masks = &hdrs[1].masks;
2625         set_vals = &hdrs[0].vals;
2626         add_vals = &hdrs[1].vals;
2627
2628         action_size = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);
2629
2630         for (i = 0; i < ARRAY_SIZE(fields); i++) {
2631                 bool skip;
2632
2633                 f = &fields[i];
2634                 /* avoid seeing bits set from previous iterations */
2635                 s_mask = 0;
2636                 a_mask = 0;
2637
2638                 s_masks_p = (void *)set_masks + f->offset;
2639                 a_masks_p = (void *)add_masks + f->offset;
2640
2641                 s_mask = *s_masks_p & f->field_mask;
2642                 a_mask = *a_masks_p & f->field_mask;
2643
2644                 if (!s_mask && !a_mask) /* nothing to offload here */
2645                         continue;
2646
2647                 if (s_mask && a_mask) {
2648                         NL_SET_ERR_MSG_MOD(extack,
2649                                            "can't set and add to the same HW field");
2650                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
2651                         return -EOPNOTSUPP;
2652                 }
2653
2654                 skip = false;
2655                 if (s_mask) {
2656                         void *match_mask = headers_c + f->match_offset;
2657                         void *match_val = headers_v + f->match_offset;
2658
2659                         cmd  = MLX5_ACTION_TYPE_SET;
2660                         mask = s_mask;
2661                         vals_p = (void *)set_vals + f->offset;
2662                         /* don't rewrite if we have a match on the same value */
2663                         if (cmp_val_mask(vals_p, s_masks_p, match_val,
2664                                          match_mask, f->field_bsize))
2665                                 skip = true;
2666                         /* clear to denote we consumed this field */
2667                         *s_masks_p &= ~f->field_mask;
2668                 } else {
2669                         cmd  = MLX5_ACTION_TYPE_ADD;
2670                         mask = a_mask;
2671                         vals_p = (void *)add_vals + f->offset;
2672                         /* add 0 is no change */
2673                         if ((*(u32 *)vals_p & f->field_mask) == 0)
2674                                 skip = true;
2675                         /* clear to denote we consumed this field */
2676                         *a_masks_p &= ~f->field_mask;
2677                 }
2678                 if (skip)
2679                         continue;
2680
2681                 mask = mask_to_le(mask, f->field_bsize);
2682
2683                 first = find_first_bit(&mask, f->field_bsize);
2684                 next_z = find_next_zero_bit(&mask, f->field_bsize, first);
2685                 last  = find_last_bit(&mask, f->field_bsize);
2686                 if (first < next_z && next_z < last) {
2687                         NL_SET_ERR_MSG_MOD(extack,
2688                                            "rewrite of few sub-fields isn't supported");
2689                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
2690                                mask);
2691                         return -EOPNOTSUPP;
2692                 }
2693
2694                 err = alloc_mod_hdr_actions(priv->mdev, namespace, mod_acts);
2695                 if (err) {
2696                         NL_SET_ERR_MSG_MOD(extack,
2697                                            "too many pedit actions, can't offload");
2698                         mlx5_core_warn(priv->mdev,
2699                                        "mlx5: parsed %d pedit actions, can't do more\n",
2700                                        mod_acts->num_actions);
2701                         return err;
2702                 }
2703
2704                 action = mod_acts->actions +
2705                          (mod_acts->num_actions * action_size);
2706                 MLX5_SET(set_action_in, action, action_type, cmd);
2707                 MLX5_SET(set_action_in, action, field, f->field);
2708
2709                 if (cmd == MLX5_ACTION_TYPE_SET) {
2710                         int start;
2711
2712                         field_mask = mask_to_le(f->field_mask, f->field_bsize);
2713
2714                         /* if field is bit sized it can start not from first bit */
2715                         start = find_first_bit(&field_mask, f->field_bsize);
2716
2717                         MLX5_SET(set_action_in, action, offset, first - start);
2718                         /* length is num of bits to be written, zero means length of 32 */
2719                         MLX5_SET(set_action_in, action, length, (last - first + 1));
2720                 }
2721
2722                 if (f->field_bsize == 32)
2723                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
2724                 else if (f->field_bsize == 16)
2725                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
2726                 else if (f->field_bsize == 8)
2727                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
2728
2729                 ++mod_acts->num_actions;
2730         }
2731
2732         return 0;
2733 }
2734
2735 static int mlx5e_flow_namespace_max_modify_action(struct mlx5_core_dev *mdev,
2736                                                   int namespace)
2737 {
2738         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2739                 return MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, max_modify_header_actions);
2740         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2741                 return MLX5_CAP_FLOWTABLE_NIC_RX(mdev, max_modify_header_actions);
2742 }
2743
2744 int alloc_mod_hdr_actions(struct mlx5_core_dev *mdev,
2745                           int namespace,
2746                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts)
2747 {
2748         int action_size, new_num_actions, max_hw_actions;
2749         size_t new_sz, old_sz;
2750         void *ret;
2751
2752         if (mod_hdr_acts->num_actions < mod_hdr_acts->max_actions)
2753                 return 0;
2754
2755         action_size = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);
2756
2757         max_hw_actions = mlx5e_flow_namespace_max_modify_action(mdev,
2758                                                                 namespace);
2759         new_num_actions = min(max_hw_actions,
2760                               mod_hdr_acts->actions ?
2761                               mod_hdr_acts->max_actions * 2 : 1);
2762         if (mod_hdr_acts->max_actions == new_num_actions)
2763                 return -ENOSPC;
2764
2765         new_sz = action_size * new_num_actions;
2766         old_sz = mod_hdr_acts->max_actions * action_size;
2767         ret = krealloc(mod_hdr_acts->actions, new_sz, GFP_KERNEL);
2768         if (!ret)
2769                 return -ENOMEM;
2770
2771         memset(ret + old_sz, 0, new_sz - old_sz);
2772         mod_hdr_acts->actions = ret;
2773         mod_hdr_acts->max_actions = new_num_actions;
2774
2775         return 0;
2776 }
2777
2778 void dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts)
2779 {
2780         kfree(mod_hdr_acts->actions);
2781         mod_hdr_acts->actions = NULL;
2782         mod_hdr_acts->num_actions = 0;
2783         mod_hdr_acts->max_actions = 0;
2784 }
2785
2786 static const struct pedit_headers zero_masks = {};
2787
2788 static int
2789 parse_pedit_to_modify_hdr(struct mlx5e_priv *priv,
2790                           const struct flow_action_entry *act, int namespace,
2791                           struct mlx5e_tc_flow_parse_attr *parse_attr,
2792                           struct pedit_headers_action *hdrs,
2793                           struct netlink_ext_ack *extack)
2794 {
2795         u8 cmd = (act->id == FLOW_ACTION_MANGLE) ? 0 : 1;
2796         int err = -EOPNOTSUPP;
2797         u32 mask, val, offset;
2798         u8 htype;
2799
2800         htype = act->mangle.htype;
2801         err = -EOPNOTSUPP; /* can't be all optimistic */
2802
2803         if (htype == FLOW_ACT_MANGLE_UNSPEC) {
2804                 NL_SET_ERR_MSG_MOD(extack, "legacy pedit isn't offloaded");
2805                 goto out_err;
2806         }
2807
2808         if (!mlx5e_flow_namespace_max_modify_action(priv->mdev, namespace)) {
2809                 NL_SET_ERR_MSG_MOD(extack,
2810                                    "The pedit offload action is not supported");
2811                 goto out_err;
2812         }
2813
2814         mask = act->mangle.mask;
2815         val = act->mangle.val;
2816         offset = act->mangle.offset;
2817
2818         err = set_pedit_val(htype, ~mask, val, offset, &hdrs[cmd]);
2819         if (err)
2820                 goto out_err;
2821
2822         hdrs[cmd].pedits++;
2823
2824         return 0;
2825 out_err:
2826         return err;
2827 }
2828
2829 static int
2830 parse_pedit_to_reformat(struct mlx5e_priv *priv,
2831                         const struct flow_action_entry *act,
2832                         struct mlx5e_tc_flow_parse_attr *parse_attr,
2833                         struct netlink_ext_ack *extack)
2834 {
2835         u32 mask, val, offset;
2836         u32 *p;
2837
2838         if (act->id != FLOW_ACTION_MANGLE)
2839                 return -EOPNOTSUPP;
2840
2841         if (act->mangle.htype != FLOW_ACT_MANGLE_HDR_TYPE_ETH) {
2842                 NL_SET_ERR_MSG_MOD(extack, "Only Ethernet modification is supported");
2843                 return -EOPNOTSUPP;
2844         }
2845
2846         mask = ~act->mangle.mask;
2847         val = act->mangle.val;
2848         offset = act->mangle.offset;
2849         p = (u32 *)&parse_attr->eth;
2850         *(p + (offset >> 2)) |= (val & mask);
2851
2852         return 0;
2853 }
2854
2855 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
2856                                  const struct flow_action_entry *act, int namespace,
2857                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2858                                  struct pedit_headers_action *hdrs,
2859                                  struct mlx5e_tc_flow *flow,
2860                                  struct netlink_ext_ack *extack)
2861 {
2862         if (flow && flow_flag_test(flow, L3_TO_L2_DECAP))
2863                 return parse_pedit_to_reformat(priv, act, parse_attr, extack);
2864
2865         return parse_pedit_to_modify_hdr(priv, act, namespace,
2866                                          parse_attr, hdrs, extack);
2867 }
2868
2869 static int alloc_tc_pedit_action(struct mlx5e_priv *priv, int namespace,
2870                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2871                                  struct pedit_headers_action *hdrs,
2872                                  u32 *action_flags,
2873                                  struct netlink_ext_ack *extack)
2874 {
2875         struct pedit_headers *cmd_masks;
2876         int err;
2877         u8 cmd;
2878
2879         err = offload_pedit_fields(priv, namespace, hdrs, parse_attr,
2880                                    action_flags, extack);
2881         if (err < 0)
2882                 goto out_dealloc_parsed_actions;
2883
2884         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
2885                 cmd_masks = &hdrs[cmd].masks;
2886                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
2887                         NL_SET_ERR_MSG_MOD(extack,
2888                                            "attempt to offload an unsupported field");
2889                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
2890                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
2891                                        16, 1, cmd_masks, sizeof(zero_masks), true);
2892                         err = -EOPNOTSUPP;
2893                         goto out_dealloc_parsed_actions;
2894                 }
2895         }
2896
2897         return 0;
2898
2899 out_dealloc_parsed_actions:
2900         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
2901         return err;
2902 }
2903
2904 static bool csum_offload_supported(struct mlx5e_priv *priv,
2905                                    u32 action,
2906                                    u32 update_flags,
2907                                    struct netlink_ext_ack *extack)
2908 {
2909         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2910                          TCA_CSUM_UPDATE_FLAG_UDP;
2911
2912         /*  The HW recalcs checksums only if re-writing headers */
2913         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2914                 NL_SET_ERR_MSG_MOD(extack,
2915                                    "TC csum action is only offloaded with pedit");
2916                 netdev_warn(priv->netdev,
2917                             "TC csum action is only offloaded with pedit\n");
2918                 return false;
2919         }
2920
2921         if (update_flags & ~prot_flags) {
2922                 NL_SET_ERR_MSG_MOD(extack,
2923                                    "can't offload TC csum action for some header/s");
2924                 netdev_warn(priv->netdev,
2925                             "can't offload TC csum action for some header/s - flags %#x\n",
2926                             update_flags);
2927                 return false;
2928         }
2929
2930         return true;
2931 }
2932
2933 struct ip_ttl_word {
2934         __u8    ttl;
2935         __u8    protocol;
2936         __sum16 check;
2937 };
2938
2939 struct ipv6_hoplimit_word {
2940         __be16  payload_len;
2941         __u8    nexthdr;
2942         __u8    hop_limit;
2943 };
2944
2945 static int is_action_keys_supported(const struct flow_action_entry *act,
2946                                     bool ct_flow, bool *modify_ip_header,
2947                                     bool *modify_tuple,
2948                                     struct netlink_ext_ack *extack)
2949 {
2950         u32 mask, offset;
2951         u8 htype;
2952
2953         htype = act->mangle.htype;
2954         offset = act->mangle.offset;
2955         mask = ~act->mangle.mask;
2956         /* For IPv4 & IPv6 header check 4 byte word,
2957          * to determine that modified fields
2958          * are NOT ttl & hop_limit only.
2959          */
2960         if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP4) {
2961                 struct ip_ttl_word *ttl_word =
2962                         (struct ip_ttl_word *)&mask;
2963
2964                 if (offset != offsetof(struct iphdr, ttl) ||
2965                     ttl_word->protocol ||
2966                     ttl_word->check) {
2967                         *modify_ip_header = true;
2968                 }
2969
2970                 if (offset >= offsetof(struct iphdr, saddr))
2971                         *modify_tuple = true;
2972
2973                 if (ct_flow && *modify_tuple) {
2974                         NL_SET_ERR_MSG_MOD(extack,
2975                                            "can't offload re-write of ipv4 address with action ct");
2976                         return -EOPNOTSUPP;
2977                 }
2978         } else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP6) {
2979                 struct ipv6_hoplimit_word *hoplimit_word =
2980                         (struct ipv6_hoplimit_word *)&mask;
2981
2982                 if (offset != offsetof(struct ipv6hdr, payload_len) ||
2983                     hoplimit_word->payload_len ||
2984                     hoplimit_word->nexthdr) {
2985                         *modify_ip_header = true;
2986                 }
2987
2988                 if (ct_flow && offset >= offsetof(struct ipv6hdr, saddr))
2989                         *modify_tuple = true;
2990
2991                 if (ct_flow && *modify_tuple) {
2992                         NL_SET_ERR_MSG_MOD(extack,
2993                                            "can't offload re-write of ipv6 address with action ct");
2994                         return -EOPNOTSUPP;
2995                 }
2996         } else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_TCP ||
2997                    htype == FLOW_ACT_MANGLE_HDR_TYPE_UDP) {
2998                 *modify_tuple = true;
2999                 if (ct_flow) {
3000                         NL_SET_ERR_MSG_MOD(extack,
3001                                            "can't offload re-write of transport header ports with action ct");
3002                         return -EOPNOTSUPP;
3003                 }
3004         }
3005
3006         return 0;
3007 }
3008
3009 static bool modify_tuple_supported(bool modify_tuple, bool ct_clear,
3010                                    bool ct_flow, struct netlink_ext_ack *extack,
3011                                    struct mlx5e_priv *priv,
3012                                    struct mlx5_flow_spec *spec)
3013 {
3014         if (!modify_tuple || ct_clear)
3015                 return true;
3016
3017         if (ct_flow) {
3018                 NL_SET_ERR_MSG_MOD(extack,
3019                                    "can't offload tuple modification with non-clear ct()");
3020                 netdev_info(priv->netdev,
3021                             "can't offload tuple modification with non-clear ct()");
3022                 return false;
3023         }
3024
3025         /* Add ct_state=-trk match so it will be offloaded for non ct flows
3026          * (or after clear action), as otherwise, since the tuple is changed,
3027          * we can't restore ct state
3028          */
3029         if (mlx5_tc_ct_add_no_trk_match(spec)) {
3030                 NL_SET_ERR_MSG_MOD(extack,
3031                                    "can't offload tuple modification with ct matches and no ct(clear) action");
3032                 netdev_info(priv->netdev,
3033                             "can't offload tuple modification with ct matches and no ct(clear) action");
3034                 return false;
3035         }
3036
3037         return true;
3038 }
3039
3040 static bool modify_header_match_supported(struct mlx5e_priv *priv,
3041                                           struct mlx5_flow_spec *spec,
3042                                           struct flow_action *flow_action,
3043                                           u32 actions, bool ct_flow,
3044                                           bool ct_clear,
3045                                           struct netlink_ext_ack *extack)
3046 {
3047         const struct flow_action_entry *act;
3048         bool modify_ip_header, modify_tuple;
3049         void *headers_c;
3050         void *headers_v;
3051         u16 ethertype;
3052         u8 ip_proto;
3053         int i, err;
3054
3055         headers_c = get_match_headers_criteria(actions, spec);
3056         headers_v = get_match_headers_value(actions, spec);
3057         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
3058
3059         /* for non-IP we only re-write MACs, so we're okay */
3060         if (MLX5_GET(fte_match_set_lyr_2_4, headers_c, ip_version) == 0 &&
3061             ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
3062                 goto out_ok;
3063
3064         modify_ip_header = false;
3065         modify_tuple = false;
3066         flow_action_for_each(i, act, flow_action) {
3067                 if (act->id != FLOW_ACTION_MANGLE &&
3068                     act->id != FLOW_ACTION_ADD)
3069                         continue;
3070
3071                 err = is_action_keys_supported(act, ct_flow,
3072                                                &modify_ip_header,
3073                                                &modify_tuple, extack);
3074                 if (err)
3075                         return err;
3076         }
3077
3078         if (!modify_tuple_supported(modify_tuple, ct_clear, ct_flow, extack,
3079                                     priv, spec))
3080                 return false;
3081
3082         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
3083         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
3084             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
3085                 NL_SET_ERR_MSG_MOD(extack,
3086                                    "can't offload re-write of non TCP/UDP");
3087                 netdev_info(priv->netdev, "can't offload re-write of ip proto %d\n",
3088                             ip_proto);
3089                 return false;
3090         }
3091
3092 out_ok:
3093         return true;
3094 }
3095
3096 static bool actions_match_supported(struct mlx5e_priv *priv,
3097                                     struct flow_action *flow_action,
3098                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
3099                                     struct mlx5e_tc_flow *flow,
3100                                     struct netlink_ext_ack *extack)
3101 {
3102         bool ct_flow = false, ct_clear = false;
3103         u32 actions;
3104
3105         ct_clear = flow->attr->ct_attr.ct_action &
3106                 TCA_CT_ACT_CLEAR;
3107         ct_flow = flow_flag_test(flow, CT) && !ct_clear;
3108         actions = flow->attr->action;
3109
3110         if (mlx5e_is_eswitch_flow(flow)) {
3111                 if (flow->attr->esw_attr->split_count && ct_flow &&
3112                     !MLX5_CAP_GEN(flow->attr->esw_attr->in_mdev, reg_c_preserve)) {
3113                         /* All registers used by ct are cleared when using
3114                          * split rules.
3115                          */
3116                         NL_SET_ERR_MSG_MOD(extack,
3117                                            "Can't offload mirroring with action ct");
3118                         return false;
3119                 }
3120         }
3121
3122         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
3123                 return modify_header_match_supported(priv, &parse_attr->spec,
3124                                                      flow_action, actions,
3125                                                      ct_flow, ct_clear,
3126                                                      extack);
3127
3128         return true;
3129 }
3130
3131 static bool same_port_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3132 {
3133         return priv->mdev == peer_priv->mdev;
3134 }
3135
3136 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3137 {
3138         struct mlx5_core_dev *fmdev, *pmdev;
3139         u64 fsystem_guid, psystem_guid;
3140
3141         fmdev = priv->mdev;
3142         pmdev = peer_priv->mdev;
3143
3144         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
3145         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
3146
3147         return (fsystem_guid == psystem_guid);
3148 }
3149
3150 static bool same_vf_reps(struct mlx5e_priv *priv,
3151                          struct net_device *out_dev)
3152 {
3153         return mlx5e_eswitch_vf_rep(priv->netdev) &&
3154                priv->netdev == out_dev;
3155 }
3156
3157 static int add_vlan_rewrite_action(struct mlx5e_priv *priv, int namespace,
3158                                    const struct flow_action_entry *act,
3159                                    struct mlx5e_tc_flow_parse_attr *parse_attr,
3160                                    struct pedit_headers_action *hdrs,
3161                                    u32 *action, struct netlink_ext_ack *extack)
3162 {
3163         u16 mask16 = VLAN_VID_MASK;
3164         u16 val16 = act->vlan.vid & VLAN_VID_MASK;
3165         const struct flow_action_entry pedit_act = {
3166                 .id = FLOW_ACTION_MANGLE,
3167                 .mangle.htype = FLOW_ACT_MANGLE_HDR_TYPE_ETH,
3168                 .mangle.offset = offsetof(struct vlan_ethhdr, h_vlan_TCI),
3169                 .mangle.mask = ~(u32)be16_to_cpu(*(__be16 *)&mask16),
3170                 .mangle.val = (u32)be16_to_cpu(*(__be16 *)&val16),
3171         };
3172         u8 match_prio_mask, match_prio_val;
3173         void *headers_c, *headers_v;
3174         int err;
3175
3176         headers_c = get_match_headers_criteria(*action, &parse_attr->spec);
3177         headers_v = get_match_headers_value(*action, &parse_attr->spec);
3178
3179         if (!(MLX5_GET(fte_match_set_lyr_2_4, headers_c, cvlan_tag) &&
3180               MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag))) {
3181                 NL_SET_ERR_MSG_MOD(extack,
3182                                    "VLAN rewrite action must have VLAN protocol match");
3183                 return -EOPNOTSUPP;
3184         }
3185
3186         match_prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
3187         match_prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
3188         if (act->vlan.prio != (match_prio_val & match_prio_mask)) {
3189                 NL_SET_ERR_MSG_MOD(extack,
3190                                    "Changing VLAN prio is not supported");
3191                 return -EOPNOTSUPP;
3192         }
3193
3194         err = parse_tc_pedit_action(priv, &pedit_act, namespace, parse_attr, hdrs, NULL, extack);
3195         *action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3196
3197         return err;
3198 }
3199
3200 static int
3201 add_vlan_prio_tag_rewrite_action(struct mlx5e_priv *priv,
3202                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
3203                                  struct pedit_headers_action *hdrs,
3204                                  u32 *action, struct netlink_ext_ack *extack)
3205 {
3206         const struct flow_action_entry prio_tag_act = {
3207                 .vlan.vid = 0,
3208                 .vlan.prio =
3209                         MLX5_GET(fte_match_set_lyr_2_4,
3210                                  get_match_headers_value(*action,
3211                                                          &parse_attr->spec),
3212                                  first_prio) &
3213                         MLX5_GET(fte_match_set_lyr_2_4,
3214                                  get_match_headers_criteria(*action,
3215                                                             &parse_attr->spec),
3216                                  first_prio),
3217         };
3218
3219         return add_vlan_rewrite_action(priv, MLX5_FLOW_NAMESPACE_FDB,
3220                                        &prio_tag_act, parse_attr, hdrs, action,
3221                                        extack);
3222 }
3223
3224 static int validate_goto_chain(struct mlx5e_priv *priv,
3225                                struct mlx5e_tc_flow *flow,
3226                                const struct flow_action_entry *act,
3227                                u32 actions,
3228                                struct netlink_ext_ack *extack)
3229 {
3230         bool is_esw = mlx5e_is_eswitch_flow(flow);
3231         struct mlx5_flow_attr *attr = flow->attr;
3232         bool ft_flow = mlx5e_is_ft_flow(flow);
3233         u32 dest_chain = act->chain_index;
3234         struct mlx5_fs_chains *chains;
3235         struct mlx5_eswitch *esw;
3236         u32 reformat_and_fwd;
3237         u32 max_chain;
3238
3239         esw = priv->mdev->priv.eswitch;
3240         chains = is_esw ? esw_chains(esw) : nic_chains(priv);
3241         max_chain = mlx5_chains_get_chain_range(chains);
3242         reformat_and_fwd = is_esw ?
3243                            MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, reformat_and_fwd_to_table) :
3244                            MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, reformat_and_fwd_to_table);
3245
3246         if (ft_flow) {
3247                 NL_SET_ERR_MSG_MOD(extack, "Goto action is not supported");
3248                 return -EOPNOTSUPP;
3249         }
3250
3251         if (!mlx5_chains_backwards_supported(chains) &&
3252             dest_chain <= attr->chain) {
3253                 NL_SET_ERR_MSG_MOD(extack,
3254                                    "Goto lower numbered chain isn't supported");
3255                 return -EOPNOTSUPP;
3256         }
3257
3258         if (dest_chain > max_chain) {
3259                 NL_SET_ERR_MSG_MOD(extack,
3260                                    "Requested destination chain is out of supported range");
3261                 return -EOPNOTSUPP;
3262         }
3263
3264         if (actions & (MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
3265                        MLX5_FLOW_CONTEXT_ACTION_DECAP) &&
3266             !reformat_and_fwd) {
3267                 NL_SET_ERR_MSG_MOD(extack,
3268                                    "Goto chain is not allowed if action has reformat or decap");
3269                 return -EOPNOTSUPP;
3270         }
3271
3272         return 0;
3273 }
3274
3275 static int parse_tc_nic_actions(struct mlx5e_priv *priv,
3276                                 struct flow_action *flow_action,
3277                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
3278                                 struct mlx5e_tc_flow *flow,
3279                                 struct netlink_ext_ack *extack)
3280 {
3281         struct mlx5_flow_attr *attr = flow->attr;
3282         struct pedit_headers_action hdrs[2] = {};
3283         const struct flow_action_entry *act;
3284         struct mlx5_nic_flow_attr *nic_attr;
3285         u32 action = 0;
3286         int err, i;
3287
3288         if (!flow_action_has_entries(flow_action))
3289                 return -EINVAL;
3290
3291         if (!flow_action_hw_stats_check(flow_action, extack,
3292                                         FLOW_ACTION_HW_STATS_DELAYED_BIT))
3293                 return -EOPNOTSUPP;
3294
3295         nic_attr = attr->nic_attr;
3296
3297         nic_attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
3298
3299         flow_action_for_each(i, act, flow_action) {
3300                 switch (act->id) {
3301                 case FLOW_ACTION_ACCEPT:
3302                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3303                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
3304                         break;
3305                 case FLOW_ACTION_DROP:
3306                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
3307                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
3308                                                flow_table_properties_nic_receive.flow_counter))
3309                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3310                         break;
3311                 case FLOW_ACTION_MANGLE:
3312                 case FLOW_ACTION_ADD:
3313                         err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_KERNEL,
3314                                                     parse_attr, hdrs, NULL, extack);
3315                         if (err)
3316                                 return err;
3317
3318                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3319                         break;
3320                 case FLOW_ACTION_VLAN_MANGLE:
3321                         err = add_vlan_rewrite_action(priv,
3322                                                       MLX5_FLOW_NAMESPACE_KERNEL,
3323                                                       act, parse_attr, hdrs,
3324                                                       &action, extack);
3325                         if (err)
3326                                 return err;
3327
3328                         break;
3329                 case FLOW_ACTION_CSUM:
3330                         if (csum_offload_supported(priv, action,
3331                                                    act->csum_flags,
3332                                                    extack))
3333                                 break;
3334
3335                         return -EOPNOTSUPP;
3336                 case FLOW_ACTION_REDIRECT: {
3337                         struct net_device *peer_dev = act->dev;
3338
3339                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
3340                             same_hw_devs(priv, netdev_priv(peer_dev))) {
3341                                 parse_attr->mirred_ifindex[0] = peer_dev->ifindex;
3342                                 flow_flag_set(flow, HAIRPIN);
3343                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3344                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
3345                         } else {
3346                                 NL_SET_ERR_MSG_MOD(extack,
3347                                                    "device is not on same HW, can't offload");
3348                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
3349                                             peer_dev->name);
3350                                 return -EINVAL;
3351                         }
3352                         }
3353                         break;
3354                 case FLOW_ACTION_MARK: {
3355                         u32 mark = act->mark;
3356
3357                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
3358                                 NL_SET_ERR_MSG_MOD(extack,
3359                                                    "Bad flow mark - only 16 bit is supported");
3360                                 return -EINVAL;
3361                         }
3362
3363                         nic_attr->flow_tag = mark;
3364                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3365                         }
3366                         break;
3367                 case FLOW_ACTION_GOTO:
3368                         err = validate_goto_chain(priv, flow, act, action,
3369                                                   extack);
3370                         if (err)
3371                                 return err;
3372
3373                         action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3374                         attr->dest_chain = act->chain_index;
3375                         break;
3376                 case FLOW_ACTION_CT:
3377                         err = mlx5_tc_ct_parse_action(get_ct_priv(priv), attr, act, extack);
3378                         if (err)
3379                                 return err;
3380
3381                         flow_flag_set(flow, CT);
3382                         break;
3383                 default:
3384                         NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
3385                         return -EOPNOTSUPP;
3386                 }
3387         }
3388
3389         if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
3390             hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
3391                 err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_KERNEL,
3392                                             parse_attr, hdrs, &action, extack);
3393                 if (err)
3394                         return err;
3395                 /* in case all pedit actions are skipped, remove the MOD_HDR
3396                  * flag.
3397                  */
3398                 if (parse_attr->mod_hdr_acts.num_actions == 0) {
3399                         action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3400                         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
3401                 }
3402         }
3403
3404         attr->action = action;
3405
3406         if (attr->dest_chain) {
3407                 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
3408                         NL_SET_ERR_MSG(extack, "Mirroring goto chain rules isn't supported");
3409                         return -EOPNOTSUPP;
3410                 }
3411                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3412         }
3413
3414         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
3415                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3416
3417         if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
3418                 return -EOPNOTSUPP;
3419
3420         return 0;
3421 }
3422
3423 static bool is_merged_eswitch_vfs(struct mlx5e_priv *priv,
3424                                   struct net_device *peer_netdev)
3425 {
3426         struct mlx5e_priv *peer_priv;
3427
3428         peer_priv = netdev_priv(peer_netdev);
3429
3430         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
3431                 mlx5e_eswitch_vf_rep(priv->netdev) &&
3432                 mlx5e_eswitch_vf_rep(peer_netdev) &&
3433                 same_hw_devs(priv, peer_priv));
3434 }
3435
3436 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
3437                                 const struct flow_action_entry *act,
3438                                 struct mlx5_esw_flow_attr *attr,
3439                                 u32 *action)
3440 {
3441         u8 vlan_idx = attr->total_vlan;
3442
3443         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
3444                 return -EOPNOTSUPP;
3445
3446         switch (act->id) {
3447         case FLOW_ACTION_VLAN_POP:
3448                 if (vlan_idx) {
3449                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
3450                                                                  MLX5_FS_VLAN_DEPTH))
3451                                 return -EOPNOTSUPP;
3452
3453                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
3454                 } else {
3455                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3456                 }
3457                 break;
3458         case FLOW_ACTION_VLAN_PUSH:
3459                 attr->vlan_vid[vlan_idx] = act->vlan.vid;
3460                 attr->vlan_prio[vlan_idx] = act->vlan.prio;
3461                 attr->vlan_proto[vlan_idx] = act->vlan.proto;
3462                 if (!attr->vlan_proto[vlan_idx])
3463                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
3464
3465                 if (vlan_idx) {
3466                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
3467                                                                  MLX5_FS_VLAN_DEPTH))
3468                                 return -EOPNOTSUPP;
3469
3470                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
3471                 } else {
3472                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
3473                             (act->vlan.proto != htons(ETH_P_8021Q) ||
3474                              act->vlan.prio))
3475                                 return -EOPNOTSUPP;
3476
3477                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
3478                 }
3479                 break;
3480         default:
3481                 return -EINVAL;
3482         }
3483
3484         attr->total_vlan = vlan_idx + 1;
3485
3486         return 0;
3487 }
3488
3489 static struct net_device *get_fdb_out_dev(struct net_device *uplink_dev,
3490                                           struct net_device *out_dev)
3491 {
3492         struct net_device *fdb_out_dev = out_dev;
3493         struct net_device *uplink_upper;
3494
3495         rcu_read_lock();
3496         uplink_upper = netdev_master_upper_dev_get_rcu(uplink_dev);
3497         if (uplink_upper && netif_is_lag_master(uplink_upper) &&
3498             uplink_upper == out_dev) {
3499                 fdb_out_dev = uplink_dev;
3500         } else if (netif_is_lag_master(out_dev)) {
3501                 fdb_out_dev = bond_option_active_slave_get_rcu(netdev_priv(out_dev));
3502                 if (fdb_out_dev &&
3503                     (!mlx5e_eswitch_rep(fdb_out_dev) ||
3504                      !netdev_port_same_parent_id(fdb_out_dev, uplink_dev)))
3505                         fdb_out_dev = NULL;
3506         }
3507         rcu_read_unlock();
3508         return fdb_out_dev;
3509 }
3510
3511 static int add_vlan_push_action(struct mlx5e_priv *priv,
3512                                 struct mlx5_flow_attr *attr,
3513                                 struct net_device **out_dev,
3514                                 u32 *action)
3515 {
3516         struct net_device *vlan_dev = *out_dev;
3517         struct flow_action_entry vlan_act = {
3518                 .id = FLOW_ACTION_VLAN_PUSH,
3519                 .vlan.vid = vlan_dev_vlan_id(vlan_dev),
3520                 .vlan.proto = vlan_dev_vlan_proto(vlan_dev),
3521                 .vlan.prio = 0,
3522         };
3523         int err;
3524
3525         err = parse_tc_vlan_action(priv, &vlan_act, attr->esw_attr, action);
3526         if (err)
3527                 return err;
3528
3529         *out_dev = dev_get_by_index_rcu(dev_net(vlan_dev),
3530                                         dev_get_iflink(vlan_dev));
3531         if (is_vlan_dev(*out_dev))
3532                 err = add_vlan_push_action(priv, attr, out_dev, action);
3533
3534         return err;
3535 }
3536
3537 static int add_vlan_pop_action(struct mlx5e_priv *priv,
3538                                struct mlx5_flow_attr *attr,
3539                                u32 *action)
3540 {
3541         struct flow_action_entry vlan_act = {
3542                 .id = FLOW_ACTION_VLAN_POP,
3543         };
3544         int nest_level, err = 0;
3545
3546         nest_level = attr->parse_attr->filter_dev->lower_level -
3547                                                 priv->netdev->lower_level;
3548         while (nest_level--) {
3549                 err = parse_tc_vlan_action(priv, &vlan_act, attr->esw_attr, action);
3550                 if (err)
3551                         return err;
3552         }
3553
3554         return err;
3555 }
3556
3557 static bool same_hw_reps(struct mlx5e_priv *priv,
3558                          struct net_device *peer_netdev)
3559 {
3560         struct mlx5e_priv *peer_priv;
3561
3562         peer_priv = netdev_priv(peer_netdev);
3563
3564         return mlx5e_eswitch_rep(priv->netdev) &&
3565                mlx5e_eswitch_rep(peer_netdev) &&
3566                same_hw_devs(priv, peer_priv);
3567 }
3568
3569 static bool is_lag_dev(struct mlx5e_priv *priv,
3570                        struct net_device *peer_netdev)
3571 {
3572         return ((mlx5_lag_is_sriov(priv->mdev) ||
3573                  mlx5_lag_is_multipath(priv->mdev)) &&
3574                  same_hw_reps(priv, peer_netdev));
3575 }
3576
3577 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
3578                                     struct net_device *out_dev)
3579 {
3580         if (is_merged_eswitch_vfs(priv, out_dev))
3581                 return true;
3582
3583         if (is_lag_dev(priv, out_dev))
3584                 return true;
3585
3586         return mlx5e_eswitch_rep(out_dev) &&
3587                same_port_devs(priv, netdev_priv(out_dev));
3588 }
3589
3590 static bool is_duplicated_output_device(struct net_device *dev,
3591                                         struct net_device *out_dev,
3592                                         int *ifindexes, int if_count,
3593                                         struct netlink_ext_ack *extack)
3594 {
3595         int i;
3596
3597         for (i = 0; i < if_count; i++) {
3598                 if (ifindexes[i] == out_dev->ifindex) {
3599                         NL_SET_ERR_MSG_MOD(extack,
3600                                            "can't duplicate output to same device");
3601                         netdev_err(dev, "can't duplicate output to same device: %s\n",
3602                                    out_dev->name);
3603                         return true;
3604                 }
3605         }
3606
3607         return false;
3608 }
3609
3610 static int verify_uplink_forwarding(struct mlx5e_priv *priv,
3611                                     struct mlx5e_tc_flow *flow,
3612                                     struct net_device *out_dev,
3613                                     struct netlink_ext_ack *extack)
3614 {
3615         struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
3616         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3617         struct mlx5e_rep_priv *rep_priv;
3618
3619         /* Forwarding non encapsulated traffic between
3620          * uplink ports is allowed only if
3621          * termination_table_raw_traffic cap is set.
3622          *
3623          * Input vport was stored attr->in_rep.
3624          * In LAG case, *priv* is the private data of
3625          * uplink which may be not the input vport.
3626          */
3627         rep_priv = mlx5e_rep_to_rep_priv(attr->in_rep);
3628
3629         if (!(mlx5e_eswitch_uplink_rep(rep_priv->netdev) &&
3630               mlx5e_eswitch_uplink_rep(out_dev)))
3631                 return 0;
3632
3633         if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev,
3634                                         termination_table_raw_traffic)) {
3635                 NL_SET_ERR_MSG_MOD(extack,
3636                                    "devices are both uplink, can't offload forwarding");
3637                         pr_err("devices %s %s are both uplink, can't offload forwarding\n",
3638                                priv->netdev->name, out_dev->name);
3639                         return -EOPNOTSUPP;
3640         } else if (out_dev != rep_priv->netdev) {
3641                 NL_SET_ERR_MSG_MOD(extack,
3642                                    "devices are not the same uplink, can't offload forwarding");
3643                 pr_err("devices %s %s are both uplink but not the same, can't offload forwarding\n",
3644                        priv->netdev->name, out_dev->name);
3645                 return -EOPNOTSUPP;
3646         }
3647         return 0;
3648 }
3649
3650 static int parse_tc_fdb_actions(struct mlx5e_priv *priv,
3651                                 struct flow_action *flow_action,
3652                                 struct mlx5e_tc_flow *flow,
3653                                 struct netlink_ext_ack *extack,
3654                                 struct net_device *filter_dev)
3655 {
3656         struct pedit_headers_action hdrs[2] = {};
3657         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3658         struct mlx5e_tc_flow_parse_attr *parse_attr;
3659         struct mlx5e_rep_priv *rpriv = priv->ppriv;
3660         const struct ip_tunnel_info *info = NULL;
3661         struct mlx5_flow_attr *attr = flow->attr;
3662         int ifindexes[MLX5_MAX_FLOW_FWD_VPORTS];
3663         bool ft_flow = mlx5e_is_ft_flow(flow);
3664         const struct flow_action_entry *act;
3665         struct mlx5_esw_flow_attr *esw_attr;
3666         struct mlx5_sample_attr sample = {};
3667         bool encap = false, decap = false;
3668         u32 action = attr->action;
3669         int err, i, if_count = 0;
3670         bool mpls_push = false;
3671
3672         if (!flow_action_has_entries(flow_action))
3673                 return -EINVAL;
3674
3675         if (!flow_action_hw_stats_check(flow_action, extack,
3676                                         FLOW_ACTION_HW_STATS_DELAYED_BIT))
3677                 return -EOPNOTSUPP;
3678
3679         esw_attr = attr->esw_attr;
3680         parse_attr = attr->parse_attr;
3681
3682         flow_action_for_each(i, act, flow_action) {
3683                 switch (act->id) {
3684                 case FLOW_ACTION_DROP:
3685                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
3686                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
3687                         break;
3688                 case FLOW_ACTION_TRAP:
3689                         if (!flow_offload_has_one_action(flow_action)) {
3690                                 NL_SET_ERR_MSG_MOD(extack,
3691                                                    "action trap is supported as a sole action only");
3692                                 return -EOPNOTSUPP;
3693                         }
3694                         action |= (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3695                                    MLX5_FLOW_CONTEXT_ACTION_COUNT);
3696                         attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
3697                         break;
3698                 case FLOW_ACTION_MPLS_PUSH:
3699                         if (!MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
3700                                                         reformat_l2_to_l3_tunnel) ||
3701                             act->mpls_push.proto != htons(ETH_P_MPLS_UC)) {
3702                                 NL_SET_ERR_MSG_MOD(extack,
3703                                                    "mpls push is supported only for mpls_uc protocol");
3704                                 return -EOPNOTSUPP;
3705                         }
3706                         mpls_push = true;
3707                         break;
3708                 case FLOW_ACTION_MPLS_POP:
3709                         /* we only support mpls pop if it is the first action
3710                          * and the filter net device is bareudp. Subsequent
3711                          * actions can be pedit and the last can be mirred
3712                          * egress redirect.
3713                          */
3714                         if (i) {
3715                                 NL_SET_ERR_MSG_MOD(extack,
3716                                                    "mpls pop supported only as first action");
3717                                 return -EOPNOTSUPP;
3718                         }
3719                         if (!netif_is_bareudp(filter_dev)) {
3720                                 NL_SET_ERR_MSG_MOD(extack,
3721                                                    "mpls pop supported only on bareudp devices");
3722                                 return -EOPNOTSUPP;
3723                         }
3724
3725                         parse_attr->eth.h_proto = act->mpls_pop.proto;
3726                         action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT;
3727                         flow_flag_set(flow, L3_TO_L2_DECAP);
3728                         break;
3729                 case FLOW_ACTION_MANGLE:
3730                 case FLOW_ACTION_ADD:
3731                         err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_FDB,
3732                                                     parse_attr, hdrs, flow, extack);
3733                         if (err)
3734                                 return err;
3735
3736                         if (!flow_flag_test(flow, L3_TO_L2_DECAP)) {
3737                                 action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3738                                 esw_attr->split_count = esw_attr->out_count;
3739                         }
3740                         break;
3741                 case FLOW_ACTION_CSUM:
3742                         if (csum_offload_supported(priv, action,
3743                                                    act->csum_flags, extack))
3744                                 break;
3745
3746                         return -EOPNOTSUPP;
3747                 case FLOW_ACTION_REDIRECT:
3748                 case FLOW_ACTION_MIRRED: {
3749                         struct mlx5e_priv *out_priv;
3750                         struct net_device *out_dev;
3751
3752                         out_dev = act->dev;
3753                         if (!out_dev) {
3754                                 /* out_dev is NULL when filters with
3755                                  * non-existing mirred device are replayed to
3756                                  * the driver.
3757                                  */
3758                                 return -EINVAL;
3759                         }
3760
3761                         if (mpls_push && !netif_is_bareudp(out_dev)) {
3762                                 NL_SET_ERR_MSG_MOD(extack,
3763                                                    "mpls is supported only through a bareudp device");
3764                                 return -EOPNOTSUPP;
3765                         }
3766
3767                         if (ft_flow && out_dev == priv->netdev) {
3768                                 /* Ignore forward to self rules generated
3769                                  * by adding both mlx5 devs to the flow table
3770                                  * block on a normal nft offload setup.
3771                                  */
3772                                 return -EOPNOTSUPP;
3773                         }
3774
3775                         if (esw_attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
3776                                 NL_SET_ERR_MSG_MOD(extack,
3777                                                    "can't support more output ports, can't offload forwarding");
3778                                 netdev_warn(priv->netdev,
3779                                             "can't support more than %d output ports, can't offload forwarding\n",
3780                                             esw_attr->out_count);
3781                                 return -EOPNOTSUPP;
3782                         }
3783
3784                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3785                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
3786                         if (encap) {
3787                                 parse_attr->mirred_ifindex[esw_attr->out_count] =
3788                                         out_dev->ifindex;
3789                                 parse_attr->tun_info[esw_attr->out_count] =
3790                                         mlx5e_dup_tun_info(info);
3791                                 if (!parse_attr->tun_info[esw_attr->out_count])
3792                                         return -ENOMEM;
3793                                 encap = false;
3794                                 esw_attr->dests[esw_attr->out_count].flags |=
3795                                         MLX5_ESW_DEST_ENCAP;
3796                                 esw_attr->out_count++;
3797                                 /* attr->dests[].rep is resolved when we
3798                                  * handle encap
3799                                  */
3800                         } else if (netdev_port_same_parent_id(priv->netdev, out_dev)) {
3801                                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3802                                 struct net_device *uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH);
3803
3804                                 if (is_duplicated_output_device(priv->netdev,
3805                                                                 out_dev,
3806                                                                 ifindexes,
3807                                                                 if_count,
3808                                                                 extack))
3809                                         return -EOPNOTSUPP;
3810
3811                                 ifindexes[if_count] = out_dev->ifindex;
3812                                 if_count++;
3813
3814                                 out_dev = get_fdb_out_dev(uplink_dev, out_dev);
3815                                 if (!out_dev)
3816                                         return -ENODEV;
3817
3818                                 if (is_vlan_dev(out_dev)) {
3819                                         err = add_vlan_push_action(priv, attr,
3820                                                                    &out_dev,
3821                                                                    &action);
3822                                         if (err)
3823                                                 return err;
3824                                 }
3825
3826                                 if (is_vlan_dev(parse_attr->filter_dev)) {
3827                                         err = add_vlan_pop_action(priv, attr,
3828                                                                   &action);
3829                                         if (err)
3830                                                 return err;
3831                                 }
3832
3833                                 err = verify_uplink_forwarding(priv, flow, out_dev, extack);
3834                                 if (err)
3835                                         return err;
3836
3837                                 if (!mlx5e_is_valid_eswitch_fwd_dev(priv, out_dev)) {
3838                                         NL_SET_ERR_MSG_MOD(extack,
3839                                                            "devices are not on same switch HW, can't offload forwarding");
3840                                         return -EOPNOTSUPP;
3841                                 }
3842
3843                                 if (same_vf_reps(priv, out_dev)) {
3844                                         NL_SET_ERR_MSG_MOD(extack,
3845                                                            "can't forward from a VF to itself");
3846                                         return -EOPNOTSUPP;
3847                                 }
3848
3849                                 out_priv = netdev_priv(out_dev);
3850                                 rpriv = out_priv->ppriv;
3851                                 esw_attr->dests[esw_attr->out_count].rep = rpriv->rep;
3852                                 esw_attr->dests[esw_attr->out_count].mdev = out_priv->mdev;
3853                                 esw_attr->out_count++;
3854                         } else if (parse_attr->filter_dev != priv->netdev) {
3855                                 /* All mlx5 devices are called to configure
3856                                  * high level device filters. Therefore, the
3857                                  * *attempt* to  install a filter on invalid
3858                                  * eswitch should not trigger an explicit error
3859                                  */
3860                                 return -EINVAL;
3861                         } else {
3862                                 NL_SET_ERR_MSG_MOD(extack,
3863                                                    "devices are not on same switch HW, can't offload forwarding");
3864                                 netdev_warn(priv->netdev,
3865                                             "devices %s %s not on same switch HW, can't offload forwarding\n",
3866                                             priv->netdev->name,
3867                                             out_dev->name);
3868                                 return -EINVAL;
3869                         }
3870                         }
3871                         break;
3872                 case FLOW_ACTION_TUNNEL_ENCAP:
3873                         info = act->tunnel;
3874                         if (info)
3875                                 encap = true;
3876                         else
3877                                 return -EOPNOTSUPP;
3878
3879                         break;
3880                 case FLOW_ACTION_VLAN_PUSH:
3881                 case FLOW_ACTION_VLAN_POP:
3882                         if (act->id == FLOW_ACTION_VLAN_PUSH &&
3883                             (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP)) {
3884                                 /* Replace vlan pop+push with vlan modify */
3885                                 action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3886                                 err = add_vlan_rewrite_action(priv,
3887                                                               MLX5_FLOW_NAMESPACE_FDB,
3888                                                               act, parse_attr, hdrs,
3889                                                               &action, extack);
3890                         } else {
3891                                 err = parse_tc_vlan_action(priv, act, esw_attr, &action);
3892                         }
3893                         if (err)
3894                                 return err;
3895
3896                         esw_attr->split_count = esw_attr->out_count;
3897                         break;
3898                 case FLOW_ACTION_VLAN_MANGLE:
3899                         err = add_vlan_rewrite_action(priv,
3900                                                       MLX5_FLOW_NAMESPACE_FDB,
3901                                                       act, parse_attr, hdrs,
3902                                                       &action, extack);
3903                         if (err)
3904                                 return err;
3905
3906                         esw_attr->split_count = esw_attr->out_count;
3907                         break;
3908                 case FLOW_ACTION_TUNNEL_DECAP:
3909                         decap = true;
3910                         break;
3911                 case FLOW_ACTION_GOTO:
3912                         err = validate_goto_chain(priv, flow, act, action,
3913                                                   extack);
3914                         if (err)
3915                                 return err;
3916
3917                         action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3918                         attr->dest_chain = act->chain_index;
3919                         break;
3920                 case FLOW_ACTION_CT:
3921                         if (flow_flag_test(flow, SAMPLE)) {
3922                                 NL_SET_ERR_MSG_MOD(extack, "Sample action with connection tracking is not supported");
3923                                 return -EOPNOTSUPP;
3924                         }
3925                         err = mlx5_tc_ct_parse_action(get_ct_priv(priv), attr, act, extack);
3926                         if (err)
3927                                 return err;
3928
3929                         flow_flag_set(flow, CT);
3930                         esw_attr->split_count = esw_attr->out_count;
3931                         break;
3932                 case FLOW_ACTION_SAMPLE:
3933                         if (flow_flag_test(flow, CT)) {
3934                                 NL_SET_ERR_MSG_MOD(extack, "Sample action with connection tracking is not supported");
3935                                 return -EOPNOTSUPP;
3936                         }
3937                         sample.rate = act->sample.rate;
3938                         sample.group_num = act->sample.psample_group->group_num;
3939                         if (act->sample.truncate)
3940                                 sample.trunc_size = act->sample.trunc_size;
3941                         flow_flag_set(flow, SAMPLE);
3942                         break;
3943                 default:
3944                         NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
3945                         return -EOPNOTSUPP;
3946                 }
3947         }
3948
3949         /* always set IP version for indirect table handling */
3950         attr->ip_version = mlx5e_tc_get_ip_version(&parse_attr->spec, true);
3951
3952         if (MLX5_CAP_GEN(esw->dev, prio_tag_required) &&
3953             action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) {
3954                 /* For prio tag mode, replace vlan pop with rewrite vlan prio
3955                  * tag rewrite.
3956                  */
3957                 action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3958                 err = add_vlan_prio_tag_rewrite_action(priv, parse_attr, hdrs,
3959                                                        &action, extack);
3960                 if (err)
3961                         return err;
3962         }
3963
3964         if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
3965             hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
3966                 err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_FDB,
3967                                             parse_attr, hdrs, &action, extack);
3968                 if (err)
3969                         return err;
3970                 /* in case all pedit actions are skipped, remove the MOD_HDR
3971                  * flag. we might have set split_count either by pedit or
3972                  * pop/push. if there is no pop/push either, reset it too.
3973                  */
3974                 if (parse_attr->mod_hdr_acts.num_actions == 0) {
3975                         action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3976                         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
3977                         if (!((action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) ||
3978                               (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH)))
3979                                 esw_attr->split_count = 0;
3980                 }
3981         }
3982
3983         attr->action = action;
3984         if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
3985                 return -EOPNOTSUPP;
3986
3987         if (attr->dest_chain) {
3988                 if (decap) {
3989                         /* It can be supported if we'll create a mapping for
3990                          * the tunnel device only (without tunnel), and set
3991                          * this tunnel id with this decap flow.
3992                          *
3993                          * On restore (miss), we'll just set this saved tunnel
3994                          * device.
3995                          */
3996
3997                         NL_SET_ERR_MSG(extack,
3998                                        "Decap with goto isn't supported");
3999                         netdev_warn(priv->netdev,
4000                                     "Decap with goto isn't supported");
4001                         return -EOPNOTSUPP;
4002                 }
4003
4004                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
4005         }
4006
4007         if (!(attr->action &
4008               (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_DROP))) {
4009                 NL_SET_ERR_MSG_MOD(extack,
4010                                    "Rule must have at least one forward/drop action");
4011                 return -EOPNOTSUPP;
4012         }
4013
4014         if (esw_attr->split_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
4015                 NL_SET_ERR_MSG_MOD(extack,
4016                                    "current firmware doesn't support split rule for port mirroring");
4017                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
4018                 return -EOPNOTSUPP;
4019         }
4020
4021         /* Allocate sample attribute only when there is a sample action and
4022          * no errors after parsing.
4023          */
4024         if (flow_flag_test(flow, SAMPLE)) {
4025                 esw_attr->sample = kzalloc(sizeof(*esw_attr->sample), GFP_KERNEL);
4026                 if (!esw_attr->sample)
4027                         return -ENOMEM;
4028                 *esw_attr->sample = sample;
4029         }
4030
4031         return 0;
4032 }
4033
4034 static void get_flags(int flags, unsigned long *flow_flags)
4035 {
4036         unsigned long __flow_flags = 0;
4037
4038         if (flags & MLX5_TC_FLAG(INGRESS))
4039                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_INGRESS);
4040         if (flags & MLX5_TC_FLAG(EGRESS))
4041                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_EGRESS);
4042
4043         if (flags & MLX5_TC_FLAG(ESW_OFFLOAD))
4044                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4045         if (flags & MLX5_TC_FLAG(NIC_OFFLOAD))
4046                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4047         if (flags & MLX5_TC_FLAG(FT_OFFLOAD))
4048                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_FT);
4049
4050         *flow_flags = __flow_flags;
4051 }
4052
4053 static const struct rhashtable_params tc_ht_params = {
4054         .head_offset = offsetof(struct mlx5e_tc_flow, node),
4055         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
4056         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
4057         .automatic_shrinking = true,
4058 };
4059
4060 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv,
4061                                     unsigned long flags)
4062 {
4063         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4064         struct mlx5e_rep_priv *uplink_rpriv;
4065
4066         if (flags & MLX5_TC_FLAG(ESW_OFFLOAD)) {
4067                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
4068                 return &uplink_rpriv->uplink_priv.tc_ht;
4069         } else /* NIC offload */
4070                 return &priv->fs.tc.ht;
4071 }
4072
4073 static bool is_peer_flow_needed(struct mlx5e_tc_flow *flow)
4074 {
4075         struct mlx5_esw_flow_attr *esw_attr = flow->attr->esw_attr;
4076         struct mlx5_flow_attr *attr = flow->attr;
4077         bool is_rep_ingress = esw_attr->in_rep->vport != MLX5_VPORT_UPLINK &&
4078                 flow_flag_test(flow, INGRESS);
4079         bool act_is_encap = !!(attr->action &
4080                                MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT);
4081         bool esw_paired = mlx5_devcom_is_paired(esw_attr->in_mdev->priv.devcom,
4082                                                 MLX5_DEVCOM_ESW_OFFLOADS);
4083
4084         if (!esw_paired)
4085                 return false;
4086
4087         if ((mlx5_lag_is_sriov(esw_attr->in_mdev) ||
4088              mlx5_lag_is_multipath(esw_attr->in_mdev)) &&
4089             (is_rep_ingress || act_is_encap))
4090                 return true;
4091
4092         return false;
4093 }
4094
4095 struct mlx5_flow_attr *
4096 mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type)
4097 {
4098         u32 ex_attr_size = (type == MLX5_FLOW_NAMESPACE_FDB)  ?
4099                                 sizeof(struct mlx5_esw_flow_attr) :
4100                                 sizeof(struct mlx5_nic_flow_attr);
4101         struct mlx5_flow_attr *attr;
4102
4103         return kzalloc(sizeof(*attr) + ex_attr_size, GFP_KERNEL);
4104 }
4105
4106 static int
4107 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
4108                  struct flow_cls_offload *f, unsigned long flow_flags,
4109                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
4110                  struct mlx5e_tc_flow **__flow)
4111 {
4112         struct mlx5e_tc_flow_parse_attr *parse_attr;
4113         struct mlx5_flow_attr *attr;
4114         struct mlx5e_tc_flow *flow;
4115         int err = -ENOMEM;
4116         int out_index;
4117
4118         flow = kzalloc(sizeof(*flow), GFP_KERNEL);
4119         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
4120         if (!parse_attr || !flow)
4121                 goto err_free;
4122
4123         flow->flags = flow_flags;
4124         flow->cookie = f->cookie;
4125         flow->priv = priv;
4126
4127         attr = mlx5_alloc_flow_attr(get_flow_name_space(flow));
4128         if (!attr)
4129                 goto err_free;
4130
4131         flow->attr = attr;
4132
4133         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
4134                 INIT_LIST_HEAD(&flow->encaps[out_index].list);
4135         INIT_LIST_HEAD(&flow->hairpin);
4136         INIT_LIST_HEAD(&flow->l3_to_l2_reformat);
4137         refcount_set(&flow->refcnt, 1);
4138         init_completion(&flow->init_done);
4139
4140         *__flow = flow;
4141         *__parse_attr = parse_attr;
4142
4143         return 0;
4144
4145 err_free:
4146         kfree(flow);
4147         kvfree(parse_attr);
4148         return err;
4149 }
4150
4151 static void
4152 mlx5e_flow_attr_init(struct mlx5_flow_attr *attr,
4153                      struct mlx5e_tc_flow_parse_attr *parse_attr,
4154                      struct flow_cls_offload *f)
4155 {
4156         attr->parse_attr = parse_attr;
4157         attr->chain = f->common.chain_index;
4158         attr->prio = f->common.prio;
4159 }
4160
4161 static void
4162 mlx5e_flow_esw_attr_init(struct mlx5_flow_attr *attr,
4163                          struct mlx5e_priv *priv,
4164                          struct mlx5e_tc_flow_parse_attr *parse_attr,
4165                          struct flow_cls_offload *f,
4166                          struct mlx5_eswitch_rep *in_rep,
4167                          struct mlx5_core_dev *in_mdev)
4168 {
4169         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4170         struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
4171
4172         mlx5e_flow_attr_init(attr, parse_attr, f);
4173
4174         esw_attr->in_rep = in_rep;
4175         esw_attr->in_mdev = in_mdev;
4176
4177         if (MLX5_CAP_ESW(esw->dev, counter_eswitch_affinity) ==
4178             MLX5_COUNTER_SOURCE_ESWITCH)
4179                 esw_attr->counter_dev = in_mdev;
4180         else
4181                 esw_attr->counter_dev = priv->mdev;
4182 }
4183
4184 static struct mlx5e_tc_flow *
4185 __mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4186                      struct flow_cls_offload *f,
4187                      unsigned long flow_flags,
4188                      struct net_device *filter_dev,
4189                      struct mlx5_eswitch_rep *in_rep,
4190                      struct mlx5_core_dev *in_mdev)
4191 {
4192         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4193         struct netlink_ext_ack *extack = f->common.extack;
4194         struct mlx5e_tc_flow_parse_attr *parse_attr;
4195         struct mlx5e_tc_flow *flow;
4196         int attr_size, err;
4197
4198         flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4199         attr_size  = sizeof(struct mlx5_esw_flow_attr);
4200         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4201                                &parse_attr, &flow);
4202         if (err)
4203                 goto out;
4204
4205         parse_attr->filter_dev = filter_dev;
4206         mlx5e_flow_esw_attr_init(flow->attr,
4207                                  priv, parse_attr,
4208                                  f, in_rep, in_mdev);
4209
4210         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4211                                f, filter_dev);
4212         if (err)
4213                 goto err_free;
4214
4215         /* actions validation depends on parsing the ct matches first */
4216         err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4217                                    &flow->attr->ct_attr, extack);
4218         if (err)
4219                 goto err_free;
4220
4221         err = parse_tc_fdb_actions(priv, &rule->action, flow, extack, filter_dev);
4222         if (err)
4223                 goto err_free;
4224
4225         err = mlx5e_tc_add_fdb_flow(priv, flow, extack);
4226         complete_all(&flow->init_done);
4227         if (err) {
4228                 if (!(err == -ENETUNREACH && mlx5_lag_is_multipath(in_mdev)))
4229                         goto err_free;
4230
4231                 add_unready_flow(flow);
4232         }
4233
4234         return flow;
4235
4236 err_free:
4237         mlx5e_flow_put(priv, flow);
4238 out:
4239         return ERR_PTR(err);
4240 }
4241
4242 static int mlx5e_tc_add_fdb_peer_flow(struct flow_cls_offload *f,
4243                                       struct mlx5e_tc_flow *flow,
4244                                       unsigned long flow_flags)
4245 {
4246         struct mlx5e_priv *priv = flow->priv, *peer_priv;
4247         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch, *peer_esw;
4248         struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
4249         struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
4250         struct mlx5e_tc_flow_parse_attr *parse_attr;
4251         struct mlx5e_rep_priv *peer_urpriv;
4252         struct mlx5e_tc_flow *peer_flow;
4253         struct mlx5_core_dev *in_mdev;
4254         int err = 0;
4255
4256         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4257         if (!peer_esw)
4258                 return -ENODEV;
4259
4260         peer_urpriv = mlx5_eswitch_get_uplink_priv(peer_esw, REP_ETH);
4261         peer_priv = netdev_priv(peer_urpriv->netdev);
4262
4263         /* in_mdev is assigned of which the packet originated from.
4264          * So packets redirected to uplink use the same mdev of the
4265          * original flow and packets redirected from uplink use the
4266          * peer mdev.
4267          */
4268         if (attr->in_rep->vport == MLX5_VPORT_UPLINK)
4269                 in_mdev = peer_priv->mdev;
4270         else
4271                 in_mdev = priv->mdev;
4272
4273         parse_attr = flow->attr->parse_attr;
4274         peer_flow = __mlx5e_add_fdb_flow(peer_priv, f, flow_flags,
4275                                          parse_attr->filter_dev,
4276                                          attr->in_rep, in_mdev);
4277         if (IS_ERR(peer_flow)) {
4278                 err = PTR_ERR(peer_flow);
4279                 goto out;
4280         }
4281
4282         flow->peer_flow = peer_flow;
4283         flow_flag_set(flow, DUP);
4284         mutex_lock(&esw->offloads.peer_mutex);
4285         list_add_tail(&flow->peer, &esw->offloads.peer_flows);
4286         mutex_unlock(&esw->offloads.peer_mutex);
4287
4288 out:
4289         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4290         return err;
4291 }
4292
4293 static int
4294 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4295                    struct flow_cls_offload *f,
4296                    unsigned long flow_flags,
4297                    struct net_device *filter_dev,
4298                    struct mlx5e_tc_flow **__flow)
4299 {
4300         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4301         struct mlx5_eswitch_rep *in_rep = rpriv->rep;
4302         struct mlx5_core_dev *in_mdev = priv->mdev;
4303         struct mlx5e_tc_flow *flow;
4304         int err;
4305
4306         flow = __mlx5e_add_fdb_flow(priv, f, flow_flags, filter_dev, in_rep,
4307                                     in_mdev);
4308         if (IS_ERR(flow))
4309                 return PTR_ERR(flow);
4310
4311         if (is_peer_flow_needed(flow)) {
4312                 err = mlx5e_tc_add_fdb_peer_flow(f, flow, flow_flags);
4313                 if (err) {
4314                         mlx5e_tc_del_fdb_flow(priv, flow);
4315                         goto out;
4316                 }
4317         }
4318
4319         *__flow = flow;
4320
4321         return 0;
4322
4323 out:
4324         return err;
4325 }
4326
4327 static int
4328 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
4329                    struct flow_cls_offload *f,
4330                    unsigned long flow_flags,
4331                    struct net_device *filter_dev,
4332                    struct mlx5e_tc_flow **__flow)
4333 {
4334         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4335         struct netlink_ext_ack *extack = f->common.extack;
4336         struct mlx5e_tc_flow_parse_attr *parse_attr;
4337         struct mlx5e_tc_flow *flow;
4338         int attr_size, err;
4339
4340         if (!MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level)) {
4341                 if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
4342                         return -EOPNOTSUPP;
4343         } else if (!tc_can_offload_extack(priv->netdev, f->common.extack)) {
4344                 return -EOPNOTSUPP;
4345         }
4346
4347         flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4348         attr_size  = sizeof(struct mlx5_nic_flow_attr);
4349         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4350                                &parse_attr, &flow);
4351         if (err)
4352                 goto out;
4353
4354         parse_attr->filter_dev = filter_dev;
4355         mlx5e_flow_attr_init(flow->attr, parse_attr, f);
4356
4357         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4358                                f, filter_dev);
4359         if (err)
4360                 goto err_free;
4361
4362         err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4363                                    &flow->attr->ct_attr, extack);
4364         if (err)
4365                 goto err_free;
4366
4367         err = parse_tc_nic_actions(priv, &rule->action, parse_attr, flow, extack);
4368         if (err)
4369                 goto err_free;
4370
4371         err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
4372         if (err)
4373                 goto err_free;
4374
4375         flow_flag_set(flow, OFFLOADED);
4376         *__flow = flow;
4377
4378         return 0;
4379
4380 err_free:
4381         flow_flag_set(flow, FAILED);
4382         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
4383         mlx5e_flow_put(priv, flow);
4384 out:
4385         return err;
4386 }
4387
4388 static int
4389 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
4390                   struct flow_cls_offload *f,
4391                   unsigned long flags,
4392                   struct net_device *filter_dev,
4393                   struct mlx5e_tc_flow **flow)
4394 {
4395         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4396         unsigned long flow_flags;
4397         int err;
4398
4399         get_flags(flags, &flow_flags);
4400
4401         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
4402                 return -EOPNOTSUPP;
4403
4404         if (esw && esw->mode == MLX5_ESWITCH_OFFLOADS)
4405                 err = mlx5e_add_fdb_flow(priv, f, flow_flags,
4406                                          filter_dev, flow);
4407         else
4408                 err = mlx5e_add_nic_flow(priv, f, flow_flags,
4409                                          filter_dev, flow);
4410
4411         return err;
4412 }
4413
4414 static bool is_flow_rule_duplicate_allowed(struct net_device *dev,
4415                                            struct mlx5e_rep_priv *rpriv)
4416 {
4417         /* Offloaded flow rule is allowed to duplicate on non-uplink representor
4418          * sharing tc block with other slaves of a lag device. Rpriv can be NULL if this
4419          * function is called from NIC mode.
4420          */
4421         return netif_is_lag_port(dev) && rpriv && rpriv->rep->vport != MLX5_VPORT_UPLINK;
4422 }
4423
4424 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
4425                            struct flow_cls_offload *f, unsigned long flags)
4426 {
4427         struct netlink_ext_ack *extack = f->common.extack;
4428         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4429         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4430         struct mlx5e_tc_flow *flow;
4431         int err = 0;
4432
4433         if (!mlx5_esw_hold(priv->mdev))
4434                 return -EAGAIN;
4435
4436         mlx5_esw_get(priv->mdev);
4437
4438         rcu_read_lock();
4439         flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4440         if (flow) {
4441                 /* Same flow rule offloaded to non-uplink representor sharing tc block,
4442                  * just return 0.
4443                  */
4444                 if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev)
4445                         goto rcu_unlock;
4446
4447                 NL_SET_ERR_MSG_MOD(extack,
4448                                    "flow cookie already exists, ignoring");
4449                 netdev_warn_once(priv->netdev,
4450                                  "flow cookie %lx already exists, ignoring\n",
4451                                  f->cookie);
4452                 err = -EEXIST;
4453                 goto rcu_unlock;
4454         }
4455 rcu_unlock:
4456         rcu_read_unlock();
4457         if (flow)
4458                 goto out;
4459
4460         trace_mlx5e_configure_flower(f);
4461         err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);
4462         if (err)
4463                 goto out;
4464
4465         /* Flow rule offloaded to non-uplink representor sharing tc block,
4466          * set the flow's owner dev.
4467          */
4468         if (is_flow_rule_duplicate_allowed(dev, rpriv))
4469                 flow->orig_dev = dev;
4470
4471         err = rhashtable_lookup_insert_fast(tc_ht, &flow->node, tc_ht_params);
4472         if (err)
4473                 goto err_free;
4474
4475         mlx5_esw_release(priv->mdev);
4476         return 0;
4477
4478 err_free:
4479         mlx5e_flow_put(priv, flow);
4480 out:
4481         mlx5_esw_put(priv->mdev);
4482         mlx5_esw_release(priv->mdev);
4483         return err;
4484 }
4485
4486 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
4487 {
4488         bool dir_ingress = !!(flags & MLX5_TC_FLAG(INGRESS));
4489         bool dir_egress = !!(flags & MLX5_TC_FLAG(EGRESS));
4490
4491         return flow_flag_test(flow, INGRESS) == dir_ingress &&
4492                 flow_flag_test(flow, EGRESS) == dir_egress;
4493 }
4494
4495 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
4496                         struct flow_cls_offload *f, unsigned long flags)
4497 {
4498         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4499         struct mlx5e_tc_flow *flow;
4500         int err;
4501
4502         rcu_read_lock();
4503         flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4504         if (!flow || !same_flow_direction(flow, flags)) {
4505                 err = -EINVAL;
4506                 goto errout;
4507         }
4508
4509         /* Only delete the flow if it doesn't have MLX5E_TC_FLOW_DELETED flag
4510          * set.
4511          */
4512         if (flow_flag_test_and_set(flow, DELETED)) {
4513                 err = -EINVAL;
4514                 goto errout;
4515         }
4516         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
4517         rcu_read_unlock();
4518
4519         trace_mlx5e_delete_flower(f);
4520         mlx5e_flow_put(priv, flow);
4521
4522         mlx5_esw_put(priv->mdev);
4523         return 0;
4524
4525 errout:
4526         rcu_read_unlock();
4527         return err;
4528 }
4529
4530 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
4531                        struct flow_cls_offload *f, unsigned long flags)
4532 {
4533         struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
4534         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4535         struct mlx5_eswitch *peer_esw;
4536         struct mlx5e_tc_flow *flow;
4537         struct mlx5_fc *counter;
4538         u64 lastuse = 0;
4539         u64 packets = 0;
4540         u64 bytes = 0;
4541         int err = 0;
4542
4543         rcu_read_lock();
4544         flow = mlx5e_flow_get(rhashtable_lookup(tc_ht, &f->cookie,
4545                                                 tc_ht_params));
4546         rcu_read_unlock();
4547         if (IS_ERR(flow))
4548                 return PTR_ERR(flow);
4549
4550         if (!same_flow_direction(flow, flags)) {
4551                 err = -EINVAL;
4552                 goto errout;
4553         }
4554
4555         if (mlx5e_is_offloaded_flow(flow) || flow_flag_test(flow, CT)) {
4556                 counter = mlx5e_tc_get_counter(flow);
4557                 if (!counter)
4558                         goto errout;
4559
4560                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
4561         }
4562
4563         /* Under multipath it's possible for one rule to be currently
4564          * un-offloaded while the other rule is offloaded.
4565          */
4566         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4567         if (!peer_esw)
4568                 goto out;
4569
4570         if (flow_flag_test(flow, DUP) &&
4571             flow_flag_test(flow->peer_flow, OFFLOADED)) {
4572                 u64 bytes2;
4573                 u64 packets2;
4574                 u64 lastuse2;
4575
4576                 counter = mlx5e_tc_get_counter(flow->peer_flow);
4577                 if (!counter)
4578                         goto no_peer_counter;
4579                 mlx5_fc_query_cached(counter, &bytes2, &packets2, &lastuse2);
4580
4581                 bytes += bytes2;
4582                 packets += packets2;
4583                 lastuse = max_t(u64, lastuse, lastuse2);
4584         }
4585
4586 no_peer_counter:
4587         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4588 out:
4589         flow_stats_update(&f->stats, bytes, packets, 0, lastuse,
4590                           FLOW_ACTION_HW_STATS_DELAYED);
4591         trace_mlx5e_stats_flower(f);
4592 errout:
4593         mlx5e_flow_put(priv, flow);
4594         return err;
4595 }
4596
4597 static int apply_police_params(struct mlx5e_priv *priv, u64 rate,
4598                                struct netlink_ext_ack *extack)
4599 {
4600         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4601         struct mlx5_eswitch *esw;
4602         u32 rate_mbps = 0;
4603         u16 vport_num;
4604         int err;
4605
4606         vport_num = rpriv->rep->vport;
4607         if (vport_num >= MLX5_VPORT_ECPF) {
4608                 NL_SET_ERR_MSG_MOD(extack,
4609                                    "Ingress rate limit is supported only for Eswitch ports connected to VFs");
4610                 return -EOPNOTSUPP;
4611         }
4612
4613         esw = priv->mdev->priv.eswitch;
4614         /* rate is given in bytes/sec.
4615          * First convert to bits/sec and then round to the nearest mbit/secs.
4616          * mbit means million bits.
4617          * Moreover, if rate is non zero we choose to configure to a minimum of
4618          * 1 mbit/sec.
4619          */
4620         if (rate) {
4621                 rate = (rate * BITS_PER_BYTE) + 500000;
4622                 do_div(rate, 1000000);
4623                 rate_mbps = max_t(u32, rate, 1);
4624         }
4625
4626         err = mlx5_esw_modify_vport_rate(esw, vport_num, rate_mbps);
4627         if (err)
4628                 NL_SET_ERR_MSG_MOD(extack, "failed applying action to hardware");
4629
4630         return err;
4631 }
4632
4633 static int scan_tc_matchall_fdb_actions(struct mlx5e_priv *priv,
4634                                         struct flow_action *flow_action,
4635                                         struct netlink_ext_ack *extack)
4636 {
4637         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4638         const struct flow_action_entry *act;
4639         int err;
4640         int i;
4641
4642         if (!flow_action_has_entries(flow_action)) {
4643                 NL_SET_ERR_MSG_MOD(extack, "matchall called with no action");
4644                 return -EINVAL;
4645         }
4646
4647         if (!flow_offload_has_one_action(flow_action)) {
4648                 NL_SET_ERR_MSG_MOD(extack, "matchall policing support only a single action");
4649                 return -EOPNOTSUPP;
4650         }
4651
4652         if (!flow_action_basic_hw_stats_check(flow_action, extack))
4653                 return -EOPNOTSUPP;
4654
4655         flow_action_for_each(i, act, flow_action) {
4656                 switch (act->id) {
4657                 case FLOW_ACTION_POLICE:
4658                         if (act->police.rate_pkt_ps) {
4659                                 NL_SET_ERR_MSG_MOD(extack, "QoS offload not support packets per second");
4660                                 return -EOPNOTSUPP;
4661                         }
4662                         err = apply_police_params(priv, act->police.rate_bytes_ps, extack);
4663                         if (err)
4664                                 return err;
4665
4666                         rpriv->prev_vf_vport_stats = priv->stats.vf_vport;
4667                         break;
4668                 default:
4669                         NL_SET_ERR_MSG_MOD(extack, "mlx5 supports only police action for matchall");
4670                         return -EOPNOTSUPP;
4671                 }
4672         }
4673
4674         return 0;
4675 }
4676
4677 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
4678                                 struct tc_cls_matchall_offload *ma)
4679 {
4680         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4681         struct netlink_ext_ack *extack = ma->common.extack;
4682
4683         if (!mlx5_esw_qos_enabled(esw)) {
4684                 NL_SET_ERR_MSG_MOD(extack, "QoS is not supported on this device");
4685                 return -EOPNOTSUPP;
4686         }
4687
4688         if (ma->common.prio != 1) {
4689                 NL_SET_ERR_MSG_MOD(extack, "only priority 1 is supported");
4690                 return -EINVAL;
4691         }
4692
4693         return scan_tc_matchall_fdb_actions(priv, &ma->rule->action, extack);
4694 }
4695
4696 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
4697                              struct tc_cls_matchall_offload *ma)
4698 {
4699         struct netlink_ext_ack *extack = ma->common.extack;
4700
4701         return apply_police_params(priv, 0, extack);
4702 }
4703
4704 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
4705                              struct tc_cls_matchall_offload *ma)
4706 {
4707         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4708         struct rtnl_link_stats64 cur_stats;
4709         u64 dbytes;
4710         u64 dpkts;
4711
4712         cur_stats = priv->stats.vf_vport;
4713         dpkts = cur_stats.rx_packets - rpriv->prev_vf_vport_stats.rx_packets;
4714         dbytes = cur_stats.rx_bytes - rpriv->prev_vf_vport_stats.rx_bytes;
4715         rpriv->prev_vf_vport_stats = cur_stats;
4716         flow_stats_update(&ma->stats, dbytes, dpkts, 0, jiffies,
4717                           FLOW_ACTION_HW_STATS_DELAYED);
4718 }
4719
4720 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
4721                                               struct mlx5e_priv *peer_priv)
4722 {
4723         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
4724         struct mlx5e_hairpin_entry *hpe, *tmp;
4725         LIST_HEAD(init_wait_list);
4726         u16 peer_vhca_id;
4727         int bkt;
4728
4729         if (!same_hw_devs(priv, peer_priv))
4730                 return;
4731
4732         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
4733
4734         mutex_lock(&priv->fs.tc.hairpin_tbl_lock);
4735         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist)
4736                 if (refcount_inc_not_zero(&hpe->refcnt))
4737                         list_add(&hpe->dead_peer_wait_list, &init_wait_list);
4738         mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
4739
4740         list_for_each_entry_safe(hpe, tmp, &init_wait_list, dead_peer_wait_list) {
4741                 wait_for_completion(&hpe->res_ready);
4742                 if (!IS_ERR_OR_NULL(hpe->hp) && hpe->peer_vhca_id == peer_vhca_id)
4743                         hpe->hp->pair->peer_gone = true;
4744
4745                 mlx5e_hairpin_put(priv, hpe);
4746         }
4747 }
4748
4749 static int mlx5e_tc_netdev_event(struct notifier_block *this,
4750                                  unsigned long event, void *ptr)
4751 {
4752         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
4753         struct mlx5e_flow_steering *fs;
4754         struct mlx5e_priv *peer_priv;
4755         struct mlx5e_tc_table *tc;
4756         struct mlx5e_priv *priv;
4757
4758         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
4759             event != NETDEV_UNREGISTER ||
4760             ndev->reg_state == NETREG_REGISTERED)
4761                 return NOTIFY_DONE;
4762
4763         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
4764         fs = container_of(tc, struct mlx5e_flow_steering, tc);
4765         priv = container_of(fs, struct mlx5e_priv, fs);
4766         peer_priv = netdev_priv(ndev);
4767         if (priv == peer_priv ||
4768             !(priv->netdev->features & NETIF_F_HW_TC))
4769                 return NOTIFY_DONE;
4770
4771         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
4772
4773         return NOTIFY_DONE;
4774 }
4775
4776 static int mlx5e_tc_nic_get_ft_size(struct mlx5_core_dev *dev)
4777 {
4778         int tc_grp_size, tc_tbl_size;
4779         u32 max_flow_counter;
4780
4781         max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
4782                             MLX5_CAP_GEN(dev, max_flow_counter_15_0);
4783
4784         tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
4785
4786         tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
4787                             BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
4788
4789         return tc_tbl_size;
4790 }
4791
4792 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
4793 {
4794         struct mlx5e_tc_table *tc = &priv->fs.tc;
4795         struct mlx5_core_dev *dev = priv->mdev;
4796         struct mapping_ctx *chains_mapping;
4797         struct mlx5_chains_attr attr = {};
4798         int err;
4799
4800         mlx5e_mod_hdr_tbl_init(&tc->mod_hdr);
4801         mutex_init(&tc->t_lock);
4802         mutex_init(&tc->hairpin_tbl_lock);
4803         hash_init(tc->hairpin_tbl);
4804
4805         err = rhashtable_init(&tc->ht, &tc_ht_params);
4806         if (err)
4807                 return err;
4808
4809         lockdep_set_class(&tc->ht.mutex, &tc_ht_lock_key);
4810
4811         chains_mapping = mapping_create(sizeof(struct mlx5_mapped_obj),
4812                                         MLX5E_TC_TABLE_CHAIN_TAG_MASK, true);
4813         if (IS_ERR(chains_mapping)) {
4814                 err = PTR_ERR(chains_mapping);
4815                 goto err_mapping;
4816         }
4817         tc->mapping = chains_mapping;
4818
4819         if (MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
4820                 attr.flags = MLX5_CHAINS_AND_PRIOS_SUPPORTED |
4821                         MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED;
4822         attr.ns = MLX5_FLOW_NAMESPACE_KERNEL;
4823         attr.max_ft_sz = mlx5e_tc_nic_get_ft_size(dev);
4824         attr.max_grp_num = MLX5E_TC_TABLE_NUM_GROUPS;
4825         attr.default_ft = mlx5e_vlan_get_flowtable(priv->fs.vlan);
4826         attr.mapping = chains_mapping;
4827
4828         tc->chains = mlx5_chains_create(dev, &attr);
4829         if (IS_ERR(tc->chains)) {
4830                 err = PTR_ERR(tc->chains);
4831                 goto err_chains;
4832         }
4833
4834         tc->ct = mlx5_tc_ct_init(priv, tc->chains, &priv->fs.tc.mod_hdr,
4835                                  MLX5_FLOW_NAMESPACE_KERNEL);
4836
4837         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
4838         err = register_netdevice_notifier_dev_net(priv->netdev,
4839                                                   &tc->netdevice_nb,
4840                                                   &tc->netdevice_nn);
4841         if (err) {
4842                 tc->netdevice_nb.notifier_call = NULL;
4843                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
4844                 goto err_reg;
4845         }
4846
4847         return 0;
4848
4849 err_reg:
4850         mlx5_tc_ct_clean(tc->ct);
4851         mlx5_chains_destroy(tc->chains);
4852 err_chains:
4853         mapping_destroy(chains_mapping);
4854 err_mapping:
4855         rhashtable_destroy(&tc->ht);
4856         return err;
4857 }
4858
4859 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
4860 {
4861         struct mlx5e_tc_flow *flow = ptr;
4862         struct mlx5e_priv *priv = flow->priv;
4863
4864         mlx5e_tc_del_flow(priv, flow);
4865         kfree(flow);
4866 }
4867
4868 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
4869 {
4870         struct mlx5e_tc_table *tc = &priv->fs.tc;
4871
4872         if (tc->netdevice_nb.notifier_call)
4873                 unregister_netdevice_notifier_dev_net(priv->netdev,
4874                                                       &tc->netdevice_nb,
4875                                                       &tc->netdevice_nn);
4876
4877         mlx5e_mod_hdr_tbl_destroy(&tc->mod_hdr);
4878         mutex_destroy(&tc->hairpin_tbl_lock);
4879
4880         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
4881
4882         if (!IS_ERR_OR_NULL(tc->t)) {
4883                 mlx5_chains_put_table(tc->chains, 0, 1, MLX5E_TC_FT_LEVEL);
4884                 tc->t = NULL;
4885         }
4886         mutex_destroy(&tc->t_lock);
4887
4888         mlx5_tc_ct_clean(tc->ct);
4889         mapping_destroy(tc->mapping);
4890         mlx5_chains_destroy(tc->chains);
4891 }
4892
4893 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
4894 {
4895         const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts);
4896         struct mlx5_rep_uplink_priv *uplink_priv;
4897         struct mlx5e_rep_priv *rpriv;
4898         struct mapping_ctx *mapping;
4899         struct mlx5_eswitch *esw;
4900         struct mlx5e_priv *priv;
4901         int err = 0;
4902
4903         uplink_priv = container_of(tc_ht, struct mlx5_rep_uplink_priv, tc_ht);
4904         rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);
4905         priv = netdev_priv(rpriv->netdev);
4906         esw = priv->mdev->priv.eswitch;
4907
4908         uplink_priv->ct_priv = mlx5_tc_ct_init(netdev_priv(priv->netdev),
4909                                                esw_chains(esw),
4910                                                &esw->offloads.mod_hdr,
4911                                                MLX5_FLOW_NAMESPACE_FDB);
4912
4913 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
4914         uplink_priv->esw_psample = mlx5_esw_sample_init(netdev_priv(priv->netdev));
4915 #endif
4916
4917         mapping = mapping_create(sizeof(struct tunnel_match_key),
4918                                  TUNNEL_INFO_BITS_MASK, true);
4919         if (IS_ERR(mapping)) {
4920                 err = PTR_ERR(mapping);
4921                 goto err_tun_mapping;
4922         }
4923         uplink_priv->tunnel_mapping = mapping;
4924
4925         /* 0xFFF is reserved for stack devices slow path table mark */
4926         mapping = mapping_create(sz_enc_opts, ENC_OPTS_BITS_MASK - 1, true);
4927         if (IS_ERR(mapping)) {
4928                 err = PTR_ERR(mapping);
4929                 goto err_enc_opts_mapping;
4930         }
4931         uplink_priv->tunnel_enc_opts_mapping = mapping;
4932
4933         err = rhashtable_init(tc_ht, &tc_ht_params);
4934         if (err)
4935                 goto err_ht_init;
4936
4937         lockdep_set_class(&tc_ht->mutex, &tc_ht_lock_key);
4938
4939         uplink_priv->encap = mlx5e_tc_tun_init(priv);
4940         if (IS_ERR(uplink_priv->encap)) {
4941                 err = PTR_ERR(uplink_priv->encap);
4942                 goto err_register_fib_notifier;
4943         }
4944
4945         return 0;
4946
4947 err_register_fib_notifier:
4948         rhashtable_destroy(tc_ht);
4949 err_ht_init:
4950         mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
4951 err_enc_opts_mapping:
4952         mapping_destroy(uplink_priv->tunnel_mapping);
4953 err_tun_mapping:
4954 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
4955         mlx5_esw_sample_cleanup(uplink_priv->esw_psample);
4956 #endif
4957         mlx5_tc_ct_clean(uplink_priv->ct_priv);
4958         netdev_warn(priv->netdev,
4959                     "Failed to initialize tc (eswitch), err: %d", err);
4960         return err;
4961 }
4962
4963 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
4964 {
4965         struct mlx5_rep_uplink_priv *uplink_priv;
4966
4967         uplink_priv = container_of(tc_ht, struct mlx5_rep_uplink_priv, tc_ht);
4968
4969         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
4970         mlx5e_tc_tun_cleanup(uplink_priv->encap);
4971
4972         mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
4973         mapping_destroy(uplink_priv->tunnel_mapping);
4974
4975 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
4976         mlx5_esw_sample_cleanup(uplink_priv->esw_psample);
4977 #endif
4978         mlx5_tc_ct_clean(uplink_priv->ct_priv);
4979 }
4980
4981 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags)
4982 {
4983         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4984
4985         return atomic_read(&tc_ht->nelems);
4986 }
4987
4988 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw)
4989 {
4990         struct mlx5e_tc_flow *flow, *tmp;
4991
4992         list_for_each_entry_safe(flow, tmp, &esw->offloads.peer_flows, peer)
4993                 __mlx5e_tc_del_fdb_peer_flow(flow);
4994 }
4995
4996 void mlx5e_tc_reoffload_flows_work(struct work_struct *work)
4997 {
4998         struct mlx5_rep_uplink_priv *rpriv =
4999                 container_of(work, struct mlx5_rep_uplink_priv,
5000                              reoffload_flows_work);
5001         struct mlx5e_tc_flow *flow, *tmp;
5002
5003         mutex_lock(&rpriv->unready_flows_lock);
5004         list_for_each_entry_safe(flow, tmp, &rpriv->unready_flows, unready) {
5005                 if (!mlx5e_tc_add_fdb_flow(flow->priv, flow, NULL))
5006                         unready_flow_del(flow);
5007         }
5008         mutex_unlock(&rpriv->unready_flows_lock);
5009 }
5010
5011 static int mlx5e_setup_tc_cls_flower(struct mlx5e_priv *priv,
5012                                      struct flow_cls_offload *cls_flower,
5013                                      unsigned long flags)
5014 {
5015         switch (cls_flower->command) {
5016         case FLOW_CLS_REPLACE:
5017                 return mlx5e_configure_flower(priv->netdev, priv, cls_flower,
5018                                               flags);
5019         case FLOW_CLS_DESTROY:
5020                 return mlx5e_delete_flower(priv->netdev, priv, cls_flower,
5021                                            flags);
5022         case FLOW_CLS_STATS:
5023                 return mlx5e_stats_flower(priv->netdev, priv, cls_flower,
5024                                           flags);
5025         default:
5026                 return -EOPNOTSUPP;
5027         }
5028 }
5029
5030 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
5031                             void *cb_priv)
5032 {
5033         unsigned long flags = MLX5_TC_FLAG(INGRESS);
5034         struct mlx5e_priv *priv = cb_priv;
5035
5036         if (!priv->netdev || !netif_device_present(priv->netdev))
5037                 return -EOPNOTSUPP;
5038
5039         if (mlx5e_is_uplink_rep(priv))
5040                 flags |= MLX5_TC_FLAG(ESW_OFFLOAD);
5041         else
5042                 flags |= MLX5_TC_FLAG(NIC_OFFLOAD);
5043
5044         switch (type) {
5045         case TC_SETUP_CLSFLOWER:
5046                 return mlx5e_setup_tc_cls_flower(priv, type_data, flags);
5047         default:
5048                 return -EOPNOTSUPP;
5049         }
5050 }
5051
5052 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe,
5053                          struct sk_buff *skb)
5054 {
5055 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
5056         u32 chain = 0, chain_tag, reg_b, zone_restore_id;
5057         struct mlx5e_priv *priv = netdev_priv(skb->dev);
5058         struct mlx5e_tc_table *tc = &priv->fs.tc;
5059         struct mlx5_mapped_obj mapped_obj;
5060         struct tc_skb_ext *tc_skb_ext;
5061         int err;
5062
5063         reg_b = be32_to_cpu(cqe->ft_metadata);
5064
5065         chain_tag = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
5066
5067         err = mapping_find(tc->mapping, chain_tag, &mapped_obj);
5068         if (err) {
5069                 netdev_dbg(priv->netdev,
5070                            "Couldn't find chain for chain tag: %d, err: %d\n",
5071                            chain_tag, err);
5072                 return false;
5073         }
5074
5075         if (mapped_obj.type == MLX5_MAPPED_OBJ_CHAIN) {
5076                 chain = mapped_obj.chain;
5077                 tc_skb_ext = skb_ext_add(skb, TC_SKB_EXT);
5078                 if (WARN_ON(!tc_skb_ext))
5079                         return false;
5080
5081                 tc_skb_ext->chain = chain;
5082
5083                 zone_restore_id = (reg_b >> REG_MAPPING_SHIFT(NIC_ZONE_RESTORE_TO_REG)) &
5084                         ESW_ZONE_ID_MASK;
5085
5086                 if (!mlx5e_tc_ct_restore_flow(tc->ct, skb,
5087                                               zone_restore_id))
5088                         return false;
5089         } else {
5090                 netdev_dbg(priv->netdev, "Invalid mapped object type: %d\n", mapped_obj.type);
5091                 return false;
5092         }
5093 #endif /* CONFIG_NET_TC_SKB_EXT */
5094
5095         return true;
5096 }