drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

   1 /*
   2  * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <net/flow_dissector.h>
  34 #include <net/flow_offload.h>
  35 #include <net/sch_generic.h>
  36 #include <net/pkt_cls.h>
  37 #include <net/tc_act/tc_gact.h>
  38 #include <net/tc_act/tc_skbedit.h>
  39 #include <linux/mlx5/fs.h>
  40 #include <linux/mlx5/device.h>
  41 #include <linux/rhashtable.h>
  42 #include <linux/refcount.h>
  43 #include <linux/completion.h>
  44 #include <net/tc_act/tc_mirred.h>
  45 #include <net/tc_act/tc_vlan.h>
  46 #include <net/tc_act/tc_tunnel_key.h>
  47 #include <net/tc_act/tc_pedit.h>
  48 #include <net/tc_act/tc_csum.h>
  49 #include <net/tc_act/tc_mpls.h>
  50 #include <net/psample.h>
  51 #include <net/arp.h>
  52 #include <net/ipv6_stubs.h>
  53 #include <net/bareudp.h>
  54 #include <net/bonding.h>
  55 #include "en.h"
  56 #include "en_rep.h"
  57 #include "en/rep/tc.h"
  58 #include "en/rep/neigh.h"
  59 #include "en_tc.h"
  60 #include "eswitch.h"
  61 #include "fs_core.h"
  62 #include "en/port.h"
  63 #include "en/tc_tun.h"
  64 #include "en/mapping.h"
  65 #include "en/tc_ct.h"
  66 #include "en/mod_hdr.h"
  67 #include "en/tc_priv.h"
  68 #include "en/tc_tun_encap.h"
  69 #include "esw/sample.h"
  70 #include "lib/devcom.h"
  71 #include "lib/geneve.h"
  72 #include "lib/fs_chains.h"
  73 #include "diag/en_tc_tracepoint.h"
  74 #include <asm/div64.h>
  75
  76 #define nic_chains(priv) ((priv)->fs.tc.chains)
  77 #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto)
  78
  79 #define MLX5E_TC_TABLE_NUM_GROUPS 4
  80 #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(18)
  81
  82 struct mlx5e_tc_attr_to_reg_mapping mlx5e_tc_attr_to_reg_mappings[] = {
  83         [CHAIN_TO_REG] = {
  84                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
  85                 .moffset = 0,
  86                 .mlen = 2,
  87         },
  88         [VPORT_TO_REG] = {
  89                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_0,
  90                 .moffset = 2,
  91                 .mlen = 2,
  92         },
  93         [TUNNEL_TO_REG] = {
  94                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_C_1,
  95                 .moffset = 1,
  96                 .mlen = ((ESW_TUN_OPTS_BITS + ESW_TUN_ID_BITS) / 8),
  97                 .soffset = MLX5_BYTE_OFF(fte_match_param,
  98                                          misc_parameters_2.metadata_reg_c_1),
  99         },
 100         [ZONE_TO_REG] = zone_to_reg_ct,
 101         [ZONE_RESTORE_TO_REG] = zone_restore_to_reg_ct,
 102         [CTSTATE_TO_REG] = ctstate_to_reg_ct,
 103         [MARK_TO_REG] = mark_to_reg_ct,
 104         [LABELS_TO_REG] = labels_to_reg_ct,
 105         [FTEID_TO_REG] = fteid_to_reg_ct,
 106         /* For NIC rules we store the retore metadata directly
 107          * into reg_b that is passed to SW since we don't
 108          * jump between steering domains.
 109          */
 110         [NIC_CHAIN_TO_REG] = {
 111                 .mfield = MLX5_ACTION_IN_FIELD_METADATA_REG_B,
 112                 .moffset = 0,
 113                 .mlen = 2,
 114         },
 115         [NIC_ZONE_RESTORE_TO_REG] = nic_zone_restore_to_reg_ct,
 116 };
 117
 118 /* To avoid false lock dependency warning set the tc_ht lock
 119  * class different than the lock class of the ht being used when deleting
 120  * last flow from a group and then deleting a group, we get into del_sw_flow_group()
 121  * which call rhashtable_destroy on fg->ftes_hash which will take ht->mutex but
 122  * it's different than the ht->mutex here.
 123  */
 124 static struct lock_class_key tc_ht_lock_key;
 125
 126 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow);
 127
 128 void
 129 mlx5e_tc_match_to_reg_match(struct mlx5_flow_spec *spec,
 130                             enum mlx5e_tc_attr_to_reg type,
 131                             u32 data,
 132                             u32 mask)
 133 {
 134         int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
 135         int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 136         void *headers_c = spec->match_criteria;
 137         void *headers_v = spec->match_value;
 138         void *fmask, *fval;
 139
 140         fmask = headers_c + soffset;
 141         fval = headers_v + soffset;
 142
 143         mask = (__force u32)(cpu_to_be32(mask)) >> (32 - (match_len * 8));
 144         data = (__force u32)(cpu_to_be32(data)) >> (32 - (match_len * 8));
 145
 146         memcpy(fmask, &mask, match_len);
 147         memcpy(fval, &data, match_len);
 148
 149         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;
 150 }
 151
 152 void
 153 mlx5e_tc_match_to_reg_get_match(struct mlx5_flow_spec *spec,
 154                                 enum mlx5e_tc_attr_to_reg type,
 155                                 u32 *data,
 156                                 u32 *mask)
 157 {
 158         int soffset = mlx5e_tc_attr_to_reg_mappings[type].soffset;
 159         int match_len = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 160         void *headers_c = spec->match_criteria;
 161         void *headers_v = spec->match_value;
 162         void *fmask, *fval;
 163
 164         fmask = headers_c + soffset;
 165         fval = headers_v + soffset;
 166
 167         memcpy(mask, fmask, match_len);
 168         memcpy(data, fval, match_len);
 169
 170         *mask = be32_to_cpu((__force __be32)(*mask << (32 - (match_len * 8))));
 171         *data = be32_to_cpu((__force __be32)(*data << (32 - (match_len * 8))));
 172 }
 173
 174 int
 175 mlx5e_tc_match_to_reg_set_and_get_id(struct mlx5_core_dev *mdev,
 176                                      struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 177                                      enum mlx5_flow_namespace_type ns,
 178                                      enum mlx5e_tc_attr_to_reg type,
 179                                      u32 data)
 180 {
 181         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 182         int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
 183         int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 184         char *modact;
 185         int err;
 186
 187         err = alloc_mod_hdr_actions(mdev, ns, mod_hdr_acts);
 188         if (err)
 189                 return err;
 190
 191         modact = mod_hdr_acts->actions +
 192                  (mod_hdr_acts->num_actions * MLX5_MH_ACT_SZ);
 193
 194         /* Firmware has 5bit length field and 0 means 32bits */
 195         if (mlen == 4)
 196                 mlen = 0;
 197
 198         MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
 199         MLX5_SET(set_action_in, modact, field, mfield);
 200         MLX5_SET(set_action_in, modact, offset, moffset * 8);
 201         MLX5_SET(set_action_in, modact, length, mlen * 8);
 202         MLX5_SET(set_action_in, modact, data, data);
 203         err = mod_hdr_acts->num_actions;
 204         mod_hdr_acts->num_actions++;
 205
 206         return err;
 207 }
 208
 209 static struct mlx5_tc_ct_priv *
 210 get_ct_priv(struct mlx5e_priv *priv)
 211 {
 212         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 213         struct mlx5_rep_uplink_priv *uplink_priv;
 214         struct mlx5e_rep_priv *uplink_rpriv;
 215
 216         if (is_mdev_switchdev_mode(priv->mdev)) {
 217                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 218                 uplink_priv = &uplink_rpriv->uplink_priv;
 219
 220                 return uplink_priv->ct_priv;
 221         }
 222
 223         return priv->fs.tc.ct;
 224 }
 225
 226 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
 227 static struct mlx5_esw_psample *
 228 get_sample_priv(struct mlx5e_priv *priv)
 229 {
 230         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 231         struct mlx5_rep_uplink_priv *uplink_priv;
 232         struct mlx5e_rep_priv *uplink_rpriv;
 233
 234         if (is_mdev_switchdev_mode(priv->mdev)) {
 235                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
 236                 uplink_priv = &uplink_rpriv->uplink_priv;
 237
 238                 return uplink_priv->esw_psample;
 239         }
 240
 241         return NULL;
 242 }
 243 #endif
 244
 245 struct mlx5_flow_handle *
 246 mlx5_tc_rule_insert(struct mlx5e_priv *priv,
 247                     struct mlx5_flow_spec *spec,
 248                     struct mlx5_flow_attr *attr)
 249 {
 250         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 251
 252         if (is_mdev_switchdev_mode(priv->mdev))
 253                 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
 254
 255         return  mlx5e_add_offloaded_nic_rule(priv, spec, attr);
 256 }
 257
 258 void
 259 mlx5_tc_rule_delete(struct mlx5e_priv *priv,
 260                     struct mlx5_flow_handle *rule,
 261                     struct mlx5_flow_attr *attr)
 262 {
 263         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 264
 265         if (is_mdev_switchdev_mode(priv->mdev)) {
 266                 mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
 267
 268                 return;
 269         }
 270
 271         mlx5e_del_offloaded_nic_rule(priv, rule, attr);
 272 }
 273
 274 int
 275 mlx5e_tc_match_to_reg_set(struct mlx5_core_dev *mdev,
 276                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 277                           enum mlx5_flow_namespace_type ns,
 278                           enum mlx5e_tc_attr_to_reg type,
 279                           u32 data)
 280 {
 281         int ret = mlx5e_tc_match_to_reg_set_and_get_id(mdev, mod_hdr_acts, ns, type, data);
 282
 283         return ret < 0 ? ret : 0;
 284 }
 285
 286 void mlx5e_tc_match_to_reg_mod_hdr_change(struct mlx5_core_dev *mdev,
 287                                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts,
 288                                           enum mlx5e_tc_attr_to_reg type,
 289                                           int act_id, u32 data)
 290 {
 291         int moffset = mlx5e_tc_attr_to_reg_mappings[type].moffset;
 292         int mfield = mlx5e_tc_attr_to_reg_mappings[type].mfield;
 293         int mlen = mlx5e_tc_attr_to_reg_mappings[type].mlen;
 294         char *modact;
 295
 296         modact = mod_hdr_acts->actions + (act_id * MLX5_MH_ACT_SZ);
 297
 298         /* Firmware has 5bit length field and 0 means 32bits */
 299         if (mlen == 4)
 300                 mlen = 0;
 301
 302         MLX5_SET(set_action_in, modact, action_type, MLX5_ACTION_TYPE_SET);
 303         MLX5_SET(set_action_in, modact, field, mfield);
 304         MLX5_SET(set_action_in, modact, offset, moffset * 8);
 305         MLX5_SET(set_action_in, modact, length, mlen * 8);
 306         MLX5_SET(set_action_in, modact, data, data);
 307 }
 308
 309 struct mlx5e_hairpin {
 310         struct mlx5_hairpin *pair;
 311
 312         struct mlx5_core_dev *func_mdev;
 313         struct mlx5e_priv *func_priv;
 314         u32 tdn;
 315         u32 tirn;
 316
 317         int num_channels;
 318         struct mlx5e_rqt indir_rqt;
 319         u32 indir_tirn[MLX5E_NUM_INDIR_TIRS];
 320         struct mlx5e_ttc_table ttc;
 321 };
 322
 323 struct mlx5e_hairpin_entry {
 324         /* a node of a hash table which keeps all the  hairpin entries */
 325         struct hlist_node hairpin_hlist;
 326
 327         /* protects flows list */
 328         spinlock_t flows_lock;
 329         /* flows sharing the same hairpin */
 330         struct list_head flows;
 331         /* hpe's that were not fully initialized when dead peer update event
 332          * function traversed them.
 333          */
 334         struct list_head dead_peer_wait_list;
 335
 336         u16 peer_vhca_id;
 337         u8 prio;
 338         struct mlx5e_hairpin *hp;
 339         refcount_t refcnt;
 340         struct completion res_ready;
 341 };
 342
 343 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
 344                               struct mlx5e_tc_flow *flow);
 345
 346 struct mlx5e_tc_flow *mlx5e_flow_get(struct mlx5e_tc_flow *flow)
 347 {
 348         if (!flow || !refcount_inc_not_zero(&flow->refcnt))
 349                 return ERR_PTR(-EINVAL);
 350         return flow;
 351 }
 352
 353 void mlx5e_flow_put(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
 354 {
 355         if (refcount_dec_and_test(&flow->refcnt)) {
 356                 mlx5e_tc_del_flow(priv, flow);
 357                 kfree_rcu(flow, rcu_head);
 358         }
 359 }
 360
 361 bool mlx5e_is_eswitch_flow(struct mlx5e_tc_flow *flow)
 362 {
 363         return flow_flag_test(flow, ESWITCH);
 364 }
 365
 366 static bool mlx5e_is_ft_flow(struct mlx5e_tc_flow *flow)
 367 {
 368         return flow_flag_test(flow, FT);
 369 }
 370
 371 bool mlx5e_is_offloaded_flow(struct mlx5e_tc_flow *flow)
 372 {
 373         return flow_flag_test(flow, OFFLOADED);
 374 }
 375
 376 static int get_flow_name_space(struct mlx5e_tc_flow *flow)
 377 {
 378         return mlx5e_is_eswitch_flow(flow) ?
 379                 MLX5_FLOW_NAMESPACE_FDB : MLX5_FLOW_NAMESPACE_KERNEL;
 380 }
 381
 382 static struct mod_hdr_tbl *
 383 get_mod_hdr_table(struct mlx5e_priv *priv, struct mlx5e_tc_flow *flow)
 384 {
 385         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 386
 387         return get_flow_name_space(flow) == MLX5_FLOW_NAMESPACE_FDB ?
 388                 &esw->offloads.mod_hdr :
 389                 &priv->fs.tc.mod_hdr;
 390 }
 391
 392 static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv,
 393                                 struct mlx5e_tc_flow *flow,
 394                                 struct mlx5e_tc_flow_parse_attr *parse_attr)
 395 {
 396         struct mlx5_modify_hdr *modify_hdr;
 397         struct mlx5e_mod_hdr_handle *mh;
 398
 399         mh = mlx5e_mod_hdr_attach(priv->mdev, get_mod_hdr_table(priv, flow),
 400                                   get_flow_name_space(flow),
 401                                   &parse_attr->mod_hdr_acts);
 402         if (IS_ERR(mh))
 403                 return PTR_ERR(mh);
 404
 405         modify_hdr = mlx5e_mod_hdr_get(mh);
 406         flow->attr->modify_hdr = modify_hdr;
 407         flow->mh = mh;
 408
 409         return 0;
 410 }
 411
 412 static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv,
 413                                  struct mlx5e_tc_flow *flow)
 414 {
 415         /* flow wasn't fully initialized */
 416         if (!flow->mh)
 417                 return;
 418
 419         mlx5e_mod_hdr_detach(priv->mdev, get_mod_hdr_table(priv, flow),
 420                              flow->mh);
 421         flow->mh = NULL;
 422 }
 423
 424 static
 425 struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
 426 {
 427         struct net_device *netdev;
 428         struct mlx5e_priv *priv;
 429
 430         netdev = __dev_get_by_index(net, ifindex);
 431         priv = netdev_priv(netdev);
 432         return priv->mdev;
 433 }
 434
 435 static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
 436 {
 437         u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {};
 438         void *tirc;
 439         int err;
 440
 441         err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn);
 442         if (err)
 443                 goto alloc_tdn_err;
 444
 445         tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 446
 447         MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT);
 448         MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
 449         MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 450
 451         err = mlx5_core_create_tir(hp->func_mdev, in, &hp->tirn);
 452         if (err)
 453                 goto create_tir_err;
 454
 455         return 0;
 456
 457 create_tir_err:
 458         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 459 alloc_tdn_err:
 460         return err;
 461 }
 462
 463 static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp)
 464 {
 465         mlx5_core_destroy_tir(hp->func_mdev, hp->tirn);
 466         mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn);
 467 }
 468
 469 static int mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc)
 470 {
 471         struct mlx5e_priv *priv = hp->func_priv;
 472         int i, ix, sz = MLX5E_INDIR_RQT_SIZE;
 473         u32 *indirection_rqt, rqn;
 474
 475         indirection_rqt = kcalloc(sz, sizeof(*indirection_rqt), GFP_KERNEL);
 476         if (!indirection_rqt)
 477                 return -ENOMEM;
 478
 479         mlx5e_build_default_indir_rqt(indirection_rqt, sz,
 480                                       hp->num_channels);
 481
 482         for (i = 0; i < sz; i++) {
 483                 ix = i;
 484                 if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR)
 485                         ix = mlx5e_bits_invert(i, ilog2(sz));
 486                 ix = indirection_rqt[ix];
 487                 rqn = hp->pair->rqn[ix];
 488                 MLX5_SET(rqtc, rqtc, rq_num[i], rqn);
 489         }
 490
 491         kfree(indirection_rqt);
 492         return 0;
 493 }
 494
 495 static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp)
 496 {
 497         int inlen, err, sz = MLX5E_INDIR_RQT_SIZE;
 498         struct mlx5e_priv *priv = hp->func_priv;
 499         struct mlx5_core_dev *mdev = priv->mdev;
 500         void *rqtc;
 501         u32 *in;
 502
 503         inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz;
 504         in = kvzalloc(inlen, GFP_KERNEL);
 505         if (!in)
 506                 return -ENOMEM;
 507
 508         rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context);
 509
 510         MLX5_SET(rqtc, rqtc, rqt_actual_size, sz);
 511         MLX5_SET(rqtc, rqtc, rqt_max_size, sz);
 512
 513         err = mlx5e_hairpin_fill_rqt_rqns(hp, rqtc);
 514         if (err)
 515                 goto out;
 516
 517         err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn);
 518         if (!err)
 519                 hp->indir_rqt.enabled = true;
 520
 521 out:
 522         kvfree(in);
 523         return err;
 524 }
 525
 526 static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 527 {
 528         struct mlx5e_priv *priv = hp->func_priv;
 529         u32 in[MLX5_ST_SZ_DW(create_tir_in)];
 530         int tt, i, err;
 531         void *tirc;
 532
 533         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
 534                 struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt);
 535
 536                 memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in));
 537                 tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 538
 539                 MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 540                 MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
 541                 MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
 542                 mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
 543
 544                 err = mlx5_core_create_tir(hp->func_mdev, in,
 545                                            &hp->indir_tirn[tt]);
 546                 if (err) {
 547                         mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
 548                         goto err_destroy_tirs;
 549                 }
 550         }
 551         return 0;
 552
 553 err_destroy_tirs:
 554         for (i = 0; i < tt; i++)
 555                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]);
 556         return err;
 557 }
 558
 559 static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp)
 560 {
 561         int tt;
 562
 563         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 564                 mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]);
 565 }
 566
 567 static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp,
 568                                          struct ttc_params *ttc_params)
 569 {
 570         struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr;
 571         int tt;
 572
 573         memset(ttc_params, 0, sizeof(*ttc_params));
 574
 575         ttc_params->any_tt_tirn = hp->tirn;
 576
 577         for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
 578                 ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];
 579
 580         ft_attr->max_fte = MLX5E_TTC_TABLE_SIZE;
 581         ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;
 582         ft_attr->prio = MLX5E_TC_PRIO;
 583 }
 584
 585 static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp)
 586 {
 587         struct mlx5e_priv *priv = hp->func_priv;
 588         struct ttc_params ttc_params;
 589         int err;
 590
 591         err = mlx5e_hairpin_create_indirect_rqt(hp);
 592         if (err)
 593                 return err;
 594
 595         err = mlx5e_hairpin_create_indirect_tirs(hp);
 596         if (err)
 597                 goto err_create_indirect_tirs;
 598
 599         mlx5e_hairpin_set_ttc_params(hp, &ttc_params);
 600         err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc);
 601         if (err)
 602                 goto err_create_ttc_table;
 603
 604         netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n",
 605                    hp->num_channels, hp->ttc.ft.t->id);
 606
 607         return 0;
 608
 609 err_create_ttc_table:
 610         mlx5e_hairpin_destroy_indirect_tirs(hp);
 611 err_create_indirect_tirs:
 612         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 613
 614         return err;
 615 }
 616
 617 static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp)
 618 {
 619         struct mlx5e_priv *priv = hp->func_priv;
 620
 621         mlx5e_destroy_ttc_table(priv, &hp->ttc);
 622         mlx5e_hairpin_destroy_indirect_tirs(hp);
 623         mlx5e_destroy_rqt(priv, &hp->indir_rqt);
 624 }
 625
 626 static struct mlx5e_hairpin *
 627 mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params,
 628                      int peer_ifindex)
 629 {
 630         struct mlx5_core_dev *func_mdev, *peer_mdev;
 631         struct mlx5e_hairpin *hp;
 632         struct mlx5_hairpin *pair;
 633         int err;
 634
 635         hp = kzalloc(sizeof(*hp), GFP_KERNEL);
 636         if (!hp)
 637                 return ERR_PTR(-ENOMEM);
 638
 639         func_mdev = priv->mdev;
 640         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 641
 642         pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params);
 643         if (IS_ERR(pair)) {
 644                 err = PTR_ERR(pair);
 645                 goto create_pair_err;
 646         }
 647         hp->pair = pair;
 648         hp->func_mdev = func_mdev;
 649         hp->func_priv = priv;
 650         hp->num_channels = params->num_channels;
 651
 652         err = mlx5e_hairpin_create_transport(hp);
 653         if (err)
 654                 goto create_transport_err;
 655
 656         if (hp->num_channels > 1) {
 657                 err = mlx5e_hairpin_rss_init(hp);
 658                 if (err)
 659                         goto rss_init_err;
 660         }
 661
 662         return hp;
 663
 664 rss_init_err:
 665         mlx5e_hairpin_destroy_transport(hp);
 666 create_transport_err:
 667         mlx5_core_hairpin_destroy(hp->pair);
 668 create_pair_err:
 669         kfree(hp);
 670         return ERR_PTR(err);
 671 }
 672
 673 static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp)
 674 {
 675         if (hp->num_channels > 1)
 676                 mlx5e_hairpin_rss_cleanup(hp);
 677         mlx5e_hairpin_destroy_transport(hp);
 678         mlx5_core_hairpin_destroy(hp->pair);
 679         kvfree(hp);
 680 }
 681
 682 static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio)
 683 {
 684         return (peer_vhca_id << 16 | prio);
 685 }
 686
 687 static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv,
 688                                                      u16 peer_vhca_id, u8 prio)
 689 {
 690         struct mlx5e_hairpin_entry *hpe;
 691         u32 hash_key = hash_hairpin_info(peer_vhca_id, prio);
 692
 693         hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe,
 694                                hairpin_hlist, hash_key) {
 695                 if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio) {
 696                         refcount_inc(&hpe->refcnt);
 697                         return hpe;
 698                 }
 699         }
 700
 701         return NULL;
 702 }
 703
 704 static void mlx5e_hairpin_put(struct mlx5e_priv *priv,
 705                               struct mlx5e_hairpin_entry *hpe)
 706 {
 707         /* no more hairpin flows for us, release the hairpin pair */
 708         if (!refcount_dec_and_mutex_lock(&hpe->refcnt, &priv->fs.tc.hairpin_tbl_lock))
 709                 return;
 710         hash_del(&hpe->hairpin_hlist);
 711         mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 712
 713         if (!IS_ERR_OR_NULL(hpe->hp)) {
 714                 netdev_dbg(priv->netdev, "del hairpin: peer %s\n",
 715                            dev_name(hpe->hp->pair->peer_mdev->device));
 716
 717                 mlx5e_hairpin_destroy(hpe->hp);
 718         }
 719
 720         WARN_ON(!list_empty(&hpe->flows));
 721         kfree(hpe);
 722 }
 723
 724 #define UNKNOWN_MATCH_PRIO 8
 725
 726 static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv,
 727                                   struct mlx5_flow_spec *spec, u8 *match_prio,
 728                                   struct netlink_ext_ack *extack)
 729 {
 730         void *headers_c, *headers_v;
 731         u8 prio_val, prio_mask = 0;
 732         bool vlan_present;
 733
 734 #ifdef CONFIG_MLX5_CORE_EN_DCB
 735         if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) {
 736                 NL_SET_ERR_MSG_MOD(extack,
 737                                    "only PCP trust state supported for hairpin");
 738                 return -EOPNOTSUPP;
 739         }
 740 #endif
 741         headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers);
 742         headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
 743
 744         vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag);
 745         if (vlan_present) {
 746                 prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
 747                 prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
 748         }
 749
 750         if (!vlan_present || !prio_mask) {
 751                 prio_val = UNKNOWN_MATCH_PRIO;
 752         } else if (prio_mask != 0x7) {
 753                 NL_SET_ERR_MSG_MOD(extack,
 754                                    "masked priority match not supported for hairpin");
 755                 return -EOPNOTSUPP;
 756         }
 757
 758         *match_prio = prio_val;
 759         return 0;
 760 }
 761
 762 static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv,
 763                                   struct mlx5e_tc_flow *flow,
 764                                   struct mlx5e_tc_flow_parse_attr *parse_attr,
 765                                   struct netlink_ext_ack *extack)
 766 {
 767         int peer_ifindex = parse_attr->mirred_ifindex[0];
 768         struct mlx5_hairpin_params params;
 769         struct mlx5_core_dev *peer_mdev;
 770         struct mlx5e_hairpin_entry *hpe;
 771         struct mlx5e_hairpin *hp;
 772         u64 link_speed64;
 773         u32 link_speed;
 774         u8 match_prio;
 775         u16 peer_id;
 776         int err;
 777
 778         peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex);
 779         if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) {
 780                 NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported");
 781                 return -EOPNOTSUPP;
 782         }
 783
 784         peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
 785         err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio,
 786                                      extack);
 787         if (err)
 788                 return err;
 789
 790         mutex_lock(&priv->fs.tc.hairpin_tbl_lock);
 791         hpe = mlx5e_hairpin_get(priv, peer_id, match_prio);
 792         if (hpe) {
 793                 mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 794                 wait_for_completion(&hpe->res_ready);
 795
 796                 if (IS_ERR(hpe->hp)) {
 797                         err = -EREMOTEIO;
 798                         goto out_err;
 799                 }
 800                 goto attach_flow;
 801         }
 802
 803         hpe = kzalloc(sizeof(*hpe), GFP_KERNEL);
 804         if (!hpe) {
 805                 mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 806                 return -ENOMEM;
 807         }
 808
 809         spin_lock_init(&hpe->flows_lock);
 810         INIT_LIST_HEAD(&hpe->flows);
 811         INIT_LIST_HEAD(&hpe->dead_peer_wait_list);
 812         hpe->peer_vhca_id = peer_id;
 813         hpe->prio = match_prio;
 814         refcount_set(&hpe->refcnt, 1);
 815         init_completion(&hpe->res_ready);
 816
 817         hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist,
 818                  hash_hairpin_info(peer_id, match_prio));
 819         mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
 820
 821         params.log_data_size = 15;
 822         params.log_data_size = min_t(u8, params.log_data_size,
 823                                      MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz));
 824         params.log_data_size = max_t(u8, params.log_data_size,
 825                                      MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz));
 826
 827         params.log_num_packets = params.log_data_size -
 828                                  MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev);
 829         params.log_num_packets = min_t(u8, params.log_num_packets,
 830                                        MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets));
 831
 832         params.q_counter = priv->q_counter;
 833         /* set hairpin pair per each 50Gbs share of the link */
 834         mlx5e_port_max_linkspeed(priv->mdev, &link_speed);
 835         link_speed = max_t(u32, link_speed, 50000);
 836         link_speed64 = link_speed;
 837         do_div(link_speed64, 50000);
 838         params.num_channels = link_speed64;
 839
 840         hp = mlx5e_hairpin_create(priv, &params, peer_ifindex);
 841         hpe->hp = hp;
 842         complete_all(&hpe->res_ready);
 843         if (IS_ERR(hp)) {
 844                 err = PTR_ERR(hp);
 845                 goto out_err;
 846         }
 847
 848         netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n",
 849                    hp->tirn, hp->pair->rqn[0],
 850                    dev_name(hp->pair->peer_mdev->device),
 851                    hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets);
 852
 853 attach_flow:
 854         if (hpe->hp->num_channels > 1) {
 855                 flow_flag_set(flow, HAIRPIN_RSS);
 856                 flow->attr->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t;
 857         } else {
 858                 flow->attr->nic_attr->hairpin_tirn = hpe->hp->tirn;
 859         }
 860
 861         flow->hpe = hpe;
 862         spin_lock(&hpe->flows_lock);
 863         list_add(&flow->hairpin, &hpe->flows);
 864         spin_unlock(&hpe->flows_lock);
 865
 866         return 0;
 867
 868 out_err:
 869         mlx5e_hairpin_put(priv, hpe);
 870         return err;
 871 }
 872
 873 static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv,
 874                                    struct mlx5e_tc_flow *flow)
 875 {
 876         /* flow wasn't fully initialized */
 877         if (!flow->hpe)
 878                 return;
 879
 880         spin_lock(&flow->hpe->flows_lock);
 881         list_del(&flow->hairpin);
 882         spin_unlock(&flow->hpe->flows_lock);
 883
 884         mlx5e_hairpin_put(priv, flow->hpe);
 885         flow->hpe = NULL;
 886 }
 887
 888 struct mlx5_flow_handle *
 889 mlx5e_add_offloaded_nic_rule(struct mlx5e_priv *priv,
 890                              struct mlx5_flow_spec *spec,
 891                              struct mlx5_flow_attr *attr)
 892 {
 893         struct mlx5_flow_context *flow_context = &spec->flow_context;
 894         struct mlx5_fs_chains *nic_chains = nic_chains(priv);
 895         struct mlx5_nic_flow_attr *nic_attr = attr->nic_attr;
 896         struct mlx5e_tc_table *tc = &priv->fs.tc;
 897         struct mlx5_flow_destination dest[2] = {};
 898         struct mlx5_flow_act flow_act = {
 899                 .action = attr->action,
 900                 .flags    = FLOW_ACT_NO_APPEND,
 901         };
 902         struct mlx5_flow_handle *rule;
 903         struct mlx5_flow_table *ft;
 904         int dest_ix = 0;
 905
 906         flow_context->flags |= FLOW_CONTEXT_HAS_TAG;
 907         flow_context->flow_tag = nic_attr->flow_tag;
 908
 909         if (attr->dest_ft) {
 910                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 911                 dest[dest_ix].ft = attr->dest_ft;
 912                 dest_ix++;
 913         } else if (nic_attr->hairpin_ft) {
 914                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 915                 dest[dest_ix].ft = nic_attr->hairpin_ft;
 916                 dest_ix++;
 917         } else if (nic_attr->hairpin_tirn) {
 918                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR;
 919                 dest[dest_ix].tir_num = nic_attr->hairpin_tirn;
 920                 dest_ix++;
 921         } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
 922                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
 923                 if (attr->dest_chain) {
 924                         dest[dest_ix].ft = mlx5_chains_get_table(nic_chains,
 925                                                                  attr->dest_chain, 1,
 926                                                                  MLX5E_TC_FT_LEVEL);
 927                         if (IS_ERR(dest[dest_ix].ft))
 928                                 return ERR_CAST(dest[dest_ix].ft);
 929                 } else {
 930                         dest[dest_ix].ft = mlx5e_vlan_get_flowtable(priv->fs.vlan);
 931                 }
 932                 dest_ix++;
 933         }
 934
 935         if (dest[0].type == MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE &&
 936             MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
 937                 flow_act.flags |= FLOW_ACT_IGNORE_FLOW_LEVEL;
 938
 939         if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
 940                 dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER;
 941                 dest[dest_ix].counter_id = mlx5_fc_id(attr->counter);
 942                 dest_ix++;
 943         }
 944
 945         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
 946                 flow_act.modify_hdr = attr->modify_hdr;
 947
 948         mutex_lock(&tc->t_lock);
 949         if (IS_ERR_OR_NULL(tc->t)) {
 950                 /* Create the root table here if doesn't exist yet */
 951                 tc->t =
 952                         mlx5_chains_get_table(nic_chains, 0, 1, MLX5E_TC_FT_LEVEL);
 953
 954                 if (IS_ERR(tc->t)) {
 955                         mutex_unlock(&tc->t_lock);
 956                         netdev_err(priv->netdev,
 957                                    "Failed to create tc offload table\n");
 958                         rule = ERR_CAST(priv->fs.tc.t);
 959                         goto err_ft_get;
 960                 }
 961         }
 962         mutex_unlock(&tc->t_lock);
 963
 964         if (attr->chain || attr->prio)
 965                 ft = mlx5_chains_get_table(nic_chains,
 966                                            attr->chain, attr->prio,
 967                                            MLX5E_TC_FT_LEVEL);
 968         else
 969                 ft = attr->ft;
 970
 971         if (IS_ERR(ft)) {
 972                 rule = ERR_CAST(ft);
 973                 goto err_ft_get;
 974         }
 975
 976         if (attr->outer_match_level != MLX5_MATCH_NONE)
 977                 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
 978
 979         rule = mlx5_add_flow_rules(ft, spec,
 980                                    &flow_act, dest, dest_ix);
 981         if (IS_ERR(rule))
 982                 goto err_rule;
 983
 984         return rule;
 985
 986 err_rule:
 987         if (attr->chain || attr->prio)
 988                 mlx5_chains_put_table(nic_chains,
 989                                       attr->chain, attr->prio,
 990                                       MLX5E_TC_FT_LEVEL);
 991 err_ft_get:
 992         if (attr->dest_chain)
 993                 mlx5_chains_put_table(nic_chains,
 994                                       attr->dest_chain, 1,
 995                                       MLX5E_TC_FT_LEVEL);
 996
 997         return ERR_CAST(rule);
 998 }
 999
1000 static int
1001 mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
1002                       struct mlx5e_tc_flow_parse_attr *parse_attr,
1003                       struct mlx5e_tc_flow *flow,
1004                       struct netlink_ext_ack *extack)
1005 {
1006         struct mlx5_flow_attr *attr = flow->attr;
1007         struct mlx5_core_dev *dev = priv->mdev;
1008         struct mlx5_fc *counter = NULL;
1009         int err;
1010
1011         if (flow_flag_test(flow, HAIRPIN)) {
1012                 err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack);
1013                 if (err)
1014                         return err;
1015         }
1016
1017         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1018                 counter = mlx5_fc_create(dev, true);
1019                 if (IS_ERR(counter))
1020                         return PTR_ERR(counter);
1021
1022                 attr->counter = counter;
1023         }
1024
1025         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1026                 err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1027                 dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
1028                 if (err)
1029                         return err;
1030         }
1031
1032         if (flow_flag_test(flow, CT))
1033                 flow->rule[0] = mlx5_tc_ct_flow_offload(get_ct_priv(priv), flow, &parse_attr->spec,
1034                                                         attr, &parse_attr->mod_hdr_acts);
1035         else
1036                 flow->rule[0] = mlx5e_add_offloaded_nic_rule(priv, &parse_attr->spec,
1037                                                              attr);
1038
1039         return PTR_ERR_OR_ZERO(flow->rule[0]);
1040 }
1041
1042 void mlx5e_del_offloaded_nic_rule(struct mlx5e_priv *priv,
1043                                   struct mlx5_flow_handle *rule,
1044                                   struct mlx5_flow_attr *attr)
1045 {
1046         struct mlx5_fs_chains *nic_chains = nic_chains(priv);
1047
1048         mlx5_del_flow_rules(rule);
1049
1050         if (attr->chain || attr->prio)
1051                 mlx5_chains_put_table(nic_chains, attr->chain, attr->prio,
1052                                       MLX5E_TC_FT_LEVEL);
1053
1054         if (attr->dest_chain)
1055                 mlx5_chains_put_table(nic_chains, attr->dest_chain, 1,
1056                                       MLX5E_TC_FT_LEVEL);
1057 }
1058
1059 static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv,
1060                                   struct mlx5e_tc_flow *flow)
1061 {
1062         struct mlx5_flow_attr *attr = flow->attr;
1063         struct mlx5e_tc_table *tc = &priv->fs.tc;
1064
1065         flow_flag_clear(flow, OFFLOADED);
1066
1067         if (flow_flag_test(flow, CT))
1068                 mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1069         else if (!IS_ERR_OR_NULL(flow->rule[0]))
1070                 mlx5e_del_offloaded_nic_rule(priv, flow->rule[0], attr);
1071
1072         /* Remove root table if no rules are left to avoid
1073          * extra steering hops.
1074          */
1075         mutex_lock(&priv->fs.tc.t_lock);
1076         if (!mlx5e_tc_num_filters(priv, MLX5_TC_FLAG(NIC_OFFLOAD)) &&
1077             !IS_ERR_OR_NULL(tc->t)) {
1078                 mlx5_chains_put_table(nic_chains(priv), 0, 1, MLX5E_TC_FT_LEVEL);
1079                 priv->fs.tc.t = NULL;
1080         }
1081         mutex_unlock(&priv->fs.tc.t_lock);
1082
1083         kvfree(attr->parse_attr);
1084
1085         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
1086                 mlx5e_detach_mod_hdr(priv, flow);
1087
1088         mlx5_fc_destroy(priv->mdev, attr->counter);
1089
1090         if (flow_flag_test(flow, HAIRPIN))
1091                 mlx5e_hairpin_flow_del(priv, flow);
1092
1093         kfree(flow->attr);
1094 }
1095
1096 struct mlx5_flow_handle *
1097 mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw,
1098                            struct mlx5e_tc_flow *flow,
1099                            struct mlx5_flow_spec *spec,
1100                            struct mlx5_flow_attr *attr)
1101 {
1102         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
1103         struct mlx5_flow_handle *rule;
1104
1105         if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
1106                 return mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1107
1108         if (flow_flag_test(flow, CT)) {
1109                 mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
1110
1111                 rule = mlx5_tc_ct_flow_offload(get_ct_priv(flow->priv),
1112                                                flow, spec, attr,
1113                                                mod_hdr_acts);
1114 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
1115         } else if (flow_flag_test(flow, SAMPLE)) {
1116                 rule = mlx5_esw_sample_offload(get_sample_priv(flow->priv), spec, attr);
1117 #endif
1118         } else {
1119                 rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr);
1120         }
1121
1122         if (IS_ERR(rule))
1123                 return rule;
1124
1125         if (attr->esw_attr->split_count) {
1126                 flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr);
1127                 if (IS_ERR(flow->rule[1])) {
1128                         if (flow_flag_test(flow, CT))
1129                                 mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1130                         else
1131                                 mlx5_eswitch_del_offloaded_rule(esw, rule, attr);
1132                         return flow->rule[1];
1133                 }
1134         }
1135
1136         return rule;
1137 }
1138
1139 void mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw,
1140                                   struct mlx5e_tc_flow *flow,
1141                                   struct mlx5_flow_attr *attr)
1142 {
1143         flow_flag_clear(flow, OFFLOADED);
1144
1145         if (attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)
1146                 goto offload_rule_0;
1147
1148         if (flow_flag_test(flow, CT)) {
1149                 mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), flow, attr);
1150                 return;
1151         }
1152
1153 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
1154         if (flow_flag_test(flow, SAMPLE)) {
1155                 mlx5_esw_sample_unoffload(get_sample_priv(flow->priv), flow->rule[0], attr);
1156                 return;
1157         }
1158 #endif
1159
1160         if (attr->esw_attr->split_count)
1161                 mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr);
1162
1163 offload_rule_0:
1164         mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr);
1165 }
1166
1167 struct mlx5_flow_handle *
1168 mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw,
1169                               struct mlx5e_tc_flow *flow,
1170                               struct mlx5_flow_spec *spec)
1171 {
1172         struct mlx5_flow_attr *slow_attr;
1173         struct mlx5_flow_handle *rule;
1174
1175         slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1176         if (!slow_attr)
1177                 return ERR_PTR(-ENOMEM);
1178
1179         memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1180         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1181         slow_attr->esw_attr->split_count = 0;
1182         slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
1183
1184         rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr);
1185         if (!IS_ERR(rule))
1186                 flow_flag_set(flow, SLOW);
1187
1188         kfree(slow_attr);
1189
1190         return rule;
1191 }
1192
1193 void mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw,
1194                                        struct mlx5e_tc_flow *flow)
1195 {
1196         struct mlx5_flow_attr *slow_attr;
1197
1198         slow_attr = mlx5_alloc_flow_attr(MLX5_FLOW_NAMESPACE_FDB);
1199         if (!slow_attr) {
1200                 mlx5_core_warn(flow->priv->mdev, "Unable to alloc attr to unoffload slow path rule\n");
1201                 return;
1202         }
1203
1204         memcpy(slow_attr, flow->attr, ESW_FLOW_ATTR_SZ);
1205         slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1206         slow_attr->esw_attr->split_count = 0;
1207         slow_attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
1208         mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr);
1209         flow_flag_clear(flow, SLOW);
1210         kfree(slow_attr);
1211 }
1212
1213 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1214  * function.
1215  */
1216 static void unready_flow_add(struct mlx5e_tc_flow *flow,
1217                              struct list_head *unready_flows)
1218 {
1219         flow_flag_set(flow, NOT_READY);
1220         list_add_tail(&flow->unready, unready_flows);
1221 }
1222
1223 /* Caller must obtain uplink_priv->unready_flows_lock mutex before calling this
1224  * function.
1225  */
1226 static void unready_flow_del(struct mlx5e_tc_flow *flow)
1227 {
1228         list_del(&flow->unready);
1229         flow_flag_clear(flow, NOT_READY);
1230 }
1231
1232 static void add_unready_flow(struct mlx5e_tc_flow *flow)
1233 {
1234         struct mlx5_rep_uplink_priv *uplink_priv;
1235         struct mlx5e_rep_priv *rpriv;
1236         struct mlx5_eswitch *esw;
1237
1238         esw = flow->priv->mdev->priv.eswitch;
1239         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1240         uplink_priv = &rpriv->uplink_priv;
1241
1242         mutex_lock(&uplink_priv->unready_flows_lock);
1243         unready_flow_add(flow, &uplink_priv->unready_flows);
1244         mutex_unlock(&uplink_priv->unready_flows_lock);
1245 }
1246
1247 static void remove_unready_flow(struct mlx5e_tc_flow *flow)
1248 {
1249         struct mlx5_rep_uplink_priv *uplink_priv;
1250         struct mlx5e_rep_priv *rpriv;
1251         struct mlx5_eswitch *esw;
1252
1253         esw = flow->priv->mdev->priv.eswitch;
1254         rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1255         uplink_priv = &rpriv->uplink_priv;
1256
1257         mutex_lock(&uplink_priv->unready_flows_lock);
1258         unready_flow_del(flow);
1259         mutex_unlock(&uplink_priv->unready_flows_lock);
1260 }
1261
1262 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv);
1263
1264 bool mlx5e_tc_is_vf_tunnel(struct net_device *out_dev, struct net_device *route_dev)
1265 {
1266         struct mlx5_core_dev *out_mdev, *route_mdev;
1267         struct mlx5e_priv *out_priv, *route_priv;
1268
1269         out_priv = netdev_priv(out_dev);
1270         out_mdev = out_priv->mdev;
1271         route_priv = netdev_priv(route_dev);
1272         route_mdev = route_priv->mdev;
1273
1274         if (out_mdev->coredev_type != MLX5_COREDEV_PF ||
1275             route_mdev->coredev_type != MLX5_COREDEV_VF)
1276                 return false;
1277
1278         return same_hw_devs(out_priv, route_priv);
1279 }
1280
1281 int mlx5e_tc_query_route_vport(struct net_device *out_dev, struct net_device *route_dev, u16 *vport)
1282 {
1283         struct mlx5e_priv *out_priv, *route_priv;
1284         struct mlx5_core_dev *route_mdev;
1285         struct mlx5_eswitch *esw;
1286         u16 vhca_id;
1287         int err;
1288
1289         out_priv = netdev_priv(out_dev);
1290         esw = out_priv->mdev->priv.eswitch;
1291         route_priv = netdev_priv(route_dev);
1292         route_mdev = route_priv->mdev;
1293
1294         vhca_id = MLX5_CAP_GEN(route_mdev, vhca_id);
1295         err = mlx5_eswitch_vhca_id_to_vport(esw, vhca_id, vport);
1296         return err;
1297 }
1298
1299 int mlx5e_tc_add_flow_mod_hdr(struct mlx5e_priv *priv,
1300                               struct mlx5e_tc_flow_parse_attr *parse_attr,
1301                               struct mlx5e_tc_flow *flow)
1302 {
1303         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts = &parse_attr->mod_hdr_acts;
1304         struct mlx5_modify_hdr *mod_hdr;
1305
1306         mod_hdr = mlx5_modify_header_alloc(priv->mdev,
1307                                            get_flow_name_space(flow),
1308                                            mod_hdr_acts->num_actions,
1309                                            mod_hdr_acts->actions);
1310         if (IS_ERR(mod_hdr))
1311                 return PTR_ERR(mod_hdr);
1312
1313         WARN_ON(flow->attr->modify_hdr);
1314         flow->attr->modify_hdr = mod_hdr;
1315
1316         return 0;
1317 }
1318
1319 static int
1320 mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv,
1321                       struct mlx5e_tc_flow *flow,
1322                       struct netlink_ext_ack *extack)
1323 {
1324         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1325         struct mlx5e_tc_flow_parse_attr *parse_attr;
1326         struct mlx5_flow_attr *attr = flow->attr;
1327         bool vf_tun = false, encap_valid = true;
1328         struct net_device *encap_dev = NULL;
1329         struct mlx5_esw_flow_attr *esw_attr;
1330         struct mlx5_fc *counter = NULL;
1331         struct mlx5e_rep_priv *rpriv;
1332         struct mlx5e_priv *out_priv;
1333         u32 max_prio, max_chain;
1334         int err = 0;
1335         int out_index;
1336
1337         /* We check chain range only for tc flows.
1338          * For ft flows, we checked attr->chain was originally 0 and set it to
1339          * FDB_FT_CHAIN which is outside tc range.
1340          * See mlx5e_rep_setup_ft_cb().
1341          */
1342         max_chain = mlx5_chains_get_chain_range(esw_chains(esw));
1343         if (!mlx5e_is_ft_flow(flow) && attr->chain > max_chain) {
1344                 NL_SET_ERR_MSG_MOD(extack,
1345                                    "Requested chain is out of supported range");
1346                 err = -EOPNOTSUPP;
1347                 goto err_out;
1348         }
1349
1350         max_prio = mlx5_chains_get_prio_range(esw_chains(esw));
1351         if (attr->prio > max_prio) {
1352                 NL_SET_ERR_MSG_MOD(extack,
1353                                    "Requested priority is out of supported range");
1354                 err = -EOPNOTSUPP;
1355                 goto err_out;
1356         }
1357
1358         if (flow_flag_test(flow, TUN_RX)) {
1359                 err = mlx5e_attach_decap_route(priv, flow);
1360                 if (err)
1361                         goto err_out;
1362         }
1363
1364         if (flow_flag_test(flow, L3_TO_L2_DECAP)) {
1365                 err = mlx5e_attach_decap(priv, flow, extack);
1366                 if (err)
1367                         goto err_out;
1368         }
1369
1370         parse_attr = attr->parse_attr;
1371         esw_attr = attr->esw_attr;
1372
1373         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) {
1374                 struct net_device *out_dev;
1375                 int mirred_ifindex;
1376
1377                 if (!(esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP))
1378                         continue;
1379
1380                 mirred_ifindex = parse_attr->mirred_ifindex[out_index];
1381                 out_dev = dev_get_by_index(dev_net(priv->netdev), mirred_ifindex);
1382                 if (!out_dev) {
1383                         NL_SET_ERR_MSG_MOD(extack, "Requested mirred device not found");
1384                         err = -ENODEV;
1385                         goto err_out;
1386                 }
1387                 err = mlx5e_attach_encap(priv, flow, out_dev, out_index,
1388                                          extack, &encap_dev, &encap_valid);
1389                 dev_put(out_dev);
1390                 if (err)
1391                         goto err_out;
1392
1393                 if (esw_attr->dests[out_index].flags &
1394                     MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE)
1395                         vf_tun = true;
1396                 out_priv = netdev_priv(encap_dev);
1397                 rpriv = out_priv->ppriv;
1398                 esw_attr->dests[out_index].rep = rpriv->rep;
1399                 esw_attr->dests[out_index].mdev = out_priv->mdev;
1400         }
1401
1402         if (vf_tun && esw_attr->out_count > 1) {
1403                 NL_SET_ERR_MSG_MOD(extack, "VF tunnel encap with mirroring is not supported");
1404                 err = -EOPNOTSUPP;
1405                 goto err_out;
1406         }
1407
1408         err = mlx5_eswitch_add_vlan_action(esw, attr);
1409         if (err)
1410                 goto err_out;
1411
1412         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
1413             !(attr->ct_attr.ct_action & TCA_CT_ACT_CLEAR)) {
1414                 if (vf_tun) {
1415                         err = mlx5e_tc_add_flow_mod_hdr(priv, parse_attr, flow);
1416                         if (err)
1417                                 goto err_out;
1418                 } else {
1419                         err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
1420                         if (err)
1421                                 goto err_out;
1422                 }
1423         }
1424
1425         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
1426                 counter = mlx5_fc_create(esw_attr->counter_dev, true);
1427                 if (IS_ERR(counter)) {
1428                         err = PTR_ERR(counter);
1429                         goto err_out;
1430                 }
1431
1432                 attr->counter = counter;
1433         }
1434
1435         /* we get here if one of the following takes place:
1436          * (1) there's no error
1437          * (2) there's an encap action and we don't have valid neigh
1438          */
1439         if (!encap_valid)
1440                 flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec);
1441         else
1442                 flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr);
1443
1444         if (IS_ERR(flow->rule[0])) {
1445                 err = PTR_ERR(flow->rule[0]);
1446                 goto err_out;
1447         }
1448         flow_flag_set(flow, OFFLOADED);
1449
1450         return 0;
1451
1452 err_out:
1453         flow_flag_set(flow, FAILED);
1454         return err;
1455 }
1456
1457 static bool mlx5_flow_has_geneve_opt(struct mlx5e_tc_flow *flow)
1458 {
1459         struct mlx5_flow_spec *spec = &flow->attr->parse_attr->spec;
1460         void *headers_v = MLX5_ADDR_OF(fte_match_param,
1461                                        spec->match_value,
1462                                        misc_parameters_3);
1463         u32 geneve_tlv_opt_0_data = MLX5_GET(fte_match_set_misc3,
1464                                              headers_v,
1465                                              geneve_tlv_option_0_data);
1466
1467         return !!geneve_tlv_opt_0_data;
1468 }
1469
1470 static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv,
1471                                   struct mlx5e_tc_flow *flow)
1472 {
1473         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1474         struct mlx5_flow_attr *attr = flow->attr;
1475         struct mlx5_esw_flow_attr *esw_attr;
1476         bool vf_tun = false;
1477         int out_index;
1478
1479         esw_attr = attr->esw_attr;
1480         mlx5e_put_flow_tunnel_id(flow);
1481
1482         if (flow_flag_test(flow, NOT_READY))
1483                 remove_unready_flow(flow);
1484
1485         if (mlx5e_is_offloaded_flow(flow)) {
1486                 if (flow_flag_test(flow, SLOW))
1487                         mlx5e_tc_unoffload_from_slow_path(esw, flow);
1488                 else
1489                         mlx5e_tc_unoffload_fdb_rules(esw, flow, attr);
1490         }
1491
1492         if (mlx5_flow_has_geneve_opt(flow))
1493                 mlx5_geneve_tlv_option_del(priv->mdev->geneve);
1494
1495         mlx5_eswitch_del_vlan_action(esw, attr);
1496
1497         if (flow->decap_route)
1498                 mlx5e_detach_decap_route(priv, flow);
1499
1500         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++) {
1501                 if (esw_attr->dests[out_index].flags &
1502                     MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE)
1503                         vf_tun = true;
1504                 if (esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP) {
1505                         mlx5e_detach_encap(priv, flow, out_index);
1506                         kfree(attr->parse_attr->tun_info[out_index]);
1507                 }
1508         }
1509
1510         mlx5_tc_ct_match_del(get_ct_priv(priv), &flow->attr->ct_attr);
1511
1512         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
1513                 dealloc_mod_hdr_actions(&attr->parse_attr->mod_hdr_acts);
1514                 if (vf_tun && attr->modify_hdr)
1515                         mlx5_modify_header_dealloc(priv->mdev, attr->modify_hdr);
1516                 else
1517                         mlx5e_detach_mod_hdr(priv, flow);
1518         }
1519         kvfree(attr->parse_attr);
1520         kvfree(attr->esw_attr->rx_tun_attr);
1521
1522         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT)
1523                 mlx5_fc_destroy(esw_attr->counter_dev, attr->counter);
1524
1525         if (flow_flag_test(flow, L3_TO_L2_DECAP))
1526                 mlx5e_detach_decap(priv, flow);
1527
1528         kfree(flow->attr->esw_attr->sample);
1529         kfree(flow->attr);
1530 }
1531
1532 struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow)
1533 {
1534         return flow->attr->counter;
1535 }
1536
1537 /* Iterate over tmp_list of flows attached to flow_list head. */
1538 void mlx5e_put_flow_list(struct mlx5e_priv *priv, struct list_head *flow_list)
1539 {
1540         struct mlx5e_tc_flow *flow, *tmp;
1541
1542         list_for_each_entry_safe(flow, tmp, flow_list, tmp_list)
1543                 mlx5e_flow_put(priv, flow);
1544 }
1545
1546 static void __mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1547 {
1548         struct mlx5_eswitch *esw = flow->priv->mdev->priv.eswitch;
1549
1550         if (!flow_flag_test(flow, ESWITCH) ||
1551             !flow_flag_test(flow, DUP))
1552                 return;
1553
1554         mutex_lock(&esw->offloads.peer_mutex);
1555         list_del(&flow->peer);
1556         mutex_unlock(&esw->offloads.peer_mutex);
1557
1558         flow_flag_clear(flow, DUP);
1559
1560         if (refcount_dec_and_test(&flow->peer_flow->refcnt)) {
1561                 mlx5e_tc_del_fdb_flow(flow->peer_flow->priv, flow->peer_flow);
1562                 kfree(flow->peer_flow);
1563         }
1564
1565         flow->peer_flow = NULL;
1566 }
1567
1568 static void mlx5e_tc_del_fdb_peer_flow(struct mlx5e_tc_flow *flow)
1569 {
1570         struct mlx5_core_dev *dev = flow->priv->mdev;
1571         struct mlx5_devcom *devcom = dev->priv.devcom;
1572         struct mlx5_eswitch *peer_esw;
1573
1574         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1575         if (!peer_esw)
1576                 return;
1577
1578         __mlx5e_tc_del_fdb_peer_flow(flow);
1579         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
1580 }
1581
1582 static void mlx5e_tc_del_flow(struct mlx5e_priv *priv,
1583                               struct mlx5e_tc_flow *flow)
1584 {
1585         if (mlx5e_is_eswitch_flow(flow)) {
1586                 mlx5e_tc_del_fdb_peer_flow(flow);
1587                 mlx5e_tc_del_fdb_flow(priv, flow);
1588         } else {
1589                 mlx5e_tc_del_nic_flow(priv, flow);
1590         }
1591 }
1592
1593 static int flow_has_tc_fwd_action(struct flow_cls_offload *f)
1594 {
1595         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1596         struct flow_action *flow_action = &rule->action;
1597         const struct flow_action_entry *act;
1598         int i;
1599
1600         flow_action_for_each(i, act, flow_action) {
1601                 switch (act->id) {
1602                 case FLOW_ACTION_GOTO:
1603                         return true;
1604                 default:
1605                         continue;
1606                 }
1607         }
1608
1609         return false;
1610 }
1611
1612 static int
1613 enc_opts_is_dont_care_or_full_match(struct mlx5e_priv *priv,
1614                                     struct flow_dissector_key_enc_opts *opts,
1615                                     struct netlink_ext_ack *extack,
1616                                     bool *dont_care)
1617 {
1618         struct geneve_opt *opt;
1619         int off = 0;
1620
1621         *dont_care = true;
1622
1623         while (opts->len > off) {
1624                 opt = (struct geneve_opt *)&opts->data[off];
1625
1626                 if (!(*dont_care) || opt->opt_class || opt->type ||
1627                     memchr_inv(opt->opt_data, 0, opt->length * 4)) {
1628                         *dont_care = false;
1629
1630                         if (opt->opt_class != htons(U16_MAX) ||
1631                             opt->type != U8_MAX) {
1632                                 NL_SET_ERR_MSG(extack,
1633                                                "Partial match of tunnel options in chain > 0 isn't supported");
1634                                 netdev_warn(priv->netdev,
1635                                             "Partial match of tunnel options in chain > 0 isn't supported");
1636                                 return -EOPNOTSUPP;
1637                         }
1638                 }
1639
1640                 off += sizeof(struct geneve_opt) + opt->length * 4;
1641         }
1642
1643         return 0;
1644 }
1645
1646 #define COPY_DISSECTOR(rule, diss_key, dst)\
1647 ({ \
1648         struct flow_rule *__rule = (rule);\
1649         typeof(dst) __dst = dst;\
1650 \
1651         memcpy(__dst,\
1652                skb_flow_dissector_target(__rule->match.dissector,\
1653                                          diss_key,\
1654                                          __rule->match.key),\
1655                sizeof(*__dst));\
1656 })
1657
1658 static int mlx5e_get_flow_tunnel_id(struct mlx5e_priv *priv,
1659                                     struct mlx5e_tc_flow *flow,
1660                                     struct flow_cls_offload *f,
1661                                     struct net_device *filter_dev)
1662 {
1663         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1664         struct netlink_ext_ack *extack = f->common.extack;
1665         struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts;
1666         struct flow_match_enc_opts enc_opts_match;
1667         struct tunnel_match_enc_opts tun_enc_opts;
1668         struct mlx5_rep_uplink_priv *uplink_priv;
1669         struct mlx5_flow_attr *attr = flow->attr;
1670         struct mlx5e_rep_priv *uplink_rpriv;
1671         struct tunnel_match_key tunnel_key;
1672         bool enc_opts_is_dont_care = true;
1673         u32 tun_id, enc_opts_id = 0;
1674         struct mlx5_eswitch *esw;
1675         u32 value, mask;
1676         int err;
1677
1678         esw = priv->mdev->priv.eswitch;
1679         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1680         uplink_priv = &uplink_rpriv->uplink_priv;
1681
1682         memset(&tunnel_key, 0, sizeof(tunnel_key));
1683         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL,
1684                        &tunnel_key.enc_control);
1685         if (tunnel_key.enc_control.addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS)
1686                 COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS,
1687                                &tunnel_key.enc_ipv4);
1688         else
1689                 COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS,
1690                                &tunnel_key.enc_ipv6);
1691         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_IP, &tunnel_key.enc_ip);
1692         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_PORTS,
1693                        &tunnel_key.enc_tp);
1694         COPY_DISSECTOR(rule, FLOW_DISSECTOR_KEY_ENC_KEYID,
1695                        &tunnel_key.enc_key_id);
1696         tunnel_key.filter_ifindex = filter_dev->ifindex;
1697
1698         err = mapping_add(uplink_priv->tunnel_mapping, &tunnel_key, &tun_id);
1699         if (err)
1700                 return err;
1701
1702         flow_rule_match_enc_opts(rule, &enc_opts_match);
1703         err = enc_opts_is_dont_care_or_full_match(priv,
1704                                                   enc_opts_match.mask,
1705                                                   extack,
1706                                                   &enc_opts_is_dont_care);
1707         if (err)
1708                 goto err_enc_opts;
1709
1710         if (!enc_opts_is_dont_care) {
1711                 memset(&tun_enc_opts, 0, sizeof(tun_enc_opts));
1712                 memcpy(&tun_enc_opts.key, enc_opts_match.key,
1713                        sizeof(*enc_opts_match.key));
1714                 memcpy(&tun_enc_opts.mask, enc_opts_match.mask,
1715                        sizeof(*enc_opts_match.mask));
1716
1717                 err = mapping_add(uplink_priv->tunnel_enc_opts_mapping,
1718                                   &tun_enc_opts, &enc_opts_id);
1719                 if (err)
1720                         goto err_enc_opts;
1721         }
1722
1723         value = tun_id << ENC_OPTS_BITS | enc_opts_id;
1724         mask = enc_opts_id ? TUNNEL_ID_MASK :
1725                              (TUNNEL_ID_MASK & ~ENC_OPTS_BITS_MASK);
1726
1727         if (attr->chain) {
1728                 mlx5e_tc_match_to_reg_match(&attr->parse_attr->spec,
1729                                             TUNNEL_TO_REG, value, mask);
1730         } else {
1731                 mod_hdr_acts = &attr->parse_attr->mod_hdr_acts;
1732                 err = mlx5e_tc_match_to_reg_set(priv->mdev,
1733                                                 mod_hdr_acts, MLX5_FLOW_NAMESPACE_FDB,
1734                                                 TUNNEL_TO_REG, value);
1735                 if (err)
1736                         goto err_set;
1737
1738                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
1739         }
1740
1741         flow->tunnel_id = value;
1742         return 0;
1743
1744 err_set:
1745         if (enc_opts_id)
1746                 mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
1747                                enc_opts_id);
1748 err_enc_opts:
1749         mapping_remove(uplink_priv->tunnel_mapping, tun_id);
1750         return err;
1751 }
1752
1753 static void mlx5e_put_flow_tunnel_id(struct mlx5e_tc_flow *flow)
1754 {
1755         u32 enc_opts_id = flow->tunnel_id & ENC_OPTS_BITS_MASK;
1756         u32 tun_id = flow->tunnel_id >> ENC_OPTS_BITS;
1757         struct mlx5_rep_uplink_priv *uplink_priv;
1758         struct mlx5e_rep_priv *uplink_rpriv;
1759         struct mlx5_eswitch *esw;
1760
1761         esw = flow->priv->mdev->priv.eswitch;
1762         uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
1763         uplink_priv = &uplink_rpriv->uplink_priv;
1764
1765         if (tun_id)
1766                 mapping_remove(uplink_priv->tunnel_mapping, tun_id);
1767         if (enc_opts_id)
1768                 mapping_remove(uplink_priv->tunnel_enc_opts_mapping,
1769                                enc_opts_id);
1770 }
1771
1772 u32 mlx5e_tc_get_flow_tun_id(struct mlx5e_tc_flow *flow)
1773 {
1774         return flow->tunnel_id;
1775 }
1776
1777 void mlx5e_tc_set_ethertype(struct mlx5_core_dev *mdev,
1778                             struct flow_match_basic *match, bool outer,
1779                             void *headers_c, void *headers_v)
1780 {
1781         bool ip_version_cap;
1782
1783         ip_version_cap = outer ?
1784                 MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
1785                                           ft_field_support.outer_ip_version) :
1786                 MLX5_CAP_FLOWTABLE_NIC_RX(mdev,
1787                                           ft_field_support.inner_ip_version);
1788
1789         if (ip_version_cap && match->mask->n_proto == htons(0xFFFF) &&
1790             (match->key->n_proto == htons(ETH_P_IP) ||
1791              match->key->n_proto == htons(ETH_P_IPV6))) {
1792                 MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_version);
1793                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version,
1794                          match->key->n_proto == htons(ETH_P_IP) ? 4 : 6);
1795         } else {
1796                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype,
1797                          ntohs(match->mask->n_proto));
1798                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
1799                          ntohs(match->key->n_proto));
1800         }
1801 }
1802
1803 u8 mlx5e_tc_get_ip_version(struct mlx5_flow_spec *spec, bool outer)
1804 {
1805         void *headers_v;
1806         u16 ethertype;
1807         u8 ip_version;
1808
1809         if (outer)
1810                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers);
1811         else
1812                 headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, inner_headers);
1813
1814         ip_version = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_version);
1815         /* Return ip_version converted from ethertype anyway */
1816         if (!ip_version) {
1817                 ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
1818                 if (ethertype == ETH_P_IP || ethertype == ETH_P_ARP)
1819                         ip_version = 4;
1820                 else if (ethertype == ETH_P_IPV6)
1821                         ip_version = 6;
1822         }
1823         return ip_version;
1824 }
1825
1826 static int parse_tunnel_attr(struct mlx5e_priv *priv,
1827                              struct mlx5e_tc_flow *flow,
1828                              struct mlx5_flow_spec *spec,
1829                              struct flow_cls_offload *f,
1830                              struct net_device *filter_dev,
1831                              u8 *match_level,
1832                              bool *match_inner)
1833 {
1834         struct mlx5e_tc_tunnel *tunnel = mlx5e_get_tc_tun(filter_dev);
1835         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1836         struct netlink_ext_ack *extack = f->common.extack;
1837         bool needs_mapping, sets_mapping;
1838         int err;
1839
1840         if (!mlx5e_is_eswitch_flow(flow))
1841                 return -EOPNOTSUPP;
1842
1843         needs_mapping = !!flow->attr->chain;
1844         sets_mapping = !flow->attr->chain && flow_has_tc_fwd_action(f);
1845         *match_inner = !needs_mapping;
1846
1847         if ((needs_mapping || sets_mapping) &&
1848             !mlx5_eswitch_reg_c1_loopback_enabled(esw)) {
1849                 NL_SET_ERR_MSG(extack,
1850                                "Chains on tunnel devices isn't supported without register loopback support");
1851                 netdev_warn(priv->netdev,
1852                             "Chains on tunnel devices isn't supported without register loopback support");
1853                 return -EOPNOTSUPP;
1854         }
1855
1856         if (!flow->attr->chain) {
1857                 err = mlx5e_tc_tun_parse(filter_dev, priv, spec, f,
1858                                          match_level);
1859                 if (err) {
1860                         NL_SET_ERR_MSG_MOD(extack,
1861                                            "Failed to parse tunnel attributes");
1862                         netdev_warn(priv->netdev,
1863                                     "Failed to parse tunnel attributes");
1864                         return err;
1865                 }
1866
1867                 /* With mpls over udp we decapsulate using packet reformat
1868                  * object
1869                  */
1870                 if (!netif_is_bareudp(filter_dev))
1871                         flow->attr->action |= MLX5_FLOW_CONTEXT_ACTION_DECAP;
1872                 err = mlx5e_tc_set_attr_rx_tun(flow, spec);
1873                 if (err)
1874                         return err;
1875         } else if (tunnel && tunnel->tunnel_type == MLX5E_TC_TUNNEL_TYPE_VXLAN) {
1876                 struct mlx5_flow_spec *tmp_spec;
1877
1878                 tmp_spec = kvzalloc(sizeof(*tmp_spec), GFP_KERNEL);
1879                 if (!tmp_spec) {
1880                         NL_SET_ERR_MSG_MOD(extack, "Failed to allocate memory for vxlan tmp spec");
1881                         netdev_warn(priv->netdev, "Failed to allocate memory for vxlan tmp spec");
1882                         return -ENOMEM;
1883                 }
1884                 memcpy(tmp_spec, spec, sizeof(*tmp_spec));
1885
1886                 err = mlx5e_tc_tun_parse(filter_dev, priv, tmp_spec, f, match_level);
1887                 if (err) {
1888                         kvfree(tmp_spec);
1889                         NL_SET_ERR_MSG_MOD(extack, "Failed to parse tunnel attributes");
1890                         netdev_warn(priv->netdev, "Failed to parse tunnel attributes");
1891                         return err;
1892                 }
1893                 err = mlx5e_tc_set_attr_rx_tun(flow, tmp_spec);
1894                 kvfree(tmp_spec);
1895                 if (err)
1896                         return err;
1897         }
1898
1899         if (!needs_mapping && !sets_mapping)
1900                 return 0;
1901
1902         return mlx5e_get_flow_tunnel_id(priv, flow, f, filter_dev);
1903 }
1904
1905 static void *get_match_inner_headers_criteria(struct mlx5_flow_spec *spec)
1906 {
1907         return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1908                             inner_headers);
1909 }
1910
1911 static void *get_match_inner_headers_value(struct mlx5_flow_spec *spec)
1912 {
1913         return MLX5_ADDR_OF(fte_match_param, spec->match_value,
1914                             inner_headers);
1915 }
1916
1917 static void *get_match_outer_headers_criteria(struct mlx5_flow_spec *spec)
1918 {
1919         return MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
1920                             outer_headers);
1921 }
1922
1923 static void *get_match_outer_headers_value(struct mlx5_flow_spec *spec)
1924 {
1925         return MLX5_ADDR_OF(fte_match_param, spec->match_value,
1926                             outer_headers);
1927 }
1928
1929 static void *get_match_headers_value(u32 flags,
1930                                      struct mlx5_flow_spec *spec)
1931 {
1932         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
1933                 get_match_inner_headers_value(spec) :
1934                 get_match_outer_headers_value(spec);
1935 }
1936
1937 static void *get_match_headers_criteria(u32 flags,
1938                                         struct mlx5_flow_spec *spec)
1939 {
1940         return (flags & MLX5_FLOW_CONTEXT_ACTION_DECAP) ?
1941                 get_match_inner_headers_criteria(spec) :
1942                 get_match_outer_headers_criteria(spec);
1943 }
1944
1945 static int mlx5e_flower_parse_meta(struct net_device *filter_dev,
1946                                    struct flow_cls_offload *f)
1947 {
1948         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
1949         struct netlink_ext_ack *extack = f->common.extack;
1950         struct net_device *ingress_dev;
1951         struct flow_match_meta match;
1952
1953         if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))
1954                 return 0;
1955
1956         flow_rule_match_meta(rule, &match);
1957         if (!match.mask->ingress_ifindex)
1958                 return 0;
1959
1960         if (match.mask->ingress_ifindex != 0xFFFFFFFF) {
1961                 NL_SET_ERR_MSG_MOD(extack, "Unsupported ingress ifindex mask");
1962                 return -EOPNOTSUPP;
1963         }
1964
1965         ingress_dev = __dev_get_by_index(dev_net(filter_dev),
1966                                          match.key->ingress_ifindex);
1967         if (!ingress_dev) {
1968                 NL_SET_ERR_MSG_MOD(extack,
1969                                    "Can't find the ingress port to match on");
1970                 return -ENOENT;
1971         }
1972
1973         if (ingress_dev != filter_dev) {
1974                 NL_SET_ERR_MSG_MOD(extack,
1975                                    "Can't match on the ingress filter port");
1976                 return -EOPNOTSUPP;
1977         }
1978
1979         return 0;
1980 }
1981
1982 static bool skip_key_basic(struct net_device *filter_dev,
1983                            struct flow_cls_offload *f)
1984 {
1985         /* When doing mpls over udp decap, the user needs to provide
1986          * MPLS_UC as the protocol in order to be able to match on mpls
1987          * label fields.  However, the actual ethertype is IP so we want to
1988          * avoid matching on this, otherwise we'll fail the match.
1989          */
1990         if (netif_is_bareudp(filter_dev) && f->common.chain_index == 0)
1991                 return true;
1992
1993         return false;
1994 }
1995
1996 static int __parse_cls_flower(struct mlx5e_priv *priv,
1997                               struct mlx5e_tc_flow *flow,
1998                               struct mlx5_flow_spec *spec,
1999                               struct flow_cls_offload *f,
2000                               struct net_device *filter_dev,
2001                               u8 *inner_match_level, u8 *outer_match_level)
2002 {
2003         struct netlink_ext_ack *extack = f->common.extack;
2004         void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2005                                        outer_headers);
2006         void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2007                                        outer_headers);
2008         void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2009                                     misc_parameters);
2010         void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2011                                     misc_parameters);
2012         void *misc_c_3 = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
2013                                     misc_parameters_3);
2014         void *misc_v_3 = MLX5_ADDR_OF(fte_match_param, spec->match_value,
2015                                     misc_parameters_3);
2016         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2017         struct flow_dissector *dissector = rule->match.dissector;
2018         u16 addr_type = 0;
2019         u8 ip_proto = 0;
2020         u8 *match_level;
2021         int err;
2022
2023         match_level = outer_match_level;
2024
2025         if (dissector->used_keys &
2026             ~(BIT(FLOW_DISSECTOR_KEY_META) |
2027               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2028               BIT(FLOW_DISSECTOR_KEY_BASIC) |
2029               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2030               BIT(FLOW_DISSECTOR_KEY_VLAN) |
2031               BIT(FLOW_DISSECTOR_KEY_CVLAN) |
2032               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
2033               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
2034               BIT(FLOW_DISSECTOR_KEY_PORTS) |
2035               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) |
2036               BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) |
2037               BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) |
2038               BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) |
2039               BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) |
2040               BIT(FLOW_DISSECTOR_KEY_TCP) |
2041               BIT(FLOW_DISSECTOR_KEY_IP)  |
2042               BIT(FLOW_DISSECTOR_KEY_CT) |
2043               BIT(FLOW_DISSECTOR_KEY_ENC_IP) |
2044               BIT(FLOW_DISSECTOR_KEY_ENC_OPTS) |
2045               BIT(FLOW_DISSECTOR_KEY_ICMP) |
2046               BIT(FLOW_DISSECTOR_KEY_MPLS))) {
2047                 NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
2048                 netdev_dbg(priv->netdev, "Unsupported key used: 0x%x\n",
2049                            dissector->used_keys);
2050                 return -EOPNOTSUPP;
2051         }
2052
2053         if (mlx5e_get_tc_tun(filter_dev)) {
2054                 bool match_inner = false;
2055
2056                 err = parse_tunnel_attr(priv, flow, spec, f, filter_dev,
2057                                         outer_match_level, &match_inner);
2058                 if (err)
2059                         return err;
2060
2061                 if (match_inner) {
2062                         /* header pointers should point to the inner headers
2063                          * if the packet was decapsulated already.
2064                          * outer headers are set by parse_tunnel_attr.
2065                          */
2066                         match_level = inner_match_level;
2067                         headers_c = get_match_inner_headers_criteria(spec);
2068                         headers_v = get_match_inner_headers_value(spec);
2069                 }
2070         }
2071
2072         err = mlx5e_flower_parse_meta(filter_dev, f);
2073         if (err)
2074                 return err;
2075
2076         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC) &&
2077             !skip_key_basic(filter_dev, f)) {
2078                 struct flow_match_basic match;
2079
2080                 flow_rule_match_basic(rule, &match);
2081                 mlx5e_tc_set_ethertype(priv->mdev, &match,
2082                                        match_level == outer_match_level,
2083                                        headers_c, headers_v);
2084
2085                 if (match.mask->n_proto)
2086                         *match_level = MLX5_MATCH_L2;
2087         }
2088         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN) ||
2089             is_vlan_dev(filter_dev)) {
2090                 struct flow_dissector_key_vlan filter_dev_mask;
2091                 struct flow_dissector_key_vlan filter_dev_key;
2092                 struct flow_match_vlan match;
2093
2094                 if (is_vlan_dev(filter_dev)) {
2095                         match.key = &filter_dev_key;
2096                         match.key->vlan_id = vlan_dev_vlan_id(filter_dev);
2097                         match.key->vlan_tpid = vlan_dev_vlan_proto(filter_dev);
2098                         match.key->vlan_priority = 0;
2099                         match.mask = &filter_dev_mask;
2100                         memset(match.mask, 0xff, sizeof(*match.mask));
2101                         match.mask->vlan_priority = 0;
2102                 } else {
2103                         flow_rule_match_vlan(rule, &match);
2104                 }
2105                 if (match.mask->vlan_id ||
2106                     match.mask->vlan_priority ||
2107                     match.mask->vlan_tpid) {
2108                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2109                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2110                                          svlan_tag, 1);
2111                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2112                                          svlan_tag, 1);
2113                         } else {
2114                                 MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2115                                          cvlan_tag, 1);
2116                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2117                                          cvlan_tag, 1);
2118                         }
2119
2120                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid,
2121                                  match.mask->vlan_id);
2122                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid,
2123                                  match.key->vlan_id);
2124
2125                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio,
2126                                  match.mask->vlan_priority);
2127                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio,
2128                                  match.key->vlan_priority);
2129
2130                         *match_level = MLX5_MATCH_L2;
2131                 }
2132         } else if (*match_level != MLX5_MATCH_NONE) {
2133                 /* cvlan_tag enabled in match criteria and
2134                  * disabled in match value means both S & C tags
2135                  * don't exist (untagged of both)
2136                  */
2137                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1);
2138                 *match_level = MLX5_MATCH_L2;
2139         }
2140
2141         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CVLAN)) {
2142                 struct flow_match_vlan match;
2143
2144                 flow_rule_match_cvlan(rule, &match);
2145                 if (match.mask->vlan_id ||
2146                     match.mask->vlan_priority ||
2147                     match.mask->vlan_tpid) {
2148                         if (match.key->vlan_tpid == htons(ETH_P_8021AD)) {
2149                                 MLX5_SET(fte_match_set_misc, misc_c,
2150                                          outer_second_svlan_tag, 1);
2151                                 MLX5_SET(fte_match_set_misc, misc_v,
2152                                          outer_second_svlan_tag, 1);
2153                         } else {
2154                                 MLX5_SET(fte_match_set_misc, misc_c,
2155                                          outer_second_cvlan_tag, 1);
2156                                 MLX5_SET(fte_match_set_misc, misc_v,
2157                                          outer_second_cvlan_tag, 1);
2158                         }
2159
2160                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid,
2161                                  match.mask->vlan_id);
2162                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid,
2163                                  match.key->vlan_id);
2164                         MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio,
2165                                  match.mask->vlan_priority);
2166                         MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio,
2167                                  match.key->vlan_priority);
2168
2169                         *match_level = MLX5_MATCH_L2;
2170                         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
2171                 }
2172         }
2173
2174         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2175                 struct flow_match_eth_addrs match;
2176
2177                 flow_rule_match_eth_addrs(rule, &match);
2178                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2179                                              dmac_47_16),
2180                                 match.mask->dst);
2181                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2182                                              dmac_47_16),
2183                                 match.key->dst);
2184
2185                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2186                                              smac_47_16),
2187                                 match.mask->src);
2188                 ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2189                                              smac_47_16),
2190                                 match.key->src);
2191
2192                 if (!is_zero_ether_addr(match.mask->src) ||
2193                     !is_zero_ether_addr(match.mask->dst))
2194                         *match_level = MLX5_MATCH_L2;
2195         }
2196
2197         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
2198                 struct flow_match_control match;
2199
2200                 flow_rule_match_control(rule, &match);
2201                 addr_type = match.key->addr_type;
2202
2203                 /* the HW doesn't support frag first/later */
2204                 if (match.mask->flags & FLOW_DIS_FIRST_FRAG)
2205                         return -EOPNOTSUPP;
2206
2207                 if (match.mask->flags & FLOW_DIS_IS_FRAGMENT) {
2208                         MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
2209                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
2210                                  match.key->flags & FLOW_DIS_IS_FRAGMENT);
2211
2212                         /* the HW doesn't need L3 inline to match on frag=no */
2213                         if (!(match.key->flags & FLOW_DIS_IS_FRAGMENT))
2214                                 *match_level = MLX5_MATCH_L2;
2215         /* ***  L2 attributes parsing up to here *** */
2216                         else
2217                                 *match_level = MLX5_MATCH_L3;
2218                 }
2219         }
2220
2221         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2222                 struct flow_match_basic match;
2223
2224                 flow_rule_match_basic(rule, &match);
2225                 ip_proto = match.key->ip_proto;
2226
2227                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol,
2228                          match.mask->ip_proto);
2229                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
2230                          match.key->ip_proto);
2231
2232                 if (match.mask->ip_proto)
2233                         *match_level = MLX5_MATCH_L3;
2234         }
2235
2236         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
2237                 struct flow_match_ipv4_addrs match;
2238
2239                 flow_rule_match_ipv4_addrs(rule, &match);
2240                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2241                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
2242                        &match.mask->src, sizeof(match.mask->src));
2243                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2244                                     src_ipv4_src_ipv6.ipv4_layout.ipv4),
2245                        &match.key->src, sizeof(match.key->src));
2246                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2247                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2248                        &match.mask->dst, sizeof(match.mask->dst));
2249                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2250                                     dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2251                        &match.key->dst, sizeof(match.key->dst));
2252
2253                 if (match.mask->src || match.mask->dst)
2254                         *match_level = MLX5_MATCH_L3;
2255         }
2256
2257         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
2258                 struct flow_match_ipv6_addrs match;
2259
2260                 flow_rule_match_ipv6_addrs(rule, &match);
2261                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2262                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
2263                        &match.mask->src, sizeof(match.mask->src));
2264                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2265                                     src_ipv4_src_ipv6.ipv6_layout.ipv6),
2266                        &match.key->src, sizeof(match.key->src));
2267
2268                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
2269                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2270                        &match.mask->dst, sizeof(match.mask->dst));
2271                 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
2272                                     dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
2273                        &match.key->dst, sizeof(match.key->dst));
2274
2275                 if (ipv6_addr_type(&match.mask->src) != IPV6_ADDR_ANY ||
2276                     ipv6_addr_type(&match.mask->dst) != IPV6_ADDR_ANY)
2277                         *match_level = MLX5_MATCH_L3;
2278         }
2279
2280         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) {
2281                 struct flow_match_ip match;
2282
2283                 flow_rule_match_ip(rule, &match);
2284                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn,
2285                          match.mask->tos & 0x3);
2286                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn,
2287                          match.key->tos & 0x3);
2288
2289                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp,
2290                          match.mask->tos >> 2);
2291                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp,
2292                          match.key->tos  >> 2);
2293
2294                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit,
2295                          match.mask->ttl);
2296                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit,
2297                          match.key->ttl);
2298
2299                 if (match.mask->ttl &&
2300                     !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
2301                                                 ft_field_support.outer_ipv4_ttl)) {
2302                         NL_SET_ERR_MSG_MOD(extack,
2303                                            "Matching on TTL is not supported");
2304                         return -EOPNOTSUPP;
2305                 }
2306
2307                 if (match.mask->tos || match.mask->ttl)
2308                         *match_level = MLX5_MATCH_L3;
2309         }
2310
2311         /* ***  L3 attributes parsing up to here *** */
2312
2313         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
2314                 struct flow_match_ports match;
2315
2316                 flow_rule_match_ports(rule, &match);
2317                 switch (ip_proto) {
2318                 case IPPROTO_TCP:
2319                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2320                                  tcp_sport, ntohs(match.mask->src));
2321                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2322                                  tcp_sport, ntohs(match.key->src));
2323
2324                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2325                                  tcp_dport, ntohs(match.mask->dst));
2326                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2327                                  tcp_dport, ntohs(match.key->dst));
2328                         break;
2329
2330                 case IPPROTO_UDP:
2331                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2332                                  udp_sport, ntohs(match.mask->src));
2333                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2334                                  udp_sport, ntohs(match.key->src));
2335
2336                         MLX5_SET(fte_match_set_lyr_2_4, headers_c,
2337                                  udp_dport, ntohs(match.mask->dst));
2338                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
2339                                  udp_dport, ntohs(match.key->dst));
2340                         break;
2341                 default:
2342                         NL_SET_ERR_MSG_MOD(extack,
2343                                            "Only UDP and TCP transports are supported for L4 matching");
2344                         netdev_err(priv->netdev,
2345                                    "Only UDP and TCP transport are supported\n");
2346                         return -EINVAL;
2347                 }
2348
2349                 if (match.mask->src || match.mask->dst)
2350                         *match_level = MLX5_MATCH_L4;
2351         }
2352
2353         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_TCP)) {
2354                 struct flow_match_tcp match;
2355
2356                 flow_rule_match_tcp(rule, &match);
2357                 MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags,
2358                          ntohs(match.mask->flags));
2359                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
2360                          ntohs(match.key->flags));
2361
2362                 if (match.mask->flags)
2363                         *match_level = MLX5_MATCH_L4;
2364         }
2365         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ICMP)) {
2366                 struct flow_match_icmp match;
2367
2368                 flow_rule_match_icmp(rule, &match);
2369                 switch (ip_proto) {
2370                 case IPPROTO_ICMP:
2371                         if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
2372                               MLX5_FLEX_PROTO_ICMP))
2373                                 return -EOPNOTSUPP;
2374                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_type,
2375                                  match.mask->type);
2376                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_type,
2377                                  match.key->type);
2378                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_code,
2379                                  match.mask->code);
2380                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_code,
2381                                  match.key->code);
2382                         break;
2383                 case IPPROTO_ICMPV6:
2384                         if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
2385                               MLX5_FLEX_PROTO_ICMPV6))
2386                                 return -EOPNOTSUPP;
2387                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_type,
2388                                  match.mask->type);
2389                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_type,
2390                                  match.key->type);
2391                         MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_code,
2392                                  match.mask->code);
2393                         MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_code,
2394                                  match.key->code);
2395                         break;
2396                 default:
2397                         NL_SET_ERR_MSG_MOD(extack,
2398                                            "Code and type matching only with ICMP and ICMPv6");
2399                         netdev_err(priv->netdev,
2400                                    "Code and type matching only with ICMP and ICMPv6\n");
2401                         return -EINVAL;
2402                 }
2403                 if (match.mask->code || match.mask->type) {
2404                         *match_level = MLX5_MATCH_L4;
2405                         spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_3;
2406                 }
2407         }
2408         /* Currenlty supported only for MPLS over UDP */
2409         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_MPLS) &&
2410             !netif_is_bareudp(filter_dev)) {
2411                 NL_SET_ERR_MSG_MOD(extack,
2412                                    "Matching on MPLS is supported only for MPLS over UDP");
2413                 netdev_err(priv->netdev,
2414                            "Matching on MPLS is supported only for MPLS over UDP\n");
2415                 return -EOPNOTSUPP;
2416         }
2417
2418         return 0;
2419 }
2420
2421 static int parse_cls_flower(struct mlx5e_priv *priv,
2422                             struct mlx5e_tc_flow *flow,
2423                             struct mlx5_flow_spec *spec,
2424                             struct flow_cls_offload *f,
2425                             struct net_device *filter_dev)
2426 {
2427         u8 inner_match_level, outer_match_level, non_tunnel_match_level;
2428         struct netlink_ext_ack *extack = f->common.extack;
2429         struct mlx5_core_dev *dev = priv->mdev;
2430         struct mlx5_eswitch *esw = dev->priv.eswitch;
2431         struct mlx5e_rep_priv *rpriv = priv->ppriv;
2432         struct mlx5_eswitch_rep *rep;
2433         bool is_eswitch_flow;
2434         int err;
2435
2436         inner_match_level = MLX5_MATCH_NONE;
2437         outer_match_level = MLX5_MATCH_NONE;
2438
2439         err = __parse_cls_flower(priv, flow, spec, f, filter_dev,
2440                                  &inner_match_level, &outer_match_level);
2441         non_tunnel_match_level = (inner_match_level == MLX5_MATCH_NONE) ?
2442                                  outer_match_level : inner_match_level;
2443
2444         is_eswitch_flow = mlx5e_is_eswitch_flow(flow);
2445         if (!err && is_eswitch_flow) {
2446                 rep = rpriv->rep;
2447                 if (rep->vport != MLX5_VPORT_UPLINK &&
2448                     (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
2449                     esw->offloads.inline_mode < non_tunnel_match_level)) {
2450                         NL_SET_ERR_MSG_MOD(extack,
2451                                            "Flow is not offloaded due to min inline setting");
2452                         netdev_warn(priv->netdev,
2453                                     "Flow is not offloaded due to min inline setting, required %d actual %d\n",
2454                                     non_tunnel_match_level, esw->offloads.inline_mode);
2455                         return -EOPNOTSUPP;
2456                 }
2457         }
2458
2459         flow->attr->inner_match_level = inner_match_level;
2460         flow->attr->outer_match_level = outer_match_level;
2461
2462
2463         return err;
2464 }
2465
2466 struct pedit_headers {
2467         struct ethhdr  eth;
2468         struct vlan_hdr vlan;
2469         struct iphdr   ip4;
2470         struct ipv6hdr ip6;
2471         struct tcphdr  tcp;
2472         struct udphdr  udp;
2473 };
2474
2475 struct pedit_headers_action {
2476         struct pedit_headers    vals;
2477         struct pedit_headers    masks;
2478         u32                     pedits;
2479 };
2480
2481 static int pedit_header_offsets[] = {
2482         [FLOW_ACT_MANGLE_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth),
2483         [FLOW_ACT_MANGLE_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4),
2484         [FLOW_ACT_MANGLE_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6),
2485         [FLOW_ACT_MANGLE_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp),
2486         [FLOW_ACT_MANGLE_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp),
2487 };
2488
2489 #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype])
2490
2491 static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset,
2492                          struct pedit_headers_action *hdrs)
2493 {
2494         u32 *curr_pmask, *curr_pval;
2495
2496         curr_pmask = (u32 *)(pedit_header(&hdrs->masks, hdr_type) + offset);
2497         curr_pval  = (u32 *)(pedit_header(&hdrs->vals, hdr_type) + offset);
2498
2499         if (*curr_pmask & mask)  /* disallow acting twice on the same location */
2500                 goto out_err;
2501
2502         *curr_pmask |= mask;
2503         *curr_pval  |= (val & mask);
2504
2505         return 0;
2506
2507 out_err:
2508         return -EOPNOTSUPP;
2509 }
2510
2511 struct mlx5_fields {
2512         u8  field;
2513         u8  field_bsize;
2514         u32 field_mask;
2515         u32 offset;
2516         u32 match_offset;
2517 };
2518
2519 #define OFFLOAD(fw_field, field_bsize, field_mask, field, off, match_field) \
2520                 {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, field_bsize, field_mask, \
2521                  offsetof(struct pedit_headers, field) + (off), \
2522                  MLX5_BYTE_OFF(fte_match_set_lyr_2_4, match_field)}
2523
2524 /* masked values are the same and there are no rewrites that do not have a
2525  * match.
2526  */
2527 #define SAME_VAL_MASK(type, valp, maskp, matchvalp, matchmaskp) ({ \
2528         type matchmaskx = *(type *)(matchmaskp); \
2529         type matchvalx = *(type *)(matchvalp); \
2530         type maskx = *(type *)(maskp); \
2531         type valx = *(type *)(valp); \
2532         \
2533         (valx & maskx) == (matchvalx & matchmaskx) && !(maskx & (maskx ^ \
2534                                                                  matchmaskx)); \
2535 })
2536
2537 static bool cmp_val_mask(void *valp, void *maskp, void *matchvalp,
2538                          void *matchmaskp, u8 bsize)
2539 {
2540         bool same = false;
2541
2542         switch (bsize) {
2543         case 8:
2544                 same = SAME_VAL_MASK(u8, valp, maskp, matchvalp, matchmaskp);
2545                 break;
2546         case 16:
2547                 same = SAME_VAL_MASK(u16, valp, maskp, matchvalp, matchmaskp);
2548                 break;
2549         case 32:
2550                 same = SAME_VAL_MASK(u32, valp, maskp, matchvalp, matchmaskp);
2551                 break;
2552         }
2553
2554         return same;
2555 }
2556
2557 static struct mlx5_fields fields[] = {
2558         OFFLOAD(DMAC_47_16, 32, U32_MAX, eth.h_dest[0], 0, dmac_47_16),
2559         OFFLOAD(DMAC_15_0,  16, U16_MAX, eth.h_dest[4], 0, dmac_15_0),
2560         OFFLOAD(SMAC_47_16, 32, U32_MAX, eth.h_source[0], 0, smac_47_16),
2561         OFFLOAD(SMAC_15_0,  16, U16_MAX, eth.h_source[4], 0, smac_15_0),
2562         OFFLOAD(ETHERTYPE,  16, U16_MAX, eth.h_proto, 0, ethertype),
2563         OFFLOAD(FIRST_VID,  16, U16_MAX, vlan.h_vlan_TCI, 0, first_vid),
2564
2565         OFFLOAD(IP_DSCP, 8,    0xfc, ip4.tos,   0, ip_dscp),
2566         OFFLOAD(IP_TTL,  8,  U8_MAX, ip4.ttl,   0, ttl_hoplimit),
2567         OFFLOAD(SIPV4,  32, U32_MAX, ip4.saddr, 0, src_ipv4_src_ipv6.ipv4_layout.ipv4),
2568         OFFLOAD(DIPV4,  32, U32_MAX, ip4.daddr, 0, dst_ipv4_dst_ipv6.ipv4_layout.ipv4),
2569
2570         OFFLOAD(SIPV6_127_96, 32, U32_MAX, ip6.saddr.s6_addr32[0], 0,
2571                 src_ipv4_src_ipv6.ipv6_layout.ipv6[0]),
2572         OFFLOAD(SIPV6_95_64,  32, U32_MAX, ip6.saddr.s6_addr32[1], 0,
2573                 src_ipv4_src_ipv6.ipv6_layout.ipv6[4]),
2574         OFFLOAD(SIPV6_63_32,  32, U32_MAX, ip6.saddr.s6_addr32[2], 0,
2575                 src_ipv4_src_ipv6.ipv6_layout.ipv6[8]),
2576         OFFLOAD(SIPV6_31_0,   32, U32_MAX, ip6.saddr.s6_addr32[3], 0,
2577                 src_ipv4_src_ipv6.ipv6_layout.ipv6[12]),
2578         OFFLOAD(DIPV6_127_96, 32, U32_MAX, ip6.daddr.s6_addr32[0], 0,
2579                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[0]),
2580         OFFLOAD(DIPV6_95_64,  32, U32_MAX, ip6.daddr.s6_addr32[1], 0,
2581                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[4]),
2582         OFFLOAD(DIPV6_63_32,  32, U32_MAX, ip6.daddr.s6_addr32[2], 0,
2583                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[8]),
2584         OFFLOAD(DIPV6_31_0,   32, U32_MAX, ip6.daddr.s6_addr32[3], 0,
2585                 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[12]),
2586         OFFLOAD(IPV6_HOPLIMIT, 8,  U8_MAX, ip6.hop_limit, 0, ttl_hoplimit),
2587         OFFLOAD(IP_DSCP, 16,  0xc00f, ip6, 0, ip_dscp),
2588
2589         OFFLOAD(TCP_SPORT, 16, U16_MAX, tcp.source,  0, tcp_sport),
2590         OFFLOAD(TCP_DPORT, 16, U16_MAX, tcp.dest,    0, tcp_dport),
2591         /* in linux iphdr tcp_flags is 8 bits long */
2592         OFFLOAD(TCP_FLAGS,  8,  U8_MAX, tcp.ack_seq, 5, tcp_flags),
2593
2594         OFFLOAD(UDP_SPORT, 16, U16_MAX, udp.source, 0, udp_sport),
2595         OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest,   0, udp_dport),
2596 };
2597
2598 static unsigned long mask_to_le(unsigned long mask, int size)
2599 {
2600         __be32 mask_be32;
2601         __be16 mask_be16;
2602
2603         if (size == 32) {
2604                 mask_be32 = (__force __be32)(mask);
2605                 mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
2606         } else if (size == 16) {
2607                 mask_be32 = (__force __be32)(mask);
2608                 mask_be16 = *(__be16 *)&mask_be32;
2609                 mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
2610         }
2611
2612         return mask;
2613 }
2614 static int offload_pedit_fields(struct mlx5e_priv *priv,
2615                                 int namespace,
2616                                 struct pedit_headers_action *hdrs,
2617                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
2618                                 u32 *action_flags,
2619                                 struct netlink_ext_ack *extack)
2620 {
2621         struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
2622         int i, action_size, first, last, next_z;
2623         void *headers_c, *headers_v, *action, *vals_p;
2624         u32 *s_masks_p, *a_masks_p, s_mask, a_mask;
2625         struct mlx5e_tc_mod_hdr_acts *mod_acts;
2626         struct mlx5_fields *f;
2627         unsigned long mask, field_mask;
2628         int err;
2629         u8 cmd;
2630
2631         mod_acts = &parse_attr->mod_hdr_acts;
2632         headers_c = get_match_headers_criteria(*action_flags, &parse_attr->spec);
2633         headers_v = get_match_headers_value(*action_flags, &parse_attr->spec);
2634
2635         set_masks = &hdrs[0].masks;
2636         add_masks = &hdrs[1].masks;
2637         set_vals = &hdrs[0].vals;
2638         add_vals = &hdrs[1].vals;
2639
2640         action_size = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);
2641
2642         for (i = 0; i < ARRAY_SIZE(fields); i++) {
2643                 bool skip;
2644
2645                 f = &fields[i];
2646                 /* avoid seeing bits set from previous iterations */
2647                 s_mask = 0;
2648                 a_mask = 0;
2649
2650                 s_masks_p = (void *)set_masks + f->offset;
2651                 a_masks_p = (void *)add_masks + f->offset;
2652
2653                 s_mask = *s_masks_p & f->field_mask;
2654                 a_mask = *a_masks_p & f->field_mask;
2655
2656                 if (!s_mask && !a_mask) /* nothing to offload here */
2657                         continue;
2658
2659                 if (s_mask && a_mask) {
2660                         NL_SET_ERR_MSG_MOD(extack,
2661                                            "can't set and add to the same HW field");
2662                         printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field);
2663                         return -EOPNOTSUPP;
2664                 }
2665
2666                 skip = false;
2667                 if (s_mask) {
2668                         void *match_mask = headers_c + f->match_offset;
2669                         void *match_val = headers_v + f->match_offset;
2670
2671                         cmd  = MLX5_ACTION_TYPE_SET;
2672                         mask = s_mask;
2673                         vals_p = (void *)set_vals + f->offset;
2674                         /* don't rewrite if we have a match on the same value */
2675                         if (cmp_val_mask(vals_p, s_masks_p, match_val,
2676                                          match_mask, f->field_bsize))
2677                                 skip = true;
2678                         /* clear to denote we consumed this field */
2679                         *s_masks_p &= ~f->field_mask;
2680                 } else {
2681                         cmd  = MLX5_ACTION_TYPE_ADD;
2682                         mask = a_mask;
2683                         vals_p = (void *)add_vals + f->offset;
2684                         /* add 0 is no change */
2685                         if ((*(u32 *)vals_p & f->field_mask) == 0)
2686                                 skip = true;
2687                         /* clear to denote we consumed this field */
2688                         *a_masks_p &= ~f->field_mask;
2689                 }
2690                 if (skip)
2691                         continue;
2692
2693                 mask = mask_to_le(mask, f->field_bsize);
2694
2695                 first = find_first_bit(&mask, f->field_bsize);
2696                 next_z = find_next_zero_bit(&mask, f->field_bsize, first);
2697                 last  = find_last_bit(&mask, f->field_bsize);
2698                 if (first < next_z && next_z < last) {
2699                         NL_SET_ERR_MSG_MOD(extack,
2700                                            "rewrite of few sub-fields isn't supported");
2701                         printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n",
2702                                mask);
2703                         return -EOPNOTSUPP;
2704                 }
2705
2706                 err = alloc_mod_hdr_actions(priv->mdev, namespace, mod_acts);
2707                 if (err) {
2708                         NL_SET_ERR_MSG_MOD(extack,
2709                                            "too many pedit actions, can't offload");
2710                         mlx5_core_warn(priv->mdev,
2711                                        "mlx5: parsed %d pedit actions, can't do more\n",
2712                                        mod_acts->num_actions);
2713                         return err;
2714                 }
2715
2716                 action = mod_acts->actions +
2717                          (mod_acts->num_actions * action_size);
2718                 MLX5_SET(set_action_in, action, action_type, cmd);
2719                 MLX5_SET(set_action_in, action, field, f->field);
2720
2721                 if (cmd == MLX5_ACTION_TYPE_SET) {
2722                         int start;
2723
2724                         field_mask = mask_to_le(f->field_mask, f->field_bsize);
2725
2726                         /* if field is bit sized it can start not from first bit */
2727                         start = find_first_bit(&field_mask, f->field_bsize);
2728
2729                         MLX5_SET(set_action_in, action, offset, first - start);
2730                         /* length is num of bits to be written, zero means length of 32 */
2731                         MLX5_SET(set_action_in, action, length, (last - first + 1));
2732                 }
2733
2734                 if (f->field_bsize == 32)
2735                         MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first);
2736                 else if (f->field_bsize == 16)
2737                         MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first);
2738                 else if (f->field_bsize == 8)
2739                         MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first);
2740
2741                 ++mod_acts->num_actions;
2742         }
2743
2744         return 0;
2745 }
2746
2747 static int mlx5e_flow_namespace_max_modify_action(struct mlx5_core_dev *mdev,
2748                                                   int namespace)
2749 {
2750         if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */
2751                 return MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, max_modify_header_actions);
2752         else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */
2753                 return MLX5_CAP_FLOWTABLE_NIC_RX(mdev, max_modify_header_actions);
2754 }
2755
2756 int alloc_mod_hdr_actions(struct mlx5_core_dev *mdev,
2757                           int namespace,
2758                           struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts)
2759 {
2760         int action_size, new_num_actions, max_hw_actions;
2761         size_t new_sz, old_sz;
2762         void *ret;
2763
2764         if (mod_hdr_acts->num_actions < mod_hdr_acts->max_actions)
2765                 return 0;
2766
2767         action_size = MLX5_UN_SZ_BYTES(set_add_copy_action_in_auto);
2768
2769         max_hw_actions = mlx5e_flow_namespace_max_modify_action(mdev,
2770                                                                 namespace);
2771         new_num_actions = min(max_hw_actions,
2772                               mod_hdr_acts->actions ?
2773                               mod_hdr_acts->max_actions * 2 : 1);
2774         if (mod_hdr_acts->max_actions == new_num_actions)
2775                 return -ENOSPC;
2776
2777         new_sz = action_size * new_num_actions;
2778         old_sz = mod_hdr_acts->max_actions * action_size;
2779         ret = krealloc(mod_hdr_acts->actions, new_sz, GFP_KERNEL);
2780         if (!ret)
2781                 return -ENOMEM;
2782
2783         memset(ret + old_sz, 0, new_sz - old_sz);
2784         mod_hdr_acts->actions = ret;
2785         mod_hdr_acts->max_actions = new_num_actions;
2786
2787         return 0;
2788 }
2789
2790 void dealloc_mod_hdr_actions(struct mlx5e_tc_mod_hdr_acts *mod_hdr_acts)
2791 {
2792         kfree(mod_hdr_acts->actions);
2793         mod_hdr_acts->actions = NULL;
2794         mod_hdr_acts->num_actions = 0;
2795         mod_hdr_acts->max_actions = 0;
2796 }
2797
2798 static const struct pedit_headers zero_masks = {};
2799
2800 static int
2801 parse_pedit_to_modify_hdr(struct mlx5e_priv *priv,
2802                           const struct flow_action_entry *act, int namespace,
2803                           struct mlx5e_tc_flow_parse_attr *parse_attr,
2804                           struct pedit_headers_action *hdrs,
2805                           struct netlink_ext_ack *extack)
2806 {
2807         u8 cmd = (act->id == FLOW_ACTION_MANGLE) ? 0 : 1;
2808         int err = -EOPNOTSUPP;
2809         u32 mask, val, offset;
2810         u8 htype;
2811
2812         htype = act->mangle.htype;
2813         err = -EOPNOTSUPP; /* can't be all optimistic */
2814
2815         if (htype == FLOW_ACT_MANGLE_UNSPEC) {
2816                 NL_SET_ERR_MSG_MOD(extack, "legacy pedit isn't offloaded");
2817                 goto out_err;
2818         }
2819
2820         if (!mlx5e_flow_namespace_max_modify_action(priv->mdev, namespace)) {
2821                 NL_SET_ERR_MSG_MOD(extack,
2822                                    "The pedit offload action is not supported");
2823                 goto out_err;
2824         }
2825
2826         mask = act->mangle.mask;
2827         val = act->mangle.val;
2828         offset = act->mangle.offset;
2829
2830         err = set_pedit_val(htype, ~mask, val, offset, &hdrs[cmd]);
2831         if (err)
2832                 goto out_err;
2833
2834         hdrs[cmd].pedits++;
2835
2836         return 0;
2837 out_err:
2838         return err;
2839 }
2840
2841 static int
2842 parse_pedit_to_reformat(struct mlx5e_priv *priv,
2843                         const struct flow_action_entry *act,
2844                         struct mlx5e_tc_flow_parse_attr *parse_attr,
2845                         struct netlink_ext_ack *extack)
2846 {
2847         u32 mask, val, offset;
2848         u32 *p;
2849
2850         if (act->id != FLOW_ACTION_MANGLE)
2851                 return -EOPNOTSUPP;
2852
2853         if (act->mangle.htype != FLOW_ACT_MANGLE_HDR_TYPE_ETH) {
2854                 NL_SET_ERR_MSG_MOD(extack, "Only Ethernet modification is supported");
2855                 return -EOPNOTSUPP;
2856         }
2857
2858         mask = ~act->mangle.mask;
2859         val = act->mangle.val;
2860         offset = act->mangle.offset;
2861         p = (u32 *)&parse_attr->eth;
2862         *(p + (offset >> 2)) |= (val & mask);
2863
2864         return 0;
2865 }
2866
2867 static int parse_tc_pedit_action(struct mlx5e_priv *priv,
2868                                  const struct flow_action_entry *act, int namespace,
2869                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2870                                  struct pedit_headers_action *hdrs,
2871                                  struct mlx5e_tc_flow *flow,
2872                                  struct netlink_ext_ack *extack)
2873 {
2874         if (flow && flow_flag_test(flow, L3_TO_L2_DECAP))
2875                 return parse_pedit_to_reformat(priv, act, parse_attr, extack);
2876
2877         return parse_pedit_to_modify_hdr(priv, act, namespace,
2878                                          parse_attr, hdrs, extack);
2879 }
2880
2881 static int alloc_tc_pedit_action(struct mlx5e_priv *priv, int namespace,
2882                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
2883                                  struct pedit_headers_action *hdrs,
2884                                  u32 *action_flags,
2885                                  struct netlink_ext_ack *extack)
2886 {
2887         struct pedit_headers *cmd_masks;
2888         int err;
2889         u8 cmd;
2890
2891         err = offload_pedit_fields(priv, namespace, hdrs, parse_attr,
2892                                    action_flags, extack);
2893         if (err < 0)
2894                 goto out_dealloc_parsed_actions;
2895
2896         for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) {
2897                 cmd_masks = &hdrs[cmd].masks;
2898                 if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) {
2899                         NL_SET_ERR_MSG_MOD(extack,
2900                                            "attempt to offload an unsupported field");
2901                         netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd);
2902                         print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS,
2903                                        16, 1, cmd_masks, sizeof(zero_masks), true);
2904                         err = -EOPNOTSUPP;
2905                         goto out_dealloc_parsed_actions;
2906                 }
2907         }
2908
2909         return 0;
2910
2911 out_dealloc_parsed_actions:
2912         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
2913         return err;
2914 }
2915
2916 static bool csum_offload_supported(struct mlx5e_priv *priv,
2917                                    u32 action,
2918                                    u32 update_flags,
2919                                    struct netlink_ext_ack *extack)
2920 {
2921         u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP |
2922                          TCA_CSUM_UPDATE_FLAG_UDP;
2923
2924         /*  The HW recalcs checksums only if re-writing headers */
2925         if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) {
2926                 NL_SET_ERR_MSG_MOD(extack,
2927                                    "TC csum action is only offloaded with pedit");
2928                 netdev_warn(priv->netdev,
2929                             "TC csum action is only offloaded with pedit\n");
2930                 return false;
2931         }
2932
2933         if (update_flags & ~prot_flags) {
2934                 NL_SET_ERR_MSG_MOD(extack,
2935                                    "can't offload TC csum action for some header/s");
2936                 netdev_warn(priv->netdev,
2937                             "can't offload TC csum action for some header/s - flags %#x\n",
2938                             update_flags);
2939                 return false;
2940         }
2941
2942         return true;
2943 }
2944
2945 struct ip_ttl_word {
2946         __u8    ttl;
2947         __u8    protocol;
2948         __sum16 check;
2949 };
2950
2951 struct ipv6_hoplimit_word {
2952         __be16  payload_len;
2953         __u8    nexthdr;
2954         __u8    hop_limit;
2955 };
2956
2957 static int is_action_keys_supported(const struct flow_action_entry *act,
2958                                     bool ct_flow, bool *modify_ip_header,
2959                                     bool *modify_tuple,
2960                                     struct netlink_ext_ack *extack)
2961 {
2962         u32 mask, offset;
2963         u8 htype;
2964
2965         htype = act->mangle.htype;
2966         offset = act->mangle.offset;
2967         mask = ~act->mangle.mask;
2968         /* For IPv4 & IPv6 header check 4 byte word,
2969          * to determine that modified fields
2970          * are NOT ttl & hop_limit only.
2971          */
2972         if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP4) {
2973                 struct ip_ttl_word *ttl_word =
2974                         (struct ip_ttl_word *)&mask;
2975
2976                 if (offset != offsetof(struct iphdr, ttl) ||
2977                     ttl_word->protocol ||
2978                     ttl_word->check) {
2979                         *modify_ip_header = true;
2980                 }
2981
2982                 if (offset >= offsetof(struct iphdr, saddr))
2983                         *modify_tuple = true;
2984
2985                 if (ct_flow && *modify_tuple) {
2986                         NL_SET_ERR_MSG_MOD(extack,
2987                                            "can't offload re-write of ipv4 address with action ct");
2988                         return -EOPNOTSUPP;
2989                 }
2990         } else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_IP6) {
2991                 struct ipv6_hoplimit_word *hoplimit_word =
2992                         (struct ipv6_hoplimit_word *)&mask;
2993
2994                 if (offset != offsetof(struct ipv6hdr, payload_len) ||
2995                     hoplimit_word->payload_len ||
2996                     hoplimit_word->nexthdr) {
2997                         *modify_ip_header = true;
2998                 }
2999
3000                 if (ct_flow && offset >= offsetof(struct ipv6hdr, saddr))
3001                         *modify_tuple = true;
3002
3003                 if (ct_flow && *modify_tuple) {
3004                         NL_SET_ERR_MSG_MOD(extack,
3005                                            "can't offload re-write of ipv6 address with action ct");
3006                         return -EOPNOTSUPP;
3007                 }
3008         } else if (htype == FLOW_ACT_MANGLE_HDR_TYPE_TCP ||
3009                    htype == FLOW_ACT_MANGLE_HDR_TYPE_UDP) {
3010                 *modify_tuple = true;
3011                 if (ct_flow) {
3012                         NL_SET_ERR_MSG_MOD(extack,
3013                                            "can't offload re-write of transport header ports with action ct");
3014                         return -EOPNOTSUPP;
3015                 }
3016         }
3017
3018         return 0;
3019 }
3020
3021 static bool modify_tuple_supported(bool modify_tuple, bool ct_clear,
3022                                    bool ct_flow, struct netlink_ext_ack *extack,
3023                                    struct mlx5e_priv *priv,
3024                                    struct mlx5_flow_spec *spec)
3025 {
3026         if (!modify_tuple || ct_clear)
3027                 return true;
3028
3029         if (ct_flow) {
3030                 NL_SET_ERR_MSG_MOD(extack,
3031                                    "can't offload tuple modification with non-clear ct()");
3032                 netdev_info(priv->netdev,
3033                             "can't offload tuple modification with non-clear ct()");
3034                 return false;
3035         }
3036
3037         /* Add ct_state=-trk match so it will be offloaded for non ct flows
3038          * (or after clear action), as otherwise, since the tuple is changed,
3039          * we can't restore ct state
3040          */
3041         if (mlx5_tc_ct_add_no_trk_match(spec)) {
3042                 NL_SET_ERR_MSG_MOD(extack,
3043                                    "can't offload tuple modification with ct matches and no ct(clear) action");
3044                 netdev_info(priv->netdev,
3045                             "can't offload tuple modification with ct matches and no ct(clear) action");
3046                 return false;
3047         }
3048
3049         return true;
3050 }
3051
3052 static bool modify_header_match_supported(struct mlx5e_priv *priv,
3053                                           struct mlx5_flow_spec *spec,
3054                                           struct flow_action *flow_action,
3055                                           u32 actions, bool ct_flow,
3056                                           bool ct_clear,
3057                                           struct netlink_ext_ack *extack)
3058 {
3059         const struct flow_action_entry *act;
3060         bool modify_ip_header, modify_tuple;
3061         void *headers_c;
3062         void *headers_v;
3063         u16 ethertype;
3064         u8 ip_proto;
3065         int i, err;
3066
3067         headers_c = get_match_headers_criteria(actions, spec);
3068         headers_v = get_match_headers_value(actions, spec);
3069         ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype);
3070
3071         /* for non-IP we only re-write MACs, so we're okay */
3072         if (MLX5_GET(fte_match_set_lyr_2_4, headers_c, ip_version) == 0 &&
3073             ethertype != ETH_P_IP && ethertype != ETH_P_IPV6)
3074                 goto out_ok;
3075
3076         modify_ip_header = false;
3077         modify_tuple = false;
3078         flow_action_for_each(i, act, flow_action) {
3079                 if (act->id != FLOW_ACTION_MANGLE &&
3080                     act->id != FLOW_ACTION_ADD)
3081                         continue;
3082
3083                 err = is_action_keys_supported(act, ct_flow,
3084                                                &modify_ip_header,
3085                                                &modify_tuple, extack);
3086                 if (err)
3087                         return err;
3088         }
3089
3090         if (!modify_tuple_supported(modify_tuple, ct_clear, ct_flow, extack,
3091                                     priv, spec))
3092                 return false;
3093
3094         ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol);
3095         if (modify_ip_header && ip_proto != IPPROTO_TCP &&
3096             ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) {
3097                 NL_SET_ERR_MSG_MOD(extack,
3098                                    "can't offload re-write of non TCP/UDP");
3099                 netdev_info(priv->netdev, "can't offload re-write of ip proto %d\n",
3100                             ip_proto);
3101                 return false;
3102         }
3103
3104 out_ok:
3105         return true;
3106 }
3107
3108 static bool actions_match_supported(struct mlx5e_priv *priv,
3109                                     struct flow_action *flow_action,
3110                                     struct mlx5e_tc_flow_parse_attr *parse_attr,
3111                                     struct mlx5e_tc_flow *flow,
3112                                     struct netlink_ext_ack *extack)
3113 {
3114         bool ct_flow = false, ct_clear = false;
3115         u32 actions;
3116
3117         ct_clear = flow->attr->ct_attr.ct_action &
3118                 TCA_CT_ACT_CLEAR;
3119         ct_flow = flow_flag_test(flow, CT) && !ct_clear;
3120         actions = flow->attr->action;
3121
3122         if (mlx5e_is_eswitch_flow(flow)) {
3123                 if (flow->attr->esw_attr->split_count && ct_flow &&
3124                     !MLX5_CAP_GEN(flow->attr->esw_attr->in_mdev, reg_c_preserve)) {
3125                         /* All registers used by ct are cleared when using
3126                          * split rules.
3127                          */
3128                         NL_SET_ERR_MSG_MOD(extack,
3129                                            "Can't offload mirroring with action ct");
3130                         return false;
3131                 }
3132         }
3133
3134         if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
3135                 return modify_header_match_supported(priv, &parse_attr->spec,
3136                                                      flow_action, actions,
3137                                                      ct_flow, ct_clear,
3138                                                      extack);
3139
3140         return true;
3141 }
3142
3143 static bool same_port_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3144 {
3145         return priv->mdev == peer_priv->mdev;
3146 }
3147
3148 static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv)
3149 {
3150         struct mlx5_core_dev *fmdev, *pmdev;
3151         u64 fsystem_guid, psystem_guid;
3152
3153         fmdev = priv->mdev;
3154         pmdev = peer_priv->mdev;
3155
3156         fsystem_guid = mlx5_query_nic_system_image_guid(fmdev);
3157         psystem_guid = mlx5_query_nic_system_image_guid(pmdev);
3158
3159         return (fsystem_guid == psystem_guid);
3160 }
3161
3162 static bool same_vf_reps(struct mlx5e_priv *priv,
3163                          struct net_device *out_dev)
3164 {
3165         return mlx5e_eswitch_vf_rep(priv->netdev) &&
3166                priv->netdev == out_dev;
3167 }
3168
3169 static int add_vlan_rewrite_action(struct mlx5e_priv *priv, int namespace,
3170                                    const struct flow_action_entry *act,
3171                                    struct mlx5e_tc_flow_parse_attr *parse_attr,
3172                                    struct pedit_headers_action *hdrs,
3173                                    u32 *action, struct netlink_ext_ack *extack)
3174 {
3175         u16 mask16 = VLAN_VID_MASK;
3176         u16 val16 = act->vlan.vid & VLAN_VID_MASK;
3177         const struct flow_action_entry pedit_act = {
3178                 .id = FLOW_ACTION_MANGLE,
3179                 .mangle.htype = FLOW_ACT_MANGLE_HDR_TYPE_ETH,
3180                 .mangle.offset = offsetof(struct vlan_ethhdr, h_vlan_TCI),
3181                 .mangle.mask = ~(u32)be16_to_cpu(*(__be16 *)&mask16),
3182                 .mangle.val = (u32)be16_to_cpu(*(__be16 *)&val16),
3183         };
3184         u8 match_prio_mask, match_prio_val;
3185         void *headers_c, *headers_v;
3186         int err;
3187
3188         headers_c = get_match_headers_criteria(*action, &parse_attr->spec);
3189         headers_v = get_match_headers_value(*action, &parse_attr->spec);
3190
3191         if (!(MLX5_GET(fte_match_set_lyr_2_4, headers_c, cvlan_tag) &&
3192               MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag))) {
3193                 NL_SET_ERR_MSG_MOD(extack,
3194                                    "VLAN rewrite action must have VLAN protocol match");
3195                 return -EOPNOTSUPP;
3196         }
3197
3198         match_prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio);
3199         match_prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio);
3200         if (act->vlan.prio != (match_prio_val & match_prio_mask)) {
3201                 NL_SET_ERR_MSG_MOD(extack,
3202                                    "Changing VLAN prio is not supported");
3203                 return -EOPNOTSUPP;
3204         }
3205
3206         err = parse_tc_pedit_action(priv, &pedit_act, namespace, parse_attr, hdrs, NULL, extack);
3207         *action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3208
3209         return err;
3210 }
3211
3212 static int
3213 add_vlan_prio_tag_rewrite_action(struct mlx5e_priv *priv,
3214                                  struct mlx5e_tc_flow_parse_attr *parse_attr,
3215                                  struct pedit_headers_action *hdrs,
3216                                  u32 *action, struct netlink_ext_ack *extack)
3217 {
3218         const struct flow_action_entry prio_tag_act = {
3219                 .vlan.vid = 0,
3220                 .vlan.prio =
3221                         MLX5_GET(fte_match_set_lyr_2_4,
3222                                  get_match_headers_value(*action,
3223                                                          &parse_attr->spec),
3224                                  first_prio) &
3225                         MLX5_GET(fte_match_set_lyr_2_4,
3226                                  get_match_headers_criteria(*action,
3227                                                             &parse_attr->spec),
3228                                  first_prio),
3229         };
3230
3231         return add_vlan_rewrite_action(priv, MLX5_FLOW_NAMESPACE_FDB,
3232                                        &prio_tag_act, parse_attr, hdrs, action,
3233                                        extack);
3234 }
3235
3236 static int validate_goto_chain(struct mlx5e_priv *priv,
3237                                struct mlx5e_tc_flow *flow,
3238                                const struct flow_action_entry *act,
3239                                u32 actions,
3240                                struct netlink_ext_ack *extack)
3241 {
3242         bool is_esw = mlx5e_is_eswitch_flow(flow);
3243         struct mlx5_flow_attr *attr = flow->attr;
3244         bool ft_flow = mlx5e_is_ft_flow(flow);
3245         u32 dest_chain = act->chain_index;
3246         struct mlx5_fs_chains *chains;
3247         struct mlx5_eswitch *esw;
3248         u32 reformat_and_fwd;
3249         u32 max_chain;
3250
3251         esw = priv->mdev->priv.eswitch;
3252         chains = is_esw ? esw_chains(esw) : nic_chains(priv);
3253         max_chain = mlx5_chains_get_chain_range(chains);
3254         reformat_and_fwd = is_esw ?
3255                            MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, reformat_and_fwd_to_table) :
3256                            MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, reformat_and_fwd_to_table);
3257
3258         if (ft_flow) {
3259                 NL_SET_ERR_MSG_MOD(extack, "Goto action is not supported");
3260                 return -EOPNOTSUPP;
3261         }
3262
3263         if (!mlx5_chains_backwards_supported(chains) &&
3264             dest_chain <= attr->chain) {
3265                 NL_SET_ERR_MSG_MOD(extack,
3266                                    "Goto lower numbered chain isn't supported");
3267                 return -EOPNOTSUPP;
3268         }
3269
3270         if (dest_chain > max_chain) {
3271                 NL_SET_ERR_MSG_MOD(extack,
3272                                    "Requested destination chain is out of supported range");
3273                 return -EOPNOTSUPP;
3274         }
3275
3276         if (actions & (MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT |
3277                        MLX5_FLOW_CONTEXT_ACTION_DECAP) &&
3278             !reformat_and_fwd) {
3279                 NL_SET_ERR_MSG_MOD(extack,
3280                                    "Goto chain is not allowed if action has reformat or decap");
3281                 return -EOPNOTSUPP;
3282         }
3283
3284         return 0;
3285 }
3286
3287 static int parse_tc_nic_actions(struct mlx5e_priv *priv,
3288                                 struct flow_action *flow_action,
3289                                 struct mlx5e_tc_flow_parse_attr *parse_attr,
3290                                 struct mlx5e_tc_flow *flow,
3291                                 struct netlink_ext_ack *extack)
3292 {
3293         struct mlx5_flow_attr *attr = flow->attr;
3294         struct pedit_headers_action hdrs[2] = {};
3295         const struct flow_action_entry *act;
3296         struct mlx5_nic_flow_attr *nic_attr;
3297         u32 action = 0;
3298         int err, i;
3299
3300         if (!flow_action_has_entries(flow_action))
3301                 return -EINVAL;
3302
3303         if (!flow_action_hw_stats_check(flow_action, extack,
3304                                         FLOW_ACTION_HW_STATS_DELAYED_BIT))
3305                 return -EOPNOTSUPP;
3306
3307         nic_attr = attr->nic_attr;
3308
3309         nic_attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG;
3310
3311         flow_action_for_each(i, act, flow_action) {
3312                 switch (act->id) {
3313                 case FLOW_ACTION_ACCEPT:
3314                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3315                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
3316                         break;
3317                 case FLOW_ACTION_DROP:
3318                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP;
3319                         if (MLX5_CAP_FLOWTABLE(priv->mdev,
3320                                                flow_table_properties_nic_receive.flow_counter))
3321                                 action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3322                         break;
3323                 case FLOW_ACTION_MANGLE:
3324                 case FLOW_ACTION_ADD:
3325                         err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_KERNEL,
3326                                                     parse_attr, hdrs, NULL, extack);
3327                         if (err)
3328                                 return err;
3329
3330                         action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3331                         break;
3332                 case FLOW_ACTION_VLAN_MANGLE:
3333                         err = add_vlan_rewrite_action(priv,
3334                                                       MLX5_FLOW_NAMESPACE_KERNEL,
3335                                                       act, parse_attr, hdrs,
3336                                                       &action, extack);
3337                         if (err)
3338                                 return err;
3339
3340                         break;
3341                 case FLOW_ACTION_CSUM:
3342                         if (csum_offload_supported(priv, action,
3343                                                    act->csum_flags,
3344                                                    extack))
3345                                 break;
3346
3347                         return -EOPNOTSUPP;
3348                 case FLOW_ACTION_REDIRECT: {
3349                         struct net_device *peer_dev = act->dev;
3350
3351                         if (priv->netdev->netdev_ops == peer_dev->netdev_ops &&
3352                             same_hw_devs(priv, netdev_priv(peer_dev))) {
3353                                 parse_attr->mirred_ifindex[0] = peer_dev->ifindex;
3354                                 flow_flag_set(flow, HAIRPIN);
3355                                 action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3356                                           MLX5_FLOW_CONTEXT_ACTION_COUNT;
3357                         } else {
3358                                 NL_SET_ERR_MSG_MOD(extack,
3359                                                    "device is not on same HW, can't offload");
3360                                 netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n",
3361                                             peer_dev->name);
3362                                 return -EINVAL;
3363                         }
3364                         }
3365                         break;
3366                 case FLOW_ACTION_MARK: {
3367                         u32 mark = act->mark;
3368
3369                         if (mark & ~MLX5E_TC_FLOW_ID_MASK) {
3370                                 NL_SET_ERR_MSG_MOD(extack,
3371                                                    "Bad flow mark - only 16 bit is supported");
3372                                 return -EINVAL;
3373                         }
3374
3375                         nic_attr->flow_tag = mark;
3376                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3377                         }
3378                         break;
3379                 case FLOW_ACTION_GOTO:
3380                         err = validate_goto_chain(priv, flow, act, action,
3381                                                   extack);
3382                         if (err)
3383                                 return err;
3384
3385                         action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3386                         attr->dest_chain = act->chain_index;
3387                         break;
3388                 case FLOW_ACTION_CT:
3389                         err = mlx5_tc_ct_parse_action(get_ct_priv(priv), attr, act, extack);
3390                         if (err)
3391                                 return err;
3392
3393                         flow_flag_set(flow, CT);
3394                         break;
3395                 default:
3396                         NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
3397                         return -EOPNOTSUPP;
3398                 }
3399         }
3400
3401         if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
3402             hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
3403                 err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_KERNEL,
3404                                             parse_attr, hdrs, &action, extack);
3405                 if (err)
3406                         return err;
3407                 /* in case all pedit actions are skipped, remove the MOD_HDR
3408                  * flag.
3409                  */
3410                 if (parse_attr->mod_hdr_acts.num_actions == 0) {
3411                         action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3412                         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
3413                 }
3414         }
3415
3416         attr->action = action;
3417
3418         if (attr->dest_chain) {
3419                 if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
3420                         NL_SET_ERR_MSG(extack, "Mirroring goto chain rules isn't supported");
3421                         return -EOPNOTSUPP;
3422                 }
3423                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3424         }
3425
3426         if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
3427                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
3428
3429         if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
3430                 return -EOPNOTSUPP;
3431
3432         return 0;
3433 }
3434
3435 static bool is_merged_eswitch_vfs(struct mlx5e_priv *priv,
3436                                   struct net_device *peer_netdev)
3437 {
3438         struct mlx5e_priv *peer_priv;
3439
3440         peer_priv = netdev_priv(peer_netdev);
3441
3442         return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) &&
3443                 mlx5e_eswitch_vf_rep(priv->netdev) &&
3444                 mlx5e_eswitch_vf_rep(peer_netdev) &&
3445                 same_hw_devs(priv, peer_priv));
3446 }
3447
3448 static int parse_tc_vlan_action(struct mlx5e_priv *priv,
3449                                 const struct flow_action_entry *act,
3450                                 struct mlx5_esw_flow_attr *attr,
3451                                 u32 *action)
3452 {
3453         u8 vlan_idx = attr->total_vlan;
3454
3455         if (vlan_idx >= MLX5_FS_VLAN_DEPTH)
3456                 return -EOPNOTSUPP;
3457
3458         switch (act->id) {
3459         case FLOW_ACTION_VLAN_POP:
3460                 if (vlan_idx) {
3461                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
3462                                                                  MLX5_FS_VLAN_DEPTH))
3463                                 return -EOPNOTSUPP;
3464
3465                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2;
3466                 } else {
3467                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3468                 }
3469                 break;
3470         case FLOW_ACTION_VLAN_PUSH:
3471                 attr->vlan_vid[vlan_idx] = act->vlan.vid;
3472                 attr->vlan_prio[vlan_idx] = act->vlan.prio;
3473                 attr->vlan_proto[vlan_idx] = act->vlan.proto;
3474                 if (!attr->vlan_proto[vlan_idx])
3475                         attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q);
3476
3477                 if (vlan_idx) {
3478                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev,
3479                                                                  MLX5_FS_VLAN_DEPTH))
3480                                 return -EOPNOTSUPP;
3481
3482                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2;
3483                 } else {
3484                         if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) &&
3485                             (act->vlan.proto != htons(ETH_P_8021Q) ||
3486                              act->vlan.prio))
3487                                 return -EOPNOTSUPP;
3488
3489                         *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH;
3490                 }
3491                 break;
3492         default:
3493                 return -EINVAL;
3494         }
3495
3496         attr->total_vlan = vlan_idx + 1;
3497
3498         return 0;
3499 }
3500
3501 static struct net_device *get_fdb_out_dev(struct net_device *uplink_dev,
3502                                           struct net_device *out_dev)
3503 {
3504         struct net_device *fdb_out_dev = out_dev;
3505         struct net_device *uplink_upper;
3506
3507         rcu_read_lock();
3508         uplink_upper = netdev_master_upper_dev_get_rcu(uplink_dev);
3509         if (uplink_upper && netif_is_lag_master(uplink_upper) &&
3510             uplink_upper == out_dev) {
3511                 fdb_out_dev = uplink_dev;
3512         } else if (netif_is_lag_master(out_dev)) {
3513                 fdb_out_dev = bond_option_active_slave_get_rcu(netdev_priv(out_dev));
3514                 if (fdb_out_dev &&
3515                     (!mlx5e_eswitch_rep(fdb_out_dev) ||
3516                      !netdev_port_same_parent_id(fdb_out_dev, uplink_dev)))
3517                         fdb_out_dev = NULL;
3518         }
3519         rcu_read_unlock();
3520         return fdb_out_dev;
3521 }
3522
3523 static int add_vlan_push_action(struct mlx5e_priv *priv,
3524                                 struct mlx5_flow_attr *attr,
3525                                 struct net_device **out_dev,
3526                                 u32 *action)
3527 {
3528         struct net_device *vlan_dev = *out_dev;
3529         struct flow_action_entry vlan_act = {
3530                 .id = FLOW_ACTION_VLAN_PUSH,
3531                 .vlan.vid = vlan_dev_vlan_id(vlan_dev),
3532                 .vlan.proto = vlan_dev_vlan_proto(vlan_dev),
3533                 .vlan.prio = 0,
3534         };
3535         int err;
3536
3537         err = parse_tc_vlan_action(priv, &vlan_act, attr->esw_attr, action);
3538         if (err)
3539                 return err;
3540
3541         rcu_read_lock();
3542         *out_dev = dev_get_by_index_rcu(dev_net(vlan_dev), dev_get_iflink(vlan_dev));
3543         rcu_read_unlock();
3544         if (!*out_dev)
3545                 return -ENODEV;
3546
3547         if (is_vlan_dev(*out_dev))
3548                 err = add_vlan_push_action(priv, attr, out_dev, action);
3549
3550         return err;
3551 }
3552
3553 static int add_vlan_pop_action(struct mlx5e_priv *priv,
3554                                struct mlx5_flow_attr *attr,
3555                                u32 *action)
3556 {
3557         struct flow_action_entry vlan_act = {
3558                 .id = FLOW_ACTION_VLAN_POP,
3559         };
3560         int nest_level, err = 0;
3561
3562         nest_level = attr->parse_attr->filter_dev->lower_level -
3563                                                 priv->netdev->lower_level;
3564         while (nest_level--) {
3565                 err = parse_tc_vlan_action(priv, &vlan_act, attr->esw_attr, action);
3566                 if (err)
3567                         return err;
3568         }
3569
3570         return err;
3571 }
3572
3573 static bool same_hw_reps(struct mlx5e_priv *priv,
3574                          struct net_device *peer_netdev)
3575 {
3576         struct mlx5e_priv *peer_priv;
3577
3578         peer_priv = netdev_priv(peer_netdev);
3579
3580         return mlx5e_eswitch_rep(priv->netdev) &&
3581                mlx5e_eswitch_rep(peer_netdev) &&
3582                same_hw_devs(priv, peer_priv);
3583 }
3584
3585 static bool is_lag_dev(struct mlx5e_priv *priv,
3586                        struct net_device *peer_netdev)
3587 {
3588         return ((mlx5_lag_is_sriov(priv->mdev) ||
3589                  mlx5_lag_is_multipath(priv->mdev)) &&
3590                  same_hw_reps(priv, peer_netdev));
3591 }
3592
3593 bool mlx5e_is_valid_eswitch_fwd_dev(struct mlx5e_priv *priv,
3594                                     struct net_device *out_dev)
3595 {
3596         if (is_merged_eswitch_vfs(priv, out_dev))
3597                 return true;
3598
3599         if (is_lag_dev(priv, out_dev))
3600                 return true;
3601
3602         return mlx5e_eswitch_rep(out_dev) &&
3603                same_port_devs(priv, netdev_priv(out_dev));
3604 }
3605
3606 static bool is_duplicated_output_device(struct net_device *dev,
3607                                         struct net_device *out_dev,
3608                                         int *ifindexes, int if_count,
3609                                         struct netlink_ext_ack *extack)
3610 {
3611         int i;
3612
3613         for (i = 0; i < if_count; i++) {
3614                 if (ifindexes[i] == out_dev->ifindex) {
3615                         NL_SET_ERR_MSG_MOD(extack,
3616                                            "can't duplicate output to same device");
3617                         netdev_err(dev, "can't duplicate output to same device: %s\n",
3618                                    out_dev->name);
3619                         return true;
3620                 }
3621         }
3622
3623         return false;
3624 }
3625
3626 static int verify_uplink_forwarding(struct mlx5e_priv *priv,
3627                                     struct mlx5e_tc_flow *flow,
3628                                     struct net_device *out_dev,
3629                                     struct netlink_ext_ack *extack)
3630 {
3631         struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
3632         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3633         struct mlx5e_rep_priv *rep_priv;
3634
3635         /* Forwarding non encapsulated traffic between
3636          * uplink ports is allowed only if
3637          * termination_table_raw_traffic cap is set.
3638          *
3639          * Input vport was stored attr->in_rep.
3640          * In LAG case, *priv* is the private data of
3641          * uplink which may be not the input vport.
3642          */
3643         rep_priv = mlx5e_rep_to_rep_priv(attr->in_rep);
3644
3645         if (!(mlx5e_eswitch_uplink_rep(rep_priv->netdev) &&
3646               mlx5e_eswitch_uplink_rep(out_dev)))
3647                 return 0;
3648
3649         if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev,
3650                                         termination_table_raw_traffic)) {
3651                 NL_SET_ERR_MSG_MOD(extack,
3652                                    "devices are both uplink, can't offload forwarding");
3653                         pr_err("devices %s %s are both uplink, can't offload forwarding\n",
3654                                priv->netdev->name, out_dev->name);
3655                         return -EOPNOTSUPP;
3656         } else if (out_dev != rep_priv->netdev) {
3657                 NL_SET_ERR_MSG_MOD(extack,
3658                                    "devices are not the same uplink, can't offload forwarding");
3659                 pr_err("devices %s %s are both uplink but not the same, can't offload forwarding\n",
3660                        priv->netdev->name, out_dev->name);
3661                 return -EOPNOTSUPP;
3662         }
3663         return 0;
3664 }
3665
3666 static int parse_tc_fdb_actions(struct mlx5e_priv *priv,
3667                                 struct flow_action *flow_action,
3668                                 struct mlx5e_tc_flow *flow,
3669                                 struct netlink_ext_ack *extack,
3670                                 struct net_device *filter_dev)
3671 {
3672         struct pedit_headers_action hdrs[2] = {};
3673         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3674         struct mlx5e_tc_flow_parse_attr *parse_attr;
3675         struct mlx5e_rep_priv *rpriv = priv->ppriv;
3676         const struct ip_tunnel_info *info = NULL;
3677         struct mlx5_flow_attr *attr = flow->attr;
3678         int ifindexes[MLX5_MAX_FLOW_FWD_VPORTS];
3679         bool ft_flow = mlx5e_is_ft_flow(flow);
3680         const struct flow_action_entry *act;
3681         struct mlx5_esw_flow_attr *esw_attr;
3682         struct mlx5_sample_attr sample = {};
3683         bool encap = false, decap = false;
3684         u32 action = attr->action;
3685         int err, i, if_count = 0;
3686         bool mpls_push = false;
3687
3688         if (!flow_action_has_entries(flow_action))
3689                 return -EINVAL;
3690
3691         if (!flow_action_hw_stats_check(flow_action, extack,
3692                                         FLOW_ACTION_HW_STATS_DELAYED_BIT))
3693                 return -EOPNOTSUPP;
3694
3695         esw_attr = attr->esw_attr;
3696         parse_attr = attr->parse_attr;
3697
3698         flow_action_for_each(i, act, flow_action) {
3699                 switch (act->id) {
3700                 case FLOW_ACTION_DROP:
3701                         action |= MLX5_FLOW_CONTEXT_ACTION_DROP |
3702                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
3703                         break;
3704                 case FLOW_ACTION_TRAP:
3705                         if (!flow_offload_has_one_action(flow_action)) {
3706                                 NL_SET_ERR_MSG_MOD(extack,
3707                                                    "action trap is supported as a sole action only");
3708                                 return -EOPNOTSUPP;
3709                         }
3710                         action |= (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3711                                    MLX5_FLOW_CONTEXT_ACTION_COUNT);
3712                         attr->flags |= MLX5_ESW_ATTR_FLAG_SLOW_PATH;
3713                         break;
3714                 case FLOW_ACTION_MPLS_PUSH:
3715                         if (!MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
3716                                                         reformat_l2_to_l3_tunnel) ||
3717                             act->mpls_push.proto != htons(ETH_P_MPLS_UC)) {
3718                                 NL_SET_ERR_MSG_MOD(extack,
3719                                                    "mpls push is supported only for mpls_uc protocol");
3720                                 return -EOPNOTSUPP;
3721                         }
3722                         mpls_push = true;
3723                         break;
3724                 case FLOW_ACTION_MPLS_POP:
3725                         /* we only support mpls pop if it is the first action
3726                          * and the filter net device is bareudp. Subsequent
3727                          * actions can be pedit and the last can be mirred
3728                          * egress redirect.
3729                          */
3730                         if (i) {
3731                                 NL_SET_ERR_MSG_MOD(extack,
3732                                                    "mpls pop supported only as first action");
3733                                 return -EOPNOTSUPP;
3734                         }
3735                         if (!netif_is_bareudp(filter_dev)) {
3736                                 NL_SET_ERR_MSG_MOD(extack,
3737                                                    "mpls pop supported only on bareudp devices");
3738                                 return -EOPNOTSUPP;
3739                         }
3740
3741                         parse_attr->eth.h_proto = act->mpls_pop.proto;
3742                         action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT;
3743                         flow_flag_set(flow, L3_TO_L2_DECAP);
3744                         break;
3745                 case FLOW_ACTION_MANGLE:
3746                 case FLOW_ACTION_ADD:
3747                         err = parse_tc_pedit_action(priv, act, MLX5_FLOW_NAMESPACE_FDB,
3748                                                     parse_attr, hdrs, flow, extack);
3749                         if (err)
3750                                 return err;
3751
3752                         if (!flow_flag_test(flow, L3_TO_L2_DECAP)) {
3753                                 action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3754                                 esw_attr->split_count = esw_attr->out_count;
3755                         }
3756                         break;
3757                 case FLOW_ACTION_CSUM:
3758                         if (csum_offload_supported(priv, action,
3759                                                    act->csum_flags, extack))
3760                                 break;
3761
3762                         return -EOPNOTSUPP;
3763                 case FLOW_ACTION_REDIRECT:
3764                 case FLOW_ACTION_MIRRED: {
3765                         struct mlx5e_priv *out_priv;
3766                         struct net_device *out_dev;
3767
3768                         out_dev = act->dev;
3769                         if (!out_dev) {
3770                                 /* out_dev is NULL when filters with
3771                                  * non-existing mirred device are replayed to
3772                                  * the driver.
3773                                  */
3774                                 return -EINVAL;
3775                         }
3776
3777                         if (mpls_push && !netif_is_bareudp(out_dev)) {
3778                                 NL_SET_ERR_MSG_MOD(extack,
3779                                                    "mpls is supported only through a bareudp device");
3780                                 return -EOPNOTSUPP;
3781                         }
3782
3783                         if (ft_flow && out_dev == priv->netdev) {
3784                                 /* Ignore forward to self rules generated
3785                                  * by adding both mlx5 devs to the flow table
3786                                  * block on a normal nft offload setup.
3787                                  */
3788                                 return -EOPNOTSUPP;
3789                         }
3790
3791                         if (esw_attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) {
3792                                 NL_SET_ERR_MSG_MOD(extack,
3793                                                    "can't support more output ports, can't offload forwarding");
3794                                 netdev_warn(priv->netdev,
3795                                             "can't support more than %d output ports, can't offload forwarding\n",
3796                                             esw_attr->out_count);
3797                                 return -EOPNOTSUPP;
3798                         }
3799
3800                         action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST |
3801                                   MLX5_FLOW_CONTEXT_ACTION_COUNT;
3802                         if (encap) {
3803                                 parse_attr->mirred_ifindex[esw_attr->out_count] =
3804                                         out_dev->ifindex;
3805                                 parse_attr->tun_info[esw_attr->out_count] =
3806                                         mlx5e_dup_tun_info(info);
3807                                 if (!parse_attr->tun_info[esw_attr->out_count])
3808                                         return -ENOMEM;
3809                                 encap = false;
3810                                 esw_attr->dests[esw_attr->out_count].flags |=
3811                                         MLX5_ESW_DEST_ENCAP;
3812                                 esw_attr->out_count++;
3813                                 /* attr->dests[].rep is resolved when we
3814                                  * handle encap
3815                                  */
3816                         } else if (netdev_port_same_parent_id(priv->netdev, out_dev)) {
3817                                 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
3818                                 struct net_device *uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH);
3819
3820                                 if (is_duplicated_output_device(priv->netdev,
3821                                                                 out_dev,
3822                                                                 ifindexes,
3823                                                                 if_count,
3824                                                                 extack))
3825                                         return -EOPNOTSUPP;
3826
3827                                 ifindexes[if_count] = out_dev->ifindex;
3828                                 if_count++;
3829
3830                                 out_dev = get_fdb_out_dev(uplink_dev, out_dev);
3831                                 if (!out_dev)
3832                                         return -ENODEV;
3833
3834                                 if (is_vlan_dev(out_dev)) {
3835                                         err = add_vlan_push_action(priv, attr,
3836                                                                    &out_dev,
3837                                                                    &action);
3838                                         if (err)
3839                                                 return err;
3840                                 }
3841
3842                                 if (is_vlan_dev(parse_attr->filter_dev)) {
3843                                         err = add_vlan_pop_action(priv, attr,
3844                                                                   &action);
3845                                         if (err)
3846                                                 return err;
3847                                 }
3848
3849                                 err = verify_uplink_forwarding(priv, flow, out_dev, extack);
3850                                 if (err)
3851                                         return err;
3852
3853                                 if (!mlx5e_is_valid_eswitch_fwd_dev(priv, out_dev)) {
3854                                         NL_SET_ERR_MSG_MOD(extack,
3855                                                            "devices are not on same switch HW, can't offload forwarding");
3856                                         return -EOPNOTSUPP;
3857                                 }
3858
3859                                 if (same_vf_reps(priv, out_dev)) {
3860                                         NL_SET_ERR_MSG_MOD(extack,
3861                                                            "can't forward from a VF to itself");
3862                                         return -EOPNOTSUPP;
3863                                 }
3864
3865                                 out_priv = netdev_priv(out_dev);
3866                                 rpriv = out_priv->ppriv;
3867                                 esw_attr->dests[esw_attr->out_count].rep = rpriv->rep;
3868                                 esw_attr->dests[esw_attr->out_count].mdev = out_priv->mdev;
3869                                 esw_attr->out_count++;
3870                         } else if (parse_attr->filter_dev != priv->netdev) {
3871                                 /* All mlx5 devices are called to configure
3872                                  * high level device filters. Therefore, the
3873                                  * *attempt* to  install a filter on invalid
3874                                  * eswitch should not trigger an explicit error
3875                                  */
3876                                 return -EINVAL;
3877                         } else {
3878                                 NL_SET_ERR_MSG_MOD(extack,
3879                                                    "devices are not on same switch HW, can't offload forwarding");
3880                                 netdev_warn(priv->netdev,
3881                                             "devices %s %s not on same switch HW, can't offload forwarding\n",
3882                                             priv->netdev->name,
3883                                             out_dev->name);
3884                                 return -EINVAL;
3885                         }
3886                         }
3887                         break;
3888                 case FLOW_ACTION_TUNNEL_ENCAP:
3889                         info = act->tunnel;
3890                         if (info)
3891                                 encap = true;
3892                         else
3893                                 return -EOPNOTSUPP;
3894
3895                         break;
3896                 case FLOW_ACTION_VLAN_PUSH:
3897                 case FLOW_ACTION_VLAN_POP:
3898                         if (act->id == FLOW_ACTION_VLAN_PUSH &&
3899                             (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP)) {
3900                                 /* Replace vlan pop+push with vlan modify */
3901                                 action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3902                                 err = add_vlan_rewrite_action(priv,
3903                                                               MLX5_FLOW_NAMESPACE_FDB,
3904                                                               act, parse_attr, hdrs,
3905                                                               &action, extack);
3906                         } else {
3907                                 err = parse_tc_vlan_action(priv, act, esw_attr, &action);
3908                         }
3909                         if (err)
3910                                 return err;
3911
3912                         esw_attr->split_count = esw_attr->out_count;
3913                         break;
3914                 case FLOW_ACTION_VLAN_MANGLE:
3915                         err = add_vlan_rewrite_action(priv,
3916                                                       MLX5_FLOW_NAMESPACE_FDB,
3917                                                       act, parse_attr, hdrs,
3918                                                       &action, extack);
3919                         if (err)
3920                                 return err;
3921
3922                         esw_attr->split_count = esw_attr->out_count;
3923                         break;
3924                 case FLOW_ACTION_TUNNEL_DECAP:
3925                         decap = true;
3926                         break;
3927                 case FLOW_ACTION_GOTO:
3928                         err = validate_goto_chain(priv, flow, act, action,
3929                                                   extack);
3930                         if (err)
3931                                 return err;
3932
3933                         action |= MLX5_FLOW_CONTEXT_ACTION_COUNT;
3934                         attr->dest_chain = act->chain_index;
3935                         break;
3936                 case FLOW_ACTION_CT:
3937                         if (flow_flag_test(flow, SAMPLE)) {
3938                                 NL_SET_ERR_MSG_MOD(extack, "Sample action with connection tracking is not supported");
3939                                 return -EOPNOTSUPP;
3940                         }
3941                         err = mlx5_tc_ct_parse_action(get_ct_priv(priv), attr, act, extack);
3942                         if (err)
3943                                 return err;
3944
3945                         flow_flag_set(flow, CT);
3946                         esw_attr->split_count = esw_attr->out_count;
3947                         break;
3948                 case FLOW_ACTION_SAMPLE:
3949                         if (flow_flag_test(flow, CT)) {
3950                                 NL_SET_ERR_MSG_MOD(extack, "Sample action with connection tracking is not supported");
3951                                 return -EOPNOTSUPP;
3952                         }
3953                         sample.rate = act->sample.rate;
3954                         sample.group_num = act->sample.psample_group->group_num;
3955                         if (act->sample.truncate)
3956                                 sample.trunc_size = act->sample.trunc_size;
3957                         flow_flag_set(flow, SAMPLE);
3958                         break;
3959                 default:
3960                         NL_SET_ERR_MSG_MOD(extack, "The offload action is not supported");
3961                         return -EOPNOTSUPP;
3962                 }
3963         }
3964
3965         /* always set IP version for indirect table handling */
3966         attr->ip_version = mlx5e_tc_get_ip_version(&parse_attr->spec, true);
3967
3968         if (MLX5_CAP_GEN(esw->dev, prio_tag_required) &&
3969             action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) {
3970                 /* For prio tag mode, replace vlan pop with rewrite vlan prio
3971                  * tag rewrite.
3972                  */
3973                 action &= ~MLX5_FLOW_CONTEXT_ACTION_VLAN_POP;
3974                 err = add_vlan_prio_tag_rewrite_action(priv, parse_attr, hdrs,
3975                                                        &action, extack);
3976                 if (err)
3977                         return err;
3978         }
3979
3980         if (hdrs[TCA_PEDIT_KEY_EX_CMD_SET].pedits ||
3981             hdrs[TCA_PEDIT_KEY_EX_CMD_ADD].pedits) {
3982                 err = alloc_tc_pedit_action(priv, MLX5_FLOW_NAMESPACE_FDB,
3983                                             parse_attr, hdrs, &action, extack);
3984                 if (err)
3985                         return err;
3986                 /* in case all pedit actions are skipped, remove the MOD_HDR
3987                  * flag. we might have set split_count either by pedit or
3988                  * pop/push. if there is no pop/push either, reset it too.
3989                  */
3990                 if (parse_attr->mod_hdr_acts.num_actions == 0) {
3991                         action &= ~MLX5_FLOW_CONTEXT_ACTION_MOD_HDR;
3992                         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
3993                         if (!((action & MLX5_FLOW_CONTEXT_ACTION_VLAN_POP) ||
3994                               (action & MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH)))
3995                                 esw_attr->split_count = 0;
3996                 }
3997         }
3998
3999         attr->action = action;
4000         if (!actions_match_supported(priv, flow_action, parse_attr, flow, extack))
4001                 return -EOPNOTSUPP;
4002
4003         if (attr->dest_chain) {
4004                 if (decap) {
4005                         /* It can be supported if we'll create a mapping for
4006                          * the tunnel device only (without tunnel), and set
4007                          * this tunnel id with this decap flow.
4008                          *
4009                          * On restore (miss), we'll just set this saved tunnel
4010                          * device.
4011                          */
4012
4013                         NL_SET_ERR_MSG(extack,
4014                                        "Decap with goto isn't supported");
4015                         netdev_warn(priv->netdev,
4016                                     "Decap with goto isn't supported");
4017                         return -EOPNOTSUPP;
4018                 }
4019
4020                 attr->action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
4021         }
4022
4023         if (!(attr->action &
4024               (MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | MLX5_FLOW_CONTEXT_ACTION_DROP))) {
4025                 NL_SET_ERR_MSG_MOD(extack,
4026                                    "Rule must have at least one forward/drop action");
4027                 return -EOPNOTSUPP;
4028         }
4029
4030         if (esw_attr->split_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) {
4031                 NL_SET_ERR_MSG_MOD(extack,
4032                                    "current firmware doesn't support split rule for port mirroring");
4033                 netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n");
4034                 return -EOPNOTSUPP;
4035         }
4036
4037         /* Allocate sample attribute only when there is a sample action and
4038          * no errors after parsing.
4039          */
4040         if (flow_flag_test(flow, SAMPLE)) {
4041                 esw_attr->sample = kzalloc(sizeof(*esw_attr->sample), GFP_KERNEL);
4042                 if (!esw_attr->sample)
4043                         return -ENOMEM;
4044                 *esw_attr->sample = sample;
4045         }
4046
4047         return 0;
4048 }
4049
4050 static void get_flags(int flags, unsigned long *flow_flags)
4051 {
4052         unsigned long __flow_flags = 0;
4053
4054         if (flags & MLX5_TC_FLAG(INGRESS))
4055                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_INGRESS);
4056         if (flags & MLX5_TC_FLAG(EGRESS))
4057                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_EGRESS);
4058
4059         if (flags & MLX5_TC_FLAG(ESW_OFFLOAD))
4060                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4061         if (flags & MLX5_TC_FLAG(NIC_OFFLOAD))
4062                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4063         if (flags & MLX5_TC_FLAG(FT_OFFLOAD))
4064                 __flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_FT);
4065
4066         *flow_flags = __flow_flags;
4067 }
4068
4069 static const struct rhashtable_params tc_ht_params = {
4070         .head_offset = offsetof(struct mlx5e_tc_flow, node),
4071         .key_offset = offsetof(struct mlx5e_tc_flow, cookie),
4072         .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie),
4073         .automatic_shrinking = true,
4074 };
4075
4076 static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv,
4077                                     unsigned long flags)
4078 {
4079         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4080         struct mlx5e_rep_priv *uplink_rpriv;
4081
4082         if (flags & MLX5_TC_FLAG(ESW_OFFLOAD)) {
4083                 uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
4084                 return &uplink_rpriv->uplink_priv.tc_ht;
4085         } else /* NIC offload */
4086                 return &priv->fs.tc.ht;
4087 }
4088
4089 static bool is_peer_flow_needed(struct mlx5e_tc_flow *flow)
4090 {
4091         struct mlx5_esw_flow_attr *esw_attr = flow->attr->esw_attr;
4092         struct mlx5_flow_attr *attr = flow->attr;
4093         bool is_rep_ingress = esw_attr->in_rep->vport != MLX5_VPORT_UPLINK &&
4094                 flow_flag_test(flow, INGRESS);
4095         bool act_is_encap = !!(attr->action &
4096                                MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT);
4097         bool esw_paired = mlx5_devcom_is_paired(esw_attr->in_mdev->priv.devcom,
4098                                                 MLX5_DEVCOM_ESW_OFFLOADS);
4099
4100         if (!esw_paired)
4101                 return false;
4102
4103         if ((mlx5_lag_is_sriov(esw_attr->in_mdev) ||
4104              mlx5_lag_is_multipath(esw_attr->in_mdev)) &&
4105             (is_rep_ingress || act_is_encap))
4106                 return true;
4107
4108         return false;
4109 }
4110
4111 struct mlx5_flow_attr *
4112 mlx5_alloc_flow_attr(enum mlx5_flow_namespace_type type)
4113 {
4114         u32 ex_attr_size = (type == MLX5_FLOW_NAMESPACE_FDB)  ?
4115                                 sizeof(struct mlx5_esw_flow_attr) :
4116                                 sizeof(struct mlx5_nic_flow_attr);
4117         struct mlx5_flow_attr *attr;
4118
4119         return kzalloc(sizeof(*attr) + ex_attr_size, GFP_KERNEL);
4120 }
4121
4122 static int
4123 mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size,
4124                  struct flow_cls_offload *f, unsigned long flow_flags,
4125                  struct mlx5e_tc_flow_parse_attr **__parse_attr,
4126                  struct mlx5e_tc_flow **__flow)
4127 {
4128         struct mlx5e_tc_flow_parse_attr *parse_attr;
4129         struct mlx5_flow_attr *attr;
4130         struct mlx5e_tc_flow *flow;
4131         int err = -ENOMEM;
4132         int out_index;
4133
4134         flow = kzalloc(sizeof(*flow), GFP_KERNEL);
4135         parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL);
4136         if (!parse_attr || !flow)
4137                 goto err_free;
4138
4139         flow->flags = flow_flags;
4140         flow->cookie = f->cookie;
4141         flow->priv = priv;
4142
4143         attr = mlx5_alloc_flow_attr(get_flow_name_space(flow));
4144         if (!attr)
4145                 goto err_free;
4146
4147         flow->attr = attr;
4148
4149         for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
4150                 INIT_LIST_HEAD(&flow->encaps[out_index].list);
4151         INIT_LIST_HEAD(&flow->hairpin);
4152         INIT_LIST_HEAD(&flow->l3_to_l2_reformat);
4153         refcount_set(&flow->refcnt, 1);
4154         init_completion(&flow->init_done);
4155
4156         *__flow = flow;
4157         *__parse_attr = parse_attr;
4158
4159         return 0;
4160
4161 err_free:
4162         kfree(flow);
4163         kvfree(parse_attr);
4164         return err;
4165 }
4166
4167 static void
4168 mlx5e_flow_attr_init(struct mlx5_flow_attr *attr,
4169                      struct mlx5e_tc_flow_parse_attr *parse_attr,
4170                      struct flow_cls_offload *f)
4171 {
4172         attr->parse_attr = parse_attr;
4173         attr->chain = f->common.chain_index;
4174         attr->prio = f->common.prio;
4175 }
4176
4177 static void
4178 mlx5e_flow_esw_attr_init(struct mlx5_flow_attr *attr,
4179                          struct mlx5e_priv *priv,
4180                          struct mlx5e_tc_flow_parse_attr *parse_attr,
4181                          struct flow_cls_offload *f,
4182                          struct mlx5_eswitch_rep *in_rep,
4183                          struct mlx5_core_dev *in_mdev)
4184 {
4185         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4186         struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
4187
4188         mlx5e_flow_attr_init(attr, parse_attr, f);
4189
4190         esw_attr->in_rep = in_rep;
4191         esw_attr->in_mdev = in_mdev;
4192
4193         if (MLX5_CAP_ESW(esw->dev, counter_eswitch_affinity) ==
4194             MLX5_COUNTER_SOURCE_ESWITCH)
4195                 esw_attr->counter_dev = in_mdev;
4196         else
4197                 esw_attr->counter_dev = priv->mdev;
4198 }
4199
4200 static struct mlx5e_tc_flow *
4201 __mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4202                      struct flow_cls_offload *f,
4203                      unsigned long flow_flags,
4204                      struct net_device *filter_dev,
4205                      struct mlx5_eswitch_rep *in_rep,
4206                      struct mlx5_core_dev *in_mdev)
4207 {
4208         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4209         struct netlink_ext_ack *extack = f->common.extack;
4210         struct mlx5e_tc_flow_parse_attr *parse_attr;
4211         struct mlx5e_tc_flow *flow;
4212         int attr_size, err;
4213
4214         flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_ESWITCH);
4215         attr_size  = sizeof(struct mlx5_esw_flow_attr);
4216         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4217                                &parse_attr, &flow);
4218         if (err)
4219                 goto out;
4220
4221         parse_attr->filter_dev = filter_dev;
4222         mlx5e_flow_esw_attr_init(flow->attr,
4223                                  priv, parse_attr,
4224                                  f, in_rep, in_mdev);
4225
4226         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4227                                f, filter_dev);
4228         if (err)
4229                 goto err_free;
4230
4231         /* actions validation depends on parsing the ct matches first */
4232         err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4233                                    &flow->attr->ct_attr, extack);
4234         if (err)
4235                 goto err_free;
4236
4237         err = parse_tc_fdb_actions(priv, &rule->action, flow, extack, filter_dev);
4238         if (err)
4239                 goto err_free;
4240
4241         err = mlx5e_tc_add_fdb_flow(priv, flow, extack);
4242         complete_all(&flow->init_done);
4243         if (err) {
4244                 if (!(err == -ENETUNREACH && mlx5_lag_is_multipath(in_mdev)))
4245                         goto err_free;
4246
4247                 add_unready_flow(flow);
4248         }
4249
4250         return flow;
4251
4252 err_free:
4253         mlx5e_flow_put(priv, flow);
4254 out:
4255         return ERR_PTR(err);
4256 }
4257
4258 static int mlx5e_tc_add_fdb_peer_flow(struct flow_cls_offload *f,
4259                                       struct mlx5e_tc_flow *flow,
4260                                       unsigned long flow_flags)
4261 {
4262         struct mlx5e_priv *priv = flow->priv, *peer_priv;
4263         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch, *peer_esw;
4264         struct mlx5_esw_flow_attr *attr = flow->attr->esw_attr;
4265         struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
4266         struct mlx5e_tc_flow_parse_attr *parse_attr;
4267         struct mlx5e_rep_priv *peer_urpriv;
4268         struct mlx5e_tc_flow *peer_flow;
4269         struct mlx5_core_dev *in_mdev;
4270         int err = 0;
4271
4272         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4273         if (!peer_esw)
4274                 return -ENODEV;
4275
4276         peer_urpriv = mlx5_eswitch_get_uplink_priv(peer_esw, REP_ETH);
4277         peer_priv = netdev_priv(peer_urpriv->netdev);
4278
4279         /* in_mdev is assigned of which the packet originated from.
4280          * So packets redirected to uplink use the same mdev of the
4281          * original flow and packets redirected from uplink use the
4282          * peer mdev.
4283          */
4284         if (attr->in_rep->vport == MLX5_VPORT_UPLINK)
4285                 in_mdev = peer_priv->mdev;
4286         else
4287                 in_mdev = priv->mdev;
4288
4289         parse_attr = flow->attr->parse_attr;
4290         peer_flow = __mlx5e_add_fdb_flow(peer_priv, f, flow_flags,
4291                                          parse_attr->filter_dev,
4292                                          attr->in_rep, in_mdev);
4293         if (IS_ERR(peer_flow)) {
4294                 err = PTR_ERR(peer_flow);
4295                 goto out;
4296         }
4297
4298         flow->peer_flow = peer_flow;
4299         flow_flag_set(flow, DUP);
4300         mutex_lock(&esw->offloads.peer_mutex);
4301         list_add_tail(&flow->peer, &esw->offloads.peer_flows);
4302         mutex_unlock(&esw->offloads.peer_mutex);
4303
4304 out:
4305         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4306         return err;
4307 }
4308
4309 static int
4310 mlx5e_add_fdb_flow(struct mlx5e_priv *priv,
4311                    struct flow_cls_offload *f,
4312                    unsigned long flow_flags,
4313                    struct net_device *filter_dev,
4314                    struct mlx5e_tc_flow **__flow)
4315 {
4316         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4317         struct mlx5_eswitch_rep *in_rep = rpriv->rep;
4318         struct mlx5_core_dev *in_mdev = priv->mdev;
4319         struct mlx5e_tc_flow *flow;
4320         int err;
4321
4322         flow = __mlx5e_add_fdb_flow(priv, f, flow_flags, filter_dev, in_rep,
4323                                     in_mdev);
4324         if (IS_ERR(flow))
4325                 return PTR_ERR(flow);
4326
4327         if (is_peer_flow_needed(flow)) {
4328                 err = mlx5e_tc_add_fdb_peer_flow(f, flow, flow_flags);
4329                 if (err) {
4330                         mlx5e_tc_del_fdb_flow(priv, flow);
4331                         goto out;
4332                 }
4333         }
4334
4335         *__flow = flow;
4336
4337         return 0;
4338
4339 out:
4340         return err;
4341 }
4342
4343 static int
4344 mlx5e_add_nic_flow(struct mlx5e_priv *priv,
4345                    struct flow_cls_offload *f,
4346                    unsigned long flow_flags,
4347                    struct net_device *filter_dev,
4348                    struct mlx5e_tc_flow **__flow)
4349 {
4350         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
4351         struct netlink_ext_ack *extack = f->common.extack;
4352         struct mlx5e_tc_flow_parse_attr *parse_attr;
4353         struct mlx5e_tc_flow *flow;
4354         int attr_size, err;
4355
4356         if (!MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level)) {
4357                 if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common))
4358                         return -EOPNOTSUPP;
4359         } else if (!tc_can_offload_extack(priv->netdev, f->common.extack)) {
4360                 return -EOPNOTSUPP;
4361         }
4362
4363         flow_flags |= BIT(MLX5E_TC_FLOW_FLAG_NIC);
4364         attr_size  = sizeof(struct mlx5_nic_flow_attr);
4365         err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags,
4366                                &parse_attr, &flow);
4367         if (err)
4368                 goto out;
4369
4370         parse_attr->filter_dev = filter_dev;
4371         mlx5e_flow_attr_init(flow->attr, parse_attr, f);
4372
4373         err = parse_cls_flower(flow->priv, flow, &parse_attr->spec,
4374                                f, filter_dev);
4375         if (err)
4376                 goto err_free;
4377
4378         err = mlx5_tc_ct_match_add(get_ct_priv(priv), &parse_attr->spec, f,
4379                                    &flow->attr->ct_attr, extack);
4380         if (err)
4381                 goto err_free;
4382
4383         err = parse_tc_nic_actions(priv, &rule->action, parse_attr, flow, extack);
4384         if (err)
4385                 goto err_free;
4386
4387         err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack);
4388         if (err)
4389                 goto err_free;
4390
4391         flow_flag_set(flow, OFFLOADED);
4392         *__flow = flow;
4393
4394         return 0;
4395
4396 err_free:
4397         flow_flag_set(flow, FAILED);
4398         dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
4399         mlx5e_flow_put(priv, flow);
4400 out:
4401         return err;
4402 }
4403
4404 static int
4405 mlx5e_tc_add_flow(struct mlx5e_priv *priv,
4406                   struct flow_cls_offload *f,
4407                   unsigned long flags,
4408                   struct net_device *filter_dev,
4409                   struct mlx5e_tc_flow **flow)
4410 {
4411         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4412         unsigned long flow_flags;
4413         int err;
4414
4415         get_flags(flags, &flow_flags);
4416
4417         if (!tc_can_offload_extack(priv->netdev, f->common.extack))
4418                 return -EOPNOTSUPP;
4419
4420         if (esw && esw->mode == MLX5_ESWITCH_OFFLOADS)
4421                 err = mlx5e_add_fdb_flow(priv, f, flow_flags,
4422                                          filter_dev, flow);
4423         else
4424                 err = mlx5e_add_nic_flow(priv, f, flow_flags,
4425                                          filter_dev, flow);
4426
4427         return err;
4428 }
4429
4430 static bool is_flow_rule_duplicate_allowed(struct net_device *dev,
4431                                            struct mlx5e_rep_priv *rpriv)
4432 {
4433         /* Offloaded flow rule is allowed to duplicate on non-uplink representor
4434          * sharing tc block with other slaves of a lag device. Rpriv can be NULL if this
4435          * function is called from NIC mode.
4436          */
4437         return netif_is_lag_port(dev) && rpriv && rpriv->rep->vport != MLX5_VPORT_UPLINK;
4438 }
4439
4440 int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
4441                            struct flow_cls_offload *f, unsigned long flags)
4442 {
4443         struct netlink_ext_ack *extack = f->common.extack;
4444         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4445         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4446         struct mlx5e_tc_flow *flow;
4447         int err = 0;
4448
4449         if (!mlx5_esw_hold(priv->mdev))
4450                 return -EAGAIN;
4451
4452         mlx5_esw_get(priv->mdev);
4453
4454         rcu_read_lock();
4455         flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4456         if (flow) {
4457                 /* Same flow rule offloaded to non-uplink representor sharing tc block,
4458                  * just return 0.
4459                  */
4460                 if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev)
4461                         goto rcu_unlock;
4462
4463                 NL_SET_ERR_MSG_MOD(extack,
4464                                    "flow cookie already exists, ignoring");
4465                 netdev_warn_once(priv->netdev,
4466                                  "flow cookie %lx already exists, ignoring\n",
4467                                  f->cookie);
4468                 err = -EEXIST;
4469                 goto rcu_unlock;
4470         }
4471 rcu_unlock:
4472         rcu_read_unlock();
4473         if (flow)
4474                 goto out;
4475
4476         trace_mlx5e_configure_flower(f);
4477         err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);
4478         if (err)
4479                 goto out;
4480
4481         /* Flow rule offloaded to non-uplink representor sharing tc block,
4482          * set the flow's owner dev.
4483          */
4484         if (is_flow_rule_duplicate_allowed(dev, rpriv))
4485                 flow->orig_dev = dev;
4486
4487         err = rhashtable_lookup_insert_fast(tc_ht, &flow->node, tc_ht_params);
4488         if (err)
4489                 goto err_free;
4490
4491         mlx5_esw_release(priv->mdev);
4492         return 0;
4493
4494 err_free:
4495         mlx5e_flow_put(priv, flow);
4496 out:
4497         mlx5_esw_put(priv->mdev);
4498         mlx5_esw_release(priv->mdev);
4499         return err;
4500 }
4501
4502 static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags)
4503 {
4504         bool dir_ingress = !!(flags & MLX5_TC_FLAG(INGRESS));
4505         bool dir_egress = !!(flags & MLX5_TC_FLAG(EGRESS));
4506
4507         return flow_flag_test(flow, INGRESS) == dir_ingress &&
4508                 flow_flag_test(flow, EGRESS) == dir_egress;
4509 }
4510
4511 int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv,
4512                         struct flow_cls_offload *f, unsigned long flags)
4513 {
4514         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4515         struct mlx5e_tc_flow *flow;
4516         int err;
4517
4518         rcu_read_lock();
4519         flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4520         if (!flow || !same_flow_direction(flow, flags)) {
4521                 err = -EINVAL;
4522                 goto errout;
4523         }
4524
4525         /* Only delete the flow if it doesn't have MLX5E_TC_FLOW_DELETED flag
4526          * set.
4527          */
4528         if (flow_flag_test_and_set(flow, DELETED)) {
4529                 err = -EINVAL;
4530                 goto errout;
4531         }
4532         rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params);
4533         rcu_read_unlock();
4534
4535         trace_mlx5e_delete_flower(f);
4536         mlx5e_flow_put(priv, flow);
4537
4538         mlx5_esw_put(priv->mdev);
4539         return 0;
4540
4541 errout:
4542         rcu_read_unlock();
4543         return err;
4544 }
4545
4546 int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv,
4547                        struct flow_cls_offload *f, unsigned long flags)
4548 {
4549         struct mlx5_devcom *devcom = priv->mdev->priv.devcom;
4550         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
4551         struct mlx5_eswitch *peer_esw;
4552         struct mlx5e_tc_flow *flow;
4553         struct mlx5_fc *counter;
4554         u64 lastuse = 0;
4555         u64 packets = 0;
4556         u64 bytes = 0;
4557         int err = 0;
4558
4559         rcu_read_lock();
4560         flow = mlx5e_flow_get(rhashtable_lookup(tc_ht, &f->cookie,
4561                                                 tc_ht_params));
4562         rcu_read_unlock();
4563         if (IS_ERR(flow))
4564                 return PTR_ERR(flow);
4565
4566         if (!same_flow_direction(flow, flags)) {
4567                 err = -EINVAL;
4568                 goto errout;
4569         }
4570
4571         if (mlx5e_is_offloaded_flow(flow) || flow_flag_test(flow, CT)) {
4572                 counter = mlx5e_tc_get_counter(flow);
4573                 if (!counter)
4574                         goto errout;
4575
4576                 mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
4577         }
4578
4579         /* Under multipath it's possible for one rule to be currently
4580          * un-offloaded while the other rule is offloaded.
4581          */
4582         peer_esw = mlx5_devcom_get_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4583         if (!peer_esw)
4584                 goto out;
4585
4586         if (flow_flag_test(flow, DUP) &&
4587             flow_flag_test(flow->peer_flow, OFFLOADED)) {
4588                 u64 bytes2;
4589                 u64 packets2;
4590                 u64 lastuse2;
4591
4592                 counter = mlx5e_tc_get_counter(flow->peer_flow);
4593                 if (!counter)
4594                         goto no_peer_counter;
4595                 mlx5_fc_query_cached(counter, &bytes2, &packets2, &lastuse2);
4596
4597                 bytes += bytes2;
4598                 packets += packets2;
4599                 lastuse = max_t(u64, lastuse, lastuse2);
4600         }
4601
4602 no_peer_counter:
4603         mlx5_devcom_release_peer_data(devcom, MLX5_DEVCOM_ESW_OFFLOADS);
4604 out:
4605         flow_stats_update(&f->stats, bytes, packets, 0, lastuse,
4606                           FLOW_ACTION_HW_STATS_DELAYED);
4607         trace_mlx5e_stats_flower(f);
4608 errout:
4609         mlx5e_flow_put(priv, flow);
4610         return err;
4611 }
4612
4613 static int apply_police_params(struct mlx5e_priv *priv, u64 rate,
4614                                struct netlink_ext_ack *extack)
4615 {
4616         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4617         struct mlx5_eswitch *esw;
4618         u32 rate_mbps = 0;
4619         u16 vport_num;
4620         int err;
4621
4622         vport_num = rpriv->rep->vport;
4623         if (vport_num >= MLX5_VPORT_ECPF) {
4624                 NL_SET_ERR_MSG_MOD(extack,
4625                                    "Ingress rate limit is supported only for Eswitch ports connected to VFs");
4626                 return -EOPNOTSUPP;
4627         }
4628
4629         esw = priv->mdev->priv.eswitch;
4630         /* rate is given in bytes/sec.
4631          * First convert to bits/sec and then round to the nearest mbit/secs.
4632          * mbit means million bits.
4633          * Moreover, if rate is non zero we choose to configure to a minimum of
4634          * 1 mbit/sec.
4635          */
4636         if (rate) {
4637                 rate = (rate * BITS_PER_BYTE) + 500000;
4638                 do_div(rate, 1000000);
4639                 rate_mbps = max_t(u32, rate, 1);
4640         }
4641
4642         err = mlx5_esw_modify_vport_rate(esw, vport_num, rate_mbps);
4643         if (err)
4644                 NL_SET_ERR_MSG_MOD(extack, "failed applying action to hardware");
4645
4646         return err;
4647 }
4648
4649 static int scan_tc_matchall_fdb_actions(struct mlx5e_priv *priv,
4650                                         struct flow_action *flow_action,
4651                                         struct netlink_ext_ack *extack)
4652 {
4653         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4654         const struct flow_action_entry *act;
4655         int err;
4656         int i;
4657
4658         if (!flow_action_has_entries(flow_action)) {
4659                 NL_SET_ERR_MSG_MOD(extack, "matchall called with no action");
4660                 return -EINVAL;
4661         }
4662
4663         if (!flow_offload_has_one_action(flow_action)) {
4664                 NL_SET_ERR_MSG_MOD(extack, "matchall policing support only a single action");
4665                 return -EOPNOTSUPP;
4666         }
4667
4668         if (!flow_action_basic_hw_stats_check(flow_action, extack))
4669                 return -EOPNOTSUPP;
4670
4671         flow_action_for_each(i, act, flow_action) {
4672                 switch (act->id) {
4673                 case FLOW_ACTION_POLICE:
4674                         if (act->police.rate_pkt_ps) {
4675                                 NL_SET_ERR_MSG_MOD(extack, "QoS offload not support packets per second");
4676                                 return -EOPNOTSUPP;
4677                         }
4678                         err = apply_police_params(priv, act->police.rate_bytes_ps, extack);
4679                         if (err)
4680                                 return err;
4681
4682                         rpriv->prev_vf_vport_stats = priv->stats.vf_vport;
4683                         break;
4684                 default:
4685                         NL_SET_ERR_MSG_MOD(extack, "mlx5 supports only police action for matchall");
4686                         return -EOPNOTSUPP;
4687                 }
4688         }
4689
4690         return 0;
4691 }
4692
4693 int mlx5e_tc_configure_matchall(struct mlx5e_priv *priv,
4694                                 struct tc_cls_matchall_offload *ma)
4695 {
4696         struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
4697         struct netlink_ext_ack *extack = ma->common.extack;
4698
4699         if (!mlx5_esw_qos_enabled(esw)) {
4700                 NL_SET_ERR_MSG_MOD(extack, "QoS is not supported on this device");
4701                 return -EOPNOTSUPP;
4702         }
4703
4704         if (ma->common.prio != 1) {
4705                 NL_SET_ERR_MSG_MOD(extack, "only priority 1 is supported");
4706                 return -EINVAL;
4707         }
4708
4709         return scan_tc_matchall_fdb_actions(priv, &ma->rule->action, extack);
4710 }
4711
4712 int mlx5e_tc_delete_matchall(struct mlx5e_priv *priv,
4713                              struct tc_cls_matchall_offload *ma)
4714 {
4715         struct netlink_ext_ack *extack = ma->common.extack;
4716
4717         return apply_police_params(priv, 0, extack);
4718 }
4719
4720 void mlx5e_tc_stats_matchall(struct mlx5e_priv *priv,
4721                              struct tc_cls_matchall_offload *ma)
4722 {
4723         struct mlx5e_rep_priv *rpriv = priv->ppriv;
4724         struct rtnl_link_stats64 cur_stats;
4725         u64 dbytes;
4726         u64 dpkts;
4727
4728         cur_stats = priv->stats.vf_vport;
4729         dpkts = cur_stats.rx_packets - rpriv->prev_vf_vport_stats.rx_packets;
4730         dbytes = cur_stats.rx_bytes - rpriv->prev_vf_vport_stats.rx_bytes;
4731         rpriv->prev_vf_vport_stats = cur_stats;
4732         flow_stats_update(&ma->stats, dbytes, dpkts, 0, jiffies,
4733                           FLOW_ACTION_HW_STATS_DELAYED);
4734 }
4735
4736 static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv,
4737                                               struct mlx5e_priv *peer_priv)
4738 {
4739         struct mlx5_core_dev *peer_mdev = peer_priv->mdev;
4740         struct mlx5e_hairpin_entry *hpe, *tmp;
4741         LIST_HEAD(init_wait_list);
4742         u16 peer_vhca_id;
4743         int bkt;
4744
4745         if (!same_hw_devs(priv, peer_priv))
4746                 return;
4747
4748         peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id);
4749
4750         mutex_lock(&priv->fs.tc.hairpin_tbl_lock);
4751         hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist)
4752                 if (refcount_inc_not_zero(&hpe->refcnt))
4753                         list_add(&hpe->dead_peer_wait_list, &init_wait_list);
4754         mutex_unlock(&priv->fs.tc.hairpin_tbl_lock);
4755
4756         list_for_each_entry_safe(hpe, tmp, &init_wait_list, dead_peer_wait_list) {
4757                 wait_for_completion(&hpe->res_ready);
4758                 if (!IS_ERR_OR_NULL(hpe->hp) && hpe->peer_vhca_id == peer_vhca_id)
4759                         hpe->hp->pair->peer_gone = true;
4760
4761                 mlx5e_hairpin_put(priv, hpe);
4762         }
4763 }
4764
4765 static int mlx5e_tc_netdev_event(struct notifier_block *this,
4766                                  unsigned long event, void *ptr)
4767 {
4768         struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
4769         struct mlx5e_flow_steering *fs;
4770         struct mlx5e_priv *peer_priv;
4771         struct mlx5e_tc_table *tc;
4772         struct mlx5e_priv *priv;
4773
4774         if (ndev->netdev_ops != &mlx5e_netdev_ops ||
4775             event != NETDEV_UNREGISTER ||
4776             ndev->reg_state == NETREG_REGISTERED)
4777                 return NOTIFY_DONE;
4778
4779         tc = container_of(this, struct mlx5e_tc_table, netdevice_nb);
4780         fs = container_of(tc, struct mlx5e_flow_steering, tc);
4781         priv = container_of(fs, struct mlx5e_priv, fs);
4782         peer_priv = netdev_priv(ndev);
4783         if (priv == peer_priv ||
4784             !(priv->netdev->features & NETIF_F_HW_TC))
4785                 return NOTIFY_DONE;
4786
4787         mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv);
4788
4789         return NOTIFY_DONE;
4790 }
4791
4792 static int mlx5e_tc_nic_get_ft_size(struct mlx5_core_dev *dev)
4793 {
4794         int tc_grp_size, tc_tbl_size;
4795         u32 max_flow_counter;
4796
4797         max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) |
4798                             MLX5_CAP_GEN(dev, max_flow_counter_15_0);
4799
4800         tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE);
4801
4802         tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS,
4803                             BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size)));
4804
4805         return tc_tbl_size;
4806 }
4807
4808 int mlx5e_tc_nic_init(struct mlx5e_priv *priv)
4809 {
4810         struct mlx5e_tc_table *tc = &priv->fs.tc;
4811         struct mlx5_core_dev *dev = priv->mdev;
4812         struct mapping_ctx *chains_mapping;
4813         struct mlx5_chains_attr attr = {};
4814         int err;
4815
4816         mlx5e_mod_hdr_tbl_init(&tc->mod_hdr);
4817         mutex_init(&tc->t_lock);
4818         mutex_init(&tc->hairpin_tbl_lock);
4819         hash_init(tc->hairpin_tbl);
4820
4821         err = rhashtable_init(&tc->ht, &tc_ht_params);
4822         if (err)
4823                 return err;
4824
4825         lockdep_set_class(&tc->ht.mutex, &tc_ht_lock_key);
4826
4827         chains_mapping = mapping_create(sizeof(struct mlx5_mapped_obj),
4828                                         MLX5E_TC_TABLE_CHAIN_TAG_MASK, true);
4829         if (IS_ERR(chains_mapping)) {
4830                 err = PTR_ERR(chains_mapping);
4831                 goto err_mapping;
4832         }
4833         tc->mapping = chains_mapping;
4834
4835         if (MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, ignore_flow_level))
4836                 attr.flags = MLX5_CHAINS_AND_PRIOS_SUPPORTED |
4837                         MLX5_CHAINS_IGNORE_FLOW_LEVEL_SUPPORTED;
4838         attr.ns = MLX5_FLOW_NAMESPACE_KERNEL;
4839         attr.max_ft_sz = mlx5e_tc_nic_get_ft_size(dev);
4840         attr.max_grp_num = MLX5E_TC_TABLE_NUM_GROUPS;
4841         attr.default_ft = mlx5e_vlan_get_flowtable(priv->fs.vlan);
4842         attr.mapping = chains_mapping;
4843
4844         tc->chains = mlx5_chains_create(dev, &attr);
4845         if (IS_ERR(tc->chains)) {
4846                 err = PTR_ERR(tc->chains);
4847                 goto err_chains;
4848         }
4849
4850         tc->ct = mlx5_tc_ct_init(priv, tc->chains, &priv->fs.tc.mod_hdr,
4851                                  MLX5_FLOW_NAMESPACE_KERNEL);
4852
4853         tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event;
4854         err = register_netdevice_notifier_dev_net(priv->netdev,
4855                                                   &tc->netdevice_nb,
4856                                                   &tc->netdevice_nn);
4857         if (err) {
4858                 tc->netdevice_nb.notifier_call = NULL;
4859                 mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n");
4860                 goto err_reg;
4861         }
4862
4863         return 0;
4864
4865 err_reg:
4866         mlx5_tc_ct_clean(tc->ct);
4867         mlx5_chains_destroy(tc->chains);
4868 err_chains:
4869         mapping_destroy(chains_mapping);
4870 err_mapping:
4871         rhashtable_destroy(&tc->ht);
4872         return err;
4873 }
4874
4875 static void _mlx5e_tc_del_flow(void *ptr, void *arg)
4876 {
4877         struct mlx5e_tc_flow *flow = ptr;
4878         struct mlx5e_priv *priv = flow->priv;
4879
4880         mlx5e_tc_del_flow(priv, flow);
4881         kfree(flow);
4882 }
4883
4884 void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv)
4885 {
4886         struct mlx5e_tc_table *tc = &priv->fs.tc;
4887
4888         if (tc->netdevice_nb.notifier_call)
4889                 unregister_netdevice_notifier_dev_net(priv->netdev,
4890                                                       &tc->netdevice_nb,
4891                                                       &tc->netdevice_nn);
4892
4893         mlx5e_mod_hdr_tbl_destroy(&tc->mod_hdr);
4894         mutex_destroy(&tc->hairpin_tbl_lock);
4895
4896         rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL);
4897
4898         if (!IS_ERR_OR_NULL(tc->t)) {
4899                 mlx5_chains_put_table(tc->chains, 0, 1, MLX5E_TC_FT_LEVEL);
4900                 tc->t = NULL;
4901         }
4902         mutex_destroy(&tc->t_lock);
4903
4904         mlx5_tc_ct_clean(tc->ct);
4905         mapping_destroy(tc->mapping);
4906         mlx5_chains_destroy(tc->chains);
4907 }
4908
4909 int mlx5e_tc_esw_init(struct rhashtable *tc_ht)
4910 {
4911         const size_t sz_enc_opts = sizeof(struct tunnel_match_enc_opts);
4912         struct mlx5_rep_uplink_priv *uplink_priv;
4913         struct mlx5e_rep_priv *rpriv;
4914         struct mapping_ctx *mapping;
4915         struct mlx5_eswitch *esw;
4916         struct mlx5e_priv *priv;
4917         int err = 0;
4918
4919         uplink_priv = container_of(tc_ht, struct mlx5_rep_uplink_priv, tc_ht);
4920         rpriv = container_of(uplink_priv, struct mlx5e_rep_priv, uplink_priv);
4921         priv = netdev_priv(rpriv->netdev);
4922         esw = priv->mdev->priv.eswitch;
4923
4924         uplink_priv->ct_priv = mlx5_tc_ct_init(netdev_priv(priv->netdev),
4925                                                esw_chains(esw),
4926                                                &esw->offloads.mod_hdr,
4927                                                MLX5_FLOW_NAMESPACE_FDB);
4928
4929 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
4930         uplink_priv->esw_psample = mlx5_esw_sample_init(netdev_priv(priv->netdev));
4931 #endif
4932
4933         mapping = mapping_create(sizeof(struct tunnel_match_key),
4934                                  TUNNEL_INFO_BITS_MASK, true);
4935         if (IS_ERR(mapping)) {
4936                 err = PTR_ERR(mapping);
4937                 goto err_tun_mapping;
4938         }
4939         uplink_priv->tunnel_mapping = mapping;
4940
4941         /* 0xFFF is reserved for stack devices slow path table mark */
4942         mapping = mapping_create(sz_enc_opts, ENC_OPTS_BITS_MASK - 1, true);
4943         if (IS_ERR(mapping)) {
4944                 err = PTR_ERR(mapping);
4945                 goto err_enc_opts_mapping;
4946         }
4947         uplink_priv->tunnel_enc_opts_mapping = mapping;
4948
4949         err = rhashtable_init(tc_ht, &tc_ht_params);
4950         if (err)
4951                 goto err_ht_init;
4952
4953         lockdep_set_class(&tc_ht->mutex, &tc_ht_lock_key);
4954
4955         uplink_priv->encap = mlx5e_tc_tun_init(priv);
4956         if (IS_ERR(uplink_priv->encap)) {
4957                 err = PTR_ERR(uplink_priv->encap);
4958                 goto err_register_fib_notifier;
4959         }
4960
4961         return 0;
4962
4963 err_register_fib_notifier:
4964         rhashtable_destroy(tc_ht);
4965 err_ht_init:
4966         mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
4967 err_enc_opts_mapping:
4968         mapping_destroy(uplink_priv->tunnel_mapping);
4969 err_tun_mapping:
4970 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
4971         mlx5_esw_sample_cleanup(uplink_priv->esw_psample);
4972 #endif
4973         mlx5_tc_ct_clean(uplink_priv->ct_priv);
4974         netdev_warn(priv->netdev,
4975                     "Failed to initialize tc (eswitch), err: %d", err);
4976         return err;
4977 }
4978
4979 void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht)
4980 {
4981         struct mlx5_rep_uplink_priv *uplink_priv;
4982
4983         uplink_priv = container_of(tc_ht, struct mlx5_rep_uplink_priv, tc_ht);
4984
4985         rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL);
4986         mlx5e_tc_tun_cleanup(uplink_priv->encap);
4987
4988         mapping_destroy(uplink_priv->tunnel_enc_opts_mapping);
4989         mapping_destroy(uplink_priv->tunnel_mapping);
4990
4991 #if IS_ENABLED(CONFIG_MLX5_TC_SAMPLE)
4992         mlx5_esw_sample_cleanup(uplink_priv->esw_psample);
4993 #endif
4994         mlx5_tc_ct_clean(uplink_priv->ct_priv);
4995 }
4996
4997 int mlx5e_tc_num_filters(struct mlx5e_priv *priv, unsigned long flags)
4998 {
4999         struct rhashtable *tc_ht = get_tc_ht(priv, flags);
5000
5001         return atomic_read(&tc_ht->nelems);
5002 }
5003
5004 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw)
5005 {
5006         struct mlx5e_tc_flow *flow, *tmp;
5007
5008         list_for_each_entry_safe(flow, tmp, &esw->offloads.peer_flows, peer)
5009                 __mlx5e_tc_del_fdb_peer_flow(flow);
5010 }
5011
5012 void mlx5e_tc_reoffload_flows_work(struct work_struct *work)
5013 {
5014         struct mlx5_rep_uplink_priv *rpriv =
5015                 container_of(work, struct mlx5_rep_uplink_priv,
5016                              reoffload_flows_work);
5017         struct mlx5e_tc_flow *flow, *tmp;
5018
5019         mutex_lock(&rpriv->unready_flows_lock);
5020         list_for_each_entry_safe(flow, tmp, &rpriv->unready_flows, unready) {
5021                 if (!mlx5e_tc_add_fdb_flow(flow->priv, flow, NULL))
5022                         unready_flow_del(flow);
5023         }
5024         mutex_unlock(&rpriv->unready_flows_lock);
5025 }
5026
5027 static int mlx5e_setup_tc_cls_flower(struct mlx5e_priv *priv,
5028                                      struct flow_cls_offload *cls_flower,
5029                                      unsigned long flags)
5030 {
5031         switch (cls_flower->command) {
5032         case FLOW_CLS_REPLACE:
5033                 return mlx5e_configure_flower(priv->netdev, priv, cls_flower,
5034                                               flags);
5035         case FLOW_CLS_DESTROY:
5036                 return mlx5e_delete_flower(priv->netdev, priv, cls_flower,
5037                                            flags);
5038         case FLOW_CLS_STATS:
5039                 return mlx5e_stats_flower(priv->netdev, priv, cls_flower,
5040                                           flags);
5041         default:
5042                 return -EOPNOTSUPP;
5043         }
5044 }
5045
5046 int mlx5e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
5047                             void *cb_priv)
5048 {
5049         unsigned long flags = MLX5_TC_FLAG(INGRESS);
5050         struct mlx5e_priv *priv = cb_priv;
5051
5052         if (!priv->netdev || !netif_device_present(priv->netdev))
5053                 return -EOPNOTSUPP;
5054
5055         if (mlx5e_is_uplink_rep(priv))
5056                 flags |= MLX5_TC_FLAG(ESW_OFFLOAD);
5057         else
5058                 flags |= MLX5_TC_FLAG(NIC_OFFLOAD);
5059
5060         switch (type) {
5061         case TC_SETUP_CLSFLOWER:
5062                 return mlx5e_setup_tc_cls_flower(priv, type_data, flags);
5063         default:
5064                 return -EOPNOTSUPP;
5065         }
5066 }
5067
5068 bool mlx5e_tc_update_skb(struct mlx5_cqe64 *cqe,
5069                          struct sk_buff *skb)
5070 {
5071 #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT)
5072         u32 chain = 0, chain_tag, reg_b, zone_restore_id;
5073         struct mlx5e_priv *priv = netdev_priv(skb->dev);
5074         struct mlx5e_tc_table *tc = &priv->fs.tc;
5075         struct mlx5_mapped_obj mapped_obj;
5076         struct tc_skb_ext *tc_skb_ext;
5077         int err;
5078
5079         reg_b = be32_to_cpu(cqe->ft_metadata);
5080
5081         chain_tag = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK;
5082
5083         err = mapping_find(tc->mapping, chain_tag, &mapped_obj);
5084         if (err) {
5085                 netdev_dbg(priv->netdev,
5086                            "Couldn't find chain for chain tag: %d, err: %d\n",
5087                            chain_tag, err);
5088                 return false;
5089         }
5090
5091         if (mapped_obj.type == MLX5_MAPPED_OBJ_CHAIN) {
5092                 chain = mapped_obj.chain;
5093                 tc_skb_ext = tc_skb_ext_alloc(skb);
5094                 if (WARN_ON(!tc_skb_ext))
5095                         return false;
5096
5097                 tc_skb_ext->chain = chain;
5098
5099                 zone_restore_id = (reg_b >> REG_MAPPING_SHIFT(NIC_ZONE_RESTORE_TO_REG)) &
5100                         ESW_ZONE_ID_MASK;
5101
5102                 if (!mlx5e_tc_ct_restore_flow(tc->ct, skb,
5103                                               zone_restore_id))
5104                         return false;
5105         } else {
5106                 netdev_dbg(priv->netdev, "Invalid mapped object type: %d\n", mapped_obj.type);
5107                 return false;
5108         }
5109 #endif /* CONFIG_NET_TC_SKB_EXT */
5110
5111         return true;
5112 }