drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34 #include "en/port.h"
  35 #include "en/params.h"
  36 #include "en/xsk/pool.h"
  37 #include "lib/clock.h"
  38
  39 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
  40                                struct ethtool_drvinfo *drvinfo)
  41 {
  42         struct mlx5_core_dev *mdev = priv->mdev;
  43
  44         strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
  45         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  46                  "%d.%d.%04d (%.16s)",
  47                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
  48                  mdev->board_id);
  49         strlcpy(drvinfo->bus_info, dev_name(mdev->device),
  50                 sizeof(drvinfo->bus_info));
  51 }
  52
  53 static void mlx5e_get_drvinfo(struct net_device *dev,
  54                               struct ethtool_drvinfo *drvinfo)
  55 {
  56         struct mlx5e_priv *priv = netdev_priv(dev);
  57
  58         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
  59 }
  60
  61 struct ptys2ethtool_config {
  62         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  63         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  64 };
  65
  66 static
  67 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
  68 static
  69 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
  70
  71 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...)                  \
  72         ({                                                              \
  73                 struct ptys2ethtool_config *cfg;                        \
  74                 const unsigned int modes[] = { __VA_ARGS__ };           \
  75                 unsigned int i, bit, idx;                               \
  76                 cfg = &ptys2##table##_ethtool_table[reg_];              \
  77                 bitmap_zero(cfg->supported,                             \
  78                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  79                 bitmap_zero(cfg->advertised,                            \
  80                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  81                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  82                         bit = modes[i] % 64;                            \
  83                         idx = modes[i] / 64;                            \
  84                         __set_bit(bit, &cfg->supported[idx]);           \
  85                         __set_bit(bit, &cfg->advertised[idx]);          \
  86                 }                                                       \
  87         })
  88
  89 void mlx5e_build_ptys2ethtool_map(void)
  90 {
  91         memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
  92         memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
  93         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
  94                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  95         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
  96                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  97         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
  98                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
  99         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
 100                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 101         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
 102                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 103         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
 104                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 105         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
 106                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 107         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
 108                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 109         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
 110                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 111         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
 112                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 113         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
 114                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 115         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
 116                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 117         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
 118                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 119         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
 120                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 121         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
 122                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 123         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
 124                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 125         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
 126                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 127         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
 128                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 129         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
 130                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 131         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
 132                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 133         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
 134                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 135         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
 136                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 137         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
 138                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 139         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
 140                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 141         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
 142                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 143         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
 144                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 145         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
 146                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
 147                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
 148                                        ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
 149         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
 150                                        ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
 151         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
 152                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
 153                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
 154                                        ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
 155                                        ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
 156                                        ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
 157                                        ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
 158                                        ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
 159         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
 160                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
 161                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
 162                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
 163                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 164         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
 165                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
 166                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
 167                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 168         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
 169                                        ext,
 170                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
 171                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
 172                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 173         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
 174                                        ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
 175                                        ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
 176                                        ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
 177                                        ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 178                                        ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
 179         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
 180                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
 181                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
 182                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
 183                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 184         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
 185                                        ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
 186                                        ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
 187                                        ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
 188                                        ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 189                                        ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
 190         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
 191                                        ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
 192                                        ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
 193                                        ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 194                                        ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
 195                                        ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
 196         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
 197                                        ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
 198                                        ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
 199                                        ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 200                                        ETHTOOL_LINK_MODE_100000baseDR_Full_BIT,
 201                                        ETHTOOL_LINK_MODE_100000baseCR_Full_BIT);
 202         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_2_200GBASE_CR2_KR2, ext,
 203                                        ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
 204                                        ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
 205                                        ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 206                                        ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT,
 207                                        ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT);
 208         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_4_400GBASE_CR4_KR4, ext,
 209                                        ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
 210                                        ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
 211                                        ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 212                                        ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT,
 213                                        ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT);
 214 }
 215
 216 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
 217                                         struct ptys2ethtool_config **arr,
 218                                         u32 *size)
 219 {
 220         bool ext = mlx5e_ptys_ext_supported(mdev);
 221
 222         *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 223         *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 224                       ARRAY_SIZE(ptys2legacy_ethtool_table);
 225 }
 226
 227 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
 228
 229 struct pflag_desc {
 230         char name[ETH_GSTRING_LEN];
 231         mlx5e_pflag_handler handler;
 232 };
 233
 234 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
 235
 236 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
 237 {
 238         switch (sset) {
 239         case ETH_SS_STATS:
 240                 return mlx5e_stats_total_num(priv);
 241         case ETH_SS_PRIV_FLAGS:
 242                 return MLX5E_NUM_PFLAGS;
 243         case ETH_SS_TEST:
 244                 return mlx5e_self_test_num(priv);
 245         default:
 246                 return -EOPNOTSUPP;
 247         }
 248 }
 249
 250 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 251 {
 252         struct mlx5e_priv *priv = netdev_priv(dev);
 253
 254         return mlx5e_ethtool_get_sset_count(priv, sset);
 255 }
 256
 257 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
 258 {
 259         int i;
 260
 261         switch (stringset) {
 262         case ETH_SS_PRIV_FLAGS:
 263                 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
 264                         strcpy(data + i * ETH_GSTRING_LEN,
 265                                mlx5e_priv_flags[i].name);
 266                 break;
 267
 268         case ETH_SS_TEST:
 269                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
 270                         strcpy(data + i * ETH_GSTRING_LEN,
 271                                mlx5e_self_tests[i]);
 272                 break;
 273
 274         case ETH_SS_STATS:
 275                 mlx5e_stats_fill_strings(priv, data);
 276                 break;
 277         }
 278 }
 279
 280 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 281 {
 282         struct mlx5e_priv *priv = netdev_priv(dev);
 283
 284         mlx5e_ethtool_get_strings(priv, stringset, data);
 285 }
 286
 287 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
 288                                      struct ethtool_stats *stats, u64 *data)
 289 {
 290         int idx = 0;
 291
 292         mutex_lock(&priv->state_lock);
 293         mlx5e_stats_update(priv);
 294         mutex_unlock(&priv->state_lock);
 295
 296         mlx5e_stats_fill(priv, data, idx);
 297 }
 298
 299 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 300                                     struct ethtool_stats *stats,
 301                                     u64 *data)
 302 {
 303         struct mlx5e_priv *priv = netdev_priv(dev);
 304
 305         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
 306 }
 307
 308 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
 309                                  struct ethtool_ringparam *param)
 310 {
 311         param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
 312         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 313         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
 314         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
 315 }
 316
 317 static void mlx5e_get_ringparam(struct net_device *dev,
 318                                 struct ethtool_ringparam *param)
 319 {
 320         struct mlx5e_priv *priv = netdev_priv(dev);
 321
 322         mlx5e_ethtool_get_ringparam(priv, param);
 323 }
 324
 325 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
 326                                 struct ethtool_ringparam *param)
 327 {
 328         struct mlx5e_channels new_channels = {};
 329         u8 log_rq_size;
 330         u8 log_sq_size;
 331         int err = 0;
 332
 333         if (param->rx_jumbo_pending) {
 334                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
 335                             __func__);
 336                 return -EINVAL;
 337         }
 338         if (param->rx_mini_pending) {
 339                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
 340                             __func__);
 341                 return -EINVAL;
 342         }
 343
 344         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
 345                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
 346                             __func__, param->rx_pending,
 347                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
 348                 return -EINVAL;
 349         }
 350
 351         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 352                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
 353                             __func__, param->tx_pending,
 354                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 355                 return -EINVAL;
 356         }
 357
 358         log_rq_size = order_base_2(param->rx_pending);
 359         log_sq_size = order_base_2(param->tx_pending);
 360
 361         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
 362             log_sq_size == priv->channels.params.log_sq_size)
 363                 return 0;
 364
 365         mutex_lock(&priv->state_lock);
 366
 367         new_channels.params = priv->channels.params;
 368         new_channels.params.log_rq_mtu_frames = log_rq_size;
 369         new_channels.params.log_sq_size = log_sq_size;
 370
 371         err = mlx5e_validate_params(priv, &new_channels.params);
 372         if (err)
 373                 goto unlock;
 374
 375         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 376                 priv->channels.params = new_channels.params;
 377                 goto unlock;
 378         }
 379
 380         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
 381
 382 unlock:
 383         mutex_unlock(&priv->state_lock);
 384
 385         return err;
 386 }
 387
 388 static int mlx5e_set_ringparam(struct net_device *dev,
 389                                struct ethtool_ringparam *param)
 390 {
 391         struct mlx5e_priv *priv = netdev_priv(dev);
 392
 393         return mlx5e_ethtool_set_ringparam(priv, param);
 394 }
 395
 396 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
 397                                 struct ethtool_channels *ch)
 398 {
 399         mutex_lock(&priv->state_lock);
 400
 401         ch->max_combined   = priv->max_nch;
 402         ch->combined_count = priv->channels.params.num_channels;
 403         if (priv->xsk.refcnt) {
 404                 /* The upper half are XSK queues. */
 405                 ch->max_combined *= 2;
 406                 ch->combined_count *= 2;
 407         }
 408
 409         mutex_unlock(&priv->state_lock);
 410 }
 411
 412 static void mlx5e_get_channels(struct net_device *dev,
 413                                struct ethtool_channels *ch)
 414 {
 415         struct mlx5e_priv *priv = netdev_priv(dev);
 416
 417         mlx5e_ethtool_get_channels(priv, ch);
 418 }
 419
 420 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
 421                                struct ethtool_channels *ch)
 422 {
 423         struct mlx5e_params *cur_params = &priv->channels.params;
 424         unsigned int count = ch->combined_count;
 425         struct mlx5e_channels new_channels = {};
 426         bool arfs_enabled;
 427         int err = 0;
 428
 429         if (!count) {
 430                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
 431                             __func__);
 432                 return -EINVAL;
 433         }
 434
 435         if (cur_params->num_channels == count)
 436                 return 0;
 437
 438         mutex_lock(&priv->state_lock);
 439
 440         /* Don't allow changing the number of channels if there is an active
 441          * XSK, because the numeration of the XSK and regular RQs will change.
 442          */
 443         if (priv->xsk.refcnt) {
 444                 err = -EINVAL;
 445                 netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
 446                            __func__);
 447                 goto out;
 448         }
 449
 450         new_channels.params = priv->channels.params;
 451         new_channels.params.num_channels = count;
 452
 453         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 454                 *cur_params = new_channels.params;
 455                 err = mlx5e_num_channels_changed(priv);
 456                 goto out;
 457         }
 458
 459         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
 460         if (arfs_enabled)
 461                 mlx5e_arfs_disable(priv);
 462
 463         /* Switch to new channels, set new parameters and close old ones */
 464         err = mlx5e_safe_switch_channels(priv, &new_channels,
 465                                          mlx5e_num_channels_changed_ctx, NULL);
 466
 467         if (arfs_enabled) {
 468                 int err2 = mlx5e_arfs_enable(priv);
 469
 470                 if (err2)
 471                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
 472                                    __func__, err2);
 473         }
 474
 475 out:
 476         mutex_unlock(&priv->state_lock);
 477
 478         return err;
 479 }
 480
 481 static int mlx5e_set_channels(struct net_device *dev,
 482                               struct ethtool_channels *ch)
 483 {
 484         struct mlx5e_priv *priv = netdev_priv(dev);
 485
 486         return mlx5e_ethtool_set_channels(priv, ch);
 487 }
 488
 489 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
 490                                struct ethtool_coalesce *coal)
 491 {
 492         struct dim_cq_moder *rx_moder, *tx_moder;
 493
 494         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 495                 return -EOPNOTSUPP;
 496
 497         rx_moder = &priv->channels.params.rx_cq_moderation;
 498         coal->rx_coalesce_usecs         = rx_moder->usec;
 499         coal->rx_max_coalesced_frames   = rx_moder->pkts;
 500         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
 501
 502         tx_moder = &priv->channels.params.tx_cq_moderation;
 503         coal->tx_coalesce_usecs         = tx_moder->usec;
 504         coal->tx_max_coalesced_frames   = tx_moder->pkts;
 505         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
 506
 507         return 0;
 508 }
 509
 510 static int mlx5e_get_coalesce(struct net_device *netdev,
 511                               struct ethtool_coalesce *coal)
 512 {
 513         struct mlx5e_priv *priv = netdev_priv(netdev);
 514
 515         return mlx5e_ethtool_get_coalesce(priv, coal);
 516 }
 517
 518 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
 519 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
 520
 521 static void
 522 mlx5e_set_priv_channels_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 523 {
 524         struct mlx5_core_dev *mdev = priv->mdev;
 525         int tc;
 526         int i;
 527
 528         for (i = 0; i < priv->channels.num; ++i) {
 529                 struct mlx5e_channel *c = priv->channels.c[i];
 530
 531                 for (tc = 0; tc < c->num_tc; tc++) {
 532                         mlx5_core_modify_cq_moderation(mdev,
 533                                                 &c->sq[tc].cq.mcq,
 534                                                 coal->tx_coalesce_usecs,
 535                                                 coal->tx_max_coalesced_frames);
 536                 }
 537
 538                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 539                                                coal->rx_coalesce_usecs,
 540                                                coal->rx_max_coalesced_frames);
 541         }
 542 }
 543
 544 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
 545                                struct ethtool_coalesce *coal)
 546 {
 547         struct dim_cq_moder *rx_moder, *tx_moder;
 548         struct mlx5_core_dev *mdev = priv->mdev;
 549         struct mlx5e_channels new_channels = {};
 550         bool reset_rx, reset_tx;
 551         int err = 0;
 552
 553         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 554                 return -EOPNOTSUPP;
 555
 556         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
 557             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
 558                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
 559                             __func__, MLX5E_MAX_COAL_TIME);
 560                 return -ERANGE;
 561         }
 562
 563         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
 564             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
 565                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
 566                             __func__, MLX5E_MAX_COAL_FRAMES);
 567                 return -ERANGE;
 568         }
 569
 570         mutex_lock(&priv->state_lock);
 571         new_channels.params = priv->channels.params;
 572
 573         rx_moder          = &new_channels.params.rx_cq_moderation;
 574         rx_moder->usec    = coal->rx_coalesce_usecs;
 575         rx_moder->pkts    = coal->rx_max_coalesced_frames;
 576         new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
 577
 578         tx_moder          = &new_channels.params.tx_cq_moderation;
 579         tx_moder->usec    = coal->tx_coalesce_usecs;
 580         tx_moder->pkts    = coal->tx_max_coalesced_frames;
 581         new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
 582
 583         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 584                 priv->channels.params = new_channels.params;
 585                 goto out;
 586         }
 587         /* we are opened */
 588
 589         reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
 590         reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
 591
 592         if (!reset_rx && !reset_tx) {
 593                 mlx5e_set_priv_channels_coalesce(priv, coal);
 594                 priv->channels.params = new_channels.params;
 595                 goto out;
 596         }
 597
 598         if (reset_rx) {
 599                 u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
 600                                           MLX5E_PFLAG_RX_CQE_BASED_MODER);
 601
 602                 mlx5e_reset_rx_moderation(&new_channels.params, mode);
 603         }
 604         if (reset_tx) {
 605                 u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
 606                                           MLX5E_PFLAG_TX_CQE_BASED_MODER);
 607
 608                 mlx5e_reset_tx_moderation(&new_channels.params, mode);
 609         }
 610
 611         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
 612
 613 out:
 614         mutex_unlock(&priv->state_lock);
 615         return err;
 616 }
 617
 618 static int mlx5e_set_coalesce(struct net_device *netdev,
 619                               struct ethtool_coalesce *coal)
 620 {
 621         struct mlx5e_priv *priv    = netdev_priv(netdev);
 622
 623         return mlx5e_ethtool_set_coalesce(priv, coal);
 624 }
 625
 626 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
 627                                         unsigned long *supported_modes,
 628                                         u32 eth_proto_cap)
 629 {
 630         unsigned long proto_cap = eth_proto_cap;
 631         struct ptys2ethtool_config *table;
 632         u32 max_size;
 633         int proto;
 634
 635         mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
 636         for_each_set_bit(proto, &proto_cap, max_size)
 637                 bitmap_or(supported_modes, supported_modes,
 638                           table[proto].supported,
 639                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 640 }
 641
 642 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 643                                     u32 eth_proto_cap, bool ext)
 644 {
 645         unsigned long proto_cap = eth_proto_cap;
 646         struct ptys2ethtool_config *table;
 647         u32 max_size;
 648         int proto;
 649
 650         table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 651         max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 652                          ARRAY_SIZE(ptys2legacy_ethtool_table);
 653
 654         for_each_set_bit(proto, &proto_cap, max_size)
 655                 bitmap_or(advertising_modes, advertising_modes,
 656                           table[proto].advertised,
 657                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 658 }
 659
 660 static const u32 pplm_fec_2_ethtool[] = {
 661         [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
 662         [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
 663         [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
 664         [MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,
 665         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,
 666 };
 667
 668 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
 669 {
 670         int mode = 0;
 671
 672         if (!fec_mode)
 673                 return ETHTOOL_FEC_AUTO;
 674
 675         mode = find_first_bit(&fec_mode, size);
 676
 677         if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
 678                 return pplm_fec_2_ethtool[mode];
 679
 680         return 0;
 681 }
 682
 683 #define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec)            \
 684         do {                                                            \
 685                 if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec)))            \
 686                         __set_bit(ethtool_fec,                          \
 687                                   link_ksettings->link_modes.supported);\
 688         } while (0)
 689
 690 static const u32 pplm_fec_2_ethtool_linkmodes[] = {
 691         [MLX5E_FEC_NOFEC] = ETHTOOL_LINK_MODE_FEC_NONE_BIT,
 692         [MLX5E_FEC_FIRECODE] = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
 693         [MLX5E_FEC_RS_528_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 694         [MLX5E_FEC_RS_544_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 695         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
 696 };
 697
 698 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
 699                                         struct ethtool_link_ksettings *link_ksettings)
 700 {
 701         unsigned long active_fec_long;
 702         u32 active_fec;
 703         u32 bitn;
 704         int err;
 705
 706         err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
 707         if (err)
 708                 return (err == -EOPNOTSUPP) ? 0 : err;
 709
 710         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC,
 711                                       ETHTOOL_LINK_MODE_FEC_NONE_BIT);
 712         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE,
 713                                       ETHTOOL_LINK_MODE_FEC_BASER_BIT);
 714         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514,
 715                                       ETHTOOL_LINK_MODE_FEC_RS_BIT);
 716         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,
 717                                       ETHTOOL_LINK_MODE_FEC_LLRS_BIT);
 718
 719         active_fec_long = active_fec;
 720         /* active fec is a bit set, find out which bit is set and
 721          * advertise the corresponding ethtool bit
 722          */
 723         bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);
 724         if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))
 725                 __set_bit(pplm_fec_2_ethtool_linkmodes[bitn],
 726                           link_ksettings->link_modes.advertising);
 727
 728         return 0;
 729 }
 730
 731 static void ptys2ethtool_supported_advertised_port(struct ethtool_link_ksettings *link_ksettings,
 732                                                    u32 eth_proto_cap,
 733                                                    u8 connector_type, bool ext)
 734 {
 735         if ((!connector_type && !ext) || connector_type >= MLX5E_CONNECTOR_TYPE_NUMBER) {
 736                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 737                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 738                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 739                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 740                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 741                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 742                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 743                                                              supported,
 744                                                              FIBRE);
 745                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 746                                                              advertising,
 747                                                              FIBRE);
 748                 }
 749
 750                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 751                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 752                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 753                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 754                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 755                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 756                                                              supported,
 757                                                              Backplane);
 758                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 759                                                              advertising,
 760                                                              Backplane);
 761                 }
 762                 return;
 763         }
 764
 765         switch (connector_type) {
 766         case MLX5E_PORT_TP:
 767                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 768                                                      supported, TP);
 769                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 770                                                      advertising, TP);
 771                 break;
 772         case MLX5E_PORT_AUI:
 773                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 774                                                      supported, AUI);
 775                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 776                                                      advertising, AUI);
 777                 break;
 778         case MLX5E_PORT_BNC:
 779                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 780                                                      supported, BNC);
 781                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 782                                                      advertising, BNC);
 783                 break;
 784         case MLX5E_PORT_MII:
 785                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 786                                                      supported, MII);
 787                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 788                                                      advertising, MII);
 789                 break;
 790         case MLX5E_PORT_FIBRE:
 791                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 792                                                      supported, FIBRE);
 793                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 794                                                      advertising, FIBRE);
 795                 break;
 796         case MLX5E_PORT_DA:
 797                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 798                                                      supported, Backplane);
 799                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 800                                                      advertising, Backplane);
 801                 break;
 802         case MLX5E_PORT_NONE:
 803         case MLX5E_PORT_OTHER:
 804         default:
 805                 break;
 806         }
 807 }
 808
 809 static void get_speed_duplex(struct net_device *netdev,
 810                              u32 eth_proto_oper, bool force_legacy,
 811                              u16 data_rate_oper,
 812                              struct ethtool_link_ksettings *link_ksettings)
 813 {
 814         struct mlx5e_priv *priv = netdev_priv(netdev);
 815         u32 speed = SPEED_UNKNOWN;
 816         u8 duplex = DUPLEX_UNKNOWN;
 817
 818         if (!netif_carrier_ok(netdev))
 819                 goto out;
 820
 821         speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
 822         if (!speed) {
 823                 if (data_rate_oper)
 824                         speed = 100 * data_rate_oper;
 825                 else
 826                         speed = SPEED_UNKNOWN;
 827                 goto out;
 828         }
 829
 830         duplex = DUPLEX_FULL;
 831
 832 out:
 833         link_ksettings->base.speed = speed;
 834         link_ksettings->base.duplex = duplex;
 835 }
 836
 837 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
 838                           struct ethtool_link_ksettings *link_ksettings)
 839 {
 840         unsigned long *supported = link_ksettings->link_modes.supported;
 841         ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
 842
 843         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 844 }
 845
 846 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
 847                             struct ethtool_link_ksettings *link_ksettings,
 848                             bool ext)
 849 {
 850         unsigned long *advertising = link_ksettings->link_modes.advertising;
 851         ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
 852
 853         if (rx_pause)
 854                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 855         if (tx_pause ^ rx_pause)
 856                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 857 }
 858
 859 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
 860                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
 861                 [MLX5E_PORT_NONE]               = PORT_NONE,
 862                 [MLX5E_PORT_TP]                 = PORT_TP,
 863                 [MLX5E_PORT_AUI]                = PORT_AUI,
 864                 [MLX5E_PORT_BNC]                = PORT_BNC,
 865                 [MLX5E_PORT_MII]                = PORT_MII,
 866                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
 867                 [MLX5E_PORT_DA]                 = PORT_DA,
 868                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
 869         };
 870
 871 static u8 get_connector_port(u32 eth_proto, u8 connector_type, bool ext)
 872 {
 873         if ((connector_type || ext) && connector_type < MLX5E_CONNECTOR_TYPE_NUMBER)
 874                 return ptys2connector_type[connector_type];
 875
 876         if (eth_proto &
 877             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
 878              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
 879              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
 880              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 881                 return PORT_FIBRE;
 882         }
 883
 884         if (eth_proto &
 885             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
 886              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
 887              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 888                 return PORT_DA;
 889         }
 890
 891         if (eth_proto &
 892             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
 893              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
 894              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
 895              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 896                 return PORT_NONE;
 897         }
 898
 899         return PORT_OTHER;
 900 }
 901
 902 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
 903                                struct ethtool_link_ksettings *link_ksettings)
 904 {
 905         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 906         bool ext = mlx5e_ptys_ext_supported(mdev);
 907
 908         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
 909 }
 910
 911 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
 912                                      struct ethtool_link_ksettings *link_ksettings)
 913 {
 914         struct mlx5_core_dev *mdev = priv->mdev;
 915         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
 916         u32 eth_proto_admin;
 917         u8 an_disable_admin;
 918         u16 data_rate_oper;
 919         u32 eth_proto_oper;
 920         u32 eth_proto_cap;
 921         u8 connector_type;
 922         u32 rx_pause = 0;
 923         u32 tx_pause = 0;
 924         u32 eth_proto_lp;
 925         bool admin_ext;
 926         u8 an_status;
 927         bool ext;
 928         int err;
 929
 930         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
 931         if (err) {
 932                 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
 933                            __func__, err);
 934                 goto err_query_regs;
 935         }
 936         ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
 937         eth_proto_cap    = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 938                                               eth_proto_capability);
 939         eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 940                                               eth_proto_admin);
 941         /* Fields: eth_proto_admin and ext_eth_proto_admin  are
 942          * mutually exclusive. Hence try reading legacy advertising
 943          * when extended advertising is zero.
 944          * admin_ext indicates which proto_admin (ext vs. legacy)
 945          * should be read and interpreted
 946          */
 947         admin_ext = ext;
 948         if (ext && !eth_proto_admin) {
 949                 eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
 950                                                       eth_proto_admin);
 951                 admin_ext = false;
 952         }
 953
 954         eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
 955                                               eth_proto_oper);
 956         eth_proto_lp        = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 957         an_disable_admin    = MLX5_GET(ptys_reg, out, an_disable_admin);
 958         an_status           = MLX5_GET(ptys_reg, out, an_status);
 959         connector_type      = MLX5_GET(ptys_reg, out, connector_type);
 960         data_rate_oper      = MLX5_GET(ptys_reg, out, data_rate_oper);
 961
 962         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 963
 964         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 965         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 966
 967         get_supported(mdev, eth_proto_cap, link_ksettings);
 968         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
 969                         admin_ext);
 970         get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
 971                          data_rate_oper, link_ksettings);
 972
 973         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 974
 975         link_ksettings->base.port = get_connector_port(eth_proto_oper,
 976                                                        connector_type, ext);
 977         ptys2ethtool_supported_advertised_port(link_ksettings, eth_proto_admin,
 978                                                connector_type, ext);
 979         get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
 980
 981         if (an_status == MLX5_AN_COMPLETE)
 982                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 983                                                      lp_advertising, Autoneg);
 984
 985         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
 986                                                           AUTONEG_ENABLE;
 987         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
 988                                              Autoneg);
 989
 990         err = get_fec_supported_advertised(mdev, link_ksettings);
 991         if (err) {
 992                 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
 993                            __func__, err);
 994                 err = 0; /* don't fail caps query because of FEC error */
 995         }
 996
 997         if (!an_disable_admin)
 998                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 999                                                      advertising, Autoneg);
1000
1001 err_query_regs:
1002         return err;
1003 }
1004
1005 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1006                                     struct ethtool_link_ksettings *link_ksettings)
1007 {
1008         struct mlx5e_priv *priv = netdev_priv(netdev);
1009
1010         return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
1011 }
1012
1013 static int mlx5e_speed_validate(struct net_device *netdev, bool ext,
1014                                 const unsigned long link_modes, u8 autoneg)
1015 {
1016         /* Extended link-mode has no speed limitations. */
1017         if (ext)
1018                 return 0;
1019
1020         if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1021             autoneg != AUTONEG_ENABLE) {
1022                 netdev_err(netdev, "%s: 56G link speed requires autoneg enabled\n",
1023                            __func__);
1024                 return -EINVAL;
1025         }
1026         return 0;
1027 }
1028
1029 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1030 {
1031         u32 i, ptys_modes = 0;
1032
1033         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1034                 if (*ptys2legacy_ethtool_table[i].advertised == 0)
1035                         continue;
1036                 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
1037                                       link_modes,
1038                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
1039                         ptys_modes |= MLX5E_PROT_MASK(i);
1040         }
1041
1042         return ptys_modes;
1043 }
1044
1045 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
1046 {
1047         u32 i, ptys_modes = 0;
1048         unsigned long modes[2];
1049
1050         for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1051                 if (ptys2ext_ethtool_table[i].advertised[0] == 0 &&
1052                     ptys2ext_ethtool_table[i].advertised[1] == 0)
1053                         continue;
1054                 memset(modes, 0, sizeof(modes));
1055                 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1056                            link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1057
1058                 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1059                     modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1060                         ptys_modes |= MLX5E_PROT_MASK(i);
1061         }
1062         return ptys_modes;
1063 }
1064
1065 static bool ext_link_mode_requested(const unsigned long *adver)
1066 {
1067 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1068         int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1069         __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1070
1071         bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1072         return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1073 }
1074
1075 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1076 {
1077         bool ext_link_mode = ext_link_mode_requested(adver);
1078
1079         return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1080 }
1081
1082 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1083                                      const struct ethtool_link_ksettings *link_ksettings)
1084 {
1085         struct mlx5_core_dev *mdev = priv->mdev;
1086         struct mlx5e_port_eth_proto eproto;
1087         const unsigned long *adver;
1088         bool an_changes = false;
1089         u8 an_disable_admin;
1090         bool ext_supported;
1091         u8 an_disable_cap;
1092         bool an_disable;
1093         u32 link_modes;
1094         u8 an_status;
1095         u8 autoneg;
1096         u32 speed;
1097         bool ext;
1098         int err;
1099
1100         u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1101
1102         adver = link_ksettings->link_modes.advertising;
1103         autoneg = link_ksettings->base.autoneg;
1104         speed = link_ksettings->base.speed;
1105
1106         ext_supported = mlx5e_ptys_ext_supported(mdev);
1107         ext = ext_requested(autoneg, adver, ext_supported);
1108         if (!ext_supported && ext)
1109                 return -EOPNOTSUPP;
1110
1111         ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1112                                   mlx5e_ethtool2ptys_adver_link;
1113         err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1114         if (err) {
1115                 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1116                            __func__, err);
1117                 goto out;
1118         }
1119         link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1120                 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1121
1122         err = mlx5e_speed_validate(priv->netdev, ext, link_modes, autoneg);
1123         if (err)
1124                 goto out;
1125
1126         link_modes = link_modes & eproto.cap;
1127         if (!link_modes) {
1128                 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1129                            __func__);
1130                 err = -EINVAL;
1131                 goto out;
1132         }
1133
1134         mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1135                                     &an_disable_admin);
1136
1137         an_disable = autoneg == AUTONEG_DISABLE;
1138         an_changes = ((!an_disable && an_disable_admin) ||
1139                       (an_disable && !an_disable_admin));
1140
1141         if (!an_changes && link_modes == eproto.admin)
1142                 goto out;
1143
1144         mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1145         mlx5_toggle_port_link(mdev);
1146
1147 out:
1148         return err;
1149 }
1150
1151 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1152                                     const struct ethtool_link_ksettings *link_ksettings)
1153 {
1154         struct mlx5e_priv *priv = netdev_priv(netdev);
1155
1156         return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1157 }
1158
1159 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1160 {
1161         return sizeof(priv->rss_params.toeplitz_hash_key);
1162 }
1163
1164 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1165 {
1166         struct mlx5e_priv *priv = netdev_priv(netdev);
1167
1168         return mlx5e_ethtool_get_rxfh_key_size(priv);
1169 }
1170
1171 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1172 {
1173         return MLX5E_INDIR_RQT_SIZE;
1174 }
1175
1176 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1177 {
1178         struct mlx5e_priv *priv = netdev_priv(netdev);
1179
1180         return mlx5e_ethtool_get_rxfh_indir_size(priv);
1181 }
1182
1183 int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1184                    u8 *hfunc)
1185 {
1186         struct mlx5e_priv *priv = netdev_priv(netdev);
1187         struct mlx5e_rss_params *rss = &priv->rss_params;
1188
1189         if (indir)
1190                 memcpy(indir, rss->indirection_rqt,
1191                        sizeof(rss->indirection_rqt));
1192
1193         if (key)
1194                 memcpy(key, rss->toeplitz_hash_key,
1195                        sizeof(rss->toeplitz_hash_key));
1196
1197         if (hfunc)
1198                 *hfunc = rss->hfunc;
1199
1200         return 0;
1201 }
1202
1203 int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1204                    const u8 *key, const u8 hfunc)
1205 {
1206         struct mlx5e_priv *priv = netdev_priv(dev);
1207         struct mlx5e_rss_params *rss = &priv->rss_params;
1208         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1209         bool refresh_tirs = false;
1210         bool refresh_rqt = false;
1211         void *in;
1212
1213         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1214             (hfunc != ETH_RSS_HASH_XOR) &&
1215             (hfunc != ETH_RSS_HASH_TOP))
1216                 return -EINVAL;
1217
1218         in = kvzalloc(inlen, GFP_KERNEL);
1219         if (!in)
1220                 return -ENOMEM;
1221
1222         mutex_lock(&priv->state_lock);
1223
1224         if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
1225                 rss->hfunc = hfunc;
1226                 refresh_rqt = true;
1227                 refresh_tirs = true;
1228         }
1229
1230         if (indir) {
1231                 memcpy(rss->indirection_rqt, indir,
1232                        sizeof(rss->indirection_rqt));
1233                 refresh_rqt = true;
1234         }
1235
1236         if (key) {
1237                 memcpy(rss->toeplitz_hash_key, key,
1238                        sizeof(rss->toeplitz_hash_key));
1239                 refresh_tirs = refresh_tirs || rss->hfunc == ETH_RSS_HASH_TOP;
1240         }
1241
1242         if (refresh_rqt && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1243                 struct mlx5e_redirect_rqt_param rrp = {
1244                         .is_rss = true,
1245                         {
1246                                 .rss = {
1247                                         .hfunc = rss->hfunc,
1248                                         .channels  = &priv->channels,
1249                                 },
1250                         },
1251                 };
1252                 u32 rqtn = priv->indir_rqt.rqtn;
1253
1254                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1255         }
1256
1257         if (refresh_tirs)
1258                 mlx5e_modify_tirs_hash(priv, in);
1259
1260         mutex_unlock(&priv->state_lock);
1261
1262         kvfree(in);
1263
1264         return 0;
1265 }
1266
1267 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
1268 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
1269 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
1270 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
1271 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1272         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1273               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1274
1275 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1276                                          u16 *pfc_prevention_tout)
1277 {
1278         struct mlx5e_priv *priv    = netdev_priv(netdev);
1279         struct mlx5_core_dev *mdev = priv->mdev;
1280
1281         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1282             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1283                 return -EOPNOTSUPP;
1284
1285         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1286 }
1287
1288 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1289                                          u16 pfc_preven)
1290 {
1291         struct mlx5e_priv *priv = netdev_priv(netdev);
1292         struct mlx5_core_dev *mdev = priv->mdev;
1293         u16 critical_tout;
1294         u16 minor;
1295
1296         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1297             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1298                 return -EOPNOTSUPP;
1299
1300         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1301                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1302                         pfc_preven;
1303
1304         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1305             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1306              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1307                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1308                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1309                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1310                 return -EINVAL;
1311         }
1312
1313         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1314         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1315                                              minor);
1316 }
1317
1318 static int mlx5e_get_tunable(struct net_device *dev,
1319                              const struct ethtool_tunable *tuna,
1320                              void *data)
1321 {
1322         int err;
1323
1324         switch (tuna->id) {
1325         case ETHTOOL_PFC_PREVENTION_TOUT:
1326                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1327                 break;
1328         default:
1329                 err = -EINVAL;
1330                 break;
1331         }
1332
1333         return err;
1334 }
1335
1336 static int mlx5e_set_tunable(struct net_device *dev,
1337                              const struct ethtool_tunable *tuna,
1338                              const void *data)
1339 {
1340         struct mlx5e_priv *priv = netdev_priv(dev);
1341         int err;
1342
1343         mutex_lock(&priv->state_lock);
1344
1345         switch (tuna->id) {
1346         case ETHTOOL_PFC_PREVENTION_TOUT:
1347                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1348                 break;
1349         default:
1350                 err = -EINVAL;
1351                 break;
1352         }
1353
1354         mutex_unlock(&priv->state_lock);
1355         return err;
1356 }
1357
1358 static void mlx5e_get_pause_stats(struct net_device *netdev,
1359                                   struct ethtool_pause_stats *pause_stats)
1360 {
1361         struct mlx5e_priv *priv = netdev_priv(netdev);
1362
1363         mlx5e_stats_pause_get(priv, pause_stats);
1364 }
1365
1366 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1367                                   struct ethtool_pauseparam *pauseparam)
1368 {
1369         struct mlx5_core_dev *mdev = priv->mdev;
1370         int err;
1371
1372         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1373                                     &pauseparam->tx_pause);
1374         if (err) {
1375                 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1376                            __func__, err);
1377         }
1378 }
1379
1380 static void mlx5e_get_pauseparam(struct net_device *netdev,
1381                                  struct ethtool_pauseparam *pauseparam)
1382 {
1383         struct mlx5e_priv *priv = netdev_priv(netdev);
1384
1385         mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1386 }
1387
1388 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1389                                  struct ethtool_pauseparam *pauseparam)
1390 {
1391         struct mlx5_core_dev *mdev = priv->mdev;
1392         int err;
1393
1394         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1395                 return -EOPNOTSUPP;
1396
1397         if (pauseparam->autoneg)
1398                 return -EINVAL;
1399
1400         err = mlx5_set_port_pause(mdev,
1401                                   pauseparam->rx_pause ? 1 : 0,
1402                                   pauseparam->tx_pause ? 1 : 0);
1403         if (err) {
1404                 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1405                            __func__, err);
1406         }
1407
1408         return err;
1409 }
1410
1411 static int mlx5e_set_pauseparam(struct net_device *netdev,
1412                                 struct ethtool_pauseparam *pauseparam)
1413 {
1414         struct mlx5e_priv *priv = netdev_priv(netdev);
1415
1416         return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1417 }
1418
1419 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1420                               struct ethtool_ts_info *info)
1421 {
1422         struct mlx5_core_dev *mdev = priv->mdev;
1423
1424         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1425
1426         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1427             info->phc_index == -1)
1428                 return 0;
1429
1430         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1431                                 SOF_TIMESTAMPING_RX_HARDWARE |
1432                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1433
1434         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1435                          BIT(HWTSTAMP_TX_ON);
1436
1437         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1438                            BIT(HWTSTAMP_FILTER_ALL);
1439
1440         return 0;
1441 }
1442
1443 static int mlx5e_get_ts_info(struct net_device *dev,
1444                              struct ethtool_ts_info *info)
1445 {
1446         struct mlx5e_priv *priv = netdev_priv(dev);
1447
1448         return mlx5e_ethtool_get_ts_info(priv, info);
1449 }
1450
1451 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1452 {
1453         __u32 ret = 0;
1454
1455         if (MLX5_CAP_GEN(mdev, wol_g))
1456                 ret |= WAKE_MAGIC;
1457
1458         if (MLX5_CAP_GEN(mdev, wol_s))
1459                 ret |= WAKE_MAGICSECURE;
1460
1461         if (MLX5_CAP_GEN(mdev, wol_a))
1462                 ret |= WAKE_ARP;
1463
1464         if (MLX5_CAP_GEN(mdev, wol_b))
1465                 ret |= WAKE_BCAST;
1466
1467         if (MLX5_CAP_GEN(mdev, wol_m))
1468                 ret |= WAKE_MCAST;
1469
1470         if (MLX5_CAP_GEN(mdev, wol_u))
1471                 ret |= WAKE_UCAST;
1472
1473         if (MLX5_CAP_GEN(mdev, wol_p))
1474                 ret |= WAKE_PHY;
1475
1476         return ret;
1477 }
1478
1479 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1480 {
1481         __u32 ret = 0;
1482
1483         if (mode & MLX5_WOL_MAGIC)
1484                 ret |= WAKE_MAGIC;
1485
1486         if (mode & MLX5_WOL_SECURED_MAGIC)
1487                 ret |= WAKE_MAGICSECURE;
1488
1489         if (mode & MLX5_WOL_ARP)
1490                 ret |= WAKE_ARP;
1491
1492         if (mode & MLX5_WOL_BROADCAST)
1493                 ret |= WAKE_BCAST;
1494
1495         if (mode & MLX5_WOL_MULTICAST)
1496                 ret |= WAKE_MCAST;
1497
1498         if (mode & MLX5_WOL_UNICAST)
1499                 ret |= WAKE_UCAST;
1500
1501         if (mode & MLX5_WOL_PHY_ACTIVITY)
1502                 ret |= WAKE_PHY;
1503
1504         return ret;
1505 }
1506
1507 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1508 {
1509         u8 ret = 0;
1510
1511         if (mode & WAKE_MAGIC)
1512                 ret |= MLX5_WOL_MAGIC;
1513
1514         if (mode & WAKE_MAGICSECURE)
1515                 ret |= MLX5_WOL_SECURED_MAGIC;
1516
1517         if (mode & WAKE_ARP)
1518                 ret |= MLX5_WOL_ARP;
1519
1520         if (mode & WAKE_BCAST)
1521                 ret |= MLX5_WOL_BROADCAST;
1522
1523         if (mode & WAKE_MCAST)
1524                 ret |= MLX5_WOL_MULTICAST;
1525
1526         if (mode & WAKE_UCAST)
1527                 ret |= MLX5_WOL_UNICAST;
1528
1529         if (mode & WAKE_PHY)
1530                 ret |= MLX5_WOL_PHY_ACTIVITY;
1531
1532         return ret;
1533 }
1534
1535 static void mlx5e_get_wol(struct net_device *netdev,
1536                           struct ethtool_wolinfo *wol)
1537 {
1538         struct mlx5e_priv *priv = netdev_priv(netdev);
1539         struct mlx5_core_dev *mdev = priv->mdev;
1540         u8 mlx5_wol_mode;
1541         int err;
1542
1543         memset(wol, 0, sizeof(*wol));
1544
1545         wol->supported = mlx5e_get_wol_supported(mdev);
1546         if (!wol->supported)
1547                 return;
1548
1549         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1550         if (err)
1551                 return;
1552
1553         wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1554 }
1555
1556 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1557 {
1558         struct mlx5e_priv *priv = netdev_priv(netdev);
1559         struct mlx5_core_dev *mdev = priv->mdev;
1560         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1561         u32 mlx5_wol_mode;
1562
1563         if (!wol_supported)
1564                 return -EOPNOTSUPP;
1565
1566         if (wol->wolopts & ~wol_supported)
1567                 return -EINVAL;
1568
1569         mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1570
1571         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1572 }
1573
1574 static int mlx5e_get_fecparam(struct net_device *netdev,
1575                               struct ethtool_fecparam *fecparam)
1576 {
1577         struct mlx5e_priv *priv = netdev_priv(netdev);
1578         struct mlx5_core_dev *mdev = priv->mdev;
1579         u16 fec_configured;
1580         u32 fec_active;
1581         int err;
1582
1583         err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1584
1585         if (err)
1586                 return err;
1587
1588         fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,
1589                                                 sizeof(unsigned long) * BITS_PER_BYTE);
1590
1591         if (!fecparam->active_fec)
1592                 return -EOPNOTSUPP;
1593
1594         fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,
1595                                          sizeof(unsigned long) * BITS_PER_BYTE);
1596
1597         return 0;
1598 }
1599
1600 static int mlx5e_set_fecparam(struct net_device *netdev,
1601                               struct ethtool_fecparam *fecparam)
1602 {
1603         struct mlx5e_priv *priv = netdev_priv(netdev);
1604         struct mlx5_core_dev *mdev = priv->mdev;
1605         u16 fec_policy = 0;
1606         int mode;
1607         int err;
1608
1609         if (bitmap_weight((unsigned long *)&fecparam->fec,
1610                           ETHTOOL_FEC_LLRS_BIT + 1) > 1)
1611                 return -EOPNOTSUPP;
1612
1613         for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1614                 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1615                         continue;
1616                 fec_policy |= (1 << mode);
1617                 break;
1618         }
1619
1620         err = mlx5e_set_fec_mode(mdev, fec_policy);
1621
1622         if (err)
1623                 return err;
1624
1625         mlx5_toggle_port_link(mdev);
1626
1627         return 0;
1628 }
1629
1630 static u32 mlx5e_get_msglevel(struct net_device *dev)
1631 {
1632         return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1633 }
1634
1635 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1636 {
1637         ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1638 }
1639
1640 static int mlx5e_set_phys_id(struct net_device *dev,
1641                              enum ethtool_phys_id_state state)
1642 {
1643         struct mlx5e_priv *priv = netdev_priv(dev);
1644         struct mlx5_core_dev *mdev = priv->mdev;
1645         u16 beacon_duration;
1646
1647         if (!MLX5_CAP_GEN(mdev, beacon_led))
1648                 return -EOPNOTSUPP;
1649
1650         switch (state) {
1651         case ETHTOOL_ID_ACTIVE:
1652                 beacon_duration = MLX5_BEACON_DURATION_INF;
1653                 break;
1654         case ETHTOOL_ID_INACTIVE:
1655                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1656                 break;
1657         default:
1658                 return -EOPNOTSUPP;
1659         }
1660
1661         return mlx5_set_port_beacon(mdev, beacon_duration);
1662 }
1663
1664 static int mlx5e_get_module_info(struct net_device *netdev,
1665                                  struct ethtool_modinfo *modinfo)
1666 {
1667         struct mlx5e_priv *priv = netdev_priv(netdev);
1668         struct mlx5_core_dev *dev = priv->mdev;
1669         int size_read = 0;
1670         u8 data[4] = {0};
1671
1672         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1673         if (size_read < 2)
1674                 return -EIO;
1675
1676         /* data[0] = identifier byte */
1677         switch (data[0]) {
1678         case MLX5_MODULE_ID_QSFP:
1679                 modinfo->type       = ETH_MODULE_SFF_8436;
1680                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1681                 break;
1682         case MLX5_MODULE_ID_QSFP_PLUS:
1683         case MLX5_MODULE_ID_QSFP28:
1684                 /* data[1] = revision id */
1685                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1686                         modinfo->type       = ETH_MODULE_SFF_8636;
1687                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1688                 } else {
1689                         modinfo->type       = ETH_MODULE_SFF_8436;
1690                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1691                 }
1692                 break;
1693         case MLX5_MODULE_ID_SFP:
1694                 modinfo->type       = ETH_MODULE_SFF_8472;
1695                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1696                 break;
1697         default:
1698                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1699                            __func__, data[0]);
1700                 return -EINVAL;
1701         }
1702
1703         return 0;
1704 }
1705
1706 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1707                                    struct ethtool_eeprom *ee,
1708                                    u8 *data)
1709 {
1710         struct mlx5e_priv *priv = netdev_priv(netdev);
1711         struct mlx5_core_dev *mdev = priv->mdev;
1712         int offset = ee->offset;
1713         int size_read;
1714         int i = 0;
1715
1716         if (!ee->len)
1717                 return -EINVAL;
1718
1719         memset(data, 0, ee->len);
1720
1721         while (i < ee->len) {
1722                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1723                                                      data + i);
1724
1725                 if (!size_read)
1726                         /* Done reading */
1727                         return 0;
1728
1729                 if (size_read < 0) {
1730                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1731                                    __func__, size_read);
1732                         return 0;
1733                 }
1734
1735                 i += size_read;
1736                 offset += size_read;
1737         }
1738
1739         return 0;
1740 }
1741
1742 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1743                                struct ethtool_flash *flash)
1744 {
1745         struct mlx5_core_dev *mdev = priv->mdev;
1746         struct net_device *dev = priv->netdev;
1747         const struct firmware *fw;
1748         int err;
1749
1750         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1751                 return -EOPNOTSUPP;
1752
1753         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1754         if (err)
1755                 return err;
1756
1757         dev_hold(dev);
1758         rtnl_unlock();
1759
1760         err = mlx5_firmware_flash(mdev, fw, NULL);
1761         release_firmware(fw);
1762
1763         rtnl_lock();
1764         dev_put(dev);
1765         return err;
1766 }
1767
1768 static int mlx5e_flash_device(struct net_device *dev,
1769                               struct ethtool_flash *flash)
1770 {
1771         struct mlx5e_priv *priv = netdev_priv(dev);
1772
1773         return mlx5e_ethtool_flash_device(priv, flash);
1774 }
1775
1776 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1777                                      bool is_rx_cq)
1778 {
1779         struct mlx5e_priv *priv = netdev_priv(netdev);
1780         struct mlx5_core_dev *mdev = priv->mdev;
1781         struct mlx5e_channels new_channels = {};
1782         bool mode_changed;
1783         u8 cq_period_mode, current_cq_period_mode;
1784
1785         cq_period_mode = enable ?
1786                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1787                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1788         current_cq_period_mode = is_rx_cq ?
1789                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1790                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1791         mode_changed = cq_period_mode != current_cq_period_mode;
1792
1793         if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1794             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1795                 return -EOPNOTSUPP;
1796
1797         if (!mode_changed)
1798                 return 0;
1799
1800         new_channels.params = priv->channels.params;
1801         if (is_rx_cq)
1802                 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1803         else
1804                 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1805
1806         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1807                 priv->channels.params = new_channels.params;
1808                 return 0;
1809         }
1810
1811         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1812 }
1813
1814 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1815 {
1816         return set_pflag_cqe_based_moder(netdev, enable, false);
1817 }
1818
1819 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1820 {
1821         return set_pflag_cqe_based_moder(netdev, enable, true);
1822 }
1823
1824 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1825 {
1826         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1827         struct mlx5e_channels new_channels = {};
1828         int err = 0;
1829
1830         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1831                 return new_val ? -EOPNOTSUPP : 0;
1832
1833         if (curr_val == new_val)
1834                 return 0;
1835
1836         new_channels.params = priv->channels.params;
1837         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1838
1839         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1840                 priv->channels.params = new_channels.params;
1841                 return 0;
1842         }
1843
1844         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1845         if (err)
1846                 return err;
1847
1848         mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1849                   MLX5E_GET_PFLAG(&priv->channels.params,
1850                                   MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1851
1852         return 0;
1853 }
1854
1855 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1856                                      bool enable)
1857 {
1858         struct mlx5e_priv *priv = netdev_priv(netdev);
1859         struct mlx5_core_dev *mdev = priv->mdev;
1860
1861         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1862                 return -EOPNOTSUPP;
1863
1864         if (enable && priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE) {
1865                 netdev_err(netdev, "Can't enable cqe compression while timestamping is enabled.\n");
1866                 return -EINVAL;
1867         }
1868
1869         mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1870         priv->channels.params.rx_cqe_compress_def = enable;
1871
1872         return 0;
1873 }
1874
1875 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1876 {
1877         struct mlx5e_priv *priv = netdev_priv(netdev);
1878         struct mlx5_core_dev *mdev = priv->mdev;
1879         struct mlx5e_channels new_channels = {};
1880
1881         if (enable) {
1882                 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1883                         return -EOPNOTSUPP;
1884                 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1885                         return -EINVAL;
1886         } else if (priv->channels.params.lro_en) {
1887                 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1888                 return -EINVAL;
1889         }
1890
1891         new_channels.params = priv->channels.params;
1892
1893         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1894         mlx5e_set_rq_type(mdev, &new_channels.params);
1895
1896         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1897                 priv->channels.params = new_channels.params;
1898                 return 0;
1899         }
1900
1901         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1902 }
1903
1904 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1905 {
1906         struct mlx5e_priv *priv = netdev_priv(netdev);
1907         struct mlx5e_channels *channels = &priv->channels;
1908         struct mlx5e_channel *c;
1909         int i;
1910
1911         if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1912             priv->channels.params.xdp_prog)
1913                 return 0;
1914
1915         for (i = 0; i < channels->num; i++) {
1916                 c = channels->c[i];
1917                 if (enable)
1918                         __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1919                 else
1920                         __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1921         }
1922
1923         return 0;
1924 }
1925
1926 static int set_pflag_tx_mpwqe_common(struct net_device *netdev, u32 flag, bool enable)
1927 {
1928         struct mlx5e_priv *priv = netdev_priv(netdev);
1929         struct mlx5_core_dev *mdev = priv->mdev;
1930         struct mlx5e_channels new_channels = {};
1931         int err;
1932
1933         if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
1934                 return -EOPNOTSUPP;
1935
1936         new_channels.params = priv->channels.params;
1937
1938         MLX5E_SET_PFLAG(&new_channels.params, flag, enable);
1939
1940         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1941                 priv->channels.params = new_channels.params;
1942                 return 0;
1943         }
1944
1945         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1946         return err;
1947 }
1948
1949 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
1950 {
1951         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
1952 }
1953
1954 static int set_pflag_skb_tx_mpwqe(struct net_device *netdev, bool enable)
1955 {
1956         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_SKB_TX_MPWQE, enable);
1957 }
1958
1959 static int set_pflag_tx_port_ts(struct net_device *netdev, bool enable)
1960 {
1961         struct mlx5e_priv *priv = netdev_priv(netdev);
1962         struct mlx5_core_dev *mdev = priv->mdev;
1963         struct mlx5e_channels new_channels = {};
1964         int err;
1965
1966         if (!MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn))
1967                 return -EOPNOTSUPP;
1968
1969         new_channels.params = priv->channels.params;
1970         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_TX_PORT_TS, enable);
1971         /* No need to verify SQ stop room as
1972          * ptpsq.txqsq.stop_room <= generic_sq->stop_room, and both
1973          * has the same log_sq_size.
1974          */
1975
1976         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1977                 priv->channels.params = new_channels.params;
1978                 err = mlx5e_num_channels_changed(priv);
1979                 goto out;
1980         }
1981
1982         err = mlx5e_safe_switch_channels(priv, &new_channels,
1983                                          mlx5e_num_channels_changed_ctx, NULL);
1984 out:
1985         if (!err)
1986                 priv->port_ptp_opened = true;
1987
1988         return err;
1989 }
1990
1991 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
1992         { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
1993         { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
1994         { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
1995         { "rx_striding_rq",      set_pflag_rx_striding_rq },
1996         { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
1997         { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
1998         { "skb_tx_mpwqe",        set_pflag_skb_tx_mpwqe },
1999         { "tx_port_ts",          set_pflag_tx_port_ts },
2000 };
2001
2002 static int mlx5e_handle_pflag(struct net_device *netdev,
2003                               u32 wanted_flags,
2004                               enum mlx5e_priv_flag flag)
2005 {
2006         struct mlx5e_priv *priv = netdev_priv(netdev);
2007         bool enable = !!(wanted_flags & BIT(flag));
2008         u32 changes = wanted_flags ^ priv->channels.params.pflags;
2009         int err;
2010
2011         if (!(changes & BIT(flag)))
2012                 return 0;
2013
2014         err = mlx5e_priv_flags[flag].handler(netdev, enable);
2015         if (err) {
2016                 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
2017                            enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
2018                 return err;
2019         }
2020
2021         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
2022         return 0;
2023 }
2024
2025 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
2026 {
2027         struct mlx5e_priv *priv = netdev_priv(netdev);
2028         enum mlx5e_priv_flag pflag;
2029         int err;
2030
2031         mutex_lock(&priv->state_lock);
2032
2033         for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
2034                 err = mlx5e_handle_pflag(netdev, pflags, pflag);
2035                 if (err)
2036                         break;
2037         }
2038
2039         mutex_unlock(&priv->state_lock);
2040
2041         /* Need to fix some features.. */
2042         netdev_update_features(netdev);
2043
2044         return err;
2045 }
2046
2047 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
2048 {
2049         struct mlx5e_priv *priv = netdev_priv(netdev);
2050
2051         return priv->channels.params.pflags;
2052 }
2053
2054 int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
2055                     u32 *rule_locs)
2056 {
2057         struct mlx5e_priv *priv = netdev_priv(dev);
2058
2059         /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
2060          * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
2061          * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
2062          * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
2063          */
2064         if (info->cmd == ETHTOOL_GRXRINGS) {
2065                 info->data = priv->channels.params.num_channels;
2066                 return 0;
2067         }
2068
2069         return mlx5e_ethtool_get_rxnfc(dev, info, rule_locs);
2070 }
2071
2072 int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2073 {
2074         return mlx5e_ethtool_set_rxnfc(dev, cmd);
2075 }
2076
2077 const struct ethtool_ops mlx5e_ethtool_ops = {
2078         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2079                                      ETHTOOL_COALESCE_MAX_FRAMES |
2080                                      ETHTOOL_COALESCE_USE_ADAPTIVE,
2081         .get_drvinfo       = mlx5e_get_drvinfo,
2082         .get_link          = ethtool_op_get_link,
2083         .get_strings       = mlx5e_get_strings,
2084         .get_sset_count    = mlx5e_get_sset_count,
2085         .get_ethtool_stats = mlx5e_get_ethtool_stats,
2086         .get_ringparam     = mlx5e_get_ringparam,
2087         .set_ringparam     = mlx5e_set_ringparam,
2088         .get_channels      = mlx5e_get_channels,
2089         .set_channels      = mlx5e_set_channels,
2090         .get_coalesce      = mlx5e_get_coalesce,
2091         .set_coalesce      = mlx5e_set_coalesce,
2092         .get_link_ksettings  = mlx5e_get_link_ksettings,
2093         .set_link_ksettings  = mlx5e_set_link_ksettings,
2094         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
2095         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
2096         .get_rxfh          = mlx5e_get_rxfh,
2097         .set_rxfh          = mlx5e_set_rxfh,
2098         .get_rxnfc         = mlx5e_get_rxnfc,
2099         .set_rxnfc         = mlx5e_set_rxnfc,
2100         .get_tunable       = mlx5e_get_tunable,
2101         .set_tunable       = mlx5e_set_tunable,
2102         .get_pause_stats   = mlx5e_get_pause_stats,
2103         .get_pauseparam    = mlx5e_get_pauseparam,
2104         .set_pauseparam    = mlx5e_set_pauseparam,
2105         .get_ts_info       = mlx5e_get_ts_info,
2106         .set_phys_id       = mlx5e_set_phys_id,
2107         .get_wol           = mlx5e_get_wol,
2108         .set_wol           = mlx5e_set_wol,
2109         .get_module_info   = mlx5e_get_module_info,
2110         .get_module_eeprom = mlx5e_get_module_eeprom,
2111         .flash_device      = mlx5e_flash_device,
2112         .get_priv_flags    = mlx5e_get_priv_flags,
2113         .set_priv_flags    = mlx5e_set_priv_flags,
2114         .self_test         = mlx5e_self_test,
2115         .get_msglevel      = mlx5e_get_msglevel,
2116         .set_msglevel      = mlx5e_set_msglevel,
2117         .get_fecparam      = mlx5e_get_fecparam,
2118         .set_fecparam      = mlx5e_set_fecparam,
2119 };