drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34 #include "en/port.h"
  35 #include "en/params.h"
  36 #include "en/xsk/pool.h"
  37 #include "en/ptp.h"
  38 #include "lib/clock.h"
  39
  40 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
  41                                struct ethtool_drvinfo *drvinfo)
  42 {
  43         struct mlx5_core_dev *mdev = priv->mdev;
  44
  45         strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
  46         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  47                  "%d.%d.%04d (%.16s)",
  48                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
  49                  mdev->board_id);
  50         strlcpy(drvinfo->bus_info, dev_name(mdev->device),
  51                 sizeof(drvinfo->bus_info));
  52 }
  53
  54 static void mlx5e_get_drvinfo(struct net_device *dev,
  55                               struct ethtool_drvinfo *drvinfo)
  56 {
  57         struct mlx5e_priv *priv = netdev_priv(dev);
  58
  59         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
  60 }
  61
  62 struct ptys2ethtool_config {
  63         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  64         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  65 };
  66
  67 static
  68 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
  69 static
  70 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
  71
  72 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...)                  \
  73         ({                                                              \
  74                 struct ptys2ethtool_config *cfg;                        \
  75                 const unsigned int modes[] = { __VA_ARGS__ };           \
  76                 unsigned int i, bit, idx;                               \
  77                 cfg = &ptys2##table##_ethtool_table[reg_];              \
  78                 bitmap_zero(cfg->supported,                             \
  79                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  80                 bitmap_zero(cfg->advertised,                            \
  81                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  82                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  83                         bit = modes[i] % 64;                            \
  84                         idx = modes[i] / 64;                            \
  85                         __set_bit(bit, &cfg->supported[idx]);           \
  86                         __set_bit(bit, &cfg->advertised[idx]);          \
  87                 }                                                       \
  88         })
  89
  90 void mlx5e_build_ptys2ethtool_map(void)
  91 {
  92         memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
  93         memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
  94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
  95                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
  97                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
  99                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
 101                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
 103                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
 105                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
 107                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
 109                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
 111                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
 113                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
 115                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
 117                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
 119                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
 121                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
 123                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
 125                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
 127                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 128         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
 129                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 130         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
 131                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 132         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
 133                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 134         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
 135                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 136         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
 137                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 138         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
 139                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 140         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
 141                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 142         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
 143                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 144         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
 145                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 146         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
 147                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
 148                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
 149                                        ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
 150         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
 151                                        ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
 152         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
 153                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
 154                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
 155                                        ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
 156                                        ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
 157                                        ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
 158                                        ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
 159                                        ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
 160         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
 161                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
 162                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
 163                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
 164                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 165         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
 166                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
 167                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
 168                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 169         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
 170                                        ext,
 171                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
 172                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
 173                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 174         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
 175                                        ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
 176                                        ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
 177                                        ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
 178                                        ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 179                                        ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
 180         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
 181                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
 182                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
 183                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
 184                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 185         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
 186                                        ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
 187                                        ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
 188                                        ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
 189                                        ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 190                                        ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
 191         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
 192                                        ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
 193                                        ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
 194                                        ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 195                                        ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
 196                                        ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
 197         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
 198                                        ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
 199                                        ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
 200                                        ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 201                                        ETHTOOL_LINK_MODE_100000baseDR_Full_BIT,
 202                                        ETHTOOL_LINK_MODE_100000baseCR_Full_BIT);
 203         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_2_200GBASE_CR2_KR2, ext,
 204                                        ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
 205                                        ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
 206                                        ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 207                                        ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT,
 208                                        ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT);
 209         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_4_400GBASE_CR4_KR4, ext,
 210                                        ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
 211                                        ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
 212                                        ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 213                                        ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT,
 214                                        ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT);
 215 }
 216
 217 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
 218                                         struct ptys2ethtool_config **arr,
 219                                         u32 *size)
 220 {
 221         bool ext = mlx5e_ptys_ext_supported(mdev);
 222
 223         *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 224         *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 225                       ARRAY_SIZE(ptys2legacy_ethtool_table);
 226 }
 227
 228 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
 229
 230 struct pflag_desc {
 231         char name[ETH_GSTRING_LEN];
 232         mlx5e_pflag_handler handler;
 233 };
 234
 235 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
 236
 237 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
 238 {
 239         switch (sset) {
 240         case ETH_SS_STATS:
 241                 return mlx5e_stats_total_num(priv);
 242         case ETH_SS_PRIV_FLAGS:
 243                 return MLX5E_NUM_PFLAGS;
 244         case ETH_SS_TEST:
 245                 return mlx5e_self_test_num(priv);
 246         default:
 247                 return -EOPNOTSUPP;
 248         }
 249 }
 250
 251 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 252 {
 253         struct mlx5e_priv *priv = netdev_priv(dev);
 254
 255         return mlx5e_ethtool_get_sset_count(priv, sset);
 256 }
 257
 258 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
 259 {
 260         int i;
 261
 262         switch (stringset) {
 263         case ETH_SS_PRIV_FLAGS:
 264                 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
 265                         strcpy(data + i * ETH_GSTRING_LEN,
 266                                mlx5e_priv_flags[i].name);
 267                 break;
 268
 269         case ETH_SS_TEST:
 270                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
 271                         strcpy(data + i * ETH_GSTRING_LEN,
 272                                mlx5e_self_tests[i]);
 273                 break;
 274
 275         case ETH_SS_STATS:
 276                 mlx5e_stats_fill_strings(priv, data);
 277                 break;
 278         }
 279 }
 280
 281 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 282 {
 283         struct mlx5e_priv *priv = netdev_priv(dev);
 284
 285         mlx5e_ethtool_get_strings(priv, stringset, data);
 286 }
 287
 288 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
 289                                      struct ethtool_stats *stats, u64 *data)
 290 {
 291         int idx = 0;
 292
 293         mutex_lock(&priv->state_lock);
 294         mlx5e_stats_update(priv);
 295         mutex_unlock(&priv->state_lock);
 296
 297         mlx5e_stats_fill(priv, data, idx);
 298 }
 299
 300 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 301                                     struct ethtool_stats *stats,
 302                                     u64 *data)
 303 {
 304         struct mlx5e_priv *priv = netdev_priv(dev);
 305
 306         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
 307 }
 308
 309 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
 310                                  struct ethtool_ringparam *param)
 311 {
 312         param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
 313         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 314         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
 315         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
 316 }
 317
 318 static void mlx5e_get_ringparam(struct net_device *dev,
 319                                 struct ethtool_ringparam *param)
 320 {
 321         struct mlx5e_priv *priv = netdev_priv(dev);
 322
 323         mlx5e_ethtool_get_ringparam(priv, param);
 324 }
 325
 326 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
 327                                 struct ethtool_ringparam *param)
 328 {
 329         struct mlx5e_channels new_channels = {};
 330         u8 log_rq_size;
 331         u8 log_sq_size;
 332         int err = 0;
 333
 334         if (param->rx_jumbo_pending) {
 335                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
 336                             __func__);
 337                 return -EINVAL;
 338         }
 339         if (param->rx_mini_pending) {
 340                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
 341                             __func__);
 342                 return -EINVAL;
 343         }
 344
 345         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
 346                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
 347                             __func__, param->rx_pending,
 348                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
 349                 return -EINVAL;
 350         }
 351
 352         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 353                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
 354                             __func__, param->tx_pending,
 355                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 356                 return -EINVAL;
 357         }
 358
 359         log_rq_size = order_base_2(param->rx_pending);
 360         log_sq_size = order_base_2(param->tx_pending);
 361
 362         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
 363             log_sq_size == priv->channels.params.log_sq_size)
 364                 return 0;
 365
 366         mutex_lock(&priv->state_lock);
 367
 368         new_channels.params = priv->channels.params;
 369         new_channels.params.log_rq_mtu_frames = log_rq_size;
 370         new_channels.params.log_sq_size = log_sq_size;
 371
 372         err = mlx5e_validate_params(priv->mdev, &new_channels.params);
 373         if (err)
 374                 goto unlock;
 375
 376         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 377                 priv->channels.params = new_channels.params;
 378                 goto unlock;
 379         }
 380
 381         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
 382
 383 unlock:
 384         mutex_unlock(&priv->state_lock);
 385
 386         return err;
 387 }
 388
 389 static int mlx5e_set_ringparam(struct net_device *dev,
 390                                struct ethtool_ringparam *param)
 391 {
 392         struct mlx5e_priv *priv = netdev_priv(dev);
 393
 394         return mlx5e_ethtool_set_ringparam(priv, param);
 395 }
 396
 397 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
 398                                 struct ethtool_channels *ch)
 399 {
 400         mutex_lock(&priv->state_lock);
 401
 402         ch->max_combined   = priv->max_nch;
 403         ch->combined_count = priv->channels.params.num_channels;
 404         if (priv->xsk.refcnt) {
 405                 /* The upper half are XSK queues. */
 406                 ch->max_combined *= 2;
 407                 ch->combined_count *= 2;
 408         }
 409
 410         mutex_unlock(&priv->state_lock);
 411 }
 412
 413 static void mlx5e_get_channels(struct net_device *dev,
 414                                struct ethtool_channels *ch)
 415 {
 416         struct mlx5e_priv *priv = netdev_priv(dev);
 417
 418         mlx5e_ethtool_get_channels(priv, ch);
 419 }
 420
 421 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
 422                                struct ethtool_channels *ch)
 423 {
 424         struct mlx5e_params *cur_params = &priv->channels.params;
 425         unsigned int count = ch->combined_count;
 426         struct mlx5e_channels new_channels = {};
 427         bool arfs_enabled;
 428         int err = 0;
 429
 430         if (!count) {
 431                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
 432                             __func__);
 433                 return -EINVAL;
 434         }
 435
 436         if (cur_params->num_channels == count)
 437                 return 0;
 438
 439         mutex_lock(&priv->state_lock);
 440
 441         /* Don't allow changing the number of channels if there is an active
 442          * XSK, because the numeration of the XSK and regular RQs will change.
 443          */
 444         if (priv->xsk.refcnt) {
 445                 err = -EINVAL;
 446                 netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
 447                            __func__);
 448                 goto out;
 449         }
 450
 451         /* Don't allow changing the number of channels if HTB offload is active,
 452          * because the numeration of the QoS SQs will change, while per-queue
 453          * qdiscs are attached.
 454          */
 455         if (priv->htb.maj_id) {
 456                 err = -EINVAL;
 457                 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the number of channels\n",
 458                            __func__);
 459                 goto out;
 460         }
 461
 462         new_channels.params = *cur_params;
 463         new_channels.params.num_channels = count;
 464
 465         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 466                 struct mlx5e_params old_params;
 467
 468                 old_params = *cur_params;
 469                 *cur_params = new_channels.params;
 470                 err = mlx5e_num_channels_changed(priv);
 471                 if (err)
 472                         *cur_params = old_params;
 473
 474                 goto out;
 475         }
 476
 477         arfs_enabled = priv->netdev->features & NETIF_F_NTUPLE;
 478         if (arfs_enabled)
 479                 mlx5e_arfs_disable(priv);
 480
 481         /* Switch to new channels, set new parameters and close old ones */
 482         err = mlx5e_safe_switch_channels(priv, &new_channels,
 483                                          mlx5e_num_channels_changed_ctx, NULL);
 484
 485         if (arfs_enabled) {
 486                 int err2 = mlx5e_arfs_enable(priv);
 487
 488                 if (err2)
 489                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
 490                                    __func__, err2);
 491         }
 492
 493 out:
 494         mutex_unlock(&priv->state_lock);
 495
 496         return err;
 497 }
 498
 499 static int mlx5e_set_channels(struct net_device *dev,
 500                               struct ethtool_channels *ch)
 501 {
 502         struct mlx5e_priv *priv = netdev_priv(dev);
 503
 504         return mlx5e_ethtool_set_channels(priv, ch);
 505 }
 506
 507 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
 508                                struct ethtool_coalesce *coal)
 509 {
 510         struct dim_cq_moder *rx_moder, *tx_moder;
 511
 512         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 513                 return -EOPNOTSUPP;
 514
 515         rx_moder = &priv->channels.params.rx_cq_moderation;
 516         coal->rx_coalesce_usecs         = rx_moder->usec;
 517         coal->rx_max_coalesced_frames   = rx_moder->pkts;
 518         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
 519
 520         tx_moder = &priv->channels.params.tx_cq_moderation;
 521         coal->tx_coalesce_usecs         = tx_moder->usec;
 522         coal->tx_max_coalesced_frames   = tx_moder->pkts;
 523         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
 524
 525         return 0;
 526 }
 527
 528 static int mlx5e_get_coalesce(struct net_device *netdev,
 529                               struct ethtool_coalesce *coal)
 530 {
 531         struct mlx5e_priv *priv = netdev_priv(netdev);
 532
 533         return mlx5e_ethtool_get_coalesce(priv, coal);
 534 }
 535
 536 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
 537 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
 538
 539 static void
 540 mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 541 {
 542         struct mlx5_core_dev *mdev = priv->mdev;
 543         int tc;
 544         int i;
 545
 546         for (i = 0; i < priv->channels.num; ++i) {
 547                 struct mlx5e_channel *c = priv->channels.c[i];
 548
 549                 for (tc = 0; tc < c->num_tc; tc++) {
 550                         mlx5_core_modify_cq_moderation(mdev,
 551                                                 &c->sq[tc].cq.mcq,
 552                                                 coal->tx_coalesce_usecs,
 553                                                 coal->tx_max_coalesced_frames);
 554                 }
 555         }
 556 }
 557
 558 static void
 559 mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 560 {
 561         struct mlx5_core_dev *mdev = priv->mdev;
 562         int i;
 563
 564         for (i = 0; i < priv->channels.num; ++i) {
 565                 struct mlx5e_channel *c = priv->channels.c[i];
 566
 567                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 568                                                coal->rx_coalesce_usecs,
 569                                                coal->rx_max_coalesced_frames);
 570         }
 571 }
 572
 573 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
 574                                struct ethtool_coalesce *coal)
 575 {
 576         struct dim_cq_moder *rx_moder, *tx_moder;
 577         struct mlx5_core_dev *mdev = priv->mdev;
 578         struct mlx5e_channels new_channels = {};
 579         bool reset_rx, reset_tx;
 580         int err = 0;
 581
 582         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 583                 return -EOPNOTSUPP;
 584
 585         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
 586             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
 587                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
 588                             __func__, MLX5E_MAX_COAL_TIME);
 589                 return -ERANGE;
 590         }
 591
 592         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
 593             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
 594                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
 595                             __func__, MLX5E_MAX_COAL_FRAMES);
 596                 return -ERANGE;
 597         }
 598
 599         mutex_lock(&priv->state_lock);
 600         new_channels.params = priv->channels.params;
 601
 602         rx_moder          = &new_channels.params.rx_cq_moderation;
 603         rx_moder->usec    = coal->rx_coalesce_usecs;
 604         rx_moder->pkts    = coal->rx_max_coalesced_frames;
 605         new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
 606
 607         tx_moder          = &new_channels.params.tx_cq_moderation;
 608         tx_moder->usec    = coal->tx_coalesce_usecs;
 609         tx_moder->pkts    = coal->tx_max_coalesced_frames;
 610         new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
 611
 612         reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
 613         reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
 614
 615         if (reset_rx) {
 616                 u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
 617                                           MLX5E_PFLAG_RX_CQE_BASED_MODER);
 618
 619                 mlx5e_reset_rx_moderation(&new_channels.params, mode);
 620         }
 621         if (reset_tx) {
 622                 u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
 623                                           MLX5E_PFLAG_TX_CQE_BASED_MODER);
 624
 625                 mlx5e_reset_tx_moderation(&new_channels.params, mode);
 626         }
 627
 628         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 629                 priv->channels.params = new_channels.params;
 630                 goto out;
 631         }
 632
 633         if (!reset_rx && !reset_tx) {
 634                 if (!coal->use_adaptive_rx_coalesce)
 635                         mlx5e_set_priv_channels_rx_coalesce(priv, coal);
 636                 if (!coal->use_adaptive_tx_coalesce)
 637                         mlx5e_set_priv_channels_tx_coalesce(priv, coal);
 638                 priv->channels.params = new_channels.params;
 639                 goto out;
 640         }
 641
 642         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
 643
 644 out:
 645         mutex_unlock(&priv->state_lock);
 646         return err;
 647 }
 648
 649 static int mlx5e_set_coalesce(struct net_device *netdev,
 650                               struct ethtool_coalesce *coal)
 651 {
 652         struct mlx5e_priv *priv    = netdev_priv(netdev);
 653
 654         return mlx5e_ethtool_set_coalesce(priv, coal);
 655 }
 656
 657 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
 658                                         unsigned long *supported_modes,
 659                                         u32 eth_proto_cap)
 660 {
 661         unsigned long proto_cap = eth_proto_cap;
 662         struct ptys2ethtool_config *table;
 663         u32 max_size;
 664         int proto;
 665
 666         mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
 667         for_each_set_bit(proto, &proto_cap, max_size)
 668                 bitmap_or(supported_modes, supported_modes,
 669                           table[proto].supported,
 670                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 671 }
 672
 673 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 674                                     u32 eth_proto_cap, bool ext)
 675 {
 676         unsigned long proto_cap = eth_proto_cap;
 677         struct ptys2ethtool_config *table;
 678         u32 max_size;
 679         int proto;
 680
 681         table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 682         max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 683                          ARRAY_SIZE(ptys2legacy_ethtool_table);
 684
 685         for_each_set_bit(proto, &proto_cap, max_size)
 686                 bitmap_or(advertising_modes, advertising_modes,
 687                           table[proto].advertised,
 688                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 689 }
 690
 691 static const u32 pplm_fec_2_ethtool[] = {
 692         [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
 693         [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
 694         [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
 695         [MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,
 696         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,
 697 };
 698
 699 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
 700 {
 701         int mode = 0;
 702
 703         if (!fec_mode)
 704                 return ETHTOOL_FEC_AUTO;
 705
 706         mode = find_first_bit(&fec_mode, size);
 707
 708         if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
 709                 return pplm_fec_2_ethtool[mode];
 710
 711         return 0;
 712 }
 713
 714 #define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec)            \
 715         do {                                                            \
 716                 if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec)))            \
 717                         __set_bit(ethtool_fec,                          \
 718                                   link_ksettings->link_modes.supported);\
 719         } while (0)
 720
 721 static const u32 pplm_fec_2_ethtool_linkmodes[] = {
 722         [MLX5E_FEC_NOFEC] = ETHTOOL_LINK_MODE_FEC_NONE_BIT,
 723         [MLX5E_FEC_FIRECODE] = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
 724         [MLX5E_FEC_RS_528_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 725         [MLX5E_FEC_RS_544_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 726         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
 727 };
 728
 729 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
 730                                         struct ethtool_link_ksettings *link_ksettings)
 731 {
 732         unsigned long active_fec_long;
 733         u32 active_fec;
 734         u32 bitn;
 735         int err;
 736
 737         err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
 738         if (err)
 739                 return (err == -EOPNOTSUPP) ? 0 : err;
 740
 741         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC,
 742                                       ETHTOOL_LINK_MODE_FEC_NONE_BIT);
 743         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE,
 744                                       ETHTOOL_LINK_MODE_FEC_BASER_BIT);
 745         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514,
 746                                       ETHTOOL_LINK_MODE_FEC_RS_BIT);
 747         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,
 748                                       ETHTOOL_LINK_MODE_FEC_LLRS_BIT);
 749
 750         active_fec_long = active_fec;
 751         /* active fec is a bit set, find out which bit is set and
 752          * advertise the corresponding ethtool bit
 753          */
 754         bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);
 755         if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))
 756                 __set_bit(pplm_fec_2_ethtool_linkmodes[bitn],
 757                           link_ksettings->link_modes.advertising);
 758
 759         return 0;
 760 }
 761
 762 static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,
 763                                                    struct ethtool_link_ksettings *link_ksettings,
 764                                                    u32 eth_proto_cap, u8 connector_type)
 765 {
 766         if (!MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type)) {
 767                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 768                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 769                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 770                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 771                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 772                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 773                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 774                                                              supported,
 775                                                              FIBRE);
 776                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 777                                                              advertising,
 778                                                              FIBRE);
 779                 }
 780
 781                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 782                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 783                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 784                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 785                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 786                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 787                                                              supported,
 788                                                              Backplane);
 789                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 790                                                              advertising,
 791                                                              Backplane);
 792                 }
 793                 return;
 794         }
 795
 796         switch (connector_type) {
 797         case MLX5E_PORT_TP:
 798                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 799                                                      supported, TP);
 800                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 801                                                      advertising, TP);
 802                 break;
 803         case MLX5E_PORT_AUI:
 804                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 805                                                      supported, AUI);
 806                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 807                                                      advertising, AUI);
 808                 break;
 809         case MLX5E_PORT_BNC:
 810                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 811                                                      supported, BNC);
 812                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 813                                                      advertising, BNC);
 814                 break;
 815         case MLX5E_PORT_MII:
 816                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 817                                                      supported, MII);
 818                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 819                                                      advertising, MII);
 820                 break;
 821         case MLX5E_PORT_FIBRE:
 822                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 823                                                      supported, FIBRE);
 824                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 825                                                      advertising, FIBRE);
 826                 break;
 827         case MLX5E_PORT_DA:
 828                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 829                                                      supported, Backplane);
 830                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 831                                                      advertising, Backplane);
 832                 break;
 833         case MLX5E_PORT_NONE:
 834         case MLX5E_PORT_OTHER:
 835         default:
 836                 break;
 837         }
 838 }
 839
 840 static void get_speed_duplex(struct net_device *netdev,
 841                              u32 eth_proto_oper, bool force_legacy,
 842                              u16 data_rate_oper,
 843                              struct ethtool_link_ksettings *link_ksettings)
 844 {
 845         struct mlx5e_priv *priv = netdev_priv(netdev);
 846         u32 speed = SPEED_UNKNOWN;
 847         u8 duplex = DUPLEX_UNKNOWN;
 848
 849         if (!netif_carrier_ok(netdev))
 850                 goto out;
 851
 852         speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
 853         if (!speed) {
 854                 if (data_rate_oper)
 855                         speed = 100 * data_rate_oper;
 856                 else
 857                         speed = SPEED_UNKNOWN;
 858                 goto out;
 859         }
 860
 861         duplex = DUPLEX_FULL;
 862
 863 out:
 864         link_ksettings->base.speed = speed;
 865         link_ksettings->base.duplex = duplex;
 866 }
 867
 868 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
 869                           struct ethtool_link_ksettings *link_ksettings)
 870 {
 871         unsigned long *supported = link_ksettings->link_modes.supported;
 872         ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
 873
 874         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 875 }
 876
 877 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
 878                             struct ethtool_link_ksettings *link_ksettings,
 879                             bool ext)
 880 {
 881         unsigned long *advertising = link_ksettings->link_modes.advertising;
 882         ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
 883
 884         if (rx_pause)
 885                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 886         if (tx_pause ^ rx_pause)
 887                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 888 }
 889
 890 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
 891                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
 892                 [MLX5E_PORT_NONE]               = PORT_NONE,
 893                 [MLX5E_PORT_TP]                 = PORT_TP,
 894                 [MLX5E_PORT_AUI]                = PORT_AUI,
 895                 [MLX5E_PORT_BNC]                = PORT_BNC,
 896                 [MLX5E_PORT_MII]                = PORT_MII,
 897                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
 898                 [MLX5E_PORT_DA]                 = PORT_DA,
 899                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
 900         };
 901
 902 static u8 get_connector_port(struct mlx5_core_dev *mdev, u32 eth_proto, u8 connector_type)
 903 {
 904         if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type))
 905                 return ptys2connector_type[connector_type];
 906
 907         if (eth_proto &
 908             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
 909              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
 910              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
 911              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 912                 return PORT_FIBRE;
 913         }
 914
 915         if (eth_proto &
 916             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
 917              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
 918              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 919                 return PORT_DA;
 920         }
 921
 922         if (eth_proto &
 923             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
 924              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
 925              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
 926              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 927                 return PORT_NONE;
 928         }
 929
 930         return PORT_OTHER;
 931 }
 932
 933 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
 934                                struct ethtool_link_ksettings *link_ksettings)
 935 {
 936         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 937         bool ext = mlx5e_ptys_ext_supported(mdev);
 938
 939         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
 940 }
 941
 942 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
 943                                      struct ethtool_link_ksettings *link_ksettings)
 944 {
 945         struct mlx5_core_dev *mdev = priv->mdev;
 946         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
 947         u32 eth_proto_admin;
 948         u8 an_disable_admin;
 949         u16 data_rate_oper;
 950         u32 eth_proto_oper;
 951         u32 eth_proto_cap;
 952         u8 connector_type;
 953         u32 rx_pause = 0;
 954         u32 tx_pause = 0;
 955         u32 eth_proto_lp;
 956         bool admin_ext;
 957         u8 an_status;
 958         bool ext;
 959         int err;
 960
 961         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
 962         if (err) {
 963                 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
 964                            __func__, err);
 965                 goto err_query_regs;
 966         }
 967         ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
 968         eth_proto_cap    = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 969                                               eth_proto_capability);
 970         eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 971                                               eth_proto_admin);
 972         /* Fields: eth_proto_admin and ext_eth_proto_admin  are
 973          * mutually exclusive. Hence try reading legacy advertising
 974          * when extended advertising is zero.
 975          * admin_ext indicates which proto_admin (ext vs. legacy)
 976          * should be read and interpreted
 977          */
 978         admin_ext = ext;
 979         if (ext && !eth_proto_admin) {
 980                 eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
 981                                                       eth_proto_admin);
 982                 admin_ext = false;
 983         }
 984
 985         eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
 986                                               eth_proto_oper);
 987         eth_proto_lp        = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 988         an_disable_admin    = MLX5_GET(ptys_reg, out, an_disable_admin);
 989         an_status           = MLX5_GET(ptys_reg, out, an_status);
 990         connector_type      = MLX5_GET(ptys_reg, out, connector_type);
 991         data_rate_oper      = MLX5_GET(ptys_reg, out, data_rate_oper);
 992
 993         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 994
 995         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 996         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 997
 998         get_supported(mdev, eth_proto_cap, link_ksettings);
 999         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
1000                         admin_ext);
1001         get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
1002                          data_rate_oper, link_ksettings);
1003
1004         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1005         connector_type = connector_type < MLX5E_CONNECTOR_TYPE_NUMBER ?
1006                          connector_type : MLX5E_PORT_UNKNOWN;
1007         link_ksettings->base.port = get_connector_port(mdev, eth_proto_oper, connector_type);
1008         ptys2ethtool_supported_advertised_port(mdev, link_ksettings, eth_proto_admin,
1009                                                connector_type);
1010         get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
1011
1012         if (an_status == MLX5_AN_COMPLETE)
1013                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1014                                                      lp_advertising, Autoneg);
1015
1016         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
1017                                                           AUTONEG_ENABLE;
1018         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
1019                                              Autoneg);
1020
1021         err = get_fec_supported_advertised(mdev, link_ksettings);
1022         if (err) {
1023                 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
1024                            __func__, err);
1025                 err = 0; /* don't fail caps query because of FEC error */
1026         }
1027
1028         if (!an_disable_admin)
1029                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1030                                                      advertising, Autoneg);
1031
1032 err_query_regs:
1033         return err;
1034 }
1035
1036 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1037                                     struct ethtool_link_ksettings *link_ksettings)
1038 {
1039         struct mlx5e_priv *priv = netdev_priv(netdev);
1040
1041         return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
1042 }
1043
1044 static int mlx5e_speed_validate(struct net_device *netdev, bool ext,
1045                                 const unsigned long link_modes, u8 autoneg)
1046 {
1047         /* Extended link-mode has no speed limitations. */
1048         if (ext)
1049                 return 0;
1050
1051         if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1052             autoneg != AUTONEG_ENABLE) {
1053                 netdev_err(netdev, "%s: 56G link speed requires autoneg enabled\n",
1054                            __func__);
1055                 return -EINVAL;
1056         }
1057         return 0;
1058 }
1059
1060 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1061 {
1062         u32 i, ptys_modes = 0;
1063
1064         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1065                 if (*ptys2legacy_ethtool_table[i].advertised == 0)
1066                         continue;
1067                 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
1068                                       link_modes,
1069                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
1070                         ptys_modes |= MLX5E_PROT_MASK(i);
1071         }
1072
1073         return ptys_modes;
1074 }
1075
1076 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
1077 {
1078         u32 i, ptys_modes = 0;
1079         unsigned long modes[2];
1080
1081         for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1082                 if (ptys2ext_ethtool_table[i].advertised[0] == 0 &&
1083                     ptys2ext_ethtool_table[i].advertised[1] == 0)
1084                         continue;
1085                 memset(modes, 0, sizeof(modes));
1086                 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1087                            link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1088
1089                 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1090                     modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1091                         ptys_modes |= MLX5E_PROT_MASK(i);
1092         }
1093         return ptys_modes;
1094 }
1095
1096 static bool ext_link_mode_requested(const unsigned long *adver)
1097 {
1098 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1099         int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1100         __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1101
1102         bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1103         return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1104 }
1105
1106 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1107 {
1108         bool ext_link_mode = ext_link_mode_requested(adver);
1109
1110         return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1111 }
1112
1113 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1114                                      const struct ethtool_link_ksettings *link_ksettings)
1115 {
1116         struct mlx5_core_dev *mdev = priv->mdev;
1117         struct mlx5e_port_eth_proto eproto;
1118         const unsigned long *adver;
1119         bool an_changes = false;
1120         u8 an_disable_admin;
1121         bool ext_supported;
1122         u8 an_disable_cap;
1123         bool an_disable;
1124         u32 link_modes;
1125         u8 an_status;
1126         u8 autoneg;
1127         u32 speed;
1128         bool ext;
1129         int err;
1130
1131         u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1132
1133         adver = link_ksettings->link_modes.advertising;
1134         autoneg = link_ksettings->base.autoneg;
1135         speed = link_ksettings->base.speed;
1136
1137         ext_supported = mlx5e_ptys_ext_supported(mdev);
1138         ext = ext_requested(autoneg, adver, ext_supported);
1139         if (!ext_supported && ext)
1140                 return -EOPNOTSUPP;
1141
1142         ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1143                                   mlx5e_ethtool2ptys_adver_link;
1144         err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1145         if (err) {
1146                 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1147                            __func__, err);
1148                 goto out;
1149         }
1150         link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1151                 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1152
1153         err = mlx5e_speed_validate(priv->netdev, ext, link_modes, autoneg);
1154         if (err)
1155                 goto out;
1156
1157         link_modes = link_modes & eproto.cap;
1158         if (!link_modes) {
1159                 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1160                            __func__);
1161                 err = -EINVAL;
1162                 goto out;
1163         }
1164
1165         mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1166                                     &an_disable_admin);
1167
1168         an_disable = autoneg == AUTONEG_DISABLE;
1169         an_changes = ((!an_disable && an_disable_admin) ||
1170                       (an_disable && !an_disable_admin));
1171
1172         if (!an_changes && link_modes == eproto.admin)
1173                 goto out;
1174
1175         mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1176         mlx5_toggle_port_link(mdev);
1177
1178 out:
1179         return err;
1180 }
1181
1182 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1183                                     const struct ethtool_link_ksettings *link_ksettings)
1184 {
1185         struct mlx5e_priv *priv = netdev_priv(netdev);
1186
1187         return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1188 }
1189
1190 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1191 {
1192         return sizeof(priv->rss_params.toeplitz_hash_key);
1193 }
1194
1195 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1196 {
1197         struct mlx5e_priv *priv = netdev_priv(netdev);
1198
1199         return mlx5e_ethtool_get_rxfh_key_size(priv);
1200 }
1201
1202 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1203 {
1204         return MLX5E_INDIR_RQT_SIZE;
1205 }
1206
1207 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1208 {
1209         struct mlx5e_priv *priv = netdev_priv(netdev);
1210
1211         return mlx5e_ethtool_get_rxfh_indir_size(priv);
1212 }
1213
1214 int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1215                    u8 *hfunc)
1216 {
1217         struct mlx5e_priv *priv = netdev_priv(netdev);
1218         struct mlx5e_rss_params *rss = &priv->rss_params;
1219
1220         if (indir)
1221                 memcpy(indir, rss->indirection_rqt,
1222                        sizeof(rss->indirection_rqt));
1223
1224         if (key)
1225                 memcpy(key, rss->toeplitz_hash_key,
1226                        sizeof(rss->toeplitz_hash_key));
1227
1228         if (hfunc)
1229                 *hfunc = rss->hfunc;
1230
1231         return 0;
1232 }
1233
1234 int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1235                    const u8 *key, const u8 hfunc)
1236 {
1237         struct mlx5e_priv *priv = netdev_priv(dev);
1238         struct mlx5e_rss_params *rss = &priv->rss_params;
1239         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1240         bool refresh_tirs = false;
1241         bool refresh_rqt = false;
1242         void *in;
1243
1244         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1245             (hfunc != ETH_RSS_HASH_XOR) &&
1246             (hfunc != ETH_RSS_HASH_TOP))
1247                 return -EINVAL;
1248
1249         in = kvzalloc(inlen, GFP_KERNEL);
1250         if (!in)
1251                 return -ENOMEM;
1252
1253         mutex_lock(&priv->state_lock);
1254
1255         if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
1256                 rss->hfunc = hfunc;
1257                 refresh_rqt = true;
1258                 refresh_tirs = true;
1259         }
1260
1261         if (indir) {
1262                 memcpy(rss->indirection_rqt, indir,
1263                        sizeof(rss->indirection_rqt));
1264                 refresh_rqt = true;
1265         }
1266
1267         if (key) {
1268                 memcpy(rss->toeplitz_hash_key, key,
1269                        sizeof(rss->toeplitz_hash_key));
1270                 refresh_tirs = refresh_tirs || rss->hfunc == ETH_RSS_HASH_TOP;
1271         }
1272
1273         if (refresh_rqt && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1274                 struct mlx5e_redirect_rqt_param rrp = {
1275                         .is_rss = true,
1276                         {
1277                                 .rss = {
1278                                         .hfunc = rss->hfunc,
1279                                         .channels  = &priv->channels,
1280                                 },
1281                         },
1282                 };
1283                 u32 rqtn = priv->indir_rqt.rqtn;
1284
1285                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1286         }
1287
1288         if (refresh_tirs)
1289                 mlx5e_modify_tirs_hash(priv, in);
1290
1291         mutex_unlock(&priv->state_lock);
1292
1293         kvfree(in);
1294
1295         return 0;
1296 }
1297
1298 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
1299 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
1300 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
1301 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
1302 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1303         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1304               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1305
1306 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1307                                          u16 *pfc_prevention_tout)
1308 {
1309         struct mlx5e_priv *priv    = netdev_priv(netdev);
1310         struct mlx5_core_dev *mdev = priv->mdev;
1311
1312         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1313             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1314                 return -EOPNOTSUPP;
1315
1316         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1317 }
1318
1319 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1320                                          u16 pfc_preven)
1321 {
1322         struct mlx5e_priv *priv = netdev_priv(netdev);
1323         struct mlx5_core_dev *mdev = priv->mdev;
1324         u16 critical_tout;
1325         u16 minor;
1326
1327         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1328             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1329                 return -EOPNOTSUPP;
1330
1331         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1332                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1333                         pfc_preven;
1334
1335         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1336             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1337              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1338                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1339                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1340                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1341                 return -EINVAL;
1342         }
1343
1344         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1345         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1346                                              minor);
1347 }
1348
1349 static int mlx5e_get_tunable(struct net_device *dev,
1350                              const struct ethtool_tunable *tuna,
1351                              void *data)
1352 {
1353         int err;
1354
1355         switch (tuna->id) {
1356         case ETHTOOL_PFC_PREVENTION_TOUT:
1357                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1358                 break;
1359         default:
1360                 err = -EINVAL;
1361                 break;
1362         }
1363
1364         return err;
1365 }
1366
1367 static int mlx5e_set_tunable(struct net_device *dev,
1368                              const struct ethtool_tunable *tuna,
1369                              const void *data)
1370 {
1371         struct mlx5e_priv *priv = netdev_priv(dev);
1372         int err;
1373
1374         mutex_lock(&priv->state_lock);
1375
1376         switch (tuna->id) {
1377         case ETHTOOL_PFC_PREVENTION_TOUT:
1378                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1379                 break;
1380         default:
1381                 err = -EINVAL;
1382                 break;
1383         }
1384
1385         mutex_unlock(&priv->state_lock);
1386         return err;
1387 }
1388
1389 static void mlx5e_get_pause_stats(struct net_device *netdev,
1390                                   struct ethtool_pause_stats *pause_stats)
1391 {
1392         struct mlx5e_priv *priv = netdev_priv(netdev);
1393
1394         mlx5e_stats_pause_get(priv, pause_stats);
1395 }
1396
1397 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1398                                   struct ethtool_pauseparam *pauseparam)
1399 {
1400         struct mlx5_core_dev *mdev = priv->mdev;
1401         int err;
1402
1403         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1404                                     &pauseparam->tx_pause);
1405         if (err) {
1406                 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1407                            __func__, err);
1408         }
1409 }
1410
1411 static void mlx5e_get_pauseparam(struct net_device *netdev,
1412                                  struct ethtool_pauseparam *pauseparam)
1413 {
1414         struct mlx5e_priv *priv = netdev_priv(netdev);
1415
1416         mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1417 }
1418
1419 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1420                                  struct ethtool_pauseparam *pauseparam)
1421 {
1422         struct mlx5_core_dev *mdev = priv->mdev;
1423         int err;
1424
1425         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1426                 return -EOPNOTSUPP;
1427
1428         if (pauseparam->autoneg)
1429                 return -EINVAL;
1430
1431         err = mlx5_set_port_pause(mdev,
1432                                   pauseparam->rx_pause ? 1 : 0,
1433                                   pauseparam->tx_pause ? 1 : 0);
1434         if (err) {
1435                 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1436                            __func__, err);
1437         }
1438
1439         return err;
1440 }
1441
1442 static int mlx5e_set_pauseparam(struct net_device *netdev,
1443                                 struct ethtool_pauseparam *pauseparam)
1444 {
1445         struct mlx5e_priv *priv = netdev_priv(netdev);
1446
1447         return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1448 }
1449
1450 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1451                               struct ethtool_ts_info *info)
1452 {
1453         struct mlx5_core_dev *mdev = priv->mdev;
1454
1455         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1456
1457         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1458             info->phc_index == -1)
1459                 return 0;
1460
1461         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1462                                 SOF_TIMESTAMPING_RX_HARDWARE |
1463                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1464
1465         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1466                          BIT(HWTSTAMP_TX_ON);
1467
1468         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1469                            BIT(HWTSTAMP_FILTER_ALL);
1470
1471         return 0;
1472 }
1473
1474 static int mlx5e_get_ts_info(struct net_device *dev,
1475                              struct ethtool_ts_info *info)
1476 {
1477         struct mlx5e_priv *priv = netdev_priv(dev);
1478
1479         return mlx5e_ethtool_get_ts_info(priv, info);
1480 }
1481
1482 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1483 {
1484         __u32 ret = 0;
1485
1486         if (MLX5_CAP_GEN(mdev, wol_g))
1487                 ret |= WAKE_MAGIC;
1488
1489         if (MLX5_CAP_GEN(mdev, wol_s))
1490                 ret |= WAKE_MAGICSECURE;
1491
1492         if (MLX5_CAP_GEN(mdev, wol_a))
1493                 ret |= WAKE_ARP;
1494
1495         if (MLX5_CAP_GEN(mdev, wol_b))
1496                 ret |= WAKE_BCAST;
1497
1498         if (MLX5_CAP_GEN(mdev, wol_m))
1499                 ret |= WAKE_MCAST;
1500
1501         if (MLX5_CAP_GEN(mdev, wol_u))
1502                 ret |= WAKE_UCAST;
1503
1504         if (MLX5_CAP_GEN(mdev, wol_p))
1505                 ret |= WAKE_PHY;
1506
1507         return ret;
1508 }
1509
1510 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1511 {
1512         __u32 ret = 0;
1513
1514         if (mode & MLX5_WOL_MAGIC)
1515                 ret |= WAKE_MAGIC;
1516
1517         if (mode & MLX5_WOL_SECURED_MAGIC)
1518                 ret |= WAKE_MAGICSECURE;
1519
1520         if (mode & MLX5_WOL_ARP)
1521                 ret |= WAKE_ARP;
1522
1523         if (mode & MLX5_WOL_BROADCAST)
1524                 ret |= WAKE_BCAST;
1525
1526         if (mode & MLX5_WOL_MULTICAST)
1527                 ret |= WAKE_MCAST;
1528
1529         if (mode & MLX5_WOL_UNICAST)
1530                 ret |= WAKE_UCAST;
1531
1532         if (mode & MLX5_WOL_PHY_ACTIVITY)
1533                 ret |= WAKE_PHY;
1534
1535         return ret;
1536 }
1537
1538 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1539 {
1540         u8 ret = 0;
1541
1542         if (mode & WAKE_MAGIC)
1543                 ret |= MLX5_WOL_MAGIC;
1544
1545         if (mode & WAKE_MAGICSECURE)
1546                 ret |= MLX5_WOL_SECURED_MAGIC;
1547
1548         if (mode & WAKE_ARP)
1549                 ret |= MLX5_WOL_ARP;
1550
1551         if (mode & WAKE_BCAST)
1552                 ret |= MLX5_WOL_BROADCAST;
1553
1554         if (mode & WAKE_MCAST)
1555                 ret |= MLX5_WOL_MULTICAST;
1556
1557         if (mode & WAKE_UCAST)
1558                 ret |= MLX5_WOL_UNICAST;
1559
1560         if (mode & WAKE_PHY)
1561                 ret |= MLX5_WOL_PHY_ACTIVITY;
1562
1563         return ret;
1564 }
1565
1566 static void mlx5e_get_wol(struct net_device *netdev,
1567                           struct ethtool_wolinfo *wol)
1568 {
1569         struct mlx5e_priv *priv = netdev_priv(netdev);
1570         struct mlx5_core_dev *mdev = priv->mdev;
1571         u8 mlx5_wol_mode;
1572         int err;
1573
1574         memset(wol, 0, sizeof(*wol));
1575
1576         wol->supported = mlx5e_get_wol_supported(mdev);
1577         if (!wol->supported)
1578                 return;
1579
1580         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1581         if (err)
1582                 return;
1583
1584         wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1585 }
1586
1587 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1588 {
1589         struct mlx5e_priv *priv = netdev_priv(netdev);
1590         struct mlx5_core_dev *mdev = priv->mdev;
1591         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1592         u32 mlx5_wol_mode;
1593
1594         if (!wol_supported)
1595                 return -EOPNOTSUPP;
1596
1597         if (wol->wolopts & ~wol_supported)
1598                 return -EINVAL;
1599
1600         mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1601
1602         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1603 }
1604
1605 static void mlx5e_get_fec_stats(struct net_device *netdev,
1606                                 struct ethtool_fec_stats *fec_stats)
1607 {
1608         struct mlx5e_priv *priv = netdev_priv(netdev);
1609
1610         mlx5e_stats_fec_get(priv, fec_stats);
1611 }
1612
1613 static int mlx5e_get_fecparam(struct net_device *netdev,
1614                               struct ethtool_fecparam *fecparam)
1615 {
1616         struct mlx5e_priv *priv = netdev_priv(netdev);
1617         struct mlx5_core_dev *mdev = priv->mdev;
1618         u16 fec_configured;
1619         u32 fec_active;
1620         int err;
1621
1622         err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1623
1624         if (err)
1625                 return err;
1626
1627         fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,
1628                                                 sizeof(unsigned long) * BITS_PER_BYTE);
1629
1630         if (!fecparam->active_fec)
1631                 return -EOPNOTSUPP;
1632
1633         fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,
1634                                          sizeof(unsigned long) * BITS_PER_BYTE);
1635
1636         return 0;
1637 }
1638
1639 static int mlx5e_set_fecparam(struct net_device *netdev,
1640                               struct ethtool_fecparam *fecparam)
1641 {
1642         struct mlx5e_priv *priv = netdev_priv(netdev);
1643         struct mlx5_core_dev *mdev = priv->mdev;
1644         u16 fec_policy = 0;
1645         int mode;
1646         int err;
1647
1648         if (bitmap_weight((unsigned long *)&fecparam->fec,
1649                           ETHTOOL_FEC_LLRS_BIT + 1) > 1)
1650                 return -EOPNOTSUPP;
1651
1652         for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1653                 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1654                         continue;
1655                 fec_policy |= (1 << mode);
1656                 break;
1657         }
1658
1659         err = mlx5e_set_fec_mode(mdev, fec_policy);
1660
1661         if (err)
1662                 return err;
1663
1664         mlx5_toggle_port_link(mdev);
1665
1666         return 0;
1667 }
1668
1669 static u32 mlx5e_get_msglevel(struct net_device *dev)
1670 {
1671         return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1672 }
1673
1674 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1675 {
1676         ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1677 }
1678
1679 static int mlx5e_set_phys_id(struct net_device *dev,
1680                              enum ethtool_phys_id_state state)
1681 {
1682         struct mlx5e_priv *priv = netdev_priv(dev);
1683         struct mlx5_core_dev *mdev = priv->mdev;
1684         u16 beacon_duration;
1685
1686         if (!MLX5_CAP_GEN(mdev, beacon_led))
1687                 return -EOPNOTSUPP;
1688
1689         switch (state) {
1690         case ETHTOOL_ID_ACTIVE:
1691                 beacon_duration = MLX5_BEACON_DURATION_INF;
1692                 break;
1693         case ETHTOOL_ID_INACTIVE:
1694                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1695                 break;
1696         default:
1697                 return -EOPNOTSUPP;
1698         }
1699
1700         return mlx5_set_port_beacon(mdev, beacon_duration);
1701 }
1702
1703 static int mlx5e_get_module_info(struct net_device *netdev,
1704                                  struct ethtool_modinfo *modinfo)
1705 {
1706         struct mlx5e_priv *priv = netdev_priv(netdev);
1707         struct mlx5_core_dev *dev = priv->mdev;
1708         int size_read = 0;
1709         u8 data[4] = {0};
1710
1711         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1712         if (size_read < 2)
1713                 return -EIO;
1714
1715         /* data[0] = identifier byte */
1716         switch (data[0]) {
1717         case MLX5_MODULE_ID_QSFP:
1718                 modinfo->type       = ETH_MODULE_SFF_8436;
1719                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1720                 break;
1721         case MLX5_MODULE_ID_QSFP_PLUS:
1722         case MLX5_MODULE_ID_QSFP28:
1723                 /* data[1] = revision id */
1724                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1725                         modinfo->type       = ETH_MODULE_SFF_8636;
1726                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1727                 } else {
1728                         modinfo->type       = ETH_MODULE_SFF_8436;
1729                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1730                 }
1731                 break;
1732         case MLX5_MODULE_ID_SFP:
1733                 modinfo->type       = ETH_MODULE_SFF_8472;
1734                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1735                 break;
1736         default:
1737                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1738                            __func__, data[0]);
1739                 return -EINVAL;
1740         }
1741
1742         return 0;
1743 }
1744
1745 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1746                                    struct ethtool_eeprom *ee,
1747                                    u8 *data)
1748 {
1749         struct mlx5e_priv *priv = netdev_priv(netdev);
1750         struct mlx5_core_dev *mdev = priv->mdev;
1751         int offset = ee->offset;
1752         int size_read;
1753         int i = 0;
1754
1755         if (!ee->len)
1756                 return -EINVAL;
1757
1758         memset(data, 0, ee->len);
1759
1760         while (i < ee->len) {
1761                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1762                                                      data + i);
1763
1764                 if (!size_read)
1765                         /* Done reading */
1766                         return 0;
1767
1768                 if (size_read < 0) {
1769                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1770                                    __func__, size_read);
1771                         return 0;
1772                 }
1773
1774                 i += size_read;
1775                 offset += size_read;
1776         }
1777
1778         return 0;
1779 }
1780
1781 static int mlx5e_get_module_eeprom_by_page(struct net_device *netdev,
1782                                            const struct ethtool_module_eeprom *page_data,
1783                                            struct netlink_ext_ack *extack)
1784 {
1785         struct mlx5e_priv *priv = netdev_priv(netdev);
1786         struct mlx5_module_eeprom_query_params query;
1787         struct mlx5_core_dev *mdev = priv->mdev;
1788         u8 *data = page_data->data;
1789         int size_read;
1790         int i = 0;
1791
1792         if (!page_data->length)
1793                 return -EINVAL;
1794
1795         memset(data, 0, page_data->length);
1796
1797         query.offset = page_data->offset;
1798         query.i2c_address = page_data->i2c_address;
1799         query.bank = page_data->bank;
1800         query.page = page_data->page;
1801         while (i < page_data->length) {
1802                 query.size = page_data->length - i;
1803                 size_read = mlx5_query_module_eeprom_by_page(mdev, &query, data + i);
1804
1805                 /* Done reading, return how many bytes was read */
1806                 if (!size_read)
1807                         return i;
1808
1809                 if (size_read == -EINVAL)
1810                         return -EINVAL;
1811                 if (size_read < 0) {
1812                         netdev_err(priv->netdev, "%s: mlx5_query_module_eeprom_by_page failed:0x%x\n",
1813                                    __func__, size_read);
1814                         return i;
1815                 }
1816
1817                 i += size_read;
1818                 query.offset += size_read;
1819         }
1820
1821         return i;
1822 }
1823
1824 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1825                                struct ethtool_flash *flash)
1826 {
1827         struct mlx5_core_dev *mdev = priv->mdev;
1828         struct net_device *dev = priv->netdev;
1829         const struct firmware *fw;
1830         int err;
1831
1832         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1833                 return -EOPNOTSUPP;
1834
1835         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1836         if (err)
1837                 return err;
1838
1839         dev_hold(dev);
1840         rtnl_unlock();
1841
1842         err = mlx5_firmware_flash(mdev, fw, NULL);
1843         release_firmware(fw);
1844
1845         rtnl_lock();
1846         dev_put(dev);
1847         return err;
1848 }
1849
1850 static int mlx5e_flash_device(struct net_device *dev,
1851                               struct ethtool_flash *flash)
1852 {
1853         struct mlx5e_priv *priv = netdev_priv(dev);
1854
1855         return mlx5e_ethtool_flash_device(priv, flash);
1856 }
1857
1858 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1859                                      bool is_rx_cq)
1860 {
1861         struct mlx5e_priv *priv = netdev_priv(netdev);
1862         struct mlx5_core_dev *mdev = priv->mdev;
1863         struct mlx5e_channels new_channels = {};
1864         bool mode_changed;
1865         u8 cq_period_mode, current_cq_period_mode;
1866
1867         cq_period_mode = enable ?
1868                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1869                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1870         current_cq_period_mode = is_rx_cq ?
1871                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1872                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1873         mode_changed = cq_period_mode != current_cq_period_mode;
1874
1875         if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1876             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1877                 return -EOPNOTSUPP;
1878
1879         if (!mode_changed)
1880                 return 0;
1881
1882         new_channels.params = priv->channels.params;
1883         if (is_rx_cq)
1884                 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1885         else
1886                 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1887
1888         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1889                 priv->channels.params = new_channels.params;
1890                 return 0;
1891         }
1892
1893         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1894 }
1895
1896 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1897 {
1898         return set_pflag_cqe_based_moder(netdev, enable, false);
1899 }
1900
1901 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1902 {
1903         return set_pflag_cqe_based_moder(netdev, enable, true);
1904 }
1905
1906 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1907 {
1908         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1909         struct mlx5e_channels new_channels = {};
1910         int err = 0;
1911
1912         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1913                 return new_val ? -EOPNOTSUPP : 0;
1914
1915         if (curr_val == new_val)
1916                 return 0;
1917
1918         new_channels.params = priv->channels.params;
1919         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1920         if (priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE)
1921                 new_channels.params.ptp_rx = new_val;
1922
1923         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1924                 priv->channels.params = new_channels.params;
1925                 return 0;
1926         }
1927
1928         if (new_channels.params.ptp_rx == priv->channels.params.ptp_rx)
1929                 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1930         else
1931                 err = mlx5e_safe_switch_channels(priv, &new_channels, mlx5e_ptp_rx_manage_fs_ctx,
1932                                                  &new_channels.params.ptp_rx);
1933         if (err)
1934                 return err;
1935
1936         mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1937                   MLX5E_GET_PFLAG(&priv->channels.params,
1938                                   MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1939
1940         return 0;
1941 }
1942
1943 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1944                                      bool enable)
1945 {
1946         struct mlx5e_priv *priv = netdev_priv(netdev);
1947         struct mlx5_core_dev *mdev = priv->mdev;
1948         int err;
1949
1950         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1951                 return -EOPNOTSUPP;
1952
1953         err = mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1954         if (err)
1955                 return err;
1956
1957         priv->channels.params.rx_cqe_compress_def = enable;
1958
1959         return 0;
1960 }
1961
1962 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1963 {
1964         struct mlx5e_priv *priv = netdev_priv(netdev);
1965         struct mlx5_core_dev *mdev = priv->mdev;
1966         struct mlx5e_channels new_channels = {};
1967
1968         if (enable) {
1969                 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1970                         return -EOPNOTSUPP;
1971                 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1972                         return -EINVAL;
1973         } else if (priv->channels.params.lro_en) {
1974                 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1975                 return -EINVAL;
1976         }
1977
1978         new_channels.params = priv->channels.params;
1979
1980         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1981         mlx5e_set_rq_type(mdev, &new_channels.params);
1982
1983         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1984                 priv->channels.params = new_channels.params;
1985                 return 0;
1986         }
1987
1988         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1989 }
1990
1991 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1992 {
1993         struct mlx5e_priv *priv = netdev_priv(netdev);
1994         struct mlx5e_channels *channels = &priv->channels;
1995         struct mlx5e_channel *c;
1996         int i;
1997
1998         if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1999             priv->channels.params.xdp_prog)
2000                 return 0;
2001
2002         for (i = 0; i < channels->num; i++) {
2003                 c = channels->c[i];
2004                 if (enable)
2005                         __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
2006                 else
2007                         __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
2008         }
2009
2010         return 0;
2011 }
2012
2013 static int set_pflag_tx_mpwqe_common(struct net_device *netdev, u32 flag, bool enable)
2014 {
2015         struct mlx5e_priv *priv = netdev_priv(netdev);
2016         struct mlx5_core_dev *mdev = priv->mdev;
2017         struct mlx5e_channels new_channels = {};
2018         int err;
2019
2020         if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
2021                 return -EOPNOTSUPP;
2022
2023         new_channels.params = priv->channels.params;
2024
2025         MLX5E_SET_PFLAG(&new_channels.params, flag, enable);
2026
2027         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
2028                 priv->channels.params = new_channels.params;
2029                 return 0;
2030         }
2031
2032         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
2033         return err;
2034 }
2035
2036 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
2037 {
2038         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
2039 }
2040
2041 static int set_pflag_skb_tx_mpwqe(struct net_device *netdev, bool enable)
2042 {
2043         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_SKB_TX_MPWQE, enable);
2044 }
2045
2046 static int set_pflag_tx_port_ts(struct net_device *netdev, bool enable)
2047 {
2048         struct mlx5e_priv *priv = netdev_priv(netdev);
2049         struct mlx5_core_dev *mdev = priv->mdev;
2050         struct mlx5e_channels new_channels = {};
2051         int err;
2052
2053         if (!MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn))
2054                 return -EOPNOTSUPP;
2055
2056         /* Don't allow changing the PTP state if HTB offload is active, because
2057          * the numeration of the QoS SQs will change, while per-queue qdiscs are
2058          * attached.
2059          */
2060         if (priv->htb.maj_id) {
2061                 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the PTP state\n",
2062                            __func__);
2063                 return -EINVAL;
2064         }
2065
2066         new_channels.params = priv->channels.params;
2067         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_TX_PORT_TS, enable);
2068         /* No need to verify SQ stop room as
2069          * ptpsq.txqsq.stop_room <= generic_sq->stop_room, and both
2070          * has the same log_sq_size.
2071          */
2072
2073         if (!test_bit(MLX5E_STATE_OPENED, &priv->state)) {
2074                 struct mlx5e_params old_params;
2075
2076                 old_params = priv->channels.params;
2077                 priv->channels.params = new_channels.params;
2078                 err = mlx5e_num_channels_changed(priv);
2079                 if (err)
2080                         priv->channels.params = old_params;
2081                 goto out;
2082         }
2083
2084         err = mlx5e_safe_switch_channels(priv, &new_channels,
2085                                          mlx5e_num_channels_changed_ctx, NULL);
2086 out:
2087         if (!err)
2088                 priv->tx_ptp_opened = true;
2089
2090         return err;
2091 }
2092
2093 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
2094         { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
2095         { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
2096         { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
2097         { "rx_striding_rq",      set_pflag_rx_striding_rq },
2098         { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
2099         { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
2100         { "skb_tx_mpwqe",        set_pflag_skb_tx_mpwqe },
2101         { "tx_port_ts",          set_pflag_tx_port_ts },
2102 };
2103
2104 static int mlx5e_handle_pflag(struct net_device *netdev,
2105                               u32 wanted_flags,
2106                               enum mlx5e_priv_flag flag)
2107 {
2108         struct mlx5e_priv *priv = netdev_priv(netdev);
2109         bool enable = !!(wanted_flags & BIT(flag));
2110         u32 changes = wanted_flags ^ priv->channels.params.pflags;
2111         int err;
2112
2113         if (!(changes & BIT(flag)))
2114                 return 0;
2115
2116         err = mlx5e_priv_flags[flag].handler(netdev, enable);
2117         if (err) {
2118                 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
2119                            enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
2120                 return err;
2121         }
2122
2123         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
2124         return 0;
2125 }
2126
2127 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
2128 {
2129         struct mlx5e_priv *priv = netdev_priv(netdev);
2130         enum mlx5e_priv_flag pflag;
2131         int err;
2132
2133         mutex_lock(&priv->state_lock);
2134
2135         for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
2136                 err = mlx5e_handle_pflag(netdev, pflags, pflag);
2137                 if (err)
2138                         break;
2139         }
2140
2141         mutex_unlock(&priv->state_lock);
2142
2143         /* Need to fix some features.. */
2144         netdev_update_features(netdev);
2145
2146         return err;
2147 }
2148
2149 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
2150 {
2151         struct mlx5e_priv *priv = netdev_priv(netdev);
2152
2153         return priv->channels.params.pflags;
2154 }
2155
2156 int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
2157                     u32 *rule_locs)
2158 {
2159         struct mlx5e_priv *priv = netdev_priv(dev);
2160
2161         /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
2162          * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
2163          * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
2164          * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
2165          */
2166         if (info->cmd == ETHTOOL_GRXRINGS) {
2167                 info->data = priv->channels.params.num_channels;
2168                 return 0;
2169         }
2170
2171         return mlx5e_ethtool_get_rxnfc(dev, info, rule_locs);
2172 }
2173
2174 int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2175 {
2176         return mlx5e_ethtool_set_rxnfc(dev, cmd);
2177 }
2178
2179 const struct ethtool_ops mlx5e_ethtool_ops = {
2180         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2181                                      ETHTOOL_COALESCE_MAX_FRAMES |
2182                                      ETHTOOL_COALESCE_USE_ADAPTIVE,
2183         .get_drvinfo       = mlx5e_get_drvinfo,
2184         .get_link          = ethtool_op_get_link,
2185         .get_strings       = mlx5e_get_strings,
2186         .get_sset_count    = mlx5e_get_sset_count,
2187         .get_ethtool_stats = mlx5e_get_ethtool_stats,
2188         .get_ringparam     = mlx5e_get_ringparam,
2189         .set_ringparam     = mlx5e_set_ringparam,
2190         .get_channels      = mlx5e_get_channels,
2191         .set_channels      = mlx5e_set_channels,
2192         .get_coalesce      = mlx5e_get_coalesce,
2193         .set_coalesce      = mlx5e_set_coalesce,
2194         .get_link_ksettings  = mlx5e_get_link_ksettings,
2195         .set_link_ksettings  = mlx5e_set_link_ksettings,
2196         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
2197         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
2198         .get_rxfh          = mlx5e_get_rxfh,
2199         .set_rxfh          = mlx5e_set_rxfh,
2200         .get_rxnfc         = mlx5e_get_rxnfc,
2201         .set_rxnfc         = mlx5e_set_rxnfc,
2202         .get_tunable       = mlx5e_get_tunable,
2203         .set_tunable       = mlx5e_set_tunable,
2204         .get_pause_stats   = mlx5e_get_pause_stats,
2205         .get_pauseparam    = mlx5e_get_pauseparam,
2206         .set_pauseparam    = mlx5e_set_pauseparam,
2207         .get_ts_info       = mlx5e_get_ts_info,
2208         .set_phys_id       = mlx5e_set_phys_id,
2209         .get_wol           = mlx5e_get_wol,
2210         .set_wol           = mlx5e_set_wol,
2211         .get_module_info   = mlx5e_get_module_info,
2212         .get_module_eeprom = mlx5e_get_module_eeprom,
2213         .get_module_eeprom_by_page = mlx5e_get_module_eeprom_by_page,
2214         .flash_device      = mlx5e_flash_device,
2215         .get_priv_flags    = mlx5e_get_priv_flags,
2216         .set_priv_flags    = mlx5e_set_priv_flags,
2217         .self_test         = mlx5e_self_test,
2218         .get_msglevel      = mlx5e_get_msglevel,
2219         .set_msglevel      = mlx5e_set_msglevel,
2220         .get_fec_stats     = mlx5e_get_fec_stats,
2221         .get_fecparam      = mlx5e_get_fecparam,
2222         .set_fecparam      = mlx5e_set_fecparam,
2223 };