drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

   1 /*
   2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include "en.h"
  34 #include "en/port.h"
  35 #include "en/params.h"
  36 #include "en/xsk/pool.h"
  37 #include "en/ptp.h"
  38 #include "lib/clock.h"
  39
  40 void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
  41                                struct ethtool_drvinfo *drvinfo)
  42 {
  43         struct mlx5_core_dev *mdev = priv->mdev;
  44
  45         strlcpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
  46         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
  47                  "%d.%d.%04d (%.16s)",
  48                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
  49                  mdev->board_id);
  50         strlcpy(drvinfo->bus_info, dev_name(mdev->device),
  51                 sizeof(drvinfo->bus_info));
  52 }
  53
  54 static void mlx5e_get_drvinfo(struct net_device *dev,
  55                               struct ethtool_drvinfo *drvinfo)
  56 {
  57         struct mlx5e_priv *priv = netdev_priv(dev);
  58
  59         mlx5e_ethtool_get_drvinfo(priv, drvinfo);
  60 }
  61
  62 struct ptys2ethtool_config {
  63         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  64         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
  65 };
  66
  67 static
  68 struct ptys2ethtool_config ptys2legacy_ethtool_table[MLX5E_LINK_MODES_NUMBER];
  69 static
  70 struct ptys2ethtool_config ptys2ext_ethtool_table[MLX5E_EXT_LINK_MODES_NUMBER];
  71
  72 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, table, ...)                  \
  73         ({                                                              \
  74                 struct ptys2ethtool_config *cfg;                        \
  75                 const unsigned int modes[] = { __VA_ARGS__ };           \
  76                 unsigned int i, bit, idx;                               \
  77                 cfg = &ptys2##table##_ethtool_table[reg_];              \
  78                 bitmap_zero(cfg->supported,                             \
  79                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  80                 bitmap_zero(cfg->advertised,                            \
  81                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
  82                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
  83                         bit = modes[i] % 64;                            \
  84                         idx = modes[i] / 64;                            \
  85                         __set_bit(bit, &cfg->supported[idx]);           \
  86                         __set_bit(bit, &cfg->advertised[idx]);          \
  87                 }                                                       \
  88         })
  89
  90 void mlx5e_build_ptys2ethtool_map(void)
  91 {
  92         memset(ptys2legacy_ethtool_table, 0, sizeof(ptys2legacy_ethtool_table));
  93         memset(ptys2ext_ethtool_table, 0, sizeof(ptys2ext_ethtool_table));
  94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, legacy,
  95                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, legacy,
  97                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
  98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, legacy,
  99                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, legacy,
 101                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
 102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, legacy,
 103                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, legacy,
 105                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
 106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, legacy,
 107                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
 108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, legacy,
 109                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
 110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, legacy,
 111                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
 112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, legacy,
 113                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, legacy,
 115                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, legacy,
 117                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
 118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, legacy,
 119                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
 120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, legacy,
 121                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, legacy,
 123                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, legacy,
 125                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
 126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, legacy,
 127                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
 128         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, legacy,
 129                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
 130         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, legacy,
 131                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 132         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, legacy,
 133                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
 134         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, legacy,
 135                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
 136         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, legacy,
 137                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
 138         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, legacy,
 139                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 140         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, legacy,
 141                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
 142         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, legacy,
 143                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
 144         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_SGMII_100M, ext,
 145                                        ETHTOOL_LINK_MODE_100baseT_Full_BIT);
 146         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_X_SGMII, ext,
 147                                        ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
 148                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
 149                                        ETHTOOL_LINK_MODE_1000baseX_Full_BIT);
 150         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_5GBASE_R, ext,
 151                                        ETHTOOL_LINK_MODE_5000baseT_Full_BIT);
 152         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_XFI_XAUI_1, ext,
 153                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
 154                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
 155                                        ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
 156                                        ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
 157                                        ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
 158                                        ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
 159                                        ETHTOOL_LINK_MODE_10000baseER_Full_BIT);
 160         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_XLAUI_4_XLPPI_4, ext,
 161                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
 162                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
 163                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
 164                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
 165         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GAUI_1_25GBASE_CR_KR, ext,
 166                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
 167                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
 168                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
 169         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2,
 170                                        ext,
 171                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
 172                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
 173                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
 174         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR, ext,
 175                                        ETHTOOL_LINK_MODE_50000baseKR_Full_BIT,
 176                                        ETHTOOL_LINK_MODE_50000baseSR_Full_BIT,
 177                                        ETHTOOL_LINK_MODE_50000baseCR_Full_BIT,
 178                                        ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 179                                        ETHTOOL_LINK_MODE_50000baseDR_Full_BIT);
 180         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_CAUI_4_100GBASE_CR4_KR4, ext,
 181                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
 182                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
 183                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
 184                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
 185         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_2_100GBASE_CR2_KR2, ext,
 186                                        ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT,
 187                                        ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT,
 188                                        ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT,
 189                                        ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 190                                        ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT);
 191         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_4_200GBASE_CR4_KR4, ext,
 192                                        ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT,
 193                                        ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT,
 194                                        ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 195                                        ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT,
 196                                        ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT);
 197         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GAUI_1_100GBASE_CR_KR, ext,
 198                                        ETHTOOL_LINK_MODE_100000baseKR_Full_BIT,
 199                                        ETHTOOL_LINK_MODE_100000baseSR_Full_BIT,
 200                                        ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 201                                        ETHTOOL_LINK_MODE_100000baseDR_Full_BIT,
 202                                        ETHTOOL_LINK_MODE_100000baseCR_Full_BIT);
 203         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_200GAUI_2_200GBASE_CR2_KR2, ext,
 204                                        ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT,
 205                                        ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT,
 206                                        ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 207                                        ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT,
 208                                        ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT);
 209         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_400GAUI_4_400GBASE_CR4_KR4, ext,
 210                                        ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT,
 211                                        ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT,
 212                                        ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 213                                        ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT,
 214                                        ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT);
 215 }
 216
 217 static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev,
 218                                         struct ptys2ethtool_config **arr,
 219                                         u32 *size)
 220 {
 221         bool ext = mlx5e_ptys_ext_supported(mdev);
 222
 223         *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 224         *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 225                       ARRAY_SIZE(ptys2legacy_ethtool_table);
 226 }
 227
 228 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
 229
 230 struct pflag_desc {
 231         char name[ETH_GSTRING_LEN];
 232         mlx5e_pflag_handler handler;
 233 };
 234
 235 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS];
 236
 237 int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
 238 {
 239         switch (sset) {
 240         case ETH_SS_STATS:
 241                 return mlx5e_stats_total_num(priv);
 242         case ETH_SS_PRIV_FLAGS:
 243                 return MLX5E_NUM_PFLAGS;
 244         case ETH_SS_TEST:
 245                 return mlx5e_self_test_num(priv);
 246         default:
 247                 return -EOPNOTSUPP;
 248         }
 249 }
 250
 251 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
 252 {
 253         struct mlx5e_priv *priv = netdev_priv(dev);
 254
 255         return mlx5e_ethtool_get_sset_count(priv, sset);
 256 }
 257
 258 void mlx5e_ethtool_get_strings(struct mlx5e_priv *priv, u32 stringset, u8 *data)
 259 {
 260         int i;
 261
 262         switch (stringset) {
 263         case ETH_SS_PRIV_FLAGS:
 264                 for (i = 0; i < MLX5E_NUM_PFLAGS; i++)
 265                         strcpy(data + i * ETH_GSTRING_LEN,
 266                                mlx5e_priv_flags[i].name);
 267                 break;
 268
 269         case ETH_SS_TEST:
 270                 for (i = 0; i < mlx5e_self_test_num(priv); i++)
 271                         strcpy(data + i * ETH_GSTRING_LEN,
 272                                mlx5e_self_tests[i]);
 273                 break;
 274
 275         case ETH_SS_STATS:
 276                 mlx5e_stats_fill_strings(priv, data);
 277                 break;
 278         }
 279 }
 280
 281 static void mlx5e_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 282 {
 283         struct mlx5e_priv *priv = netdev_priv(dev);
 284
 285         mlx5e_ethtool_get_strings(priv, stringset, data);
 286 }
 287
 288 void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
 289                                      struct ethtool_stats *stats, u64 *data)
 290 {
 291         int idx = 0;
 292
 293         mutex_lock(&priv->state_lock);
 294         mlx5e_stats_update(priv);
 295         mutex_unlock(&priv->state_lock);
 296
 297         mlx5e_stats_fill(priv, data, idx);
 298 }
 299
 300 static void mlx5e_get_ethtool_stats(struct net_device *dev,
 301                                     struct ethtool_stats *stats,
 302                                     u64 *data)
 303 {
 304         struct mlx5e_priv *priv = netdev_priv(dev);
 305
 306         mlx5e_ethtool_get_ethtool_stats(priv, stats, data);
 307 }
 308
 309 void mlx5e_ethtool_get_ringparam(struct mlx5e_priv *priv,
 310                                  struct ethtool_ringparam *param)
 311 {
 312         param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
 313         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
 314         param->rx_pending     = 1 << priv->channels.params.log_rq_mtu_frames;
 315         param->tx_pending     = 1 << priv->channels.params.log_sq_size;
 316 }
 317
 318 static void mlx5e_get_ringparam(struct net_device *dev,
 319                                 struct ethtool_ringparam *param)
 320 {
 321         struct mlx5e_priv *priv = netdev_priv(dev);
 322
 323         mlx5e_ethtool_get_ringparam(priv, param);
 324 }
 325
 326 int mlx5e_ethtool_set_ringparam(struct mlx5e_priv *priv,
 327                                 struct ethtool_ringparam *param)
 328 {
 329         struct mlx5e_channels new_channels = {};
 330         u8 log_rq_size;
 331         u8 log_sq_size;
 332         int err = 0;
 333
 334         if (param->rx_jumbo_pending) {
 335                 netdev_info(priv->netdev, "%s: rx_jumbo_pending not supported\n",
 336                             __func__);
 337                 return -EINVAL;
 338         }
 339         if (param->rx_mini_pending) {
 340                 netdev_info(priv->netdev, "%s: rx_mini_pending not supported\n",
 341                             __func__);
 342                 return -EINVAL;
 343         }
 344
 345         if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
 346                 netdev_info(priv->netdev, "%s: rx_pending (%d) < min (%d)\n",
 347                             __func__, param->rx_pending,
 348                             1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
 349                 return -EINVAL;
 350         }
 351
 352         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
 353                 netdev_info(priv->netdev, "%s: tx_pending (%d) < min (%d)\n",
 354                             __func__, param->tx_pending,
 355                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
 356                 return -EINVAL;
 357         }
 358
 359         log_rq_size = order_base_2(param->rx_pending);
 360         log_sq_size = order_base_2(param->tx_pending);
 361
 362         if (log_rq_size == priv->channels.params.log_rq_mtu_frames &&
 363             log_sq_size == priv->channels.params.log_sq_size)
 364                 return 0;
 365
 366         mutex_lock(&priv->state_lock);
 367
 368         new_channels.params = priv->channels.params;
 369         new_channels.params.log_rq_mtu_frames = log_rq_size;
 370         new_channels.params.log_sq_size = log_sq_size;
 371
 372         err = mlx5e_validate_params(priv->mdev, &new_channels.params);
 373         if (err)
 374                 goto unlock;
 375
 376         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
 377
 378 unlock:
 379         mutex_unlock(&priv->state_lock);
 380
 381         return err;
 382 }
 383
 384 static int mlx5e_set_ringparam(struct net_device *dev,
 385                                struct ethtool_ringparam *param)
 386 {
 387         struct mlx5e_priv *priv = netdev_priv(dev);
 388
 389         return mlx5e_ethtool_set_ringparam(priv, param);
 390 }
 391
 392 void mlx5e_ethtool_get_channels(struct mlx5e_priv *priv,
 393                                 struct ethtool_channels *ch)
 394 {
 395         mutex_lock(&priv->state_lock);
 396
 397         ch->max_combined   = priv->max_nch;
 398         ch->combined_count = priv->channels.params.num_channels;
 399         if (priv->xsk.refcnt) {
 400                 /* The upper half are XSK queues. */
 401                 ch->max_combined *= 2;
 402                 ch->combined_count *= 2;
 403         }
 404
 405         mutex_unlock(&priv->state_lock);
 406 }
 407
 408 static void mlx5e_get_channels(struct net_device *dev,
 409                                struct ethtool_channels *ch)
 410 {
 411         struct mlx5e_priv *priv = netdev_priv(dev);
 412
 413         mlx5e_ethtool_get_channels(priv, ch);
 414 }
 415
 416 int mlx5e_ethtool_set_channels(struct mlx5e_priv *priv,
 417                                struct ethtool_channels *ch)
 418 {
 419         struct mlx5e_params *cur_params = &priv->channels.params;
 420         unsigned int count = ch->combined_count;
 421         struct mlx5e_channels new_channels = {};
 422         bool arfs_enabled;
 423         bool opened;
 424         int err = 0;
 425
 426         if (!count) {
 427                 netdev_info(priv->netdev, "%s: combined_count=0 not supported\n",
 428                             __func__);
 429                 return -EINVAL;
 430         }
 431
 432         if (cur_params->num_channels == count)
 433                 return 0;
 434
 435         mutex_lock(&priv->state_lock);
 436
 437         /* Don't allow changing the number of channels if there is an active
 438          * XSK, because the numeration of the XSK and regular RQs will change.
 439          */
 440         if (priv->xsk.refcnt) {
 441                 err = -EINVAL;
 442                 netdev_err(priv->netdev, "%s: AF_XDP is active, cannot change the number of channels\n",
 443                            __func__);
 444                 goto out;
 445         }
 446
 447         /* Don't allow changing the number of channels if HTB offload is active,
 448          * because the numeration of the QoS SQs will change, while per-queue
 449          * qdiscs are attached.
 450          */
 451         if (priv->htb.maj_id) {
 452                 err = -EINVAL;
 453                 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the number of channels\n",
 454                            __func__);
 455                 goto out;
 456         }
 457
 458         new_channels.params = *cur_params;
 459         new_channels.params.num_channels = count;
 460
 461         opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
 462
 463         arfs_enabled = opened && (priv->netdev->features & NETIF_F_NTUPLE);
 464         if (arfs_enabled)
 465                 mlx5e_arfs_disable(priv);
 466
 467         /* Switch to new channels, set new parameters and close old ones */
 468         err = mlx5e_safe_switch_channels(priv, &new_channels,
 469                                          mlx5e_num_channels_changed_ctx, NULL);
 470
 471         if (arfs_enabled) {
 472                 int err2 = mlx5e_arfs_enable(priv);
 473
 474                 if (err2)
 475                         netdev_err(priv->netdev, "%s: mlx5e_arfs_enable failed: %d\n",
 476                                    __func__, err2);
 477         }
 478
 479 out:
 480         mutex_unlock(&priv->state_lock);
 481
 482         return err;
 483 }
 484
 485 static int mlx5e_set_channels(struct net_device *dev,
 486                               struct ethtool_channels *ch)
 487 {
 488         struct mlx5e_priv *priv = netdev_priv(dev);
 489
 490         return mlx5e_ethtool_set_channels(priv, ch);
 491 }
 492
 493 int mlx5e_ethtool_get_coalesce(struct mlx5e_priv *priv,
 494                                struct ethtool_coalesce *coal)
 495 {
 496         struct dim_cq_moder *rx_moder, *tx_moder;
 497
 498         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
 499                 return -EOPNOTSUPP;
 500
 501         rx_moder = &priv->channels.params.rx_cq_moderation;
 502         coal->rx_coalesce_usecs         = rx_moder->usec;
 503         coal->rx_max_coalesced_frames   = rx_moder->pkts;
 504         coal->use_adaptive_rx_coalesce  = priv->channels.params.rx_dim_enabled;
 505
 506         tx_moder = &priv->channels.params.tx_cq_moderation;
 507         coal->tx_coalesce_usecs         = tx_moder->usec;
 508         coal->tx_max_coalesced_frames   = tx_moder->pkts;
 509         coal->use_adaptive_tx_coalesce  = priv->channels.params.tx_dim_enabled;
 510
 511         return 0;
 512 }
 513
 514 static int mlx5e_get_coalesce(struct net_device *netdev,
 515                               struct ethtool_coalesce *coal)
 516 {
 517         struct mlx5e_priv *priv = netdev_priv(netdev);
 518
 519         return mlx5e_ethtool_get_coalesce(priv, coal);
 520 }
 521
 522 #define MLX5E_MAX_COAL_TIME             MLX5_MAX_CQ_PERIOD
 523 #define MLX5E_MAX_COAL_FRAMES           MLX5_MAX_CQ_COUNT
 524
 525 static void
 526 mlx5e_set_priv_channels_tx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 527 {
 528         struct mlx5_core_dev *mdev = priv->mdev;
 529         int tc;
 530         int i;
 531
 532         for (i = 0; i < priv->channels.num; ++i) {
 533                 struct mlx5e_channel *c = priv->channels.c[i];
 534
 535                 for (tc = 0; tc < c->num_tc; tc++) {
 536                         mlx5_core_modify_cq_moderation(mdev,
 537                                                 &c->sq[tc].cq.mcq,
 538                                                 coal->tx_coalesce_usecs,
 539                                                 coal->tx_max_coalesced_frames);
 540                 }
 541         }
 542 }
 543
 544 static void
 545 mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv *priv, struct ethtool_coalesce *coal)
 546 {
 547         struct mlx5_core_dev *mdev = priv->mdev;
 548         int i;
 549
 550         for (i = 0; i < priv->channels.num; ++i) {
 551                 struct mlx5e_channel *c = priv->channels.c[i];
 552
 553                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
 554                                                coal->rx_coalesce_usecs,
 555                                                coal->rx_max_coalesced_frames);
 556         }
 557 }
 558
 559 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
 560                                struct ethtool_coalesce *coal)
 561 {
 562         struct dim_cq_moder *rx_moder, *tx_moder;
 563         struct mlx5_core_dev *mdev = priv->mdev;
 564         struct mlx5e_channels new_channels = {};
 565         bool reset_rx, reset_tx;
 566         int err = 0;
 567
 568         if (!MLX5_CAP_GEN(mdev, cq_moderation))
 569                 return -EOPNOTSUPP;
 570
 571         if (coal->tx_coalesce_usecs > MLX5E_MAX_COAL_TIME ||
 572             coal->rx_coalesce_usecs > MLX5E_MAX_COAL_TIME) {
 573                 netdev_info(priv->netdev, "%s: maximum coalesce time supported is %lu usecs\n",
 574                             __func__, MLX5E_MAX_COAL_TIME);
 575                 return -ERANGE;
 576         }
 577
 578         if (coal->tx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES ||
 579             coal->rx_max_coalesced_frames > MLX5E_MAX_COAL_FRAMES) {
 580                 netdev_info(priv->netdev, "%s: maximum coalesced frames supported is %lu\n",
 581                             __func__, MLX5E_MAX_COAL_FRAMES);
 582                 return -ERANGE;
 583         }
 584
 585         mutex_lock(&priv->state_lock);
 586         new_channels.params = priv->channels.params;
 587
 588         rx_moder          = &new_channels.params.rx_cq_moderation;
 589         rx_moder->usec    = coal->rx_coalesce_usecs;
 590         rx_moder->pkts    = coal->rx_max_coalesced_frames;
 591         new_channels.params.rx_dim_enabled = !!coal->use_adaptive_rx_coalesce;
 592
 593         tx_moder          = &new_channels.params.tx_cq_moderation;
 594         tx_moder->usec    = coal->tx_coalesce_usecs;
 595         tx_moder->pkts    = coal->tx_max_coalesced_frames;
 596         new_channels.params.tx_dim_enabled = !!coal->use_adaptive_tx_coalesce;
 597
 598         reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
 599         reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
 600
 601         if (reset_rx) {
 602                 u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
 603                                           MLX5E_PFLAG_RX_CQE_BASED_MODER);
 604
 605                 mlx5e_reset_rx_moderation(&new_channels.params, mode);
 606         }
 607         if (reset_tx) {
 608                 u8 mode = MLX5E_GET_PFLAG(&new_channels.params,
 609                                           MLX5E_PFLAG_TX_CQE_BASED_MODER);
 610
 611                 mlx5e_reset_tx_moderation(&new_channels.params, mode);
 612         }
 613
 614         /* If DIM state hasn't changed, it's possible to modify interrupt
 615          * moderation parameters on the fly, even if the channels are open.
 616          */
 617         if (!reset_rx && !reset_tx && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 618                 if (!coal->use_adaptive_rx_coalesce)
 619                         mlx5e_set_priv_channels_rx_coalesce(priv, coal);
 620                 if (!coal->use_adaptive_tx_coalesce)
 621                         mlx5e_set_priv_channels_tx_coalesce(priv, coal);
 622                 priv->channels.params = new_channels.params;
 623                 goto out;
 624         }
 625
 626         err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
 627
 628 out:
 629         mutex_unlock(&priv->state_lock);
 630         return err;
 631 }
 632
 633 static int mlx5e_set_coalesce(struct net_device *netdev,
 634                               struct ethtool_coalesce *coal)
 635 {
 636         struct mlx5e_priv *priv    = netdev_priv(netdev);
 637
 638         return mlx5e_ethtool_set_coalesce(priv, coal);
 639 }
 640
 641 static void ptys2ethtool_supported_link(struct mlx5_core_dev *mdev,
 642                                         unsigned long *supported_modes,
 643                                         u32 eth_proto_cap)
 644 {
 645         unsigned long proto_cap = eth_proto_cap;
 646         struct ptys2ethtool_config *table;
 647         u32 max_size;
 648         int proto;
 649
 650         mlx5e_ethtool_get_speed_arr(mdev, &table, &max_size);
 651         for_each_set_bit(proto, &proto_cap, max_size)
 652                 bitmap_or(supported_modes, supported_modes,
 653                           table[proto].supported,
 654                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 655 }
 656
 657 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
 658                                     u32 eth_proto_cap, bool ext)
 659 {
 660         unsigned long proto_cap = eth_proto_cap;
 661         struct ptys2ethtool_config *table;
 662         u32 max_size;
 663         int proto;
 664
 665         table = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
 666         max_size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
 667                          ARRAY_SIZE(ptys2legacy_ethtool_table);
 668
 669         for_each_set_bit(proto, &proto_cap, max_size)
 670                 bitmap_or(advertising_modes, advertising_modes,
 671                           table[proto].advertised,
 672                           __ETHTOOL_LINK_MODE_MASK_NBITS);
 673 }
 674
 675 static const u32 pplm_fec_2_ethtool[] = {
 676         [MLX5E_FEC_NOFEC] = ETHTOOL_FEC_OFF,
 677         [MLX5E_FEC_FIRECODE] = ETHTOOL_FEC_BASER,
 678         [MLX5E_FEC_RS_528_514] = ETHTOOL_FEC_RS,
 679         [MLX5E_FEC_RS_544_514] = ETHTOOL_FEC_RS,
 680         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_FEC_LLRS,
 681 };
 682
 683 static u32 pplm2ethtool_fec(u_long fec_mode, unsigned long size)
 684 {
 685         int mode = 0;
 686
 687         if (!fec_mode)
 688                 return ETHTOOL_FEC_AUTO;
 689
 690         mode = find_first_bit(&fec_mode, size);
 691
 692         if (mode < ARRAY_SIZE(pplm_fec_2_ethtool))
 693                 return pplm_fec_2_ethtool[mode];
 694
 695         return 0;
 696 }
 697
 698 #define MLX5E_ADVERTISE_SUPPORTED_FEC(mlx5_fec, ethtool_fec)            \
 699         do {                                                            \
 700                 if (mlx5e_fec_in_caps(dev, 1 << (mlx5_fec)))            \
 701                         __set_bit(ethtool_fec,                          \
 702                                   link_ksettings->link_modes.supported);\
 703         } while (0)
 704
 705 static const u32 pplm_fec_2_ethtool_linkmodes[] = {
 706         [MLX5E_FEC_NOFEC] = ETHTOOL_LINK_MODE_FEC_NONE_BIT,
 707         [MLX5E_FEC_FIRECODE] = ETHTOOL_LINK_MODE_FEC_BASER_BIT,
 708         [MLX5E_FEC_RS_528_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 709         [MLX5E_FEC_RS_544_514] = ETHTOOL_LINK_MODE_FEC_RS_BIT,
 710         [MLX5E_FEC_LLRS_272_257_1] = ETHTOOL_LINK_MODE_FEC_LLRS_BIT,
 711 };
 712
 713 static int get_fec_supported_advertised(struct mlx5_core_dev *dev,
 714                                         struct ethtool_link_ksettings *link_ksettings)
 715 {
 716         unsigned long active_fec_long;
 717         u32 active_fec;
 718         u32 bitn;
 719         int err;
 720
 721         err = mlx5e_get_fec_mode(dev, &active_fec, NULL);
 722         if (err)
 723                 return (err == -EOPNOTSUPP) ? 0 : err;
 724
 725         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_NOFEC,
 726                                       ETHTOOL_LINK_MODE_FEC_NONE_BIT);
 727         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_FIRECODE,
 728                                       ETHTOOL_LINK_MODE_FEC_BASER_BIT);
 729         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_RS_528_514,
 730                                       ETHTOOL_LINK_MODE_FEC_RS_BIT);
 731         MLX5E_ADVERTISE_SUPPORTED_FEC(MLX5E_FEC_LLRS_272_257_1,
 732                                       ETHTOOL_LINK_MODE_FEC_LLRS_BIT);
 733
 734         active_fec_long = active_fec;
 735         /* active fec is a bit set, find out which bit is set and
 736          * advertise the corresponding ethtool bit
 737          */
 738         bitn = find_first_bit(&active_fec_long, sizeof(active_fec_long) * BITS_PER_BYTE);
 739         if (bitn < ARRAY_SIZE(pplm_fec_2_ethtool_linkmodes))
 740                 __set_bit(pplm_fec_2_ethtool_linkmodes[bitn],
 741                           link_ksettings->link_modes.advertising);
 742
 743         return 0;
 744 }
 745
 746 static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,
 747                                                    struct ethtool_link_ksettings *link_ksettings,
 748                                                    u32 eth_proto_cap, u8 connector_type)
 749 {
 750         if (!MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type)) {
 751                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
 752                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
 753                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
 754                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
 755                                    | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
 756                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 757                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 758                                                              supported,
 759                                                              FIBRE);
 760                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 761                                                              advertising,
 762                                                              FIBRE);
 763                 }
 764
 765                 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
 766                                    | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
 767                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
 768                                    | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
 769                                    | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
 770                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 771                                                              supported,
 772                                                              Backplane);
 773                         ethtool_link_ksettings_add_link_mode(link_ksettings,
 774                                                              advertising,
 775                                                              Backplane);
 776                 }
 777                 return;
 778         }
 779
 780         switch (connector_type) {
 781         case MLX5E_PORT_TP:
 782                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 783                                                      supported, TP);
 784                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 785                                                      advertising, TP);
 786                 break;
 787         case MLX5E_PORT_AUI:
 788                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 789                                                      supported, AUI);
 790                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 791                                                      advertising, AUI);
 792                 break;
 793         case MLX5E_PORT_BNC:
 794                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 795                                                      supported, BNC);
 796                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 797                                                      advertising, BNC);
 798                 break;
 799         case MLX5E_PORT_MII:
 800                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 801                                                      supported, MII);
 802                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 803                                                      advertising, MII);
 804                 break;
 805         case MLX5E_PORT_FIBRE:
 806                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 807                                                      supported, FIBRE);
 808                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 809                                                      advertising, FIBRE);
 810                 break;
 811         case MLX5E_PORT_DA:
 812                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 813                                                      supported, Backplane);
 814                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 815                                                      advertising, Backplane);
 816                 break;
 817         case MLX5E_PORT_NONE:
 818         case MLX5E_PORT_OTHER:
 819         default:
 820                 break;
 821         }
 822 }
 823
 824 static void get_speed_duplex(struct net_device *netdev,
 825                              u32 eth_proto_oper, bool force_legacy,
 826                              u16 data_rate_oper,
 827                              struct ethtool_link_ksettings *link_ksettings)
 828 {
 829         struct mlx5e_priv *priv = netdev_priv(netdev);
 830         u32 speed = SPEED_UNKNOWN;
 831         u8 duplex = DUPLEX_UNKNOWN;
 832
 833         if (!netif_carrier_ok(netdev))
 834                 goto out;
 835
 836         speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
 837         if (!speed) {
 838                 if (data_rate_oper)
 839                         speed = 100 * data_rate_oper;
 840                 else
 841                         speed = SPEED_UNKNOWN;
 842                 goto out;
 843         }
 844
 845         duplex = DUPLEX_FULL;
 846
 847 out:
 848         link_ksettings->base.speed = speed;
 849         link_ksettings->base.duplex = duplex;
 850 }
 851
 852 static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
 853                           struct ethtool_link_ksettings *link_ksettings)
 854 {
 855         unsigned long *supported = link_ksettings->link_modes.supported;
 856         ptys2ethtool_supported_link(mdev, supported, eth_proto_cap);
 857
 858         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
 859 }
 860
 861 static void get_advertising(u32 eth_proto_cap, u8 tx_pause, u8 rx_pause,
 862                             struct ethtool_link_ksettings *link_ksettings,
 863                             bool ext)
 864 {
 865         unsigned long *advertising = link_ksettings->link_modes.advertising;
 866         ptys2ethtool_adver_link(advertising, eth_proto_cap, ext);
 867
 868         if (rx_pause)
 869                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
 870         if (tx_pause ^ rx_pause)
 871                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
 872 }
 873
 874 static int ptys2connector_type[MLX5E_CONNECTOR_TYPE_NUMBER] = {
 875                 [MLX5E_PORT_UNKNOWN]            = PORT_OTHER,
 876                 [MLX5E_PORT_NONE]               = PORT_NONE,
 877                 [MLX5E_PORT_TP]                 = PORT_TP,
 878                 [MLX5E_PORT_AUI]                = PORT_AUI,
 879                 [MLX5E_PORT_BNC]                = PORT_BNC,
 880                 [MLX5E_PORT_MII]                = PORT_MII,
 881                 [MLX5E_PORT_FIBRE]              = PORT_FIBRE,
 882                 [MLX5E_PORT_DA]                 = PORT_DA,
 883                 [MLX5E_PORT_OTHER]              = PORT_OTHER,
 884         };
 885
 886 static u8 get_connector_port(struct mlx5_core_dev *mdev, u32 eth_proto, u8 connector_type)
 887 {
 888         if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_connector_type))
 889                 return ptys2connector_type[connector_type];
 890
 891         if (eth_proto &
 892             (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)   |
 893              MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)  |
 894              MLX5E_PROT_MASK(MLX5E_100GBASE_SR4) |
 895              MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
 896                 return PORT_FIBRE;
 897         }
 898
 899         if (eth_proto &
 900             (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4) |
 901              MLX5E_PROT_MASK(MLX5E_10GBASE_CR)  |
 902              MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
 903                 return PORT_DA;
 904         }
 905
 906         if (eth_proto &
 907             (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4) |
 908              MLX5E_PROT_MASK(MLX5E_10GBASE_KR)  |
 909              MLX5E_PROT_MASK(MLX5E_40GBASE_KR4) |
 910              MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
 911                 return PORT_NONE;
 912         }
 913
 914         return PORT_OTHER;
 915 }
 916
 917 static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp,
 918                                struct ethtool_link_ksettings *link_ksettings)
 919 {
 920         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
 921         bool ext = mlx5e_ptys_ext_supported(mdev);
 922
 923         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
 924 }
 925
 926 int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
 927                                      struct ethtool_link_ksettings *link_ksettings)
 928 {
 929         struct mlx5_core_dev *mdev = priv->mdev;
 930         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {};
 931         u32 eth_proto_admin;
 932         u8 an_disable_admin;
 933         u16 data_rate_oper;
 934         u32 eth_proto_oper;
 935         u32 eth_proto_cap;
 936         u8 connector_type;
 937         u32 rx_pause = 0;
 938         u32 tx_pause = 0;
 939         u32 eth_proto_lp;
 940         bool admin_ext;
 941         u8 an_status;
 942         bool ext;
 943         int err;
 944
 945         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
 946         if (err) {
 947                 netdev_err(priv->netdev, "%s: query port ptys failed: %d\n",
 948                            __func__, err);
 949                 goto err_query_regs;
 950         }
 951         ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
 952         eth_proto_cap    = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 953                                               eth_proto_capability);
 954         eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
 955                                               eth_proto_admin);
 956         /* Fields: eth_proto_admin and ext_eth_proto_admin  are
 957          * mutually exclusive. Hence try reading legacy advertising
 958          * when extended advertising is zero.
 959          * admin_ext indicates which proto_admin (ext vs. legacy)
 960          * should be read and interpreted
 961          */
 962         admin_ext = ext;
 963         if (ext && !eth_proto_admin) {
 964                 eth_proto_admin  = MLX5_GET_ETH_PROTO(ptys_reg, out, false,
 965                                                       eth_proto_admin);
 966                 admin_ext = false;
 967         }
 968
 969         eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
 970                                               eth_proto_oper);
 971         eth_proto_lp        = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 972         an_disable_admin    = MLX5_GET(ptys_reg, out, an_disable_admin);
 973         an_status           = MLX5_GET(ptys_reg, out, an_status);
 974         connector_type      = MLX5_GET(ptys_reg, out, connector_type);
 975         data_rate_oper      = MLX5_GET(ptys_reg, out, data_rate_oper);
 976
 977         mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
 978
 979         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
 980         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
 981
 982         get_supported(mdev, eth_proto_cap, link_ksettings);
 983         get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
 984                         admin_ext);
 985         get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
 986                          data_rate_oper, link_ksettings);
 987
 988         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 989         connector_type = connector_type < MLX5E_CONNECTOR_TYPE_NUMBER ?
 990                          connector_type : MLX5E_PORT_UNKNOWN;
 991         link_ksettings->base.port = get_connector_port(mdev, eth_proto_oper, connector_type);
 992         ptys2ethtool_supported_advertised_port(mdev, link_ksettings, eth_proto_admin,
 993                                                connector_type);
 994         get_lp_advertising(mdev, eth_proto_lp, link_ksettings);
 995
 996         if (an_status == MLX5_AN_COMPLETE)
 997                 ethtool_link_ksettings_add_link_mode(link_ksettings,
 998                                                      lp_advertising, Autoneg);
 999
1000         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
1001                                                           AUTONEG_ENABLE;
1002         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
1003                                              Autoneg);
1004
1005         err = get_fec_supported_advertised(mdev, link_ksettings);
1006         if (err) {
1007                 netdev_dbg(priv->netdev, "%s: FEC caps query failed: %d\n",
1008                            __func__, err);
1009                 err = 0; /* don't fail caps query because of FEC error */
1010         }
1011
1012         if (!an_disable_admin)
1013                 ethtool_link_ksettings_add_link_mode(link_ksettings,
1014                                                      advertising, Autoneg);
1015
1016 err_query_regs:
1017         return err;
1018 }
1019
1020 static int mlx5e_get_link_ksettings(struct net_device *netdev,
1021                                     struct ethtool_link_ksettings *link_ksettings)
1022 {
1023         struct mlx5e_priv *priv = netdev_priv(netdev);
1024
1025         return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
1026 }
1027
1028 static int mlx5e_speed_validate(struct net_device *netdev, bool ext,
1029                                 const unsigned long link_modes, u8 autoneg)
1030 {
1031         /* Extended link-mode has no speed limitations. */
1032         if (ext)
1033                 return 0;
1034
1035         if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1036             autoneg != AUTONEG_ENABLE) {
1037                 netdev_err(netdev, "%s: 56G link speed requires autoneg enabled\n",
1038                            __func__);
1039                 return -EINVAL;
1040         }
1041         return 0;
1042 }
1043
1044 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
1045 {
1046         u32 i, ptys_modes = 0;
1047
1048         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
1049                 if (*ptys2legacy_ethtool_table[i].advertised == 0)
1050                         continue;
1051                 if (bitmap_intersects(ptys2legacy_ethtool_table[i].advertised,
1052                                       link_modes,
1053                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
1054                         ptys_modes |= MLX5E_PROT_MASK(i);
1055         }
1056
1057         return ptys_modes;
1058 }
1059
1060 static u32 mlx5e_ethtool2ptys_ext_adver_link(const unsigned long *link_modes)
1061 {
1062         u32 i, ptys_modes = 0;
1063         unsigned long modes[2];
1064
1065         for (i = 0; i < MLX5E_EXT_LINK_MODES_NUMBER; ++i) {
1066                 if (ptys2ext_ethtool_table[i].advertised[0] == 0 &&
1067                     ptys2ext_ethtool_table[i].advertised[1] == 0)
1068                         continue;
1069                 memset(modes, 0, sizeof(modes));
1070                 bitmap_and(modes, ptys2ext_ethtool_table[i].advertised,
1071                            link_modes, __ETHTOOL_LINK_MODE_MASK_NBITS);
1072
1073                 if (modes[0] == ptys2ext_ethtool_table[i].advertised[0] &&
1074                     modes[1] == ptys2ext_ethtool_table[i].advertised[1])
1075                         ptys_modes |= MLX5E_PROT_MASK(i);
1076         }
1077         return ptys_modes;
1078 }
1079
1080 static bool ext_link_mode_requested(const unsigned long *adver)
1081 {
1082 #define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
1083         int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
1084         __ETHTOOL_DECLARE_LINK_MODE_MASK(modes) = {0,};
1085
1086         bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
1087         return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
1088 }
1089
1090 static bool ext_requested(u8 autoneg, const unsigned long *adver, bool ext_supported)
1091 {
1092         bool ext_link_mode = ext_link_mode_requested(adver);
1093
1094         return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_supported;
1095 }
1096
1097 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
1098                                      const struct ethtool_link_ksettings *link_ksettings)
1099 {
1100         struct mlx5_core_dev *mdev = priv->mdev;
1101         struct mlx5e_port_eth_proto eproto;
1102         const unsigned long *adver;
1103         bool an_changes = false;
1104         u8 an_disable_admin;
1105         bool ext_supported;
1106         u8 an_disable_cap;
1107         bool an_disable;
1108         u32 link_modes;
1109         u8 an_status;
1110         u8 autoneg;
1111         u32 speed;
1112         bool ext;
1113         int err;
1114
1115         u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
1116
1117         adver = link_ksettings->link_modes.advertising;
1118         autoneg = link_ksettings->base.autoneg;
1119         speed = link_ksettings->base.speed;
1120
1121         ext_supported = mlx5e_ptys_ext_supported(mdev);
1122         ext = ext_requested(autoneg, adver, ext_supported);
1123         if (!ext_supported && ext)
1124                 return -EOPNOTSUPP;
1125
1126         ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
1127                                   mlx5e_ethtool2ptys_adver_link;
1128         err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
1129         if (err) {
1130                 netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
1131                            __func__, err);
1132                 goto out;
1133         }
1134         link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1135                 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1136
1137         err = mlx5e_speed_validate(priv->netdev, ext, link_modes, autoneg);
1138         if (err)
1139                 goto out;
1140
1141         link_modes = link_modes & eproto.cap;
1142         if (!link_modes) {
1143                 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
1144                            __func__);
1145                 err = -EINVAL;
1146                 goto out;
1147         }
1148
1149         mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
1150                                     &an_disable_admin);
1151
1152         an_disable = autoneg == AUTONEG_DISABLE;
1153         an_changes = ((!an_disable && an_disable_admin) ||
1154                       (an_disable && !an_disable_admin));
1155
1156         if (!an_changes && link_modes == eproto.admin)
1157                 goto out;
1158
1159         mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
1160         mlx5_toggle_port_link(mdev);
1161
1162 out:
1163         return err;
1164 }
1165
1166 static int mlx5e_set_link_ksettings(struct net_device *netdev,
1167                                     const struct ethtool_link_ksettings *link_ksettings)
1168 {
1169         struct mlx5e_priv *priv = netdev_priv(netdev);
1170
1171         return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
1172 }
1173
1174 u32 mlx5e_ethtool_get_rxfh_key_size(struct mlx5e_priv *priv)
1175 {
1176         return sizeof(priv->rss_params.toeplitz_hash_key);
1177 }
1178
1179 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
1180 {
1181         struct mlx5e_priv *priv = netdev_priv(netdev);
1182
1183         return mlx5e_ethtool_get_rxfh_key_size(priv);
1184 }
1185
1186 u32 mlx5e_ethtool_get_rxfh_indir_size(struct mlx5e_priv *priv)
1187 {
1188         return MLX5E_INDIR_RQT_SIZE;
1189 }
1190
1191 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
1192 {
1193         struct mlx5e_priv *priv = netdev_priv(netdev);
1194
1195         return mlx5e_ethtool_get_rxfh_indir_size(priv);
1196 }
1197
1198 int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
1199                    u8 *hfunc)
1200 {
1201         struct mlx5e_priv *priv = netdev_priv(netdev);
1202         struct mlx5e_rss_params *rss = &priv->rss_params;
1203
1204         if (indir)
1205                 memcpy(indir, rss->indirection_rqt,
1206                        sizeof(rss->indirection_rqt));
1207
1208         if (key)
1209                 memcpy(key, rss->toeplitz_hash_key,
1210                        sizeof(rss->toeplitz_hash_key));
1211
1212         if (hfunc)
1213                 *hfunc = rss->hfunc;
1214
1215         return 0;
1216 }
1217
1218 int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1219                    const u8 *key, const u8 hfunc)
1220 {
1221         struct mlx5e_priv *priv = netdev_priv(dev);
1222         struct mlx5e_rss_params *rss = &priv->rss_params;
1223         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1224         bool refresh_tirs = false;
1225         bool refresh_rqt = false;
1226         void *in;
1227
1228         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1229             (hfunc != ETH_RSS_HASH_XOR) &&
1230             (hfunc != ETH_RSS_HASH_TOP))
1231                 return -EINVAL;
1232
1233         in = kvzalloc(inlen, GFP_KERNEL);
1234         if (!in)
1235                 return -ENOMEM;
1236
1237         mutex_lock(&priv->state_lock);
1238
1239         if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != rss->hfunc) {
1240                 rss->hfunc = hfunc;
1241                 refresh_rqt = true;
1242                 refresh_tirs = true;
1243         }
1244
1245         if (indir) {
1246                 memcpy(rss->indirection_rqt, indir,
1247                        sizeof(rss->indirection_rqt));
1248                 refresh_rqt = true;
1249         }
1250
1251         if (key) {
1252                 memcpy(rss->toeplitz_hash_key, key,
1253                        sizeof(rss->toeplitz_hash_key));
1254                 refresh_tirs = refresh_tirs || rss->hfunc == ETH_RSS_HASH_TOP;
1255         }
1256
1257         if (refresh_rqt && test_bit(MLX5E_STATE_OPENED, &priv->state)) {
1258                 struct mlx5e_redirect_rqt_param rrp = {
1259                         .is_rss = true,
1260                         {
1261                                 .rss = {
1262                                         .hfunc = rss->hfunc,
1263                                         .channels  = &priv->channels,
1264                                 },
1265                         },
1266                 };
1267                 u32 rqtn = priv->indir_rqt.rqtn;
1268
1269                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
1270         }
1271
1272         if (refresh_tirs)
1273                 mlx5e_modify_tirs_hash(priv, in);
1274
1275         mutex_unlock(&priv->state_lock);
1276
1277         kvfree(in);
1278
1279         return 0;
1280 }
1281
1282 #define MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC         100
1283 #define MLX5E_PFC_PREVEN_TOUT_MAX_MSEC          8000
1284 #define MLX5E_PFC_PREVEN_MINOR_PRECENT          85
1285 #define MLX5E_PFC_PREVEN_TOUT_MIN_MSEC          80
1286 #define MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout) \
1287         max_t(u16, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC, \
1288               (critical_tout * MLX5E_PFC_PREVEN_MINOR_PRECENT) / 100)
1289
1290 static int mlx5e_get_pfc_prevention_tout(struct net_device *netdev,
1291                                          u16 *pfc_prevention_tout)
1292 {
1293         struct mlx5e_priv *priv    = netdev_priv(netdev);
1294         struct mlx5_core_dev *mdev = priv->mdev;
1295
1296         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1297             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1298                 return -EOPNOTSUPP;
1299
1300         return mlx5_query_port_stall_watermark(mdev, pfc_prevention_tout, NULL);
1301 }
1302
1303 static int mlx5e_set_pfc_prevention_tout(struct net_device *netdev,
1304                                          u16 pfc_preven)
1305 {
1306         struct mlx5e_priv *priv = netdev_priv(netdev);
1307         struct mlx5_core_dev *mdev = priv->mdev;
1308         u16 critical_tout;
1309         u16 minor;
1310
1311         if (!MLX5_CAP_PCAM_FEATURE((priv)->mdev, pfcc_mask) ||
1312             !MLX5_CAP_DEBUG((priv)->mdev, stall_detect))
1313                 return -EOPNOTSUPP;
1314
1315         critical_tout = (pfc_preven == PFC_STORM_PREVENTION_AUTO) ?
1316                         MLX5E_PFC_PREVEN_AUTO_TOUT_MSEC :
1317                         pfc_preven;
1318
1319         if (critical_tout != PFC_STORM_PREVENTION_DISABLE &&
1320             (critical_tout > MLX5E_PFC_PREVEN_TOUT_MAX_MSEC ||
1321              critical_tout < MLX5E_PFC_PREVEN_TOUT_MIN_MSEC)) {
1322                 netdev_info(netdev, "%s: pfc prevention tout not in range (%d-%d)\n",
1323                             __func__, MLX5E_PFC_PREVEN_TOUT_MIN_MSEC,
1324                             MLX5E_PFC_PREVEN_TOUT_MAX_MSEC);
1325                 return -EINVAL;
1326         }
1327
1328         minor = MLX5E_DEVICE_STALL_MINOR_WATERMARK(critical_tout);
1329         return mlx5_set_port_stall_watermark(mdev, critical_tout,
1330                                              minor);
1331 }
1332
1333 static int mlx5e_get_tunable(struct net_device *dev,
1334                              const struct ethtool_tunable *tuna,
1335                              void *data)
1336 {
1337         int err;
1338
1339         switch (tuna->id) {
1340         case ETHTOOL_PFC_PREVENTION_TOUT:
1341                 err = mlx5e_get_pfc_prevention_tout(dev, data);
1342                 break;
1343         default:
1344                 err = -EINVAL;
1345                 break;
1346         }
1347
1348         return err;
1349 }
1350
1351 static int mlx5e_set_tunable(struct net_device *dev,
1352                              const struct ethtool_tunable *tuna,
1353                              const void *data)
1354 {
1355         struct mlx5e_priv *priv = netdev_priv(dev);
1356         int err;
1357
1358         mutex_lock(&priv->state_lock);
1359
1360         switch (tuna->id) {
1361         case ETHTOOL_PFC_PREVENTION_TOUT:
1362                 err = mlx5e_set_pfc_prevention_tout(dev, *(u16 *)data);
1363                 break;
1364         default:
1365                 err = -EINVAL;
1366                 break;
1367         }
1368
1369         mutex_unlock(&priv->state_lock);
1370         return err;
1371 }
1372
1373 static void mlx5e_get_pause_stats(struct net_device *netdev,
1374                                   struct ethtool_pause_stats *pause_stats)
1375 {
1376         struct mlx5e_priv *priv = netdev_priv(netdev);
1377
1378         mlx5e_stats_pause_get(priv, pause_stats);
1379 }
1380
1381 void mlx5e_ethtool_get_pauseparam(struct mlx5e_priv *priv,
1382                                   struct ethtool_pauseparam *pauseparam)
1383 {
1384         struct mlx5_core_dev *mdev = priv->mdev;
1385         int err;
1386
1387         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1388                                     &pauseparam->tx_pause);
1389         if (err) {
1390                 netdev_err(priv->netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1391                            __func__, err);
1392         }
1393 }
1394
1395 static void mlx5e_get_pauseparam(struct net_device *netdev,
1396                                  struct ethtool_pauseparam *pauseparam)
1397 {
1398         struct mlx5e_priv *priv = netdev_priv(netdev);
1399
1400         mlx5e_ethtool_get_pauseparam(priv, pauseparam);
1401 }
1402
1403 int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv,
1404                                  struct ethtool_pauseparam *pauseparam)
1405 {
1406         struct mlx5_core_dev *mdev = priv->mdev;
1407         int err;
1408
1409         if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1410                 return -EOPNOTSUPP;
1411
1412         if (pauseparam->autoneg)
1413                 return -EINVAL;
1414
1415         err = mlx5_set_port_pause(mdev,
1416                                   pauseparam->rx_pause ? 1 : 0,
1417                                   pauseparam->tx_pause ? 1 : 0);
1418         if (err) {
1419                 netdev_err(priv->netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1420                            __func__, err);
1421         }
1422
1423         return err;
1424 }
1425
1426 static int mlx5e_set_pauseparam(struct net_device *netdev,
1427                                 struct ethtool_pauseparam *pauseparam)
1428 {
1429         struct mlx5e_priv *priv = netdev_priv(netdev);
1430
1431         return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
1432 }
1433
1434 int mlx5e_ethtool_get_ts_info(struct mlx5e_priv *priv,
1435                               struct ethtool_ts_info *info)
1436 {
1437         struct mlx5_core_dev *mdev = priv->mdev;
1438
1439         info->phc_index = mlx5_clock_get_ptp_index(mdev);
1440
1441         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz) ||
1442             info->phc_index == -1)
1443                 return 0;
1444
1445         info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1446                                 SOF_TIMESTAMPING_RX_HARDWARE |
1447                                 SOF_TIMESTAMPING_RAW_HARDWARE;
1448
1449         info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1450                          BIT(HWTSTAMP_TX_ON);
1451
1452         info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1453                            BIT(HWTSTAMP_FILTER_ALL);
1454
1455         return 0;
1456 }
1457
1458 static int mlx5e_get_ts_info(struct net_device *dev,
1459                              struct ethtool_ts_info *info)
1460 {
1461         struct mlx5e_priv *priv = netdev_priv(dev);
1462
1463         return mlx5e_ethtool_get_ts_info(priv, info);
1464 }
1465
1466 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1467 {
1468         __u32 ret = 0;
1469
1470         if (MLX5_CAP_GEN(mdev, wol_g))
1471                 ret |= WAKE_MAGIC;
1472
1473         if (MLX5_CAP_GEN(mdev, wol_s))
1474                 ret |= WAKE_MAGICSECURE;
1475
1476         if (MLX5_CAP_GEN(mdev, wol_a))
1477                 ret |= WAKE_ARP;
1478
1479         if (MLX5_CAP_GEN(mdev, wol_b))
1480                 ret |= WAKE_BCAST;
1481
1482         if (MLX5_CAP_GEN(mdev, wol_m))
1483                 ret |= WAKE_MCAST;
1484
1485         if (MLX5_CAP_GEN(mdev, wol_u))
1486                 ret |= WAKE_UCAST;
1487
1488         if (MLX5_CAP_GEN(mdev, wol_p))
1489                 ret |= WAKE_PHY;
1490
1491         return ret;
1492 }
1493
1494 static __u32 mlx5e_reformat_wol_mode_mlx5_to_linux(u8 mode)
1495 {
1496         __u32 ret = 0;
1497
1498         if (mode & MLX5_WOL_MAGIC)
1499                 ret |= WAKE_MAGIC;
1500
1501         if (mode & MLX5_WOL_SECURED_MAGIC)
1502                 ret |= WAKE_MAGICSECURE;
1503
1504         if (mode & MLX5_WOL_ARP)
1505                 ret |= WAKE_ARP;
1506
1507         if (mode & MLX5_WOL_BROADCAST)
1508                 ret |= WAKE_BCAST;
1509
1510         if (mode & MLX5_WOL_MULTICAST)
1511                 ret |= WAKE_MCAST;
1512
1513         if (mode & MLX5_WOL_UNICAST)
1514                 ret |= WAKE_UCAST;
1515
1516         if (mode & MLX5_WOL_PHY_ACTIVITY)
1517                 ret |= WAKE_PHY;
1518
1519         return ret;
1520 }
1521
1522 static u8 mlx5e_reformat_wol_mode_linux_to_mlx5(__u32 mode)
1523 {
1524         u8 ret = 0;
1525
1526         if (mode & WAKE_MAGIC)
1527                 ret |= MLX5_WOL_MAGIC;
1528
1529         if (mode & WAKE_MAGICSECURE)
1530                 ret |= MLX5_WOL_SECURED_MAGIC;
1531
1532         if (mode & WAKE_ARP)
1533                 ret |= MLX5_WOL_ARP;
1534
1535         if (mode & WAKE_BCAST)
1536                 ret |= MLX5_WOL_BROADCAST;
1537
1538         if (mode & WAKE_MCAST)
1539                 ret |= MLX5_WOL_MULTICAST;
1540
1541         if (mode & WAKE_UCAST)
1542                 ret |= MLX5_WOL_UNICAST;
1543
1544         if (mode & WAKE_PHY)
1545                 ret |= MLX5_WOL_PHY_ACTIVITY;
1546
1547         return ret;
1548 }
1549
1550 static void mlx5e_get_wol(struct net_device *netdev,
1551                           struct ethtool_wolinfo *wol)
1552 {
1553         struct mlx5e_priv *priv = netdev_priv(netdev);
1554         struct mlx5_core_dev *mdev = priv->mdev;
1555         u8 mlx5_wol_mode;
1556         int err;
1557
1558         memset(wol, 0, sizeof(*wol));
1559
1560         wol->supported = mlx5e_get_wol_supported(mdev);
1561         if (!wol->supported)
1562                 return;
1563
1564         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1565         if (err)
1566                 return;
1567
1568         wol->wolopts = mlx5e_reformat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1569 }
1570
1571 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1572 {
1573         struct mlx5e_priv *priv = netdev_priv(netdev);
1574         struct mlx5_core_dev *mdev = priv->mdev;
1575         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1576         u32 mlx5_wol_mode;
1577
1578         if (!wol_supported)
1579                 return -EOPNOTSUPP;
1580
1581         if (wol->wolopts & ~wol_supported)
1582                 return -EINVAL;
1583
1584         mlx5_wol_mode = mlx5e_reformat_wol_mode_linux_to_mlx5(wol->wolopts);
1585
1586         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1587 }
1588
1589 static void mlx5e_get_fec_stats(struct net_device *netdev,
1590                                 struct ethtool_fec_stats *fec_stats)
1591 {
1592         struct mlx5e_priv *priv = netdev_priv(netdev);
1593
1594         mlx5e_stats_fec_get(priv, fec_stats);
1595 }
1596
1597 static int mlx5e_get_fecparam(struct net_device *netdev,
1598                               struct ethtool_fecparam *fecparam)
1599 {
1600         struct mlx5e_priv *priv = netdev_priv(netdev);
1601         struct mlx5_core_dev *mdev = priv->mdev;
1602         u16 fec_configured;
1603         u32 fec_active;
1604         int err;
1605
1606         err = mlx5e_get_fec_mode(mdev, &fec_active, &fec_configured);
1607
1608         if (err)
1609                 return err;
1610
1611         fecparam->active_fec = pplm2ethtool_fec((unsigned long)fec_active,
1612                                                 sizeof(unsigned long) * BITS_PER_BYTE);
1613
1614         if (!fecparam->active_fec)
1615                 return -EOPNOTSUPP;
1616
1617         fecparam->fec = pplm2ethtool_fec((unsigned long)fec_configured,
1618                                          sizeof(unsigned long) * BITS_PER_BYTE);
1619
1620         return 0;
1621 }
1622
1623 static int mlx5e_set_fecparam(struct net_device *netdev,
1624                               struct ethtool_fecparam *fecparam)
1625 {
1626         struct mlx5e_priv *priv = netdev_priv(netdev);
1627         struct mlx5_core_dev *mdev = priv->mdev;
1628         u16 fec_policy = 0;
1629         int mode;
1630         int err;
1631
1632         if (bitmap_weight((unsigned long *)&fecparam->fec,
1633                           ETHTOOL_FEC_LLRS_BIT + 1) > 1)
1634                 return -EOPNOTSUPP;
1635
1636         for (mode = 0; mode < ARRAY_SIZE(pplm_fec_2_ethtool); mode++) {
1637                 if (!(pplm_fec_2_ethtool[mode] & fecparam->fec))
1638                         continue;
1639                 fec_policy |= (1 << mode);
1640                 break;
1641         }
1642
1643         err = mlx5e_set_fec_mode(mdev, fec_policy);
1644
1645         if (err)
1646                 return err;
1647
1648         mlx5_toggle_port_link(mdev);
1649
1650         return 0;
1651 }
1652
1653 static u32 mlx5e_get_msglevel(struct net_device *dev)
1654 {
1655         return ((struct mlx5e_priv *)netdev_priv(dev))->msglevel;
1656 }
1657
1658 static void mlx5e_set_msglevel(struct net_device *dev, u32 val)
1659 {
1660         ((struct mlx5e_priv *)netdev_priv(dev))->msglevel = val;
1661 }
1662
1663 static int mlx5e_set_phys_id(struct net_device *dev,
1664                              enum ethtool_phys_id_state state)
1665 {
1666         struct mlx5e_priv *priv = netdev_priv(dev);
1667         struct mlx5_core_dev *mdev = priv->mdev;
1668         u16 beacon_duration;
1669
1670         if (!MLX5_CAP_GEN(mdev, beacon_led))
1671                 return -EOPNOTSUPP;
1672
1673         switch (state) {
1674         case ETHTOOL_ID_ACTIVE:
1675                 beacon_duration = MLX5_BEACON_DURATION_INF;
1676                 break;
1677         case ETHTOOL_ID_INACTIVE:
1678                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1679                 break;
1680         default:
1681                 return -EOPNOTSUPP;
1682         }
1683
1684         return mlx5_set_port_beacon(mdev, beacon_duration);
1685 }
1686
1687 static int mlx5e_get_module_info(struct net_device *netdev,
1688                                  struct ethtool_modinfo *modinfo)
1689 {
1690         struct mlx5e_priv *priv = netdev_priv(netdev);
1691         struct mlx5_core_dev *dev = priv->mdev;
1692         int size_read = 0;
1693         u8 data[4] = {0};
1694
1695         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1696         if (size_read < 2)
1697                 return -EIO;
1698
1699         /* data[0] = identifier byte */
1700         switch (data[0]) {
1701         case MLX5_MODULE_ID_QSFP:
1702                 modinfo->type       = ETH_MODULE_SFF_8436;
1703                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1704                 break;
1705         case MLX5_MODULE_ID_QSFP_PLUS:
1706         case MLX5_MODULE_ID_QSFP28:
1707                 /* data[1] = revision id */
1708                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1709                         modinfo->type       = ETH_MODULE_SFF_8636;
1710                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_MAX_LEN;
1711                 } else {
1712                         modinfo->type       = ETH_MODULE_SFF_8436;
1713                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_MAX_LEN;
1714                 }
1715                 break;
1716         case MLX5_MODULE_ID_SFP:
1717                 modinfo->type       = ETH_MODULE_SFF_8472;
1718                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1719                 break;
1720         default:
1721                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1722                            __func__, data[0]);
1723                 return -EINVAL;
1724         }
1725
1726         return 0;
1727 }
1728
1729 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1730                                    struct ethtool_eeprom *ee,
1731                                    u8 *data)
1732 {
1733         struct mlx5e_priv *priv = netdev_priv(netdev);
1734         struct mlx5_core_dev *mdev = priv->mdev;
1735         int offset = ee->offset;
1736         int size_read;
1737         int i = 0;
1738
1739         if (!ee->len)
1740                 return -EINVAL;
1741
1742         memset(data, 0, ee->len);
1743
1744         while (i < ee->len) {
1745                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1746                                                      data + i);
1747
1748                 if (!size_read)
1749                         /* Done reading */
1750                         return 0;
1751
1752                 if (size_read < 0) {
1753                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1754                                    __func__, size_read);
1755                         return 0;
1756                 }
1757
1758                 i += size_read;
1759                 offset += size_read;
1760         }
1761
1762         return 0;
1763 }
1764
1765 static int mlx5e_get_module_eeprom_by_page(struct net_device *netdev,
1766                                            const struct ethtool_module_eeprom *page_data,
1767                                            struct netlink_ext_ack *extack)
1768 {
1769         struct mlx5e_priv *priv = netdev_priv(netdev);
1770         struct mlx5_module_eeprom_query_params query;
1771         struct mlx5_core_dev *mdev = priv->mdev;
1772         u8 *data = page_data->data;
1773         int size_read;
1774         int i = 0;
1775
1776         if (!page_data->length)
1777                 return -EINVAL;
1778
1779         memset(data, 0, page_data->length);
1780
1781         query.offset = page_data->offset;
1782         query.i2c_address = page_data->i2c_address;
1783         query.bank = page_data->bank;
1784         query.page = page_data->page;
1785         while (i < page_data->length) {
1786                 query.size = page_data->length - i;
1787                 size_read = mlx5_query_module_eeprom_by_page(mdev, &query, data + i);
1788
1789                 /* Done reading, return how many bytes was read */
1790                 if (!size_read)
1791                         return i;
1792
1793                 if (size_read == -EINVAL)
1794                         return -EINVAL;
1795                 if (size_read < 0) {
1796                         netdev_err(priv->netdev, "%s: mlx5_query_module_eeprom_by_page failed:0x%x\n",
1797                                    __func__, size_read);
1798                         return i;
1799                 }
1800
1801                 i += size_read;
1802                 query.offset += size_read;
1803         }
1804
1805         return i;
1806 }
1807
1808 int mlx5e_ethtool_flash_device(struct mlx5e_priv *priv,
1809                                struct ethtool_flash *flash)
1810 {
1811         struct mlx5_core_dev *mdev = priv->mdev;
1812         struct net_device *dev = priv->netdev;
1813         const struct firmware *fw;
1814         int err;
1815
1816         if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
1817                 return -EOPNOTSUPP;
1818
1819         err = request_firmware_direct(&fw, flash->data, &dev->dev);
1820         if (err)
1821                 return err;
1822
1823         dev_hold(dev);
1824         rtnl_unlock();
1825
1826         err = mlx5_firmware_flash(mdev, fw, NULL);
1827         release_firmware(fw);
1828
1829         rtnl_lock();
1830         dev_put(dev);
1831         return err;
1832 }
1833
1834 static int mlx5e_flash_device(struct net_device *dev,
1835                               struct ethtool_flash *flash)
1836 {
1837         struct mlx5e_priv *priv = netdev_priv(dev);
1838
1839         return mlx5e_ethtool_flash_device(priv, flash);
1840 }
1841
1842 static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
1843                                      bool is_rx_cq)
1844 {
1845         struct mlx5e_priv *priv = netdev_priv(netdev);
1846         struct mlx5_core_dev *mdev = priv->mdev;
1847         struct mlx5e_channels new_channels = {};
1848         bool mode_changed;
1849         u8 cq_period_mode, current_cq_period_mode;
1850
1851         cq_period_mode = enable ?
1852                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1853                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1854         current_cq_period_mode = is_rx_cq ?
1855                 priv->channels.params.rx_cq_moderation.cq_period_mode :
1856                 priv->channels.params.tx_cq_moderation.cq_period_mode;
1857         mode_changed = cq_period_mode != current_cq_period_mode;
1858
1859         if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1860             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1861                 return -EOPNOTSUPP;
1862
1863         if (!mode_changed)
1864                 return 0;
1865
1866         new_channels.params = priv->channels.params;
1867         if (is_rx_cq)
1868                 mlx5e_set_rx_cq_mode_params(&new_channels.params, cq_period_mode);
1869         else
1870                 mlx5e_set_tx_cq_mode_params(&new_channels.params, cq_period_mode);
1871
1872         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1873 }
1874
1875 static int set_pflag_tx_cqe_based_moder(struct net_device *netdev, bool enable)
1876 {
1877         return set_pflag_cqe_based_moder(netdev, enable, false);
1878 }
1879
1880 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1881 {
1882         return set_pflag_cqe_based_moder(netdev, enable, true);
1883 }
1884
1885 int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val)
1886 {
1887         bool curr_val = MLX5E_GET_PFLAG(&priv->channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS);
1888         struct mlx5e_channels new_channels = {};
1889         int err = 0;
1890
1891         if (!MLX5_CAP_GEN(priv->mdev, cqe_compression))
1892                 return new_val ? -EOPNOTSUPP : 0;
1893
1894         if (curr_val == new_val)
1895                 return 0;
1896
1897         new_channels.params = priv->channels.params;
1898         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_CQE_COMPRESS, new_val);
1899         if (priv->tstamp.rx_filter != HWTSTAMP_FILTER_NONE)
1900                 new_channels.params.ptp_rx = new_val;
1901
1902
1903         if (new_channels.params.ptp_rx == priv->channels.params.ptp_rx)
1904                 err = mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1905         else
1906                 err = mlx5e_safe_switch_channels(priv, &new_channels, mlx5e_ptp_rx_manage_fs_ctx,
1907                                                  &new_channels.params.ptp_rx);
1908         if (err)
1909                 return err;
1910
1911         mlx5e_dbg(DRV, priv, "MLX5E: RxCqeCmprss was turned %s\n",
1912                   MLX5E_GET_PFLAG(&priv->channels.params,
1913                                   MLX5E_PFLAG_RX_CQE_COMPRESS) ? "ON" : "OFF");
1914
1915         return 0;
1916 }
1917
1918 static int set_pflag_rx_cqe_compress(struct net_device *netdev,
1919                                      bool enable)
1920 {
1921         struct mlx5e_priv *priv = netdev_priv(netdev);
1922         struct mlx5_core_dev *mdev = priv->mdev;
1923         int err;
1924
1925         if (!MLX5_CAP_GEN(mdev, cqe_compression))
1926                 return -EOPNOTSUPP;
1927
1928         err = mlx5e_modify_rx_cqe_compression_locked(priv, enable);
1929         if (err)
1930                 return err;
1931
1932         priv->channels.params.rx_cqe_compress_def = enable;
1933
1934         return 0;
1935 }
1936
1937 static int set_pflag_rx_striding_rq(struct net_device *netdev, bool enable)
1938 {
1939         struct mlx5e_priv *priv = netdev_priv(netdev);
1940         struct mlx5_core_dev *mdev = priv->mdev;
1941         struct mlx5e_channels new_channels = {};
1942
1943         if (enable) {
1944                 if (!mlx5e_check_fragmented_striding_rq_cap(mdev))
1945                         return -EOPNOTSUPP;
1946                 if (!mlx5e_striding_rq_possible(mdev, &priv->channels.params))
1947                         return -EINVAL;
1948         } else if (priv->channels.params.lro_en) {
1949                 netdev_warn(netdev, "Can't set legacy RQ with LRO, disable LRO first\n");
1950                 return -EINVAL;
1951         }
1952
1953         new_channels.params = priv->channels.params;
1954
1955         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_RX_STRIDING_RQ, enable);
1956         mlx5e_set_rq_type(mdev, &new_channels.params);
1957
1958         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1959 }
1960
1961 static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
1962 {
1963         struct mlx5e_priv *priv = netdev_priv(netdev);
1964         struct mlx5e_channels *channels = &priv->channels;
1965         struct mlx5e_channel *c;
1966         int i;
1967
1968         if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
1969             priv->channels.params.xdp_prog)
1970                 return 0;
1971
1972         for (i = 0; i < channels->num; i++) {
1973                 c = channels->c[i];
1974                 if (enable)
1975                         __set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1976                 else
1977                         __clear_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
1978         }
1979
1980         return 0;
1981 }
1982
1983 static int set_pflag_tx_mpwqe_common(struct net_device *netdev, u32 flag, bool enable)
1984 {
1985         struct mlx5e_priv *priv = netdev_priv(netdev);
1986         struct mlx5_core_dev *mdev = priv->mdev;
1987         struct mlx5e_channels new_channels = {};
1988
1989         if (enable && !MLX5_CAP_ETH(mdev, enhanced_multi_pkt_send_wqe))
1990                 return -EOPNOTSUPP;
1991
1992         new_channels.params = priv->channels.params;
1993
1994         MLX5E_SET_PFLAG(&new_channels.params, flag, enable);
1995
1996         return mlx5e_safe_switch_channels(priv, &new_channels, NULL, NULL);
1997 }
1998
1999 static int set_pflag_xdp_tx_mpwqe(struct net_device *netdev, bool enable)
2000 {
2001         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_XDP_TX_MPWQE, enable);
2002 }
2003
2004 static int set_pflag_skb_tx_mpwqe(struct net_device *netdev, bool enable)
2005 {
2006         return set_pflag_tx_mpwqe_common(netdev, MLX5E_PFLAG_SKB_TX_MPWQE, enable);
2007 }
2008
2009 static int set_pflag_tx_port_ts(struct net_device *netdev, bool enable)
2010 {
2011         struct mlx5e_priv *priv = netdev_priv(netdev);
2012         struct mlx5_core_dev *mdev = priv->mdev;
2013         struct mlx5e_channels new_channels = {};
2014         int err;
2015
2016         if (!MLX5_CAP_GEN(mdev, ts_cqe_to_dest_cqn))
2017                 return -EOPNOTSUPP;
2018
2019         /* Don't allow changing the PTP state if HTB offload is active, because
2020          * the numeration of the QoS SQs will change, while per-queue qdiscs are
2021          * attached.
2022          */
2023         if (priv->htb.maj_id) {
2024                 netdev_err(priv->netdev, "%s: HTB offload is active, cannot change the PTP state\n",
2025                            __func__);
2026                 return -EINVAL;
2027         }
2028
2029         new_channels.params = priv->channels.params;
2030         MLX5E_SET_PFLAG(&new_channels.params, MLX5E_PFLAG_TX_PORT_TS, enable);
2031         /* No need to verify SQ stop room as
2032          * ptpsq.txqsq.stop_room <= generic_sq->stop_room, and both
2033          * has the same log_sq_size.
2034          */
2035
2036         err = mlx5e_safe_switch_channels(priv, &new_channels,
2037                                          mlx5e_num_channels_changed_ctx, NULL);
2038         if (!err)
2039                 priv->tx_ptp_opened = true;
2040
2041         return err;
2042 }
2043
2044 static const struct pflag_desc mlx5e_priv_flags[MLX5E_NUM_PFLAGS] = {
2045         { "rx_cqe_moder",        set_pflag_rx_cqe_based_moder },
2046         { "tx_cqe_moder",        set_pflag_tx_cqe_based_moder },
2047         { "rx_cqe_compress",     set_pflag_rx_cqe_compress },
2048         { "rx_striding_rq",      set_pflag_rx_striding_rq },
2049         { "rx_no_csum_complete", set_pflag_rx_no_csum_complete },
2050         { "xdp_tx_mpwqe",        set_pflag_xdp_tx_mpwqe },
2051         { "skb_tx_mpwqe",        set_pflag_skb_tx_mpwqe },
2052         { "tx_port_ts",          set_pflag_tx_port_ts },
2053 };
2054
2055 static int mlx5e_handle_pflag(struct net_device *netdev,
2056                               u32 wanted_flags,
2057                               enum mlx5e_priv_flag flag)
2058 {
2059         struct mlx5e_priv *priv = netdev_priv(netdev);
2060         bool enable = !!(wanted_flags & BIT(flag));
2061         u32 changes = wanted_flags ^ priv->channels.params.pflags;
2062         int err;
2063
2064         if (!(changes & BIT(flag)))
2065                 return 0;
2066
2067         err = mlx5e_priv_flags[flag].handler(netdev, enable);
2068         if (err) {
2069                 netdev_err(netdev, "%s private flag '%s' failed err %d\n",
2070                            enable ? "Enable" : "Disable", mlx5e_priv_flags[flag].name, err);
2071                 return err;
2072         }
2073
2074         MLX5E_SET_PFLAG(&priv->channels.params, flag, enable);
2075         return 0;
2076 }
2077
2078 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
2079 {
2080         struct mlx5e_priv *priv = netdev_priv(netdev);
2081         enum mlx5e_priv_flag pflag;
2082         int err;
2083
2084         mutex_lock(&priv->state_lock);
2085
2086         for (pflag = 0; pflag < MLX5E_NUM_PFLAGS; pflag++) {
2087                 err = mlx5e_handle_pflag(netdev, pflags, pflag);
2088                 if (err)
2089                         break;
2090         }
2091
2092         mutex_unlock(&priv->state_lock);
2093
2094         /* Need to fix some features.. */
2095         netdev_update_features(netdev);
2096
2097         return err;
2098 }
2099
2100 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
2101 {
2102         struct mlx5e_priv *priv = netdev_priv(netdev);
2103
2104         return priv->channels.params.pflags;
2105 }
2106
2107 int mlx5e_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
2108                     u32 *rule_locs)
2109 {
2110         struct mlx5e_priv *priv = netdev_priv(dev);
2111
2112         /* ETHTOOL_GRXRINGS is needed by ethtool -x which is not part
2113          * of rxnfc. We keep this logic out of mlx5e_ethtool_get_rxnfc,
2114          * to avoid breaking "ethtool -x" when mlx5e_ethtool_get_rxnfc
2115          * is compiled out via CONFIG_MLX5_EN_RXNFC=n.
2116          */
2117         if (info->cmd == ETHTOOL_GRXRINGS) {
2118                 info->data = priv->channels.params.num_channels;
2119                 return 0;
2120         }
2121
2122         return mlx5e_ethtool_get_rxnfc(dev, info, rule_locs);
2123 }
2124
2125 int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2126 {
2127         return mlx5e_ethtool_set_rxnfc(dev, cmd);
2128 }
2129
2130 const struct ethtool_ops mlx5e_ethtool_ops = {
2131         .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2132                                      ETHTOOL_COALESCE_MAX_FRAMES |
2133                                      ETHTOOL_COALESCE_USE_ADAPTIVE,
2134         .get_drvinfo       = mlx5e_get_drvinfo,
2135         .get_link          = ethtool_op_get_link,
2136         .get_strings       = mlx5e_get_strings,
2137         .get_sset_count    = mlx5e_get_sset_count,
2138         .get_ethtool_stats = mlx5e_get_ethtool_stats,
2139         .get_ringparam     = mlx5e_get_ringparam,
2140         .set_ringparam     = mlx5e_set_ringparam,
2141         .get_channels      = mlx5e_get_channels,
2142         .set_channels      = mlx5e_set_channels,
2143         .get_coalesce      = mlx5e_get_coalesce,
2144         .set_coalesce      = mlx5e_set_coalesce,
2145         .get_link_ksettings  = mlx5e_get_link_ksettings,
2146         .set_link_ksettings  = mlx5e_set_link_ksettings,
2147         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
2148         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
2149         .get_rxfh          = mlx5e_get_rxfh,
2150         .set_rxfh          = mlx5e_set_rxfh,
2151         .get_rxnfc         = mlx5e_get_rxnfc,
2152         .set_rxnfc         = mlx5e_set_rxnfc,
2153         .get_tunable       = mlx5e_get_tunable,
2154         .set_tunable       = mlx5e_set_tunable,
2155         .get_pause_stats   = mlx5e_get_pause_stats,
2156         .get_pauseparam    = mlx5e_get_pauseparam,
2157         .set_pauseparam    = mlx5e_set_pauseparam,
2158         .get_ts_info       = mlx5e_get_ts_info,
2159         .set_phys_id       = mlx5e_set_phys_id,
2160         .get_wol           = mlx5e_get_wol,
2161         .set_wol           = mlx5e_set_wol,
2162         .get_module_info   = mlx5e_get_module_info,
2163         .get_module_eeprom = mlx5e_get_module_eeprom,
2164         .get_module_eeprom_by_page = mlx5e_get_module_eeprom_by_page,
2165         .flash_device      = mlx5e_flash_device,
2166         .get_priv_flags    = mlx5e_get_priv_flags,
2167         .set_priv_flags    = mlx5e_set_priv_flags,
2168         .self_test         = mlx5e_self_test,
2169         .get_msglevel      = mlx5e_get_msglevel,
2170         .set_msglevel      = mlx5e_set_msglevel,
2171         .get_fec_stats     = mlx5e_get_fec_stats,
2172         .get_fecparam      = mlx5e_get_fecparam,
2173         .set_fecparam      = mlx5e_set_fecparam,
2174 };