2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/ethtool.h>
38 #include "accel/ipsec.h"
40 #include "en_accel/ipsec.h"
41 #include "fpga/ipsec.h"
43 static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {
44 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_in_packets) },
45 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_out_packets) },
46 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_bypass_packets) },
47 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_in_packets) },
48 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_out_packets) },
49 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_bypass_packets) },
50 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_drop_packets) },
51 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_auth_fail_packets) },
52 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_drop_packets) },
53 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_success) },
54 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_fail) },
55 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_success) },
56 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_fail) },
57 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_cmd_drop) },
60 static const struct counter_desc mlx5e_ipsec_sw_stats_desc[] = {
61 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sp_alloc) },
62 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sadb_miss) },
63 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_syndrome) },
64 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_bundle) },
65 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_no_state) },
66 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_not_ip) },
67 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_trailer) },
68 { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_metadata) },
71 #define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \
72 atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
74 #define NUM_IPSEC_HW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_hw_stats_desc)
75 #define NUM_IPSEC_SW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_sw_stats_desc)
77 static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_sw)
79 return NUM_IPSEC_SW_COUNTERS;
82 static inline MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_sw) {}
84 static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ipsec_sw)
89 for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
90 strcpy(data + (idx++) * ETH_GSTRING_LEN,
91 mlx5e_ipsec_sw_stats_desc[i].format);
95 static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_sw)
100 for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
101 data[idx++] = MLX5E_READ_CTR_ATOMIC64(&priv->ipsec->sw_stats,
102 mlx5e_ipsec_sw_stats_desc, i);
106 static MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(ipsec_hw)
108 return (mlx5_fpga_ipsec_device_caps(priv->mdev)) ? NUM_IPSEC_HW_COUNTERS : 0;
111 static MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(ipsec_hw)
116 ret = mlx5_accel_ipsec_counters_read(priv->mdev, (u64 *)&priv->ipsec->stats,
117 NUM_IPSEC_HW_COUNTERS);
119 memset(&priv->ipsec->stats, 0, sizeof(priv->ipsec->stats));
122 static MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(ipsec_hw)
126 if (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev))
127 for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
128 strcpy(data + (idx++) * ETH_GSTRING_LEN,
129 mlx5e_ipsec_hw_stats_desc[i].format);
134 static MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(ipsec_hw)
138 if (priv->ipsec && mlx5_fpga_ipsec_device_caps(priv->mdev))
139 for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
140 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->ipsec->stats,
141 mlx5e_ipsec_hw_stats_desc,
146 MLX5E_DEFINE_STATS_GRP(ipsec_sw, 0);
147 MLX5E_DEFINE_STATS_GRP(ipsec_hw, 0);