1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2018 Mellanox Technologies. */
8 static bool mlx5e_tc_tun_can_offload_vxlan(struct mlx5e_priv *priv)
10 return !!MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap);
13 static int mlx5e_tc_tun_calc_hlen_vxlan(struct mlx5e_encap_entry *e)
18 static int mlx5e_tc_tun_check_udp_dport_vxlan(struct mlx5e_priv *priv,
19 struct flow_cls_offload *f)
21 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
22 struct netlink_ext_ack *extack = f->common.extack;
23 struct flow_match_ports enc_ports;
25 if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_PORTS))
28 flow_rule_match_enc_ports(rule, &enc_ports);
30 /* check the UDP destination port validity */
32 if (!mlx5_vxlan_lookup_port(priv->mdev->vxlan,
33 be16_to_cpu(enc_ports.key->dst))) {
34 NL_SET_ERR_MSG_MOD(extack,
35 "Matched UDP dst port is not registered as a VXLAN port");
36 netdev_warn(priv->netdev,
37 "UDP port %d is not registered as a VXLAN port\n",
38 be16_to_cpu(enc_ports.key->dst));
45 static int mlx5e_tc_tun_parse_udp_ports_vxlan(struct mlx5e_priv *priv,
46 struct mlx5_flow_spec *spec,
47 struct flow_cls_offload *f,
53 err = mlx5e_tc_tun_parse_udp_ports(priv, spec, f, headers_c, headers_v);
57 return mlx5e_tc_tun_check_udp_dport_vxlan(priv, f);
60 static int mlx5e_tc_tun_init_encap_attr_vxlan(struct net_device *tunnel_dev,
61 struct mlx5e_priv *priv,
62 struct mlx5e_encap_entry *e,
63 struct netlink_ext_ack *extack)
65 int dst_port = be16_to_cpu(e->tun_info->key.tp_dst);
67 e->tunnel = &vxlan_tunnel;
69 if (!mlx5_vxlan_lookup_port(priv->mdev->vxlan, dst_port)) {
70 NL_SET_ERR_MSG_MOD(extack,
71 "vxlan udp dport was not registered with the HW");
72 netdev_warn(priv->netdev,
73 "%d isn't an offloaded vxlan udp dport\n",
78 e->reformat_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN;
82 static int mlx5e_gen_ip_tunnel_header_vxlan(char buf[],
84 struct mlx5e_encap_entry *e)
86 const struct ip_tunnel_key *tun_key = &e->tun_info->key;
87 __be32 tun_id = tunnel_id_to_key32(tun_key->tun_id);
88 struct udphdr *udp = (struct udphdr *)(buf);
91 vxh = (struct vxlanhdr *)((char *)udp + sizeof(struct udphdr));
92 *ip_proto = IPPROTO_UDP;
94 udp->dest = tun_key->tp_dst;
95 vxh->vx_flags = VXLAN_HF_VNI;
96 vxh->vx_vni = vxlan_vni_field(tun_id);
101 static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv,
102 struct mlx5_flow_spec *spec,
103 struct flow_cls_offload *f,
107 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
108 struct netlink_ext_ack *extack = f->common.extack;
109 struct flow_match_enc_keyid enc_keyid;
110 void *misc_c, *misc_v;
112 misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
113 misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
115 if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID))
118 flow_rule_match_enc_keyid(rule, &enc_keyid);
120 if (!enc_keyid.mask->keyid)
123 /* match on VNI is required */
125 if (!MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev,
126 ft_field_support.outer_vxlan_vni)) {
127 NL_SET_ERR_MSG_MOD(extack,
128 "Matching on VXLAN VNI is not supported");
129 netdev_warn(priv->netdev,
130 "Matching on VXLAN VNI is not supported\n");
134 MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni,
135 be32_to_cpu(enc_keyid.mask->keyid));
136 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
137 be32_to_cpu(enc_keyid.key->keyid));
139 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
144 struct mlx5e_tc_tunnel vxlan_tunnel = {
145 .tunnel_type = MLX5E_TC_TUNNEL_TYPE_VXLAN,
146 .match_level = MLX5_MATCH_L4,
147 .can_offload = mlx5e_tc_tun_can_offload_vxlan,
148 .calc_hlen = mlx5e_tc_tun_calc_hlen_vxlan,
149 .init_encap_attr = mlx5e_tc_tun_init_encap_attr_vxlan,
150 .generate_ip_tun_hdr = mlx5e_gen_ip_tunnel_header_vxlan,
151 .parse_udp_ports = mlx5e_tc_tun_parse_udp_ports_vxlan,
152 .parse_tunnel = mlx5e_tc_tun_parse_vxlan,