2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
37 #include <linux/bitops.h>
38 #include <linux/compiler.h>
39 #include <linux/list.h>
40 #include <linux/mutex.h>
41 #include <linux/netdevice.h>
42 #include <linux/if_vlan.h>
43 #include <linux/net_tstamp.h>
44 #ifdef CONFIG_MLX4_EN_DCB
45 #include <linux/dcbnl.h>
47 #include <linux/cpu_rmap.h>
48 #include <linux/ptp_clock_kernel.h>
50 #include <linux/mlx4/device.h>
51 #include <linux/mlx4/qp.h>
52 #include <linux/mlx4/cq.h>
53 #include <linux/mlx4/srq.h>
54 #include <linux/mlx4/doorbell.h>
55 #include <linux/mlx4/cmd.h>
58 #include "mlx4_stats.h"
60 #define DRV_NAME "mlx4_en"
61 #define DRV_VERSION "4.0-0"
63 #define MLX4_EN_MSG_LEVEL (NETIF_MSG_LINK | NETIF_MSG_IFDOWN)
70 #define MLX4_EN_PAGE_SHIFT 12
71 #define MLX4_EN_PAGE_SIZE (1 << MLX4_EN_PAGE_SHIFT)
72 #define DEF_RX_RINGS 16
73 #define MAX_RX_RINGS 128
74 #define MIN_RX_RINGS 4
75 #define LOG_TXBB_SIZE 6
76 #define TXBB_SIZE BIT(LOG_TXBB_SIZE)
77 #define HEADROOM (2048 / TXBB_SIZE + 1)
78 #define STAMP_STRIDE 64
79 #define STAMP_DWORDS (STAMP_STRIDE / 4)
80 #define STAMP_SHIFT 31
81 #define STAMP_VAL 0x7fffffff
82 #define STATS_DELAY (HZ / 4)
83 #define SERVICE_TASK_DELAY (HZ / 4)
84 #define MAX_NUM_OF_FS_RULES 256
86 #define MLX4_EN_FILTER_HASH_SHIFT 4
87 #define MLX4_EN_FILTER_EXPIRY_QUOTA 60
89 /* Typical TSO descriptor with 16 gather entries is 352 bytes... */
90 #define MAX_DESC_SIZE 512
91 #define MAX_DESC_TXBBS (MAX_DESC_SIZE / TXBB_SIZE)
94 * OS related constants and tunables
97 #define MLX4_EN_PRIV_FLAGS_BLUEFLAME 1
98 #define MLX4_EN_PRIV_FLAGS_PHV 2
100 #define MLX4_EN_WATCHDOG_TIMEOUT (15 * HZ)
102 /* Use the maximum between 16384 and a single page */
103 #define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(16384)
105 #define MLX4_EN_MAX_RX_FRAGS 4
107 /* Maximum ring sizes */
108 #define MLX4_EN_MAX_TX_SIZE 8192
109 #define MLX4_EN_MAX_RX_SIZE 8192
111 /* Minimum ring size for our page-allocation scheme to work */
112 #define MLX4_EN_MIN_RX_SIZE (MLX4_EN_ALLOC_SIZE / SMP_CACHE_BYTES)
113 #define MLX4_EN_MIN_TX_SIZE (4096 / TXBB_SIZE)
115 #define MLX4_EN_SMALL_PKT_SIZE 64
116 #define MLX4_EN_MIN_TX_RING_P_UP 1
117 #define MLX4_EN_MAX_TX_RING_P_UP 32
118 #define MLX4_EN_NUM_UP_LOW 1
119 #define MLX4_EN_NUM_UP_HIGH 8
120 #define MLX4_EN_DEF_RX_RING_SIZE 1024
121 #define MLX4_EN_DEF_TX_RING_SIZE MLX4_EN_DEF_RX_RING_SIZE
122 #define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \
125 #define MLX4_EN_DEFAULT_TX_WORK 256
127 /* Target number of packets to coalesce with interrupt moderation */
128 #define MLX4_EN_RX_COAL_TARGET 44
129 #define MLX4_EN_RX_COAL_TIME 0x10
131 #define MLX4_EN_TX_COAL_PKTS 16
132 #define MLX4_EN_TX_COAL_TIME 0x10
134 #define MLX4_EN_RX_RATE_LOW 400000
135 #define MLX4_EN_RX_COAL_TIME_LOW 0
136 #define MLX4_EN_RX_RATE_HIGH 450000
137 #define MLX4_EN_RX_COAL_TIME_HIGH 128
138 #define MLX4_EN_RX_SIZE_THRESH 1024
139 #define MLX4_EN_RX_RATE_THRESH (1000000 / MLX4_EN_RX_COAL_TIME_HIGH)
140 #define MLX4_EN_SAMPLE_INTERVAL 0
141 #define MLX4_EN_AVG_PKT_SMALL 256
143 #define MLX4_EN_AUTO_CONF 0xffff
145 #define MLX4_EN_DEF_RX_PAUSE 1
146 #define MLX4_EN_DEF_TX_PAUSE 1
148 /* Interval between successive polls in the Tx routine when polling is used
149 instead of interrupts (in per-core Tx rings) - should be power of 2 */
150 #define MLX4_EN_TX_POLL_MODER 16
151 #define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4)
153 #define SMALL_PACKET_SIZE (256 - NET_IP_ALIGN)
154 #define HEADER_COPY_SIZE (128 - NET_IP_ALIGN)
155 #define MLX4_LOOPBACK_TEST_PAYLOAD (HEADER_COPY_SIZE - ETH_HLEN)
157 #define MLX4_EN_MIN_MTU 46
158 /* VLAN_HLEN is added twice,to support skb vlan tagged with multiple
159 * headers. (For example: ETH_P_8021Q and ETH_P_8021AD).
161 #define MLX4_EN_EFF_MTU(mtu) ((mtu) + ETH_HLEN + (2 * VLAN_HLEN))
162 #define ETH_BCAST 0xffffffffffffULL
164 #define MLX4_EN_LOOPBACK_RETRIES 5
165 #define MLX4_EN_LOOPBACK_TIMEOUT 100
167 #ifdef MLX4_EN_PERF_STAT
168 /* Number of samples to 'average' */
170 #define AVG_FACTOR 1024
172 #define INC_PERF_COUNTER(cnt) (++(cnt))
173 #define ADD_PERF_COUNTER(cnt, add) ((cnt) += (add))
174 #define AVG_PERF_COUNTER(cnt, sample) \
175 ((cnt) = ((cnt) * (AVG_SIZE - 1) + (sample) * AVG_FACTOR) / AVG_SIZE)
176 #define GET_PERF_COUNTER(cnt) (cnt)
177 #define GET_AVG_PERF_COUNTER(cnt) ((cnt) / AVG_FACTOR)
181 #define INC_PERF_COUNTER(cnt) do {} while (0)
182 #define ADD_PERF_COUNTER(cnt, add) do {} while (0)
183 #define AVG_PERF_COUNTER(cnt, sample) do {} while (0)
184 #define GET_PERF_COUNTER(cnt) (0)
185 #define GET_AVG_PERF_COUNTER(cnt) (0)
186 #endif /* MLX4_EN_PERF_STAT */
188 /* Constants for TX flow */
190 MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
200 /* keep tx types first */
203 #define MLX4_EN_NUM_TX_TYPES (TX_XDP + 1)
211 #define ROUNDUP_LOG2(x) ilog2(roundup_pow_of_two(x))
212 #define XNOR(x, y) (!(x) == !(y))
215 struct mlx4_en_tx_info {
229 } ____cacheline_aligned_in_smp;
232 #define MLX4_EN_BIT_DESC_OWN 0x80000000
233 #define CTRL_SIZE sizeof(struct mlx4_wqe_ctrl_seg)
234 #define MLX4_EN_MEMTYPE_PAD 0x100
235 #define DS_SIZE sizeof(struct mlx4_wqe_data_seg)
238 struct mlx4_en_tx_desc {
239 struct mlx4_wqe_ctrl_seg ctrl;
241 struct mlx4_wqe_data_seg data; /* at least one data segment */
242 struct mlx4_wqe_lso_seg lso;
243 struct mlx4_wqe_inline_seg inl;
247 #define MLX4_EN_USE_SRQ 0x01000000
249 #define MLX4_EN_CX3_LOW_ID 0x1000
250 #define MLX4_EN_CX3_HIGH_ID 0x1005
252 struct mlx4_en_rx_alloc {
258 #define MLX4_EN_CACHE_SIZE (2 * NAPI_POLL_WEIGHT)
260 struct mlx4_en_page_cache {
265 } buf[MLX4_EN_CACHE_SIZE];
270 struct mlx4_en_tx_ring {
271 /* cache line used and dirtied in tx completion
272 * (mlx4_en_free_tx_buf())
276 unsigned long wake_queue;
277 struct netdev_queue *tx_queue;
278 u32 (*free_tx_desc)(struct mlx4_en_priv *priv,
279 struct mlx4_en_tx_ring *ring,
281 u64 timestamp, int napi_mode);
282 struct mlx4_en_rx_ring *recycle_ring;
284 /* cache line used and dirtied in mlx4_en_xmit() */
285 u32 prod ____cacheline_aligned_in_smp;
286 unsigned int tx_dropped;
288 unsigned long packets;
289 unsigned long tx_csum;
290 unsigned long tso_packets;
291 unsigned long xmit_more;
294 /* Following part should be mostly read */
297 u32 size; /* number of TXBBs */
302 struct mlx4_en_tx_info *tx_info;
310 /* Not used in fast path
311 * Only queue_stopped might be used if BQL is not properly working.
313 unsigned long queue_stopped;
314 struct mlx4_hwq_resources sp_wqres;
315 struct mlx4_qp sp_qp;
316 struct mlx4_qp_context sp_context;
317 cpumask_t sp_affinity_mask;
318 enum mlx4_qp_state sp_qp_state;
320 u16 sp_cqn; /* index of port CQ associated with this ring */
321 } ____cacheline_aligned_in_smp;
323 struct mlx4_en_rx_desc {
324 /* actual number of entries depends on rx ring stride */
325 struct mlx4_wqe_data_seg data[0];
328 struct mlx4_en_rx_ring {
329 struct mlx4_hwq_resources wqres;
330 u32 size ; /* number of Rx descs*/
335 u16 cqn; /* index of port CQ associated with this ring */
342 struct bpf_prog __rcu *xdp_prog;
343 struct mlx4_en_page_cache page_cache;
345 unsigned long packets;
346 unsigned long csum_ok;
347 unsigned long csum_none;
348 unsigned long csum_complete;
349 unsigned long rx_alloc_pages;
350 unsigned long xdp_drop;
351 unsigned long xdp_tx;
352 unsigned long xdp_tx_full;
353 unsigned long dropped;
354 int hwtstamp_rx_filter;
355 cpumask_var_t affinity_mask;
360 struct mlx4_hwq_resources wqres;
362 struct net_device *dev;
364 struct napi_struct napi;
373 struct mlx4_cqe *buf;
374 #define MLX4_EN_OPCODE_ERROR 0x1e
376 struct irq_desc *irq_desc;
379 struct mlx4_en_port_profile {
381 u32 tx_ring_num[MLX4_EN_NUM_TX_TYPES];
385 u8 num_tx_rings_p_up;
393 struct hwtstamp_config hwtstamp_config;
396 struct mlx4_en_profile {
402 u8 num_tx_rings_p_up;
403 struct mlx4_en_port_profile prof[MLX4_MAX_PORTS + 1];
407 struct mlx4_dev *dev;
408 struct pci_dev *pdev;
409 struct mutex state_lock;
410 struct net_device *pndev[MLX4_MAX_PORTS + 1];
411 struct net_device *upper[MLX4_MAX_PORTS + 1];
414 struct mlx4_en_profile profile;
416 struct workqueue_struct *workqueue;
417 struct device *dma_device;
418 void __iomem *uar_map;
419 struct mlx4_uar priv_uar;
423 u8 mac_removed[MLX4_MAX_PORTS + 1];
425 struct cyclecounter cycles;
426 seqlock_t clock_lock;
427 struct timecounter clock;
428 unsigned long last_overflow_check;
429 struct ptp_clock *ptp_clock;
430 struct ptp_clock_info ptp_clock_info;
431 struct notifier_block nb;
435 struct mlx4_en_rss_map {
437 struct mlx4_qp qps[MAX_RX_RINGS];
438 enum mlx4_qp_state state[MAX_RX_RINGS];
439 struct mlx4_qp *indir_qp;
440 enum mlx4_qp_state indir_state;
443 enum mlx4_en_port_flag {
444 MLX4_EN_PORT_ANC = 1<<0, /* Auto-negotiation complete */
445 MLX4_EN_PORT_ANE = 1<<1, /* Auto-negotiation enabled */
448 struct mlx4_en_port_state {
455 enum mlx4_en_mclist_act {
461 struct mlx4_en_mc_list {
462 struct list_head list;
463 enum mlx4_en_mclist_act action;
469 struct mlx4_en_frag_info {
474 #ifdef CONFIG_MLX4_EN_DCB
475 /* Minimal TC BW - setting to 0 will block traffic */
476 #define MLX4_EN_BW_MIN 1
477 #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */
479 #define MLX4_EN_TC_ETS 7
488 struct mlx4_en_cee_config {
490 enum dcb_pfc_type dcb_pfc[MLX4_EN_NUM_UP_HIGH];
494 struct ethtool_flow_id {
495 struct list_head list;
496 struct ethtool_rx_flow_spec flow_spec;
501 MLX4_EN_FLAG_PROMISC = (1 << 0),
502 MLX4_EN_FLAG_MC_PROMISC = (1 << 1),
503 /* whether we need to enable hardware loopback by putting dmac
506 MLX4_EN_FLAG_ENABLE_HW_LOOPBACK = (1 << 2),
507 /* whether we need to drop packets that hardware loopback-ed */
508 MLX4_EN_FLAG_RX_FILTER_NEEDED = (1 << 3),
509 MLX4_EN_FLAG_FORCE_PROMISC = (1 << 4),
510 MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP = (1 << 5),
511 #ifdef CONFIG_MLX4_EN_DCB
512 MLX4_EN_FLAG_DCB_ENABLED = (1 << 6),
516 #define PORT_BEACON_MAX_LIMIT (65535)
517 #define MLX4_EN_MAC_HASH_SIZE (1 << BITS_PER_BYTE)
518 #define MLX4_EN_MAC_HASH_IDX 5
520 struct mlx4_en_stats_bitmap {
521 DECLARE_BITMAP(bitmap, NUM_ALL_STATS);
522 struct mutex mutex; /* for mutual access to stats bitmap */
525 struct mlx4_en_priv {
526 struct mlx4_en_dev *mdev;
527 struct mlx4_en_port_profile *prof;
528 struct net_device *dev;
529 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
530 struct mlx4_en_port_state port_state;
531 spinlock_t stats_lock;
532 struct ethtool_flow_id ethtool_rules[MAX_NUM_OF_FS_RULES];
533 /* To allow rules removal while port is going down */
534 struct list_head ethtool_list;
536 unsigned long last_moder_packets[MAX_RX_RINGS];
537 unsigned long last_moder_tx_packets;
538 unsigned long last_moder_bytes[MAX_RX_RINGS];
539 unsigned long last_moder_jiffies;
540 int last_moder_time[MAX_RX_RINGS];
550 u16 adaptive_rx_coal;
553 u32 validate_loopback;
555 struct mlx4_hwq_resources res;
563 unsigned char current_mac[ETH_ALEN + 2];
570 struct mlx4_en_rss_map rss_map;
573 u8 num_tx_rings_p_up;
575 u32 tx_ring_num[MLX4_EN_NUM_TX_TYPES];
578 struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
584 struct mlx4_en_tx_ring **tx_ring[MLX4_EN_NUM_TX_TYPES];
585 struct mlx4_en_rx_ring *rx_ring[MAX_RX_RINGS];
586 struct mlx4_en_cq **tx_cq[MLX4_EN_NUM_TX_TYPES];
587 struct mlx4_en_cq *rx_cq[MAX_RX_RINGS];
588 struct mlx4_qp drop_qp;
589 struct work_struct rx_mode_task;
590 struct work_struct watchdog_task;
591 struct work_struct linkstate_task;
592 struct delayed_work stats_task;
593 struct delayed_work service_task;
594 struct work_struct vxlan_add_task;
595 struct work_struct vxlan_del_task;
596 struct mlx4_en_perf_stats pstats;
597 struct mlx4_en_pkt_stats pkstats;
598 struct mlx4_en_counter_stats pf_stats;
599 struct mlx4_en_flow_stats_rx rx_priority_flowstats[MLX4_NUM_PRIORITIES];
600 struct mlx4_en_flow_stats_tx tx_priority_flowstats[MLX4_NUM_PRIORITIES];
601 struct mlx4_en_flow_stats_rx rx_flowstats;
602 struct mlx4_en_flow_stats_tx tx_flowstats;
603 struct mlx4_en_port_stats port_stats;
604 struct mlx4_en_xdp_stats xdp_stats;
605 struct mlx4_en_stats_bitmap stats_bitmap;
606 struct list_head mc_list;
607 struct list_head curr_list;
609 struct mlx4_en_stat_out_mbox hw_stats;
613 struct hlist_head mac_hash[MLX4_EN_MAC_HASH_SIZE];
614 struct hwtstamp_config hwtstamp_config;
617 #ifdef CONFIG_MLX4_EN_DCB
618 #define MLX4_EN_DCB_ENABLED 0x3
620 u16 maxrate[IEEE_8021QAZ_MAX_TCS];
621 enum dcbnl_cndd_states cndd_state[IEEE_8021QAZ_MAX_TCS];
622 struct mlx4_en_cee_config cee_config;
625 #ifdef CONFIG_RFS_ACCEL
626 spinlock_t filters_lock;
628 struct list_head filters;
629 struct hlist_head filter_hash[1 << MLX4_EN_FILTER_HASH_SHIFT];
635 u8 rss_key[MLX4_EN_RSS_KEY_SIZE];
640 MLX4_EN_WOL_MAGIC = (1ULL << 61),
641 MLX4_EN_WOL_ENABLED = (1ULL << 62),
644 struct mlx4_mac_entry {
645 struct hlist_node hlist;
646 unsigned char mac[ETH_ALEN + 2];
651 static inline struct mlx4_cqe *mlx4_en_get_cqe(void *buf, int idx, int cqe_sz)
653 return buf + idx * cqe_sz;
656 #define MLX4_EN_WOL_DO_MODIFY (1ULL << 63)
658 void mlx4_en_init_ptys2ethtool_map(void);
659 void mlx4_en_update_loopback_state(struct net_device *dev,
660 netdev_features_t features);
662 void mlx4_en_destroy_netdev(struct net_device *dev);
663 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
664 struct mlx4_en_port_profile *prof);
666 int mlx4_en_start_port(struct net_device *dev);
667 void mlx4_en_stop_port(struct net_device *dev, int detach);
669 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
670 struct mlx4_en_stats_bitmap *stats_bitmap,
671 u8 rx_ppp, u8 rx_pause,
672 u8 tx_ppp, u8 tx_pause);
674 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
675 struct mlx4_en_priv *tmp,
676 struct mlx4_en_port_profile *prof,
677 bool carry_xdp_prog);
678 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
679 struct mlx4_en_priv *tmp);
681 int mlx4_en_create_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq,
682 int entries, int ring, enum cq_type mode, int node);
683 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq);
684 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
686 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
687 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
688 int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq);
690 void mlx4_en_tx_irq(struct mlx4_cq *mcq);
691 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb,
692 void *accel_priv, select_queue_fallback_t fallback);
693 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev);
694 netdev_tx_t mlx4_en_xmit_frame(struct mlx4_en_rx_ring *rx_ring,
695 struct mlx4_en_rx_alloc *frame,
696 struct net_device *dev, unsigned int length,
697 int tx_ind, bool *doorbell_pending);
698 void mlx4_en_xmit_doorbell(struct mlx4_en_tx_ring *ring);
699 bool mlx4_en_rx_recycle(struct mlx4_en_rx_ring *ring,
700 struct mlx4_en_rx_alloc *frame);
702 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
703 struct mlx4_en_tx_ring **pring,
704 u32 size, u16 stride,
705 int node, int queue_index);
706 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
707 struct mlx4_en_tx_ring **pring);
708 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
709 struct mlx4_en_tx_ring *ring,
710 int cq, int user_prio);
711 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
712 struct mlx4_en_tx_ring *ring);
713 void mlx4_en_set_num_rx_rings(struct mlx4_en_dev *mdev);
714 void mlx4_en_recover_from_oom(struct mlx4_en_priv *priv);
715 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
716 struct mlx4_en_rx_ring **pring,
717 u32 size, u16 stride, int node);
718 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
719 struct mlx4_en_rx_ring **pring,
720 u32 size, u16 stride);
721 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv);
722 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
723 struct mlx4_en_rx_ring *ring);
724 int mlx4_en_process_rx_cq(struct net_device *dev,
725 struct mlx4_en_cq *cq,
727 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget);
728 int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget);
729 bool mlx4_en_process_tx_cq(struct net_device *dev,
730 struct mlx4_en_cq *cq, int napi_budget);
731 u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
732 struct mlx4_en_tx_ring *ring,
733 int index, u64 timestamp,
735 u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,
736 struct mlx4_en_tx_ring *ring,
737 int index, u64 timestamp,
739 void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
740 int is_tx, int rss, int qpn, int cqn, int user_prio,
741 struct mlx4_qp_context *context);
742 void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event);
743 int mlx4_en_change_mcast_lb(struct mlx4_en_priv *priv, struct mlx4_qp *qp,
745 void mlx4_en_calc_rx_buf(struct net_device *dev);
746 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv);
747 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv);
748 int mlx4_en_create_drop_qp(struct mlx4_en_priv *priv);
749 void mlx4_en_destroy_drop_qp(struct mlx4_en_priv *priv);
750 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring);
751 void mlx4_en_rx_irq(struct mlx4_cq *mcq);
753 int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode);
754 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv);
756 void mlx4_en_fold_software_stats(struct net_device *dev);
757 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset);
758 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port);
760 #ifdef CONFIG_MLX4_EN_DCB
761 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops;
762 extern const struct dcbnl_rtnl_ops mlx4_en_dcbnl_pfc_ops;
765 int mlx4_en_setup_tc(struct net_device *dev, u8 up);
766 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc);
768 #ifdef CONFIG_RFS_ACCEL
769 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv);
772 #define MLX4_EN_NUM_SELF_TEST 5
773 void mlx4_en_ex_selftest(struct net_device *dev, u32 *flags, u64 *buf);
774 void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev);
776 #define DEV_FEATURE_CHANGED(dev, new_features, feature) \
777 ((dev->features & feature) ^ (new_features & feature))
779 int mlx4_en_reset_config(struct net_device *dev,
780 struct hwtstamp_config ts_config,
781 netdev_features_t new_features);
782 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
783 struct mlx4_en_stats_bitmap *stats_bitmap,
784 u8 rx_ppp, u8 rx_pause,
785 u8 tx_ppp, u8 tx_pause);
786 int mlx4_en_netdev_event(struct notifier_block *this,
787 unsigned long event, void *ptr);
790 * Functions for time stamping
792 u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe);
793 void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
794 struct skb_shared_hwtstamps *hwts,
796 void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev);
797 void mlx4_en_remove_timestamp(struct mlx4_en_dev *mdev);
801 extern const struct ethtool_ops mlx4_en_ethtool_ops;
806 * printk / logging functions
810 void en_print(const char *level, const struct mlx4_en_priv *priv,
811 const char *format, ...);
813 #define en_dbg(mlevel, priv, format, ...) \
815 if (NETIF_MSG_##mlevel & (priv)->msg_enable) \
816 en_print(KERN_DEBUG, priv, format, ##__VA_ARGS__); \
818 #define en_warn(priv, format, ...) \
819 en_print(KERN_WARNING, priv, format, ##__VA_ARGS__)
820 #define en_err(priv, format, ...) \
821 en_print(KERN_ERR, priv, format, ##__VA_ARGS__)
822 #define en_info(priv, format, ...) \
823 en_print(KERN_INFO, priv, format, ##__VA_ARGS__)
825 #define mlx4_err(mdev, format, ...) \
826 pr_err(DRV_NAME " %s: " format, \
827 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__)
828 #define mlx4_info(mdev, format, ...) \
829 pr_info(DRV_NAME " %s: " format, \
830 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__)
831 #define mlx4_warn(mdev, format, ...) \
832 pr_warn(DRV_NAME " %s: " format, \
833 dev_name(&(mdev)->pdev->dev), ##__VA_ARGS__)