2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/cq.h>
35 #include <linux/mlx4/qp.h>
36 #include <linux/mlx4/cmd.h>
40 static void mlx4_en_cq_event(struct mlx4_cq *cq, enum mlx4_event event)
46 int mlx4_en_create_cq(struct mlx4_en_priv *priv,
47 struct mlx4_en_cq **pcq,
48 int entries, int ring, enum cq_type mode,
51 struct mlx4_en_dev *mdev = priv->mdev;
52 struct mlx4_en_cq *cq;
55 cq = kzalloc_node(sizeof(*cq), GFP_KERNEL, node);
57 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
59 en_err(priv, "Failed to allocate CQ structure\n");
65 cq->buf_size = cq->size * mdev->dev->caps.cqe_size;
70 /* Allocate HW buffers on provided NUMA node.
71 * dev->numa_node is used in mtt range allocation flow.
73 set_dev_node(&mdev->dev->pdev->dev, node);
74 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres,
75 cq->buf_size, 2 * PAGE_SIZE);
76 set_dev_node(&mdev->dev->pdev->dev, mdev->dev->numa_node);
80 err = mlx4_en_map_buffer(&cq->wqres.buf);
84 cq->buf = (struct mlx4_cqe *)cq->wqres.buf.direct.buf;
90 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
97 int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
100 struct mlx4_en_dev *mdev = priv->mdev;
103 int timestamp_en = 0;
104 struct cpu_rmap *rmap =
105 #ifdef CONFIG_RFS_ACCEL
106 priv->dev->rx_cpu_rmap;
111 cq->dev = mdev->pndev[priv->port];
112 cq->mcq.set_ci_db = cq->wqres.db.db;
113 cq->mcq.arm_db = cq->wqres.db.db + 1;
114 *cq->mcq.set_ci_db = 0;
116 memset(cq->buf, 0, cq->buf_size);
118 if (cq->is_tx == RX) {
119 if (mdev->dev->caps.comp_pool) {
121 sprintf(name, "%s-%d", priv->dev->name,
123 /* Set IRQ for specific name (per ring) */
124 if (mlx4_assign_eq(mdev->dev, name, rmap,
126 cq->vector = (cq->ring + 1 + priv->port)
127 % mdev->dev->caps.num_comp_vectors;
128 mlx4_warn(mdev, "Failed assigning an EQ to %s, falling back to legacy EQ's\n",
133 cq->vector = (cq->ring + 1 + priv->port) %
134 mdev->dev->caps.num_comp_vectors;
137 /* For TX we use the same irq per
138 ring we assigned for the RX */
139 struct mlx4_en_cq *rx_cq;
141 cq_idx = cq_idx % priv->rx_ring_num;
142 rx_cq = priv->rx_cq[cq_idx];
143 cq->vector = rx_cq->vector;
147 cq->size = priv->rx_ring[cq->ring]->actual_size;
149 if ((cq->is_tx && priv->hwtstamp_config.tx_type) ||
150 (!cq->is_tx && priv->hwtstamp_config.rx_filter))
153 err = mlx4_cq_alloc(mdev->dev, cq->size, &cq->wqres.mtt,
154 &mdev->priv_uar, cq->wqres.db.dma, &cq->mcq,
155 cq->vector, 0, timestamp_en);
159 cq->mcq.comp = cq->is_tx ? mlx4_en_tx_irq : mlx4_en_rx_irq;
160 cq->mcq.event = mlx4_en_cq_event;
163 netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_tx_cq,
166 netif_napi_add(cq->dev, &cq->napi, mlx4_en_poll_rx_cq, 64);
167 napi_hash_add(&cq->napi);
170 napi_enable(&cq->napi);
175 void mlx4_en_destroy_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq **pcq)
177 struct mlx4_en_dev *mdev = priv->mdev;
178 struct mlx4_en_cq *cq = *pcq;
180 mlx4_en_unmap_buffer(&cq->wqres.buf);
181 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size);
182 if (priv->mdev->dev->caps.comp_pool && cq->vector)
183 mlx4_release_eq(priv->mdev->dev, cq->vector);
191 void mlx4_en_deactivate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
193 napi_disable(&cq->napi);
195 napi_hash_del(&cq->napi);
198 netif_napi_del(&cq->napi);
200 mlx4_cq_free(priv->mdev->dev, &cq->mcq);
203 /* Set rx cq moderation parameters */
204 int mlx4_en_set_cq_moder(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
206 return mlx4_cq_modify(priv->mdev->dev, &cq->mcq,
207 cq->moder_cnt, cq->moder_time);
210 int mlx4_en_arm_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq)
212 mlx4_cq_arm(&cq->mcq, MLX4_CQ_DB_REQ_NOT, priv->mdev->uar_map,
213 &priv->mdev->uar_lock);