1 /* SPDX-License-Identifier: GPL-2.0
2 * Marvell OcteonTx2 RVU Admin Function driver
4 * Copyright (C) 2018 Marvell International Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
27 enum npc_kpu_la_ltype {
30 NPC_LT_LA_IH_NIX_ETHER,
34 NPC_LT_LA_HIGIG2_ETHER,
35 NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
36 NPC_LT_LA_CUSTOM0 = 0xE,
37 NPC_LT_LA_CUSTOM1 = 0xF,
40 enum npc_kpu_lb_ltype {
52 NPC_LT_LB_CUSTOM0 = 0xE,
53 NPC_LT_LB_CUSTOM1 = 0xF,
56 enum npc_kpu_lc_ltype {
67 NPC_LT_LC_CUSTOM0 = 0xE,
68 NPC_LT_LC_CUSTOM1 = 0xF,
71 /* Don't modify Ltypes upto SCTP, otherwise it will
72 * effect flow tag calculation and thus RSS.
74 enum npc_kpu_ld_ltype {
86 NPC_LT_LD_TU_MPLS_IN_NSH,
87 NPC_LT_LD_TU_MPLS_IN_IP,
88 NPC_LT_LD_CUSTOM0 = 0xE,
89 NPC_LT_LD_CUSTOM1 = 0xF,
92 enum npc_kpu_le_ltype {
99 NPC_LT_LE_TU_MPLS_IN_GRE,
100 NPC_LT_LE_TU_NSH_IN_GRE,
101 NPC_LT_LE_TU_MPLS_IN_UDP,
102 NPC_LT_LE_CUSTOM0 = 0xE,
103 NPC_LT_LE_CUSTOM1 = 0xF,
106 enum npc_kpu_lf_ltype {
107 NPC_LT_LF_TU_ETHER = 1,
109 NPC_LT_LF_TU_MPLS_IN_VXLANGPE,
110 NPC_LT_LF_TU_NSH_IN_VXLANGPE,
111 NPC_LT_LF_TU_MPLS_IN_NSH,
112 NPC_LT_LF_TU_3RD_NSH,
113 NPC_LT_LF_CUSTOM0 = 0xE,
114 NPC_LT_LF_CUSTOM1 = 0xF,
117 enum npc_kpu_lg_ltype {
121 NPC_LT_LG_TU_ETHER_IN_NSH,
122 NPC_LT_LG_CUSTOM0 = 0xE,
123 NPC_LT_LG_CUSTOM1 = 0xF,
126 /* Don't modify Ltypes upto SCTP, otherwise it will
127 * effect flow tag calculation and thus RSS.
129 enum npc_kpu_lh_ltype {
130 NPC_LT_LH_TU_TCP = 1,
135 NPC_LT_LH_TU_IGMP = 8,
138 NPC_LT_LH_CUSTOM0 = 0xE,
139 NPC_LT_LH_CUSTOM1 = 0xF,
142 struct npc_kpu_profile_cam {
153 struct npc_kpu_profile_action {
173 struct npc_kpu_profile {
176 struct npc_kpu_profile_cam *cam;
177 struct npc_kpu_profile_action *action;
180 /* NPC KPU register formats */
182 #if defined(__BIG_ENDIAN_BITFIELD)
197 struct npc_kpu_action0 {
198 #if defined(__BIG_ENDIAN_BITFIELD)
206 u64 capture_ltype : 4;
207 u64 capture_flags : 8;
209 u64 var_len_offset : 8;
210 u64 var_len_mask : 8;
211 u64 var_len_right : 1;
212 u64 var_len_shift : 3;
214 u64 var_len_shift : 3;
215 u64 var_len_right : 1;
216 u64 var_len_mask : 8;
217 u64 var_len_offset : 8;
219 u64 capture_flags : 8;
220 u64 capture_ltype : 4;
231 struct npc_kpu_action1 {
232 #if defined(__BIG_ENDIAN_BITFIELD)
249 struct npc_kpu_pkind_cpi_def {
250 #if defined(__BIG_ENDIAN_BITFIELD)
281 struct nix_rx_action {
282 #if defined(__BIG_ENDIAN_BITFIELD)
299 /* NIX Receive Vtag Action Structure */
300 #define VTAG0_VALID_BIT BIT_ULL(15)
301 #define VTAG0_TYPE_MASK GENMASK_ULL(14, 12)
302 #define VTAG0_LID_MASK GENMASK_ULL(10, 8)
303 #define VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
305 struct npc_mcam_kex {
306 /* MKEX Profle Header */
307 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */
308 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */
309 u64 cpu_model; /* Format as profiled by CPU hardware */
310 u64 kpu_version; /* KPU firmware/profile version */
311 u64 reserved; /* Reserved for extension */
313 /* MKEX Profle Data */
314 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */
315 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */
316 u64 kex_ld_flags[NPC_MAX_LD];
317 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */
318 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD];
319 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */
320 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL];