1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Marvell OcteonTx2 RVU Admin Function driver
4 * Copyright (C) 2018 Marvell International Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
27 enum npc_kpu_la_ltype {
30 NPC_LT_LA_IH_NIX_ETHER,
34 NPC_LT_LA_HIGIG2_ETHER,
35 NPC_LT_LA_IH_NIX_HIGIG2_ETHER,
36 NPC_LT_LA_CUSTOM0 = 0xE,
37 NPC_LT_LA_CUSTOM1 = 0xF,
40 enum npc_kpu_lb_ltype {
53 NPC_LT_LB_CUSTOM0 = 0xE,
54 NPC_LT_LB_CUSTOM1 = 0xF,
57 enum npc_kpu_lc_ltype {
68 NPC_LT_LC_CUSTOM0 = 0xE,
69 NPC_LT_LC_CUSTOM1 = 0xF,
72 /* Don't modify Ltypes upto SCTP, otherwise it will
73 * effect flow tag calculation and thus RSS.
75 enum npc_kpu_ld_ltype {
88 NPC_LT_LD_TU_MPLS_IN_NSH,
89 NPC_LT_LD_TU_MPLS_IN_IP,
92 enum npc_kpu_le_ltype {
100 NPC_LT_LE_TU_MPLS_IN_GRE,
101 NPC_LT_LE_TU_NSH_IN_GRE,
102 NPC_LT_LE_TU_MPLS_IN_UDP,
103 NPC_LT_LE_CUSTOM0 = 0xE,
104 NPC_LT_LE_CUSTOM1 = 0xF,
107 enum npc_kpu_lf_ltype {
108 NPC_LT_LF_TU_ETHER = 1,
110 NPC_LT_LF_TU_MPLS_IN_VXLANGPE,
111 NPC_LT_LF_TU_NSH_IN_VXLANGPE,
112 NPC_LT_LF_TU_MPLS_IN_NSH,
113 NPC_LT_LF_TU_3RD_NSH,
114 NPC_LT_LF_CUSTOM0 = 0xE,
115 NPC_LT_LF_CUSTOM1 = 0xF,
118 enum npc_kpu_lg_ltype {
122 NPC_LT_LG_TU_ETHER_IN_NSH,
123 NPC_LT_LG_CUSTOM0 = 0xE,
124 NPC_LT_LG_CUSTOM1 = 0xF,
127 /* Don't modify Ltypes upto SCTP, otherwise it will
128 * effect flow tag calculation and thus RSS.
130 enum npc_kpu_lh_ltype {
131 NPC_LT_LH_TU_TCP = 1,
136 NPC_LT_LH_TU_IGMP = 8,
139 NPC_LT_LH_CUSTOM0 = 0xE,
140 NPC_LT_LH_CUSTOM1 = 0xF,
143 /* NPC port kind defines how the incoming or outgoing packets
144 * are processed. NPC accepts packets from up to 64 pkinds.
145 * Software assigns pkind for each incoming port such as CGX
146 * Ethernet interfaces, LBK interfaces, etc.
148 enum npc_pkind_type {
149 NPC_TX_DEF_PKIND = 63ULL, /* NIX-TX PKIND */
152 /* list of known and supported fields in packet header and
153 * fields present in key structure.
171 NPC_HEADER_FIELDS_MAX,
172 NPC_CHAN = NPC_HEADER_FIELDS_MAX, /* Valid when Rx */
173 NPC_PF_FUNC, /* Valid when Tx */
185 /* Ethertype for untagged frame */
187 /* Ethertype for single tagged frame */
189 /* Ethertype for double tagged frame */
191 /* outer vlan tci for single tagged frame */
193 /* outer vlan tci for double tagged frame */
195 /* other header fields programmed to extract but not of our interest */
200 struct npc_kpu_profile_cam {
211 struct npc_kpu_profile_action {
231 struct npc_kpu_profile {
234 const struct npc_kpu_profile_cam *cam;
235 const struct npc_kpu_profile_action *action;
238 /* NPC KPU register formats */
240 #if defined(__BIG_ENDIAN_BITFIELD)
255 struct npc_kpu_action0 {
256 #if defined(__BIG_ENDIAN_BITFIELD)
264 u64 capture_ltype : 4;
265 u64 capture_flags : 8;
267 u64 var_len_offset : 8;
268 u64 var_len_mask : 8;
269 u64 var_len_right : 1;
270 u64 var_len_shift : 3;
272 u64 var_len_shift : 3;
273 u64 var_len_right : 1;
274 u64 var_len_mask : 8;
275 u64 var_len_offset : 8;
277 u64 capture_flags : 8;
278 u64 capture_ltype : 4;
289 struct npc_kpu_action1 {
290 #if defined(__BIG_ENDIAN_BITFIELD)
307 struct npc_kpu_pkind_cpi_def {
308 #if defined(__BIG_ENDIAN_BITFIELD)
339 struct nix_rx_action {
340 #if defined(__BIG_ENDIAN_BITFIELD)
357 /* NPC_AF_INTFX_KEX_CFG field masks */
358 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0)
360 /* NPC_PARSE_KEX_S nibble definitions for each field */
361 #define NPC_PARSE_NIBBLE_CHAN GENMASK_ULL(2, 0)
362 #define NPC_PARSE_NIBBLE_ERRLEV BIT_ULL(3)
363 #define NPC_PARSE_NIBBLE_ERRCODE GENMASK_ULL(5, 4)
364 #define NPC_PARSE_NIBBLE_L2L3_BCAST BIT_ULL(6)
365 #define NPC_PARSE_NIBBLE_LA_FLAGS GENMASK_ULL(8, 7)
366 #define NPC_PARSE_NIBBLE_LA_LTYPE BIT_ULL(9)
367 #define NPC_PARSE_NIBBLE_LB_FLAGS GENMASK_ULL(11, 10)
368 #define NPC_PARSE_NIBBLE_LB_LTYPE BIT_ULL(12)
369 #define NPC_PARSE_NIBBLE_LC_FLAGS GENMASK_ULL(14, 13)
370 #define NPC_PARSE_NIBBLE_LC_LTYPE BIT_ULL(15)
371 #define NPC_PARSE_NIBBLE_LD_FLAGS GENMASK_ULL(17, 16)
372 #define NPC_PARSE_NIBBLE_LD_LTYPE BIT_ULL(18)
373 #define NPC_PARSE_NIBBLE_LE_FLAGS GENMASK_ULL(20, 19)
374 #define NPC_PARSE_NIBBLE_LE_LTYPE BIT_ULL(21)
375 #define NPC_PARSE_NIBBLE_LF_FLAGS GENMASK_ULL(23, 22)
376 #define NPC_PARSE_NIBBLE_LF_LTYPE BIT_ULL(24)
377 #define NPC_PARSE_NIBBLE_LG_FLAGS GENMASK_ULL(26, 25)
378 #define NPC_PARSE_NIBBLE_LG_LTYPE BIT_ULL(27)
379 #define NPC_PARSE_NIBBLE_LH_FLAGS GENMASK_ULL(29, 28)
380 #define NPC_PARSE_NIBBLE_LH_LTYPE BIT_ULL(30)
382 struct nix_tx_action {
383 #if defined(__BIG_ENDIAN_BITFIELD)
398 /* NIX Receive Vtag Action Structure */
399 #define RX_VTAG0_VALID_BIT BIT_ULL(15)
400 #define RX_VTAG0_TYPE_MASK GENMASK_ULL(14, 12)
401 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
402 #define RX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
403 #define RX_VTAG1_VALID_BIT BIT_ULL(47)
404 #define RX_VTAG1_TYPE_MASK GENMASK_ULL(46, 44)
405 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
406 #define RX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32)
408 /* NIX Transmit Vtag Action Structure */
409 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16)
410 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12)
411 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
412 #define TX_VTAG0_RELPTR_MASK GENMASK_ULL(7, 0)
413 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48)
414 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44)
415 #define TX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
416 #define TX_VTAG1_RELPTR_MASK GENMASK_ULL(39, 32)
418 struct npc_mcam_kex {
419 /* MKEX Profle Header */
420 u64 mkex_sign; /* "mcam-kex-profile" (8 bytes/ASCII characters) */
421 u8 name[MKEX_NAME_LEN]; /* MKEX Profile name */
422 u64 cpu_model; /* Format as profiled by CPU hardware */
423 u64 kpu_version; /* KPU firmware/profile version */
424 u64 reserved; /* Reserved for extension */
426 /* MKEX Profle Data */
427 u64 keyx_cfg[NPC_MAX_INTF]; /* NPC_AF_INTF(0..1)_KEX_CFG */
428 /* NPC_AF_KEX_LDATA(0..1)_FLAGS_CFG */
429 u64 kex_ld_flags[NPC_MAX_LD];
430 /* NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG */
431 u64 intf_lid_lt_ld[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD];
432 /* NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG */
433 u64 intf_ld_flags[NPC_MAX_INTF][NPC_MAX_LD][NPC_MAX_LFL];
442 struct npc_lt_def_ipsec {
450 struct npc_lt_def_cfg {
451 struct npc_lt_def rx_ol2;
452 struct npc_lt_def rx_oip4;
453 struct npc_lt_def rx_iip4;
454 struct npc_lt_def rx_oip6;
455 struct npc_lt_def rx_iip6;
456 struct npc_lt_def rx_otcp;
457 struct npc_lt_def rx_itcp;
458 struct npc_lt_def rx_oudp;
459 struct npc_lt_def rx_iudp;
460 struct npc_lt_def rx_osctp;
461 struct npc_lt_def rx_isctp;
462 struct npc_lt_def_ipsec rx_ipsec[2];
463 struct npc_lt_def pck_ol2;
464 struct npc_lt_def pck_oip4;
465 struct npc_lt_def pck_oip6;
466 struct npc_lt_def pck_iip4;
469 struct rvu_npc_mcam_rule {
470 struct flow_msg packet;
471 struct flow_msg mask;
474 struct nix_tx_action tx_action;
475 struct nix_rx_action rx_action;
478 struct list_head list;