1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2018 Intel Corporation. */
4 #include <linux/bpf_trace.h>
5 #include <net/xdp_sock_drv.h>
9 #include "ixgbe_txrx_common.h"
11 struct xsk_buff_pool *ixgbe_xsk_pool(struct ixgbe_adapter *adapter,
12 struct ixgbe_ring *ring)
14 bool xdp_on = READ_ONCE(adapter->xdp_prog);
15 int qid = ring->ring_idx;
17 if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps))
20 return xsk_get_pool_from_qid(adapter->netdev, qid);
23 static int ixgbe_xsk_pool_enable(struct ixgbe_adapter *adapter,
24 struct xsk_buff_pool *pool,
27 struct net_device *netdev = adapter->netdev;
31 if (qid >= adapter->num_rx_queues)
34 if (qid >= netdev->real_num_rx_queues ||
35 qid >= netdev->real_num_tx_queues)
38 err = xsk_pool_dma_map(pool, &adapter->pdev->dev, IXGBE_RX_DMA_ATTR);
42 if_running = netif_running(adapter->netdev) &&
43 ixgbe_enabled_xdp_adapter(adapter);
46 ixgbe_txrx_ring_disable(adapter, qid);
48 set_bit(qid, adapter->af_xdp_zc_qps);
51 ixgbe_txrx_ring_enable(adapter, qid);
53 /* Kick start the NAPI context so that receiving will start */
54 err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX);
56 clear_bit(qid, adapter->af_xdp_zc_qps);
57 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
65 static int ixgbe_xsk_pool_disable(struct ixgbe_adapter *adapter, u16 qid)
67 struct xsk_buff_pool *pool;
70 pool = xsk_get_pool_from_qid(adapter->netdev, qid);
74 if_running = netif_running(adapter->netdev) &&
75 ixgbe_enabled_xdp_adapter(adapter);
78 ixgbe_txrx_ring_disable(adapter, qid);
80 clear_bit(qid, adapter->af_xdp_zc_qps);
81 xsk_pool_dma_unmap(pool, IXGBE_RX_DMA_ATTR);
84 ixgbe_txrx_ring_enable(adapter, qid);
89 int ixgbe_xsk_pool_setup(struct ixgbe_adapter *adapter,
90 struct xsk_buff_pool *pool,
93 return pool ? ixgbe_xsk_pool_enable(adapter, pool, qid) :
94 ixgbe_xsk_pool_disable(adapter, qid);
97 static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
98 struct ixgbe_ring *rx_ring,
101 int err, result = IXGBE_XDP_PASS;
102 struct bpf_prog *xdp_prog;
103 struct xdp_frame *xdpf;
106 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
107 act = bpf_prog_run_xdp(xdp_prog, xdp);
109 if (likely(act == XDP_REDIRECT)) {
110 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
113 return IXGBE_XDP_REDIR;
120 xdpf = xdp_convert_buff_to_frame(xdp);
123 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
124 if (result == IXGBE_XDP_CONSUMED)
128 bpf_warn_invalid_xdp_action(act);
132 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
133 fallthrough; /* handle aborts by dropping packet */
135 result = IXGBE_XDP_CONSUMED;
141 bool ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
143 union ixgbe_adv_rx_desc *rx_desc;
144 struct ixgbe_rx_buffer *bi;
145 u16 i = rx_ring->next_to_use;
153 rx_desc = IXGBE_RX_DESC(rx_ring, i);
154 bi = &rx_ring->rx_buffer_info[i];
158 bi->xdp = xsk_buff_alloc(rx_ring->xsk_pool);
164 dma = xsk_buff_xdp_get_dma(bi->xdp);
166 /* Refresh the desc even if buffer_addrs didn't change
167 * because each write-back erases this info.
169 rx_desc->read.pkt_addr = cpu_to_le64(dma);
175 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
176 bi = rx_ring->rx_buffer_info;
180 /* clear the length for the next_to_use descriptor */
181 rx_desc->wb.upper.length = 0;
188 if (rx_ring->next_to_use != i) {
189 rx_ring->next_to_use = i;
191 /* Force memory writes to complete before letting h/w
192 * know there are new descriptors to fetch. (Only
193 * applicable for weak-ordered memory model archs,
197 writel(i, rx_ring->tail);
203 static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
204 struct ixgbe_rx_buffer *bi)
206 unsigned int metasize = bi->xdp->data - bi->xdp->data_meta;
207 unsigned int datasize = bi->xdp->data_end - bi->xdp->data;
210 /* allocate a skb to store the frags */
211 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
212 bi->xdp->data_end - bi->xdp->data_hard_start,
213 GFP_ATOMIC | __GFP_NOWARN);
217 skb_reserve(skb, bi->xdp->data - bi->xdp->data_hard_start);
218 memcpy(__skb_put(skb, datasize), bi->xdp->data, datasize);
220 skb_metadata_set(skb, metasize);
222 xsk_buff_free(bi->xdp);
227 static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
229 u32 ntc = rx_ring->next_to_clean + 1;
231 ntc = (ntc < rx_ring->count) ? ntc : 0;
232 rx_ring->next_to_clean = ntc;
233 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
236 int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
237 struct ixgbe_ring *rx_ring,
240 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
241 struct ixgbe_adapter *adapter = q_vector->adapter;
242 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
243 unsigned int xdp_res, xdp_xmit = 0;
244 bool failure = false;
247 while (likely(total_rx_packets < budget)) {
248 union ixgbe_adv_rx_desc *rx_desc;
249 struct ixgbe_rx_buffer *bi;
252 /* return some buffers to hardware, one at a time is too slow */
253 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
255 !ixgbe_alloc_rx_buffers_zc(rx_ring,
260 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
261 size = le16_to_cpu(rx_desc->wb.upper.length);
265 /* This memory barrier is needed to keep us from reading
266 * any other fields out of the rx_desc until we know the
267 * descriptor has been written back
271 bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
273 if (unlikely(!ixgbe_test_staterr(rx_desc,
274 IXGBE_RXD_STAT_EOP))) {
275 struct ixgbe_rx_buffer *next_bi;
277 xsk_buff_free(bi->xdp);
279 ixgbe_inc_ntc(rx_ring);
281 &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
282 next_bi->discard = true;
286 if (unlikely(bi->discard)) {
287 xsk_buff_free(bi->xdp);
290 ixgbe_inc_ntc(rx_ring);
294 bi->xdp->data_end = bi->xdp->data + size;
295 xsk_buff_dma_sync_for_cpu(bi->xdp, rx_ring->xsk_pool);
296 xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, bi->xdp);
299 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR))
302 xsk_buff_free(bi->xdp);
306 total_rx_bytes += size;
309 ixgbe_inc_ntc(rx_ring);
314 skb = ixgbe_construct_skb_zc(rx_ring, bi);
316 rx_ring->rx_stats.alloc_rx_buff_failed++;
321 ixgbe_inc_ntc(rx_ring);
323 if (eth_skb_pad(skb))
326 total_rx_bytes += skb->len;
329 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
330 ixgbe_rx_skb(q_vector, skb);
333 if (xdp_xmit & IXGBE_XDP_REDIR)
336 if (xdp_xmit & IXGBE_XDP_TX) {
337 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
339 /* Force memory writes to complete before letting h/w
340 * know there are new descriptors to fetch.
343 writel(ring->next_to_use, ring->tail);
346 u64_stats_update_begin(&rx_ring->syncp);
347 rx_ring->stats.packets += total_rx_packets;
348 rx_ring->stats.bytes += total_rx_bytes;
349 u64_stats_update_end(&rx_ring->syncp);
350 q_vector->rx.total_packets += total_rx_packets;
351 q_vector->rx.total_bytes += total_rx_bytes;
353 if (xsk_uses_need_wakeup(rx_ring->xsk_pool)) {
354 if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
355 xsk_set_rx_need_wakeup(rx_ring->xsk_pool);
357 xsk_clear_rx_need_wakeup(rx_ring->xsk_pool);
359 return (int)total_rx_packets;
361 return failure ? budget : (int)total_rx_packets;
364 void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
366 struct ixgbe_rx_buffer *bi;
369 for (i = 0; i < rx_ring->count; i++) {
370 bi = &rx_ring->rx_buffer_info[i];
375 xsk_buff_free(bi->xdp);
380 static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
382 struct xsk_buff_pool *pool = xdp_ring->xsk_pool;
383 union ixgbe_adv_tx_desc *tx_desc = NULL;
384 struct ixgbe_tx_buffer *tx_bi;
385 bool work_done = true;
386 struct xdp_desc desc;
390 while (budget-- > 0) {
391 if (unlikely(!ixgbe_desc_unused(xdp_ring)) ||
392 !netif_carrier_ok(xdp_ring->netdev)) {
397 if (!xsk_tx_peek_desc(pool, &desc))
400 dma = xsk_buff_raw_get_dma(pool, desc.addr);
401 xsk_buff_raw_dma_sync_for_device(pool, dma, desc.len);
403 tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
404 tx_bi->bytecount = desc.len;
408 tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
409 tx_desc->read.buffer_addr = cpu_to_le64(dma);
411 /* put descriptor type bits */
412 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
413 IXGBE_ADVTXD_DCMD_DEXT |
414 IXGBE_ADVTXD_DCMD_IFCS;
415 cmd_type |= desc.len | IXGBE_TXD_CMD;
416 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
417 tx_desc->read.olinfo_status =
418 cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT);
420 xdp_ring->next_to_use++;
421 if (xdp_ring->next_to_use == xdp_ring->count)
422 xdp_ring->next_to_use = 0;
426 ixgbe_xdp_ring_update_tail(xdp_ring);
427 xsk_tx_release(pool);
430 return !!budget && work_done;
433 static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
434 struct ixgbe_tx_buffer *tx_bi)
436 xdp_return_frame(tx_bi->xdpf);
437 dma_unmap_single(tx_ring->dev,
438 dma_unmap_addr(tx_bi, dma),
439 dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
440 dma_unmap_len_set(tx_bi, len, 0);
443 bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
444 struct ixgbe_ring *tx_ring, int napi_budget)
446 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
447 unsigned int total_packets = 0, total_bytes = 0;
448 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
449 union ixgbe_adv_tx_desc *tx_desc;
450 struct ixgbe_tx_buffer *tx_bi;
453 tx_bi = &tx_ring->tx_buffer_info[ntc];
454 tx_desc = IXGBE_TX_DESC(tx_ring, ntc);
457 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
460 total_bytes += tx_bi->bytecount;
461 total_packets += tx_bi->gso_segs;
464 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
473 if (unlikely(ntc == tx_ring->count)) {
475 tx_bi = tx_ring->tx_buffer_info;
476 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
479 /* issue prefetch for next Tx descriptor */
483 tx_ring->next_to_clean = ntc;
485 u64_stats_update_begin(&tx_ring->syncp);
486 tx_ring->stats.bytes += total_bytes;
487 tx_ring->stats.packets += total_packets;
488 u64_stats_update_end(&tx_ring->syncp);
489 q_vector->tx.total_bytes += total_bytes;
490 q_vector->tx.total_packets += total_packets;
493 xsk_tx_completed(pool, xsk_frames);
495 if (xsk_uses_need_wakeup(pool))
496 xsk_set_tx_need_wakeup(pool);
498 return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
501 int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
503 struct ixgbe_adapter *adapter = netdev_priv(dev);
504 struct ixgbe_ring *ring;
506 if (test_bit(__IXGBE_DOWN, &adapter->state))
509 if (!READ_ONCE(adapter->xdp_prog))
512 if (qid >= adapter->num_xdp_queues)
515 ring = adapter->xdp_ring[qid];
517 if (test_bit(__IXGBE_TX_DISABLED, &ring->state))
523 if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
524 u64 eics = BIT_ULL(ring->q_vector->v_idx);
526 ixgbe_irq_rearm_queues(adapter, eics);
532 void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
534 u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
535 struct xsk_buff_pool *pool = tx_ring->xsk_pool;
536 struct ixgbe_tx_buffer *tx_bi;
540 tx_bi = &tx_ring->tx_buffer_info[ntc];
543 ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
550 if (ntc == tx_ring->count)
555 xsk_tx_completed(pool, xsk_frames);