drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <scsi/fc/fc_fcoe.h>
  31 #include <net/udp_tunnel.h>
  32 #include <net/pkt_cls.h>
  33 #include <net/tc_act/tc_gact.h>
  34 #include <net/tc_act/tc_mirred.h>
  35 #include <net/vxlan.h>
  36 #include <net/mpls.h>
  37
  38 #include "ixgbe.h"
  39 #include "ixgbe_common.h"
  40 #include "ixgbe_dcb_82599.h"
  41 #include "ixgbe_sriov.h"
  42 #include "ixgbe_model.h"
  43
  44 char ixgbe_driver_name[] = "ixgbe";
  45 static const char ixgbe_driver_string[] =
  46                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  47 #ifdef IXGBE_FCOE
  48 char ixgbe_default_device_descr[] =
  49                               "Intel(R) 10 Gigabit Network Connection";
  50 #else
  51 static char ixgbe_default_device_descr[] =
  52                               "Intel(R) 10 Gigabit Network Connection";
  53 #endif
  54 #define DRV_VERSION "5.1.0-k"
  55 const char ixgbe_driver_version[] = DRV_VERSION;
  56 static const char ixgbe_copyright[] =
  57                                 "Copyright (c) 1999-2016 Intel Corporation.";
  58
  59 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  60
  61 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  62         [board_82598]           = &ixgbe_82598_info,
  63         [board_82599]           = &ixgbe_82599_info,
  64         [board_X540]            = &ixgbe_X540_info,
  65         [board_X550]            = &ixgbe_X550_info,
  66         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  67         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  68         [board_x550em_a]        = &ixgbe_x550em_a_info,
  69         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  70 };
  71
  72 /* ixgbe_pci_tbl - PCI Device ID Table
  73  *
  74  * Wildcard entries (PCI_ANY_ID) should come last
  75  * Last entry must be all 0s
  76  *
  77  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  78  *   Class, Class Mask, private data (not used) }
  79  */
  80 static const struct pci_device_id ixgbe_pci_tbl[] = {
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  82         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  84         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 128         /* required last entry */
 129         {0, }
 130 };
 131 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 132
 133 #ifdef CONFIG_IXGBE_DCA
 134 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 135                             void *p);
 136 static struct notifier_block dca_notifier = {
 137         .notifier_call = ixgbe_notify_dca,
 138         .next          = NULL,
 139         .priority      = 0
 140 };
 141 #endif
 142
 143 #ifdef CONFIG_PCI_IOV
 144 static unsigned int max_vfs;
 145 module_param(max_vfs, uint, 0);
 146 MODULE_PARM_DESC(max_vfs,
 147                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 148 #endif /* CONFIG_PCI_IOV */
 149
 150 static unsigned int allow_unsupported_sfp;
 151 module_param(allow_unsupported_sfp, uint, 0);
 152 MODULE_PARM_DESC(allow_unsupported_sfp,
 153                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 154
 155 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 156 static int debug = -1;
 157 module_param(debug, int, 0);
 158 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 159
 160 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 161 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 162 MODULE_LICENSE("GPL v2");
 163 MODULE_VERSION(DRV_VERSION);
 164
 165 static struct workqueue_struct *ixgbe_wq;
 166
 167 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 168 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 169
 170 static const struct net_device_ops ixgbe_netdev_ops;
 171
 172 static bool netif_is_ixgbe(struct net_device *dev)
 173 {
 174         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 175 }
 176
 177 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 178                                           u32 reg, u16 *value)
 179 {
 180         struct pci_dev *parent_dev;
 181         struct pci_bus *parent_bus;
 182
 183         parent_bus = adapter->pdev->bus->parent;
 184         if (!parent_bus)
 185                 return -1;
 186
 187         parent_dev = parent_bus->self;
 188         if (!parent_dev)
 189                 return -1;
 190
 191         if (!pci_is_pcie(parent_dev))
 192                 return -1;
 193
 194         pcie_capability_read_word(parent_dev, reg, value);
 195         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 196             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 197                 return -1;
 198         return 0;
 199 }
 200
 201 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 202 {
 203         struct ixgbe_hw *hw = &adapter->hw;
 204         u16 link_status = 0;
 205         int err;
 206
 207         hw->bus.type = ixgbe_bus_type_pci_express;
 208
 209         /* Get the negotiated link width and speed from PCI config space of the
 210          * parent, as this device is behind a switch
 211          */
 212         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 213
 214         /* assume caller will handle error case */
 215         if (err)
 216                 return err;
 217
 218         hw->bus.width = ixgbe_convert_bus_width(link_status);
 219         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 220
 221         return 0;
 222 }
 223
 224 /**
 225  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 226  * @hw: hw specific details
 227  *
 228  * This function is used by probe to determine whether a device's PCI-Express
 229  * bandwidth details should be gathered from the parent bus instead of from the
 230  * device. Used to ensure that various locations all have the correct device ID
 231  * checks.
 232  */
 233 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 234 {
 235         switch (hw->device_id) {
 236         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 237         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 238                 return true;
 239         default:
 240                 return false;
 241         }
 242 }
 243
 244 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 245                                      int expected_gts)
 246 {
 247         struct ixgbe_hw *hw = &adapter->hw;
 248         struct pci_dev *pdev;
 249
 250         /* Some devices are not connected over PCIe and thus do not negotiate
 251          * speed. These devices do not have valid bus info, and thus any report
 252          * we generate may not be correct.
 253          */
 254         if (hw->bus.type == ixgbe_bus_type_internal)
 255                 return;
 256
 257         /* determine whether to use the parent device */
 258         if (ixgbe_pcie_from_parent(&adapter->hw))
 259                 pdev = adapter->pdev->bus->parent->self;
 260         else
 261                 pdev = adapter->pdev;
 262
 263         pcie_print_link_status(pdev);
 264 }
 265
 266 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 267 {
 268         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 269             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 270             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 271                 queue_work(ixgbe_wq, &adapter->service_task);
 272 }
 273
 274 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 275 {
 276         struct ixgbe_adapter *adapter = hw->back;
 277
 278         if (!hw->hw_addr)
 279                 return;
 280         hw->hw_addr = NULL;
 281         e_dev_err("Adapter removed\n");
 282         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 283                 ixgbe_service_event_schedule(adapter);
 284 }
 285
 286 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 287 {
 288         u8 __iomem *reg_addr;
 289         u32 value;
 290         int i;
 291
 292         reg_addr = READ_ONCE(hw->hw_addr);
 293         if (ixgbe_removed(reg_addr))
 294                 return IXGBE_FAILED_READ_REG;
 295
 296         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 297          * so perform several status register reads to determine if the adapter
 298          * has been removed.
 299          */
 300         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 301                 value = readl(reg_addr + IXGBE_STATUS);
 302                 if (value != IXGBE_FAILED_READ_REG)
 303                         break;
 304                 mdelay(3);
 305         }
 306
 307         if (value == IXGBE_FAILED_READ_REG)
 308                 ixgbe_remove_adapter(hw);
 309         else
 310                 value = readl(reg_addr + reg);
 311         return value;
 312 }
 313
 314 /**
 315  * ixgbe_read_reg - Read from device register
 316  * @hw: hw specific details
 317  * @reg: offset of register to read
 318  *
 319  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 320  *
 321  * This function is used to read device registers. It checks for device
 322  * removal by confirming any read that returns all ones by checking the
 323  * status register value for all ones. This function avoids reading from
 324  * the hardware if a removal was previously detected in which case it
 325  * returns IXGBE_FAILED_READ_REG (all ones).
 326  */
 327 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 328 {
 329         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 330         u32 value;
 331
 332         if (ixgbe_removed(reg_addr))
 333                 return IXGBE_FAILED_READ_REG;
 334         if (unlikely(hw->phy.nw_mng_if_sel &
 335                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 336                 struct ixgbe_adapter *adapter;
 337                 int i;
 338
 339                 for (i = 0; i < 200; ++i) {
 340                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 341                         if (likely(!value))
 342                                 goto writes_completed;
 343                         if (value == IXGBE_FAILED_READ_REG) {
 344                                 ixgbe_remove_adapter(hw);
 345                                 return IXGBE_FAILED_READ_REG;
 346                         }
 347                         udelay(5);
 348                 }
 349
 350                 adapter = hw->back;
 351                 e_warn(hw, "register writes incomplete %08x\n", value);
 352         }
 353
 354 writes_completed:
 355         value = readl(reg_addr + reg);
 356         if (unlikely(value == IXGBE_FAILED_READ_REG))
 357                 value = ixgbe_check_remove(hw, reg);
 358         return value;
 359 }
 360
 361 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 362 {
 363         u16 value;
 364
 365         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 366         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 367                 ixgbe_remove_adapter(hw);
 368                 return true;
 369         }
 370         return false;
 371 }
 372
 373 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 374 {
 375         struct ixgbe_adapter *adapter = hw->back;
 376         u16 value;
 377
 378         if (ixgbe_removed(hw->hw_addr))
 379                 return IXGBE_FAILED_READ_CFG_WORD;
 380         pci_read_config_word(adapter->pdev, reg, &value);
 381         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 382             ixgbe_check_cfg_remove(hw, adapter->pdev))
 383                 return IXGBE_FAILED_READ_CFG_WORD;
 384         return value;
 385 }
 386
 387 #ifdef CONFIG_PCI_IOV
 388 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 389 {
 390         struct ixgbe_adapter *adapter = hw->back;
 391         u32 value;
 392
 393         if (ixgbe_removed(hw->hw_addr))
 394                 return IXGBE_FAILED_READ_CFG_DWORD;
 395         pci_read_config_dword(adapter->pdev, reg, &value);
 396         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 397             ixgbe_check_cfg_remove(hw, adapter->pdev))
 398                 return IXGBE_FAILED_READ_CFG_DWORD;
 399         return value;
 400 }
 401 #endif /* CONFIG_PCI_IOV */
 402
 403 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 404 {
 405         struct ixgbe_adapter *adapter = hw->back;
 406
 407         if (ixgbe_removed(hw->hw_addr))
 408                 return;
 409         pci_write_config_word(adapter->pdev, reg, value);
 410 }
 411
 412 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 413 {
 414         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 415
 416         /* flush memory to make sure state is correct before next watchdog */
 417         smp_mb__before_atomic();
 418         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 419 }
 420
 421 struct ixgbe_reg_info {
 422         u32 ofs;
 423         char *name;
 424 };
 425
 426 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 427
 428         /* General Registers */
 429         {IXGBE_CTRL, "CTRL"},
 430         {IXGBE_STATUS, "STATUS"},
 431         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 432
 433         /* Interrupt Registers */
 434         {IXGBE_EICR, "EICR"},
 435
 436         /* RX Registers */
 437         {IXGBE_SRRCTL(0), "SRRCTL"},
 438         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 439         {IXGBE_RDLEN(0), "RDLEN"},
 440         {IXGBE_RDH(0), "RDH"},
 441         {IXGBE_RDT(0), "RDT"},
 442         {IXGBE_RXDCTL(0), "RXDCTL"},
 443         {IXGBE_RDBAL(0), "RDBAL"},
 444         {IXGBE_RDBAH(0), "RDBAH"},
 445
 446         /* TX Registers */
 447         {IXGBE_TDBAL(0), "TDBAL"},
 448         {IXGBE_TDBAH(0), "TDBAH"},
 449         {IXGBE_TDLEN(0), "TDLEN"},
 450         {IXGBE_TDH(0), "TDH"},
 451         {IXGBE_TDT(0), "TDT"},
 452         {IXGBE_TXDCTL(0), "TXDCTL"},
 453
 454         /* List Terminator */
 455         { .name = NULL }
 456 };
 457
 458
 459 /*
 460  * ixgbe_regdump - register printout routine
 461  */
 462 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 463 {
 464         int i;
 465         char rname[16];
 466         u32 regs[64];
 467
 468         switch (reginfo->ofs) {
 469         case IXGBE_SRRCTL(0):
 470                 for (i = 0; i < 64; i++)
 471                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 472                 break;
 473         case IXGBE_DCA_RXCTRL(0):
 474                 for (i = 0; i < 64; i++)
 475                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 476                 break;
 477         case IXGBE_RDLEN(0):
 478                 for (i = 0; i < 64; i++)
 479                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 480                 break;
 481         case IXGBE_RDH(0):
 482                 for (i = 0; i < 64; i++)
 483                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 484                 break;
 485         case IXGBE_RDT(0):
 486                 for (i = 0; i < 64; i++)
 487                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 488                 break;
 489         case IXGBE_RXDCTL(0):
 490                 for (i = 0; i < 64; i++)
 491                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 492                 break;
 493         case IXGBE_RDBAL(0):
 494                 for (i = 0; i < 64; i++)
 495                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 496                 break;
 497         case IXGBE_RDBAH(0):
 498                 for (i = 0; i < 64; i++)
 499                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 500                 break;
 501         case IXGBE_TDBAL(0):
 502                 for (i = 0; i < 64; i++)
 503                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 504                 break;
 505         case IXGBE_TDBAH(0):
 506                 for (i = 0; i < 64; i++)
 507                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 508                 break;
 509         case IXGBE_TDLEN(0):
 510                 for (i = 0; i < 64; i++)
 511                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 512                 break;
 513         case IXGBE_TDH(0):
 514                 for (i = 0; i < 64; i++)
 515                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 516                 break;
 517         case IXGBE_TDT(0):
 518                 for (i = 0; i < 64; i++)
 519                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 520                 break;
 521         case IXGBE_TXDCTL(0):
 522                 for (i = 0; i < 64; i++)
 523                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 524                 break;
 525         default:
 526                 pr_info("%-15s %08x\n",
 527                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 528                 return;
 529         }
 530
 531         i = 0;
 532         while (i < 64) {
 533                 int j;
 534                 char buf[9 * 8 + 1];
 535                 char *p = buf;
 536
 537                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 538                 for (j = 0; j < 8; j++)
 539                         p += sprintf(p, " %08x", regs[i++]);
 540                 pr_err("%-15s%s\n", rname, buf);
 541         }
 542
 543 }
 544
 545 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 546 {
 547         struct ixgbe_tx_buffer *tx_buffer;
 548
 549         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 550         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 551                 n, ring->next_to_use, ring->next_to_clean,
 552                 (u64)dma_unmap_addr(tx_buffer, dma),
 553                 dma_unmap_len(tx_buffer, len),
 554                 tx_buffer->next_to_watch,
 555                 (u64)tx_buffer->time_stamp);
 556 }
 557
 558 /*
 559  * ixgbe_dump - Print registers, tx-rings and rx-rings
 560  */
 561 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 562 {
 563         struct net_device *netdev = adapter->netdev;
 564         struct ixgbe_hw *hw = &adapter->hw;
 565         struct ixgbe_reg_info *reginfo;
 566         int n = 0;
 567         struct ixgbe_ring *ring;
 568         struct ixgbe_tx_buffer *tx_buffer;
 569         union ixgbe_adv_tx_desc *tx_desc;
 570         struct my_u0 { u64 a; u64 b; } *u0;
 571         struct ixgbe_ring *rx_ring;
 572         union ixgbe_adv_rx_desc *rx_desc;
 573         struct ixgbe_rx_buffer *rx_buffer_info;
 574         int i = 0;
 575
 576         if (!netif_msg_hw(adapter))
 577                 return;
 578
 579         /* Print netdevice Info */
 580         if (netdev) {
 581                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 582                 pr_info("Device Name     state            "
 583                         "trans_start\n");
 584                 pr_info("%-15s %016lX %016lX\n",
 585                         netdev->name,
 586                         netdev->state,
 587                         dev_trans_start(netdev));
 588         }
 589
 590         /* Print Registers */
 591         dev_info(&adapter->pdev->dev, "Register Dump\n");
 592         pr_info(" Register Name   Value\n");
 593         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 594              reginfo->name; reginfo++) {
 595                 ixgbe_regdump(hw, reginfo);
 596         }
 597
 598         /* Print TX Ring Summary */
 599         if (!netdev || !netif_running(netdev))
 600                 return;
 601
 602         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 603         pr_info(" %s     %s              %s        %s\n",
 604                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 605                 "leng", "ntw", "timestamp");
 606         for (n = 0; n < adapter->num_tx_queues; n++) {
 607                 ring = adapter->tx_ring[n];
 608                 ixgbe_print_buffer(ring, n);
 609         }
 610
 611         for (n = 0; n < adapter->num_xdp_queues; n++) {
 612                 ring = adapter->xdp_ring[n];
 613                 ixgbe_print_buffer(ring, n);
 614         }
 615
 616         /* Print TX Rings */
 617         if (!netif_msg_tx_done(adapter))
 618                 goto rx_ring_summary;
 619
 620         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 621
 622         /* Transmit Descriptor Formats
 623          *
 624          * 82598 Advanced Transmit Descriptor
 625          *   +--------------------------------------------------------------+
 626          * 0 |         Buffer Address [63:0]                                |
 627          *   +--------------------------------------------------------------+
 628          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 629          *   +--------------------------------------------------------------+
 630          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 631          *
 632          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 633          *   +--------------------------------------------------------------+
 634          * 0 |                          RSV [63:0]                          |
 635          *   +--------------------------------------------------------------+
 636          * 8 |            RSV           |  STA  |          NXTSEQ           |
 637          *   +--------------------------------------------------------------+
 638          *   63                       36 35   32 31                         0
 639          *
 640          * 82599+ Advanced Transmit Descriptor
 641          *   +--------------------------------------------------------------+
 642          * 0 |         Buffer Address [63:0]                                |
 643          *   +--------------------------------------------------------------+
 644          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 645          *   +--------------------------------------------------------------+
 646          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 647          *
 648          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 649          *   +--------------------------------------------------------------+
 650          * 0 |                          RSV [63:0]                          |
 651          *   +--------------------------------------------------------------+
 652          * 8 |            RSV           |  STA  |           RSV             |
 653          *   +--------------------------------------------------------------+
 654          *   63                       36 35   32 31                         0
 655          */
 656
 657         for (n = 0; n < adapter->num_tx_queues; n++) {
 658                 ring = adapter->tx_ring[n];
 659                 pr_info("------------------------------------\n");
 660                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 661                 pr_info("------------------------------------\n");
 662                 pr_info("%s%s    %s              %s        %s          %s\n",
 663                         "T [desc]     [address 63:0  ] ",
 664                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 665                         "leng", "ntw", "timestamp", "bi->skb");
 666
 667                 for (i = 0; ring->desc && (i < ring->count); i++) {
 668                         tx_desc = IXGBE_TX_DESC(ring, i);
 669                         tx_buffer = &ring->tx_buffer_info[i];
 670                         u0 = (struct my_u0 *)tx_desc;
 671                         if (dma_unmap_len(tx_buffer, len) > 0) {
 672                                 const char *ring_desc;
 673
 674                                 if (i == ring->next_to_use &&
 675                                     i == ring->next_to_clean)
 676                                         ring_desc = " NTC/U";
 677                                 else if (i == ring->next_to_use)
 678                                         ring_desc = " NTU";
 679                                 else if (i == ring->next_to_clean)
 680                                         ring_desc = " NTC";
 681                                 else
 682                                         ring_desc = "";
 683                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 684                                         i,
 685                                         le64_to_cpu((__force __le64)u0->a),
 686                                         le64_to_cpu((__force __le64)u0->b),
 687                                         (u64)dma_unmap_addr(tx_buffer, dma),
 688                                         dma_unmap_len(tx_buffer, len),
 689                                         tx_buffer->next_to_watch,
 690                                         (u64)tx_buffer->time_stamp,
 691                                         tx_buffer->skb,
 692                                         ring_desc);
 693
 694                                 if (netif_msg_pktdata(adapter) &&
 695                                     tx_buffer->skb)
 696                                         print_hex_dump(KERN_INFO, "",
 697                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 698                                                 tx_buffer->skb->data,
 699                                                 dma_unmap_len(tx_buffer, len),
 700                                                 true);
 701                         }
 702                 }
 703         }
 704
 705         /* Print RX Rings Summary */
 706 rx_ring_summary:
 707         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 708         pr_info("Queue [NTU] [NTC]\n");
 709         for (n = 0; n < adapter->num_rx_queues; n++) {
 710                 rx_ring = adapter->rx_ring[n];
 711                 pr_info("%5d %5X %5X\n",
 712                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 713         }
 714
 715         /* Print RX Rings */
 716         if (!netif_msg_rx_status(adapter))
 717                 return;
 718
 719         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 720
 721         /* Receive Descriptor Formats
 722          *
 723          * 82598 Advanced Receive Descriptor (Read) Format
 724          *    63                                           1        0
 725          *    +-----------------------------------------------------+
 726          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 727          *    +----------------------------------------------+------+
 728          *  8 |       Header Buffer Address [63:1]           |  DD  |
 729          *    +-----------------------------------------------------+
 730          *
 731          *
 732          * 82598 Advanced Receive Descriptor (Write-Back) Format
 733          *
 734          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 735          *   +------------------------------------------------------+
 736          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 737          *   | Packet   | IP     |   |          |     | Type | Type |
 738          *   | Checksum | Ident  |   |          |     |      |      |
 739          *   +------------------------------------------------------+
 740          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 741          *   +------------------------------------------------------+
 742          *   63       48 47    32 31            20 19               0
 743          *
 744          * 82599+ Advanced Receive Descriptor (Read) Format
 745          *    63                                           1        0
 746          *    +-----------------------------------------------------+
 747          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 748          *    +----------------------------------------------+------+
 749          *  8 |       Header Buffer Address [63:1]           |  DD  |
 750          *    +-----------------------------------------------------+
 751          *
 752          *
 753          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 754          *
 755          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 756          *   +------------------------------------------------------+
 757          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 758          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 759          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 760          *   +------------------------------------------------------+
 761          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 762          *   +------------------------------------------------------+
 763          *   63       48 47    32 31          20 19                 0
 764          */
 765
 766         for (n = 0; n < adapter->num_rx_queues; n++) {
 767                 rx_ring = adapter->rx_ring[n];
 768                 pr_info("------------------------------------\n");
 769                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 770                 pr_info("------------------------------------\n");
 771                 pr_info("%s%s%s\n",
 772                         "R  [desc]      [ PktBuf     A0] ",
 773                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 774                         "<-- Adv Rx Read format");
 775                 pr_info("%s%s%s\n",
 776                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 777                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 778                         "<-- Adv Rx Write-Back format");
 779
 780                 for (i = 0; i < rx_ring->count; i++) {
 781                         const char *ring_desc;
 782
 783                         if (i == rx_ring->next_to_use)
 784                                 ring_desc = " NTU";
 785                         else if (i == rx_ring->next_to_clean)
 786                                 ring_desc = " NTC";
 787                         else
 788                                 ring_desc = "";
 789
 790                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 791                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 792                         u0 = (struct my_u0 *)rx_desc;
 793                         if (rx_desc->wb.upper.length) {
 794                                 /* Descriptor Done */
 795                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 796                                         i,
 797                                         le64_to_cpu((__force __le64)u0->a),
 798                                         le64_to_cpu((__force __le64)u0->b),
 799                                         rx_buffer_info->skb,
 800                                         ring_desc);
 801                         } else {
 802                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 803                                         i,
 804                                         le64_to_cpu((__force __le64)u0->a),
 805                                         le64_to_cpu((__force __le64)u0->b),
 806                                         (u64)rx_buffer_info->dma,
 807                                         rx_buffer_info->skb,
 808                                         ring_desc);
 809
 810                                 if (netif_msg_pktdata(adapter) &&
 811                                     rx_buffer_info->dma) {
 812                                         print_hex_dump(KERN_INFO, "",
 813                                            DUMP_PREFIX_ADDRESS, 16, 1,
 814                                            page_address(rx_buffer_info->page) +
 815                                                     rx_buffer_info->page_offset,
 816                                            ixgbe_rx_bufsz(rx_ring), true);
 817                                 }
 818                         }
 819                 }
 820         }
 821 }
 822
 823 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 824 {
 825         u32 ctrl_ext;
 826
 827         /* Let firmware take over control of h/w */
 828         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 829         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 830                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 831 }
 832
 833 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 834 {
 835         u32 ctrl_ext;
 836
 837         /* Let firmware know the driver has taken over */
 838         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 839         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 840                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 841 }
 842
 843 /**
 844  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 845  * @adapter: pointer to adapter struct
 846  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 847  * @queue: queue to map the corresponding interrupt to
 848  * @msix_vector: the vector to map to the corresponding queue
 849  *
 850  */
 851 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 852                            u8 queue, u8 msix_vector)
 853 {
 854         u32 ivar, index;
 855         struct ixgbe_hw *hw = &adapter->hw;
 856         switch (hw->mac.type) {
 857         case ixgbe_mac_82598EB:
 858                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 859                 if (direction == -1)
 860                         direction = 0;
 861                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 862                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 863                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 864                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 865                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 866                 break;
 867         case ixgbe_mac_82599EB:
 868         case ixgbe_mac_X540:
 869         case ixgbe_mac_X550:
 870         case ixgbe_mac_X550EM_x:
 871         case ixgbe_mac_x550em_a:
 872                 if (direction == -1) {
 873                         /* other causes */
 874                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 875                         index = ((queue & 1) * 8);
 876                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 877                         ivar &= ~(0xFF << index);
 878                         ivar |= (msix_vector << index);
 879                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 880                         break;
 881                 } else {
 882                         /* tx or rx causes */
 883                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 884                         index = ((16 * (queue & 1)) + (8 * direction));
 885                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 886                         ivar &= ~(0xFF << index);
 887                         ivar |= (msix_vector << index);
 888                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 889                         break;
 890                 }
 891         default:
 892                 break;
 893         }
 894 }
 895
 896 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 897                                           u64 qmask)
 898 {
 899         u32 mask;
 900
 901         switch (adapter->hw.mac.type) {
 902         case ixgbe_mac_82598EB:
 903                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 904                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 905                 break;
 906         case ixgbe_mac_82599EB:
 907         case ixgbe_mac_X540:
 908         case ixgbe_mac_X550:
 909         case ixgbe_mac_X550EM_x:
 910         case ixgbe_mac_x550em_a:
 911                 mask = (qmask & 0xFFFFFFFF);
 912                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 913                 mask = (qmask >> 32);
 914                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 915                 break;
 916         default:
 917                 break;
 918         }
 919 }
 920
 921 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 922 {
 923         struct ixgbe_hw *hw = &adapter->hw;
 924         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 925         int i;
 926         u32 data;
 927
 928         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 929             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 930                 return;
 931
 932         switch (hw->mac.type) {
 933         case ixgbe_mac_82598EB:
 934                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 935                 break;
 936         default:
 937                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 938         }
 939         hwstats->lxoffrxc += data;
 940
 941         /* refill credits (no tx hang) if we received xoff */
 942         if (!data)
 943                 return;
 944
 945         for (i = 0; i < adapter->num_tx_queues; i++)
 946                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 947                           &adapter->tx_ring[i]->state);
 948
 949         for (i = 0; i < adapter->num_xdp_queues; i++)
 950                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 951                           &adapter->xdp_ring[i]->state);
 952 }
 953
 954 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 955 {
 956         struct ixgbe_hw *hw = &adapter->hw;
 957         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 958         u32 xoff[8] = {0};
 959         u8 tc;
 960         int i;
 961         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 962
 963         if (adapter->ixgbe_ieee_pfc)
 964                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 965
 966         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 967                 ixgbe_update_xoff_rx_lfc(adapter);
 968                 return;
 969         }
 970
 971         /* update stats for each tc, only valid with PFC enabled */
 972         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 973                 u32 pxoffrxc;
 974
 975                 switch (hw->mac.type) {
 976                 case ixgbe_mac_82598EB:
 977                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 978                         break;
 979                 default:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 981                 }
 982                 hwstats->pxoffrxc[i] += pxoffrxc;
 983                 /* Get the TC for given UP */
 984                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 985                 xoff[tc] += pxoffrxc;
 986         }
 987
 988         /* disarm tx queues that have received xoff frames */
 989         for (i = 0; i < adapter->num_tx_queues; i++) {
 990                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 991
 992                 tc = tx_ring->dcb_tc;
 993                 if (xoff[tc])
 994                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 995         }
 996
 997         for (i = 0; i < adapter->num_xdp_queues; i++) {
 998                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
 999
1000                 tc = xdp_ring->dcb_tc;
1001                 if (xoff[tc])
1002                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1003         }
1004 }
1005
1006 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1007 {
1008         return ring->stats.packets;
1009 }
1010
1011 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1012 {
1013         unsigned int head, tail;
1014
1015         head = ring->next_to_clean;
1016         tail = ring->next_to_use;
1017
1018         return ((head <= tail) ? tail : tail + ring->count) - head;
1019 }
1020
1021 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1022 {
1023         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1024         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1025         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1026
1027         clear_check_for_tx_hang(tx_ring);
1028
1029         /*
1030          * Check for a hung queue, but be thorough. This verifies
1031          * that a transmit has been completed since the previous
1032          * check AND there is at least one packet pending. The
1033          * ARMED bit is set to indicate a potential hang. The
1034          * bit is cleared if a pause frame is received to remove
1035          * false hang detection due to PFC or 802.3x frames. By
1036          * requiring this to fail twice we avoid races with
1037          * pfc clearing the ARMED bit and conditions where we
1038          * run the check_tx_hang logic with a transmit completion
1039          * pending but without time to complete it yet.
1040          */
1041         if (tx_done_old == tx_done && tx_pending)
1042                 /* make sure it is true for two checks in a row */
1043                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1044                                         &tx_ring->state);
1045         /* update completed stats and continue */
1046         tx_ring->tx_stats.tx_done_old = tx_done;
1047         /* reset the countdown */
1048         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1049
1050         return false;
1051 }
1052
1053 /**
1054  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1055  * @adapter: driver private struct
1056  **/
1057 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1058 {
1059
1060         /* Do the reset outside of interrupt context */
1061         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1062                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1063                 e_warn(drv, "initiating reset due to tx timeout\n");
1064                 ixgbe_service_event_schedule(adapter);
1065         }
1066 }
1067
1068 /**
1069  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1070  * @netdev: network interface device structure
1071  * @queue_index: Tx queue to set
1072  * @maxrate: desired maximum transmit bitrate
1073  **/
1074 static int ixgbe_tx_maxrate(struct net_device *netdev,
1075                             int queue_index, u32 maxrate)
1076 {
1077         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1078         struct ixgbe_hw *hw = &adapter->hw;
1079         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1080
1081         if (!maxrate)
1082                 return 0;
1083
1084         /* Calculate the rate factor values to set */
1085         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1086         bcnrc_val /= maxrate;
1087
1088         /* clear everything but the rate factor */
1089         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1090         IXGBE_RTTBCNRC_RF_DEC_MASK;
1091
1092         /* enable the rate scheduler */
1093         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1094
1095         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1096         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1097
1098         return 0;
1099 }
1100
1101 /**
1102  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1103  * @q_vector: structure containing interrupt and ring information
1104  * @tx_ring: tx ring to clean
1105  * @napi_budget: Used to determine if we are in netpoll
1106  **/
1107 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1108                                struct ixgbe_ring *tx_ring, int napi_budget)
1109 {
1110         struct ixgbe_adapter *adapter = q_vector->adapter;
1111         struct ixgbe_tx_buffer *tx_buffer;
1112         union ixgbe_adv_tx_desc *tx_desc;
1113         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1114         unsigned int budget = q_vector->tx.work_limit;
1115         unsigned int i = tx_ring->next_to_clean;
1116
1117         if (test_bit(__IXGBE_DOWN, &adapter->state))
1118                 return true;
1119
1120         tx_buffer = &tx_ring->tx_buffer_info[i];
1121         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1122         i -= tx_ring->count;
1123
1124         do {
1125                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1126
1127                 /* if next_to_watch is not set then there is no work pending */
1128                 if (!eop_desc)
1129                         break;
1130
1131                 /* prevent any other reads prior to eop_desc */
1132                 smp_rmb();
1133
1134                 /* if DD is not set pending work has not been completed */
1135                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1136                         break;
1137
1138                 /* clear next_to_watch to prevent false hangs */
1139                 tx_buffer->next_to_watch = NULL;
1140
1141                 /* update the statistics for this packet */
1142                 total_bytes += tx_buffer->bytecount;
1143                 total_packets += tx_buffer->gso_segs;
1144                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1145                         total_ipsec++;
1146
1147                 /* free the skb */
1148                 if (ring_is_xdp(tx_ring))
1149                         xdp_return_frame(tx_buffer->xdpf);
1150                 else
1151                         napi_consume_skb(tx_buffer->skb, napi_budget);
1152
1153                 /* unmap skb header data */
1154                 dma_unmap_single(tx_ring->dev,
1155                                  dma_unmap_addr(tx_buffer, dma),
1156                                  dma_unmap_len(tx_buffer, len),
1157                                  DMA_TO_DEVICE);
1158
1159                 /* clear tx_buffer data */
1160                 dma_unmap_len_set(tx_buffer, len, 0);
1161
1162                 /* unmap remaining buffers */
1163                 while (tx_desc != eop_desc) {
1164                         tx_buffer++;
1165                         tx_desc++;
1166                         i++;
1167                         if (unlikely(!i)) {
1168                                 i -= tx_ring->count;
1169                                 tx_buffer = tx_ring->tx_buffer_info;
1170                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1171                         }
1172
1173                         /* unmap any remaining paged data */
1174                         if (dma_unmap_len(tx_buffer, len)) {
1175                                 dma_unmap_page(tx_ring->dev,
1176                                                dma_unmap_addr(tx_buffer, dma),
1177                                                dma_unmap_len(tx_buffer, len),
1178                                                DMA_TO_DEVICE);
1179                                 dma_unmap_len_set(tx_buffer, len, 0);
1180                         }
1181                 }
1182
1183                 /* move us one more past the eop_desc for start of next pkt */
1184                 tx_buffer++;
1185                 tx_desc++;
1186                 i++;
1187                 if (unlikely(!i)) {
1188                         i -= tx_ring->count;
1189                         tx_buffer = tx_ring->tx_buffer_info;
1190                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1191                 }
1192
1193                 /* issue prefetch for next Tx descriptor */
1194                 prefetch(tx_desc);
1195
1196                 /* update budget accounting */
1197                 budget--;
1198         } while (likely(budget));
1199
1200         i += tx_ring->count;
1201         tx_ring->next_to_clean = i;
1202         u64_stats_update_begin(&tx_ring->syncp);
1203         tx_ring->stats.bytes += total_bytes;
1204         tx_ring->stats.packets += total_packets;
1205         u64_stats_update_end(&tx_ring->syncp);
1206         q_vector->tx.total_bytes += total_bytes;
1207         q_vector->tx.total_packets += total_packets;
1208         adapter->tx_ipsec += total_ipsec;
1209
1210         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1211                 /* schedule immediate reset if we believe we hung */
1212                 struct ixgbe_hw *hw = &adapter->hw;
1213                 e_err(drv, "Detected Tx Unit Hang %s\n"
1214                         "  Tx Queue             <%d>\n"
1215                         "  TDH, TDT             <%x>, <%x>\n"
1216                         "  next_to_use          <%x>\n"
1217                         "  next_to_clean        <%x>\n"
1218                         "tx_buffer_info[next_to_clean]\n"
1219                         "  time_stamp           <%lx>\n"
1220                         "  jiffies              <%lx>\n",
1221                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1222                         tx_ring->queue_index,
1223                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1224                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1225                         tx_ring->next_to_use, i,
1226                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1227
1228                 if (!ring_is_xdp(tx_ring))
1229                         netif_stop_subqueue(tx_ring->netdev,
1230                                             tx_ring->queue_index);
1231
1232                 e_info(probe,
1233                        "tx hang %d detected on queue %d, resetting adapter\n",
1234                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1235
1236                 /* schedule immediate reset if we believe we hung */
1237                 ixgbe_tx_timeout_reset(adapter);
1238
1239                 /* the adapter is about to reset, no point in enabling stuff */
1240                 return true;
1241         }
1242
1243         if (ring_is_xdp(tx_ring))
1244                 return !!budget;
1245
1246         netdev_tx_completed_queue(txring_txq(tx_ring),
1247                                   total_packets, total_bytes);
1248
1249 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1250         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1251                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1252                 /* Make sure that anybody stopping the queue after this
1253                  * sees the new next_to_clean.
1254                  */
1255                 smp_mb();
1256                 if (__netif_subqueue_stopped(tx_ring->netdev,
1257                                              tx_ring->queue_index)
1258                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1259                         netif_wake_subqueue(tx_ring->netdev,
1260                                             tx_ring->queue_index);
1261                         ++tx_ring->tx_stats.restart_queue;
1262                 }
1263         }
1264
1265         return !!budget;
1266 }
1267
1268 #ifdef CONFIG_IXGBE_DCA
1269 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1270                                 struct ixgbe_ring *tx_ring,
1271                                 int cpu)
1272 {
1273         struct ixgbe_hw *hw = &adapter->hw;
1274         u32 txctrl = 0;
1275         u16 reg_offset;
1276
1277         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1278                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1279
1280         switch (hw->mac.type) {
1281         case ixgbe_mac_82598EB:
1282                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1283                 break;
1284         case ixgbe_mac_82599EB:
1285         case ixgbe_mac_X540:
1286                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1287                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1288                 break;
1289         default:
1290                 /* for unknown hardware do not write register */
1291                 return;
1292         }
1293
1294         /*
1295          * We can enable relaxed ordering for reads, but not writes when
1296          * DCA is enabled.  This is due to a known issue in some chipsets
1297          * which will cause the DCA tag to be cleared.
1298          */
1299         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1300                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1301                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1302
1303         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1304 }
1305
1306 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1307                                 struct ixgbe_ring *rx_ring,
1308                                 int cpu)
1309 {
1310         struct ixgbe_hw *hw = &adapter->hw;
1311         u32 rxctrl = 0;
1312         u8 reg_idx = rx_ring->reg_idx;
1313
1314         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1315                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1316
1317         switch (hw->mac.type) {
1318         case ixgbe_mac_82599EB:
1319         case ixgbe_mac_X540:
1320                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1321                 break;
1322         default:
1323                 break;
1324         }
1325
1326         /*
1327          * We can enable relaxed ordering for reads, but not writes when
1328          * DCA is enabled.  This is due to a known issue in some chipsets
1329          * which will cause the DCA tag to be cleared.
1330          */
1331         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1332                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1333                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1334
1335         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1336 }
1337
1338 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1339 {
1340         struct ixgbe_adapter *adapter = q_vector->adapter;
1341         struct ixgbe_ring *ring;
1342         int cpu = get_cpu();
1343
1344         if (q_vector->cpu == cpu)
1345                 goto out_no_update;
1346
1347         ixgbe_for_each_ring(ring, q_vector->tx)
1348                 ixgbe_update_tx_dca(adapter, ring, cpu);
1349
1350         ixgbe_for_each_ring(ring, q_vector->rx)
1351                 ixgbe_update_rx_dca(adapter, ring, cpu);
1352
1353         q_vector->cpu = cpu;
1354 out_no_update:
1355         put_cpu();
1356 }
1357
1358 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1359 {
1360         int i;
1361
1362         /* always use CB2 mode, difference is masked in the CB driver */
1363         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1364                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1365                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1366         else
1367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1369
1370         for (i = 0; i < adapter->num_q_vectors; i++) {
1371                 adapter->q_vector[i]->cpu = -1;
1372                 ixgbe_update_dca(adapter->q_vector[i]);
1373         }
1374 }
1375
1376 static int __ixgbe_notify_dca(struct device *dev, void *data)
1377 {
1378         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1379         unsigned long event = *(unsigned long *)data;
1380
1381         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1382                 return 0;
1383
1384         switch (event) {
1385         case DCA_PROVIDER_ADD:
1386                 /* if we're already enabled, don't do it again */
1387                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1388                         break;
1389                 if (dca_add_requester(dev) == 0) {
1390                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1391                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1392                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1393                         break;
1394                 }
1395                 /* fall through - DCA is disabled. */
1396         case DCA_PROVIDER_REMOVE:
1397                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1398                         dca_remove_requester(dev);
1399                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1400                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1401                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1402                 }
1403                 break;
1404         }
1405
1406         return 0;
1407 }
1408
1409 #endif /* CONFIG_IXGBE_DCA */
1410
1411 #define IXGBE_RSS_L4_TYPES_MASK \
1412         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1413          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1414          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1415          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1416
1417 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1418                                  union ixgbe_adv_rx_desc *rx_desc,
1419                                  struct sk_buff *skb)
1420 {
1421         u16 rss_type;
1422
1423         if (!(ring->netdev->features & NETIF_F_RXHASH))
1424                 return;
1425
1426         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1427                    IXGBE_RXDADV_RSSTYPE_MASK;
1428
1429         if (!rss_type)
1430                 return;
1431
1432         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1433                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1434                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1435 }
1436
1437 #ifdef IXGBE_FCOE
1438 /**
1439  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1440  * @ring: structure containing ring specific data
1441  * @rx_desc: advanced rx descriptor
1442  *
1443  * Returns : true if it is FCoE pkt
1444  */
1445 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1446                                     union ixgbe_adv_rx_desc *rx_desc)
1447 {
1448         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1449
1450         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1451                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1452                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1453                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1454 }
1455
1456 #endif /* IXGBE_FCOE */
1457 /**
1458  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1459  * @ring: structure containing ring specific data
1460  * @rx_desc: current Rx descriptor being processed
1461  * @skb: skb currently being received and modified
1462  **/
1463 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1464                                      union ixgbe_adv_rx_desc *rx_desc,
1465                                      struct sk_buff *skb)
1466 {
1467         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1468         bool encap_pkt = false;
1469
1470         skb_checksum_none_assert(skb);
1471
1472         /* Rx csum disabled */
1473         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1474                 return;
1475
1476         /* check for VXLAN and Geneve packets */
1477         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1478                 encap_pkt = true;
1479                 skb->encapsulation = 1;
1480         }
1481
1482         /* if IP and error */
1483         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1484             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1485                 ring->rx_stats.csum_err++;
1486                 return;
1487         }
1488
1489         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1490                 return;
1491
1492         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1493                 /*
1494                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1495                  * checksum errors.
1496                  */
1497                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1498                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1499                         return;
1500
1501                 ring->rx_stats.csum_err++;
1502                 return;
1503         }
1504
1505         /* It must be a TCP or UDP packet with a valid checksum */
1506         skb->ip_summed = CHECKSUM_UNNECESSARY;
1507         if (encap_pkt) {
1508                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1509                         return;
1510
1511                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1512                         skb->ip_summed = CHECKSUM_NONE;
1513                         return;
1514                 }
1515                 /* If we checked the outer header let the stack know */
1516                 skb->csum_level = 1;
1517         }
1518 }
1519
1520 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1521 {
1522         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1523 }
1524
1525 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1526                                     struct ixgbe_rx_buffer *bi)
1527 {
1528         struct page *page = bi->page;
1529         dma_addr_t dma;
1530
1531         /* since we are recycling buffers we should seldom need to alloc */
1532         if (likely(page))
1533                 return true;
1534
1535         /* alloc new page for storage */
1536         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1537         if (unlikely(!page)) {
1538                 rx_ring->rx_stats.alloc_rx_page_failed++;
1539                 return false;
1540         }
1541
1542         /* map page for use */
1543         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1544                                  ixgbe_rx_pg_size(rx_ring),
1545                                  DMA_FROM_DEVICE,
1546                                  IXGBE_RX_DMA_ATTR);
1547
1548         /*
1549          * if mapping failed free memory back to system since
1550          * there isn't much point in holding memory we can't use
1551          */
1552         if (dma_mapping_error(rx_ring->dev, dma)) {
1553                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1554
1555                 rx_ring->rx_stats.alloc_rx_page_failed++;
1556                 return false;
1557         }
1558
1559         bi->dma = dma;
1560         bi->page = page;
1561         bi->page_offset = ixgbe_rx_offset(rx_ring);
1562         page_ref_add(page, USHRT_MAX - 1);
1563         bi->pagecnt_bias = USHRT_MAX;
1564         rx_ring->rx_stats.alloc_rx_page++;
1565
1566         return true;
1567 }
1568
1569 /**
1570  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1571  * @rx_ring: ring to place buffers on
1572  * @cleaned_count: number of buffers to replace
1573  **/
1574 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1575 {
1576         union ixgbe_adv_rx_desc *rx_desc;
1577         struct ixgbe_rx_buffer *bi;
1578         u16 i = rx_ring->next_to_use;
1579         u16 bufsz;
1580
1581         /* nothing to do */
1582         if (!cleaned_count)
1583                 return;
1584
1585         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1586         bi = &rx_ring->rx_buffer_info[i];
1587         i -= rx_ring->count;
1588
1589         bufsz = ixgbe_rx_bufsz(rx_ring);
1590
1591         do {
1592                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1593                         break;
1594
1595                 /* sync the buffer for use by the device */
1596                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1597                                                  bi->page_offset, bufsz,
1598                                                  DMA_FROM_DEVICE);
1599
1600                 /*
1601                  * Refresh the desc even if buffer_addrs didn't change
1602                  * because each write-back erases this info.
1603                  */
1604                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1605
1606                 rx_desc++;
1607                 bi++;
1608                 i++;
1609                 if (unlikely(!i)) {
1610                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1611                         bi = rx_ring->rx_buffer_info;
1612                         i -= rx_ring->count;
1613                 }
1614
1615                 /* clear the length for the next_to_use descriptor */
1616                 rx_desc->wb.upper.length = 0;
1617
1618                 cleaned_count--;
1619         } while (cleaned_count);
1620
1621         i += rx_ring->count;
1622
1623         if (rx_ring->next_to_use != i) {
1624                 rx_ring->next_to_use = i;
1625
1626                 /* update next to alloc since we have filled the ring */
1627                 rx_ring->next_to_alloc = i;
1628
1629                 /* Force memory writes to complete before letting h/w
1630                  * know there are new descriptors to fetch.  (Only
1631                  * applicable for weak-ordered memory model archs,
1632                  * such as IA-64).
1633                  */
1634                 wmb();
1635                 writel(i, rx_ring->tail);
1636         }
1637 }
1638
1639 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1640                                    struct sk_buff *skb)
1641 {
1642         u16 hdr_len = skb_headlen(skb);
1643
1644         /* set gso_size to avoid messing up TCP MSS */
1645         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1646                                                  IXGBE_CB(skb)->append_cnt);
1647         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1648 }
1649
1650 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1651                                    struct sk_buff *skb)
1652 {
1653         /* if append_cnt is 0 then frame is not RSC */
1654         if (!IXGBE_CB(skb)->append_cnt)
1655                 return;
1656
1657         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1658         rx_ring->rx_stats.rsc_flush++;
1659
1660         ixgbe_set_rsc_gso_size(rx_ring, skb);
1661
1662         /* gso_size is computed using append_cnt so always clear it last */
1663         IXGBE_CB(skb)->append_cnt = 0;
1664 }
1665
1666 /**
1667  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1668  * @rx_ring: rx descriptor ring packet is being transacted on
1669  * @rx_desc: pointer to the EOP Rx descriptor
1670  * @skb: pointer to current skb being populated
1671  *
1672  * This function checks the ring, descriptor, and packet information in
1673  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1674  * other fields within the skb.
1675  **/
1676 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1677                                      union ixgbe_adv_rx_desc *rx_desc,
1678                                      struct sk_buff *skb)
1679 {
1680         struct net_device *dev = rx_ring->netdev;
1681         u32 flags = rx_ring->q_vector->adapter->flags;
1682
1683         ixgbe_update_rsc_stats(rx_ring, skb);
1684
1685         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1686
1687         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1688
1689         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1690                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1691
1692         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1693             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1694                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1695                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1696         }
1697
1698         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1699                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1700
1701         /* record Rx queue, or update MACVLAN statistics */
1702         if (netif_is_ixgbe(dev))
1703                 skb_record_rx_queue(skb, rx_ring->queue_index);
1704         else
1705                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1706                                  false);
1707
1708         skb->protocol = eth_type_trans(skb, dev);
1709 }
1710
1711 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1712                          struct sk_buff *skb)
1713 {
1714         napi_gro_receive(&q_vector->napi, skb);
1715 }
1716
1717 /**
1718  * ixgbe_is_non_eop - process handling of non-EOP buffers
1719  * @rx_ring: Rx ring being processed
1720  * @rx_desc: Rx descriptor for current buffer
1721  * @skb: Current socket buffer containing buffer in progress
1722  *
1723  * This function updates next to clean.  If the buffer is an EOP buffer
1724  * this function exits returning false, otherwise it will place the
1725  * sk_buff in the next buffer to be chained and return true indicating
1726  * that this is in fact a non-EOP buffer.
1727  **/
1728 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1729                              union ixgbe_adv_rx_desc *rx_desc,
1730                              struct sk_buff *skb)
1731 {
1732         u32 ntc = rx_ring->next_to_clean + 1;
1733
1734         /* fetch, update, and store next to clean */
1735         ntc = (ntc < rx_ring->count) ? ntc : 0;
1736         rx_ring->next_to_clean = ntc;
1737
1738         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1739
1740         /* update RSC append count if present */
1741         if (ring_is_rsc_enabled(rx_ring)) {
1742                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1743                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1744
1745                 if (unlikely(rsc_enabled)) {
1746                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1747
1748                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1749                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1750
1751                         /* update ntc based on RSC value */
1752                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1753                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1754                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1755                 }
1756         }
1757
1758         /* if we are the last buffer then there is nothing else to do */
1759         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1760                 return false;
1761
1762         /* place skb in next buffer to be received */
1763         rx_ring->rx_buffer_info[ntc].skb = skb;
1764         rx_ring->rx_stats.non_eop_descs++;
1765
1766         return true;
1767 }
1768
1769 /**
1770  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1771  * @rx_ring: rx descriptor ring packet is being transacted on
1772  * @skb: pointer to current skb being adjusted
1773  *
1774  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1775  * main difference between this version and the original function is that
1776  * this function can make several assumptions about the state of things
1777  * that allow for significant optimizations versus the standard function.
1778  * As a result we can do things like drop a frag and maintain an accurate
1779  * truesize for the skb.
1780  */
1781 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1782                             struct sk_buff *skb)
1783 {
1784         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1785         unsigned char *va;
1786         unsigned int pull_len;
1787
1788         /*
1789          * it is valid to use page_address instead of kmap since we are
1790          * working with pages allocated out of the lomem pool per
1791          * alloc_page(GFP_ATOMIC)
1792          */
1793         va = skb_frag_address(frag);
1794
1795         /*
1796          * we need the header to contain the greater of either ETH_HLEN or
1797          * 60 bytes if the skb->len is less than 60 for skb_pad.
1798          */
1799         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1800
1801         /* align pull length to size of long to optimize memcpy performance */
1802         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1803
1804         /* update all of the pointers */
1805         skb_frag_size_sub(frag, pull_len);
1806         frag->page_offset += pull_len;
1807         skb->data_len -= pull_len;
1808         skb->tail += pull_len;
1809 }
1810
1811 /**
1812  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1813  * @rx_ring: rx descriptor ring packet is being transacted on
1814  * @skb: pointer to current skb being updated
1815  *
1816  * This function provides a basic DMA sync up for the first fragment of an
1817  * skb.  The reason for doing this is that the first fragment cannot be
1818  * unmapped until we have reached the end of packet descriptor for a buffer
1819  * chain.
1820  */
1821 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1822                                 struct sk_buff *skb)
1823 {
1824         /* if the page was released unmap it, else just sync our portion */
1825         if (unlikely(IXGBE_CB(skb)->page_released)) {
1826                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1827                                      ixgbe_rx_pg_size(rx_ring),
1828                                      DMA_FROM_DEVICE,
1829                                      IXGBE_RX_DMA_ATTR);
1830         } else if (ring_uses_build_skb(rx_ring)) {
1831                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1832
1833                 dma_sync_single_range_for_cpu(rx_ring->dev,
1834                                               IXGBE_CB(skb)->dma,
1835                                               offset,
1836                                               skb_headlen(skb),
1837                                               DMA_FROM_DEVICE);
1838         } else {
1839                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1840
1841                 dma_sync_single_range_for_cpu(rx_ring->dev,
1842                                               IXGBE_CB(skb)->dma,
1843                                               frag->page_offset,
1844                                               skb_frag_size(frag),
1845                                               DMA_FROM_DEVICE);
1846         }
1847 }
1848
1849 /**
1850  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1851  * @rx_ring: rx descriptor ring packet is being transacted on
1852  * @rx_desc: pointer to the EOP Rx descriptor
1853  * @skb: pointer to current skb being fixed
1854  *
1855  * Check if the skb is valid in the XDP case it will be an error pointer.
1856  * Return true in this case to abort processing and advance to next
1857  * descriptor.
1858  *
1859  * Check for corrupted packet headers caused by senders on the local L2
1860  * embedded NIC switch not setting up their Tx Descriptors right.  These
1861  * should be very rare.
1862  *
1863  * Also address the case where we are pulling data in on pages only
1864  * and as such no data is present in the skb header.
1865  *
1866  * In addition if skb is not at least 60 bytes we need to pad it so that
1867  * it is large enough to qualify as a valid Ethernet frame.
1868  *
1869  * Returns true if an error was encountered and skb was freed.
1870  **/
1871 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1872                                   union ixgbe_adv_rx_desc *rx_desc,
1873                                   struct sk_buff *skb)
1874 {
1875         struct net_device *netdev = rx_ring->netdev;
1876
1877         /* XDP packets use error pointer so abort at this point */
1878         if (IS_ERR(skb))
1879                 return true;
1880
1881         /* Verify netdev is present, and that packet does not have any
1882          * errors that would be unacceptable to the netdev.
1883          */
1884         if (!netdev ||
1885             (unlikely(ixgbe_test_staterr(rx_desc,
1886                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1887              !(netdev->features & NETIF_F_RXALL)))) {
1888                 dev_kfree_skb_any(skb);
1889                 return true;
1890         }
1891
1892         /* place header in linear portion of buffer */
1893         if (!skb_headlen(skb))
1894                 ixgbe_pull_tail(rx_ring, skb);
1895
1896 #ifdef IXGBE_FCOE
1897         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1898         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1899                 return false;
1900
1901 #endif
1902         /* if eth_skb_pad returns an error the skb was freed */
1903         if (eth_skb_pad(skb))
1904                 return true;
1905
1906         return false;
1907 }
1908
1909 /**
1910  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1911  * @rx_ring: rx descriptor ring to store buffers on
1912  * @old_buff: donor buffer to have page reused
1913  *
1914  * Synchronizes page for reuse by the adapter
1915  **/
1916 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1917                                 struct ixgbe_rx_buffer *old_buff)
1918 {
1919         struct ixgbe_rx_buffer *new_buff;
1920         u16 nta = rx_ring->next_to_alloc;
1921
1922         new_buff = &rx_ring->rx_buffer_info[nta];
1923
1924         /* update, and store next to alloc */
1925         nta++;
1926         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1927
1928         /* Transfer page from old buffer to new buffer.
1929          * Move each member individually to avoid possible store
1930          * forwarding stalls and unnecessary copy of skb.
1931          */
1932         new_buff->dma           = old_buff->dma;
1933         new_buff->page          = old_buff->page;
1934         new_buff->page_offset   = old_buff->page_offset;
1935         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1936 }
1937
1938 static inline bool ixgbe_page_is_reserved(struct page *page)
1939 {
1940         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1941 }
1942
1943 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1944 {
1945         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1946         struct page *page = rx_buffer->page;
1947
1948         /* avoid re-using remote pages */
1949         if (unlikely(ixgbe_page_is_reserved(page)))
1950                 return false;
1951
1952 #if (PAGE_SIZE < 8192)
1953         /* if we are only owner of page we can reuse it */
1954         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1955                 return false;
1956 #else
1957         /* The last offset is a bit aggressive in that we assume the
1958          * worst case of FCoE being enabled and using a 3K buffer.
1959          * However this should have minimal impact as the 1K extra is
1960          * still less than one buffer in size.
1961          */
1962 #define IXGBE_LAST_OFFSET \
1963         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1964         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1965                 return false;
1966 #endif
1967
1968         /* If we have drained the page fragment pool we need to update
1969          * the pagecnt_bias and page count so that we fully restock the
1970          * number of references the driver holds.
1971          */
1972         if (unlikely(pagecnt_bias == 1)) {
1973                 page_ref_add(page, USHRT_MAX - 1);
1974                 rx_buffer->pagecnt_bias = USHRT_MAX;
1975         }
1976
1977         return true;
1978 }
1979
1980 /**
1981  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1982  * @rx_ring: rx descriptor ring to transact packets on
1983  * @rx_buffer: buffer containing page to add
1984  * @skb: sk_buff to place the data into
1985  * @size: size of data in rx_buffer
1986  *
1987  * This function will add the data contained in rx_buffer->page to the skb.
1988  * This is done either through a direct copy if the data in the buffer is
1989  * less than the skb header size, otherwise it will just attach the page as
1990  * a frag to the skb.
1991  *
1992  * The function will then update the page offset if necessary and return
1993  * true if the buffer can be reused by the adapter.
1994  **/
1995 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1996                               struct ixgbe_rx_buffer *rx_buffer,
1997                               struct sk_buff *skb,
1998                               unsigned int size)
1999 {
2000 #if (PAGE_SIZE < 8192)
2001         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2002 #else
2003         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2004                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2005                                 SKB_DATA_ALIGN(size);
2006 #endif
2007         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2008                         rx_buffer->page_offset, size, truesize);
2009 #if (PAGE_SIZE < 8192)
2010         rx_buffer->page_offset ^= truesize;
2011 #else
2012         rx_buffer->page_offset += truesize;
2013 #endif
2014 }
2015
2016 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2017                                                    union ixgbe_adv_rx_desc *rx_desc,
2018                                                    struct sk_buff **skb,
2019                                                    const unsigned int size)
2020 {
2021         struct ixgbe_rx_buffer *rx_buffer;
2022
2023         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2024         prefetchw(rx_buffer->page);
2025         *skb = rx_buffer->skb;
2026
2027         /* Delay unmapping of the first packet. It carries the header
2028          * information, HW may still access the header after the writeback.
2029          * Only unmap it when EOP is reached
2030          */
2031         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2032                 if (!*skb)
2033                         goto skip_sync;
2034         } else {
2035                 if (*skb)
2036                         ixgbe_dma_sync_frag(rx_ring, *skb);
2037         }
2038
2039         /* we are reusing so sync this buffer for CPU use */
2040         dma_sync_single_range_for_cpu(rx_ring->dev,
2041                                       rx_buffer->dma,
2042                                       rx_buffer->page_offset,
2043                                       size,
2044                                       DMA_FROM_DEVICE);
2045 skip_sync:
2046         rx_buffer->pagecnt_bias--;
2047
2048         return rx_buffer;
2049 }
2050
2051 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2052                                 struct ixgbe_rx_buffer *rx_buffer,
2053                                 struct sk_buff *skb)
2054 {
2055         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2056                 /* hand second half of page back to the ring */
2057                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2058         } else {
2059                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2060                         /* the page has been released from the ring */
2061                         IXGBE_CB(skb)->page_released = true;
2062                 } else {
2063                         /* we are not reusing the buffer so unmap it */
2064                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2065                                              ixgbe_rx_pg_size(rx_ring),
2066                                              DMA_FROM_DEVICE,
2067                                              IXGBE_RX_DMA_ATTR);
2068                 }
2069                 __page_frag_cache_drain(rx_buffer->page,
2070                                         rx_buffer->pagecnt_bias);
2071         }
2072
2073         /* clear contents of rx_buffer */
2074         rx_buffer->page = NULL;
2075         rx_buffer->skb = NULL;
2076 }
2077
2078 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2079                                            struct ixgbe_rx_buffer *rx_buffer,
2080                                            struct xdp_buff *xdp,
2081                                            union ixgbe_adv_rx_desc *rx_desc)
2082 {
2083         unsigned int size = xdp->data_end - xdp->data;
2084 #if (PAGE_SIZE < 8192)
2085         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2086 #else
2087         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2088                                                xdp->data_hard_start);
2089 #endif
2090         struct sk_buff *skb;
2091
2092         /* prefetch first cache line of first page */
2093         prefetch(xdp->data);
2094 #if L1_CACHE_BYTES < 128
2095         prefetch(xdp->data + L1_CACHE_BYTES);
2096 #endif
2097         /* Note, we get here by enabling legacy-rx via:
2098          *
2099          *    ethtool --set-priv-flags <dev> legacy-rx on
2100          *
2101          * In this mode, we currently get 0 extra XDP headroom as
2102          * opposed to having legacy-rx off, where we process XDP
2103          * packets going to stack via ixgbe_build_skb(). The latter
2104          * provides us currently with 192 bytes of headroom.
2105          *
2106          * For ixgbe_construct_skb() mode it means that the
2107          * xdp->data_meta will always point to xdp->data, since
2108          * the helper cannot expand the head. Should this ever
2109          * change in future for legacy-rx mode on, then lets also
2110          * add xdp->data_meta handling here.
2111          */
2112
2113         /* allocate a skb to store the frags */
2114         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2115         if (unlikely(!skb))
2116                 return NULL;
2117
2118         if (size > IXGBE_RX_HDR_SIZE) {
2119                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2120                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2121
2122                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2123                                 xdp->data - page_address(rx_buffer->page),
2124                                 size, truesize);
2125 #if (PAGE_SIZE < 8192)
2126                 rx_buffer->page_offset ^= truesize;
2127 #else
2128                 rx_buffer->page_offset += truesize;
2129 #endif
2130         } else {
2131                 memcpy(__skb_put(skb, size),
2132                        xdp->data, ALIGN(size, sizeof(long)));
2133                 rx_buffer->pagecnt_bias++;
2134         }
2135
2136         return skb;
2137 }
2138
2139 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2140                                        struct ixgbe_rx_buffer *rx_buffer,
2141                                        struct xdp_buff *xdp,
2142                                        union ixgbe_adv_rx_desc *rx_desc)
2143 {
2144         unsigned int metasize = xdp->data - xdp->data_meta;
2145 #if (PAGE_SIZE < 8192)
2146         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2147 #else
2148         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2149                                 SKB_DATA_ALIGN(xdp->data_end -
2150                                                xdp->data_hard_start);
2151 #endif
2152         struct sk_buff *skb;
2153
2154         /* Prefetch first cache line of first page. If xdp->data_meta
2155          * is unused, this points extactly as xdp->data, otherwise we
2156          * likely have a consumer accessing first few bytes of meta
2157          * data, and then actual data.
2158          */
2159         prefetch(xdp->data_meta);
2160 #if L1_CACHE_BYTES < 128
2161         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2162 #endif
2163
2164         /* build an skb to around the page buffer */
2165         skb = build_skb(xdp->data_hard_start, truesize);
2166         if (unlikely(!skb))
2167                 return NULL;
2168
2169         /* update pointers within the skb to store the data */
2170         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2171         __skb_put(skb, xdp->data_end - xdp->data);
2172         if (metasize)
2173                 skb_metadata_set(skb, metasize);
2174
2175         /* record DMA address if this is the start of a chain of buffers */
2176         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2177                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2178
2179         /* update buffer offset */
2180 #if (PAGE_SIZE < 8192)
2181         rx_buffer->page_offset ^= truesize;
2182 #else
2183         rx_buffer->page_offset += truesize;
2184 #endif
2185
2186         return skb;
2187 }
2188
2189 #define IXGBE_XDP_PASS          0
2190 #define IXGBE_XDP_CONSUMED      BIT(0)
2191 #define IXGBE_XDP_TX            BIT(1)
2192 #define IXGBE_XDP_REDIR         BIT(2)
2193
2194 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2195                                struct xdp_frame *xdpf);
2196
2197 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2198                                      struct ixgbe_ring *rx_ring,
2199                                      struct xdp_buff *xdp)
2200 {
2201         int err, result = IXGBE_XDP_PASS;
2202         struct bpf_prog *xdp_prog;
2203         struct xdp_frame *xdpf;
2204         u32 act;
2205
2206         rcu_read_lock();
2207         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2208
2209         if (!xdp_prog)
2210                 goto xdp_out;
2211
2212         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2213
2214         act = bpf_prog_run_xdp(xdp_prog, xdp);
2215         switch (act) {
2216         case XDP_PASS:
2217                 break;
2218         case XDP_TX:
2219                 xdpf = convert_to_xdp_frame(xdp);
2220                 if (unlikely(!xdpf)) {
2221                         result = IXGBE_XDP_CONSUMED;
2222                         break;
2223                 }
2224                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2225                 break;
2226         case XDP_REDIRECT:
2227                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2228                 if (!err)
2229                         result = IXGBE_XDP_REDIR;
2230                 else
2231                         result = IXGBE_XDP_CONSUMED;
2232                 break;
2233         default:
2234                 bpf_warn_invalid_xdp_action(act);
2235                 /* fallthrough */
2236         case XDP_ABORTED:
2237                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2238                 /* fallthrough -- handle aborts by dropping packet */
2239         case XDP_DROP:
2240                 result = IXGBE_XDP_CONSUMED;
2241                 break;
2242         }
2243 xdp_out:
2244         rcu_read_unlock();
2245         return ERR_PTR(-result);
2246 }
2247
2248 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2249                                  struct ixgbe_rx_buffer *rx_buffer,
2250                                  unsigned int size)
2251 {
2252 #if (PAGE_SIZE < 8192)
2253         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2254
2255         rx_buffer->page_offset ^= truesize;
2256 #else
2257         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2258                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2259                                 SKB_DATA_ALIGN(size);
2260
2261         rx_buffer->page_offset += truesize;
2262 #endif
2263 }
2264
2265 /**
2266  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2267  * @q_vector: structure containing interrupt and ring information
2268  * @rx_ring: rx descriptor ring to transact packets on
2269  * @budget: Total limit on number of packets to process
2270  *
2271  * This function provides a "bounce buffer" approach to Rx interrupt
2272  * processing.  The advantage to this is that on systems that have
2273  * expensive overhead for IOMMU access this provides a means of avoiding
2274  * it by maintaining the mapping of the page to the syste.
2275  *
2276  * Returns amount of work completed
2277  **/
2278 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2279                                struct ixgbe_ring *rx_ring,
2280                                const int budget)
2281 {
2282         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2283         struct ixgbe_adapter *adapter = q_vector->adapter;
2284 #ifdef IXGBE_FCOE
2285         int ddp_bytes;
2286         unsigned int mss = 0;
2287 #endif /* IXGBE_FCOE */
2288         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2289         unsigned int xdp_xmit = 0;
2290         struct xdp_buff xdp;
2291
2292         xdp.rxq = &rx_ring->xdp_rxq;
2293
2294         while (likely(total_rx_packets < budget)) {
2295                 union ixgbe_adv_rx_desc *rx_desc;
2296                 struct ixgbe_rx_buffer *rx_buffer;
2297                 struct sk_buff *skb;
2298                 unsigned int size;
2299
2300                 /* return some buffers to hardware, one at a time is too slow */
2301                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2302                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2303                         cleaned_count = 0;
2304                 }
2305
2306                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2307                 size = le16_to_cpu(rx_desc->wb.upper.length);
2308                 if (!size)
2309                         break;
2310
2311                 /* This memory barrier is needed to keep us from reading
2312                  * any other fields out of the rx_desc until we know the
2313                  * descriptor has been written back
2314                  */
2315                 dma_rmb();
2316
2317                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2318
2319                 /* retrieve a buffer from the ring */
2320                 if (!skb) {
2321                         xdp.data = page_address(rx_buffer->page) +
2322                                    rx_buffer->page_offset;
2323                         xdp.data_meta = xdp.data;
2324                         xdp.data_hard_start = xdp.data -
2325                                               ixgbe_rx_offset(rx_ring);
2326                         xdp.data_end = xdp.data + size;
2327
2328                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2329                 }
2330
2331                 if (IS_ERR(skb)) {
2332                         unsigned int xdp_res = -PTR_ERR(skb);
2333
2334                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2335                                 xdp_xmit |= xdp_res;
2336                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2337                         } else {
2338                                 rx_buffer->pagecnt_bias++;
2339                         }
2340                         total_rx_packets++;
2341                         total_rx_bytes += size;
2342                 } else if (skb) {
2343                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2344                 } else if (ring_uses_build_skb(rx_ring)) {
2345                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2346                                               &xdp, rx_desc);
2347                 } else {
2348                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2349                                                   &xdp, rx_desc);
2350                 }
2351
2352                 /* exit if we failed to retrieve a buffer */
2353                 if (!skb) {
2354                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2355                         rx_buffer->pagecnt_bias++;
2356                         break;
2357                 }
2358
2359                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2360                 cleaned_count++;
2361
2362                 /* place incomplete frames back on ring for completion */
2363                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2364                         continue;
2365
2366                 /* verify the packet layout is correct */
2367                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2368                         continue;
2369
2370                 /* probably a little skewed due to removing CRC */
2371                 total_rx_bytes += skb->len;
2372
2373                 /* populate checksum, timestamp, VLAN, and protocol */
2374                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2375
2376 #ifdef IXGBE_FCOE
2377                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2378                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2379                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2380                         /* include DDPed FCoE data */
2381                         if (ddp_bytes > 0) {
2382                                 if (!mss) {
2383                                         mss = rx_ring->netdev->mtu -
2384                                                 sizeof(struct fcoe_hdr) -
2385                                                 sizeof(struct fc_frame_header) -
2386                                                 sizeof(struct fcoe_crc_eof);
2387                                         if (mss > 512)
2388                                                 mss &= ~511;
2389                                 }
2390                                 total_rx_bytes += ddp_bytes;
2391                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2392                                                                  mss);
2393                         }
2394                         if (!ddp_bytes) {
2395                                 dev_kfree_skb_any(skb);
2396                                 continue;
2397                         }
2398                 }
2399
2400 #endif /* IXGBE_FCOE */
2401                 ixgbe_rx_skb(q_vector, skb);
2402
2403                 /* update budget accounting */
2404                 total_rx_packets++;
2405         }
2406
2407         if (xdp_xmit & IXGBE_XDP_REDIR)
2408                 xdp_do_flush_map();
2409
2410         if (xdp_xmit & IXGBE_XDP_TX) {
2411                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2412
2413                 /* Force memory writes to complete before letting h/w
2414                  * know there are new descriptors to fetch.
2415                  */
2416                 wmb();
2417                 writel(ring->next_to_use, ring->tail);
2418         }
2419
2420         u64_stats_update_begin(&rx_ring->syncp);
2421         rx_ring->stats.packets += total_rx_packets;
2422         rx_ring->stats.bytes += total_rx_bytes;
2423         u64_stats_update_end(&rx_ring->syncp);
2424         q_vector->rx.total_packets += total_rx_packets;
2425         q_vector->rx.total_bytes += total_rx_bytes;
2426
2427         return total_rx_packets;
2428 }
2429
2430 /**
2431  * ixgbe_configure_msix - Configure MSI-X hardware
2432  * @adapter: board private structure
2433  *
2434  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2435  * interrupts.
2436  **/
2437 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2438 {
2439         struct ixgbe_q_vector *q_vector;
2440         int v_idx;
2441         u32 mask;
2442
2443         /* Populate MSIX to EITR Select */
2444         if (adapter->num_vfs > 32) {
2445                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2446                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2447         }
2448
2449         /*
2450          * Populate the IVAR table and set the ITR values to the
2451          * corresponding register.
2452          */
2453         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2454                 struct ixgbe_ring *ring;
2455                 q_vector = adapter->q_vector[v_idx];
2456
2457                 ixgbe_for_each_ring(ring, q_vector->rx)
2458                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2459
2460                 ixgbe_for_each_ring(ring, q_vector->tx)
2461                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2462
2463                 ixgbe_write_eitr(q_vector);
2464         }
2465
2466         switch (adapter->hw.mac.type) {
2467         case ixgbe_mac_82598EB:
2468                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2469                                v_idx);
2470                 break;
2471         case ixgbe_mac_82599EB:
2472         case ixgbe_mac_X540:
2473         case ixgbe_mac_X550:
2474         case ixgbe_mac_X550EM_x:
2475         case ixgbe_mac_x550em_a:
2476                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2477                 break;
2478         default:
2479                 break;
2480         }
2481         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2482
2483         /* set up to autoclear timer, and the vectors */
2484         mask = IXGBE_EIMS_ENABLE_MASK;
2485         mask &= ~(IXGBE_EIMS_OTHER |
2486                   IXGBE_EIMS_MAILBOX |
2487                   IXGBE_EIMS_LSC);
2488
2489         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2490 }
2491
2492 /**
2493  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2494  * @q_vector: structure containing interrupt and ring information
2495  * @ring_container: structure containing ring performance data
2496  *
2497  *      Stores a new ITR value based on packets and byte
2498  *      counts during the last interrupt.  The advantage of per interrupt
2499  *      computation is faster updates and more accurate ITR for the current
2500  *      traffic pattern.  Constants in this function were computed
2501  *      based on theoretical maximum wire speed and thresholds were set based
2502  *      on testing data as well as attempting to minimize response time
2503  *      while increasing bulk throughput.
2504  **/
2505 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2506                              struct ixgbe_ring_container *ring_container)
2507 {
2508         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2509                            IXGBE_ITR_ADAPTIVE_LATENCY;
2510         unsigned int avg_wire_size, packets, bytes;
2511         unsigned long next_update = jiffies;
2512
2513         /* If we don't have any rings just leave ourselves set for maximum
2514          * possible latency so we take ourselves out of the equation.
2515          */
2516         if (!ring_container->ring)
2517                 return;
2518
2519         /* If we didn't update within up to 1 - 2 jiffies we can assume
2520          * that either packets are coming in so slow there hasn't been
2521          * any work, or that there is so much work that NAPI is dealing
2522          * with interrupt moderation and we don't need to do anything.
2523          */
2524         if (time_after(next_update, ring_container->next_update))
2525                 goto clear_counts;
2526
2527         packets = ring_container->total_packets;
2528
2529         /* We have no packets to actually measure against. This means
2530          * either one of the other queues on this vector is active or
2531          * we are a Tx queue doing TSO with too high of an interrupt rate.
2532          *
2533          * When this occurs just tick up our delay by the minimum value
2534          * and hope that this extra delay will prevent us from being called
2535          * without any work on our queue.
2536          */
2537         if (!packets) {
2538                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2539                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2540                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2541                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2542                 goto clear_counts;
2543         }
2544
2545         bytes = ring_container->total_bytes;
2546
2547         /* If packets are less than 4 or bytes are less than 9000 assume
2548          * insufficient data to use bulk rate limiting approach. We are
2549          * likely latency driven.
2550          */
2551         if (packets < 4 && bytes < 9000) {
2552                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2553                 goto adjust_by_size;
2554         }
2555
2556         /* Between 4 and 48 we can assume that our current interrupt delay
2557          * is only slightly too low. As such we should increase it by a small
2558          * fixed amount.
2559          */
2560         if (packets < 48) {
2561                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2562                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2563                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2564                 goto clear_counts;
2565         }
2566
2567         /* Between 48 and 96 is our "goldilocks" zone where we are working
2568          * out "just right". Just report that our current ITR is good for us.
2569          */
2570         if (packets < 96) {
2571                 itr = q_vector->itr >> 2;
2572                 goto clear_counts;
2573         }
2574
2575         /* If packet count is 96 or greater we are likely looking at a slight
2576          * overrun of the delay we want. Try halving our delay to see if that
2577          * will cut the number of packets in half per interrupt.
2578          */
2579         if (packets < 256) {
2580                 itr = q_vector->itr >> 3;
2581                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2582                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2583                 goto clear_counts;
2584         }
2585
2586         /* The paths below assume we are dealing with a bulk ITR since number
2587          * of packets is 256 or greater. We are just going to have to compute
2588          * a value and try to bring the count under control, though for smaller
2589          * packet sizes there isn't much we can do as NAPI polling will likely
2590          * be kicking in sooner rather than later.
2591          */
2592         itr = IXGBE_ITR_ADAPTIVE_BULK;
2593
2594 adjust_by_size:
2595         /* If packet counts are 256 or greater we can assume we have a gross
2596          * overestimation of what the rate should be. Instead of trying to fine
2597          * tune it just use the formula below to try and dial in an exact value
2598          * give the current packet size of the frame.
2599          */
2600         avg_wire_size = bytes / packets;
2601
2602         /* The following is a crude approximation of:
2603          *  wmem_default / (size + overhead) = desired_pkts_per_int
2604          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2605          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2606          *
2607          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2608          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2609          * formula down to
2610          *
2611          *  (170 * (size + 24)) / (size + 640) = ITR
2612          *
2613          * We first do some math on the packet size and then finally bitshift
2614          * by 8 after rounding up. We also have to account for PCIe link speed
2615          * difference as ITR scales based on this.
2616          */
2617         if (avg_wire_size <= 60) {
2618                 /* Start at 50k ints/sec */
2619                 avg_wire_size = 5120;
2620         } else if (avg_wire_size <= 316) {
2621                 /* 50K ints/sec to 16K ints/sec */
2622                 avg_wire_size *= 40;
2623                 avg_wire_size += 2720;
2624         } else if (avg_wire_size <= 1084) {
2625                 /* 16K ints/sec to 9.2K ints/sec */
2626                 avg_wire_size *= 15;
2627                 avg_wire_size += 11452;
2628         } else if (avg_wire_size <= 1980) {
2629                 /* 9.2K ints/sec to 8K ints/sec */
2630                 avg_wire_size *= 5;
2631                 avg_wire_size += 22420;
2632         } else {
2633                 /* plateau at a limit of 8K ints/sec */
2634                 avg_wire_size = 32256;
2635         }
2636
2637         /* If we are in low latency mode half our delay which doubles the rate
2638          * to somewhere between 100K to 16K ints/sec
2639          */
2640         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2641                 avg_wire_size >>= 1;
2642
2643         /* Resultant value is 256 times larger than it needs to be. This
2644          * gives us room to adjust the value as needed to either increase
2645          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2646          *
2647          * Use addition as we have already recorded the new latency flag
2648          * for the ITR value.
2649          */
2650         switch (q_vector->adapter->link_speed) {
2651         case IXGBE_LINK_SPEED_10GB_FULL:
2652         case IXGBE_LINK_SPEED_100_FULL:
2653         default:
2654                 itr += DIV_ROUND_UP(avg_wire_size,
2655                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2656                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2657                 break;
2658         case IXGBE_LINK_SPEED_2_5GB_FULL:
2659         case IXGBE_LINK_SPEED_1GB_FULL:
2660         case IXGBE_LINK_SPEED_10_FULL:
2661                 itr += DIV_ROUND_UP(avg_wire_size,
2662                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2663                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2664                 break;
2665         }
2666
2667 clear_counts:
2668         /* write back value */
2669         ring_container->itr = itr;
2670
2671         /* next update should occur within next jiffy */
2672         ring_container->next_update = next_update + 1;
2673
2674         ring_container->total_bytes = 0;
2675         ring_container->total_packets = 0;
2676 }
2677
2678 /**
2679  * ixgbe_write_eitr - write EITR register in hardware specific way
2680  * @q_vector: structure containing interrupt and ring information
2681  *
2682  * This function is made to be called by ethtool and by the driver
2683  * when it needs to update EITR registers at runtime.  Hardware
2684  * specific quirks/differences are taken care of here.
2685  */
2686 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2687 {
2688         struct ixgbe_adapter *adapter = q_vector->adapter;
2689         struct ixgbe_hw *hw = &adapter->hw;
2690         int v_idx = q_vector->v_idx;
2691         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2692
2693         switch (adapter->hw.mac.type) {
2694         case ixgbe_mac_82598EB:
2695                 /* must write high and low 16 bits to reset counter */
2696                 itr_reg |= (itr_reg << 16);
2697                 break;
2698         case ixgbe_mac_82599EB:
2699         case ixgbe_mac_X540:
2700         case ixgbe_mac_X550:
2701         case ixgbe_mac_X550EM_x:
2702         case ixgbe_mac_x550em_a:
2703                 /*
2704                  * set the WDIS bit to not clear the timer bits and cause an
2705                  * immediate assertion of the interrupt
2706                  */
2707                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2708                 break;
2709         default:
2710                 break;
2711         }
2712         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2713 }
2714
2715 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2716 {
2717         u32 new_itr;
2718
2719         ixgbe_update_itr(q_vector, &q_vector->tx);
2720         ixgbe_update_itr(q_vector, &q_vector->rx);
2721
2722         /* use the smallest value of new ITR delay calculations */
2723         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2724
2725         /* Clear latency flag if set, shift into correct position */
2726         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2727         new_itr <<= 2;
2728
2729         if (new_itr != q_vector->itr) {
2730                 /* save the algorithm value here */
2731                 q_vector->itr = new_itr;
2732
2733                 ixgbe_write_eitr(q_vector);
2734         }
2735 }
2736
2737 /**
2738  * ixgbe_check_overtemp_subtask - check for over temperature
2739  * @adapter: pointer to adapter
2740  **/
2741 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2742 {
2743         struct ixgbe_hw *hw = &adapter->hw;
2744         u32 eicr = adapter->interrupt_event;
2745         s32 rc;
2746
2747         if (test_bit(__IXGBE_DOWN, &adapter->state))
2748                 return;
2749
2750         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2751                 return;
2752
2753         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2754
2755         switch (hw->device_id) {
2756         case IXGBE_DEV_ID_82599_T3_LOM:
2757                 /*
2758                  * Since the warning interrupt is for both ports
2759                  * we don't have to check if:
2760                  *  - This interrupt wasn't for our port.
2761                  *  - We may have missed the interrupt so always have to
2762                  *    check if we  got a LSC
2763                  */
2764                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2765                     !(eicr & IXGBE_EICR_LSC))
2766                         return;
2767
2768                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2769                         u32 speed;
2770                         bool link_up = false;
2771
2772                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2773
2774                         if (link_up)
2775                                 return;
2776                 }
2777
2778                 /* Check if this is not due to overtemp */
2779                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2780                         return;
2781
2782                 break;
2783         case IXGBE_DEV_ID_X550EM_A_1G_T:
2784         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2785                 rc = hw->phy.ops.check_overtemp(hw);
2786                 if (rc != IXGBE_ERR_OVERTEMP)
2787                         return;
2788                 break;
2789         default:
2790                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2791                         return;
2792                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2793                         return;
2794                 break;
2795         }
2796         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2797
2798         adapter->interrupt_event = 0;
2799 }
2800
2801 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2802 {
2803         struct ixgbe_hw *hw = &adapter->hw;
2804
2805         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2806             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2807                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2808                 /* write to clear the interrupt */
2809                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2810         }
2811 }
2812
2813 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2814 {
2815         struct ixgbe_hw *hw = &adapter->hw;
2816
2817         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2818                 return;
2819
2820         switch (adapter->hw.mac.type) {
2821         case ixgbe_mac_82599EB:
2822                 /*
2823                  * Need to check link state so complete overtemp check
2824                  * on service task
2825                  */
2826                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2827                      (eicr & IXGBE_EICR_LSC)) &&
2828                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2829                         adapter->interrupt_event = eicr;
2830                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2831                         ixgbe_service_event_schedule(adapter);
2832                         return;
2833                 }
2834                 return;
2835         case ixgbe_mac_x550em_a:
2836                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2837                         adapter->interrupt_event = eicr;
2838                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2839                         ixgbe_service_event_schedule(adapter);
2840                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2841                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2842                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2843                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2844                 }
2845                 return;
2846         case ixgbe_mac_X550:
2847         case ixgbe_mac_X540:
2848                 if (!(eicr & IXGBE_EICR_TS))
2849                         return;
2850                 break;
2851         default:
2852                 return;
2853         }
2854
2855         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2856 }
2857
2858 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2859 {
2860         switch (hw->mac.type) {
2861         case ixgbe_mac_82598EB:
2862                 if (hw->phy.type == ixgbe_phy_nl)
2863                         return true;
2864                 return false;
2865         case ixgbe_mac_82599EB:
2866         case ixgbe_mac_X550EM_x:
2867         case ixgbe_mac_x550em_a:
2868                 switch (hw->mac.ops.get_media_type(hw)) {
2869                 case ixgbe_media_type_fiber:
2870                 case ixgbe_media_type_fiber_qsfp:
2871                         return true;
2872                 default:
2873                         return false;
2874                 }
2875         default:
2876                 return false;
2877         }
2878 }
2879
2880 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2881 {
2882         struct ixgbe_hw *hw = &adapter->hw;
2883         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2884
2885         if (!ixgbe_is_sfp(hw))
2886                 return;
2887
2888         /* Later MAC's use different SDP */
2889         if (hw->mac.type >= ixgbe_mac_X540)
2890                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2891
2892         if (eicr & eicr_mask) {
2893                 /* Clear the interrupt */
2894                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2895                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2896                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2897                         adapter->sfp_poll_time = 0;
2898                         ixgbe_service_event_schedule(adapter);
2899                 }
2900         }
2901
2902         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2903             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2904                 /* Clear the interrupt */
2905                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2906                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2907                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2908                         ixgbe_service_event_schedule(adapter);
2909                 }
2910         }
2911 }
2912
2913 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2914 {
2915         struct ixgbe_hw *hw = &adapter->hw;
2916
2917         adapter->lsc_int++;
2918         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2919         adapter->link_check_timeout = jiffies;
2920         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2921                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2922                 IXGBE_WRITE_FLUSH(hw);
2923                 ixgbe_service_event_schedule(adapter);
2924         }
2925 }
2926
2927 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2928                                            u64 qmask)
2929 {
2930         u32 mask;
2931         struct ixgbe_hw *hw = &adapter->hw;
2932
2933         switch (hw->mac.type) {
2934         case ixgbe_mac_82598EB:
2935                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2936                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2937                 break;
2938         case ixgbe_mac_82599EB:
2939         case ixgbe_mac_X540:
2940         case ixgbe_mac_X550:
2941         case ixgbe_mac_X550EM_x:
2942         case ixgbe_mac_x550em_a:
2943                 mask = (qmask & 0xFFFFFFFF);
2944                 if (mask)
2945                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2946                 mask = (qmask >> 32);
2947                 if (mask)
2948                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2949                 break;
2950         default:
2951                 break;
2952         }
2953         /* skip the flush */
2954 }
2955
2956 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2957                                             u64 qmask)
2958 {
2959         u32 mask;
2960         struct ixgbe_hw *hw = &adapter->hw;
2961
2962         switch (hw->mac.type) {
2963         case ixgbe_mac_82598EB:
2964                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2965                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2966                 break;
2967         case ixgbe_mac_82599EB:
2968         case ixgbe_mac_X540:
2969         case ixgbe_mac_X550:
2970         case ixgbe_mac_X550EM_x:
2971         case ixgbe_mac_x550em_a:
2972                 mask = (qmask & 0xFFFFFFFF);
2973                 if (mask)
2974                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2975                 mask = (qmask >> 32);
2976                 if (mask)
2977                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2978                 break;
2979         default:
2980                 break;
2981         }
2982         /* skip the flush */
2983 }
2984
2985 /**
2986  * ixgbe_irq_enable - Enable default interrupt generation settings
2987  * @adapter: board private structure
2988  * @queues: enable irqs for queues
2989  * @flush: flush register write
2990  **/
2991 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2992                                     bool flush)
2993 {
2994         struct ixgbe_hw *hw = &adapter->hw;
2995         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2996
2997         /* don't reenable LSC while waiting for link */
2998         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2999                 mask &= ~IXGBE_EIMS_LSC;
3000
3001         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3002                 switch (adapter->hw.mac.type) {
3003                 case ixgbe_mac_82599EB:
3004                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3005                         break;
3006                 case ixgbe_mac_X540:
3007                 case ixgbe_mac_X550:
3008                 case ixgbe_mac_X550EM_x:
3009                 case ixgbe_mac_x550em_a:
3010                         mask |= IXGBE_EIMS_TS;
3011                         break;
3012                 default:
3013                         break;
3014                 }
3015         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3016                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3017         switch (adapter->hw.mac.type) {
3018         case ixgbe_mac_82599EB:
3019                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3020                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3021                 /* fall through */
3022         case ixgbe_mac_X540:
3023         case ixgbe_mac_X550:
3024         case ixgbe_mac_X550EM_x:
3025         case ixgbe_mac_x550em_a:
3026                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3027                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3028                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3029                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3030                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3031                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3032                 mask |= IXGBE_EIMS_ECC;
3033                 mask |= IXGBE_EIMS_MAILBOX;
3034                 break;
3035         default:
3036                 break;
3037         }
3038
3039         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3040             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3041                 mask |= IXGBE_EIMS_FLOW_DIR;
3042
3043         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3044         if (queues)
3045                 ixgbe_irq_enable_queues(adapter, ~0);
3046         if (flush)
3047                 IXGBE_WRITE_FLUSH(&adapter->hw);
3048 }
3049
3050 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3051 {
3052         struct ixgbe_adapter *adapter = data;
3053         struct ixgbe_hw *hw = &adapter->hw;
3054         u32 eicr;
3055
3056         /*
3057          * Workaround for Silicon errata.  Use clear-by-write instead
3058          * of clear-by-read.  Reading with EICS will return the
3059          * interrupt causes without clearing, which later be done
3060          * with the write to EICR.
3061          */
3062         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3063
3064         /* The lower 16bits of the EICR register are for the queue interrupts
3065          * which should be masked here in order to not accidentally clear them if
3066          * the bits are high when ixgbe_msix_other is called. There is a race
3067          * condition otherwise which results in possible performance loss
3068          * especially if the ixgbe_msix_other interrupt is triggering
3069          * consistently (as it would when PPS is turned on for the X540 device)
3070          */
3071         eicr &= 0xFFFF0000;
3072
3073         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3074
3075         if (eicr & IXGBE_EICR_LSC)
3076                 ixgbe_check_lsc(adapter);
3077
3078         if (eicr & IXGBE_EICR_MAILBOX)
3079                 ixgbe_msg_task(adapter);
3080
3081         switch (hw->mac.type) {
3082         case ixgbe_mac_82599EB:
3083         case ixgbe_mac_X540:
3084         case ixgbe_mac_X550:
3085         case ixgbe_mac_X550EM_x:
3086         case ixgbe_mac_x550em_a:
3087                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3088                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3089                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3090                         ixgbe_service_event_schedule(adapter);
3091                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3092                                         IXGBE_EICR_GPI_SDP0_X540);
3093                 }
3094                 if (eicr & IXGBE_EICR_ECC) {
3095                         e_info(link, "Received ECC Err, initiating reset\n");
3096                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3097                         ixgbe_service_event_schedule(adapter);
3098                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3099                 }
3100                 /* Handle Flow Director Full threshold interrupt */
3101                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3102                         int reinit_count = 0;
3103                         int i;
3104                         for (i = 0; i < adapter->num_tx_queues; i++) {
3105                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3106                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3107                                                        &ring->state))
3108                                         reinit_count++;
3109                         }
3110                         if (reinit_count) {
3111                                 /* no more flow director interrupts until after init */
3112                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3113                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3114                                 ixgbe_service_event_schedule(adapter);
3115                         }
3116                 }
3117                 ixgbe_check_sfp_event(adapter, eicr);
3118                 ixgbe_check_overtemp_event(adapter, eicr);
3119                 break;
3120         default:
3121                 break;
3122         }
3123
3124         ixgbe_check_fan_failure(adapter, eicr);
3125
3126         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3127                 ixgbe_ptp_check_pps_event(adapter);
3128
3129         /* re-enable the original interrupt state, no lsc, no queues */
3130         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3131                 ixgbe_irq_enable(adapter, false, false);
3132
3133         return IRQ_HANDLED;
3134 }
3135
3136 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3137 {
3138         struct ixgbe_q_vector *q_vector = data;
3139
3140         /* EIAM disabled interrupts (on this vector) for us */
3141
3142         if (q_vector->rx.ring || q_vector->tx.ring)
3143                 napi_schedule_irqoff(&q_vector->napi);
3144
3145         return IRQ_HANDLED;
3146 }
3147
3148 /**
3149  * ixgbe_poll - NAPI Rx polling callback
3150  * @napi: structure for representing this polling device
3151  * @budget: how many packets driver is allowed to clean
3152  *
3153  * This function is used for legacy and MSI, NAPI mode
3154  **/
3155 int ixgbe_poll(struct napi_struct *napi, int budget)
3156 {
3157         struct ixgbe_q_vector *q_vector =
3158                                 container_of(napi, struct ixgbe_q_vector, napi);
3159         struct ixgbe_adapter *adapter = q_vector->adapter;
3160         struct ixgbe_ring *ring;
3161         int per_ring_budget, work_done = 0;
3162         bool clean_complete = true;
3163
3164 #ifdef CONFIG_IXGBE_DCA
3165         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3166                 ixgbe_update_dca(q_vector);
3167 #endif
3168
3169         ixgbe_for_each_ring(ring, q_vector->tx) {
3170                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3171                         clean_complete = false;
3172         }
3173
3174         /* Exit if we are called by netpoll */
3175         if (budget <= 0)
3176                 return budget;
3177
3178         /* attempt to distribute budget to each queue fairly, but don't allow
3179          * the budget to go below 1 because we'll exit polling */
3180         if (q_vector->rx.count > 1)
3181                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3182         else
3183                 per_ring_budget = budget;
3184
3185         ixgbe_for_each_ring(ring, q_vector->rx) {
3186                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3187                                                  per_ring_budget);
3188
3189                 work_done += cleaned;
3190                 if (cleaned >= per_ring_budget)
3191                         clean_complete = false;
3192         }
3193
3194         /* If all work not completed, return budget and keep polling */
3195         if (!clean_complete)
3196                 return budget;
3197
3198         /* all work done, exit the polling mode */
3199         napi_complete_done(napi, work_done);
3200         if (adapter->rx_itr_setting & 1)
3201                 ixgbe_set_itr(q_vector);
3202         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3203                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3204
3205         return min(work_done, budget - 1);
3206 }
3207
3208 /**
3209  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3210  * @adapter: board private structure
3211  *
3212  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3213  * interrupts from the kernel.
3214  **/
3215 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3216 {
3217         struct net_device *netdev = adapter->netdev;
3218         unsigned int ri = 0, ti = 0;
3219         int vector, err;
3220
3221         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3222                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3223                 struct msix_entry *entry = &adapter->msix_entries[vector];
3224
3225                 if (q_vector->tx.ring && q_vector->rx.ring) {
3226                         snprintf(q_vector->name, sizeof(q_vector->name),
3227                                  "%s-TxRx-%u", netdev->name, ri++);
3228                         ti++;
3229                 } else if (q_vector->rx.ring) {
3230                         snprintf(q_vector->name, sizeof(q_vector->name),
3231                                  "%s-rx-%u", netdev->name, ri++);
3232                 } else if (q_vector->tx.ring) {
3233                         snprintf(q_vector->name, sizeof(q_vector->name),
3234                                  "%s-tx-%u", netdev->name, ti++);
3235                 } else {
3236                         /* skip this unused q_vector */
3237                         continue;
3238                 }
3239                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3240                                   q_vector->name, q_vector);
3241                 if (err) {
3242                         e_err(probe, "request_irq failed for MSIX interrupt "
3243                               "Error: %d\n", err);
3244                         goto free_queue_irqs;
3245                 }
3246                 /* If Flow Director is enabled, set interrupt affinity */
3247                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3248                         /* assign the mask for this irq */
3249                         irq_set_affinity_hint(entry->vector,
3250                                               &q_vector->affinity_mask);
3251                 }
3252         }
3253
3254         err = request_irq(adapter->msix_entries[vector].vector,
3255                           ixgbe_msix_other, 0, netdev->name, adapter);
3256         if (err) {
3257                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3258                 goto free_queue_irqs;
3259         }
3260
3261         return 0;
3262
3263 free_queue_irqs:
3264         while (vector) {
3265                 vector--;
3266                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3267                                       NULL);
3268                 free_irq(adapter->msix_entries[vector].vector,
3269                          adapter->q_vector[vector]);
3270         }
3271         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3272         pci_disable_msix(adapter->pdev);
3273         kfree(adapter->msix_entries);
3274         adapter->msix_entries = NULL;
3275         return err;
3276 }
3277
3278 /**
3279  * ixgbe_intr - legacy mode Interrupt Handler
3280  * @irq: interrupt number
3281  * @data: pointer to a network interface device structure
3282  **/
3283 static irqreturn_t ixgbe_intr(int irq, void *data)
3284 {
3285         struct ixgbe_adapter *adapter = data;
3286         struct ixgbe_hw *hw = &adapter->hw;
3287         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3288         u32 eicr;
3289
3290         /*
3291          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3292          * before the read of EICR.
3293          */
3294         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3295
3296         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3297          * therefore no explicit interrupt disable is necessary */
3298         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3299         if (!eicr) {
3300                 /*
3301                  * shared interrupt alert!
3302                  * make sure interrupts are enabled because the read will
3303                  * have disabled interrupts due to EIAM
3304                  * finish the workaround of silicon errata on 82598.  Unmask
3305                  * the interrupt that we masked before the EICR read.
3306                  */
3307                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3308                         ixgbe_irq_enable(adapter, true, true);
3309                 return IRQ_NONE;        /* Not our interrupt */
3310         }
3311
3312         if (eicr & IXGBE_EICR_LSC)
3313                 ixgbe_check_lsc(adapter);
3314
3315         switch (hw->mac.type) {
3316         case ixgbe_mac_82599EB:
3317                 ixgbe_check_sfp_event(adapter, eicr);
3318                 /* Fall through */
3319         case ixgbe_mac_X540:
3320         case ixgbe_mac_X550:
3321         case ixgbe_mac_X550EM_x:
3322         case ixgbe_mac_x550em_a:
3323                 if (eicr & IXGBE_EICR_ECC) {
3324                         e_info(link, "Received ECC Err, initiating reset\n");
3325                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3326                         ixgbe_service_event_schedule(adapter);
3327                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3328                 }
3329                 ixgbe_check_overtemp_event(adapter, eicr);
3330                 break;
3331         default:
3332                 break;
3333         }
3334
3335         ixgbe_check_fan_failure(adapter, eicr);
3336         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3337                 ixgbe_ptp_check_pps_event(adapter);
3338
3339         /* would disable interrupts here but EIAM disabled it */
3340         napi_schedule_irqoff(&q_vector->napi);
3341
3342         /*
3343          * re-enable link(maybe) and non-queue interrupts, no flush.
3344          * ixgbe_poll will re-enable the queue interrupts
3345          */
3346         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3347                 ixgbe_irq_enable(adapter, false, false);
3348
3349         return IRQ_HANDLED;
3350 }
3351
3352 /**
3353  * ixgbe_request_irq - initialize interrupts
3354  * @adapter: board private structure
3355  *
3356  * Attempts to configure interrupts using the best available
3357  * capabilities of the hardware and kernel.
3358  **/
3359 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3360 {
3361         struct net_device *netdev = adapter->netdev;
3362         int err;
3363
3364         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3365                 err = ixgbe_request_msix_irqs(adapter);
3366         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3367                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3368                                   netdev->name, adapter);
3369         else
3370                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3371                                   netdev->name, adapter);
3372
3373         if (err)
3374                 e_err(probe, "request_irq failed, Error %d\n", err);
3375
3376         return err;
3377 }
3378
3379 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3380 {
3381         int vector;
3382
3383         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3384                 free_irq(adapter->pdev->irq, adapter);
3385                 return;
3386         }
3387
3388         if (!adapter->msix_entries)
3389                 return;
3390
3391         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3392                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3393                 struct msix_entry *entry = &adapter->msix_entries[vector];
3394
3395                 /* free only the irqs that were actually requested */
3396                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3397                         continue;
3398
3399                 /* clear the affinity_mask in the IRQ descriptor */
3400                 irq_set_affinity_hint(entry->vector, NULL);
3401
3402                 free_irq(entry->vector, q_vector);
3403         }
3404
3405         free_irq(adapter->msix_entries[vector].vector, adapter);
3406 }
3407
3408 /**
3409  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3410  * @adapter: board private structure
3411  **/
3412 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3413 {
3414         switch (adapter->hw.mac.type) {
3415         case ixgbe_mac_82598EB:
3416                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3417                 break;
3418         case ixgbe_mac_82599EB:
3419         case ixgbe_mac_X540:
3420         case ixgbe_mac_X550:
3421         case ixgbe_mac_X550EM_x:
3422         case ixgbe_mac_x550em_a:
3423                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3424                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3425                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3426                 break;
3427         default:
3428                 break;
3429         }
3430         IXGBE_WRITE_FLUSH(&adapter->hw);
3431         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3432                 int vector;
3433
3434                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3435                         synchronize_irq(adapter->msix_entries[vector].vector);
3436
3437                 synchronize_irq(adapter->msix_entries[vector++].vector);
3438         } else {
3439                 synchronize_irq(adapter->pdev->irq);
3440         }
3441 }
3442
3443 /**
3444  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3445  * @adapter: board private structure
3446  *
3447  **/
3448 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3449 {
3450         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3451
3452         ixgbe_write_eitr(q_vector);
3453
3454         ixgbe_set_ivar(adapter, 0, 0, 0);
3455         ixgbe_set_ivar(adapter, 1, 0, 0);
3456
3457         e_info(hw, "Legacy interrupt IVAR setup done\n");
3458 }
3459
3460 /**
3461  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3462  * @adapter: board private structure
3463  * @ring: structure containing ring specific data
3464  *
3465  * Configure the Tx descriptor ring after a reset.
3466  **/
3467 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3468                              struct ixgbe_ring *ring)
3469 {
3470         struct ixgbe_hw *hw = &adapter->hw;
3471         u64 tdba = ring->dma;
3472         int wait_loop = 10;
3473         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3474         u8 reg_idx = ring->reg_idx;
3475
3476         /* disable queue to avoid issues while updating state */
3477         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3478         IXGBE_WRITE_FLUSH(hw);
3479
3480         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3481                         (tdba & DMA_BIT_MASK(32)));
3482         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3483         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3484                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3485         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3486         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3487         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3488
3489         /*
3490          * set WTHRESH to encourage burst writeback, it should not be set
3491          * higher than 1 when:
3492          * - ITR is 0 as it could cause false TX hangs
3493          * - ITR is set to > 100k int/sec and BQL is enabled
3494          *
3495          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3496          * to or less than the number of on chip descriptors, which is
3497          * currently 40.
3498          */
3499         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3500                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3501         else
3502                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3503
3504         /*
3505          * Setting PTHRESH to 32 both improves performance
3506          * and avoids a TX hang with DFP enabled
3507          */
3508         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3509                    32;          /* PTHRESH = 32 */
3510
3511         /* reinitialize flowdirector state */
3512         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3513                 ring->atr_sample_rate = adapter->atr_sample_rate;
3514                 ring->atr_count = 0;
3515                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3516         } else {
3517                 ring->atr_sample_rate = 0;
3518         }
3519
3520         /* initialize XPS */
3521         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3522                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3523
3524                 if (q_vector)
3525                         netif_set_xps_queue(ring->netdev,
3526                                             &q_vector->affinity_mask,
3527                                             ring->queue_index);
3528         }
3529
3530         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3531
3532         /* reinitialize tx_buffer_info */
3533         memset(ring->tx_buffer_info, 0,
3534                sizeof(struct ixgbe_tx_buffer) * ring->count);
3535
3536         /* enable queue */
3537         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3538
3539         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3540         if (hw->mac.type == ixgbe_mac_82598EB &&
3541             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3542                 return;
3543
3544         /* poll to verify queue is enabled */
3545         do {
3546                 usleep_range(1000, 2000);
3547                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3548         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3549         if (!wait_loop)
3550                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3551 }
3552
3553 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3554 {
3555         struct ixgbe_hw *hw = &adapter->hw;
3556         u32 rttdcs, mtqc;
3557         u8 tcs = adapter->hw_tcs;
3558
3559         if (hw->mac.type == ixgbe_mac_82598EB)
3560                 return;
3561
3562         /* disable the arbiter while setting MTQC */
3563         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3564         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3565         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3566
3567         /* set transmit pool layout */
3568         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3569                 mtqc = IXGBE_MTQC_VT_ENA;
3570                 if (tcs > 4)
3571                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3572                 else if (tcs > 1)
3573                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3574                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3575                          IXGBE_82599_VMDQ_4Q_MASK)
3576                         mtqc |= IXGBE_MTQC_32VF;
3577                 else
3578                         mtqc |= IXGBE_MTQC_64VF;
3579         } else {
3580                 if (tcs > 4)
3581                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3582                 else if (tcs > 1)
3583                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3584                 else
3585                         mtqc = IXGBE_MTQC_64Q_1PB;
3586         }
3587
3588         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3589
3590         /* Enable Security TX Buffer IFG for multiple pb */
3591         if (tcs) {
3592                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3593                 sectx |= IXGBE_SECTX_DCB;
3594                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3595         }
3596
3597         /* re-enable the arbiter */
3598         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3599         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3600 }
3601
3602 /**
3603  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3604  * @adapter: board private structure
3605  *
3606  * Configure the Tx unit of the MAC after a reset.
3607  **/
3608 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3609 {
3610         struct ixgbe_hw *hw = &adapter->hw;
3611         u32 dmatxctl;
3612         u32 i;
3613
3614         ixgbe_setup_mtqc(adapter);
3615
3616         if (hw->mac.type != ixgbe_mac_82598EB) {
3617                 /* DMATXCTL.EN must be before Tx queues are enabled */
3618                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3619                 dmatxctl |= IXGBE_DMATXCTL_TE;
3620                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3621         }
3622
3623         /* Setup the HW Tx Head and Tail descriptor pointers */
3624         for (i = 0; i < adapter->num_tx_queues; i++)
3625                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3626         for (i = 0; i < adapter->num_xdp_queues; i++)
3627                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3628 }
3629
3630 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3631                                  struct ixgbe_ring *ring)
3632 {
3633         struct ixgbe_hw *hw = &adapter->hw;
3634         u8 reg_idx = ring->reg_idx;
3635         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3636
3637         srrctl |= IXGBE_SRRCTL_DROP_EN;
3638
3639         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3640 }
3641
3642 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3643                                   struct ixgbe_ring *ring)
3644 {
3645         struct ixgbe_hw *hw = &adapter->hw;
3646         u8 reg_idx = ring->reg_idx;
3647         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3648
3649         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3650
3651         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3652 }
3653
3654 #ifdef CONFIG_IXGBE_DCB
3655 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3656 #else
3657 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3658 #endif
3659 {
3660         int i;
3661         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3662
3663         if (adapter->ixgbe_ieee_pfc)
3664                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3665
3666         /*
3667          * We should set the drop enable bit if:
3668          *  SR-IOV is enabled
3669          *   or
3670          *  Number of Rx queues > 1 and flow control is disabled
3671          *
3672          *  This allows us to avoid head of line blocking for security
3673          *  and performance reasons.
3674          */
3675         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3676             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3677                 for (i = 0; i < adapter->num_rx_queues; i++)
3678                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3679         } else {
3680                 for (i = 0; i < adapter->num_rx_queues; i++)
3681                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3682         }
3683 }
3684
3685 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3686
3687 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3688                                    struct ixgbe_ring *rx_ring)
3689 {
3690         struct ixgbe_hw *hw = &adapter->hw;
3691         u32 srrctl;
3692         u8 reg_idx = rx_ring->reg_idx;
3693
3694         if (hw->mac.type == ixgbe_mac_82598EB) {
3695                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3696
3697                 /*
3698                  * if VMDq is not active we must program one srrctl register
3699                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3700                  */
3701                 reg_idx &= mask;
3702         }
3703
3704         /* configure header buffer length, needed for RSC */
3705         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3706
3707         /* configure the packet buffer length */
3708         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3709                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3710         else
3711                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3712
3713         /* configure descriptor type */
3714         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3715
3716         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3717 }
3718
3719 /**
3720  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3721  * @adapter: device handle
3722  *
3723  *  - 82598/82599/X540:     128
3724  *  - X550(non-SRIOV mode): 512
3725  *  - X550(SRIOV mode):     64
3726  */
3727 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3728 {
3729         if (adapter->hw.mac.type < ixgbe_mac_X550)
3730                 return 128;
3731         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3732                 return 64;
3733         else
3734                 return 512;
3735 }
3736
3737 /**
3738  * ixgbe_store_key - Write the RSS key to HW
3739  * @adapter: device handle
3740  *
3741  * Write the RSS key stored in adapter.rss_key to HW.
3742  */
3743 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3744 {
3745         struct ixgbe_hw *hw = &adapter->hw;
3746         int i;
3747
3748         for (i = 0; i < 10; i++)
3749                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3750 }
3751
3752 /**
3753  * ixgbe_init_rss_key - Initialize adapter RSS key
3754  * @adapter: device handle
3755  *
3756  * Allocates and initializes the RSS key if it is not allocated.
3757  **/
3758 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3759 {
3760         u32 *rss_key;
3761
3762         if (!adapter->rss_key) {
3763                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3764                 if (unlikely(!rss_key))
3765                         return -ENOMEM;
3766
3767                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3768                 adapter->rss_key = rss_key;
3769         }
3770
3771         return 0;
3772 }
3773
3774 /**
3775  * ixgbe_store_reta - Write the RETA table to HW
3776  * @adapter: device handle
3777  *
3778  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3779  */
3780 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3781 {
3782         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3783         struct ixgbe_hw *hw = &adapter->hw;
3784         u32 reta = 0;
3785         u32 indices_multi;
3786         u8 *indir_tbl = adapter->rss_indir_tbl;
3787
3788         /* Fill out the redirection table as follows:
3789          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3790          *    indices.
3791          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3792          *  - X550:       8 bit wide entries containing 6 bit RSS index
3793          */
3794         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3795                 indices_multi = 0x11;
3796         else
3797                 indices_multi = 0x1;
3798
3799         /* Write redirection table to HW */
3800         for (i = 0; i < reta_entries; i++) {
3801                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3802                 if ((i & 3) == 3) {
3803                         if (i < 128)
3804                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3805                         else
3806                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3807                                                 reta);
3808                         reta = 0;
3809                 }
3810         }
3811 }
3812
3813 /**
3814  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3815  * @adapter: device handle
3816  *
3817  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3818  */
3819 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3820 {
3821         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3822         struct ixgbe_hw *hw = &adapter->hw;
3823         u32 vfreta = 0;
3824
3825         /* Write redirection table to HW */
3826         for (i = 0; i < reta_entries; i++) {
3827                 u16 pool = adapter->num_rx_pools;
3828
3829                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3830                 if ((i & 3) != 3)
3831                         continue;
3832
3833                 while (pool--)
3834                         IXGBE_WRITE_REG(hw,
3835                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3836                                         vfreta);
3837                 vfreta = 0;
3838         }
3839 }
3840
3841 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3842 {
3843         u32 i, j;
3844         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3845         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3846
3847         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3848          * make full use of any rings they may have.  We will use the
3849          * PSRTYPE register to control how many rings we use within the PF.
3850          */
3851         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3852                 rss_i = 4;
3853
3854         /* Fill out hash function seeds */
3855         ixgbe_store_key(adapter);
3856
3857         /* Fill out redirection table */
3858         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3859
3860         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3861                 if (j == rss_i)
3862                         j = 0;
3863
3864                 adapter->rss_indir_tbl[i] = j;
3865         }
3866
3867         ixgbe_store_reta(adapter);
3868 }
3869
3870 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3871 {
3872         struct ixgbe_hw *hw = &adapter->hw;
3873         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3874         int i, j;
3875
3876         /* Fill out hash function seeds */
3877         for (i = 0; i < 10; i++) {
3878                 u16 pool = adapter->num_rx_pools;
3879
3880                 while (pool--)
3881                         IXGBE_WRITE_REG(hw,
3882                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3883                                         *(adapter->rss_key + i));
3884         }
3885
3886         /* Fill out the redirection table */
3887         for (i = 0, j = 0; i < 64; i++, j++) {
3888                 if (j == rss_i)
3889                         j = 0;
3890
3891                 adapter->rss_indir_tbl[i] = j;
3892         }
3893
3894         ixgbe_store_vfreta(adapter);
3895 }
3896
3897 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3898 {
3899         struct ixgbe_hw *hw = &adapter->hw;
3900         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3901         u32 rxcsum;
3902
3903         /* Disable indicating checksum in descriptor, enables RSS hash */
3904         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3905         rxcsum |= IXGBE_RXCSUM_PCSD;
3906         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3907
3908         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3909                 if (adapter->ring_feature[RING_F_RSS].mask)
3910                         mrqc = IXGBE_MRQC_RSSEN;
3911         } else {
3912                 u8 tcs = adapter->hw_tcs;
3913
3914                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3915                         if (tcs > 4)
3916                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3917                         else if (tcs > 1)
3918                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3919                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3920                                  IXGBE_82599_VMDQ_4Q_MASK)
3921                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3922                         else
3923                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3924
3925                         /* Enable L3/L4 for Tx Switched packets */
3926                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3927                 } else {
3928                         if (tcs > 4)
3929                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3930                         else if (tcs > 1)
3931                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3932                         else
3933                                 mrqc = IXGBE_MRQC_RSSEN;
3934                 }
3935         }
3936
3937         /* Perform hash on these packet types */
3938         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3939                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3940                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3941                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3942
3943         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3944                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3945         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3946                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3947
3948         if ((hw->mac.type >= ixgbe_mac_X550) &&
3949             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3950                 u16 pool = adapter->num_rx_pools;
3951
3952                 /* Enable VF RSS mode */
3953                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3954                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3955
3956                 /* Setup RSS through the VF registers */
3957                 ixgbe_setup_vfreta(adapter);
3958                 vfmrqc = IXGBE_MRQC_RSSEN;
3959                 vfmrqc |= rss_field;
3960
3961                 while (pool--)
3962                         IXGBE_WRITE_REG(hw,
3963                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3964                                         vfmrqc);
3965         } else {
3966                 ixgbe_setup_reta(adapter);
3967                 mrqc |= rss_field;
3968                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3969         }
3970 }
3971
3972 /**
3973  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3974  * @adapter: address of board private structure
3975  * @ring: structure containing ring specific data
3976  **/
3977 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3978                                    struct ixgbe_ring *ring)
3979 {
3980         struct ixgbe_hw *hw = &adapter->hw;
3981         u32 rscctrl;
3982         u8 reg_idx = ring->reg_idx;
3983
3984         if (!ring_is_rsc_enabled(ring))
3985                 return;
3986
3987         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3988         rscctrl |= IXGBE_RSCCTL_RSCEN;
3989         /*
3990          * we must limit the number of descriptors so that the
3991          * total size of max desc * buf_len is not greater
3992          * than 65536
3993          */
3994         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3995         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3996 }
3997
3998 #define IXGBE_MAX_RX_DESC_POLL 10
3999 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4000                                        struct ixgbe_ring *ring)
4001 {
4002         struct ixgbe_hw *hw = &adapter->hw;
4003         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4004         u32 rxdctl;
4005         u8 reg_idx = ring->reg_idx;
4006
4007         if (ixgbe_removed(hw->hw_addr))
4008                 return;
4009         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4010         if (hw->mac.type == ixgbe_mac_82598EB &&
4011             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4012                 return;
4013
4014         do {
4015                 usleep_range(1000, 2000);
4016                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4017         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4018
4019         if (!wait_loop) {
4020                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4021                       "the polling period\n", reg_idx);
4022         }
4023 }
4024
4025 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4026                              struct ixgbe_ring *ring)
4027 {
4028         struct ixgbe_hw *hw = &adapter->hw;
4029         union ixgbe_adv_rx_desc *rx_desc;
4030         u64 rdba = ring->dma;
4031         u32 rxdctl;
4032         u8 reg_idx = ring->reg_idx;
4033
4034         /* disable queue to avoid use of these values while updating state */
4035         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4036         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4037
4038         /* write value back with RXDCTL.ENABLE bit cleared */
4039         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4040         IXGBE_WRITE_FLUSH(hw);
4041
4042         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4043         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4044         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4045                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4046         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4047         IXGBE_WRITE_FLUSH(hw);
4048
4049         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4050         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4051         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4052
4053         ixgbe_configure_srrctl(adapter, ring);
4054         ixgbe_configure_rscctl(adapter, ring);
4055
4056         if (hw->mac.type == ixgbe_mac_82598EB) {
4057                 /*
4058                  * enable cache line friendly hardware writes:
4059                  * PTHRESH=32 descriptors (half the internal cache),
4060                  * this also removes ugly rx_no_buffer_count increment
4061                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4062                  * WTHRESH=8 burst writeback up to two cache lines
4063                  */
4064                 rxdctl &= ~0x3FFFFF;
4065                 rxdctl |=  0x080420;
4066 #if (PAGE_SIZE < 8192)
4067         /* RXDCTL.RLPML does not work on 82599 */
4068         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4069                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4070                             IXGBE_RXDCTL_RLPML_EN);
4071
4072                 /* Limit the maximum frame size so we don't overrun the skb.
4073                  * This can happen in SRIOV mode when the MTU of the VF is
4074                  * higher than the MTU of the PF.
4075                  */
4076                 if (ring_uses_build_skb(ring) &&
4077                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4078                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4079                                   IXGBE_RXDCTL_RLPML_EN;
4080 #endif
4081         }
4082
4083         /* initialize rx_buffer_info */
4084         memset(ring->rx_buffer_info, 0,
4085                sizeof(struct ixgbe_rx_buffer) * ring->count);
4086
4087         /* initialize Rx descriptor 0 */
4088         rx_desc = IXGBE_RX_DESC(ring, 0);
4089         rx_desc->wb.upper.length = 0;
4090
4091         /* enable receive descriptor ring */
4092         rxdctl |= IXGBE_RXDCTL_ENABLE;
4093         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4094
4095         ixgbe_rx_desc_queue_enable(adapter, ring);
4096         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4097 }
4098
4099 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4100 {
4101         struct ixgbe_hw *hw = &adapter->hw;
4102         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4103         u16 pool = adapter->num_rx_pools;
4104
4105         /* PSRTYPE must be initialized in non 82598 adapters */
4106         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4107                       IXGBE_PSRTYPE_UDPHDR |
4108                       IXGBE_PSRTYPE_IPV4HDR |
4109                       IXGBE_PSRTYPE_L2HDR |
4110                       IXGBE_PSRTYPE_IPV6HDR;
4111
4112         if (hw->mac.type == ixgbe_mac_82598EB)
4113                 return;
4114
4115         if (rss_i > 3)
4116                 psrtype |= 2u << 29;
4117         else if (rss_i > 1)
4118                 psrtype |= 1u << 29;
4119
4120         while (pool--)
4121                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4122 }
4123
4124 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4125 {
4126         struct ixgbe_hw *hw = &adapter->hw;
4127         u16 pool = adapter->num_rx_pools;
4128         u32 reg_offset, vf_shift, vmolr;
4129         u32 gcr_ext, vmdctl;
4130         int i;
4131
4132         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4133                 return;
4134
4135         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4136         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4137         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4138         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4139         vmdctl |= IXGBE_VT_CTL_REPLEN;
4140         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4141
4142         /* accept untagged packets until a vlan tag is
4143          * specifically set for the VMDQ queue/pool
4144          */
4145         vmolr = IXGBE_VMOLR_AUPE;
4146         while (pool--)
4147                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4148
4149         vf_shift = VMDQ_P(0) % 32;
4150         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4151
4152         /* Enable only the PF's pool for Tx/Rx */
4153         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4154         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4155         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4156         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4157         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4158                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4159
4160         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4161         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4162
4163         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4164         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4165
4166         /*
4167          * Set up VF register offsets for selected VT Mode,
4168          * i.e. 32 or 64 VFs for SR-IOV
4169          */
4170         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4171         case IXGBE_82599_VMDQ_8Q_MASK:
4172                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4173                 break;
4174         case IXGBE_82599_VMDQ_4Q_MASK:
4175                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4176                 break;
4177         default:
4178                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4179                 break;
4180         }
4181
4182         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4183
4184         for (i = 0; i < adapter->num_vfs; i++) {
4185                 /* configure spoof checking */
4186                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4187                                           adapter->vfinfo[i].spoofchk_enabled);
4188
4189                 /* Enable/Disable RSS query feature  */
4190                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4191                                           adapter->vfinfo[i].rss_query_enabled);
4192         }
4193 }
4194
4195 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4196 {
4197         struct ixgbe_hw *hw = &adapter->hw;
4198         struct net_device *netdev = adapter->netdev;
4199         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4200         struct ixgbe_ring *rx_ring;
4201         int i;
4202         u32 mhadd, hlreg0;
4203
4204 #ifdef IXGBE_FCOE
4205         /* adjust max frame to be able to do baby jumbo for FCoE */
4206         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4207             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4208                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4209
4210 #endif /* IXGBE_FCOE */
4211
4212         /* adjust max frame to be at least the size of a standard frame */
4213         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4214                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4215
4216         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4217         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4218                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4219                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4220
4221                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4222         }
4223
4224         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4225         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4226         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4227         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4228
4229         /*
4230          * Setup the HW Rx Head and Tail Descriptor Pointers and
4231          * the Base and Length of the Rx Descriptor Ring
4232          */
4233         for (i = 0; i < adapter->num_rx_queues; i++) {
4234                 rx_ring = adapter->rx_ring[i];
4235
4236                 clear_ring_rsc_enabled(rx_ring);
4237                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4238                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4239
4240                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4241                         set_ring_rsc_enabled(rx_ring);
4242
4243                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4244                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4245
4246                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4247                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4248                         continue;
4249
4250                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4251
4252 #if (PAGE_SIZE < 8192)
4253                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4254                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4255
4256                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4257                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4258                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4259 #endif
4260         }
4261 }
4262
4263 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4264 {
4265         struct ixgbe_hw *hw = &adapter->hw;
4266         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4267
4268         switch (hw->mac.type) {
4269         case ixgbe_mac_82598EB:
4270                 /*
4271                  * For VMDq support of different descriptor types or
4272                  * buffer sizes through the use of multiple SRRCTL
4273                  * registers, RDRXCTL.MVMEN must be set to 1
4274                  *
4275                  * also, the manual doesn't mention it clearly but DCA hints
4276                  * will only use queue 0's tags unless this bit is set.  Side
4277                  * effects of setting this bit are only that SRRCTL must be
4278                  * fully programmed [0..15]
4279                  */
4280                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4281                 break;
4282         case ixgbe_mac_X550:
4283         case ixgbe_mac_X550EM_x:
4284         case ixgbe_mac_x550em_a:
4285                 if (adapter->num_vfs)
4286                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4287                 /* fall through */
4288         case ixgbe_mac_82599EB:
4289         case ixgbe_mac_X540:
4290                 /* Disable RSC for ACK packets */
4291                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4292                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4293                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4294                 /* hardware requires some bits to be set by default */
4295                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4296                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4297                 break;
4298         default:
4299                 /* We should do nothing since we don't know this hardware */
4300                 return;
4301         }
4302
4303         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4304 }
4305
4306 /**
4307  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4308  * @adapter: board private structure
4309  *
4310  * Configure the Rx unit of the MAC after a reset.
4311  **/
4312 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4313 {
4314         struct ixgbe_hw *hw = &adapter->hw;
4315         int i;
4316         u32 rxctrl, rfctl;
4317
4318         /* disable receives while setting up the descriptors */
4319         hw->mac.ops.disable_rx(hw);
4320
4321         ixgbe_setup_psrtype(adapter);
4322         ixgbe_setup_rdrxctl(adapter);
4323
4324         /* RSC Setup */
4325         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4326         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4327         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4328                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4329
4330         /* disable NFS filtering */
4331         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4332         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4333
4334         /* Program registers for the distribution of queues */
4335         ixgbe_setup_mrqc(adapter);
4336
4337         /* set_rx_buffer_len must be called before ring initialization */
4338         ixgbe_set_rx_buffer_len(adapter);
4339
4340         /*
4341          * Setup the HW Rx Head and Tail Descriptor Pointers and
4342          * the Base and Length of the Rx Descriptor Ring
4343          */
4344         for (i = 0; i < adapter->num_rx_queues; i++)
4345                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4346
4347         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4348         /* disable drop enable for 82598 parts */
4349         if (hw->mac.type == ixgbe_mac_82598EB)
4350                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4351
4352         /* enable all receives */
4353         rxctrl |= IXGBE_RXCTRL_RXEN;
4354         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4355 }
4356
4357 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4358                                  __be16 proto, u16 vid)
4359 {
4360         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4361         struct ixgbe_hw *hw = &adapter->hw;
4362
4363         /* add VID to filter table */
4364         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4365                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4366
4367         set_bit(vid, adapter->active_vlans);
4368
4369         return 0;
4370 }
4371
4372 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4373 {
4374         u32 vlvf;
4375         int idx;
4376
4377         /* short cut the special case */
4378         if (vlan == 0)
4379                 return 0;
4380
4381         /* Search for the vlan id in the VLVF entries */
4382         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4383                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4384                 if ((vlvf & VLAN_VID_MASK) == vlan)
4385                         break;
4386         }
4387
4388         return idx;
4389 }
4390
4391 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4392 {
4393         struct ixgbe_hw *hw = &adapter->hw;
4394         u32 bits, word;
4395         int idx;
4396
4397         idx = ixgbe_find_vlvf_entry(hw, vid);
4398         if (!idx)
4399                 return;
4400
4401         /* See if any other pools are set for this VLAN filter
4402          * entry other than the PF.
4403          */
4404         word = idx * 2 + (VMDQ_P(0) / 32);
4405         bits = ~BIT(VMDQ_P(0) % 32);
4406         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4407
4408         /* Disable the filter so this falls into the default pool. */
4409         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4410                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4411                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4412                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4413         }
4414 }
4415
4416 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4417                                   __be16 proto, u16 vid)
4418 {
4419         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4420         struct ixgbe_hw *hw = &adapter->hw;
4421
4422         /* remove VID from filter table */
4423         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4424                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4425
4426         clear_bit(vid, adapter->active_vlans);
4427
4428         return 0;
4429 }
4430
4431 /**
4432  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4433  * @adapter: driver data
4434  */
4435 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4436 {
4437         struct ixgbe_hw *hw = &adapter->hw;
4438         u32 vlnctrl;
4439         int i, j;
4440
4441         switch (hw->mac.type) {
4442         case ixgbe_mac_82598EB:
4443                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4444                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4445                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4446                 break;
4447         case ixgbe_mac_82599EB:
4448         case ixgbe_mac_X540:
4449         case ixgbe_mac_X550:
4450         case ixgbe_mac_X550EM_x:
4451         case ixgbe_mac_x550em_a:
4452                 for (i = 0; i < adapter->num_rx_queues; i++) {
4453                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4454
4455                         if (!netif_is_ixgbe(ring->netdev))
4456                                 continue;
4457
4458                         j = ring->reg_idx;
4459                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4460                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4461                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4462                 }
4463                 break;
4464         default:
4465                 break;
4466         }
4467 }
4468
4469 /**
4470  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4471  * @adapter: driver data
4472  */
4473 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4474 {
4475         struct ixgbe_hw *hw = &adapter->hw;
4476         u32 vlnctrl;
4477         int i, j;
4478
4479         switch (hw->mac.type) {
4480         case ixgbe_mac_82598EB:
4481                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4482                 vlnctrl |= IXGBE_VLNCTRL_VME;
4483                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4484                 break;
4485         case ixgbe_mac_82599EB:
4486         case ixgbe_mac_X540:
4487         case ixgbe_mac_X550:
4488         case ixgbe_mac_X550EM_x:
4489         case ixgbe_mac_x550em_a:
4490                 for (i = 0; i < adapter->num_rx_queues; i++) {
4491                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4492
4493                         if (!netif_is_ixgbe(ring->netdev))
4494                                 continue;
4495
4496                         j = ring->reg_idx;
4497                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4498                         vlnctrl |= IXGBE_RXDCTL_VME;
4499                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4500                 }
4501                 break;
4502         default:
4503                 break;
4504         }
4505 }
4506
4507 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4508 {
4509         struct ixgbe_hw *hw = &adapter->hw;
4510         u32 vlnctrl, i;
4511
4512         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4513
4514         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4515         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4516                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4517                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4518         } else {
4519                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4520                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4521                 return;
4522         }
4523
4524         /* Nothing to do for 82598 */
4525         if (hw->mac.type == ixgbe_mac_82598EB)
4526                 return;
4527
4528         /* We are already in VLAN promisc, nothing to do */
4529         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4530                 return;
4531
4532         /* Set flag so we don't redo unnecessary work */
4533         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4534
4535         /* Add PF to all active pools */
4536         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4537                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4538                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4539
4540                 vlvfb |= BIT(VMDQ_P(0) % 32);
4541                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4542         }
4543
4544         /* Set all bits in the VLAN filter table array */
4545         for (i = hw->mac.vft_size; i--;)
4546                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4547 }
4548
4549 #define VFTA_BLOCK_SIZE 8
4550 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4551 {
4552         struct ixgbe_hw *hw = &adapter->hw;
4553         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4554         u32 vid_start = vfta_offset * 32;
4555         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4556         u32 i, vid, word, bits;
4557
4558         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4559                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4560
4561                 /* pull VLAN ID from VLVF */
4562                 vid = vlvf & VLAN_VID_MASK;
4563
4564                 /* only concern outselves with a certain range */
4565                 if (vid < vid_start || vid >= vid_end)
4566                         continue;
4567
4568                 if (vlvf) {
4569                         /* record VLAN ID in VFTA */
4570                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4571
4572                         /* if PF is part of this then continue */
4573                         if (test_bit(vid, adapter->active_vlans))
4574                                 continue;
4575                 }
4576
4577                 /* remove PF from the pool */
4578                 word = i * 2 + VMDQ_P(0) / 32;
4579                 bits = ~BIT(VMDQ_P(0) % 32);
4580                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4581                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4582         }
4583
4584         /* extract values from active_vlans and write back to VFTA */
4585         for (i = VFTA_BLOCK_SIZE; i--;) {
4586                 vid = (vfta_offset + i) * 32;
4587                 word = vid / BITS_PER_LONG;
4588                 bits = vid % BITS_PER_LONG;
4589
4590                 vfta[i] |= adapter->active_vlans[word] >> bits;
4591
4592                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4593         }
4594 }
4595
4596 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4597 {
4598         struct ixgbe_hw *hw = &adapter->hw;
4599         u32 vlnctrl, i;
4600
4601         /* Set VLAN filtering to enabled */
4602         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4603         vlnctrl |= IXGBE_VLNCTRL_VFE;
4604         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4605
4606         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4607             hw->mac.type == ixgbe_mac_82598EB)
4608                 return;
4609
4610         /* We are not in VLAN promisc, nothing to do */
4611         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4612                 return;
4613
4614         /* Set flag so we don't redo unnecessary work */
4615         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4616
4617         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4618                 ixgbe_scrub_vfta(adapter, i);
4619 }
4620
4621 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4622 {
4623         u16 vid = 1;
4624
4625         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4626
4627         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4628                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4629 }
4630
4631 /**
4632  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4633  * @netdev: network interface device structure
4634  *
4635  * Writes multicast address list to the MTA hash table.
4636  * Returns: -ENOMEM on failure
4637  *                0 on no addresses written
4638  *                X on writing X addresses to MTA
4639  **/
4640 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4641 {
4642         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4643         struct ixgbe_hw *hw = &adapter->hw;
4644
4645         if (!netif_running(netdev))
4646                 return 0;
4647
4648         if (hw->mac.ops.update_mc_addr_list)
4649                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4650         else
4651                 return -ENOMEM;
4652
4653 #ifdef CONFIG_PCI_IOV
4654         ixgbe_restore_vf_multicasts(adapter);
4655 #endif
4656
4657         return netdev_mc_count(netdev);
4658 }
4659
4660 #ifdef CONFIG_PCI_IOV
4661 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4662 {
4663         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4664         struct ixgbe_hw *hw = &adapter->hw;
4665         int i;
4666
4667         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4668                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4669
4670                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4671                         hw->mac.ops.set_rar(hw, i,
4672                                             mac_table->addr,
4673                                             mac_table->pool,
4674                                             IXGBE_RAH_AV);
4675                 else
4676                         hw->mac.ops.clear_rar(hw, i);
4677         }
4678 }
4679
4680 #endif
4681 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4682 {
4683         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4684         struct ixgbe_hw *hw = &adapter->hw;
4685         int i;
4686
4687         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4688                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4689                         continue;
4690
4691                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4692
4693                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4694                         hw->mac.ops.set_rar(hw, i,
4695                                             mac_table->addr,
4696                                             mac_table->pool,
4697                                             IXGBE_RAH_AV);
4698                 else
4699                         hw->mac.ops.clear_rar(hw, i);
4700         }
4701 }
4702
4703 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4704 {
4705         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4706         struct ixgbe_hw *hw = &adapter->hw;
4707         int i;
4708
4709         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4710                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4711                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4712         }
4713
4714         ixgbe_sync_mac_table(adapter);
4715 }
4716
4717 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4718 {
4719         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4720         struct ixgbe_hw *hw = &adapter->hw;
4721         int i, count = 0;
4722
4723         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4724                 /* do not count default RAR as available */
4725                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4726                         continue;
4727
4728                 /* only count unused and addresses that belong to us */
4729                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4730                         if (mac_table->pool != pool)
4731                                 continue;
4732                 }
4733
4734                 count++;
4735         }
4736
4737         return count;
4738 }
4739
4740 /* this function destroys the first RAR entry */
4741 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4742 {
4743         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4744         struct ixgbe_hw *hw = &adapter->hw;
4745
4746         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4747         mac_table->pool = VMDQ_P(0);
4748
4749         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4750
4751         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4752                             IXGBE_RAH_AV);
4753 }
4754
4755 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4756                          const u8 *addr, u16 pool)
4757 {
4758         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4759         struct ixgbe_hw *hw = &adapter->hw;
4760         int i;
4761
4762         if (is_zero_ether_addr(addr))
4763                 return -EINVAL;
4764
4765         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4766                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4767                         continue;
4768
4769                 ether_addr_copy(mac_table->addr, addr);
4770                 mac_table->pool = pool;
4771
4772                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4773                                     IXGBE_MAC_STATE_IN_USE;
4774
4775                 ixgbe_sync_mac_table(adapter);
4776
4777                 return i;
4778         }
4779
4780         return -ENOMEM;
4781 }
4782
4783 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4784                          const u8 *addr, u16 pool)
4785 {
4786         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4787         struct ixgbe_hw *hw = &adapter->hw;
4788         int i;
4789
4790         if (is_zero_ether_addr(addr))
4791                 return -EINVAL;
4792
4793         /* search table for addr, if found clear IN_USE flag and sync */
4794         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4795                 /* we can only delete an entry if it is in use */
4796                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4797                         continue;
4798                 /* we only care about entries that belong to the given pool */
4799                 if (mac_table->pool != pool)
4800                         continue;
4801                 /* we only care about a specific MAC address */
4802                 if (!ether_addr_equal(addr, mac_table->addr))
4803                         continue;
4804
4805                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4806                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4807
4808                 ixgbe_sync_mac_table(adapter);
4809
4810                 return 0;
4811         }
4812
4813         return -ENOMEM;
4814 }
4815
4816 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4817 {
4818         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4819         int ret;
4820
4821         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4822
4823         return min_t(int, ret, 0);
4824 }
4825
4826 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4827 {
4828         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4829
4830         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4831
4832         return 0;
4833 }
4834
4835 /**
4836  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4837  * @netdev: network interface device structure
4838  *
4839  * The set_rx_method entry point is called whenever the unicast/multicast
4840  * address list or the network interface flags are updated.  This routine is
4841  * responsible for configuring the hardware for proper unicast, multicast and
4842  * promiscuous mode.
4843  **/
4844 void ixgbe_set_rx_mode(struct net_device *netdev)
4845 {
4846         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4847         struct ixgbe_hw *hw = &adapter->hw;
4848         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4849         netdev_features_t features = netdev->features;
4850         int count;
4851
4852         /* Check for Promiscuous and All Multicast modes */
4853         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4854
4855         /* set all bits that we expect to always be set */
4856         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4857         fctrl |= IXGBE_FCTRL_BAM;
4858         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4859         fctrl |= IXGBE_FCTRL_PMCF;
4860
4861         /* clear the bits we are changing the status of */
4862         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4863         if (netdev->flags & IFF_PROMISC) {
4864                 hw->addr_ctrl.user_set_promisc = true;
4865                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4866                 vmolr |= IXGBE_VMOLR_MPE;
4867                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4868         } else {
4869                 if (netdev->flags & IFF_ALLMULTI) {
4870                         fctrl |= IXGBE_FCTRL_MPE;
4871                         vmolr |= IXGBE_VMOLR_MPE;
4872                 }
4873                 hw->addr_ctrl.user_set_promisc = false;
4874         }
4875
4876         /*
4877          * Write addresses to available RAR registers, if there is not
4878          * sufficient space to store all the addresses then enable
4879          * unicast promiscuous mode
4880          */
4881         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4882                 fctrl |= IXGBE_FCTRL_UPE;
4883                 vmolr |= IXGBE_VMOLR_ROPE;
4884         }
4885
4886         /* Write addresses to the MTA, if the attempt fails
4887          * then we should just turn on promiscuous mode so
4888          * that we can at least receive multicast traffic
4889          */
4890         count = ixgbe_write_mc_addr_list(netdev);
4891         if (count < 0) {
4892                 fctrl |= IXGBE_FCTRL_MPE;
4893                 vmolr |= IXGBE_VMOLR_MPE;
4894         } else if (count) {
4895                 vmolr |= IXGBE_VMOLR_ROMPE;
4896         }
4897
4898         if (hw->mac.type != ixgbe_mac_82598EB) {
4899                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4900                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4901                            IXGBE_VMOLR_ROPE);
4902                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4903         }
4904
4905         /* This is useful for sniffing bad packets. */
4906         if (features & NETIF_F_RXALL) {
4907                 /* UPE and MPE will be handled by normal PROMISC logic
4908                  * in e1000e_set_rx_mode */
4909                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4910                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4911                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4912
4913                 fctrl &= ~(IXGBE_FCTRL_DPF);
4914                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4915         }
4916
4917         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4918
4919         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4920                 ixgbe_vlan_strip_enable(adapter);
4921         else
4922                 ixgbe_vlan_strip_disable(adapter);
4923
4924         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4925                 ixgbe_vlan_promisc_disable(adapter);
4926         else
4927                 ixgbe_vlan_promisc_enable(adapter);
4928 }
4929
4930 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4931 {
4932         int q_idx;
4933
4934         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4935                 napi_enable(&adapter->q_vector[q_idx]->napi);
4936 }
4937
4938 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4939 {
4940         int q_idx;
4941
4942         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4943                 napi_disable(&adapter->q_vector[q_idx]->napi);
4944 }
4945
4946 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4947 {
4948         struct ixgbe_hw *hw = &adapter->hw;
4949         u32 vxlanctrl;
4950
4951         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4952                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4953                 return;
4954
4955         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
4956         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4957
4958         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4959                 adapter->vxlan_port = 0;
4960
4961         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4962                 adapter->geneve_port = 0;
4963 }
4964
4965 #ifdef CONFIG_IXGBE_DCB
4966 /**
4967  * ixgbe_configure_dcb - Configure DCB hardware
4968  * @adapter: ixgbe adapter struct
4969  *
4970  * This is called by the driver on open to configure the DCB hardware.
4971  * This is also called by the gennetlink interface when reconfiguring
4972  * the DCB state.
4973  */
4974 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4975 {
4976         struct ixgbe_hw *hw = &adapter->hw;
4977         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4978
4979         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4980                 if (hw->mac.type == ixgbe_mac_82598EB)
4981                         netif_set_gso_max_size(adapter->netdev, 65536);
4982                 return;
4983         }
4984
4985         if (hw->mac.type == ixgbe_mac_82598EB)
4986                 netif_set_gso_max_size(adapter->netdev, 32768);
4987
4988 #ifdef IXGBE_FCOE
4989         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4990                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4991 #endif
4992
4993         /* reconfigure the hardware */
4994         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4995                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4996                                                 DCB_TX_CONFIG);
4997                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4998                                                 DCB_RX_CONFIG);
4999                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5000         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5001                 ixgbe_dcb_hw_ets(&adapter->hw,
5002                                  adapter->ixgbe_ieee_ets,
5003                                  max_frame);
5004                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5005                                         adapter->ixgbe_ieee_pfc->pfc_en,
5006                                         adapter->ixgbe_ieee_ets->prio_tc);
5007         }
5008
5009         /* Enable RSS Hash per TC */
5010         if (hw->mac.type != ixgbe_mac_82598EB) {
5011                 u32 msb = 0;
5012                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5013
5014                 while (rss_i) {
5015                         msb++;
5016                         rss_i >>= 1;
5017                 }
5018
5019                 /* write msb to all 8 TCs in one write */
5020                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5021         }
5022 }
5023 #endif
5024
5025 /* Additional bittime to account for IXGBE framing */
5026 #define IXGBE_ETH_FRAMING 20
5027
5028 /**
5029  * ixgbe_hpbthresh - calculate high water mark for flow control
5030  *
5031  * @adapter: board private structure to calculate for
5032  * @pb: packet buffer to calculate
5033  */
5034 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5035 {
5036         struct ixgbe_hw *hw = &adapter->hw;
5037         struct net_device *dev = adapter->netdev;
5038         int link, tc, kb, marker;
5039         u32 dv_id, rx_pba;
5040
5041         /* Calculate max LAN frame size */
5042         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5043
5044 #ifdef IXGBE_FCOE
5045         /* FCoE traffic class uses FCOE jumbo frames */
5046         if ((dev->features & NETIF_F_FCOE_MTU) &&
5047             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5048             (pb == ixgbe_fcoe_get_tc(adapter)))
5049                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5050 #endif
5051
5052         /* Calculate delay value for device */
5053         switch (hw->mac.type) {
5054         case ixgbe_mac_X540:
5055         case ixgbe_mac_X550:
5056         case ixgbe_mac_X550EM_x:
5057         case ixgbe_mac_x550em_a:
5058                 dv_id = IXGBE_DV_X540(link, tc);
5059                 break;
5060         default:
5061                 dv_id = IXGBE_DV(link, tc);
5062                 break;
5063         }
5064
5065         /* Loopback switch introduces additional latency */
5066         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5067                 dv_id += IXGBE_B2BT(tc);
5068
5069         /* Delay value is calculated in bit times convert to KB */
5070         kb = IXGBE_BT2KB(dv_id);
5071         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5072
5073         marker = rx_pba - kb;
5074
5075         /* It is possible that the packet buffer is not large enough
5076          * to provide required headroom. In this case throw an error
5077          * to user and a do the best we can.
5078          */
5079         if (marker < 0) {
5080                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5081                             "headroom to support flow control."
5082                             "Decrease MTU or number of traffic classes\n", pb);
5083                 marker = tc + 1;
5084         }
5085
5086         return marker;
5087 }
5088
5089 /**
5090  * ixgbe_lpbthresh - calculate low water mark for for flow control
5091  *
5092  * @adapter: board private structure to calculate for
5093  * @pb: packet buffer to calculate
5094  */
5095 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5096 {
5097         struct ixgbe_hw *hw = &adapter->hw;
5098         struct net_device *dev = adapter->netdev;
5099         int tc;
5100         u32 dv_id;
5101
5102         /* Calculate max LAN frame size */
5103         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5104
5105 #ifdef IXGBE_FCOE
5106         /* FCoE traffic class uses FCOE jumbo frames */
5107         if ((dev->features & NETIF_F_FCOE_MTU) &&
5108             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5109             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5110                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5111 #endif
5112
5113         /* Calculate delay value for device */
5114         switch (hw->mac.type) {
5115         case ixgbe_mac_X540:
5116         case ixgbe_mac_X550:
5117         case ixgbe_mac_X550EM_x:
5118         case ixgbe_mac_x550em_a:
5119                 dv_id = IXGBE_LOW_DV_X540(tc);
5120                 break;
5121         default:
5122                 dv_id = IXGBE_LOW_DV(tc);
5123                 break;
5124         }
5125
5126         /* Delay value is calculated in bit times convert to KB */
5127         return IXGBE_BT2KB(dv_id);
5128 }
5129
5130 /*
5131  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5132  */
5133 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5134 {
5135         struct ixgbe_hw *hw = &adapter->hw;
5136         int num_tc = adapter->hw_tcs;
5137         int i;
5138
5139         if (!num_tc)
5140                 num_tc = 1;
5141
5142         for (i = 0; i < num_tc; i++) {
5143                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5144                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5145
5146                 /* Low water marks must not be larger than high water marks */
5147                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5148                         hw->fc.low_water[i] = 0;
5149         }
5150
5151         for (; i < MAX_TRAFFIC_CLASS; i++)
5152                 hw->fc.high_water[i] = 0;
5153 }
5154
5155 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5156 {
5157         struct ixgbe_hw *hw = &adapter->hw;
5158         int hdrm;
5159         u8 tc = adapter->hw_tcs;
5160
5161         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5162             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5163                 hdrm = 32 << adapter->fdir_pballoc;
5164         else
5165                 hdrm = 0;
5166
5167         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5168         ixgbe_pbthresh_setup(adapter);
5169 }
5170
5171 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5172 {
5173         struct ixgbe_hw *hw = &adapter->hw;
5174         struct hlist_node *node2;
5175         struct ixgbe_fdir_filter *filter;
5176
5177         spin_lock(&adapter->fdir_perfect_lock);
5178
5179         if (!hlist_empty(&adapter->fdir_filter_list))
5180                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5181
5182         hlist_for_each_entry_safe(filter, node2,
5183                                   &adapter->fdir_filter_list, fdir_node) {
5184                 ixgbe_fdir_write_perfect_filter_82599(hw,
5185                                 &filter->filter,
5186                                 filter->sw_idx,
5187                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5188                                 IXGBE_FDIR_DROP_QUEUE :
5189                                 adapter->rx_ring[filter->action]->reg_idx);
5190         }
5191
5192         spin_unlock(&adapter->fdir_perfect_lock);
5193 }
5194
5195 /**
5196  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5197  * @rx_ring: ring to free buffers from
5198  **/
5199 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5200 {
5201         u16 i = rx_ring->next_to_clean;
5202         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5203
5204         /* Free all the Rx ring sk_buffs */
5205         while (i != rx_ring->next_to_alloc) {
5206                 if (rx_buffer->skb) {
5207                         struct sk_buff *skb = rx_buffer->skb;
5208                         if (IXGBE_CB(skb)->page_released)
5209                                 dma_unmap_page_attrs(rx_ring->dev,
5210                                                      IXGBE_CB(skb)->dma,
5211                                                      ixgbe_rx_pg_size(rx_ring),
5212                                                      DMA_FROM_DEVICE,
5213                                                      IXGBE_RX_DMA_ATTR);
5214                         dev_kfree_skb(skb);
5215                 }
5216
5217                 /* Invalidate cache lines that may have been written to by
5218                  * device so that we avoid corrupting memory.
5219                  */
5220                 dma_sync_single_range_for_cpu(rx_ring->dev,
5221                                               rx_buffer->dma,
5222                                               rx_buffer->page_offset,
5223                                               ixgbe_rx_bufsz(rx_ring),
5224                                               DMA_FROM_DEVICE);
5225
5226                 /* free resources associated with mapping */
5227                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5228                                      ixgbe_rx_pg_size(rx_ring),
5229                                      DMA_FROM_DEVICE,
5230                                      IXGBE_RX_DMA_ATTR);
5231                 __page_frag_cache_drain(rx_buffer->page,
5232                                         rx_buffer->pagecnt_bias);
5233
5234                 i++;
5235                 rx_buffer++;
5236                 if (i == rx_ring->count) {
5237                         i = 0;
5238                         rx_buffer = rx_ring->rx_buffer_info;
5239                 }
5240         }
5241
5242         rx_ring->next_to_alloc = 0;
5243         rx_ring->next_to_clean = 0;
5244         rx_ring->next_to_use = 0;
5245 }
5246
5247 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5248                              struct ixgbe_fwd_adapter *accel)
5249 {
5250         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5251         int num_tc = netdev_get_num_tc(adapter->netdev);
5252         struct net_device *vdev = accel->netdev;
5253         int i, baseq, err;
5254
5255         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5256         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5257                    accel->pool, adapter->num_rx_pools,
5258                    baseq, baseq + adapter->num_rx_queues_per_pool);
5259
5260         accel->rx_base_queue = baseq;
5261         accel->tx_base_queue = baseq;
5262
5263         /* record configuration for macvlan interface in vdev */
5264         for (i = 0; i < num_tc; i++)
5265                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5266                                              i, rss_i, baseq + (rss_i * i));
5267
5268         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5269                 adapter->rx_ring[baseq + i]->netdev = vdev;
5270
5271         /* Guarantee all rings are updated before we update the
5272          * MAC address filter.
5273          */
5274         wmb();
5275
5276         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5277          * need to only treat it as an error value if it is negative.
5278          */
5279         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5280                                    VMDQ_P(accel->pool));
5281         if (err >= 0)
5282                 return 0;
5283
5284         /* if we cannot add the MAC rule then disable the offload */
5285         macvlan_release_l2fw_offload(vdev);
5286
5287         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5288                 adapter->rx_ring[baseq + i]->netdev = NULL;
5289
5290         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5291
5292         /* unbind the queues and drop the subordinate channel config */
5293         netdev_unbind_sb_channel(adapter->netdev, vdev);
5294         netdev_set_sb_channel(vdev, 0);
5295
5296         clear_bit(accel->pool, adapter->fwd_bitmask);
5297         kfree(accel);
5298
5299         return err;
5300 }
5301
5302 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5303 {
5304         struct ixgbe_adapter *adapter = data;
5305         struct ixgbe_fwd_adapter *accel;
5306
5307         if (!netif_is_macvlan(vdev))
5308                 return 0;
5309
5310         accel = macvlan_accel_priv(vdev);
5311         if (!accel)
5312                 return 0;
5313
5314         ixgbe_fwd_ring_up(adapter, accel);
5315
5316         return 0;
5317 }
5318
5319 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5320 {
5321         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5322                                       ixgbe_macvlan_up, adapter);
5323 }
5324
5325 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5326 {
5327         struct ixgbe_hw *hw = &adapter->hw;
5328
5329         ixgbe_configure_pb(adapter);
5330 #ifdef CONFIG_IXGBE_DCB
5331         ixgbe_configure_dcb(adapter);
5332 #endif
5333         /*
5334          * We must restore virtualization before VLANs or else
5335          * the VLVF registers will not be populated
5336          */
5337         ixgbe_configure_virtualization(adapter);
5338
5339         ixgbe_set_rx_mode(adapter->netdev);
5340         ixgbe_restore_vlan(adapter);
5341         ixgbe_ipsec_restore(adapter);
5342
5343         switch (hw->mac.type) {
5344         case ixgbe_mac_82599EB:
5345         case ixgbe_mac_X540:
5346                 hw->mac.ops.disable_rx_buff(hw);
5347                 break;
5348         default:
5349                 break;
5350         }
5351
5352         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5353                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5354                                                 adapter->fdir_pballoc);
5355         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5356                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5357                                               adapter->fdir_pballoc);
5358                 ixgbe_fdir_filter_restore(adapter);
5359         }
5360
5361         switch (hw->mac.type) {
5362         case ixgbe_mac_82599EB:
5363         case ixgbe_mac_X540:
5364                 hw->mac.ops.enable_rx_buff(hw);
5365                 break;
5366         default:
5367                 break;
5368         }
5369
5370 #ifdef CONFIG_IXGBE_DCA
5371         /* configure DCA */
5372         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5373                 ixgbe_setup_dca(adapter);
5374 #endif /* CONFIG_IXGBE_DCA */
5375
5376 #ifdef IXGBE_FCOE
5377         /* configure FCoE L2 filters, redirection table, and Rx control */
5378         ixgbe_configure_fcoe(adapter);
5379
5380 #endif /* IXGBE_FCOE */
5381         ixgbe_configure_tx(adapter);
5382         ixgbe_configure_rx(adapter);
5383         ixgbe_configure_dfwd(adapter);
5384 }
5385
5386 /**
5387  * ixgbe_sfp_link_config - set up SFP+ link
5388  * @adapter: pointer to private adapter struct
5389  **/
5390 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5391 {
5392         /*
5393          * We are assuming the worst case scenario here, and that
5394          * is that an SFP was inserted/removed after the reset
5395          * but before SFP detection was enabled.  As such the best
5396          * solution is to just start searching as soon as we start
5397          */
5398         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5399                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5400
5401         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5402         adapter->sfp_poll_time = 0;
5403 }
5404
5405 /**
5406  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5407  * @hw: pointer to private hardware struct
5408  *
5409  * Returns 0 on success, negative on failure
5410  **/
5411 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5412 {
5413         u32 speed;
5414         bool autoneg, link_up = false;
5415         int ret = IXGBE_ERR_LINK_SETUP;
5416
5417         if (hw->mac.ops.check_link)
5418                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5419
5420         if (ret)
5421                 return ret;
5422
5423         speed = hw->phy.autoneg_advertised;
5424         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5425                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5426                                                         &autoneg);
5427         if (ret)
5428                 return ret;
5429
5430         if (hw->mac.ops.setup_link)
5431                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5432
5433         return ret;
5434 }
5435
5436 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5437 {
5438         struct ixgbe_hw *hw = &adapter->hw;
5439         u32 gpie = 0;
5440
5441         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5442                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5443                        IXGBE_GPIE_OCD;
5444                 gpie |= IXGBE_GPIE_EIAME;
5445                 /*
5446                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5447                  * this saves a register write for every interrupt
5448                  */
5449                 switch (hw->mac.type) {
5450                 case ixgbe_mac_82598EB:
5451                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5452                         break;
5453                 case ixgbe_mac_82599EB:
5454                 case ixgbe_mac_X540:
5455                 case ixgbe_mac_X550:
5456                 case ixgbe_mac_X550EM_x:
5457                 case ixgbe_mac_x550em_a:
5458                 default:
5459                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5460                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5461                         break;
5462                 }
5463         } else {
5464                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5465                  * specifically only auto mask tx and rx interrupts */
5466                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5467         }
5468
5469         /* XXX: to interrupt immediately for EICS writes, enable this */
5470         /* gpie |= IXGBE_GPIE_EIMEN; */
5471
5472         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5473                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5474
5475                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5476                 case IXGBE_82599_VMDQ_8Q_MASK:
5477                         gpie |= IXGBE_GPIE_VTMODE_16;
5478                         break;
5479                 case IXGBE_82599_VMDQ_4Q_MASK:
5480                         gpie |= IXGBE_GPIE_VTMODE_32;
5481                         break;
5482                 default:
5483                         gpie |= IXGBE_GPIE_VTMODE_64;
5484                         break;
5485                 }
5486         }
5487
5488         /* Enable Thermal over heat sensor interrupt */
5489         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5490                 switch (adapter->hw.mac.type) {
5491                 case ixgbe_mac_82599EB:
5492                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5493                         break;
5494                 default:
5495                         break;
5496                 }
5497         }
5498
5499         /* Enable fan failure interrupt */
5500         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5501                 gpie |= IXGBE_SDP1_GPIEN(hw);
5502
5503         switch (hw->mac.type) {
5504         case ixgbe_mac_82599EB:
5505                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5506                 break;
5507         case ixgbe_mac_X550EM_x:
5508         case ixgbe_mac_x550em_a:
5509                 gpie |= IXGBE_SDP0_GPIEN_X540;
5510                 break;
5511         default:
5512                 break;
5513         }
5514
5515         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5516 }
5517
5518 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5519 {
5520         struct ixgbe_hw *hw = &adapter->hw;
5521         int err;
5522         u32 ctrl_ext;
5523
5524         ixgbe_get_hw_control(adapter);
5525         ixgbe_setup_gpie(adapter);
5526
5527         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5528                 ixgbe_configure_msix(adapter);
5529         else
5530                 ixgbe_configure_msi_and_legacy(adapter);
5531
5532         /* enable the optics for 82599 SFP+ fiber */
5533         if (hw->mac.ops.enable_tx_laser)
5534                 hw->mac.ops.enable_tx_laser(hw);
5535
5536         if (hw->phy.ops.set_phy_power)
5537                 hw->phy.ops.set_phy_power(hw, true);
5538
5539         smp_mb__before_atomic();
5540         clear_bit(__IXGBE_DOWN, &adapter->state);
5541         ixgbe_napi_enable_all(adapter);
5542
5543         if (ixgbe_is_sfp(hw)) {
5544                 ixgbe_sfp_link_config(adapter);
5545         } else {
5546                 err = ixgbe_non_sfp_link_config(hw);
5547                 if (err)
5548                         e_err(probe, "link_config FAILED %d\n", err);
5549         }
5550
5551         /* clear any pending interrupts, may auto mask */
5552         IXGBE_READ_REG(hw, IXGBE_EICR);
5553         ixgbe_irq_enable(adapter, true, true);
5554
5555         /*
5556          * If this adapter has a fan, check to see if we had a failure
5557          * before we enabled the interrupt.
5558          */
5559         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5560                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5561                 if (esdp & IXGBE_ESDP_SDP1)
5562                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5563         }
5564
5565         /* bring the link up in the watchdog, this could race with our first
5566          * link up interrupt but shouldn't be a problem */
5567         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5568         adapter->link_check_timeout = jiffies;
5569         mod_timer(&adapter->service_timer, jiffies);
5570
5571         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5572         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5573         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5574         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5575 }
5576
5577 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5578 {
5579         WARN_ON(in_interrupt());
5580         /* put off any impending NetWatchDogTimeout */
5581         netif_trans_update(adapter->netdev);
5582
5583         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5584                 usleep_range(1000, 2000);
5585         if (adapter->hw.phy.type == ixgbe_phy_fw)
5586                 ixgbe_watchdog_link_is_down(adapter);
5587         ixgbe_down(adapter);
5588         /*
5589          * If SR-IOV enabled then wait a bit before bringing the adapter
5590          * back up to give the VFs time to respond to the reset.  The
5591          * two second wait is based upon the watchdog timer cycle in
5592          * the VF driver.
5593          */
5594         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5595                 msleep(2000);
5596         ixgbe_up(adapter);
5597         clear_bit(__IXGBE_RESETTING, &adapter->state);
5598 }
5599
5600 void ixgbe_up(struct ixgbe_adapter *adapter)
5601 {
5602         /* hardware has been reset, we need to reload some things */
5603         ixgbe_configure(adapter);
5604
5605         ixgbe_up_complete(adapter);
5606 }
5607
5608 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5609 {
5610         u16 devctl2;
5611
5612         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5613
5614         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5615         case IXGBE_PCIDEVCTRL2_17_34s:
5616         case IXGBE_PCIDEVCTRL2_4_8s:
5617                 /* For now we cap the upper limit on delay to 2 seconds
5618                  * as we end up going up to 34 seconds of delay in worst
5619                  * case timeout value.
5620                  */
5621         case IXGBE_PCIDEVCTRL2_1_2s:
5622                 return 2000000ul;       /* 2.0 s */
5623         case IXGBE_PCIDEVCTRL2_260_520ms:
5624                 return 520000ul;        /* 520 ms */
5625         case IXGBE_PCIDEVCTRL2_65_130ms:
5626                 return 130000ul;        /* 130 ms */
5627         case IXGBE_PCIDEVCTRL2_16_32ms:
5628                 return 32000ul;         /* 32 ms */
5629         case IXGBE_PCIDEVCTRL2_1_2ms:
5630                 return 2000ul;          /* 2 ms */
5631         case IXGBE_PCIDEVCTRL2_50_100us:
5632                 return 100ul;           /* 100 us */
5633         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5634                 return 32000ul;         /* 32 ms */
5635         default:
5636                 break;
5637         }
5638
5639         /* We shouldn't need to hit this path, but just in case default as
5640          * though completion timeout is not supported and support 32ms.
5641          */
5642         return 32000ul;
5643 }
5644
5645 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5646 {
5647         unsigned long wait_delay, delay_interval;
5648         struct ixgbe_hw *hw = &adapter->hw;
5649         int i, wait_loop;
5650         u32 rxdctl;
5651
5652         /* disable receives */
5653         hw->mac.ops.disable_rx(hw);
5654
5655         if (ixgbe_removed(hw->hw_addr))
5656                 return;
5657
5658         /* disable all enabled Rx queues */
5659         for (i = 0; i < adapter->num_rx_queues; i++) {
5660                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5661                 u8 reg_idx = ring->reg_idx;
5662
5663                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5664                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5665                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5666
5667                 /* write value back with RXDCTL.ENABLE bit cleared */
5668                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5669         }
5670
5671         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5672         if (hw->mac.type == ixgbe_mac_82598EB &&
5673             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5674                 return;
5675
5676         /* Determine our minimum delay interval. We will increase this value
5677          * with each subsequent test. This way if the device returns quickly
5678          * we should spend as little time as possible waiting, however as
5679          * the time increases we will wait for larger periods of time.
5680          *
5681          * The trick here is that we increase the interval using the
5682          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5683          * of that wait is that it totals up to 100x whatever interval we
5684          * choose. Since our minimum wait is 100us we can just divide the
5685          * total timeout by 100 to get our minimum delay interval.
5686          */
5687         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5688
5689         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5690         wait_delay = delay_interval;
5691
5692         while (wait_loop--) {
5693                 usleep_range(wait_delay, wait_delay + 10);
5694                 wait_delay += delay_interval * 2;
5695                 rxdctl = 0;
5696
5697                 /* OR together the reading of all the active RXDCTL registers,
5698                  * and then test the result. We need the disable to complete
5699                  * before we start freeing the memory and invalidating the
5700                  * DMA mappings.
5701                  */
5702                 for (i = 0; i < adapter->num_rx_queues; i++) {
5703                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5704                         u8 reg_idx = ring->reg_idx;
5705
5706                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5707                 }
5708
5709                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5710                         return;
5711         }
5712
5713         e_err(drv,
5714               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5715 }
5716
5717 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5718 {
5719         unsigned long wait_delay, delay_interval;
5720         struct ixgbe_hw *hw = &adapter->hw;
5721         int i, wait_loop;
5722         u32 txdctl;
5723
5724         if (ixgbe_removed(hw->hw_addr))
5725                 return;
5726
5727         /* disable all enabled Tx queues */
5728         for (i = 0; i < adapter->num_tx_queues; i++) {
5729                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5730                 u8 reg_idx = ring->reg_idx;
5731
5732                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5733         }
5734
5735         /* disable all enabled XDP Tx queues */
5736         for (i = 0; i < adapter->num_xdp_queues; i++) {
5737                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5738                 u8 reg_idx = ring->reg_idx;
5739
5740                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5741         }
5742
5743         /* If the link is not up there shouldn't be much in the way of
5744          * pending transactions. Those that are left will be flushed out
5745          * when the reset logic goes through the flush sequence to clean out
5746          * the pending Tx transactions.
5747          */
5748         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5749                 goto dma_engine_disable;
5750
5751         /* Determine our minimum delay interval. We will increase this value
5752          * with each subsequent test. This way if the device returns quickly
5753          * we should spend as little time as possible waiting, however as
5754          * the time increases we will wait for larger periods of time.
5755          *
5756          * The trick here is that we increase the interval using the
5757          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5758          * of that wait is that it totals up to 100x whatever interval we
5759          * choose. Since our minimum wait is 100us we can just divide the
5760          * total timeout by 100 to get our minimum delay interval.
5761          */
5762         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5763
5764         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5765         wait_delay = delay_interval;
5766
5767         while (wait_loop--) {
5768                 usleep_range(wait_delay, wait_delay + 10);
5769                 wait_delay += delay_interval * 2;
5770                 txdctl = 0;
5771
5772                 /* OR together the reading of all the active TXDCTL registers,
5773                  * and then test the result. We need the disable to complete
5774                  * before we start freeing the memory and invalidating the
5775                  * DMA mappings.
5776                  */
5777                 for (i = 0; i < adapter->num_tx_queues; i++) {
5778                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5779                         u8 reg_idx = ring->reg_idx;
5780
5781                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5782                 }
5783                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5784                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5785                         u8 reg_idx = ring->reg_idx;
5786
5787                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5788                 }
5789
5790                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5791                         goto dma_engine_disable;
5792         }
5793
5794         e_err(drv,
5795               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5796
5797 dma_engine_disable:
5798         /* Disable the Tx DMA engine on 82599 and later MAC */
5799         switch (hw->mac.type) {
5800         case ixgbe_mac_82599EB:
5801         case ixgbe_mac_X540:
5802         case ixgbe_mac_X550:
5803         case ixgbe_mac_X550EM_x:
5804         case ixgbe_mac_x550em_a:
5805                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5806                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5807                                  ~IXGBE_DMATXCTL_TE));
5808                 /* fall through */
5809         default:
5810                 break;
5811         }
5812 }
5813
5814 void ixgbe_reset(struct ixgbe_adapter *adapter)
5815 {
5816         struct ixgbe_hw *hw = &adapter->hw;
5817         struct net_device *netdev = adapter->netdev;
5818         int err;
5819
5820         if (ixgbe_removed(hw->hw_addr))
5821                 return;
5822         /* lock SFP init bit to prevent race conditions with the watchdog */
5823         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5824                 usleep_range(1000, 2000);
5825
5826         /* clear all SFP and link config related flags while holding SFP_INIT */
5827         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5828                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5829         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5830
5831         err = hw->mac.ops.init_hw(hw);
5832         switch (err) {
5833         case 0:
5834         case IXGBE_ERR_SFP_NOT_PRESENT:
5835         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5836                 break;
5837         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5838                 e_dev_err("master disable timed out\n");
5839                 break;
5840         case IXGBE_ERR_EEPROM_VERSION:
5841                 /* We are running on a pre-production device, log a warning */
5842                 e_dev_warn("This device is a pre-production adapter/LOM. "
5843                            "Please be aware there may be issues associated with "
5844                            "your hardware.  If you are experiencing problems "
5845                            "please contact your Intel or hardware "
5846                            "representative who provided you with this "
5847                            "hardware.\n");
5848                 break;
5849         default:
5850                 e_dev_err("Hardware Error: %d\n", err);
5851         }
5852
5853         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5854
5855         /* flush entries out of MAC table */
5856         ixgbe_flush_sw_mac_table(adapter);
5857         __dev_uc_unsync(netdev, NULL);
5858
5859         /* do not flush user set addresses */
5860         ixgbe_mac_set_default_filter(adapter);
5861
5862         /* update SAN MAC vmdq pool selection */
5863         if (hw->mac.san_mac_rar_index)
5864                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5865
5866         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5867                 ixgbe_ptp_reset(adapter);
5868
5869         if (hw->phy.ops.set_phy_power) {
5870                 if (!netif_running(adapter->netdev) && !adapter->wol)
5871                         hw->phy.ops.set_phy_power(hw, false);
5872                 else
5873                         hw->phy.ops.set_phy_power(hw, true);
5874         }
5875 }
5876
5877 /**
5878  * ixgbe_clean_tx_ring - Free Tx Buffers
5879  * @tx_ring: ring to be cleaned
5880  **/
5881 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5882 {
5883         u16 i = tx_ring->next_to_clean;
5884         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5885
5886         while (i != tx_ring->next_to_use) {
5887                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5888
5889                 /* Free all the Tx ring sk_buffs */
5890                 if (ring_is_xdp(tx_ring))
5891                         xdp_return_frame(tx_buffer->xdpf);
5892                 else
5893                         dev_kfree_skb_any(tx_buffer->skb);
5894
5895                 /* unmap skb header data */
5896                 dma_unmap_single(tx_ring->dev,
5897                                  dma_unmap_addr(tx_buffer, dma),
5898                                  dma_unmap_len(tx_buffer, len),
5899                                  DMA_TO_DEVICE);
5900
5901                 /* check for eop_desc to determine the end of the packet */
5902                 eop_desc = tx_buffer->next_to_watch;
5903                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5904
5905                 /* unmap remaining buffers */
5906                 while (tx_desc != eop_desc) {
5907                         tx_buffer++;
5908                         tx_desc++;
5909                         i++;
5910                         if (unlikely(i == tx_ring->count)) {
5911                                 i = 0;
5912                                 tx_buffer = tx_ring->tx_buffer_info;
5913                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5914                         }
5915
5916                         /* unmap any remaining paged data */
5917                         if (dma_unmap_len(tx_buffer, len))
5918                                 dma_unmap_page(tx_ring->dev,
5919                                                dma_unmap_addr(tx_buffer, dma),
5920                                                dma_unmap_len(tx_buffer, len),
5921                                                DMA_TO_DEVICE);
5922                 }
5923
5924                 /* move us one more past the eop_desc for start of next pkt */
5925                 tx_buffer++;
5926                 i++;
5927                 if (unlikely(i == tx_ring->count)) {
5928                         i = 0;
5929                         tx_buffer = tx_ring->tx_buffer_info;
5930                 }
5931         }
5932
5933         /* reset BQL for queue */
5934         if (!ring_is_xdp(tx_ring))
5935                 netdev_tx_reset_queue(txring_txq(tx_ring));
5936
5937         /* reset next_to_use and next_to_clean */
5938         tx_ring->next_to_use = 0;
5939         tx_ring->next_to_clean = 0;
5940 }
5941
5942 /**
5943  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5944  * @adapter: board private structure
5945  **/
5946 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5947 {
5948         int i;
5949
5950         for (i = 0; i < adapter->num_rx_queues; i++)
5951                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5952 }
5953
5954 /**
5955  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5956  * @adapter: board private structure
5957  **/
5958 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5959 {
5960         int i;
5961
5962         for (i = 0; i < adapter->num_tx_queues; i++)
5963                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5964         for (i = 0; i < adapter->num_xdp_queues; i++)
5965                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5966 }
5967
5968 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5969 {
5970         struct hlist_node *node2;
5971         struct ixgbe_fdir_filter *filter;
5972
5973         spin_lock(&adapter->fdir_perfect_lock);
5974
5975         hlist_for_each_entry_safe(filter, node2,
5976                                   &adapter->fdir_filter_list, fdir_node) {
5977                 hlist_del(&filter->fdir_node);
5978                 kfree(filter);
5979         }
5980         adapter->fdir_filter_count = 0;
5981
5982         spin_unlock(&adapter->fdir_perfect_lock);
5983 }
5984
5985 void ixgbe_down(struct ixgbe_adapter *adapter)
5986 {
5987         struct net_device *netdev = adapter->netdev;
5988         struct ixgbe_hw *hw = &adapter->hw;
5989         int i;
5990
5991         /* signal that we are down to the interrupt handler */
5992         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5993                 return; /* do nothing if already down */
5994
5995         /* Shut off incoming Tx traffic */
5996         netif_tx_stop_all_queues(netdev);
5997
5998         /* call carrier off first to avoid false dev_watchdog timeouts */
5999         netif_carrier_off(netdev);
6000         netif_tx_disable(netdev);
6001
6002         /* Disable Rx */
6003         ixgbe_disable_rx(adapter);
6004
6005         /* synchronize_sched() needed for pending XDP buffers to drain */
6006         if (adapter->xdp_ring[0])
6007                 synchronize_sched();
6008
6009         ixgbe_irq_disable(adapter);
6010
6011         ixgbe_napi_disable_all(adapter);
6012
6013         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6014         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6015         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6016
6017         del_timer_sync(&adapter->service_timer);
6018
6019         if (adapter->num_vfs) {
6020                 /* Clear EITR Select mapping */
6021                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6022
6023                 /* Mark all the VFs as inactive */
6024                 for (i = 0 ; i < adapter->num_vfs; i++)
6025                         adapter->vfinfo[i].clear_to_send = false;
6026
6027                 /* ping all the active vfs to let them know we are going down */
6028                 ixgbe_ping_all_vfs(adapter);
6029
6030                 /* Disable all VFTE/VFRE TX/RX */
6031                 ixgbe_disable_tx_rx(adapter);
6032         }
6033
6034         /* disable transmits in the hardware now that interrupts are off */
6035         ixgbe_disable_tx(adapter);
6036
6037         if (!pci_channel_offline(adapter->pdev))
6038                 ixgbe_reset(adapter);
6039
6040         /* power down the optics for 82599 SFP+ fiber */
6041         if (hw->mac.ops.disable_tx_laser)
6042                 hw->mac.ops.disable_tx_laser(hw);
6043
6044         ixgbe_clean_all_tx_rings(adapter);
6045         ixgbe_clean_all_rx_rings(adapter);
6046 }
6047
6048 /**
6049  * ixgbe_eee_capable - helper function to determine EEE support on X550
6050  * @adapter: board private structure
6051  */
6052 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6053 {
6054         struct ixgbe_hw *hw = &adapter->hw;
6055
6056         switch (hw->device_id) {
6057         case IXGBE_DEV_ID_X550EM_A_1G_T:
6058         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6059                 if (!hw->phy.eee_speeds_supported)
6060                         break;
6061                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6062                 if (!hw->phy.eee_speeds_advertised)
6063                         break;
6064                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6065                 break;
6066         default:
6067                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6068                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6069                 break;
6070         }
6071 }
6072
6073 /**
6074  * ixgbe_tx_timeout - Respond to a Tx Hang
6075  * @netdev: network interface device structure
6076  **/
6077 static void ixgbe_tx_timeout(struct net_device *netdev)
6078 {
6079         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6080
6081         /* Do the reset outside of interrupt context */
6082         ixgbe_tx_timeout_reset(adapter);
6083 }
6084
6085 #ifdef CONFIG_IXGBE_DCB
6086 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6087 {
6088         struct ixgbe_hw *hw = &adapter->hw;
6089         struct tc_configuration *tc;
6090         int j;
6091
6092         switch (hw->mac.type) {
6093         case ixgbe_mac_82598EB:
6094         case ixgbe_mac_82599EB:
6095                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6096                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6097                 break;
6098         case ixgbe_mac_X540:
6099         case ixgbe_mac_X550:
6100                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6101                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6102                 break;
6103         case ixgbe_mac_X550EM_x:
6104         case ixgbe_mac_x550em_a:
6105         default:
6106                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6107                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6108                 break;
6109         }
6110
6111         /* Configure DCB traffic classes */
6112         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6113                 tc = &adapter->dcb_cfg.tc_config[j];
6114                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6115                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6116                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6117                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6118                 tc->dcb_pfc = pfc_disabled;
6119         }
6120
6121         /* Initialize default user to priority mapping, UPx->TC0 */
6122         tc = &adapter->dcb_cfg.tc_config[0];
6123         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6124         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6125
6126         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6127         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6128         adapter->dcb_cfg.pfc_mode_enable = false;
6129         adapter->dcb_set_bitmap = 0x00;
6130         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6131                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6132         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6133                sizeof(adapter->temp_dcb_cfg));
6134 }
6135 #endif
6136
6137 /**
6138  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6139  * @adapter: board private structure to initialize
6140  * @ii: pointer to ixgbe_info for device
6141  *
6142  * ixgbe_sw_init initializes the Adapter private data structure.
6143  * Fields are initialized based on PCI device information and
6144  * OS network device settings (MTU size).
6145  **/
6146 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6147                          const struct ixgbe_info *ii)
6148 {
6149         struct ixgbe_hw *hw = &adapter->hw;
6150         struct pci_dev *pdev = adapter->pdev;
6151         unsigned int rss, fdir;
6152         u32 fwsm;
6153         int i;
6154
6155         /* PCI config space info */
6156
6157         hw->vendor_id = pdev->vendor;
6158         hw->device_id = pdev->device;
6159         hw->revision_id = pdev->revision;
6160         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6161         hw->subsystem_device_id = pdev->subsystem_device;
6162
6163         /* get_invariants needs the device IDs */
6164         ii->get_invariants(hw);
6165
6166         /* Set common capability flags and settings */
6167         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6168         adapter->ring_feature[RING_F_RSS].limit = rss;
6169         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6170         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6171         adapter->atr_sample_rate = 20;
6172         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6173         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6174         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6175         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6176 #ifdef CONFIG_IXGBE_DCA
6177         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6178 #endif
6179 #ifdef CONFIG_IXGBE_DCB
6180         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6181         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6182 #endif
6183 #ifdef IXGBE_FCOE
6184         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6185         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6186 #ifdef CONFIG_IXGBE_DCB
6187         /* Default traffic class to use for FCoE */
6188         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6189 #endif /* CONFIG_IXGBE_DCB */
6190 #endif /* IXGBE_FCOE */
6191
6192         /* initialize static ixgbe jump table entries */
6193         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6194                                           GFP_KERNEL);
6195         if (!adapter->jump_tables[0])
6196                 return -ENOMEM;
6197         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6198
6199         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6200                 adapter->jump_tables[i] = NULL;
6201
6202         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6203                                      sizeof(struct ixgbe_mac_addr),
6204                                      GFP_KERNEL);
6205         if (!adapter->mac_table)
6206                 return -ENOMEM;
6207
6208         if (ixgbe_init_rss_key(adapter))
6209                 return -ENOMEM;
6210
6211         /* Set MAC specific capability flags and exceptions */
6212         switch (hw->mac.type) {
6213         case ixgbe_mac_82598EB:
6214                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6215
6216                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6217                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6218
6219                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6220                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6221                 adapter->atr_sample_rate = 0;
6222                 adapter->fdir_pballoc = 0;
6223 #ifdef IXGBE_FCOE
6224                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6225                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6226 #ifdef CONFIG_IXGBE_DCB
6227                 adapter->fcoe.up = 0;
6228 #endif /* IXGBE_DCB */
6229 #endif /* IXGBE_FCOE */
6230                 break;
6231         case ixgbe_mac_82599EB:
6232                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6233                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6234                 break;
6235         case ixgbe_mac_X540:
6236                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6237                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6238                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6239                 break;
6240         case ixgbe_mac_x550em_a:
6241                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6242                 switch (hw->device_id) {
6243                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6244                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6245                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6246                         break;
6247                 default:
6248                         break;
6249                 }
6250         /* fall through */
6251         case ixgbe_mac_X550EM_x:
6252 #ifdef CONFIG_IXGBE_DCB
6253                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6254 #endif
6255 #ifdef IXGBE_FCOE
6256                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6257 #ifdef CONFIG_IXGBE_DCB
6258                 adapter->fcoe.up = 0;
6259 #endif /* IXGBE_DCB */
6260 #endif /* IXGBE_FCOE */
6261         /* Fall Through */
6262         case ixgbe_mac_X550:
6263                 if (hw->mac.type == ixgbe_mac_X550)
6264                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6265 #ifdef CONFIG_IXGBE_DCA
6266                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6267 #endif
6268                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6269                 break;
6270         default:
6271                 break;
6272         }
6273
6274 #ifdef IXGBE_FCOE
6275         /* FCoE support exists, always init the FCoE lock */
6276         spin_lock_init(&adapter->fcoe.lock);
6277
6278 #endif
6279         /* n-tuple support exists, always init our spinlock */
6280         spin_lock_init(&adapter->fdir_perfect_lock);
6281
6282 #ifdef CONFIG_IXGBE_DCB
6283         ixgbe_init_dcb(adapter);
6284 #endif
6285         ixgbe_init_ipsec_offload(adapter);
6286
6287         /* default flow control settings */
6288         hw->fc.requested_mode = ixgbe_fc_full;
6289         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6290         ixgbe_pbthresh_setup(adapter);
6291         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6292         hw->fc.send_xon = true;
6293         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6294
6295 #ifdef CONFIG_PCI_IOV
6296         if (max_vfs > 0)
6297                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6298
6299         /* assign number of SR-IOV VFs */
6300         if (hw->mac.type != ixgbe_mac_82598EB) {
6301                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6302                         max_vfs = 0;
6303                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6304                 }
6305         }
6306 #endif /* CONFIG_PCI_IOV */
6307
6308         /* enable itr by default in dynamic mode */
6309         adapter->rx_itr_setting = 1;
6310         adapter->tx_itr_setting = 1;
6311
6312         /* set default ring sizes */
6313         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6314         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6315
6316         /* set default work limits */
6317         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6318
6319         /* initialize eeprom parameters */
6320         if (ixgbe_init_eeprom_params_generic(hw)) {
6321                 e_dev_err("EEPROM initialization failed\n");
6322                 return -EIO;
6323         }
6324
6325         /* PF holds first pool slot */
6326         set_bit(0, adapter->fwd_bitmask);
6327         set_bit(__IXGBE_DOWN, &adapter->state);
6328
6329         return 0;
6330 }
6331
6332 /**
6333  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6334  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6335  *
6336  * Return 0 on success, negative on failure
6337  **/
6338 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6339 {
6340         struct device *dev = tx_ring->dev;
6341         int orig_node = dev_to_node(dev);
6342         int ring_node = -1;
6343         int size;
6344
6345         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6346
6347         if (tx_ring->q_vector)
6348                 ring_node = tx_ring->q_vector->numa_node;
6349
6350         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6351         if (!tx_ring->tx_buffer_info)
6352                 tx_ring->tx_buffer_info = vmalloc(size);
6353         if (!tx_ring->tx_buffer_info)
6354                 goto err;
6355
6356         /* round up to nearest 4K */
6357         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6358         tx_ring->size = ALIGN(tx_ring->size, 4096);
6359
6360         set_dev_node(dev, ring_node);
6361         tx_ring->desc = dma_alloc_coherent(dev,
6362                                            tx_ring->size,
6363                                            &tx_ring->dma,
6364                                            GFP_KERNEL);
6365         set_dev_node(dev, orig_node);
6366         if (!tx_ring->desc)
6367                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6368                                                    &tx_ring->dma, GFP_KERNEL);
6369         if (!tx_ring->desc)
6370                 goto err;
6371
6372         tx_ring->next_to_use = 0;
6373         tx_ring->next_to_clean = 0;
6374         return 0;
6375
6376 err:
6377         vfree(tx_ring->tx_buffer_info);
6378         tx_ring->tx_buffer_info = NULL;
6379         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6380         return -ENOMEM;
6381 }
6382
6383 /**
6384  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6385  * @adapter: board private structure
6386  *
6387  * If this function returns with an error, then it's possible one or
6388  * more of the rings is populated (while the rest are not).  It is the
6389  * callers duty to clean those orphaned rings.
6390  *
6391  * Return 0 on success, negative on failure
6392  **/
6393 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6394 {
6395         int i, j = 0, err = 0;
6396
6397         for (i = 0; i < adapter->num_tx_queues; i++) {
6398                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6399                 if (!err)
6400                         continue;
6401
6402                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6403                 goto err_setup_tx;
6404         }
6405         for (j = 0; j < adapter->num_xdp_queues; j++) {
6406                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6407                 if (!err)
6408                         continue;
6409
6410                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6411                 goto err_setup_tx;
6412         }
6413
6414         return 0;
6415 err_setup_tx:
6416         /* rewind the index freeing the rings as we go */
6417         while (j--)
6418                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6419         while (i--)
6420                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6421         return err;
6422 }
6423
6424 /**
6425  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6426  * @adapter: pointer to ixgbe_adapter
6427  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6428  *
6429  * Returns 0 on success, negative on failure
6430  **/
6431 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6432                              struct ixgbe_ring *rx_ring)
6433 {
6434         struct device *dev = rx_ring->dev;
6435         int orig_node = dev_to_node(dev);
6436         int ring_node = -1;
6437         int size, err;
6438
6439         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6440
6441         if (rx_ring->q_vector)
6442                 ring_node = rx_ring->q_vector->numa_node;
6443
6444         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6445         if (!rx_ring->rx_buffer_info)
6446                 rx_ring->rx_buffer_info = vmalloc(size);
6447         if (!rx_ring->rx_buffer_info)
6448                 goto err;
6449
6450         /* Round up to nearest 4K */
6451         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6452         rx_ring->size = ALIGN(rx_ring->size, 4096);
6453
6454         set_dev_node(dev, ring_node);
6455         rx_ring->desc = dma_alloc_coherent(dev,
6456                                            rx_ring->size,
6457                                            &rx_ring->dma,
6458                                            GFP_KERNEL);
6459         set_dev_node(dev, orig_node);
6460         if (!rx_ring->desc)
6461                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6462                                                    &rx_ring->dma, GFP_KERNEL);
6463         if (!rx_ring->desc)
6464                 goto err;
6465
6466         rx_ring->next_to_clean = 0;
6467         rx_ring->next_to_use = 0;
6468
6469         /* XDP RX-queue info */
6470         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6471                              rx_ring->queue_index) < 0)
6472                 goto err;
6473
6474         err = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq,
6475                                          MEM_TYPE_PAGE_SHARED, NULL);
6476         if (err) {
6477                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6478                 goto err;
6479         }
6480
6481         rx_ring->xdp_prog = adapter->xdp_prog;
6482
6483         return 0;
6484 err:
6485         vfree(rx_ring->rx_buffer_info);
6486         rx_ring->rx_buffer_info = NULL;
6487         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6488         return -ENOMEM;
6489 }
6490
6491 /**
6492  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6493  * @adapter: board private structure
6494  *
6495  * If this function returns with an error, then it's possible one or
6496  * more of the rings is populated (while the rest are not).  It is the
6497  * callers duty to clean those orphaned rings.
6498  *
6499  * Return 0 on success, negative on failure
6500  **/
6501 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6502 {
6503         int i, err = 0;
6504
6505         for (i = 0; i < adapter->num_rx_queues; i++) {
6506                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6507                 if (!err)
6508                         continue;
6509
6510                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6511                 goto err_setup_rx;
6512         }
6513
6514 #ifdef IXGBE_FCOE
6515         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6516         if (!err)
6517 #endif
6518                 return 0;
6519 err_setup_rx:
6520         /* rewind the index freeing the rings as we go */
6521         while (i--)
6522                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6523         return err;
6524 }
6525
6526 /**
6527  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6528  * @tx_ring: Tx descriptor ring for a specific queue
6529  *
6530  * Free all transmit software resources
6531  **/
6532 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6533 {
6534         ixgbe_clean_tx_ring(tx_ring);
6535
6536         vfree(tx_ring->tx_buffer_info);
6537         tx_ring->tx_buffer_info = NULL;
6538
6539         /* if not set, then don't free */
6540         if (!tx_ring->desc)
6541                 return;
6542
6543         dma_free_coherent(tx_ring->dev, tx_ring->size,
6544                           tx_ring->desc, tx_ring->dma);
6545
6546         tx_ring->desc = NULL;
6547 }
6548
6549 /**
6550  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6551  * @adapter: board private structure
6552  *
6553  * Free all transmit software resources
6554  **/
6555 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6556 {
6557         int i;
6558
6559         for (i = 0; i < adapter->num_tx_queues; i++)
6560                 if (adapter->tx_ring[i]->desc)
6561                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6562         for (i = 0; i < adapter->num_xdp_queues; i++)
6563                 if (adapter->xdp_ring[i]->desc)
6564                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6565 }
6566
6567 /**
6568  * ixgbe_free_rx_resources - Free Rx Resources
6569  * @rx_ring: ring to clean the resources from
6570  *
6571  * Free all receive software resources
6572  **/
6573 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6574 {
6575         ixgbe_clean_rx_ring(rx_ring);
6576
6577         rx_ring->xdp_prog = NULL;
6578         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6579         vfree(rx_ring->rx_buffer_info);
6580         rx_ring->rx_buffer_info = NULL;
6581
6582         /* if not set, then don't free */
6583         if (!rx_ring->desc)
6584                 return;
6585
6586         dma_free_coherent(rx_ring->dev, rx_ring->size,
6587                           rx_ring->desc, rx_ring->dma);
6588
6589         rx_ring->desc = NULL;
6590 }
6591
6592 /**
6593  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6594  * @adapter: board private structure
6595  *
6596  * Free all receive software resources
6597  **/
6598 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6599 {
6600         int i;
6601
6602 #ifdef IXGBE_FCOE
6603         ixgbe_free_fcoe_ddp_resources(adapter);
6604
6605 #endif
6606         for (i = 0; i < adapter->num_rx_queues; i++)
6607                 if (adapter->rx_ring[i]->desc)
6608                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6609 }
6610
6611 /**
6612  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6613  * @netdev: network interface device structure
6614  * @new_mtu: new value for maximum frame size
6615  *
6616  * Returns 0 on success, negative on failure
6617  **/
6618 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6619 {
6620         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6621
6622         if (adapter->xdp_prog) {
6623                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6624                                      VLAN_HLEN;
6625                 int i;
6626
6627                 for (i = 0; i < adapter->num_rx_queues; i++) {
6628                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6629
6630                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6631                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6632                                 return -EINVAL;
6633                         }
6634                 }
6635         }
6636
6637         /*
6638          * For 82599EB we cannot allow legacy VFs to enable their receive
6639          * paths when MTU greater than 1500 is configured.  So display a
6640          * warning that legacy VFs will be disabled.
6641          */
6642         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6643             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6644             (new_mtu > ETH_DATA_LEN))
6645                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6646
6647         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6648
6649         /* must set new MTU before calling down or up */
6650         netdev->mtu = new_mtu;
6651
6652         if (netif_running(netdev))
6653                 ixgbe_reinit_locked(adapter);
6654
6655         return 0;
6656 }
6657
6658 /**
6659  * ixgbe_open - Called when a network interface is made active
6660  * @netdev: network interface device structure
6661  *
6662  * Returns 0 on success, negative value on failure
6663  *
6664  * The open entry point is called when a network interface is made
6665  * active by the system (IFF_UP).  At this point all resources needed
6666  * for transmit and receive operations are allocated, the interrupt
6667  * handler is registered with the OS, the watchdog timer is started,
6668  * and the stack is notified that the interface is ready.
6669  **/
6670 int ixgbe_open(struct net_device *netdev)
6671 {
6672         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6673         struct ixgbe_hw *hw = &adapter->hw;
6674         int err, queues;
6675
6676         /* disallow open during test */
6677         if (test_bit(__IXGBE_TESTING, &adapter->state))
6678                 return -EBUSY;
6679
6680         netif_carrier_off(netdev);
6681
6682         /* allocate transmit descriptors */
6683         err = ixgbe_setup_all_tx_resources(adapter);
6684         if (err)
6685                 goto err_setup_tx;
6686
6687         /* allocate receive descriptors */
6688         err = ixgbe_setup_all_rx_resources(adapter);
6689         if (err)
6690                 goto err_setup_rx;
6691
6692         ixgbe_configure(adapter);
6693
6694         err = ixgbe_request_irq(adapter);
6695         if (err)
6696                 goto err_req_irq;
6697
6698         /* Notify the stack of the actual queue counts. */
6699         queues = adapter->num_tx_queues;
6700         err = netif_set_real_num_tx_queues(netdev, queues);
6701         if (err)
6702                 goto err_set_queues;
6703
6704         queues = adapter->num_rx_queues;
6705         err = netif_set_real_num_rx_queues(netdev, queues);
6706         if (err)
6707                 goto err_set_queues;
6708
6709         ixgbe_ptp_init(adapter);
6710
6711         ixgbe_up_complete(adapter);
6712
6713         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6714         udp_tunnel_get_rx_info(netdev);
6715
6716         return 0;
6717
6718 err_set_queues:
6719         ixgbe_free_irq(adapter);
6720 err_req_irq:
6721         ixgbe_free_all_rx_resources(adapter);
6722         if (hw->phy.ops.set_phy_power && !adapter->wol)
6723                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6724 err_setup_rx:
6725         ixgbe_free_all_tx_resources(adapter);
6726 err_setup_tx:
6727         ixgbe_reset(adapter);
6728
6729         return err;
6730 }
6731
6732 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6733 {
6734         ixgbe_ptp_suspend(adapter);
6735
6736         if (adapter->hw.phy.ops.enter_lplu) {
6737                 adapter->hw.phy.reset_disable = true;
6738                 ixgbe_down(adapter);
6739                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6740                 adapter->hw.phy.reset_disable = false;
6741         } else {
6742                 ixgbe_down(adapter);
6743         }
6744
6745         ixgbe_free_irq(adapter);
6746
6747         ixgbe_free_all_tx_resources(adapter);
6748         ixgbe_free_all_rx_resources(adapter);
6749 }
6750
6751 /**
6752  * ixgbe_close - Disables a network interface
6753  * @netdev: network interface device structure
6754  *
6755  * Returns 0, this is not allowed to fail
6756  *
6757  * The close entry point is called when an interface is de-activated
6758  * by the OS.  The hardware is still under the drivers control, but
6759  * needs to be disabled.  A global MAC reset is issued to stop the
6760  * hardware, and all transmit and receive resources are freed.
6761  **/
6762 int ixgbe_close(struct net_device *netdev)
6763 {
6764         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6765
6766         ixgbe_ptp_stop(adapter);
6767
6768         if (netif_device_present(netdev))
6769                 ixgbe_close_suspend(adapter);
6770
6771         ixgbe_fdir_filter_exit(adapter);
6772
6773         ixgbe_release_hw_control(adapter);
6774
6775         return 0;
6776 }
6777
6778 #ifdef CONFIG_PM
6779 static int ixgbe_resume(struct pci_dev *pdev)
6780 {
6781         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6782         struct net_device *netdev = adapter->netdev;
6783         u32 err;
6784
6785         adapter->hw.hw_addr = adapter->io_addr;
6786         pci_set_power_state(pdev, PCI_D0);
6787         pci_restore_state(pdev);
6788         /*
6789          * pci_restore_state clears dev->state_saved so call
6790          * pci_save_state to restore it.
6791          */
6792         pci_save_state(pdev);
6793
6794         err = pci_enable_device_mem(pdev);
6795         if (err) {
6796                 e_dev_err("Cannot enable PCI device from suspend\n");
6797                 return err;
6798         }
6799         smp_mb__before_atomic();
6800         clear_bit(__IXGBE_DISABLED, &adapter->state);
6801         pci_set_master(pdev);
6802
6803         pci_wake_from_d3(pdev, false);
6804
6805         ixgbe_reset(adapter);
6806
6807         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6808
6809         rtnl_lock();
6810         err = ixgbe_init_interrupt_scheme(adapter);
6811         if (!err && netif_running(netdev))
6812                 err = ixgbe_open(netdev);
6813
6814
6815         if (!err)
6816                 netif_device_attach(netdev);
6817         rtnl_unlock();
6818
6819         return err;
6820 }
6821 #endif /* CONFIG_PM */
6822
6823 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6824 {
6825         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6826         struct net_device *netdev = adapter->netdev;
6827         struct ixgbe_hw *hw = &adapter->hw;
6828         u32 ctrl;
6829         u32 wufc = adapter->wol;
6830 #ifdef CONFIG_PM
6831         int retval = 0;
6832 #endif
6833
6834         rtnl_lock();
6835         netif_device_detach(netdev);
6836
6837         if (netif_running(netdev))
6838                 ixgbe_close_suspend(adapter);
6839
6840         ixgbe_clear_interrupt_scheme(adapter);
6841         rtnl_unlock();
6842
6843 #ifdef CONFIG_PM
6844         retval = pci_save_state(pdev);
6845         if (retval)
6846                 return retval;
6847
6848 #endif
6849         if (hw->mac.ops.stop_link_on_d3)
6850                 hw->mac.ops.stop_link_on_d3(hw);
6851
6852         if (wufc) {
6853                 u32 fctrl;
6854
6855                 ixgbe_set_rx_mode(netdev);
6856
6857                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6858                 if (hw->mac.ops.enable_tx_laser)
6859                         hw->mac.ops.enable_tx_laser(hw);
6860
6861                 /* enable the reception of multicast packets */
6862                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6863                 fctrl |= IXGBE_FCTRL_MPE;
6864                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6865
6866                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6867                 ctrl |= IXGBE_CTRL_GIO_DIS;
6868                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6869
6870                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6871         } else {
6872                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6873                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6874         }
6875
6876         switch (hw->mac.type) {
6877         case ixgbe_mac_82598EB:
6878                 pci_wake_from_d3(pdev, false);
6879                 break;
6880         case ixgbe_mac_82599EB:
6881         case ixgbe_mac_X540:
6882         case ixgbe_mac_X550:
6883         case ixgbe_mac_X550EM_x:
6884         case ixgbe_mac_x550em_a:
6885                 pci_wake_from_d3(pdev, !!wufc);
6886                 break;
6887         default:
6888                 break;
6889         }
6890
6891         *enable_wake = !!wufc;
6892         if (hw->phy.ops.set_phy_power && !*enable_wake)
6893                 hw->phy.ops.set_phy_power(hw, false);
6894
6895         ixgbe_release_hw_control(adapter);
6896
6897         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6898                 pci_disable_device(pdev);
6899
6900         return 0;
6901 }
6902
6903 #ifdef CONFIG_PM
6904 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6905 {
6906         int retval;
6907         bool wake;
6908
6909         retval = __ixgbe_shutdown(pdev, &wake);
6910         if (retval)
6911                 return retval;
6912
6913         if (wake) {
6914                 pci_prepare_to_sleep(pdev);
6915         } else {
6916                 pci_wake_from_d3(pdev, false);
6917                 pci_set_power_state(pdev, PCI_D3hot);
6918         }
6919
6920         return 0;
6921 }
6922 #endif /* CONFIG_PM */
6923
6924 static void ixgbe_shutdown(struct pci_dev *pdev)
6925 {
6926         bool wake;
6927
6928         __ixgbe_shutdown(pdev, &wake);
6929
6930         if (system_state == SYSTEM_POWER_OFF) {
6931                 pci_wake_from_d3(pdev, wake);
6932                 pci_set_power_state(pdev, PCI_D3hot);
6933         }
6934 }
6935
6936 /**
6937  * ixgbe_update_stats - Update the board statistics counters.
6938  * @adapter: board private structure
6939  **/
6940 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6941 {
6942         struct net_device *netdev = adapter->netdev;
6943         struct ixgbe_hw *hw = &adapter->hw;
6944         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6945         u64 total_mpc = 0;
6946         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6947         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6948         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6949         u64 alloc_rx_page = 0;
6950         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6951
6952         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6953             test_bit(__IXGBE_RESETTING, &adapter->state))
6954                 return;
6955
6956         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6957                 u64 rsc_count = 0;
6958                 u64 rsc_flush = 0;
6959                 for (i = 0; i < adapter->num_rx_queues; i++) {
6960                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6961                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6962                 }
6963                 adapter->rsc_total_count = rsc_count;
6964                 adapter->rsc_total_flush = rsc_flush;
6965         }
6966
6967         for (i = 0; i < adapter->num_rx_queues; i++) {
6968                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6969                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6970                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6971                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6972                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6973                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6974                 bytes += rx_ring->stats.bytes;
6975                 packets += rx_ring->stats.packets;
6976         }
6977         adapter->non_eop_descs = non_eop_descs;
6978         adapter->alloc_rx_page = alloc_rx_page;
6979         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6980         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6981         adapter->hw_csum_rx_error = hw_csum_rx_error;
6982         netdev->stats.rx_bytes = bytes;
6983         netdev->stats.rx_packets = packets;
6984
6985         bytes = 0;
6986         packets = 0;
6987         /* gather some stats to the adapter struct that are per queue */
6988         for (i = 0; i < adapter->num_tx_queues; i++) {
6989                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6990                 restart_queue += tx_ring->tx_stats.restart_queue;
6991                 tx_busy += tx_ring->tx_stats.tx_busy;
6992                 bytes += tx_ring->stats.bytes;
6993                 packets += tx_ring->stats.packets;
6994         }
6995         for (i = 0; i < adapter->num_xdp_queues; i++) {
6996                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6997
6998                 restart_queue += xdp_ring->tx_stats.restart_queue;
6999                 tx_busy += xdp_ring->tx_stats.tx_busy;
7000                 bytes += xdp_ring->stats.bytes;
7001                 packets += xdp_ring->stats.packets;
7002         }
7003         adapter->restart_queue = restart_queue;
7004         adapter->tx_busy = tx_busy;
7005         netdev->stats.tx_bytes = bytes;
7006         netdev->stats.tx_packets = packets;
7007
7008         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7009
7010         /* 8 register reads */
7011         for (i = 0; i < 8; i++) {
7012                 /* for packet buffers not used, the register should read 0 */
7013                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7014                 missed_rx += mpc;
7015                 hwstats->mpc[i] += mpc;
7016                 total_mpc += hwstats->mpc[i];
7017                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7018                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7019                 switch (hw->mac.type) {
7020                 case ixgbe_mac_82598EB:
7021                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7022                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7023                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7024                         hwstats->pxonrxc[i] +=
7025                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7026                         break;
7027                 case ixgbe_mac_82599EB:
7028                 case ixgbe_mac_X540:
7029                 case ixgbe_mac_X550:
7030                 case ixgbe_mac_X550EM_x:
7031                 case ixgbe_mac_x550em_a:
7032                         hwstats->pxonrxc[i] +=
7033                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7034                         break;
7035                 default:
7036                         break;
7037                 }
7038         }
7039
7040         /*16 register reads */
7041         for (i = 0; i < 16; i++) {
7042                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7043                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7044                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7045                     (hw->mac.type == ixgbe_mac_X540) ||
7046                     (hw->mac.type == ixgbe_mac_X550) ||
7047                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7048                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7049                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7050                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7051                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7052                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7053                 }
7054         }
7055
7056         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7057         /* work around hardware counting issue */
7058         hwstats->gprc -= missed_rx;
7059
7060         ixgbe_update_xoff_received(adapter);
7061
7062         /* 82598 hardware only has a 32 bit counter in the high register */
7063         switch (hw->mac.type) {
7064         case ixgbe_mac_82598EB:
7065                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7066                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7067                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7068                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7069                 break;
7070         case ixgbe_mac_X540:
7071         case ixgbe_mac_X550:
7072         case ixgbe_mac_X550EM_x:
7073         case ixgbe_mac_x550em_a:
7074                 /* OS2BMC stats are X540 and later */
7075                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7076                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7077                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7078                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7079                 /* fall through */
7080         case ixgbe_mac_82599EB:
7081                 for (i = 0; i < 16; i++)
7082                         adapter->hw_rx_no_dma_resources +=
7083                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7084                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7085                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7086                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7087                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7088                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7089                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7090                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7091                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7092                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7093 #ifdef IXGBE_FCOE
7094                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7095                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7096                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7097                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7098                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7099                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7100                 /* Add up per cpu counters for total ddp aloc fail */
7101                 if (adapter->fcoe.ddp_pool) {
7102                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7103                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7104                         unsigned int cpu;
7105                         u64 noddp = 0, noddp_ext_buff = 0;
7106                         for_each_possible_cpu(cpu) {
7107                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7108                                 noddp += ddp_pool->noddp;
7109                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7110                         }
7111                         hwstats->fcoe_noddp = noddp;
7112                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7113                 }
7114 #endif /* IXGBE_FCOE */
7115                 break;
7116         default:
7117                 break;
7118         }
7119         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7120         hwstats->bprc += bprc;
7121         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7122         if (hw->mac.type == ixgbe_mac_82598EB)
7123                 hwstats->mprc -= bprc;
7124         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7125         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7126         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7127         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7128         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7129         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7130         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7131         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7132         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7133         hwstats->lxontxc += lxon;
7134         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7135         hwstats->lxofftxc += lxoff;
7136         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7137         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7138         /*
7139          * 82598 errata - tx of flow control packets is included in tx counters
7140          */
7141         xon_off_tot = lxon + lxoff;
7142         hwstats->gptc -= xon_off_tot;
7143         hwstats->mptc -= xon_off_tot;
7144         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7145         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7146         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7147         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7148         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7149         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7150         hwstats->ptc64 -= xon_off_tot;
7151         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7152         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7153         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7154         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7155         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7156         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7157
7158         /* Fill out the OS statistics structure */
7159         netdev->stats.multicast = hwstats->mprc;
7160
7161         /* Rx Errors */
7162         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7163         netdev->stats.rx_dropped = 0;
7164         netdev->stats.rx_length_errors = hwstats->rlec;
7165         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7166         netdev->stats.rx_missed_errors = total_mpc;
7167 }
7168
7169 /**
7170  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7171  * @adapter: pointer to the device adapter structure
7172  **/
7173 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7174 {
7175         struct ixgbe_hw *hw = &adapter->hw;
7176         int i;
7177
7178         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7179                 return;
7180
7181         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7182
7183         /* if interface is down do nothing */
7184         if (test_bit(__IXGBE_DOWN, &adapter->state))
7185                 return;
7186
7187         /* do nothing if we are not using signature filters */
7188         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7189                 return;
7190
7191         adapter->fdir_overflow++;
7192
7193         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7194                 for (i = 0; i < adapter->num_tx_queues; i++)
7195                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7196                                 &(adapter->tx_ring[i]->state));
7197                 for (i = 0; i < adapter->num_xdp_queues; i++)
7198                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7199                                 &adapter->xdp_ring[i]->state);
7200                 /* re-enable flow director interrupts */
7201                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7202         } else {
7203                 e_err(probe, "failed to finish FDIR re-initialization, "
7204                       "ignored adding FDIR ATR filters\n");
7205         }
7206 }
7207
7208 /**
7209  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7210  * @adapter: pointer to the device adapter structure
7211  *
7212  * This function serves two purposes.  First it strobes the interrupt lines
7213  * in order to make certain interrupts are occurring.  Secondly it sets the
7214  * bits needed to check for TX hangs.  As a result we should immediately
7215  * determine if a hang has occurred.
7216  */
7217 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7218 {
7219         struct ixgbe_hw *hw = &adapter->hw;
7220         u64 eics = 0;
7221         int i;
7222
7223         /* If we're down, removing or resetting, just bail */
7224         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7225             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7226             test_bit(__IXGBE_RESETTING, &adapter->state))
7227                 return;
7228
7229         /* Force detection of hung controller */
7230         if (netif_carrier_ok(adapter->netdev)) {
7231                 for (i = 0; i < adapter->num_tx_queues; i++)
7232                         set_check_for_tx_hang(adapter->tx_ring[i]);
7233                 for (i = 0; i < adapter->num_xdp_queues; i++)
7234                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7235         }
7236
7237         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7238                 /*
7239                  * for legacy and MSI interrupts don't set any bits
7240                  * that are enabled for EIAM, because this operation
7241                  * would set *both* EIMS and EICS for any bit in EIAM
7242                  */
7243                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7244                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7245         } else {
7246                 /* get one bit for every active tx/rx interrupt vector */
7247                 for (i = 0; i < adapter->num_q_vectors; i++) {
7248                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7249                         if (qv->rx.ring || qv->tx.ring)
7250                                 eics |= BIT_ULL(i);
7251                 }
7252         }
7253
7254         /* Cause software interrupt to ensure rings are cleaned */
7255         ixgbe_irq_rearm_queues(adapter, eics);
7256 }
7257
7258 /**
7259  * ixgbe_watchdog_update_link - update the link status
7260  * @adapter: pointer to the device adapter structure
7261  **/
7262 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7263 {
7264         struct ixgbe_hw *hw = &adapter->hw;
7265         u32 link_speed = adapter->link_speed;
7266         bool link_up = adapter->link_up;
7267         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7268
7269         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7270                 return;
7271
7272         if (hw->mac.ops.check_link) {
7273                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7274         } else {
7275                 /* always assume link is up, if no check link function */
7276                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7277                 link_up = true;
7278         }
7279
7280         if (adapter->ixgbe_ieee_pfc)
7281                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7282
7283         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7284                 hw->mac.ops.fc_enable(hw);
7285                 ixgbe_set_rx_drop_en(adapter);
7286         }
7287
7288         if (link_up ||
7289             time_after(jiffies, (adapter->link_check_timeout +
7290                                  IXGBE_TRY_LINK_TIMEOUT))) {
7291                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7292                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7293                 IXGBE_WRITE_FLUSH(hw);
7294         }
7295
7296         adapter->link_up = link_up;
7297         adapter->link_speed = link_speed;
7298 }
7299
7300 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7301 {
7302 #ifdef CONFIG_IXGBE_DCB
7303         struct net_device *netdev = adapter->netdev;
7304         struct dcb_app app = {
7305                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7306                               .protocol = 0,
7307                              };
7308         u8 up = 0;
7309
7310         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7311                 up = dcb_ieee_getapp_mask(netdev, &app);
7312
7313         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7314 #endif
7315 }
7316
7317 /**
7318  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7319  *                             print link up message
7320  * @adapter: pointer to the device adapter structure
7321  **/
7322 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7323 {
7324         struct net_device *netdev = adapter->netdev;
7325         struct ixgbe_hw *hw = &adapter->hw;
7326         u32 link_speed = adapter->link_speed;
7327         const char *speed_str;
7328         bool flow_rx, flow_tx;
7329
7330         /* only continue if link was previously down */
7331         if (netif_carrier_ok(netdev))
7332                 return;
7333
7334         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7335
7336         switch (hw->mac.type) {
7337         case ixgbe_mac_82598EB: {
7338                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7339                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7340                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7341                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7342         }
7343                 break;
7344         case ixgbe_mac_X540:
7345         case ixgbe_mac_X550:
7346         case ixgbe_mac_X550EM_x:
7347         case ixgbe_mac_x550em_a:
7348         case ixgbe_mac_82599EB: {
7349                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7350                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7351                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7352                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7353         }
7354                 break;
7355         default:
7356                 flow_tx = false;
7357                 flow_rx = false;
7358                 break;
7359         }
7360
7361         adapter->last_rx_ptp_check = jiffies;
7362
7363         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7364                 ixgbe_ptp_start_cyclecounter(adapter);
7365
7366         switch (link_speed) {
7367         case IXGBE_LINK_SPEED_10GB_FULL:
7368                 speed_str = "10 Gbps";
7369                 break;
7370         case IXGBE_LINK_SPEED_5GB_FULL:
7371                 speed_str = "5 Gbps";
7372                 break;
7373         case IXGBE_LINK_SPEED_2_5GB_FULL:
7374                 speed_str = "2.5 Gbps";
7375                 break;
7376         case IXGBE_LINK_SPEED_1GB_FULL:
7377                 speed_str = "1 Gbps";
7378                 break;
7379         case IXGBE_LINK_SPEED_100_FULL:
7380                 speed_str = "100 Mbps";
7381                 break;
7382         case IXGBE_LINK_SPEED_10_FULL:
7383                 speed_str = "10 Mbps";
7384                 break;
7385         default:
7386                 speed_str = "unknown speed";
7387                 break;
7388         }
7389         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7390                ((flow_rx && flow_tx) ? "RX/TX" :
7391                (flow_rx ? "RX" :
7392                (flow_tx ? "TX" : "None"))));
7393
7394         netif_carrier_on(netdev);
7395         ixgbe_check_vf_rate_limit(adapter);
7396
7397         /* enable transmits */
7398         netif_tx_wake_all_queues(adapter->netdev);
7399
7400         /* update the default user priority for VFs */
7401         ixgbe_update_default_up(adapter);
7402
7403         /* ping all the active vfs to let them know link has changed */
7404         ixgbe_ping_all_vfs(adapter);
7405 }
7406
7407 /**
7408  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7409  *                               print link down message
7410  * @adapter: pointer to the adapter structure
7411  **/
7412 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7413 {
7414         struct net_device *netdev = adapter->netdev;
7415         struct ixgbe_hw *hw = &adapter->hw;
7416
7417         adapter->link_up = false;
7418         adapter->link_speed = 0;
7419
7420         /* only continue if link was up previously */
7421         if (!netif_carrier_ok(netdev))
7422                 return;
7423
7424         /* poll for SFP+ cable when link is down */
7425         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7426                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7427
7428         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7429                 ixgbe_ptp_start_cyclecounter(adapter);
7430
7431         e_info(drv, "NIC Link is Down\n");
7432         netif_carrier_off(netdev);
7433
7434         /* ping all the active vfs to let them know link has changed */
7435         ixgbe_ping_all_vfs(adapter);
7436 }
7437
7438 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7439 {
7440         int i;
7441
7442         for (i = 0; i < adapter->num_tx_queues; i++) {
7443                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7444
7445                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7446                         return true;
7447         }
7448
7449         for (i = 0; i < adapter->num_xdp_queues; i++) {
7450                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7451
7452                 if (ring->next_to_use != ring->next_to_clean)
7453                         return true;
7454         }
7455
7456         return false;
7457 }
7458
7459 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7460 {
7461         struct ixgbe_hw *hw = &adapter->hw;
7462         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7463         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7464
7465         int i, j;
7466
7467         if (!adapter->num_vfs)
7468                 return false;
7469
7470         /* resetting the PF is only needed for MAC before X550 */
7471         if (hw->mac.type >= ixgbe_mac_X550)
7472                 return false;
7473
7474         for (i = 0; i < adapter->num_vfs; i++) {
7475                 for (j = 0; j < q_per_pool; j++) {
7476                         u32 h, t;
7477
7478                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7479                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7480
7481                         if (h != t)
7482                                 return true;
7483                 }
7484         }
7485
7486         return false;
7487 }
7488
7489 /**
7490  * ixgbe_watchdog_flush_tx - flush queues on link down
7491  * @adapter: pointer to the device adapter structure
7492  **/
7493 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7494 {
7495         if (!netif_carrier_ok(adapter->netdev)) {
7496                 if (ixgbe_ring_tx_pending(adapter) ||
7497                     ixgbe_vf_tx_pending(adapter)) {
7498                         /* We've lost link, so the controller stops DMA,
7499                          * but we've got queued Tx work that's never going
7500                          * to get done, so reset controller to flush Tx.
7501                          * (Do the reset outside of interrupt context).
7502                          */
7503                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7504                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7505                 }
7506         }
7507 }
7508
7509 #ifdef CONFIG_PCI_IOV
7510 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7511 {
7512         struct ixgbe_hw *hw = &adapter->hw;
7513         struct pci_dev *pdev = adapter->pdev;
7514         unsigned int vf;
7515         u32 gpc;
7516
7517         if (!(netif_carrier_ok(adapter->netdev)))
7518                 return;
7519
7520         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7521         if (gpc) /* If incrementing then no need for the check below */
7522                 return;
7523         /* Check to see if a bad DMA write target from an errant or
7524          * malicious VF has caused a PCIe error.  If so then we can
7525          * issue a VFLR to the offending VF(s) and then resume without
7526          * requesting a full slot reset.
7527          */
7528
7529         if (!pdev)
7530                 return;
7531
7532         /* check status reg for all VFs owned by this PF */
7533         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7534                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7535                 u16 status_reg;
7536
7537                 if (!vfdev)
7538                         continue;
7539                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7540                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7541                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7542                         pcie_flr(vfdev);
7543         }
7544 }
7545
7546 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7547 {
7548         u32 ssvpc;
7549
7550         /* Do not perform spoof check for 82598 or if not in IOV mode */
7551         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7552             adapter->num_vfs == 0)
7553                 return;
7554
7555         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7556
7557         /*
7558          * ssvpc register is cleared on read, if zero then no
7559          * spoofed packets in the last interval.
7560          */
7561         if (!ssvpc)
7562                 return;
7563
7564         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7565 }
7566 #else
7567 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7568 {
7569 }
7570
7571 static void
7572 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7573 {
7574 }
7575 #endif /* CONFIG_PCI_IOV */
7576
7577
7578 /**
7579  * ixgbe_watchdog_subtask - check and bring link up
7580  * @adapter: pointer to the device adapter structure
7581  **/
7582 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7583 {
7584         /* if interface is down, removing or resetting, do nothing */
7585         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7586             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7587             test_bit(__IXGBE_RESETTING, &adapter->state))
7588                 return;
7589
7590         ixgbe_watchdog_update_link(adapter);
7591
7592         if (adapter->link_up)
7593                 ixgbe_watchdog_link_is_up(adapter);
7594         else
7595                 ixgbe_watchdog_link_is_down(adapter);
7596
7597         ixgbe_check_for_bad_vf(adapter);
7598         ixgbe_spoof_check(adapter);
7599         ixgbe_update_stats(adapter);
7600
7601         ixgbe_watchdog_flush_tx(adapter);
7602 }
7603
7604 /**
7605  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7606  * @adapter: the ixgbe adapter structure
7607  **/
7608 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7609 {
7610         struct ixgbe_hw *hw = &adapter->hw;
7611         s32 err;
7612
7613         /* not searching for SFP so there is nothing to do here */
7614         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7615             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7616                 return;
7617
7618         if (adapter->sfp_poll_time &&
7619             time_after(adapter->sfp_poll_time, jiffies))
7620                 return; /* If not yet time to poll for SFP */
7621
7622         /* someone else is in init, wait until next service event */
7623         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7624                 return;
7625
7626         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7627
7628         err = hw->phy.ops.identify_sfp(hw);
7629         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7630                 goto sfp_out;
7631
7632         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7633                 /* If no cable is present, then we need to reset
7634                  * the next time we find a good cable. */
7635                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7636         }
7637
7638         /* exit on error */
7639         if (err)
7640                 goto sfp_out;
7641
7642         /* exit if reset not needed */
7643         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7644                 goto sfp_out;
7645
7646         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7647
7648         /*
7649          * A module may be identified correctly, but the EEPROM may not have
7650          * support for that module.  setup_sfp() will fail in that case, so
7651          * we should not allow that module to load.
7652          */
7653         if (hw->mac.type == ixgbe_mac_82598EB)
7654                 err = hw->phy.ops.reset(hw);
7655         else
7656                 err = hw->mac.ops.setup_sfp(hw);
7657
7658         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7659                 goto sfp_out;
7660
7661         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7662         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7663
7664 sfp_out:
7665         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7666
7667         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7668             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7669                 e_dev_err("failed to initialize because an unsupported "
7670                           "SFP+ module type was detected.\n");
7671                 e_dev_err("Reload the driver after installing a "
7672                           "supported module.\n");
7673                 unregister_netdev(adapter->netdev);
7674         }
7675 }
7676
7677 /**
7678  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7679  * @adapter: the ixgbe adapter structure
7680  **/
7681 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7682 {
7683         struct ixgbe_hw *hw = &adapter->hw;
7684         u32 cap_speed;
7685         u32 speed;
7686         bool autoneg = false;
7687
7688         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7689                 return;
7690
7691         /* someone else is in init, wait until next service event */
7692         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7693                 return;
7694
7695         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7696
7697         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7698
7699         /* advertise highest capable link speed */
7700         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7701                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7702         else
7703                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7704                                      IXGBE_LINK_SPEED_1GB_FULL);
7705
7706         if (hw->mac.ops.setup_link)
7707                 hw->mac.ops.setup_link(hw, speed, true);
7708
7709         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7710         adapter->link_check_timeout = jiffies;
7711         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7712 }
7713
7714 /**
7715  * ixgbe_service_timer - Timer Call-back
7716  * @t: pointer to timer_list structure
7717  **/
7718 static void ixgbe_service_timer(struct timer_list *t)
7719 {
7720         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7721         unsigned long next_event_offset;
7722
7723         /* poll faster when waiting for link */
7724         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7725                 next_event_offset = HZ / 10;
7726         else
7727                 next_event_offset = HZ * 2;
7728
7729         /* Reset the timer */
7730         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7731
7732         ixgbe_service_event_schedule(adapter);
7733 }
7734
7735 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7736 {
7737         struct ixgbe_hw *hw = &adapter->hw;
7738         u32 status;
7739
7740         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7741                 return;
7742
7743         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7744
7745         if (!hw->phy.ops.handle_lasi)
7746                 return;
7747
7748         status = hw->phy.ops.handle_lasi(&adapter->hw);
7749         if (status != IXGBE_ERR_OVERTEMP)
7750                 return;
7751
7752         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7753 }
7754
7755 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7756 {
7757         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7758                 return;
7759
7760         rtnl_lock();
7761         /* If we're already down, removing or resetting, just bail */
7762         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7763             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7764             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7765                 rtnl_unlock();
7766                 return;
7767         }
7768
7769         ixgbe_dump(adapter);
7770         netdev_err(adapter->netdev, "Reset adapter\n");
7771         adapter->tx_timeout_count++;
7772
7773         ixgbe_reinit_locked(adapter);
7774         rtnl_unlock();
7775 }
7776
7777 /**
7778  * ixgbe_check_fw_error - Check firmware for errors
7779  * @adapter: the adapter private structure
7780  *
7781  * Check firmware errors in register FWSM
7782  */
7783 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7784 {
7785         struct ixgbe_hw *hw = &adapter->hw;
7786         u32 fwsm;
7787
7788         /* read fwsm.ext_err_ind register and log errors */
7789         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7790
7791         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7792             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7793                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7794                            fwsm);
7795
7796         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7797                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7798                 return true;
7799         }
7800
7801         return false;
7802 }
7803
7804 /**
7805  * ixgbe_service_task - manages and runs subtasks
7806  * @work: pointer to work_struct containing our data
7807  **/
7808 static void ixgbe_service_task(struct work_struct *work)
7809 {
7810         struct ixgbe_adapter *adapter = container_of(work,
7811                                                      struct ixgbe_adapter,
7812                                                      service_task);
7813         if (ixgbe_removed(adapter->hw.hw_addr)) {
7814                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7815                         rtnl_lock();
7816                         ixgbe_down(adapter);
7817                         rtnl_unlock();
7818                 }
7819                 ixgbe_service_event_complete(adapter);
7820                 return;
7821         }
7822         if (ixgbe_check_fw_error(adapter)) {
7823                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7824                         rtnl_lock();
7825                         unregister_netdev(adapter->netdev);
7826                         rtnl_unlock();
7827                 }
7828                 ixgbe_service_event_complete(adapter);
7829                 return;
7830         }
7831         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7832                 rtnl_lock();
7833                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7834                 udp_tunnel_get_rx_info(adapter->netdev);
7835                 rtnl_unlock();
7836         }
7837         ixgbe_reset_subtask(adapter);
7838         ixgbe_phy_interrupt_subtask(adapter);
7839         ixgbe_sfp_detection_subtask(adapter);
7840         ixgbe_sfp_link_config_subtask(adapter);
7841         ixgbe_check_overtemp_subtask(adapter);
7842         ixgbe_watchdog_subtask(adapter);
7843         ixgbe_fdir_reinit_subtask(adapter);
7844         ixgbe_check_hang_subtask(adapter);
7845
7846         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7847                 ixgbe_ptp_overflow_check(adapter);
7848                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7849                         ixgbe_ptp_rx_hang(adapter);
7850                 ixgbe_ptp_tx_hang(adapter);
7851         }
7852
7853         ixgbe_service_event_complete(adapter);
7854 }
7855
7856 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7857                      struct ixgbe_tx_buffer *first,
7858                      u8 *hdr_len,
7859                      struct ixgbe_ipsec_tx_data *itd)
7860 {
7861         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7862         struct sk_buff *skb = first->skb;
7863         union {
7864                 struct iphdr *v4;
7865                 struct ipv6hdr *v6;
7866                 unsigned char *hdr;
7867         } ip;
7868         union {
7869                 struct tcphdr *tcp;
7870                 unsigned char *hdr;
7871         } l4;
7872         u32 paylen, l4_offset;
7873         u32 fceof_saidx = 0;
7874         int err;
7875
7876         if (skb->ip_summed != CHECKSUM_PARTIAL)
7877                 return 0;
7878
7879         if (!skb_is_gso(skb))
7880                 return 0;
7881
7882         err = skb_cow_head(skb, 0);
7883         if (err < 0)
7884                 return err;
7885
7886         if (eth_p_mpls(first->protocol))
7887                 ip.hdr = skb_inner_network_header(skb);
7888         else
7889                 ip.hdr = skb_network_header(skb);
7890         l4.hdr = skb_checksum_start(skb);
7891
7892         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7893         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7894
7895         /* initialize outer IP header fields */
7896         if (ip.v4->version == 4) {
7897                 unsigned char *csum_start = skb_checksum_start(skb);
7898                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7899                 int len = csum_start - trans_start;
7900
7901                 /* IP header will have to cancel out any data that
7902                  * is not a part of the outer IP header, so set to
7903                  * a reverse csum if needed, else init check to 0.
7904                  */
7905                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7906                                            csum_fold(csum_partial(trans_start,
7907                                                                   len, 0)) : 0;
7908                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7909
7910                 ip.v4->tot_len = 0;
7911                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7912                                    IXGBE_TX_FLAGS_CSUM |
7913                                    IXGBE_TX_FLAGS_IPV4;
7914         } else {
7915                 ip.v6->payload_len = 0;
7916                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7917                                    IXGBE_TX_FLAGS_CSUM;
7918         }
7919
7920         /* determine offset of inner transport header */
7921         l4_offset = l4.hdr - skb->data;
7922
7923         /* compute length of segmentation header */
7924         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7925
7926         /* remove payload length from inner checksum */
7927         paylen = skb->len - l4_offset;
7928         csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
7929
7930         /* update gso size and bytecount with header size */
7931         first->gso_segs = skb_shinfo(skb)->gso_segs;
7932         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7933
7934         /* mss_l4len_id: use 0 as index for TSO */
7935         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7936         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7937
7938         fceof_saidx |= itd->sa_idx;
7939         type_tucmd |= itd->flags | itd->trailer_len;
7940
7941         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7942         vlan_macip_lens = l4.hdr - ip.hdr;
7943         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7944         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7945
7946         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
7947                           mss_l4len_idx);
7948
7949         return 1;
7950 }
7951
7952 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7953 {
7954         unsigned int offset = 0;
7955
7956         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7957
7958         return offset == skb_checksum_start_offset(skb);
7959 }
7960
7961 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7962                           struct ixgbe_tx_buffer *first,
7963                           struct ixgbe_ipsec_tx_data *itd)
7964 {
7965         struct sk_buff *skb = first->skb;
7966         u32 vlan_macip_lens = 0;
7967         u32 fceof_saidx = 0;
7968         u32 type_tucmd = 0;
7969
7970         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7971 csum_failed:
7972                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7973                                          IXGBE_TX_FLAGS_CC)))
7974                         return;
7975                 goto no_csum;
7976         }
7977
7978         switch (skb->csum_offset) {
7979         case offsetof(struct tcphdr, check):
7980                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7981                 /* fall through */
7982         case offsetof(struct udphdr, check):
7983                 break;
7984         case offsetof(struct sctphdr, checksum):
7985                 /* validate that this is actually an SCTP request */
7986                 if (((first->protocol == htons(ETH_P_IP)) &&
7987                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7988                     ((first->protocol == htons(ETH_P_IPV6)) &&
7989                      ixgbe_ipv6_csum_is_sctp(skb))) {
7990                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7991                         break;
7992                 }
7993                 /* fall through */
7994         default:
7995                 skb_checksum_help(skb);
7996                 goto csum_failed;
7997         }
7998
7999         /* update TX checksum flag */
8000         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8001         vlan_macip_lens = skb_checksum_start_offset(skb) -
8002                           skb_network_offset(skb);
8003 no_csum:
8004         /* vlan_macip_lens: MACLEN, VLAN tag */
8005         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8006         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8007
8008         fceof_saidx |= itd->sa_idx;
8009         type_tucmd |= itd->flags | itd->trailer_len;
8010
8011         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8012 }
8013
8014 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8015         ((_flag <= _result) ? \
8016          ((u32)(_input & _flag) * (_result / _flag)) : \
8017          ((u32)(_input & _flag) / (_flag / _result)))
8018
8019 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8020 {
8021         /* set type for advanced descriptor with frame checksum insertion */
8022         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8023                        IXGBE_ADVTXD_DCMD_DEXT |
8024                        IXGBE_ADVTXD_DCMD_IFCS;
8025
8026         /* set HW vlan bit if vlan is present */
8027         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8028                                    IXGBE_ADVTXD_DCMD_VLE);
8029
8030         /* set segmentation enable bits for TSO/FSO */
8031         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8032                                    IXGBE_ADVTXD_DCMD_TSE);
8033
8034         /* set timestamp bit if present */
8035         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8036                                    IXGBE_ADVTXD_MAC_TSTAMP);
8037
8038         /* insert frame checksum */
8039         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8040
8041         return cmd_type;
8042 }
8043
8044 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8045                                    u32 tx_flags, unsigned int paylen)
8046 {
8047         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8048
8049         /* enable L4 checksum for TSO and TX checksum offload */
8050         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8051                                         IXGBE_TX_FLAGS_CSUM,
8052                                         IXGBE_ADVTXD_POPTS_TXSM);
8053
8054         /* enable IPv4 checksum for TSO */
8055         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8056                                         IXGBE_TX_FLAGS_IPV4,
8057                                         IXGBE_ADVTXD_POPTS_IXSM);
8058
8059         /* enable IPsec */
8060         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8061                                         IXGBE_TX_FLAGS_IPSEC,
8062                                         IXGBE_ADVTXD_POPTS_IPSEC);
8063
8064         /*
8065          * Check Context must be set if Tx switch is enabled, which it
8066          * always is for case where virtual functions are running
8067          */
8068         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8069                                         IXGBE_TX_FLAGS_CC,
8070                                         IXGBE_ADVTXD_CC);
8071
8072         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8073 }
8074
8075 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8076 {
8077         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8078
8079         /* Herbert's original patch had:
8080          *  smp_mb__after_netif_stop_queue();
8081          * but since that doesn't exist yet, just open code it.
8082          */
8083         smp_mb();
8084
8085         /* We need to check again in a case another CPU has just
8086          * made room available.
8087          */
8088         if (likely(ixgbe_desc_unused(tx_ring) < size))
8089                 return -EBUSY;
8090
8091         /* A reprieve! - use start_queue because it doesn't call schedule */
8092         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8093         ++tx_ring->tx_stats.restart_queue;
8094         return 0;
8095 }
8096
8097 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8098 {
8099         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8100                 return 0;
8101
8102         return __ixgbe_maybe_stop_tx(tx_ring, size);
8103 }
8104
8105 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8106                        IXGBE_TXD_CMD_RS)
8107
8108 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8109                         struct ixgbe_tx_buffer *first,
8110                         const u8 hdr_len)
8111 {
8112         struct sk_buff *skb = first->skb;
8113         struct ixgbe_tx_buffer *tx_buffer;
8114         union ixgbe_adv_tx_desc *tx_desc;
8115         struct skb_frag_struct *frag;
8116         dma_addr_t dma;
8117         unsigned int data_len, size;
8118         u32 tx_flags = first->tx_flags;
8119         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8120         u16 i = tx_ring->next_to_use;
8121
8122         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8123
8124         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8125
8126         size = skb_headlen(skb);
8127         data_len = skb->data_len;
8128
8129 #ifdef IXGBE_FCOE
8130         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8131                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8132                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8133                         data_len = 0;
8134                 } else {
8135                         data_len -= sizeof(struct fcoe_crc_eof);
8136                 }
8137         }
8138
8139 #endif
8140         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8141
8142         tx_buffer = first;
8143
8144         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8145                 if (dma_mapping_error(tx_ring->dev, dma))
8146                         goto dma_error;
8147
8148                 /* record length, and DMA address */
8149                 dma_unmap_len_set(tx_buffer, len, size);
8150                 dma_unmap_addr_set(tx_buffer, dma, dma);
8151
8152                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8153
8154                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8155                         tx_desc->read.cmd_type_len =
8156                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8157
8158                         i++;
8159                         tx_desc++;
8160                         if (i == tx_ring->count) {
8161                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8162                                 i = 0;
8163                         }
8164                         tx_desc->read.olinfo_status = 0;
8165
8166                         dma += IXGBE_MAX_DATA_PER_TXD;
8167                         size -= IXGBE_MAX_DATA_PER_TXD;
8168
8169                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8170                 }
8171
8172                 if (likely(!data_len))
8173                         break;
8174
8175                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8176
8177                 i++;
8178                 tx_desc++;
8179                 if (i == tx_ring->count) {
8180                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8181                         i = 0;
8182                 }
8183                 tx_desc->read.olinfo_status = 0;
8184
8185 #ifdef IXGBE_FCOE
8186                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8187 #else
8188                 size = skb_frag_size(frag);
8189 #endif
8190                 data_len -= size;
8191
8192                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8193                                        DMA_TO_DEVICE);
8194
8195                 tx_buffer = &tx_ring->tx_buffer_info[i];
8196         }
8197
8198         /* write last descriptor with RS and EOP bits */
8199         cmd_type |= size | IXGBE_TXD_CMD;
8200         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8201
8202         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8203
8204         /* set the timestamp */
8205         first->time_stamp = jiffies;
8206
8207         /*
8208          * Force memory writes to complete before letting h/w know there
8209          * are new descriptors to fetch.  (Only applicable for weak-ordered
8210          * memory model archs, such as IA-64).
8211          *
8212          * We also need this memory barrier to make certain all of the
8213          * status bits have been updated before next_to_watch is written.
8214          */
8215         wmb();
8216
8217         /* set next_to_watch value indicating a packet is present */
8218         first->next_to_watch = tx_desc;
8219
8220         i++;
8221         if (i == tx_ring->count)
8222                 i = 0;
8223
8224         tx_ring->next_to_use = i;
8225
8226         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8227
8228         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8229                 writel(i, tx_ring->tail);
8230
8231                 /* we need this if more than one processor can write to our tail
8232                  * at a time, it synchronizes IO on IA64/Altix systems
8233                  */
8234                 mmiowb();
8235         }
8236
8237         return 0;
8238 dma_error:
8239         dev_err(tx_ring->dev, "TX DMA map failed\n");
8240
8241         /* clear dma mappings for failed tx_buffer_info map */
8242         for (;;) {
8243                 tx_buffer = &tx_ring->tx_buffer_info[i];
8244                 if (dma_unmap_len(tx_buffer, len))
8245                         dma_unmap_page(tx_ring->dev,
8246                                        dma_unmap_addr(tx_buffer, dma),
8247                                        dma_unmap_len(tx_buffer, len),
8248                                        DMA_TO_DEVICE);
8249                 dma_unmap_len_set(tx_buffer, len, 0);
8250                 if (tx_buffer == first)
8251                         break;
8252                 if (i == 0)
8253                         i += tx_ring->count;
8254                 i--;
8255         }
8256
8257         dev_kfree_skb_any(first->skb);
8258         first->skb = NULL;
8259
8260         tx_ring->next_to_use = i;
8261
8262         return -1;
8263 }
8264
8265 static void ixgbe_atr(struct ixgbe_ring *ring,
8266                       struct ixgbe_tx_buffer *first)
8267 {
8268         struct ixgbe_q_vector *q_vector = ring->q_vector;
8269         union ixgbe_atr_hash_dword input = { .dword = 0 };
8270         union ixgbe_atr_hash_dword common = { .dword = 0 };
8271         union {
8272                 unsigned char *network;
8273                 struct iphdr *ipv4;
8274                 struct ipv6hdr *ipv6;
8275         } hdr;
8276         struct tcphdr *th;
8277         unsigned int hlen;
8278         struct sk_buff *skb;
8279         __be16 vlan_id;
8280         int l4_proto;
8281
8282         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8283         if (!q_vector)
8284                 return;
8285
8286         /* do nothing if sampling is disabled */
8287         if (!ring->atr_sample_rate)
8288                 return;
8289
8290         ring->atr_count++;
8291
8292         /* currently only IPv4/IPv6 with TCP is supported */
8293         if ((first->protocol != htons(ETH_P_IP)) &&
8294             (first->protocol != htons(ETH_P_IPV6)))
8295                 return;
8296
8297         /* snag network header to get L4 type and address */
8298         skb = first->skb;
8299         hdr.network = skb_network_header(skb);
8300         if (unlikely(hdr.network <= skb->data))
8301                 return;
8302         if (skb->encapsulation &&
8303             first->protocol == htons(ETH_P_IP) &&
8304             hdr.ipv4->protocol == IPPROTO_UDP) {
8305                 struct ixgbe_adapter *adapter = q_vector->adapter;
8306
8307                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8308                              VXLAN_HEADROOM))
8309                         return;
8310
8311                 /* verify the port is recognized as VXLAN */
8312                 if (adapter->vxlan_port &&
8313                     udp_hdr(skb)->dest == adapter->vxlan_port)
8314                         hdr.network = skb_inner_network_header(skb);
8315
8316                 if (adapter->geneve_port &&
8317                     udp_hdr(skb)->dest == adapter->geneve_port)
8318                         hdr.network = skb_inner_network_header(skb);
8319         }
8320
8321         /* Make sure we have at least [minimum IPv4 header + TCP]
8322          * or [IPv6 header] bytes
8323          */
8324         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8325                 return;
8326
8327         /* Currently only IPv4/IPv6 with TCP is supported */
8328         switch (hdr.ipv4->version) {
8329         case IPVERSION:
8330                 /* access ihl as u8 to avoid unaligned access on ia64 */
8331                 hlen = (hdr.network[0] & 0x0F) << 2;
8332                 l4_proto = hdr.ipv4->protocol;
8333                 break;
8334         case 6:
8335                 hlen = hdr.network - skb->data;
8336                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8337                 hlen -= hdr.network - skb->data;
8338                 break;
8339         default:
8340                 return;
8341         }
8342
8343         if (l4_proto != IPPROTO_TCP)
8344                 return;
8345
8346         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8347                      hlen + sizeof(struct tcphdr)))
8348                 return;
8349
8350         th = (struct tcphdr *)(hdr.network + hlen);
8351
8352         /* skip this packet since the socket is closing */
8353         if (th->fin)
8354                 return;
8355
8356         /* sample on all syn packets or once every atr sample count */
8357         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8358                 return;
8359
8360         /* reset sample count */
8361         ring->atr_count = 0;
8362
8363         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8364
8365         /*
8366          * src and dst are inverted, think how the receiver sees them
8367          *
8368          * The input is broken into two sections, a non-compressed section
8369          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8370          * is XORed together and stored in the compressed dword.
8371          */
8372         input.formatted.vlan_id = vlan_id;
8373
8374         /*
8375          * since src port and flex bytes occupy the same word XOR them together
8376          * and write the value to source port portion of compressed dword
8377          */
8378         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8379                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8380         else
8381                 common.port.src ^= th->dest ^ first->protocol;
8382         common.port.dst ^= th->source;
8383
8384         switch (hdr.ipv4->version) {
8385         case IPVERSION:
8386                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8387                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8388                 break;
8389         case 6:
8390                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8391                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8392                              hdr.ipv6->saddr.s6_addr32[1] ^
8393                              hdr.ipv6->saddr.s6_addr32[2] ^
8394                              hdr.ipv6->saddr.s6_addr32[3] ^
8395                              hdr.ipv6->daddr.s6_addr32[0] ^
8396                              hdr.ipv6->daddr.s6_addr32[1] ^
8397                              hdr.ipv6->daddr.s6_addr32[2] ^
8398                              hdr.ipv6->daddr.s6_addr32[3];
8399                 break;
8400         default:
8401                 break;
8402         }
8403
8404         if (hdr.network != skb_network_header(skb))
8405                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8406
8407         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8408         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8409                                               input, common, ring->queue_index);
8410 }
8411
8412 #ifdef IXGBE_FCOE
8413 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8414                               struct net_device *sb_dev,
8415                               select_queue_fallback_t fallback)
8416 {
8417         struct ixgbe_adapter *adapter;
8418         struct ixgbe_ring_feature *f;
8419         int txq;
8420
8421         if (sb_dev) {
8422                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8423                 struct net_device *vdev = sb_dev;
8424
8425                 txq = vdev->tc_to_txq[tc].offset;
8426                 txq += reciprocal_scale(skb_get_hash(skb),
8427                                         vdev->tc_to_txq[tc].count);
8428
8429                 return txq;
8430         }
8431
8432         /*
8433          * only execute the code below if protocol is FCoE
8434          * or FIP and we have FCoE enabled on the adapter
8435          */
8436         switch (vlan_get_protocol(skb)) {
8437         case htons(ETH_P_FCOE):
8438         case htons(ETH_P_FIP):
8439                 adapter = netdev_priv(dev);
8440
8441                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8442                         break;
8443                 /* fall through */
8444         default:
8445                 return fallback(dev, skb, sb_dev);
8446         }
8447
8448         f = &adapter->ring_feature[RING_F_FCOE];
8449
8450         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8451                                            smp_processor_id();
8452
8453         while (txq >= f->indices)
8454                 txq -= f->indices;
8455
8456         return txq + f->offset;
8457 }
8458
8459 #endif
8460 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8461                                struct xdp_frame *xdpf)
8462 {
8463         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8464         struct ixgbe_tx_buffer *tx_buffer;
8465         union ixgbe_adv_tx_desc *tx_desc;
8466         u32 len, cmd_type;
8467         dma_addr_t dma;
8468         u16 i;
8469
8470         len = xdpf->len;
8471
8472         if (unlikely(!ixgbe_desc_unused(ring)))
8473                 return IXGBE_XDP_CONSUMED;
8474
8475         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8476         if (dma_mapping_error(ring->dev, dma))
8477                 return IXGBE_XDP_CONSUMED;
8478
8479         /* record the location of the first descriptor for this packet */
8480         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8481         tx_buffer->bytecount = len;
8482         tx_buffer->gso_segs = 1;
8483         tx_buffer->protocol = 0;
8484
8485         i = ring->next_to_use;
8486         tx_desc = IXGBE_TX_DESC(ring, i);
8487
8488         dma_unmap_len_set(tx_buffer, len, len);
8489         dma_unmap_addr_set(tx_buffer, dma, dma);
8490         tx_buffer->xdpf = xdpf;
8491
8492         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8493
8494         /* put descriptor type bits */
8495         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8496                    IXGBE_ADVTXD_DCMD_DEXT |
8497                    IXGBE_ADVTXD_DCMD_IFCS;
8498         cmd_type |= len | IXGBE_TXD_CMD;
8499         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8500         tx_desc->read.olinfo_status =
8501                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8502
8503         /* Avoid any potential race with xdp_xmit and cleanup */
8504         smp_wmb();
8505
8506         /* set next_to_watch value indicating a packet is present */
8507         i++;
8508         if (i == ring->count)
8509                 i = 0;
8510
8511         tx_buffer->next_to_watch = tx_desc;
8512         ring->next_to_use = i;
8513
8514         return IXGBE_XDP_TX;
8515 }
8516
8517 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8518                           struct ixgbe_adapter *adapter,
8519                           struct ixgbe_ring *tx_ring)
8520 {
8521         struct ixgbe_tx_buffer *first;
8522         int tso;
8523         u32 tx_flags = 0;
8524         unsigned short f;
8525         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8526         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8527         __be16 protocol = skb->protocol;
8528         u8 hdr_len = 0;
8529
8530         /*
8531          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8532          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8533          *       + 2 desc gap to keep tail from touching head,
8534          *       + 1 desc for context descriptor,
8535          * otherwise try next time
8536          */
8537         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8538                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8539
8540         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8541                 tx_ring->tx_stats.tx_busy++;
8542                 return NETDEV_TX_BUSY;
8543         }
8544
8545         /* record the location of the first descriptor for this packet */
8546         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8547         first->skb = skb;
8548         first->bytecount = skb->len;
8549         first->gso_segs = 1;
8550
8551         /* if we have a HW VLAN tag being added default to the HW one */
8552         if (skb_vlan_tag_present(skb)) {
8553                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8554                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8555         /* else if it is a SW VLAN check the next protocol and store the tag */
8556         } else if (protocol == htons(ETH_P_8021Q)) {
8557                 struct vlan_hdr *vhdr, _vhdr;
8558                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8559                 if (!vhdr)
8560                         goto out_drop;
8561
8562                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8563                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8564                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8565         }
8566         protocol = vlan_get_protocol(skb);
8567
8568         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8569             adapter->ptp_clock) {
8570                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8571                                            &adapter->state)) {
8572                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8573                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8574
8575                         /* schedule check for Tx timestamp */
8576                         adapter->ptp_tx_skb = skb_get(skb);
8577                         adapter->ptp_tx_start = jiffies;
8578                         schedule_work(&adapter->ptp_tx_work);
8579                 } else {
8580                         adapter->tx_hwtstamp_skipped++;
8581                 }
8582         }
8583
8584         skb_tx_timestamp(skb);
8585
8586 #ifdef CONFIG_PCI_IOV
8587         /*
8588          * Use the l2switch_enable flag - would be false if the DMA
8589          * Tx switch had been disabled.
8590          */
8591         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8592                 tx_flags |= IXGBE_TX_FLAGS_CC;
8593
8594 #endif
8595         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8596         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8597             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8598              (skb->priority != TC_PRIO_CONTROL))) {
8599                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8600                 tx_flags |= (skb->priority & 0x7) <<
8601                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8602                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8603                         struct vlan_ethhdr *vhdr;
8604
8605                         if (skb_cow_head(skb, 0))
8606                                 goto out_drop;
8607                         vhdr = (struct vlan_ethhdr *)skb->data;
8608                         vhdr->h_vlan_TCI = htons(tx_flags >>
8609                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8610                 } else {
8611                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8612                 }
8613         }
8614
8615         /* record initial flags and protocol */
8616         first->tx_flags = tx_flags;
8617         first->protocol = protocol;
8618
8619 #ifdef IXGBE_FCOE
8620         /* setup tx offload for FCoE */
8621         if ((protocol == htons(ETH_P_FCOE)) &&
8622             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8623                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8624                 if (tso < 0)
8625                         goto out_drop;
8626
8627                 goto xmit_fcoe;
8628         }
8629
8630 #endif /* IXGBE_FCOE */
8631
8632 #ifdef CONFIG_XFRM_OFFLOAD
8633         if (skb->sp && !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8634                 goto out_drop;
8635 #endif
8636         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8637         if (tso < 0)
8638                 goto out_drop;
8639         else if (!tso)
8640                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8641
8642         /* add the ATR filter if ATR is on */
8643         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8644                 ixgbe_atr(tx_ring, first);
8645
8646 #ifdef IXGBE_FCOE
8647 xmit_fcoe:
8648 #endif /* IXGBE_FCOE */
8649         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8650                 goto cleanup_tx_timestamp;
8651
8652         return NETDEV_TX_OK;
8653
8654 out_drop:
8655         dev_kfree_skb_any(first->skb);
8656         first->skb = NULL;
8657 cleanup_tx_timestamp:
8658         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8659                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8660                 adapter->ptp_tx_skb = NULL;
8661                 cancel_work_sync(&adapter->ptp_tx_work);
8662                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8663         }
8664
8665         return NETDEV_TX_OK;
8666 }
8667
8668 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8669                                       struct net_device *netdev,
8670                                       struct ixgbe_ring *ring)
8671 {
8672         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8673         struct ixgbe_ring *tx_ring;
8674
8675         /*
8676          * The minimum packet size for olinfo paylen is 17 so pad the skb
8677          * in order to meet this minimum size requirement.
8678          */
8679         if (skb_put_padto(skb, 17))
8680                 return NETDEV_TX_OK;
8681
8682         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8683
8684         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8685 }
8686
8687 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8688                                     struct net_device *netdev)
8689 {
8690         return __ixgbe_xmit_frame(skb, netdev, NULL);
8691 }
8692
8693 /**
8694  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8695  * @netdev: network interface device structure
8696  * @p: pointer to an address structure
8697  *
8698  * Returns 0 on success, negative on failure
8699  **/
8700 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8701 {
8702         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8703         struct ixgbe_hw *hw = &adapter->hw;
8704         struct sockaddr *addr = p;
8705
8706         if (!is_valid_ether_addr(addr->sa_data))
8707                 return -EADDRNOTAVAIL;
8708
8709         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8710         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8711
8712         ixgbe_mac_set_default_filter(adapter);
8713
8714         return 0;
8715 }
8716
8717 static int
8718 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8719 {
8720         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8721         struct ixgbe_hw *hw = &adapter->hw;
8722         u16 value;
8723         int rc;
8724
8725         if (prtad != hw->phy.mdio.prtad)
8726                 return -EINVAL;
8727         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8728         if (!rc)
8729                 rc = value;
8730         return rc;
8731 }
8732
8733 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8734                             u16 addr, u16 value)
8735 {
8736         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8737         struct ixgbe_hw *hw = &adapter->hw;
8738
8739         if (prtad != hw->phy.mdio.prtad)
8740                 return -EINVAL;
8741         return hw->phy.ops.write_reg(hw, addr, devad, value);
8742 }
8743
8744 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8745 {
8746         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8747
8748         switch (cmd) {
8749         case SIOCSHWTSTAMP:
8750                 return ixgbe_ptp_set_ts_config(adapter, req);
8751         case SIOCGHWTSTAMP:
8752                 return ixgbe_ptp_get_ts_config(adapter, req);
8753         case SIOCGMIIPHY:
8754                 if (!adapter->hw.phy.ops.read_reg)
8755                         return -EOPNOTSUPP;
8756                 /* fall through */
8757         default:
8758                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8759         }
8760 }
8761
8762 /**
8763  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8764  * netdev->dev_addrs
8765  * @dev: network interface device structure
8766  *
8767  * Returns non-zero on failure
8768  **/
8769 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8770 {
8771         int err = 0;
8772         struct ixgbe_adapter *adapter = netdev_priv(dev);
8773         struct ixgbe_hw *hw = &adapter->hw;
8774
8775         if (is_valid_ether_addr(hw->mac.san_addr)) {
8776                 rtnl_lock();
8777                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8778                 rtnl_unlock();
8779
8780                 /* update SAN MAC vmdq pool selection */
8781                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8782         }
8783         return err;
8784 }
8785
8786 /**
8787  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8788  * netdev->dev_addrs
8789  * @dev: network interface device structure
8790  *
8791  * Returns non-zero on failure
8792  **/
8793 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8794 {
8795         int err = 0;
8796         struct ixgbe_adapter *adapter = netdev_priv(dev);
8797         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8798
8799         if (is_valid_ether_addr(mac->san_addr)) {
8800                 rtnl_lock();
8801                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8802                 rtnl_unlock();
8803         }
8804         return err;
8805 }
8806
8807 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8808                                    struct ixgbe_ring *ring)
8809 {
8810         u64 bytes, packets;
8811         unsigned int start;
8812
8813         if (ring) {
8814                 do {
8815                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8816                         packets = ring->stats.packets;
8817                         bytes   = ring->stats.bytes;
8818                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8819                 stats->tx_packets += packets;
8820                 stats->tx_bytes   += bytes;
8821         }
8822 }
8823
8824 static void ixgbe_get_stats64(struct net_device *netdev,
8825                               struct rtnl_link_stats64 *stats)
8826 {
8827         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8828         int i;
8829
8830         rcu_read_lock();
8831         for (i = 0; i < adapter->num_rx_queues; i++) {
8832                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8833                 u64 bytes, packets;
8834                 unsigned int start;
8835
8836                 if (ring) {
8837                         do {
8838                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8839                                 packets = ring->stats.packets;
8840                                 bytes   = ring->stats.bytes;
8841                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8842                         stats->rx_packets += packets;
8843                         stats->rx_bytes   += bytes;
8844                 }
8845         }
8846
8847         for (i = 0; i < adapter->num_tx_queues; i++) {
8848                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8849
8850                 ixgbe_get_ring_stats64(stats, ring);
8851         }
8852         for (i = 0; i < adapter->num_xdp_queues; i++) {
8853                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8854
8855                 ixgbe_get_ring_stats64(stats, ring);
8856         }
8857         rcu_read_unlock();
8858
8859         /* following stats updated by ixgbe_watchdog_task() */
8860         stats->multicast        = netdev->stats.multicast;
8861         stats->rx_errors        = netdev->stats.rx_errors;
8862         stats->rx_length_errors = netdev->stats.rx_length_errors;
8863         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8864         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8865 }
8866
8867 #ifdef CONFIG_IXGBE_DCB
8868 /**
8869  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8870  * @adapter: pointer to ixgbe_adapter
8871  * @tc: number of traffic classes currently enabled
8872  *
8873  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8874  * 802.1Q priority maps to a packet buffer that exists.
8875  */
8876 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8877 {
8878         struct ixgbe_hw *hw = &adapter->hw;
8879         u32 reg, rsave;
8880         int i;
8881
8882         /* 82598 have a static priority to TC mapping that can not
8883          * be changed so no validation is needed.
8884          */
8885         if (hw->mac.type == ixgbe_mac_82598EB)
8886                 return;
8887
8888         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8889         rsave = reg;
8890
8891         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8892                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8893
8894                 /* If up2tc is out of bounds default to zero */
8895                 if (up2tc > tc)
8896                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8897         }
8898
8899         if (reg != rsave)
8900                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8901
8902         return;
8903 }
8904
8905 /**
8906  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8907  * @adapter: Pointer to adapter struct
8908  *
8909  * Populate the netdev user priority to tc map
8910  */
8911 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8912 {
8913         struct net_device *dev = adapter->netdev;
8914         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8915         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8916         u8 prio;
8917
8918         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8919                 u8 tc = 0;
8920
8921                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8922                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8923                 else if (ets)
8924                         tc = ets->prio_tc[prio];
8925
8926                 netdev_set_prio_tc_map(dev, prio, tc);
8927         }
8928 }
8929
8930 #endif /* CONFIG_IXGBE_DCB */
8931 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
8932 {
8933         struct ixgbe_adapter *adapter = data;
8934         struct ixgbe_fwd_adapter *accel;
8935         int pool;
8936
8937         /* we only care about macvlans... */
8938         if (!netif_is_macvlan(vdev))
8939                 return 0;
8940
8941         /* that have hardware offload enabled... */
8942         accel = macvlan_accel_priv(vdev);
8943         if (!accel)
8944                 return 0;
8945
8946         /* If we can relocate to a different bit do so */
8947         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
8948         if (pool < adapter->num_rx_pools) {
8949                 set_bit(pool, adapter->fwd_bitmask);
8950                 accel->pool = pool;
8951                 return 0;
8952         }
8953
8954         /* if we cannot find a free pool then disable the offload */
8955         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
8956         macvlan_release_l2fw_offload(vdev);
8957
8958         /* unbind the queues and drop the subordinate channel config */
8959         netdev_unbind_sb_channel(adapter->netdev, vdev);
8960         netdev_set_sb_channel(vdev, 0);
8961
8962         kfree(accel);
8963
8964         return 0;
8965 }
8966
8967 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
8968 {
8969         struct ixgbe_adapter *adapter = netdev_priv(dev);
8970
8971         /* flush any stale bits out of the fwd bitmask */
8972         bitmap_clear(adapter->fwd_bitmask, 1, 63);
8973
8974         /* walk through upper devices reassigning pools */
8975         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
8976                                       adapter);
8977 }
8978
8979 /**
8980  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8981  *
8982  * @dev: net device to configure
8983  * @tc: number of traffic classes to enable
8984  */
8985 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8986 {
8987         struct ixgbe_adapter *adapter = netdev_priv(dev);
8988         struct ixgbe_hw *hw = &adapter->hw;
8989
8990         /* Hardware supports up to 8 traffic classes */
8991         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8992                 return -EINVAL;
8993
8994         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8995                 return -EINVAL;
8996
8997         /* Hardware has to reinitialize queues and interrupts to
8998          * match packet buffer alignment. Unfortunately, the
8999          * hardware is not flexible enough to do this dynamically.
9000          */
9001         if (netif_running(dev))
9002                 ixgbe_close(dev);
9003         else
9004                 ixgbe_reset(adapter);
9005
9006         ixgbe_clear_interrupt_scheme(adapter);
9007
9008 #ifdef CONFIG_IXGBE_DCB
9009         if (tc) {
9010                 if (adapter->xdp_prog) {
9011                         e_warn(probe, "DCB is not supported with XDP\n");
9012
9013                         ixgbe_init_interrupt_scheme(adapter);
9014                         if (netif_running(dev))
9015                                 ixgbe_open(dev);
9016                         return -EINVAL;
9017                 }
9018
9019                 netdev_set_num_tc(dev, tc);
9020                 ixgbe_set_prio_tc_map(adapter);
9021
9022                 adapter->hw_tcs = tc;
9023                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9024
9025                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9026                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9027                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9028                 }
9029         } else {
9030                 netdev_reset_tc(dev);
9031
9032                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9033                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9034
9035                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9036                 adapter->hw_tcs = tc;
9037
9038                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9039                 adapter->dcb_cfg.pfc_mode_enable = false;
9040         }
9041
9042         ixgbe_validate_rtr(adapter, tc);
9043
9044 #endif /* CONFIG_IXGBE_DCB */
9045         ixgbe_init_interrupt_scheme(adapter);
9046
9047         ixgbe_defrag_macvlan_pools(dev);
9048
9049         if (netif_running(dev))
9050                 return ixgbe_open(dev);
9051
9052         return 0;
9053 }
9054
9055 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9056                                struct tc_cls_u32_offload *cls)
9057 {
9058         u32 hdl = cls->knode.handle;
9059         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9060         u32 loc = cls->knode.handle & 0xfffff;
9061         int err = 0, i, j;
9062         struct ixgbe_jump_table *jump = NULL;
9063
9064         if (loc > IXGBE_MAX_HW_ENTRIES)
9065                 return -EINVAL;
9066
9067         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9068                 return -EINVAL;
9069
9070         /* Clear this filter in the link data it is associated with */
9071         if (uhtid != 0x800) {
9072                 jump = adapter->jump_tables[uhtid];
9073                 if (!jump)
9074                         return -EINVAL;
9075                 if (!test_bit(loc - 1, jump->child_loc_map))
9076                         return -EINVAL;
9077                 clear_bit(loc - 1, jump->child_loc_map);
9078         }
9079
9080         /* Check if the filter being deleted is a link */
9081         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9082                 jump = adapter->jump_tables[i];
9083                 if (jump && jump->link_hdl == hdl) {
9084                         /* Delete filters in the hardware in the child hash
9085                          * table associated with this link
9086                          */
9087                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9088                                 if (!test_bit(j, jump->child_loc_map))
9089                                         continue;
9090                                 spin_lock(&adapter->fdir_perfect_lock);
9091                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9092                                                                       NULL,
9093                                                                       j + 1);
9094                                 spin_unlock(&adapter->fdir_perfect_lock);
9095                                 clear_bit(j, jump->child_loc_map);
9096                         }
9097                         /* Remove resources for this link */
9098                         kfree(jump->input);
9099                         kfree(jump->mask);
9100                         kfree(jump);
9101                         adapter->jump_tables[i] = NULL;
9102                         return err;
9103                 }
9104         }
9105
9106         spin_lock(&adapter->fdir_perfect_lock);
9107         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9108         spin_unlock(&adapter->fdir_perfect_lock);
9109         return err;
9110 }
9111
9112 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9113                                             struct tc_cls_u32_offload *cls)
9114 {
9115         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9116
9117         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9118                 return -EINVAL;
9119
9120         /* This ixgbe devices do not support hash tables at the moment
9121          * so abort when given hash tables.
9122          */
9123         if (cls->hnode.divisor > 0)
9124                 return -EINVAL;
9125
9126         set_bit(uhtid - 1, &adapter->tables);
9127         return 0;
9128 }
9129
9130 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9131                                             struct tc_cls_u32_offload *cls)
9132 {
9133         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9134
9135         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9136                 return -EINVAL;
9137
9138         clear_bit(uhtid - 1, &adapter->tables);
9139         return 0;
9140 }
9141
9142 #ifdef CONFIG_NET_CLS_ACT
9143 struct upper_walk_data {
9144         struct ixgbe_adapter *adapter;
9145         u64 action;
9146         int ifindex;
9147         u8 queue;
9148 };
9149
9150 static int get_macvlan_queue(struct net_device *upper, void *_data)
9151 {
9152         if (netif_is_macvlan(upper)) {
9153                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9154                 struct upper_walk_data *data = _data;
9155                 struct ixgbe_adapter *adapter = data->adapter;
9156                 int ifindex = data->ifindex;
9157
9158                 if (vadapter && upper->ifindex == ifindex) {
9159                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9160                         data->action = data->queue;
9161                         return 1;
9162                 }
9163         }
9164
9165         return 0;
9166 }
9167
9168 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9169                                   u8 *queue, u64 *action)
9170 {
9171         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9172         unsigned int num_vfs = adapter->num_vfs, vf;
9173         struct upper_walk_data data;
9174         struct net_device *upper;
9175
9176         /* redirect to a SRIOV VF */
9177         for (vf = 0; vf < num_vfs; ++vf) {
9178                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9179                 if (upper->ifindex == ifindex) {
9180                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9181                         *action = vf + 1;
9182                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9183                         return 0;
9184                 }
9185         }
9186
9187         /* redirect to a offloaded macvlan netdev */
9188         data.adapter = adapter;
9189         data.ifindex = ifindex;
9190         data.action = 0;
9191         data.queue = 0;
9192         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9193                                           get_macvlan_queue, &data)) {
9194                 *action = data.action;
9195                 *queue = data.queue;
9196
9197                 return 0;
9198         }
9199
9200         return -EINVAL;
9201 }
9202
9203 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9204                             struct tcf_exts *exts, u64 *action, u8 *queue)
9205 {
9206         const struct tc_action *a;
9207         int i;
9208
9209         if (!tcf_exts_has_actions(exts))
9210                 return -EINVAL;
9211
9212         tcf_exts_for_each_action(i, a, exts) {
9213                 /* Drop action */
9214                 if (is_tcf_gact_shot(a)) {
9215                         *action = IXGBE_FDIR_DROP_QUEUE;
9216                         *queue = IXGBE_FDIR_DROP_QUEUE;
9217                         return 0;
9218                 }
9219
9220                 /* Redirect to a VF or a offloaded macvlan */
9221                 if (is_tcf_mirred_egress_redirect(a)) {
9222                         struct net_device *dev = tcf_mirred_dev(a);
9223
9224                         if (!dev)
9225                                 return -EINVAL;
9226                         return handle_redirect_action(adapter, dev->ifindex,
9227                                                       queue, action);
9228                 }
9229
9230                 return -EINVAL;
9231         }
9232
9233         return -EINVAL;
9234 }
9235 #else
9236 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9237                             struct tcf_exts *exts, u64 *action, u8 *queue)
9238 {
9239         return -EINVAL;
9240 }
9241 #endif /* CONFIG_NET_CLS_ACT */
9242
9243 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9244                                     union ixgbe_atr_input *mask,
9245                                     struct tc_cls_u32_offload *cls,
9246                                     struct ixgbe_mat_field *field_ptr,
9247                                     struct ixgbe_nexthdr *nexthdr)
9248 {
9249         int i, j, off;
9250         __be32 val, m;
9251         bool found_entry = false, found_jump_field = false;
9252
9253         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9254                 off = cls->knode.sel->keys[i].off;
9255                 val = cls->knode.sel->keys[i].val;
9256                 m = cls->knode.sel->keys[i].mask;
9257
9258                 for (j = 0; field_ptr[j].val; j++) {
9259                         if (field_ptr[j].off == off) {
9260                                 field_ptr[j].val(input, mask, (__force u32)val,
9261                                                  (__force u32)m);
9262                                 input->filter.formatted.flow_type |=
9263                                         field_ptr[j].type;
9264                                 found_entry = true;
9265                                 break;
9266                         }
9267                 }
9268                 if (nexthdr) {
9269                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9270                             nexthdr->val ==
9271                             (__force u32)cls->knode.sel->keys[i].val &&
9272                             nexthdr->mask ==
9273                             (__force u32)cls->knode.sel->keys[i].mask)
9274                                 found_jump_field = true;
9275                         else
9276                                 continue;
9277                 }
9278         }
9279
9280         if (nexthdr && !found_jump_field)
9281                 return -EINVAL;
9282
9283         if (!found_entry)
9284                 return 0;
9285
9286         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9287                                     IXGBE_ATR_L4TYPE_MASK;
9288
9289         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9290                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9291
9292         return 0;
9293 }
9294
9295 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9296                                   struct tc_cls_u32_offload *cls)
9297 {
9298         __be16 protocol = cls->common.protocol;
9299         u32 loc = cls->knode.handle & 0xfffff;
9300         struct ixgbe_hw *hw = &adapter->hw;
9301         struct ixgbe_mat_field *field_ptr;
9302         struct ixgbe_fdir_filter *input = NULL;
9303         union ixgbe_atr_input *mask = NULL;
9304         struct ixgbe_jump_table *jump = NULL;
9305         int i, err = -EINVAL;
9306         u8 queue;
9307         u32 uhtid, link_uhtid;
9308
9309         uhtid = TC_U32_USERHTID(cls->knode.handle);
9310         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9311
9312         /* At the moment cls_u32 jumps to network layer and skips past
9313          * L2 headers. The canonical method to match L2 frames is to use
9314          * negative values. However this is error prone at best but really
9315          * just broken because there is no way to "know" what sort of hdr
9316          * is in front of the network layer. Fix cls_u32 to support L2
9317          * headers when needed.
9318          */
9319         if (protocol != htons(ETH_P_IP))
9320                 return err;
9321
9322         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9323                 e_err(drv, "Location out of range\n");
9324                 return err;
9325         }
9326
9327         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9328          * links and also the fields used to advance the parser across each
9329          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9330          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9331          * To add support for new nodes update ixgbe_model.h parse structures
9332          * this function _should_ be generic try not to hardcode values here.
9333          */
9334         if (uhtid == 0x800) {
9335                 field_ptr = (adapter->jump_tables[0])->mat;
9336         } else {
9337                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9338                         return err;
9339                 if (!adapter->jump_tables[uhtid])
9340                         return err;
9341                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9342         }
9343
9344         if (!field_ptr)
9345                 return err;
9346
9347         /* At this point we know the field_ptr is valid and need to either
9348          * build cls_u32 link or attach filter. Because adding a link to
9349          * a handle that does not exist is invalid and the same for adding
9350          * rules to handles that don't exist.
9351          */
9352
9353         if (link_uhtid) {
9354                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9355
9356                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9357                         return err;
9358
9359                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9360                         return err;
9361
9362                 /* Multiple filters as links to the same hash table are not
9363                  * supported. To add a new filter with the same next header
9364                  * but different match/jump conditions, create a new hash table
9365                  * and link to it.
9366                  */
9367                 if (adapter->jump_tables[link_uhtid] &&
9368                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9369                         e_err(drv, "Link filter exists for link: %x\n",
9370                               link_uhtid);
9371                         return err;
9372                 }
9373
9374                 for (i = 0; nexthdr[i].jump; i++) {
9375                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9376                             nexthdr[i].s != cls->knode.sel->offshift ||
9377                             nexthdr[i].m !=
9378                             (__force u32)cls->knode.sel->offmask)
9379                                 return err;
9380
9381                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9382                         if (!jump)
9383                                 return -ENOMEM;
9384                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9385                         if (!input) {
9386                                 err = -ENOMEM;
9387                                 goto free_jump;
9388                         }
9389                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9390                         if (!mask) {
9391                                 err = -ENOMEM;
9392                                 goto free_input;
9393                         }
9394                         jump->input = input;
9395                         jump->mask = mask;
9396                         jump->link_hdl = cls->knode.handle;
9397
9398                         err = ixgbe_clsu32_build_input(input, mask, cls,
9399                                                        field_ptr, &nexthdr[i]);
9400                         if (!err) {
9401                                 jump->mat = nexthdr[i].jump;
9402                                 adapter->jump_tables[link_uhtid] = jump;
9403                                 break;
9404                         }
9405                 }
9406                 return 0;
9407         }
9408
9409         input = kzalloc(sizeof(*input), GFP_KERNEL);
9410         if (!input)
9411                 return -ENOMEM;
9412         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9413         if (!mask) {
9414                 err = -ENOMEM;
9415                 goto free_input;
9416         }
9417
9418         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9419                 if ((adapter->jump_tables[uhtid])->input)
9420                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9421                                sizeof(*input));
9422                 if ((adapter->jump_tables[uhtid])->mask)
9423                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9424                                sizeof(*mask));
9425
9426                 /* Lookup in all child hash tables if this location is already
9427                  * filled with a filter
9428                  */
9429                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9430                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9431
9432                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9433                                 e_err(drv, "Filter exists in location: %x\n",
9434                                       loc);
9435                                 err = -EINVAL;
9436                                 goto err_out;
9437                         }
9438                 }
9439         }
9440         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9441         if (err)
9442                 goto err_out;
9443
9444         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9445                                &queue);
9446         if (err < 0)
9447                 goto err_out;
9448
9449         input->sw_idx = loc;
9450
9451         spin_lock(&adapter->fdir_perfect_lock);
9452
9453         if (hlist_empty(&adapter->fdir_filter_list)) {
9454                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9455                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9456                 if (err)
9457                         goto err_out_w_lock;
9458         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9459                 err = -EINVAL;
9460                 goto err_out_w_lock;
9461         }
9462
9463         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9464         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9465                                                     input->sw_idx, queue);
9466         if (!err)
9467                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9468         spin_unlock(&adapter->fdir_perfect_lock);
9469
9470         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9471                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9472
9473         kfree(mask);
9474         return err;
9475 err_out_w_lock:
9476         spin_unlock(&adapter->fdir_perfect_lock);
9477 err_out:
9478         kfree(mask);
9479 free_input:
9480         kfree(input);
9481 free_jump:
9482         kfree(jump);
9483         return err;
9484 }
9485
9486 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9487                                   struct tc_cls_u32_offload *cls_u32)
9488 {
9489         switch (cls_u32->command) {
9490         case TC_CLSU32_NEW_KNODE:
9491         case TC_CLSU32_REPLACE_KNODE:
9492                 return ixgbe_configure_clsu32(adapter, cls_u32);
9493         case TC_CLSU32_DELETE_KNODE:
9494                 return ixgbe_delete_clsu32(adapter, cls_u32);
9495         case TC_CLSU32_NEW_HNODE:
9496         case TC_CLSU32_REPLACE_HNODE:
9497                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9498         case TC_CLSU32_DELETE_HNODE:
9499                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9500         default:
9501                 return -EOPNOTSUPP;
9502         }
9503 }
9504
9505 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9506                                    void *cb_priv)
9507 {
9508         struct ixgbe_adapter *adapter = cb_priv;
9509
9510         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9511                 return -EOPNOTSUPP;
9512
9513         switch (type) {
9514         case TC_SETUP_CLSU32:
9515                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9516         default:
9517                 return -EOPNOTSUPP;
9518         }
9519 }
9520
9521 static int ixgbe_setup_tc_block(struct net_device *dev,
9522                                 struct tc_block_offload *f)
9523 {
9524         struct ixgbe_adapter *adapter = netdev_priv(dev);
9525
9526         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9527                 return -EOPNOTSUPP;
9528
9529         switch (f->command) {
9530         case TC_BLOCK_BIND:
9531                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9532                                              adapter, adapter, f->extack);
9533         case TC_BLOCK_UNBIND:
9534                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9535                                         adapter);
9536                 return 0;
9537         default:
9538                 return -EOPNOTSUPP;
9539         }
9540 }
9541
9542 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9543                                  struct tc_mqprio_qopt *mqprio)
9544 {
9545         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9546         return ixgbe_setup_tc(dev, mqprio->num_tc);
9547 }
9548
9549 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9550                             void *type_data)
9551 {
9552         switch (type) {
9553         case TC_SETUP_BLOCK:
9554                 return ixgbe_setup_tc_block(dev, type_data);
9555         case TC_SETUP_QDISC_MQPRIO:
9556                 return ixgbe_setup_tc_mqprio(dev, type_data);
9557         default:
9558                 return -EOPNOTSUPP;
9559         }
9560 }
9561
9562 #ifdef CONFIG_PCI_IOV
9563 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9564 {
9565         struct net_device *netdev = adapter->netdev;
9566
9567         rtnl_lock();
9568         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9569         rtnl_unlock();
9570 }
9571
9572 #endif
9573 void ixgbe_do_reset(struct net_device *netdev)
9574 {
9575         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9576
9577         if (netif_running(netdev))
9578                 ixgbe_reinit_locked(adapter);
9579         else
9580                 ixgbe_reset(adapter);
9581 }
9582
9583 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9584                                             netdev_features_t features)
9585 {
9586         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9587
9588         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9589         if (!(features & NETIF_F_RXCSUM))
9590                 features &= ~NETIF_F_LRO;
9591
9592         /* Turn off LRO if not RSC capable */
9593         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9594                 features &= ~NETIF_F_LRO;
9595
9596         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9597                 e_dev_err("LRO is not supported with XDP\n");
9598                 features &= ~NETIF_F_LRO;
9599         }
9600
9601         return features;
9602 }
9603
9604 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9605 {
9606         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9607                         num_online_cpus());
9608
9609         /* go back to full RSS if we're not running SR-IOV */
9610         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9611                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9612                                     IXGBE_FLAG_SRIOV_ENABLED);
9613
9614         adapter->ring_feature[RING_F_RSS].limit = rss;
9615         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9616
9617         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9618 }
9619
9620 static int ixgbe_set_features(struct net_device *netdev,
9621                               netdev_features_t features)
9622 {
9623         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9624         netdev_features_t changed = netdev->features ^ features;
9625         bool need_reset = false;
9626
9627         /* Make sure RSC matches LRO, reset if change */
9628         if (!(features & NETIF_F_LRO)) {
9629                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9630                         need_reset = true;
9631                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9632         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9633                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9634                 if (adapter->rx_itr_setting == 1 ||
9635                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9636                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9637                         need_reset = true;
9638                 } else if ((changed ^ features) & NETIF_F_LRO) {
9639                         e_info(probe, "rx-usecs set too low, "
9640                                "disabling RSC\n");
9641                 }
9642         }
9643
9644         /*
9645          * Check if Flow Director n-tuple support or hw_tc support was
9646          * enabled or disabled.  If the state changed, we need to reset.
9647          */
9648         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9649                 /* turn off ATR, enable perfect filters and reset */
9650                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9651                         need_reset = true;
9652
9653                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9654                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9655         } else {
9656                 /* turn off perfect filters, enable ATR and reset */
9657                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9658                         need_reset = true;
9659
9660                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9661
9662                 /* We cannot enable ATR if SR-IOV is enabled */
9663                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9664                     /* We cannot enable ATR if we have 2 or more tcs */
9665                     (adapter->hw_tcs > 1) ||
9666                     /* We cannot enable ATR if RSS is disabled */
9667                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9668                     /* A sample rate of 0 indicates ATR disabled */
9669                     (!adapter->atr_sample_rate))
9670                         ; /* do nothing not supported */
9671                 else /* otherwise supported and set the flag */
9672                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9673         }
9674
9675         if (changed & NETIF_F_RXALL)
9676                 need_reset = true;
9677
9678         netdev->features = features;
9679
9680         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9681                 if (features & NETIF_F_RXCSUM) {
9682                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9683                 } else {
9684                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9685
9686                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9687                 }
9688         }
9689
9690         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9691                 if (features & NETIF_F_RXCSUM) {
9692                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9693                 } else {
9694                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9695
9696                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9697                 }
9698         }
9699
9700         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9701                 ixgbe_reset_l2fw_offload(adapter);
9702         else if (need_reset)
9703                 ixgbe_do_reset(netdev);
9704         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9705                             NETIF_F_HW_VLAN_CTAG_FILTER))
9706                 ixgbe_set_rx_mode(netdev);
9707
9708         return 0;
9709 }
9710
9711 /**
9712  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9713  * @dev: The port's netdev
9714  * @ti: Tunnel endpoint information
9715  **/
9716 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9717                                       struct udp_tunnel_info *ti)
9718 {
9719         struct ixgbe_adapter *adapter = netdev_priv(dev);
9720         struct ixgbe_hw *hw = &adapter->hw;
9721         __be16 port = ti->port;
9722         u32 port_shift = 0;
9723         u32 reg;
9724
9725         if (ti->sa_family != AF_INET)
9726                 return;
9727
9728         switch (ti->type) {
9729         case UDP_TUNNEL_TYPE_VXLAN:
9730                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9731                         return;
9732
9733                 if (adapter->vxlan_port == port)
9734                         return;
9735
9736                 if (adapter->vxlan_port) {
9737                         netdev_info(dev,
9738                                     "VXLAN port %d set, not adding port %d\n",
9739                                     ntohs(adapter->vxlan_port),
9740                                     ntohs(port));
9741                         return;
9742                 }
9743
9744                 adapter->vxlan_port = port;
9745                 break;
9746         case UDP_TUNNEL_TYPE_GENEVE:
9747                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9748                         return;
9749
9750                 if (adapter->geneve_port == port)
9751                         return;
9752
9753                 if (adapter->geneve_port) {
9754                         netdev_info(dev,
9755                                     "GENEVE port %d set, not adding port %d\n",
9756                                     ntohs(adapter->geneve_port),
9757                                     ntohs(port));
9758                         return;
9759                 }
9760
9761                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9762                 adapter->geneve_port = port;
9763                 break;
9764         default:
9765                 return;
9766         }
9767
9768         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9769         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9770 }
9771
9772 /**
9773  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9774  * @dev: The port's netdev
9775  * @ti: Tunnel endpoint information
9776  **/
9777 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9778                                       struct udp_tunnel_info *ti)
9779 {
9780         struct ixgbe_adapter *adapter = netdev_priv(dev);
9781         u32 port_mask;
9782
9783         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9784             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9785                 return;
9786
9787         if (ti->sa_family != AF_INET)
9788                 return;
9789
9790         switch (ti->type) {
9791         case UDP_TUNNEL_TYPE_VXLAN:
9792                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9793                         return;
9794
9795                 if (adapter->vxlan_port != ti->port) {
9796                         netdev_info(dev, "VXLAN port %d not found\n",
9797                                     ntohs(ti->port));
9798                         return;
9799                 }
9800
9801                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9802                 break;
9803         case UDP_TUNNEL_TYPE_GENEVE:
9804                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9805                         return;
9806
9807                 if (adapter->geneve_port != ti->port) {
9808                         netdev_info(dev, "GENEVE port %d not found\n",
9809                                     ntohs(ti->port));
9810                         return;
9811                 }
9812
9813                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9814                 break;
9815         default:
9816                 return;
9817         }
9818
9819         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9820         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9821 }
9822
9823 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9824                              struct net_device *dev,
9825                              const unsigned char *addr, u16 vid,
9826                              u16 flags)
9827 {
9828         /* guarantee we can provide a unique filter for the unicast address */
9829         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9830                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9831                 u16 pool = VMDQ_P(0);
9832
9833                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9834                         return -ENOMEM;
9835         }
9836
9837         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9838 }
9839
9840 /**
9841  * ixgbe_configure_bridge_mode - set various bridge modes
9842  * @adapter: the private structure
9843  * @mode: requested bridge mode
9844  *
9845  * Configure some settings require for various bridge modes.
9846  **/
9847 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9848                                        __u16 mode)
9849 {
9850         struct ixgbe_hw *hw = &adapter->hw;
9851         unsigned int p, num_pools;
9852         u32 vmdctl;
9853
9854         switch (mode) {
9855         case BRIDGE_MODE_VEPA:
9856                 /* disable Tx loopback, rely on switch hairpin mode */
9857                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9858
9859                 /* must enable Rx switching replication to allow multicast
9860                  * packet reception on all VFs, and to enable source address
9861                  * pruning.
9862                  */
9863                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9864                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9865                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9866
9867                 /* enable Rx source address pruning. Note, this requires
9868                  * replication to be enabled or else it does nothing.
9869                  */
9870                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9871                 for (p = 0; p < num_pools; p++) {
9872                         if (hw->mac.ops.set_source_address_pruning)
9873                                 hw->mac.ops.set_source_address_pruning(hw,
9874                                                                        true,
9875                                                                        p);
9876                 }
9877                 break;
9878         case BRIDGE_MODE_VEB:
9879                 /* enable Tx loopback for internal VF/PF communication */
9880                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9881                                 IXGBE_PFDTXGSWC_VT_LBEN);
9882
9883                 /* disable Rx switching replication unless we have SR-IOV
9884                  * virtual functions
9885                  */
9886                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9887                 if (!adapter->num_vfs)
9888                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9889                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9890
9891                 /* disable Rx source address pruning, since we don't expect to
9892                  * be receiving external loopback of our transmitted frames.
9893                  */
9894                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9895                 for (p = 0; p < num_pools; p++) {
9896                         if (hw->mac.ops.set_source_address_pruning)
9897                                 hw->mac.ops.set_source_address_pruning(hw,
9898                                                                        false,
9899                                                                        p);
9900                 }
9901                 break;
9902         default:
9903                 return -EINVAL;
9904         }
9905
9906         adapter->bridge_mode = mode;
9907
9908         e_info(drv, "enabling bridge mode: %s\n",
9909                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9910
9911         return 0;
9912 }
9913
9914 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9915                                     struct nlmsghdr *nlh, u16 flags)
9916 {
9917         struct ixgbe_adapter *adapter = netdev_priv(dev);
9918         struct nlattr *attr, *br_spec;
9919         int rem;
9920
9921         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9922                 return -EOPNOTSUPP;
9923
9924         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9925         if (!br_spec)
9926                 return -EINVAL;
9927
9928         nla_for_each_nested(attr, br_spec, rem) {
9929                 int status;
9930                 __u16 mode;
9931
9932                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9933                         continue;
9934
9935                 if (nla_len(attr) < sizeof(mode))
9936                         return -EINVAL;
9937
9938                 mode = nla_get_u16(attr);
9939                 status = ixgbe_configure_bridge_mode(adapter, mode);
9940                 if (status)
9941                         return status;
9942
9943                 break;
9944         }
9945
9946         return 0;
9947 }
9948
9949 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9950                                     struct net_device *dev,
9951                                     u32 filter_mask, int nlflags)
9952 {
9953         struct ixgbe_adapter *adapter = netdev_priv(dev);
9954
9955         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9956                 return 0;
9957
9958         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9959                                        adapter->bridge_mode, 0, 0, nlflags,
9960                                        filter_mask, NULL);
9961 }
9962
9963 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9964 {
9965         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9966         struct ixgbe_fwd_adapter *accel;
9967         int tcs = adapter->hw_tcs ? : 1;
9968         int pool, err;
9969
9970         if (adapter->xdp_prog) {
9971                 e_warn(probe, "L2FW offload is not supported with XDP\n");
9972                 return ERR_PTR(-EINVAL);
9973         }
9974
9975         /* The hardware supported by ixgbe only filters on the destination MAC
9976          * address. In order to avoid issues we only support offloading modes
9977          * where the hardware can actually provide the functionality.
9978          */
9979         if (!macvlan_supports_dest_filter(vdev))
9980                 return ERR_PTR(-EMEDIUMTYPE);
9981
9982         /* We need to lock down the macvlan to be a single queue device so that
9983          * we can reuse the tc_to_txq field in the macvlan netdev to represent
9984          * the queue mapping to our netdev.
9985          */
9986         if (netif_is_multiqueue(vdev))
9987                 return ERR_PTR(-ERANGE);
9988
9989         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9990         if (pool == adapter->num_rx_pools) {
9991                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
9992                 u16 reserved_pools;
9993
9994                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9995                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9996                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
9997                         return ERR_PTR(-EBUSY);
9998
9999                 /* Hardware has a limited number of available pools. Each VF,
10000                  * and the PF require a pool. Check to ensure we don't
10001                  * attempt to use more then the available number of pools.
10002                  */
10003                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10004                         return ERR_PTR(-EBUSY);
10005
10006                 /* Enable VMDq flag so device will be set in VM mode */
10007                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10008                                   IXGBE_FLAG_SRIOV_ENABLED;
10009
10010                 /* Try to reserve as many queues per pool as possible,
10011                  * we start with the configurations that support 4 queues
10012                  * per pools, followed by 2, and then by just 1 per pool.
10013                  */
10014                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10015                         reserved_pools = min_t(u16,
10016                                                32 - used_pools,
10017                                                16 - adapter->num_rx_pools);
10018                 else if (adapter->num_rx_pools < 32)
10019                         reserved_pools = min_t(u16,
10020                                                64 - used_pools,
10021                                                32 - adapter->num_rx_pools);
10022                 else
10023                         reserved_pools = 64 - used_pools;
10024
10025
10026                 if (!reserved_pools)
10027                         return ERR_PTR(-EBUSY);
10028
10029                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10030
10031                 /* Force reinit of ring allocation with VMDQ enabled */
10032                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10033                 if (err)
10034                         return ERR_PTR(err);
10035
10036                 if (pool >= adapter->num_rx_pools)
10037                         return ERR_PTR(-ENOMEM);
10038         }
10039
10040         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10041         if (!accel)
10042                 return ERR_PTR(-ENOMEM);
10043
10044         set_bit(pool, adapter->fwd_bitmask);
10045         netdev_set_sb_channel(vdev, pool);
10046         accel->pool = pool;
10047         accel->netdev = vdev;
10048
10049         if (!netif_running(pdev))
10050                 return accel;
10051
10052         err = ixgbe_fwd_ring_up(adapter, accel);
10053         if (err)
10054                 return ERR_PTR(err);
10055
10056         return accel;
10057 }
10058
10059 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10060 {
10061         struct ixgbe_fwd_adapter *accel = priv;
10062         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10063         unsigned int rxbase = accel->rx_base_queue;
10064         unsigned int i;
10065
10066         /* delete unicast filter associated with offloaded interface */
10067         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10068                              VMDQ_P(accel->pool));
10069
10070         /* Allow remaining Rx packets to get flushed out of the
10071          * Rx FIFO before we drop the netdev for the ring.
10072          */
10073         usleep_range(10000, 20000);
10074
10075         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10076                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10077                 struct ixgbe_q_vector *qv = ring->q_vector;
10078
10079                 /* Make sure we aren't processing any packets and clear
10080                  * netdev to shut down the ring.
10081                  */
10082                 if (netif_running(adapter->netdev))
10083                         napi_synchronize(&qv->napi);
10084                 ring->netdev = NULL;
10085         }
10086
10087         /* unbind the queues and drop the subordinate channel config */
10088         netdev_unbind_sb_channel(pdev, accel->netdev);
10089         netdev_set_sb_channel(accel->netdev, 0);
10090
10091         clear_bit(accel->pool, adapter->fwd_bitmask);
10092         kfree(accel);
10093 }
10094
10095 #define IXGBE_MAX_MAC_HDR_LEN           127
10096 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10097
10098 static netdev_features_t
10099 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10100                      netdev_features_t features)
10101 {
10102         unsigned int network_hdr_len, mac_hdr_len;
10103
10104         /* Make certain the headers can be described by a context descriptor */
10105         mac_hdr_len = skb_network_header(skb) - skb->data;
10106         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10107                 return features & ~(NETIF_F_HW_CSUM |
10108                                     NETIF_F_SCTP_CRC |
10109                                     NETIF_F_HW_VLAN_CTAG_TX |
10110                                     NETIF_F_TSO |
10111                                     NETIF_F_TSO6);
10112
10113         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10114         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10115                 return features & ~(NETIF_F_HW_CSUM |
10116                                     NETIF_F_SCTP_CRC |
10117                                     NETIF_F_TSO |
10118                                     NETIF_F_TSO6);
10119
10120         /* We can only support IPV4 TSO in tunnels if we can mangle the
10121          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10122          * IPsec offoad sets skb->encapsulation but still can handle
10123          * the TSO, so it's the exception.
10124          */
10125         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10126 #ifdef CONFIG_XFRM_OFFLOAD
10127                 if (!skb->sp)
10128 #endif
10129                         features &= ~NETIF_F_TSO;
10130         }
10131
10132         return features;
10133 }
10134
10135 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10136 {
10137         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10138         struct ixgbe_adapter *adapter = netdev_priv(dev);
10139         struct bpf_prog *old_prog;
10140
10141         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10142                 return -EINVAL;
10143
10144         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10145                 return -EINVAL;
10146
10147         /* verify ixgbe ring attributes are sufficient for XDP */
10148         for (i = 0; i < adapter->num_rx_queues; i++) {
10149                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10150
10151                 if (ring_is_rsc_enabled(ring))
10152                         return -EINVAL;
10153
10154                 if (frame_size > ixgbe_rx_bufsz(ring))
10155                         return -EINVAL;
10156         }
10157
10158         if (nr_cpu_ids > MAX_XDP_QUEUES)
10159                 return -ENOMEM;
10160
10161         old_prog = xchg(&adapter->xdp_prog, prog);
10162
10163         /* If transitioning XDP modes reconfigure rings */
10164         if (!!prog != !!old_prog) {
10165                 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10166
10167                 if (err) {
10168                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10169                         return -EINVAL;
10170                 }
10171         } else {
10172                 for (i = 0; i < adapter->num_rx_queues; i++)
10173                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10174                             adapter->xdp_prog);
10175         }
10176
10177         if (old_prog)
10178                 bpf_prog_put(old_prog);
10179
10180         return 0;
10181 }
10182
10183 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10184 {
10185         struct ixgbe_adapter *adapter = netdev_priv(dev);
10186
10187         switch (xdp->command) {
10188         case XDP_SETUP_PROG:
10189                 return ixgbe_xdp_setup(dev, xdp->prog);
10190         case XDP_QUERY_PROG:
10191                 xdp->prog_id = adapter->xdp_prog ?
10192                         adapter->xdp_prog->aux->id : 0;
10193                 return 0;
10194         default:
10195                 return -EINVAL;
10196         }
10197 }
10198
10199 static void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10200 {
10201         /* Force memory writes to complete before letting h/w know there
10202          * are new descriptors to fetch.
10203          */
10204         wmb();
10205         writel(ring->next_to_use, ring->tail);
10206 }
10207
10208 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10209                           struct xdp_frame **frames, u32 flags)
10210 {
10211         struct ixgbe_adapter *adapter = netdev_priv(dev);
10212         struct ixgbe_ring *ring;
10213         int drops = 0;
10214         int i;
10215
10216         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10217                 return -ENETDOWN;
10218
10219         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10220                 return -EINVAL;
10221
10222         /* During program transitions its possible adapter->xdp_prog is assigned
10223          * but ring has not been configured yet. In this case simply abort xmit.
10224          */
10225         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10226         if (unlikely(!ring))
10227                 return -ENXIO;
10228
10229         for (i = 0; i < n; i++) {
10230                 struct xdp_frame *xdpf = frames[i];
10231                 int err;
10232
10233                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10234                 if (err != IXGBE_XDP_TX) {
10235                         xdp_return_frame_rx_napi(xdpf);
10236                         drops++;
10237                 }
10238         }
10239
10240         if (unlikely(flags & XDP_XMIT_FLUSH))
10241                 ixgbe_xdp_ring_update_tail(ring);
10242
10243         return n - drops;
10244 }
10245
10246 static const struct net_device_ops ixgbe_netdev_ops = {
10247         .ndo_open               = ixgbe_open,
10248         .ndo_stop               = ixgbe_close,
10249         .ndo_start_xmit         = ixgbe_xmit_frame,
10250         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10251         .ndo_validate_addr      = eth_validate_addr,
10252         .ndo_set_mac_address    = ixgbe_set_mac,
10253         .ndo_change_mtu         = ixgbe_change_mtu,
10254         .ndo_tx_timeout         = ixgbe_tx_timeout,
10255         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10256         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10257         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10258         .ndo_do_ioctl           = ixgbe_ioctl,
10259         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10260         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10261         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10262         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10263         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10264         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10265         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10266         .ndo_get_stats64        = ixgbe_get_stats64,
10267         .ndo_setup_tc           = __ixgbe_setup_tc,
10268 #ifdef IXGBE_FCOE
10269         .ndo_select_queue       = ixgbe_select_queue,
10270         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10271         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10272         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10273         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10274         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10275         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10276         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10277 #endif /* IXGBE_FCOE */
10278         .ndo_set_features = ixgbe_set_features,
10279         .ndo_fix_features = ixgbe_fix_features,
10280         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10281         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10282         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10283         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10284         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10285         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10286         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10287         .ndo_features_check     = ixgbe_features_check,
10288         .ndo_bpf                = ixgbe_xdp,
10289         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10290 };
10291
10292 /**
10293  * ixgbe_enumerate_functions - Get the number of ports this device has
10294  * @adapter: adapter structure
10295  *
10296  * This function enumerates the phsyical functions co-located on a single slot,
10297  * in order to determine how many ports a device has. This is most useful in
10298  * determining the required GT/s of PCIe bandwidth necessary for optimal
10299  * performance.
10300  **/
10301 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10302 {
10303         struct pci_dev *entry, *pdev = adapter->pdev;
10304         int physfns = 0;
10305
10306         /* Some cards can not use the generic count PCIe functions method,
10307          * because they are behind a parent switch, so we hardcode these with
10308          * the correct number of functions.
10309          */
10310         if (ixgbe_pcie_from_parent(&adapter->hw))
10311                 physfns = 4;
10312
10313         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10314                 /* don't count virtual functions */
10315                 if (entry->is_virtfn)
10316                         continue;
10317
10318                 /* When the devices on the bus don't all match our device ID,
10319                  * we can't reliably determine the correct number of
10320                  * functions. This can occur if a function has been direct
10321                  * attached to a virtual machine using VT-d, for example. In
10322                  * this case, simply return -1 to indicate this.
10323                  */
10324                 if ((entry->vendor != pdev->vendor) ||
10325                     (entry->device != pdev->device))
10326                         return -1;
10327
10328                 physfns++;
10329         }
10330
10331         return physfns;
10332 }
10333
10334 /**
10335  * ixgbe_wol_supported - Check whether device supports WoL
10336  * @adapter: the adapter private structure
10337  * @device_id: the device ID
10338  * @subdevice_id: the subsystem device ID
10339  *
10340  * This function is used by probe and ethtool to determine
10341  * which devices have WoL support
10342  *
10343  **/
10344 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10345                          u16 subdevice_id)
10346 {
10347         struct ixgbe_hw *hw = &adapter->hw;
10348         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10349
10350         /* WOL not supported on 82598 */
10351         if (hw->mac.type == ixgbe_mac_82598EB)
10352                 return false;
10353
10354         /* check eeprom to see if WOL is enabled for X540 and newer */
10355         if (hw->mac.type >= ixgbe_mac_X540) {
10356                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10357                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10358                      (hw->bus.func == 0)))
10359                         return true;
10360         }
10361
10362         /* WOL is determined based on device IDs for 82599 MACs */
10363         switch (device_id) {
10364         case IXGBE_DEV_ID_82599_SFP:
10365                 /* Only these subdevices could supports WOL */
10366                 switch (subdevice_id) {
10367                 case IXGBE_SUBDEV_ID_82599_560FLR:
10368                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10369                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10370                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10371                         /* only support first port */
10372                         if (hw->bus.func != 0)
10373                                 break;
10374                         /* fall through */
10375                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10376                 case IXGBE_SUBDEV_ID_82599_SFP:
10377                 case IXGBE_SUBDEV_ID_82599_RNDC:
10378                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10379                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10380                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10381                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10382                         return true;
10383                 }
10384                 break;
10385         case IXGBE_DEV_ID_82599EN_SFP:
10386                 /* Only these subdevices support WOL */
10387                 switch (subdevice_id) {
10388                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10389                         return true;
10390                 }
10391                 break;
10392         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10393                 /* All except this subdevice support WOL */
10394                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10395                         return true;
10396                 break;
10397         case IXGBE_DEV_ID_82599_KX4:
10398                 return  true;
10399         default:
10400                 break;
10401         }
10402
10403         return false;
10404 }
10405
10406 /**
10407  * ixgbe_set_fw_version - Set FW version
10408  * @adapter: the adapter private structure
10409  *
10410  * This function is used by probe and ethtool to determine the FW version to
10411  * format to display. The FW version is taken from the EEPROM/NVM.
10412  */
10413 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10414 {
10415         struct ixgbe_hw *hw = &adapter->hw;
10416         struct ixgbe_nvm_version nvm_ver;
10417
10418         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10419         if (nvm_ver.oem_valid) {
10420                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10421                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10422                          nvm_ver.oem_release);
10423                 return;
10424         }
10425
10426         ixgbe_get_etk_id(hw, &nvm_ver);
10427         ixgbe_get_orom_version(hw, &nvm_ver);
10428
10429         if (nvm_ver.or_valid) {
10430                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10431                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10432                          nvm_ver.or_build, nvm_ver.or_patch);
10433                 return;
10434         }
10435
10436         /* Set ETrack ID format */
10437         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10438                  "0x%08x", nvm_ver.etk_id);
10439 }
10440
10441 /**
10442  * ixgbe_probe - Device Initialization Routine
10443  * @pdev: PCI device information struct
10444  * @ent: entry in ixgbe_pci_tbl
10445  *
10446  * Returns 0 on success, negative on failure
10447  *
10448  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10449  * The OS initialization, configuring of the adapter private structure,
10450  * and a hardware reset occur.
10451  **/
10452 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10453 {
10454         struct net_device *netdev;
10455         struct ixgbe_adapter *adapter = NULL;
10456         struct ixgbe_hw *hw;
10457         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10458         int i, err, pci_using_dac, expected_gts;
10459         unsigned int indices = MAX_TX_QUEUES;
10460         u8 part_str[IXGBE_PBANUM_LENGTH];
10461         bool disable_dev = false;
10462 #ifdef IXGBE_FCOE
10463         u16 device_caps;
10464 #endif
10465         u32 eec;
10466
10467         /* Catch broken hardware that put the wrong VF device ID in
10468          * the PCIe SR-IOV capability.
10469          */
10470         if (pdev->is_virtfn) {
10471                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10472                      pci_name(pdev), pdev->vendor, pdev->device);
10473                 return -EINVAL;
10474         }
10475
10476         err = pci_enable_device_mem(pdev);
10477         if (err)
10478                 return err;
10479
10480         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10481                 pci_using_dac = 1;
10482         } else {
10483                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10484                 if (err) {
10485                         dev_err(&pdev->dev,
10486                                 "No usable DMA configuration, aborting\n");
10487                         goto err_dma;
10488                 }
10489                 pci_using_dac = 0;
10490         }
10491
10492         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10493         if (err) {
10494                 dev_err(&pdev->dev,
10495                         "pci_request_selected_regions failed 0x%x\n", err);
10496                 goto err_pci_reg;
10497         }
10498
10499         pci_enable_pcie_error_reporting(pdev);
10500
10501         pci_set_master(pdev);
10502         pci_save_state(pdev);
10503
10504         if (ii->mac == ixgbe_mac_82598EB) {
10505 #ifdef CONFIG_IXGBE_DCB
10506                 /* 8 TC w/ 4 queues per TC */
10507                 indices = 4 * MAX_TRAFFIC_CLASS;
10508 #else
10509                 indices = IXGBE_MAX_RSS_INDICES;
10510 #endif
10511         }
10512
10513         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10514         if (!netdev) {
10515                 err = -ENOMEM;
10516                 goto err_alloc_etherdev;
10517         }
10518
10519         SET_NETDEV_DEV(netdev, &pdev->dev);
10520
10521         adapter = netdev_priv(netdev);
10522
10523         adapter->netdev = netdev;
10524         adapter->pdev = pdev;
10525         hw = &adapter->hw;
10526         hw->back = adapter;
10527         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10528
10529         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10530                               pci_resource_len(pdev, 0));
10531         adapter->io_addr = hw->hw_addr;
10532         if (!hw->hw_addr) {
10533                 err = -EIO;
10534                 goto err_ioremap;
10535         }
10536
10537         netdev->netdev_ops = &ixgbe_netdev_ops;
10538         ixgbe_set_ethtool_ops(netdev);
10539         netdev->watchdog_timeo = 5 * HZ;
10540         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10541
10542         /* Setup hw api */
10543         hw->mac.ops   = *ii->mac_ops;
10544         hw->mac.type  = ii->mac;
10545         hw->mvals     = ii->mvals;
10546         if (ii->link_ops)
10547                 hw->link.ops  = *ii->link_ops;
10548
10549         /* EEPROM */
10550         hw->eeprom.ops = *ii->eeprom_ops;
10551         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10552         if (ixgbe_removed(hw->hw_addr)) {
10553                 err = -EIO;
10554                 goto err_ioremap;
10555         }
10556         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10557         if (!(eec & BIT(8)))
10558                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10559
10560         /* PHY */
10561         hw->phy.ops = *ii->phy_ops;
10562         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10563         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10564         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10565         hw->phy.mdio.mmds = 0;
10566         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10567         hw->phy.mdio.dev = netdev;
10568         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10569         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10570
10571         /* setup the private structure */
10572         err = ixgbe_sw_init(adapter, ii);
10573         if (err)
10574                 goto err_sw_init;
10575
10576         /* Make sure the SWFW semaphore is in a valid state */
10577         if (hw->mac.ops.init_swfw_sync)
10578                 hw->mac.ops.init_swfw_sync(hw);
10579
10580         /* Make it possible the adapter to be woken up via WOL */
10581         switch (adapter->hw.mac.type) {
10582         case ixgbe_mac_82599EB:
10583         case ixgbe_mac_X540:
10584         case ixgbe_mac_X550:
10585         case ixgbe_mac_X550EM_x:
10586         case ixgbe_mac_x550em_a:
10587                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10588                 break;
10589         default:
10590                 break;
10591         }
10592
10593         /*
10594          * If there is a fan on this device and it has failed log the
10595          * failure.
10596          */
10597         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10598                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10599                 if (esdp & IXGBE_ESDP_SDP1)
10600                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10601         }
10602
10603         if (allow_unsupported_sfp)
10604                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10605
10606         /* reset_hw fills in the perm_addr as well */
10607         hw->phy.reset_if_overtemp = true;
10608         err = hw->mac.ops.reset_hw(hw);
10609         hw->phy.reset_if_overtemp = false;
10610         ixgbe_set_eee_capable(adapter);
10611         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10612                 err = 0;
10613         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10614                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10615                 e_dev_err("Reload the driver after installing a supported module.\n");
10616                 goto err_sw_init;
10617         } else if (err) {
10618                 e_dev_err("HW Init failed: %d\n", err);
10619                 goto err_sw_init;
10620         }
10621
10622 #ifdef CONFIG_PCI_IOV
10623         /* SR-IOV not supported on the 82598 */
10624         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10625                 goto skip_sriov;
10626         /* Mailbox */
10627         ixgbe_init_mbx_params_pf(hw);
10628         hw->mbx.ops = ii->mbx_ops;
10629         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10630         ixgbe_enable_sriov(adapter, max_vfs);
10631 skip_sriov:
10632
10633 #endif
10634         netdev->features = NETIF_F_SG |
10635                            NETIF_F_TSO |
10636                            NETIF_F_TSO6 |
10637                            NETIF_F_RXHASH |
10638                            NETIF_F_RXCSUM |
10639                            NETIF_F_HW_CSUM;
10640
10641 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10642                                     NETIF_F_GSO_GRE_CSUM | \
10643                                     NETIF_F_GSO_IPXIP4 | \
10644                                     NETIF_F_GSO_IPXIP6 | \
10645                                     NETIF_F_GSO_UDP_TUNNEL | \
10646                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10647
10648         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10649         netdev->features |= NETIF_F_GSO_PARTIAL |
10650                             IXGBE_GSO_PARTIAL_FEATURES;
10651
10652         if (hw->mac.type >= ixgbe_mac_82599EB)
10653                 netdev->features |= NETIF_F_SCTP_CRC;
10654
10655 #ifdef CONFIG_XFRM_OFFLOAD
10656 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10657                                  NETIF_F_HW_ESP_TX_CSUM | \
10658                                  NETIF_F_GSO_ESP)
10659
10660         if (adapter->ipsec)
10661                 netdev->features |= IXGBE_ESP_FEATURES;
10662 #endif
10663         /* copy netdev features into list of user selectable features */
10664         netdev->hw_features |= netdev->features |
10665                                NETIF_F_HW_VLAN_CTAG_FILTER |
10666                                NETIF_F_HW_VLAN_CTAG_RX |
10667                                NETIF_F_HW_VLAN_CTAG_TX |
10668                                NETIF_F_RXALL |
10669                                NETIF_F_HW_L2FW_DOFFLOAD;
10670
10671         if (hw->mac.type >= ixgbe_mac_82599EB)
10672                 netdev->hw_features |= NETIF_F_NTUPLE |
10673                                        NETIF_F_HW_TC;
10674
10675         if (pci_using_dac)
10676                 netdev->features |= NETIF_F_HIGHDMA;
10677
10678         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10679         netdev->hw_enc_features |= netdev->vlan_features;
10680         netdev->mpls_features |= NETIF_F_SG |
10681                                  NETIF_F_TSO |
10682                                  NETIF_F_TSO6 |
10683                                  NETIF_F_HW_CSUM;
10684         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10685
10686         /* set this bit last since it cannot be part of vlan_features */
10687         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10688                             NETIF_F_HW_VLAN_CTAG_RX |
10689                             NETIF_F_HW_VLAN_CTAG_TX;
10690
10691         netdev->priv_flags |= IFF_UNICAST_FLT;
10692         netdev->priv_flags |= IFF_SUPP_NOFCS;
10693
10694         /* MTU range: 68 - 9710 */
10695         netdev->min_mtu = ETH_MIN_MTU;
10696         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10697
10698 #ifdef CONFIG_IXGBE_DCB
10699         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10700                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10701 #endif
10702
10703 #ifdef IXGBE_FCOE
10704         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10705                 unsigned int fcoe_l;
10706
10707                 if (hw->mac.ops.get_device_caps) {
10708                         hw->mac.ops.get_device_caps(hw, &device_caps);
10709                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10710                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10711                 }
10712
10713
10714                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10715                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10716
10717                 netdev->features |= NETIF_F_FSO |
10718                                     NETIF_F_FCOE_CRC;
10719
10720                 netdev->vlan_features |= NETIF_F_FSO |
10721                                          NETIF_F_FCOE_CRC |
10722                                          NETIF_F_FCOE_MTU;
10723         }
10724 #endif /* IXGBE_FCOE */
10725         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10726                 netdev->hw_features |= NETIF_F_LRO;
10727         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10728                 netdev->features |= NETIF_F_LRO;
10729
10730         if (ixgbe_check_fw_error(adapter)) {
10731                 err = -EIO;
10732                 goto err_sw_init;
10733         }
10734
10735         /* make sure the EEPROM is good */
10736         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10737                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10738                 err = -EIO;
10739                 goto err_sw_init;
10740         }
10741
10742         eth_platform_get_mac_address(&adapter->pdev->dev,
10743                                      adapter->hw.mac.perm_addr);
10744
10745         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10746
10747         if (!is_valid_ether_addr(netdev->dev_addr)) {
10748                 e_dev_err("invalid MAC address\n");
10749                 err = -EIO;
10750                 goto err_sw_init;
10751         }
10752
10753         /* Set hw->mac.addr to permanent MAC address */
10754         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10755         ixgbe_mac_set_default_filter(adapter);
10756
10757         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10758
10759         if (ixgbe_removed(hw->hw_addr)) {
10760                 err = -EIO;
10761                 goto err_sw_init;
10762         }
10763         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10764         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10765         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10766
10767         err = ixgbe_init_interrupt_scheme(adapter);
10768         if (err)
10769                 goto err_sw_init;
10770
10771         for (i = 0; i < adapter->num_rx_queues; i++)
10772                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10773         for (i = 0; i < adapter->num_tx_queues; i++)
10774                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10775         for (i = 0; i < adapter->num_xdp_queues; i++)
10776                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10777
10778         /* WOL not supported for all devices */
10779         adapter->wol = 0;
10780         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10781         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10782                                                 pdev->subsystem_device);
10783         if (hw->wol_enabled)
10784                 adapter->wol = IXGBE_WUFC_MAG;
10785
10786         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10787
10788         /* save off EEPROM version number */
10789         ixgbe_set_fw_version(adapter);
10790
10791         /* pick up the PCI bus settings for reporting later */
10792         if (ixgbe_pcie_from_parent(hw))
10793                 ixgbe_get_parent_bus_info(adapter);
10794         else
10795                  hw->mac.ops.get_bus_info(hw);
10796
10797         /* calculate the expected PCIe bandwidth required for optimal
10798          * performance. Note that some older parts will never have enough
10799          * bandwidth due to being older generation PCIe parts. We clamp these
10800          * parts to ensure no warning is displayed if it can't be fixed.
10801          */
10802         switch (hw->mac.type) {
10803         case ixgbe_mac_82598EB:
10804                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10805                 break;
10806         default:
10807                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10808                 break;
10809         }
10810
10811         /* don't check link if we failed to enumerate functions */
10812         if (expected_gts > 0)
10813                 ixgbe_check_minimum_link(adapter, expected_gts);
10814
10815         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10816         if (err)
10817                 strlcpy(part_str, "Unknown", sizeof(part_str));
10818         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10819                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10820                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10821                            part_str);
10822         else
10823                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10824                            hw->mac.type, hw->phy.type, part_str);
10825
10826         e_dev_info("%pM\n", netdev->dev_addr);
10827
10828         /* reset the hardware with the new settings */
10829         err = hw->mac.ops.start_hw(hw);
10830         if (err == IXGBE_ERR_EEPROM_VERSION) {
10831                 /* We are running on a pre-production device, log a warning */
10832                 e_dev_warn("This device is a pre-production adapter/LOM. "
10833                            "Please be aware there may be issues associated "
10834                            "with your hardware.  If you are experiencing "
10835                            "problems please contact your Intel or hardware "
10836                            "representative who provided you with this "
10837                            "hardware.\n");
10838         }
10839         strcpy(netdev->name, "eth%d");
10840         pci_set_drvdata(pdev, adapter);
10841         err = register_netdev(netdev);
10842         if (err)
10843                 goto err_register;
10844
10845
10846         /* power down the optics for 82599 SFP+ fiber */
10847         if (hw->mac.ops.disable_tx_laser)
10848                 hw->mac.ops.disable_tx_laser(hw);
10849
10850         /* carrier off reporting is important to ethtool even BEFORE open */
10851         netif_carrier_off(netdev);
10852
10853 #ifdef CONFIG_IXGBE_DCA
10854         if (dca_add_requester(&pdev->dev) == 0) {
10855                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10856                 ixgbe_setup_dca(adapter);
10857         }
10858 #endif
10859         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10860                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10861                 for (i = 0; i < adapter->num_vfs; i++)
10862                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10863         }
10864
10865         /* firmware requires driver version to be 0xFFFFFFFF
10866          * since os does not support feature
10867          */
10868         if (hw->mac.ops.set_fw_drv_ver)
10869                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10870                                            sizeof(ixgbe_driver_version) - 1,
10871                                            ixgbe_driver_version);
10872
10873         /* add san mac addr to netdev */
10874         ixgbe_add_sanmac_netdev(netdev);
10875
10876         e_dev_info("%s\n", ixgbe_default_device_descr);
10877
10878 #ifdef CONFIG_IXGBE_HWMON
10879         if (ixgbe_sysfs_init(adapter))
10880                 e_err(probe, "failed to allocate sysfs resources\n");
10881 #endif /* CONFIG_IXGBE_HWMON */
10882
10883         ixgbe_dbg_adapter_init(adapter);
10884
10885         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10886         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10887                 hw->mac.ops.setup_link(hw,
10888                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10889                         true);
10890
10891         return 0;
10892
10893 err_register:
10894         ixgbe_release_hw_control(adapter);
10895         ixgbe_clear_interrupt_scheme(adapter);
10896 err_sw_init:
10897         ixgbe_disable_sriov(adapter);
10898         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10899         iounmap(adapter->io_addr);
10900         kfree(adapter->jump_tables[0]);
10901         kfree(adapter->mac_table);
10902         kfree(adapter->rss_key);
10903 err_ioremap:
10904         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10905         free_netdev(netdev);
10906 err_alloc_etherdev:
10907         pci_release_mem_regions(pdev);
10908 err_pci_reg:
10909 err_dma:
10910         if (!adapter || disable_dev)
10911                 pci_disable_device(pdev);
10912         return err;
10913 }
10914
10915 /**
10916  * ixgbe_remove - Device Removal Routine
10917  * @pdev: PCI device information struct
10918  *
10919  * ixgbe_remove is called by the PCI subsystem to alert the driver
10920  * that it should release a PCI device.  The could be caused by a
10921  * Hot-Plug event, or because the driver is going to be removed from
10922  * memory.
10923  **/
10924 static void ixgbe_remove(struct pci_dev *pdev)
10925 {
10926         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10927         struct net_device *netdev;
10928         bool disable_dev;
10929         int i;
10930
10931         /* if !adapter then we already cleaned up in probe */
10932         if (!adapter)
10933                 return;
10934
10935         netdev  = adapter->netdev;
10936         ixgbe_dbg_adapter_exit(adapter);
10937
10938         set_bit(__IXGBE_REMOVING, &adapter->state);
10939         cancel_work_sync(&adapter->service_task);
10940
10941
10942 #ifdef CONFIG_IXGBE_DCA
10943         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10944                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10945                 dca_remove_requester(&pdev->dev);
10946                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10947                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10948         }
10949
10950 #endif
10951 #ifdef CONFIG_IXGBE_HWMON
10952         ixgbe_sysfs_exit(adapter);
10953 #endif /* CONFIG_IXGBE_HWMON */
10954
10955         /* remove the added san mac */
10956         ixgbe_del_sanmac_netdev(netdev);
10957
10958 #ifdef CONFIG_PCI_IOV
10959         ixgbe_disable_sriov(adapter);
10960 #endif
10961         if (netdev->reg_state == NETREG_REGISTERED)
10962                 unregister_netdev(netdev);
10963
10964         ixgbe_stop_ipsec_offload(adapter);
10965         ixgbe_clear_interrupt_scheme(adapter);
10966
10967         ixgbe_release_hw_control(adapter);
10968
10969 #ifdef CONFIG_DCB
10970         kfree(adapter->ixgbe_ieee_pfc);
10971         kfree(adapter->ixgbe_ieee_ets);
10972
10973 #endif
10974         iounmap(adapter->io_addr);
10975         pci_release_mem_regions(pdev);
10976
10977         e_dev_info("complete\n");
10978
10979         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10980                 if (adapter->jump_tables[i]) {
10981                         kfree(adapter->jump_tables[i]->input);
10982                         kfree(adapter->jump_tables[i]->mask);
10983                 }
10984                 kfree(adapter->jump_tables[i]);
10985         }
10986
10987         kfree(adapter->mac_table);
10988         kfree(adapter->rss_key);
10989         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10990         free_netdev(netdev);
10991
10992         pci_disable_pcie_error_reporting(pdev);
10993
10994         if (disable_dev)
10995                 pci_disable_device(pdev);
10996 }
10997
10998 /**
10999  * ixgbe_io_error_detected - called when PCI error is detected
11000  * @pdev: Pointer to PCI device
11001  * @state: The current pci connection state
11002  *
11003  * This function is called after a PCI bus error affecting
11004  * this device has been detected.
11005  */
11006 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11007                                                 pci_channel_state_t state)
11008 {
11009         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11010         struct net_device *netdev = adapter->netdev;
11011
11012 #ifdef CONFIG_PCI_IOV
11013         struct ixgbe_hw *hw = &adapter->hw;
11014         struct pci_dev *bdev, *vfdev;
11015         u32 dw0, dw1, dw2, dw3;
11016         int vf, pos;
11017         u16 req_id, pf_func;
11018
11019         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11020             adapter->num_vfs == 0)
11021                 goto skip_bad_vf_detection;
11022
11023         bdev = pdev->bus->self;
11024         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11025                 bdev = bdev->bus->self;
11026
11027         if (!bdev)
11028                 goto skip_bad_vf_detection;
11029
11030         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11031         if (!pos)
11032                 goto skip_bad_vf_detection;
11033
11034         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11035         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11036         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11037         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11038         if (ixgbe_removed(hw->hw_addr))
11039                 goto skip_bad_vf_detection;
11040
11041         req_id = dw1 >> 16;
11042         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11043         if (!(req_id & 0x0080))
11044                 goto skip_bad_vf_detection;
11045
11046         pf_func = req_id & 0x01;
11047         if ((pf_func & 1) == (pdev->devfn & 1)) {
11048                 unsigned int device_id;
11049
11050                 vf = (req_id & 0x7F) >> 1;
11051                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11052                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11053                                 "%8.8x\tdw3: %8.8x\n",
11054                 dw0, dw1, dw2, dw3);
11055                 switch (adapter->hw.mac.type) {
11056                 case ixgbe_mac_82599EB:
11057                         device_id = IXGBE_82599_VF_DEVICE_ID;
11058                         break;
11059                 case ixgbe_mac_X540:
11060                         device_id = IXGBE_X540_VF_DEVICE_ID;
11061                         break;
11062                 case ixgbe_mac_X550:
11063                         device_id = IXGBE_DEV_ID_X550_VF;
11064                         break;
11065                 case ixgbe_mac_X550EM_x:
11066                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11067                         break;
11068                 case ixgbe_mac_x550em_a:
11069                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11070                         break;
11071                 default:
11072                         device_id = 0;
11073                         break;
11074                 }
11075
11076                 /* Find the pci device of the offending VF */
11077                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11078                 while (vfdev) {
11079                         if (vfdev->devfn == (req_id & 0xFF))
11080                                 break;
11081                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11082                                                device_id, vfdev);
11083                 }
11084                 /*
11085                  * There's a slim chance the VF could have been hot plugged,
11086                  * so if it is no longer present we don't need to issue the
11087                  * VFLR.  Just clean up the AER in that case.
11088                  */
11089                 if (vfdev) {
11090                         pcie_flr(vfdev);
11091                         /* Free device reference count */
11092                         pci_dev_put(vfdev);
11093                 }
11094
11095                 pci_cleanup_aer_uncorrect_error_status(pdev);
11096         }
11097
11098         /*
11099          * Even though the error may have occurred on the other port
11100          * we still need to increment the vf error reference count for
11101          * both ports because the I/O resume function will be called
11102          * for both of them.
11103          */
11104         adapter->vferr_refcount++;
11105
11106         return PCI_ERS_RESULT_RECOVERED;
11107
11108 skip_bad_vf_detection:
11109 #endif /* CONFIG_PCI_IOV */
11110         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11111                 return PCI_ERS_RESULT_DISCONNECT;
11112
11113         if (!netif_device_present(netdev))
11114                 return PCI_ERS_RESULT_DISCONNECT;
11115
11116         rtnl_lock();
11117         netif_device_detach(netdev);
11118
11119         if (netif_running(netdev))
11120                 ixgbe_close_suspend(adapter);
11121
11122         if (state == pci_channel_io_perm_failure) {
11123                 rtnl_unlock();
11124                 return PCI_ERS_RESULT_DISCONNECT;
11125         }
11126
11127         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11128                 pci_disable_device(pdev);
11129         rtnl_unlock();
11130
11131         /* Request a slot reset. */
11132         return PCI_ERS_RESULT_NEED_RESET;
11133 }
11134
11135 /**
11136  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11137  * @pdev: Pointer to PCI device
11138  *
11139  * Restart the card from scratch, as if from a cold-boot.
11140  */
11141 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11142 {
11143         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11144         pci_ers_result_t result;
11145         int err;
11146
11147         if (pci_enable_device_mem(pdev)) {
11148                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11149                 result = PCI_ERS_RESULT_DISCONNECT;
11150         } else {
11151                 smp_mb__before_atomic();
11152                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11153                 adapter->hw.hw_addr = adapter->io_addr;
11154                 pci_set_master(pdev);
11155                 pci_restore_state(pdev);
11156                 pci_save_state(pdev);
11157
11158                 pci_wake_from_d3(pdev, false);
11159
11160                 ixgbe_reset(adapter);
11161                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11162                 result = PCI_ERS_RESULT_RECOVERED;
11163         }
11164
11165         err = pci_cleanup_aer_uncorrect_error_status(pdev);
11166         if (err) {
11167                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
11168                           "failed 0x%0x\n", err);
11169                 /* non-fatal, continue */
11170         }
11171
11172         return result;
11173 }
11174
11175 /**
11176  * ixgbe_io_resume - called when traffic can start flowing again.
11177  * @pdev: Pointer to PCI device
11178  *
11179  * This callback is called when the error recovery driver tells us that
11180  * its OK to resume normal operation.
11181  */
11182 static void ixgbe_io_resume(struct pci_dev *pdev)
11183 {
11184         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11185         struct net_device *netdev = adapter->netdev;
11186
11187 #ifdef CONFIG_PCI_IOV
11188         if (adapter->vferr_refcount) {
11189                 e_info(drv, "Resuming after VF err\n");
11190                 adapter->vferr_refcount--;
11191                 return;
11192         }
11193
11194 #endif
11195         rtnl_lock();
11196         if (netif_running(netdev))
11197                 ixgbe_open(netdev);
11198
11199         netif_device_attach(netdev);
11200         rtnl_unlock();
11201 }
11202
11203 static const struct pci_error_handlers ixgbe_err_handler = {
11204         .error_detected = ixgbe_io_error_detected,
11205         .slot_reset = ixgbe_io_slot_reset,
11206         .resume = ixgbe_io_resume,
11207 };
11208
11209 static struct pci_driver ixgbe_driver = {
11210         .name     = ixgbe_driver_name,
11211         .id_table = ixgbe_pci_tbl,
11212         .probe    = ixgbe_probe,
11213         .remove   = ixgbe_remove,
11214 #ifdef CONFIG_PM
11215         .suspend  = ixgbe_suspend,
11216         .resume   = ixgbe_resume,
11217 #endif
11218         .shutdown = ixgbe_shutdown,
11219         .sriov_configure = ixgbe_pci_sriov_configure,
11220         .err_handler = &ixgbe_err_handler
11221 };
11222
11223 /**
11224  * ixgbe_init_module - Driver Registration Routine
11225  *
11226  * ixgbe_init_module is the first routine called when the driver is
11227  * loaded. All it does is register with the PCI subsystem.
11228  **/
11229 static int __init ixgbe_init_module(void)
11230 {
11231         int ret;
11232         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11233         pr_info("%s\n", ixgbe_copyright);
11234
11235         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11236         if (!ixgbe_wq) {
11237                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11238                 return -ENOMEM;
11239         }
11240
11241         ixgbe_dbg_init();
11242
11243         ret = pci_register_driver(&ixgbe_driver);
11244         if (ret) {
11245                 destroy_workqueue(ixgbe_wq);
11246                 ixgbe_dbg_exit();
11247                 return ret;
11248         }
11249
11250 #ifdef CONFIG_IXGBE_DCA
11251         dca_register_notify(&dca_notifier);
11252 #endif
11253
11254         return 0;
11255 }
11256
11257 module_init(ixgbe_init_module);
11258
11259 /**
11260  * ixgbe_exit_module - Driver Exit Cleanup Routine
11261  *
11262  * ixgbe_exit_module is called just before the driver is removed
11263  * from memory.
11264  **/
11265 static void __exit ixgbe_exit_module(void)
11266 {
11267 #ifdef CONFIG_IXGBE_DCA
11268         dca_unregister_notify(&dca_notifier);
11269 #endif
11270         pci_unregister_driver(&ixgbe_driver);
11271
11272         ixgbe_dbg_exit();
11273         if (ixgbe_wq) {
11274                 destroy_workqueue(ixgbe_wq);
11275                 ixgbe_wq = NULL;
11276         }
11277 }
11278
11279 #ifdef CONFIG_IXGBE_DCA
11280 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11281                             void *p)
11282 {
11283         int ret_val;
11284
11285         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11286                                          __ixgbe_notify_dca);
11287
11288         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11289 }
11290
11291 #endif /* CONFIG_IXGBE_DCA */
11292
11293 module_exit(ixgbe_exit_module);
11294
11295 /* ixgbe_main.c */