drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static const struct net_device_ops ixgbe_netdev_ops;
 196
 197 static bool netif_is_ixgbe(struct net_device *dev)
 198 {
 199         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 200 }
 201
 202 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 203                                           u32 reg, u16 *value)
 204 {
 205         struct pci_dev *parent_dev;
 206         struct pci_bus *parent_bus;
 207
 208         parent_bus = adapter->pdev->bus->parent;
 209         if (!parent_bus)
 210                 return -1;
 211
 212         parent_dev = parent_bus->self;
 213         if (!parent_dev)
 214                 return -1;
 215
 216         if (!pci_is_pcie(parent_dev))
 217                 return -1;
 218
 219         pcie_capability_read_word(parent_dev, reg, value);
 220         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 221             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 222                 return -1;
 223         return 0;
 224 }
 225
 226 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 227 {
 228         struct ixgbe_hw *hw = &adapter->hw;
 229         u16 link_status = 0;
 230         int err;
 231
 232         hw->bus.type = ixgbe_bus_type_pci_express;
 233
 234         /* Get the negotiated link width and speed from PCI config space of the
 235          * parent, as this device is behind a switch
 236          */
 237         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 238
 239         /* assume caller will handle error case */
 240         if (err)
 241                 return err;
 242
 243         hw->bus.width = ixgbe_convert_bus_width(link_status);
 244         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 245
 246         return 0;
 247 }
 248
 249 /**
 250  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 251  * @hw: hw specific details
 252  *
 253  * This function is used by probe to determine whether a device's PCI-Express
 254  * bandwidth details should be gathered from the parent bus instead of from the
 255  * device. Used to ensure that various locations all have the correct device ID
 256  * checks.
 257  */
 258 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 259 {
 260         switch (hw->device_id) {
 261         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 262         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 263                 return true;
 264         default:
 265                 return false;
 266         }
 267 }
 268
 269 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 270                                      int expected_gts)
 271 {
 272         struct ixgbe_hw *hw = &adapter->hw;
 273         int max_gts = 0;
 274         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 275         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 276         struct pci_dev *pdev;
 277
 278         /* Some devices are not connected over PCIe and thus do not negotiate
 279          * speed. These devices do not have valid bus info, and thus any report
 280          * we generate may not be correct.
 281          */
 282         if (hw->bus.type == ixgbe_bus_type_internal)
 283                 return;
 284
 285         /* determine whether to use the parent device */
 286         if (ixgbe_pcie_from_parent(&adapter->hw))
 287                 pdev = adapter->pdev->bus->parent->self;
 288         else
 289                 pdev = adapter->pdev;
 290
 291         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 292             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 293                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 294                 return;
 295         }
 296
 297         switch (speed) {
 298         case PCIE_SPEED_2_5GT:
 299                 /* 8b/10b encoding reduces max throughput by 20% */
 300                 max_gts = 2 * width;
 301                 break;
 302         case PCIE_SPEED_5_0GT:
 303                 /* 8b/10b encoding reduces max throughput by 20% */
 304                 max_gts = 4 * width;
 305                 break;
 306         case PCIE_SPEED_8_0GT:
 307                 /* 128b/130b encoding reduces throughput by less than 2% */
 308                 max_gts = 8 * width;
 309                 break;
 310         default:
 311                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 312                 return;
 313         }
 314
 315         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 316                    max_gts);
 317         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 318                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 319                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 320                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 321                     "Unknown"),
 322                    width,
 323                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 324                     speed == PCIE_SPEED_5_0GT ? "20%" :
 325                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 326                     "Unknown"));
 327
 328         if (max_gts < expected_gts) {
 329                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 330                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 331                         expected_gts);
 332                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 333         }
 334 }
 335
 336 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 337 {
 338         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 339             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 340             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 341                 queue_work(ixgbe_wq, &adapter->service_task);
 342 }
 343
 344 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 345 {
 346         struct ixgbe_adapter *adapter = hw->back;
 347
 348         if (!hw->hw_addr)
 349                 return;
 350         hw->hw_addr = NULL;
 351         e_dev_err("Adapter removed\n");
 352         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 353                 ixgbe_service_event_schedule(adapter);
 354 }
 355
 356 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 357 {
 358         u32 value;
 359
 360         /* The following check not only optimizes a bit by not
 361          * performing a read on the status register when the
 362          * register just read was a status register read that
 363          * returned IXGBE_FAILED_READ_REG. It also blocks any
 364          * potential recursion.
 365          */
 366         if (reg == IXGBE_STATUS) {
 367                 ixgbe_remove_adapter(hw);
 368                 return;
 369         }
 370         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 371         if (value == IXGBE_FAILED_READ_REG)
 372                 ixgbe_remove_adapter(hw);
 373 }
 374
 375 /**
 376  * ixgbe_read_reg - Read from device register
 377  * @hw: hw specific details
 378  * @reg: offset of register to read
 379  *
 380  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 381  *
 382  * This function is used to read device registers. It checks for device
 383  * removal by confirming any read that returns all ones by checking the
 384  * status register value for all ones. This function avoids reading from
 385  * the hardware if a removal was previously detected in which case it
 386  * returns IXGBE_FAILED_READ_REG (all ones).
 387  */
 388 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 389 {
 390         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 391         u32 value;
 392
 393         if (ixgbe_removed(reg_addr))
 394                 return IXGBE_FAILED_READ_REG;
 395         if (unlikely(hw->phy.nw_mng_if_sel &
 396                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 397                 struct ixgbe_adapter *adapter;
 398                 int i;
 399
 400                 for (i = 0; i < 200; ++i) {
 401                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 402                         if (likely(!value))
 403                                 goto writes_completed;
 404                         if (value == IXGBE_FAILED_READ_REG) {
 405                                 ixgbe_remove_adapter(hw);
 406                                 return IXGBE_FAILED_READ_REG;
 407                         }
 408                         udelay(5);
 409                 }
 410
 411                 adapter = hw->back;
 412                 e_warn(hw, "register writes incomplete %08x\n", value);
 413         }
 414
 415 writes_completed:
 416         value = readl(reg_addr + reg);
 417         if (unlikely(value == IXGBE_FAILED_READ_REG))
 418                 ixgbe_check_remove(hw, reg);
 419         return value;
 420 }
 421
 422 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 423 {
 424         u16 value;
 425
 426         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 427         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 428                 ixgbe_remove_adapter(hw);
 429                 return true;
 430         }
 431         return false;
 432 }
 433
 434 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 435 {
 436         struct ixgbe_adapter *adapter = hw->back;
 437         u16 value;
 438
 439         if (ixgbe_removed(hw->hw_addr))
 440                 return IXGBE_FAILED_READ_CFG_WORD;
 441         pci_read_config_word(adapter->pdev, reg, &value);
 442         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 443             ixgbe_check_cfg_remove(hw, adapter->pdev))
 444                 return IXGBE_FAILED_READ_CFG_WORD;
 445         return value;
 446 }
 447
 448 #ifdef CONFIG_PCI_IOV
 449 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 450 {
 451         struct ixgbe_adapter *adapter = hw->back;
 452         u32 value;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return IXGBE_FAILED_READ_CFG_DWORD;
 456         pci_read_config_dword(adapter->pdev, reg, &value);
 457         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 458             ixgbe_check_cfg_remove(hw, adapter->pdev))
 459                 return IXGBE_FAILED_READ_CFG_DWORD;
 460         return value;
 461 }
 462 #endif /* CONFIG_PCI_IOV */
 463
 464 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 465 {
 466         struct ixgbe_adapter *adapter = hw->back;
 467
 468         if (ixgbe_removed(hw->hw_addr))
 469                 return;
 470         pci_write_config_word(adapter->pdev, reg, value);
 471 }
 472
 473 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 474 {
 475         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 476
 477         /* flush memory to make sure state is correct before next watchdog */
 478         smp_mb__before_atomic();
 479         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 480 }
 481
 482 struct ixgbe_reg_info {
 483         u32 ofs;
 484         char *name;
 485 };
 486
 487 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 488
 489         /* General Registers */
 490         {IXGBE_CTRL, "CTRL"},
 491         {IXGBE_STATUS, "STATUS"},
 492         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 493
 494         /* Interrupt Registers */
 495         {IXGBE_EICR, "EICR"},
 496
 497         /* RX Registers */
 498         {IXGBE_SRRCTL(0), "SRRCTL"},
 499         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 500         {IXGBE_RDLEN(0), "RDLEN"},
 501         {IXGBE_RDH(0), "RDH"},
 502         {IXGBE_RDT(0), "RDT"},
 503         {IXGBE_RXDCTL(0), "RXDCTL"},
 504         {IXGBE_RDBAL(0), "RDBAL"},
 505         {IXGBE_RDBAH(0), "RDBAH"},
 506
 507         /* TX Registers */
 508         {IXGBE_TDBAL(0), "TDBAL"},
 509         {IXGBE_TDBAH(0), "TDBAH"},
 510         {IXGBE_TDLEN(0), "TDLEN"},
 511         {IXGBE_TDH(0), "TDH"},
 512         {IXGBE_TDT(0), "TDT"},
 513         {IXGBE_TXDCTL(0), "TXDCTL"},
 514
 515         /* List Terminator */
 516         { .name = NULL }
 517 };
 518
 519
 520 /*
 521  * ixgbe_regdump - register printout routine
 522  */
 523 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 524 {
 525         int i;
 526         char rname[16];
 527         u32 regs[64];
 528
 529         switch (reginfo->ofs) {
 530         case IXGBE_SRRCTL(0):
 531                 for (i = 0; i < 64; i++)
 532                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 533                 break;
 534         case IXGBE_DCA_RXCTRL(0):
 535                 for (i = 0; i < 64; i++)
 536                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 537                 break;
 538         case IXGBE_RDLEN(0):
 539                 for (i = 0; i < 64; i++)
 540                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 541                 break;
 542         case IXGBE_RDH(0):
 543                 for (i = 0; i < 64; i++)
 544                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 545                 break;
 546         case IXGBE_RDT(0):
 547                 for (i = 0; i < 64; i++)
 548                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 549                 break;
 550         case IXGBE_RXDCTL(0):
 551                 for (i = 0; i < 64; i++)
 552                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 553                 break;
 554         case IXGBE_RDBAL(0):
 555                 for (i = 0; i < 64; i++)
 556                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 557                 break;
 558         case IXGBE_RDBAH(0):
 559                 for (i = 0; i < 64; i++)
 560                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 561                 break;
 562         case IXGBE_TDBAL(0):
 563                 for (i = 0; i < 64; i++)
 564                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 565                 break;
 566         case IXGBE_TDBAH(0):
 567                 for (i = 0; i < 64; i++)
 568                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 569                 break;
 570         case IXGBE_TDLEN(0):
 571                 for (i = 0; i < 64; i++)
 572                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 573                 break;
 574         case IXGBE_TDH(0):
 575                 for (i = 0; i < 64; i++)
 576                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 577                 break;
 578         case IXGBE_TDT(0):
 579                 for (i = 0; i < 64; i++)
 580                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 581                 break;
 582         case IXGBE_TXDCTL(0):
 583                 for (i = 0; i < 64; i++)
 584                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 585                 break;
 586         default:
 587                 pr_info("%-15s %08x\n",
 588                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 589                 return;
 590         }
 591
 592         i = 0;
 593         while (i < 64) {
 594                 int j;
 595                 char buf[9 * 8 + 1];
 596                 char *p = buf;
 597
 598                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 599                 for (j = 0; j < 8; j++)
 600                         p += sprintf(p, " %08x", regs[i++]);
 601                 pr_err("%-15s%s\n", rname, buf);
 602         }
 603
 604 }
 605
 606 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 607 {
 608         struct ixgbe_tx_buffer *tx_buffer;
 609
 610         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 611         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 612                 n, ring->next_to_use, ring->next_to_clean,
 613                 (u64)dma_unmap_addr(tx_buffer, dma),
 614                 dma_unmap_len(tx_buffer, len),
 615                 tx_buffer->next_to_watch,
 616                 (u64)tx_buffer->time_stamp);
 617 }
 618
 619 /*
 620  * ixgbe_dump - Print registers, tx-rings and rx-rings
 621  */
 622 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 623 {
 624         struct net_device *netdev = adapter->netdev;
 625         struct ixgbe_hw *hw = &adapter->hw;
 626         struct ixgbe_reg_info *reginfo;
 627         int n = 0;
 628         struct ixgbe_ring *ring;
 629         struct ixgbe_tx_buffer *tx_buffer;
 630         union ixgbe_adv_tx_desc *tx_desc;
 631         struct my_u0 { u64 a; u64 b; } *u0;
 632         struct ixgbe_ring *rx_ring;
 633         union ixgbe_adv_rx_desc *rx_desc;
 634         struct ixgbe_rx_buffer *rx_buffer_info;
 635         int i = 0;
 636
 637         if (!netif_msg_hw(adapter))
 638                 return;
 639
 640         /* Print netdevice Info */
 641         if (netdev) {
 642                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 643                 pr_info("Device Name     state            "
 644                         "trans_start\n");
 645                 pr_info("%-15s %016lX %016lX\n",
 646                         netdev->name,
 647                         netdev->state,
 648                         dev_trans_start(netdev));
 649         }
 650
 651         /* Print Registers */
 652         dev_info(&adapter->pdev->dev, "Register Dump\n");
 653         pr_info(" Register Name   Value\n");
 654         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 655              reginfo->name; reginfo++) {
 656                 ixgbe_regdump(hw, reginfo);
 657         }
 658
 659         /* Print TX Ring Summary */
 660         if (!netdev || !netif_running(netdev))
 661                 return;
 662
 663         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 664         pr_info(" %s     %s              %s        %s\n",
 665                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 666                 "leng", "ntw", "timestamp");
 667         for (n = 0; n < adapter->num_tx_queues; n++) {
 668                 ring = adapter->tx_ring[n];
 669                 ixgbe_print_buffer(ring, n);
 670         }
 671
 672         for (n = 0; n < adapter->num_xdp_queues; n++) {
 673                 ring = adapter->xdp_ring[n];
 674                 ixgbe_print_buffer(ring, n);
 675         }
 676
 677         /* Print TX Rings */
 678         if (!netif_msg_tx_done(adapter))
 679                 goto rx_ring_summary;
 680
 681         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 682
 683         /* Transmit Descriptor Formats
 684          *
 685          * 82598 Advanced Transmit Descriptor
 686          *   +--------------------------------------------------------------+
 687          * 0 |         Buffer Address [63:0]                                |
 688          *   +--------------------------------------------------------------+
 689          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 690          *   +--------------------------------------------------------------+
 691          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 692          *
 693          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 694          *   +--------------------------------------------------------------+
 695          * 0 |                          RSV [63:0]                          |
 696          *   +--------------------------------------------------------------+
 697          * 8 |            RSV           |  STA  |          NXTSEQ           |
 698          *   +--------------------------------------------------------------+
 699          *   63                       36 35   32 31                         0
 700          *
 701          * 82599+ Advanced Transmit Descriptor
 702          *   +--------------------------------------------------------------+
 703          * 0 |         Buffer Address [63:0]                                |
 704          *   +--------------------------------------------------------------+
 705          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 706          *   +--------------------------------------------------------------+
 707          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 708          *
 709          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 710          *   +--------------------------------------------------------------+
 711          * 0 |                          RSV [63:0]                          |
 712          *   +--------------------------------------------------------------+
 713          * 8 |            RSV           |  STA  |           RSV             |
 714          *   +--------------------------------------------------------------+
 715          *   63                       36 35   32 31                         0
 716          */
 717
 718         for (n = 0; n < adapter->num_tx_queues; n++) {
 719                 ring = adapter->tx_ring[n];
 720                 pr_info("------------------------------------\n");
 721                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 722                 pr_info("------------------------------------\n");
 723                 pr_info("%s%s    %s              %s        %s          %s\n",
 724                         "T [desc]     [address 63:0  ] ",
 725                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 726                         "leng", "ntw", "timestamp", "bi->skb");
 727
 728                 for (i = 0; ring->desc && (i < ring->count); i++) {
 729                         tx_desc = IXGBE_TX_DESC(ring, i);
 730                         tx_buffer = &ring->tx_buffer_info[i];
 731                         u0 = (struct my_u0 *)tx_desc;
 732                         if (dma_unmap_len(tx_buffer, len) > 0) {
 733                                 const char *ring_desc;
 734
 735                                 if (i == ring->next_to_use &&
 736                                     i == ring->next_to_clean)
 737                                         ring_desc = " NTC/U";
 738                                 else if (i == ring->next_to_use)
 739                                         ring_desc = " NTU";
 740                                 else if (i == ring->next_to_clean)
 741                                         ring_desc = " NTC";
 742                                 else
 743                                         ring_desc = "";
 744                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 745                                         i,
 746                                         le64_to_cpu(u0->a),
 747                                         le64_to_cpu(u0->b),
 748                                         (u64)dma_unmap_addr(tx_buffer, dma),
 749                                         dma_unmap_len(tx_buffer, len),
 750                                         tx_buffer->next_to_watch,
 751                                         (u64)tx_buffer->time_stamp,
 752                                         tx_buffer->skb,
 753                                         ring_desc);
 754
 755                                 if (netif_msg_pktdata(adapter) &&
 756                                     tx_buffer->skb)
 757                                         print_hex_dump(KERN_INFO, "",
 758                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 759                                                 tx_buffer->skb->data,
 760                                                 dma_unmap_len(tx_buffer, len),
 761                                                 true);
 762                         }
 763                 }
 764         }
 765
 766         /* Print RX Rings Summary */
 767 rx_ring_summary:
 768         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 769         pr_info("Queue [NTU] [NTC]\n");
 770         for (n = 0; n < adapter->num_rx_queues; n++) {
 771                 rx_ring = adapter->rx_ring[n];
 772                 pr_info("%5d %5X %5X\n",
 773                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 774         }
 775
 776         /* Print RX Rings */
 777         if (!netif_msg_rx_status(adapter))
 778                 return;
 779
 780         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 781
 782         /* Receive Descriptor Formats
 783          *
 784          * 82598 Advanced Receive Descriptor (Read) Format
 785          *    63                                           1        0
 786          *    +-----------------------------------------------------+
 787          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 788          *    +----------------------------------------------+------+
 789          *  8 |       Header Buffer Address [63:1]           |  DD  |
 790          *    +-----------------------------------------------------+
 791          *
 792          *
 793          * 82598 Advanced Receive Descriptor (Write-Back) Format
 794          *
 795          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 796          *   +------------------------------------------------------+
 797          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 798          *   | Packet   | IP     |   |          |     | Type | Type |
 799          *   | Checksum | Ident  |   |          |     |      |      |
 800          *   +------------------------------------------------------+
 801          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 802          *   +------------------------------------------------------+
 803          *   63       48 47    32 31            20 19               0
 804          *
 805          * 82599+ Advanced Receive Descriptor (Read) Format
 806          *    63                                           1        0
 807          *    +-----------------------------------------------------+
 808          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 809          *    +----------------------------------------------+------+
 810          *  8 |       Header Buffer Address [63:1]           |  DD  |
 811          *    +-----------------------------------------------------+
 812          *
 813          *
 814          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 815          *
 816          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 817          *   +------------------------------------------------------+
 818          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 819          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 820          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 821          *   +------------------------------------------------------+
 822          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 823          *   +------------------------------------------------------+
 824          *   63       48 47    32 31          20 19                 0
 825          */
 826
 827         for (n = 0; n < adapter->num_rx_queues; n++) {
 828                 rx_ring = adapter->rx_ring[n];
 829                 pr_info("------------------------------------\n");
 830                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 831                 pr_info("------------------------------------\n");
 832                 pr_info("%s%s%s\n",
 833                         "R  [desc]      [ PktBuf     A0] ",
 834                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 835                         "<-- Adv Rx Read format");
 836                 pr_info("%s%s%s\n",
 837                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 838                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 839                         "<-- Adv Rx Write-Back format");
 840
 841                 for (i = 0; i < rx_ring->count; i++) {
 842                         const char *ring_desc;
 843
 844                         if (i == rx_ring->next_to_use)
 845                                 ring_desc = " NTU";
 846                         else if (i == rx_ring->next_to_clean)
 847                                 ring_desc = " NTC";
 848                         else
 849                                 ring_desc = "";
 850
 851                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 852                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 853                         u0 = (struct my_u0 *)rx_desc;
 854                         if (rx_desc->wb.upper.length) {
 855                                 /* Descriptor Done */
 856                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         rx_buffer_info->skb,
 861                                         ring_desc);
 862                         } else {
 863                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 864                                         i,
 865                                         le64_to_cpu(u0->a),
 866                                         le64_to_cpu(u0->b),
 867                                         (u64)rx_buffer_info->dma,
 868                                         rx_buffer_info->skb,
 869                                         ring_desc);
 870
 871                                 if (netif_msg_pktdata(adapter) &&
 872                                     rx_buffer_info->dma) {
 873                                         print_hex_dump(KERN_INFO, "",
 874                                            DUMP_PREFIX_ADDRESS, 16, 1,
 875                                            page_address(rx_buffer_info->page) +
 876                                                     rx_buffer_info->page_offset,
 877                                            ixgbe_rx_bufsz(rx_ring), true);
 878                                 }
 879                         }
 880                 }
 881         }
 882 }
 883
 884 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 885 {
 886         u32 ctrl_ext;
 887
 888         /* Let firmware take over control of h/w */
 889         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 890         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 891                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 892 }
 893
 894 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 895 {
 896         u32 ctrl_ext;
 897
 898         /* Let firmware know the driver has taken over */
 899         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 900         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 901                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 902 }
 903
 904 /**
 905  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 906  * @adapter: pointer to adapter struct
 907  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 908  * @queue: queue to map the corresponding interrupt to
 909  * @msix_vector: the vector to map to the corresponding queue
 910  *
 911  */
 912 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 913                            u8 queue, u8 msix_vector)
 914 {
 915         u32 ivar, index;
 916         struct ixgbe_hw *hw = &adapter->hw;
 917         switch (hw->mac.type) {
 918         case ixgbe_mac_82598EB:
 919                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 920                 if (direction == -1)
 921                         direction = 0;
 922                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 923                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 924                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 925                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 926                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 927                 break;
 928         case ixgbe_mac_82599EB:
 929         case ixgbe_mac_X540:
 930         case ixgbe_mac_X550:
 931         case ixgbe_mac_X550EM_x:
 932         case ixgbe_mac_x550em_a:
 933                 if (direction == -1) {
 934                         /* other causes */
 935                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 936                         index = ((queue & 1) * 8);
 937                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 938                         ivar &= ~(0xFF << index);
 939                         ivar |= (msix_vector << index);
 940                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 941                         break;
 942                 } else {
 943                         /* tx or rx causes */
 944                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 945                         index = ((16 * (queue & 1)) + (8 * direction));
 946                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 947                         ivar &= ~(0xFF << index);
 948                         ivar |= (msix_vector << index);
 949                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 950                         break;
 951                 }
 952         default:
 953                 break;
 954         }
 955 }
 956
 957 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 958                                           u64 qmask)
 959 {
 960         u32 mask;
 961
 962         switch (adapter->hw.mac.type) {
 963         case ixgbe_mac_82598EB:
 964                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 965                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 966                 break;
 967         case ixgbe_mac_82599EB:
 968         case ixgbe_mac_X540:
 969         case ixgbe_mac_X550:
 970         case ixgbe_mac_X550EM_x:
 971         case ixgbe_mac_x550em_a:
 972                 mask = (qmask & 0xFFFFFFFF);
 973                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 974                 mask = (qmask >> 32);
 975                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 976                 break;
 977         default:
 978                 break;
 979         }
 980 }
 981
 982 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 983 {
 984         struct ixgbe_hw *hw = &adapter->hw;
 985         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 986         int i;
 987         u32 data;
 988
 989         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 990             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 991                 return;
 992
 993         switch (hw->mac.type) {
 994         case ixgbe_mac_82598EB:
 995                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 996                 break;
 997         default:
 998                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 999         }
1000         hwstats->lxoffrxc += data;
1001
1002         /* refill credits (no tx hang) if we received xoff */
1003         if (!data)
1004                 return;
1005
1006         for (i = 0; i < adapter->num_tx_queues; i++)
1007                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1008                           &adapter->tx_ring[i]->state);
1009
1010         for (i = 0; i < adapter->num_xdp_queues; i++)
1011                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1012                           &adapter->xdp_ring[i]->state);
1013 }
1014
1015 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1016 {
1017         struct ixgbe_hw *hw = &adapter->hw;
1018         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1019         u32 xoff[8] = {0};
1020         u8 tc;
1021         int i;
1022         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1023
1024         if (adapter->ixgbe_ieee_pfc)
1025                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1026
1027         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1028                 ixgbe_update_xoff_rx_lfc(adapter);
1029                 return;
1030         }
1031
1032         /* update stats for each tc, only valid with PFC enabled */
1033         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1034                 u32 pxoffrxc;
1035
1036                 switch (hw->mac.type) {
1037                 case ixgbe_mac_82598EB:
1038                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1039                         break;
1040                 default:
1041                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1042                 }
1043                 hwstats->pxoffrxc[i] += pxoffrxc;
1044                 /* Get the TC for given UP */
1045                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1046                 xoff[tc] += pxoffrxc;
1047         }
1048
1049         /* disarm tx queues that have received xoff frames */
1050         for (i = 0; i < adapter->num_tx_queues; i++) {
1051                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1052
1053                 tc = tx_ring->dcb_tc;
1054                 if (xoff[tc])
1055                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1056         }
1057
1058         for (i = 0; i < adapter->num_xdp_queues; i++) {
1059                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1060
1061                 tc = xdp_ring->dcb_tc;
1062                 if (xoff[tc])
1063                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1064         }
1065 }
1066
1067 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1068 {
1069         return ring->stats.packets;
1070 }
1071
1072 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1073 {
1074         unsigned int head, tail;
1075
1076         head = ring->next_to_clean;
1077         tail = ring->next_to_use;
1078
1079         return ((head <= tail) ? tail : tail + ring->count) - head;
1080 }
1081
1082 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1083 {
1084         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1085         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1086         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1087
1088         clear_check_for_tx_hang(tx_ring);
1089
1090         /*
1091          * Check for a hung queue, but be thorough. This verifies
1092          * that a transmit has been completed since the previous
1093          * check AND there is at least one packet pending. The
1094          * ARMED bit is set to indicate a potential hang. The
1095          * bit is cleared if a pause frame is received to remove
1096          * false hang detection due to PFC or 802.3x frames. By
1097          * requiring this to fail twice we avoid races with
1098          * pfc clearing the ARMED bit and conditions where we
1099          * run the check_tx_hang logic with a transmit completion
1100          * pending but without time to complete it yet.
1101          */
1102         if (tx_done_old == tx_done && tx_pending)
1103                 /* make sure it is true for two checks in a row */
1104                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1105                                         &tx_ring->state);
1106         /* update completed stats and continue */
1107         tx_ring->tx_stats.tx_done_old = tx_done;
1108         /* reset the countdown */
1109         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1110
1111         return false;
1112 }
1113
1114 /**
1115  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1116  * @adapter: driver private struct
1117  **/
1118 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1119 {
1120
1121         /* Do the reset outside of interrupt context */
1122         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1123                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1124                 e_warn(drv, "initiating reset due to tx timeout\n");
1125                 ixgbe_service_event_schedule(adapter);
1126         }
1127 }
1128
1129 /**
1130  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1131  * @netdev: network interface device structure
1132  * @queue_index: Tx queue to set
1133  * @maxrate: desired maximum transmit bitrate
1134  **/
1135 static int ixgbe_tx_maxrate(struct net_device *netdev,
1136                             int queue_index, u32 maxrate)
1137 {
1138         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1139         struct ixgbe_hw *hw = &adapter->hw;
1140         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1141
1142         if (!maxrate)
1143                 return 0;
1144
1145         /* Calculate the rate factor values to set */
1146         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1147         bcnrc_val /= maxrate;
1148
1149         /* clear everything but the rate factor */
1150         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1151         IXGBE_RTTBCNRC_RF_DEC_MASK;
1152
1153         /* enable the rate scheduler */
1154         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1155
1156         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1157         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1158
1159         return 0;
1160 }
1161
1162 /**
1163  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1164  * @q_vector: structure containing interrupt and ring information
1165  * @tx_ring: tx ring to clean
1166  * @napi_budget: Used to determine if we are in netpoll
1167  **/
1168 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1169                                struct ixgbe_ring *tx_ring, int napi_budget)
1170 {
1171         struct ixgbe_adapter *adapter = q_vector->adapter;
1172         struct ixgbe_tx_buffer *tx_buffer;
1173         union ixgbe_adv_tx_desc *tx_desc;
1174         unsigned int total_bytes = 0, total_packets = 0;
1175         unsigned int budget = q_vector->tx.work_limit;
1176         unsigned int i = tx_ring->next_to_clean;
1177
1178         if (test_bit(__IXGBE_DOWN, &adapter->state))
1179                 return true;
1180
1181         tx_buffer = &tx_ring->tx_buffer_info[i];
1182         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1183         i -= tx_ring->count;
1184
1185         do {
1186                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1187
1188                 /* if next_to_watch is not set then there is no work pending */
1189                 if (!eop_desc)
1190                         break;
1191
1192                 /* prevent any other reads prior to eop_desc */
1193                 smp_rmb();
1194
1195                 /* if DD is not set pending work has not been completed */
1196                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1197                         break;
1198
1199                 /* clear next_to_watch to prevent false hangs */
1200                 tx_buffer->next_to_watch = NULL;
1201
1202                 /* update the statistics for this packet */
1203                 total_bytes += tx_buffer->bytecount;
1204                 total_packets += tx_buffer->gso_segs;
1205
1206                 /* free the skb */
1207                 if (ring_is_xdp(tx_ring))
1208                         page_frag_free(tx_buffer->data);
1209                 else
1210                         napi_consume_skb(tx_buffer->skb, napi_budget);
1211
1212                 /* unmap skb header data */
1213                 dma_unmap_single(tx_ring->dev,
1214                                  dma_unmap_addr(tx_buffer, dma),
1215                                  dma_unmap_len(tx_buffer, len),
1216                                  DMA_TO_DEVICE);
1217
1218                 /* clear tx_buffer data */
1219                 dma_unmap_len_set(tx_buffer, len, 0);
1220
1221                 /* unmap remaining buffers */
1222                 while (tx_desc != eop_desc) {
1223                         tx_buffer++;
1224                         tx_desc++;
1225                         i++;
1226                         if (unlikely(!i)) {
1227                                 i -= tx_ring->count;
1228                                 tx_buffer = tx_ring->tx_buffer_info;
1229                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1230                         }
1231
1232                         /* unmap any remaining paged data */
1233                         if (dma_unmap_len(tx_buffer, len)) {
1234                                 dma_unmap_page(tx_ring->dev,
1235                                                dma_unmap_addr(tx_buffer, dma),
1236                                                dma_unmap_len(tx_buffer, len),
1237                                                DMA_TO_DEVICE);
1238                                 dma_unmap_len_set(tx_buffer, len, 0);
1239                         }
1240                 }
1241
1242                 /* move us one more past the eop_desc for start of next pkt */
1243                 tx_buffer++;
1244                 tx_desc++;
1245                 i++;
1246                 if (unlikely(!i)) {
1247                         i -= tx_ring->count;
1248                         tx_buffer = tx_ring->tx_buffer_info;
1249                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1250                 }
1251
1252                 /* issue prefetch for next Tx descriptor */
1253                 prefetch(tx_desc);
1254
1255                 /* update budget accounting */
1256                 budget--;
1257         } while (likely(budget));
1258
1259         i += tx_ring->count;
1260         tx_ring->next_to_clean = i;
1261         u64_stats_update_begin(&tx_ring->syncp);
1262         tx_ring->stats.bytes += total_bytes;
1263         tx_ring->stats.packets += total_packets;
1264         u64_stats_update_end(&tx_ring->syncp);
1265         q_vector->tx.total_bytes += total_bytes;
1266         q_vector->tx.total_packets += total_packets;
1267
1268         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1269                 /* schedule immediate reset if we believe we hung */
1270                 struct ixgbe_hw *hw = &adapter->hw;
1271                 e_err(drv, "Detected Tx Unit Hang %s\n"
1272                         "  Tx Queue             <%d>\n"
1273                         "  TDH, TDT             <%x>, <%x>\n"
1274                         "  next_to_use          <%x>\n"
1275                         "  next_to_clean        <%x>\n"
1276                         "tx_buffer_info[next_to_clean]\n"
1277                         "  time_stamp           <%lx>\n"
1278                         "  jiffies              <%lx>\n",
1279                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1280                         tx_ring->queue_index,
1281                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1282                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1283                         tx_ring->next_to_use, i,
1284                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1285
1286                 if (!ring_is_xdp(tx_ring))
1287                         netif_stop_subqueue(tx_ring->netdev,
1288                                             tx_ring->queue_index);
1289
1290                 e_info(probe,
1291                        "tx hang %d detected on queue %d, resetting adapter\n",
1292                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1293
1294                 /* schedule immediate reset if we believe we hung */
1295                 ixgbe_tx_timeout_reset(adapter);
1296
1297                 /* the adapter is about to reset, no point in enabling stuff */
1298                 return true;
1299         }
1300
1301         if (ring_is_xdp(tx_ring))
1302                 return !!budget;
1303
1304         netdev_tx_completed_queue(txring_txq(tx_ring),
1305                                   total_packets, total_bytes);
1306
1307 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1308         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1309                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1310                 /* Make sure that anybody stopping the queue after this
1311                  * sees the new next_to_clean.
1312                  */
1313                 smp_mb();
1314                 if (__netif_subqueue_stopped(tx_ring->netdev,
1315                                              tx_ring->queue_index)
1316                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1317                         netif_wake_subqueue(tx_ring->netdev,
1318                                             tx_ring->queue_index);
1319                         ++tx_ring->tx_stats.restart_queue;
1320                 }
1321         }
1322
1323         return !!budget;
1324 }
1325
1326 #ifdef CONFIG_IXGBE_DCA
1327 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1328                                 struct ixgbe_ring *tx_ring,
1329                                 int cpu)
1330 {
1331         struct ixgbe_hw *hw = &adapter->hw;
1332         u32 txctrl = 0;
1333         u16 reg_offset;
1334
1335         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1336                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1337
1338         switch (hw->mac.type) {
1339         case ixgbe_mac_82598EB:
1340                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1341                 break;
1342         case ixgbe_mac_82599EB:
1343         case ixgbe_mac_X540:
1344                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1345                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1346                 break;
1347         default:
1348                 /* for unknown hardware do not write register */
1349                 return;
1350         }
1351
1352         /*
1353          * We can enable relaxed ordering for reads, but not writes when
1354          * DCA is enabled.  This is due to a known issue in some chipsets
1355          * which will cause the DCA tag to be cleared.
1356          */
1357         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1358                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1359                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1360
1361         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1362 }
1363
1364 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1365                                 struct ixgbe_ring *rx_ring,
1366                                 int cpu)
1367 {
1368         struct ixgbe_hw *hw = &adapter->hw;
1369         u32 rxctrl = 0;
1370         u8 reg_idx = rx_ring->reg_idx;
1371
1372         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1373                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1374
1375         switch (hw->mac.type) {
1376         case ixgbe_mac_82599EB:
1377         case ixgbe_mac_X540:
1378                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1379                 break;
1380         default:
1381                 break;
1382         }
1383
1384         /*
1385          * We can enable relaxed ordering for reads, but not writes when
1386          * DCA is enabled.  This is due to a known issue in some chipsets
1387          * which will cause the DCA tag to be cleared.
1388          */
1389         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1390                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1391                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1392
1393         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1394 }
1395
1396 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1397 {
1398         struct ixgbe_adapter *adapter = q_vector->adapter;
1399         struct ixgbe_ring *ring;
1400         int cpu = get_cpu();
1401
1402         if (q_vector->cpu == cpu)
1403                 goto out_no_update;
1404
1405         ixgbe_for_each_ring(ring, q_vector->tx)
1406                 ixgbe_update_tx_dca(adapter, ring, cpu);
1407
1408         ixgbe_for_each_ring(ring, q_vector->rx)
1409                 ixgbe_update_rx_dca(adapter, ring, cpu);
1410
1411         q_vector->cpu = cpu;
1412 out_no_update:
1413         put_cpu();
1414 }
1415
1416 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1417 {
1418         int i;
1419
1420         /* always use CB2 mode, difference is masked in the CB driver */
1421         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1422                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1423                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1424         else
1425                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1426                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1427
1428         for (i = 0; i < adapter->num_q_vectors; i++) {
1429                 adapter->q_vector[i]->cpu = -1;
1430                 ixgbe_update_dca(adapter->q_vector[i]);
1431         }
1432 }
1433
1434 static int __ixgbe_notify_dca(struct device *dev, void *data)
1435 {
1436         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1437         unsigned long event = *(unsigned long *)data;
1438
1439         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1440                 return 0;
1441
1442         switch (event) {
1443         case DCA_PROVIDER_ADD:
1444                 /* if we're already enabled, don't do it again */
1445                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1446                         break;
1447                 if (dca_add_requester(dev) == 0) {
1448                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1449                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1450                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1451                         break;
1452                 }
1453                 /* fall through - DCA is disabled. */
1454         case DCA_PROVIDER_REMOVE:
1455                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1456                         dca_remove_requester(dev);
1457                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1458                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1459                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1460                 }
1461                 break;
1462         }
1463
1464         return 0;
1465 }
1466
1467 #endif /* CONFIG_IXGBE_DCA */
1468
1469 #define IXGBE_RSS_L4_TYPES_MASK \
1470         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1471          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1472          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1473          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1474
1475 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1476                                  union ixgbe_adv_rx_desc *rx_desc,
1477                                  struct sk_buff *skb)
1478 {
1479         u16 rss_type;
1480
1481         if (!(ring->netdev->features & NETIF_F_RXHASH))
1482                 return;
1483
1484         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1485                    IXGBE_RXDADV_RSSTYPE_MASK;
1486
1487         if (!rss_type)
1488                 return;
1489
1490         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1491                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1492                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1493 }
1494
1495 #ifdef IXGBE_FCOE
1496 /**
1497  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1498  * @ring: structure containing ring specific data
1499  * @rx_desc: advanced rx descriptor
1500  *
1501  * Returns : true if it is FCoE pkt
1502  */
1503 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1504                                     union ixgbe_adv_rx_desc *rx_desc)
1505 {
1506         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1507
1508         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1509                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1510                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1511                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1512 }
1513
1514 #endif /* IXGBE_FCOE */
1515 /**
1516  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1517  * @ring: structure containing ring specific data
1518  * @rx_desc: current Rx descriptor being processed
1519  * @skb: skb currently being received and modified
1520  **/
1521 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1522                                      union ixgbe_adv_rx_desc *rx_desc,
1523                                      struct sk_buff *skb)
1524 {
1525         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1526         bool encap_pkt = false;
1527
1528         skb_checksum_none_assert(skb);
1529
1530         /* Rx csum disabled */
1531         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1532                 return;
1533
1534         /* check for VXLAN and Geneve packets */
1535         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1536                 encap_pkt = true;
1537                 skb->encapsulation = 1;
1538         }
1539
1540         /* if IP and error */
1541         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1542             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1543                 ring->rx_stats.csum_err++;
1544                 return;
1545         }
1546
1547         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1548                 return;
1549
1550         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1551                 /*
1552                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1553                  * checksum errors.
1554                  */
1555                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1556                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1557                         return;
1558
1559                 ring->rx_stats.csum_err++;
1560                 return;
1561         }
1562
1563         /* It must be a TCP or UDP packet with a valid checksum */
1564         skb->ip_summed = CHECKSUM_UNNECESSARY;
1565         if (encap_pkt) {
1566                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1567                         return;
1568
1569                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1570                         skb->ip_summed = CHECKSUM_NONE;
1571                         return;
1572                 }
1573                 /* If we checked the outer header let the stack know */
1574                 skb->csum_level = 1;
1575         }
1576 }
1577
1578 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1579 {
1580         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1581 }
1582
1583 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1584                                     struct ixgbe_rx_buffer *bi)
1585 {
1586         struct page *page = bi->page;
1587         dma_addr_t dma;
1588
1589         /* since we are recycling buffers we should seldom need to alloc */
1590         if (likely(page))
1591                 return true;
1592
1593         /* alloc new page for storage */
1594         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1595         if (unlikely(!page)) {
1596                 rx_ring->rx_stats.alloc_rx_page_failed++;
1597                 return false;
1598         }
1599
1600         /* map page for use */
1601         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1602                                  ixgbe_rx_pg_size(rx_ring),
1603                                  DMA_FROM_DEVICE,
1604                                  IXGBE_RX_DMA_ATTR);
1605
1606         /*
1607          * if mapping failed free memory back to system since
1608          * there isn't much point in holding memory we can't use
1609          */
1610         if (dma_mapping_error(rx_ring->dev, dma)) {
1611                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1612
1613                 rx_ring->rx_stats.alloc_rx_page_failed++;
1614                 return false;
1615         }
1616
1617         bi->dma = dma;
1618         bi->page = page;
1619         bi->page_offset = ixgbe_rx_offset(rx_ring);
1620         bi->pagecnt_bias = 1;
1621         rx_ring->rx_stats.alloc_rx_page++;
1622
1623         return true;
1624 }
1625
1626 /**
1627  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1628  * @rx_ring: ring to place buffers on
1629  * @cleaned_count: number of buffers to replace
1630  **/
1631 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1632 {
1633         union ixgbe_adv_rx_desc *rx_desc;
1634         struct ixgbe_rx_buffer *bi;
1635         u16 i = rx_ring->next_to_use;
1636         u16 bufsz;
1637
1638         /* nothing to do */
1639         if (!cleaned_count)
1640                 return;
1641
1642         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1643         bi = &rx_ring->rx_buffer_info[i];
1644         i -= rx_ring->count;
1645
1646         bufsz = ixgbe_rx_bufsz(rx_ring);
1647
1648         do {
1649                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1650                         break;
1651
1652                 /* sync the buffer for use by the device */
1653                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1654                                                  bi->page_offset, bufsz,
1655                                                  DMA_FROM_DEVICE);
1656
1657                 /*
1658                  * Refresh the desc even if buffer_addrs didn't change
1659                  * because each write-back erases this info.
1660                  */
1661                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1662
1663                 rx_desc++;
1664                 bi++;
1665                 i++;
1666                 if (unlikely(!i)) {
1667                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1668                         bi = rx_ring->rx_buffer_info;
1669                         i -= rx_ring->count;
1670                 }
1671
1672                 /* clear the length for the next_to_use descriptor */
1673                 rx_desc->wb.upper.length = 0;
1674
1675                 cleaned_count--;
1676         } while (cleaned_count);
1677
1678         i += rx_ring->count;
1679
1680         if (rx_ring->next_to_use != i) {
1681                 rx_ring->next_to_use = i;
1682
1683                 /* update next to alloc since we have filled the ring */
1684                 rx_ring->next_to_alloc = i;
1685
1686                 /* Force memory writes to complete before letting h/w
1687                  * know there are new descriptors to fetch.  (Only
1688                  * applicable for weak-ordered memory model archs,
1689                  * such as IA-64).
1690                  */
1691                 wmb();
1692                 writel(i, rx_ring->tail);
1693         }
1694 }
1695
1696 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1697                                    struct sk_buff *skb)
1698 {
1699         u16 hdr_len = skb_headlen(skb);
1700
1701         /* set gso_size to avoid messing up TCP MSS */
1702         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1703                                                  IXGBE_CB(skb)->append_cnt);
1704         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1705 }
1706
1707 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1708                                    struct sk_buff *skb)
1709 {
1710         /* if append_cnt is 0 then frame is not RSC */
1711         if (!IXGBE_CB(skb)->append_cnt)
1712                 return;
1713
1714         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1715         rx_ring->rx_stats.rsc_flush++;
1716
1717         ixgbe_set_rsc_gso_size(rx_ring, skb);
1718
1719         /* gso_size is computed using append_cnt so always clear it last */
1720         IXGBE_CB(skb)->append_cnt = 0;
1721 }
1722
1723 /**
1724  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1725  * @rx_ring: rx descriptor ring packet is being transacted on
1726  * @rx_desc: pointer to the EOP Rx descriptor
1727  * @skb: pointer to current skb being populated
1728  *
1729  * This function checks the ring, descriptor, and packet information in
1730  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1731  * other fields within the skb.
1732  **/
1733 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1734                                      union ixgbe_adv_rx_desc *rx_desc,
1735                                      struct sk_buff *skb)
1736 {
1737         struct net_device *dev = rx_ring->netdev;
1738         u32 flags = rx_ring->q_vector->adapter->flags;
1739
1740         ixgbe_update_rsc_stats(rx_ring, skb);
1741
1742         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1743
1744         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1745
1746         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1747                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1748
1749         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1750             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1751                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1752                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1753         }
1754
1755         skb->protocol = eth_type_trans(skb, dev);
1756
1757         /* record Rx queue, or update MACVLAN statistics */
1758         if (netif_is_ixgbe(dev))
1759                 skb_record_rx_queue(skb, rx_ring->queue_index);
1760         else
1761                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1762                                  (skb->pkt_type == PACKET_BROADCAST) ||
1763                                  (skb->pkt_type == PACKET_MULTICAST));
1764 }
1765
1766 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1767                          struct sk_buff *skb)
1768 {
1769         napi_gro_receive(&q_vector->napi, skb);
1770 }
1771
1772 /**
1773  * ixgbe_is_non_eop - process handling of non-EOP buffers
1774  * @rx_ring: Rx ring being processed
1775  * @rx_desc: Rx descriptor for current buffer
1776  * @skb: Current socket buffer containing buffer in progress
1777  *
1778  * This function updates next to clean.  If the buffer is an EOP buffer
1779  * this function exits returning false, otherwise it will place the
1780  * sk_buff in the next buffer to be chained and return true indicating
1781  * that this is in fact a non-EOP buffer.
1782  **/
1783 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1784                              union ixgbe_adv_rx_desc *rx_desc,
1785                              struct sk_buff *skb)
1786 {
1787         u32 ntc = rx_ring->next_to_clean + 1;
1788
1789         /* fetch, update, and store next to clean */
1790         ntc = (ntc < rx_ring->count) ? ntc : 0;
1791         rx_ring->next_to_clean = ntc;
1792
1793         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1794
1795         /* update RSC append count if present */
1796         if (ring_is_rsc_enabled(rx_ring)) {
1797                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1798                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1799
1800                 if (unlikely(rsc_enabled)) {
1801                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1802
1803                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1804                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1805
1806                         /* update ntc based on RSC value */
1807                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1808                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1809                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1810                 }
1811         }
1812
1813         /* if we are the last buffer then there is nothing else to do */
1814         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1815                 return false;
1816
1817         /* place skb in next buffer to be received */
1818         rx_ring->rx_buffer_info[ntc].skb = skb;
1819         rx_ring->rx_stats.non_eop_descs++;
1820
1821         return true;
1822 }
1823
1824 /**
1825  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1826  * @rx_ring: rx descriptor ring packet is being transacted on
1827  * @skb: pointer to current skb being adjusted
1828  *
1829  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1830  * main difference between this version and the original function is that
1831  * this function can make several assumptions about the state of things
1832  * that allow for significant optimizations versus the standard function.
1833  * As a result we can do things like drop a frag and maintain an accurate
1834  * truesize for the skb.
1835  */
1836 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1837                             struct sk_buff *skb)
1838 {
1839         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1840         unsigned char *va;
1841         unsigned int pull_len;
1842
1843         /*
1844          * it is valid to use page_address instead of kmap since we are
1845          * working with pages allocated out of the lomem pool per
1846          * alloc_page(GFP_ATOMIC)
1847          */
1848         va = skb_frag_address(frag);
1849
1850         /*
1851          * we need the header to contain the greater of either ETH_HLEN or
1852          * 60 bytes if the skb->len is less than 60 for skb_pad.
1853          */
1854         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1855
1856         /* align pull length to size of long to optimize memcpy performance */
1857         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1858
1859         /* update all of the pointers */
1860         skb_frag_size_sub(frag, pull_len);
1861         frag->page_offset += pull_len;
1862         skb->data_len -= pull_len;
1863         skb->tail += pull_len;
1864 }
1865
1866 /**
1867  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1868  * @rx_ring: rx descriptor ring packet is being transacted on
1869  * @skb: pointer to current skb being updated
1870  *
1871  * This function provides a basic DMA sync up for the first fragment of an
1872  * skb.  The reason for doing this is that the first fragment cannot be
1873  * unmapped until we have reached the end of packet descriptor for a buffer
1874  * chain.
1875  */
1876 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1877                                 struct sk_buff *skb)
1878 {
1879         /* if the page was released unmap it, else just sync our portion */
1880         if (unlikely(IXGBE_CB(skb)->page_released)) {
1881                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1882                                      ixgbe_rx_pg_size(rx_ring),
1883                                      DMA_FROM_DEVICE,
1884                                      IXGBE_RX_DMA_ATTR);
1885         } else {
1886                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1887
1888                 dma_sync_single_range_for_cpu(rx_ring->dev,
1889                                               IXGBE_CB(skb)->dma,
1890                                               frag->page_offset,
1891                                               skb_frag_size(frag),
1892                                               DMA_FROM_DEVICE);
1893         }
1894 }
1895
1896 /**
1897  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1898  * @rx_ring: rx descriptor ring packet is being transacted on
1899  * @rx_desc: pointer to the EOP Rx descriptor
1900  * @skb: pointer to current skb being fixed
1901  *
1902  * Check if the skb is valid in the XDP case it will be an error pointer.
1903  * Return true in this case to abort processing and advance to next
1904  * descriptor.
1905  *
1906  * Check for corrupted packet headers caused by senders on the local L2
1907  * embedded NIC switch not setting up their Tx Descriptors right.  These
1908  * should be very rare.
1909  *
1910  * Also address the case where we are pulling data in on pages only
1911  * and as such no data is present in the skb header.
1912  *
1913  * In addition if skb is not at least 60 bytes we need to pad it so that
1914  * it is large enough to qualify as a valid Ethernet frame.
1915  *
1916  * Returns true if an error was encountered and skb was freed.
1917  **/
1918 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1919                                   union ixgbe_adv_rx_desc *rx_desc,
1920                                   struct sk_buff *skb)
1921 {
1922         struct net_device *netdev = rx_ring->netdev;
1923
1924         /* XDP packets use error pointer so abort at this point */
1925         if (IS_ERR(skb))
1926                 return true;
1927
1928         /* Verify netdev is present, and that packet does not have any
1929          * errors that would be unacceptable to the netdev.
1930          */
1931         if (!netdev ||
1932             (unlikely(ixgbe_test_staterr(rx_desc,
1933                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1934              !(netdev->features & NETIF_F_RXALL)))) {
1935                 dev_kfree_skb_any(skb);
1936                 return true;
1937         }
1938
1939         /* place header in linear portion of buffer */
1940         if (!skb_headlen(skb))
1941                 ixgbe_pull_tail(rx_ring, skb);
1942
1943 #ifdef IXGBE_FCOE
1944         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1945         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1946                 return false;
1947
1948 #endif
1949         /* if eth_skb_pad returns an error the skb was freed */
1950         if (eth_skb_pad(skb))
1951                 return true;
1952
1953         return false;
1954 }
1955
1956 /**
1957  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1958  * @rx_ring: rx descriptor ring to store buffers on
1959  * @old_buff: donor buffer to have page reused
1960  *
1961  * Synchronizes page for reuse by the adapter
1962  **/
1963 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1964                                 struct ixgbe_rx_buffer *old_buff)
1965 {
1966         struct ixgbe_rx_buffer *new_buff;
1967         u16 nta = rx_ring->next_to_alloc;
1968
1969         new_buff = &rx_ring->rx_buffer_info[nta];
1970
1971         /* update, and store next to alloc */
1972         nta++;
1973         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1974
1975         /* Transfer page from old buffer to new buffer.
1976          * Move each member individually to avoid possible store
1977          * forwarding stalls and unnecessary copy of skb.
1978          */
1979         new_buff->dma           = old_buff->dma;
1980         new_buff->page          = old_buff->page;
1981         new_buff->page_offset   = old_buff->page_offset;
1982         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1983 }
1984
1985 static inline bool ixgbe_page_is_reserved(struct page *page)
1986 {
1987         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1988 }
1989
1990 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1991 {
1992         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1993         struct page *page = rx_buffer->page;
1994
1995         /* avoid re-using remote pages */
1996         if (unlikely(ixgbe_page_is_reserved(page)))
1997                 return false;
1998
1999 #if (PAGE_SIZE < 8192)
2000         /* if we are only owner of page we can reuse it */
2001         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
2002                 return false;
2003 #else
2004         /* The last offset is a bit aggressive in that we assume the
2005          * worst case of FCoE being enabled and using a 3K buffer.
2006          * However this should have minimal impact as the 1K extra is
2007          * still less than one buffer in size.
2008          */
2009 #define IXGBE_LAST_OFFSET \
2010         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2011         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2012                 return false;
2013 #endif
2014
2015         /* If we have drained the page fragment pool we need to update
2016          * the pagecnt_bias and page count so that we fully restock the
2017          * number of references the driver holds.
2018          */
2019         if (unlikely(!pagecnt_bias)) {
2020                 page_ref_add(page, USHRT_MAX);
2021                 rx_buffer->pagecnt_bias = USHRT_MAX;
2022         }
2023
2024         return true;
2025 }
2026
2027 /**
2028  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2029  * @rx_ring: rx descriptor ring to transact packets on
2030  * @rx_buffer: buffer containing page to add
2031  * @skb: sk_buff to place the data into
2032  * @size: size of data in rx_buffer
2033  *
2034  * This function will add the data contained in rx_buffer->page to the skb.
2035  * This is done either through a direct copy if the data in the buffer is
2036  * less than the skb header size, otherwise it will just attach the page as
2037  * a frag to the skb.
2038  *
2039  * The function will then update the page offset if necessary and return
2040  * true if the buffer can be reused by the adapter.
2041  **/
2042 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2043                               struct ixgbe_rx_buffer *rx_buffer,
2044                               struct sk_buff *skb,
2045                               unsigned int size)
2046 {
2047 #if (PAGE_SIZE < 8192)
2048         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2049 #else
2050         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2051                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2052                                 SKB_DATA_ALIGN(size);
2053 #endif
2054         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2055                         rx_buffer->page_offset, size, truesize);
2056 #if (PAGE_SIZE < 8192)
2057         rx_buffer->page_offset ^= truesize;
2058 #else
2059         rx_buffer->page_offset += truesize;
2060 #endif
2061 }
2062
2063 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2064                                                    union ixgbe_adv_rx_desc *rx_desc,
2065                                                    struct sk_buff **skb,
2066                                                    const unsigned int size)
2067 {
2068         struct ixgbe_rx_buffer *rx_buffer;
2069
2070         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2071         prefetchw(rx_buffer->page);
2072         *skb = rx_buffer->skb;
2073
2074         /* Delay unmapping of the first packet. It carries the header
2075          * information, HW may still access the header after the writeback.
2076          * Only unmap it when EOP is reached
2077          */
2078         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2079                 if (!*skb)
2080                         goto skip_sync;
2081         } else {
2082                 if (*skb)
2083                         ixgbe_dma_sync_frag(rx_ring, *skb);
2084         }
2085
2086         /* we are reusing so sync this buffer for CPU use */
2087         dma_sync_single_range_for_cpu(rx_ring->dev,
2088                                       rx_buffer->dma,
2089                                       rx_buffer->page_offset,
2090                                       size,
2091                                       DMA_FROM_DEVICE);
2092 skip_sync:
2093         rx_buffer->pagecnt_bias--;
2094
2095         return rx_buffer;
2096 }
2097
2098 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2099                                 struct ixgbe_rx_buffer *rx_buffer,
2100                                 struct sk_buff *skb)
2101 {
2102         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2103                 /* hand second half of page back to the ring */
2104                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2105         } else {
2106                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2107                         /* the page has been released from the ring */
2108                         IXGBE_CB(skb)->page_released = true;
2109                 } else {
2110                         /* we are not reusing the buffer so unmap it */
2111                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2112                                              ixgbe_rx_pg_size(rx_ring),
2113                                              DMA_FROM_DEVICE,
2114                                              IXGBE_RX_DMA_ATTR);
2115                 }
2116                 __page_frag_cache_drain(rx_buffer->page,
2117                                         rx_buffer->pagecnt_bias);
2118         }
2119
2120         /* clear contents of rx_buffer */
2121         rx_buffer->page = NULL;
2122         rx_buffer->skb = NULL;
2123 }
2124
2125 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2126                                            struct ixgbe_rx_buffer *rx_buffer,
2127                                            struct xdp_buff *xdp,
2128                                            union ixgbe_adv_rx_desc *rx_desc)
2129 {
2130         unsigned int size = xdp->data_end - xdp->data;
2131 #if (PAGE_SIZE < 8192)
2132         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2133 #else
2134         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2135                                                xdp->data_hard_start);
2136 #endif
2137         struct sk_buff *skb;
2138
2139         /* prefetch first cache line of first page */
2140         prefetch(xdp->data);
2141 #if L1_CACHE_BYTES < 128
2142         prefetch(xdp->data + L1_CACHE_BYTES);
2143 #endif
2144         /* Note, we get here by enabling legacy-rx via:
2145          *
2146          *    ethtool --set-priv-flags <dev> legacy-rx on
2147          *
2148          * In this mode, we currently get 0 extra XDP headroom as
2149          * opposed to having legacy-rx off, where we process XDP
2150          * packets going to stack via ixgbe_build_skb(). The latter
2151          * provides us currently with 192 bytes of headroom.
2152          *
2153          * For ixgbe_construct_skb() mode it means that the
2154          * xdp->data_meta will always point to xdp->data, since
2155          * the helper cannot expand the head. Should this ever
2156          * change in future for legacy-rx mode on, then lets also
2157          * add xdp->data_meta handling here.
2158          */
2159
2160         /* allocate a skb to store the frags */
2161         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2162         if (unlikely(!skb))
2163                 return NULL;
2164
2165         if (size > IXGBE_RX_HDR_SIZE) {
2166                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2167                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2168
2169                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2170                                 xdp->data - page_address(rx_buffer->page),
2171                                 size, truesize);
2172 #if (PAGE_SIZE < 8192)
2173                 rx_buffer->page_offset ^= truesize;
2174 #else
2175                 rx_buffer->page_offset += truesize;
2176 #endif
2177         } else {
2178                 memcpy(__skb_put(skb, size),
2179                        xdp->data, ALIGN(size, sizeof(long)));
2180                 rx_buffer->pagecnt_bias++;
2181         }
2182
2183         return skb;
2184 }
2185
2186 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2187                                        struct ixgbe_rx_buffer *rx_buffer,
2188                                        struct xdp_buff *xdp,
2189                                        union ixgbe_adv_rx_desc *rx_desc)
2190 {
2191         unsigned int metasize = xdp->data - xdp->data_meta;
2192 #if (PAGE_SIZE < 8192)
2193         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2194 #else
2195         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2196                                 SKB_DATA_ALIGN(xdp->data_end -
2197                                                xdp->data_hard_start);
2198 #endif
2199         struct sk_buff *skb;
2200
2201         /* Prefetch first cache line of first page. If xdp->data_meta
2202          * is unused, this points extactly as xdp->data, otherwise we
2203          * likely have a consumer accessing first few bytes of meta
2204          * data, and then actual data.
2205          */
2206         prefetch(xdp->data_meta);
2207 #if L1_CACHE_BYTES < 128
2208         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2209 #endif
2210
2211         /* build an skb to around the page buffer */
2212         skb = build_skb(xdp->data_hard_start, truesize);
2213         if (unlikely(!skb))
2214                 return NULL;
2215
2216         /* update pointers within the skb to store the data */
2217         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2218         __skb_put(skb, xdp->data_end - xdp->data);
2219         if (metasize)
2220                 skb_metadata_set(skb, metasize);
2221
2222         /* record DMA address if this is the start of a chain of buffers */
2223         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2224                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2225
2226         /* update buffer offset */
2227 #if (PAGE_SIZE < 8192)
2228         rx_buffer->page_offset ^= truesize;
2229 #else
2230         rx_buffer->page_offset += truesize;
2231 #endif
2232
2233         return skb;
2234 }
2235
2236 #define IXGBE_XDP_PASS 0
2237 #define IXGBE_XDP_CONSUMED 1
2238 #define IXGBE_XDP_TX 2
2239
2240 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2241                                struct xdp_buff *xdp);
2242
2243 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2244                                      struct ixgbe_ring *rx_ring,
2245                                      struct xdp_buff *xdp)
2246 {
2247         int err, result = IXGBE_XDP_PASS;
2248         struct bpf_prog *xdp_prog;
2249         u32 act;
2250
2251         rcu_read_lock();
2252         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2253
2254         if (!xdp_prog)
2255                 goto xdp_out;
2256
2257         act = bpf_prog_run_xdp(xdp_prog, xdp);
2258         switch (act) {
2259         case XDP_PASS:
2260                 break;
2261         case XDP_TX:
2262                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2263                 break;
2264         case XDP_REDIRECT:
2265                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2266                 if (!err)
2267                         result = IXGBE_XDP_TX;
2268                 else
2269                         result = IXGBE_XDP_CONSUMED;
2270                 break;
2271         default:
2272                 bpf_warn_invalid_xdp_action(act);
2273                 /* fallthrough */
2274         case XDP_ABORTED:
2275                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2276                 /* fallthrough -- handle aborts by dropping packet */
2277         case XDP_DROP:
2278                 result = IXGBE_XDP_CONSUMED;
2279                 break;
2280         }
2281 xdp_out:
2282         rcu_read_unlock();
2283         return ERR_PTR(-result);
2284 }
2285
2286 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2287                                  struct ixgbe_rx_buffer *rx_buffer,
2288                                  unsigned int size)
2289 {
2290 #if (PAGE_SIZE < 8192)
2291         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2292
2293         rx_buffer->page_offset ^= truesize;
2294 #else
2295         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2296                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2297                                 SKB_DATA_ALIGN(size);
2298
2299         rx_buffer->page_offset += truesize;
2300 #endif
2301 }
2302
2303 /**
2304  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2305  * @q_vector: structure containing interrupt and ring information
2306  * @rx_ring: rx descriptor ring to transact packets on
2307  * @budget: Total limit on number of packets to process
2308  *
2309  * This function provides a "bounce buffer" approach to Rx interrupt
2310  * processing.  The advantage to this is that on systems that have
2311  * expensive overhead for IOMMU access this provides a means of avoiding
2312  * it by maintaining the mapping of the page to the syste.
2313  *
2314  * Returns amount of work completed
2315  **/
2316 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2317                                struct ixgbe_ring *rx_ring,
2318                                const int budget)
2319 {
2320         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2321         struct ixgbe_adapter *adapter = q_vector->adapter;
2322 #ifdef IXGBE_FCOE
2323         int ddp_bytes;
2324         unsigned int mss = 0;
2325 #endif /* IXGBE_FCOE */
2326         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2327         bool xdp_xmit = false;
2328         struct xdp_buff xdp;
2329
2330         xdp.rxq = &rx_ring->xdp_rxq;
2331
2332         while (likely(total_rx_packets < budget)) {
2333                 union ixgbe_adv_rx_desc *rx_desc;
2334                 struct ixgbe_rx_buffer *rx_buffer;
2335                 struct sk_buff *skb;
2336                 unsigned int size;
2337
2338                 /* return some buffers to hardware, one at a time is too slow */
2339                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2340                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2341                         cleaned_count = 0;
2342                 }
2343
2344                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2345                 size = le16_to_cpu(rx_desc->wb.upper.length);
2346                 if (!size)
2347                         break;
2348
2349                 /* This memory barrier is needed to keep us from reading
2350                  * any other fields out of the rx_desc until we know the
2351                  * descriptor has been written back
2352                  */
2353                 dma_rmb();
2354
2355                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2356
2357                 /* retrieve a buffer from the ring */
2358                 if (!skb) {
2359                         xdp.data = page_address(rx_buffer->page) +
2360                                    rx_buffer->page_offset;
2361                         xdp.data_meta = xdp.data;
2362                         xdp.data_hard_start = xdp.data -
2363                                               ixgbe_rx_offset(rx_ring);
2364                         xdp.data_end = xdp.data + size;
2365
2366                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2367                 }
2368
2369                 if (IS_ERR(skb)) {
2370                         if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2371                                 xdp_xmit = true;
2372                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2373                         } else {
2374                                 rx_buffer->pagecnt_bias++;
2375                         }
2376                         total_rx_packets++;
2377                         total_rx_bytes += size;
2378                 } else if (skb) {
2379                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2380                 } else if (ring_uses_build_skb(rx_ring)) {
2381                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2382                                               &xdp, rx_desc);
2383                 } else {
2384                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2385                                                   &xdp, rx_desc);
2386                 }
2387
2388                 /* exit if we failed to retrieve a buffer */
2389                 if (!skb) {
2390                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2391                         rx_buffer->pagecnt_bias++;
2392                         break;
2393                 }
2394
2395                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2396                 cleaned_count++;
2397
2398                 /* place incomplete frames back on ring for completion */
2399                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2400                         continue;
2401
2402                 /* verify the packet layout is correct */
2403                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2404                         continue;
2405
2406                 /* probably a little skewed due to removing CRC */
2407                 total_rx_bytes += skb->len;
2408
2409                 /* populate checksum, timestamp, VLAN, and protocol */
2410                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2411
2412 #ifdef IXGBE_FCOE
2413                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2414                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2415                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2416                         /* include DDPed FCoE data */
2417                         if (ddp_bytes > 0) {
2418                                 if (!mss) {
2419                                         mss = rx_ring->netdev->mtu -
2420                                                 sizeof(struct fcoe_hdr) -
2421                                                 sizeof(struct fc_frame_header) -
2422                                                 sizeof(struct fcoe_crc_eof);
2423                                         if (mss > 512)
2424                                                 mss &= ~511;
2425                                 }
2426                                 total_rx_bytes += ddp_bytes;
2427                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2428                                                                  mss);
2429                         }
2430                         if (!ddp_bytes) {
2431                                 dev_kfree_skb_any(skb);
2432                                 continue;
2433                         }
2434                 }
2435
2436 #endif /* IXGBE_FCOE */
2437                 ixgbe_rx_skb(q_vector, skb);
2438
2439                 /* update budget accounting */
2440                 total_rx_packets++;
2441         }
2442
2443         if (xdp_xmit) {
2444                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2445
2446                 /* Force memory writes to complete before letting h/w
2447                  * know there are new descriptors to fetch.
2448                  */
2449                 wmb();
2450                 writel(ring->next_to_use, ring->tail);
2451
2452                 xdp_do_flush_map();
2453         }
2454
2455         u64_stats_update_begin(&rx_ring->syncp);
2456         rx_ring->stats.packets += total_rx_packets;
2457         rx_ring->stats.bytes += total_rx_bytes;
2458         u64_stats_update_end(&rx_ring->syncp);
2459         q_vector->rx.total_packets += total_rx_packets;
2460         q_vector->rx.total_bytes += total_rx_bytes;
2461
2462         return total_rx_packets;
2463 }
2464
2465 /**
2466  * ixgbe_configure_msix - Configure MSI-X hardware
2467  * @adapter: board private structure
2468  *
2469  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2470  * interrupts.
2471  **/
2472 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2473 {
2474         struct ixgbe_q_vector *q_vector;
2475         int v_idx;
2476         u32 mask;
2477
2478         /* Populate MSIX to EITR Select */
2479         if (adapter->num_vfs > 32) {
2480                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2481                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2482         }
2483
2484         /*
2485          * Populate the IVAR table and set the ITR values to the
2486          * corresponding register.
2487          */
2488         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2489                 struct ixgbe_ring *ring;
2490                 q_vector = adapter->q_vector[v_idx];
2491
2492                 ixgbe_for_each_ring(ring, q_vector->rx)
2493                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2494
2495                 ixgbe_for_each_ring(ring, q_vector->tx)
2496                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2497
2498                 ixgbe_write_eitr(q_vector);
2499         }
2500
2501         switch (adapter->hw.mac.type) {
2502         case ixgbe_mac_82598EB:
2503                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2504                                v_idx);
2505                 break;
2506         case ixgbe_mac_82599EB:
2507         case ixgbe_mac_X540:
2508         case ixgbe_mac_X550:
2509         case ixgbe_mac_X550EM_x:
2510         case ixgbe_mac_x550em_a:
2511                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2512                 break;
2513         default:
2514                 break;
2515         }
2516         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2517
2518         /* set up to autoclear timer, and the vectors */
2519         mask = IXGBE_EIMS_ENABLE_MASK;
2520         mask &= ~(IXGBE_EIMS_OTHER |
2521                   IXGBE_EIMS_MAILBOX |
2522                   IXGBE_EIMS_LSC);
2523
2524         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2525 }
2526
2527 /**
2528  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2529  * @q_vector: structure containing interrupt and ring information
2530  * @ring_container: structure containing ring performance data
2531  *
2532  *      Stores a new ITR value based on packets and byte
2533  *      counts during the last interrupt.  The advantage of per interrupt
2534  *      computation is faster updates and more accurate ITR for the current
2535  *      traffic pattern.  Constants in this function were computed
2536  *      based on theoretical maximum wire speed and thresholds were set based
2537  *      on testing data as well as attempting to minimize response time
2538  *      while increasing bulk throughput.
2539  **/
2540 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2541                              struct ixgbe_ring_container *ring_container)
2542 {
2543         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2544                            IXGBE_ITR_ADAPTIVE_LATENCY;
2545         unsigned int avg_wire_size, packets, bytes;
2546         unsigned long next_update = jiffies;
2547
2548         /* If we don't have any rings just leave ourselves set for maximum
2549          * possible latency so we take ourselves out of the equation.
2550          */
2551         if (!ring_container->ring)
2552                 return;
2553
2554         /* If we didn't update within up to 1 - 2 jiffies we can assume
2555          * that either packets are coming in so slow there hasn't been
2556          * any work, or that there is so much work that NAPI is dealing
2557          * with interrupt moderation and we don't need to do anything.
2558          */
2559         if (time_after(next_update, ring_container->next_update))
2560                 goto clear_counts;
2561
2562         packets = ring_container->total_packets;
2563
2564         /* We have no packets to actually measure against. This means
2565          * either one of the other queues on this vector is active or
2566          * we are a Tx queue doing TSO with too high of an interrupt rate.
2567          *
2568          * When this occurs just tick up our delay by the minimum value
2569          * and hope that this extra delay will prevent us from being called
2570          * without any work on our queue.
2571          */
2572         if (!packets) {
2573                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2574                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2575                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2576                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2577                 goto clear_counts;
2578         }
2579
2580         bytes = ring_container->total_bytes;
2581
2582         /* If packets are less than 4 or bytes are less than 9000 assume
2583          * insufficient data to use bulk rate limiting approach. We are
2584          * likely latency driven.
2585          */
2586         if (packets < 4 && bytes < 9000) {
2587                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2588                 goto adjust_by_size;
2589         }
2590
2591         /* Between 4 and 48 we can assume that our current interrupt delay
2592          * is only slightly too low. As such we should increase it by a small
2593          * fixed amount.
2594          */
2595         if (packets < 48) {
2596                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2597                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2598                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2599                 goto clear_counts;
2600         }
2601
2602         /* Between 48 and 96 is our "goldilocks" zone where we are working
2603          * out "just right". Just report that our current ITR is good for us.
2604          */
2605         if (packets < 96) {
2606                 itr = q_vector->itr >> 2;
2607                 goto clear_counts;
2608         }
2609
2610         /* If packet count is 96 or greater we are likely looking at a slight
2611          * overrun of the delay we want. Try halving our delay to see if that
2612          * will cut the number of packets in half per interrupt.
2613          */
2614         if (packets < 256) {
2615                 itr = q_vector->itr >> 3;
2616                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2617                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2618                 goto clear_counts;
2619         }
2620
2621         /* The paths below assume we are dealing with a bulk ITR since number
2622          * of packets is 256 or greater. We are just going to have to compute
2623          * a value and try to bring the count under control, though for smaller
2624          * packet sizes there isn't much we can do as NAPI polling will likely
2625          * be kicking in sooner rather than later.
2626          */
2627         itr = IXGBE_ITR_ADAPTIVE_BULK;
2628
2629 adjust_by_size:
2630         /* If packet counts are 256 or greater we can assume we have a gross
2631          * overestimation of what the rate should be. Instead of trying to fine
2632          * tune it just use the formula below to try and dial in an exact value
2633          * give the current packet size of the frame.
2634          */
2635         avg_wire_size = bytes / packets;
2636
2637         /* The following is a crude approximation of:
2638          *  wmem_default / (size + overhead) = desired_pkts_per_int
2639          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2640          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2641          *
2642          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2643          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2644          * formula down to
2645          *
2646          *  (170 * (size + 24)) / (size + 640) = ITR
2647          *
2648          * We first do some math on the packet size and then finally bitshift
2649          * by 8 after rounding up. We also have to account for PCIe link speed
2650          * difference as ITR scales based on this.
2651          */
2652         if (avg_wire_size <= 60) {
2653                 /* Start at 50k ints/sec */
2654                 avg_wire_size = 5120;
2655         } else if (avg_wire_size <= 316) {
2656                 /* 50K ints/sec to 16K ints/sec */
2657                 avg_wire_size *= 40;
2658                 avg_wire_size += 2720;
2659         } else if (avg_wire_size <= 1084) {
2660                 /* 16K ints/sec to 9.2K ints/sec */
2661                 avg_wire_size *= 15;
2662                 avg_wire_size += 11452;
2663         } else if (avg_wire_size <= 1980) {
2664                 /* 9.2K ints/sec to 8K ints/sec */
2665                 avg_wire_size *= 5;
2666                 avg_wire_size += 22420;
2667         } else {
2668                 /* plateau at a limit of 8K ints/sec */
2669                 avg_wire_size = 32256;
2670         }
2671
2672         /* If we are in low latency mode half our delay which doubles the rate
2673          * to somewhere between 100K to 16K ints/sec
2674          */
2675         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2676                 avg_wire_size >>= 1;
2677
2678         /* Resultant value is 256 times larger than it needs to be. This
2679          * gives us room to adjust the value as needed to either increase
2680          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2681          *
2682          * Use addition as we have already recorded the new latency flag
2683          * for the ITR value.
2684          */
2685         switch (q_vector->adapter->link_speed) {
2686         case IXGBE_LINK_SPEED_10GB_FULL:
2687         case IXGBE_LINK_SPEED_100_FULL:
2688         default:
2689                 itr += DIV_ROUND_UP(avg_wire_size,
2690                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2691                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2692                 break;
2693         case IXGBE_LINK_SPEED_2_5GB_FULL:
2694         case IXGBE_LINK_SPEED_1GB_FULL:
2695         case IXGBE_LINK_SPEED_10_FULL:
2696                 itr += DIV_ROUND_UP(avg_wire_size,
2697                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2698                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2699                 break;
2700         }
2701
2702 clear_counts:
2703         /* write back value */
2704         ring_container->itr = itr;
2705
2706         /* next update should occur within next jiffy */
2707         ring_container->next_update = next_update + 1;
2708
2709         ring_container->total_bytes = 0;
2710         ring_container->total_packets = 0;
2711 }
2712
2713 /**
2714  * ixgbe_write_eitr - write EITR register in hardware specific way
2715  * @q_vector: structure containing interrupt and ring information
2716  *
2717  * This function is made to be called by ethtool and by the driver
2718  * when it needs to update EITR registers at runtime.  Hardware
2719  * specific quirks/differences are taken care of here.
2720  */
2721 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2722 {
2723         struct ixgbe_adapter *adapter = q_vector->adapter;
2724         struct ixgbe_hw *hw = &adapter->hw;
2725         int v_idx = q_vector->v_idx;
2726         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2727
2728         switch (adapter->hw.mac.type) {
2729         case ixgbe_mac_82598EB:
2730                 /* must write high and low 16 bits to reset counter */
2731                 itr_reg |= (itr_reg << 16);
2732                 break;
2733         case ixgbe_mac_82599EB:
2734         case ixgbe_mac_X540:
2735         case ixgbe_mac_X550:
2736         case ixgbe_mac_X550EM_x:
2737         case ixgbe_mac_x550em_a:
2738                 /*
2739                  * set the WDIS bit to not clear the timer bits and cause an
2740                  * immediate assertion of the interrupt
2741                  */
2742                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2743                 break;
2744         default:
2745                 break;
2746         }
2747         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2748 }
2749
2750 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2751 {
2752         u32 new_itr;
2753
2754         ixgbe_update_itr(q_vector, &q_vector->tx);
2755         ixgbe_update_itr(q_vector, &q_vector->rx);
2756
2757         /* use the smallest value of new ITR delay calculations */
2758         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2759
2760         /* Clear latency flag if set, shift into correct position */
2761         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2762         new_itr <<= 2;
2763
2764         if (new_itr != q_vector->itr) {
2765                 /* save the algorithm value here */
2766                 q_vector->itr = new_itr;
2767
2768                 ixgbe_write_eitr(q_vector);
2769         }
2770 }
2771
2772 /**
2773  * ixgbe_check_overtemp_subtask - check for over temperature
2774  * @adapter: pointer to adapter
2775  **/
2776 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2777 {
2778         struct ixgbe_hw *hw = &adapter->hw;
2779         u32 eicr = adapter->interrupt_event;
2780         s32 rc;
2781
2782         if (test_bit(__IXGBE_DOWN, &adapter->state))
2783                 return;
2784
2785         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2786                 return;
2787
2788         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2789
2790         switch (hw->device_id) {
2791         case IXGBE_DEV_ID_82599_T3_LOM:
2792                 /*
2793                  * Since the warning interrupt is for both ports
2794                  * we don't have to check if:
2795                  *  - This interrupt wasn't for our port.
2796                  *  - We may have missed the interrupt so always have to
2797                  *    check if we  got a LSC
2798                  */
2799                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2800                     !(eicr & IXGBE_EICR_LSC))
2801                         return;
2802
2803                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2804                         u32 speed;
2805                         bool link_up = false;
2806
2807                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2808
2809                         if (link_up)
2810                                 return;
2811                 }
2812
2813                 /* Check if this is not due to overtemp */
2814                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2815                         return;
2816
2817                 break;
2818         case IXGBE_DEV_ID_X550EM_A_1G_T:
2819         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2820                 rc = hw->phy.ops.check_overtemp(hw);
2821                 if (rc != IXGBE_ERR_OVERTEMP)
2822                         return;
2823                 break;
2824         default:
2825                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2826                         return;
2827                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2828                         return;
2829                 break;
2830         }
2831         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2832
2833         adapter->interrupt_event = 0;
2834 }
2835
2836 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2837 {
2838         struct ixgbe_hw *hw = &adapter->hw;
2839
2840         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2841             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2842                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2843                 /* write to clear the interrupt */
2844                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2845         }
2846 }
2847
2848 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2849 {
2850         struct ixgbe_hw *hw = &adapter->hw;
2851
2852         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2853                 return;
2854
2855         switch (adapter->hw.mac.type) {
2856         case ixgbe_mac_82599EB:
2857                 /*
2858                  * Need to check link state so complete overtemp check
2859                  * on service task
2860                  */
2861                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2862                      (eicr & IXGBE_EICR_LSC)) &&
2863                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2864                         adapter->interrupt_event = eicr;
2865                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2866                         ixgbe_service_event_schedule(adapter);
2867                         return;
2868                 }
2869                 return;
2870         case ixgbe_mac_x550em_a:
2871                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2872                         adapter->interrupt_event = eicr;
2873                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2874                         ixgbe_service_event_schedule(adapter);
2875                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2876                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2877                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2878                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2879                 }
2880                 return;
2881         case ixgbe_mac_X550:
2882         case ixgbe_mac_X540:
2883                 if (!(eicr & IXGBE_EICR_TS))
2884                         return;
2885                 break;
2886         default:
2887                 return;
2888         }
2889
2890         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2891 }
2892
2893 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2894 {
2895         switch (hw->mac.type) {
2896         case ixgbe_mac_82598EB:
2897                 if (hw->phy.type == ixgbe_phy_nl)
2898                         return true;
2899                 return false;
2900         case ixgbe_mac_82599EB:
2901         case ixgbe_mac_X550EM_x:
2902         case ixgbe_mac_x550em_a:
2903                 switch (hw->mac.ops.get_media_type(hw)) {
2904                 case ixgbe_media_type_fiber:
2905                 case ixgbe_media_type_fiber_qsfp:
2906                         return true;
2907                 default:
2908                         return false;
2909                 }
2910         default:
2911                 return false;
2912         }
2913 }
2914
2915 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2916 {
2917         struct ixgbe_hw *hw = &adapter->hw;
2918         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2919
2920         if (!ixgbe_is_sfp(hw))
2921                 return;
2922
2923         /* Later MAC's use different SDP */
2924         if (hw->mac.type >= ixgbe_mac_X540)
2925                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2926
2927         if (eicr & eicr_mask) {
2928                 /* Clear the interrupt */
2929                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2930                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2931                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2932                         adapter->sfp_poll_time = 0;
2933                         ixgbe_service_event_schedule(adapter);
2934                 }
2935         }
2936
2937         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2938             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2939                 /* Clear the interrupt */
2940                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2941                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2942                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2943                         ixgbe_service_event_schedule(adapter);
2944                 }
2945         }
2946 }
2947
2948 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2949 {
2950         struct ixgbe_hw *hw = &adapter->hw;
2951
2952         adapter->lsc_int++;
2953         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2954         adapter->link_check_timeout = jiffies;
2955         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2956                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2957                 IXGBE_WRITE_FLUSH(hw);
2958                 ixgbe_service_event_schedule(adapter);
2959         }
2960 }
2961
2962 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2963                                            u64 qmask)
2964 {
2965         u32 mask;
2966         struct ixgbe_hw *hw = &adapter->hw;
2967
2968         switch (hw->mac.type) {
2969         case ixgbe_mac_82598EB:
2970                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2971                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2972                 break;
2973         case ixgbe_mac_82599EB:
2974         case ixgbe_mac_X540:
2975         case ixgbe_mac_X550:
2976         case ixgbe_mac_X550EM_x:
2977         case ixgbe_mac_x550em_a:
2978                 mask = (qmask & 0xFFFFFFFF);
2979                 if (mask)
2980                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2981                 mask = (qmask >> 32);
2982                 if (mask)
2983                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2984                 break;
2985         default:
2986                 break;
2987         }
2988         /* skip the flush */
2989 }
2990
2991 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2992                                             u64 qmask)
2993 {
2994         u32 mask;
2995         struct ixgbe_hw *hw = &adapter->hw;
2996
2997         switch (hw->mac.type) {
2998         case ixgbe_mac_82598EB:
2999                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
3000                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
3001                 break;
3002         case ixgbe_mac_82599EB:
3003         case ixgbe_mac_X540:
3004         case ixgbe_mac_X550:
3005         case ixgbe_mac_X550EM_x:
3006         case ixgbe_mac_x550em_a:
3007                 mask = (qmask & 0xFFFFFFFF);
3008                 if (mask)
3009                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
3010                 mask = (qmask >> 32);
3011                 if (mask)
3012                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
3013                 break;
3014         default:
3015                 break;
3016         }
3017         /* skip the flush */
3018 }
3019
3020 /**
3021  * ixgbe_irq_enable - Enable default interrupt generation settings
3022  * @adapter: board private structure
3023  * @queues: enable irqs for queues
3024  * @flush: flush register write
3025  **/
3026 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3027                                     bool flush)
3028 {
3029         struct ixgbe_hw *hw = &adapter->hw;
3030         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3031
3032         /* don't reenable LSC while waiting for link */
3033         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3034                 mask &= ~IXGBE_EIMS_LSC;
3035
3036         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3037                 switch (adapter->hw.mac.type) {
3038                 case ixgbe_mac_82599EB:
3039                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3040                         break;
3041                 case ixgbe_mac_X540:
3042                 case ixgbe_mac_X550:
3043                 case ixgbe_mac_X550EM_x:
3044                 case ixgbe_mac_x550em_a:
3045                         mask |= IXGBE_EIMS_TS;
3046                         break;
3047                 default:
3048                         break;
3049                 }
3050         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3051                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3052         switch (adapter->hw.mac.type) {
3053         case ixgbe_mac_82599EB:
3054                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3055                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3056                 /* fall through */
3057         case ixgbe_mac_X540:
3058         case ixgbe_mac_X550:
3059         case ixgbe_mac_X550EM_x:
3060         case ixgbe_mac_x550em_a:
3061                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3062                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3063                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3064                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3065                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3066                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3067                 mask |= IXGBE_EIMS_ECC;
3068                 mask |= IXGBE_EIMS_MAILBOX;
3069                 break;
3070         default:
3071                 break;
3072         }
3073
3074         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3075             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3076                 mask |= IXGBE_EIMS_FLOW_DIR;
3077
3078         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3079         if (queues)
3080                 ixgbe_irq_enable_queues(adapter, ~0);
3081         if (flush)
3082                 IXGBE_WRITE_FLUSH(&adapter->hw);
3083 }
3084
3085 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3086 {
3087         struct ixgbe_adapter *adapter = data;
3088         struct ixgbe_hw *hw = &adapter->hw;
3089         u32 eicr;
3090
3091         /*
3092          * Workaround for Silicon errata.  Use clear-by-write instead
3093          * of clear-by-read.  Reading with EICS will return the
3094          * interrupt causes without clearing, which later be done
3095          * with the write to EICR.
3096          */
3097         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3098
3099         /* The lower 16bits of the EICR register are for the queue interrupts
3100          * which should be masked here in order to not accidentally clear them if
3101          * the bits are high when ixgbe_msix_other is called. There is a race
3102          * condition otherwise which results in possible performance loss
3103          * especially if the ixgbe_msix_other interrupt is triggering
3104          * consistently (as it would when PPS is turned on for the X540 device)
3105          */
3106         eicr &= 0xFFFF0000;
3107
3108         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3109
3110         if (eicr & IXGBE_EICR_LSC)
3111                 ixgbe_check_lsc(adapter);
3112
3113         if (eicr & IXGBE_EICR_MAILBOX)
3114                 ixgbe_msg_task(adapter);
3115
3116         switch (hw->mac.type) {
3117         case ixgbe_mac_82599EB:
3118         case ixgbe_mac_X540:
3119         case ixgbe_mac_X550:
3120         case ixgbe_mac_X550EM_x:
3121         case ixgbe_mac_x550em_a:
3122                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3123                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3124                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3125                         ixgbe_service_event_schedule(adapter);
3126                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3127                                         IXGBE_EICR_GPI_SDP0_X540);
3128                 }
3129                 if (eicr & IXGBE_EICR_ECC) {
3130                         e_info(link, "Received ECC Err, initiating reset\n");
3131                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3132                         ixgbe_service_event_schedule(adapter);
3133                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3134                 }
3135                 /* Handle Flow Director Full threshold interrupt */
3136                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3137                         int reinit_count = 0;
3138                         int i;
3139                         for (i = 0; i < adapter->num_tx_queues; i++) {
3140                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3141                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3142                                                        &ring->state))
3143                                         reinit_count++;
3144                         }
3145                         if (reinit_count) {
3146                                 /* no more flow director interrupts until after init */
3147                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3148                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3149                                 ixgbe_service_event_schedule(adapter);
3150                         }
3151                 }
3152                 ixgbe_check_sfp_event(adapter, eicr);
3153                 ixgbe_check_overtemp_event(adapter, eicr);
3154                 break;
3155         default:
3156                 break;
3157         }
3158
3159         ixgbe_check_fan_failure(adapter, eicr);
3160
3161         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3162                 ixgbe_ptp_check_pps_event(adapter);
3163
3164         /* re-enable the original interrupt state, no lsc, no queues */
3165         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3166                 ixgbe_irq_enable(adapter, false, false);
3167
3168         return IRQ_HANDLED;
3169 }
3170
3171 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3172 {
3173         struct ixgbe_q_vector *q_vector = data;
3174
3175         /* EIAM disabled interrupts (on this vector) for us */
3176
3177         if (q_vector->rx.ring || q_vector->tx.ring)
3178                 napi_schedule_irqoff(&q_vector->napi);
3179
3180         return IRQ_HANDLED;
3181 }
3182
3183 /**
3184  * ixgbe_poll - NAPI Rx polling callback
3185  * @napi: structure for representing this polling device
3186  * @budget: how many packets driver is allowed to clean
3187  *
3188  * This function is used for legacy and MSI, NAPI mode
3189  **/
3190 int ixgbe_poll(struct napi_struct *napi, int budget)
3191 {
3192         struct ixgbe_q_vector *q_vector =
3193                                 container_of(napi, struct ixgbe_q_vector, napi);
3194         struct ixgbe_adapter *adapter = q_vector->adapter;
3195         struct ixgbe_ring *ring;
3196         int per_ring_budget, work_done = 0;
3197         bool clean_complete = true;
3198
3199 #ifdef CONFIG_IXGBE_DCA
3200         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3201                 ixgbe_update_dca(q_vector);
3202 #endif
3203
3204         ixgbe_for_each_ring(ring, q_vector->tx) {
3205                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3206                         clean_complete = false;
3207         }
3208
3209         /* Exit if we are called by netpoll */
3210         if (budget <= 0)
3211                 return budget;
3212
3213         /* attempt to distribute budget to each queue fairly, but don't allow
3214          * the budget to go below 1 because we'll exit polling */
3215         if (q_vector->rx.count > 1)
3216                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3217         else
3218                 per_ring_budget = budget;
3219
3220         ixgbe_for_each_ring(ring, q_vector->rx) {
3221                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3222                                                  per_ring_budget);
3223
3224                 work_done += cleaned;
3225                 if (cleaned >= per_ring_budget)
3226                         clean_complete = false;
3227         }
3228
3229         /* If all work not completed, return budget and keep polling */
3230         if (!clean_complete)
3231                 return budget;
3232
3233         /* all work done, exit the polling mode */
3234         napi_complete_done(napi, work_done);
3235         if (adapter->rx_itr_setting & 1)
3236                 ixgbe_set_itr(q_vector);
3237         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3238                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3239
3240         return min(work_done, budget - 1);
3241 }
3242
3243 /**
3244  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3245  * @adapter: board private structure
3246  *
3247  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3248  * interrupts from the kernel.
3249  **/
3250 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3251 {
3252         struct net_device *netdev = adapter->netdev;
3253         unsigned int ri = 0, ti = 0;
3254         int vector, err;
3255
3256         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3257                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3258                 struct msix_entry *entry = &adapter->msix_entries[vector];
3259
3260                 if (q_vector->tx.ring && q_vector->rx.ring) {
3261                         snprintf(q_vector->name, sizeof(q_vector->name),
3262                                  "%s-TxRx-%u", netdev->name, ri++);
3263                         ti++;
3264                 } else if (q_vector->rx.ring) {
3265                         snprintf(q_vector->name, sizeof(q_vector->name),
3266                                  "%s-rx-%u", netdev->name, ri++);
3267                 } else if (q_vector->tx.ring) {
3268                         snprintf(q_vector->name, sizeof(q_vector->name),
3269                                  "%s-tx-%u", netdev->name, ti++);
3270                 } else {
3271                         /* skip this unused q_vector */
3272                         continue;
3273                 }
3274                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3275                                   q_vector->name, q_vector);
3276                 if (err) {
3277                         e_err(probe, "request_irq failed for MSIX interrupt "
3278                               "Error: %d\n", err);
3279                         goto free_queue_irqs;
3280                 }
3281                 /* If Flow Director is enabled, set interrupt affinity */
3282                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3283                         /* assign the mask for this irq */
3284                         irq_set_affinity_hint(entry->vector,
3285                                               &q_vector->affinity_mask);
3286                 }
3287         }
3288
3289         err = request_irq(adapter->msix_entries[vector].vector,
3290                           ixgbe_msix_other, 0, netdev->name, adapter);
3291         if (err) {
3292                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3293                 goto free_queue_irqs;
3294         }
3295
3296         return 0;
3297
3298 free_queue_irqs:
3299         while (vector) {
3300                 vector--;
3301                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3302                                       NULL);
3303                 free_irq(adapter->msix_entries[vector].vector,
3304                          adapter->q_vector[vector]);
3305         }
3306         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3307         pci_disable_msix(adapter->pdev);
3308         kfree(adapter->msix_entries);
3309         adapter->msix_entries = NULL;
3310         return err;
3311 }
3312
3313 /**
3314  * ixgbe_intr - legacy mode Interrupt Handler
3315  * @irq: interrupt number
3316  * @data: pointer to a network interface device structure
3317  **/
3318 static irqreturn_t ixgbe_intr(int irq, void *data)
3319 {
3320         struct ixgbe_adapter *adapter = data;
3321         struct ixgbe_hw *hw = &adapter->hw;
3322         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3323         u32 eicr;
3324
3325         /*
3326          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3327          * before the read of EICR.
3328          */
3329         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3330
3331         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3332          * therefore no explicit interrupt disable is necessary */
3333         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3334         if (!eicr) {
3335                 /*
3336                  * shared interrupt alert!
3337                  * make sure interrupts are enabled because the read will
3338                  * have disabled interrupts due to EIAM
3339                  * finish the workaround of silicon errata on 82598.  Unmask
3340                  * the interrupt that we masked before the EICR read.
3341                  */
3342                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3343                         ixgbe_irq_enable(adapter, true, true);
3344                 return IRQ_NONE;        /* Not our interrupt */
3345         }
3346
3347         if (eicr & IXGBE_EICR_LSC)
3348                 ixgbe_check_lsc(adapter);
3349
3350         switch (hw->mac.type) {
3351         case ixgbe_mac_82599EB:
3352                 ixgbe_check_sfp_event(adapter, eicr);
3353                 /* Fall through */
3354         case ixgbe_mac_X540:
3355         case ixgbe_mac_X550:
3356         case ixgbe_mac_X550EM_x:
3357         case ixgbe_mac_x550em_a:
3358                 if (eicr & IXGBE_EICR_ECC) {
3359                         e_info(link, "Received ECC Err, initiating reset\n");
3360                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3361                         ixgbe_service_event_schedule(adapter);
3362                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3363                 }
3364                 ixgbe_check_overtemp_event(adapter, eicr);
3365                 break;
3366         default:
3367                 break;
3368         }
3369
3370         ixgbe_check_fan_failure(adapter, eicr);
3371         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3372                 ixgbe_ptp_check_pps_event(adapter);
3373
3374         /* would disable interrupts here but EIAM disabled it */
3375         napi_schedule_irqoff(&q_vector->napi);
3376
3377         /*
3378          * re-enable link(maybe) and non-queue interrupts, no flush.
3379          * ixgbe_poll will re-enable the queue interrupts
3380          */
3381         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3382                 ixgbe_irq_enable(adapter, false, false);
3383
3384         return IRQ_HANDLED;
3385 }
3386
3387 /**
3388  * ixgbe_request_irq - initialize interrupts
3389  * @adapter: board private structure
3390  *
3391  * Attempts to configure interrupts using the best available
3392  * capabilities of the hardware and kernel.
3393  **/
3394 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3395 {
3396         struct net_device *netdev = adapter->netdev;
3397         int err;
3398
3399         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3400                 err = ixgbe_request_msix_irqs(adapter);
3401         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3402                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3403                                   netdev->name, adapter);
3404         else
3405                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3406                                   netdev->name, adapter);
3407
3408         if (err)
3409                 e_err(probe, "request_irq failed, Error %d\n", err);
3410
3411         return err;
3412 }
3413
3414 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3415 {
3416         int vector;
3417
3418         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3419                 free_irq(adapter->pdev->irq, adapter);
3420                 return;
3421         }
3422
3423         if (!adapter->msix_entries)
3424                 return;
3425
3426         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3427                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3428                 struct msix_entry *entry = &adapter->msix_entries[vector];
3429
3430                 /* free only the irqs that were actually requested */
3431                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3432                         continue;
3433
3434                 /* clear the affinity_mask in the IRQ descriptor */
3435                 irq_set_affinity_hint(entry->vector, NULL);
3436
3437                 free_irq(entry->vector, q_vector);
3438         }
3439
3440         free_irq(adapter->msix_entries[vector].vector, adapter);
3441 }
3442
3443 /**
3444  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3445  * @adapter: board private structure
3446  **/
3447 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3448 {
3449         switch (adapter->hw.mac.type) {
3450         case ixgbe_mac_82598EB:
3451                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3452                 break;
3453         case ixgbe_mac_82599EB:
3454         case ixgbe_mac_X540:
3455         case ixgbe_mac_X550:
3456         case ixgbe_mac_X550EM_x:
3457         case ixgbe_mac_x550em_a:
3458                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3459                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3460                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3461                 break;
3462         default:
3463                 break;
3464         }
3465         IXGBE_WRITE_FLUSH(&adapter->hw);
3466         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3467                 int vector;
3468
3469                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3470                         synchronize_irq(adapter->msix_entries[vector].vector);
3471
3472                 synchronize_irq(adapter->msix_entries[vector++].vector);
3473         } else {
3474                 synchronize_irq(adapter->pdev->irq);
3475         }
3476 }
3477
3478 /**
3479  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3480  * @adapter: board private structure
3481  *
3482  **/
3483 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3484 {
3485         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3486
3487         ixgbe_write_eitr(q_vector);
3488
3489         ixgbe_set_ivar(adapter, 0, 0, 0);
3490         ixgbe_set_ivar(adapter, 1, 0, 0);
3491
3492         e_info(hw, "Legacy interrupt IVAR setup done\n");
3493 }
3494
3495 /**
3496  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3497  * @adapter: board private structure
3498  * @ring: structure containing ring specific data
3499  *
3500  * Configure the Tx descriptor ring after a reset.
3501  **/
3502 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3503                              struct ixgbe_ring *ring)
3504 {
3505         struct ixgbe_hw *hw = &adapter->hw;
3506         u64 tdba = ring->dma;
3507         int wait_loop = 10;
3508         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3509         u8 reg_idx = ring->reg_idx;
3510
3511         /* disable queue to avoid issues while updating state */
3512         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3513         IXGBE_WRITE_FLUSH(hw);
3514
3515         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3516                         (tdba & DMA_BIT_MASK(32)));
3517         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3518         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3519                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3520         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3521         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3522         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3523
3524         /*
3525          * set WTHRESH to encourage burst writeback, it should not be set
3526          * higher than 1 when:
3527          * - ITR is 0 as it could cause false TX hangs
3528          * - ITR is set to > 100k int/sec and BQL is enabled
3529          *
3530          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3531          * to or less than the number of on chip descriptors, which is
3532          * currently 40.
3533          */
3534         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3535                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3536         else
3537                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3538
3539         /*
3540          * Setting PTHRESH to 32 both improves performance
3541          * and avoids a TX hang with DFP enabled
3542          */
3543         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3544                    32;          /* PTHRESH = 32 */
3545
3546         /* reinitialize flowdirector state */
3547         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3548                 ring->atr_sample_rate = adapter->atr_sample_rate;
3549                 ring->atr_count = 0;
3550                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3551         } else {
3552                 ring->atr_sample_rate = 0;
3553         }
3554
3555         /* initialize XPS */
3556         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3557                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3558
3559                 if (q_vector)
3560                         netif_set_xps_queue(ring->netdev,
3561                                             &q_vector->affinity_mask,
3562                                             ring->queue_index);
3563         }
3564
3565         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3566
3567         /* reinitialize tx_buffer_info */
3568         memset(ring->tx_buffer_info, 0,
3569                sizeof(struct ixgbe_tx_buffer) * ring->count);
3570
3571         /* enable queue */
3572         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3573
3574         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3575         if (hw->mac.type == ixgbe_mac_82598EB &&
3576             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3577                 return;
3578
3579         /* poll to verify queue is enabled */
3580         do {
3581                 usleep_range(1000, 2000);
3582                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3583         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3584         if (!wait_loop)
3585                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3586 }
3587
3588 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3589 {
3590         struct ixgbe_hw *hw = &adapter->hw;
3591         u32 rttdcs, mtqc;
3592         u8 tcs = adapter->hw_tcs;
3593
3594         if (hw->mac.type == ixgbe_mac_82598EB)
3595                 return;
3596
3597         /* disable the arbiter while setting MTQC */
3598         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3599         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3600         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3601
3602         /* set transmit pool layout */
3603         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3604                 mtqc = IXGBE_MTQC_VT_ENA;
3605                 if (tcs > 4)
3606                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3607                 else if (tcs > 1)
3608                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3609                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3610                          IXGBE_82599_VMDQ_4Q_MASK)
3611                         mtqc |= IXGBE_MTQC_32VF;
3612                 else
3613                         mtqc |= IXGBE_MTQC_64VF;
3614         } else {
3615                 if (tcs > 4)
3616                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3617                 else if (tcs > 1)
3618                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3619                 else
3620                         mtqc = IXGBE_MTQC_64Q_1PB;
3621         }
3622
3623         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3624
3625         /* Enable Security TX Buffer IFG for multiple pb */
3626         if (tcs) {
3627                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3628                 sectx |= IXGBE_SECTX_DCB;
3629                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3630         }
3631
3632         /* re-enable the arbiter */
3633         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3634         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3635 }
3636
3637 /**
3638  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3639  * @adapter: board private structure
3640  *
3641  * Configure the Tx unit of the MAC after a reset.
3642  **/
3643 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3644 {
3645         struct ixgbe_hw *hw = &adapter->hw;
3646         u32 dmatxctl;
3647         u32 i;
3648
3649         ixgbe_setup_mtqc(adapter);
3650
3651         if (hw->mac.type != ixgbe_mac_82598EB) {
3652                 /* DMATXCTL.EN must be before Tx queues are enabled */
3653                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3654                 dmatxctl |= IXGBE_DMATXCTL_TE;
3655                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3656         }
3657
3658         /* Setup the HW Tx Head and Tail descriptor pointers */
3659         for (i = 0; i < adapter->num_tx_queues; i++)
3660                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3661         for (i = 0; i < adapter->num_xdp_queues; i++)
3662                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3663 }
3664
3665 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3666                                  struct ixgbe_ring *ring)
3667 {
3668         struct ixgbe_hw *hw = &adapter->hw;
3669         u8 reg_idx = ring->reg_idx;
3670         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3671
3672         srrctl |= IXGBE_SRRCTL_DROP_EN;
3673
3674         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3675 }
3676
3677 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3678                                   struct ixgbe_ring *ring)
3679 {
3680         struct ixgbe_hw *hw = &adapter->hw;
3681         u8 reg_idx = ring->reg_idx;
3682         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3683
3684         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3685
3686         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3687 }
3688
3689 #ifdef CONFIG_IXGBE_DCB
3690 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3691 #else
3692 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3693 #endif
3694 {
3695         int i;
3696         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3697
3698         if (adapter->ixgbe_ieee_pfc)
3699                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3700
3701         /*
3702          * We should set the drop enable bit if:
3703          *  SR-IOV is enabled
3704          *   or
3705          *  Number of Rx queues > 1 and flow control is disabled
3706          *
3707          *  This allows us to avoid head of line blocking for security
3708          *  and performance reasons.
3709          */
3710         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3711             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3712                 for (i = 0; i < adapter->num_rx_queues; i++)
3713                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3714         } else {
3715                 for (i = 0; i < adapter->num_rx_queues; i++)
3716                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3717         }
3718 }
3719
3720 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3721
3722 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3723                                    struct ixgbe_ring *rx_ring)
3724 {
3725         struct ixgbe_hw *hw = &adapter->hw;
3726         u32 srrctl;
3727         u8 reg_idx = rx_ring->reg_idx;
3728
3729         if (hw->mac.type == ixgbe_mac_82598EB) {
3730                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3731
3732                 /*
3733                  * if VMDq is not active we must program one srrctl register
3734                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3735                  */
3736                 reg_idx &= mask;
3737         }
3738
3739         /* configure header buffer length, needed for RSC */
3740         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3741
3742         /* configure the packet buffer length */
3743         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3744                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3745         else
3746                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3747
3748         /* configure descriptor type */
3749         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3750
3751         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3752 }
3753
3754 /**
3755  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3756  * @adapter: device handle
3757  *
3758  *  - 82598/82599/X540:     128
3759  *  - X550(non-SRIOV mode): 512
3760  *  - X550(SRIOV mode):     64
3761  */
3762 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3763 {
3764         if (adapter->hw.mac.type < ixgbe_mac_X550)
3765                 return 128;
3766         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3767                 return 64;
3768         else
3769                 return 512;
3770 }
3771
3772 /**
3773  * ixgbe_store_key - Write the RSS key to HW
3774  * @adapter: device handle
3775  *
3776  * Write the RSS key stored in adapter.rss_key to HW.
3777  */
3778 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3779 {
3780         struct ixgbe_hw *hw = &adapter->hw;
3781         int i;
3782
3783         for (i = 0; i < 10; i++)
3784                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3785 }
3786
3787 /**
3788  * ixgbe_init_rss_key - Initialize adapter RSS key
3789  * @adapter: device handle
3790  *
3791  * Allocates and initializes the RSS key if it is not allocated.
3792  **/
3793 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3794 {
3795         u32 *rss_key;
3796
3797         if (!adapter->rss_key) {
3798                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3799                 if (unlikely(!rss_key))
3800                         return -ENOMEM;
3801
3802                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3803                 adapter->rss_key = rss_key;
3804         }
3805
3806         return 0;
3807 }
3808
3809 /**
3810  * ixgbe_store_reta - Write the RETA table to HW
3811  * @adapter: device handle
3812  *
3813  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3814  */
3815 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3816 {
3817         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3818         struct ixgbe_hw *hw = &adapter->hw;
3819         u32 reta = 0;
3820         u32 indices_multi;
3821         u8 *indir_tbl = adapter->rss_indir_tbl;
3822
3823         /* Fill out the redirection table as follows:
3824          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3825          *    indices.
3826          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3827          *  - X550:       8 bit wide entries containing 6 bit RSS index
3828          */
3829         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3830                 indices_multi = 0x11;
3831         else
3832                 indices_multi = 0x1;
3833
3834         /* Write redirection table to HW */
3835         for (i = 0; i < reta_entries; i++) {
3836                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3837                 if ((i & 3) == 3) {
3838                         if (i < 128)
3839                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3840                         else
3841                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3842                                                 reta);
3843                         reta = 0;
3844                 }
3845         }
3846 }
3847
3848 /**
3849  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3850  * @adapter: device handle
3851  *
3852  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3853  */
3854 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3855 {
3856         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3857         struct ixgbe_hw *hw = &adapter->hw;
3858         u32 vfreta = 0;
3859
3860         /* Write redirection table to HW */
3861         for (i = 0; i < reta_entries; i++) {
3862                 u16 pool = adapter->num_rx_pools;
3863
3864                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3865                 if ((i & 3) != 3)
3866                         continue;
3867
3868                 while (pool--)
3869                         IXGBE_WRITE_REG(hw,
3870                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3871                                         vfreta);
3872                 vfreta = 0;
3873         }
3874 }
3875
3876 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3877 {
3878         u32 i, j;
3879         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3880         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3881
3882         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3883          * make full use of any rings they may have.  We will use the
3884          * PSRTYPE register to control how many rings we use within the PF.
3885          */
3886         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3887                 rss_i = 4;
3888
3889         /* Fill out hash function seeds */
3890         ixgbe_store_key(adapter);
3891
3892         /* Fill out redirection table */
3893         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3894
3895         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3896                 if (j == rss_i)
3897                         j = 0;
3898
3899                 adapter->rss_indir_tbl[i] = j;
3900         }
3901
3902         ixgbe_store_reta(adapter);
3903 }
3904
3905 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3906 {
3907         struct ixgbe_hw *hw = &adapter->hw;
3908         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3909         int i, j;
3910
3911         /* Fill out hash function seeds */
3912         for (i = 0; i < 10; i++) {
3913                 u16 pool = adapter->num_rx_pools;
3914
3915                 while (pool--)
3916                         IXGBE_WRITE_REG(hw,
3917                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3918                                         *(adapter->rss_key + i));
3919         }
3920
3921         /* Fill out the redirection table */
3922         for (i = 0, j = 0; i < 64; i++, j++) {
3923                 if (j == rss_i)
3924                         j = 0;
3925
3926                 adapter->rss_indir_tbl[i] = j;
3927         }
3928
3929         ixgbe_store_vfreta(adapter);
3930 }
3931
3932 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3933 {
3934         struct ixgbe_hw *hw = &adapter->hw;
3935         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3936         u32 rxcsum;
3937
3938         /* Disable indicating checksum in descriptor, enables RSS hash */
3939         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3940         rxcsum |= IXGBE_RXCSUM_PCSD;
3941         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3942
3943         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3944                 if (adapter->ring_feature[RING_F_RSS].mask)
3945                         mrqc = IXGBE_MRQC_RSSEN;
3946         } else {
3947                 u8 tcs = adapter->hw_tcs;
3948
3949                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3950                         if (tcs > 4)
3951                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3952                         else if (tcs > 1)
3953                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3954                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3955                                  IXGBE_82599_VMDQ_4Q_MASK)
3956                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3957                         else
3958                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3959
3960                         /* Enable L3/L4 for Tx Switched packets */
3961                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3962                 } else {
3963                         if (tcs > 4)
3964                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3965                         else if (tcs > 1)
3966                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3967                         else
3968                                 mrqc = IXGBE_MRQC_RSSEN;
3969                 }
3970         }
3971
3972         /* Perform hash on these packet types */
3973         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3974                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3975                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3976                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3977
3978         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3979                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3980         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3981                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3982
3983         if ((hw->mac.type >= ixgbe_mac_X550) &&
3984             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3985                 u16 pool = adapter->num_rx_pools;
3986
3987                 /* Enable VF RSS mode */
3988                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3989                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3990
3991                 /* Setup RSS through the VF registers */
3992                 ixgbe_setup_vfreta(adapter);
3993                 vfmrqc = IXGBE_MRQC_RSSEN;
3994                 vfmrqc |= rss_field;
3995
3996                 while (pool--)
3997                         IXGBE_WRITE_REG(hw,
3998                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3999                                         vfmrqc);
4000         } else {
4001                 ixgbe_setup_reta(adapter);
4002                 mrqc |= rss_field;
4003                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4004         }
4005 }
4006
4007 /**
4008  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4009  * @adapter: address of board private structure
4010  * @ring: structure containing ring specific data
4011  **/
4012 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4013                                    struct ixgbe_ring *ring)
4014 {
4015         struct ixgbe_hw *hw = &adapter->hw;
4016         u32 rscctrl;
4017         u8 reg_idx = ring->reg_idx;
4018
4019         if (!ring_is_rsc_enabled(ring))
4020                 return;
4021
4022         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4023         rscctrl |= IXGBE_RSCCTL_RSCEN;
4024         /*
4025          * we must limit the number of descriptors so that the
4026          * total size of max desc * buf_len is not greater
4027          * than 65536
4028          */
4029         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4030         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4031 }
4032
4033 #define IXGBE_MAX_RX_DESC_POLL 10
4034 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4035                                        struct ixgbe_ring *ring)
4036 {
4037         struct ixgbe_hw *hw = &adapter->hw;
4038         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4039         u32 rxdctl;
4040         u8 reg_idx = ring->reg_idx;
4041
4042         if (ixgbe_removed(hw->hw_addr))
4043                 return;
4044         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4045         if (hw->mac.type == ixgbe_mac_82598EB &&
4046             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4047                 return;
4048
4049         do {
4050                 usleep_range(1000, 2000);
4051                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4052         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4053
4054         if (!wait_loop) {
4055                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4056                       "the polling period\n", reg_idx);
4057         }
4058 }
4059
4060 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
4061                             struct ixgbe_ring *ring)
4062 {
4063         struct ixgbe_hw *hw = &adapter->hw;
4064         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4065         u32 rxdctl;
4066         u8 reg_idx = ring->reg_idx;
4067
4068         if (ixgbe_removed(hw->hw_addr))
4069                 return;
4070         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4071         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4072
4073         /* write value back with RXDCTL.ENABLE bit cleared */
4074         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4075
4076         if (hw->mac.type == ixgbe_mac_82598EB &&
4077             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4078                 return;
4079
4080         /* the hardware may take up to 100us to really disable the rx queue */
4081         do {
4082                 udelay(10);
4083                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4084         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
4085
4086         if (!wait_loop) {
4087                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
4088                       "the polling period\n", reg_idx);
4089         }
4090 }
4091
4092 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4093                              struct ixgbe_ring *ring)
4094 {
4095         struct ixgbe_hw *hw = &adapter->hw;
4096         union ixgbe_adv_rx_desc *rx_desc;
4097         u64 rdba = ring->dma;
4098         u32 rxdctl;
4099         u8 reg_idx = ring->reg_idx;
4100
4101         /* disable queue to avoid issues while updating state */
4102         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4103         ixgbe_disable_rx_queue(adapter, ring);
4104
4105         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4106         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4107         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4108                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4109         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4110         IXGBE_WRITE_FLUSH(hw);
4111
4112         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4113         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4114         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4115
4116         ixgbe_configure_srrctl(adapter, ring);
4117         ixgbe_configure_rscctl(adapter, ring);
4118
4119         if (hw->mac.type == ixgbe_mac_82598EB) {
4120                 /*
4121                  * enable cache line friendly hardware writes:
4122                  * PTHRESH=32 descriptors (half the internal cache),
4123                  * this also removes ugly rx_no_buffer_count increment
4124                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4125                  * WTHRESH=8 burst writeback up to two cache lines
4126                  */
4127                 rxdctl &= ~0x3FFFFF;
4128                 rxdctl |=  0x080420;
4129 #if (PAGE_SIZE < 8192)
4130         } else {
4131                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4132                             IXGBE_RXDCTL_RLPML_EN);
4133
4134                 /* Limit the maximum frame size so we don't overrun the skb */
4135                 if (ring_uses_build_skb(ring) &&
4136                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4137                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4138                                   IXGBE_RXDCTL_RLPML_EN;
4139 #endif
4140         }
4141
4142         /* initialize rx_buffer_info */
4143         memset(ring->rx_buffer_info, 0,
4144                sizeof(struct ixgbe_rx_buffer) * ring->count);
4145
4146         /* initialize Rx descriptor 0 */
4147         rx_desc = IXGBE_RX_DESC(ring, 0);
4148         rx_desc->wb.upper.length = 0;
4149
4150         /* enable receive descriptor ring */
4151         rxdctl |= IXGBE_RXDCTL_ENABLE;
4152         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4153
4154         ixgbe_rx_desc_queue_enable(adapter, ring);
4155         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4156 }
4157
4158 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4159 {
4160         struct ixgbe_hw *hw = &adapter->hw;
4161         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4162         u16 pool = adapter->num_rx_pools;
4163
4164         /* PSRTYPE must be initialized in non 82598 adapters */
4165         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4166                       IXGBE_PSRTYPE_UDPHDR |
4167                       IXGBE_PSRTYPE_IPV4HDR |
4168                       IXGBE_PSRTYPE_L2HDR |
4169                       IXGBE_PSRTYPE_IPV6HDR;
4170
4171         if (hw->mac.type == ixgbe_mac_82598EB)
4172                 return;
4173
4174         if (rss_i > 3)
4175                 psrtype |= 2u << 29;
4176         else if (rss_i > 1)
4177                 psrtype |= 1u << 29;
4178
4179         while (pool--)
4180                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4181 }
4182
4183 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4184 {
4185         struct ixgbe_hw *hw = &adapter->hw;
4186         u32 reg_offset, vf_shift;
4187         u32 gcr_ext, vmdctl;
4188         int i;
4189
4190         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4191                 return;
4192
4193         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4194         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4195         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4196         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4197         vmdctl |= IXGBE_VT_CTL_REPLEN;
4198         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4199
4200         vf_shift = VMDQ_P(0) % 32;
4201         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4202
4203         /* Enable only the PF's pool for Tx/Rx */
4204         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4205         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4206         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4207         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4208         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4209                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4210
4211         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4212         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4213
4214         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4215         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4216
4217         /*
4218          * Set up VF register offsets for selected VT Mode,
4219          * i.e. 32 or 64 VFs for SR-IOV
4220          */
4221         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4222         case IXGBE_82599_VMDQ_8Q_MASK:
4223                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4224                 break;
4225         case IXGBE_82599_VMDQ_4Q_MASK:
4226                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4227                 break;
4228         default:
4229                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4230                 break;
4231         }
4232
4233         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4234
4235         for (i = 0; i < adapter->num_vfs; i++) {
4236                 /* configure spoof checking */
4237                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4238                                           adapter->vfinfo[i].spoofchk_enabled);
4239
4240                 /* Enable/Disable RSS query feature  */
4241                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4242                                           adapter->vfinfo[i].rss_query_enabled);
4243         }
4244 }
4245
4246 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4247 {
4248         struct ixgbe_hw *hw = &adapter->hw;
4249         struct net_device *netdev = adapter->netdev;
4250         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4251         struct ixgbe_ring *rx_ring;
4252         int i;
4253         u32 mhadd, hlreg0;
4254
4255 #ifdef IXGBE_FCOE
4256         /* adjust max frame to be able to do baby jumbo for FCoE */
4257         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4258             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4259                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4260
4261 #endif /* IXGBE_FCOE */
4262
4263         /* adjust max frame to be at least the size of a standard frame */
4264         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4265                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4266
4267         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4268         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4269                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4270                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4271
4272                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4273         }
4274
4275         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4276         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4277         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4278         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4279
4280         /*
4281          * Setup the HW Rx Head and Tail Descriptor Pointers and
4282          * the Base and Length of the Rx Descriptor Ring
4283          */
4284         for (i = 0; i < adapter->num_rx_queues; i++) {
4285                 rx_ring = adapter->rx_ring[i];
4286
4287                 clear_ring_rsc_enabled(rx_ring);
4288                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4289                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4290
4291                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4292                         set_ring_rsc_enabled(rx_ring);
4293
4294                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4295                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4296
4297                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4298                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4299                         continue;
4300
4301                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4302
4303 #if (PAGE_SIZE < 8192)
4304                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4305                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4306
4307                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4308                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4309                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4310 #endif
4311         }
4312 }
4313
4314 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4315 {
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4318
4319         switch (hw->mac.type) {
4320         case ixgbe_mac_82598EB:
4321                 /*
4322                  * For VMDq support of different descriptor types or
4323                  * buffer sizes through the use of multiple SRRCTL
4324                  * registers, RDRXCTL.MVMEN must be set to 1
4325                  *
4326                  * also, the manual doesn't mention it clearly but DCA hints
4327                  * will only use queue 0's tags unless this bit is set.  Side
4328                  * effects of setting this bit are only that SRRCTL must be
4329                  * fully programmed [0..15]
4330                  */
4331                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4332                 break;
4333         case ixgbe_mac_X550:
4334         case ixgbe_mac_X550EM_x:
4335         case ixgbe_mac_x550em_a:
4336                 if (adapter->num_vfs)
4337                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4338                 /* fall through */
4339         case ixgbe_mac_82599EB:
4340         case ixgbe_mac_X540:
4341                 /* Disable RSC for ACK packets */
4342                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4343                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4344                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4345                 /* hardware requires some bits to be set by default */
4346                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4347                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4348                 break;
4349         default:
4350                 /* We should do nothing since we don't know this hardware */
4351                 return;
4352         }
4353
4354         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4355 }
4356
4357 /**
4358  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4359  * @adapter: board private structure
4360  *
4361  * Configure the Rx unit of the MAC after a reset.
4362  **/
4363 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4364 {
4365         struct ixgbe_hw *hw = &adapter->hw;
4366         int i;
4367         u32 rxctrl, rfctl;
4368
4369         /* disable receives while setting up the descriptors */
4370         hw->mac.ops.disable_rx(hw);
4371
4372         ixgbe_setup_psrtype(adapter);
4373         ixgbe_setup_rdrxctl(adapter);
4374
4375         /* RSC Setup */
4376         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4377         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4378         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4379                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4380
4381         /* disable NFS filtering */
4382         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4383         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4384
4385         /* Program registers for the distribution of queues */
4386         ixgbe_setup_mrqc(adapter);
4387
4388         /* set_rx_buffer_len must be called before ring initialization */
4389         ixgbe_set_rx_buffer_len(adapter);
4390
4391         /*
4392          * Setup the HW Rx Head and Tail Descriptor Pointers and
4393          * the Base and Length of the Rx Descriptor Ring
4394          */
4395         for (i = 0; i < adapter->num_rx_queues; i++)
4396                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4397
4398         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4399         /* disable drop enable for 82598 parts */
4400         if (hw->mac.type == ixgbe_mac_82598EB)
4401                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4402
4403         /* enable all receives */
4404         rxctrl |= IXGBE_RXCTRL_RXEN;
4405         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4406 }
4407
4408 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4409                                  __be16 proto, u16 vid)
4410 {
4411         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4412         struct ixgbe_hw *hw = &adapter->hw;
4413
4414         /* add VID to filter table */
4415         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4416                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4417
4418         set_bit(vid, adapter->active_vlans);
4419
4420         return 0;
4421 }
4422
4423 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4424 {
4425         u32 vlvf;
4426         int idx;
4427
4428         /* short cut the special case */
4429         if (vlan == 0)
4430                 return 0;
4431
4432         /* Search for the vlan id in the VLVF entries */
4433         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4434                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4435                 if ((vlvf & VLAN_VID_MASK) == vlan)
4436                         break;
4437         }
4438
4439         return idx;
4440 }
4441
4442 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4443 {
4444         struct ixgbe_hw *hw = &adapter->hw;
4445         u32 bits, word;
4446         int idx;
4447
4448         idx = ixgbe_find_vlvf_entry(hw, vid);
4449         if (!idx)
4450                 return;
4451
4452         /* See if any other pools are set for this VLAN filter
4453          * entry other than the PF.
4454          */
4455         word = idx * 2 + (VMDQ_P(0) / 32);
4456         bits = ~BIT(VMDQ_P(0) % 32);
4457         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4458
4459         /* Disable the filter so this falls into the default pool. */
4460         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4461                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4462                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4463                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4464         }
4465 }
4466
4467 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4468                                   __be16 proto, u16 vid)
4469 {
4470         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4471         struct ixgbe_hw *hw = &adapter->hw;
4472
4473         /* remove VID from filter table */
4474         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4475                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4476
4477         clear_bit(vid, adapter->active_vlans);
4478
4479         return 0;
4480 }
4481
4482 /**
4483  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4484  * @adapter: driver data
4485  */
4486 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4487 {
4488         struct ixgbe_hw *hw = &adapter->hw;
4489         u32 vlnctrl;
4490         int i, j;
4491
4492         switch (hw->mac.type) {
4493         case ixgbe_mac_82598EB:
4494                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4495                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4496                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4497                 break;
4498         case ixgbe_mac_82599EB:
4499         case ixgbe_mac_X540:
4500         case ixgbe_mac_X550:
4501         case ixgbe_mac_X550EM_x:
4502         case ixgbe_mac_x550em_a:
4503                 for (i = 0; i < adapter->num_rx_queues; i++) {
4504                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4505
4506                         if (!netif_is_ixgbe(ring->netdev))
4507                                 continue;
4508
4509                         j = ring->reg_idx;
4510                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4511                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4512                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4513                 }
4514                 break;
4515         default:
4516                 break;
4517         }
4518 }
4519
4520 /**
4521  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4522  * @adapter: driver data
4523  */
4524 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4525 {
4526         struct ixgbe_hw *hw = &adapter->hw;
4527         u32 vlnctrl;
4528         int i, j;
4529
4530         switch (hw->mac.type) {
4531         case ixgbe_mac_82598EB:
4532                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4533                 vlnctrl |= IXGBE_VLNCTRL_VME;
4534                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4535                 break;
4536         case ixgbe_mac_82599EB:
4537         case ixgbe_mac_X540:
4538         case ixgbe_mac_X550:
4539         case ixgbe_mac_X550EM_x:
4540         case ixgbe_mac_x550em_a:
4541                 for (i = 0; i < adapter->num_rx_queues; i++) {
4542                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4543
4544                         if (!netif_is_ixgbe(ring->netdev))
4545                                 continue;
4546
4547                         j = ring->reg_idx;
4548                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4549                         vlnctrl |= IXGBE_RXDCTL_VME;
4550                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4551                 }
4552                 break;
4553         default:
4554                 break;
4555         }
4556 }
4557
4558 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4559 {
4560         struct ixgbe_hw *hw = &adapter->hw;
4561         u32 vlnctrl, i;
4562
4563         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4564
4565         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4566         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4567                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4568                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4569         } else {
4570                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4571                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4572                 return;
4573         }
4574
4575         /* Nothing to do for 82598 */
4576         if (hw->mac.type == ixgbe_mac_82598EB)
4577                 return;
4578
4579         /* We are already in VLAN promisc, nothing to do */
4580         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4581                 return;
4582
4583         /* Set flag so we don't redo unnecessary work */
4584         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4585
4586         /* Add PF to all active pools */
4587         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4588                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4589                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4590
4591                 vlvfb |= BIT(VMDQ_P(0) % 32);
4592                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4593         }
4594
4595         /* Set all bits in the VLAN filter table array */
4596         for (i = hw->mac.vft_size; i--;)
4597                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4598 }
4599
4600 #define VFTA_BLOCK_SIZE 8
4601 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4602 {
4603         struct ixgbe_hw *hw = &adapter->hw;
4604         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4605         u32 vid_start = vfta_offset * 32;
4606         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4607         u32 i, vid, word, bits;
4608
4609         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4610                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4611
4612                 /* pull VLAN ID from VLVF */
4613                 vid = vlvf & VLAN_VID_MASK;
4614
4615                 /* only concern outselves with a certain range */
4616                 if (vid < vid_start || vid >= vid_end)
4617                         continue;
4618
4619                 if (vlvf) {
4620                         /* record VLAN ID in VFTA */
4621                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4622
4623                         /* if PF is part of this then continue */
4624                         if (test_bit(vid, adapter->active_vlans))
4625                                 continue;
4626                 }
4627
4628                 /* remove PF from the pool */
4629                 word = i * 2 + VMDQ_P(0) / 32;
4630                 bits = ~BIT(VMDQ_P(0) % 32);
4631                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4632                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4633         }
4634
4635         /* extract values from active_vlans and write back to VFTA */
4636         for (i = VFTA_BLOCK_SIZE; i--;) {
4637                 vid = (vfta_offset + i) * 32;
4638                 word = vid / BITS_PER_LONG;
4639                 bits = vid % BITS_PER_LONG;
4640
4641                 vfta[i] |= adapter->active_vlans[word] >> bits;
4642
4643                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4644         }
4645 }
4646
4647 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4648 {
4649         struct ixgbe_hw *hw = &adapter->hw;
4650         u32 vlnctrl, i;
4651
4652         /* Set VLAN filtering to enabled */
4653         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4654         vlnctrl |= IXGBE_VLNCTRL_VFE;
4655         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4656
4657         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4658             hw->mac.type == ixgbe_mac_82598EB)
4659                 return;
4660
4661         /* We are not in VLAN promisc, nothing to do */
4662         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4663                 return;
4664
4665         /* Set flag so we don't redo unnecessary work */
4666         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4667
4668         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4669                 ixgbe_scrub_vfta(adapter, i);
4670 }
4671
4672 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4673 {
4674         u16 vid = 1;
4675
4676         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4677
4678         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4679                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4680 }
4681
4682 /**
4683  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4684  * @netdev: network interface device structure
4685  *
4686  * Writes multicast address list to the MTA hash table.
4687  * Returns: -ENOMEM on failure
4688  *                0 on no addresses written
4689  *                X on writing X addresses to MTA
4690  **/
4691 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4692 {
4693         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4694         struct ixgbe_hw *hw = &adapter->hw;
4695
4696         if (!netif_running(netdev))
4697                 return 0;
4698
4699         if (hw->mac.ops.update_mc_addr_list)
4700                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4701         else
4702                 return -ENOMEM;
4703
4704 #ifdef CONFIG_PCI_IOV
4705         ixgbe_restore_vf_multicasts(adapter);
4706 #endif
4707
4708         return netdev_mc_count(netdev);
4709 }
4710
4711 #ifdef CONFIG_PCI_IOV
4712 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4713 {
4714         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4715         struct ixgbe_hw *hw = &adapter->hw;
4716         int i;
4717
4718         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4719                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4720
4721                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4722                         hw->mac.ops.set_rar(hw, i,
4723                                             mac_table->addr,
4724                                             mac_table->pool,
4725                                             IXGBE_RAH_AV);
4726                 else
4727                         hw->mac.ops.clear_rar(hw, i);
4728         }
4729 }
4730
4731 #endif
4732 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4733 {
4734         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4735         struct ixgbe_hw *hw = &adapter->hw;
4736         int i;
4737
4738         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4739                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4740                         continue;
4741
4742                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4743
4744                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4745                         hw->mac.ops.set_rar(hw, i,
4746                                             mac_table->addr,
4747                                             mac_table->pool,
4748                                             IXGBE_RAH_AV);
4749                 else
4750                         hw->mac.ops.clear_rar(hw, i);
4751         }
4752 }
4753
4754 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4755 {
4756         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4757         struct ixgbe_hw *hw = &adapter->hw;
4758         int i;
4759
4760         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4761                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4762                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4763         }
4764
4765         ixgbe_sync_mac_table(adapter);
4766 }
4767
4768 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4769 {
4770         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4771         struct ixgbe_hw *hw = &adapter->hw;
4772         int i, count = 0;
4773
4774         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4775                 /* do not count default RAR as available */
4776                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4777                         continue;
4778
4779                 /* only count unused and addresses that belong to us */
4780                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4781                         if (mac_table->pool != pool)
4782                                 continue;
4783                 }
4784
4785                 count++;
4786         }
4787
4788         return count;
4789 }
4790
4791 /* this function destroys the first RAR entry */
4792 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4793 {
4794         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4795         struct ixgbe_hw *hw = &adapter->hw;
4796
4797         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4798         mac_table->pool = VMDQ_P(0);
4799
4800         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4801
4802         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4803                             IXGBE_RAH_AV);
4804 }
4805
4806 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4807                          const u8 *addr, u16 pool)
4808 {
4809         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4810         struct ixgbe_hw *hw = &adapter->hw;
4811         int i;
4812
4813         if (is_zero_ether_addr(addr))
4814                 return -EINVAL;
4815
4816         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4817                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4818                         continue;
4819
4820                 ether_addr_copy(mac_table->addr, addr);
4821                 mac_table->pool = pool;
4822
4823                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4824                                     IXGBE_MAC_STATE_IN_USE;
4825
4826                 ixgbe_sync_mac_table(adapter);
4827
4828                 return i;
4829         }
4830
4831         return -ENOMEM;
4832 }
4833
4834 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4835                          const u8 *addr, u16 pool)
4836 {
4837         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4838         struct ixgbe_hw *hw = &adapter->hw;
4839         int i;
4840
4841         if (is_zero_ether_addr(addr))
4842                 return -EINVAL;
4843
4844         /* search table for addr, if found clear IN_USE flag and sync */
4845         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4846                 /* we can only delete an entry if it is in use */
4847                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4848                         continue;
4849                 /* we only care about entries that belong to the given pool */
4850                 if (mac_table->pool != pool)
4851                         continue;
4852                 /* we only care about a specific MAC address */
4853                 if (!ether_addr_equal(addr, mac_table->addr))
4854                         continue;
4855
4856                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4857                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4858
4859                 ixgbe_sync_mac_table(adapter);
4860
4861                 return 0;
4862         }
4863
4864         return -ENOMEM;
4865 }
4866
4867 /**
4868  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4869  * @netdev: network interface device structure
4870  * @vfn: pool to associate with unicast addresses
4871  *
4872  * Writes unicast address list to the RAR table.
4873  * Returns: -ENOMEM on failure/insufficient address space
4874  *                0 on no addresses written
4875  *                X on writing X addresses to the RAR table
4876  **/
4877 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4878 {
4879         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4880         int count = 0;
4881
4882         /* return ENOMEM indicating insufficient memory for addresses */
4883         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4884                 return -ENOMEM;
4885
4886         if (!netdev_uc_empty(netdev)) {
4887                 struct netdev_hw_addr *ha;
4888                 netdev_for_each_uc_addr(ha, netdev) {
4889                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4890                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4891                         count++;
4892                 }
4893         }
4894         return count;
4895 }
4896
4897 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4898 {
4899         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4900         int ret;
4901
4902         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4903
4904         return min_t(int, ret, 0);
4905 }
4906
4907 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4908 {
4909         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4910
4911         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4912
4913         return 0;
4914 }
4915
4916 /**
4917  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4918  * @netdev: network interface device structure
4919  *
4920  * The set_rx_method entry point is called whenever the unicast/multicast
4921  * address list or the network interface flags are updated.  This routine is
4922  * responsible for configuring the hardware for proper unicast, multicast and
4923  * promiscuous mode.
4924  **/
4925 void ixgbe_set_rx_mode(struct net_device *netdev)
4926 {
4927         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4928         struct ixgbe_hw *hw = &adapter->hw;
4929         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4930         netdev_features_t features = netdev->features;
4931         int count;
4932
4933         /* Check for Promiscuous and All Multicast modes */
4934         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4935
4936         /* set all bits that we expect to always be set */
4937         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4938         fctrl |= IXGBE_FCTRL_BAM;
4939         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4940         fctrl |= IXGBE_FCTRL_PMCF;
4941
4942         /* clear the bits we are changing the status of */
4943         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4944         if (netdev->flags & IFF_PROMISC) {
4945                 hw->addr_ctrl.user_set_promisc = true;
4946                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4947                 vmolr |= IXGBE_VMOLR_MPE;
4948                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4949         } else {
4950                 if (netdev->flags & IFF_ALLMULTI) {
4951                         fctrl |= IXGBE_FCTRL_MPE;
4952                         vmolr |= IXGBE_VMOLR_MPE;
4953                 }
4954                 hw->addr_ctrl.user_set_promisc = false;
4955         }
4956
4957         /*
4958          * Write addresses to available RAR registers, if there is not
4959          * sufficient space to store all the addresses then enable
4960          * unicast promiscuous mode
4961          */
4962         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4963                 fctrl |= IXGBE_FCTRL_UPE;
4964                 vmolr |= IXGBE_VMOLR_ROPE;
4965         }
4966
4967         /* Write addresses to the MTA, if the attempt fails
4968          * then we should just turn on promiscuous mode so
4969          * that we can at least receive multicast traffic
4970          */
4971         count = ixgbe_write_mc_addr_list(netdev);
4972         if (count < 0) {
4973                 fctrl |= IXGBE_FCTRL_MPE;
4974                 vmolr |= IXGBE_VMOLR_MPE;
4975         } else if (count) {
4976                 vmolr |= IXGBE_VMOLR_ROMPE;
4977         }
4978
4979         if (hw->mac.type != ixgbe_mac_82598EB) {
4980                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4981                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4982                            IXGBE_VMOLR_ROPE);
4983                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4984         }
4985
4986         /* This is useful for sniffing bad packets. */
4987         if (features & NETIF_F_RXALL) {
4988                 /* UPE and MPE will be handled by normal PROMISC logic
4989                  * in e1000e_set_rx_mode */
4990                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4991                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4992                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4993
4994                 fctrl &= ~(IXGBE_FCTRL_DPF);
4995                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4996         }
4997
4998         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4999
5000         if (features & NETIF_F_HW_VLAN_CTAG_RX)
5001                 ixgbe_vlan_strip_enable(adapter);
5002         else
5003                 ixgbe_vlan_strip_disable(adapter);
5004
5005         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
5006                 ixgbe_vlan_promisc_disable(adapter);
5007         else
5008                 ixgbe_vlan_promisc_enable(adapter);
5009 }
5010
5011 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
5012 {
5013         int q_idx;
5014
5015         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5016                 napi_enable(&adapter->q_vector[q_idx]->napi);
5017 }
5018
5019 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5020 {
5021         int q_idx;
5022
5023         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5024                 napi_disable(&adapter->q_vector[q_idx]->napi);
5025 }
5026
5027 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5028 {
5029         struct ixgbe_hw *hw = &adapter->hw;
5030         u32 vxlanctrl;
5031
5032         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5033                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5034                 return;
5035
5036         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5037         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5038
5039         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5040                 adapter->vxlan_port = 0;
5041
5042         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5043                 adapter->geneve_port = 0;
5044 }
5045
5046 #ifdef CONFIG_IXGBE_DCB
5047 /**
5048  * ixgbe_configure_dcb - Configure DCB hardware
5049  * @adapter: ixgbe adapter struct
5050  *
5051  * This is called by the driver on open to configure the DCB hardware.
5052  * This is also called by the gennetlink interface when reconfiguring
5053  * the DCB state.
5054  */
5055 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5056 {
5057         struct ixgbe_hw *hw = &adapter->hw;
5058         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5059
5060         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5061                 if (hw->mac.type == ixgbe_mac_82598EB)
5062                         netif_set_gso_max_size(adapter->netdev, 65536);
5063                 return;
5064         }
5065
5066         if (hw->mac.type == ixgbe_mac_82598EB)
5067                 netif_set_gso_max_size(adapter->netdev, 32768);
5068
5069 #ifdef IXGBE_FCOE
5070         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5071                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5072 #endif
5073
5074         /* reconfigure the hardware */
5075         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5076                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5077                                                 DCB_TX_CONFIG);
5078                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5079                                                 DCB_RX_CONFIG);
5080                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5081         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5082                 ixgbe_dcb_hw_ets(&adapter->hw,
5083                                  adapter->ixgbe_ieee_ets,
5084                                  max_frame);
5085                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5086                                         adapter->ixgbe_ieee_pfc->pfc_en,
5087                                         adapter->ixgbe_ieee_ets->prio_tc);
5088         }
5089
5090         /* Enable RSS Hash per TC */
5091         if (hw->mac.type != ixgbe_mac_82598EB) {
5092                 u32 msb = 0;
5093                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5094
5095                 while (rss_i) {
5096                         msb++;
5097                         rss_i >>= 1;
5098                 }
5099
5100                 /* write msb to all 8 TCs in one write */
5101                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5102         }
5103 }
5104 #endif
5105
5106 /* Additional bittime to account for IXGBE framing */
5107 #define IXGBE_ETH_FRAMING 20
5108
5109 /**
5110  * ixgbe_hpbthresh - calculate high water mark for flow control
5111  *
5112  * @adapter: board private structure to calculate for
5113  * @pb: packet buffer to calculate
5114  */
5115 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5116 {
5117         struct ixgbe_hw *hw = &adapter->hw;
5118         struct net_device *dev = adapter->netdev;
5119         int link, tc, kb, marker;
5120         u32 dv_id, rx_pba;
5121
5122         /* Calculate max LAN frame size */
5123         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5124
5125 #ifdef IXGBE_FCOE
5126         /* FCoE traffic class uses FCOE jumbo frames */
5127         if ((dev->features & NETIF_F_FCOE_MTU) &&
5128             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5129             (pb == ixgbe_fcoe_get_tc(adapter)))
5130                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5131 #endif
5132
5133         /* Calculate delay value for device */
5134         switch (hw->mac.type) {
5135         case ixgbe_mac_X540:
5136         case ixgbe_mac_X550:
5137         case ixgbe_mac_X550EM_x:
5138         case ixgbe_mac_x550em_a:
5139                 dv_id = IXGBE_DV_X540(link, tc);
5140                 break;
5141         default:
5142                 dv_id = IXGBE_DV(link, tc);
5143                 break;
5144         }
5145
5146         /* Loopback switch introduces additional latency */
5147         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5148                 dv_id += IXGBE_B2BT(tc);
5149
5150         /* Delay value is calculated in bit times convert to KB */
5151         kb = IXGBE_BT2KB(dv_id);
5152         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5153
5154         marker = rx_pba - kb;
5155
5156         /* It is possible that the packet buffer is not large enough
5157          * to provide required headroom. In this case throw an error
5158          * to user and a do the best we can.
5159          */
5160         if (marker < 0) {
5161                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5162                             "headroom to support flow control."
5163                             "Decrease MTU or number of traffic classes\n", pb);
5164                 marker = tc + 1;
5165         }
5166
5167         return marker;
5168 }
5169
5170 /**
5171  * ixgbe_lpbthresh - calculate low water mark for for flow control
5172  *
5173  * @adapter: board private structure to calculate for
5174  * @pb: packet buffer to calculate
5175  */
5176 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5177 {
5178         struct ixgbe_hw *hw = &adapter->hw;
5179         struct net_device *dev = adapter->netdev;
5180         int tc;
5181         u32 dv_id;
5182
5183         /* Calculate max LAN frame size */
5184         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5185
5186 #ifdef IXGBE_FCOE
5187         /* FCoE traffic class uses FCOE jumbo frames */
5188         if ((dev->features & NETIF_F_FCOE_MTU) &&
5189             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5190             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5191                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5192 #endif
5193
5194         /* Calculate delay value for device */
5195         switch (hw->mac.type) {
5196         case ixgbe_mac_X540:
5197         case ixgbe_mac_X550:
5198         case ixgbe_mac_X550EM_x:
5199         case ixgbe_mac_x550em_a:
5200                 dv_id = IXGBE_LOW_DV_X540(tc);
5201                 break;
5202         default:
5203                 dv_id = IXGBE_LOW_DV(tc);
5204                 break;
5205         }
5206
5207         /* Delay value is calculated in bit times convert to KB */
5208         return IXGBE_BT2KB(dv_id);
5209 }
5210
5211 /*
5212  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5213  */
5214 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5215 {
5216         struct ixgbe_hw *hw = &adapter->hw;
5217         int num_tc = adapter->hw_tcs;
5218         int i;
5219
5220         if (!num_tc)
5221                 num_tc = 1;
5222
5223         for (i = 0; i < num_tc; i++) {
5224                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5225                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5226
5227                 /* Low water marks must not be larger than high water marks */
5228                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5229                         hw->fc.low_water[i] = 0;
5230         }
5231
5232         for (; i < MAX_TRAFFIC_CLASS; i++)
5233                 hw->fc.high_water[i] = 0;
5234 }
5235
5236 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5237 {
5238         struct ixgbe_hw *hw = &adapter->hw;
5239         int hdrm;
5240         u8 tc = adapter->hw_tcs;
5241
5242         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5243             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5244                 hdrm = 32 << adapter->fdir_pballoc;
5245         else
5246                 hdrm = 0;
5247
5248         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5249         ixgbe_pbthresh_setup(adapter);
5250 }
5251
5252 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5253 {
5254         struct ixgbe_hw *hw = &adapter->hw;
5255         struct hlist_node *node2;
5256         struct ixgbe_fdir_filter *filter;
5257
5258         spin_lock(&adapter->fdir_perfect_lock);
5259
5260         if (!hlist_empty(&adapter->fdir_filter_list))
5261                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5262
5263         hlist_for_each_entry_safe(filter, node2,
5264                                   &adapter->fdir_filter_list, fdir_node) {
5265                 ixgbe_fdir_write_perfect_filter_82599(hw,
5266                                 &filter->filter,
5267                                 filter->sw_idx,
5268                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5269                                 IXGBE_FDIR_DROP_QUEUE :
5270                                 adapter->rx_ring[filter->action]->reg_idx);
5271         }
5272
5273         spin_unlock(&adapter->fdir_perfect_lock);
5274 }
5275
5276 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5277                                       struct ixgbe_adapter *adapter)
5278 {
5279         struct ixgbe_hw *hw = &adapter->hw;
5280         u32 vmolr;
5281
5282         /* No unicast promiscuous support for VMDQ devices. */
5283         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5284         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5285
5286         /* clear the affected bit */
5287         vmolr &= ~IXGBE_VMOLR_MPE;
5288
5289         if (dev->flags & IFF_ALLMULTI) {
5290                 vmolr |= IXGBE_VMOLR_MPE;
5291         } else {
5292                 vmolr |= IXGBE_VMOLR_ROMPE;
5293                 hw->mac.ops.update_mc_addr_list(hw, dev);
5294         }
5295         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5296         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5297 }
5298
5299 /**
5300  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5301  * @rx_ring: ring to free buffers from
5302  **/
5303 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5304 {
5305         u16 i = rx_ring->next_to_clean;
5306         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5307
5308         /* Free all the Rx ring sk_buffs */
5309         while (i != rx_ring->next_to_alloc) {
5310                 if (rx_buffer->skb) {
5311                         struct sk_buff *skb = rx_buffer->skb;
5312                         if (IXGBE_CB(skb)->page_released)
5313                                 dma_unmap_page_attrs(rx_ring->dev,
5314                                                      IXGBE_CB(skb)->dma,
5315                                                      ixgbe_rx_pg_size(rx_ring),
5316                                                      DMA_FROM_DEVICE,
5317                                                      IXGBE_RX_DMA_ATTR);
5318                         dev_kfree_skb(skb);
5319                 }
5320
5321                 /* Invalidate cache lines that may have been written to by
5322                  * device so that we avoid corrupting memory.
5323                  */
5324                 dma_sync_single_range_for_cpu(rx_ring->dev,
5325                                               rx_buffer->dma,
5326                                               rx_buffer->page_offset,
5327                                               ixgbe_rx_bufsz(rx_ring),
5328                                               DMA_FROM_DEVICE);
5329
5330                 /* free resources associated with mapping */
5331                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5332                                      ixgbe_rx_pg_size(rx_ring),
5333                                      DMA_FROM_DEVICE,
5334                                      IXGBE_RX_DMA_ATTR);
5335                 __page_frag_cache_drain(rx_buffer->page,
5336                                         rx_buffer->pagecnt_bias);
5337
5338                 i++;
5339                 rx_buffer++;
5340                 if (i == rx_ring->count) {
5341                         i = 0;
5342                         rx_buffer = rx_ring->rx_buffer_info;
5343                 }
5344         }
5345
5346         rx_ring->next_to_alloc = 0;
5347         rx_ring->next_to_clean = 0;
5348         rx_ring->next_to_use = 0;
5349 }
5350
5351 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5352                              struct ixgbe_fwd_adapter *accel)
5353 {
5354         struct ixgbe_adapter *adapter = accel->real_adapter;
5355         int i, baseq, err;
5356
5357         if (!test_bit(accel->pool, adapter->fwd_bitmask))
5358                 return 0;
5359
5360         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5361         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5362                    accel->pool, adapter->num_rx_pools,
5363                    baseq, baseq + adapter->num_rx_queues_per_pool);
5364
5365         accel->netdev = vdev;
5366         accel->rx_base_queue = baseq;
5367         accel->tx_base_queue = baseq;
5368
5369         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5370                 adapter->rx_ring[baseq + i]->netdev = vdev;
5371
5372         /* Guarantee all rings are updated before we update the
5373          * MAC address filter.
5374          */
5375         wmb();
5376
5377         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5378          * need to only treat it as an error value if it is negative.
5379          */
5380         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5381                                    VMDQ_P(accel->pool));
5382         if (err >= 0) {
5383                 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5384                 return 0;
5385         }
5386
5387         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5388                 adapter->rx_ring[baseq + i]->netdev = NULL;
5389
5390         return err;
5391 }
5392
5393 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5394 {
5395         if (netif_is_macvlan(upper)) {
5396                 struct macvlan_dev *dfwd = netdev_priv(upper);
5397                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5398
5399                 if (dfwd->fwd_priv)
5400                         ixgbe_fwd_ring_up(upper, vadapter);
5401         }
5402
5403         return 0;
5404 }
5405
5406 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5407 {
5408         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5409                                       ixgbe_upper_dev_walk, NULL);
5410 }
5411
5412 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5413 {
5414         struct ixgbe_hw *hw = &adapter->hw;
5415
5416         ixgbe_configure_pb(adapter);
5417 #ifdef CONFIG_IXGBE_DCB
5418         ixgbe_configure_dcb(adapter);
5419 #endif
5420         /*
5421          * We must restore virtualization before VLANs or else
5422          * the VLVF registers will not be populated
5423          */
5424         ixgbe_configure_virtualization(adapter);
5425
5426         ixgbe_set_rx_mode(adapter->netdev);
5427         ixgbe_restore_vlan(adapter);
5428
5429         switch (hw->mac.type) {
5430         case ixgbe_mac_82599EB:
5431         case ixgbe_mac_X540:
5432                 hw->mac.ops.disable_rx_buff(hw);
5433                 break;
5434         default:
5435                 break;
5436         }
5437
5438         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5439                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5440                                                 adapter->fdir_pballoc);
5441         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5442                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5443                                               adapter->fdir_pballoc);
5444                 ixgbe_fdir_filter_restore(adapter);
5445         }
5446
5447         switch (hw->mac.type) {
5448         case ixgbe_mac_82599EB:
5449         case ixgbe_mac_X540:
5450                 hw->mac.ops.enable_rx_buff(hw);
5451                 break;
5452         default:
5453                 break;
5454         }
5455
5456 #ifdef CONFIG_IXGBE_DCA
5457         /* configure DCA */
5458         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5459                 ixgbe_setup_dca(adapter);
5460 #endif /* CONFIG_IXGBE_DCA */
5461
5462 #ifdef IXGBE_FCOE
5463         /* configure FCoE L2 filters, redirection table, and Rx control */
5464         ixgbe_configure_fcoe(adapter);
5465
5466 #endif /* IXGBE_FCOE */
5467         ixgbe_configure_tx(adapter);
5468         ixgbe_configure_rx(adapter);
5469         ixgbe_configure_dfwd(adapter);
5470 }
5471
5472 /**
5473  * ixgbe_sfp_link_config - set up SFP+ link
5474  * @adapter: pointer to private adapter struct
5475  **/
5476 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5477 {
5478         /*
5479          * We are assuming the worst case scenario here, and that
5480          * is that an SFP was inserted/removed after the reset
5481          * but before SFP detection was enabled.  As such the best
5482          * solution is to just start searching as soon as we start
5483          */
5484         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5485                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5486
5487         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5488         adapter->sfp_poll_time = 0;
5489 }
5490
5491 /**
5492  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5493  * @hw: pointer to private hardware struct
5494  *
5495  * Returns 0 on success, negative on failure
5496  **/
5497 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5498 {
5499         u32 speed;
5500         bool autoneg, link_up = false;
5501         int ret = IXGBE_ERR_LINK_SETUP;
5502
5503         if (hw->mac.ops.check_link)
5504                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5505
5506         if (ret)
5507                 return ret;
5508
5509         speed = hw->phy.autoneg_advertised;
5510         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5511                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5512                                                         &autoneg);
5513         if (ret)
5514                 return ret;
5515
5516         if (hw->mac.ops.setup_link)
5517                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5518
5519         return ret;
5520 }
5521
5522 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5523 {
5524         struct ixgbe_hw *hw = &adapter->hw;
5525         u32 gpie = 0;
5526
5527         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5528                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5529                        IXGBE_GPIE_OCD;
5530                 gpie |= IXGBE_GPIE_EIAME;
5531                 /*
5532                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5533                  * this saves a register write for every interrupt
5534                  */
5535                 switch (hw->mac.type) {
5536                 case ixgbe_mac_82598EB:
5537                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5538                         break;
5539                 case ixgbe_mac_82599EB:
5540                 case ixgbe_mac_X540:
5541                 case ixgbe_mac_X550:
5542                 case ixgbe_mac_X550EM_x:
5543                 case ixgbe_mac_x550em_a:
5544                 default:
5545                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5546                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5547                         break;
5548                 }
5549         } else {
5550                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5551                  * specifically only auto mask tx and rx interrupts */
5552                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5553         }
5554
5555         /* XXX: to interrupt immediately for EICS writes, enable this */
5556         /* gpie |= IXGBE_GPIE_EIMEN; */
5557
5558         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5559                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5560
5561                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5562                 case IXGBE_82599_VMDQ_8Q_MASK:
5563                         gpie |= IXGBE_GPIE_VTMODE_16;
5564                         break;
5565                 case IXGBE_82599_VMDQ_4Q_MASK:
5566                         gpie |= IXGBE_GPIE_VTMODE_32;
5567                         break;
5568                 default:
5569                         gpie |= IXGBE_GPIE_VTMODE_64;
5570                         break;
5571                 }
5572         }
5573
5574         /* Enable Thermal over heat sensor interrupt */
5575         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5576                 switch (adapter->hw.mac.type) {
5577                 case ixgbe_mac_82599EB:
5578                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5579                         break;
5580                 default:
5581                         break;
5582                 }
5583         }
5584
5585         /* Enable fan failure interrupt */
5586         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5587                 gpie |= IXGBE_SDP1_GPIEN(hw);
5588
5589         switch (hw->mac.type) {
5590         case ixgbe_mac_82599EB:
5591                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5592                 break;
5593         case ixgbe_mac_X550EM_x:
5594         case ixgbe_mac_x550em_a:
5595                 gpie |= IXGBE_SDP0_GPIEN_X540;
5596                 break;
5597         default:
5598                 break;
5599         }
5600
5601         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5602 }
5603
5604 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5605 {
5606         struct ixgbe_hw *hw = &adapter->hw;
5607         int err;
5608         u32 ctrl_ext;
5609
5610         ixgbe_get_hw_control(adapter);
5611         ixgbe_setup_gpie(adapter);
5612
5613         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5614                 ixgbe_configure_msix(adapter);
5615         else
5616                 ixgbe_configure_msi_and_legacy(adapter);
5617
5618         /* enable the optics for 82599 SFP+ fiber */
5619         if (hw->mac.ops.enable_tx_laser)
5620                 hw->mac.ops.enable_tx_laser(hw);
5621
5622         if (hw->phy.ops.set_phy_power)
5623                 hw->phy.ops.set_phy_power(hw, true);
5624
5625         smp_mb__before_atomic();
5626         clear_bit(__IXGBE_DOWN, &adapter->state);
5627         ixgbe_napi_enable_all(adapter);
5628
5629         if (ixgbe_is_sfp(hw)) {
5630                 ixgbe_sfp_link_config(adapter);
5631         } else {
5632                 err = ixgbe_non_sfp_link_config(hw);
5633                 if (err)
5634                         e_err(probe, "link_config FAILED %d\n", err);
5635         }
5636
5637         /* clear any pending interrupts, may auto mask */
5638         IXGBE_READ_REG(hw, IXGBE_EICR);
5639         ixgbe_irq_enable(adapter, true, true);
5640
5641         /*
5642          * If this adapter has a fan, check to see if we had a failure
5643          * before we enabled the interrupt.
5644          */
5645         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5646                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5647                 if (esdp & IXGBE_ESDP_SDP1)
5648                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5649         }
5650
5651         /* bring the link up in the watchdog, this could race with our first
5652          * link up interrupt but shouldn't be a problem */
5653         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5654         adapter->link_check_timeout = jiffies;
5655         mod_timer(&adapter->service_timer, jiffies);
5656
5657         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5658         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5659         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5660         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5661 }
5662
5663 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5664 {
5665         WARN_ON(in_interrupt());
5666         /* put off any impending NetWatchDogTimeout */
5667         netif_trans_update(adapter->netdev);
5668
5669         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5670                 usleep_range(1000, 2000);
5671         if (adapter->hw.phy.type == ixgbe_phy_fw)
5672                 ixgbe_watchdog_link_is_down(adapter);
5673         ixgbe_down(adapter);
5674         /*
5675          * If SR-IOV enabled then wait a bit before bringing the adapter
5676          * back up to give the VFs time to respond to the reset.  The
5677          * two second wait is based upon the watchdog timer cycle in
5678          * the VF driver.
5679          */
5680         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5681                 msleep(2000);
5682         ixgbe_up(adapter);
5683         clear_bit(__IXGBE_RESETTING, &adapter->state);
5684 }
5685
5686 void ixgbe_up(struct ixgbe_adapter *adapter)
5687 {
5688         /* hardware has been reset, we need to reload some things */
5689         ixgbe_configure(adapter);
5690
5691         ixgbe_up_complete(adapter);
5692 }
5693
5694 void ixgbe_reset(struct ixgbe_adapter *adapter)
5695 {
5696         struct ixgbe_hw *hw = &adapter->hw;
5697         struct net_device *netdev = adapter->netdev;
5698         int err;
5699
5700         if (ixgbe_removed(hw->hw_addr))
5701                 return;
5702         /* lock SFP init bit to prevent race conditions with the watchdog */
5703         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5704                 usleep_range(1000, 2000);
5705
5706         /* clear all SFP and link config related flags while holding SFP_INIT */
5707         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5708                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5709         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5710
5711         err = hw->mac.ops.init_hw(hw);
5712         switch (err) {
5713         case 0:
5714         case IXGBE_ERR_SFP_NOT_PRESENT:
5715         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5716                 break;
5717         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5718                 e_dev_err("master disable timed out\n");
5719                 break;
5720         case IXGBE_ERR_EEPROM_VERSION:
5721                 /* We are running on a pre-production device, log a warning */
5722                 e_dev_warn("This device is a pre-production adapter/LOM. "
5723                            "Please be aware there may be issues associated with "
5724                            "your hardware.  If you are experiencing problems "
5725                            "please contact your Intel or hardware "
5726                            "representative who provided you with this "
5727                            "hardware.\n");
5728                 break;
5729         default:
5730                 e_dev_err("Hardware Error: %d\n", err);
5731         }
5732
5733         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5734
5735         /* flush entries out of MAC table */
5736         ixgbe_flush_sw_mac_table(adapter);
5737         __dev_uc_unsync(netdev, NULL);
5738
5739         /* do not flush user set addresses */
5740         ixgbe_mac_set_default_filter(adapter);
5741
5742         /* update SAN MAC vmdq pool selection */
5743         if (hw->mac.san_mac_rar_index)
5744                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5745
5746         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5747                 ixgbe_ptp_reset(adapter);
5748
5749         if (hw->phy.ops.set_phy_power) {
5750                 if (!netif_running(adapter->netdev) && !adapter->wol)
5751                         hw->phy.ops.set_phy_power(hw, false);
5752                 else
5753                         hw->phy.ops.set_phy_power(hw, true);
5754         }
5755 }
5756
5757 /**
5758  * ixgbe_clean_tx_ring - Free Tx Buffers
5759  * @tx_ring: ring to be cleaned
5760  **/
5761 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5762 {
5763         u16 i = tx_ring->next_to_clean;
5764         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5765
5766         while (i != tx_ring->next_to_use) {
5767                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5768
5769                 /* Free all the Tx ring sk_buffs */
5770                 if (ring_is_xdp(tx_ring))
5771                         page_frag_free(tx_buffer->data);
5772                 else
5773                         dev_kfree_skb_any(tx_buffer->skb);
5774
5775                 /* unmap skb header data */
5776                 dma_unmap_single(tx_ring->dev,
5777                                  dma_unmap_addr(tx_buffer, dma),
5778                                  dma_unmap_len(tx_buffer, len),
5779                                  DMA_TO_DEVICE);
5780
5781                 /* check for eop_desc to determine the end of the packet */
5782                 eop_desc = tx_buffer->next_to_watch;
5783                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5784
5785                 /* unmap remaining buffers */
5786                 while (tx_desc != eop_desc) {
5787                         tx_buffer++;
5788                         tx_desc++;
5789                         i++;
5790                         if (unlikely(i == tx_ring->count)) {
5791                                 i = 0;
5792                                 tx_buffer = tx_ring->tx_buffer_info;
5793                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5794                         }
5795
5796                         /* unmap any remaining paged data */
5797                         if (dma_unmap_len(tx_buffer, len))
5798                                 dma_unmap_page(tx_ring->dev,
5799                                                dma_unmap_addr(tx_buffer, dma),
5800                                                dma_unmap_len(tx_buffer, len),
5801                                                DMA_TO_DEVICE);
5802                 }
5803
5804                 /* move us one more past the eop_desc for start of next pkt */
5805                 tx_buffer++;
5806                 i++;
5807                 if (unlikely(i == tx_ring->count)) {
5808                         i = 0;
5809                         tx_buffer = tx_ring->tx_buffer_info;
5810                 }
5811         }
5812
5813         /* reset BQL for queue */
5814         if (!ring_is_xdp(tx_ring))
5815                 netdev_tx_reset_queue(txring_txq(tx_ring));
5816
5817         /* reset next_to_use and next_to_clean */
5818         tx_ring->next_to_use = 0;
5819         tx_ring->next_to_clean = 0;
5820 }
5821
5822 /**
5823  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5824  * @adapter: board private structure
5825  **/
5826 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5827 {
5828         int i;
5829
5830         for (i = 0; i < adapter->num_rx_queues; i++)
5831                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5832 }
5833
5834 /**
5835  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5836  * @adapter: board private structure
5837  **/
5838 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5839 {
5840         int i;
5841
5842         for (i = 0; i < adapter->num_tx_queues; i++)
5843                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5844         for (i = 0; i < adapter->num_xdp_queues; i++)
5845                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5846 }
5847
5848 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5849 {
5850         struct hlist_node *node2;
5851         struct ixgbe_fdir_filter *filter;
5852
5853         spin_lock(&adapter->fdir_perfect_lock);
5854
5855         hlist_for_each_entry_safe(filter, node2,
5856                                   &adapter->fdir_filter_list, fdir_node) {
5857                 hlist_del(&filter->fdir_node);
5858                 kfree(filter);
5859         }
5860         adapter->fdir_filter_count = 0;
5861
5862         spin_unlock(&adapter->fdir_perfect_lock);
5863 }
5864
5865 void ixgbe_down(struct ixgbe_adapter *adapter)
5866 {
5867         struct net_device *netdev = adapter->netdev;
5868         struct ixgbe_hw *hw = &adapter->hw;
5869         int i;
5870
5871         /* signal that we are down to the interrupt handler */
5872         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5873                 return; /* do nothing if already down */
5874
5875         /* disable receives */
5876         hw->mac.ops.disable_rx(hw);
5877
5878         /* disable all enabled rx queues */
5879         for (i = 0; i < adapter->num_rx_queues; i++)
5880                 /* this call also flushes the previous write */
5881                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5882
5883         usleep_range(10000, 20000);
5884
5885         /* synchronize_sched() needed for pending XDP buffers to drain */
5886         if (adapter->xdp_ring[0])
5887                 synchronize_sched();
5888         netif_tx_stop_all_queues(netdev);
5889
5890         /* call carrier off first to avoid false dev_watchdog timeouts */
5891         netif_carrier_off(netdev);
5892         netif_tx_disable(netdev);
5893
5894         ixgbe_irq_disable(adapter);
5895
5896         ixgbe_napi_disable_all(adapter);
5897
5898         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5899         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5900         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5901
5902         del_timer_sync(&adapter->service_timer);
5903
5904         if (adapter->num_vfs) {
5905                 /* Clear EITR Select mapping */
5906                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5907
5908                 /* Mark all the VFs as inactive */
5909                 for (i = 0 ; i < adapter->num_vfs; i++)
5910                         adapter->vfinfo[i].clear_to_send = false;
5911
5912                 /* ping all the active vfs to let them know we are going down */
5913                 ixgbe_ping_all_vfs(adapter);
5914
5915                 /* Disable all VFTE/VFRE TX/RX */
5916                 ixgbe_disable_tx_rx(adapter);
5917         }
5918
5919         /* disable transmits in the hardware now that interrupts are off */
5920         for (i = 0; i < adapter->num_tx_queues; i++) {
5921                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5922                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5923         }
5924         for (i = 0; i < adapter->num_xdp_queues; i++) {
5925                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5926
5927                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5928         }
5929
5930         /* Disable the Tx DMA engine on 82599 and later MAC */
5931         switch (hw->mac.type) {
5932         case ixgbe_mac_82599EB:
5933         case ixgbe_mac_X540:
5934         case ixgbe_mac_X550:
5935         case ixgbe_mac_X550EM_x:
5936         case ixgbe_mac_x550em_a:
5937                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5938                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5939                                  ~IXGBE_DMATXCTL_TE));
5940                 break;
5941         default:
5942                 break;
5943         }
5944
5945         if (!pci_channel_offline(adapter->pdev))
5946                 ixgbe_reset(adapter);
5947
5948         /* power down the optics for 82599 SFP+ fiber */
5949         if (hw->mac.ops.disable_tx_laser)
5950                 hw->mac.ops.disable_tx_laser(hw);
5951
5952         ixgbe_clean_all_tx_rings(adapter);
5953         ixgbe_clean_all_rx_rings(adapter);
5954 }
5955
5956 /**
5957  * ixgbe_eee_capable - helper function to determine EEE support on X550
5958  * @adapter: board private structure
5959  */
5960 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5961 {
5962         struct ixgbe_hw *hw = &adapter->hw;
5963
5964         switch (hw->device_id) {
5965         case IXGBE_DEV_ID_X550EM_A_1G_T:
5966         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5967                 if (!hw->phy.eee_speeds_supported)
5968                         break;
5969                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5970                 if (!hw->phy.eee_speeds_advertised)
5971                         break;
5972                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5973                 break;
5974         default:
5975                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5976                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5977                 break;
5978         }
5979 }
5980
5981 /**
5982  * ixgbe_tx_timeout - Respond to a Tx Hang
5983  * @netdev: network interface device structure
5984  **/
5985 static void ixgbe_tx_timeout(struct net_device *netdev)
5986 {
5987         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5988
5989         /* Do the reset outside of interrupt context */
5990         ixgbe_tx_timeout_reset(adapter);
5991 }
5992
5993 #ifdef CONFIG_IXGBE_DCB
5994 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
5995 {
5996         struct ixgbe_hw *hw = &adapter->hw;
5997         struct tc_configuration *tc;
5998         int j;
5999
6000         switch (hw->mac.type) {
6001         case ixgbe_mac_82598EB:
6002         case ixgbe_mac_82599EB:
6003                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6004                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6005                 break;
6006         case ixgbe_mac_X540:
6007         case ixgbe_mac_X550:
6008                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6009                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6010                 break;
6011         case ixgbe_mac_X550EM_x:
6012         case ixgbe_mac_x550em_a:
6013         default:
6014                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6015                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6016                 break;
6017         }
6018
6019         /* Configure DCB traffic classes */
6020         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6021                 tc = &adapter->dcb_cfg.tc_config[j];
6022                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6023                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6024                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6025                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6026                 tc->dcb_pfc = pfc_disabled;
6027         }
6028
6029         /* Initialize default user to priority mapping, UPx->TC0 */
6030         tc = &adapter->dcb_cfg.tc_config[0];
6031         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6032         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6033
6034         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6035         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6036         adapter->dcb_cfg.pfc_mode_enable = false;
6037         adapter->dcb_set_bitmap = 0x00;
6038         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6039                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6040         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6041                sizeof(adapter->temp_dcb_cfg));
6042 }
6043 #endif
6044
6045 /**
6046  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6047  * @adapter: board private structure to initialize
6048  * @ii: pointer to ixgbe_info for device
6049  *
6050  * ixgbe_sw_init initializes the Adapter private data structure.
6051  * Fields are initialized based on PCI device information and
6052  * OS network device settings (MTU size).
6053  **/
6054 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6055                          const struct ixgbe_info *ii)
6056 {
6057         struct ixgbe_hw *hw = &adapter->hw;
6058         struct pci_dev *pdev = adapter->pdev;
6059         unsigned int rss, fdir;
6060         u32 fwsm;
6061         int i;
6062
6063         /* PCI config space info */
6064
6065         hw->vendor_id = pdev->vendor;
6066         hw->device_id = pdev->device;
6067         hw->revision_id = pdev->revision;
6068         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6069         hw->subsystem_device_id = pdev->subsystem_device;
6070
6071         /* get_invariants needs the device IDs */
6072         ii->get_invariants(hw);
6073
6074         /* Set common capability flags and settings */
6075         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6076         adapter->ring_feature[RING_F_RSS].limit = rss;
6077         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6078         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6079         adapter->atr_sample_rate = 20;
6080         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6081         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6082         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6083         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6084 #ifdef CONFIG_IXGBE_DCA
6085         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6086 #endif
6087 #ifdef CONFIG_IXGBE_DCB
6088         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6089         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6090 #endif
6091 #ifdef IXGBE_FCOE
6092         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6093         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6094 #ifdef CONFIG_IXGBE_DCB
6095         /* Default traffic class to use for FCoE */
6096         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6097 #endif /* CONFIG_IXGBE_DCB */
6098 #endif /* IXGBE_FCOE */
6099
6100         /* initialize static ixgbe jump table entries */
6101         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6102                                           GFP_KERNEL);
6103         if (!adapter->jump_tables[0])
6104                 return -ENOMEM;
6105         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6106
6107         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6108                 adapter->jump_tables[i] = NULL;
6109
6110         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6111                                      hw->mac.num_rar_entries,
6112                                      GFP_ATOMIC);
6113         if (!adapter->mac_table)
6114                 return -ENOMEM;
6115
6116         if (ixgbe_init_rss_key(adapter))
6117                 return -ENOMEM;
6118
6119         /* Set MAC specific capability flags and exceptions */
6120         switch (hw->mac.type) {
6121         case ixgbe_mac_82598EB:
6122                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6123
6124                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6125                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6126
6127                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6128                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6129                 adapter->atr_sample_rate = 0;
6130                 adapter->fdir_pballoc = 0;
6131 #ifdef IXGBE_FCOE
6132                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6133                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6134 #ifdef CONFIG_IXGBE_DCB
6135                 adapter->fcoe.up = 0;
6136 #endif /* IXGBE_DCB */
6137 #endif /* IXGBE_FCOE */
6138                 break;
6139         case ixgbe_mac_82599EB:
6140                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6141                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6142                 break;
6143         case ixgbe_mac_X540:
6144                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6145                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6146                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6147                 break;
6148         case ixgbe_mac_x550em_a:
6149                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6150                 switch (hw->device_id) {
6151                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6152                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6153                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6154                         break;
6155                 default:
6156                         break;
6157                 }
6158         /* fall through */
6159         case ixgbe_mac_X550EM_x:
6160 #ifdef CONFIG_IXGBE_DCB
6161                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6162 #endif
6163 #ifdef IXGBE_FCOE
6164                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6165 #ifdef CONFIG_IXGBE_DCB
6166                 adapter->fcoe.up = 0;
6167 #endif /* IXGBE_DCB */
6168 #endif /* IXGBE_FCOE */
6169         /* Fall Through */
6170         case ixgbe_mac_X550:
6171                 if (hw->mac.type == ixgbe_mac_X550)
6172                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6173 #ifdef CONFIG_IXGBE_DCA
6174                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6175 #endif
6176                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6177                 break;
6178         default:
6179                 break;
6180         }
6181
6182 #ifdef IXGBE_FCOE
6183         /* FCoE support exists, always init the FCoE lock */
6184         spin_lock_init(&adapter->fcoe.lock);
6185
6186 #endif
6187         /* n-tuple support exists, always init our spinlock */
6188         spin_lock_init(&adapter->fdir_perfect_lock);
6189
6190 #ifdef CONFIG_IXGBE_DCB
6191         ixgbe_init_dcb(adapter);
6192 #endif
6193
6194         /* default flow control settings */
6195         hw->fc.requested_mode = ixgbe_fc_full;
6196         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6197         ixgbe_pbthresh_setup(adapter);
6198         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6199         hw->fc.send_xon = true;
6200         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6201
6202 #ifdef CONFIG_PCI_IOV
6203         if (max_vfs > 0)
6204                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6205
6206         /* assign number of SR-IOV VFs */
6207         if (hw->mac.type != ixgbe_mac_82598EB) {
6208                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6209                         max_vfs = 0;
6210                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6211                 }
6212         }
6213 #endif /* CONFIG_PCI_IOV */
6214
6215         /* enable itr by default in dynamic mode */
6216         adapter->rx_itr_setting = 1;
6217         adapter->tx_itr_setting = 1;
6218
6219         /* set default ring sizes */
6220         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6221         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6222
6223         /* set default work limits */
6224         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6225
6226         /* initialize eeprom parameters */
6227         if (ixgbe_init_eeprom_params_generic(hw)) {
6228                 e_dev_err("EEPROM initialization failed\n");
6229                 return -EIO;
6230         }
6231
6232         /* PF holds first pool slot */
6233         set_bit(0, adapter->fwd_bitmask);
6234         set_bit(__IXGBE_DOWN, &adapter->state);
6235
6236         return 0;
6237 }
6238
6239 /**
6240  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6241  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6242  *
6243  * Return 0 on success, negative on failure
6244  **/
6245 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6246 {
6247         struct device *dev = tx_ring->dev;
6248         int orig_node = dev_to_node(dev);
6249         int ring_node = -1;
6250         int size;
6251
6252         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6253
6254         if (tx_ring->q_vector)
6255                 ring_node = tx_ring->q_vector->numa_node;
6256
6257         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6258         if (!tx_ring->tx_buffer_info)
6259                 tx_ring->tx_buffer_info = vmalloc(size);
6260         if (!tx_ring->tx_buffer_info)
6261                 goto err;
6262
6263         /* round up to nearest 4K */
6264         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6265         tx_ring->size = ALIGN(tx_ring->size, 4096);
6266
6267         set_dev_node(dev, ring_node);
6268         tx_ring->desc = dma_alloc_coherent(dev,
6269                                            tx_ring->size,
6270                                            &tx_ring->dma,
6271                                            GFP_KERNEL);
6272         set_dev_node(dev, orig_node);
6273         if (!tx_ring->desc)
6274                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6275                                                    &tx_ring->dma, GFP_KERNEL);
6276         if (!tx_ring->desc)
6277                 goto err;
6278
6279         tx_ring->next_to_use = 0;
6280         tx_ring->next_to_clean = 0;
6281         return 0;
6282
6283 err:
6284         vfree(tx_ring->tx_buffer_info);
6285         tx_ring->tx_buffer_info = NULL;
6286         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6287         return -ENOMEM;
6288 }
6289
6290 /**
6291  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6292  * @adapter: board private structure
6293  *
6294  * If this function returns with an error, then it's possible one or
6295  * more of the rings is populated (while the rest are not).  It is the
6296  * callers duty to clean those orphaned rings.
6297  *
6298  * Return 0 on success, negative on failure
6299  **/
6300 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6301 {
6302         int i, j = 0, err = 0;
6303
6304         for (i = 0; i < adapter->num_tx_queues; i++) {
6305                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6306                 if (!err)
6307                         continue;
6308
6309                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6310                 goto err_setup_tx;
6311         }
6312         for (j = 0; j < adapter->num_xdp_queues; j++) {
6313                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6314                 if (!err)
6315                         continue;
6316
6317                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6318                 goto err_setup_tx;
6319         }
6320
6321         return 0;
6322 err_setup_tx:
6323         /* rewind the index freeing the rings as we go */
6324         while (j--)
6325                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6326         while (i--)
6327                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6328         return err;
6329 }
6330
6331 /**
6332  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6333  * @adapter: pointer to ixgbe_adapter
6334  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6335  *
6336  * Returns 0 on success, negative on failure
6337  **/
6338 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6339                              struct ixgbe_ring *rx_ring)
6340 {
6341         struct device *dev = rx_ring->dev;
6342         int orig_node = dev_to_node(dev);
6343         int ring_node = -1;
6344         int size;
6345
6346         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6347
6348         if (rx_ring->q_vector)
6349                 ring_node = rx_ring->q_vector->numa_node;
6350
6351         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6352         if (!rx_ring->rx_buffer_info)
6353                 rx_ring->rx_buffer_info = vmalloc(size);
6354         if (!rx_ring->rx_buffer_info)
6355                 goto err;
6356
6357         /* Round up to nearest 4K */
6358         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6359         rx_ring->size = ALIGN(rx_ring->size, 4096);
6360
6361         set_dev_node(dev, ring_node);
6362         rx_ring->desc = dma_alloc_coherent(dev,
6363                                            rx_ring->size,
6364                                            &rx_ring->dma,
6365                                            GFP_KERNEL);
6366         set_dev_node(dev, orig_node);
6367         if (!rx_ring->desc)
6368                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6369                                                    &rx_ring->dma, GFP_KERNEL);
6370         if (!rx_ring->desc)
6371                 goto err;
6372
6373         rx_ring->next_to_clean = 0;
6374         rx_ring->next_to_use = 0;
6375
6376         /* XDP RX-queue info */
6377         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6378                              rx_ring->queue_index) < 0)
6379                 goto err;
6380
6381         rx_ring->xdp_prog = adapter->xdp_prog;
6382
6383         return 0;
6384 err:
6385         vfree(rx_ring->rx_buffer_info);
6386         rx_ring->rx_buffer_info = NULL;
6387         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6388         return -ENOMEM;
6389 }
6390
6391 /**
6392  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6393  * @adapter: board private structure
6394  *
6395  * If this function returns with an error, then it's possible one or
6396  * more of the rings is populated (while the rest are not).  It is the
6397  * callers duty to clean those orphaned rings.
6398  *
6399  * Return 0 on success, negative on failure
6400  **/
6401 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6402 {
6403         int i, err = 0;
6404
6405         for (i = 0; i < adapter->num_rx_queues; i++) {
6406                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6407                 if (!err)
6408                         continue;
6409
6410                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6411                 goto err_setup_rx;
6412         }
6413
6414 #ifdef IXGBE_FCOE
6415         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6416         if (!err)
6417 #endif
6418                 return 0;
6419 err_setup_rx:
6420         /* rewind the index freeing the rings as we go */
6421         while (i--)
6422                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6423         return err;
6424 }
6425
6426 /**
6427  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6428  * @tx_ring: Tx descriptor ring for a specific queue
6429  *
6430  * Free all transmit software resources
6431  **/
6432 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6433 {
6434         ixgbe_clean_tx_ring(tx_ring);
6435
6436         vfree(tx_ring->tx_buffer_info);
6437         tx_ring->tx_buffer_info = NULL;
6438
6439         /* if not set, then don't free */
6440         if (!tx_ring->desc)
6441                 return;
6442
6443         dma_free_coherent(tx_ring->dev, tx_ring->size,
6444                           tx_ring->desc, tx_ring->dma);
6445
6446         tx_ring->desc = NULL;
6447 }
6448
6449 /**
6450  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6451  * @adapter: board private structure
6452  *
6453  * Free all transmit software resources
6454  **/
6455 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6456 {
6457         int i;
6458
6459         for (i = 0; i < adapter->num_tx_queues; i++)
6460                 if (adapter->tx_ring[i]->desc)
6461                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6462         for (i = 0; i < adapter->num_xdp_queues; i++)
6463                 if (adapter->xdp_ring[i]->desc)
6464                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6465 }
6466
6467 /**
6468  * ixgbe_free_rx_resources - Free Rx Resources
6469  * @rx_ring: ring to clean the resources from
6470  *
6471  * Free all receive software resources
6472  **/
6473 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6474 {
6475         ixgbe_clean_rx_ring(rx_ring);
6476
6477         rx_ring->xdp_prog = NULL;
6478         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6479         vfree(rx_ring->rx_buffer_info);
6480         rx_ring->rx_buffer_info = NULL;
6481
6482         /* if not set, then don't free */
6483         if (!rx_ring->desc)
6484                 return;
6485
6486         dma_free_coherent(rx_ring->dev, rx_ring->size,
6487                           rx_ring->desc, rx_ring->dma);
6488
6489         rx_ring->desc = NULL;
6490 }
6491
6492 /**
6493  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6494  * @adapter: board private structure
6495  *
6496  * Free all receive software resources
6497  **/
6498 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6499 {
6500         int i;
6501
6502 #ifdef IXGBE_FCOE
6503         ixgbe_free_fcoe_ddp_resources(adapter);
6504
6505 #endif
6506         for (i = 0; i < adapter->num_rx_queues; i++)
6507                 if (adapter->rx_ring[i]->desc)
6508                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6509 }
6510
6511 /**
6512  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6513  * @netdev: network interface device structure
6514  * @new_mtu: new value for maximum frame size
6515  *
6516  * Returns 0 on success, negative on failure
6517  **/
6518 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6519 {
6520         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6521
6522         /*
6523          * For 82599EB we cannot allow legacy VFs to enable their receive
6524          * paths when MTU greater than 1500 is configured.  So display a
6525          * warning that legacy VFs will be disabled.
6526          */
6527         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6528             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6529             (new_mtu > ETH_DATA_LEN))
6530                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6531
6532         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6533
6534         /* must set new MTU before calling down or up */
6535         netdev->mtu = new_mtu;
6536
6537         if (netif_running(netdev))
6538                 ixgbe_reinit_locked(adapter);
6539
6540         return 0;
6541 }
6542
6543 /**
6544  * ixgbe_open - Called when a network interface is made active
6545  * @netdev: network interface device structure
6546  *
6547  * Returns 0 on success, negative value on failure
6548  *
6549  * The open entry point is called when a network interface is made
6550  * active by the system (IFF_UP).  At this point all resources needed
6551  * for transmit and receive operations are allocated, the interrupt
6552  * handler is registered with the OS, the watchdog timer is started,
6553  * and the stack is notified that the interface is ready.
6554  **/
6555 int ixgbe_open(struct net_device *netdev)
6556 {
6557         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6558         struct ixgbe_hw *hw = &adapter->hw;
6559         int err, queues;
6560
6561         /* disallow open during test */
6562         if (test_bit(__IXGBE_TESTING, &adapter->state))
6563                 return -EBUSY;
6564
6565         netif_carrier_off(netdev);
6566
6567         /* allocate transmit descriptors */
6568         err = ixgbe_setup_all_tx_resources(adapter);
6569         if (err)
6570                 goto err_setup_tx;
6571
6572         /* allocate receive descriptors */
6573         err = ixgbe_setup_all_rx_resources(adapter);
6574         if (err)
6575                 goto err_setup_rx;
6576
6577         ixgbe_configure(adapter);
6578
6579         err = ixgbe_request_irq(adapter);
6580         if (err)
6581                 goto err_req_irq;
6582
6583         /* Notify the stack of the actual queue counts. */
6584         queues = adapter->num_tx_queues;
6585         err = netif_set_real_num_tx_queues(netdev, queues);
6586         if (err)
6587                 goto err_set_queues;
6588
6589         queues = adapter->num_rx_queues;
6590         err = netif_set_real_num_rx_queues(netdev, queues);
6591         if (err)
6592                 goto err_set_queues;
6593
6594         ixgbe_ptp_init(adapter);
6595
6596         ixgbe_up_complete(adapter);
6597
6598         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6599         udp_tunnel_get_rx_info(netdev);
6600
6601         return 0;
6602
6603 err_set_queues:
6604         ixgbe_free_irq(adapter);
6605 err_req_irq:
6606         ixgbe_free_all_rx_resources(adapter);
6607         if (hw->phy.ops.set_phy_power && !adapter->wol)
6608                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6609 err_setup_rx:
6610         ixgbe_free_all_tx_resources(adapter);
6611 err_setup_tx:
6612         ixgbe_reset(adapter);
6613
6614         return err;
6615 }
6616
6617 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6618 {
6619         ixgbe_ptp_suspend(adapter);
6620
6621         if (adapter->hw.phy.ops.enter_lplu) {
6622                 adapter->hw.phy.reset_disable = true;
6623                 ixgbe_down(adapter);
6624                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6625                 adapter->hw.phy.reset_disable = false;
6626         } else {
6627                 ixgbe_down(adapter);
6628         }
6629
6630         ixgbe_free_irq(adapter);
6631
6632         ixgbe_free_all_tx_resources(adapter);
6633         ixgbe_free_all_rx_resources(adapter);
6634 }
6635
6636 /**
6637  * ixgbe_close - Disables a network interface
6638  * @netdev: network interface device structure
6639  *
6640  * Returns 0, this is not allowed to fail
6641  *
6642  * The close entry point is called when an interface is de-activated
6643  * by the OS.  The hardware is still under the drivers control, but
6644  * needs to be disabled.  A global MAC reset is issued to stop the
6645  * hardware, and all transmit and receive resources are freed.
6646  **/
6647 int ixgbe_close(struct net_device *netdev)
6648 {
6649         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6650
6651         ixgbe_ptp_stop(adapter);
6652
6653         if (netif_device_present(netdev))
6654                 ixgbe_close_suspend(adapter);
6655
6656         ixgbe_fdir_filter_exit(adapter);
6657
6658         ixgbe_release_hw_control(adapter);
6659
6660         return 0;
6661 }
6662
6663 #ifdef CONFIG_PM
6664 static int ixgbe_resume(struct pci_dev *pdev)
6665 {
6666         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6667         struct net_device *netdev = adapter->netdev;
6668         u32 err;
6669
6670         adapter->hw.hw_addr = adapter->io_addr;
6671         pci_set_power_state(pdev, PCI_D0);
6672         pci_restore_state(pdev);
6673         /*
6674          * pci_restore_state clears dev->state_saved so call
6675          * pci_save_state to restore it.
6676          */
6677         pci_save_state(pdev);
6678
6679         err = pci_enable_device_mem(pdev);
6680         if (err) {
6681                 e_dev_err("Cannot enable PCI device from suspend\n");
6682                 return err;
6683         }
6684         smp_mb__before_atomic();
6685         clear_bit(__IXGBE_DISABLED, &adapter->state);
6686         pci_set_master(pdev);
6687
6688         pci_wake_from_d3(pdev, false);
6689
6690         ixgbe_reset(adapter);
6691
6692         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6693
6694         rtnl_lock();
6695         err = ixgbe_init_interrupt_scheme(adapter);
6696         if (!err && netif_running(netdev))
6697                 err = ixgbe_open(netdev);
6698
6699
6700         if (!err)
6701                 netif_device_attach(netdev);
6702         rtnl_unlock();
6703
6704         return err;
6705 }
6706 #endif /* CONFIG_PM */
6707
6708 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6709 {
6710         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6711         struct net_device *netdev = adapter->netdev;
6712         struct ixgbe_hw *hw = &adapter->hw;
6713         u32 ctrl;
6714         u32 wufc = adapter->wol;
6715 #ifdef CONFIG_PM
6716         int retval = 0;
6717 #endif
6718
6719         rtnl_lock();
6720         netif_device_detach(netdev);
6721
6722         if (netif_running(netdev))
6723                 ixgbe_close_suspend(adapter);
6724
6725         ixgbe_clear_interrupt_scheme(adapter);
6726         rtnl_unlock();
6727
6728 #ifdef CONFIG_PM
6729         retval = pci_save_state(pdev);
6730         if (retval)
6731                 return retval;
6732
6733 #endif
6734         if (hw->mac.ops.stop_link_on_d3)
6735                 hw->mac.ops.stop_link_on_d3(hw);
6736
6737         if (wufc) {
6738                 u32 fctrl;
6739
6740                 ixgbe_set_rx_mode(netdev);
6741
6742                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6743                 if (hw->mac.ops.enable_tx_laser)
6744                         hw->mac.ops.enable_tx_laser(hw);
6745
6746                 /* enable the reception of multicast packets */
6747                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6748                 fctrl |= IXGBE_FCTRL_MPE;
6749                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6750
6751                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6752                 ctrl |= IXGBE_CTRL_GIO_DIS;
6753                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6754
6755                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6756         } else {
6757                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6758                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6759         }
6760
6761         switch (hw->mac.type) {
6762         case ixgbe_mac_82598EB:
6763                 pci_wake_from_d3(pdev, false);
6764                 break;
6765         case ixgbe_mac_82599EB:
6766         case ixgbe_mac_X540:
6767         case ixgbe_mac_X550:
6768         case ixgbe_mac_X550EM_x:
6769         case ixgbe_mac_x550em_a:
6770                 pci_wake_from_d3(pdev, !!wufc);
6771                 break;
6772         default:
6773                 break;
6774         }
6775
6776         *enable_wake = !!wufc;
6777         if (hw->phy.ops.set_phy_power && !*enable_wake)
6778                 hw->phy.ops.set_phy_power(hw, false);
6779
6780         ixgbe_release_hw_control(adapter);
6781
6782         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6783                 pci_disable_device(pdev);
6784
6785         return 0;
6786 }
6787
6788 #ifdef CONFIG_PM
6789 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6790 {
6791         int retval;
6792         bool wake;
6793
6794         retval = __ixgbe_shutdown(pdev, &wake);
6795         if (retval)
6796                 return retval;
6797
6798         if (wake) {
6799                 pci_prepare_to_sleep(pdev);
6800         } else {
6801                 pci_wake_from_d3(pdev, false);
6802                 pci_set_power_state(pdev, PCI_D3hot);
6803         }
6804
6805         return 0;
6806 }
6807 #endif /* CONFIG_PM */
6808
6809 static void ixgbe_shutdown(struct pci_dev *pdev)
6810 {
6811         bool wake;
6812
6813         __ixgbe_shutdown(pdev, &wake);
6814
6815         if (system_state == SYSTEM_POWER_OFF) {
6816                 pci_wake_from_d3(pdev, wake);
6817                 pci_set_power_state(pdev, PCI_D3hot);
6818         }
6819 }
6820
6821 /**
6822  * ixgbe_update_stats - Update the board statistics counters.
6823  * @adapter: board private structure
6824  **/
6825 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6826 {
6827         struct net_device *netdev = adapter->netdev;
6828         struct ixgbe_hw *hw = &adapter->hw;
6829         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6830         u64 total_mpc = 0;
6831         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6832         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6833         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6834         u64 alloc_rx_page = 0;
6835         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6836
6837         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6838             test_bit(__IXGBE_RESETTING, &adapter->state))
6839                 return;
6840
6841         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6842                 u64 rsc_count = 0;
6843                 u64 rsc_flush = 0;
6844                 for (i = 0; i < adapter->num_rx_queues; i++) {
6845                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6846                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6847                 }
6848                 adapter->rsc_total_count = rsc_count;
6849                 adapter->rsc_total_flush = rsc_flush;
6850         }
6851
6852         for (i = 0; i < adapter->num_rx_queues; i++) {
6853                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6854                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6855                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6856                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6857                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6858                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6859                 bytes += rx_ring->stats.bytes;
6860                 packets += rx_ring->stats.packets;
6861         }
6862         adapter->non_eop_descs = non_eop_descs;
6863         adapter->alloc_rx_page = alloc_rx_page;
6864         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6865         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6866         adapter->hw_csum_rx_error = hw_csum_rx_error;
6867         netdev->stats.rx_bytes = bytes;
6868         netdev->stats.rx_packets = packets;
6869
6870         bytes = 0;
6871         packets = 0;
6872         /* gather some stats to the adapter struct that are per queue */
6873         for (i = 0; i < adapter->num_tx_queues; i++) {
6874                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6875                 restart_queue += tx_ring->tx_stats.restart_queue;
6876                 tx_busy += tx_ring->tx_stats.tx_busy;
6877                 bytes += tx_ring->stats.bytes;
6878                 packets += tx_ring->stats.packets;
6879         }
6880         for (i = 0; i < adapter->num_xdp_queues; i++) {
6881                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6882
6883                 restart_queue += xdp_ring->tx_stats.restart_queue;
6884                 tx_busy += xdp_ring->tx_stats.tx_busy;
6885                 bytes += xdp_ring->stats.bytes;
6886                 packets += xdp_ring->stats.packets;
6887         }
6888         adapter->restart_queue = restart_queue;
6889         adapter->tx_busy = tx_busy;
6890         netdev->stats.tx_bytes = bytes;
6891         netdev->stats.tx_packets = packets;
6892
6893         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6894
6895         /* 8 register reads */
6896         for (i = 0; i < 8; i++) {
6897                 /* for packet buffers not used, the register should read 0 */
6898                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6899                 missed_rx += mpc;
6900                 hwstats->mpc[i] += mpc;
6901                 total_mpc += hwstats->mpc[i];
6902                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6903                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6904                 switch (hw->mac.type) {
6905                 case ixgbe_mac_82598EB:
6906                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6907                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6908                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6909                         hwstats->pxonrxc[i] +=
6910                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6911                         break;
6912                 case ixgbe_mac_82599EB:
6913                 case ixgbe_mac_X540:
6914                 case ixgbe_mac_X550:
6915                 case ixgbe_mac_X550EM_x:
6916                 case ixgbe_mac_x550em_a:
6917                         hwstats->pxonrxc[i] +=
6918                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6919                         break;
6920                 default:
6921                         break;
6922                 }
6923         }
6924
6925         /*16 register reads */
6926         for (i = 0; i < 16; i++) {
6927                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6928                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6929                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6930                     (hw->mac.type == ixgbe_mac_X540) ||
6931                     (hw->mac.type == ixgbe_mac_X550) ||
6932                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6933                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6934                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6935                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6936                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6937                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6938                 }
6939         }
6940
6941         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6942         /* work around hardware counting issue */
6943         hwstats->gprc -= missed_rx;
6944
6945         ixgbe_update_xoff_received(adapter);
6946
6947         /* 82598 hardware only has a 32 bit counter in the high register */
6948         switch (hw->mac.type) {
6949         case ixgbe_mac_82598EB:
6950                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6951                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6952                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6953                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6954                 break;
6955         case ixgbe_mac_X540:
6956         case ixgbe_mac_X550:
6957         case ixgbe_mac_X550EM_x:
6958         case ixgbe_mac_x550em_a:
6959                 /* OS2BMC stats are X540 and later */
6960                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6961                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6962                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6963                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6964                 /* fall through */
6965         case ixgbe_mac_82599EB:
6966                 for (i = 0; i < 16; i++)
6967                         adapter->hw_rx_no_dma_resources +=
6968                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6969                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6970                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6971                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6972                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6973                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6974                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6975                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6976                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6977                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6978 #ifdef IXGBE_FCOE
6979                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6980                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6981                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6982                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6983                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6984                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6985                 /* Add up per cpu counters for total ddp aloc fail */
6986                 if (adapter->fcoe.ddp_pool) {
6987                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6988                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6989                         unsigned int cpu;
6990                         u64 noddp = 0, noddp_ext_buff = 0;
6991                         for_each_possible_cpu(cpu) {
6992                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6993                                 noddp += ddp_pool->noddp;
6994                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6995                         }
6996                         hwstats->fcoe_noddp = noddp;
6997                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6998                 }
6999 #endif /* IXGBE_FCOE */
7000                 break;
7001         default:
7002                 break;
7003         }
7004         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7005         hwstats->bprc += bprc;
7006         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7007         if (hw->mac.type == ixgbe_mac_82598EB)
7008                 hwstats->mprc -= bprc;
7009         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7010         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7011         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7012         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7013         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7014         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7015         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7016         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7017         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7018         hwstats->lxontxc += lxon;
7019         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7020         hwstats->lxofftxc += lxoff;
7021         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7022         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7023         /*
7024          * 82598 errata - tx of flow control packets is included in tx counters
7025          */
7026         xon_off_tot = lxon + lxoff;
7027         hwstats->gptc -= xon_off_tot;
7028         hwstats->mptc -= xon_off_tot;
7029         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7030         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7031         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7032         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7033         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7034         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7035         hwstats->ptc64 -= xon_off_tot;
7036         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7037         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7038         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7039         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7040         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7041         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7042
7043         /* Fill out the OS statistics structure */
7044         netdev->stats.multicast = hwstats->mprc;
7045
7046         /* Rx Errors */
7047         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7048         netdev->stats.rx_dropped = 0;
7049         netdev->stats.rx_length_errors = hwstats->rlec;
7050         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7051         netdev->stats.rx_missed_errors = total_mpc;
7052 }
7053
7054 /**
7055  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7056  * @adapter: pointer to the device adapter structure
7057  **/
7058 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7059 {
7060         struct ixgbe_hw *hw = &adapter->hw;
7061         int i;
7062
7063         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7064                 return;
7065
7066         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7067
7068         /* if interface is down do nothing */
7069         if (test_bit(__IXGBE_DOWN, &adapter->state))
7070                 return;
7071
7072         /* do nothing if we are not using signature filters */
7073         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7074                 return;
7075
7076         adapter->fdir_overflow++;
7077
7078         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7079                 for (i = 0; i < adapter->num_tx_queues; i++)
7080                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7081                                 &(adapter->tx_ring[i]->state));
7082                 for (i = 0; i < adapter->num_xdp_queues; i++)
7083                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7084                                 &adapter->xdp_ring[i]->state);
7085                 /* re-enable flow director interrupts */
7086                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7087         } else {
7088                 e_err(probe, "failed to finish FDIR re-initialization, "
7089                       "ignored adding FDIR ATR filters\n");
7090         }
7091 }
7092
7093 /**
7094  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7095  * @adapter: pointer to the device adapter structure
7096  *
7097  * This function serves two purposes.  First it strobes the interrupt lines
7098  * in order to make certain interrupts are occurring.  Secondly it sets the
7099  * bits needed to check for TX hangs.  As a result we should immediately
7100  * determine if a hang has occurred.
7101  */
7102 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7103 {
7104         struct ixgbe_hw *hw = &adapter->hw;
7105         u64 eics = 0;
7106         int i;
7107
7108         /* If we're down, removing or resetting, just bail */
7109         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7110             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7111             test_bit(__IXGBE_RESETTING, &adapter->state))
7112                 return;
7113
7114         /* Force detection of hung controller */
7115         if (netif_carrier_ok(adapter->netdev)) {
7116                 for (i = 0; i < adapter->num_tx_queues; i++)
7117                         set_check_for_tx_hang(adapter->tx_ring[i]);
7118                 for (i = 0; i < adapter->num_xdp_queues; i++)
7119                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7120         }
7121
7122         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7123                 /*
7124                  * for legacy and MSI interrupts don't set any bits
7125                  * that are enabled for EIAM, because this operation
7126                  * would set *both* EIMS and EICS for any bit in EIAM
7127                  */
7128                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7129                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7130         } else {
7131                 /* get one bit for every active tx/rx interrupt vector */
7132                 for (i = 0; i < adapter->num_q_vectors; i++) {
7133                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7134                         if (qv->rx.ring || qv->tx.ring)
7135                                 eics |= BIT_ULL(i);
7136                 }
7137         }
7138
7139         /* Cause software interrupt to ensure rings are cleaned */
7140         ixgbe_irq_rearm_queues(adapter, eics);
7141 }
7142
7143 /**
7144  * ixgbe_watchdog_update_link - update the link status
7145  * @adapter: pointer to the device adapter structure
7146  **/
7147 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7148 {
7149         struct ixgbe_hw *hw = &adapter->hw;
7150         u32 link_speed = adapter->link_speed;
7151         bool link_up = adapter->link_up;
7152         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7153
7154         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7155                 return;
7156
7157         if (hw->mac.ops.check_link) {
7158                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7159         } else {
7160                 /* always assume link is up, if no check link function */
7161                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7162                 link_up = true;
7163         }
7164
7165         if (adapter->ixgbe_ieee_pfc)
7166                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7167
7168         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7169                 hw->mac.ops.fc_enable(hw);
7170                 ixgbe_set_rx_drop_en(adapter);
7171         }
7172
7173         if (link_up ||
7174             time_after(jiffies, (adapter->link_check_timeout +
7175                                  IXGBE_TRY_LINK_TIMEOUT))) {
7176                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7177                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7178                 IXGBE_WRITE_FLUSH(hw);
7179         }
7180
7181         adapter->link_up = link_up;
7182         adapter->link_speed = link_speed;
7183 }
7184
7185 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7186 {
7187 #ifdef CONFIG_IXGBE_DCB
7188         struct net_device *netdev = adapter->netdev;
7189         struct dcb_app app = {
7190                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7191                               .protocol = 0,
7192                              };
7193         u8 up = 0;
7194
7195         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7196                 up = dcb_ieee_getapp_mask(netdev, &app);
7197
7198         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7199 #endif
7200 }
7201
7202 /**
7203  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7204  *                             print link up message
7205  * @adapter: pointer to the device adapter structure
7206  **/
7207 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7208 {
7209         struct net_device *netdev = adapter->netdev;
7210         struct ixgbe_hw *hw = &adapter->hw;
7211         u32 link_speed = adapter->link_speed;
7212         const char *speed_str;
7213         bool flow_rx, flow_tx;
7214
7215         /* only continue if link was previously down */
7216         if (netif_carrier_ok(netdev))
7217                 return;
7218
7219         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7220
7221         switch (hw->mac.type) {
7222         case ixgbe_mac_82598EB: {
7223                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7224                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7225                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7226                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7227         }
7228                 break;
7229         case ixgbe_mac_X540:
7230         case ixgbe_mac_X550:
7231         case ixgbe_mac_X550EM_x:
7232         case ixgbe_mac_x550em_a:
7233         case ixgbe_mac_82599EB: {
7234                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7235                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7236                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7237                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7238         }
7239                 break;
7240         default:
7241                 flow_tx = false;
7242                 flow_rx = false;
7243                 break;
7244         }
7245
7246         adapter->last_rx_ptp_check = jiffies;
7247
7248         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7249                 ixgbe_ptp_start_cyclecounter(adapter);
7250
7251         switch (link_speed) {
7252         case IXGBE_LINK_SPEED_10GB_FULL:
7253                 speed_str = "10 Gbps";
7254                 break;
7255         case IXGBE_LINK_SPEED_2_5GB_FULL:
7256                 speed_str = "2.5 Gbps";
7257                 break;
7258         case IXGBE_LINK_SPEED_1GB_FULL:
7259                 speed_str = "1 Gbps";
7260                 break;
7261         case IXGBE_LINK_SPEED_100_FULL:
7262                 speed_str = "100 Mbps";
7263                 break;
7264         case IXGBE_LINK_SPEED_10_FULL:
7265                 speed_str = "10 Mbps";
7266                 break;
7267         default:
7268                 speed_str = "unknown speed";
7269                 break;
7270         }
7271         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7272                ((flow_rx && flow_tx) ? "RX/TX" :
7273                (flow_rx ? "RX" :
7274                (flow_tx ? "TX" : "None"))));
7275
7276         netif_carrier_on(netdev);
7277         ixgbe_check_vf_rate_limit(adapter);
7278
7279         /* enable transmits */
7280         netif_tx_wake_all_queues(adapter->netdev);
7281
7282         /* update the default user priority for VFs */
7283         ixgbe_update_default_up(adapter);
7284
7285         /* ping all the active vfs to let them know link has changed */
7286         ixgbe_ping_all_vfs(adapter);
7287 }
7288
7289 /**
7290  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7291  *                               print link down message
7292  * @adapter: pointer to the adapter structure
7293  **/
7294 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7295 {
7296         struct net_device *netdev = adapter->netdev;
7297         struct ixgbe_hw *hw = &adapter->hw;
7298
7299         adapter->link_up = false;
7300         adapter->link_speed = 0;
7301
7302         /* only continue if link was up previously */
7303         if (!netif_carrier_ok(netdev))
7304                 return;
7305
7306         /* poll for SFP+ cable when link is down */
7307         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7308                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7309
7310         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7311                 ixgbe_ptp_start_cyclecounter(adapter);
7312
7313         e_info(drv, "NIC Link is Down\n");
7314         netif_carrier_off(netdev);
7315
7316         /* ping all the active vfs to let them know link has changed */
7317         ixgbe_ping_all_vfs(adapter);
7318 }
7319
7320 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7321 {
7322         int i;
7323
7324         for (i = 0; i < adapter->num_tx_queues; i++) {
7325                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7326
7327                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7328                         return true;
7329         }
7330
7331         for (i = 0; i < adapter->num_xdp_queues; i++) {
7332                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7333
7334                 if (ring->next_to_use != ring->next_to_clean)
7335                         return true;
7336         }
7337
7338         return false;
7339 }
7340
7341 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7342 {
7343         struct ixgbe_hw *hw = &adapter->hw;
7344         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7345         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7346
7347         int i, j;
7348
7349         if (!adapter->num_vfs)
7350                 return false;
7351
7352         /* resetting the PF is only needed for MAC before X550 */
7353         if (hw->mac.type >= ixgbe_mac_X550)
7354                 return false;
7355
7356         for (i = 0; i < adapter->num_vfs; i++) {
7357                 for (j = 0; j < q_per_pool; j++) {
7358                         u32 h, t;
7359
7360                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7361                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7362
7363                         if (h != t)
7364                                 return true;
7365                 }
7366         }
7367
7368         return false;
7369 }
7370
7371 /**
7372  * ixgbe_watchdog_flush_tx - flush queues on link down
7373  * @adapter: pointer to the device adapter structure
7374  **/
7375 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7376 {
7377         if (!netif_carrier_ok(adapter->netdev)) {
7378                 if (ixgbe_ring_tx_pending(adapter) ||
7379                     ixgbe_vf_tx_pending(adapter)) {
7380                         /* We've lost link, so the controller stops DMA,
7381                          * but we've got queued Tx work that's never going
7382                          * to get done, so reset controller to flush Tx.
7383                          * (Do the reset outside of interrupt context).
7384                          */
7385                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7386                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7387                 }
7388         }
7389 }
7390
7391 #ifdef CONFIG_PCI_IOV
7392 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7393 {
7394         struct ixgbe_hw *hw = &adapter->hw;
7395         struct pci_dev *pdev = adapter->pdev;
7396         unsigned int vf;
7397         u32 gpc;
7398
7399         if (!(netif_carrier_ok(adapter->netdev)))
7400                 return;
7401
7402         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7403         if (gpc) /* If incrementing then no need for the check below */
7404                 return;
7405         /* Check to see if a bad DMA write target from an errant or
7406          * malicious VF has caused a PCIe error.  If so then we can
7407          * issue a VFLR to the offending VF(s) and then resume without
7408          * requesting a full slot reset.
7409          */
7410
7411         if (!pdev)
7412                 return;
7413
7414         /* check status reg for all VFs owned by this PF */
7415         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7416                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7417                 u16 status_reg;
7418
7419                 if (!vfdev)
7420                         continue;
7421                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7422                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7423                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7424                         pcie_flr(vfdev);
7425         }
7426 }
7427
7428 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7429 {
7430         u32 ssvpc;
7431
7432         /* Do not perform spoof check for 82598 or if not in IOV mode */
7433         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7434             adapter->num_vfs == 0)
7435                 return;
7436
7437         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7438
7439         /*
7440          * ssvpc register is cleared on read, if zero then no
7441          * spoofed packets in the last interval.
7442          */
7443         if (!ssvpc)
7444                 return;
7445
7446         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7447 }
7448 #else
7449 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7450 {
7451 }
7452
7453 static void
7454 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7455 {
7456 }
7457 #endif /* CONFIG_PCI_IOV */
7458
7459
7460 /**
7461  * ixgbe_watchdog_subtask - check and bring link up
7462  * @adapter: pointer to the device adapter structure
7463  **/
7464 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7465 {
7466         /* if interface is down, removing or resetting, do nothing */
7467         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7468             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7469             test_bit(__IXGBE_RESETTING, &adapter->state))
7470                 return;
7471
7472         ixgbe_watchdog_update_link(adapter);
7473
7474         if (adapter->link_up)
7475                 ixgbe_watchdog_link_is_up(adapter);
7476         else
7477                 ixgbe_watchdog_link_is_down(adapter);
7478
7479         ixgbe_check_for_bad_vf(adapter);
7480         ixgbe_spoof_check(adapter);
7481         ixgbe_update_stats(adapter);
7482
7483         ixgbe_watchdog_flush_tx(adapter);
7484 }
7485
7486 /**
7487  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7488  * @adapter: the ixgbe adapter structure
7489  **/
7490 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7491 {
7492         struct ixgbe_hw *hw = &adapter->hw;
7493         s32 err;
7494
7495         /* not searching for SFP so there is nothing to do here */
7496         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7497             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7498                 return;
7499
7500         if (adapter->sfp_poll_time &&
7501             time_after(adapter->sfp_poll_time, jiffies))
7502                 return; /* If not yet time to poll for SFP */
7503
7504         /* someone else is in init, wait until next service event */
7505         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7506                 return;
7507
7508         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7509
7510         err = hw->phy.ops.identify_sfp(hw);
7511         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7512                 goto sfp_out;
7513
7514         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7515                 /* If no cable is present, then we need to reset
7516                  * the next time we find a good cable. */
7517                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7518         }
7519
7520         /* exit on error */
7521         if (err)
7522                 goto sfp_out;
7523
7524         /* exit if reset not needed */
7525         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7526                 goto sfp_out;
7527
7528         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7529
7530         /*
7531          * A module may be identified correctly, but the EEPROM may not have
7532          * support for that module.  setup_sfp() will fail in that case, so
7533          * we should not allow that module to load.
7534          */
7535         if (hw->mac.type == ixgbe_mac_82598EB)
7536                 err = hw->phy.ops.reset(hw);
7537         else
7538                 err = hw->mac.ops.setup_sfp(hw);
7539
7540         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7541                 goto sfp_out;
7542
7543         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7544         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7545
7546 sfp_out:
7547         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7548
7549         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7550             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7551                 e_dev_err("failed to initialize because an unsupported "
7552                           "SFP+ module type was detected.\n");
7553                 e_dev_err("Reload the driver after installing a "
7554                           "supported module.\n");
7555                 unregister_netdev(adapter->netdev);
7556         }
7557 }
7558
7559 /**
7560  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7561  * @adapter: the ixgbe adapter structure
7562  **/
7563 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7564 {
7565         struct ixgbe_hw *hw = &adapter->hw;
7566         u32 cap_speed;
7567         u32 speed;
7568         bool autoneg = false;
7569
7570         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7571                 return;
7572
7573         /* someone else is in init, wait until next service event */
7574         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7575                 return;
7576
7577         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7578
7579         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7580
7581         /* advertise highest capable link speed */
7582         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7583                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7584         else
7585                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7586                                      IXGBE_LINK_SPEED_1GB_FULL);
7587
7588         if (hw->mac.ops.setup_link)
7589                 hw->mac.ops.setup_link(hw, speed, true);
7590
7591         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7592         adapter->link_check_timeout = jiffies;
7593         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7594 }
7595
7596 /**
7597  * ixgbe_service_timer - Timer Call-back
7598  * @t: pointer to timer_list structure
7599  **/
7600 static void ixgbe_service_timer(struct timer_list *t)
7601 {
7602         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7603         unsigned long next_event_offset;
7604
7605         /* poll faster when waiting for link */
7606         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7607                 next_event_offset = HZ / 10;
7608         else
7609                 next_event_offset = HZ * 2;
7610
7611         /* Reset the timer */
7612         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7613
7614         ixgbe_service_event_schedule(adapter);
7615 }
7616
7617 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7618 {
7619         struct ixgbe_hw *hw = &adapter->hw;
7620         u32 status;
7621
7622         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7623                 return;
7624
7625         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7626
7627         if (!hw->phy.ops.handle_lasi)
7628                 return;
7629
7630         status = hw->phy.ops.handle_lasi(&adapter->hw);
7631         if (status != IXGBE_ERR_OVERTEMP)
7632                 return;
7633
7634         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7635 }
7636
7637 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7638 {
7639         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7640                 return;
7641
7642         /* If we're already down, removing or resetting, just bail */
7643         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7644             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7645             test_bit(__IXGBE_RESETTING, &adapter->state))
7646                 return;
7647
7648         ixgbe_dump(adapter);
7649         netdev_err(adapter->netdev, "Reset adapter\n");
7650         adapter->tx_timeout_count++;
7651
7652         rtnl_lock();
7653         ixgbe_reinit_locked(adapter);
7654         rtnl_unlock();
7655 }
7656
7657 /**
7658  * ixgbe_service_task - manages and runs subtasks
7659  * @work: pointer to work_struct containing our data
7660  **/
7661 static void ixgbe_service_task(struct work_struct *work)
7662 {
7663         struct ixgbe_adapter *adapter = container_of(work,
7664                                                      struct ixgbe_adapter,
7665                                                      service_task);
7666         if (ixgbe_removed(adapter->hw.hw_addr)) {
7667                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7668                         rtnl_lock();
7669                         ixgbe_down(adapter);
7670                         rtnl_unlock();
7671                 }
7672                 ixgbe_service_event_complete(adapter);
7673                 return;
7674         }
7675         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7676                 rtnl_lock();
7677                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7678                 udp_tunnel_get_rx_info(adapter->netdev);
7679                 rtnl_unlock();
7680         }
7681         ixgbe_reset_subtask(adapter);
7682         ixgbe_phy_interrupt_subtask(adapter);
7683         ixgbe_sfp_detection_subtask(adapter);
7684         ixgbe_sfp_link_config_subtask(adapter);
7685         ixgbe_check_overtemp_subtask(adapter);
7686         ixgbe_watchdog_subtask(adapter);
7687         ixgbe_fdir_reinit_subtask(adapter);
7688         ixgbe_check_hang_subtask(adapter);
7689
7690         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7691                 ixgbe_ptp_overflow_check(adapter);
7692                 ixgbe_ptp_rx_hang(adapter);
7693                 ixgbe_ptp_tx_hang(adapter);
7694         }
7695
7696         ixgbe_service_event_complete(adapter);
7697 }
7698
7699 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7700                      struct ixgbe_tx_buffer *first,
7701                      u8 *hdr_len)
7702 {
7703         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7704         struct sk_buff *skb = first->skb;
7705         union {
7706                 struct iphdr *v4;
7707                 struct ipv6hdr *v6;
7708                 unsigned char *hdr;
7709         } ip;
7710         union {
7711                 struct tcphdr *tcp;
7712                 unsigned char *hdr;
7713         } l4;
7714         u32 paylen, l4_offset;
7715         int err;
7716
7717         if (skb->ip_summed != CHECKSUM_PARTIAL)
7718                 return 0;
7719
7720         if (!skb_is_gso(skb))
7721                 return 0;
7722
7723         err = skb_cow_head(skb, 0);
7724         if (err < 0)
7725                 return err;
7726
7727         if (eth_p_mpls(first->protocol))
7728                 ip.hdr = skb_inner_network_header(skb);
7729         else
7730                 ip.hdr = skb_network_header(skb);
7731         l4.hdr = skb_checksum_start(skb);
7732
7733         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7734         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7735
7736         /* initialize outer IP header fields */
7737         if (ip.v4->version == 4) {
7738                 unsigned char *csum_start = skb_checksum_start(skb);
7739                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7740
7741                 /* IP header will have to cancel out any data that
7742                  * is not a part of the outer IP header
7743                  */
7744                 ip.v4->check = csum_fold(csum_partial(trans_start,
7745                                                       csum_start - trans_start,
7746                                                       0));
7747                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7748
7749                 ip.v4->tot_len = 0;
7750                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7751                                    IXGBE_TX_FLAGS_CSUM |
7752                                    IXGBE_TX_FLAGS_IPV4;
7753         } else {
7754                 ip.v6->payload_len = 0;
7755                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7756                                    IXGBE_TX_FLAGS_CSUM;
7757         }
7758
7759         /* determine offset of inner transport header */
7760         l4_offset = l4.hdr - skb->data;
7761
7762         /* compute length of segmentation header */
7763         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7764
7765         /* remove payload length from inner checksum */
7766         paylen = skb->len - l4_offset;
7767         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7768
7769         /* update gso size and bytecount with header size */
7770         first->gso_segs = skb_shinfo(skb)->gso_segs;
7771         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7772
7773         /* mss_l4len_id: use 0 as index for TSO */
7774         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7775         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7776
7777         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7778         vlan_macip_lens = l4.hdr - ip.hdr;
7779         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7780         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7781
7782         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7783                           mss_l4len_idx);
7784
7785         return 1;
7786 }
7787
7788 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7789 {
7790         unsigned int offset = 0;
7791
7792         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7793
7794         return offset == skb_checksum_start_offset(skb);
7795 }
7796
7797 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7798                           struct ixgbe_tx_buffer *first)
7799 {
7800         struct sk_buff *skb = first->skb;
7801         u32 vlan_macip_lens = 0;
7802         u32 type_tucmd = 0;
7803
7804         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7805 csum_failed:
7806                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7807                                          IXGBE_TX_FLAGS_CC)))
7808                         return;
7809                 goto no_csum;
7810         }
7811
7812         switch (skb->csum_offset) {
7813         case offsetof(struct tcphdr, check):
7814                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7815                 /* fall through */
7816         case offsetof(struct udphdr, check):
7817                 break;
7818         case offsetof(struct sctphdr, checksum):
7819                 /* validate that this is actually an SCTP request */
7820                 if (((first->protocol == htons(ETH_P_IP)) &&
7821                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7822                     ((first->protocol == htons(ETH_P_IPV6)) &&
7823                      ixgbe_ipv6_csum_is_sctp(skb))) {
7824                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7825                         break;
7826                 }
7827                 /* fall through */
7828         default:
7829                 skb_checksum_help(skb);
7830                 goto csum_failed;
7831         }
7832
7833         /* update TX checksum flag */
7834         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7835         vlan_macip_lens = skb_checksum_start_offset(skb) -
7836                           skb_network_offset(skb);
7837 no_csum:
7838         /* vlan_macip_lens: MACLEN, VLAN tag */
7839         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7840         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7841
7842         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd, 0);
7843 }
7844
7845 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7846         ((_flag <= _result) ? \
7847          ((u32)(_input & _flag) * (_result / _flag)) : \
7848          ((u32)(_input & _flag) / (_flag / _result)))
7849
7850 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7851 {
7852         /* set type for advanced descriptor with frame checksum insertion */
7853         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7854                        IXGBE_ADVTXD_DCMD_DEXT |
7855                        IXGBE_ADVTXD_DCMD_IFCS;
7856
7857         /* set HW vlan bit if vlan is present */
7858         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7859                                    IXGBE_ADVTXD_DCMD_VLE);
7860
7861         /* set segmentation enable bits for TSO/FSO */
7862         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7863                                    IXGBE_ADVTXD_DCMD_TSE);
7864
7865         /* set timestamp bit if present */
7866         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7867                                    IXGBE_ADVTXD_MAC_TSTAMP);
7868
7869         /* insert frame checksum */
7870         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7871
7872         return cmd_type;
7873 }
7874
7875 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7876                                    u32 tx_flags, unsigned int paylen)
7877 {
7878         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7879
7880         /* enable L4 checksum for TSO and TX checksum offload */
7881         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7882                                         IXGBE_TX_FLAGS_CSUM,
7883                                         IXGBE_ADVTXD_POPTS_TXSM);
7884
7885         /* enble IPv4 checksum for TSO */
7886         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7887                                         IXGBE_TX_FLAGS_IPV4,
7888                                         IXGBE_ADVTXD_POPTS_IXSM);
7889
7890         /*
7891          * Check Context must be set if Tx switch is enabled, which it
7892          * always is for case where virtual functions are running
7893          */
7894         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7895                                         IXGBE_TX_FLAGS_CC,
7896                                         IXGBE_ADVTXD_CC);
7897
7898         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7899 }
7900
7901 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7902 {
7903         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7904
7905         /* Herbert's original patch had:
7906          *  smp_mb__after_netif_stop_queue();
7907          * but since that doesn't exist yet, just open code it.
7908          */
7909         smp_mb();
7910
7911         /* We need to check again in a case another CPU has just
7912          * made room available.
7913          */
7914         if (likely(ixgbe_desc_unused(tx_ring) < size))
7915                 return -EBUSY;
7916
7917         /* A reprieve! - use start_queue because it doesn't call schedule */
7918         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7919         ++tx_ring->tx_stats.restart_queue;
7920         return 0;
7921 }
7922
7923 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7924 {
7925         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7926                 return 0;
7927
7928         return __ixgbe_maybe_stop_tx(tx_ring, size);
7929 }
7930
7931 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7932                        IXGBE_TXD_CMD_RS)
7933
7934 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7935                         struct ixgbe_tx_buffer *first,
7936                         const u8 hdr_len)
7937 {
7938         struct sk_buff *skb = first->skb;
7939         struct ixgbe_tx_buffer *tx_buffer;
7940         union ixgbe_adv_tx_desc *tx_desc;
7941         struct skb_frag_struct *frag;
7942         dma_addr_t dma;
7943         unsigned int data_len, size;
7944         u32 tx_flags = first->tx_flags;
7945         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7946         u16 i = tx_ring->next_to_use;
7947
7948         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7949
7950         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7951
7952         size = skb_headlen(skb);
7953         data_len = skb->data_len;
7954
7955 #ifdef IXGBE_FCOE
7956         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7957                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7958                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7959                         data_len = 0;
7960                 } else {
7961                         data_len -= sizeof(struct fcoe_crc_eof);
7962                 }
7963         }
7964
7965 #endif
7966         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7967
7968         tx_buffer = first;
7969
7970         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7971                 if (dma_mapping_error(tx_ring->dev, dma))
7972                         goto dma_error;
7973
7974                 /* record length, and DMA address */
7975                 dma_unmap_len_set(tx_buffer, len, size);
7976                 dma_unmap_addr_set(tx_buffer, dma, dma);
7977
7978                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7979
7980                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7981                         tx_desc->read.cmd_type_len =
7982                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7983
7984                         i++;
7985                         tx_desc++;
7986                         if (i == tx_ring->count) {
7987                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7988                                 i = 0;
7989                         }
7990                         tx_desc->read.olinfo_status = 0;
7991
7992                         dma += IXGBE_MAX_DATA_PER_TXD;
7993                         size -= IXGBE_MAX_DATA_PER_TXD;
7994
7995                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7996                 }
7997
7998                 if (likely(!data_len))
7999                         break;
8000
8001                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8002
8003                 i++;
8004                 tx_desc++;
8005                 if (i == tx_ring->count) {
8006                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8007                         i = 0;
8008                 }
8009                 tx_desc->read.olinfo_status = 0;
8010
8011 #ifdef IXGBE_FCOE
8012                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8013 #else
8014                 size = skb_frag_size(frag);
8015 #endif
8016                 data_len -= size;
8017
8018                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8019                                        DMA_TO_DEVICE);
8020
8021                 tx_buffer = &tx_ring->tx_buffer_info[i];
8022         }
8023
8024         /* write last descriptor with RS and EOP bits */
8025         cmd_type |= size | IXGBE_TXD_CMD;
8026         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8027
8028         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8029
8030         /* set the timestamp */
8031         first->time_stamp = jiffies;
8032
8033         /*
8034          * Force memory writes to complete before letting h/w know there
8035          * are new descriptors to fetch.  (Only applicable for weak-ordered
8036          * memory model archs, such as IA-64).
8037          *
8038          * We also need this memory barrier to make certain all of the
8039          * status bits have been updated before next_to_watch is written.
8040          */
8041         wmb();
8042
8043         /* set next_to_watch value indicating a packet is present */
8044         first->next_to_watch = tx_desc;
8045
8046         i++;
8047         if (i == tx_ring->count)
8048                 i = 0;
8049
8050         tx_ring->next_to_use = i;
8051
8052         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8053
8054         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8055                 writel(i, tx_ring->tail);
8056
8057                 /* we need this if more than one processor can write to our tail
8058                  * at a time, it synchronizes IO on IA64/Altix systems
8059                  */
8060                 mmiowb();
8061         }
8062
8063         return 0;
8064 dma_error:
8065         dev_err(tx_ring->dev, "TX DMA map failed\n");
8066
8067         /* clear dma mappings for failed tx_buffer_info map */
8068         for (;;) {
8069                 tx_buffer = &tx_ring->tx_buffer_info[i];
8070                 if (dma_unmap_len(tx_buffer, len))
8071                         dma_unmap_page(tx_ring->dev,
8072                                        dma_unmap_addr(tx_buffer, dma),
8073                                        dma_unmap_len(tx_buffer, len),
8074                                        DMA_TO_DEVICE);
8075                 dma_unmap_len_set(tx_buffer, len, 0);
8076                 if (tx_buffer == first)
8077                         break;
8078                 if (i == 0)
8079                         i += tx_ring->count;
8080                 i--;
8081         }
8082
8083         dev_kfree_skb_any(first->skb);
8084         first->skb = NULL;
8085
8086         tx_ring->next_to_use = i;
8087
8088         return -1;
8089 }
8090
8091 static void ixgbe_atr(struct ixgbe_ring *ring,
8092                       struct ixgbe_tx_buffer *first)
8093 {
8094         struct ixgbe_q_vector *q_vector = ring->q_vector;
8095         union ixgbe_atr_hash_dword input = { .dword = 0 };
8096         union ixgbe_atr_hash_dword common = { .dword = 0 };
8097         union {
8098                 unsigned char *network;
8099                 struct iphdr *ipv4;
8100                 struct ipv6hdr *ipv6;
8101         } hdr;
8102         struct tcphdr *th;
8103         unsigned int hlen;
8104         struct sk_buff *skb;
8105         __be16 vlan_id;
8106         int l4_proto;
8107
8108         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8109         if (!q_vector)
8110                 return;
8111
8112         /* do nothing if sampling is disabled */
8113         if (!ring->atr_sample_rate)
8114                 return;
8115
8116         ring->atr_count++;
8117
8118         /* currently only IPv4/IPv6 with TCP is supported */
8119         if ((first->protocol != htons(ETH_P_IP)) &&
8120             (first->protocol != htons(ETH_P_IPV6)))
8121                 return;
8122
8123         /* snag network header to get L4 type and address */
8124         skb = first->skb;
8125         hdr.network = skb_network_header(skb);
8126         if (unlikely(hdr.network <= skb->data))
8127                 return;
8128         if (skb->encapsulation &&
8129             first->protocol == htons(ETH_P_IP) &&
8130             hdr.ipv4->protocol == IPPROTO_UDP) {
8131                 struct ixgbe_adapter *adapter = q_vector->adapter;
8132
8133                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8134                              VXLAN_HEADROOM))
8135                         return;
8136
8137                 /* verify the port is recognized as VXLAN */
8138                 if (adapter->vxlan_port &&
8139                     udp_hdr(skb)->dest == adapter->vxlan_port)
8140                         hdr.network = skb_inner_network_header(skb);
8141
8142                 if (adapter->geneve_port &&
8143                     udp_hdr(skb)->dest == adapter->geneve_port)
8144                         hdr.network = skb_inner_network_header(skb);
8145         }
8146
8147         /* Make sure we have at least [minimum IPv4 header + TCP]
8148          * or [IPv6 header] bytes
8149          */
8150         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8151                 return;
8152
8153         /* Currently only IPv4/IPv6 with TCP is supported */
8154         switch (hdr.ipv4->version) {
8155         case IPVERSION:
8156                 /* access ihl as u8 to avoid unaligned access on ia64 */
8157                 hlen = (hdr.network[0] & 0x0F) << 2;
8158                 l4_proto = hdr.ipv4->protocol;
8159                 break;
8160         case 6:
8161                 hlen = hdr.network - skb->data;
8162                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8163                 hlen -= hdr.network - skb->data;
8164                 break;
8165         default:
8166                 return;
8167         }
8168
8169         if (l4_proto != IPPROTO_TCP)
8170                 return;
8171
8172         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8173                      hlen + sizeof(struct tcphdr)))
8174                 return;
8175
8176         th = (struct tcphdr *)(hdr.network + hlen);
8177
8178         /* skip this packet since the socket is closing */
8179         if (th->fin)
8180                 return;
8181
8182         /* sample on all syn packets or once every atr sample count */
8183         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8184                 return;
8185
8186         /* reset sample count */
8187         ring->atr_count = 0;
8188
8189         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8190
8191         /*
8192          * src and dst are inverted, think how the receiver sees them
8193          *
8194          * The input is broken into two sections, a non-compressed section
8195          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8196          * is XORed together and stored in the compressed dword.
8197          */
8198         input.formatted.vlan_id = vlan_id;
8199
8200         /*
8201          * since src port and flex bytes occupy the same word XOR them together
8202          * and write the value to source port portion of compressed dword
8203          */
8204         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8205                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8206         else
8207                 common.port.src ^= th->dest ^ first->protocol;
8208         common.port.dst ^= th->source;
8209
8210         switch (hdr.ipv4->version) {
8211         case IPVERSION:
8212                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8213                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8214                 break;
8215         case 6:
8216                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8217                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8218                              hdr.ipv6->saddr.s6_addr32[1] ^
8219                              hdr.ipv6->saddr.s6_addr32[2] ^
8220                              hdr.ipv6->saddr.s6_addr32[3] ^
8221                              hdr.ipv6->daddr.s6_addr32[0] ^
8222                              hdr.ipv6->daddr.s6_addr32[1] ^
8223                              hdr.ipv6->daddr.s6_addr32[2] ^
8224                              hdr.ipv6->daddr.s6_addr32[3];
8225                 break;
8226         default:
8227                 break;
8228         }
8229
8230         if (hdr.network != skb_network_header(skb))
8231                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8232
8233         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8234         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8235                                               input, common, ring->queue_index);
8236 }
8237
8238 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8239                               void *accel_priv, select_queue_fallback_t fallback)
8240 {
8241         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8242         struct ixgbe_adapter *adapter;
8243         int txq;
8244 #ifdef IXGBE_FCOE
8245         struct ixgbe_ring_feature *f;
8246 #endif
8247
8248         if (fwd_adapter) {
8249                 adapter = netdev_priv(dev);
8250                 txq = reciprocal_scale(skb_get_hash(skb),
8251                                        adapter->num_rx_queues_per_pool);
8252
8253                 return txq + fwd_adapter->tx_base_queue;
8254         }
8255
8256 #ifdef IXGBE_FCOE
8257
8258         /*
8259          * only execute the code below if protocol is FCoE
8260          * or FIP and we have FCoE enabled on the adapter
8261          */
8262         switch (vlan_get_protocol(skb)) {
8263         case htons(ETH_P_FCOE):
8264         case htons(ETH_P_FIP):
8265                 adapter = netdev_priv(dev);
8266
8267                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8268                         break;
8269                 /* fall through */
8270         default:
8271                 return fallback(dev, skb);
8272         }
8273
8274         f = &adapter->ring_feature[RING_F_FCOE];
8275
8276         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8277                                            smp_processor_id();
8278
8279         while (txq >= f->indices)
8280                 txq -= f->indices;
8281
8282         return txq + f->offset;
8283 #else
8284         return fallback(dev, skb);
8285 #endif
8286 }
8287
8288 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8289                                struct xdp_buff *xdp)
8290 {
8291         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8292         struct ixgbe_tx_buffer *tx_buffer;
8293         union ixgbe_adv_tx_desc *tx_desc;
8294         u32 len, cmd_type;
8295         dma_addr_t dma;
8296         u16 i;
8297
8298         len = xdp->data_end - xdp->data;
8299
8300         if (unlikely(!ixgbe_desc_unused(ring)))
8301                 return IXGBE_XDP_CONSUMED;
8302
8303         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8304         if (dma_mapping_error(ring->dev, dma))
8305                 return IXGBE_XDP_CONSUMED;
8306
8307         /* record the location of the first descriptor for this packet */
8308         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8309         tx_buffer->bytecount = len;
8310         tx_buffer->gso_segs = 1;
8311         tx_buffer->protocol = 0;
8312
8313         i = ring->next_to_use;
8314         tx_desc = IXGBE_TX_DESC(ring, i);
8315
8316         dma_unmap_len_set(tx_buffer, len, len);
8317         dma_unmap_addr_set(tx_buffer, dma, dma);
8318         tx_buffer->data = xdp->data;
8319         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8320
8321         /* put descriptor type bits */
8322         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8323                    IXGBE_ADVTXD_DCMD_DEXT |
8324                    IXGBE_ADVTXD_DCMD_IFCS;
8325         cmd_type |= len | IXGBE_TXD_CMD;
8326         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8327         tx_desc->read.olinfo_status =
8328                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8329
8330         /* Avoid any potential race with xdp_xmit and cleanup */
8331         smp_wmb();
8332
8333         /* set next_to_watch value indicating a packet is present */
8334         i++;
8335         if (i == ring->count)
8336                 i = 0;
8337
8338         tx_buffer->next_to_watch = tx_desc;
8339         ring->next_to_use = i;
8340
8341         return IXGBE_XDP_TX;
8342 }
8343
8344 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8345                           struct ixgbe_adapter *adapter,
8346                           struct ixgbe_ring *tx_ring)
8347 {
8348         struct ixgbe_tx_buffer *first;
8349         int tso;
8350         u32 tx_flags = 0;
8351         unsigned short f;
8352         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8353         __be16 protocol = skb->protocol;
8354         u8 hdr_len = 0;
8355
8356         /*
8357          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8358          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8359          *       + 2 desc gap to keep tail from touching head,
8360          *       + 1 desc for context descriptor,
8361          * otherwise try next time
8362          */
8363         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8364                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8365
8366         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8367                 tx_ring->tx_stats.tx_busy++;
8368                 return NETDEV_TX_BUSY;
8369         }
8370
8371         /* record the location of the first descriptor for this packet */
8372         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8373         first->skb = skb;
8374         first->bytecount = skb->len;
8375         first->gso_segs = 1;
8376
8377         /* if we have a HW VLAN tag being added default to the HW one */
8378         if (skb_vlan_tag_present(skb)) {
8379                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8380                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8381         /* else if it is a SW VLAN check the next protocol and store the tag */
8382         } else if (protocol == htons(ETH_P_8021Q)) {
8383                 struct vlan_hdr *vhdr, _vhdr;
8384                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8385                 if (!vhdr)
8386                         goto out_drop;
8387
8388                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8389                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8390                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8391         }
8392         protocol = vlan_get_protocol(skb);
8393
8394         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8395             adapter->ptp_clock) {
8396                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8397                                            &adapter->state)) {
8398                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8399                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8400
8401                         /* schedule check for Tx timestamp */
8402                         adapter->ptp_tx_skb = skb_get(skb);
8403                         adapter->ptp_tx_start = jiffies;
8404                         schedule_work(&adapter->ptp_tx_work);
8405                 } else {
8406                         adapter->tx_hwtstamp_skipped++;
8407                 }
8408         }
8409
8410         skb_tx_timestamp(skb);
8411
8412 #ifdef CONFIG_PCI_IOV
8413         /*
8414          * Use the l2switch_enable flag - would be false if the DMA
8415          * Tx switch had been disabled.
8416          */
8417         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8418                 tx_flags |= IXGBE_TX_FLAGS_CC;
8419
8420 #endif
8421         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8422         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8423             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8424              (skb->priority != TC_PRIO_CONTROL))) {
8425                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8426                 tx_flags |= (skb->priority & 0x7) <<
8427                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8428                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8429                         struct vlan_ethhdr *vhdr;
8430
8431                         if (skb_cow_head(skb, 0))
8432                                 goto out_drop;
8433                         vhdr = (struct vlan_ethhdr *)skb->data;
8434                         vhdr->h_vlan_TCI = htons(tx_flags >>
8435                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8436                 } else {
8437                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8438                 }
8439         }
8440
8441         /* record initial flags and protocol */
8442         first->tx_flags = tx_flags;
8443         first->protocol = protocol;
8444
8445 #ifdef IXGBE_FCOE
8446         /* setup tx offload for FCoE */
8447         if ((protocol == htons(ETH_P_FCOE)) &&
8448             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8449                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8450                 if (tso < 0)
8451                         goto out_drop;
8452
8453                 goto xmit_fcoe;
8454         }
8455
8456 #endif /* IXGBE_FCOE */
8457         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8458         if (tso < 0)
8459                 goto out_drop;
8460         else if (!tso)
8461                 ixgbe_tx_csum(tx_ring, first);
8462
8463         /* add the ATR filter if ATR is on */
8464         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8465                 ixgbe_atr(tx_ring, first);
8466
8467 #ifdef IXGBE_FCOE
8468 xmit_fcoe:
8469 #endif /* IXGBE_FCOE */
8470         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8471                 goto cleanup_tx_timestamp;
8472
8473         return NETDEV_TX_OK;
8474
8475 out_drop:
8476         dev_kfree_skb_any(first->skb);
8477         first->skb = NULL;
8478 cleanup_tx_timestamp:
8479         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8480                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8481                 adapter->ptp_tx_skb = NULL;
8482                 cancel_work_sync(&adapter->ptp_tx_work);
8483                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8484         }
8485
8486         return NETDEV_TX_OK;
8487 }
8488
8489 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8490                                       struct net_device *netdev,
8491                                       struct ixgbe_ring *ring)
8492 {
8493         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8494         struct ixgbe_ring *tx_ring;
8495
8496         /*
8497          * The minimum packet size for olinfo paylen is 17 so pad the skb
8498          * in order to meet this minimum size requirement.
8499          */
8500         if (skb_put_padto(skb, 17))
8501                 return NETDEV_TX_OK;
8502
8503         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8504
8505         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8506 }
8507
8508 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8509                                     struct net_device *netdev)
8510 {
8511         return __ixgbe_xmit_frame(skb, netdev, NULL);
8512 }
8513
8514 /**
8515  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8516  * @netdev: network interface device structure
8517  * @p: pointer to an address structure
8518  *
8519  * Returns 0 on success, negative on failure
8520  **/
8521 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8522 {
8523         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8524         struct ixgbe_hw *hw = &adapter->hw;
8525         struct sockaddr *addr = p;
8526
8527         if (!is_valid_ether_addr(addr->sa_data))
8528                 return -EADDRNOTAVAIL;
8529
8530         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8531         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8532
8533         ixgbe_mac_set_default_filter(adapter);
8534
8535         return 0;
8536 }
8537
8538 static int
8539 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8540 {
8541         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8542         struct ixgbe_hw *hw = &adapter->hw;
8543         u16 value;
8544         int rc;
8545
8546         if (prtad != hw->phy.mdio.prtad)
8547                 return -EINVAL;
8548         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8549         if (!rc)
8550                 rc = value;
8551         return rc;
8552 }
8553
8554 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8555                             u16 addr, u16 value)
8556 {
8557         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8558         struct ixgbe_hw *hw = &adapter->hw;
8559
8560         if (prtad != hw->phy.mdio.prtad)
8561                 return -EINVAL;
8562         return hw->phy.ops.write_reg(hw, addr, devad, value);
8563 }
8564
8565 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8566 {
8567         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8568
8569         switch (cmd) {
8570         case SIOCSHWTSTAMP:
8571                 return ixgbe_ptp_set_ts_config(adapter, req);
8572         case SIOCGHWTSTAMP:
8573                 return ixgbe_ptp_get_ts_config(adapter, req);
8574         case SIOCGMIIPHY:
8575                 if (!adapter->hw.phy.ops.read_reg)
8576                         return -EOPNOTSUPP;
8577                 /* fall through */
8578         default:
8579                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8580         }
8581 }
8582
8583 /**
8584  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8585  * netdev->dev_addrs
8586  * @dev: network interface device structure
8587  *
8588  * Returns non-zero on failure
8589  **/
8590 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8591 {
8592         int err = 0;
8593         struct ixgbe_adapter *adapter = netdev_priv(dev);
8594         struct ixgbe_hw *hw = &adapter->hw;
8595
8596         if (is_valid_ether_addr(hw->mac.san_addr)) {
8597                 rtnl_lock();
8598                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8599                 rtnl_unlock();
8600
8601                 /* update SAN MAC vmdq pool selection */
8602                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8603         }
8604         return err;
8605 }
8606
8607 /**
8608  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8609  * netdev->dev_addrs
8610  * @dev: network interface device structure
8611  *
8612  * Returns non-zero on failure
8613  **/
8614 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8615 {
8616         int err = 0;
8617         struct ixgbe_adapter *adapter = netdev_priv(dev);
8618         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8619
8620         if (is_valid_ether_addr(mac->san_addr)) {
8621                 rtnl_lock();
8622                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8623                 rtnl_unlock();
8624         }
8625         return err;
8626 }
8627
8628 #ifdef CONFIG_NET_POLL_CONTROLLER
8629 /*
8630  * Polling 'interrupt' - used by things like netconsole to send skbs
8631  * without having to re-enable interrupts. It's not called while
8632  * the interrupt routine is executing.
8633  */
8634 static void ixgbe_netpoll(struct net_device *netdev)
8635 {
8636         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8637         int i;
8638
8639         /* if interface is down do nothing */
8640         if (test_bit(__IXGBE_DOWN, &adapter->state))
8641                 return;
8642
8643         /* loop through and schedule all active queues */
8644         for (i = 0; i < adapter->num_q_vectors; i++)
8645                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8646 }
8647
8648 #endif
8649
8650 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8651                                    struct ixgbe_ring *ring)
8652 {
8653         u64 bytes, packets;
8654         unsigned int start;
8655
8656         if (ring) {
8657                 do {
8658                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8659                         packets = ring->stats.packets;
8660                         bytes   = ring->stats.bytes;
8661                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8662                 stats->tx_packets += packets;
8663                 stats->tx_bytes   += bytes;
8664         }
8665 }
8666
8667 static void ixgbe_get_stats64(struct net_device *netdev,
8668                               struct rtnl_link_stats64 *stats)
8669 {
8670         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8671         int i;
8672
8673         rcu_read_lock();
8674         for (i = 0; i < adapter->num_rx_queues; i++) {
8675                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8676                 u64 bytes, packets;
8677                 unsigned int start;
8678
8679                 if (ring) {
8680                         do {
8681                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8682                                 packets = ring->stats.packets;
8683                                 bytes   = ring->stats.bytes;
8684                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8685                         stats->rx_packets += packets;
8686                         stats->rx_bytes   += bytes;
8687                 }
8688         }
8689
8690         for (i = 0; i < adapter->num_tx_queues; i++) {
8691                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8692
8693                 ixgbe_get_ring_stats64(stats, ring);
8694         }
8695         for (i = 0; i < adapter->num_xdp_queues; i++) {
8696                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8697
8698                 ixgbe_get_ring_stats64(stats, ring);
8699         }
8700         rcu_read_unlock();
8701
8702         /* following stats updated by ixgbe_watchdog_task() */
8703         stats->multicast        = netdev->stats.multicast;
8704         stats->rx_errors        = netdev->stats.rx_errors;
8705         stats->rx_length_errors = netdev->stats.rx_length_errors;
8706         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8707         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8708 }
8709
8710 #ifdef CONFIG_IXGBE_DCB
8711 /**
8712  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8713  * @adapter: pointer to ixgbe_adapter
8714  * @tc: number of traffic classes currently enabled
8715  *
8716  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8717  * 802.1Q priority maps to a packet buffer that exists.
8718  */
8719 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8720 {
8721         struct ixgbe_hw *hw = &adapter->hw;
8722         u32 reg, rsave;
8723         int i;
8724
8725         /* 82598 have a static priority to TC mapping that can not
8726          * be changed so no validation is needed.
8727          */
8728         if (hw->mac.type == ixgbe_mac_82598EB)
8729                 return;
8730
8731         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8732         rsave = reg;
8733
8734         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8735                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8736
8737                 /* If up2tc is out of bounds default to zero */
8738                 if (up2tc > tc)
8739                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8740         }
8741
8742         if (reg != rsave)
8743                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8744
8745         return;
8746 }
8747
8748 /**
8749  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8750  * @adapter: Pointer to adapter struct
8751  *
8752  * Populate the netdev user priority to tc map
8753  */
8754 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8755 {
8756         struct net_device *dev = adapter->netdev;
8757         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8758         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8759         u8 prio;
8760
8761         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8762                 u8 tc = 0;
8763
8764                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8765                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8766                 else if (ets)
8767                         tc = ets->prio_tc[prio];
8768
8769                 netdev_set_prio_tc_map(dev, prio, tc);
8770         }
8771 }
8772
8773 #endif /* CONFIG_IXGBE_DCB */
8774 /**
8775  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8776  *
8777  * @dev: net device to configure
8778  * @tc: number of traffic classes to enable
8779  */
8780 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8781 {
8782         struct ixgbe_adapter *adapter = netdev_priv(dev);
8783         struct ixgbe_hw *hw = &adapter->hw;
8784
8785         /* Hardware supports up to 8 traffic classes */
8786         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8787                 return -EINVAL;
8788
8789         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8790                 return -EINVAL;
8791
8792         /* Hardware has to reinitialize queues and interrupts to
8793          * match packet buffer alignment. Unfortunately, the
8794          * hardware is not flexible enough to do this dynamically.
8795          */
8796         if (netif_running(dev))
8797                 ixgbe_close(dev);
8798         else
8799                 ixgbe_reset(adapter);
8800
8801         ixgbe_clear_interrupt_scheme(adapter);
8802
8803 #ifdef CONFIG_IXGBE_DCB
8804         if (tc) {
8805                 netdev_set_num_tc(dev, tc);
8806                 ixgbe_set_prio_tc_map(adapter);
8807
8808                 adapter->hw_tcs = tc;
8809                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8810
8811                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8812                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8813                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8814                 }
8815         } else {
8816                 netdev_reset_tc(dev);
8817
8818                 /* To support macvlan offload we have to use num_tc to
8819                  * restrict the queues that can be used by the device.
8820                  * By doing this we can avoid reporting a false number of
8821                  * queues.
8822                  */
8823                 if (!tc && adapter->num_rx_pools > 1)
8824                         netdev_set_num_tc(dev, 1);
8825
8826                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8827                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8828
8829                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8830                 adapter->hw_tcs = tc;
8831
8832                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8833                 adapter->dcb_cfg.pfc_mode_enable = false;
8834         }
8835
8836         ixgbe_validate_rtr(adapter, tc);
8837
8838 #endif /* CONFIG_IXGBE_DCB */
8839         ixgbe_init_interrupt_scheme(adapter);
8840
8841         if (netif_running(dev))
8842                 return ixgbe_open(dev);
8843
8844         return 0;
8845 }
8846
8847 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8848                                struct tc_cls_u32_offload *cls)
8849 {
8850         u32 hdl = cls->knode.handle;
8851         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8852         u32 loc = cls->knode.handle & 0xfffff;
8853         int err = 0, i, j;
8854         struct ixgbe_jump_table *jump = NULL;
8855
8856         if (loc > IXGBE_MAX_HW_ENTRIES)
8857                 return -EINVAL;
8858
8859         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8860                 return -EINVAL;
8861
8862         /* Clear this filter in the link data it is associated with */
8863         if (uhtid != 0x800) {
8864                 jump = adapter->jump_tables[uhtid];
8865                 if (!jump)
8866                         return -EINVAL;
8867                 if (!test_bit(loc - 1, jump->child_loc_map))
8868                         return -EINVAL;
8869                 clear_bit(loc - 1, jump->child_loc_map);
8870         }
8871
8872         /* Check if the filter being deleted is a link */
8873         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8874                 jump = adapter->jump_tables[i];
8875                 if (jump && jump->link_hdl == hdl) {
8876                         /* Delete filters in the hardware in the child hash
8877                          * table associated with this link
8878                          */
8879                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8880                                 if (!test_bit(j, jump->child_loc_map))
8881                                         continue;
8882                                 spin_lock(&adapter->fdir_perfect_lock);
8883                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8884                                                                       NULL,
8885                                                                       j + 1);
8886                                 spin_unlock(&adapter->fdir_perfect_lock);
8887                                 clear_bit(j, jump->child_loc_map);
8888                         }
8889                         /* Remove resources for this link */
8890                         kfree(jump->input);
8891                         kfree(jump->mask);
8892                         kfree(jump);
8893                         adapter->jump_tables[i] = NULL;
8894                         return err;
8895                 }
8896         }
8897
8898         spin_lock(&adapter->fdir_perfect_lock);
8899         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8900         spin_unlock(&adapter->fdir_perfect_lock);
8901         return err;
8902 }
8903
8904 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8905                                             struct tc_cls_u32_offload *cls)
8906 {
8907         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8908
8909         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8910                 return -EINVAL;
8911
8912         /* This ixgbe devices do not support hash tables at the moment
8913          * so abort when given hash tables.
8914          */
8915         if (cls->hnode.divisor > 0)
8916                 return -EINVAL;
8917
8918         set_bit(uhtid - 1, &adapter->tables);
8919         return 0;
8920 }
8921
8922 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8923                                             struct tc_cls_u32_offload *cls)
8924 {
8925         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8926
8927         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8928                 return -EINVAL;
8929
8930         clear_bit(uhtid - 1, &adapter->tables);
8931         return 0;
8932 }
8933
8934 #ifdef CONFIG_NET_CLS_ACT
8935 struct upper_walk_data {
8936         struct ixgbe_adapter *adapter;
8937         u64 action;
8938         int ifindex;
8939         u8 queue;
8940 };
8941
8942 static int get_macvlan_queue(struct net_device *upper, void *_data)
8943 {
8944         if (netif_is_macvlan(upper)) {
8945                 struct macvlan_dev *dfwd = netdev_priv(upper);
8946                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8947                 struct upper_walk_data *data = _data;
8948                 struct ixgbe_adapter *adapter = data->adapter;
8949                 int ifindex = data->ifindex;
8950
8951                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8952                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8953                         data->action = data->queue;
8954                         return 1;
8955                 }
8956         }
8957
8958         return 0;
8959 }
8960
8961 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8962                                   u8 *queue, u64 *action)
8963 {
8964         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
8965         unsigned int num_vfs = adapter->num_vfs, vf;
8966         struct upper_walk_data data;
8967         struct net_device *upper;
8968
8969         /* redirect to a SRIOV VF */
8970         for (vf = 0; vf < num_vfs; ++vf) {
8971                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8972                 if (upper->ifindex == ifindex) {
8973                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
8974                         *action = vf + 1;
8975                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
8976                         return 0;
8977                 }
8978         }
8979
8980         /* redirect to a offloaded macvlan netdev */
8981         data.adapter = adapter;
8982         data.ifindex = ifindex;
8983         data.action = 0;
8984         data.queue = 0;
8985         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
8986                                           get_macvlan_queue, &data)) {
8987                 *action = data.action;
8988                 *queue = data.queue;
8989
8990                 return 0;
8991         }
8992
8993         return -EINVAL;
8994 }
8995
8996 static int parse_tc_actions(struct ixgbe_adapter *adapter,
8997                             struct tcf_exts *exts, u64 *action, u8 *queue)
8998 {
8999         const struct tc_action *a;
9000         LIST_HEAD(actions);
9001         int err;
9002
9003         if (!tcf_exts_has_actions(exts))
9004                 return -EINVAL;
9005
9006         tcf_exts_to_list(exts, &actions);
9007         list_for_each_entry(a, &actions, list) {
9008
9009                 /* Drop action */
9010                 if (is_tcf_gact_shot(a)) {
9011                         *action = IXGBE_FDIR_DROP_QUEUE;
9012                         *queue = IXGBE_FDIR_DROP_QUEUE;
9013                         return 0;
9014                 }
9015
9016                 /* Redirect to a VF or a offloaded macvlan */
9017                 if (is_tcf_mirred_egress_redirect(a)) {
9018                         struct net_device *dev = tcf_mirred_dev(a);
9019
9020                         if (!dev)
9021                                 return -EINVAL;
9022                         err = handle_redirect_action(adapter, dev->ifindex, queue,
9023                                                      action);
9024                         if (err == 0)
9025                                 return err;
9026                 }
9027         }
9028
9029         return -EINVAL;
9030 }
9031 #else
9032 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9033                             struct tcf_exts *exts, u64 *action, u8 *queue)
9034 {
9035         return -EINVAL;
9036 }
9037 #endif /* CONFIG_NET_CLS_ACT */
9038
9039 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9040                                     union ixgbe_atr_input *mask,
9041                                     struct tc_cls_u32_offload *cls,
9042                                     struct ixgbe_mat_field *field_ptr,
9043                                     struct ixgbe_nexthdr *nexthdr)
9044 {
9045         int i, j, off;
9046         __be32 val, m;
9047         bool found_entry = false, found_jump_field = false;
9048
9049         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9050                 off = cls->knode.sel->keys[i].off;
9051                 val = cls->knode.sel->keys[i].val;
9052                 m = cls->knode.sel->keys[i].mask;
9053
9054                 for (j = 0; field_ptr[j].val; j++) {
9055                         if (field_ptr[j].off == off) {
9056                                 field_ptr[j].val(input, mask, val, m);
9057                                 input->filter.formatted.flow_type |=
9058                                         field_ptr[j].type;
9059                                 found_entry = true;
9060                                 break;
9061                         }
9062                 }
9063                 if (nexthdr) {
9064                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9065                             nexthdr->val == cls->knode.sel->keys[i].val &&
9066                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9067                                 found_jump_field = true;
9068                         else
9069                                 continue;
9070                 }
9071         }
9072
9073         if (nexthdr && !found_jump_field)
9074                 return -EINVAL;
9075
9076         if (!found_entry)
9077                 return 0;
9078
9079         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9080                                     IXGBE_ATR_L4TYPE_MASK;
9081
9082         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9083                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9084
9085         return 0;
9086 }
9087
9088 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9089                                   struct tc_cls_u32_offload *cls)
9090 {
9091         __be16 protocol = cls->common.protocol;
9092         u32 loc = cls->knode.handle & 0xfffff;
9093         struct ixgbe_hw *hw = &adapter->hw;
9094         struct ixgbe_mat_field *field_ptr;
9095         struct ixgbe_fdir_filter *input = NULL;
9096         union ixgbe_atr_input *mask = NULL;
9097         struct ixgbe_jump_table *jump = NULL;
9098         int i, err = -EINVAL;
9099         u8 queue;
9100         u32 uhtid, link_uhtid;
9101
9102         uhtid = TC_U32_USERHTID(cls->knode.handle);
9103         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9104
9105         /* At the moment cls_u32 jumps to network layer and skips past
9106          * L2 headers. The canonical method to match L2 frames is to use
9107          * negative values. However this is error prone at best but really
9108          * just broken because there is no way to "know" what sort of hdr
9109          * is in front of the network layer. Fix cls_u32 to support L2
9110          * headers when needed.
9111          */
9112         if (protocol != htons(ETH_P_IP))
9113                 return err;
9114
9115         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9116                 e_err(drv, "Location out of range\n");
9117                 return err;
9118         }
9119
9120         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9121          * links and also the fields used to advance the parser across each
9122          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9123          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9124          * To add support for new nodes update ixgbe_model.h parse structures
9125          * this function _should_ be generic try not to hardcode values here.
9126          */
9127         if (uhtid == 0x800) {
9128                 field_ptr = (adapter->jump_tables[0])->mat;
9129         } else {
9130                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9131                         return err;
9132                 if (!adapter->jump_tables[uhtid])
9133                         return err;
9134                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9135         }
9136
9137         if (!field_ptr)
9138                 return err;
9139
9140         /* At this point we know the field_ptr is valid and need to either
9141          * build cls_u32 link or attach filter. Because adding a link to
9142          * a handle that does not exist is invalid and the same for adding
9143          * rules to handles that don't exist.
9144          */
9145
9146         if (link_uhtid) {
9147                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9148
9149                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9150                         return err;
9151
9152                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9153                         return err;
9154
9155                 /* Multiple filters as links to the same hash table are not
9156                  * supported. To add a new filter with the same next header
9157                  * but different match/jump conditions, create a new hash table
9158                  * and link to it.
9159                  */
9160                 if (adapter->jump_tables[link_uhtid] &&
9161                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9162                         e_err(drv, "Link filter exists for link: %x\n",
9163                               link_uhtid);
9164                         return err;
9165                 }
9166
9167                 for (i = 0; nexthdr[i].jump; i++) {
9168                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9169                             nexthdr[i].s != cls->knode.sel->offshift ||
9170                             nexthdr[i].m != cls->knode.sel->offmask)
9171                                 return err;
9172
9173                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9174                         if (!jump)
9175                                 return -ENOMEM;
9176                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9177                         if (!input) {
9178                                 err = -ENOMEM;
9179                                 goto free_jump;
9180                         }
9181                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9182                         if (!mask) {
9183                                 err = -ENOMEM;
9184                                 goto free_input;
9185                         }
9186                         jump->input = input;
9187                         jump->mask = mask;
9188                         jump->link_hdl = cls->knode.handle;
9189
9190                         err = ixgbe_clsu32_build_input(input, mask, cls,
9191                                                        field_ptr, &nexthdr[i]);
9192                         if (!err) {
9193                                 jump->mat = nexthdr[i].jump;
9194                                 adapter->jump_tables[link_uhtid] = jump;
9195                                 break;
9196                         }
9197                 }
9198                 return 0;
9199         }
9200
9201         input = kzalloc(sizeof(*input), GFP_KERNEL);
9202         if (!input)
9203                 return -ENOMEM;
9204         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9205         if (!mask) {
9206                 err = -ENOMEM;
9207                 goto free_input;
9208         }
9209
9210         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9211                 if ((adapter->jump_tables[uhtid])->input)
9212                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9213                                sizeof(*input));
9214                 if ((adapter->jump_tables[uhtid])->mask)
9215                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9216                                sizeof(*mask));
9217
9218                 /* Lookup in all child hash tables if this location is already
9219                  * filled with a filter
9220                  */
9221                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9222                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9223
9224                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9225                                 e_err(drv, "Filter exists in location: %x\n",
9226                                       loc);
9227                                 err = -EINVAL;
9228                                 goto err_out;
9229                         }
9230                 }
9231         }
9232         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9233         if (err)
9234                 goto err_out;
9235
9236         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9237                                &queue);
9238         if (err < 0)
9239                 goto err_out;
9240
9241         input->sw_idx = loc;
9242
9243         spin_lock(&adapter->fdir_perfect_lock);
9244
9245         if (hlist_empty(&adapter->fdir_filter_list)) {
9246                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9247                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9248                 if (err)
9249                         goto err_out_w_lock;
9250         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9251                 err = -EINVAL;
9252                 goto err_out_w_lock;
9253         }
9254
9255         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9256         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9257                                                     input->sw_idx, queue);
9258         if (!err)
9259                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9260         spin_unlock(&adapter->fdir_perfect_lock);
9261
9262         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9263                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9264
9265         kfree(mask);
9266         return err;
9267 err_out_w_lock:
9268         spin_unlock(&adapter->fdir_perfect_lock);
9269 err_out:
9270         kfree(mask);
9271 free_input:
9272         kfree(input);
9273 free_jump:
9274         kfree(jump);
9275         return err;
9276 }
9277
9278 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9279                                   struct tc_cls_u32_offload *cls_u32)
9280 {
9281         if (cls_u32->common.chain_index)
9282                 return -EOPNOTSUPP;
9283
9284         switch (cls_u32->command) {
9285         case TC_CLSU32_NEW_KNODE:
9286         case TC_CLSU32_REPLACE_KNODE:
9287                 return ixgbe_configure_clsu32(adapter, cls_u32);
9288         case TC_CLSU32_DELETE_KNODE:
9289                 return ixgbe_delete_clsu32(adapter, cls_u32);
9290         case TC_CLSU32_NEW_HNODE:
9291         case TC_CLSU32_REPLACE_HNODE:
9292                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9293         case TC_CLSU32_DELETE_HNODE:
9294                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9295         default:
9296                 return -EOPNOTSUPP;
9297         }
9298 }
9299
9300 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9301                                    void *cb_priv)
9302 {
9303         struct ixgbe_adapter *adapter = cb_priv;
9304
9305         if (!tc_can_offload(adapter->netdev))
9306                 return -EOPNOTSUPP;
9307
9308         switch (type) {
9309         case TC_SETUP_CLSU32:
9310                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9311         default:
9312                 return -EOPNOTSUPP;
9313         }
9314 }
9315
9316 static int ixgbe_setup_tc_block(struct net_device *dev,
9317                                 struct tc_block_offload *f)
9318 {
9319         struct ixgbe_adapter *adapter = netdev_priv(dev);
9320
9321         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9322                 return -EOPNOTSUPP;
9323
9324         switch (f->command) {
9325         case TC_BLOCK_BIND:
9326                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9327                                              adapter, adapter);
9328         case TC_BLOCK_UNBIND:
9329                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9330                                         adapter);
9331                 return 0;
9332         default:
9333                 return -EOPNOTSUPP;
9334         }
9335 }
9336
9337 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9338                                  struct tc_mqprio_qopt *mqprio)
9339 {
9340         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9341         return ixgbe_setup_tc(dev, mqprio->num_tc);
9342 }
9343
9344 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9345                             void *type_data)
9346 {
9347         switch (type) {
9348         case TC_SETUP_BLOCK:
9349                 return ixgbe_setup_tc_block(dev, type_data);
9350         case TC_SETUP_QDISC_MQPRIO:
9351                 return ixgbe_setup_tc_mqprio(dev, type_data);
9352         default:
9353                 return -EOPNOTSUPP;
9354         }
9355 }
9356
9357 #ifdef CONFIG_PCI_IOV
9358 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9359 {
9360         struct net_device *netdev = adapter->netdev;
9361
9362         rtnl_lock();
9363         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9364         rtnl_unlock();
9365 }
9366
9367 #endif
9368 void ixgbe_do_reset(struct net_device *netdev)
9369 {
9370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9371
9372         if (netif_running(netdev))
9373                 ixgbe_reinit_locked(adapter);
9374         else
9375                 ixgbe_reset(adapter);
9376 }
9377
9378 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9379                                             netdev_features_t features)
9380 {
9381         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9382
9383         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9384         if (!(features & NETIF_F_RXCSUM))
9385                 features &= ~NETIF_F_LRO;
9386
9387         /* Turn off LRO if not RSC capable */
9388         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9389                 features &= ~NETIF_F_LRO;
9390
9391         return features;
9392 }
9393
9394 static int ixgbe_set_features(struct net_device *netdev,
9395                               netdev_features_t features)
9396 {
9397         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9398         netdev_features_t changed = netdev->features ^ features;
9399         bool need_reset = false;
9400
9401         /* Make sure RSC matches LRO, reset if change */
9402         if (!(features & NETIF_F_LRO)) {
9403                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9404                         need_reset = true;
9405                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9406         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9407                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9408                 if (adapter->rx_itr_setting == 1 ||
9409                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9410                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9411                         need_reset = true;
9412                 } else if ((changed ^ features) & NETIF_F_LRO) {
9413                         e_info(probe, "rx-usecs set too low, "
9414                                "disabling RSC\n");
9415                 }
9416         }
9417
9418         /*
9419          * Check if Flow Director n-tuple support or hw_tc support was
9420          * enabled or disabled.  If the state changed, we need to reset.
9421          */
9422         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9423                 /* turn off ATR, enable perfect filters and reset */
9424                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9425                         need_reset = true;
9426
9427                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9428                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9429         } else {
9430                 /* turn off perfect filters, enable ATR and reset */
9431                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9432                         need_reset = true;
9433
9434                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9435
9436                 /* We cannot enable ATR if SR-IOV is enabled */
9437                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9438                     /* We cannot enable ATR if we have 2 or more tcs */
9439                     (adapter->hw_tcs > 1) ||
9440                     /* We cannot enable ATR if RSS is disabled */
9441                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9442                     /* A sample rate of 0 indicates ATR disabled */
9443                     (!adapter->atr_sample_rate))
9444                         ; /* do nothing not supported */
9445                 else /* otherwise supported and set the flag */
9446                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9447         }
9448
9449         if (changed & NETIF_F_RXALL)
9450                 need_reset = true;
9451
9452         netdev->features = features;
9453
9454         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9455                 if (features & NETIF_F_RXCSUM) {
9456                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9457                 } else {
9458                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9459
9460                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9461                 }
9462         }
9463
9464         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9465                 if (features & NETIF_F_RXCSUM) {
9466                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9467                 } else {
9468                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9469
9470                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9471                 }
9472         }
9473
9474         if (need_reset)
9475                 ixgbe_do_reset(netdev);
9476         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9477                             NETIF_F_HW_VLAN_CTAG_FILTER))
9478                 ixgbe_set_rx_mode(netdev);
9479
9480         return 0;
9481 }
9482
9483 /**
9484  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9485  * @dev: The port's netdev
9486  * @ti: Tunnel endpoint information
9487  **/
9488 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9489                                       struct udp_tunnel_info *ti)
9490 {
9491         struct ixgbe_adapter *adapter = netdev_priv(dev);
9492         struct ixgbe_hw *hw = &adapter->hw;
9493         __be16 port = ti->port;
9494         u32 port_shift = 0;
9495         u32 reg;
9496
9497         if (ti->sa_family != AF_INET)
9498                 return;
9499
9500         switch (ti->type) {
9501         case UDP_TUNNEL_TYPE_VXLAN:
9502                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9503                         return;
9504
9505                 if (adapter->vxlan_port == port)
9506                         return;
9507
9508                 if (adapter->vxlan_port) {
9509                         netdev_info(dev,
9510                                     "VXLAN port %d set, not adding port %d\n",
9511                                     ntohs(adapter->vxlan_port),
9512                                     ntohs(port));
9513                         return;
9514                 }
9515
9516                 adapter->vxlan_port = port;
9517                 break;
9518         case UDP_TUNNEL_TYPE_GENEVE:
9519                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9520                         return;
9521
9522                 if (adapter->geneve_port == port)
9523                         return;
9524
9525                 if (adapter->geneve_port) {
9526                         netdev_info(dev,
9527                                     "GENEVE port %d set, not adding port %d\n",
9528                                     ntohs(adapter->geneve_port),
9529                                     ntohs(port));
9530                         return;
9531                 }
9532
9533                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9534                 adapter->geneve_port = port;
9535                 break;
9536         default:
9537                 return;
9538         }
9539
9540         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9541         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9542 }
9543
9544 /**
9545  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9546  * @dev: The port's netdev
9547  * @ti: Tunnel endpoint information
9548  **/
9549 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9550                                       struct udp_tunnel_info *ti)
9551 {
9552         struct ixgbe_adapter *adapter = netdev_priv(dev);
9553         u32 port_mask;
9554
9555         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9556             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9557                 return;
9558
9559         if (ti->sa_family != AF_INET)
9560                 return;
9561
9562         switch (ti->type) {
9563         case UDP_TUNNEL_TYPE_VXLAN:
9564                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9565                         return;
9566
9567                 if (adapter->vxlan_port != ti->port) {
9568                         netdev_info(dev, "VXLAN port %d not found\n",
9569                                     ntohs(ti->port));
9570                         return;
9571                 }
9572
9573                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9574                 break;
9575         case UDP_TUNNEL_TYPE_GENEVE:
9576                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9577                         return;
9578
9579                 if (adapter->geneve_port != ti->port) {
9580                         netdev_info(dev, "GENEVE port %d not found\n",
9581                                     ntohs(ti->port));
9582                         return;
9583                 }
9584
9585                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9586                 break;
9587         default:
9588                 return;
9589         }
9590
9591         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9592         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9593 }
9594
9595 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9596                              struct net_device *dev,
9597                              const unsigned char *addr, u16 vid,
9598                              u16 flags)
9599 {
9600         /* guarantee we can provide a unique filter for the unicast address */
9601         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9602                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9603                 u16 pool = VMDQ_P(0);
9604
9605                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9606                         return -ENOMEM;
9607         }
9608
9609         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9610 }
9611
9612 /**
9613  * ixgbe_configure_bridge_mode - set various bridge modes
9614  * @adapter: the private structure
9615  * @mode: requested bridge mode
9616  *
9617  * Configure some settings require for various bridge modes.
9618  **/
9619 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9620                                        __u16 mode)
9621 {
9622         struct ixgbe_hw *hw = &adapter->hw;
9623         unsigned int p, num_pools;
9624         u32 vmdctl;
9625
9626         switch (mode) {
9627         case BRIDGE_MODE_VEPA:
9628                 /* disable Tx loopback, rely on switch hairpin mode */
9629                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9630
9631                 /* must enable Rx switching replication to allow multicast
9632                  * packet reception on all VFs, and to enable source address
9633                  * pruning.
9634                  */
9635                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9636                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9637                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9638
9639                 /* enable Rx source address pruning. Note, this requires
9640                  * replication to be enabled or else it does nothing.
9641                  */
9642                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9643                 for (p = 0; p < num_pools; p++) {
9644                         if (hw->mac.ops.set_source_address_pruning)
9645                                 hw->mac.ops.set_source_address_pruning(hw,
9646                                                                        true,
9647                                                                        p);
9648                 }
9649                 break;
9650         case BRIDGE_MODE_VEB:
9651                 /* enable Tx loopback for internal VF/PF communication */
9652                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9653                                 IXGBE_PFDTXGSWC_VT_LBEN);
9654
9655                 /* disable Rx switching replication unless we have SR-IOV
9656                  * virtual functions
9657                  */
9658                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9659                 if (!adapter->num_vfs)
9660                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9661                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9662
9663                 /* disable Rx source address pruning, since we don't expect to
9664                  * be receiving external loopback of our transmitted frames.
9665                  */
9666                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9667                 for (p = 0; p < num_pools; p++) {
9668                         if (hw->mac.ops.set_source_address_pruning)
9669                                 hw->mac.ops.set_source_address_pruning(hw,
9670                                                                        false,
9671                                                                        p);
9672                 }
9673                 break;
9674         default:
9675                 return -EINVAL;
9676         }
9677
9678         adapter->bridge_mode = mode;
9679
9680         e_info(drv, "enabling bridge mode: %s\n",
9681                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9682
9683         return 0;
9684 }
9685
9686 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9687                                     struct nlmsghdr *nlh, u16 flags)
9688 {
9689         struct ixgbe_adapter *adapter = netdev_priv(dev);
9690         struct nlattr *attr, *br_spec;
9691         int rem;
9692
9693         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9694                 return -EOPNOTSUPP;
9695
9696         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9697         if (!br_spec)
9698                 return -EINVAL;
9699
9700         nla_for_each_nested(attr, br_spec, rem) {
9701                 int status;
9702                 __u16 mode;
9703
9704                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9705                         continue;
9706
9707                 if (nla_len(attr) < sizeof(mode))
9708                         return -EINVAL;
9709
9710                 mode = nla_get_u16(attr);
9711                 status = ixgbe_configure_bridge_mode(adapter, mode);
9712                 if (status)
9713                         return status;
9714
9715                 break;
9716         }
9717
9718         return 0;
9719 }
9720
9721 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9722                                     struct net_device *dev,
9723                                     u32 filter_mask, int nlflags)
9724 {
9725         struct ixgbe_adapter *adapter = netdev_priv(dev);
9726
9727         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9728                 return 0;
9729
9730         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9731                                        adapter->bridge_mode, 0, 0, nlflags,
9732                                        filter_mask, NULL);
9733 }
9734
9735 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9736 {
9737         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9738         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9739         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9740         int tcs = adapter->hw_tcs ? : 1;
9741         unsigned int limit;
9742         int pool, err;
9743
9744         /* Hardware has a limited number of available pools. Each VF, and the
9745          * PF require a pool. Check to ensure we don't attempt to use more
9746          * then the available number of pools.
9747          */
9748         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9749                 return ERR_PTR(-EINVAL);
9750
9751         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9752               adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9753             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9754                 return ERR_PTR(-EBUSY);
9755
9756         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9757         if (!fwd_adapter)
9758                 return ERR_PTR(-ENOMEM);
9759
9760         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9761         set_bit(pool, adapter->fwd_bitmask);
9762         limit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools + 1);
9763
9764         /* Enable VMDq flag so device will be set in VM mode */
9765         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9766         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9767
9768         fwd_adapter->pool = pool;
9769         fwd_adapter->real_adapter = adapter;
9770
9771         /* Force reinit of ring allocation with VMDQ enabled */
9772         err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
9773
9774         if (!err && netif_running(pdev))
9775                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9776
9777         if (!err)
9778                 return fwd_adapter;
9779
9780         /* unwind counter and free adapter struct */
9781         netdev_info(pdev,
9782                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9783         clear_bit(pool, adapter->fwd_bitmask);
9784         kfree(fwd_adapter);
9785         return ERR_PTR(err);
9786 }
9787
9788 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9789 {
9790         struct ixgbe_fwd_adapter *accel = priv;
9791         struct ixgbe_adapter *adapter = accel->real_adapter;
9792         unsigned int rxbase = accel->rx_base_queue;
9793         unsigned int limit, i;
9794
9795         /* delete unicast filter associated with offloaded interface */
9796         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
9797                              VMDQ_P(accel->pool));
9798
9799         /* disable ability to receive packets for this pool */
9800         IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(accel->pool), 0);
9801
9802         /* Allow remaining Rx packets to get flushed out of the
9803          * Rx FIFO before we drop the netdev for the ring.
9804          */
9805         usleep_range(10000, 20000);
9806
9807         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
9808                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
9809                 struct ixgbe_q_vector *qv = ring->q_vector;
9810
9811                 /* Make sure we aren't processing any packets and clear
9812                  * netdev to shut down the ring.
9813                  */
9814                 if (netif_running(adapter->netdev))
9815                         napi_synchronize(&qv->napi);
9816                 ring->netdev = NULL;
9817         }
9818
9819         clear_bit(accel->pool, adapter->fwd_bitmask);
9820         limit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9821         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9822
9823         /* go back to full RSS if we're done with our VMQs */
9824         if (adapter->ring_feature[RING_F_VMDQ].limit == 1) {
9825                 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9826                                 num_online_cpus());
9827
9828                 adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED;
9829                 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
9830                 adapter->ring_feature[RING_F_RSS].limit = rss;
9831         }
9832
9833         ixgbe_setup_tc(pdev, adapter->hw_tcs);
9834         netdev_dbg(pdev, "pool %i:%i queues %i:%i\n",
9835                    accel->pool, adapter->num_rx_pools,
9836                    accel->rx_base_queue,
9837                    accel->rx_base_queue +
9838                    adapter->num_rx_queues_per_pool);
9839         kfree(accel);
9840 }
9841
9842 #define IXGBE_MAX_MAC_HDR_LEN           127
9843 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9844
9845 static netdev_features_t
9846 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9847                      netdev_features_t features)
9848 {
9849         unsigned int network_hdr_len, mac_hdr_len;
9850
9851         /* Make certain the headers can be described by a context descriptor */
9852         mac_hdr_len = skb_network_header(skb) - skb->data;
9853         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9854                 return features & ~(NETIF_F_HW_CSUM |
9855                                     NETIF_F_SCTP_CRC |
9856                                     NETIF_F_HW_VLAN_CTAG_TX |
9857                                     NETIF_F_TSO |
9858                                     NETIF_F_TSO6);
9859
9860         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9861         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9862                 return features & ~(NETIF_F_HW_CSUM |
9863                                     NETIF_F_SCTP_CRC |
9864                                     NETIF_F_TSO |
9865                                     NETIF_F_TSO6);
9866
9867         /* We can only support IPV4 TSO in tunnels if we can mangle the
9868          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9869          */
9870         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9871                 features &= ~NETIF_F_TSO;
9872
9873         return features;
9874 }
9875
9876 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9877 {
9878         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9879         struct ixgbe_adapter *adapter = netdev_priv(dev);
9880         struct bpf_prog *old_prog;
9881
9882         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9883                 return -EINVAL;
9884
9885         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9886                 return -EINVAL;
9887
9888         /* verify ixgbe ring attributes are sufficient for XDP */
9889         for (i = 0; i < adapter->num_rx_queues; i++) {
9890                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9891
9892                 if (ring_is_rsc_enabled(ring))
9893                         return -EINVAL;
9894
9895                 if (frame_size > ixgbe_rx_bufsz(ring))
9896                         return -EINVAL;
9897         }
9898
9899         if (nr_cpu_ids > MAX_XDP_QUEUES)
9900                 return -ENOMEM;
9901
9902         old_prog = xchg(&adapter->xdp_prog, prog);
9903
9904         /* If transitioning XDP modes reconfigure rings */
9905         if (!!prog != !!old_prog) {
9906                 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
9907
9908                 if (err) {
9909                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9910                         return -EINVAL;
9911                 }
9912         } else {
9913                 for (i = 0; i < adapter->num_rx_queues; i++)
9914                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9915         }
9916
9917         if (old_prog)
9918                 bpf_prog_put(old_prog);
9919
9920         return 0;
9921 }
9922
9923 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
9924 {
9925         struct ixgbe_adapter *adapter = netdev_priv(dev);
9926
9927         switch (xdp->command) {
9928         case XDP_SETUP_PROG:
9929                 return ixgbe_xdp_setup(dev, xdp->prog);
9930         case XDP_QUERY_PROG:
9931                 xdp->prog_attached = !!(adapter->xdp_prog);
9932                 xdp->prog_id = adapter->xdp_prog ?
9933                         adapter->xdp_prog->aux->id : 0;
9934                 return 0;
9935         default:
9936                 return -EINVAL;
9937         }
9938 }
9939
9940 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
9941 {
9942         struct ixgbe_adapter *adapter = netdev_priv(dev);
9943         struct ixgbe_ring *ring;
9944         int err;
9945
9946         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9947                 return -ENETDOWN;
9948
9949         /* During program transitions its possible adapter->xdp_prog is assigned
9950          * but ring has not been configured yet. In this case simply abort xmit.
9951          */
9952         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9953         if (unlikely(!ring))
9954                 return -ENXIO;
9955
9956         err = ixgbe_xmit_xdp_ring(adapter, xdp);
9957         if (err != IXGBE_XDP_TX)
9958                 return -ENOSPC;
9959
9960         return 0;
9961 }
9962
9963 static void ixgbe_xdp_flush(struct net_device *dev)
9964 {
9965         struct ixgbe_adapter *adapter = netdev_priv(dev);
9966         struct ixgbe_ring *ring;
9967
9968         /* Its possible the device went down between xdp xmit and flush so
9969          * we need to ensure device is still up.
9970          */
9971         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9972                 return;
9973
9974         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9975         if (unlikely(!ring))
9976                 return;
9977
9978         /* Force memory writes to complete before letting h/w know there
9979          * are new descriptors to fetch.
9980          */
9981         wmb();
9982         writel(ring->next_to_use, ring->tail);
9983
9984         return;
9985 }
9986
9987 static const struct net_device_ops ixgbe_netdev_ops = {
9988         .ndo_open               = ixgbe_open,
9989         .ndo_stop               = ixgbe_close,
9990         .ndo_start_xmit         = ixgbe_xmit_frame,
9991         .ndo_select_queue       = ixgbe_select_queue,
9992         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
9993         .ndo_validate_addr      = eth_validate_addr,
9994         .ndo_set_mac_address    = ixgbe_set_mac,
9995         .ndo_change_mtu         = ixgbe_change_mtu,
9996         .ndo_tx_timeout         = ixgbe_tx_timeout,
9997         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
9998         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
9999         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10000         .ndo_do_ioctl           = ixgbe_ioctl,
10001         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10002         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10003         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10004         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10005         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10006         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10007         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10008         .ndo_get_stats64        = ixgbe_get_stats64,
10009         .ndo_setup_tc           = __ixgbe_setup_tc,
10010 #ifdef CONFIG_NET_POLL_CONTROLLER
10011         .ndo_poll_controller    = ixgbe_netpoll,
10012 #endif
10013 #ifdef IXGBE_FCOE
10014         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10015         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10016         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10017         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10018         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10019         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10020         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10021 #endif /* IXGBE_FCOE */
10022         .ndo_set_features = ixgbe_set_features,
10023         .ndo_fix_features = ixgbe_fix_features,
10024         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10025         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10026         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10027         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10028         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10029         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10030         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10031         .ndo_features_check     = ixgbe_features_check,
10032         .ndo_bpf                = ixgbe_xdp,
10033         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10034         .ndo_xdp_flush          = ixgbe_xdp_flush,
10035 };
10036
10037 /**
10038  * ixgbe_enumerate_functions - Get the number of ports this device has
10039  * @adapter: adapter structure
10040  *
10041  * This function enumerates the phsyical functions co-located on a single slot,
10042  * in order to determine how many ports a device has. This is most useful in
10043  * determining the required GT/s of PCIe bandwidth necessary for optimal
10044  * performance.
10045  **/
10046 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10047 {
10048         struct pci_dev *entry, *pdev = adapter->pdev;
10049         int physfns = 0;
10050
10051         /* Some cards can not use the generic count PCIe functions method,
10052          * because they are behind a parent switch, so we hardcode these with
10053          * the correct number of functions.
10054          */
10055         if (ixgbe_pcie_from_parent(&adapter->hw))
10056                 physfns = 4;
10057
10058         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10059                 /* don't count virtual functions */
10060                 if (entry->is_virtfn)
10061                         continue;
10062
10063                 /* When the devices on the bus don't all match our device ID,
10064                  * we can't reliably determine the correct number of
10065                  * functions. This can occur if a function has been direct
10066                  * attached to a virtual machine using VT-d, for example. In
10067                  * this case, simply return -1 to indicate this.
10068                  */
10069                 if ((entry->vendor != pdev->vendor) ||
10070                     (entry->device != pdev->device))
10071                         return -1;
10072
10073                 physfns++;
10074         }
10075
10076         return physfns;
10077 }
10078
10079 /**
10080  * ixgbe_wol_supported - Check whether device supports WoL
10081  * @adapter: the adapter private structure
10082  * @device_id: the device ID
10083  * @subdevice_id: the subsystem device ID
10084  *
10085  * This function is used by probe and ethtool to determine
10086  * which devices have WoL support
10087  *
10088  **/
10089 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10090                          u16 subdevice_id)
10091 {
10092         struct ixgbe_hw *hw = &adapter->hw;
10093         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10094
10095         /* WOL not supported on 82598 */
10096         if (hw->mac.type == ixgbe_mac_82598EB)
10097                 return false;
10098
10099         /* check eeprom to see if WOL is enabled for X540 and newer */
10100         if (hw->mac.type >= ixgbe_mac_X540) {
10101                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10102                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10103                      (hw->bus.func == 0)))
10104                         return true;
10105         }
10106
10107         /* WOL is determined based on device IDs for 82599 MACs */
10108         switch (device_id) {
10109         case IXGBE_DEV_ID_82599_SFP:
10110                 /* Only these subdevices could supports WOL */
10111                 switch (subdevice_id) {
10112                 case IXGBE_SUBDEV_ID_82599_560FLR:
10113                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10114                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10115                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10116                         /* only support first port */
10117                         if (hw->bus.func != 0)
10118                                 break;
10119                         /* fall through */
10120                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10121                 case IXGBE_SUBDEV_ID_82599_SFP:
10122                 case IXGBE_SUBDEV_ID_82599_RNDC:
10123                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10124                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10125                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10126                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10127                         return true;
10128                 }
10129                 break;
10130         case IXGBE_DEV_ID_82599EN_SFP:
10131                 /* Only these subdevices support WOL */
10132                 switch (subdevice_id) {
10133                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10134                         return true;
10135                 }
10136                 break;
10137         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10138                 /* All except this subdevice support WOL */
10139                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10140                         return true;
10141                 break;
10142         case IXGBE_DEV_ID_82599_KX4:
10143                 return  true;
10144         default:
10145                 break;
10146         }
10147
10148         return false;
10149 }
10150
10151 /**
10152  * ixgbe_set_fw_version - Set FW version
10153  * @adapter: the adapter private structure
10154  *
10155  * This function is used by probe and ethtool to determine the FW version to
10156  * format to display. The FW version is taken from the EEPROM/NVM.
10157  */
10158 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10159 {
10160         struct ixgbe_hw *hw = &adapter->hw;
10161         struct ixgbe_nvm_version nvm_ver;
10162
10163         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10164         if (nvm_ver.oem_valid) {
10165                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10166                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10167                          nvm_ver.oem_release);
10168                 return;
10169         }
10170
10171         ixgbe_get_etk_id(hw, &nvm_ver);
10172         ixgbe_get_orom_version(hw, &nvm_ver);
10173
10174         if (nvm_ver.or_valid) {
10175                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10176                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10177                          nvm_ver.or_build, nvm_ver.or_patch);
10178                 return;
10179         }
10180
10181         /* Set ETrack ID format */
10182         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10183                  "0x%08x", nvm_ver.etk_id);
10184 }
10185
10186 /**
10187  * ixgbe_probe - Device Initialization Routine
10188  * @pdev: PCI device information struct
10189  * @ent: entry in ixgbe_pci_tbl
10190  *
10191  * Returns 0 on success, negative on failure
10192  *
10193  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10194  * The OS initialization, configuring of the adapter private structure,
10195  * and a hardware reset occur.
10196  **/
10197 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10198 {
10199         struct net_device *netdev;
10200         struct ixgbe_adapter *adapter = NULL;
10201         struct ixgbe_hw *hw;
10202         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10203         int i, err, pci_using_dac, expected_gts;
10204         unsigned int indices = MAX_TX_QUEUES;
10205         u8 part_str[IXGBE_PBANUM_LENGTH];
10206         bool disable_dev = false;
10207 #ifdef IXGBE_FCOE
10208         u16 device_caps;
10209 #endif
10210         u32 eec;
10211
10212         /* Catch broken hardware that put the wrong VF device ID in
10213          * the PCIe SR-IOV capability.
10214          */
10215         if (pdev->is_virtfn) {
10216                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10217                      pci_name(pdev), pdev->vendor, pdev->device);
10218                 return -EINVAL;
10219         }
10220
10221         err = pci_enable_device_mem(pdev);
10222         if (err)
10223                 return err;
10224
10225         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10226                 pci_using_dac = 1;
10227         } else {
10228                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10229                 if (err) {
10230                         dev_err(&pdev->dev,
10231                                 "No usable DMA configuration, aborting\n");
10232                         goto err_dma;
10233                 }
10234                 pci_using_dac = 0;
10235         }
10236
10237         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10238         if (err) {
10239                 dev_err(&pdev->dev,
10240                         "pci_request_selected_regions failed 0x%x\n", err);
10241                 goto err_pci_reg;
10242         }
10243
10244         pci_enable_pcie_error_reporting(pdev);
10245
10246         pci_set_master(pdev);
10247         pci_save_state(pdev);
10248
10249         if (ii->mac == ixgbe_mac_82598EB) {
10250 #ifdef CONFIG_IXGBE_DCB
10251                 /* 8 TC w/ 4 queues per TC */
10252                 indices = 4 * MAX_TRAFFIC_CLASS;
10253 #else
10254                 indices = IXGBE_MAX_RSS_INDICES;
10255 #endif
10256         }
10257
10258         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10259         if (!netdev) {
10260                 err = -ENOMEM;
10261                 goto err_alloc_etherdev;
10262         }
10263
10264         SET_NETDEV_DEV(netdev, &pdev->dev);
10265
10266         adapter = netdev_priv(netdev);
10267
10268         adapter->netdev = netdev;
10269         adapter->pdev = pdev;
10270         hw = &adapter->hw;
10271         hw->back = adapter;
10272         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10273
10274         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10275                               pci_resource_len(pdev, 0));
10276         adapter->io_addr = hw->hw_addr;
10277         if (!hw->hw_addr) {
10278                 err = -EIO;
10279                 goto err_ioremap;
10280         }
10281
10282         netdev->netdev_ops = &ixgbe_netdev_ops;
10283         ixgbe_set_ethtool_ops(netdev);
10284         netdev->watchdog_timeo = 5 * HZ;
10285         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10286
10287         /* Setup hw api */
10288         hw->mac.ops   = *ii->mac_ops;
10289         hw->mac.type  = ii->mac;
10290         hw->mvals     = ii->mvals;
10291         if (ii->link_ops)
10292                 hw->link.ops  = *ii->link_ops;
10293
10294         /* EEPROM */
10295         hw->eeprom.ops = *ii->eeprom_ops;
10296         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10297         if (ixgbe_removed(hw->hw_addr)) {
10298                 err = -EIO;
10299                 goto err_ioremap;
10300         }
10301         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10302         if (!(eec & BIT(8)))
10303                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10304
10305         /* PHY */
10306         hw->phy.ops = *ii->phy_ops;
10307         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10308         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10309         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10310         hw->phy.mdio.mmds = 0;
10311         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10312         hw->phy.mdio.dev = netdev;
10313         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10314         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10315
10316         /* setup the private structure */
10317         err = ixgbe_sw_init(adapter, ii);
10318         if (err)
10319                 goto err_sw_init;
10320
10321         /* Make sure the SWFW semaphore is in a valid state */
10322         if (hw->mac.ops.init_swfw_sync)
10323                 hw->mac.ops.init_swfw_sync(hw);
10324
10325         /* Make it possible the adapter to be woken up via WOL */
10326         switch (adapter->hw.mac.type) {
10327         case ixgbe_mac_82599EB:
10328         case ixgbe_mac_X540:
10329         case ixgbe_mac_X550:
10330         case ixgbe_mac_X550EM_x:
10331         case ixgbe_mac_x550em_a:
10332                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10333                 break;
10334         default:
10335                 break;
10336         }
10337
10338         /*
10339          * If there is a fan on this device and it has failed log the
10340          * failure.
10341          */
10342         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10343                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10344                 if (esdp & IXGBE_ESDP_SDP1)
10345                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10346         }
10347
10348         if (allow_unsupported_sfp)
10349                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10350
10351         /* reset_hw fills in the perm_addr as well */
10352         hw->phy.reset_if_overtemp = true;
10353         err = hw->mac.ops.reset_hw(hw);
10354         hw->phy.reset_if_overtemp = false;
10355         ixgbe_set_eee_capable(adapter);
10356         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10357                 err = 0;
10358         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10359                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10360                 e_dev_err("Reload the driver after installing a supported module.\n");
10361                 goto err_sw_init;
10362         } else if (err) {
10363                 e_dev_err("HW Init failed: %d\n", err);
10364                 goto err_sw_init;
10365         }
10366
10367 #ifdef CONFIG_PCI_IOV
10368         /* SR-IOV not supported on the 82598 */
10369         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10370                 goto skip_sriov;
10371         /* Mailbox */
10372         ixgbe_init_mbx_params_pf(hw);
10373         hw->mbx.ops = ii->mbx_ops;
10374         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10375         ixgbe_enable_sriov(adapter, max_vfs);
10376 skip_sriov:
10377
10378 #endif
10379         netdev->features = NETIF_F_SG |
10380                            NETIF_F_TSO |
10381                            NETIF_F_TSO6 |
10382                            NETIF_F_RXHASH |
10383                            NETIF_F_RXCSUM |
10384                            NETIF_F_HW_CSUM;
10385
10386 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10387                                     NETIF_F_GSO_GRE_CSUM | \
10388                                     NETIF_F_GSO_IPXIP4 | \
10389                                     NETIF_F_GSO_IPXIP6 | \
10390                                     NETIF_F_GSO_UDP_TUNNEL | \
10391                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10392
10393         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10394         netdev->features |= NETIF_F_GSO_PARTIAL |
10395                             IXGBE_GSO_PARTIAL_FEATURES;
10396
10397         if (hw->mac.type >= ixgbe_mac_82599EB)
10398                 netdev->features |= NETIF_F_SCTP_CRC;
10399
10400         /* copy netdev features into list of user selectable features */
10401         netdev->hw_features |= netdev->features |
10402                                NETIF_F_HW_VLAN_CTAG_FILTER |
10403                                NETIF_F_HW_VLAN_CTAG_RX |
10404                                NETIF_F_HW_VLAN_CTAG_TX |
10405                                NETIF_F_RXALL |
10406                                NETIF_F_HW_L2FW_DOFFLOAD;
10407
10408         if (hw->mac.type >= ixgbe_mac_82599EB)
10409                 netdev->hw_features |= NETIF_F_NTUPLE |
10410                                        NETIF_F_HW_TC;
10411
10412         if (pci_using_dac)
10413                 netdev->features |= NETIF_F_HIGHDMA;
10414
10415         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10416         netdev->hw_enc_features |= netdev->vlan_features;
10417         netdev->mpls_features |= NETIF_F_SG |
10418                                  NETIF_F_TSO |
10419                                  NETIF_F_TSO6 |
10420                                  NETIF_F_HW_CSUM;
10421         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10422
10423         /* set this bit last since it cannot be part of vlan_features */
10424         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10425                             NETIF_F_HW_VLAN_CTAG_RX |
10426                             NETIF_F_HW_VLAN_CTAG_TX;
10427
10428         netdev->priv_flags |= IFF_UNICAST_FLT;
10429         netdev->priv_flags |= IFF_SUPP_NOFCS;
10430
10431         /* MTU range: 68 - 9710 */
10432         netdev->min_mtu = ETH_MIN_MTU;
10433         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10434
10435 #ifdef CONFIG_IXGBE_DCB
10436         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10437                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10438 #endif
10439
10440 #ifdef IXGBE_FCOE
10441         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10442                 unsigned int fcoe_l;
10443
10444                 if (hw->mac.ops.get_device_caps) {
10445                         hw->mac.ops.get_device_caps(hw, &device_caps);
10446                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10447                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10448                 }
10449
10450
10451                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10452                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10453
10454                 netdev->features |= NETIF_F_FSO |
10455                                     NETIF_F_FCOE_CRC;
10456
10457                 netdev->vlan_features |= NETIF_F_FSO |
10458                                          NETIF_F_FCOE_CRC |
10459                                          NETIF_F_FCOE_MTU;
10460         }
10461 #endif /* IXGBE_FCOE */
10462         ixgbe_init_ipsec_offload(adapter);
10463
10464         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10465                 netdev->hw_features |= NETIF_F_LRO;
10466         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10467                 netdev->features |= NETIF_F_LRO;
10468
10469         /* make sure the EEPROM is good */
10470         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10471                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10472                 err = -EIO;
10473                 goto err_sw_init;
10474         }
10475
10476         eth_platform_get_mac_address(&adapter->pdev->dev,
10477                                      adapter->hw.mac.perm_addr);
10478
10479         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10480
10481         if (!is_valid_ether_addr(netdev->dev_addr)) {
10482                 e_dev_err("invalid MAC address\n");
10483                 err = -EIO;
10484                 goto err_sw_init;
10485         }
10486
10487         /* Set hw->mac.addr to permanent MAC address */
10488         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10489         ixgbe_mac_set_default_filter(adapter);
10490
10491         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10492
10493         if (ixgbe_removed(hw->hw_addr)) {
10494                 err = -EIO;
10495                 goto err_sw_init;
10496         }
10497         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10498         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10499         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10500
10501         err = ixgbe_init_interrupt_scheme(adapter);
10502         if (err)
10503                 goto err_sw_init;
10504
10505         for (i = 0; i < adapter->num_rx_queues; i++)
10506                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10507         for (i = 0; i < adapter->num_tx_queues; i++)
10508                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10509         for (i = 0; i < adapter->num_xdp_queues; i++)
10510                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10511
10512         /* WOL not supported for all devices */
10513         adapter->wol = 0;
10514         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10515         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10516                                                 pdev->subsystem_device);
10517         if (hw->wol_enabled)
10518                 adapter->wol = IXGBE_WUFC_MAG;
10519
10520         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10521
10522         /* save off EEPROM version number */
10523         ixgbe_set_fw_version(adapter);
10524
10525         /* pick up the PCI bus settings for reporting later */
10526         if (ixgbe_pcie_from_parent(hw))
10527                 ixgbe_get_parent_bus_info(adapter);
10528         else
10529                  hw->mac.ops.get_bus_info(hw);
10530
10531         /* calculate the expected PCIe bandwidth required for optimal
10532          * performance. Note that some older parts will never have enough
10533          * bandwidth due to being older generation PCIe parts. We clamp these
10534          * parts to ensure no warning is displayed if it can't be fixed.
10535          */
10536         switch (hw->mac.type) {
10537         case ixgbe_mac_82598EB:
10538                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10539                 break;
10540         default:
10541                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10542                 break;
10543         }
10544
10545         /* don't check link if we failed to enumerate functions */
10546         if (expected_gts > 0)
10547                 ixgbe_check_minimum_link(adapter, expected_gts);
10548
10549         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10550         if (err)
10551                 strlcpy(part_str, "Unknown", sizeof(part_str));
10552         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10553                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10554                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10555                            part_str);
10556         else
10557                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10558                            hw->mac.type, hw->phy.type, part_str);
10559
10560         e_dev_info("%pM\n", netdev->dev_addr);
10561
10562         /* reset the hardware with the new settings */
10563         err = hw->mac.ops.start_hw(hw);
10564         if (err == IXGBE_ERR_EEPROM_VERSION) {
10565                 /* We are running on a pre-production device, log a warning */
10566                 e_dev_warn("This device is a pre-production adapter/LOM. "
10567                            "Please be aware there may be issues associated "
10568                            "with your hardware.  If you are experiencing "
10569                            "problems please contact your Intel or hardware "
10570                            "representative who provided you with this "
10571                            "hardware.\n");
10572         }
10573         strcpy(netdev->name, "eth%d");
10574         pci_set_drvdata(pdev, adapter);
10575         err = register_netdev(netdev);
10576         if (err)
10577                 goto err_register;
10578
10579
10580         /* power down the optics for 82599 SFP+ fiber */
10581         if (hw->mac.ops.disable_tx_laser)
10582                 hw->mac.ops.disable_tx_laser(hw);
10583
10584         /* carrier off reporting is important to ethtool even BEFORE open */
10585         netif_carrier_off(netdev);
10586
10587 #ifdef CONFIG_IXGBE_DCA
10588         if (dca_add_requester(&pdev->dev) == 0) {
10589                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10590                 ixgbe_setup_dca(adapter);
10591         }
10592 #endif
10593         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10594                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10595                 for (i = 0; i < adapter->num_vfs; i++)
10596                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10597         }
10598
10599         /* firmware requires driver version to be 0xFFFFFFFF
10600          * since os does not support feature
10601          */
10602         if (hw->mac.ops.set_fw_drv_ver)
10603                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10604                                            sizeof(ixgbe_driver_version) - 1,
10605                                            ixgbe_driver_version);
10606
10607         /* add san mac addr to netdev */
10608         ixgbe_add_sanmac_netdev(netdev);
10609
10610         e_dev_info("%s\n", ixgbe_default_device_descr);
10611
10612 #ifdef CONFIG_IXGBE_HWMON
10613         if (ixgbe_sysfs_init(adapter))
10614                 e_err(probe, "failed to allocate sysfs resources\n");
10615 #endif /* CONFIG_IXGBE_HWMON */
10616
10617         ixgbe_dbg_adapter_init(adapter);
10618
10619         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10620         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10621                 hw->mac.ops.setup_link(hw,
10622                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10623                         true);
10624
10625         return 0;
10626
10627 err_register:
10628         ixgbe_release_hw_control(adapter);
10629         ixgbe_clear_interrupt_scheme(adapter);
10630 err_sw_init:
10631         ixgbe_disable_sriov(adapter);
10632         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10633         iounmap(adapter->io_addr);
10634         kfree(adapter->jump_tables[0]);
10635         kfree(adapter->mac_table);
10636         kfree(adapter->rss_key);
10637 err_ioremap:
10638         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10639         free_netdev(netdev);
10640 err_alloc_etherdev:
10641         pci_release_mem_regions(pdev);
10642 err_pci_reg:
10643 err_dma:
10644         if (!adapter || disable_dev)
10645                 pci_disable_device(pdev);
10646         return err;
10647 }
10648
10649 /**
10650  * ixgbe_remove - Device Removal Routine
10651  * @pdev: PCI device information struct
10652  *
10653  * ixgbe_remove is called by the PCI subsystem to alert the driver
10654  * that it should release a PCI device.  The could be caused by a
10655  * Hot-Plug event, or because the driver is going to be removed from
10656  * memory.
10657  **/
10658 static void ixgbe_remove(struct pci_dev *pdev)
10659 {
10660         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10661         struct net_device *netdev;
10662         bool disable_dev;
10663         int i;
10664
10665         /* if !adapter then we already cleaned up in probe */
10666         if (!adapter)
10667                 return;
10668
10669         netdev  = adapter->netdev;
10670         ixgbe_dbg_adapter_exit(adapter);
10671
10672         set_bit(__IXGBE_REMOVING, &adapter->state);
10673         cancel_work_sync(&adapter->service_task);
10674
10675
10676 #ifdef CONFIG_IXGBE_DCA
10677         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10678                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10679                 dca_remove_requester(&pdev->dev);
10680                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10681                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10682         }
10683
10684 #endif
10685 #ifdef CONFIG_IXGBE_HWMON
10686         ixgbe_sysfs_exit(adapter);
10687 #endif /* CONFIG_IXGBE_HWMON */
10688
10689         /* remove the added san mac */
10690         ixgbe_del_sanmac_netdev(netdev);
10691
10692 #ifdef CONFIG_PCI_IOV
10693         ixgbe_disable_sriov(adapter);
10694 #endif
10695         if (netdev->reg_state == NETREG_REGISTERED)
10696                 unregister_netdev(netdev);
10697
10698         ixgbe_stop_ipsec_offload(adapter);
10699         ixgbe_clear_interrupt_scheme(adapter);
10700
10701         ixgbe_release_hw_control(adapter);
10702
10703 #ifdef CONFIG_DCB
10704         kfree(adapter->ixgbe_ieee_pfc);
10705         kfree(adapter->ixgbe_ieee_ets);
10706
10707 #endif
10708         iounmap(adapter->io_addr);
10709         pci_release_mem_regions(pdev);
10710
10711         e_dev_info("complete\n");
10712
10713         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10714                 if (adapter->jump_tables[i]) {
10715                         kfree(adapter->jump_tables[i]->input);
10716                         kfree(adapter->jump_tables[i]->mask);
10717                 }
10718                 kfree(adapter->jump_tables[i]);
10719         }
10720
10721         kfree(adapter->mac_table);
10722         kfree(adapter->rss_key);
10723         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10724         free_netdev(netdev);
10725
10726         pci_disable_pcie_error_reporting(pdev);
10727
10728         if (disable_dev)
10729                 pci_disable_device(pdev);
10730 }
10731
10732 /**
10733  * ixgbe_io_error_detected - called when PCI error is detected
10734  * @pdev: Pointer to PCI device
10735  * @state: The current pci connection state
10736  *
10737  * This function is called after a PCI bus error affecting
10738  * this device has been detected.
10739  */
10740 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10741                                                 pci_channel_state_t state)
10742 {
10743         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10744         struct net_device *netdev = adapter->netdev;
10745
10746 #ifdef CONFIG_PCI_IOV
10747         struct ixgbe_hw *hw = &adapter->hw;
10748         struct pci_dev *bdev, *vfdev;
10749         u32 dw0, dw1, dw2, dw3;
10750         int vf, pos;
10751         u16 req_id, pf_func;
10752
10753         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10754             adapter->num_vfs == 0)
10755                 goto skip_bad_vf_detection;
10756
10757         bdev = pdev->bus->self;
10758         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10759                 bdev = bdev->bus->self;
10760
10761         if (!bdev)
10762                 goto skip_bad_vf_detection;
10763
10764         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10765         if (!pos)
10766                 goto skip_bad_vf_detection;
10767
10768         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10769         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10770         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10771         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10772         if (ixgbe_removed(hw->hw_addr))
10773                 goto skip_bad_vf_detection;
10774
10775         req_id = dw1 >> 16;
10776         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10777         if (!(req_id & 0x0080))
10778                 goto skip_bad_vf_detection;
10779
10780         pf_func = req_id & 0x01;
10781         if ((pf_func & 1) == (pdev->devfn & 1)) {
10782                 unsigned int device_id;
10783
10784                 vf = (req_id & 0x7F) >> 1;
10785                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10786                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10787                                 "%8.8x\tdw3: %8.8x\n",
10788                 dw0, dw1, dw2, dw3);
10789                 switch (adapter->hw.mac.type) {
10790                 case ixgbe_mac_82599EB:
10791                         device_id = IXGBE_82599_VF_DEVICE_ID;
10792                         break;
10793                 case ixgbe_mac_X540:
10794                         device_id = IXGBE_X540_VF_DEVICE_ID;
10795                         break;
10796                 case ixgbe_mac_X550:
10797                         device_id = IXGBE_DEV_ID_X550_VF;
10798                         break;
10799                 case ixgbe_mac_X550EM_x:
10800                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10801                         break;
10802                 case ixgbe_mac_x550em_a:
10803                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10804                         break;
10805                 default:
10806                         device_id = 0;
10807                         break;
10808                 }
10809
10810                 /* Find the pci device of the offending VF */
10811                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10812                 while (vfdev) {
10813                         if (vfdev->devfn == (req_id & 0xFF))
10814                                 break;
10815                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10816                                                device_id, vfdev);
10817                 }
10818                 /*
10819                  * There's a slim chance the VF could have been hot plugged,
10820                  * so if it is no longer present we don't need to issue the
10821                  * VFLR.  Just clean up the AER in that case.
10822                  */
10823                 if (vfdev) {
10824                         pcie_flr(vfdev);
10825                         /* Free device reference count */
10826                         pci_dev_put(vfdev);
10827                 }
10828
10829                 pci_cleanup_aer_uncorrect_error_status(pdev);
10830         }
10831
10832         /*
10833          * Even though the error may have occurred on the other port
10834          * we still need to increment the vf error reference count for
10835          * both ports because the I/O resume function will be called
10836          * for both of them.
10837          */
10838         adapter->vferr_refcount++;
10839
10840         return PCI_ERS_RESULT_RECOVERED;
10841
10842 skip_bad_vf_detection:
10843 #endif /* CONFIG_PCI_IOV */
10844         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10845                 return PCI_ERS_RESULT_DISCONNECT;
10846
10847         if (!netif_device_present(netdev))
10848                 return PCI_ERS_RESULT_DISCONNECT;
10849
10850         rtnl_lock();
10851         netif_device_detach(netdev);
10852
10853         if (state == pci_channel_io_perm_failure) {
10854                 rtnl_unlock();
10855                 return PCI_ERS_RESULT_DISCONNECT;
10856         }
10857
10858         if (netif_running(netdev))
10859                 ixgbe_close_suspend(adapter);
10860
10861         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10862                 pci_disable_device(pdev);
10863         rtnl_unlock();
10864
10865         /* Request a slot reset. */
10866         return PCI_ERS_RESULT_NEED_RESET;
10867 }
10868
10869 /**
10870  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10871  * @pdev: Pointer to PCI device
10872  *
10873  * Restart the card from scratch, as if from a cold-boot.
10874  */
10875 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10876 {
10877         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10878         pci_ers_result_t result;
10879         int err;
10880
10881         if (pci_enable_device_mem(pdev)) {
10882                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10883                 result = PCI_ERS_RESULT_DISCONNECT;
10884         } else {
10885                 smp_mb__before_atomic();
10886                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10887                 adapter->hw.hw_addr = adapter->io_addr;
10888                 pci_set_master(pdev);
10889                 pci_restore_state(pdev);
10890                 pci_save_state(pdev);
10891
10892                 pci_wake_from_d3(pdev, false);
10893
10894                 ixgbe_reset(adapter);
10895                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10896                 result = PCI_ERS_RESULT_RECOVERED;
10897         }
10898
10899         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10900         if (err) {
10901                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10902                           "failed 0x%0x\n", err);
10903                 /* non-fatal, continue */
10904         }
10905
10906         return result;
10907 }
10908
10909 /**
10910  * ixgbe_io_resume - called when traffic can start flowing again.
10911  * @pdev: Pointer to PCI device
10912  *
10913  * This callback is called when the error recovery driver tells us that
10914  * its OK to resume normal operation.
10915  */
10916 static void ixgbe_io_resume(struct pci_dev *pdev)
10917 {
10918         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10919         struct net_device *netdev = adapter->netdev;
10920
10921 #ifdef CONFIG_PCI_IOV
10922         if (adapter->vferr_refcount) {
10923                 e_info(drv, "Resuming after VF err\n");
10924                 adapter->vferr_refcount--;
10925                 return;
10926         }
10927
10928 #endif
10929         rtnl_lock();
10930         if (netif_running(netdev))
10931                 ixgbe_open(netdev);
10932
10933         netif_device_attach(netdev);
10934         rtnl_unlock();
10935 }
10936
10937 static const struct pci_error_handlers ixgbe_err_handler = {
10938         .error_detected = ixgbe_io_error_detected,
10939         .slot_reset = ixgbe_io_slot_reset,
10940         .resume = ixgbe_io_resume,
10941 };
10942
10943 static struct pci_driver ixgbe_driver = {
10944         .name     = ixgbe_driver_name,
10945         .id_table = ixgbe_pci_tbl,
10946         .probe    = ixgbe_probe,
10947         .remove   = ixgbe_remove,
10948 #ifdef CONFIG_PM
10949         .suspend  = ixgbe_suspend,
10950         .resume   = ixgbe_resume,
10951 #endif
10952         .shutdown = ixgbe_shutdown,
10953         .sriov_configure = ixgbe_pci_sriov_configure,
10954         .err_handler = &ixgbe_err_handler
10955 };
10956
10957 /**
10958  * ixgbe_init_module - Driver Registration Routine
10959  *
10960  * ixgbe_init_module is the first routine called when the driver is
10961  * loaded. All it does is register with the PCI subsystem.
10962  **/
10963 static int __init ixgbe_init_module(void)
10964 {
10965         int ret;
10966         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10967         pr_info("%s\n", ixgbe_copyright);
10968
10969         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10970         if (!ixgbe_wq) {
10971                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
10972                 return -ENOMEM;
10973         }
10974
10975         ixgbe_dbg_init();
10976
10977         ret = pci_register_driver(&ixgbe_driver);
10978         if (ret) {
10979                 destroy_workqueue(ixgbe_wq);
10980                 ixgbe_dbg_exit();
10981                 return ret;
10982         }
10983
10984 #ifdef CONFIG_IXGBE_DCA
10985         dca_register_notify(&dca_notifier);
10986 #endif
10987
10988         return 0;
10989 }
10990
10991 module_init(ixgbe_init_module);
10992
10993 /**
10994  * ixgbe_exit_module - Driver Exit Cleanup Routine
10995  *
10996  * ixgbe_exit_module is called just before the driver is removed
10997  * from memory.
10998  **/
10999 static void __exit ixgbe_exit_module(void)
11000 {
11001 #ifdef CONFIG_IXGBE_DCA
11002         dca_unregister_notify(&dca_notifier);
11003 #endif
11004         pci_unregister_driver(&ixgbe_driver);
11005
11006         ixgbe_dbg_exit();
11007         if (ixgbe_wq) {
11008                 destroy_workqueue(ixgbe_wq);
11009                 ixgbe_wq = NULL;
11010         }
11011 }
11012
11013 #ifdef CONFIG_IXGBE_DCA
11014 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11015                             void *p)
11016 {
11017         int ret_val;
11018
11019         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11020                                          __ixgbe_notify_dca);
11021
11022         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11023 }
11024
11025 #endif /* CONFIG_IXGBE_DCA */
11026
11027 module_exit(ixgbe_exit_module);
11028
11029 /* ixgbe_main.c */