drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <linux/numa.h>
  31 #include <scsi/fc/fc_fcoe.h>
  32 #include <net/udp_tunnel.h>
  33 #include <net/pkt_cls.h>
  34 #include <net/tc_act/tc_gact.h>
  35 #include <net/tc_act/tc_mirred.h>
  36 #include <net/vxlan.h>
  37 #include <net/mpls.h>
  38 #include <net/xdp_sock.h>
  39 #include <net/xfrm.h>
  40
  41 #include "ixgbe.h"
  42 #include "ixgbe_common.h"
  43 #include "ixgbe_dcb_82599.h"
  44 #include "ixgbe_phy.h"
  45 #include "ixgbe_sriov.h"
  46 #include "ixgbe_model.h"
  47 #include "ixgbe_txrx_common.h"
  48
  49 char ixgbe_driver_name[] = "ixgbe";
  50 static const char ixgbe_driver_string[] =
  51                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  52 #ifdef IXGBE_FCOE
  53 char ixgbe_default_device_descr[] =
  54                               "Intel(R) 10 Gigabit Network Connection";
  55 #else
  56 static char ixgbe_default_device_descr[] =
  57                               "Intel(R) 10 Gigabit Network Connection";
  58 #endif
  59 #define DRV_VERSION "5.1.0-k"
  60 const char ixgbe_driver_version[] = DRV_VERSION;
  61 static const char ixgbe_copyright[] =
  62                                 "Copyright (c) 1999-2016 Intel Corporation.";
  63
  64 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  65
  66 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  67         [board_82598]           = &ixgbe_82598_info,
  68         [board_82599]           = &ixgbe_82599_info,
  69         [board_X540]            = &ixgbe_X540_info,
  70         [board_X550]            = &ixgbe_X550_info,
  71         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  72         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  73         [board_x550em_a]        = &ixgbe_x550em_a_info,
  74         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  75 };
  76
  77 /* ixgbe_pci_tbl - PCI Device ID Table
  78  *
  79  * Wildcard entries (PCI_ANY_ID) should come last
  80  * Last entry must be all 0s
  81  *
  82  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  83  *   Class, Class Mask, private data (not used) }
  84  */
  85 static const struct pci_device_id ixgbe_pci_tbl[] = {
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 133         /* required last entry */
 134         {0, }
 135 };
 136 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 137
 138 #ifdef CONFIG_IXGBE_DCA
 139 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 140                             void *p);
 141 static struct notifier_block dca_notifier = {
 142         .notifier_call = ixgbe_notify_dca,
 143         .next          = NULL,
 144         .priority      = 0
 145 };
 146 #endif
 147
 148 #ifdef CONFIG_PCI_IOV
 149 static unsigned int max_vfs;
 150 module_param(max_vfs, uint, 0);
 151 MODULE_PARM_DESC(max_vfs,
 152                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 153 #endif /* CONFIG_PCI_IOV */
 154
 155 static unsigned int allow_unsupported_sfp;
 156 module_param(allow_unsupported_sfp, uint, 0);
 157 MODULE_PARM_DESC(allow_unsupported_sfp,
 158                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 159
 160 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 161 static int debug = -1;
 162 module_param(debug, int, 0);
 163 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 164
 165 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 166 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 167 MODULE_LICENSE("GPL v2");
 168 MODULE_VERSION(DRV_VERSION);
 169
 170 static struct workqueue_struct *ixgbe_wq;
 171
 172 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 173 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 174
 175 static const struct net_device_ops ixgbe_netdev_ops;
 176
 177 static bool netif_is_ixgbe(struct net_device *dev)
 178 {
 179         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 180 }
 181
 182 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 183                                           u32 reg, u16 *value)
 184 {
 185         struct pci_dev *parent_dev;
 186         struct pci_bus *parent_bus;
 187
 188         parent_bus = adapter->pdev->bus->parent;
 189         if (!parent_bus)
 190                 return -1;
 191
 192         parent_dev = parent_bus->self;
 193         if (!parent_dev)
 194                 return -1;
 195
 196         if (!pci_is_pcie(parent_dev))
 197                 return -1;
 198
 199         pcie_capability_read_word(parent_dev, reg, value);
 200         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 201             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 202                 return -1;
 203         return 0;
 204 }
 205
 206 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 207 {
 208         struct ixgbe_hw *hw = &adapter->hw;
 209         u16 link_status = 0;
 210         int err;
 211
 212         hw->bus.type = ixgbe_bus_type_pci_express;
 213
 214         /* Get the negotiated link width and speed from PCI config space of the
 215          * parent, as this device is behind a switch
 216          */
 217         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 218
 219         /* assume caller will handle error case */
 220         if (err)
 221                 return err;
 222
 223         hw->bus.width = ixgbe_convert_bus_width(link_status);
 224         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 225
 226         return 0;
 227 }
 228
 229 /**
 230  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 231  * @hw: hw specific details
 232  *
 233  * This function is used by probe to determine whether a device's PCI-Express
 234  * bandwidth details should be gathered from the parent bus instead of from the
 235  * device. Used to ensure that various locations all have the correct device ID
 236  * checks.
 237  */
 238 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 239 {
 240         switch (hw->device_id) {
 241         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 242         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 243                 return true;
 244         default:
 245                 return false;
 246         }
 247 }
 248
 249 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 250                                      int expected_gts)
 251 {
 252         struct ixgbe_hw *hw = &adapter->hw;
 253         struct pci_dev *pdev;
 254
 255         /* Some devices are not connected over PCIe and thus do not negotiate
 256          * speed. These devices do not have valid bus info, and thus any report
 257          * we generate may not be correct.
 258          */
 259         if (hw->bus.type == ixgbe_bus_type_internal)
 260                 return;
 261
 262         /* determine whether to use the parent device */
 263         if (ixgbe_pcie_from_parent(&adapter->hw))
 264                 pdev = adapter->pdev->bus->parent->self;
 265         else
 266                 pdev = adapter->pdev;
 267
 268         pcie_print_link_status(pdev);
 269 }
 270
 271 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 272 {
 273         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 274             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 275             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 276                 queue_work(ixgbe_wq, &adapter->service_task);
 277 }
 278
 279 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 280 {
 281         struct ixgbe_adapter *adapter = hw->back;
 282
 283         if (!hw->hw_addr)
 284                 return;
 285         hw->hw_addr = NULL;
 286         e_dev_err("Adapter removed\n");
 287         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 288                 ixgbe_service_event_schedule(adapter);
 289 }
 290
 291 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 292 {
 293         u8 __iomem *reg_addr;
 294         u32 value;
 295         int i;
 296
 297         reg_addr = READ_ONCE(hw->hw_addr);
 298         if (ixgbe_removed(reg_addr))
 299                 return IXGBE_FAILED_READ_REG;
 300
 301         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 302          * so perform several status register reads to determine if the adapter
 303          * has been removed.
 304          */
 305         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 306                 value = readl(reg_addr + IXGBE_STATUS);
 307                 if (value != IXGBE_FAILED_READ_REG)
 308                         break;
 309                 mdelay(3);
 310         }
 311
 312         if (value == IXGBE_FAILED_READ_REG)
 313                 ixgbe_remove_adapter(hw);
 314         else
 315                 value = readl(reg_addr + reg);
 316         return value;
 317 }
 318
 319 /**
 320  * ixgbe_read_reg - Read from device register
 321  * @hw: hw specific details
 322  * @reg: offset of register to read
 323  *
 324  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 325  *
 326  * This function is used to read device registers. It checks for device
 327  * removal by confirming any read that returns all ones by checking the
 328  * status register value for all ones. This function avoids reading from
 329  * the hardware if a removal was previously detected in which case it
 330  * returns IXGBE_FAILED_READ_REG (all ones).
 331  */
 332 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 333 {
 334         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 335         u32 value;
 336
 337         if (ixgbe_removed(reg_addr))
 338                 return IXGBE_FAILED_READ_REG;
 339         if (unlikely(hw->phy.nw_mng_if_sel &
 340                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 341                 struct ixgbe_adapter *adapter;
 342                 int i;
 343
 344                 for (i = 0; i < 200; ++i) {
 345                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 346                         if (likely(!value))
 347                                 goto writes_completed;
 348                         if (value == IXGBE_FAILED_READ_REG) {
 349                                 ixgbe_remove_adapter(hw);
 350                                 return IXGBE_FAILED_READ_REG;
 351                         }
 352                         udelay(5);
 353                 }
 354
 355                 adapter = hw->back;
 356                 e_warn(hw, "register writes incomplete %08x\n", value);
 357         }
 358
 359 writes_completed:
 360         value = readl(reg_addr + reg);
 361         if (unlikely(value == IXGBE_FAILED_READ_REG))
 362                 value = ixgbe_check_remove(hw, reg);
 363         return value;
 364 }
 365
 366 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 367 {
 368         u16 value;
 369
 370         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 371         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 372                 ixgbe_remove_adapter(hw);
 373                 return true;
 374         }
 375         return false;
 376 }
 377
 378 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 379 {
 380         struct ixgbe_adapter *adapter = hw->back;
 381         u16 value;
 382
 383         if (ixgbe_removed(hw->hw_addr))
 384                 return IXGBE_FAILED_READ_CFG_WORD;
 385         pci_read_config_word(adapter->pdev, reg, &value);
 386         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 387             ixgbe_check_cfg_remove(hw, adapter->pdev))
 388                 return IXGBE_FAILED_READ_CFG_WORD;
 389         return value;
 390 }
 391
 392 #ifdef CONFIG_PCI_IOV
 393 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 394 {
 395         struct ixgbe_adapter *adapter = hw->back;
 396         u32 value;
 397
 398         if (ixgbe_removed(hw->hw_addr))
 399                 return IXGBE_FAILED_READ_CFG_DWORD;
 400         pci_read_config_dword(adapter->pdev, reg, &value);
 401         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 402             ixgbe_check_cfg_remove(hw, adapter->pdev))
 403                 return IXGBE_FAILED_READ_CFG_DWORD;
 404         return value;
 405 }
 406 #endif /* CONFIG_PCI_IOV */
 407
 408 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 409 {
 410         struct ixgbe_adapter *adapter = hw->back;
 411
 412         if (ixgbe_removed(hw->hw_addr))
 413                 return;
 414         pci_write_config_word(adapter->pdev, reg, value);
 415 }
 416
 417 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 418 {
 419         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 420
 421         /* flush memory to make sure state is correct before next watchdog */
 422         smp_mb__before_atomic();
 423         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 424 }
 425
 426 struct ixgbe_reg_info {
 427         u32 ofs;
 428         char *name;
 429 };
 430
 431 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 432
 433         /* General Registers */
 434         {IXGBE_CTRL, "CTRL"},
 435         {IXGBE_STATUS, "STATUS"},
 436         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 437
 438         /* Interrupt Registers */
 439         {IXGBE_EICR, "EICR"},
 440
 441         /* RX Registers */
 442         {IXGBE_SRRCTL(0), "SRRCTL"},
 443         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 444         {IXGBE_RDLEN(0), "RDLEN"},
 445         {IXGBE_RDH(0), "RDH"},
 446         {IXGBE_RDT(0), "RDT"},
 447         {IXGBE_RXDCTL(0), "RXDCTL"},
 448         {IXGBE_RDBAL(0), "RDBAL"},
 449         {IXGBE_RDBAH(0), "RDBAH"},
 450
 451         /* TX Registers */
 452         {IXGBE_TDBAL(0), "TDBAL"},
 453         {IXGBE_TDBAH(0), "TDBAH"},
 454         {IXGBE_TDLEN(0), "TDLEN"},
 455         {IXGBE_TDH(0), "TDH"},
 456         {IXGBE_TDT(0), "TDT"},
 457         {IXGBE_TXDCTL(0), "TXDCTL"},
 458
 459         /* List Terminator */
 460         { .name = NULL }
 461 };
 462
 463
 464 /*
 465  * ixgbe_regdump - register printout routine
 466  */
 467 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 468 {
 469         int i;
 470         char rname[16];
 471         u32 regs[64];
 472
 473         switch (reginfo->ofs) {
 474         case IXGBE_SRRCTL(0):
 475                 for (i = 0; i < 64; i++)
 476                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 477                 break;
 478         case IXGBE_DCA_RXCTRL(0):
 479                 for (i = 0; i < 64; i++)
 480                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 481                 break;
 482         case IXGBE_RDLEN(0):
 483                 for (i = 0; i < 64; i++)
 484                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 485                 break;
 486         case IXGBE_RDH(0):
 487                 for (i = 0; i < 64; i++)
 488                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 489                 break;
 490         case IXGBE_RDT(0):
 491                 for (i = 0; i < 64; i++)
 492                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 493                 break;
 494         case IXGBE_RXDCTL(0):
 495                 for (i = 0; i < 64; i++)
 496                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 497                 break;
 498         case IXGBE_RDBAL(0):
 499                 for (i = 0; i < 64; i++)
 500                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 501                 break;
 502         case IXGBE_RDBAH(0):
 503                 for (i = 0; i < 64; i++)
 504                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 505                 break;
 506         case IXGBE_TDBAL(0):
 507                 for (i = 0; i < 64; i++)
 508                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 509                 break;
 510         case IXGBE_TDBAH(0):
 511                 for (i = 0; i < 64; i++)
 512                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 513                 break;
 514         case IXGBE_TDLEN(0):
 515                 for (i = 0; i < 64; i++)
 516                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 517                 break;
 518         case IXGBE_TDH(0):
 519                 for (i = 0; i < 64; i++)
 520                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 521                 break;
 522         case IXGBE_TDT(0):
 523                 for (i = 0; i < 64; i++)
 524                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 525                 break;
 526         case IXGBE_TXDCTL(0):
 527                 for (i = 0; i < 64; i++)
 528                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 529                 break;
 530         default:
 531                 pr_info("%-15s %08x\n",
 532                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 533                 return;
 534         }
 535
 536         i = 0;
 537         while (i < 64) {
 538                 int j;
 539                 char buf[9 * 8 + 1];
 540                 char *p = buf;
 541
 542                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 543                 for (j = 0; j < 8; j++)
 544                         p += sprintf(p, " %08x", regs[i++]);
 545                 pr_err("%-15s%s\n", rname, buf);
 546         }
 547
 548 }
 549
 550 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 551 {
 552         struct ixgbe_tx_buffer *tx_buffer;
 553
 554         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 555         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 556                 n, ring->next_to_use, ring->next_to_clean,
 557                 (u64)dma_unmap_addr(tx_buffer, dma),
 558                 dma_unmap_len(tx_buffer, len),
 559                 tx_buffer->next_to_watch,
 560                 (u64)tx_buffer->time_stamp);
 561 }
 562
 563 /*
 564  * ixgbe_dump - Print registers, tx-rings and rx-rings
 565  */
 566 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 567 {
 568         struct net_device *netdev = adapter->netdev;
 569         struct ixgbe_hw *hw = &adapter->hw;
 570         struct ixgbe_reg_info *reginfo;
 571         int n = 0;
 572         struct ixgbe_ring *ring;
 573         struct ixgbe_tx_buffer *tx_buffer;
 574         union ixgbe_adv_tx_desc *tx_desc;
 575         struct my_u0 { u64 a; u64 b; } *u0;
 576         struct ixgbe_ring *rx_ring;
 577         union ixgbe_adv_rx_desc *rx_desc;
 578         struct ixgbe_rx_buffer *rx_buffer_info;
 579         int i = 0;
 580
 581         if (!netif_msg_hw(adapter))
 582                 return;
 583
 584         /* Print netdevice Info */
 585         if (netdev) {
 586                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 587                 pr_info("Device Name     state            "
 588                         "trans_start\n");
 589                 pr_info("%-15s %016lX %016lX\n",
 590                         netdev->name,
 591                         netdev->state,
 592                         dev_trans_start(netdev));
 593         }
 594
 595         /* Print Registers */
 596         dev_info(&adapter->pdev->dev, "Register Dump\n");
 597         pr_info(" Register Name   Value\n");
 598         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 599              reginfo->name; reginfo++) {
 600                 ixgbe_regdump(hw, reginfo);
 601         }
 602
 603         /* Print TX Ring Summary */
 604         if (!netdev || !netif_running(netdev))
 605                 return;
 606
 607         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 608         pr_info(" %s     %s              %s        %s\n",
 609                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 610                 "leng", "ntw", "timestamp");
 611         for (n = 0; n < adapter->num_tx_queues; n++) {
 612                 ring = adapter->tx_ring[n];
 613                 ixgbe_print_buffer(ring, n);
 614         }
 615
 616         for (n = 0; n < adapter->num_xdp_queues; n++) {
 617                 ring = adapter->xdp_ring[n];
 618                 ixgbe_print_buffer(ring, n);
 619         }
 620
 621         /* Print TX Rings */
 622         if (!netif_msg_tx_done(adapter))
 623                 goto rx_ring_summary;
 624
 625         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 626
 627         /* Transmit Descriptor Formats
 628          *
 629          * 82598 Advanced Transmit Descriptor
 630          *   +--------------------------------------------------------------+
 631          * 0 |         Buffer Address [63:0]                                |
 632          *   +--------------------------------------------------------------+
 633          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 634          *   +--------------------------------------------------------------+
 635          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 636          *
 637          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 638          *   +--------------------------------------------------------------+
 639          * 0 |                          RSV [63:0]                          |
 640          *   +--------------------------------------------------------------+
 641          * 8 |            RSV           |  STA  |          NXTSEQ           |
 642          *   +--------------------------------------------------------------+
 643          *   63                       36 35   32 31                         0
 644          *
 645          * 82599+ Advanced Transmit Descriptor
 646          *   +--------------------------------------------------------------+
 647          * 0 |         Buffer Address [63:0]                                |
 648          *   +--------------------------------------------------------------+
 649          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 650          *   +--------------------------------------------------------------+
 651          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 652          *
 653          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 654          *   +--------------------------------------------------------------+
 655          * 0 |                          RSV [63:0]                          |
 656          *   +--------------------------------------------------------------+
 657          * 8 |            RSV           |  STA  |           RSV             |
 658          *   +--------------------------------------------------------------+
 659          *   63                       36 35   32 31                         0
 660          */
 661
 662         for (n = 0; n < adapter->num_tx_queues; n++) {
 663                 ring = adapter->tx_ring[n];
 664                 pr_info("------------------------------------\n");
 665                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 666                 pr_info("------------------------------------\n");
 667                 pr_info("%s%s    %s              %s        %s          %s\n",
 668                         "T [desc]     [address 63:0  ] ",
 669                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 670                         "leng", "ntw", "timestamp", "bi->skb");
 671
 672                 for (i = 0; ring->desc && (i < ring->count); i++) {
 673                         tx_desc = IXGBE_TX_DESC(ring, i);
 674                         tx_buffer = &ring->tx_buffer_info[i];
 675                         u0 = (struct my_u0 *)tx_desc;
 676                         if (dma_unmap_len(tx_buffer, len) > 0) {
 677                                 const char *ring_desc;
 678
 679                                 if (i == ring->next_to_use &&
 680                                     i == ring->next_to_clean)
 681                                         ring_desc = " NTC/U";
 682                                 else if (i == ring->next_to_use)
 683                                         ring_desc = " NTU";
 684                                 else if (i == ring->next_to_clean)
 685                                         ring_desc = " NTC";
 686                                 else
 687                                         ring_desc = "";
 688                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 689                                         i,
 690                                         le64_to_cpu((__force __le64)u0->a),
 691                                         le64_to_cpu((__force __le64)u0->b),
 692                                         (u64)dma_unmap_addr(tx_buffer, dma),
 693                                         dma_unmap_len(tx_buffer, len),
 694                                         tx_buffer->next_to_watch,
 695                                         (u64)tx_buffer->time_stamp,
 696                                         tx_buffer->skb,
 697                                         ring_desc);
 698
 699                                 if (netif_msg_pktdata(adapter) &&
 700                                     tx_buffer->skb)
 701                                         print_hex_dump(KERN_INFO, "",
 702                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 703                                                 tx_buffer->skb->data,
 704                                                 dma_unmap_len(tx_buffer, len),
 705                                                 true);
 706                         }
 707                 }
 708         }
 709
 710         /* Print RX Rings Summary */
 711 rx_ring_summary:
 712         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 713         pr_info("Queue [NTU] [NTC]\n");
 714         for (n = 0; n < adapter->num_rx_queues; n++) {
 715                 rx_ring = adapter->rx_ring[n];
 716                 pr_info("%5d %5X %5X\n",
 717                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 718         }
 719
 720         /* Print RX Rings */
 721         if (!netif_msg_rx_status(adapter))
 722                 return;
 723
 724         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 725
 726         /* Receive Descriptor Formats
 727          *
 728          * 82598 Advanced Receive Descriptor (Read) Format
 729          *    63                                           1        0
 730          *    +-----------------------------------------------------+
 731          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 732          *    +----------------------------------------------+------+
 733          *  8 |       Header Buffer Address [63:1]           |  DD  |
 734          *    +-----------------------------------------------------+
 735          *
 736          *
 737          * 82598 Advanced Receive Descriptor (Write-Back) Format
 738          *
 739          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 740          *   +------------------------------------------------------+
 741          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 742          *   | Packet   | IP     |   |          |     | Type | Type |
 743          *   | Checksum | Ident  |   |          |     |      |      |
 744          *   +------------------------------------------------------+
 745          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 746          *   +------------------------------------------------------+
 747          *   63       48 47    32 31            20 19               0
 748          *
 749          * 82599+ Advanced Receive Descriptor (Read) Format
 750          *    63                                           1        0
 751          *    +-----------------------------------------------------+
 752          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 753          *    +----------------------------------------------+------+
 754          *  8 |       Header Buffer Address [63:1]           |  DD  |
 755          *    +-----------------------------------------------------+
 756          *
 757          *
 758          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 759          *
 760          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 761          *   +------------------------------------------------------+
 762          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 763          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 764          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 765          *   +------------------------------------------------------+
 766          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 767          *   +------------------------------------------------------+
 768          *   63       48 47    32 31          20 19                 0
 769          */
 770
 771         for (n = 0; n < adapter->num_rx_queues; n++) {
 772                 rx_ring = adapter->rx_ring[n];
 773                 pr_info("------------------------------------\n");
 774                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 775                 pr_info("------------------------------------\n");
 776                 pr_info("%s%s%s\n",
 777                         "R  [desc]      [ PktBuf     A0] ",
 778                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 779                         "<-- Adv Rx Read format");
 780                 pr_info("%s%s%s\n",
 781                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 782                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 783                         "<-- Adv Rx Write-Back format");
 784
 785                 for (i = 0; i < rx_ring->count; i++) {
 786                         const char *ring_desc;
 787
 788                         if (i == rx_ring->next_to_use)
 789                                 ring_desc = " NTU";
 790                         else if (i == rx_ring->next_to_clean)
 791                                 ring_desc = " NTC";
 792                         else
 793                                 ring_desc = "";
 794
 795                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 796                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 797                         u0 = (struct my_u0 *)rx_desc;
 798                         if (rx_desc->wb.upper.length) {
 799                                 /* Descriptor Done */
 800                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 801                                         i,
 802                                         le64_to_cpu((__force __le64)u0->a),
 803                                         le64_to_cpu((__force __le64)u0->b),
 804                                         rx_buffer_info->skb,
 805                                         ring_desc);
 806                         } else {
 807                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 808                                         i,
 809                                         le64_to_cpu((__force __le64)u0->a),
 810                                         le64_to_cpu((__force __le64)u0->b),
 811                                         (u64)rx_buffer_info->dma,
 812                                         rx_buffer_info->skb,
 813                                         ring_desc);
 814
 815                                 if (netif_msg_pktdata(adapter) &&
 816                                     rx_buffer_info->dma) {
 817                                         print_hex_dump(KERN_INFO, "",
 818                                            DUMP_PREFIX_ADDRESS, 16, 1,
 819                                            page_address(rx_buffer_info->page) +
 820                                                     rx_buffer_info->page_offset,
 821                                            ixgbe_rx_bufsz(rx_ring), true);
 822                                 }
 823                         }
 824                 }
 825         }
 826 }
 827
 828 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 829 {
 830         u32 ctrl_ext;
 831
 832         /* Let firmware take over control of h/w */
 833         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 834         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 835                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 836 }
 837
 838 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 839 {
 840         u32 ctrl_ext;
 841
 842         /* Let firmware know the driver has taken over */
 843         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 844         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 845                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 846 }
 847
 848 /**
 849  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 850  * @adapter: pointer to adapter struct
 851  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 852  * @queue: queue to map the corresponding interrupt to
 853  * @msix_vector: the vector to map to the corresponding queue
 854  *
 855  */
 856 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 857                            u8 queue, u8 msix_vector)
 858 {
 859         u32 ivar, index;
 860         struct ixgbe_hw *hw = &adapter->hw;
 861         switch (hw->mac.type) {
 862         case ixgbe_mac_82598EB:
 863                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 864                 if (direction == -1)
 865                         direction = 0;
 866                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 867                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 868                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 869                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 870                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 871                 break;
 872         case ixgbe_mac_82599EB:
 873         case ixgbe_mac_X540:
 874         case ixgbe_mac_X550:
 875         case ixgbe_mac_X550EM_x:
 876         case ixgbe_mac_x550em_a:
 877                 if (direction == -1) {
 878                         /* other causes */
 879                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 880                         index = ((queue & 1) * 8);
 881                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 882                         ivar &= ~(0xFF << index);
 883                         ivar |= (msix_vector << index);
 884                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 885                         break;
 886                 } else {
 887                         /* tx or rx causes */
 888                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 889                         index = ((16 * (queue & 1)) + (8 * direction));
 890                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 891                         ivar &= ~(0xFF << index);
 892                         ivar |= (msix_vector << index);
 893                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 894                         break;
 895                 }
 896         default:
 897                 break;
 898         }
 899 }
 900
 901 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 902                             u64 qmask)
 903 {
 904         u32 mask;
 905
 906         switch (adapter->hw.mac.type) {
 907         case ixgbe_mac_82598EB:
 908                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 909                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 910                 break;
 911         case ixgbe_mac_82599EB:
 912         case ixgbe_mac_X540:
 913         case ixgbe_mac_X550:
 914         case ixgbe_mac_X550EM_x:
 915         case ixgbe_mac_x550em_a:
 916                 mask = (qmask & 0xFFFFFFFF);
 917                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 918                 mask = (qmask >> 32);
 919                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 920                 break;
 921         default:
 922                 break;
 923         }
 924 }
 925
 926 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 927 {
 928         struct ixgbe_hw *hw = &adapter->hw;
 929         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 930         int i;
 931         u32 data;
 932
 933         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 934             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 935                 return;
 936
 937         switch (hw->mac.type) {
 938         case ixgbe_mac_82598EB:
 939                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 940                 break;
 941         default:
 942                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 943         }
 944         hwstats->lxoffrxc += data;
 945
 946         /* refill credits (no tx hang) if we received xoff */
 947         if (!data)
 948                 return;
 949
 950         for (i = 0; i < adapter->num_tx_queues; i++)
 951                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 952                           &adapter->tx_ring[i]->state);
 953
 954         for (i = 0; i < adapter->num_xdp_queues; i++)
 955                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 956                           &adapter->xdp_ring[i]->state);
 957 }
 958
 959 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 960 {
 961         struct ixgbe_hw *hw = &adapter->hw;
 962         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 963         u32 xoff[8] = {0};
 964         u8 tc;
 965         int i;
 966         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 967
 968         if (adapter->ixgbe_ieee_pfc)
 969                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 970
 971         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 972                 ixgbe_update_xoff_rx_lfc(adapter);
 973                 return;
 974         }
 975
 976         /* update stats for each tc, only valid with PFC enabled */
 977         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 978                 u32 pxoffrxc;
 979
 980                 switch (hw->mac.type) {
 981                 case ixgbe_mac_82598EB:
 982                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 983                         break;
 984                 default:
 985                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 986                 }
 987                 hwstats->pxoffrxc[i] += pxoffrxc;
 988                 /* Get the TC for given UP */
 989                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 990                 xoff[tc] += pxoffrxc;
 991         }
 992
 993         /* disarm tx queues that have received xoff frames */
 994         for (i = 0; i < adapter->num_tx_queues; i++) {
 995                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 996
 997                 tc = tx_ring->dcb_tc;
 998                 if (xoff[tc])
 999                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1000         }
1001
1002         for (i = 0; i < adapter->num_xdp_queues; i++) {
1003                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1004
1005                 tc = xdp_ring->dcb_tc;
1006                 if (xoff[tc])
1007                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1008         }
1009 }
1010
1011 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1012 {
1013         return ring->stats.packets;
1014 }
1015
1016 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1017 {
1018         unsigned int head, tail;
1019
1020         head = ring->next_to_clean;
1021         tail = ring->next_to_use;
1022
1023         return ((head <= tail) ? tail : tail + ring->count) - head;
1024 }
1025
1026 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1027 {
1028         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1029         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1030         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1031
1032         clear_check_for_tx_hang(tx_ring);
1033
1034         /*
1035          * Check for a hung queue, but be thorough. This verifies
1036          * that a transmit has been completed since the previous
1037          * check AND there is at least one packet pending. The
1038          * ARMED bit is set to indicate a potential hang. The
1039          * bit is cleared if a pause frame is received to remove
1040          * false hang detection due to PFC or 802.3x frames. By
1041          * requiring this to fail twice we avoid races with
1042          * pfc clearing the ARMED bit and conditions where we
1043          * run the check_tx_hang logic with a transmit completion
1044          * pending but without time to complete it yet.
1045          */
1046         if (tx_done_old == tx_done && tx_pending)
1047                 /* make sure it is true for two checks in a row */
1048                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1049                                         &tx_ring->state);
1050         /* update completed stats and continue */
1051         tx_ring->tx_stats.tx_done_old = tx_done;
1052         /* reset the countdown */
1053         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1054
1055         return false;
1056 }
1057
1058 /**
1059  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1060  * @adapter: driver private struct
1061  **/
1062 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1063 {
1064
1065         /* Do the reset outside of interrupt context */
1066         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1067                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1068                 e_warn(drv, "initiating reset due to tx timeout\n");
1069                 ixgbe_service_event_schedule(adapter);
1070         }
1071 }
1072
1073 /**
1074  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1075  * @netdev: network interface device structure
1076  * @queue_index: Tx queue to set
1077  * @maxrate: desired maximum transmit bitrate
1078  **/
1079 static int ixgbe_tx_maxrate(struct net_device *netdev,
1080                             int queue_index, u32 maxrate)
1081 {
1082         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1083         struct ixgbe_hw *hw = &adapter->hw;
1084         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1085
1086         if (!maxrate)
1087                 return 0;
1088
1089         /* Calculate the rate factor values to set */
1090         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1091         bcnrc_val /= maxrate;
1092
1093         /* clear everything but the rate factor */
1094         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1095         IXGBE_RTTBCNRC_RF_DEC_MASK;
1096
1097         /* enable the rate scheduler */
1098         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1099
1100         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1101         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1102
1103         return 0;
1104 }
1105
1106 /**
1107  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1108  * @q_vector: structure containing interrupt and ring information
1109  * @tx_ring: tx ring to clean
1110  * @napi_budget: Used to determine if we are in netpoll
1111  **/
1112 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1113                                struct ixgbe_ring *tx_ring, int napi_budget)
1114 {
1115         struct ixgbe_adapter *adapter = q_vector->adapter;
1116         struct ixgbe_tx_buffer *tx_buffer;
1117         union ixgbe_adv_tx_desc *tx_desc;
1118         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1119         unsigned int budget = q_vector->tx.work_limit;
1120         unsigned int i = tx_ring->next_to_clean;
1121
1122         if (test_bit(__IXGBE_DOWN, &adapter->state))
1123                 return true;
1124
1125         tx_buffer = &tx_ring->tx_buffer_info[i];
1126         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1127         i -= tx_ring->count;
1128
1129         do {
1130                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1131
1132                 /* if next_to_watch is not set then there is no work pending */
1133                 if (!eop_desc)
1134                         break;
1135
1136                 /* prevent any other reads prior to eop_desc */
1137                 smp_rmb();
1138
1139                 /* if DD is not set pending work has not been completed */
1140                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1141                         break;
1142
1143                 /* clear next_to_watch to prevent false hangs */
1144                 tx_buffer->next_to_watch = NULL;
1145
1146                 /* update the statistics for this packet */
1147                 total_bytes += tx_buffer->bytecount;
1148                 total_packets += tx_buffer->gso_segs;
1149                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1150                         total_ipsec++;
1151
1152                 /* free the skb */
1153                 if (ring_is_xdp(tx_ring))
1154                         xdp_return_frame(tx_buffer->xdpf);
1155                 else
1156                         napi_consume_skb(tx_buffer->skb, napi_budget);
1157
1158                 /* unmap skb header data */
1159                 dma_unmap_single(tx_ring->dev,
1160                                  dma_unmap_addr(tx_buffer, dma),
1161                                  dma_unmap_len(tx_buffer, len),
1162                                  DMA_TO_DEVICE);
1163
1164                 /* clear tx_buffer data */
1165                 dma_unmap_len_set(tx_buffer, len, 0);
1166
1167                 /* unmap remaining buffers */
1168                 while (tx_desc != eop_desc) {
1169                         tx_buffer++;
1170                         tx_desc++;
1171                         i++;
1172                         if (unlikely(!i)) {
1173                                 i -= tx_ring->count;
1174                                 tx_buffer = tx_ring->tx_buffer_info;
1175                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1176                         }
1177
1178                         /* unmap any remaining paged data */
1179                         if (dma_unmap_len(tx_buffer, len)) {
1180                                 dma_unmap_page(tx_ring->dev,
1181                                                dma_unmap_addr(tx_buffer, dma),
1182                                                dma_unmap_len(tx_buffer, len),
1183                                                DMA_TO_DEVICE);
1184                                 dma_unmap_len_set(tx_buffer, len, 0);
1185                         }
1186                 }
1187
1188                 /* move us one more past the eop_desc for start of next pkt */
1189                 tx_buffer++;
1190                 tx_desc++;
1191                 i++;
1192                 if (unlikely(!i)) {
1193                         i -= tx_ring->count;
1194                         tx_buffer = tx_ring->tx_buffer_info;
1195                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1196                 }
1197
1198                 /* issue prefetch for next Tx descriptor */
1199                 prefetch(tx_desc);
1200
1201                 /* update budget accounting */
1202                 budget--;
1203         } while (likely(budget));
1204
1205         i += tx_ring->count;
1206         tx_ring->next_to_clean = i;
1207         u64_stats_update_begin(&tx_ring->syncp);
1208         tx_ring->stats.bytes += total_bytes;
1209         tx_ring->stats.packets += total_packets;
1210         u64_stats_update_end(&tx_ring->syncp);
1211         q_vector->tx.total_bytes += total_bytes;
1212         q_vector->tx.total_packets += total_packets;
1213         adapter->tx_ipsec += total_ipsec;
1214
1215         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1216                 /* schedule immediate reset if we believe we hung */
1217                 struct ixgbe_hw *hw = &adapter->hw;
1218                 e_err(drv, "Detected Tx Unit Hang %s\n"
1219                         "  Tx Queue             <%d>\n"
1220                         "  TDH, TDT             <%x>, <%x>\n"
1221                         "  next_to_use          <%x>\n"
1222                         "  next_to_clean        <%x>\n"
1223                         "tx_buffer_info[next_to_clean]\n"
1224                         "  time_stamp           <%lx>\n"
1225                         "  jiffies              <%lx>\n",
1226                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1227                         tx_ring->queue_index,
1228                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1229                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1230                         tx_ring->next_to_use, i,
1231                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1232
1233                 if (!ring_is_xdp(tx_ring))
1234                         netif_stop_subqueue(tx_ring->netdev,
1235                                             tx_ring->queue_index);
1236
1237                 e_info(probe,
1238                        "tx hang %d detected on queue %d, resetting adapter\n",
1239                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1240
1241                 /* schedule immediate reset if we believe we hung */
1242                 ixgbe_tx_timeout_reset(adapter);
1243
1244                 /* the adapter is about to reset, no point in enabling stuff */
1245                 return true;
1246         }
1247
1248         if (ring_is_xdp(tx_ring))
1249                 return !!budget;
1250
1251         netdev_tx_completed_queue(txring_txq(tx_ring),
1252                                   total_packets, total_bytes);
1253
1254 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1255         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1256                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1257                 /* Make sure that anybody stopping the queue after this
1258                  * sees the new next_to_clean.
1259                  */
1260                 smp_mb();
1261                 if (__netif_subqueue_stopped(tx_ring->netdev,
1262                                              tx_ring->queue_index)
1263                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1264                         netif_wake_subqueue(tx_ring->netdev,
1265                                             tx_ring->queue_index);
1266                         ++tx_ring->tx_stats.restart_queue;
1267                 }
1268         }
1269
1270         return !!budget;
1271 }
1272
1273 #ifdef CONFIG_IXGBE_DCA
1274 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1275                                 struct ixgbe_ring *tx_ring,
1276                                 int cpu)
1277 {
1278         struct ixgbe_hw *hw = &adapter->hw;
1279         u32 txctrl = 0;
1280         u16 reg_offset;
1281
1282         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1283                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1284
1285         switch (hw->mac.type) {
1286         case ixgbe_mac_82598EB:
1287                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1288                 break;
1289         case ixgbe_mac_82599EB:
1290         case ixgbe_mac_X540:
1291                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1292                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1293                 break;
1294         default:
1295                 /* for unknown hardware do not write register */
1296                 return;
1297         }
1298
1299         /*
1300          * We can enable relaxed ordering for reads, but not writes when
1301          * DCA is enabled.  This is due to a known issue in some chipsets
1302          * which will cause the DCA tag to be cleared.
1303          */
1304         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1305                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1306                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1307
1308         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1309 }
1310
1311 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1312                                 struct ixgbe_ring *rx_ring,
1313                                 int cpu)
1314 {
1315         struct ixgbe_hw *hw = &adapter->hw;
1316         u32 rxctrl = 0;
1317         u8 reg_idx = rx_ring->reg_idx;
1318
1319         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1320                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1321
1322         switch (hw->mac.type) {
1323         case ixgbe_mac_82599EB:
1324         case ixgbe_mac_X540:
1325                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1326                 break;
1327         default:
1328                 break;
1329         }
1330
1331         /*
1332          * We can enable relaxed ordering for reads, but not writes when
1333          * DCA is enabled.  This is due to a known issue in some chipsets
1334          * which will cause the DCA tag to be cleared.
1335          */
1336         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1337                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1338                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1339
1340         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1341 }
1342
1343 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1344 {
1345         struct ixgbe_adapter *adapter = q_vector->adapter;
1346         struct ixgbe_ring *ring;
1347         int cpu = get_cpu();
1348
1349         if (q_vector->cpu == cpu)
1350                 goto out_no_update;
1351
1352         ixgbe_for_each_ring(ring, q_vector->tx)
1353                 ixgbe_update_tx_dca(adapter, ring, cpu);
1354
1355         ixgbe_for_each_ring(ring, q_vector->rx)
1356                 ixgbe_update_rx_dca(adapter, ring, cpu);
1357
1358         q_vector->cpu = cpu;
1359 out_no_update:
1360         put_cpu();
1361 }
1362
1363 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1364 {
1365         int i;
1366
1367         /* always use CB2 mode, difference is masked in the CB driver */
1368         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1369                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1370                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1371         else
1372                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1373                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1374
1375         for (i = 0; i < adapter->num_q_vectors; i++) {
1376                 adapter->q_vector[i]->cpu = -1;
1377                 ixgbe_update_dca(adapter->q_vector[i]);
1378         }
1379 }
1380
1381 static int __ixgbe_notify_dca(struct device *dev, void *data)
1382 {
1383         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1384         unsigned long event = *(unsigned long *)data;
1385
1386         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1387                 return 0;
1388
1389         switch (event) {
1390         case DCA_PROVIDER_ADD:
1391                 /* if we're already enabled, don't do it again */
1392                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1393                         break;
1394                 if (dca_add_requester(dev) == 0) {
1395                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1396                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1397                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1398                         break;
1399                 }
1400                 /* fall through - DCA is disabled. */
1401         case DCA_PROVIDER_REMOVE:
1402                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1403                         dca_remove_requester(dev);
1404                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1405                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1406                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1407                 }
1408                 break;
1409         }
1410
1411         return 0;
1412 }
1413
1414 #endif /* CONFIG_IXGBE_DCA */
1415
1416 #define IXGBE_RSS_L4_TYPES_MASK \
1417         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1418          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1419          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1420          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1421
1422 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1423                                  union ixgbe_adv_rx_desc *rx_desc,
1424                                  struct sk_buff *skb)
1425 {
1426         u16 rss_type;
1427
1428         if (!(ring->netdev->features & NETIF_F_RXHASH))
1429                 return;
1430
1431         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1432                    IXGBE_RXDADV_RSSTYPE_MASK;
1433
1434         if (!rss_type)
1435                 return;
1436
1437         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1438                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1439                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1440 }
1441
1442 #ifdef IXGBE_FCOE
1443 /**
1444  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1445  * @ring: structure containing ring specific data
1446  * @rx_desc: advanced rx descriptor
1447  *
1448  * Returns : true if it is FCoE pkt
1449  */
1450 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1451                                     union ixgbe_adv_rx_desc *rx_desc)
1452 {
1453         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1454
1455         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1456                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1457                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1458                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1459 }
1460
1461 #endif /* IXGBE_FCOE */
1462 /**
1463  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1464  * @ring: structure containing ring specific data
1465  * @rx_desc: current Rx descriptor being processed
1466  * @skb: skb currently being received and modified
1467  **/
1468 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1469                                      union ixgbe_adv_rx_desc *rx_desc,
1470                                      struct sk_buff *skb)
1471 {
1472         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1473         bool encap_pkt = false;
1474
1475         skb_checksum_none_assert(skb);
1476
1477         /* Rx csum disabled */
1478         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1479                 return;
1480
1481         /* check for VXLAN and Geneve packets */
1482         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1483                 encap_pkt = true;
1484                 skb->encapsulation = 1;
1485         }
1486
1487         /* if IP and error */
1488         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1489             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1490                 ring->rx_stats.csum_err++;
1491                 return;
1492         }
1493
1494         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1495                 return;
1496
1497         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1498                 /*
1499                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1500                  * checksum errors.
1501                  */
1502                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1503                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1504                         return;
1505
1506                 ring->rx_stats.csum_err++;
1507                 return;
1508         }
1509
1510         /* It must be a TCP or UDP packet with a valid checksum */
1511         skb->ip_summed = CHECKSUM_UNNECESSARY;
1512         if (encap_pkt) {
1513                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1514                         return;
1515
1516                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1517                         skb->ip_summed = CHECKSUM_NONE;
1518                         return;
1519                 }
1520                 /* If we checked the outer header let the stack know */
1521                 skb->csum_level = 1;
1522         }
1523 }
1524
1525 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1526 {
1527         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1528 }
1529
1530 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1531                                     struct ixgbe_rx_buffer *bi)
1532 {
1533         struct page *page = bi->page;
1534         dma_addr_t dma;
1535
1536         /* since we are recycling buffers we should seldom need to alloc */
1537         if (likely(page))
1538                 return true;
1539
1540         /* alloc new page for storage */
1541         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1542         if (unlikely(!page)) {
1543                 rx_ring->rx_stats.alloc_rx_page_failed++;
1544                 return false;
1545         }
1546
1547         /* map page for use */
1548         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1549                                  ixgbe_rx_pg_size(rx_ring),
1550                                  DMA_FROM_DEVICE,
1551                                  IXGBE_RX_DMA_ATTR);
1552
1553         /*
1554          * if mapping failed free memory back to system since
1555          * there isn't much point in holding memory we can't use
1556          */
1557         if (dma_mapping_error(rx_ring->dev, dma)) {
1558                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1559
1560                 rx_ring->rx_stats.alloc_rx_page_failed++;
1561                 return false;
1562         }
1563
1564         bi->dma = dma;
1565         bi->page = page;
1566         bi->page_offset = ixgbe_rx_offset(rx_ring);
1567         page_ref_add(page, USHRT_MAX - 1);
1568         bi->pagecnt_bias = USHRT_MAX;
1569         rx_ring->rx_stats.alloc_rx_page++;
1570
1571         return true;
1572 }
1573
1574 /**
1575  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1576  * @rx_ring: ring to place buffers on
1577  * @cleaned_count: number of buffers to replace
1578  **/
1579 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1580 {
1581         union ixgbe_adv_rx_desc *rx_desc;
1582         struct ixgbe_rx_buffer *bi;
1583         u16 i = rx_ring->next_to_use;
1584         u16 bufsz;
1585
1586         /* nothing to do */
1587         if (!cleaned_count)
1588                 return;
1589
1590         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1591         bi = &rx_ring->rx_buffer_info[i];
1592         i -= rx_ring->count;
1593
1594         bufsz = ixgbe_rx_bufsz(rx_ring);
1595
1596         do {
1597                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1598                         break;
1599
1600                 /* sync the buffer for use by the device */
1601                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1602                                                  bi->page_offset, bufsz,
1603                                                  DMA_FROM_DEVICE);
1604
1605                 /*
1606                  * Refresh the desc even if buffer_addrs didn't change
1607                  * because each write-back erases this info.
1608                  */
1609                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1610
1611                 rx_desc++;
1612                 bi++;
1613                 i++;
1614                 if (unlikely(!i)) {
1615                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1616                         bi = rx_ring->rx_buffer_info;
1617                         i -= rx_ring->count;
1618                 }
1619
1620                 /* clear the length for the next_to_use descriptor */
1621                 rx_desc->wb.upper.length = 0;
1622
1623                 cleaned_count--;
1624         } while (cleaned_count);
1625
1626         i += rx_ring->count;
1627
1628         if (rx_ring->next_to_use != i) {
1629                 rx_ring->next_to_use = i;
1630
1631                 /* update next to alloc since we have filled the ring */
1632                 rx_ring->next_to_alloc = i;
1633
1634                 /* Force memory writes to complete before letting h/w
1635                  * know there are new descriptors to fetch.  (Only
1636                  * applicable for weak-ordered memory model archs,
1637                  * such as IA-64).
1638                  */
1639                 wmb();
1640                 writel(i, rx_ring->tail);
1641         }
1642 }
1643
1644 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1645                                    struct sk_buff *skb)
1646 {
1647         u16 hdr_len = skb_headlen(skb);
1648
1649         /* set gso_size to avoid messing up TCP MSS */
1650         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1651                                                  IXGBE_CB(skb)->append_cnt);
1652         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1653 }
1654
1655 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1656                                    struct sk_buff *skb)
1657 {
1658         /* if append_cnt is 0 then frame is not RSC */
1659         if (!IXGBE_CB(skb)->append_cnt)
1660                 return;
1661
1662         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1663         rx_ring->rx_stats.rsc_flush++;
1664
1665         ixgbe_set_rsc_gso_size(rx_ring, skb);
1666
1667         /* gso_size is computed using append_cnt so always clear it last */
1668         IXGBE_CB(skb)->append_cnt = 0;
1669 }
1670
1671 /**
1672  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1673  * @rx_ring: rx descriptor ring packet is being transacted on
1674  * @rx_desc: pointer to the EOP Rx descriptor
1675  * @skb: pointer to current skb being populated
1676  *
1677  * This function checks the ring, descriptor, and packet information in
1678  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1679  * other fields within the skb.
1680  **/
1681 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1682                               union ixgbe_adv_rx_desc *rx_desc,
1683                               struct sk_buff *skb)
1684 {
1685         struct net_device *dev = rx_ring->netdev;
1686         u32 flags = rx_ring->q_vector->adapter->flags;
1687
1688         ixgbe_update_rsc_stats(rx_ring, skb);
1689
1690         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1691
1692         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1693
1694         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1695                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1696
1697         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1698             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1699                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1700                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1701         }
1702
1703         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1704                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1705
1706         /* record Rx queue, or update MACVLAN statistics */
1707         if (netif_is_ixgbe(dev))
1708                 skb_record_rx_queue(skb, rx_ring->queue_index);
1709         else
1710                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1711                                  false);
1712
1713         skb->protocol = eth_type_trans(skb, dev);
1714 }
1715
1716 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1717                   struct sk_buff *skb)
1718 {
1719         napi_gro_receive(&q_vector->napi, skb);
1720 }
1721
1722 /**
1723  * ixgbe_is_non_eop - process handling of non-EOP buffers
1724  * @rx_ring: Rx ring being processed
1725  * @rx_desc: Rx descriptor for current buffer
1726  * @skb: Current socket buffer containing buffer in progress
1727  *
1728  * This function updates next to clean.  If the buffer is an EOP buffer
1729  * this function exits returning false, otherwise it will place the
1730  * sk_buff in the next buffer to be chained and return true indicating
1731  * that this is in fact a non-EOP buffer.
1732  **/
1733 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1734                              union ixgbe_adv_rx_desc *rx_desc,
1735                              struct sk_buff *skb)
1736 {
1737         u32 ntc = rx_ring->next_to_clean + 1;
1738
1739         /* fetch, update, and store next to clean */
1740         ntc = (ntc < rx_ring->count) ? ntc : 0;
1741         rx_ring->next_to_clean = ntc;
1742
1743         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1744
1745         /* update RSC append count if present */
1746         if (ring_is_rsc_enabled(rx_ring)) {
1747                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1748                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1749
1750                 if (unlikely(rsc_enabled)) {
1751                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1752
1753                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1754                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1755
1756                         /* update ntc based on RSC value */
1757                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1758                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1759                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1760                 }
1761         }
1762
1763         /* if we are the last buffer then there is nothing else to do */
1764         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1765                 return false;
1766
1767         /* place skb in next buffer to be received */
1768         rx_ring->rx_buffer_info[ntc].skb = skb;
1769         rx_ring->rx_stats.non_eop_descs++;
1770
1771         return true;
1772 }
1773
1774 /**
1775  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1776  * @rx_ring: rx descriptor ring packet is being transacted on
1777  * @skb: pointer to current skb being adjusted
1778  *
1779  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1780  * main difference between this version and the original function is that
1781  * this function can make several assumptions about the state of things
1782  * that allow for significant optimizations versus the standard function.
1783  * As a result we can do things like drop a frag and maintain an accurate
1784  * truesize for the skb.
1785  */
1786 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1787                             struct sk_buff *skb)
1788 {
1789         skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1790         unsigned char *va;
1791         unsigned int pull_len;
1792
1793         /*
1794          * it is valid to use page_address instead of kmap since we are
1795          * working with pages allocated out of the lomem pool per
1796          * alloc_page(GFP_ATOMIC)
1797          */
1798         va = skb_frag_address(frag);
1799
1800         /*
1801          * we need the header to contain the greater of either ETH_HLEN or
1802          * 60 bytes if the skb->len is less than 60 for skb_pad.
1803          */
1804         pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1805
1806         /* align pull length to size of long to optimize memcpy performance */
1807         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1808
1809         /* update all of the pointers */
1810         skb_frag_size_sub(frag, pull_len);
1811         skb_frag_off_add(frag, pull_len);
1812         skb->data_len -= pull_len;
1813         skb->tail += pull_len;
1814 }
1815
1816 /**
1817  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1818  * @rx_ring: rx descriptor ring packet is being transacted on
1819  * @skb: pointer to current skb being updated
1820  *
1821  * This function provides a basic DMA sync up for the first fragment of an
1822  * skb.  The reason for doing this is that the first fragment cannot be
1823  * unmapped until we have reached the end of packet descriptor for a buffer
1824  * chain.
1825  */
1826 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1827                                 struct sk_buff *skb)
1828 {
1829         if (ring_uses_build_skb(rx_ring)) {
1830                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1831
1832                 dma_sync_single_range_for_cpu(rx_ring->dev,
1833                                               IXGBE_CB(skb)->dma,
1834                                               offset,
1835                                               skb_headlen(skb),
1836                                               DMA_FROM_DEVICE);
1837         } else {
1838                 skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1839
1840                 dma_sync_single_range_for_cpu(rx_ring->dev,
1841                                               IXGBE_CB(skb)->dma,
1842                                               skb_frag_off(frag),
1843                                               skb_frag_size(frag),
1844                                               DMA_FROM_DEVICE);
1845         }
1846
1847         /* If the page was released, just unmap it. */
1848         if (unlikely(IXGBE_CB(skb)->page_released)) {
1849                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1850                                      ixgbe_rx_pg_size(rx_ring),
1851                                      DMA_FROM_DEVICE,
1852                                      IXGBE_RX_DMA_ATTR);
1853         }
1854 }
1855
1856 /**
1857  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1858  * @rx_ring: rx descriptor ring packet is being transacted on
1859  * @rx_desc: pointer to the EOP Rx descriptor
1860  * @skb: pointer to current skb being fixed
1861  *
1862  * Check if the skb is valid in the XDP case it will be an error pointer.
1863  * Return true in this case to abort processing and advance to next
1864  * descriptor.
1865  *
1866  * Check for corrupted packet headers caused by senders on the local L2
1867  * embedded NIC switch not setting up their Tx Descriptors right.  These
1868  * should be very rare.
1869  *
1870  * Also address the case where we are pulling data in on pages only
1871  * and as such no data is present in the skb header.
1872  *
1873  * In addition if skb is not at least 60 bytes we need to pad it so that
1874  * it is large enough to qualify as a valid Ethernet frame.
1875  *
1876  * Returns true if an error was encountered and skb was freed.
1877  **/
1878 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1879                            union ixgbe_adv_rx_desc *rx_desc,
1880                            struct sk_buff *skb)
1881 {
1882         struct net_device *netdev = rx_ring->netdev;
1883
1884         /* XDP packets use error pointer so abort at this point */
1885         if (IS_ERR(skb))
1886                 return true;
1887
1888         /* Verify netdev is present, and that packet does not have any
1889          * errors that would be unacceptable to the netdev.
1890          */
1891         if (!netdev ||
1892             (unlikely(ixgbe_test_staterr(rx_desc,
1893                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1894              !(netdev->features & NETIF_F_RXALL)))) {
1895                 dev_kfree_skb_any(skb);
1896                 return true;
1897         }
1898
1899         /* place header in linear portion of buffer */
1900         if (!skb_headlen(skb))
1901                 ixgbe_pull_tail(rx_ring, skb);
1902
1903 #ifdef IXGBE_FCOE
1904         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1905         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1906                 return false;
1907
1908 #endif
1909         /* if eth_skb_pad returns an error the skb was freed */
1910         if (eth_skb_pad(skb))
1911                 return true;
1912
1913         return false;
1914 }
1915
1916 /**
1917  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1918  * @rx_ring: rx descriptor ring to store buffers on
1919  * @old_buff: donor buffer to have page reused
1920  *
1921  * Synchronizes page for reuse by the adapter
1922  **/
1923 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1924                                 struct ixgbe_rx_buffer *old_buff)
1925 {
1926         struct ixgbe_rx_buffer *new_buff;
1927         u16 nta = rx_ring->next_to_alloc;
1928
1929         new_buff = &rx_ring->rx_buffer_info[nta];
1930
1931         /* update, and store next to alloc */
1932         nta++;
1933         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1934
1935         /* Transfer page from old buffer to new buffer.
1936          * Move each member individually to avoid possible store
1937          * forwarding stalls and unnecessary copy of skb.
1938          */
1939         new_buff->dma           = old_buff->dma;
1940         new_buff->page          = old_buff->page;
1941         new_buff->page_offset   = old_buff->page_offset;
1942         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1943 }
1944
1945 static inline bool ixgbe_page_is_reserved(struct page *page)
1946 {
1947         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1948 }
1949
1950 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1951 {
1952         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1953         struct page *page = rx_buffer->page;
1954
1955         /* avoid re-using remote pages */
1956         if (unlikely(ixgbe_page_is_reserved(page)))
1957                 return false;
1958
1959 #if (PAGE_SIZE < 8192)
1960         /* if we are only owner of page we can reuse it */
1961         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1962                 return false;
1963 #else
1964         /* The last offset is a bit aggressive in that we assume the
1965          * worst case of FCoE being enabled and using a 3K buffer.
1966          * However this should have minimal impact as the 1K extra is
1967          * still less than one buffer in size.
1968          */
1969 #define IXGBE_LAST_OFFSET \
1970         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1971         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1972                 return false;
1973 #endif
1974
1975         /* If we have drained the page fragment pool we need to update
1976          * the pagecnt_bias and page count so that we fully restock the
1977          * number of references the driver holds.
1978          */
1979         if (unlikely(pagecnt_bias == 1)) {
1980                 page_ref_add(page, USHRT_MAX - 1);
1981                 rx_buffer->pagecnt_bias = USHRT_MAX;
1982         }
1983
1984         return true;
1985 }
1986
1987 /**
1988  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1989  * @rx_ring: rx descriptor ring to transact packets on
1990  * @rx_buffer: buffer containing page to add
1991  * @skb: sk_buff to place the data into
1992  * @size: size of data in rx_buffer
1993  *
1994  * This function will add the data contained in rx_buffer->page to the skb.
1995  * This is done either through a direct copy if the data in the buffer is
1996  * less than the skb header size, otherwise it will just attach the page as
1997  * a frag to the skb.
1998  *
1999  * The function will then update the page offset if necessary and return
2000  * true if the buffer can be reused by the adapter.
2001  **/
2002 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2003                               struct ixgbe_rx_buffer *rx_buffer,
2004                               struct sk_buff *skb,
2005                               unsigned int size)
2006 {
2007 #if (PAGE_SIZE < 8192)
2008         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2009 #else
2010         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2011                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2012                                 SKB_DATA_ALIGN(size);
2013 #endif
2014         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2015                         rx_buffer->page_offset, size, truesize);
2016 #if (PAGE_SIZE < 8192)
2017         rx_buffer->page_offset ^= truesize;
2018 #else
2019         rx_buffer->page_offset += truesize;
2020 #endif
2021 }
2022
2023 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2024                                                    union ixgbe_adv_rx_desc *rx_desc,
2025                                                    struct sk_buff **skb,
2026                                                    const unsigned int size)
2027 {
2028         struct ixgbe_rx_buffer *rx_buffer;
2029
2030         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2031         prefetchw(rx_buffer->page);
2032         *skb = rx_buffer->skb;
2033
2034         /* Delay unmapping of the first packet. It carries the header
2035          * information, HW may still access the header after the writeback.
2036          * Only unmap it when EOP is reached
2037          */
2038         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2039                 if (!*skb)
2040                         goto skip_sync;
2041         } else {
2042                 if (*skb)
2043                         ixgbe_dma_sync_frag(rx_ring, *skb);
2044         }
2045
2046         /* we are reusing so sync this buffer for CPU use */
2047         dma_sync_single_range_for_cpu(rx_ring->dev,
2048                                       rx_buffer->dma,
2049                                       rx_buffer->page_offset,
2050                                       size,
2051                                       DMA_FROM_DEVICE);
2052 skip_sync:
2053         rx_buffer->pagecnt_bias--;
2054
2055         return rx_buffer;
2056 }
2057
2058 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2059                                 struct ixgbe_rx_buffer *rx_buffer,
2060                                 struct sk_buff *skb)
2061 {
2062         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2063                 /* hand second half of page back to the ring */
2064                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2065         } else {
2066                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2067                         /* the page has been released from the ring */
2068                         IXGBE_CB(skb)->page_released = true;
2069                 } else {
2070                         /* we are not reusing the buffer so unmap it */
2071                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2072                                              ixgbe_rx_pg_size(rx_ring),
2073                                              DMA_FROM_DEVICE,
2074                                              IXGBE_RX_DMA_ATTR);
2075                 }
2076                 __page_frag_cache_drain(rx_buffer->page,
2077                                         rx_buffer->pagecnt_bias);
2078         }
2079
2080         /* clear contents of rx_buffer */
2081         rx_buffer->page = NULL;
2082         rx_buffer->skb = NULL;
2083 }
2084
2085 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2086                                            struct ixgbe_rx_buffer *rx_buffer,
2087                                            struct xdp_buff *xdp,
2088                                            union ixgbe_adv_rx_desc *rx_desc)
2089 {
2090         unsigned int size = xdp->data_end - xdp->data;
2091 #if (PAGE_SIZE < 8192)
2092         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2093 #else
2094         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2095                                                xdp->data_hard_start);
2096 #endif
2097         struct sk_buff *skb;
2098
2099         /* prefetch first cache line of first page */
2100         prefetch(xdp->data);
2101 #if L1_CACHE_BYTES < 128
2102         prefetch(xdp->data + L1_CACHE_BYTES);
2103 #endif
2104         /* Note, we get here by enabling legacy-rx via:
2105          *
2106          *    ethtool --set-priv-flags <dev> legacy-rx on
2107          *
2108          * In this mode, we currently get 0 extra XDP headroom as
2109          * opposed to having legacy-rx off, where we process XDP
2110          * packets going to stack via ixgbe_build_skb(). The latter
2111          * provides us currently with 192 bytes of headroom.
2112          *
2113          * For ixgbe_construct_skb() mode it means that the
2114          * xdp->data_meta will always point to xdp->data, since
2115          * the helper cannot expand the head. Should this ever
2116          * change in future for legacy-rx mode on, then lets also
2117          * add xdp->data_meta handling here.
2118          */
2119
2120         /* allocate a skb to store the frags */
2121         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2122         if (unlikely(!skb))
2123                 return NULL;
2124
2125         if (size > IXGBE_RX_HDR_SIZE) {
2126                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2127                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2128
2129                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2130                                 xdp->data - page_address(rx_buffer->page),
2131                                 size, truesize);
2132 #if (PAGE_SIZE < 8192)
2133                 rx_buffer->page_offset ^= truesize;
2134 #else
2135                 rx_buffer->page_offset += truesize;
2136 #endif
2137         } else {
2138                 memcpy(__skb_put(skb, size),
2139                        xdp->data, ALIGN(size, sizeof(long)));
2140                 rx_buffer->pagecnt_bias++;
2141         }
2142
2143         return skb;
2144 }
2145
2146 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2147                                        struct ixgbe_rx_buffer *rx_buffer,
2148                                        struct xdp_buff *xdp,
2149                                        union ixgbe_adv_rx_desc *rx_desc)
2150 {
2151         unsigned int metasize = xdp->data - xdp->data_meta;
2152 #if (PAGE_SIZE < 8192)
2153         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2154 #else
2155         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2156                                 SKB_DATA_ALIGN(xdp->data_end -
2157                                                xdp->data_hard_start);
2158 #endif
2159         struct sk_buff *skb;
2160
2161         /* Prefetch first cache line of first page. If xdp->data_meta
2162          * is unused, this points extactly as xdp->data, otherwise we
2163          * likely have a consumer accessing first few bytes of meta
2164          * data, and then actual data.
2165          */
2166         prefetch(xdp->data_meta);
2167 #if L1_CACHE_BYTES < 128
2168         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2169 #endif
2170
2171         /* build an skb to around the page buffer */
2172         skb = build_skb(xdp->data_hard_start, truesize);
2173         if (unlikely(!skb))
2174                 return NULL;
2175
2176         /* update pointers within the skb to store the data */
2177         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2178         __skb_put(skb, xdp->data_end - xdp->data);
2179         if (metasize)
2180                 skb_metadata_set(skb, metasize);
2181
2182         /* record DMA address if this is the start of a chain of buffers */
2183         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2184                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2185
2186         /* update buffer offset */
2187 #if (PAGE_SIZE < 8192)
2188         rx_buffer->page_offset ^= truesize;
2189 #else
2190         rx_buffer->page_offset += truesize;
2191 #endif
2192
2193         return skb;
2194 }
2195
2196 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2197                                      struct ixgbe_ring *rx_ring,
2198                                      struct xdp_buff *xdp)
2199 {
2200         int err, result = IXGBE_XDP_PASS;
2201         struct bpf_prog *xdp_prog;
2202         struct xdp_frame *xdpf;
2203         u32 act;
2204
2205         rcu_read_lock();
2206         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2207
2208         if (!xdp_prog)
2209                 goto xdp_out;
2210
2211         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2212
2213         act = bpf_prog_run_xdp(xdp_prog, xdp);
2214         switch (act) {
2215         case XDP_PASS:
2216                 break;
2217         case XDP_TX:
2218                 xdpf = convert_to_xdp_frame(xdp);
2219                 if (unlikely(!xdpf)) {
2220                         result = IXGBE_XDP_CONSUMED;
2221                         break;
2222                 }
2223                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2224                 break;
2225         case XDP_REDIRECT:
2226                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2227                 if (!err)
2228                         result = IXGBE_XDP_REDIR;
2229                 else
2230                         result = IXGBE_XDP_CONSUMED;
2231                 break;
2232         default:
2233                 bpf_warn_invalid_xdp_action(act);
2234                 /* fallthrough */
2235         case XDP_ABORTED:
2236                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2237                 /* fallthrough -- handle aborts by dropping packet */
2238         case XDP_DROP:
2239                 result = IXGBE_XDP_CONSUMED;
2240                 break;
2241         }
2242 xdp_out:
2243         rcu_read_unlock();
2244         return ERR_PTR(-result);
2245 }
2246
2247 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring,
2248                                             unsigned int size)
2249 {
2250         unsigned int truesize;
2251
2252 #if (PAGE_SIZE < 8192)
2253         truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
2254 #else
2255         truesize = ring_uses_build_skb(rx_ring) ?
2256                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2257                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2258                 SKB_DATA_ALIGN(size);
2259 #endif
2260         return truesize;
2261 }
2262
2263 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2264                                  struct ixgbe_rx_buffer *rx_buffer,
2265                                  unsigned int size)
2266 {
2267         unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size);
2268 #if (PAGE_SIZE < 8192)
2269         rx_buffer->page_offset ^= truesize;
2270 #else
2271         rx_buffer->page_offset += truesize;
2272 #endif
2273 }
2274
2275 /**
2276  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2277  * @q_vector: structure containing interrupt and ring information
2278  * @rx_ring: rx descriptor ring to transact packets on
2279  * @budget: Total limit on number of packets to process
2280  *
2281  * This function provides a "bounce buffer" approach to Rx interrupt
2282  * processing.  The advantage to this is that on systems that have
2283  * expensive overhead for IOMMU access this provides a means of avoiding
2284  * it by maintaining the mapping of the page to the syste.
2285  *
2286  * Returns amount of work completed
2287  **/
2288 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2289                                struct ixgbe_ring *rx_ring,
2290                                const int budget)
2291 {
2292         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2293         struct ixgbe_adapter *adapter = q_vector->adapter;
2294 #ifdef IXGBE_FCOE
2295         int ddp_bytes;
2296         unsigned int mss = 0;
2297 #endif /* IXGBE_FCOE */
2298         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2299         unsigned int xdp_xmit = 0;
2300         struct xdp_buff xdp;
2301
2302         xdp.rxq = &rx_ring->xdp_rxq;
2303
2304         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
2305 #if (PAGE_SIZE < 8192)
2306         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0);
2307 #endif
2308
2309         while (likely(total_rx_packets < budget)) {
2310                 union ixgbe_adv_rx_desc *rx_desc;
2311                 struct ixgbe_rx_buffer *rx_buffer;
2312                 struct sk_buff *skb;
2313                 unsigned int size;
2314
2315                 /* return some buffers to hardware, one at a time is too slow */
2316                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2317                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2318                         cleaned_count = 0;
2319                 }
2320
2321                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2322                 size = le16_to_cpu(rx_desc->wb.upper.length);
2323                 if (!size)
2324                         break;
2325
2326                 /* This memory barrier is needed to keep us from reading
2327                  * any other fields out of the rx_desc until we know the
2328                  * descriptor has been written back
2329                  */
2330                 dma_rmb();
2331
2332                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2333
2334                 /* retrieve a buffer from the ring */
2335                 if (!skb) {
2336                         xdp.data = page_address(rx_buffer->page) +
2337                                    rx_buffer->page_offset;
2338                         xdp.data_meta = xdp.data;
2339                         xdp.data_hard_start = xdp.data -
2340                                               ixgbe_rx_offset(rx_ring);
2341                         xdp.data_end = xdp.data + size;
2342 #if (PAGE_SIZE > 4096)
2343                         /* At larger PAGE_SIZE, frame_sz depend on len size */
2344                         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size);
2345 #endif
2346                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2347                 }
2348
2349                 if (IS_ERR(skb)) {
2350                         unsigned int xdp_res = -PTR_ERR(skb);
2351
2352                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2353                                 xdp_xmit |= xdp_res;
2354                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2355                         } else {
2356                                 rx_buffer->pagecnt_bias++;
2357                         }
2358                         total_rx_packets++;
2359                         total_rx_bytes += size;
2360                 } else if (skb) {
2361                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2362                 } else if (ring_uses_build_skb(rx_ring)) {
2363                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2364                                               &xdp, rx_desc);
2365                 } else {
2366                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2367                                                   &xdp, rx_desc);
2368                 }
2369
2370                 /* exit if we failed to retrieve a buffer */
2371                 if (!skb) {
2372                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2373                         rx_buffer->pagecnt_bias++;
2374                         break;
2375                 }
2376
2377                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2378                 cleaned_count++;
2379
2380                 /* place incomplete frames back on ring for completion */
2381                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2382                         continue;
2383
2384                 /* verify the packet layout is correct */
2385                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2386                         continue;
2387
2388                 /* probably a little skewed due to removing CRC */
2389                 total_rx_bytes += skb->len;
2390
2391                 /* populate checksum, timestamp, VLAN, and protocol */
2392                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2393
2394 #ifdef IXGBE_FCOE
2395                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2396                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2397                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2398                         /* include DDPed FCoE data */
2399                         if (ddp_bytes > 0) {
2400                                 if (!mss) {
2401                                         mss = rx_ring->netdev->mtu -
2402                                                 sizeof(struct fcoe_hdr) -
2403                                                 sizeof(struct fc_frame_header) -
2404                                                 sizeof(struct fcoe_crc_eof);
2405                                         if (mss > 512)
2406                                                 mss &= ~511;
2407                                 }
2408                                 total_rx_bytes += ddp_bytes;
2409                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2410                                                                  mss);
2411                         }
2412                         if (!ddp_bytes) {
2413                                 dev_kfree_skb_any(skb);
2414                                 continue;
2415                         }
2416                 }
2417
2418 #endif /* IXGBE_FCOE */
2419                 ixgbe_rx_skb(q_vector, skb);
2420
2421                 /* update budget accounting */
2422                 total_rx_packets++;
2423         }
2424
2425         if (xdp_xmit & IXGBE_XDP_REDIR)
2426                 xdp_do_flush_map();
2427
2428         if (xdp_xmit & IXGBE_XDP_TX) {
2429                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2430
2431                 /* Force memory writes to complete before letting h/w
2432                  * know there are new descriptors to fetch.
2433                  */
2434                 wmb();
2435                 writel(ring->next_to_use, ring->tail);
2436         }
2437
2438         u64_stats_update_begin(&rx_ring->syncp);
2439         rx_ring->stats.packets += total_rx_packets;
2440         rx_ring->stats.bytes += total_rx_bytes;
2441         u64_stats_update_end(&rx_ring->syncp);
2442         q_vector->rx.total_packets += total_rx_packets;
2443         q_vector->rx.total_bytes += total_rx_bytes;
2444
2445         return total_rx_packets;
2446 }
2447
2448 /**
2449  * ixgbe_configure_msix - Configure MSI-X hardware
2450  * @adapter: board private structure
2451  *
2452  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2453  * interrupts.
2454  **/
2455 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2456 {
2457         struct ixgbe_q_vector *q_vector;
2458         int v_idx;
2459         u32 mask;
2460
2461         /* Populate MSIX to EITR Select */
2462         if (adapter->num_vfs > 32) {
2463                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2464                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2465         }
2466
2467         /*
2468          * Populate the IVAR table and set the ITR values to the
2469          * corresponding register.
2470          */
2471         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2472                 struct ixgbe_ring *ring;
2473                 q_vector = adapter->q_vector[v_idx];
2474
2475                 ixgbe_for_each_ring(ring, q_vector->rx)
2476                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2477
2478                 ixgbe_for_each_ring(ring, q_vector->tx)
2479                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2480
2481                 ixgbe_write_eitr(q_vector);
2482         }
2483
2484         switch (adapter->hw.mac.type) {
2485         case ixgbe_mac_82598EB:
2486                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2487                                v_idx);
2488                 break;
2489         case ixgbe_mac_82599EB:
2490         case ixgbe_mac_X540:
2491         case ixgbe_mac_X550:
2492         case ixgbe_mac_X550EM_x:
2493         case ixgbe_mac_x550em_a:
2494                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2495                 break;
2496         default:
2497                 break;
2498         }
2499         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2500
2501         /* set up to autoclear timer, and the vectors */
2502         mask = IXGBE_EIMS_ENABLE_MASK;
2503         mask &= ~(IXGBE_EIMS_OTHER |
2504                   IXGBE_EIMS_MAILBOX |
2505                   IXGBE_EIMS_LSC);
2506
2507         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2508 }
2509
2510 /**
2511  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2512  * @q_vector: structure containing interrupt and ring information
2513  * @ring_container: structure containing ring performance data
2514  *
2515  *      Stores a new ITR value based on packets and byte
2516  *      counts during the last interrupt.  The advantage of per interrupt
2517  *      computation is faster updates and more accurate ITR for the current
2518  *      traffic pattern.  Constants in this function were computed
2519  *      based on theoretical maximum wire speed and thresholds were set based
2520  *      on testing data as well as attempting to minimize response time
2521  *      while increasing bulk throughput.
2522  **/
2523 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2524                              struct ixgbe_ring_container *ring_container)
2525 {
2526         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2527                            IXGBE_ITR_ADAPTIVE_LATENCY;
2528         unsigned int avg_wire_size, packets, bytes;
2529         unsigned long next_update = jiffies;
2530
2531         /* If we don't have any rings just leave ourselves set for maximum
2532          * possible latency so we take ourselves out of the equation.
2533          */
2534         if (!ring_container->ring)
2535                 return;
2536
2537         /* If we didn't update within up to 1 - 2 jiffies we can assume
2538          * that either packets are coming in so slow there hasn't been
2539          * any work, or that there is so much work that NAPI is dealing
2540          * with interrupt moderation and we don't need to do anything.
2541          */
2542         if (time_after(next_update, ring_container->next_update))
2543                 goto clear_counts;
2544
2545         packets = ring_container->total_packets;
2546
2547         /* We have no packets to actually measure against. This means
2548          * either one of the other queues on this vector is active or
2549          * we are a Tx queue doing TSO with too high of an interrupt rate.
2550          *
2551          * When this occurs just tick up our delay by the minimum value
2552          * and hope that this extra delay will prevent us from being called
2553          * without any work on our queue.
2554          */
2555         if (!packets) {
2556                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2557                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2558                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2559                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2560                 goto clear_counts;
2561         }
2562
2563         bytes = ring_container->total_bytes;
2564
2565         /* If packets are less than 4 or bytes are less than 9000 assume
2566          * insufficient data to use bulk rate limiting approach. We are
2567          * likely latency driven.
2568          */
2569         if (packets < 4 && bytes < 9000) {
2570                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2571                 goto adjust_by_size;
2572         }
2573
2574         /* Between 4 and 48 we can assume that our current interrupt delay
2575          * is only slightly too low. As such we should increase it by a small
2576          * fixed amount.
2577          */
2578         if (packets < 48) {
2579                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2580                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2581                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2582                 goto clear_counts;
2583         }
2584
2585         /* Between 48 and 96 is our "goldilocks" zone where we are working
2586          * out "just right". Just report that our current ITR is good for us.
2587          */
2588         if (packets < 96) {
2589                 itr = q_vector->itr >> 2;
2590                 goto clear_counts;
2591         }
2592
2593         /* If packet count is 96 or greater we are likely looking at a slight
2594          * overrun of the delay we want. Try halving our delay to see if that
2595          * will cut the number of packets in half per interrupt.
2596          */
2597         if (packets < 256) {
2598                 itr = q_vector->itr >> 3;
2599                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2600                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2601                 goto clear_counts;
2602         }
2603
2604         /* The paths below assume we are dealing with a bulk ITR since number
2605          * of packets is 256 or greater. We are just going to have to compute
2606          * a value and try to bring the count under control, though for smaller
2607          * packet sizes there isn't much we can do as NAPI polling will likely
2608          * be kicking in sooner rather than later.
2609          */
2610         itr = IXGBE_ITR_ADAPTIVE_BULK;
2611
2612 adjust_by_size:
2613         /* If packet counts are 256 or greater we can assume we have a gross
2614          * overestimation of what the rate should be. Instead of trying to fine
2615          * tune it just use the formula below to try and dial in an exact value
2616          * give the current packet size of the frame.
2617          */
2618         avg_wire_size = bytes / packets;
2619
2620         /* The following is a crude approximation of:
2621          *  wmem_default / (size + overhead) = desired_pkts_per_int
2622          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2623          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2624          *
2625          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2626          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2627          * formula down to
2628          *
2629          *  (170 * (size + 24)) / (size + 640) = ITR
2630          *
2631          * We first do some math on the packet size and then finally bitshift
2632          * by 8 after rounding up. We also have to account for PCIe link speed
2633          * difference as ITR scales based on this.
2634          */
2635         if (avg_wire_size <= 60) {
2636                 /* Start at 50k ints/sec */
2637                 avg_wire_size = 5120;
2638         } else if (avg_wire_size <= 316) {
2639                 /* 50K ints/sec to 16K ints/sec */
2640                 avg_wire_size *= 40;
2641                 avg_wire_size += 2720;
2642         } else if (avg_wire_size <= 1084) {
2643                 /* 16K ints/sec to 9.2K ints/sec */
2644                 avg_wire_size *= 15;
2645                 avg_wire_size += 11452;
2646         } else if (avg_wire_size < 1968) {
2647                 /* 9.2K ints/sec to 8K ints/sec */
2648                 avg_wire_size *= 5;
2649                 avg_wire_size += 22420;
2650         } else {
2651                 /* plateau at a limit of 8K ints/sec */
2652                 avg_wire_size = 32256;
2653         }
2654
2655         /* If we are in low latency mode half our delay which doubles the rate
2656          * to somewhere between 100K to 16K ints/sec
2657          */
2658         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2659                 avg_wire_size >>= 1;
2660
2661         /* Resultant value is 256 times larger than it needs to be. This
2662          * gives us room to adjust the value as needed to either increase
2663          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2664          *
2665          * Use addition as we have already recorded the new latency flag
2666          * for the ITR value.
2667          */
2668         switch (q_vector->adapter->link_speed) {
2669         case IXGBE_LINK_SPEED_10GB_FULL:
2670         case IXGBE_LINK_SPEED_100_FULL:
2671         default:
2672                 itr += DIV_ROUND_UP(avg_wire_size,
2673                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2674                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2675                 break;
2676         case IXGBE_LINK_SPEED_2_5GB_FULL:
2677         case IXGBE_LINK_SPEED_1GB_FULL:
2678         case IXGBE_LINK_SPEED_10_FULL:
2679                 if (avg_wire_size > 8064)
2680                         avg_wire_size = 8064;
2681                 itr += DIV_ROUND_UP(avg_wire_size,
2682                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2683                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2684                 break;
2685         }
2686
2687 clear_counts:
2688         /* write back value */
2689         ring_container->itr = itr;
2690
2691         /* next update should occur within next jiffy */
2692         ring_container->next_update = next_update + 1;
2693
2694         ring_container->total_bytes = 0;
2695         ring_container->total_packets = 0;
2696 }
2697
2698 /**
2699  * ixgbe_write_eitr - write EITR register in hardware specific way
2700  * @q_vector: structure containing interrupt and ring information
2701  *
2702  * This function is made to be called by ethtool and by the driver
2703  * when it needs to update EITR registers at runtime.  Hardware
2704  * specific quirks/differences are taken care of here.
2705  */
2706 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2707 {
2708         struct ixgbe_adapter *adapter = q_vector->adapter;
2709         struct ixgbe_hw *hw = &adapter->hw;
2710         int v_idx = q_vector->v_idx;
2711         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2712
2713         switch (adapter->hw.mac.type) {
2714         case ixgbe_mac_82598EB:
2715                 /* must write high and low 16 bits to reset counter */
2716                 itr_reg |= (itr_reg << 16);
2717                 break;
2718         case ixgbe_mac_82599EB:
2719         case ixgbe_mac_X540:
2720         case ixgbe_mac_X550:
2721         case ixgbe_mac_X550EM_x:
2722         case ixgbe_mac_x550em_a:
2723                 /*
2724                  * set the WDIS bit to not clear the timer bits and cause an
2725                  * immediate assertion of the interrupt
2726                  */
2727                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2728                 break;
2729         default:
2730                 break;
2731         }
2732         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2733 }
2734
2735 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2736 {
2737         u32 new_itr;
2738
2739         ixgbe_update_itr(q_vector, &q_vector->tx);
2740         ixgbe_update_itr(q_vector, &q_vector->rx);
2741
2742         /* use the smallest value of new ITR delay calculations */
2743         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2744
2745         /* Clear latency flag if set, shift into correct position */
2746         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2747         new_itr <<= 2;
2748
2749         if (new_itr != q_vector->itr) {
2750                 /* save the algorithm value here */
2751                 q_vector->itr = new_itr;
2752
2753                 ixgbe_write_eitr(q_vector);
2754         }
2755 }
2756
2757 /**
2758  * ixgbe_check_overtemp_subtask - check for over temperature
2759  * @adapter: pointer to adapter
2760  **/
2761 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2762 {
2763         struct ixgbe_hw *hw = &adapter->hw;
2764         u32 eicr = adapter->interrupt_event;
2765         s32 rc;
2766
2767         if (test_bit(__IXGBE_DOWN, &adapter->state))
2768                 return;
2769
2770         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2771                 return;
2772
2773         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2774
2775         switch (hw->device_id) {
2776         case IXGBE_DEV_ID_82599_T3_LOM:
2777                 /*
2778                  * Since the warning interrupt is for both ports
2779                  * we don't have to check if:
2780                  *  - This interrupt wasn't for our port.
2781                  *  - We may have missed the interrupt so always have to
2782                  *    check if we  got a LSC
2783                  */
2784                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2785                     !(eicr & IXGBE_EICR_LSC))
2786                         return;
2787
2788                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2789                         u32 speed;
2790                         bool link_up = false;
2791
2792                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2793
2794                         if (link_up)
2795                                 return;
2796                 }
2797
2798                 /* Check if this is not due to overtemp */
2799                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2800                         return;
2801
2802                 break;
2803         case IXGBE_DEV_ID_X550EM_A_1G_T:
2804         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2805                 rc = hw->phy.ops.check_overtemp(hw);
2806                 if (rc != IXGBE_ERR_OVERTEMP)
2807                         return;
2808                 break;
2809         default:
2810                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2811                         return;
2812                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2813                         return;
2814                 break;
2815         }
2816         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2817
2818         adapter->interrupt_event = 0;
2819 }
2820
2821 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2822 {
2823         struct ixgbe_hw *hw = &adapter->hw;
2824
2825         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2826             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2827                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2828                 /* write to clear the interrupt */
2829                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2830         }
2831 }
2832
2833 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2834 {
2835         struct ixgbe_hw *hw = &adapter->hw;
2836
2837         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2838                 return;
2839
2840         switch (adapter->hw.mac.type) {
2841         case ixgbe_mac_82599EB:
2842                 /*
2843                  * Need to check link state so complete overtemp check
2844                  * on service task
2845                  */
2846                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2847                      (eicr & IXGBE_EICR_LSC)) &&
2848                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2849                         adapter->interrupt_event = eicr;
2850                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2851                         ixgbe_service_event_schedule(adapter);
2852                         return;
2853                 }
2854                 return;
2855         case ixgbe_mac_x550em_a:
2856                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2857                         adapter->interrupt_event = eicr;
2858                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2859                         ixgbe_service_event_schedule(adapter);
2860                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2861                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2862                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2863                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2864                 }
2865                 return;
2866         case ixgbe_mac_X550:
2867         case ixgbe_mac_X540:
2868                 if (!(eicr & IXGBE_EICR_TS))
2869                         return;
2870                 break;
2871         default:
2872                 return;
2873         }
2874
2875         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2876 }
2877
2878 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2879 {
2880         switch (hw->mac.type) {
2881         case ixgbe_mac_82598EB:
2882                 if (hw->phy.type == ixgbe_phy_nl)
2883                         return true;
2884                 return false;
2885         case ixgbe_mac_82599EB:
2886         case ixgbe_mac_X550EM_x:
2887         case ixgbe_mac_x550em_a:
2888                 switch (hw->mac.ops.get_media_type(hw)) {
2889                 case ixgbe_media_type_fiber:
2890                 case ixgbe_media_type_fiber_qsfp:
2891                         return true;
2892                 default:
2893                         return false;
2894                 }
2895         default:
2896                 return false;
2897         }
2898 }
2899
2900 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2901 {
2902         struct ixgbe_hw *hw = &adapter->hw;
2903         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2904
2905         if (!ixgbe_is_sfp(hw))
2906                 return;
2907
2908         /* Later MAC's use different SDP */
2909         if (hw->mac.type >= ixgbe_mac_X540)
2910                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2911
2912         if (eicr & eicr_mask) {
2913                 /* Clear the interrupt */
2914                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2915                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2916                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2917                         adapter->sfp_poll_time = 0;
2918                         ixgbe_service_event_schedule(adapter);
2919                 }
2920         }
2921
2922         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2923             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2924                 /* Clear the interrupt */
2925                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2926                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2927                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2928                         ixgbe_service_event_schedule(adapter);
2929                 }
2930         }
2931 }
2932
2933 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2934 {
2935         struct ixgbe_hw *hw = &adapter->hw;
2936
2937         adapter->lsc_int++;
2938         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2939         adapter->link_check_timeout = jiffies;
2940         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2941                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2942                 IXGBE_WRITE_FLUSH(hw);
2943                 ixgbe_service_event_schedule(adapter);
2944         }
2945 }
2946
2947 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2948                                            u64 qmask)
2949 {
2950         u32 mask;
2951         struct ixgbe_hw *hw = &adapter->hw;
2952
2953         switch (hw->mac.type) {
2954         case ixgbe_mac_82598EB:
2955                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2956                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2957                 break;
2958         case ixgbe_mac_82599EB:
2959         case ixgbe_mac_X540:
2960         case ixgbe_mac_X550:
2961         case ixgbe_mac_X550EM_x:
2962         case ixgbe_mac_x550em_a:
2963                 mask = (qmask & 0xFFFFFFFF);
2964                 if (mask)
2965                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2966                 mask = (qmask >> 32);
2967                 if (mask)
2968                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2969                 break;
2970         default:
2971                 break;
2972         }
2973         /* skip the flush */
2974 }
2975
2976 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2977                                             u64 qmask)
2978 {
2979         u32 mask;
2980         struct ixgbe_hw *hw = &adapter->hw;
2981
2982         switch (hw->mac.type) {
2983         case ixgbe_mac_82598EB:
2984                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2985                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2986                 break;
2987         case ixgbe_mac_82599EB:
2988         case ixgbe_mac_X540:
2989         case ixgbe_mac_X550:
2990         case ixgbe_mac_X550EM_x:
2991         case ixgbe_mac_x550em_a:
2992                 mask = (qmask & 0xFFFFFFFF);
2993                 if (mask)
2994                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2995                 mask = (qmask >> 32);
2996                 if (mask)
2997                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2998                 break;
2999         default:
3000                 break;
3001         }
3002         /* skip the flush */
3003 }
3004
3005 /**
3006  * ixgbe_irq_enable - Enable default interrupt generation settings
3007  * @adapter: board private structure
3008  * @queues: enable irqs for queues
3009  * @flush: flush register write
3010  **/
3011 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3012                                     bool flush)
3013 {
3014         struct ixgbe_hw *hw = &adapter->hw;
3015         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3016
3017         /* don't reenable LSC while waiting for link */
3018         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3019                 mask &= ~IXGBE_EIMS_LSC;
3020
3021         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3022                 switch (adapter->hw.mac.type) {
3023                 case ixgbe_mac_82599EB:
3024                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3025                         break;
3026                 case ixgbe_mac_X540:
3027                 case ixgbe_mac_X550:
3028                 case ixgbe_mac_X550EM_x:
3029                 case ixgbe_mac_x550em_a:
3030                         mask |= IXGBE_EIMS_TS;
3031                         break;
3032                 default:
3033                         break;
3034                 }
3035         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3036                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3037         switch (adapter->hw.mac.type) {
3038         case ixgbe_mac_82599EB:
3039                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3040                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3041                 /* fall through */
3042         case ixgbe_mac_X540:
3043         case ixgbe_mac_X550:
3044         case ixgbe_mac_X550EM_x:
3045         case ixgbe_mac_x550em_a:
3046                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3047                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3048                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3049                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3050                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3051                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3052                 mask |= IXGBE_EIMS_ECC;
3053                 mask |= IXGBE_EIMS_MAILBOX;
3054                 break;
3055         default:
3056                 break;
3057         }
3058
3059         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3060             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3061                 mask |= IXGBE_EIMS_FLOW_DIR;
3062
3063         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3064         if (queues)
3065                 ixgbe_irq_enable_queues(adapter, ~0);
3066         if (flush)
3067                 IXGBE_WRITE_FLUSH(&adapter->hw);
3068 }
3069
3070 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3071 {
3072         struct ixgbe_adapter *adapter = data;
3073         struct ixgbe_hw *hw = &adapter->hw;
3074         u32 eicr;
3075
3076         /*
3077          * Workaround for Silicon errata.  Use clear-by-write instead
3078          * of clear-by-read.  Reading with EICS will return the
3079          * interrupt causes without clearing, which later be done
3080          * with the write to EICR.
3081          */
3082         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3083
3084         /* The lower 16bits of the EICR register are for the queue interrupts
3085          * which should be masked here in order to not accidentally clear them if
3086          * the bits are high when ixgbe_msix_other is called. There is a race
3087          * condition otherwise which results in possible performance loss
3088          * especially if the ixgbe_msix_other interrupt is triggering
3089          * consistently (as it would when PPS is turned on for the X540 device)
3090          */
3091         eicr &= 0xFFFF0000;
3092
3093         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3094
3095         if (eicr & IXGBE_EICR_LSC)
3096                 ixgbe_check_lsc(adapter);
3097
3098         if (eicr & IXGBE_EICR_MAILBOX)
3099                 ixgbe_msg_task(adapter);
3100
3101         switch (hw->mac.type) {
3102         case ixgbe_mac_82599EB:
3103         case ixgbe_mac_X540:
3104         case ixgbe_mac_X550:
3105         case ixgbe_mac_X550EM_x:
3106         case ixgbe_mac_x550em_a:
3107                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3108                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3109                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3110                         ixgbe_service_event_schedule(adapter);
3111                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3112                                         IXGBE_EICR_GPI_SDP0_X540);
3113                 }
3114                 if (eicr & IXGBE_EICR_ECC) {
3115                         e_info(link, "Received ECC Err, initiating reset\n");
3116                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3117                         ixgbe_service_event_schedule(adapter);
3118                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3119                 }
3120                 /* Handle Flow Director Full threshold interrupt */
3121                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3122                         int reinit_count = 0;
3123                         int i;
3124                         for (i = 0; i < adapter->num_tx_queues; i++) {
3125                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3126                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3127                                                        &ring->state))
3128                                         reinit_count++;
3129                         }
3130                         if (reinit_count) {
3131                                 /* no more flow director interrupts until after init */
3132                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3133                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3134                                 ixgbe_service_event_schedule(adapter);
3135                         }
3136                 }
3137                 ixgbe_check_sfp_event(adapter, eicr);
3138                 ixgbe_check_overtemp_event(adapter, eicr);
3139                 break;
3140         default:
3141                 break;
3142         }
3143
3144         ixgbe_check_fan_failure(adapter, eicr);
3145
3146         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3147                 ixgbe_ptp_check_pps_event(adapter);
3148
3149         /* re-enable the original interrupt state, no lsc, no queues */
3150         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3151                 ixgbe_irq_enable(adapter, false, false);
3152
3153         return IRQ_HANDLED;
3154 }
3155
3156 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3157 {
3158         struct ixgbe_q_vector *q_vector = data;
3159
3160         /* EIAM disabled interrupts (on this vector) for us */
3161
3162         if (q_vector->rx.ring || q_vector->tx.ring)
3163                 napi_schedule_irqoff(&q_vector->napi);
3164
3165         return IRQ_HANDLED;
3166 }
3167
3168 /**
3169  * ixgbe_poll - NAPI Rx polling callback
3170  * @napi: structure for representing this polling device
3171  * @budget: how many packets driver is allowed to clean
3172  *
3173  * This function is used for legacy and MSI, NAPI mode
3174  **/
3175 int ixgbe_poll(struct napi_struct *napi, int budget)
3176 {
3177         struct ixgbe_q_vector *q_vector =
3178                                 container_of(napi, struct ixgbe_q_vector, napi);
3179         struct ixgbe_adapter *adapter = q_vector->adapter;
3180         struct ixgbe_ring *ring;
3181         int per_ring_budget, work_done = 0;
3182         bool clean_complete = true;
3183
3184 #ifdef CONFIG_IXGBE_DCA
3185         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3186                 ixgbe_update_dca(q_vector);
3187 #endif
3188
3189         ixgbe_for_each_ring(ring, q_vector->tx) {
3190                 bool wd = ring->xsk_umem ?
3191                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3192                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3193
3194                 if (!wd)
3195                         clean_complete = false;
3196         }
3197
3198         /* Exit if we are called by netpoll */
3199         if (budget <= 0)
3200                 return budget;
3201
3202         /* attempt to distribute budget to each queue fairly, but don't allow
3203          * the budget to go below 1 because we'll exit polling */
3204         if (q_vector->rx.count > 1)
3205                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3206         else
3207                 per_ring_budget = budget;
3208
3209         ixgbe_for_each_ring(ring, q_vector->rx) {
3210                 int cleaned = ring->xsk_umem ?
3211                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3212                                                     per_ring_budget) :
3213                               ixgbe_clean_rx_irq(q_vector, ring,
3214                                                  per_ring_budget);
3215
3216                 work_done += cleaned;
3217                 if (cleaned >= per_ring_budget)
3218                         clean_complete = false;
3219         }
3220
3221         /* If all work not completed, return budget and keep polling */
3222         if (!clean_complete)
3223                 return budget;
3224
3225         /* all work done, exit the polling mode */
3226         if (likely(napi_complete_done(napi, work_done))) {
3227                 if (adapter->rx_itr_setting & 1)
3228                         ixgbe_set_itr(q_vector);
3229                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3230                         ixgbe_irq_enable_queues(adapter,
3231                                                 BIT_ULL(q_vector->v_idx));
3232         }
3233
3234         return min(work_done, budget - 1);
3235 }
3236
3237 /**
3238  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3239  * @adapter: board private structure
3240  *
3241  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3242  * interrupts from the kernel.
3243  **/
3244 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3245 {
3246         struct net_device *netdev = adapter->netdev;
3247         unsigned int ri = 0, ti = 0;
3248         int vector, err;
3249
3250         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3251                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3252                 struct msix_entry *entry = &adapter->msix_entries[vector];
3253
3254                 if (q_vector->tx.ring && q_vector->rx.ring) {
3255                         snprintf(q_vector->name, sizeof(q_vector->name),
3256                                  "%s-TxRx-%u", netdev->name, ri++);
3257                         ti++;
3258                 } else if (q_vector->rx.ring) {
3259                         snprintf(q_vector->name, sizeof(q_vector->name),
3260                                  "%s-rx-%u", netdev->name, ri++);
3261                 } else if (q_vector->tx.ring) {
3262                         snprintf(q_vector->name, sizeof(q_vector->name),
3263                                  "%s-tx-%u", netdev->name, ti++);
3264                 } else {
3265                         /* skip this unused q_vector */
3266                         continue;
3267                 }
3268                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3269                                   q_vector->name, q_vector);
3270                 if (err) {
3271                         e_err(probe, "request_irq failed for MSIX interrupt "
3272                               "Error: %d\n", err);
3273                         goto free_queue_irqs;
3274                 }
3275                 /* If Flow Director is enabled, set interrupt affinity */
3276                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3277                         /* assign the mask for this irq */
3278                         irq_set_affinity_hint(entry->vector,
3279                                               &q_vector->affinity_mask);
3280                 }
3281         }
3282
3283         err = request_irq(adapter->msix_entries[vector].vector,
3284                           ixgbe_msix_other, 0, netdev->name, adapter);
3285         if (err) {
3286                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3287                 goto free_queue_irqs;
3288         }
3289
3290         return 0;
3291
3292 free_queue_irqs:
3293         while (vector) {
3294                 vector--;
3295                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3296                                       NULL);
3297                 free_irq(adapter->msix_entries[vector].vector,
3298                          adapter->q_vector[vector]);
3299         }
3300         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3301         pci_disable_msix(adapter->pdev);
3302         kfree(adapter->msix_entries);
3303         adapter->msix_entries = NULL;
3304         return err;
3305 }
3306
3307 /**
3308  * ixgbe_intr - legacy mode Interrupt Handler
3309  * @irq: interrupt number
3310  * @data: pointer to a network interface device structure
3311  **/
3312 static irqreturn_t ixgbe_intr(int irq, void *data)
3313 {
3314         struct ixgbe_adapter *adapter = data;
3315         struct ixgbe_hw *hw = &adapter->hw;
3316         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3317         u32 eicr;
3318
3319         /*
3320          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3321          * before the read of EICR.
3322          */
3323         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3324
3325         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3326          * therefore no explicit interrupt disable is necessary */
3327         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3328         if (!eicr) {
3329                 /*
3330                  * shared interrupt alert!
3331                  * make sure interrupts are enabled because the read will
3332                  * have disabled interrupts due to EIAM
3333                  * finish the workaround of silicon errata on 82598.  Unmask
3334                  * the interrupt that we masked before the EICR read.
3335                  */
3336                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3337                         ixgbe_irq_enable(adapter, true, true);
3338                 return IRQ_NONE;        /* Not our interrupt */
3339         }
3340
3341         if (eicr & IXGBE_EICR_LSC)
3342                 ixgbe_check_lsc(adapter);
3343
3344         switch (hw->mac.type) {
3345         case ixgbe_mac_82599EB:
3346                 ixgbe_check_sfp_event(adapter, eicr);
3347                 /* Fall through */
3348         case ixgbe_mac_X540:
3349         case ixgbe_mac_X550:
3350         case ixgbe_mac_X550EM_x:
3351         case ixgbe_mac_x550em_a:
3352                 if (eicr & IXGBE_EICR_ECC) {
3353                         e_info(link, "Received ECC Err, initiating reset\n");
3354                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3355                         ixgbe_service_event_schedule(adapter);
3356                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3357                 }
3358                 ixgbe_check_overtemp_event(adapter, eicr);
3359                 break;
3360         default:
3361                 break;
3362         }
3363
3364         ixgbe_check_fan_failure(adapter, eicr);
3365         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3366                 ixgbe_ptp_check_pps_event(adapter);
3367
3368         /* would disable interrupts here but EIAM disabled it */
3369         napi_schedule_irqoff(&q_vector->napi);
3370
3371         /*
3372          * re-enable link(maybe) and non-queue interrupts, no flush.
3373          * ixgbe_poll will re-enable the queue interrupts
3374          */
3375         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3376                 ixgbe_irq_enable(adapter, false, false);
3377
3378         return IRQ_HANDLED;
3379 }
3380
3381 /**
3382  * ixgbe_request_irq - initialize interrupts
3383  * @adapter: board private structure
3384  *
3385  * Attempts to configure interrupts using the best available
3386  * capabilities of the hardware and kernel.
3387  **/
3388 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3389 {
3390         struct net_device *netdev = adapter->netdev;
3391         int err;
3392
3393         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3394                 err = ixgbe_request_msix_irqs(adapter);
3395         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3396                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3397                                   netdev->name, adapter);
3398         else
3399                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3400                                   netdev->name, adapter);
3401
3402         if (err)
3403                 e_err(probe, "request_irq failed, Error %d\n", err);
3404
3405         return err;
3406 }
3407
3408 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3409 {
3410         int vector;
3411
3412         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3413                 free_irq(adapter->pdev->irq, adapter);
3414                 return;
3415         }
3416
3417         if (!adapter->msix_entries)
3418                 return;
3419
3420         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3421                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3422                 struct msix_entry *entry = &adapter->msix_entries[vector];
3423
3424                 /* free only the irqs that were actually requested */
3425                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3426                         continue;
3427
3428                 /* clear the affinity_mask in the IRQ descriptor */
3429                 irq_set_affinity_hint(entry->vector, NULL);
3430
3431                 free_irq(entry->vector, q_vector);
3432         }
3433
3434         free_irq(adapter->msix_entries[vector].vector, adapter);
3435 }
3436
3437 /**
3438  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3439  * @adapter: board private structure
3440  **/
3441 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3442 {
3443         switch (adapter->hw.mac.type) {
3444         case ixgbe_mac_82598EB:
3445                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3446                 break;
3447         case ixgbe_mac_82599EB:
3448         case ixgbe_mac_X540:
3449         case ixgbe_mac_X550:
3450         case ixgbe_mac_X550EM_x:
3451         case ixgbe_mac_x550em_a:
3452                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3453                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3454                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3455                 break;
3456         default:
3457                 break;
3458         }
3459         IXGBE_WRITE_FLUSH(&adapter->hw);
3460         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3461                 int vector;
3462
3463                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3464                         synchronize_irq(adapter->msix_entries[vector].vector);
3465
3466                 synchronize_irq(adapter->msix_entries[vector++].vector);
3467         } else {
3468                 synchronize_irq(adapter->pdev->irq);
3469         }
3470 }
3471
3472 /**
3473  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3474  * @adapter: board private structure
3475  *
3476  **/
3477 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3478 {
3479         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3480
3481         ixgbe_write_eitr(q_vector);
3482
3483         ixgbe_set_ivar(adapter, 0, 0, 0);
3484         ixgbe_set_ivar(adapter, 1, 0, 0);
3485
3486         e_info(hw, "Legacy interrupt IVAR setup done\n");
3487 }
3488
3489 /**
3490  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3491  * @adapter: board private structure
3492  * @ring: structure containing ring specific data
3493  *
3494  * Configure the Tx descriptor ring after a reset.
3495  **/
3496 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3497                              struct ixgbe_ring *ring)
3498 {
3499         struct ixgbe_hw *hw = &adapter->hw;
3500         u64 tdba = ring->dma;
3501         int wait_loop = 10;
3502         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3503         u8 reg_idx = ring->reg_idx;
3504
3505         ring->xsk_umem = NULL;
3506         if (ring_is_xdp(ring))
3507                 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3508
3509         /* disable queue to avoid issues while updating state */
3510         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3511         IXGBE_WRITE_FLUSH(hw);
3512
3513         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3514                         (tdba & DMA_BIT_MASK(32)));
3515         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3516         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3517                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3518         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3519         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3520         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3521
3522         /*
3523          * set WTHRESH to encourage burst writeback, it should not be set
3524          * higher than 1 when:
3525          * - ITR is 0 as it could cause false TX hangs
3526          * - ITR is set to > 100k int/sec and BQL is enabled
3527          *
3528          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3529          * to or less than the number of on chip descriptors, which is
3530          * currently 40.
3531          */
3532         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3533                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3534         else
3535                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3536
3537         /*
3538          * Setting PTHRESH to 32 both improves performance
3539          * and avoids a TX hang with DFP enabled
3540          */
3541         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3542                    32;          /* PTHRESH = 32 */
3543
3544         /* reinitialize flowdirector state */
3545         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3546                 ring->atr_sample_rate = adapter->atr_sample_rate;
3547                 ring->atr_count = 0;
3548                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3549         } else {
3550                 ring->atr_sample_rate = 0;
3551         }
3552
3553         /* initialize XPS */
3554         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3555                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3556
3557                 if (q_vector)
3558                         netif_set_xps_queue(ring->netdev,
3559                                             &q_vector->affinity_mask,
3560                                             ring->queue_index);
3561         }
3562
3563         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3564
3565         /* reinitialize tx_buffer_info */
3566         memset(ring->tx_buffer_info, 0,
3567                sizeof(struct ixgbe_tx_buffer) * ring->count);
3568
3569         /* enable queue */
3570         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3571
3572         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3573         if (hw->mac.type == ixgbe_mac_82598EB &&
3574             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3575                 return;
3576
3577         /* poll to verify queue is enabled */
3578         do {
3579                 usleep_range(1000, 2000);
3580                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3581         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3582         if (!wait_loop)
3583                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3584 }
3585
3586 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3587 {
3588         struct ixgbe_hw *hw = &adapter->hw;
3589         u32 rttdcs, mtqc;
3590         u8 tcs = adapter->hw_tcs;
3591
3592         if (hw->mac.type == ixgbe_mac_82598EB)
3593                 return;
3594
3595         /* disable the arbiter while setting MTQC */
3596         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3597         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3598         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3599
3600         /* set transmit pool layout */
3601         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3602                 mtqc = IXGBE_MTQC_VT_ENA;
3603                 if (tcs > 4)
3604                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3605                 else if (tcs > 1)
3606                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3607                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3608                          IXGBE_82599_VMDQ_4Q_MASK)
3609                         mtqc |= IXGBE_MTQC_32VF;
3610                 else
3611                         mtqc |= IXGBE_MTQC_64VF;
3612         } else {
3613                 if (tcs > 4) {
3614                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3615                 } else if (tcs > 1) {
3616                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3617                 } else {
3618                         u8 max_txq = adapter->num_tx_queues +
3619                                 adapter->num_xdp_queues;
3620                         if (max_txq > 63)
3621                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3622                         else
3623                                 mtqc = IXGBE_MTQC_64Q_1PB;
3624                 }
3625         }
3626
3627         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3628
3629         /* Enable Security TX Buffer IFG for multiple pb */
3630         if (tcs) {
3631                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3632                 sectx |= IXGBE_SECTX_DCB;
3633                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3634         }
3635
3636         /* re-enable the arbiter */
3637         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3638         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3639 }
3640
3641 /**
3642  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3643  * @adapter: board private structure
3644  *
3645  * Configure the Tx unit of the MAC after a reset.
3646  **/
3647 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3648 {
3649         struct ixgbe_hw *hw = &adapter->hw;
3650         u32 dmatxctl;
3651         u32 i;
3652
3653         ixgbe_setup_mtqc(adapter);
3654
3655         if (hw->mac.type != ixgbe_mac_82598EB) {
3656                 /* DMATXCTL.EN must be before Tx queues are enabled */
3657                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3658                 dmatxctl |= IXGBE_DMATXCTL_TE;
3659                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3660         }
3661
3662         /* Setup the HW Tx Head and Tail descriptor pointers */
3663         for (i = 0; i < adapter->num_tx_queues; i++)
3664                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3665         for (i = 0; i < adapter->num_xdp_queues; i++)
3666                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3667 }
3668
3669 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3670                                  struct ixgbe_ring *ring)
3671 {
3672         struct ixgbe_hw *hw = &adapter->hw;
3673         u8 reg_idx = ring->reg_idx;
3674         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3675
3676         srrctl |= IXGBE_SRRCTL_DROP_EN;
3677
3678         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3679 }
3680
3681 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3682                                   struct ixgbe_ring *ring)
3683 {
3684         struct ixgbe_hw *hw = &adapter->hw;
3685         u8 reg_idx = ring->reg_idx;
3686         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3687
3688         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3689
3690         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3691 }
3692
3693 #ifdef CONFIG_IXGBE_DCB
3694 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3695 #else
3696 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3697 #endif
3698 {
3699         int i;
3700         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3701
3702         if (adapter->ixgbe_ieee_pfc)
3703                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3704
3705         /*
3706          * We should set the drop enable bit if:
3707          *  SR-IOV is enabled
3708          *   or
3709          *  Number of Rx queues > 1 and flow control is disabled
3710          *
3711          *  This allows us to avoid head of line blocking for security
3712          *  and performance reasons.
3713          */
3714         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3715             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3716                 for (i = 0; i < adapter->num_rx_queues; i++)
3717                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3718         } else {
3719                 for (i = 0; i < adapter->num_rx_queues; i++)
3720                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3721         }
3722 }
3723
3724 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3725
3726 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3727                                    struct ixgbe_ring *rx_ring)
3728 {
3729         struct ixgbe_hw *hw = &adapter->hw;
3730         u32 srrctl;
3731         u8 reg_idx = rx_ring->reg_idx;
3732
3733         if (hw->mac.type == ixgbe_mac_82598EB) {
3734                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3735
3736                 /*
3737                  * if VMDq is not active we must program one srrctl register
3738                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3739                  */
3740                 reg_idx &= mask;
3741         }
3742
3743         /* configure header buffer length, needed for RSC */
3744         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3745
3746         /* configure the packet buffer length */
3747         if (rx_ring->xsk_umem) {
3748                 u32 xsk_buf_len = rx_ring->xsk_umem->chunk_size_nohr -
3749                                   XDP_PACKET_HEADROOM;
3750
3751                 /* If the MAC support setting RXDCTL.RLPML, the
3752                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3753                  * RXDCTL.RLPML is set to the actual UMEM buffer
3754                  * size. If not, then we are stuck with a 1k buffer
3755                  * size resolution. In this case frames larger than
3756                  * the UMEM buffer size viewed in a 1k resolution will
3757                  * be dropped.
3758                  */
3759                 if (hw->mac.type != ixgbe_mac_82599EB)
3760                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3761                 else
3762                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3763         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3764                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3765         } else {
3766                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3767         }
3768
3769         /* configure descriptor type */
3770         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3771
3772         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3773 }
3774
3775 /**
3776  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3777  * @adapter: device handle
3778  *
3779  *  - 82598/82599/X540:     128
3780  *  - X550(non-SRIOV mode): 512
3781  *  - X550(SRIOV mode):     64
3782  */
3783 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3784 {
3785         if (adapter->hw.mac.type < ixgbe_mac_X550)
3786                 return 128;
3787         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3788                 return 64;
3789         else
3790                 return 512;
3791 }
3792
3793 /**
3794  * ixgbe_store_key - Write the RSS key to HW
3795  * @adapter: device handle
3796  *
3797  * Write the RSS key stored in adapter.rss_key to HW.
3798  */
3799 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3800 {
3801         struct ixgbe_hw *hw = &adapter->hw;
3802         int i;
3803
3804         for (i = 0; i < 10; i++)
3805                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3806 }
3807
3808 /**
3809  * ixgbe_init_rss_key - Initialize adapter RSS key
3810  * @adapter: device handle
3811  *
3812  * Allocates and initializes the RSS key if it is not allocated.
3813  **/
3814 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3815 {
3816         u32 *rss_key;
3817
3818         if (!adapter->rss_key) {
3819                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3820                 if (unlikely(!rss_key))
3821                         return -ENOMEM;
3822
3823                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3824                 adapter->rss_key = rss_key;
3825         }
3826
3827         return 0;
3828 }
3829
3830 /**
3831  * ixgbe_store_reta - Write the RETA table to HW
3832  * @adapter: device handle
3833  *
3834  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3835  */
3836 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3837 {
3838         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3839         struct ixgbe_hw *hw = &adapter->hw;
3840         u32 reta = 0;
3841         u32 indices_multi;
3842         u8 *indir_tbl = adapter->rss_indir_tbl;
3843
3844         /* Fill out the redirection table as follows:
3845          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3846          *    indices.
3847          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3848          *  - X550:       8 bit wide entries containing 6 bit RSS index
3849          */
3850         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3851                 indices_multi = 0x11;
3852         else
3853                 indices_multi = 0x1;
3854
3855         /* Write redirection table to HW */
3856         for (i = 0; i < reta_entries; i++) {
3857                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3858                 if ((i & 3) == 3) {
3859                         if (i < 128)
3860                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3861                         else
3862                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3863                                                 reta);
3864                         reta = 0;
3865                 }
3866         }
3867 }
3868
3869 /**
3870  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3871  * @adapter: device handle
3872  *
3873  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3874  */
3875 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3876 {
3877         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3878         struct ixgbe_hw *hw = &adapter->hw;
3879         u32 vfreta = 0;
3880
3881         /* Write redirection table to HW */
3882         for (i = 0; i < reta_entries; i++) {
3883                 u16 pool = adapter->num_rx_pools;
3884
3885                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3886                 if ((i & 3) != 3)
3887                         continue;
3888
3889                 while (pool--)
3890                         IXGBE_WRITE_REG(hw,
3891                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3892                                         vfreta);
3893                 vfreta = 0;
3894         }
3895 }
3896
3897 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3898 {
3899         u32 i, j;
3900         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3901         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3902
3903         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3904          * make full use of any rings they may have.  We will use the
3905          * PSRTYPE register to control how many rings we use within the PF.
3906          */
3907         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3908                 rss_i = 4;
3909
3910         /* Fill out hash function seeds */
3911         ixgbe_store_key(adapter);
3912
3913         /* Fill out redirection table */
3914         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3915
3916         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3917                 if (j == rss_i)
3918                         j = 0;
3919
3920                 adapter->rss_indir_tbl[i] = j;
3921         }
3922
3923         ixgbe_store_reta(adapter);
3924 }
3925
3926 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3927 {
3928         struct ixgbe_hw *hw = &adapter->hw;
3929         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3930         int i, j;
3931
3932         /* Fill out hash function seeds */
3933         for (i = 0; i < 10; i++) {
3934                 u16 pool = adapter->num_rx_pools;
3935
3936                 while (pool--)
3937                         IXGBE_WRITE_REG(hw,
3938                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3939                                         *(adapter->rss_key + i));
3940         }
3941
3942         /* Fill out the redirection table */
3943         for (i = 0, j = 0; i < 64; i++, j++) {
3944                 if (j == rss_i)
3945                         j = 0;
3946
3947                 adapter->rss_indir_tbl[i] = j;
3948         }
3949
3950         ixgbe_store_vfreta(adapter);
3951 }
3952
3953 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3954 {
3955         struct ixgbe_hw *hw = &adapter->hw;
3956         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3957         u32 rxcsum;
3958
3959         /* Disable indicating checksum in descriptor, enables RSS hash */
3960         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3961         rxcsum |= IXGBE_RXCSUM_PCSD;
3962         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3963
3964         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3965                 if (adapter->ring_feature[RING_F_RSS].mask)
3966                         mrqc = IXGBE_MRQC_RSSEN;
3967         } else {
3968                 u8 tcs = adapter->hw_tcs;
3969
3970                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3971                         if (tcs > 4)
3972                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3973                         else if (tcs > 1)
3974                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3975                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3976                                  IXGBE_82599_VMDQ_4Q_MASK)
3977                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3978                         else
3979                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3980
3981                         /* Enable L3/L4 for Tx Switched packets only for X550,
3982                          * older devices do not support this feature
3983                          */
3984                         if (hw->mac.type >= ixgbe_mac_X550)
3985                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3986                 } else {
3987                         if (tcs > 4)
3988                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3989                         else if (tcs > 1)
3990                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3991                         else
3992                                 mrqc = IXGBE_MRQC_RSSEN;
3993                 }
3994         }
3995
3996         /* Perform hash on these packet types */
3997         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3998                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3999                      IXGBE_MRQC_RSS_FIELD_IPV6 |
4000                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
4001
4002         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
4003                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
4004         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
4005                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
4006
4007         if ((hw->mac.type >= ixgbe_mac_X550) &&
4008             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
4009                 u16 pool = adapter->num_rx_pools;
4010
4011                 /* Enable VF RSS mode */
4012                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
4013                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4014
4015                 /* Setup RSS through the VF registers */
4016                 ixgbe_setup_vfreta(adapter);
4017                 vfmrqc = IXGBE_MRQC_RSSEN;
4018                 vfmrqc |= rss_field;
4019
4020                 while (pool--)
4021                         IXGBE_WRITE_REG(hw,
4022                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
4023                                         vfmrqc);
4024         } else {
4025                 ixgbe_setup_reta(adapter);
4026                 mrqc |= rss_field;
4027                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4028         }
4029 }
4030
4031 /**
4032  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4033  * @adapter: address of board private structure
4034  * @ring: structure containing ring specific data
4035  **/
4036 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4037                                    struct ixgbe_ring *ring)
4038 {
4039         struct ixgbe_hw *hw = &adapter->hw;
4040         u32 rscctrl;
4041         u8 reg_idx = ring->reg_idx;
4042
4043         if (!ring_is_rsc_enabled(ring))
4044                 return;
4045
4046         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4047         rscctrl |= IXGBE_RSCCTL_RSCEN;
4048         /*
4049          * we must limit the number of descriptors so that the
4050          * total size of max desc * buf_len is not greater
4051          * than 65536
4052          */
4053         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4054         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4055 }
4056
4057 #define IXGBE_MAX_RX_DESC_POLL 10
4058 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4059                                        struct ixgbe_ring *ring)
4060 {
4061         struct ixgbe_hw *hw = &adapter->hw;
4062         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4063         u32 rxdctl;
4064         u8 reg_idx = ring->reg_idx;
4065
4066         if (ixgbe_removed(hw->hw_addr))
4067                 return;
4068         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4069         if (hw->mac.type == ixgbe_mac_82598EB &&
4070             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4071                 return;
4072
4073         do {
4074                 usleep_range(1000, 2000);
4075                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4076         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4077
4078         if (!wait_loop) {
4079                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4080                       "the polling period\n", reg_idx);
4081         }
4082 }
4083
4084 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4085                              struct ixgbe_ring *ring)
4086 {
4087         struct ixgbe_hw *hw = &adapter->hw;
4088         union ixgbe_adv_rx_desc *rx_desc;
4089         u64 rdba = ring->dma;
4090         u32 rxdctl;
4091         u8 reg_idx = ring->reg_idx;
4092
4093         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4094         ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4095         if (ring->xsk_umem) {
4096                 ring->zca.free = ixgbe_zca_free;
4097                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4098                                                    MEM_TYPE_ZERO_COPY,
4099                                                    &ring->zca));
4100
4101         } else {
4102                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4103                                                    MEM_TYPE_PAGE_SHARED, NULL));
4104         }
4105
4106         /* disable queue to avoid use of these values while updating state */
4107         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4108         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4109
4110         /* write value back with RXDCTL.ENABLE bit cleared */
4111         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4112         IXGBE_WRITE_FLUSH(hw);
4113
4114         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4115         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4116         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4117                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4118         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4119         IXGBE_WRITE_FLUSH(hw);
4120
4121         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4122         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4123         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4124
4125         ixgbe_configure_srrctl(adapter, ring);
4126         ixgbe_configure_rscctl(adapter, ring);
4127
4128         if (hw->mac.type == ixgbe_mac_82598EB) {
4129                 /*
4130                  * enable cache line friendly hardware writes:
4131                  * PTHRESH=32 descriptors (half the internal cache),
4132                  * this also removes ugly rx_no_buffer_count increment
4133                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4134                  * WTHRESH=8 burst writeback up to two cache lines
4135                  */
4136                 rxdctl &= ~0x3FFFFF;
4137                 rxdctl |=  0x080420;
4138 #if (PAGE_SIZE < 8192)
4139         /* RXDCTL.RLPML does not work on 82599 */
4140         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4141                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4142                             IXGBE_RXDCTL_RLPML_EN);
4143
4144                 /* Limit the maximum frame size so we don't overrun the skb.
4145                  * This can happen in SRIOV mode when the MTU of the VF is
4146                  * higher than the MTU of the PF.
4147                  */
4148                 if (ring_uses_build_skb(ring) &&
4149                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4150                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4151                                   IXGBE_RXDCTL_RLPML_EN;
4152 #endif
4153         }
4154
4155         if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4156                 u32 xsk_buf_len = ring->xsk_umem->chunk_size_nohr -
4157                                   XDP_PACKET_HEADROOM;
4158
4159                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4160                             IXGBE_RXDCTL_RLPML_EN);
4161                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4162
4163                 ring->rx_buf_len = xsk_buf_len;
4164         }
4165
4166         /* initialize rx_buffer_info */
4167         memset(ring->rx_buffer_info, 0,
4168                sizeof(struct ixgbe_rx_buffer) * ring->count);
4169
4170         /* initialize Rx descriptor 0 */
4171         rx_desc = IXGBE_RX_DESC(ring, 0);
4172         rx_desc->wb.upper.length = 0;
4173
4174         /* enable receive descriptor ring */
4175         rxdctl |= IXGBE_RXDCTL_ENABLE;
4176         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4177
4178         ixgbe_rx_desc_queue_enable(adapter, ring);
4179         if (ring->xsk_umem)
4180                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4181         else
4182                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4183 }
4184
4185 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4186 {
4187         struct ixgbe_hw *hw = &adapter->hw;
4188         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4189         u16 pool = adapter->num_rx_pools;
4190
4191         /* PSRTYPE must be initialized in non 82598 adapters */
4192         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4193                       IXGBE_PSRTYPE_UDPHDR |
4194                       IXGBE_PSRTYPE_IPV4HDR |
4195                       IXGBE_PSRTYPE_L2HDR |
4196                       IXGBE_PSRTYPE_IPV6HDR;
4197
4198         if (hw->mac.type == ixgbe_mac_82598EB)
4199                 return;
4200
4201         if (rss_i > 3)
4202                 psrtype |= 2u << 29;
4203         else if (rss_i > 1)
4204                 psrtype |= 1u << 29;
4205
4206         while (pool--)
4207                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4208 }
4209
4210 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4211 {
4212         struct ixgbe_hw *hw = &adapter->hw;
4213         u16 pool = adapter->num_rx_pools;
4214         u32 reg_offset, vf_shift, vmolr;
4215         u32 gcr_ext, vmdctl;
4216         int i;
4217
4218         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4219                 return;
4220
4221         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4222         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4223         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4224         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4225         vmdctl |= IXGBE_VT_CTL_REPLEN;
4226         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4227
4228         /* accept untagged packets until a vlan tag is
4229          * specifically set for the VMDQ queue/pool
4230          */
4231         vmolr = IXGBE_VMOLR_AUPE;
4232         while (pool--)
4233                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4234
4235         vf_shift = VMDQ_P(0) % 32;
4236         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4237
4238         /* Enable only the PF's pool for Tx/Rx */
4239         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4240         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4241         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4242         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4243         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4244                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4245
4246         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4247         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4248
4249         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4250         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4251
4252         /*
4253          * Set up VF register offsets for selected VT Mode,
4254          * i.e. 32 or 64 VFs for SR-IOV
4255          */
4256         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4257         case IXGBE_82599_VMDQ_8Q_MASK:
4258                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4259                 break;
4260         case IXGBE_82599_VMDQ_4Q_MASK:
4261                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4262                 break;
4263         default:
4264                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4265                 break;
4266         }
4267
4268         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4269
4270         for (i = 0; i < adapter->num_vfs; i++) {
4271                 /* configure spoof checking */
4272                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4273                                           adapter->vfinfo[i].spoofchk_enabled);
4274
4275                 /* Enable/Disable RSS query feature  */
4276                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4277                                           adapter->vfinfo[i].rss_query_enabled);
4278         }
4279 }
4280
4281 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4282 {
4283         struct ixgbe_hw *hw = &adapter->hw;
4284         struct net_device *netdev = adapter->netdev;
4285         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4286         struct ixgbe_ring *rx_ring;
4287         int i;
4288         u32 mhadd, hlreg0;
4289
4290 #ifdef IXGBE_FCOE
4291         /* adjust max frame to be able to do baby jumbo for FCoE */
4292         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4293             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4294                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4295
4296 #endif /* IXGBE_FCOE */
4297
4298         /* adjust max frame to be at least the size of a standard frame */
4299         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4300                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4301
4302         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4303         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4304                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4305                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4306
4307                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4308         }
4309
4310         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4311         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4312         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4313         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4314
4315         /*
4316          * Setup the HW Rx Head and Tail Descriptor Pointers and
4317          * the Base and Length of the Rx Descriptor Ring
4318          */
4319         for (i = 0; i < adapter->num_rx_queues; i++) {
4320                 rx_ring = adapter->rx_ring[i];
4321
4322                 clear_ring_rsc_enabled(rx_ring);
4323                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4324                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4325
4326                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4327                         set_ring_rsc_enabled(rx_ring);
4328
4329                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4330                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4331
4332                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4333                         continue;
4334
4335                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4336
4337 #if (PAGE_SIZE < 8192)
4338                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4339                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4340
4341                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4342                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4343                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4344 #endif
4345         }
4346 }
4347
4348 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4349 {
4350         struct ixgbe_hw *hw = &adapter->hw;
4351         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4352
4353         switch (hw->mac.type) {
4354         case ixgbe_mac_82598EB:
4355                 /*
4356                  * For VMDq support of different descriptor types or
4357                  * buffer sizes through the use of multiple SRRCTL
4358                  * registers, RDRXCTL.MVMEN must be set to 1
4359                  *
4360                  * also, the manual doesn't mention it clearly but DCA hints
4361                  * will only use queue 0's tags unless this bit is set.  Side
4362                  * effects of setting this bit are only that SRRCTL must be
4363                  * fully programmed [0..15]
4364                  */
4365                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4366                 break;
4367         case ixgbe_mac_X550:
4368         case ixgbe_mac_X550EM_x:
4369         case ixgbe_mac_x550em_a:
4370                 if (adapter->num_vfs)
4371                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4372                 /* fall through */
4373         case ixgbe_mac_82599EB:
4374         case ixgbe_mac_X540:
4375                 /* Disable RSC for ACK packets */
4376                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4377                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4378                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4379                 /* hardware requires some bits to be set by default */
4380                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4381                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4382                 break;
4383         default:
4384                 /* We should do nothing since we don't know this hardware */
4385                 return;
4386         }
4387
4388         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4389 }
4390
4391 /**
4392  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4393  * @adapter: board private structure
4394  *
4395  * Configure the Rx unit of the MAC after a reset.
4396  **/
4397 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4398 {
4399         struct ixgbe_hw *hw = &adapter->hw;
4400         int i;
4401         u32 rxctrl, rfctl;
4402
4403         /* disable receives while setting up the descriptors */
4404         hw->mac.ops.disable_rx(hw);
4405
4406         ixgbe_setup_psrtype(adapter);
4407         ixgbe_setup_rdrxctl(adapter);
4408
4409         /* RSC Setup */
4410         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4411         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4412         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4413                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4414
4415         /* disable NFS filtering */
4416         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4417         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4418
4419         /* Program registers for the distribution of queues */
4420         ixgbe_setup_mrqc(adapter);
4421
4422         /* set_rx_buffer_len must be called before ring initialization */
4423         ixgbe_set_rx_buffer_len(adapter);
4424
4425         /*
4426          * Setup the HW Rx Head and Tail Descriptor Pointers and
4427          * the Base and Length of the Rx Descriptor Ring
4428          */
4429         for (i = 0; i < adapter->num_rx_queues; i++)
4430                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4431
4432         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4433         /* disable drop enable for 82598 parts */
4434         if (hw->mac.type == ixgbe_mac_82598EB)
4435                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4436
4437         /* enable all receives */
4438         rxctrl |= IXGBE_RXCTRL_RXEN;
4439         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4440 }
4441
4442 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4443                                  __be16 proto, u16 vid)
4444 {
4445         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4446         struct ixgbe_hw *hw = &adapter->hw;
4447
4448         /* add VID to filter table */
4449         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4450                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4451
4452         set_bit(vid, adapter->active_vlans);
4453
4454         return 0;
4455 }
4456
4457 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4458 {
4459         u32 vlvf;
4460         int idx;
4461
4462         /* short cut the special case */
4463         if (vlan == 0)
4464                 return 0;
4465
4466         /* Search for the vlan id in the VLVF entries */
4467         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4468                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4469                 if ((vlvf & VLAN_VID_MASK) == vlan)
4470                         break;
4471         }
4472
4473         return idx;
4474 }
4475
4476 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4477 {
4478         struct ixgbe_hw *hw = &adapter->hw;
4479         u32 bits, word;
4480         int idx;
4481
4482         idx = ixgbe_find_vlvf_entry(hw, vid);
4483         if (!idx)
4484                 return;
4485
4486         /* See if any other pools are set for this VLAN filter
4487          * entry other than the PF.
4488          */
4489         word = idx * 2 + (VMDQ_P(0) / 32);
4490         bits = ~BIT(VMDQ_P(0) % 32);
4491         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4492
4493         /* Disable the filter so this falls into the default pool. */
4494         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4495                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4496                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4497                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4498         }
4499 }
4500
4501 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4502                                   __be16 proto, u16 vid)
4503 {
4504         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4505         struct ixgbe_hw *hw = &adapter->hw;
4506
4507         /* remove VID from filter table */
4508         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4509                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4510
4511         clear_bit(vid, adapter->active_vlans);
4512
4513         return 0;
4514 }
4515
4516 /**
4517  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4518  * @adapter: driver data
4519  */
4520 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4521 {
4522         struct ixgbe_hw *hw = &adapter->hw;
4523         u32 vlnctrl;
4524         int i, j;
4525
4526         switch (hw->mac.type) {
4527         case ixgbe_mac_82598EB:
4528                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4529                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4530                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4531                 break;
4532         case ixgbe_mac_82599EB:
4533         case ixgbe_mac_X540:
4534         case ixgbe_mac_X550:
4535         case ixgbe_mac_X550EM_x:
4536         case ixgbe_mac_x550em_a:
4537                 for (i = 0; i < adapter->num_rx_queues; i++) {
4538                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4539
4540                         if (!netif_is_ixgbe(ring->netdev))
4541                                 continue;
4542
4543                         j = ring->reg_idx;
4544                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4545                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4546                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4547                 }
4548                 break;
4549         default:
4550                 break;
4551         }
4552 }
4553
4554 /**
4555  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4556  * @adapter: driver data
4557  */
4558 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4559 {
4560         struct ixgbe_hw *hw = &adapter->hw;
4561         u32 vlnctrl;
4562         int i, j;
4563
4564         switch (hw->mac.type) {
4565         case ixgbe_mac_82598EB:
4566                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4567                 vlnctrl |= IXGBE_VLNCTRL_VME;
4568                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4569                 break;
4570         case ixgbe_mac_82599EB:
4571         case ixgbe_mac_X540:
4572         case ixgbe_mac_X550:
4573         case ixgbe_mac_X550EM_x:
4574         case ixgbe_mac_x550em_a:
4575                 for (i = 0; i < adapter->num_rx_queues; i++) {
4576                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4577
4578                         if (!netif_is_ixgbe(ring->netdev))
4579                                 continue;
4580
4581                         j = ring->reg_idx;
4582                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4583                         vlnctrl |= IXGBE_RXDCTL_VME;
4584                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4585                 }
4586                 break;
4587         default:
4588                 break;
4589         }
4590 }
4591
4592 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4593 {
4594         struct ixgbe_hw *hw = &adapter->hw;
4595         u32 vlnctrl, i;
4596
4597         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4598
4599         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4600         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4601                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4602                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4603         } else {
4604                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4605                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4606                 return;
4607         }
4608
4609         /* Nothing to do for 82598 */
4610         if (hw->mac.type == ixgbe_mac_82598EB)
4611                 return;
4612
4613         /* We are already in VLAN promisc, nothing to do */
4614         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4615                 return;
4616
4617         /* Set flag so we don't redo unnecessary work */
4618         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4619
4620         /* Add PF to all active pools */
4621         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4622                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4623                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4624
4625                 vlvfb |= BIT(VMDQ_P(0) % 32);
4626                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4627         }
4628
4629         /* Set all bits in the VLAN filter table array */
4630         for (i = hw->mac.vft_size; i--;)
4631                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4632 }
4633
4634 #define VFTA_BLOCK_SIZE 8
4635 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4636 {
4637         struct ixgbe_hw *hw = &adapter->hw;
4638         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4639         u32 vid_start = vfta_offset * 32;
4640         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4641         u32 i, vid, word, bits;
4642
4643         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4644                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4645
4646                 /* pull VLAN ID from VLVF */
4647                 vid = vlvf & VLAN_VID_MASK;
4648
4649                 /* only concern outselves with a certain range */
4650                 if (vid < vid_start || vid >= vid_end)
4651                         continue;
4652
4653                 if (vlvf) {
4654                         /* record VLAN ID in VFTA */
4655                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4656
4657                         /* if PF is part of this then continue */
4658                         if (test_bit(vid, adapter->active_vlans))
4659                                 continue;
4660                 }
4661
4662                 /* remove PF from the pool */
4663                 word = i * 2 + VMDQ_P(0) / 32;
4664                 bits = ~BIT(VMDQ_P(0) % 32);
4665                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4666                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4667         }
4668
4669         /* extract values from active_vlans and write back to VFTA */
4670         for (i = VFTA_BLOCK_SIZE; i--;) {
4671                 vid = (vfta_offset + i) * 32;
4672                 word = vid / BITS_PER_LONG;
4673                 bits = vid % BITS_PER_LONG;
4674
4675                 vfta[i] |= adapter->active_vlans[word] >> bits;
4676
4677                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4678         }
4679 }
4680
4681 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4682 {
4683         struct ixgbe_hw *hw = &adapter->hw;
4684         u32 vlnctrl, i;
4685
4686         /* Set VLAN filtering to enabled */
4687         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4688         vlnctrl |= IXGBE_VLNCTRL_VFE;
4689         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4690
4691         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4692             hw->mac.type == ixgbe_mac_82598EB)
4693                 return;
4694
4695         /* We are not in VLAN promisc, nothing to do */
4696         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4697                 return;
4698
4699         /* Set flag so we don't redo unnecessary work */
4700         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4701
4702         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4703                 ixgbe_scrub_vfta(adapter, i);
4704 }
4705
4706 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4707 {
4708         u16 vid = 1;
4709
4710         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4711
4712         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4713                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4714 }
4715
4716 /**
4717  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4718  * @netdev: network interface device structure
4719  *
4720  * Writes multicast address list to the MTA hash table.
4721  * Returns: -ENOMEM on failure
4722  *                0 on no addresses written
4723  *                X on writing X addresses to MTA
4724  **/
4725 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4726 {
4727         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4728         struct ixgbe_hw *hw = &adapter->hw;
4729
4730         if (!netif_running(netdev))
4731                 return 0;
4732
4733         if (hw->mac.ops.update_mc_addr_list)
4734                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4735         else
4736                 return -ENOMEM;
4737
4738 #ifdef CONFIG_PCI_IOV
4739         ixgbe_restore_vf_multicasts(adapter);
4740 #endif
4741
4742         return netdev_mc_count(netdev);
4743 }
4744
4745 #ifdef CONFIG_PCI_IOV
4746 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4747 {
4748         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4749         struct ixgbe_hw *hw = &adapter->hw;
4750         int i;
4751
4752         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4753                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4754
4755                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4756                         hw->mac.ops.set_rar(hw, i,
4757                                             mac_table->addr,
4758                                             mac_table->pool,
4759                                             IXGBE_RAH_AV);
4760                 else
4761                         hw->mac.ops.clear_rar(hw, i);
4762         }
4763 }
4764
4765 #endif
4766 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4767 {
4768         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4769         struct ixgbe_hw *hw = &adapter->hw;
4770         int i;
4771
4772         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4773                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4774                         continue;
4775
4776                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4777
4778                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4779                         hw->mac.ops.set_rar(hw, i,
4780                                             mac_table->addr,
4781                                             mac_table->pool,
4782                                             IXGBE_RAH_AV);
4783                 else
4784                         hw->mac.ops.clear_rar(hw, i);
4785         }
4786 }
4787
4788 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4789 {
4790         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4791         struct ixgbe_hw *hw = &adapter->hw;
4792         int i;
4793
4794         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4795                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4796                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4797         }
4798
4799         ixgbe_sync_mac_table(adapter);
4800 }
4801
4802 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4803 {
4804         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4805         struct ixgbe_hw *hw = &adapter->hw;
4806         int i, count = 0;
4807
4808         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4809                 /* do not count default RAR as available */
4810                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4811                         continue;
4812
4813                 /* only count unused and addresses that belong to us */
4814                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4815                         if (mac_table->pool != pool)
4816                                 continue;
4817                 }
4818
4819                 count++;
4820         }
4821
4822         return count;
4823 }
4824
4825 /* this function destroys the first RAR entry */
4826 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4827 {
4828         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4829         struct ixgbe_hw *hw = &adapter->hw;
4830
4831         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4832         mac_table->pool = VMDQ_P(0);
4833
4834         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4835
4836         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4837                             IXGBE_RAH_AV);
4838 }
4839
4840 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4841                          const u8 *addr, u16 pool)
4842 {
4843         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4844         struct ixgbe_hw *hw = &adapter->hw;
4845         int i;
4846
4847         if (is_zero_ether_addr(addr))
4848                 return -EINVAL;
4849
4850         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4851                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4852                         continue;
4853
4854                 ether_addr_copy(mac_table->addr, addr);
4855                 mac_table->pool = pool;
4856
4857                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4858                                     IXGBE_MAC_STATE_IN_USE;
4859
4860                 ixgbe_sync_mac_table(adapter);
4861
4862                 return i;
4863         }
4864
4865         return -ENOMEM;
4866 }
4867
4868 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4869                          const u8 *addr, u16 pool)
4870 {
4871         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4872         struct ixgbe_hw *hw = &adapter->hw;
4873         int i;
4874
4875         if (is_zero_ether_addr(addr))
4876                 return -EINVAL;
4877
4878         /* search table for addr, if found clear IN_USE flag and sync */
4879         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4880                 /* we can only delete an entry if it is in use */
4881                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4882                         continue;
4883                 /* we only care about entries that belong to the given pool */
4884                 if (mac_table->pool != pool)
4885                         continue;
4886                 /* we only care about a specific MAC address */
4887                 if (!ether_addr_equal(addr, mac_table->addr))
4888                         continue;
4889
4890                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4891                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4892
4893                 ixgbe_sync_mac_table(adapter);
4894
4895                 return 0;
4896         }
4897
4898         return -ENOMEM;
4899 }
4900
4901 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4902 {
4903         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4904         int ret;
4905
4906         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4907
4908         return min_t(int, ret, 0);
4909 }
4910
4911 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4912 {
4913         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4914
4915         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4916
4917         return 0;
4918 }
4919
4920 /**
4921  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4922  * @netdev: network interface device structure
4923  *
4924  * The set_rx_method entry point is called whenever the unicast/multicast
4925  * address list or the network interface flags are updated.  This routine is
4926  * responsible for configuring the hardware for proper unicast, multicast and
4927  * promiscuous mode.
4928  **/
4929 void ixgbe_set_rx_mode(struct net_device *netdev)
4930 {
4931         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4932         struct ixgbe_hw *hw = &adapter->hw;
4933         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4934         netdev_features_t features = netdev->features;
4935         int count;
4936
4937         /* Check for Promiscuous and All Multicast modes */
4938         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4939
4940         /* set all bits that we expect to always be set */
4941         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4942         fctrl |= IXGBE_FCTRL_BAM;
4943         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4944         fctrl |= IXGBE_FCTRL_PMCF;
4945
4946         /* clear the bits we are changing the status of */
4947         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4948         if (netdev->flags & IFF_PROMISC) {
4949                 hw->addr_ctrl.user_set_promisc = true;
4950                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4951                 vmolr |= IXGBE_VMOLR_MPE;
4952                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4953         } else {
4954                 if (netdev->flags & IFF_ALLMULTI) {
4955                         fctrl |= IXGBE_FCTRL_MPE;
4956                         vmolr |= IXGBE_VMOLR_MPE;
4957                 }
4958                 hw->addr_ctrl.user_set_promisc = false;
4959         }
4960
4961         /*
4962          * Write addresses to available RAR registers, if there is not
4963          * sufficient space to store all the addresses then enable
4964          * unicast promiscuous mode
4965          */
4966         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4967                 fctrl |= IXGBE_FCTRL_UPE;
4968                 vmolr |= IXGBE_VMOLR_ROPE;
4969         }
4970
4971         /* Write addresses to the MTA, if the attempt fails
4972          * then we should just turn on promiscuous mode so
4973          * that we can at least receive multicast traffic
4974          */
4975         count = ixgbe_write_mc_addr_list(netdev);
4976         if (count < 0) {
4977                 fctrl |= IXGBE_FCTRL_MPE;
4978                 vmolr |= IXGBE_VMOLR_MPE;
4979         } else if (count) {
4980                 vmolr |= IXGBE_VMOLR_ROMPE;
4981         }
4982
4983         if (hw->mac.type != ixgbe_mac_82598EB) {
4984                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4985                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4986                            IXGBE_VMOLR_ROPE);
4987                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4988         }
4989
4990         /* This is useful for sniffing bad packets. */
4991         if (features & NETIF_F_RXALL) {
4992                 /* UPE and MPE will be handled by normal PROMISC logic
4993                  * in e1000e_set_rx_mode */
4994                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4995                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4996                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4997
4998                 fctrl &= ~(IXGBE_FCTRL_DPF);
4999                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
5000         }
5001
5002         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5003
5004         if (features & NETIF_F_HW_VLAN_CTAG_RX)
5005                 ixgbe_vlan_strip_enable(adapter);
5006         else
5007                 ixgbe_vlan_strip_disable(adapter);
5008
5009         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
5010                 ixgbe_vlan_promisc_disable(adapter);
5011         else
5012                 ixgbe_vlan_promisc_enable(adapter);
5013 }
5014
5015 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
5016 {
5017         int q_idx;
5018
5019         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5020                 napi_enable(&adapter->q_vector[q_idx]->napi);
5021 }
5022
5023 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5024 {
5025         int q_idx;
5026
5027         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5028                 napi_disable(&adapter->q_vector[q_idx]->napi);
5029 }
5030
5031 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5032 {
5033         struct ixgbe_hw *hw = &adapter->hw;
5034         u32 vxlanctrl;
5035
5036         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5037                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5038                 return;
5039
5040         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5041         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5042
5043         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5044                 adapter->vxlan_port = 0;
5045
5046         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5047                 adapter->geneve_port = 0;
5048 }
5049
5050 #ifdef CONFIG_IXGBE_DCB
5051 /**
5052  * ixgbe_configure_dcb - Configure DCB hardware
5053  * @adapter: ixgbe adapter struct
5054  *
5055  * This is called by the driver on open to configure the DCB hardware.
5056  * This is also called by the gennetlink interface when reconfiguring
5057  * the DCB state.
5058  */
5059 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5060 {
5061         struct ixgbe_hw *hw = &adapter->hw;
5062         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5063
5064         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5065                 if (hw->mac.type == ixgbe_mac_82598EB)
5066                         netif_set_gso_max_size(adapter->netdev, 65536);
5067                 return;
5068         }
5069
5070         if (hw->mac.type == ixgbe_mac_82598EB)
5071                 netif_set_gso_max_size(adapter->netdev, 32768);
5072
5073 #ifdef IXGBE_FCOE
5074         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5075                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5076 #endif
5077
5078         /* reconfigure the hardware */
5079         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5080                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5081                                                 DCB_TX_CONFIG);
5082                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5083                                                 DCB_RX_CONFIG);
5084                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5085         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5086                 ixgbe_dcb_hw_ets(&adapter->hw,
5087                                  adapter->ixgbe_ieee_ets,
5088                                  max_frame);
5089                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5090                                         adapter->ixgbe_ieee_pfc->pfc_en,
5091                                         adapter->ixgbe_ieee_ets->prio_tc);
5092         }
5093
5094         /* Enable RSS Hash per TC */
5095         if (hw->mac.type != ixgbe_mac_82598EB) {
5096                 u32 msb = 0;
5097                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5098
5099                 while (rss_i) {
5100                         msb++;
5101                         rss_i >>= 1;
5102                 }
5103
5104                 /* write msb to all 8 TCs in one write */
5105                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5106         }
5107 }
5108 #endif
5109
5110 /* Additional bittime to account for IXGBE framing */
5111 #define IXGBE_ETH_FRAMING 20
5112
5113 /**
5114  * ixgbe_hpbthresh - calculate high water mark for flow control
5115  *
5116  * @adapter: board private structure to calculate for
5117  * @pb: packet buffer to calculate
5118  */
5119 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5120 {
5121         struct ixgbe_hw *hw = &adapter->hw;
5122         struct net_device *dev = adapter->netdev;
5123         int link, tc, kb, marker;
5124         u32 dv_id, rx_pba;
5125
5126         /* Calculate max LAN frame size */
5127         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5128
5129 #ifdef IXGBE_FCOE
5130         /* FCoE traffic class uses FCOE jumbo frames */
5131         if ((dev->features & NETIF_F_FCOE_MTU) &&
5132             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5133             (pb == ixgbe_fcoe_get_tc(adapter)))
5134                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5135 #endif
5136
5137         /* Calculate delay value for device */
5138         switch (hw->mac.type) {
5139         case ixgbe_mac_X540:
5140         case ixgbe_mac_X550:
5141         case ixgbe_mac_X550EM_x:
5142         case ixgbe_mac_x550em_a:
5143                 dv_id = IXGBE_DV_X540(link, tc);
5144                 break;
5145         default:
5146                 dv_id = IXGBE_DV(link, tc);
5147                 break;
5148         }
5149
5150         /* Loopback switch introduces additional latency */
5151         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5152                 dv_id += IXGBE_B2BT(tc);
5153
5154         /* Delay value is calculated in bit times convert to KB */
5155         kb = IXGBE_BT2KB(dv_id);
5156         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5157
5158         marker = rx_pba - kb;
5159
5160         /* It is possible that the packet buffer is not large enough
5161          * to provide required headroom. In this case throw an error
5162          * to user and a do the best we can.
5163          */
5164         if (marker < 0) {
5165                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5166                             "headroom to support flow control."
5167                             "Decrease MTU or number of traffic classes\n", pb);
5168                 marker = tc + 1;
5169         }
5170
5171         return marker;
5172 }
5173
5174 /**
5175  * ixgbe_lpbthresh - calculate low water mark for for flow control
5176  *
5177  * @adapter: board private structure to calculate for
5178  * @pb: packet buffer to calculate
5179  */
5180 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5181 {
5182         struct ixgbe_hw *hw = &adapter->hw;
5183         struct net_device *dev = adapter->netdev;
5184         int tc;
5185         u32 dv_id;
5186
5187         /* Calculate max LAN frame size */
5188         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5189
5190 #ifdef IXGBE_FCOE
5191         /* FCoE traffic class uses FCOE jumbo frames */
5192         if ((dev->features & NETIF_F_FCOE_MTU) &&
5193             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5194             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5195                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5196 #endif
5197
5198         /* Calculate delay value for device */
5199         switch (hw->mac.type) {
5200         case ixgbe_mac_X540:
5201         case ixgbe_mac_X550:
5202         case ixgbe_mac_X550EM_x:
5203         case ixgbe_mac_x550em_a:
5204                 dv_id = IXGBE_LOW_DV_X540(tc);
5205                 break;
5206         default:
5207                 dv_id = IXGBE_LOW_DV(tc);
5208                 break;
5209         }
5210
5211         /* Delay value is calculated in bit times convert to KB */
5212         return IXGBE_BT2KB(dv_id);
5213 }
5214
5215 /*
5216  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5217  */
5218 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5219 {
5220         struct ixgbe_hw *hw = &adapter->hw;
5221         int num_tc = adapter->hw_tcs;
5222         int i;
5223
5224         if (!num_tc)
5225                 num_tc = 1;
5226
5227         for (i = 0; i < num_tc; i++) {
5228                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5229                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5230
5231                 /* Low water marks must not be larger than high water marks */
5232                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5233                         hw->fc.low_water[i] = 0;
5234         }
5235
5236         for (; i < MAX_TRAFFIC_CLASS; i++)
5237                 hw->fc.high_water[i] = 0;
5238 }
5239
5240 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5241 {
5242         struct ixgbe_hw *hw = &adapter->hw;
5243         int hdrm;
5244         u8 tc = adapter->hw_tcs;
5245
5246         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5247             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5248                 hdrm = 32 << adapter->fdir_pballoc;
5249         else
5250                 hdrm = 0;
5251
5252         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5253         ixgbe_pbthresh_setup(adapter);
5254 }
5255
5256 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5257 {
5258         struct ixgbe_hw *hw = &adapter->hw;
5259         struct hlist_node *node2;
5260         struct ixgbe_fdir_filter *filter;
5261         u8 queue;
5262
5263         spin_lock(&adapter->fdir_perfect_lock);
5264
5265         if (!hlist_empty(&adapter->fdir_filter_list))
5266                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5267
5268         hlist_for_each_entry_safe(filter, node2,
5269                                   &adapter->fdir_filter_list, fdir_node) {
5270                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5271                         queue = IXGBE_FDIR_DROP_QUEUE;
5272                 } else {
5273                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5274                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5275
5276                         if (!vf && (ring >= adapter->num_rx_queues)) {
5277                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5278                                       ring);
5279                                 continue;
5280                         } else if (vf &&
5281                                    ((vf > adapter->num_vfs) ||
5282                                      ring >= adapter->num_rx_queues_per_pool)) {
5283                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5284                                       vf, ring);
5285                                 continue;
5286                         }
5287
5288                         /* Map the ring onto the absolute queue index */
5289                         if (!vf)
5290                                 queue = adapter->rx_ring[ring]->reg_idx;
5291                         else
5292                                 queue = ((vf - 1) *
5293                                         adapter->num_rx_queues_per_pool) + ring;
5294                 }
5295
5296                 ixgbe_fdir_write_perfect_filter_82599(hw,
5297                                 &filter->filter, filter->sw_idx, queue);
5298         }
5299
5300         spin_unlock(&adapter->fdir_perfect_lock);
5301 }
5302
5303 /**
5304  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5305  * @rx_ring: ring to free buffers from
5306  **/
5307 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5308 {
5309         u16 i = rx_ring->next_to_clean;
5310         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5311
5312         if (rx_ring->xsk_umem) {
5313                 ixgbe_xsk_clean_rx_ring(rx_ring);
5314                 goto skip_free;
5315         }
5316
5317         /* Free all the Rx ring sk_buffs */
5318         while (i != rx_ring->next_to_alloc) {
5319                 if (rx_buffer->skb) {
5320                         struct sk_buff *skb = rx_buffer->skb;
5321                         if (IXGBE_CB(skb)->page_released)
5322                                 dma_unmap_page_attrs(rx_ring->dev,
5323                                                      IXGBE_CB(skb)->dma,
5324                                                      ixgbe_rx_pg_size(rx_ring),
5325                                                      DMA_FROM_DEVICE,
5326                                                      IXGBE_RX_DMA_ATTR);
5327                         dev_kfree_skb(skb);
5328                 }
5329
5330                 /* Invalidate cache lines that may have been written to by
5331                  * device so that we avoid corrupting memory.
5332                  */
5333                 dma_sync_single_range_for_cpu(rx_ring->dev,
5334                                               rx_buffer->dma,
5335                                               rx_buffer->page_offset,
5336                                               ixgbe_rx_bufsz(rx_ring),
5337                                               DMA_FROM_DEVICE);
5338
5339                 /* free resources associated with mapping */
5340                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5341                                      ixgbe_rx_pg_size(rx_ring),
5342                                      DMA_FROM_DEVICE,
5343                                      IXGBE_RX_DMA_ATTR);
5344                 __page_frag_cache_drain(rx_buffer->page,
5345                                         rx_buffer->pagecnt_bias);
5346
5347                 i++;
5348                 rx_buffer++;
5349                 if (i == rx_ring->count) {
5350                         i = 0;
5351                         rx_buffer = rx_ring->rx_buffer_info;
5352                 }
5353         }
5354
5355 skip_free:
5356         rx_ring->next_to_alloc = 0;
5357         rx_ring->next_to_clean = 0;
5358         rx_ring->next_to_use = 0;
5359 }
5360
5361 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5362                              struct ixgbe_fwd_adapter *accel)
5363 {
5364         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5365         int num_tc = netdev_get_num_tc(adapter->netdev);
5366         struct net_device *vdev = accel->netdev;
5367         int i, baseq, err;
5368
5369         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5370         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5371                    accel->pool, adapter->num_rx_pools,
5372                    baseq, baseq + adapter->num_rx_queues_per_pool);
5373
5374         accel->rx_base_queue = baseq;
5375         accel->tx_base_queue = baseq;
5376
5377         /* record configuration for macvlan interface in vdev */
5378         for (i = 0; i < num_tc; i++)
5379                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5380                                              i, rss_i, baseq + (rss_i * i));
5381
5382         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5383                 adapter->rx_ring[baseq + i]->netdev = vdev;
5384
5385         /* Guarantee all rings are updated before we update the
5386          * MAC address filter.
5387          */
5388         wmb();
5389
5390         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5391          * need to only treat it as an error value if it is negative.
5392          */
5393         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5394                                    VMDQ_P(accel->pool));
5395         if (err >= 0)
5396                 return 0;
5397
5398         /* if we cannot add the MAC rule then disable the offload */
5399         macvlan_release_l2fw_offload(vdev);
5400
5401         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5402                 adapter->rx_ring[baseq + i]->netdev = NULL;
5403
5404         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5405
5406         /* unbind the queues and drop the subordinate channel config */
5407         netdev_unbind_sb_channel(adapter->netdev, vdev);
5408         netdev_set_sb_channel(vdev, 0);
5409
5410         clear_bit(accel->pool, adapter->fwd_bitmask);
5411         kfree(accel);
5412
5413         return err;
5414 }
5415
5416 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5417 {
5418         struct ixgbe_adapter *adapter = data;
5419         struct ixgbe_fwd_adapter *accel;
5420
5421         if (!netif_is_macvlan(vdev))
5422                 return 0;
5423
5424         accel = macvlan_accel_priv(vdev);
5425         if (!accel)
5426                 return 0;
5427
5428         ixgbe_fwd_ring_up(adapter, accel);
5429
5430         return 0;
5431 }
5432
5433 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5434 {
5435         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5436                                       ixgbe_macvlan_up, adapter);
5437 }
5438
5439 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5440 {
5441         struct ixgbe_hw *hw = &adapter->hw;
5442
5443         ixgbe_configure_pb(adapter);
5444 #ifdef CONFIG_IXGBE_DCB
5445         ixgbe_configure_dcb(adapter);
5446 #endif
5447         /*
5448          * We must restore virtualization before VLANs or else
5449          * the VLVF registers will not be populated
5450          */
5451         ixgbe_configure_virtualization(adapter);
5452
5453         ixgbe_set_rx_mode(adapter->netdev);
5454         ixgbe_restore_vlan(adapter);
5455         ixgbe_ipsec_restore(adapter);
5456
5457         switch (hw->mac.type) {
5458         case ixgbe_mac_82599EB:
5459         case ixgbe_mac_X540:
5460                 hw->mac.ops.disable_rx_buff(hw);
5461                 break;
5462         default:
5463                 break;
5464         }
5465
5466         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5467                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5468                                                 adapter->fdir_pballoc);
5469         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5470                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5471                                               adapter->fdir_pballoc);
5472                 ixgbe_fdir_filter_restore(adapter);
5473         }
5474
5475         switch (hw->mac.type) {
5476         case ixgbe_mac_82599EB:
5477         case ixgbe_mac_X540:
5478                 hw->mac.ops.enable_rx_buff(hw);
5479                 break;
5480         default:
5481                 break;
5482         }
5483
5484 #ifdef CONFIG_IXGBE_DCA
5485         /* configure DCA */
5486         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5487                 ixgbe_setup_dca(adapter);
5488 #endif /* CONFIG_IXGBE_DCA */
5489
5490 #ifdef IXGBE_FCOE
5491         /* configure FCoE L2 filters, redirection table, and Rx control */
5492         ixgbe_configure_fcoe(adapter);
5493
5494 #endif /* IXGBE_FCOE */
5495         ixgbe_configure_tx(adapter);
5496         ixgbe_configure_rx(adapter);
5497         ixgbe_configure_dfwd(adapter);
5498 }
5499
5500 /**
5501  * ixgbe_sfp_link_config - set up SFP+ link
5502  * @adapter: pointer to private adapter struct
5503  **/
5504 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5505 {
5506         /*
5507          * We are assuming the worst case scenario here, and that
5508          * is that an SFP was inserted/removed after the reset
5509          * but before SFP detection was enabled.  As such the best
5510          * solution is to just start searching as soon as we start
5511          */
5512         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5513                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5514
5515         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5516         adapter->sfp_poll_time = 0;
5517 }
5518
5519 /**
5520  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5521  * @hw: pointer to private hardware struct
5522  *
5523  * Returns 0 on success, negative on failure
5524  **/
5525 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5526 {
5527         u32 speed;
5528         bool autoneg, link_up = false;
5529         int ret = IXGBE_ERR_LINK_SETUP;
5530
5531         if (hw->mac.ops.check_link)
5532                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5533
5534         if (ret)
5535                 return ret;
5536
5537         speed = hw->phy.autoneg_advertised;
5538         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5539                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5540                                                         &autoneg);
5541         if (ret)
5542                 return ret;
5543
5544         if (hw->mac.ops.setup_link)
5545                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5546
5547         return ret;
5548 }
5549
5550 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5551 {
5552         struct ixgbe_hw *hw = &adapter->hw;
5553         u32 gpie = 0;
5554
5555         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5556                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5557                        IXGBE_GPIE_OCD;
5558                 gpie |= IXGBE_GPIE_EIAME;
5559                 /*
5560                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5561                  * this saves a register write for every interrupt
5562                  */
5563                 switch (hw->mac.type) {
5564                 case ixgbe_mac_82598EB:
5565                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5566                         break;
5567                 case ixgbe_mac_82599EB:
5568                 case ixgbe_mac_X540:
5569                 case ixgbe_mac_X550:
5570                 case ixgbe_mac_X550EM_x:
5571                 case ixgbe_mac_x550em_a:
5572                 default:
5573                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5574                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5575                         break;
5576                 }
5577         } else {
5578                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5579                  * specifically only auto mask tx and rx interrupts */
5580                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5581         }
5582
5583         /* XXX: to interrupt immediately for EICS writes, enable this */
5584         /* gpie |= IXGBE_GPIE_EIMEN; */
5585
5586         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5587                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5588
5589                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5590                 case IXGBE_82599_VMDQ_8Q_MASK:
5591                         gpie |= IXGBE_GPIE_VTMODE_16;
5592                         break;
5593                 case IXGBE_82599_VMDQ_4Q_MASK:
5594                         gpie |= IXGBE_GPIE_VTMODE_32;
5595                         break;
5596                 default:
5597                         gpie |= IXGBE_GPIE_VTMODE_64;
5598                         break;
5599                 }
5600         }
5601
5602         /* Enable Thermal over heat sensor interrupt */
5603         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5604                 switch (adapter->hw.mac.type) {
5605                 case ixgbe_mac_82599EB:
5606                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5607                         break;
5608                 default:
5609                         break;
5610                 }
5611         }
5612
5613         /* Enable fan failure interrupt */
5614         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5615                 gpie |= IXGBE_SDP1_GPIEN(hw);
5616
5617         switch (hw->mac.type) {
5618         case ixgbe_mac_82599EB:
5619                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5620                 break;
5621         case ixgbe_mac_X550EM_x:
5622         case ixgbe_mac_x550em_a:
5623                 gpie |= IXGBE_SDP0_GPIEN_X540;
5624                 break;
5625         default:
5626                 break;
5627         }
5628
5629         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5630 }
5631
5632 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5633 {
5634         struct ixgbe_hw *hw = &adapter->hw;
5635         int err;
5636         u32 ctrl_ext;
5637
5638         ixgbe_get_hw_control(adapter);
5639         ixgbe_setup_gpie(adapter);
5640
5641         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5642                 ixgbe_configure_msix(adapter);
5643         else
5644                 ixgbe_configure_msi_and_legacy(adapter);
5645
5646         /* enable the optics for 82599 SFP+ fiber */
5647         if (hw->mac.ops.enable_tx_laser)
5648                 hw->mac.ops.enable_tx_laser(hw);
5649
5650         if (hw->phy.ops.set_phy_power)
5651                 hw->phy.ops.set_phy_power(hw, true);
5652
5653         smp_mb__before_atomic();
5654         clear_bit(__IXGBE_DOWN, &adapter->state);
5655         ixgbe_napi_enable_all(adapter);
5656
5657         if (ixgbe_is_sfp(hw)) {
5658                 ixgbe_sfp_link_config(adapter);
5659         } else {
5660                 err = ixgbe_non_sfp_link_config(hw);
5661                 if (err)
5662                         e_err(probe, "link_config FAILED %d\n", err);
5663         }
5664
5665         /* clear any pending interrupts, may auto mask */
5666         IXGBE_READ_REG(hw, IXGBE_EICR);
5667         ixgbe_irq_enable(adapter, true, true);
5668
5669         /*
5670          * If this adapter has a fan, check to see if we had a failure
5671          * before we enabled the interrupt.
5672          */
5673         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5674                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5675                 if (esdp & IXGBE_ESDP_SDP1)
5676                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5677         }
5678
5679         /* bring the link up in the watchdog, this could race with our first
5680          * link up interrupt but shouldn't be a problem */
5681         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5682         adapter->link_check_timeout = jiffies;
5683         mod_timer(&adapter->service_timer, jiffies);
5684
5685         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5686         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5687         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5688         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5689 }
5690
5691 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5692 {
5693         WARN_ON(in_interrupt());
5694         /* put off any impending NetWatchDogTimeout */
5695         netif_trans_update(adapter->netdev);
5696
5697         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5698                 usleep_range(1000, 2000);
5699         if (adapter->hw.phy.type == ixgbe_phy_fw)
5700                 ixgbe_watchdog_link_is_down(adapter);
5701         ixgbe_down(adapter);
5702         /*
5703          * If SR-IOV enabled then wait a bit before bringing the adapter
5704          * back up to give the VFs time to respond to the reset.  The
5705          * two second wait is based upon the watchdog timer cycle in
5706          * the VF driver.
5707          */
5708         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5709                 msleep(2000);
5710         ixgbe_up(adapter);
5711         clear_bit(__IXGBE_RESETTING, &adapter->state);
5712 }
5713
5714 void ixgbe_up(struct ixgbe_adapter *adapter)
5715 {
5716         /* hardware has been reset, we need to reload some things */
5717         ixgbe_configure(adapter);
5718
5719         ixgbe_up_complete(adapter);
5720 }
5721
5722 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5723 {
5724         u16 devctl2;
5725
5726         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5727
5728         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5729         case IXGBE_PCIDEVCTRL2_17_34s:
5730         case IXGBE_PCIDEVCTRL2_4_8s:
5731                 /* For now we cap the upper limit on delay to 2 seconds
5732                  * as we end up going up to 34 seconds of delay in worst
5733                  * case timeout value.
5734                  */
5735         case IXGBE_PCIDEVCTRL2_1_2s:
5736                 return 2000000ul;       /* 2.0 s */
5737         case IXGBE_PCIDEVCTRL2_260_520ms:
5738                 return 520000ul;        /* 520 ms */
5739         case IXGBE_PCIDEVCTRL2_65_130ms:
5740                 return 130000ul;        /* 130 ms */
5741         case IXGBE_PCIDEVCTRL2_16_32ms:
5742                 return 32000ul;         /* 32 ms */
5743         case IXGBE_PCIDEVCTRL2_1_2ms:
5744                 return 2000ul;          /* 2 ms */
5745         case IXGBE_PCIDEVCTRL2_50_100us:
5746                 return 100ul;           /* 100 us */
5747         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5748                 return 32000ul;         /* 32 ms */
5749         default:
5750                 break;
5751         }
5752
5753         /* We shouldn't need to hit this path, but just in case default as
5754          * though completion timeout is not supported and support 32ms.
5755          */
5756         return 32000ul;
5757 }
5758
5759 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5760 {
5761         unsigned long wait_delay, delay_interval;
5762         struct ixgbe_hw *hw = &adapter->hw;
5763         int i, wait_loop;
5764         u32 rxdctl;
5765
5766         /* disable receives */
5767         hw->mac.ops.disable_rx(hw);
5768
5769         if (ixgbe_removed(hw->hw_addr))
5770                 return;
5771
5772         /* disable all enabled Rx queues */
5773         for (i = 0; i < adapter->num_rx_queues; i++) {
5774                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5775                 u8 reg_idx = ring->reg_idx;
5776
5777                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5778                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5779                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5780
5781                 /* write value back with RXDCTL.ENABLE bit cleared */
5782                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5783         }
5784
5785         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5786         if (hw->mac.type == ixgbe_mac_82598EB &&
5787             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5788                 return;
5789
5790         /* Determine our minimum delay interval. We will increase this value
5791          * with each subsequent test. This way if the device returns quickly
5792          * we should spend as little time as possible waiting, however as
5793          * the time increases we will wait for larger periods of time.
5794          *
5795          * The trick here is that we increase the interval using the
5796          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5797          * of that wait is that it totals up to 100x whatever interval we
5798          * choose. Since our minimum wait is 100us we can just divide the
5799          * total timeout by 100 to get our minimum delay interval.
5800          */
5801         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5802
5803         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5804         wait_delay = delay_interval;
5805
5806         while (wait_loop--) {
5807                 usleep_range(wait_delay, wait_delay + 10);
5808                 wait_delay += delay_interval * 2;
5809                 rxdctl = 0;
5810
5811                 /* OR together the reading of all the active RXDCTL registers,
5812                  * and then test the result. We need the disable to complete
5813                  * before we start freeing the memory and invalidating the
5814                  * DMA mappings.
5815                  */
5816                 for (i = 0; i < adapter->num_rx_queues; i++) {
5817                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5818                         u8 reg_idx = ring->reg_idx;
5819
5820                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5821                 }
5822
5823                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5824                         return;
5825         }
5826
5827         e_err(drv,
5828               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5829 }
5830
5831 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5832 {
5833         unsigned long wait_delay, delay_interval;
5834         struct ixgbe_hw *hw = &adapter->hw;
5835         int i, wait_loop;
5836         u32 txdctl;
5837
5838         if (ixgbe_removed(hw->hw_addr))
5839                 return;
5840
5841         /* disable all enabled Tx queues */
5842         for (i = 0; i < adapter->num_tx_queues; i++) {
5843                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5844                 u8 reg_idx = ring->reg_idx;
5845
5846                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5847         }
5848
5849         /* disable all enabled XDP Tx queues */
5850         for (i = 0; i < adapter->num_xdp_queues; i++) {
5851                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5852                 u8 reg_idx = ring->reg_idx;
5853
5854                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5855         }
5856
5857         /* If the link is not up there shouldn't be much in the way of
5858          * pending transactions. Those that are left will be flushed out
5859          * when the reset logic goes through the flush sequence to clean out
5860          * the pending Tx transactions.
5861          */
5862         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5863                 goto dma_engine_disable;
5864
5865         /* Determine our minimum delay interval. We will increase this value
5866          * with each subsequent test. This way if the device returns quickly
5867          * we should spend as little time as possible waiting, however as
5868          * the time increases we will wait for larger periods of time.
5869          *
5870          * The trick here is that we increase the interval using the
5871          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5872          * of that wait is that it totals up to 100x whatever interval we
5873          * choose. Since our minimum wait is 100us we can just divide the
5874          * total timeout by 100 to get our minimum delay interval.
5875          */
5876         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5877
5878         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5879         wait_delay = delay_interval;
5880
5881         while (wait_loop--) {
5882                 usleep_range(wait_delay, wait_delay + 10);
5883                 wait_delay += delay_interval * 2;
5884                 txdctl = 0;
5885
5886                 /* OR together the reading of all the active TXDCTL registers,
5887                  * and then test the result. We need the disable to complete
5888                  * before we start freeing the memory and invalidating the
5889                  * DMA mappings.
5890                  */
5891                 for (i = 0; i < adapter->num_tx_queues; i++) {
5892                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5893                         u8 reg_idx = ring->reg_idx;
5894
5895                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5896                 }
5897                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5898                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5899                         u8 reg_idx = ring->reg_idx;
5900
5901                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5902                 }
5903
5904                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5905                         goto dma_engine_disable;
5906         }
5907
5908         e_err(drv,
5909               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5910
5911 dma_engine_disable:
5912         /* Disable the Tx DMA engine on 82599 and later MAC */
5913         switch (hw->mac.type) {
5914         case ixgbe_mac_82599EB:
5915         case ixgbe_mac_X540:
5916         case ixgbe_mac_X550:
5917         case ixgbe_mac_X550EM_x:
5918         case ixgbe_mac_x550em_a:
5919                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5920                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5921                                  ~IXGBE_DMATXCTL_TE));
5922                 /* fall through */
5923         default:
5924                 break;
5925         }
5926 }
5927
5928 void ixgbe_reset(struct ixgbe_adapter *adapter)
5929 {
5930         struct ixgbe_hw *hw = &adapter->hw;
5931         struct net_device *netdev = adapter->netdev;
5932         int err;
5933
5934         if (ixgbe_removed(hw->hw_addr))
5935                 return;
5936         /* lock SFP init bit to prevent race conditions with the watchdog */
5937         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5938                 usleep_range(1000, 2000);
5939
5940         /* clear all SFP and link config related flags while holding SFP_INIT */
5941         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5942                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5943         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5944
5945         err = hw->mac.ops.init_hw(hw);
5946         switch (err) {
5947         case 0:
5948         case IXGBE_ERR_SFP_NOT_PRESENT:
5949         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5950                 break;
5951         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5952                 e_dev_err("master disable timed out\n");
5953                 break;
5954         case IXGBE_ERR_EEPROM_VERSION:
5955                 /* We are running on a pre-production device, log a warning */
5956                 e_dev_warn("This device is a pre-production adapter/LOM. "
5957                            "Please be aware there may be issues associated with "
5958                            "your hardware.  If you are experiencing problems "
5959                            "please contact your Intel or hardware "
5960                            "representative who provided you with this "
5961                            "hardware.\n");
5962                 break;
5963         default:
5964                 e_dev_err("Hardware Error: %d\n", err);
5965         }
5966
5967         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5968
5969         /* flush entries out of MAC table */
5970         ixgbe_flush_sw_mac_table(adapter);
5971         __dev_uc_unsync(netdev, NULL);
5972
5973         /* do not flush user set addresses */
5974         ixgbe_mac_set_default_filter(adapter);
5975
5976         /* update SAN MAC vmdq pool selection */
5977         if (hw->mac.san_mac_rar_index)
5978                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5979
5980         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5981                 ixgbe_ptp_reset(adapter);
5982
5983         if (hw->phy.ops.set_phy_power) {
5984                 if (!netif_running(adapter->netdev) && !adapter->wol)
5985                         hw->phy.ops.set_phy_power(hw, false);
5986                 else
5987                         hw->phy.ops.set_phy_power(hw, true);
5988         }
5989 }
5990
5991 /**
5992  * ixgbe_clean_tx_ring - Free Tx Buffers
5993  * @tx_ring: ring to be cleaned
5994  **/
5995 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5996 {
5997         u16 i = tx_ring->next_to_clean;
5998         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5999
6000         if (tx_ring->xsk_umem) {
6001                 ixgbe_xsk_clean_tx_ring(tx_ring);
6002                 goto out;
6003         }
6004
6005         while (i != tx_ring->next_to_use) {
6006                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
6007
6008                 /* Free all the Tx ring sk_buffs */
6009                 if (ring_is_xdp(tx_ring))
6010                         xdp_return_frame(tx_buffer->xdpf);
6011                 else
6012                         dev_kfree_skb_any(tx_buffer->skb);
6013
6014                 /* unmap skb header data */
6015                 dma_unmap_single(tx_ring->dev,
6016                                  dma_unmap_addr(tx_buffer, dma),
6017                                  dma_unmap_len(tx_buffer, len),
6018                                  DMA_TO_DEVICE);
6019
6020                 /* check for eop_desc to determine the end of the packet */
6021                 eop_desc = tx_buffer->next_to_watch;
6022                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6023
6024                 /* unmap remaining buffers */
6025                 while (tx_desc != eop_desc) {
6026                         tx_buffer++;
6027                         tx_desc++;
6028                         i++;
6029                         if (unlikely(i == tx_ring->count)) {
6030                                 i = 0;
6031                                 tx_buffer = tx_ring->tx_buffer_info;
6032                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6033                         }
6034
6035                         /* unmap any remaining paged data */
6036                         if (dma_unmap_len(tx_buffer, len))
6037                                 dma_unmap_page(tx_ring->dev,
6038                                                dma_unmap_addr(tx_buffer, dma),
6039                                                dma_unmap_len(tx_buffer, len),
6040                                                DMA_TO_DEVICE);
6041                 }
6042
6043                 /* move us one more past the eop_desc for start of next pkt */
6044                 tx_buffer++;
6045                 i++;
6046                 if (unlikely(i == tx_ring->count)) {
6047                         i = 0;
6048                         tx_buffer = tx_ring->tx_buffer_info;
6049                 }
6050         }
6051
6052         /* reset BQL for queue */
6053         if (!ring_is_xdp(tx_ring))
6054                 netdev_tx_reset_queue(txring_txq(tx_ring));
6055
6056 out:
6057         /* reset next_to_use and next_to_clean */
6058         tx_ring->next_to_use = 0;
6059         tx_ring->next_to_clean = 0;
6060 }
6061
6062 /**
6063  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6064  * @adapter: board private structure
6065  **/
6066 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6067 {
6068         int i;
6069
6070         for (i = 0; i < adapter->num_rx_queues; i++)
6071                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6072 }
6073
6074 /**
6075  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6076  * @adapter: board private structure
6077  **/
6078 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6079 {
6080         int i;
6081
6082         for (i = 0; i < adapter->num_tx_queues; i++)
6083                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6084         for (i = 0; i < adapter->num_xdp_queues; i++)
6085                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6086 }
6087
6088 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6089 {
6090         struct hlist_node *node2;
6091         struct ixgbe_fdir_filter *filter;
6092
6093         spin_lock(&adapter->fdir_perfect_lock);
6094
6095         hlist_for_each_entry_safe(filter, node2,
6096                                   &adapter->fdir_filter_list, fdir_node) {
6097                 hlist_del(&filter->fdir_node);
6098                 kfree(filter);
6099         }
6100         adapter->fdir_filter_count = 0;
6101
6102         spin_unlock(&adapter->fdir_perfect_lock);
6103 }
6104
6105 void ixgbe_down(struct ixgbe_adapter *adapter)
6106 {
6107         struct net_device *netdev = adapter->netdev;
6108         struct ixgbe_hw *hw = &adapter->hw;
6109         int i;
6110
6111         /* signal that we are down to the interrupt handler */
6112         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6113                 return; /* do nothing if already down */
6114
6115         /* Shut off incoming Tx traffic */
6116         netif_tx_stop_all_queues(netdev);
6117
6118         /* call carrier off first to avoid false dev_watchdog timeouts */
6119         netif_carrier_off(netdev);
6120         netif_tx_disable(netdev);
6121
6122         /* Disable Rx */
6123         ixgbe_disable_rx(adapter);
6124
6125         /* synchronize_rcu() needed for pending XDP buffers to drain */
6126         if (adapter->xdp_ring[0])
6127                 synchronize_rcu();
6128
6129         ixgbe_irq_disable(adapter);
6130
6131         ixgbe_napi_disable_all(adapter);
6132
6133         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6134         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6135         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6136
6137         del_timer_sync(&adapter->service_timer);
6138
6139         if (adapter->num_vfs) {
6140                 /* Clear EITR Select mapping */
6141                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6142
6143                 /* Mark all the VFs as inactive */
6144                 for (i = 0 ; i < adapter->num_vfs; i++)
6145                         adapter->vfinfo[i].clear_to_send = false;
6146
6147                 /* ping all the active vfs to let them know we are going down */
6148                 ixgbe_ping_all_vfs(adapter);
6149
6150                 /* Disable all VFTE/VFRE TX/RX */
6151                 ixgbe_disable_tx_rx(adapter);
6152         }
6153
6154         /* disable transmits in the hardware now that interrupts are off */
6155         ixgbe_disable_tx(adapter);
6156
6157         if (!pci_channel_offline(adapter->pdev))
6158                 ixgbe_reset(adapter);
6159
6160         /* power down the optics for 82599 SFP+ fiber */
6161         if (hw->mac.ops.disable_tx_laser)
6162                 hw->mac.ops.disable_tx_laser(hw);
6163
6164         ixgbe_clean_all_tx_rings(adapter);
6165         ixgbe_clean_all_rx_rings(adapter);
6166 }
6167
6168 /**
6169  * ixgbe_eee_capable - helper function to determine EEE support on X550
6170  * @adapter: board private structure
6171  */
6172 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6173 {
6174         struct ixgbe_hw *hw = &adapter->hw;
6175
6176         switch (hw->device_id) {
6177         case IXGBE_DEV_ID_X550EM_A_1G_T:
6178         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6179                 if (!hw->phy.eee_speeds_supported)
6180                         break;
6181                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6182                 if (!hw->phy.eee_speeds_advertised)
6183                         break;
6184                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6185                 break;
6186         default:
6187                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6188                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6189                 break;
6190         }
6191 }
6192
6193 /**
6194  * ixgbe_tx_timeout - Respond to a Tx Hang
6195  * @netdev: network interface device structure
6196  **/
6197 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int txqueue)
6198 {
6199         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6200
6201         /* Do the reset outside of interrupt context */
6202         ixgbe_tx_timeout_reset(adapter);
6203 }
6204
6205 #ifdef CONFIG_IXGBE_DCB
6206 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6207 {
6208         struct ixgbe_hw *hw = &adapter->hw;
6209         struct tc_configuration *tc;
6210         int j;
6211
6212         switch (hw->mac.type) {
6213         case ixgbe_mac_82598EB:
6214         case ixgbe_mac_82599EB:
6215                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6216                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6217                 break;
6218         case ixgbe_mac_X540:
6219         case ixgbe_mac_X550:
6220                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6221                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6222                 break;
6223         case ixgbe_mac_X550EM_x:
6224         case ixgbe_mac_x550em_a:
6225         default:
6226                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6227                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6228                 break;
6229         }
6230
6231         /* Configure DCB traffic classes */
6232         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6233                 tc = &adapter->dcb_cfg.tc_config[j];
6234                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6235                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6236                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6237                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6238                 tc->dcb_pfc = pfc_disabled;
6239         }
6240
6241         /* Initialize default user to priority mapping, UPx->TC0 */
6242         tc = &adapter->dcb_cfg.tc_config[0];
6243         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6244         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6245
6246         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6247         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6248         adapter->dcb_cfg.pfc_mode_enable = false;
6249         adapter->dcb_set_bitmap = 0x00;
6250         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6251                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6252         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6253                sizeof(adapter->temp_dcb_cfg));
6254 }
6255 #endif
6256
6257 /**
6258  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6259  * @adapter: board private structure to initialize
6260  * @ii: pointer to ixgbe_info for device
6261  *
6262  * ixgbe_sw_init initializes the Adapter private data structure.
6263  * Fields are initialized based on PCI device information and
6264  * OS network device settings (MTU size).
6265  **/
6266 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6267                          const struct ixgbe_info *ii)
6268 {
6269         struct ixgbe_hw *hw = &adapter->hw;
6270         struct pci_dev *pdev = adapter->pdev;
6271         unsigned int rss, fdir;
6272         u32 fwsm;
6273         int i;
6274
6275         /* PCI config space info */
6276
6277         hw->vendor_id = pdev->vendor;
6278         hw->device_id = pdev->device;
6279         hw->revision_id = pdev->revision;
6280         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6281         hw->subsystem_device_id = pdev->subsystem_device;
6282
6283         /* get_invariants needs the device IDs */
6284         ii->get_invariants(hw);
6285
6286         /* Set common capability flags and settings */
6287         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6288         adapter->ring_feature[RING_F_RSS].limit = rss;
6289         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6290         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6291         adapter->atr_sample_rate = 20;
6292         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6293         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6294         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6295         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6296 #ifdef CONFIG_IXGBE_DCA
6297         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6298 #endif
6299 #ifdef CONFIG_IXGBE_DCB
6300         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6301         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6302 #endif
6303 #ifdef IXGBE_FCOE
6304         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6305         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6306 #ifdef CONFIG_IXGBE_DCB
6307         /* Default traffic class to use for FCoE */
6308         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6309 #endif /* CONFIG_IXGBE_DCB */
6310 #endif /* IXGBE_FCOE */
6311
6312         /* initialize static ixgbe jump table entries */
6313         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6314                                           GFP_KERNEL);
6315         if (!adapter->jump_tables[0])
6316                 return -ENOMEM;
6317         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6318
6319         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6320                 adapter->jump_tables[i] = NULL;
6321
6322         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6323                                      sizeof(struct ixgbe_mac_addr),
6324                                      GFP_KERNEL);
6325         if (!adapter->mac_table)
6326                 return -ENOMEM;
6327
6328         if (ixgbe_init_rss_key(adapter))
6329                 return -ENOMEM;
6330
6331         adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6332         if (!adapter->af_xdp_zc_qps)
6333                 return -ENOMEM;
6334
6335         /* Set MAC specific capability flags and exceptions */
6336         switch (hw->mac.type) {
6337         case ixgbe_mac_82598EB:
6338                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6339
6340                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6341                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6342
6343                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6344                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6345                 adapter->atr_sample_rate = 0;
6346                 adapter->fdir_pballoc = 0;
6347 #ifdef IXGBE_FCOE
6348                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6349                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6350 #ifdef CONFIG_IXGBE_DCB
6351                 adapter->fcoe.up = 0;
6352 #endif /* IXGBE_DCB */
6353 #endif /* IXGBE_FCOE */
6354                 break;
6355         case ixgbe_mac_82599EB:
6356                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6357                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6358                 break;
6359         case ixgbe_mac_X540:
6360                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6361                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6362                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6363                 break;
6364         case ixgbe_mac_x550em_a:
6365                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6366                 switch (hw->device_id) {
6367                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6368                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6369                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6370                         break;
6371                 default:
6372                         break;
6373                 }
6374         /* fall through */
6375         case ixgbe_mac_X550EM_x:
6376 #ifdef CONFIG_IXGBE_DCB
6377                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6378 #endif
6379 #ifdef IXGBE_FCOE
6380                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6381 #ifdef CONFIG_IXGBE_DCB
6382                 adapter->fcoe.up = 0;
6383 #endif /* IXGBE_DCB */
6384 #endif /* IXGBE_FCOE */
6385         /* Fall Through */
6386         case ixgbe_mac_X550:
6387                 if (hw->mac.type == ixgbe_mac_X550)
6388                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6389 #ifdef CONFIG_IXGBE_DCA
6390                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6391 #endif
6392                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6393                 break;
6394         default:
6395                 break;
6396         }
6397
6398 #ifdef IXGBE_FCOE
6399         /* FCoE support exists, always init the FCoE lock */
6400         spin_lock_init(&adapter->fcoe.lock);
6401
6402 #endif
6403         /* n-tuple support exists, always init our spinlock */
6404         spin_lock_init(&adapter->fdir_perfect_lock);
6405
6406 #ifdef CONFIG_IXGBE_DCB
6407         ixgbe_init_dcb(adapter);
6408 #endif
6409         ixgbe_init_ipsec_offload(adapter);
6410
6411         /* default flow control settings */
6412         hw->fc.requested_mode = ixgbe_fc_full;
6413         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6414         ixgbe_pbthresh_setup(adapter);
6415         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6416         hw->fc.send_xon = true;
6417         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6418
6419 #ifdef CONFIG_PCI_IOV
6420         if (max_vfs > 0)
6421                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6422
6423         /* assign number of SR-IOV VFs */
6424         if (hw->mac.type != ixgbe_mac_82598EB) {
6425                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6426                         max_vfs = 0;
6427                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6428                 }
6429         }
6430 #endif /* CONFIG_PCI_IOV */
6431
6432         /* enable itr by default in dynamic mode */
6433         adapter->rx_itr_setting = 1;
6434         adapter->tx_itr_setting = 1;
6435
6436         /* set default ring sizes */
6437         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6438         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6439
6440         /* set default work limits */
6441         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6442
6443         /* initialize eeprom parameters */
6444         if (ixgbe_init_eeprom_params_generic(hw)) {
6445                 e_dev_err("EEPROM initialization failed\n");
6446                 return -EIO;
6447         }
6448
6449         /* PF holds first pool slot */
6450         set_bit(0, adapter->fwd_bitmask);
6451         set_bit(__IXGBE_DOWN, &adapter->state);
6452
6453         return 0;
6454 }
6455
6456 /**
6457  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6458  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6459  *
6460  * Return 0 on success, negative on failure
6461  **/
6462 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6463 {
6464         struct device *dev = tx_ring->dev;
6465         int orig_node = dev_to_node(dev);
6466         int ring_node = NUMA_NO_NODE;
6467         int size;
6468
6469         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6470
6471         if (tx_ring->q_vector)
6472                 ring_node = tx_ring->q_vector->numa_node;
6473
6474         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6475         if (!tx_ring->tx_buffer_info)
6476                 tx_ring->tx_buffer_info = vmalloc(size);
6477         if (!tx_ring->tx_buffer_info)
6478                 goto err;
6479
6480         /* round up to nearest 4K */
6481         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6482         tx_ring->size = ALIGN(tx_ring->size, 4096);
6483
6484         set_dev_node(dev, ring_node);
6485         tx_ring->desc = dma_alloc_coherent(dev,
6486                                            tx_ring->size,
6487                                            &tx_ring->dma,
6488                                            GFP_KERNEL);
6489         set_dev_node(dev, orig_node);
6490         if (!tx_ring->desc)
6491                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6492                                                    &tx_ring->dma, GFP_KERNEL);
6493         if (!tx_ring->desc)
6494                 goto err;
6495
6496         tx_ring->next_to_use = 0;
6497         tx_ring->next_to_clean = 0;
6498         return 0;
6499
6500 err:
6501         vfree(tx_ring->tx_buffer_info);
6502         tx_ring->tx_buffer_info = NULL;
6503         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6504         return -ENOMEM;
6505 }
6506
6507 /**
6508  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6509  * @adapter: board private structure
6510  *
6511  * If this function returns with an error, then it's possible one or
6512  * more of the rings is populated (while the rest are not).  It is the
6513  * callers duty to clean those orphaned rings.
6514  *
6515  * Return 0 on success, negative on failure
6516  **/
6517 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6518 {
6519         int i, j = 0, err = 0;
6520
6521         for (i = 0; i < adapter->num_tx_queues; i++) {
6522                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6523                 if (!err)
6524                         continue;
6525
6526                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6527                 goto err_setup_tx;
6528         }
6529         for (j = 0; j < adapter->num_xdp_queues; j++) {
6530                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6531                 if (!err)
6532                         continue;
6533
6534                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6535                 goto err_setup_tx;
6536         }
6537
6538         return 0;
6539 err_setup_tx:
6540         /* rewind the index freeing the rings as we go */
6541         while (j--)
6542                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6543         while (i--)
6544                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6545         return err;
6546 }
6547
6548 /**
6549  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6550  * @adapter: pointer to ixgbe_adapter
6551  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6552  *
6553  * Returns 0 on success, negative on failure
6554  **/
6555 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6556                              struct ixgbe_ring *rx_ring)
6557 {
6558         struct device *dev = rx_ring->dev;
6559         int orig_node = dev_to_node(dev);
6560         int ring_node = NUMA_NO_NODE;
6561         int size;
6562
6563         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6564
6565         if (rx_ring->q_vector)
6566                 ring_node = rx_ring->q_vector->numa_node;
6567
6568         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6569         if (!rx_ring->rx_buffer_info)
6570                 rx_ring->rx_buffer_info = vmalloc(size);
6571         if (!rx_ring->rx_buffer_info)
6572                 goto err;
6573
6574         /* Round up to nearest 4K */
6575         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6576         rx_ring->size = ALIGN(rx_ring->size, 4096);
6577
6578         set_dev_node(dev, ring_node);
6579         rx_ring->desc = dma_alloc_coherent(dev,
6580                                            rx_ring->size,
6581                                            &rx_ring->dma,
6582                                            GFP_KERNEL);
6583         set_dev_node(dev, orig_node);
6584         if (!rx_ring->desc)
6585                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6586                                                    &rx_ring->dma, GFP_KERNEL);
6587         if (!rx_ring->desc)
6588                 goto err;
6589
6590         rx_ring->next_to_clean = 0;
6591         rx_ring->next_to_use = 0;
6592
6593         /* XDP RX-queue info */
6594         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6595                              rx_ring->queue_index) < 0)
6596                 goto err;
6597
6598         rx_ring->xdp_prog = adapter->xdp_prog;
6599
6600         return 0;
6601 err:
6602         vfree(rx_ring->rx_buffer_info);
6603         rx_ring->rx_buffer_info = NULL;
6604         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6605         return -ENOMEM;
6606 }
6607
6608 /**
6609  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6610  * @adapter: board private structure
6611  *
6612  * If this function returns with an error, then it's possible one or
6613  * more of the rings is populated (while the rest are not).  It is the
6614  * callers duty to clean those orphaned rings.
6615  *
6616  * Return 0 on success, negative on failure
6617  **/
6618 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6619 {
6620         int i, err = 0;
6621
6622         for (i = 0; i < adapter->num_rx_queues; i++) {
6623                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6624                 if (!err)
6625                         continue;
6626
6627                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6628                 goto err_setup_rx;
6629         }
6630
6631 #ifdef IXGBE_FCOE
6632         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6633         if (!err)
6634 #endif
6635                 return 0;
6636 err_setup_rx:
6637         /* rewind the index freeing the rings as we go */
6638         while (i--)
6639                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6640         return err;
6641 }
6642
6643 /**
6644  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6645  * @tx_ring: Tx descriptor ring for a specific queue
6646  *
6647  * Free all transmit software resources
6648  **/
6649 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6650 {
6651         ixgbe_clean_tx_ring(tx_ring);
6652
6653         vfree(tx_ring->tx_buffer_info);
6654         tx_ring->tx_buffer_info = NULL;
6655
6656         /* if not set, then don't free */
6657         if (!tx_ring->desc)
6658                 return;
6659
6660         dma_free_coherent(tx_ring->dev, tx_ring->size,
6661                           tx_ring->desc, tx_ring->dma);
6662
6663         tx_ring->desc = NULL;
6664 }
6665
6666 /**
6667  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6668  * @adapter: board private structure
6669  *
6670  * Free all transmit software resources
6671  **/
6672 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6673 {
6674         int i;
6675
6676         for (i = 0; i < adapter->num_tx_queues; i++)
6677                 if (adapter->tx_ring[i]->desc)
6678                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6679         for (i = 0; i < adapter->num_xdp_queues; i++)
6680                 if (adapter->xdp_ring[i]->desc)
6681                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6682 }
6683
6684 /**
6685  * ixgbe_free_rx_resources - Free Rx Resources
6686  * @rx_ring: ring to clean the resources from
6687  *
6688  * Free all receive software resources
6689  **/
6690 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6691 {
6692         ixgbe_clean_rx_ring(rx_ring);
6693
6694         rx_ring->xdp_prog = NULL;
6695         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6696         vfree(rx_ring->rx_buffer_info);
6697         rx_ring->rx_buffer_info = NULL;
6698
6699         /* if not set, then don't free */
6700         if (!rx_ring->desc)
6701                 return;
6702
6703         dma_free_coherent(rx_ring->dev, rx_ring->size,
6704                           rx_ring->desc, rx_ring->dma);
6705
6706         rx_ring->desc = NULL;
6707 }
6708
6709 /**
6710  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6711  * @adapter: board private structure
6712  *
6713  * Free all receive software resources
6714  **/
6715 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6716 {
6717         int i;
6718
6719 #ifdef IXGBE_FCOE
6720         ixgbe_free_fcoe_ddp_resources(adapter);
6721
6722 #endif
6723         for (i = 0; i < adapter->num_rx_queues; i++)
6724                 if (adapter->rx_ring[i]->desc)
6725                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6726 }
6727
6728 /**
6729  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6730  * @netdev: network interface device structure
6731  * @new_mtu: new value for maximum frame size
6732  *
6733  * Returns 0 on success, negative on failure
6734  **/
6735 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6736 {
6737         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6738
6739         if (adapter->xdp_prog) {
6740                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6741                                      VLAN_HLEN;
6742                 int i;
6743
6744                 for (i = 0; i < adapter->num_rx_queues; i++) {
6745                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6746
6747                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6748                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6749                                 return -EINVAL;
6750                         }
6751                 }
6752         }
6753
6754         /*
6755          * For 82599EB we cannot allow legacy VFs to enable their receive
6756          * paths when MTU greater than 1500 is configured.  So display a
6757          * warning that legacy VFs will be disabled.
6758          */
6759         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6760             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6761             (new_mtu > ETH_DATA_LEN))
6762                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6763
6764         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6765                    netdev->mtu, new_mtu);
6766
6767         /* must set new MTU before calling down or up */
6768         netdev->mtu = new_mtu;
6769
6770         if (netif_running(netdev))
6771                 ixgbe_reinit_locked(adapter);
6772
6773         return 0;
6774 }
6775
6776 /**
6777  * ixgbe_open - Called when a network interface is made active
6778  * @netdev: network interface device structure
6779  *
6780  * Returns 0 on success, negative value on failure
6781  *
6782  * The open entry point is called when a network interface is made
6783  * active by the system (IFF_UP).  At this point all resources needed
6784  * for transmit and receive operations are allocated, the interrupt
6785  * handler is registered with the OS, the watchdog timer is started,
6786  * and the stack is notified that the interface is ready.
6787  **/
6788 int ixgbe_open(struct net_device *netdev)
6789 {
6790         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6791         struct ixgbe_hw *hw = &adapter->hw;
6792         int err, queues;
6793
6794         /* disallow open during test */
6795         if (test_bit(__IXGBE_TESTING, &adapter->state))
6796                 return -EBUSY;
6797
6798         netif_carrier_off(netdev);
6799
6800         /* allocate transmit descriptors */
6801         err = ixgbe_setup_all_tx_resources(adapter);
6802         if (err)
6803                 goto err_setup_tx;
6804
6805         /* allocate receive descriptors */
6806         err = ixgbe_setup_all_rx_resources(adapter);
6807         if (err)
6808                 goto err_setup_rx;
6809
6810         ixgbe_configure(adapter);
6811
6812         err = ixgbe_request_irq(adapter);
6813         if (err)
6814                 goto err_req_irq;
6815
6816         /* Notify the stack of the actual queue counts. */
6817         queues = adapter->num_tx_queues;
6818         err = netif_set_real_num_tx_queues(netdev, queues);
6819         if (err)
6820                 goto err_set_queues;
6821
6822         queues = adapter->num_rx_queues;
6823         err = netif_set_real_num_rx_queues(netdev, queues);
6824         if (err)
6825                 goto err_set_queues;
6826
6827         ixgbe_ptp_init(adapter);
6828
6829         ixgbe_up_complete(adapter);
6830
6831         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6832         udp_tunnel_get_rx_info(netdev);
6833
6834         return 0;
6835
6836 err_set_queues:
6837         ixgbe_free_irq(adapter);
6838 err_req_irq:
6839         ixgbe_free_all_rx_resources(adapter);
6840         if (hw->phy.ops.set_phy_power && !adapter->wol)
6841                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6842 err_setup_rx:
6843         ixgbe_free_all_tx_resources(adapter);
6844 err_setup_tx:
6845         ixgbe_reset(adapter);
6846
6847         return err;
6848 }
6849
6850 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6851 {
6852         ixgbe_ptp_suspend(adapter);
6853
6854         if (adapter->hw.phy.ops.enter_lplu) {
6855                 adapter->hw.phy.reset_disable = true;
6856                 ixgbe_down(adapter);
6857                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6858                 adapter->hw.phy.reset_disable = false;
6859         } else {
6860                 ixgbe_down(adapter);
6861         }
6862
6863         ixgbe_free_irq(adapter);
6864
6865         ixgbe_free_all_tx_resources(adapter);
6866         ixgbe_free_all_rx_resources(adapter);
6867 }
6868
6869 /**
6870  * ixgbe_close - Disables a network interface
6871  * @netdev: network interface device structure
6872  *
6873  * Returns 0, this is not allowed to fail
6874  *
6875  * The close entry point is called when an interface is de-activated
6876  * by the OS.  The hardware is still under the drivers control, but
6877  * needs to be disabled.  A global MAC reset is issued to stop the
6878  * hardware, and all transmit and receive resources are freed.
6879  **/
6880 int ixgbe_close(struct net_device *netdev)
6881 {
6882         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6883
6884         ixgbe_ptp_stop(adapter);
6885
6886         if (netif_device_present(netdev))
6887                 ixgbe_close_suspend(adapter);
6888
6889         ixgbe_fdir_filter_exit(adapter);
6890
6891         ixgbe_release_hw_control(adapter);
6892
6893         return 0;
6894 }
6895
6896 #ifdef CONFIG_PM
6897 static int ixgbe_resume(struct pci_dev *pdev)
6898 {
6899         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6900         struct net_device *netdev = adapter->netdev;
6901         u32 err;
6902
6903         adapter->hw.hw_addr = adapter->io_addr;
6904         pci_set_power_state(pdev, PCI_D0);
6905         pci_restore_state(pdev);
6906         /*
6907          * pci_restore_state clears dev->state_saved so call
6908          * pci_save_state to restore it.
6909          */
6910         pci_save_state(pdev);
6911
6912         err = pci_enable_device_mem(pdev);
6913         if (err) {
6914                 e_dev_err("Cannot enable PCI device from suspend\n");
6915                 return err;
6916         }
6917         smp_mb__before_atomic();
6918         clear_bit(__IXGBE_DISABLED, &adapter->state);
6919         pci_set_master(pdev);
6920
6921         pci_wake_from_d3(pdev, false);
6922
6923         ixgbe_reset(adapter);
6924
6925         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6926
6927         rtnl_lock();
6928         err = ixgbe_init_interrupt_scheme(adapter);
6929         if (!err && netif_running(netdev))
6930                 err = ixgbe_open(netdev);
6931
6932
6933         if (!err)
6934                 netif_device_attach(netdev);
6935         rtnl_unlock();
6936
6937         return err;
6938 }
6939 #endif /* CONFIG_PM */
6940
6941 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6942 {
6943         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6944         struct net_device *netdev = adapter->netdev;
6945         struct ixgbe_hw *hw = &adapter->hw;
6946         u32 ctrl;
6947         u32 wufc = adapter->wol;
6948 #ifdef CONFIG_PM
6949         int retval = 0;
6950 #endif
6951
6952         rtnl_lock();
6953         netif_device_detach(netdev);
6954
6955         if (netif_running(netdev))
6956                 ixgbe_close_suspend(adapter);
6957
6958         ixgbe_clear_interrupt_scheme(adapter);
6959         rtnl_unlock();
6960
6961 #ifdef CONFIG_PM
6962         retval = pci_save_state(pdev);
6963         if (retval)
6964                 return retval;
6965
6966 #endif
6967         if (hw->mac.ops.stop_link_on_d3)
6968                 hw->mac.ops.stop_link_on_d3(hw);
6969
6970         if (wufc) {
6971                 u32 fctrl;
6972
6973                 ixgbe_set_rx_mode(netdev);
6974
6975                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6976                 if (hw->mac.ops.enable_tx_laser)
6977                         hw->mac.ops.enable_tx_laser(hw);
6978
6979                 /* enable the reception of multicast packets */
6980                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6981                 fctrl |= IXGBE_FCTRL_MPE;
6982                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6983
6984                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6985                 ctrl |= IXGBE_CTRL_GIO_DIS;
6986                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6987
6988                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6989         } else {
6990                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6991                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6992         }
6993
6994         switch (hw->mac.type) {
6995         case ixgbe_mac_82598EB:
6996                 pci_wake_from_d3(pdev, false);
6997                 break;
6998         case ixgbe_mac_82599EB:
6999         case ixgbe_mac_X540:
7000         case ixgbe_mac_X550:
7001         case ixgbe_mac_X550EM_x:
7002         case ixgbe_mac_x550em_a:
7003                 pci_wake_from_d3(pdev, !!wufc);
7004                 break;
7005         default:
7006                 break;
7007         }
7008
7009         *enable_wake = !!wufc;
7010         if (hw->phy.ops.set_phy_power && !*enable_wake)
7011                 hw->phy.ops.set_phy_power(hw, false);
7012
7013         ixgbe_release_hw_control(adapter);
7014
7015         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
7016                 pci_disable_device(pdev);
7017
7018         return 0;
7019 }
7020
7021 #ifdef CONFIG_PM
7022 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
7023 {
7024         int retval;
7025         bool wake;
7026
7027         retval = __ixgbe_shutdown(pdev, &wake);
7028         if (retval)
7029                 return retval;
7030
7031         if (wake) {
7032                 pci_prepare_to_sleep(pdev);
7033         } else {
7034                 pci_wake_from_d3(pdev, false);
7035                 pci_set_power_state(pdev, PCI_D3hot);
7036         }
7037
7038         return 0;
7039 }
7040 #endif /* CONFIG_PM */
7041
7042 static void ixgbe_shutdown(struct pci_dev *pdev)
7043 {
7044         bool wake;
7045
7046         __ixgbe_shutdown(pdev, &wake);
7047
7048         if (system_state == SYSTEM_POWER_OFF) {
7049                 pci_wake_from_d3(pdev, wake);
7050                 pci_set_power_state(pdev, PCI_D3hot);
7051         }
7052 }
7053
7054 /**
7055  * ixgbe_update_stats - Update the board statistics counters.
7056  * @adapter: board private structure
7057  **/
7058 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7059 {
7060         struct net_device *netdev = adapter->netdev;
7061         struct ixgbe_hw *hw = &adapter->hw;
7062         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7063         u64 total_mpc = 0;
7064         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7065         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7066         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7067         u64 alloc_rx_page = 0;
7068         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7069
7070         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7071             test_bit(__IXGBE_RESETTING, &adapter->state))
7072                 return;
7073
7074         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7075                 u64 rsc_count = 0;
7076                 u64 rsc_flush = 0;
7077                 for (i = 0; i < adapter->num_rx_queues; i++) {
7078                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7079                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7080                 }
7081                 adapter->rsc_total_count = rsc_count;
7082                 adapter->rsc_total_flush = rsc_flush;
7083         }
7084
7085         for (i = 0; i < adapter->num_rx_queues; i++) {
7086                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
7087                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7088                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7089                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7090                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7091                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7092                 bytes += rx_ring->stats.bytes;
7093                 packets += rx_ring->stats.packets;
7094         }
7095         adapter->non_eop_descs = non_eop_descs;
7096         adapter->alloc_rx_page = alloc_rx_page;
7097         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7098         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7099         adapter->hw_csum_rx_error = hw_csum_rx_error;
7100         netdev->stats.rx_bytes = bytes;
7101         netdev->stats.rx_packets = packets;
7102
7103         bytes = 0;
7104         packets = 0;
7105         /* gather some stats to the adapter struct that are per queue */
7106         for (i = 0; i < adapter->num_tx_queues; i++) {
7107                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7108                 restart_queue += tx_ring->tx_stats.restart_queue;
7109                 tx_busy += tx_ring->tx_stats.tx_busy;
7110                 bytes += tx_ring->stats.bytes;
7111                 packets += tx_ring->stats.packets;
7112         }
7113         for (i = 0; i < adapter->num_xdp_queues; i++) {
7114                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
7115
7116                 restart_queue += xdp_ring->tx_stats.restart_queue;
7117                 tx_busy += xdp_ring->tx_stats.tx_busy;
7118                 bytes += xdp_ring->stats.bytes;
7119                 packets += xdp_ring->stats.packets;
7120         }
7121         adapter->restart_queue = restart_queue;
7122         adapter->tx_busy = tx_busy;
7123         netdev->stats.tx_bytes = bytes;
7124         netdev->stats.tx_packets = packets;
7125
7126         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7127
7128         /* 8 register reads */
7129         for (i = 0; i < 8; i++) {
7130                 /* for packet buffers not used, the register should read 0 */
7131                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7132                 missed_rx += mpc;
7133                 hwstats->mpc[i] += mpc;
7134                 total_mpc += hwstats->mpc[i];
7135                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7136                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7137                 switch (hw->mac.type) {
7138                 case ixgbe_mac_82598EB:
7139                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7140                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7141                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7142                         hwstats->pxonrxc[i] +=
7143                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7144                         break;
7145                 case ixgbe_mac_82599EB:
7146                 case ixgbe_mac_X540:
7147                 case ixgbe_mac_X550:
7148                 case ixgbe_mac_X550EM_x:
7149                 case ixgbe_mac_x550em_a:
7150                         hwstats->pxonrxc[i] +=
7151                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7152                         break;
7153                 default:
7154                         break;
7155                 }
7156         }
7157
7158         /*16 register reads */
7159         for (i = 0; i < 16; i++) {
7160                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7161                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7162                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7163                     (hw->mac.type == ixgbe_mac_X540) ||
7164                     (hw->mac.type == ixgbe_mac_X550) ||
7165                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7166                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7167                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7168                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7169                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7170                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7171                 }
7172         }
7173
7174         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7175         /* work around hardware counting issue */
7176         hwstats->gprc -= missed_rx;
7177
7178         ixgbe_update_xoff_received(adapter);
7179
7180         /* 82598 hardware only has a 32 bit counter in the high register */
7181         switch (hw->mac.type) {
7182         case ixgbe_mac_82598EB:
7183                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7184                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7185                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7186                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7187                 break;
7188         case ixgbe_mac_X540:
7189         case ixgbe_mac_X550:
7190         case ixgbe_mac_X550EM_x:
7191         case ixgbe_mac_x550em_a:
7192                 /* OS2BMC stats are X540 and later */
7193                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7194                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7195                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7196                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7197                 /* fall through */
7198         case ixgbe_mac_82599EB:
7199                 for (i = 0; i < 16; i++)
7200                         adapter->hw_rx_no_dma_resources +=
7201                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7202                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7203                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7204                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7205                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7206                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7207                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7208                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7209                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7210                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7211 #ifdef IXGBE_FCOE
7212                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7213                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7214                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7215                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7216                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7217                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7218                 /* Add up per cpu counters for total ddp aloc fail */
7219                 if (adapter->fcoe.ddp_pool) {
7220                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7221                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7222                         unsigned int cpu;
7223                         u64 noddp = 0, noddp_ext_buff = 0;
7224                         for_each_possible_cpu(cpu) {
7225                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7226                                 noddp += ddp_pool->noddp;
7227                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7228                         }
7229                         hwstats->fcoe_noddp = noddp;
7230                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7231                 }
7232 #endif /* IXGBE_FCOE */
7233                 break;
7234         default:
7235                 break;
7236         }
7237         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7238         hwstats->bprc += bprc;
7239         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7240         if (hw->mac.type == ixgbe_mac_82598EB)
7241                 hwstats->mprc -= bprc;
7242         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7243         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7244         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7245         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7246         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7247         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7248         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7249         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7250         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7251         hwstats->lxontxc += lxon;
7252         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7253         hwstats->lxofftxc += lxoff;
7254         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7255         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7256         /*
7257          * 82598 errata - tx of flow control packets is included in tx counters
7258          */
7259         xon_off_tot = lxon + lxoff;
7260         hwstats->gptc -= xon_off_tot;
7261         hwstats->mptc -= xon_off_tot;
7262         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7263         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7264         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7265         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7266         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7267         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7268         hwstats->ptc64 -= xon_off_tot;
7269         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7270         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7271         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7272         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7273         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7274         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7275
7276         /* Fill out the OS statistics structure */
7277         netdev->stats.multicast = hwstats->mprc;
7278
7279         /* Rx Errors */
7280         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7281         netdev->stats.rx_dropped = 0;
7282         netdev->stats.rx_length_errors = hwstats->rlec;
7283         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7284         netdev->stats.rx_missed_errors = total_mpc;
7285 }
7286
7287 /**
7288  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7289  * @adapter: pointer to the device adapter structure
7290  **/
7291 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7292 {
7293         struct ixgbe_hw *hw = &adapter->hw;
7294         int i;
7295
7296         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7297                 return;
7298
7299         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7300
7301         /* if interface is down do nothing */
7302         if (test_bit(__IXGBE_DOWN, &adapter->state))
7303                 return;
7304
7305         /* do nothing if we are not using signature filters */
7306         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7307                 return;
7308
7309         adapter->fdir_overflow++;
7310
7311         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7312                 for (i = 0; i < adapter->num_tx_queues; i++)
7313                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7314                                 &(adapter->tx_ring[i]->state));
7315                 for (i = 0; i < adapter->num_xdp_queues; i++)
7316                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7317                                 &adapter->xdp_ring[i]->state);
7318                 /* re-enable flow director interrupts */
7319                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7320         } else {
7321                 e_err(probe, "failed to finish FDIR re-initialization, "
7322                       "ignored adding FDIR ATR filters\n");
7323         }
7324 }
7325
7326 /**
7327  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7328  * @adapter: pointer to the device adapter structure
7329  *
7330  * This function serves two purposes.  First it strobes the interrupt lines
7331  * in order to make certain interrupts are occurring.  Secondly it sets the
7332  * bits needed to check for TX hangs.  As a result we should immediately
7333  * determine if a hang has occurred.
7334  */
7335 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7336 {
7337         struct ixgbe_hw *hw = &adapter->hw;
7338         u64 eics = 0;
7339         int i;
7340
7341         /* If we're down, removing or resetting, just bail */
7342         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7343             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7344             test_bit(__IXGBE_RESETTING, &adapter->state))
7345                 return;
7346
7347         /* Force detection of hung controller */
7348         if (netif_carrier_ok(adapter->netdev)) {
7349                 for (i = 0; i < adapter->num_tx_queues; i++)
7350                         set_check_for_tx_hang(adapter->tx_ring[i]);
7351                 for (i = 0; i < adapter->num_xdp_queues; i++)
7352                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7353         }
7354
7355         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7356                 /*
7357                  * for legacy and MSI interrupts don't set any bits
7358                  * that are enabled for EIAM, because this operation
7359                  * would set *both* EIMS and EICS for any bit in EIAM
7360                  */
7361                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7362                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7363         } else {
7364                 /* get one bit for every active tx/rx interrupt vector */
7365                 for (i = 0; i < adapter->num_q_vectors; i++) {
7366                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7367                         if (qv->rx.ring || qv->tx.ring)
7368                                 eics |= BIT_ULL(i);
7369                 }
7370         }
7371
7372         /* Cause software interrupt to ensure rings are cleaned */
7373         ixgbe_irq_rearm_queues(adapter, eics);
7374 }
7375
7376 /**
7377  * ixgbe_watchdog_update_link - update the link status
7378  * @adapter: pointer to the device adapter structure
7379  **/
7380 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7381 {
7382         struct ixgbe_hw *hw = &adapter->hw;
7383         u32 link_speed = adapter->link_speed;
7384         bool link_up = adapter->link_up;
7385         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7386
7387         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7388                 return;
7389
7390         if (hw->mac.ops.check_link) {
7391                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7392         } else {
7393                 /* always assume link is up, if no check link function */
7394                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7395                 link_up = true;
7396         }
7397
7398         if (adapter->ixgbe_ieee_pfc)
7399                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7400
7401         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7402                 hw->mac.ops.fc_enable(hw);
7403                 ixgbe_set_rx_drop_en(adapter);
7404         }
7405
7406         if (link_up ||
7407             time_after(jiffies, (adapter->link_check_timeout +
7408                                  IXGBE_TRY_LINK_TIMEOUT))) {
7409                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7410                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7411                 IXGBE_WRITE_FLUSH(hw);
7412         }
7413
7414         adapter->link_up = link_up;
7415         adapter->link_speed = link_speed;
7416 }
7417
7418 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7419 {
7420 #ifdef CONFIG_IXGBE_DCB
7421         struct net_device *netdev = adapter->netdev;
7422         struct dcb_app app = {
7423                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7424                               .protocol = 0,
7425                              };
7426         u8 up = 0;
7427
7428         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7429                 up = dcb_ieee_getapp_mask(netdev, &app);
7430
7431         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7432 #endif
7433 }
7434
7435 /**
7436  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7437  *                             print link up message
7438  * @adapter: pointer to the device adapter structure
7439  **/
7440 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7441 {
7442         struct net_device *netdev = adapter->netdev;
7443         struct ixgbe_hw *hw = &adapter->hw;
7444         u32 link_speed = adapter->link_speed;
7445         const char *speed_str;
7446         bool flow_rx, flow_tx;
7447
7448         /* only continue if link was previously down */
7449         if (netif_carrier_ok(netdev))
7450                 return;
7451
7452         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7453
7454         switch (hw->mac.type) {
7455         case ixgbe_mac_82598EB: {
7456                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7457                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7458                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7459                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7460         }
7461                 break;
7462         case ixgbe_mac_X540:
7463         case ixgbe_mac_X550:
7464         case ixgbe_mac_X550EM_x:
7465         case ixgbe_mac_x550em_a:
7466         case ixgbe_mac_82599EB: {
7467                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7468                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7469                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7470                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7471         }
7472                 break;
7473         default:
7474                 flow_tx = false;
7475                 flow_rx = false;
7476                 break;
7477         }
7478
7479         adapter->last_rx_ptp_check = jiffies;
7480
7481         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7482                 ixgbe_ptp_start_cyclecounter(adapter);
7483
7484         switch (link_speed) {
7485         case IXGBE_LINK_SPEED_10GB_FULL:
7486                 speed_str = "10 Gbps";
7487                 break;
7488         case IXGBE_LINK_SPEED_5GB_FULL:
7489                 speed_str = "5 Gbps";
7490                 break;
7491         case IXGBE_LINK_SPEED_2_5GB_FULL:
7492                 speed_str = "2.5 Gbps";
7493                 break;
7494         case IXGBE_LINK_SPEED_1GB_FULL:
7495                 speed_str = "1 Gbps";
7496                 break;
7497         case IXGBE_LINK_SPEED_100_FULL:
7498                 speed_str = "100 Mbps";
7499                 break;
7500         case IXGBE_LINK_SPEED_10_FULL:
7501                 speed_str = "10 Mbps";
7502                 break;
7503         default:
7504                 speed_str = "unknown speed";
7505                 break;
7506         }
7507         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7508                ((flow_rx && flow_tx) ? "RX/TX" :
7509                (flow_rx ? "RX" :
7510                (flow_tx ? "TX" : "None"))));
7511
7512         netif_carrier_on(netdev);
7513         ixgbe_check_vf_rate_limit(adapter);
7514
7515         /* enable transmits */
7516         netif_tx_wake_all_queues(adapter->netdev);
7517
7518         /* update the default user priority for VFs */
7519         ixgbe_update_default_up(adapter);
7520
7521         /* ping all the active vfs to let them know link has changed */
7522         ixgbe_ping_all_vfs(adapter);
7523 }
7524
7525 /**
7526  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7527  *                               print link down message
7528  * @adapter: pointer to the adapter structure
7529  **/
7530 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7531 {
7532         struct net_device *netdev = adapter->netdev;
7533         struct ixgbe_hw *hw = &adapter->hw;
7534
7535         adapter->link_up = false;
7536         adapter->link_speed = 0;
7537
7538         /* only continue if link was up previously */
7539         if (!netif_carrier_ok(netdev))
7540                 return;
7541
7542         /* poll for SFP+ cable when link is down */
7543         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7544                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7545
7546         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7547                 ixgbe_ptp_start_cyclecounter(adapter);
7548
7549         e_info(drv, "NIC Link is Down\n");
7550         netif_carrier_off(netdev);
7551
7552         /* ping all the active vfs to let them know link has changed */
7553         ixgbe_ping_all_vfs(adapter);
7554 }
7555
7556 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7557 {
7558         int i;
7559
7560         for (i = 0; i < adapter->num_tx_queues; i++) {
7561                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7562
7563                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7564                         return true;
7565         }
7566
7567         for (i = 0; i < adapter->num_xdp_queues; i++) {
7568                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7569
7570                 if (ring->next_to_use != ring->next_to_clean)
7571                         return true;
7572         }
7573
7574         return false;
7575 }
7576
7577 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7578 {
7579         struct ixgbe_hw *hw = &adapter->hw;
7580         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7581         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7582
7583         int i, j;
7584
7585         if (!adapter->num_vfs)
7586                 return false;
7587
7588         /* resetting the PF is only needed for MAC before X550 */
7589         if (hw->mac.type >= ixgbe_mac_X550)
7590                 return false;
7591
7592         for (i = 0; i < adapter->num_vfs; i++) {
7593                 for (j = 0; j < q_per_pool; j++) {
7594                         u32 h, t;
7595
7596                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7597                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7598
7599                         if (h != t)
7600                                 return true;
7601                 }
7602         }
7603
7604         return false;
7605 }
7606
7607 /**
7608  * ixgbe_watchdog_flush_tx - flush queues on link down
7609  * @adapter: pointer to the device adapter structure
7610  **/
7611 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7612 {
7613         if (!netif_carrier_ok(adapter->netdev)) {
7614                 if (ixgbe_ring_tx_pending(adapter) ||
7615                     ixgbe_vf_tx_pending(adapter)) {
7616                         /* We've lost link, so the controller stops DMA,
7617                          * but we've got queued Tx work that's never going
7618                          * to get done, so reset controller to flush Tx.
7619                          * (Do the reset outside of interrupt context).
7620                          */
7621                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7622                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7623                 }
7624         }
7625 }
7626
7627 #ifdef CONFIG_PCI_IOV
7628 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7629 {
7630         struct ixgbe_hw *hw = &adapter->hw;
7631         struct pci_dev *pdev = adapter->pdev;
7632         unsigned int vf;
7633         u32 gpc;
7634
7635         if (!(netif_carrier_ok(adapter->netdev)))
7636                 return;
7637
7638         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7639         if (gpc) /* If incrementing then no need for the check below */
7640                 return;
7641         /* Check to see if a bad DMA write target from an errant or
7642          * malicious VF has caused a PCIe error.  If so then we can
7643          * issue a VFLR to the offending VF(s) and then resume without
7644          * requesting a full slot reset.
7645          */
7646
7647         if (!pdev)
7648                 return;
7649
7650         /* check status reg for all VFs owned by this PF */
7651         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7652                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7653                 u16 status_reg;
7654
7655                 if (!vfdev)
7656                         continue;
7657                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7658                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7659                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7660                         pcie_flr(vfdev);
7661         }
7662 }
7663
7664 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7665 {
7666         u32 ssvpc;
7667
7668         /* Do not perform spoof check for 82598 or if not in IOV mode */
7669         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7670             adapter->num_vfs == 0)
7671                 return;
7672
7673         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7674
7675         /*
7676          * ssvpc register is cleared on read, if zero then no
7677          * spoofed packets in the last interval.
7678          */
7679         if (!ssvpc)
7680                 return;
7681
7682         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7683 }
7684 #else
7685 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7686 {
7687 }
7688
7689 static void
7690 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7691 {
7692 }
7693 #endif /* CONFIG_PCI_IOV */
7694
7695
7696 /**
7697  * ixgbe_watchdog_subtask - check and bring link up
7698  * @adapter: pointer to the device adapter structure
7699  **/
7700 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7701 {
7702         /* if interface is down, removing or resetting, do nothing */
7703         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7704             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7705             test_bit(__IXGBE_RESETTING, &adapter->state))
7706                 return;
7707
7708         ixgbe_watchdog_update_link(adapter);
7709
7710         if (adapter->link_up)
7711                 ixgbe_watchdog_link_is_up(adapter);
7712         else
7713                 ixgbe_watchdog_link_is_down(adapter);
7714
7715         ixgbe_check_for_bad_vf(adapter);
7716         ixgbe_spoof_check(adapter);
7717         ixgbe_update_stats(adapter);
7718
7719         ixgbe_watchdog_flush_tx(adapter);
7720 }
7721
7722 /**
7723  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7724  * @adapter: the ixgbe adapter structure
7725  **/
7726 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7727 {
7728         struct ixgbe_hw *hw = &adapter->hw;
7729         s32 err;
7730
7731         /* not searching for SFP so there is nothing to do here */
7732         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7733             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7734                 return;
7735
7736         if (adapter->sfp_poll_time &&
7737             time_after(adapter->sfp_poll_time, jiffies))
7738                 return; /* If not yet time to poll for SFP */
7739
7740         /* someone else is in init, wait until next service event */
7741         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7742                 return;
7743
7744         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7745
7746         err = hw->phy.ops.identify_sfp(hw);
7747         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7748                 goto sfp_out;
7749
7750         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7751                 /* If no cable is present, then we need to reset
7752                  * the next time we find a good cable. */
7753                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7754         }
7755
7756         /* exit on error */
7757         if (err)
7758                 goto sfp_out;
7759
7760         /* exit if reset not needed */
7761         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7762                 goto sfp_out;
7763
7764         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7765
7766         /*
7767          * A module may be identified correctly, but the EEPROM may not have
7768          * support for that module.  setup_sfp() will fail in that case, so
7769          * we should not allow that module to load.
7770          */
7771         if (hw->mac.type == ixgbe_mac_82598EB)
7772                 err = hw->phy.ops.reset(hw);
7773         else
7774                 err = hw->mac.ops.setup_sfp(hw);
7775
7776         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7777                 goto sfp_out;
7778
7779         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7780         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7781
7782 sfp_out:
7783         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7784
7785         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7786             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7787                 e_dev_err("failed to initialize because an unsupported "
7788                           "SFP+ module type was detected.\n");
7789                 e_dev_err("Reload the driver after installing a "
7790                           "supported module.\n");
7791                 unregister_netdev(adapter->netdev);
7792         }
7793 }
7794
7795 /**
7796  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7797  * @adapter: the ixgbe adapter structure
7798  **/
7799 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7800 {
7801         struct ixgbe_hw *hw = &adapter->hw;
7802         u32 cap_speed;
7803         u32 speed;
7804         bool autoneg = false;
7805
7806         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7807                 return;
7808
7809         /* someone else is in init, wait until next service event */
7810         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7811                 return;
7812
7813         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7814
7815         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7816
7817         /* advertise highest capable link speed */
7818         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7819                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7820         else
7821                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7822                                      IXGBE_LINK_SPEED_1GB_FULL);
7823
7824         if (hw->mac.ops.setup_link)
7825                 hw->mac.ops.setup_link(hw, speed, true);
7826
7827         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7828         adapter->link_check_timeout = jiffies;
7829         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7830 }
7831
7832 /**
7833  * ixgbe_service_timer - Timer Call-back
7834  * @t: pointer to timer_list structure
7835  **/
7836 static void ixgbe_service_timer(struct timer_list *t)
7837 {
7838         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7839         unsigned long next_event_offset;
7840
7841         /* poll faster when waiting for link */
7842         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7843                 next_event_offset = HZ / 10;
7844         else
7845                 next_event_offset = HZ * 2;
7846
7847         /* Reset the timer */
7848         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7849
7850         ixgbe_service_event_schedule(adapter);
7851 }
7852
7853 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7854 {
7855         struct ixgbe_hw *hw = &adapter->hw;
7856         u32 status;
7857
7858         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7859                 return;
7860
7861         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7862
7863         if (!hw->phy.ops.handle_lasi)
7864                 return;
7865
7866         status = hw->phy.ops.handle_lasi(&adapter->hw);
7867         if (status != IXGBE_ERR_OVERTEMP)
7868                 return;
7869
7870         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7871 }
7872
7873 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7874 {
7875         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7876                 return;
7877
7878         rtnl_lock();
7879         /* If we're already down, removing or resetting, just bail */
7880         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7881             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7882             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7883                 rtnl_unlock();
7884                 return;
7885         }
7886
7887         ixgbe_dump(adapter);
7888         netdev_err(adapter->netdev, "Reset adapter\n");
7889         adapter->tx_timeout_count++;
7890
7891         ixgbe_reinit_locked(adapter);
7892         rtnl_unlock();
7893 }
7894
7895 /**
7896  * ixgbe_check_fw_error - Check firmware for errors
7897  * @adapter: the adapter private structure
7898  *
7899  * Check firmware errors in register FWSM
7900  */
7901 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7902 {
7903         struct ixgbe_hw *hw = &adapter->hw;
7904         u32 fwsm;
7905
7906         /* read fwsm.ext_err_ind register and log errors */
7907         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7908
7909         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7910             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7911                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7912                            fwsm);
7913
7914         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7915                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7916                 return true;
7917         }
7918
7919         return false;
7920 }
7921
7922 /**
7923  * ixgbe_service_task - manages and runs subtasks
7924  * @work: pointer to work_struct containing our data
7925  **/
7926 static void ixgbe_service_task(struct work_struct *work)
7927 {
7928         struct ixgbe_adapter *adapter = container_of(work,
7929                                                      struct ixgbe_adapter,
7930                                                      service_task);
7931         if (ixgbe_removed(adapter->hw.hw_addr)) {
7932                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7933                         rtnl_lock();
7934                         ixgbe_down(adapter);
7935                         rtnl_unlock();
7936                 }
7937                 ixgbe_service_event_complete(adapter);
7938                 return;
7939         }
7940         if (ixgbe_check_fw_error(adapter)) {
7941                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
7942                         unregister_netdev(adapter->netdev);
7943                 ixgbe_service_event_complete(adapter);
7944                 return;
7945         }
7946         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7947                 rtnl_lock();
7948                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7949                 udp_tunnel_get_rx_info(adapter->netdev);
7950                 rtnl_unlock();
7951         }
7952         ixgbe_reset_subtask(adapter);
7953         ixgbe_phy_interrupt_subtask(adapter);
7954         ixgbe_sfp_detection_subtask(adapter);
7955         ixgbe_sfp_link_config_subtask(adapter);
7956         ixgbe_check_overtemp_subtask(adapter);
7957         ixgbe_watchdog_subtask(adapter);
7958         ixgbe_fdir_reinit_subtask(adapter);
7959         ixgbe_check_hang_subtask(adapter);
7960
7961         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7962                 ixgbe_ptp_overflow_check(adapter);
7963                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7964                         ixgbe_ptp_rx_hang(adapter);
7965                 ixgbe_ptp_tx_hang(adapter);
7966         }
7967
7968         ixgbe_service_event_complete(adapter);
7969 }
7970
7971 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7972                      struct ixgbe_tx_buffer *first,
7973                      u8 *hdr_len,
7974                      struct ixgbe_ipsec_tx_data *itd)
7975 {
7976         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7977         struct sk_buff *skb = first->skb;
7978         union {
7979                 struct iphdr *v4;
7980                 struct ipv6hdr *v6;
7981                 unsigned char *hdr;
7982         } ip;
7983         union {
7984                 struct tcphdr *tcp;
7985                 struct udphdr *udp;
7986                 unsigned char *hdr;
7987         } l4;
7988         u32 paylen, l4_offset;
7989         u32 fceof_saidx = 0;
7990         int err;
7991
7992         if (skb->ip_summed != CHECKSUM_PARTIAL)
7993                 return 0;
7994
7995         if (!skb_is_gso(skb))
7996                 return 0;
7997
7998         err = skb_cow_head(skb, 0);
7999         if (err < 0)
8000                 return err;
8001
8002         if (eth_p_mpls(first->protocol))
8003                 ip.hdr = skb_inner_network_header(skb);
8004         else
8005                 ip.hdr = skb_network_header(skb);
8006         l4.hdr = skb_checksum_start(skb);
8007
8008         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
8009         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
8010                       IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP;
8011
8012         /* initialize outer IP header fields */
8013         if (ip.v4->version == 4) {
8014                 unsigned char *csum_start = skb_checksum_start(skb);
8015                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
8016                 int len = csum_start - trans_start;
8017
8018                 /* IP header will have to cancel out any data that
8019                  * is not a part of the outer IP header, so set to
8020                  * a reverse csum if needed, else init check to 0.
8021                  */
8022                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
8023                                            csum_fold(csum_partial(trans_start,
8024                                                                   len, 0)) : 0;
8025                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
8026
8027                 ip.v4->tot_len = 0;
8028                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8029                                    IXGBE_TX_FLAGS_CSUM |
8030                                    IXGBE_TX_FLAGS_IPV4;
8031         } else {
8032                 ip.v6->payload_len = 0;
8033                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8034                                    IXGBE_TX_FLAGS_CSUM;
8035         }
8036
8037         /* determine offset of inner transport header */
8038         l4_offset = l4.hdr - skb->data;
8039
8040         /* remove payload length from inner checksum */
8041         paylen = skb->len - l4_offset;
8042
8043         if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) {
8044                 /* compute length of segmentation header */
8045                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
8046                 csum_replace_by_diff(&l4.tcp->check,
8047                                      (__force __wsum)htonl(paylen));
8048         } else {
8049                 /* compute length of segmentation header */
8050                 *hdr_len = sizeof(*l4.udp) + l4_offset;
8051                 csum_replace_by_diff(&l4.udp->check,
8052                                      (__force __wsum)htonl(paylen));
8053         }
8054
8055         /* update gso size and bytecount with header size */
8056         first->gso_segs = skb_shinfo(skb)->gso_segs;
8057         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8058
8059         /* mss_l4len_id: use 0 as index for TSO */
8060         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8061         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8062
8063         fceof_saidx |= itd->sa_idx;
8064         type_tucmd |= itd->flags | itd->trailer_len;
8065
8066         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8067         vlan_macip_lens = l4.hdr - ip.hdr;
8068         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8069         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8070
8071         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8072                           mss_l4len_idx);
8073
8074         return 1;
8075 }
8076
8077 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8078 {
8079         unsigned int offset = 0;
8080
8081         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8082
8083         return offset == skb_checksum_start_offset(skb);
8084 }
8085
8086 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8087                           struct ixgbe_tx_buffer *first,
8088                           struct ixgbe_ipsec_tx_data *itd)
8089 {
8090         struct sk_buff *skb = first->skb;
8091         u32 vlan_macip_lens = 0;
8092         u32 fceof_saidx = 0;
8093         u32 type_tucmd = 0;
8094
8095         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8096 csum_failed:
8097                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8098                                          IXGBE_TX_FLAGS_CC)))
8099                         return;
8100                 goto no_csum;
8101         }
8102
8103         switch (skb->csum_offset) {
8104         case offsetof(struct tcphdr, check):
8105                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8106                 /* fall through */
8107         case offsetof(struct udphdr, check):
8108                 break;
8109         case offsetof(struct sctphdr, checksum):
8110                 /* validate that this is actually an SCTP request */
8111                 if (((first->protocol == htons(ETH_P_IP)) &&
8112                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8113                     ((first->protocol == htons(ETH_P_IPV6)) &&
8114                      ixgbe_ipv6_csum_is_sctp(skb))) {
8115                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8116                         break;
8117                 }
8118                 /* fall through */
8119         default:
8120                 skb_checksum_help(skb);
8121                 goto csum_failed;
8122         }
8123
8124         /* update TX checksum flag */
8125         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8126         vlan_macip_lens = skb_checksum_start_offset(skb) -
8127                           skb_network_offset(skb);
8128 no_csum:
8129         /* vlan_macip_lens: MACLEN, VLAN tag */
8130         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8131         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8132
8133         fceof_saidx |= itd->sa_idx;
8134         type_tucmd |= itd->flags | itd->trailer_len;
8135
8136         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8137 }
8138
8139 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8140         ((_flag <= _result) ? \
8141          ((u32)(_input & _flag) * (_result / _flag)) : \
8142          ((u32)(_input & _flag) / (_flag / _result)))
8143
8144 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8145 {
8146         /* set type for advanced descriptor with frame checksum insertion */
8147         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8148                        IXGBE_ADVTXD_DCMD_DEXT |
8149                        IXGBE_ADVTXD_DCMD_IFCS;
8150
8151         /* set HW vlan bit if vlan is present */
8152         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8153                                    IXGBE_ADVTXD_DCMD_VLE);
8154
8155         /* set segmentation enable bits for TSO/FSO */
8156         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8157                                    IXGBE_ADVTXD_DCMD_TSE);
8158
8159         /* set timestamp bit if present */
8160         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8161                                    IXGBE_ADVTXD_MAC_TSTAMP);
8162
8163         /* insert frame checksum */
8164         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8165
8166         return cmd_type;
8167 }
8168
8169 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8170                                    u32 tx_flags, unsigned int paylen)
8171 {
8172         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8173
8174         /* enable L4 checksum for TSO and TX checksum offload */
8175         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8176                                         IXGBE_TX_FLAGS_CSUM,
8177                                         IXGBE_ADVTXD_POPTS_TXSM);
8178
8179         /* enable IPv4 checksum for TSO */
8180         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8181                                         IXGBE_TX_FLAGS_IPV4,
8182                                         IXGBE_ADVTXD_POPTS_IXSM);
8183
8184         /* enable IPsec */
8185         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8186                                         IXGBE_TX_FLAGS_IPSEC,
8187                                         IXGBE_ADVTXD_POPTS_IPSEC);
8188
8189         /*
8190          * Check Context must be set if Tx switch is enabled, which it
8191          * always is for case where virtual functions are running
8192          */
8193         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8194                                         IXGBE_TX_FLAGS_CC,
8195                                         IXGBE_ADVTXD_CC);
8196
8197         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8198 }
8199
8200 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8201 {
8202         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8203
8204         /* Herbert's original patch had:
8205          *  smp_mb__after_netif_stop_queue();
8206          * but since that doesn't exist yet, just open code it.
8207          */
8208         smp_mb();
8209
8210         /* We need to check again in a case another CPU has just
8211          * made room available.
8212          */
8213         if (likely(ixgbe_desc_unused(tx_ring) < size))
8214                 return -EBUSY;
8215
8216         /* A reprieve! - use start_queue because it doesn't call schedule */
8217         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8218         ++tx_ring->tx_stats.restart_queue;
8219         return 0;
8220 }
8221
8222 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8223 {
8224         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8225                 return 0;
8226
8227         return __ixgbe_maybe_stop_tx(tx_ring, size);
8228 }
8229
8230 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8231                         struct ixgbe_tx_buffer *first,
8232                         const u8 hdr_len)
8233 {
8234         struct sk_buff *skb = first->skb;
8235         struct ixgbe_tx_buffer *tx_buffer;
8236         union ixgbe_adv_tx_desc *tx_desc;
8237         skb_frag_t *frag;
8238         dma_addr_t dma;
8239         unsigned int data_len, size;
8240         u32 tx_flags = first->tx_flags;
8241         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8242         u16 i = tx_ring->next_to_use;
8243
8244         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8245
8246         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8247
8248         size = skb_headlen(skb);
8249         data_len = skb->data_len;
8250
8251 #ifdef IXGBE_FCOE
8252         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8253                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8254                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8255                         data_len = 0;
8256                 } else {
8257                         data_len -= sizeof(struct fcoe_crc_eof);
8258                 }
8259         }
8260
8261 #endif
8262         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8263
8264         tx_buffer = first;
8265
8266         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8267                 if (dma_mapping_error(tx_ring->dev, dma))
8268                         goto dma_error;
8269
8270                 /* record length, and DMA address */
8271                 dma_unmap_len_set(tx_buffer, len, size);
8272                 dma_unmap_addr_set(tx_buffer, dma, dma);
8273
8274                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8275
8276                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8277                         tx_desc->read.cmd_type_len =
8278                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8279
8280                         i++;
8281                         tx_desc++;
8282                         if (i == tx_ring->count) {
8283                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8284                                 i = 0;
8285                         }
8286                         tx_desc->read.olinfo_status = 0;
8287
8288                         dma += IXGBE_MAX_DATA_PER_TXD;
8289                         size -= IXGBE_MAX_DATA_PER_TXD;
8290
8291                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8292                 }
8293
8294                 if (likely(!data_len))
8295                         break;
8296
8297                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8298
8299                 i++;
8300                 tx_desc++;
8301                 if (i == tx_ring->count) {
8302                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8303                         i = 0;
8304                 }
8305                 tx_desc->read.olinfo_status = 0;
8306
8307 #ifdef IXGBE_FCOE
8308                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8309 #else
8310                 size = skb_frag_size(frag);
8311 #endif
8312                 data_len -= size;
8313
8314                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8315                                        DMA_TO_DEVICE);
8316
8317                 tx_buffer = &tx_ring->tx_buffer_info[i];
8318         }
8319
8320         /* write last descriptor with RS and EOP bits */
8321         cmd_type |= size | IXGBE_TXD_CMD;
8322         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8323
8324         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8325
8326         /* set the timestamp */
8327         first->time_stamp = jiffies;
8328
8329         skb_tx_timestamp(skb);
8330
8331         /*
8332          * Force memory writes to complete before letting h/w know there
8333          * are new descriptors to fetch.  (Only applicable for weak-ordered
8334          * memory model archs, such as IA-64).
8335          *
8336          * We also need this memory barrier to make certain all of the
8337          * status bits have been updated before next_to_watch is written.
8338          */
8339         wmb();
8340
8341         /* set next_to_watch value indicating a packet is present */
8342         first->next_to_watch = tx_desc;
8343
8344         i++;
8345         if (i == tx_ring->count)
8346                 i = 0;
8347
8348         tx_ring->next_to_use = i;
8349
8350         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8351
8352         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8353                 writel(i, tx_ring->tail);
8354         }
8355
8356         return 0;
8357 dma_error:
8358         dev_err(tx_ring->dev, "TX DMA map failed\n");
8359
8360         /* clear dma mappings for failed tx_buffer_info map */
8361         for (;;) {
8362                 tx_buffer = &tx_ring->tx_buffer_info[i];
8363                 if (dma_unmap_len(tx_buffer, len))
8364                         dma_unmap_page(tx_ring->dev,
8365                                        dma_unmap_addr(tx_buffer, dma),
8366                                        dma_unmap_len(tx_buffer, len),
8367                                        DMA_TO_DEVICE);
8368                 dma_unmap_len_set(tx_buffer, len, 0);
8369                 if (tx_buffer == first)
8370                         break;
8371                 if (i == 0)
8372                         i += tx_ring->count;
8373                 i--;
8374         }
8375
8376         dev_kfree_skb_any(first->skb);
8377         first->skb = NULL;
8378
8379         tx_ring->next_to_use = i;
8380
8381         return -1;
8382 }
8383
8384 static void ixgbe_atr(struct ixgbe_ring *ring,
8385                       struct ixgbe_tx_buffer *first)
8386 {
8387         struct ixgbe_q_vector *q_vector = ring->q_vector;
8388         union ixgbe_atr_hash_dword input = { .dword = 0 };
8389         union ixgbe_atr_hash_dword common = { .dword = 0 };
8390         union {
8391                 unsigned char *network;
8392                 struct iphdr *ipv4;
8393                 struct ipv6hdr *ipv6;
8394         } hdr;
8395         struct tcphdr *th;
8396         unsigned int hlen;
8397         struct sk_buff *skb;
8398         __be16 vlan_id;
8399         int l4_proto;
8400
8401         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8402         if (!q_vector)
8403                 return;
8404
8405         /* do nothing if sampling is disabled */
8406         if (!ring->atr_sample_rate)
8407                 return;
8408
8409         ring->atr_count++;
8410
8411         /* currently only IPv4/IPv6 with TCP is supported */
8412         if ((first->protocol != htons(ETH_P_IP)) &&
8413             (first->protocol != htons(ETH_P_IPV6)))
8414                 return;
8415
8416         /* snag network header to get L4 type and address */
8417         skb = first->skb;
8418         hdr.network = skb_network_header(skb);
8419         if (unlikely(hdr.network <= skb->data))
8420                 return;
8421         if (skb->encapsulation &&
8422             first->protocol == htons(ETH_P_IP) &&
8423             hdr.ipv4->protocol == IPPROTO_UDP) {
8424                 struct ixgbe_adapter *adapter = q_vector->adapter;
8425
8426                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8427                              VXLAN_HEADROOM))
8428                         return;
8429
8430                 /* verify the port is recognized as VXLAN */
8431                 if (adapter->vxlan_port &&
8432                     udp_hdr(skb)->dest == adapter->vxlan_port)
8433                         hdr.network = skb_inner_network_header(skb);
8434
8435                 if (adapter->geneve_port &&
8436                     udp_hdr(skb)->dest == adapter->geneve_port)
8437                         hdr.network = skb_inner_network_header(skb);
8438         }
8439
8440         /* Make sure we have at least [minimum IPv4 header + TCP]
8441          * or [IPv6 header] bytes
8442          */
8443         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8444                 return;
8445
8446         /* Currently only IPv4/IPv6 with TCP is supported */
8447         switch (hdr.ipv4->version) {
8448         case IPVERSION:
8449                 /* access ihl as u8 to avoid unaligned access on ia64 */
8450                 hlen = (hdr.network[0] & 0x0F) << 2;
8451                 l4_proto = hdr.ipv4->protocol;
8452                 break;
8453         case 6:
8454                 hlen = hdr.network - skb->data;
8455                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8456                 hlen -= hdr.network - skb->data;
8457                 break;
8458         default:
8459                 return;
8460         }
8461
8462         if (l4_proto != IPPROTO_TCP)
8463                 return;
8464
8465         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8466                      hlen + sizeof(struct tcphdr)))
8467                 return;
8468
8469         th = (struct tcphdr *)(hdr.network + hlen);
8470
8471         /* skip this packet since the socket is closing */
8472         if (th->fin)
8473                 return;
8474
8475         /* sample on all syn packets or once every atr sample count */
8476         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8477                 return;
8478
8479         /* reset sample count */
8480         ring->atr_count = 0;
8481
8482         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8483
8484         /*
8485          * src and dst are inverted, think how the receiver sees them
8486          *
8487          * The input is broken into two sections, a non-compressed section
8488          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8489          * is XORed together and stored in the compressed dword.
8490          */
8491         input.formatted.vlan_id = vlan_id;
8492
8493         /*
8494          * since src port and flex bytes occupy the same word XOR them together
8495          * and write the value to source port portion of compressed dword
8496          */
8497         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8498                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8499         else
8500                 common.port.src ^= th->dest ^ first->protocol;
8501         common.port.dst ^= th->source;
8502
8503         switch (hdr.ipv4->version) {
8504         case IPVERSION:
8505                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8506                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8507                 break;
8508         case 6:
8509                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8510                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8511                              hdr.ipv6->saddr.s6_addr32[1] ^
8512                              hdr.ipv6->saddr.s6_addr32[2] ^
8513                              hdr.ipv6->saddr.s6_addr32[3] ^
8514                              hdr.ipv6->daddr.s6_addr32[0] ^
8515                              hdr.ipv6->daddr.s6_addr32[1] ^
8516                              hdr.ipv6->daddr.s6_addr32[2] ^
8517                              hdr.ipv6->daddr.s6_addr32[3];
8518                 break;
8519         default:
8520                 break;
8521         }
8522
8523         if (hdr.network != skb_network_header(skb))
8524                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8525
8526         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8527         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8528                                               input, common, ring->queue_index);
8529 }
8530
8531 #ifdef IXGBE_FCOE
8532 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8533                               struct net_device *sb_dev)
8534 {
8535         struct ixgbe_adapter *adapter;
8536         struct ixgbe_ring_feature *f;
8537         int txq;
8538
8539         if (sb_dev) {
8540                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8541                 struct net_device *vdev = sb_dev;
8542
8543                 txq = vdev->tc_to_txq[tc].offset;
8544                 txq += reciprocal_scale(skb_get_hash(skb),
8545                                         vdev->tc_to_txq[tc].count);
8546
8547                 return txq;
8548         }
8549
8550         /*
8551          * only execute the code below if protocol is FCoE
8552          * or FIP and we have FCoE enabled on the adapter
8553          */
8554         switch (vlan_get_protocol(skb)) {
8555         case htons(ETH_P_FCOE):
8556         case htons(ETH_P_FIP):
8557                 adapter = netdev_priv(dev);
8558
8559                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8560                         break;
8561                 /* fall through */
8562         default:
8563                 return netdev_pick_tx(dev, skb, sb_dev);
8564         }
8565
8566         f = &adapter->ring_feature[RING_F_FCOE];
8567
8568         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8569                                            smp_processor_id();
8570
8571         while (txq >= f->indices)
8572                 txq -= f->indices;
8573
8574         return txq + f->offset;
8575 }
8576
8577 #endif
8578 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8579                         struct xdp_frame *xdpf)
8580 {
8581         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8582         struct ixgbe_tx_buffer *tx_buffer;
8583         union ixgbe_adv_tx_desc *tx_desc;
8584         u32 len, cmd_type;
8585         dma_addr_t dma;
8586         u16 i;
8587
8588         len = xdpf->len;
8589
8590         if (unlikely(!ixgbe_desc_unused(ring)))
8591                 return IXGBE_XDP_CONSUMED;
8592
8593         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8594         if (dma_mapping_error(ring->dev, dma))
8595                 return IXGBE_XDP_CONSUMED;
8596
8597         /* record the location of the first descriptor for this packet */
8598         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8599         tx_buffer->bytecount = len;
8600         tx_buffer->gso_segs = 1;
8601         tx_buffer->protocol = 0;
8602
8603         i = ring->next_to_use;
8604         tx_desc = IXGBE_TX_DESC(ring, i);
8605
8606         dma_unmap_len_set(tx_buffer, len, len);
8607         dma_unmap_addr_set(tx_buffer, dma, dma);
8608         tx_buffer->xdpf = xdpf;
8609
8610         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8611
8612         /* put descriptor type bits */
8613         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8614                    IXGBE_ADVTXD_DCMD_DEXT |
8615                    IXGBE_ADVTXD_DCMD_IFCS;
8616         cmd_type |= len | IXGBE_TXD_CMD;
8617         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8618         tx_desc->read.olinfo_status =
8619                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8620
8621         /* Avoid any potential race with xdp_xmit and cleanup */
8622         smp_wmb();
8623
8624         /* set next_to_watch value indicating a packet is present */
8625         i++;
8626         if (i == ring->count)
8627                 i = 0;
8628
8629         tx_buffer->next_to_watch = tx_desc;
8630         ring->next_to_use = i;
8631
8632         return IXGBE_XDP_TX;
8633 }
8634
8635 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8636                           struct ixgbe_adapter *adapter,
8637                           struct ixgbe_ring *tx_ring)
8638 {
8639         struct ixgbe_tx_buffer *first;
8640         int tso;
8641         u32 tx_flags = 0;
8642         unsigned short f;
8643         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8644         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8645         __be16 protocol = skb->protocol;
8646         u8 hdr_len = 0;
8647
8648         /*
8649          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8650          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8651          *       + 2 desc gap to keep tail from touching head,
8652          *       + 1 desc for context descriptor,
8653          * otherwise try next time
8654          */
8655         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8656                 count += TXD_USE_COUNT(skb_frag_size(
8657                                                 &skb_shinfo(skb)->frags[f]));
8658
8659         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8660                 tx_ring->tx_stats.tx_busy++;
8661                 return NETDEV_TX_BUSY;
8662         }
8663
8664         /* record the location of the first descriptor for this packet */
8665         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8666         first->skb = skb;
8667         first->bytecount = skb->len;
8668         first->gso_segs = 1;
8669
8670         /* if we have a HW VLAN tag being added default to the HW one */
8671         if (skb_vlan_tag_present(skb)) {
8672                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8673                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8674         /* else if it is a SW VLAN check the next protocol and store the tag */
8675         } else if (protocol == htons(ETH_P_8021Q)) {
8676                 struct vlan_hdr *vhdr, _vhdr;
8677                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8678                 if (!vhdr)
8679                         goto out_drop;
8680
8681                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8682                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8683                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8684         }
8685         protocol = vlan_get_protocol(skb);
8686
8687         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8688             adapter->ptp_clock) {
8689                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8690                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8691                                            &adapter->state)) {
8692                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8693                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8694
8695                         /* schedule check for Tx timestamp */
8696                         adapter->ptp_tx_skb = skb_get(skb);
8697                         adapter->ptp_tx_start = jiffies;
8698                         schedule_work(&adapter->ptp_tx_work);
8699                 } else {
8700                         adapter->tx_hwtstamp_skipped++;
8701                 }
8702         }
8703
8704 #ifdef CONFIG_PCI_IOV
8705         /*
8706          * Use the l2switch_enable flag - would be false if the DMA
8707          * Tx switch had been disabled.
8708          */
8709         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8710                 tx_flags |= IXGBE_TX_FLAGS_CC;
8711
8712 #endif
8713         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8714         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8715             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8716              (skb->priority != TC_PRIO_CONTROL))) {
8717                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8718                 tx_flags |= (skb->priority & 0x7) <<
8719                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8720                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8721                         struct vlan_ethhdr *vhdr;
8722
8723                         if (skb_cow_head(skb, 0))
8724                                 goto out_drop;
8725                         vhdr = (struct vlan_ethhdr *)skb->data;
8726                         vhdr->h_vlan_TCI = htons(tx_flags >>
8727                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8728                 } else {
8729                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8730                 }
8731         }
8732
8733         /* record initial flags and protocol */
8734         first->tx_flags = tx_flags;
8735         first->protocol = protocol;
8736
8737 #ifdef IXGBE_FCOE
8738         /* setup tx offload for FCoE */
8739         if ((protocol == htons(ETH_P_FCOE)) &&
8740             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8741                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8742                 if (tso < 0)
8743                         goto out_drop;
8744
8745                 goto xmit_fcoe;
8746         }
8747
8748 #endif /* IXGBE_FCOE */
8749
8750 #ifdef CONFIG_IXGBE_IPSEC
8751         if (xfrm_offload(skb) &&
8752             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8753                 goto out_drop;
8754 #endif
8755         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8756         if (tso < 0)
8757                 goto out_drop;
8758         else if (!tso)
8759                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8760
8761         /* add the ATR filter if ATR is on */
8762         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8763                 ixgbe_atr(tx_ring, first);
8764
8765 #ifdef IXGBE_FCOE
8766 xmit_fcoe:
8767 #endif /* IXGBE_FCOE */
8768         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8769                 goto cleanup_tx_timestamp;
8770
8771         return NETDEV_TX_OK;
8772
8773 out_drop:
8774         dev_kfree_skb_any(first->skb);
8775         first->skb = NULL;
8776 cleanup_tx_timestamp:
8777         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8778                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8779                 adapter->ptp_tx_skb = NULL;
8780                 cancel_work_sync(&adapter->ptp_tx_work);
8781                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8782         }
8783
8784         return NETDEV_TX_OK;
8785 }
8786
8787 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8788                                       struct net_device *netdev,
8789                                       struct ixgbe_ring *ring)
8790 {
8791         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8792         struct ixgbe_ring *tx_ring;
8793
8794         /*
8795          * The minimum packet size for olinfo paylen is 17 so pad the skb
8796          * in order to meet this minimum size requirement.
8797          */
8798         if (skb_put_padto(skb, 17))
8799                 return NETDEV_TX_OK;
8800
8801         tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)];
8802         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8803                 return NETDEV_TX_BUSY;
8804
8805         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8806 }
8807
8808 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8809                                     struct net_device *netdev)
8810 {
8811         return __ixgbe_xmit_frame(skb, netdev, NULL);
8812 }
8813
8814 /**
8815  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8816  * @netdev: network interface device structure
8817  * @p: pointer to an address structure
8818  *
8819  * Returns 0 on success, negative on failure
8820  **/
8821 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8822 {
8823         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8824         struct ixgbe_hw *hw = &adapter->hw;
8825         struct sockaddr *addr = p;
8826
8827         if (!is_valid_ether_addr(addr->sa_data))
8828                 return -EADDRNOTAVAIL;
8829
8830         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8831         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8832
8833         ixgbe_mac_set_default_filter(adapter);
8834
8835         return 0;
8836 }
8837
8838 static int
8839 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8840 {
8841         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8842         struct ixgbe_hw *hw = &adapter->hw;
8843         u16 value;
8844         int rc;
8845
8846         if (adapter->mii_bus) {
8847                 int regnum = addr;
8848
8849                 if (devad != MDIO_DEVAD_NONE)
8850                         regnum |= (devad << 16) | MII_ADDR_C45;
8851
8852                 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8853         }
8854
8855         if (prtad != hw->phy.mdio.prtad)
8856                 return -EINVAL;
8857         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8858         if (!rc)
8859                 rc = value;
8860         return rc;
8861 }
8862
8863 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8864                             u16 addr, u16 value)
8865 {
8866         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8867         struct ixgbe_hw *hw = &adapter->hw;
8868
8869         if (adapter->mii_bus) {
8870                 int regnum = addr;
8871
8872                 if (devad != MDIO_DEVAD_NONE)
8873                         regnum |= (devad << 16) | MII_ADDR_C45;
8874
8875                 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8876         }
8877
8878         if (prtad != hw->phy.mdio.prtad)
8879                 return -EINVAL;
8880         return hw->phy.ops.write_reg(hw, addr, devad, value);
8881 }
8882
8883 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8884 {
8885         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8886
8887         switch (cmd) {
8888         case SIOCSHWTSTAMP:
8889                 return ixgbe_ptp_set_ts_config(adapter, req);
8890         case SIOCGHWTSTAMP:
8891                 return ixgbe_ptp_get_ts_config(adapter, req);
8892         case SIOCGMIIPHY:
8893                 if (!adapter->hw.phy.ops.read_reg)
8894                         return -EOPNOTSUPP;
8895                 /* fall through */
8896         default:
8897                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8898         }
8899 }
8900
8901 /**
8902  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8903  * netdev->dev_addrs
8904  * @dev: network interface device structure
8905  *
8906  * Returns non-zero on failure
8907  **/
8908 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8909 {
8910         int err = 0;
8911         struct ixgbe_adapter *adapter = netdev_priv(dev);
8912         struct ixgbe_hw *hw = &adapter->hw;
8913
8914         if (is_valid_ether_addr(hw->mac.san_addr)) {
8915                 rtnl_lock();
8916                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8917                 rtnl_unlock();
8918
8919                 /* update SAN MAC vmdq pool selection */
8920                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8921         }
8922         return err;
8923 }
8924
8925 /**
8926  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8927  * netdev->dev_addrs
8928  * @dev: network interface device structure
8929  *
8930  * Returns non-zero on failure
8931  **/
8932 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8933 {
8934         int err = 0;
8935         struct ixgbe_adapter *adapter = netdev_priv(dev);
8936         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8937
8938         if (is_valid_ether_addr(mac->san_addr)) {
8939                 rtnl_lock();
8940                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8941                 rtnl_unlock();
8942         }
8943         return err;
8944 }
8945
8946 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8947                                    struct ixgbe_ring *ring)
8948 {
8949         u64 bytes, packets;
8950         unsigned int start;
8951
8952         if (ring) {
8953                 do {
8954                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8955                         packets = ring->stats.packets;
8956                         bytes   = ring->stats.bytes;
8957                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8958                 stats->tx_packets += packets;
8959                 stats->tx_bytes   += bytes;
8960         }
8961 }
8962
8963 static void ixgbe_get_stats64(struct net_device *netdev,
8964                               struct rtnl_link_stats64 *stats)
8965 {
8966         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8967         int i;
8968
8969         rcu_read_lock();
8970         for (i = 0; i < adapter->num_rx_queues; i++) {
8971                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8972                 u64 bytes, packets;
8973                 unsigned int start;
8974
8975                 if (ring) {
8976                         do {
8977                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8978                                 packets = ring->stats.packets;
8979                                 bytes   = ring->stats.bytes;
8980                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8981                         stats->rx_packets += packets;
8982                         stats->rx_bytes   += bytes;
8983                 }
8984         }
8985
8986         for (i = 0; i < adapter->num_tx_queues; i++) {
8987                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8988
8989                 ixgbe_get_ring_stats64(stats, ring);
8990         }
8991         for (i = 0; i < adapter->num_xdp_queues; i++) {
8992                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8993
8994                 ixgbe_get_ring_stats64(stats, ring);
8995         }
8996         rcu_read_unlock();
8997
8998         /* following stats updated by ixgbe_watchdog_task() */
8999         stats->multicast        = netdev->stats.multicast;
9000         stats->rx_errors        = netdev->stats.rx_errors;
9001         stats->rx_length_errors = netdev->stats.rx_length_errors;
9002         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
9003         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
9004 }
9005
9006 #ifdef CONFIG_IXGBE_DCB
9007 /**
9008  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
9009  * @adapter: pointer to ixgbe_adapter
9010  * @tc: number of traffic classes currently enabled
9011  *
9012  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
9013  * 802.1Q priority maps to a packet buffer that exists.
9014  */
9015 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
9016 {
9017         struct ixgbe_hw *hw = &adapter->hw;
9018         u32 reg, rsave;
9019         int i;
9020
9021         /* 82598 have a static priority to TC mapping that can not
9022          * be changed so no validation is needed.
9023          */
9024         if (hw->mac.type == ixgbe_mac_82598EB)
9025                 return;
9026
9027         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
9028         rsave = reg;
9029
9030         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
9031                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
9032
9033                 /* If up2tc is out of bounds default to zero */
9034                 if (up2tc > tc)
9035                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
9036         }
9037
9038         if (reg != rsave)
9039                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
9040
9041         return;
9042 }
9043
9044 /**
9045  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
9046  * @adapter: Pointer to adapter struct
9047  *
9048  * Populate the netdev user priority to tc map
9049  */
9050 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9051 {
9052         struct net_device *dev = adapter->netdev;
9053         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9054         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9055         u8 prio;
9056
9057         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9058                 u8 tc = 0;
9059
9060                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9061                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9062                 else if (ets)
9063                         tc = ets->prio_tc[prio];
9064
9065                 netdev_set_prio_tc_map(dev, prio, tc);
9066         }
9067 }
9068
9069 #endif /* CONFIG_IXGBE_DCB */
9070 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9071 {
9072         struct ixgbe_adapter *adapter = data;
9073         struct ixgbe_fwd_adapter *accel;
9074         int pool;
9075
9076         /* we only care about macvlans... */
9077         if (!netif_is_macvlan(vdev))
9078                 return 0;
9079
9080         /* that have hardware offload enabled... */
9081         accel = macvlan_accel_priv(vdev);
9082         if (!accel)
9083                 return 0;
9084
9085         /* If we can relocate to a different bit do so */
9086         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9087         if (pool < adapter->num_rx_pools) {
9088                 set_bit(pool, adapter->fwd_bitmask);
9089                 accel->pool = pool;
9090                 return 0;
9091         }
9092
9093         /* if we cannot find a free pool then disable the offload */
9094         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9095         macvlan_release_l2fw_offload(vdev);
9096
9097         /* unbind the queues and drop the subordinate channel config */
9098         netdev_unbind_sb_channel(adapter->netdev, vdev);
9099         netdev_set_sb_channel(vdev, 0);
9100
9101         kfree(accel);
9102
9103         return 0;
9104 }
9105
9106 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9107 {
9108         struct ixgbe_adapter *adapter = netdev_priv(dev);
9109
9110         /* flush any stale bits out of the fwd bitmask */
9111         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9112
9113         /* walk through upper devices reassigning pools */
9114         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9115                                       adapter);
9116 }
9117
9118 /**
9119  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9120  *
9121  * @dev: net device to configure
9122  * @tc: number of traffic classes to enable
9123  */
9124 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9125 {
9126         struct ixgbe_adapter *adapter = netdev_priv(dev);
9127         struct ixgbe_hw *hw = &adapter->hw;
9128
9129         /* Hardware supports up to 8 traffic classes */
9130         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9131                 return -EINVAL;
9132
9133         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9134                 return -EINVAL;
9135
9136         /* Hardware has to reinitialize queues and interrupts to
9137          * match packet buffer alignment. Unfortunately, the
9138          * hardware is not flexible enough to do this dynamically.
9139          */
9140         if (netif_running(dev))
9141                 ixgbe_close(dev);
9142         else
9143                 ixgbe_reset(adapter);
9144
9145         ixgbe_clear_interrupt_scheme(adapter);
9146
9147 #ifdef CONFIG_IXGBE_DCB
9148         if (tc) {
9149                 if (adapter->xdp_prog) {
9150                         e_warn(probe, "DCB is not supported with XDP\n");
9151
9152                         ixgbe_init_interrupt_scheme(adapter);
9153                         if (netif_running(dev))
9154                                 ixgbe_open(dev);
9155                         return -EINVAL;
9156                 }
9157
9158                 netdev_set_num_tc(dev, tc);
9159                 ixgbe_set_prio_tc_map(adapter);
9160
9161                 adapter->hw_tcs = tc;
9162                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9163
9164                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9165                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9166                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9167                 }
9168         } else {
9169                 netdev_reset_tc(dev);
9170
9171                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9172                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9173
9174                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9175                 adapter->hw_tcs = tc;
9176
9177                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9178                 adapter->dcb_cfg.pfc_mode_enable = false;
9179         }
9180
9181         ixgbe_validate_rtr(adapter, tc);
9182
9183 #endif /* CONFIG_IXGBE_DCB */
9184         ixgbe_init_interrupt_scheme(adapter);
9185
9186         ixgbe_defrag_macvlan_pools(dev);
9187
9188         if (netif_running(dev))
9189                 return ixgbe_open(dev);
9190
9191         return 0;
9192 }
9193
9194 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9195                                struct tc_cls_u32_offload *cls)
9196 {
9197         u32 hdl = cls->knode.handle;
9198         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9199         u32 loc = cls->knode.handle & 0xfffff;
9200         int err = 0, i, j;
9201         struct ixgbe_jump_table *jump = NULL;
9202
9203         if (loc > IXGBE_MAX_HW_ENTRIES)
9204                 return -EINVAL;
9205
9206         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9207                 return -EINVAL;
9208
9209         /* Clear this filter in the link data it is associated with */
9210         if (uhtid != 0x800) {
9211                 jump = adapter->jump_tables[uhtid];
9212                 if (!jump)
9213                         return -EINVAL;
9214                 if (!test_bit(loc - 1, jump->child_loc_map))
9215                         return -EINVAL;
9216                 clear_bit(loc - 1, jump->child_loc_map);
9217         }
9218
9219         /* Check if the filter being deleted is a link */
9220         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9221                 jump = adapter->jump_tables[i];
9222                 if (jump && jump->link_hdl == hdl) {
9223                         /* Delete filters in the hardware in the child hash
9224                          * table associated with this link
9225                          */
9226                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9227                                 if (!test_bit(j, jump->child_loc_map))
9228                                         continue;
9229                                 spin_lock(&adapter->fdir_perfect_lock);
9230                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9231                                                                       NULL,
9232                                                                       j + 1);
9233                                 spin_unlock(&adapter->fdir_perfect_lock);
9234                                 clear_bit(j, jump->child_loc_map);
9235                         }
9236                         /* Remove resources for this link */
9237                         kfree(jump->input);
9238                         kfree(jump->mask);
9239                         kfree(jump);
9240                         adapter->jump_tables[i] = NULL;
9241                         return err;
9242                 }
9243         }
9244
9245         spin_lock(&adapter->fdir_perfect_lock);
9246         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9247         spin_unlock(&adapter->fdir_perfect_lock);
9248         return err;
9249 }
9250
9251 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9252                                             struct tc_cls_u32_offload *cls)
9253 {
9254         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9255
9256         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9257                 return -EINVAL;
9258
9259         /* This ixgbe devices do not support hash tables at the moment
9260          * so abort when given hash tables.
9261          */
9262         if (cls->hnode.divisor > 0)
9263                 return -EINVAL;
9264
9265         set_bit(uhtid - 1, &adapter->tables);
9266         return 0;
9267 }
9268
9269 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9270                                             struct tc_cls_u32_offload *cls)
9271 {
9272         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9273
9274         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9275                 return -EINVAL;
9276
9277         clear_bit(uhtid - 1, &adapter->tables);
9278         return 0;
9279 }
9280
9281 #ifdef CONFIG_NET_CLS_ACT
9282 struct upper_walk_data {
9283         struct ixgbe_adapter *adapter;
9284         u64 action;
9285         int ifindex;
9286         u8 queue;
9287 };
9288
9289 static int get_macvlan_queue(struct net_device *upper, void *_data)
9290 {
9291         if (netif_is_macvlan(upper)) {
9292                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9293                 struct upper_walk_data *data = _data;
9294                 struct ixgbe_adapter *adapter = data->adapter;
9295                 int ifindex = data->ifindex;
9296
9297                 if (vadapter && upper->ifindex == ifindex) {
9298                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9299                         data->action = data->queue;
9300                         return 1;
9301                 }
9302         }
9303
9304         return 0;
9305 }
9306
9307 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9308                                   u8 *queue, u64 *action)
9309 {
9310         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9311         unsigned int num_vfs = adapter->num_vfs, vf;
9312         struct upper_walk_data data;
9313         struct net_device *upper;
9314
9315         /* redirect to a SRIOV VF */
9316         for (vf = 0; vf < num_vfs; ++vf) {
9317                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9318                 if (upper->ifindex == ifindex) {
9319                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9320                         *action = vf + 1;
9321                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9322                         return 0;
9323                 }
9324         }
9325
9326         /* redirect to a offloaded macvlan netdev */
9327         data.adapter = adapter;
9328         data.ifindex = ifindex;
9329         data.action = 0;
9330         data.queue = 0;
9331         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9332                                           get_macvlan_queue, &data)) {
9333                 *action = data.action;
9334                 *queue = data.queue;
9335
9336                 return 0;
9337         }
9338
9339         return -EINVAL;
9340 }
9341
9342 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9343                             struct tcf_exts *exts, u64 *action, u8 *queue)
9344 {
9345         const struct tc_action *a;
9346         int i;
9347
9348         if (!tcf_exts_has_actions(exts))
9349                 return -EINVAL;
9350
9351         tcf_exts_for_each_action(i, a, exts) {
9352                 /* Drop action */
9353                 if (is_tcf_gact_shot(a)) {
9354                         *action = IXGBE_FDIR_DROP_QUEUE;
9355                         *queue = IXGBE_FDIR_DROP_QUEUE;
9356                         return 0;
9357                 }
9358
9359                 /* Redirect to a VF or a offloaded macvlan */
9360                 if (is_tcf_mirred_egress_redirect(a)) {
9361                         struct net_device *dev = tcf_mirred_dev(a);
9362
9363                         if (!dev)
9364                                 return -EINVAL;
9365                         return handle_redirect_action(adapter, dev->ifindex,
9366                                                       queue, action);
9367                 }
9368
9369                 return -EINVAL;
9370         }
9371
9372         return -EINVAL;
9373 }
9374 #else
9375 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9376                             struct tcf_exts *exts, u64 *action, u8 *queue)
9377 {
9378         return -EINVAL;
9379 }
9380 #endif /* CONFIG_NET_CLS_ACT */
9381
9382 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9383                                     union ixgbe_atr_input *mask,
9384                                     struct tc_cls_u32_offload *cls,
9385                                     struct ixgbe_mat_field *field_ptr,
9386                                     struct ixgbe_nexthdr *nexthdr)
9387 {
9388         int i, j, off;
9389         __be32 val, m;
9390         bool found_entry = false, found_jump_field = false;
9391
9392         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9393                 off = cls->knode.sel->keys[i].off;
9394                 val = cls->knode.sel->keys[i].val;
9395                 m = cls->knode.sel->keys[i].mask;
9396
9397                 for (j = 0; field_ptr[j].val; j++) {
9398                         if (field_ptr[j].off == off) {
9399                                 field_ptr[j].val(input, mask, (__force u32)val,
9400                                                  (__force u32)m);
9401                                 input->filter.formatted.flow_type |=
9402                                         field_ptr[j].type;
9403                                 found_entry = true;
9404                                 break;
9405                         }
9406                 }
9407                 if (nexthdr) {
9408                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9409                             nexthdr->val ==
9410                             (__force u32)cls->knode.sel->keys[i].val &&
9411                             nexthdr->mask ==
9412                             (__force u32)cls->knode.sel->keys[i].mask)
9413                                 found_jump_field = true;
9414                         else
9415                                 continue;
9416                 }
9417         }
9418
9419         if (nexthdr && !found_jump_field)
9420                 return -EINVAL;
9421
9422         if (!found_entry)
9423                 return 0;
9424
9425         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9426                                     IXGBE_ATR_L4TYPE_MASK;
9427
9428         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9429                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9430
9431         return 0;
9432 }
9433
9434 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9435                                   struct tc_cls_u32_offload *cls)
9436 {
9437         __be16 protocol = cls->common.protocol;
9438         u32 loc = cls->knode.handle & 0xfffff;
9439         struct ixgbe_hw *hw = &adapter->hw;
9440         struct ixgbe_mat_field *field_ptr;
9441         struct ixgbe_fdir_filter *input = NULL;
9442         union ixgbe_atr_input *mask = NULL;
9443         struct ixgbe_jump_table *jump = NULL;
9444         int i, err = -EINVAL;
9445         u8 queue;
9446         u32 uhtid, link_uhtid;
9447
9448         uhtid = TC_U32_USERHTID(cls->knode.handle);
9449         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9450
9451         /* At the moment cls_u32 jumps to network layer and skips past
9452          * L2 headers. The canonical method to match L2 frames is to use
9453          * negative values. However this is error prone at best but really
9454          * just broken because there is no way to "know" what sort of hdr
9455          * is in front of the network layer. Fix cls_u32 to support L2
9456          * headers when needed.
9457          */
9458         if (protocol != htons(ETH_P_IP))
9459                 return err;
9460
9461         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9462                 e_err(drv, "Location out of range\n");
9463                 return err;
9464         }
9465
9466         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9467          * links and also the fields used to advance the parser across each
9468          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9469          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9470          * To add support for new nodes update ixgbe_model.h parse structures
9471          * this function _should_ be generic try not to hardcode values here.
9472          */
9473         if (uhtid == 0x800) {
9474                 field_ptr = (adapter->jump_tables[0])->mat;
9475         } else {
9476                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9477                         return err;
9478                 if (!adapter->jump_tables[uhtid])
9479                         return err;
9480                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9481         }
9482
9483         if (!field_ptr)
9484                 return err;
9485
9486         /* At this point we know the field_ptr is valid and need to either
9487          * build cls_u32 link or attach filter. Because adding a link to
9488          * a handle that does not exist is invalid and the same for adding
9489          * rules to handles that don't exist.
9490          */
9491
9492         if (link_uhtid) {
9493                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9494
9495                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9496                         return err;
9497
9498                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9499                         return err;
9500
9501                 /* Multiple filters as links to the same hash table are not
9502                  * supported. To add a new filter with the same next header
9503                  * but different match/jump conditions, create a new hash table
9504                  * and link to it.
9505                  */
9506                 if (adapter->jump_tables[link_uhtid] &&
9507                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9508                         e_err(drv, "Link filter exists for link: %x\n",
9509                               link_uhtid);
9510                         return err;
9511                 }
9512
9513                 for (i = 0; nexthdr[i].jump; i++) {
9514                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9515                             nexthdr[i].s != cls->knode.sel->offshift ||
9516                             nexthdr[i].m !=
9517                             (__force u32)cls->knode.sel->offmask)
9518                                 return err;
9519
9520                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9521                         if (!jump)
9522                                 return -ENOMEM;
9523                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9524                         if (!input) {
9525                                 err = -ENOMEM;
9526                                 goto free_jump;
9527                         }
9528                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9529                         if (!mask) {
9530                                 err = -ENOMEM;
9531                                 goto free_input;
9532                         }
9533                         jump->input = input;
9534                         jump->mask = mask;
9535                         jump->link_hdl = cls->knode.handle;
9536
9537                         err = ixgbe_clsu32_build_input(input, mask, cls,
9538                                                        field_ptr, &nexthdr[i]);
9539                         if (!err) {
9540                                 jump->mat = nexthdr[i].jump;
9541                                 adapter->jump_tables[link_uhtid] = jump;
9542                                 break;
9543                         } else {
9544                                 kfree(mask);
9545                                 kfree(input);
9546                                 kfree(jump);
9547                         }
9548                 }
9549                 return 0;
9550         }
9551
9552         input = kzalloc(sizeof(*input), GFP_KERNEL);
9553         if (!input)
9554                 return -ENOMEM;
9555         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9556         if (!mask) {
9557                 err = -ENOMEM;
9558                 goto free_input;
9559         }
9560
9561         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9562                 if ((adapter->jump_tables[uhtid])->input)
9563                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9564                                sizeof(*input));
9565                 if ((adapter->jump_tables[uhtid])->mask)
9566                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9567                                sizeof(*mask));
9568
9569                 /* Lookup in all child hash tables if this location is already
9570                  * filled with a filter
9571                  */
9572                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9573                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9574
9575                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9576                                 e_err(drv, "Filter exists in location: %x\n",
9577                                       loc);
9578                                 err = -EINVAL;
9579                                 goto err_out;
9580                         }
9581                 }
9582         }
9583         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9584         if (err)
9585                 goto err_out;
9586
9587         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9588                                &queue);
9589         if (err < 0)
9590                 goto err_out;
9591
9592         input->sw_idx = loc;
9593
9594         spin_lock(&adapter->fdir_perfect_lock);
9595
9596         if (hlist_empty(&adapter->fdir_filter_list)) {
9597                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9598                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9599                 if (err)
9600                         goto err_out_w_lock;
9601         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9602                 err = -EINVAL;
9603                 goto err_out_w_lock;
9604         }
9605
9606         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9607         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9608                                                     input->sw_idx, queue);
9609         if (!err)
9610                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9611         spin_unlock(&adapter->fdir_perfect_lock);
9612
9613         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9614                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9615
9616         kfree(mask);
9617         return err;
9618 err_out_w_lock:
9619         spin_unlock(&adapter->fdir_perfect_lock);
9620 err_out:
9621         kfree(mask);
9622 free_input:
9623         kfree(input);
9624 free_jump:
9625         kfree(jump);
9626         return err;
9627 }
9628
9629 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9630                                   struct tc_cls_u32_offload *cls_u32)
9631 {
9632         switch (cls_u32->command) {
9633         case TC_CLSU32_NEW_KNODE:
9634         case TC_CLSU32_REPLACE_KNODE:
9635                 return ixgbe_configure_clsu32(adapter, cls_u32);
9636         case TC_CLSU32_DELETE_KNODE:
9637                 return ixgbe_delete_clsu32(adapter, cls_u32);
9638         case TC_CLSU32_NEW_HNODE:
9639         case TC_CLSU32_REPLACE_HNODE:
9640                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9641         case TC_CLSU32_DELETE_HNODE:
9642                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9643         default:
9644                 return -EOPNOTSUPP;
9645         }
9646 }
9647
9648 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9649                                    void *cb_priv)
9650 {
9651         struct ixgbe_adapter *adapter = cb_priv;
9652
9653         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9654                 return -EOPNOTSUPP;
9655
9656         switch (type) {
9657         case TC_SETUP_CLSU32:
9658                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9659         default:
9660                 return -EOPNOTSUPP;
9661         }
9662 }
9663
9664 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9665                                  struct tc_mqprio_qopt *mqprio)
9666 {
9667         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9668         return ixgbe_setup_tc(dev, mqprio->num_tc);
9669 }
9670
9671 static LIST_HEAD(ixgbe_block_cb_list);
9672
9673 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9674                             void *type_data)
9675 {
9676         struct ixgbe_adapter *adapter = netdev_priv(dev);
9677
9678         switch (type) {
9679         case TC_SETUP_BLOCK:
9680                 return flow_block_cb_setup_simple(type_data,
9681                                                   &ixgbe_block_cb_list,
9682                                                   ixgbe_setup_tc_block_cb,
9683                                                   adapter, adapter, true);
9684         case TC_SETUP_QDISC_MQPRIO:
9685                 return ixgbe_setup_tc_mqprio(dev, type_data);
9686         default:
9687                 return -EOPNOTSUPP;
9688         }
9689 }
9690
9691 #ifdef CONFIG_PCI_IOV
9692 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9693 {
9694         struct net_device *netdev = adapter->netdev;
9695
9696         rtnl_lock();
9697         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9698         rtnl_unlock();
9699 }
9700
9701 #endif
9702 void ixgbe_do_reset(struct net_device *netdev)
9703 {
9704         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9705
9706         if (netif_running(netdev))
9707                 ixgbe_reinit_locked(adapter);
9708         else
9709                 ixgbe_reset(adapter);
9710 }
9711
9712 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9713                                             netdev_features_t features)
9714 {
9715         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9716
9717         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9718         if (!(features & NETIF_F_RXCSUM))
9719                 features &= ~NETIF_F_LRO;
9720
9721         /* Turn off LRO if not RSC capable */
9722         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9723                 features &= ~NETIF_F_LRO;
9724
9725         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9726                 e_dev_err("LRO is not supported with XDP\n");
9727                 features &= ~NETIF_F_LRO;
9728         }
9729
9730         return features;
9731 }
9732
9733 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9734 {
9735         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9736                         num_online_cpus());
9737
9738         /* go back to full RSS if we're not running SR-IOV */
9739         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9740                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9741                                     IXGBE_FLAG_SRIOV_ENABLED);
9742
9743         adapter->ring_feature[RING_F_RSS].limit = rss;
9744         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9745
9746         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9747 }
9748
9749 static int ixgbe_set_features(struct net_device *netdev,
9750                               netdev_features_t features)
9751 {
9752         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9753         netdev_features_t changed = netdev->features ^ features;
9754         bool need_reset = false;
9755
9756         /* Make sure RSC matches LRO, reset if change */
9757         if (!(features & NETIF_F_LRO)) {
9758                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9759                         need_reset = true;
9760                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9761         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9762                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9763                 if (adapter->rx_itr_setting == 1 ||
9764                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9765                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9766                         need_reset = true;
9767                 } else if ((changed ^ features) & NETIF_F_LRO) {
9768                         e_info(probe, "rx-usecs set too low, "
9769                                "disabling RSC\n");
9770                 }
9771         }
9772
9773         /*
9774          * Check if Flow Director n-tuple support or hw_tc support was
9775          * enabled or disabled.  If the state changed, we need to reset.
9776          */
9777         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9778                 /* turn off ATR, enable perfect filters and reset */
9779                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9780                         need_reset = true;
9781
9782                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9783                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9784         } else {
9785                 /* turn off perfect filters, enable ATR and reset */
9786                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9787                         need_reset = true;
9788
9789                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9790
9791                 /* We cannot enable ATR if SR-IOV is enabled */
9792                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9793                     /* We cannot enable ATR if we have 2 or more tcs */
9794                     (adapter->hw_tcs > 1) ||
9795                     /* We cannot enable ATR if RSS is disabled */
9796                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9797                     /* A sample rate of 0 indicates ATR disabled */
9798                     (!adapter->atr_sample_rate))
9799                         ; /* do nothing not supported */
9800                 else /* otherwise supported and set the flag */
9801                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9802         }
9803
9804         if (changed & NETIF_F_RXALL)
9805                 need_reset = true;
9806
9807         netdev->features = features;
9808
9809         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9810                 if (features & NETIF_F_RXCSUM) {
9811                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9812                 } else {
9813                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9814
9815                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9816                 }
9817         }
9818
9819         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9820                 if (features & NETIF_F_RXCSUM) {
9821                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9822                 } else {
9823                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9824
9825                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9826                 }
9827         }
9828
9829         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9830                 ixgbe_reset_l2fw_offload(adapter);
9831         else if (need_reset)
9832                 ixgbe_do_reset(netdev);
9833         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9834                             NETIF_F_HW_VLAN_CTAG_FILTER))
9835                 ixgbe_set_rx_mode(netdev);
9836
9837         return 1;
9838 }
9839
9840 /**
9841  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9842  * @dev: The port's netdev
9843  * @ti: Tunnel endpoint information
9844  **/
9845 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9846                                       struct udp_tunnel_info *ti)
9847 {
9848         struct ixgbe_adapter *adapter = netdev_priv(dev);
9849         struct ixgbe_hw *hw = &adapter->hw;
9850         __be16 port = ti->port;
9851         u32 port_shift = 0;
9852         u32 reg;
9853
9854         if (ti->sa_family != AF_INET)
9855                 return;
9856
9857         switch (ti->type) {
9858         case UDP_TUNNEL_TYPE_VXLAN:
9859                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9860                         return;
9861
9862                 if (adapter->vxlan_port == port)
9863                         return;
9864
9865                 if (adapter->vxlan_port) {
9866                         netdev_info(dev,
9867                                     "VXLAN port %d set, not adding port %d\n",
9868                                     ntohs(adapter->vxlan_port),
9869                                     ntohs(port));
9870                         return;
9871                 }
9872
9873                 adapter->vxlan_port = port;
9874                 break;
9875         case UDP_TUNNEL_TYPE_GENEVE:
9876                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9877                         return;
9878
9879                 if (adapter->geneve_port == port)
9880                         return;
9881
9882                 if (adapter->geneve_port) {
9883                         netdev_info(dev,
9884                                     "GENEVE port %d set, not adding port %d\n",
9885                                     ntohs(adapter->geneve_port),
9886                                     ntohs(port));
9887                         return;
9888                 }
9889
9890                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9891                 adapter->geneve_port = port;
9892                 break;
9893         default:
9894                 return;
9895         }
9896
9897         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9898         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9899 }
9900
9901 /**
9902  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9903  * @dev: The port's netdev
9904  * @ti: Tunnel endpoint information
9905  **/
9906 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9907                                       struct udp_tunnel_info *ti)
9908 {
9909         struct ixgbe_adapter *adapter = netdev_priv(dev);
9910         u32 port_mask;
9911
9912         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9913             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9914                 return;
9915
9916         if (ti->sa_family != AF_INET)
9917                 return;
9918
9919         switch (ti->type) {
9920         case UDP_TUNNEL_TYPE_VXLAN:
9921                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9922                         return;
9923
9924                 if (adapter->vxlan_port != ti->port) {
9925                         netdev_info(dev, "VXLAN port %d not found\n",
9926                                     ntohs(ti->port));
9927                         return;
9928                 }
9929
9930                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9931                 break;
9932         case UDP_TUNNEL_TYPE_GENEVE:
9933                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9934                         return;
9935
9936                 if (adapter->geneve_port != ti->port) {
9937                         netdev_info(dev, "GENEVE port %d not found\n",
9938                                     ntohs(ti->port));
9939                         return;
9940                 }
9941
9942                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9943                 break;
9944         default:
9945                 return;
9946         }
9947
9948         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9949         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9950 }
9951
9952 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9953                              struct net_device *dev,
9954                              const unsigned char *addr, u16 vid,
9955                              u16 flags,
9956                              struct netlink_ext_ack *extack)
9957 {
9958         /* guarantee we can provide a unique filter for the unicast address */
9959         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9960                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9961                 u16 pool = VMDQ_P(0);
9962
9963                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9964                         return -ENOMEM;
9965         }
9966
9967         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9968 }
9969
9970 /**
9971  * ixgbe_configure_bridge_mode - set various bridge modes
9972  * @adapter: the private structure
9973  * @mode: requested bridge mode
9974  *
9975  * Configure some settings require for various bridge modes.
9976  **/
9977 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9978                                        __u16 mode)
9979 {
9980         struct ixgbe_hw *hw = &adapter->hw;
9981         unsigned int p, num_pools;
9982         u32 vmdctl;
9983
9984         switch (mode) {
9985         case BRIDGE_MODE_VEPA:
9986                 /* disable Tx loopback, rely on switch hairpin mode */
9987                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9988
9989                 /* must enable Rx switching replication to allow multicast
9990                  * packet reception on all VFs, and to enable source address
9991                  * pruning.
9992                  */
9993                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9994                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9995                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9996
9997                 /* enable Rx source address pruning. Note, this requires
9998                  * replication to be enabled or else it does nothing.
9999                  */
10000                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
10001                 for (p = 0; p < num_pools; p++) {
10002                         if (hw->mac.ops.set_source_address_pruning)
10003                                 hw->mac.ops.set_source_address_pruning(hw,
10004                                                                        true,
10005                                                                        p);
10006                 }
10007                 break;
10008         case BRIDGE_MODE_VEB:
10009                 /* enable Tx loopback for internal VF/PF communication */
10010                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
10011                                 IXGBE_PFDTXGSWC_VT_LBEN);
10012
10013                 /* disable Rx switching replication unless we have SR-IOV
10014                  * virtual functions
10015                  */
10016                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
10017                 if (!adapter->num_vfs)
10018                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
10019                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
10020
10021                 /* disable Rx source address pruning, since we don't expect to
10022                  * be receiving external loopback of our transmitted frames.
10023                  */
10024                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
10025                 for (p = 0; p < num_pools; p++) {
10026                         if (hw->mac.ops.set_source_address_pruning)
10027                                 hw->mac.ops.set_source_address_pruning(hw,
10028                                                                        false,
10029                                                                        p);
10030                 }
10031                 break;
10032         default:
10033                 return -EINVAL;
10034         }
10035
10036         adapter->bridge_mode = mode;
10037
10038         e_info(drv, "enabling bridge mode: %s\n",
10039                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10040
10041         return 0;
10042 }
10043
10044 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
10045                                     struct nlmsghdr *nlh, u16 flags,
10046                                     struct netlink_ext_ack *extack)
10047 {
10048         struct ixgbe_adapter *adapter = netdev_priv(dev);
10049         struct nlattr *attr, *br_spec;
10050         int rem;
10051
10052         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10053                 return -EOPNOTSUPP;
10054
10055         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
10056         if (!br_spec)
10057                 return -EINVAL;
10058
10059         nla_for_each_nested(attr, br_spec, rem) {
10060                 int status;
10061                 __u16 mode;
10062
10063                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
10064                         continue;
10065
10066                 if (nla_len(attr) < sizeof(mode))
10067                         return -EINVAL;
10068
10069                 mode = nla_get_u16(attr);
10070                 status = ixgbe_configure_bridge_mode(adapter, mode);
10071                 if (status)
10072                         return status;
10073
10074                 break;
10075         }
10076
10077         return 0;
10078 }
10079
10080 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
10081                                     struct net_device *dev,
10082                                     u32 filter_mask, int nlflags)
10083 {
10084         struct ixgbe_adapter *adapter = netdev_priv(dev);
10085
10086         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10087                 return 0;
10088
10089         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
10090                                        adapter->bridge_mode, 0, 0, nlflags,
10091                                        filter_mask, NULL);
10092 }
10093
10094 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10095 {
10096         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10097         struct ixgbe_fwd_adapter *accel;
10098         int tcs = adapter->hw_tcs ? : 1;
10099         int pool, err;
10100
10101         if (adapter->xdp_prog) {
10102                 e_warn(probe, "L2FW offload is not supported with XDP\n");
10103                 return ERR_PTR(-EINVAL);
10104         }
10105
10106         /* The hardware supported by ixgbe only filters on the destination MAC
10107          * address. In order to avoid issues we only support offloading modes
10108          * where the hardware can actually provide the functionality.
10109          */
10110         if (!macvlan_supports_dest_filter(vdev))
10111                 return ERR_PTR(-EMEDIUMTYPE);
10112
10113         /* We need to lock down the macvlan to be a single queue device so that
10114          * we can reuse the tc_to_txq field in the macvlan netdev to represent
10115          * the queue mapping to our netdev.
10116          */
10117         if (netif_is_multiqueue(vdev))
10118                 return ERR_PTR(-ERANGE);
10119
10120         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10121         if (pool == adapter->num_rx_pools) {
10122                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10123                 u16 reserved_pools;
10124
10125                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10126                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10127                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10128                         return ERR_PTR(-EBUSY);
10129
10130                 /* Hardware has a limited number of available pools. Each VF,
10131                  * and the PF require a pool. Check to ensure we don't
10132                  * attempt to use more then the available number of pools.
10133                  */
10134                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10135                         return ERR_PTR(-EBUSY);
10136
10137                 /* Enable VMDq flag so device will be set in VM mode */
10138                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10139                                   IXGBE_FLAG_SRIOV_ENABLED;
10140
10141                 /* Try to reserve as many queues per pool as possible,
10142                  * we start with the configurations that support 4 queues
10143                  * per pools, followed by 2, and then by just 1 per pool.
10144                  */
10145                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10146                         reserved_pools = min_t(u16,
10147                                                32 - used_pools,
10148                                                16 - adapter->num_rx_pools);
10149                 else if (adapter->num_rx_pools < 32)
10150                         reserved_pools = min_t(u16,
10151                                                64 - used_pools,
10152                                                32 - adapter->num_rx_pools);
10153                 else
10154                         reserved_pools = 64 - used_pools;
10155
10156
10157                 if (!reserved_pools)
10158                         return ERR_PTR(-EBUSY);
10159
10160                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10161
10162                 /* Force reinit of ring allocation with VMDQ enabled */
10163                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10164                 if (err)
10165                         return ERR_PTR(err);
10166
10167                 if (pool >= adapter->num_rx_pools)
10168                         return ERR_PTR(-ENOMEM);
10169         }
10170
10171         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10172         if (!accel)
10173                 return ERR_PTR(-ENOMEM);
10174
10175         set_bit(pool, adapter->fwd_bitmask);
10176         netdev_set_sb_channel(vdev, pool);
10177         accel->pool = pool;
10178         accel->netdev = vdev;
10179
10180         if (!netif_running(pdev))
10181                 return accel;
10182
10183         err = ixgbe_fwd_ring_up(adapter, accel);
10184         if (err)
10185                 return ERR_PTR(err);
10186
10187         return accel;
10188 }
10189
10190 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10191 {
10192         struct ixgbe_fwd_adapter *accel = priv;
10193         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10194         unsigned int rxbase = accel->rx_base_queue;
10195         unsigned int i;
10196
10197         /* delete unicast filter associated with offloaded interface */
10198         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10199                              VMDQ_P(accel->pool));
10200
10201         /* Allow remaining Rx packets to get flushed out of the
10202          * Rx FIFO before we drop the netdev for the ring.
10203          */
10204         usleep_range(10000, 20000);
10205
10206         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10207                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10208                 struct ixgbe_q_vector *qv = ring->q_vector;
10209
10210                 /* Make sure we aren't processing any packets and clear
10211                  * netdev to shut down the ring.
10212                  */
10213                 if (netif_running(adapter->netdev))
10214                         napi_synchronize(&qv->napi);
10215                 ring->netdev = NULL;
10216         }
10217
10218         /* unbind the queues and drop the subordinate channel config */
10219         netdev_unbind_sb_channel(pdev, accel->netdev);
10220         netdev_set_sb_channel(accel->netdev, 0);
10221
10222         clear_bit(accel->pool, adapter->fwd_bitmask);
10223         kfree(accel);
10224 }
10225
10226 #define IXGBE_MAX_MAC_HDR_LEN           127
10227 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10228
10229 static netdev_features_t
10230 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10231                      netdev_features_t features)
10232 {
10233         unsigned int network_hdr_len, mac_hdr_len;
10234
10235         /* Make certain the headers can be described by a context descriptor */
10236         mac_hdr_len = skb_network_header(skb) - skb->data;
10237         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10238                 return features & ~(NETIF_F_HW_CSUM |
10239                                     NETIF_F_SCTP_CRC |
10240                                     NETIF_F_GSO_UDP_L4 |
10241                                     NETIF_F_HW_VLAN_CTAG_TX |
10242                                     NETIF_F_TSO |
10243                                     NETIF_F_TSO6);
10244
10245         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10246         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10247                 return features & ~(NETIF_F_HW_CSUM |
10248                                     NETIF_F_SCTP_CRC |
10249                                     NETIF_F_GSO_UDP_L4 |
10250                                     NETIF_F_TSO |
10251                                     NETIF_F_TSO6);
10252
10253         /* We can only support IPV4 TSO in tunnels if we can mangle the
10254          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10255          * IPsec offoad sets skb->encapsulation but still can handle
10256          * the TSO, so it's the exception.
10257          */
10258         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10259 #ifdef CONFIG_IXGBE_IPSEC
10260                 if (!secpath_exists(skb))
10261 #endif
10262                         features &= ~NETIF_F_TSO;
10263         }
10264
10265         return features;
10266 }
10267
10268 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10269 {
10270         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10271         struct ixgbe_adapter *adapter = netdev_priv(dev);
10272         struct bpf_prog *old_prog;
10273         bool need_reset;
10274
10275         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10276                 return -EINVAL;
10277
10278         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10279                 return -EINVAL;
10280
10281         /* verify ixgbe ring attributes are sufficient for XDP */
10282         for (i = 0; i < adapter->num_rx_queues; i++) {
10283                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10284
10285                 if (ring_is_rsc_enabled(ring))
10286                         return -EINVAL;
10287
10288                 if (frame_size > ixgbe_rx_bufsz(ring))
10289                         return -EINVAL;
10290         }
10291
10292         if (nr_cpu_ids > MAX_XDP_QUEUES)
10293                 return -ENOMEM;
10294
10295         old_prog = xchg(&adapter->xdp_prog, prog);
10296         need_reset = (!!prog != !!old_prog);
10297
10298         /* If transitioning XDP modes reconfigure rings */
10299         if (need_reset) {
10300                 int err;
10301
10302                 if (!prog)
10303                         /* Wait until ndo_xsk_wakeup completes. */
10304                         synchronize_rcu();
10305                 err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10306
10307                 if (err) {
10308                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10309                         return -EINVAL;
10310                 }
10311         } else {
10312                 for (i = 0; i < adapter->num_rx_queues; i++)
10313                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10314                             adapter->xdp_prog);
10315         }
10316
10317         if (old_prog)
10318                 bpf_prog_put(old_prog);
10319
10320         /* Kick start the NAPI context if there is an AF_XDP socket open
10321          * on that queue id. This so that receiving will start.
10322          */
10323         if (need_reset && prog)
10324                 for (i = 0; i < adapter->num_rx_queues; i++)
10325                         if (adapter->xdp_ring[i]->xsk_umem)
10326                                 (void)ixgbe_xsk_wakeup(adapter->netdev, i,
10327                                                        XDP_WAKEUP_RX);
10328
10329         return 0;
10330 }
10331
10332 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10333 {
10334         struct ixgbe_adapter *adapter = netdev_priv(dev);
10335
10336         switch (xdp->command) {
10337         case XDP_SETUP_PROG:
10338                 return ixgbe_xdp_setup(dev, xdp->prog);
10339         case XDP_QUERY_PROG:
10340                 xdp->prog_id = adapter->xdp_prog ?
10341                         adapter->xdp_prog->aux->id : 0;
10342                 return 0;
10343         case XDP_SETUP_XSK_UMEM:
10344                 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10345                                             xdp->xsk.queue_id);
10346
10347         default:
10348                 return -EINVAL;
10349         }
10350 }
10351
10352 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10353 {
10354         /* Force memory writes to complete before letting h/w know there
10355          * are new descriptors to fetch.
10356          */
10357         wmb();
10358         writel(ring->next_to_use, ring->tail);
10359 }
10360
10361 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10362                           struct xdp_frame **frames, u32 flags)
10363 {
10364         struct ixgbe_adapter *adapter = netdev_priv(dev);
10365         struct ixgbe_ring *ring;
10366         int drops = 0;
10367         int i;
10368
10369         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10370                 return -ENETDOWN;
10371
10372         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10373                 return -EINVAL;
10374
10375         /* During program transitions its possible adapter->xdp_prog is assigned
10376          * but ring has not been configured yet. In this case simply abort xmit.
10377          */
10378         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10379         if (unlikely(!ring))
10380                 return -ENXIO;
10381
10382         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10383                 return -ENXIO;
10384
10385         for (i = 0; i < n; i++) {
10386                 struct xdp_frame *xdpf = frames[i];
10387                 int err;
10388
10389                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10390                 if (err != IXGBE_XDP_TX) {
10391                         xdp_return_frame_rx_napi(xdpf);
10392                         drops++;
10393                 }
10394         }
10395
10396         if (unlikely(flags & XDP_XMIT_FLUSH))
10397                 ixgbe_xdp_ring_update_tail(ring);
10398
10399         return n - drops;
10400 }
10401
10402 static const struct net_device_ops ixgbe_netdev_ops = {
10403         .ndo_open               = ixgbe_open,
10404         .ndo_stop               = ixgbe_close,
10405         .ndo_start_xmit         = ixgbe_xmit_frame,
10406         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10407         .ndo_validate_addr      = eth_validate_addr,
10408         .ndo_set_mac_address    = ixgbe_set_mac,
10409         .ndo_change_mtu         = ixgbe_change_mtu,
10410         .ndo_tx_timeout         = ixgbe_tx_timeout,
10411         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10412         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10413         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10414         .ndo_do_ioctl           = ixgbe_ioctl,
10415         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10416         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10417         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10418         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10419         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10420         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10421         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10422         .ndo_get_stats64        = ixgbe_get_stats64,
10423         .ndo_setup_tc           = __ixgbe_setup_tc,
10424 #ifdef IXGBE_FCOE
10425         .ndo_select_queue       = ixgbe_select_queue,
10426         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10427         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10428         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10429         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10430         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10431         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10432         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10433 #endif /* IXGBE_FCOE */
10434         .ndo_set_features = ixgbe_set_features,
10435         .ndo_fix_features = ixgbe_fix_features,
10436         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10437         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10438         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10439         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10440         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10441         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10442         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10443         .ndo_features_check     = ixgbe_features_check,
10444         .ndo_bpf                = ixgbe_xdp,
10445         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10446         .ndo_xsk_wakeup         = ixgbe_xsk_wakeup,
10447 };
10448
10449 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10450                                  struct ixgbe_ring *tx_ring)
10451 {
10452         unsigned long wait_delay, delay_interval;
10453         struct ixgbe_hw *hw = &adapter->hw;
10454         u8 reg_idx = tx_ring->reg_idx;
10455         int wait_loop;
10456         u32 txdctl;
10457
10458         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10459
10460         /* delay mechanism from ixgbe_disable_tx */
10461         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10462
10463         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10464         wait_delay = delay_interval;
10465
10466         while (wait_loop--) {
10467                 usleep_range(wait_delay, wait_delay + 10);
10468                 wait_delay += delay_interval * 2;
10469                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10470
10471                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10472                         return;
10473         }
10474
10475         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10476 }
10477
10478 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10479                               struct ixgbe_ring *tx_ring)
10480 {
10481         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10482         ixgbe_disable_txr_hw(adapter, tx_ring);
10483 }
10484
10485 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10486                                  struct ixgbe_ring *rx_ring)
10487 {
10488         unsigned long wait_delay, delay_interval;
10489         struct ixgbe_hw *hw = &adapter->hw;
10490         u8 reg_idx = rx_ring->reg_idx;
10491         int wait_loop;
10492         u32 rxdctl;
10493
10494         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10495         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10496         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10497
10498         /* write value back with RXDCTL.ENABLE bit cleared */
10499         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10500
10501         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10502         if (hw->mac.type == ixgbe_mac_82598EB &&
10503             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10504                 return;
10505
10506         /* delay mechanism from ixgbe_disable_rx */
10507         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10508
10509         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10510         wait_delay = delay_interval;
10511
10512         while (wait_loop--) {
10513                 usleep_range(wait_delay, wait_delay + 10);
10514                 wait_delay += delay_interval * 2;
10515                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10516
10517                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10518                         return;
10519         }
10520
10521         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10522 }
10523
10524 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10525 {
10526         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10527         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10528 }
10529
10530 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10531 {
10532         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10533         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10534 }
10535
10536 /**
10537  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10538  * @adapter: adapter structure
10539  * @ring: ring index
10540  *
10541  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10542  * assumes that the netdev is running.
10543  **/
10544 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10545 {
10546         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10547
10548         rx_ring = adapter->rx_ring[ring];
10549         tx_ring = adapter->tx_ring[ring];
10550         xdp_ring = adapter->xdp_ring[ring];
10551
10552         ixgbe_disable_txr(adapter, tx_ring);
10553         if (xdp_ring)
10554                 ixgbe_disable_txr(adapter, xdp_ring);
10555         ixgbe_disable_rxr_hw(adapter, rx_ring);
10556
10557         if (xdp_ring)
10558                 synchronize_rcu();
10559
10560         /* Rx/Tx/XDP Tx share the same napi context. */
10561         napi_disable(&rx_ring->q_vector->napi);
10562
10563         ixgbe_clean_tx_ring(tx_ring);
10564         if (xdp_ring)
10565                 ixgbe_clean_tx_ring(xdp_ring);
10566         ixgbe_clean_rx_ring(rx_ring);
10567
10568         ixgbe_reset_txr_stats(tx_ring);
10569         if (xdp_ring)
10570                 ixgbe_reset_txr_stats(xdp_ring);
10571         ixgbe_reset_rxr_stats(rx_ring);
10572 }
10573
10574 /**
10575  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10576  * @adapter: adapter structure
10577  * @ring: ring index
10578  *
10579  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10580  * assumes that the netdev is running.
10581  **/
10582 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10583 {
10584         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10585
10586         rx_ring = adapter->rx_ring[ring];
10587         tx_ring = adapter->tx_ring[ring];
10588         xdp_ring = adapter->xdp_ring[ring];
10589
10590         /* Rx/Tx/XDP Tx share the same napi context. */
10591         napi_enable(&rx_ring->q_vector->napi);
10592
10593         ixgbe_configure_tx_ring(adapter, tx_ring);
10594         if (xdp_ring)
10595                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10596         ixgbe_configure_rx_ring(adapter, rx_ring);
10597
10598         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10599         if (xdp_ring)
10600                 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10601 }
10602
10603 /**
10604  * ixgbe_enumerate_functions - Get the number of ports this device has
10605  * @adapter: adapter structure
10606  *
10607  * This function enumerates the phsyical functions co-located on a single slot,
10608  * in order to determine how many ports a device has. This is most useful in
10609  * determining the required GT/s of PCIe bandwidth necessary for optimal
10610  * performance.
10611  **/
10612 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10613 {
10614         struct pci_dev *entry, *pdev = adapter->pdev;
10615         int physfns = 0;
10616
10617         /* Some cards can not use the generic count PCIe functions method,
10618          * because they are behind a parent switch, so we hardcode these with
10619          * the correct number of functions.
10620          */
10621         if (ixgbe_pcie_from_parent(&adapter->hw))
10622                 physfns = 4;
10623
10624         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10625                 /* don't count virtual functions */
10626                 if (entry->is_virtfn)
10627                         continue;
10628
10629                 /* When the devices on the bus don't all match our device ID,
10630                  * we can't reliably determine the correct number of
10631                  * functions. This can occur if a function has been direct
10632                  * attached to a virtual machine using VT-d, for example. In
10633                  * this case, simply return -1 to indicate this.
10634                  */
10635                 if ((entry->vendor != pdev->vendor) ||
10636                     (entry->device != pdev->device))
10637                         return -1;
10638
10639                 physfns++;
10640         }
10641
10642         return physfns;
10643 }
10644
10645 /**
10646  * ixgbe_wol_supported - Check whether device supports WoL
10647  * @adapter: the adapter private structure
10648  * @device_id: the device ID
10649  * @subdevice_id: the subsystem device ID
10650  *
10651  * This function is used by probe and ethtool to determine
10652  * which devices have WoL support
10653  *
10654  **/
10655 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10656                          u16 subdevice_id)
10657 {
10658         struct ixgbe_hw *hw = &adapter->hw;
10659         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10660
10661         /* WOL not supported on 82598 */
10662         if (hw->mac.type == ixgbe_mac_82598EB)
10663                 return false;
10664
10665         /* check eeprom to see if WOL is enabled for X540 and newer */
10666         if (hw->mac.type >= ixgbe_mac_X540) {
10667                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10668                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10669                      (hw->bus.func == 0)))
10670                         return true;
10671         }
10672
10673         /* WOL is determined based on device IDs for 82599 MACs */
10674         switch (device_id) {
10675         case IXGBE_DEV_ID_82599_SFP:
10676                 /* Only these subdevices could supports WOL */
10677                 switch (subdevice_id) {
10678                 case IXGBE_SUBDEV_ID_82599_560FLR:
10679                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10680                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10681                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10682                         /* only support first port */
10683                         if (hw->bus.func != 0)
10684                                 break;
10685                         /* fall through */
10686                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10687                 case IXGBE_SUBDEV_ID_82599_SFP:
10688                 case IXGBE_SUBDEV_ID_82599_RNDC:
10689                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10690                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10691                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10692                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10693                         return true;
10694                 }
10695                 break;
10696         case IXGBE_DEV_ID_82599EN_SFP:
10697                 /* Only these subdevices support WOL */
10698                 switch (subdevice_id) {
10699                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10700                         return true;
10701                 }
10702                 break;
10703         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10704                 /* All except this subdevice support WOL */
10705                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10706                         return true;
10707                 break;
10708         case IXGBE_DEV_ID_82599_KX4:
10709                 return  true;
10710         default:
10711                 break;
10712         }
10713
10714         return false;
10715 }
10716
10717 /**
10718  * ixgbe_set_fw_version - Set FW version
10719  * @adapter: the adapter private structure
10720  *
10721  * This function is used by probe and ethtool to determine the FW version to
10722  * format to display. The FW version is taken from the EEPROM/NVM.
10723  */
10724 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10725 {
10726         struct ixgbe_hw *hw = &adapter->hw;
10727         struct ixgbe_nvm_version nvm_ver;
10728
10729         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10730         if (nvm_ver.oem_valid) {
10731                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10732                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10733                          nvm_ver.oem_release);
10734                 return;
10735         }
10736
10737         ixgbe_get_etk_id(hw, &nvm_ver);
10738         ixgbe_get_orom_version(hw, &nvm_ver);
10739
10740         if (nvm_ver.or_valid) {
10741                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10742                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10743                          nvm_ver.or_build, nvm_ver.or_patch);
10744                 return;
10745         }
10746
10747         /* Set ETrack ID format */
10748         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10749                  "0x%08x", nvm_ver.etk_id);
10750 }
10751
10752 /**
10753  * ixgbe_probe - Device Initialization Routine
10754  * @pdev: PCI device information struct
10755  * @ent: entry in ixgbe_pci_tbl
10756  *
10757  * Returns 0 on success, negative on failure
10758  *
10759  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10760  * The OS initialization, configuring of the adapter private structure,
10761  * and a hardware reset occur.
10762  **/
10763 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10764 {
10765         struct net_device *netdev;
10766         struct ixgbe_adapter *adapter = NULL;
10767         struct ixgbe_hw *hw;
10768         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10769         int i, err, pci_using_dac, expected_gts;
10770         unsigned int indices = MAX_TX_QUEUES;
10771         u8 part_str[IXGBE_PBANUM_LENGTH];
10772         bool disable_dev = false;
10773 #ifdef IXGBE_FCOE
10774         u16 device_caps;
10775 #endif
10776         u32 eec;
10777
10778         /* Catch broken hardware that put the wrong VF device ID in
10779          * the PCIe SR-IOV capability.
10780          */
10781         if (pdev->is_virtfn) {
10782                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10783                      pci_name(pdev), pdev->vendor, pdev->device);
10784                 return -EINVAL;
10785         }
10786
10787         err = pci_enable_device_mem(pdev);
10788         if (err)
10789                 return err;
10790
10791         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10792                 pci_using_dac = 1;
10793         } else {
10794                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10795                 if (err) {
10796                         dev_err(&pdev->dev,
10797                                 "No usable DMA configuration, aborting\n");
10798                         goto err_dma;
10799                 }
10800                 pci_using_dac = 0;
10801         }
10802
10803         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10804         if (err) {
10805                 dev_err(&pdev->dev,
10806                         "pci_request_selected_regions failed 0x%x\n", err);
10807                 goto err_pci_reg;
10808         }
10809
10810         pci_enable_pcie_error_reporting(pdev);
10811
10812         pci_set_master(pdev);
10813         pci_save_state(pdev);
10814
10815         if (ii->mac == ixgbe_mac_82598EB) {
10816 #ifdef CONFIG_IXGBE_DCB
10817                 /* 8 TC w/ 4 queues per TC */
10818                 indices = 4 * MAX_TRAFFIC_CLASS;
10819 #else
10820                 indices = IXGBE_MAX_RSS_INDICES;
10821 #endif
10822         }
10823
10824         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10825         if (!netdev) {
10826                 err = -ENOMEM;
10827                 goto err_alloc_etherdev;
10828         }
10829
10830         SET_NETDEV_DEV(netdev, &pdev->dev);
10831
10832         adapter = netdev_priv(netdev);
10833
10834         adapter->netdev = netdev;
10835         adapter->pdev = pdev;
10836         hw = &adapter->hw;
10837         hw->back = adapter;
10838         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10839
10840         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10841                               pci_resource_len(pdev, 0));
10842         adapter->io_addr = hw->hw_addr;
10843         if (!hw->hw_addr) {
10844                 err = -EIO;
10845                 goto err_ioremap;
10846         }
10847
10848         netdev->netdev_ops = &ixgbe_netdev_ops;
10849         ixgbe_set_ethtool_ops(netdev);
10850         netdev->watchdog_timeo = 5 * HZ;
10851         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10852
10853         /* Setup hw api */
10854         hw->mac.ops   = *ii->mac_ops;
10855         hw->mac.type  = ii->mac;
10856         hw->mvals     = ii->mvals;
10857         if (ii->link_ops)
10858                 hw->link.ops  = *ii->link_ops;
10859
10860         /* EEPROM */
10861         hw->eeprom.ops = *ii->eeprom_ops;
10862         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10863         if (ixgbe_removed(hw->hw_addr)) {
10864                 err = -EIO;
10865                 goto err_ioremap;
10866         }
10867         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10868         if (!(eec & BIT(8)))
10869                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10870
10871         /* PHY */
10872         hw->phy.ops = *ii->phy_ops;
10873         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10874         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10875         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10876         hw->phy.mdio.mmds = 0;
10877         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10878         hw->phy.mdio.dev = netdev;
10879         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10880         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10881
10882         /* setup the private structure */
10883         err = ixgbe_sw_init(adapter, ii);
10884         if (err)
10885                 goto err_sw_init;
10886
10887         /* Make sure the SWFW semaphore is in a valid state */
10888         if (hw->mac.ops.init_swfw_sync)
10889                 hw->mac.ops.init_swfw_sync(hw);
10890
10891         /* Make it possible the adapter to be woken up via WOL */
10892         switch (adapter->hw.mac.type) {
10893         case ixgbe_mac_82599EB:
10894         case ixgbe_mac_X540:
10895         case ixgbe_mac_X550:
10896         case ixgbe_mac_X550EM_x:
10897         case ixgbe_mac_x550em_a:
10898                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10899                 break;
10900         default:
10901                 break;
10902         }
10903
10904         /*
10905          * If there is a fan on this device and it has failed log the
10906          * failure.
10907          */
10908         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10909                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10910                 if (esdp & IXGBE_ESDP_SDP1)
10911                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10912         }
10913
10914         if (allow_unsupported_sfp)
10915                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10916
10917         /* reset_hw fills in the perm_addr as well */
10918         hw->phy.reset_if_overtemp = true;
10919         err = hw->mac.ops.reset_hw(hw);
10920         hw->phy.reset_if_overtemp = false;
10921         ixgbe_set_eee_capable(adapter);
10922         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10923                 err = 0;
10924         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10925                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10926                 e_dev_err("Reload the driver after installing a supported module.\n");
10927                 goto err_sw_init;
10928         } else if (err) {
10929                 e_dev_err("HW Init failed: %d\n", err);
10930                 goto err_sw_init;
10931         }
10932
10933 #ifdef CONFIG_PCI_IOV
10934         /* SR-IOV not supported on the 82598 */
10935         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10936                 goto skip_sriov;
10937         /* Mailbox */
10938         ixgbe_init_mbx_params_pf(hw);
10939         hw->mbx.ops = ii->mbx_ops;
10940         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10941         ixgbe_enable_sriov(adapter, max_vfs);
10942 skip_sriov:
10943
10944 #endif
10945         netdev->features = NETIF_F_SG |
10946                            NETIF_F_TSO |
10947                            NETIF_F_TSO6 |
10948                            NETIF_F_RXHASH |
10949                            NETIF_F_RXCSUM |
10950                            NETIF_F_HW_CSUM;
10951
10952 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10953                                     NETIF_F_GSO_GRE_CSUM | \
10954                                     NETIF_F_GSO_IPXIP4 | \
10955                                     NETIF_F_GSO_IPXIP6 | \
10956                                     NETIF_F_GSO_UDP_TUNNEL | \
10957                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10958
10959         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10960         netdev->features |= NETIF_F_GSO_PARTIAL |
10961                             IXGBE_GSO_PARTIAL_FEATURES;
10962
10963         if (hw->mac.type >= ixgbe_mac_82599EB)
10964                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
10965
10966 #ifdef CONFIG_IXGBE_IPSEC
10967 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10968                                  NETIF_F_HW_ESP_TX_CSUM | \
10969                                  NETIF_F_GSO_ESP)
10970
10971         if (adapter->ipsec)
10972                 netdev->features |= IXGBE_ESP_FEATURES;
10973 #endif
10974         /* copy netdev features into list of user selectable features */
10975         netdev->hw_features |= netdev->features |
10976                                NETIF_F_HW_VLAN_CTAG_FILTER |
10977                                NETIF_F_HW_VLAN_CTAG_RX |
10978                                NETIF_F_HW_VLAN_CTAG_TX |
10979                                NETIF_F_RXALL |
10980                                NETIF_F_HW_L2FW_DOFFLOAD;
10981
10982         if (hw->mac.type >= ixgbe_mac_82599EB)
10983                 netdev->hw_features |= NETIF_F_NTUPLE |
10984                                        NETIF_F_HW_TC;
10985
10986         if (pci_using_dac)
10987                 netdev->features |= NETIF_F_HIGHDMA;
10988
10989         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10990         netdev->hw_enc_features |= netdev->vlan_features;
10991         netdev->mpls_features |= NETIF_F_SG |
10992                                  NETIF_F_TSO |
10993                                  NETIF_F_TSO6 |
10994                                  NETIF_F_HW_CSUM;
10995         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10996
10997         /* set this bit last since it cannot be part of vlan_features */
10998         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10999                             NETIF_F_HW_VLAN_CTAG_RX |
11000                             NETIF_F_HW_VLAN_CTAG_TX;
11001
11002         netdev->priv_flags |= IFF_UNICAST_FLT;
11003         netdev->priv_flags |= IFF_SUPP_NOFCS;
11004
11005         /* MTU range: 68 - 9710 */
11006         netdev->min_mtu = ETH_MIN_MTU;
11007         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
11008
11009 #ifdef CONFIG_IXGBE_DCB
11010         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
11011                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
11012 #endif
11013
11014 #ifdef IXGBE_FCOE
11015         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
11016                 unsigned int fcoe_l;
11017
11018                 if (hw->mac.ops.get_device_caps) {
11019                         hw->mac.ops.get_device_caps(hw, &device_caps);
11020                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
11021                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
11022                 }
11023
11024
11025                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
11026                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
11027
11028                 netdev->features |= NETIF_F_FSO |
11029                                     NETIF_F_FCOE_CRC;
11030
11031                 netdev->vlan_features |= NETIF_F_FSO |
11032                                          NETIF_F_FCOE_CRC |
11033                                          NETIF_F_FCOE_MTU;
11034         }
11035 #endif /* IXGBE_FCOE */
11036         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
11037                 netdev->hw_features |= NETIF_F_LRO;
11038         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
11039                 netdev->features |= NETIF_F_LRO;
11040
11041         if (ixgbe_check_fw_error(adapter)) {
11042                 err = -EIO;
11043                 goto err_sw_init;
11044         }
11045
11046         /* make sure the EEPROM is good */
11047         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
11048                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
11049                 err = -EIO;
11050                 goto err_sw_init;
11051         }
11052
11053         eth_platform_get_mac_address(&adapter->pdev->dev,
11054                                      adapter->hw.mac.perm_addr);
11055
11056         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
11057
11058         if (!is_valid_ether_addr(netdev->dev_addr)) {
11059                 e_dev_err("invalid MAC address\n");
11060                 err = -EIO;
11061                 goto err_sw_init;
11062         }
11063
11064         /* Set hw->mac.addr to permanent MAC address */
11065         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
11066         ixgbe_mac_set_default_filter(adapter);
11067
11068         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
11069
11070         if (ixgbe_removed(hw->hw_addr)) {
11071                 err = -EIO;
11072                 goto err_sw_init;
11073         }
11074         INIT_WORK(&adapter->service_task, ixgbe_service_task);
11075         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
11076         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
11077
11078         err = ixgbe_init_interrupt_scheme(adapter);
11079         if (err)
11080                 goto err_sw_init;
11081
11082         for (i = 0; i < adapter->num_rx_queues; i++)
11083                 u64_stats_init(&adapter->rx_ring[i]->syncp);
11084         for (i = 0; i < adapter->num_tx_queues; i++)
11085                 u64_stats_init(&adapter->tx_ring[i]->syncp);
11086         for (i = 0; i < adapter->num_xdp_queues; i++)
11087                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
11088
11089         /* WOL not supported for all devices */
11090         adapter->wol = 0;
11091         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
11092         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
11093                                                 pdev->subsystem_device);
11094         if (hw->wol_enabled)
11095                 adapter->wol = IXGBE_WUFC_MAG;
11096
11097         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
11098
11099         /* save off EEPROM version number */
11100         ixgbe_set_fw_version(adapter);
11101
11102         /* pick up the PCI bus settings for reporting later */
11103         if (ixgbe_pcie_from_parent(hw))
11104                 ixgbe_get_parent_bus_info(adapter);
11105         else
11106                  hw->mac.ops.get_bus_info(hw);
11107
11108         /* calculate the expected PCIe bandwidth required for optimal
11109          * performance. Note that some older parts will never have enough
11110          * bandwidth due to being older generation PCIe parts. We clamp these
11111          * parts to ensure no warning is displayed if it can't be fixed.
11112          */
11113         switch (hw->mac.type) {
11114         case ixgbe_mac_82598EB:
11115                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
11116                 break;
11117         default:
11118                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
11119                 break;
11120         }
11121
11122         /* don't check link if we failed to enumerate functions */
11123         if (expected_gts > 0)
11124                 ixgbe_check_minimum_link(adapter, expected_gts);
11125
11126         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11127         if (err)
11128                 strlcpy(part_str, "Unknown", sizeof(part_str));
11129         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
11130                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
11131                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
11132                            part_str);
11133         else
11134                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11135                            hw->mac.type, hw->phy.type, part_str);
11136
11137         e_dev_info("%pM\n", netdev->dev_addr);
11138
11139         /* reset the hardware with the new settings */
11140         err = hw->mac.ops.start_hw(hw);
11141         if (err == IXGBE_ERR_EEPROM_VERSION) {
11142                 /* We are running on a pre-production device, log a warning */
11143                 e_dev_warn("This device is a pre-production adapter/LOM. "
11144                            "Please be aware there may be issues associated "
11145                            "with your hardware.  If you are experiencing "
11146                            "problems please contact your Intel or hardware "
11147                            "representative who provided you with this "
11148                            "hardware.\n");
11149         }
11150         strcpy(netdev->name, "eth%d");
11151         pci_set_drvdata(pdev, adapter);
11152         err = register_netdev(netdev);
11153         if (err)
11154                 goto err_register;
11155
11156
11157         /* power down the optics for 82599 SFP+ fiber */
11158         if (hw->mac.ops.disable_tx_laser)
11159                 hw->mac.ops.disable_tx_laser(hw);
11160
11161         /* carrier off reporting is important to ethtool even BEFORE open */
11162         netif_carrier_off(netdev);
11163
11164 #ifdef CONFIG_IXGBE_DCA
11165         if (dca_add_requester(&pdev->dev) == 0) {
11166                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11167                 ixgbe_setup_dca(adapter);
11168         }
11169 #endif
11170         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11171                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11172                 for (i = 0; i < adapter->num_vfs; i++)
11173                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11174         }
11175
11176         /* firmware requires driver version to be 0xFFFFFFFF
11177          * since os does not support feature
11178          */
11179         if (hw->mac.ops.set_fw_drv_ver)
11180                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11181                                            sizeof(ixgbe_driver_version) - 1,
11182                                            ixgbe_driver_version);
11183
11184         /* add san mac addr to netdev */
11185         ixgbe_add_sanmac_netdev(netdev);
11186
11187         e_dev_info("%s\n", ixgbe_default_device_descr);
11188
11189 #ifdef CONFIG_IXGBE_HWMON
11190         if (ixgbe_sysfs_init(adapter))
11191                 e_err(probe, "failed to allocate sysfs resources\n");
11192 #endif /* CONFIG_IXGBE_HWMON */
11193
11194         ixgbe_dbg_adapter_init(adapter);
11195
11196         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11197         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11198                 hw->mac.ops.setup_link(hw,
11199                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11200                         true);
11201
11202         ixgbe_mii_bus_init(hw);
11203
11204         return 0;
11205
11206 err_register:
11207         ixgbe_release_hw_control(adapter);
11208         ixgbe_clear_interrupt_scheme(adapter);
11209 err_sw_init:
11210         ixgbe_disable_sriov(adapter);
11211         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11212         iounmap(adapter->io_addr);
11213         kfree(adapter->jump_tables[0]);
11214         kfree(adapter->mac_table);
11215         kfree(adapter->rss_key);
11216         bitmap_free(adapter->af_xdp_zc_qps);
11217 err_ioremap:
11218         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11219         free_netdev(netdev);
11220 err_alloc_etherdev:
11221         pci_release_mem_regions(pdev);
11222 err_pci_reg:
11223 err_dma:
11224         if (!adapter || disable_dev)
11225                 pci_disable_device(pdev);
11226         return err;
11227 }
11228
11229 /**
11230  * ixgbe_remove - Device Removal Routine
11231  * @pdev: PCI device information struct
11232  *
11233  * ixgbe_remove is called by the PCI subsystem to alert the driver
11234  * that it should release a PCI device.  The could be caused by a
11235  * Hot-Plug event, or because the driver is going to be removed from
11236  * memory.
11237  **/
11238 static void ixgbe_remove(struct pci_dev *pdev)
11239 {
11240         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11241         struct net_device *netdev;
11242         bool disable_dev;
11243         int i;
11244
11245         /* if !adapter then we already cleaned up in probe */
11246         if (!adapter)
11247                 return;
11248
11249         netdev  = adapter->netdev;
11250         ixgbe_dbg_adapter_exit(adapter);
11251
11252         set_bit(__IXGBE_REMOVING, &adapter->state);
11253         cancel_work_sync(&adapter->service_task);
11254
11255         if (adapter->mii_bus)
11256                 mdiobus_unregister(adapter->mii_bus);
11257
11258 #ifdef CONFIG_IXGBE_DCA
11259         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11260                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11261                 dca_remove_requester(&pdev->dev);
11262                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11263                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11264         }
11265
11266 #endif
11267 #ifdef CONFIG_IXGBE_HWMON
11268         ixgbe_sysfs_exit(adapter);
11269 #endif /* CONFIG_IXGBE_HWMON */
11270
11271         /* remove the added san mac */
11272         ixgbe_del_sanmac_netdev(netdev);
11273
11274 #ifdef CONFIG_PCI_IOV
11275         ixgbe_disable_sriov(adapter);
11276 #endif
11277         if (netdev->reg_state == NETREG_REGISTERED)
11278                 unregister_netdev(netdev);
11279
11280         ixgbe_stop_ipsec_offload(adapter);
11281         ixgbe_clear_interrupt_scheme(adapter);
11282
11283         ixgbe_release_hw_control(adapter);
11284
11285 #ifdef CONFIG_DCB
11286         kfree(adapter->ixgbe_ieee_pfc);
11287         kfree(adapter->ixgbe_ieee_ets);
11288
11289 #endif
11290         iounmap(adapter->io_addr);
11291         pci_release_mem_regions(pdev);
11292
11293         e_dev_info("complete\n");
11294
11295         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11296                 if (adapter->jump_tables[i]) {
11297                         kfree(adapter->jump_tables[i]->input);
11298                         kfree(adapter->jump_tables[i]->mask);
11299                 }
11300                 kfree(adapter->jump_tables[i]);
11301         }
11302
11303         kfree(adapter->mac_table);
11304         kfree(adapter->rss_key);
11305         bitmap_free(adapter->af_xdp_zc_qps);
11306         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11307         free_netdev(netdev);
11308
11309         pci_disable_pcie_error_reporting(pdev);
11310
11311         if (disable_dev)
11312                 pci_disable_device(pdev);
11313 }
11314
11315 /**
11316  * ixgbe_io_error_detected - called when PCI error is detected
11317  * @pdev: Pointer to PCI device
11318  * @state: The current pci connection state
11319  *
11320  * This function is called after a PCI bus error affecting
11321  * this device has been detected.
11322  */
11323 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11324                                                 pci_channel_state_t state)
11325 {
11326         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11327         struct net_device *netdev = adapter->netdev;
11328
11329 #ifdef CONFIG_PCI_IOV
11330         struct ixgbe_hw *hw = &adapter->hw;
11331         struct pci_dev *bdev, *vfdev;
11332         u32 dw0, dw1, dw2, dw3;
11333         int vf, pos;
11334         u16 req_id, pf_func;
11335
11336         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11337             adapter->num_vfs == 0)
11338                 goto skip_bad_vf_detection;
11339
11340         bdev = pdev->bus->self;
11341         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11342                 bdev = bdev->bus->self;
11343
11344         if (!bdev)
11345                 goto skip_bad_vf_detection;
11346
11347         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11348         if (!pos)
11349                 goto skip_bad_vf_detection;
11350
11351         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11352         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11353         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11354         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11355         if (ixgbe_removed(hw->hw_addr))
11356                 goto skip_bad_vf_detection;
11357
11358         req_id = dw1 >> 16;
11359         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11360         if (!(req_id & 0x0080))
11361                 goto skip_bad_vf_detection;
11362
11363         pf_func = req_id & 0x01;
11364         if ((pf_func & 1) == (pdev->devfn & 1)) {
11365                 unsigned int device_id;
11366
11367                 vf = (req_id & 0x7F) >> 1;
11368                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11369                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11370                                 "%8.8x\tdw3: %8.8x\n",
11371                 dw0, dw1, dw2, dw3);
11372                 switch (adapter->hw.mac.type) {
11373                 case ixgbe_mac_82599EB:
11374                         device_id = IXGBE_82599_VF_DEVICE_ID;
11375                         break;
11376                 case ixgbe_mac_X540:
11377                         device_id = IXGBE_X540_VF_DEVICE_ID;
11378                         break;
11379                 case ixgbe_mac_X550:
11380                         device_id = IXGBE_DEV_ID_X550_VF;
11381                         break;
11382                 case ixgbe_mac_X550EM_x:
11383                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11384                         break;
11385                 case ixgbe_mac_x550em_a:
11386                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11387                         break;
11388                 default:
11389                         device_id = 0;
11390                         break;
11391                 }
11392
11393                 /* Find the pci device of the offending VF */
11394                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11395                 while (vfdev) {
11396                         if (vfdev->devfn == (req_id & 0xFF))
11397                                 break;
11398                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11399                                                device_id, vfdev);
11400                 }
11401                 /*
11402                  * There's a slim chance the VF could have been hot plugged,
11403                  * so if it is no longer present we don't need to issue the
11404                  * VFLR.  Just clean up the AER in that case.
11405                  */
11406                 if (vfdev) {
11407                         pcie_flr(vfdev);
11408                         /* Free device reference count */
11409                         pci_dev_put(vfdev);
11410                 }
11411         }
11412
11413         /*
11414          * Even though the error may have occurred on the other port
11415          * we still need to increment the vf error reference count for
11416          * both ports because the I/O resume function will be called
11417          * for both of them.
11418          */
11419         adapter->vferr_refcount++;
11420
11421         return PCI_ERS_RESULT_RECOVERED;
11422
11423 skip_bad_vf_detection:
11424 #endif /* CONFIG_PCI_IOV */
11425         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11426                 return PCI_ERS_RESULT_DISCONNECT;
11427
11428         if (!netif_device_present(netdev))
11429                 return PCI_ERS_RESULT_DISCONNECT;
11430
11431         rtnl_lock();
11432         netif_device_detach(netdev);
11433
11434         if (netif_running(netdev))
11435                 ixgbe_close_suspend(adapter);
11436
11437         if (state == pci_channel_io_perm_failure) {
11438                 rtnl_unlock();
11439                 return PCI_ERS_RESULT_DISCONNECT;
11440         }
11441
11442         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11443                 pci_disable_device(pdev);
11444         rtnl_unlock();
11445
11446         /* Request a slot reset. */
11447         return PCI_ERS_RESULT_NEED_RESET;
11448 }
11449
11450 /**
11451  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11452  * @pdev: Pointer to PCI device
11453  *
11454  * Restart the card from scratch, as if from a cold-boot.
11455  */
11456 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11457 {
11458         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11459         pci_ers_result_t result;
11460
11461         if (pci_enable_device_mem(pdev)) {
11462                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11463                 result = PCI_ERS_RESULT_DISCONNECT;
11464         } else {
11465                 smp_mb__before_atomic();
11466                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11467                 adapter->hw.hw_addr = adapter->io_addr;
11468                 pci_set_master(pdev);
11469                 pci_restore_state(pdev);
11470                 pci_save_state(pdev);
11471
11472                 pci_wake_from_d3(pdev, false);
11473
11474                 ixgbe_reset(adapter);
11475                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11476                 result = PCI_ERS_RESULT_RECOVERED;
11477         }
11478
11479         return result;
11480 }
11481
11482 /**
11483  * ixgbe_io_resume - called when traffic can start flowing again.
11484  * @pdev: Pointer to PCI device
11485  *
11486  * This callback is called when the error recovery driver tells us that
11487  * its OK to resume normal operation.
11488  */
11489 static void ixgbe_io_resume(struct pci_dev *pdev)
11490 {
11491         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11492         struct net_device *netdev = adapter->netdev;
11493
11494 #ifdef CONFIG_PCI_IOV
11495         if (adapter->vferr_refcount) {
11496                 e_info(drv, "Resuming after VF err\n");
11497                 adapter->vferr_refcount--;
11498                 return;
11499         }
11500
11501 #endif
11502         rtnl_lock();
11503         if (netif_running(netdev))
11504                 ixgbe_open(netdev);
11505
11506         netif_device_attach(netdev);
11507         rtnl_unlock();
11508 }
11509
11510 static const struct pci_error_handlers ixgbe_err_handler = {
11511         .error_detected = ixgbe_io_error_detected,
11512         .slot_reset = ixgbe_io_slot_reset,
11513         .resume = ixgbe_io_resume,
11514 };
11515
11516 static struct pci_driver ixgbe_driver = {
11517         .name     = ixgbe_driver_name,
11518         .id_table = ixgbe_pci_tbl,
11519         .probe    = ixgbe_probe,
11520         .remove   = ixgbe_remove,
11521 #ifdef CONFIG_PM
11522         .suspend  = ixgbe_suspend,
11523         .resume   = ixgbe_resume,
11524 #endif
11525         .shutdown = ixgbe_shutdown,
11526         .sriov_configure = ixgbe_pci_sriov_configure,
11527         .err_handler = &ixgbe_err_handler
11528 };
11529
11530 /**
11531  * ixgbe_init_module - Driver Registration Routine
11532  *
11533  * ixgbe_init_module is the first routine called when the driver is
11534  * loaded. All it does is register with the PCI subsystem.
11535  **/
11536 static int __init ixgbe_init_module(void)
11537 {
11538         int ret;
11539         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11540         pr_info("%s\n", ixgbe_copyright);
11541
11542         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11543         if (!ixgbe_wq) {
11544                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11545                 return -ENOMEM;
11546         }
11547
11548         ixgbe_dbg_init();
11549
11550         ret = pci_register_driver(&ixgbe_driver);
11551         if (ret) {
11552                 destroy_workqueue(ixgbe_wq);
11553                 ixgbe_dbg_exit();
11554                 return ret;
11555         }
11556
11557 #ifdef CONFIG_IXGBE_DCA
11558         dca_register_notify(&dca_notifier);
11559 #endif
11560
11561         return 0;
11562 }
11563
11564 module_init(ixgbe_init_module);
11565
11566 /**
11567  * ixgbe_exit_module - Driver Exit Cleanup Routine
11568  *
11569  * ixgbe_exit_module is called just before the driver is removed
11570  * from memory.
11571  **/
11572 static void __exit ixgbe_exit_module(void)
11573 {
11574 #ifdef CONFIG_IXGBE_DCA
11575         dca_unregister_notify(&dca_notifier);
11576 #endif
11577         pci_unregister_driver(&ixgbe_driver);
11578
11579         ixgbe_dbg_exit();
11580         if (ixgbe_wq) {
11581                 destroy_workqueue(ixgbe_wq);
11582                 ixgbe_wq = NULL;
11583         }
11584 }
11585
11586 #ifdef CONFIG_IXGBE_DCA
11587 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11588                             void *p)
11589 {
11590         int ret_val;
11591
11592         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11593                                          __ixgbe_notify_dca);
11594
11595         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11596 }
11597
11598 #endif /* CONFIG_IXGBE_DCA */
11599
11600 module_exit(ixgbe_exit_module);
11601
11602 /* ixgbe_main.c */