drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <linux/numa.h>
  31 #include <generated/utsrelease.h>
  32 #include <scsi/fc/fc_fcoe.h>
  33 #include <net/udp_tunnel.h>
  34 #include <net/pkt_cls.h>
  35 #include <net/tc_act/tc_gact.h>
  36 #include <net/tc_act/tc_mirred.h>
  37 #include <net/vxlan.h>
  38 #include <net/mpls.h>
  39 #include <net/xdp_sock_drv.h>
  40 #include <net/xfrm.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_common.h"
  44 #include "ixgbe_dcb_82599.h"
  45 #include "ixgbe_phy.h"
  46 #include "ixgbe_sriov.h"
  47 #include "ixgbe_model.h"
  48 #include "ixgbe_txrx_common.h"
  49
  50 char ixgbe_driver_name[] = "ixgbe";
  51 static const char ixgbe_driver_string[] =
  52                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  53 #ifdef IXGBE_FCOE
  54 char ixgbe_default_device_descr[] =
  55                               "Intel(R) 10 Gigabit Network Connection";
  56 #else
  57 static char ixgbe_default_device_descr[] =
  58                               "Intel(R) 10 Gigabit Network Connection";
  59 #endif
  60 static const char ixgbe_copyright[] =
  61                                 "Copyright (c) 1999-2016 Intel Corporation.";
  62
  63 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  64
  65 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  66         [board_82598]           = &ixgbe_82598_info,
  67         [board_82599]           = &ixgbe_82599_info,
  68         [board_X540]            = &ixgbe_X540_info,
  69         [board_X550]            = &ixgbe_X550_info,
  70         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  71         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  72         [board_x550em_a]        = &ixgbe_x550em_a_info,
  73         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  74 };
  75
  76 /* ixgbe_pci_tbl - PCI Device ID Table
  77  *
  78  * Wildcard entries (PCI_ANY_ID) should come last
  79  * Last entry must be all 0s
  80  *
  81  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  82  *   Class, Class Mask, private data (not used) }
  83  */
  84 static const struct pci_device_id ixgbe_pci_tbl[] = {
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 132         /* required last entry */
 133         {0, }
 134 };
 135 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 136
 137 #ifdef CONFIG_IXGBE_DCA
 138 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 139                             void *p);
 140 static struct notifier_block dca_notifier = {
 141         .notifier_call = ixgbe_notify_dca,
 142         .next          = NULL,
 143         .priority      = 0
 144 };
 145 #endif
 146
 147 #ifdef CONFIG_PCI_IOV
 148 static unsigned int max_vfs;
 149 module_param(max_vfs, uint, 0);
 150 MODULE_PARM_DESC(max_vfs,
 151                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 152 #endif /* CONFIG_PCI_IOV */
 153
 154 static unsigned int allow_unsupported_sfp;
 155 module_param(allow_unsupported_sfp, uint, 0);
 156 MODULE_PARM_DESC(allow_unsupported_sfp,
 157                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 158
 159 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 160 static int debug = -1;
 161 module_param(debug, int, 0);
 162 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 163
 164 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 165 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 166 MODULE_LICENSE("GPL v2");
 167
 168 static struct workqueue_struct *ixgbe_wq;
 169
 170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 171 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 172
 173 static const struct net_device_ops ixgbe_netdev_ops;
 174
 175 static bool netif_is_ixgbe(struct net_device *dev)
 176 {
 177         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 178 }
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         struct pci_dev *pdev;
 252
 253         /* Some devices are not connected over PCIe and thus do not negotiate
 254          * speed. These devices do not have valid bus info, and thus any report
 255          * we generate may not be correct.
 256          */
 257         if (hw->bus.type == ixgbe_bus_type_internal)
 258                 return;
 259
 260         /* determine whether to use the parent device */
 261         if (ixgbe_pcie_from_parent(&adapter->hw))
 262                 pdev = adapter->pdev->bus->parent->self;
 263         else
 264                 pdev = adapter->pdev;
 265
 266         pcie_print_link_status(pdev);
 267 }
 268
 269 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 270 {
 271         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 272             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 273             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 274                 queue_work(ixgbe_wq, &adapter->service_task);
 275 }
 276
 277 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 278 {
 279         struct ixgbe_adapter *adapter = hw->back;
 280
 281         if (!hw->hw_addr)
 282                 return;
 283         hw->hw_addr = NULL;
 284         e_dev_err("Adapter removed\n");
 285         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 286                 ixgbe_service_event_schedule(adapter);
 287 }
 288
 289 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 290 {
 291         u8 __iomem *reg_addr;
 292         u32 value;
 293         int i;
 294
 295         reg_addr = READ_ONCE(hw->hw_addr);
 296         if (ixgbe_removed(reg_addr))
 297                 return IXGBE_FAILED_READ_REG;
 298
 299         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 300          * so perform several status register reads to determine if the adapter
 301          * has been removed.
 302          */
 303         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 304                 value = readl(reg_addr + IXGBE_STATUS);
 305                 if (value != IXGBE_FAILED_READ_REG)
 306                         break;
 307                 mdelay(3);
 308         }
 309
 310         if (value == IXGBE_FAILED_READ_REG)
 311                 ixgbe_remove_adapter(hw);
 312         else
 313                 value = readl(reg_addr + reg);
 314         return value;
 315 }
 316
 317 /**
 318  * ixgbe_read_reg - Read from device register
 319  * @hw: hw specific details
 320  * @reg: offset of register to read
 321  *
 322  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 323  *
 324  * This function is used to read device registers. It checks for device
 325  * removal by confirming any read that returns all ones by checking the
 326  * status register value for all ones. This function avoids reading from
 327  * the hardware if a removal was previously detected in which case it
 328  * returns IXGBE_FAILED_READ_REG (all ones).
 329  */
 330 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 331 {
 332         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 333         u32 value;
 334
 335         if (ixgbe_removed(reg_addr))
 336                 return IXGBE_FAILED_READ_REG;
 337         if (unlikely(hw->phy.nw_mng_if_sel &
 338                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 339                 struct ixgbe_adapter *adapter;
 340                 int i;
 341
 342                 for (i = 0; i < 200; ++i) {
 343                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 344                         if (likely(!value))
 345                                 goto writes_completed;
 346                         if (value == IXGBE_FAILED_READ_REG) {
 347                                 ixgbe_remove_adapter(hw);
 348                                 return IXGBE_FAILED_READ_REG;
 349                         }
 350                         udelay(5);
 351                 }
 352
 353                 adapter = hw->back;
 354                 e_warn(hw, "register writes incomplete %08x\n", value);
 355         }
 356
 357 writes_completed:
 358         value = readl(reg_addr + reg);
 359         if (unlikely(value == IXGBE_FAILED_READ_REG))
 360                 value = ixgbe_check_remove(hw, reg);
 361         return value;
 362 }
 363
 364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 365 {
 366         u16 value;
 367
 368         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 369         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 370                 ixgbe_remove_adapter(hw);
 371                 return true;
 372         }
 373         return false;
 374 }
 375
 376 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 377 {
 378         struct ixgbe_adapter *adapter = hw->back;
 379         u16 value;
 380
 381         if (ixgbe_removed(hw->hw_addr))
 382                 return IXGBE_FAILED_READ_CFG_WORD;
 383         pci_read_config_word(adapter->pdev, reg, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 385             ixgbe_check_cfg_remove(hw, adapter->pdev))
 386                 return IXGBE_FAILED_READ_CFG_WORD;
 387         return value;
 388 }
 389
 390 #ifdef CONFIG_PCI_IOV
 391 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u32 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_DWORD;
 398         pci_read_config_dword(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_DWORD;
 402         return value;
 403 }
 404 #endif /* CONFIG_PCI_IOV */
 405
 406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409
 410         if (ixgbe_removed(hw->hw_addr))
 411                 return;
 412         pci_write_config_word(adapter->pdev, reg, value);
 413 }
 414
 415 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 416 {
 417         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 418
 419         /* flush memory to make sure state is correct before next watchdog */
 420         smp_mb__before_atomic();
 421         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 422 }
 423
 424 struct ixgbe_reg_info {
 425         u32 ofs;
 426         char *name;
 427 };
 428
 429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 430
 431         /* General Registers */
 432         {IXGBE_CTRL, "CTRL"},
 433         {IXGBE_STATUS, "STATUS"},
 434         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 435
 436         /* Interrupt Registers */
 437         {IXGBE_EICR, "EICR"},
 438
 439         /* RX Registers */
 440         {IXGBE_SRRCTL(0), "SRRCTL"},
 441         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 442         {IXGBE_RDLEN(0), "RDLEN"},
 443         {IXGBE_RDH(0), "RDH"},
 444         {IXGBE_RDT(0), "RDT"},
 445         {IXGBE_RXDCTL(0), "RXDCTL"},
 446         {IXGBE_RDBAL(0), "RDBAL"},
 447         {IXGBE_RDBAH(0), "RDBAH"},
 448
 449         /* TX Registers */
 450         {IXGBE_TDBAL(0), "TDBAL"},
 451         {IXGBE_TDBAH(0), "TDBAH"},
 452         {IXGBE_TDLEN(0), "TDLEN"},
 453         {IXGBE_TDH(0), "TDH"},
 454         {IXGBE_TDT(0), "TDT"},
 455         {IXGBE_TXDCTL(0), "TXDCTL"},
 456
 457         /* List Terminator */
 458         { .name = NULL }
 459 };
 460
 461
 462 /*
 463  * ixgbe_regdump - register printout routine
 464  */
 465 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 466 {
 467         int i;
 468         char rname[16];
 469         u32 regs[64];
 470
 471         switch (reginfo->ofs) {
 472         case IXGBE_SRRCTL(0):
 473                 for (i = 0; i < 64; i++)
 474                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 475                 break;
 476         case IXGBE_DCA_RXCTRL(0):
 477                 for (i = 0; i < 64; i++)
 478                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 479                 break;
 480         case IXGBE_RDLEN(0):
 481                 for (i = 0; i < 64; i++)
 482                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 483                 break;
 484         case IXGBE_RDH(0):
 485                 for (i = 0; i < 64; i++)
 486                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 487                 break;
 488         case IXGBE_RDT(0):
 489                 for (i = 0; i < 64; i++)
 490                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 491                 break;
 492         case IXGBE_RXDCTL(0):
 493                 for (i = 0; i < 64; i++)
 494                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 495                 break;
 496         case IXGBE_RDBAL(0):
 497                 for (i = 0; i < 64; i++)
 498                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 499                 break;
 500         case IXGBE_RDBAH(0):
 501                 for (i = 0; i < 64; i++)
 502                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 503                 break;
 504         case IXGBE_TDBAL(0):
 505                 for (i = 0; i < 64; i++)
 506                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 507                 break;
 508         case IXGBE_TDBAH(0):
 509                 for (i = 0; i < 64; i++)
 510                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 511                 break;
 512         case IXGBE_TDLEN(0):
 513                 for (i = 0; i < 64; i++)
 514                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 515                 break;
 516         case IXGBE_TDH(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 519                 break;
 520         case IXGBE_TDT(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 523                 break;
 524         case IXGBE_TXDCTL(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 527                 break;
 528         default:
 529                 pr_info("%-15s %08x\n",
 530                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 531                 return;
 532         }
 533
 534         i = 0;
 535         while (i < 64) {
 536                 int j;
 537                 char buf[9 * 8 + 1];
 538                 char *p = buf;
 539
 540                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 541                 for (j = 0; j < 8; j++)
 542                         p += sprintf(p, " %08x", regs[i++]);
 543                 pr_err("%-15s%s\n", rname, buf);
 544         }
 545
 546 }
 547
 548 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 549 {
 550         struct ixgbe_tx_buffer *tx_buffer;
 551
 552         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 553         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 554                 n, ring->next_to_use, ring->next_to_clean,
 555                 (u64)dma_unmap_addr(tx_buffer, dma),
 556                 dma_unmap_len(tx_buffer, len),
 557                 tx_buffer->next_to_watch,
 558                 (u64)tx_buffer->time_stamp);
 559 }
 560
 561 /*
 562  * ixgbe_dump - Print registers, tx-rings and rx-rings
 563  */
 564 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 565 {
 566         struct net_device *netdev = adapter->netdev;
 567         struct ixgbe_hw *hw = &adapter->hw;
 568         struct ixgbe_reg_info *reginfo;
 569         int n = 0;
 570         struct ixgbe_ring *ring;
 571         struct ixgbe_tx_buffer *tx_buffer;
 572         union ixgbe_adv_tx_desc *tx_desc;
 573         struct my_u0 { u64 a; u64 b; } *u0;
 574         struct ixgbe_ring *rx_ring;
 575         union ixgbe_adv_rx_desc *rx_desc;
 576         struct ixgbe_rx_buffer *rx_buffer_info;
 577         int i = 0;
 578
 579         if (!netif_msg_hw(adapter))
 580                 return;
 581
 582         /* Print netdevice Info */
 583         if (netdev) {
 584                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 585                 pr_info("Device Name     state            "
 586                         "trans_start\n");
 587                 pr_info("%-15s %016lX %016lX\n",
 588                         netdev->name,
 589                         netdev->state,
 590                         dev_trans_start(netdev));
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 ring = adapter->tx_ring[n];
 611                 ixgbe_print_buffer(ring, n);
 612         }
 613
 614         for (n = 0; n < adapter->num_xdp_queues; n++) {
 615                 ring = adapter->xdp_ring[n];
 616                 ixgbe_print_buffer(ring, n);
 617         }
 618
 619         /* Print TX Rings */
 620         if (!netif_msg_tx_done(adapter))
 621                 goto rx_ring_summary;
 622
 623         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 624
 625         /* Transmit Descriptor Formats
 626          *
 627          * 82598 Advanced Transmit Descriptor
 628          *   +--------------------------------------------------------------+
 629          * 0 |         Buffer Address [63:0]                                |
 630          *   +--------------------------------------------------------------+
 631          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 632          *   +--------------------------------------------------------------+
 633          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 634          *
 635          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 636          *   +--------------------------------------------------------------+
 637          * 0 |                          RSV [63:0]                          |
 638          *   +--------------------------------------------------------------+
 639          * 8 |            RSV           |  STA  |          NXTSEQ           |
 640          *   +--------------------------------------------------------------+
 641          *   63                       36 35   32 31                         0
 642          *
 643          * 82599+ Advanced Transmit Descriptor
 644          *   +--------------------------------------------------------------+
 645          * 0 |         Buffer Address [63:0]                                |
 646          *   +--------------------------------------------------------------+
 647          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 648          *   +--------------------------------------------------------------+
 649          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 650          *
 651          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 652          *   +--------------------------------------------------------------+
 653          * 0 |                          RSV [63:0]                          |
 654          *   +--------------------------------------------------------------+
 655          * 8 |            RSV           |  STA  |           RSV             |
 656          *   +--------------------------------------------------------------+
 657          *   63                       36 35   32 31                         0
 658          */
 659
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 pr_info("------------------------------------\n");
 663                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 664                 pr_info("------------------------------------\n");
 665                 pr_info("%s%s    %s              %s        %s          %s\n",
 666                         "T [desc]     [address 63:0  ] ",
 667                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 668                         "leng", "ntw", "timestamp", "bi->skb");
 669
 670                 for (i = 0; ring->desc && (i < ring->count); i++) {
 671                         tx_desc = IXGBE_TX_DESC(ring, i);
 672                         tx_buffer = &ring->tx_buffer_info[i];
 673                         u0 = (struct my_u0 *)tx_desc;
 674                         if (dma_unmap_len(tx_buffer, len) > 0) {
 675                                 const char *ring_desc;
 676
 677                                 if (i == ring->next_to_use &&
 678                                     i == ring->next_to_clean)
 679                                         ring_desc = " NTC/U";
 680                                 else if (i == ring->next_to_use)
 681                                         ring_desc = " NTU";
 682                                 else if (i == ring->next_to_clean)
 683                                         ring_desc = " NTC";
 684                                 else
 685                                         ring_desc = "";
 686                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 687                                         i,
 688                                         le64_to_cpu((__force __le64)u0->a),
 689                                         le64_to_cpu((__force __le64)u0->b),
 690                                         (u64)dma_unmap_addr(tx_buffer, dma),
 691                                         dma_unmap_len(tx_buffer, len),
 692                                         tx_buffer->next_to_watch,
 693                                         (u64)tx_buffer->time_stamp,
 694                                         tx_buffer->skb,
 695                                         ring_desc);
 696
 697                                 if (netif_msg_pktdata(adapter) &&
 698                                     tx_buffer->skb)
 699                                         print_hex_dump(KERN_INFO, "",
 700                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 701                                                 tx_buffer->skb->data,
 702                                                 dma_unmap_len(tx_buffer, len),
 703                                                 true);
 704                         }
 705                 }
 706         }
 707
 708         /* Print RX Rings Summary */
 709 rx_ring_summary:
 710         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 711         pr_info("Queue [NTU] [NTC]\n");
 712         for (n = 0; n < adapter->num_rx_queues; n++) {
 713                 rx_ring = adapter->rx_ring[n];
 714                 pr_info("%5d %5X %5X\n",
 715                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 716         }
 717
 718         /* Print RX Rings */
 719         if (!netif_msg_rx_status(adapter))
 720                 return;
 721
 722         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 723
 724         /* Receive Descriptor Formats
 725          *
 726          * 82598 Advanced Receive Descriptor (Read) Format
 727          *    63                                           1        0
 728          *    +-----------------------------------------------------+
 729          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 730          *    +----------------------------------------------+------+
 731          *  8 |       Header Buffer Address [63:1]           |  DD  |
 732          *    +-----------------------------------------------------+
 733          *
 734          *
 735          * 82598 Advanced Receive Descriptor (Write-Back) Format
 736          *
 737          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 738          *   +------------------------------------------------------+
 739          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 740          *   | Packet   | IP     |   |          |     | Type | Type |
 741          *   | Checksum | Ident  |   |          |     |      |      |
 742          *   +------------------------------------------------------+
 743          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 744          *   +------------------------------------------------------+
 745          *   63       48 47    32 31            20 19               0
 746          *
 747          * 82599+ Advanced Receive Descriptor (Read) Format
 748          *    63                                           1        0
 749          *    +-----------------------------------------------------+
 750          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 751          *    +----------------------------------------------+------+
 752          *  8 |       Header Buffer Address [63:1]           |  DD  |
 753          *    +-----------------------------------------------------+
 754          *
 755          *
 756          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 757          *
 758          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 759          *   +------------------------------------------------------+
 760          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 761          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 762          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 763          *   +------------------------------------------------------+
 764          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 765          *   +------------------------------------------------------+
 766          *   63       48 47    32 31          20 19                 0
 767          */
 768
 769         for (n = 0; n < adapter->num_rx_queues; n++) {
 770                 rx_ring = adapter->rx_ring[n];
 771                 pr_info("------------------------------------\n");
 772                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 773                 pr_info("------------------------------------\n");
 774                 pr_info("%s%s%s\n",
 775                         "R  [desc]      [ PktBuf     A0] ",
 776                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 777                         "<-- Adv Rx Read format");
 778                 pr_info("%s%s%s\n",
 779                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 780                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 781                         "<-- Adv Rx Write-Back format");
 782
 783                 for (i = 0; i < rx_ring->count; i++) {
 784                         const char *ring_desc;
 785
 786                         if (i == rx_ring->next_to_use)
 787                                 ring_desc = " NTU";
 788                         else if (i == rx_ring->next_to_clean)
 789                                 ring_desc = " NTC";
 790                         else
 791                                 ring_desc = "";
 792
 793                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 794                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 795                         u0 = (struct my_u0 *)rx_desc;
 796                         if (rx_desc->wb.upper.length) {
 797                                 /* Descriptor Done */
 798                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 799                                         i,
 800                                         le64_to_cpu((__force __le64)u0->a),
 801                                         le64_to_cpu((__force __le64)u0->b),
 802                                         rx_buffer_info->skb,
 803                                         ring_desc);
 804                         } else {
 805                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 806                                         i,
 807                                         le64_to_cpu((__force __le64)u0->a),
 808                                         le64_to_cpu((__force __le64)u0->b),
 809                                         (u64)rx_buffer_info->dma,
 810                                         rx_buffer_info->skb,
 811                                         ring_desc);
 812
 813                                 if (netif_msg_pktdata(adapter) &&
 814                                     rx_buffer_info->dma) {
 815                                         print_hex_dump(KERN_INFO, "",
 816                                            DUMP_PREFIX_ADDRESS, 16, 1,
 817                                            page_address(rx_buffer_info->page) +
 818                                                     rx_buffer_info->page_offset,
 819                                            ixgbe_rx_bufsz(rx_ring), true);
 820                                 }
 821                         }
 822                 }
 823         }
 824 }
 825
 826 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 827 {
 828         u32 ctrl_ext;
 829
 830         /* Let firmware take over control of h/w */
 831         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 832         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 833                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 834 }
 835
 836 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 837 {
 838         u32 ctrl_ext;
 839
 840         /* Let firmware know the driver has taken over */
 841         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 842         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 843                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 844 }
 845
 846 /**
 847  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 848  * @adapter: pointer to adapter struct
 849  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 850  * @queue: queue to map the corresponding interrupt to
 851  * @msix_vector: the vector to map to the corresponding queue
 852  *
 853  */
 854 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 855                            u8 queue, u8 msix_vector)
 856 {
 857         u32 ivar, index;
 858         struct ixgbe_hw *hw = &adapter->hw;
 859         switch (hw->mac.type) {
 860         case ixgbe_mac_82598EB:
 861                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 862                 if (direction == -1)
 863                         direction = 0;
 864                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 865                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 866                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 867                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 868                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 869                 break;
 870         case ixgbe_mac_82599EB:
 871         case ixgbe_mac_X540:
 872         case ixgbe_mac_X550:
 873         case ixgbe_mac_X550EM_x:
 874         case ixgbe_mac_x550em_a:
 875                 if (direction == -1) {
 876                         /* other causes */
 877                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 878                         index = ((queue & 1) * 8);
 879                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 880                         ivar &= ~(0xFF << index);
 881                         ivar |= (msix_vector << index);
 882                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 883                         break;
 884                 } else {
 885                         /* tx or rx causes */
 886                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 887                         index = ((16 * (queue & 1)) + (8 * direction));
 888                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 889                         ivar &= ~(0xFF << index);
 890                         ivar |= (msix_vector << index);
 891                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 892                         break;
 893                 }
 894         default:
 895                 break;
 896         }
 897 }
 898
 899 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 900                             u64 qmask)
 901 {
 902         u32 mask;
 903
 904         switch (adapter->hw.mac.type) {
 905         case ixgbe_mac_82598EB:
 906                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 907                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 908                 break;
 909         case ixgbe_mac_82599EB:
 910         case ixgbe_mac_X540:
 911         case ixgbe_mac_X550:
 912         case ixgbe_mac_X550EM_x:
 913         case ixgbe_mac_x550em_a:
 914                 mask = (qmask & 0xFFFFFFFF);
 915                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 916                 mask = (qmask >> 32);
 917                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 918                 break;
 919         default:
 920                 break;
 921         }
 922 }
 923
 924 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 925 {
 926         struct ixgbe_hw *hw = &adapter->hw;
 927         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 928         int i;
 929         u32 data;
 930
 931         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 932             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 933                 return;
 934
 935         switch (hw->mac.type) {
 936         case ixgbe_mac_82598EB:
 937                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 938                 break;
 939         default:
 940                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 941         }
 942         hwstats->lxoffrxc += data;
 943
 944         /* refill credits (no tx hang) if we received xoff */
 945         if (!data)
 946                 return;
 947
 948         for (i = 0; i < adapter->num_tx_queues; i++)
 949                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 950                           &adapter->tx_ring[i]->state);
 951
 952         for (i = 0; i < adapter->num_xdp_queues; i++)
 953                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 954                           &adapter->xdp_ring[i]->state);
 955 }
 956
 957 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 958 {
 959         struct ixgbe_hw *hw = &adapter->hw;
 960         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 961         u32 xoff[8] = {0};
 962         u8 tc;
 963         int i;
 964         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 965
 966         if (adapter->ixgbe_ieee_pfc)
 967                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 968
 969         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 970                 ixgbe_update_xoff_rx_lfc(adapter);
 971                 return;
 972         }
 973
 974         /* update stats for each tc, only valid with PFC enabled */
 975         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 976                 u32 pxoffrxc;
 977
 978                 switch (hw->mac.type) {
 979                 case ixgbe_mac_82598EB:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 981                         break;
 982                 default:
 983                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 984                 }
 985                 hwstats->pxoffrxc[i] += pxoffrxc;
 986                 /* Get the TC for given UP */
 987                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 988                 xoff[tc] += pxoffrxc;
 989         }
 990
 991         /* disarm tx queues that have received xoff frames */
 992         for (i = 0; i < adapter->num_tx_queues; i++) {
 993                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 994
 995                 tc = tx_ring->dcb_tc;
 996                 if (xoff[tc])
 997                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 998         }
 999
1000         for (i = 0; i < adapter->num_xdp_queues; i++) {
1001                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1002
1003                 tc = xdp_ring->dcb_tc;
1004                 if (xoff[tc])
1005                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1006         }
1007 }
1008
1009 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1010 {
1011         return ring->stats.packets;
1012 }
1013
1014 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1015 {
1016         unsigned int head, tail;
1017
1018         head = ring->next_to_clean;
1019         tail = ring->next_to_use;
1020
1021         return ((head <= tail) ? tail : tail + ring->count) - head;
1022 }
1023
1024 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1025 {
1026         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1027         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1028         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1029
1030         clear_check_for_tx_hang(tx_ring);
1031
1032         /*
1033          * Check for a hung queue, but be thorough. This verifies
1034          * that a transmit has been completed since the previous
1035          * check AND there is at least one packet pending. The
1036          * ARMED bit is set to indicate a potential hang. The
1037          * bit is cleared if a pause frame is received to remove
1038          * false hang detection due to PFC or 802.3x frames. By
1039          * requiring this to fail twice we avoid races with
1040          * pfc clearing the ARMED bit and conditions where we
1041          * run the check_tx_hang logic with a transmit completion
1042          * pending but without time to complete it yet.
1043          */
1044         if (tx_done_old == tx_done && tx_pending)
1045                 /* make sure it is true for two checks in a row */
1046                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1047                                         &tx_ring->state);
1048         /* update completed stats and continue */
1049         tx_ring->tx_stats.tx_done_old = tx_done;
1050         /* reset the countdown */
1051         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1052
1053         return false;
1054 }
1055
1056 /**
1057  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1058  * @adapter: driver private struct
1059  **/
1060 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1061 {
1062
1063         /* Do the reset outside of interrupt context */
1064         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1065                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1066                 e_warn(drv, "initiating reset due to tx timeout\n");
1067                 ixgbe_service_event_schedule(adapter);
1068         }
1069 }
1070
1071 /**
1072  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1073  * @netdev: network interface device structure
1074  * @queue_index: Tx queue to set
1075  * @maxrate: desired maximum transmit bitrate
1076  **/
1077 static int ixgbe_tx_maxrate(struct net_device *netdev,
1078                             int queue_index, u32 maxrate)
1079 {
1080         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1081         struct ixgbe_hw *hw = &adapter->hw;
1082         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1083
1084         if (!maxrate)
1085                 return 0;
1086
1087         /* Calculate the rate factor values to set */
1088         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1089         bcnrc_val /= maxrate;
1090
1091         /* clear everything but the rate factor */
1092         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1093         IXGBE_RTTBCNRC_RF_DEC_MASK;
1094
1095         /* enable the rate scheduler */
1096         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1097
1098         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1099         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1100
1101         return 0;
1102 }
1103
1104 /**
1105  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1106  * @q_vector: structure containing interrupt and ring information
1107  * @tx_ring: tx ring to clean
1108  * @napi_budget: Used to determine if we are in netpoll
1109  **/
1110 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1111                                struct ixgbe_ring *tx_ring, int napi_budget)
1112 {
1113         struct ixgbe_adapter *adapter = q_vector->adapter;
1114         struct ixgbe_tx_buffer *tx_buffer;
1115         union ixgbe_adv_tx_desc *tx_desc;
1116         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1117         unsigned int budget = q_vector->tx.work_limit;
1118         unsigned int i = tx_ring->next_to_clean;
1119
1120         if (test_bit(__IXGBE_DOWN, &adapter->state))
1121                 return true;
1122
1123         tx_buffer = &tx_ring->tx_buffer_info[i];
1124         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1125         i -= tx_ring->count;
1126
1127         do {
1128                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1129
1130                 /* if next_to_watch is not set then there is no work pending */
1131                 if (!eop_desc)
1132                         break;
1133
1134                 /* prevent any other reads prior to eop_desc */
1135                 smp_rmb();
1136
1137                 /* if DD is not set pending work has not been completed */
1138                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1139                         break;
1140
1141                 /* clear next_to_watch to prevent false hangs */
1142                 tx_buffer->next_to_watch = NULL;
1143
1144                 /* update the statistics for this packet */
1145                 total_bytes += tx_buffer->bytecount;
1146                 total_packets += tx_buffer->gso_segs;
1147                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1148                         total_ipsec++;
1149
1150                 /* free the skb */
1151                 if (ring_is_xdp(tx_ring))
1152                         xdp_return_frame(tx_buffer->xdpf);
1153                 else
1154                         napi_consume_skb(tx_buffer->skb, napi_budget);
1155
1156                 /* unmap skb header data */
1157                 dma_unmap_single(tx_ring->dev,
1158                                  dma_unmap_addr(tx_buffer, dma),
1159                                  dma_unmap_len(tx_buffer, len),
1160                                  DMA_TO_DEVICE);
1161
1162                 /* clear tx_buffer data */
1163                 dma_unmap_len_set(tx_buffer, len, 0);
1164
1165                 /* unmap remaining buffers */
1166                 while (tx_desc != eop_desc) {
1167                         tx_buffer++;
1168                         tx_desc++;
1169                         i++;
1170                         if (unlikely(!i)) {
1171                                 i -= tx_ring->count;
1172                                 tx_buffer = tx_ring->tx_buffer_info;
1173                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1174                         }
1175
1176                         /* unmap any remaining paged data */
1177                         if (dma_unmap_len(tx_buffer, len)) {
1178                                 dma_unmap_page(tx_ring->dev,
1179                                                dma_unmap_addr(tx_buffer, dma),
1180                                                dma_unmap_len(tx_buffer, len),
1181                                                DMA_TO_DEVICE);
1182                                 dma_unmap_len_set(tx_buffer, len, 0);
1183                         }
1184                 }
1185
1186                 /* move us one more past the eop_desc for start of next pkt */
1187                 tx_buffer++;
1188                 tx_desc++;
1189                 i++;
1190                 if (unlikely(!i)) {
1191                         i -= tx_ring->count;
1192                         tx_buffer = tx_ring->tx_buffer_info;
1193                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1194                 }
1195
1196                 /* issue prefetch for next Tx descriptor */
1197                 prefetch(tx_desc);
1198
1199                 /* update budget accounting */
1200                 budget--;
1201         } while (likely(budget));
1202
1203         i += tx_ring->count;
1204         tx_ring->next_to_clean = i;
1205         u64_stats_update_begin(&tx_ring->syncp);
1206         tx_ring->stats.bytes += total_bytes;
1207         tx_ring->stats.packets += total_packets;
1208         u64_stats_update_end(&tx_ring->syncp);
1209         q_vector->tx.total_bytes += total_bytes;
1210         q_vector->tx.total_packets += total_packets;
1211         adapter->tx_ipsec += total_ipsec;
1212
1213         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1214                 /* schedule immediate reset if we believe we hung */
1215                 struct ixgbe_hw *hw = &adapter->hw;
1216                 e_err(drv, "Detected Tx Unit Hang %s\n"
1217                         "  Tx Queue             <%d>\n"
1218                         "  TDH, TDT             <%x>, <%x>\n"
1219                         "  next_to_use          <%x>\n"
1220                         "  next_to_clean        <%x>\n"
1221                         "tx_buffer_info[next_to_clean]\n"
1222                         "  time_stamp           <%lx>\n"
1223                         "  jiffies              <%lx>\n",
1224                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1225                         tx_ring->queue_index,
1226                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1227                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1228                         tx_ring->next_to_use, i,
1229                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1230
1231                 if (!ring_is_xdp(tx_ring))
1232                         netif_stop_subqueue(tx_ring->netdev,
1233                                             tx_ring->queue_index);
1234
1235                 e_info(probe,
1236                        "tx hang %d detected on queue %d, resetting adapter\n",
1237                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1238
1239                 /* schedule immediate reset if we believe we hung */
1240                 ixgbe_tx_timeout_reset(adapter);
1241
1242                 /* the adapter is about to reset, no point in enabling stuff */
1243                 return true;
1244         }
1245
1246         if (ring_is_xdp(tx_ring))
1247                 return !!budget;
1248
1249         netdev_tx_completed_queue(txring_txq(tx_ring),
1250                                   total_packets, total_bytes);
1251
1252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1253         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1254                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1255                 /* Make sure that anybody stopping the queue after this
1256                  * sees the new next_to_clean.
1257                  */
1258                 smp_mb();
1259                 if (__netif_subqueue_stopped(tx_ring->netdev,
1260                                              tx_ring->queue_index)
1261                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1262                         netif_wake_subqueue(tx_ring->netdev,
1263                                             tx_ring->queue_index);
1264                         ++tx_ring->tx_stats.restart_queue;
1265                 }
1266         }
1267
1268         return !!budget;
1269 }
1270
1271 #ifdef CONFIG_IXGBE_DCA
1272 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1273                                 struct ixgbe_ring *tx_ring,
1274                                 int cpu)
1275 {
1276         struct ixgbe_hw *hw = &adapter->hw;
1277         u32 txctrl = 0;
1278         u16 reg_offset;
1279
1280         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1281                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1282
1283         switch (hw->mac.type) {
1284         case ixgbe_mac_82598EB:
1285                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1286                 break;
1287         case ixgbe_mac_82599EB:
1288         case ixgbe_mac_X540:
1289                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1290                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1291                 break;
1292         default:
1293                 /* for unknown hardware do not write register */
1294                 return;
1295         }
1296
1297         /*
1298          * We can enable relaxed ordering for reads, but not writes when
1299          * DCA is enabled.  This is due to a known issue in some chipsets
1300          * which will cause the DCA tag to be cleared.
1301          */
1302         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1303                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1304                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1305
1306         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1307 }
1308
1309 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1310                                 struct ixgbe_ring *rx_ring,
1311                                 int cpu)
1312 {
1313         struct ixgbe_hw *hw = &adapter->hw;
1314         u32 rxctrl = 0;
1315         u8 reg_idx = rx_ring->reg_idx;
1316
1317         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1318                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1319
1320         switch (hw->mac.type) {
1321         case ixgbe_mac_82599EB:
1322         case ixgbe_mac_X540:
1323                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1324                 break;
1325         default:
1326                 break;
1327         }
1328
1329         /*
1330          * We can enable relaxed ordering for reads, but not writes when
1331          * DCA is enabled.  This is due to a known issue in some chipsets
1332          * which will cause the DCA tag to be cleared.
1333          */
1334         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1335                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1336                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1337
1338         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1339 }
1340
1341 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1342 {
1343         struct ixgbe_adapter *adapter = q_vector->adapter;
1344         struct ixgbe_ring *ring;
1345         int cpu = get_cpu();
1346
1347         if (q_vector->cpu == cpu)
1348                 goto out_no_update;
1349
1350         ixgbe_for_each_ring(ring, q_vector->tx)
1351                 ixgbe_update_tx_dca(adapter, ring, cpu);
1352
1353         ixgbe_for_each_ring(ring, q_vector->rx)
1354                 ixgbe_update_rx_dca(adapter, ring, cpu);
1355
1356         q_vector->cpu = cpu;
1357 out_no_update:
1358         put_cpu();
1359 }
1360
1361 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1362 {
1363         int i;
1364
1365         /* always use CB2 mode, difference is masked in the CB driver */
1366         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1369         else
1370                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1371                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1372
1373         for (i = 0; i < adapter->num_q_vectors; i++) {
1374                 adapter->q_vector[i]->cpu = -1;
1375                 ixgbe_update_dca(adapter->q_vector[i]);
1376         }
1377 }
1378
1379 static int __ixgbe_notify_dca(struct device *dev, void *data)
1380 {
1381         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1382         unsigned long event = *(unsigned long *)data;
1383
1384         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1385                 return 0;
1386
1387         switch (event) {
1388         case DCA_PROVIDER_ADD:
1389                 /* if we're already enabled, don't do it again */
1390                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1391                         break;
1392                 if (dca_add_requester(dev) == 0) {
1393                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1394                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1395                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1396                         break;
1397                 }
1398                 fallthrough; /* DCA is disabled. */
1399         case DCA_PROVIDER_REMOVE:
1400                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1401                         dca_remove_requester(dev);
1402                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1403                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1405                 }
1406                 break;
1407         }
1408
1409         return 0;
1410 }
1411
1412 #endif /* CONFIG_IXGBE_DCA */
1413
1414 #define IXGBE_RSS_L4_TYPES_MASK \
1415         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1416          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1417          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1418          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1419
1420 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1421                                  union ixgbe_adv_rx_desc *rx_desc,
1422                                  struct sk_buff *skb)
1423 {
1424         u16 rss_type;
1425
1426         if (!(ring->netdev->features & NETIF_F_RXHASH))
1427                 return;
1428
1429         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1430                    IXGBE_RXDADV_RSSTYPE_MASK;
1431
1432         if (!rss_type)
1433                 return;
1434
1435         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1436                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1437                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1438 }
1439
1440 #ifdef IXGBE_FCOE
1441 /**
1442  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1443  * @ring: structure containing ring specific data
1444  * @rx_desc: advanced rx descriptor
1445  *
1446  * Returns : true if it is FCoE pkt
1447  */
1448 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1449                                     union ixgbe_adv_rx_desc *rx_desc)
1450 {
1451         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1452
1453         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1454                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1455                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1456                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1457 }
1458
1459 #endif /* IXGBE_FCOE */
1460 /**
1461  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1462  * @ring: structure containing ring specific data
1463  * @rx_desc: current Rx descriptor being processed
1464  * @skb: skb currently being received and modified
1465  **/
1466 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1467                                      union ixgbe_adv_rx_desc *rx_desc,
1468                                      struct sk_buff *skb)
1469 {
1470         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1471         bool encap_pkt = false;
1472
1473         skb_checksum_none_assert(skb);
1474
1475         /* Rx csum disabled */
1476         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1477                 return;
1478
1479         /* check for VXLAN and Geneve packets */
1480         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1481                 encap_pkt = true;
1482                 skb->encapsulation = 1;
1483         }
1484
1485         /* if IP and error */
1486         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1487             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1488                 ring->rx_stats.csum_err++;
1489                 return;
1490         }
1491
1492         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1493                 return;
1494
1495         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1496                 /*
1497                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1498                  * checksum errors.
1499                  */
1500                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1501                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1502                         return;
1503
1504                 ring->rx_stats.csum_err++;
1505                 return;
1506         }
1507
1508         /* It must be a TCP or UDP packet with a valid checksum */
1509         skb->ip_summed = CHECKSUM_UNNECESSARY;
1510         if (encap_pkt) {
1511                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1512                         return;
1513
1514                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1515                         skb->ip_summed = CHECKSUM_NONE;
1516                         return;
1517                 }
1518                 /* If we checked the outer header let the stack know */
1519                 skb->csum_level = 1;
1520         }
1521 }
1522
1523 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1524 {
1525         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1526 }
1527
1528 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1529                                     struct ixgbe_rx_buffer *bi)
1530 {
1531         struct page *page = bi->page;
1532         dma_addr_t dma;
1533
1534         /* since we are recycling buffers we should seldom need to alloc */
1535         if (likely(page))
1536                 return true;
1537
1538         /* alloc new page for storage */
1539         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1540         if (unlikely(!page)) {
1541                 rx_ring->rx_stats.alloc_rx_page_failed++;
1542                 return false;
1543         }
1544
1545         /* map page for use */
1546         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1547                                  ixgbe_rx_pg_size(rx_ring),
1548                                  DMA_FROM_DEVICE,
1549                                  IXGBE_RX_DMA_ATTR);
1550
1551         /*
1552          * if mapping failed free memory back to system since
1553          * there isn't much point in holding memory we can't use
1554          */
1555         if (dma_mapping_error(rx_ring->dev, dma)) {
1556                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1557
1558                 rx_ring->rx_stats.alloc_rx_page_failed++;
1559                 return false;
1560         }
1561
1562         bi->dma = dma;
1563         bi->page = page;
1564         bi->page_offset = ixgbe_rx_offset(rx_ring);
1565         page_ref_add(page, USHRT_MAX - 1);
1566         bi->pagecnt_bias = USHRT_MAX;
1567         rx_ring->rx_stats.alloc_rx_page++;
1568
1569         return true;
1570 }
1571
1572 /**
1573  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1574  * @rx_ring: ring to place buffers on
1575  * @cleaned_count: number of buffers to replace
1576  **/
1577 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1578 {
1579         union ixgbe_adv_rx_desc *rx_desc;
1580         struct ixgbe_rx_buffer *bi;
1581         u16 i = rx_ring->next_to_use;
1582         u16 bufsz;
1583
1584         /* nothing to do */
1585         if (!cleaned_count)
1586                 return;
1587
1588         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1589         bi = &rx_ring->rx_buffer_info[i];
1590         i -= rx_ring->count;
1591
1592         bufsz = ixgbe_rx_bufsz(rx_ring);
1593
1594         do {
1595                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1596                         break;
1597
1598                 /* sync the buffer for use by the device */
1599                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1600                                                  bi->page_offset, bufsz,
1601                                                  DMA_FROM_DEVICE);
1602
1603                 /*
1604                  * Refresh the desc even if buffer_addrs didn't change
1605                  * because each write-back erases this info.
1606                  */
1607                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1608
1609                 rx_desc++;
1610                 bi++;
1611                 i++;
1612                 if (unlikely(!i)) {
1613                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1614                         bi = rx_ring->rx_buffer_info;
1615                         i -= rx_ring->count;
1616                 }
1617
1618                 /* clear the length for the next_to_use descriptor */
1619                 rx_desc->wb.upper.length = 0;
1620
1621                 cleaned_count--;
1622         } while (cleaned_count);
1623
1624         i += rx_ring->count;
1625
1626         if (rx_ring->next_to_use != i) {
1627                 rx_ring->next_to_use = i;
1628
1629                 /* update next to alloc since we have filled the ring */
1630                 rx_ring->next_to_alloc = i;
1631
1632                 /* Force memory writes to complete before letting h/w
1633                  * know there are new descriptors to fetch.  (Only
1634                  * applicable for weak-ordered memory model archs,
1635                  * such as IA-64).
1636                  */
1637                 wmb();
1638                 writel(i, rx_ring->tail);
1639         }
1640 }
1641
1642 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1643                                    struct sk_buff *skb)
1644 {
1645         u16 hdr_len = skb_headlen(skb);
1646
1647         /* set gso_size to avoid messing up TCP MSS */
1648         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1649                                                  IXGBE_CB(skb)->append_cnt);
1650         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1651 }
1652
1653 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1654                                    struct sk_buff *skb)
1655 {
1656         /* if append_cnt is 0 then frame is not RSC */
1657         if (!IXGBE_CB(skb)->append_cnt)
1658                 return;
1659
1660         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1661         rx_ring->rx_stats.rsc_flush++;
1662
1663         ixgbe_set_rsc_gso_size(rx_ring, skb);
1664
1665         /* gso_size is computed using append_cnt so always clear it last */
1666         IXGBE_CB(skb)->append_cnt = 0;
1667 }
1668
1669 /**
1670  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1671  * @rx_ring: rx descriptor ring packet is being transacted on
1672  * @rx_desc: pointer to the EOP Rx descriptor
1673  * @skb: pointer to current skb being populated
1674  *
1675  * This function checks the ring, descriptor, and packet information in
1676  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1677  * other fields within the skb.
1678  **/
1679 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1680                               union ixgbe_adv_rx_desc *rx_desc,
1681                               struct sk_buff *skb)
1682 {
1683         struct net_device *dev = rx_ring->netdev;
1684         u32 flags = rx_ring->q_vector->adapter->flags;
1685
1686         ixgbe_update_rsc_stats(rx_ring, skb);
1687
1688         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1689
1690         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1691
1692         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1693                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1694
1695         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1696             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1697                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1698                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1699         }
1700
1701         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1702                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1703
1704         /* record Rx queue, or update MACVLAN statistics */
1705         if (netif_is_ixgbe(dev))
1706                 skb_record_rx_queue(skb, rx_ring->queue_index);
1707         else
1708                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1709                                  false);
1710
1711         skb->protocol = eth_type_trans(skb, dev);
1712 }
1713
1714 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1715                   struct sk_buff *skb)
1716 {
1717         napi_gro_receive(&q_vector->napi, skb);
1718 }
1719
1720 /**
1721  * ixgbe_is_non_eop - process handling of non-EOP buffers
1722  * @rx_ring: Rx ring being processed
1723  * @rx_desc: Rx descriptor for current buffer
1724  * @skb: Current socket buffer containing buffer in progress
1725  *
1726  * This function updates next to clean.  If the buffer is an EOP buffer
1727  * this function exits returning false, otherwise it will place the
1728  * sk_buff in the next buffer to be chained and return true indicating
1729  * that this is in fact a non-EOP buffer.
1730  **/
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1732                              union ixgbe_adv_rx_desc *rx_desc,
1733                              struct sk_buff *skb)
1734 {
1735         u32 ntc = rx_ring->next_to_clean + 1;
1736
1737         /* fetch, update, and store next to clean */
1738         ntc = (ntc < rx_ring->count) ? ntc : 0;
1739         rx_ring->next_to_clean = ntc;
1740
1741         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1742
1743         /* update RSC append count if present */
1744         if (ring_is_rsc_enabled(rx_ring)) {
1745                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1746                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1747
1748                 if (unlikely(rsc_enabled)) {
1749                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1750
1751                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1752                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1753
1754                         /* update ntc based on RSC value */
1755                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1756                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1757                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1758                 }
1759         }
1760
1761         /* if we are the last buffer then there is nothing else to do */
1762         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1763                 return false;
1764
1765         /* place skb in next buffer to be received */
1766         rx_ring->rx_buffer_info[ntc].skb = skb;
1767         rx_ring->rx_stats.non_eop_descs++;
1768
1769         return true;
1770 }
1771
1772 /**
1773  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774  * @rx_ring: rx descriptor ring packet is being transacted on
1775  * @skb: pointer to current skb being adjusted
1776  *
1777  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1778  * main difference between this version and the original function is that
1779  * this function can make several assumptions about the state of things
1780  * that allow for significant optimizations versus the standard function.
1781  * As a result we can do things like drop a frag and maintain an accurate
1782  * truesize for the skb.
1783  */
1784 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1785                             struct sk_buff *skb)
1786 {
1787         skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1788         unsigned char *va;
1789         unsigned int pull_len;
1790
1791         /*
1792          * it is valid to use page_address instead of kmap since we are
1793          * working with pages allocated out of the lomem pool per
1794          * alloc_page(GFP_ATOMIC)
1795          */
1796         va = skb_frag_address(frag);
1797
1798         /*
1799          * we need the header to contain the greater of either ETH_HLEN or
1800          * 60 bytes if the skb->len is less than 60 for skb_pad.
1801          */
1802         pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1803
1804         /* align pull length to size of long to optimize memcpy performance */
1805         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1806
1807         /* update all of the pointers */
1808         skb_frag_size_sub(frag, pull_len);
1809         skb_frag_off_add(frag, pull_len);
1810         skb->data_len -= pull_len;
1811         skb->tail += pull_len;
1812 }
1813
1814 /**
1815  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816  * @rx_ring: rx descriptor ring packet is being transacted on
1817  * @skb: pointer to current skb being updated
1818  *
1819  * This function provides a basic DMA sync up for the first fragment of an
1820  * skb.  The reason for doing this is that the first fragment cannot be
1821  * unmapped until we have reached the end of packet descriptor for a buffer
1822  * chain.
1823  */
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1825                                 struct sk_buff *skb)
1826 {
1827         if (ring_uses_build_skb(rx_ring)) {
1828                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1829
1830                 dma_sync_single_range_for_cpu(rx_ring->dev,
1831                                               IXGBE_CB(skb)->dma,
1832                                               offset,
1833                                               skb_headlen(skb),
1834                                               DMA_FROM_DEVICE);
1835         } else {
1836                 skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1837
1838                 dma_sync_single_range_for_cpu(rx_ring->dev,
1839                                               IXGBE_CB(skb)->dma,
1840                                               skb_frag_off(frag),
1841                                               skb_frag_size(frag),
1842                                               DMA_FROM_DEVICE);
1843         }
1844
1845         /* If the page was released, just unmap it. */
1846         if (unlikely(IXGBE_CB(skb)->page_released)) {
1847                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1848                                      ixgbe_rx_pg_size(rx_ring),
1849                                      DMA_FROM_DEVICE,
1850                                      IXGBE_RX_DMA_ATTR);
1851         }
1852 }
1853
1854 /**
1855  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1856  * @rx_ring: rx descriptor ring packet is being transacted on
1857  * @rx_desc: pointer to the EOP Rx descriptor
1858  * @skb: pointer to current skb being fixed
1859  *
1860  * Check if the skb is valid in the XDP case it will be an error pointer.
1861  * Return true in this case to abort processing and advance to next
1862  * descriptor.
1863  *
1864  * Check for corrupted packet headers caused by senders on the local L2
1865  * embedded NIC switch not setting up their Tx Descriptors right.  These
1866  * should be very rare.
1867  *
1868  * Also address the case where we are pulling data in on pages only
1869  * and as such no data is present in the skb header.
1870  *
1871  * In addition if skb is not at least 60 bytes we need to pad it so that
1872  * it is large enough to qualify as a valid Ethernet frame.
1873  *
1874  * Returns true if an error was encountered and skb was freed.
1875  **/
1876 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1877                            union ixgbe_adv_rx_desc *rx_desc,
1878                            struct sk_buff *skb)
1879 {
1880         struct net_device *netdev = rx_ring->netdev;
1881
1882         /* XDP packets use error pointer so abort at this point */
1883         if (IS_ERR(skb))
1884                 return true;
1885
1886         /* Verify netdev is present, and that packet does not have any
1887          * errors that would be unacceptable to the netdev.
1888          */
1889         if (!netdev ||
1890             (unlikely(ixgbe_test_staterr(rx_desc,
1891                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1892              !(netdev->features & NETIF_F_RXALL)))) {
1893                 dev_kfree_skb_any(skb);
1894                 return true;
1895         }
1896
1897         /* place header in linear portion of buffer */
1898         if (!skb_headlen(skb))
1899                 ixgbe_pull_tail(rx_ring, skb);
1900
1901 #ifdef IXGBE_FCOE
1902         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1903         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1904                 return false;
1905
1906 #endif
1907         /* if eth_skb_pad returns an error the skb was freed */
1908         if (eth_skb_pad(skb))
1909                 return true;
1910
1911         return false;
1912 }
1913
1914 /**
1915  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1916  * @rx_ring: rx descriptor ring to store buffers on
1917  * @old_buff: donor buffer to have page reused
1918  *
1919  * Synchronizes page for reuse by the adapter
1920  **/
1921 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1922                                 struct ixgbe_rx_buffer *old_buff)
1923 {
1924         struct ixgbe_rx_buffer *new_buff;
1925         u16 nta = rx_ring->next_to_alloc;
1926
1927         new_buff = &rx_ring->rx_buffer_info[nta];
1928
1929         /* update, and store next to alloc */
1930         nta++;
1931         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1932
1933         /* Transfer page from old buffer to new buffer.
1934          * Move each member individually to avoid possible store
1935          * forwarding stalls and unnecessary copy of skb.
1936          */
1937         new_buff->dma           = old_buff->dma;
1938         new_buff->page          = old_buff->page;
1939         new_buff->page_offset   = old_buff->page_offset;
1940         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1941 }
1942
1943 static inline bool ixgbe_page_is_reserved(struct page *page)
1944 {
1945         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1946 }
1947
1948 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer,
1949                                     int rx_buffer_pgcnt)
1950 {
1951         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1952         struct page *page = rx_buffer->page;
1953
1954         /* avoid re-using remote pages */
1955         if (unlikely(ixgbe_page_is_reserved(page)))
1956                 return false;
1957
1958 #if (PAGE_SIZE < 8192)
1959         /* if we are only owner of page we can reuse it */
1960         if (unlikely((rx_buffer_pgcnt - pagecnt_bias) > 1))
1961                 return false;
1962 #else
1963         /* The last offset is a bit aggressive in that we assume the
1964          * worst case of FCoE being enabled and using a 3K buffer.
1965          * However this should have minimal impact as the 1K extra is
1966          * still less than one buffer in size.
1967          */
1968 #define IXGBE_LAST_OFFSET \
1969         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1970         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1971                 return false;
1972 #endif
1973
1974         /* If we have drained the page fragment pool we need to update
1975          * the pagecnt_bias and page count so that we fully restock the
1976          * number of references the driver holds.
1977          */
1978         if (unlikely(pagecnt_bias == 1)) {
1979                 page_ref_add(page, USHRT_MAX - 1);
1980                 rx_buffer->pagecnt_bias = USHRT_MAX;
1981         }
1982
1983         return true;
1984 }
1985
1986 /**
1987  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1988  * @rx_ring: rx descriptor ring to transact packets on
1989  * @rx_buffer: buffer containing page to add
1990  * @skb: sk_buff to place the data into
1991  * @size: size of data in rx_buffer
1992  *
1993  * This function will add the data contained in rx_buffer->page to the skb.
1994  * This is done either through a direct copy if the data in the buffer is
1995  * less than the skb header size, otherwise it will just attach the page as
1996  * a frag to the skb.
1997  *
1998  * The function will then update the page offset if necessary and return
1999  * true if the buffer can be reused by the adapter.
2000  **/
2001 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2002                               struct ixgbe_rx_buffer *rx_buffer,
2003                               struct sk_buff *skb,
2004                               unsigned int size)
2005 {
2006 #if (PAGE_SIZE < 8192)
2007         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2008 #else
2009         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2010                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2011                                 SKB_DATA_ALIGN(size);
2012 #endif
2013         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2014                         rx_buffer->page_offset, size, truesize);
2015 #if (PAGE_SIZE < 8192)
2016         rx_buffer->page_offset ^= truesize;
2017 #else
2018         rx_buffer->page_offset += truesize;
2019 #endif
2020 }
2021
2022 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2023                                                    union ixgbe_adv_rx_desc *rx_desc,
2024                                                    struct sk_buff **skb,
2025                                                    const unsigned int size,
2026                                                    int *rx_buffer_pgcnt)
2027 {
2028         struct ixgbe_rx_buffer *rx_buffer;
2029
2030         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2031         *rx_buffer_pgcnt =
2032 #if (PAGE_SIZE < 8192)
2033                 page_count(rx_buffer->page);
2034 #else
2035                 0;
2036 #endif
2037         prefetchw(rx_buffer->page);
2038         *skb = rx_buffer->skb;
2039
2040         /* Delay unmapping of the first packet. It carries the header
2041          * information, HW may still access the header after the writeback.
2042          * Only unmap it when EOP is reached
2043          */
2044         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2045                 if (!*skb)
2046                         goto skip_sync;
2047         } else {
2048                 if (*skb)
2049                         ixgbe_dma_sync_frag(rx_ring, *skb);
2050         }
2051
2052         /* we are reusing so sync this buffer for CPU use */
2053         dma_sync_single_range_for_cpu(rx_ring->dev,
2054                                       rx_buffer->dma,
2055                                       rx_buffer->page_offset,
2056                                       size,
2057                                       DMA_FROM_DEVICE);
2058 skip_sync:
2059         rx_buffer->pagecnt_bias--;
2060
2061         return rx_buffer;
2062 }
2063
2064 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2065                                 struct ixgbe_rx_buffer *rx_buffer,
2066                                 struct sk_buff *skb,
2067                                 int rx_buffer_pgcnt)
2068 {
2069         if (ixgbe_can_reuse_rx_page(rx_buffer, rx_buffer_pgcnt)) {
2070                 /* hand second half of page back to the ring */
2071                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2072         } else {
2073                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2074                         /* the page has been released from the ring */
2075                         IXGBE_CB(skb)->page_released = true;
2076                 } else {
2077                         /* we are not reusing the buffer so unmap it */
2078                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2079                                              ixgbe_rx_pg_size(rx_ring),
2080                                              DMA_FROM_DEVICE,
2081                                              IXGBE_RX_DMA_ATTR);
2082                 }
2083                 __page_frag_cache_drain(rx_buffer->page,
2084                                         rx_buffer->pagecnt_bias);
2085         }
2086
2087         /* clear contents of rx_buffer */
2088         rx_buffer->page = NULL;
2089         rx_buffer->skb = NULL;
2090 }
2091
2092 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2093                                            struct ixgbe_rx_buffer *rx_buffer,
2094                                            struct xdp_buff *xdp,
2095                                            union ixgbe_adv_rx_desc *rx_desc)
2096 {
2097         unsigned int size = xdp->data_end - xdp->data;
2098 #if (PAGE_SIZE < 8192)
2099         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2100 #else
2101         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2102                                                xdp->data_hard_start);
2103 #endif
2104         struct sk_buff *skb;
2105
2106         /* prefetch first cache line of first page */
2107         net_prefetch(xdp->data);
2108
2109         /* Note, we get here by enabling legacy-rx via:
2110          *
2111          *    ethtool --set-priv-flags <dev> legacy-rx on
2112          *
2113          * In this mode, we currently get 0 extra XDP headroom as
2114          * opposed to having legacy-rx off, where we process XDP
2115          * packets going to stack via ixgbe_build_skb(). The latter
2116          * provides us currently with 192 bytes of headroom.
2117          *
2118          * For ixgbe_construct_skb() mode it means that the
2119          * xdp->data_meta will always point to xdp->data, since
2120          * the helper cannot expand the head. Should this ever
2121          * change in future for legacy-rx mode on, then lets also
2122          * add xdp->data_meta handling here.
2123          */
2124
2125         /* allocate a skb to store the frags */
2126         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2127         if (unlikely(!skb))
2128                 return NULL;
2129
2130         if (size > IXGBE_RX_HDR_SIZE) {
2131                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2132                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2133
2134                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2135                                 xdp->data - page_address(rx_buffer->page),
2136                                 size, truesize);
2137 #if (PAGE_SIZE < 8192)
2138                 rx_buffer->page_offset ^= truesize;
2139 #else
2140                 rx_buffer->page_offset += truesize;
2141 #endif
2142         } else {
2143                 memcpy(__skb_put(skb, size),
2144                        xdp->data, ALIGN(size, sizeof(long)));
2145                 rx_buffer->pagecnt_bias++;
2146         }
2147
2148         return skb;
2149 }
2150
2151 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2152                                        struct ixgbe_rx_buffer *rx_buffer,
2153                                        struct xdp_buff *xdp,
2154                                        union ixgbe_adv_rx_desc *rx_desc)
2155 {
2156         unsigned int metasize = xdp->data - xdp->data_meta;
2157 #if (PAGE_SIZE < 8192)
2158         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2159 #else
2160         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2161                                 SKB_DATA_ALIGN(xdp->data_end -
2162                                                xdp->data_hard_start);
2163 #endif
2164         struct sk_buff *skb;
2165
2166         /* Prefetch first cache line of first page. If xdp->data_meta
2167          * is unused, this points extactly as xdp->data, otherwise we
2168          * likely have a consumer accessing first few bytes of meta
2169          * data, and then actual data.
2170          */
2171         net_prefetch(xdp->data_meta);
2172
2173         /* build an skb to around the page buffer */
2174         skb = build_skb(xdp->data_hard_start, truesize);
2175         if (unlikely(!skb))
2176                 return NULL;
2177
2178         /* update pointers within the skb to store the data */
2179         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2180         __skb_put(skb, xdp->data_end - xdp->data);
2181         if (metasize)
2182                 skb_metadata_set(skb, metasize);
2183
2184         /* record DMA address if this is the start of a chain of buffers */
2185         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2186                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2187
2188         /* update buffer offset */
2189 #if (PAGE_SIZE < 8192)
2190         rx_buffer->page_offset ^= truesize;
2191 #else
2192         rx_buffer->page_offset += truesize;
2193 #endif
2194
2195         return skb;
2196 }
2197
2198 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2199                                      struct ixgbe_ring *rx_ring,
2200                                      struct xdp_buff *xdp)
2201 {
2202         int err, result = IXGBE_XDP_PASS;
2203         struct bpf_prog *xdp_prog;
2204         struct xdp_frame *xdpf;
2205         u32 act;
2206
2207         rcu_read_lock();
2208         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2209
2210         if (!xdp_prog)
2211                 goto xdp_out;
2212
2213         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2214
2215         act = bpf_prog_run_xdp(xdp_prog, xdp);
2216         switch (act) {
2217         case XDP_PASS:
2218                 break;
2219         case XDP_TX:
2220                 xdpf = xdp_convert_buff_to_frame(xdp);
2221                 if (unlikely(!xdpf)) {
2222                         result = IXGBE_XDP_CONSUMED;
2223                         break;
2224                 }
2225                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2226                 break;
2227         case XDP_REDIRECT:
2228                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2229                 if (!err)
2230                         result = IXGBE_XDP_REDIR;
2231                 else
2232                         result = IXGBE_XDP_CONSUMED;
2233                 break;
2234         default:
2235                 bpf_warn_invalid_xdp_action(act);
2236                 fallthrough;
2237         case XDP_ABORTED:
2238                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2239                 fallthrough; /* handle aborts by dropping packet */
2240         case XDP_DROP:
2241                 result = IXGBE_XDP_CONSUMED;
2242                 break;
2243         }
2244 xdp_out:
2245         rcu_read_unlock();
2246         return ERR_PTR(-result);
2247 }
2248
2249 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring,
2250                                             unsigned int size)
2251 {
2252         unsigned int truesize;
2253
2254 #if (PAGE_SIZE < 8192)
2255         truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
2256 #else
2257         truesize = ring_uses_build_skb(rx_ring) ?
2258                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2259                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2260                 SKB_DATA_ALIGN(size);
2261 #endif
2262         return truesize;
2263 }
2264
2265 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2266                                  struct ixgbe_rx_buffer *rx_buffer,
2267                                  unsigned int size)
2268 {
2269         unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size);
2270 #if (PAGE_SIZE < 8192)
2271         rx_buffer->page_offset ^= truesize;
2272 #else
2273         rx_buffer->page_offset += truesize;
2274 #endif
2275 }
2276
2277 /**
2278  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2279  * @q_vector: structure containing interrupt and ring information
2280  * @rx_ring: rx descriptor ring to transact packets on
2281  * @budget: Total limit on number of packets to process
2282  *
2283  * This function provides a "bounce buffer" approach to Rx interrupt
2284  * processing.  The advantage to this is that on systems that have
2285  * expensive overhead for IOMMU access this provides a means of avoiding
2286  * it by maintaining the mapping of the page to the syste.
2287  *
2288  * Returns amount of work completed
2289  **/
2290 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2291                                struct ixgbe_ring *rx_ring,
2292                                const int budget)
2293 {
2294         unsigned int total_rx_bytes = 0, total_rx_packets = 0, frame_sz = 0;
2295         struct ixgbe_adapter *adapter = q_vector->adapter;
2296 #ifdef IXGBE_FCOE
2297         int ddp_bytes;
2298         unsigned int mss = 0;
2299 #endif /* IXGBE_FCOE */
2300         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2301         unsigned int xdp_xmit = 0;
2302         struct xdp_buff xdp;
2303
2304         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
2305 #if (PAGE_SIZE < 8192)
2306         frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0);
2307 #endif
2308         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
2309
2310         while (likely(total_rx_packets < budget)) {
2311                 union ixgbe_adv_rx_desc *rx_desc;
2312                 struct ixgbe_rx_buffer *rx_buffer;
2313                 struct sk_buff *skb;
2314                 int rx_buffer_pgcnt;
2315                 unsigned int size;
2316
2317                 /* return some buffers to hardware, one at a time is too slow */
2318                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2319                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2320                         cleaned_count = 0;
2321                 }
2322
2323                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2324                 size = le16_to_cpu(rx_desc->wb.upper.length);
2325                 if (!size)
2326                         break;
2327
2328                 /* This memory barrier is needed to keep us from reading
2329                  * any other fields out of the rx_desc until we know the
2330                  * descriptor has been written back
2331                  */
2332                 dma_rmb();
2333
2334                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size, &rx_buffer_pgcnt);
2335
2336                 /* retrieve a buffer from the ring */
2337                 if (!skb) {
2338                         unsigned int offset = ixgbe_rx_offset(rx_ring);
2339                         unsigned char *hard_start;
2340
2341                         hard_start = page_address(rx_buffer->page) +
2342                                      rx_buffer->page_offset - offset;
2343                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
2344 #if (PAGE_SIZE > 4096)
2345                         /* At larger PAGE_SIZE, frame_sz depend on len size */
2346                         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size);
2347 #endif
2348                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2349                 }
2350
2351                 if (IS_ERR(skb)) {
2352                         unsigned int xdp_res = -PTR_ERR(skb);
2353
2354                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2355                                 xdp_xmit |= xdp_res;
2356                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2357                         } else {
2358                                 rx_buffer->pagecnt_bias++;
2359                         }
2360                         total_rx_packets++;
2361                         total_rx_bytes += size;
2362                 } else if (skb) {
2363                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2364                 } else if (ring_uses_build_skb(rx_ring)) {
2365                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2366                                               &xdp, rx_desc);
2367                 } else {
2368                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2369                                                   &xdp, rx_desc);
2370                 }
2371
2372                 /* exit if we failed to retrieve a buffer */
2373                 if (!skb) {
2374                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2375                         rx_buffer->pagecnt_bias++;
2376                         break;
2377                 }
2378
2379                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb, rx_buffer_pgcnt);
2380                 cleaned_count++;
2381
2382                 /* place incomplete frames back on ring for completion */
2383                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2384                         continue;
2385
2386                 /* verify the packet layout is correct */
2387                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2388                         continue;
2389
2390                 /* probably a little skewed due to removing CRC */
2391                 total_rx_bytes += skb->len;
2392
2393                 /* populate checksum, timestamp, VLAN, and protocol */
2394                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2395
2396 #ifdef IXGBE_FCOE
2397                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2398                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2399                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2400                         /* include DDPed FCoE data */
2401                         if (ddp_bytes > 0) {
2402                                 if (!mss) {
2403                                         mss = rx_ring->netdev->mtu -
2404                                                 sizeof(struct fcoe_hdr) -
2405                                                 sizeof(struct fc_frame_header) -
2406                                                 sizeof(struct fcoe_crc_eof);
2407                                         if (mss > 512)
2408                                                 mss &= ~511;
2409                                 }
2410                                 total_rx_bytes += ddp_bytes;
2411                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2412                                                                  mss);
2413                         }
2414                         if (!ddp_bytes) {
2415                                 dev_kfree_skb_any(skb);
2416                                 continue;
2417                         }
2418                 }
2419
2420 #endif /* IXGBE_FCOE */
2421                 ixgbe_rx_skb(q_vector, skb);
2422
2423                 /* update budget accounting */
2424                 total_rx_packets++;
2425         }
2426
2427         if (xdp_xmit & IXGBE_XDP_REDIR)
2428                 xdp_do_flush_map();
2429
2430         if (xdp_xmit & IXGBE_XDP_TX) {
2431                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2432
2433                 /* Force memory writes to complete before letting h/w
2434                  * know there are new descriptors to fetch.
2435                  */
2436                 wmb();
2437                 writel(ring->next_to_use, ring->tail);
2438         }
2439
2440         u64_stats_update_begin(&rx_ring->syncp);
2441         rx_ring->stats.packets += total_rx_packets;
2442         rx_ring->stats.bytes += total_rx_bytes;
2443         u64_stats_update_end(&rx_ring->syncp);
2444         q_vector->rx.total_packets += total_rx_packets;
2445         q_vector->rx.total_bytes += total_rx_bytes;
2446
2447         return total_rx_packets;
2448 }
2449
2450 /**
2451  * ixgbe_configure_msix - Configure MSI-X hardware
2452  * @adapter: board private structure
2453  *
2454  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2455  * interrupts.
2456  **/
2457 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2458 {
2459         struct ixgbe_q_vector *q_vector;
2460         int v_idx;
2461         u32 mask;
2462
2463         /* Populate MSIX to EITR Select */
2464         if (adapter->num_vfs > 32) {
2465                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2466                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2467         }
2468
2469         /*
2470          * Populate the IVAR table and set the ITR values to the
2471          * corresponding register.
2472          */
2473         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2474                 struct ixgbe_ring *ring;
2475                 q_vector = adapter->q_vector[v_idx];
2476
2477                 ixgbe_for_each_ring(ring, q_vector->rx)
2478                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2479
2480                 ixgbe_for_each_ring(ring, q_vector->tx)
2481                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2482
2483                 ixgbe_write_eitr(q_vector);
2484         }
2485
2486         switch (adapter->hw.mac.type) {
2487         case ixgbe_mac_82598EB:
2488                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2489                                v_idx);
2490                 break;
2491         case ixgbe_mac_82599EB:
2492         case ixgbe_mac_X540:
2493         case ixgbe_mac_X550:
2494         case ixgbe_mac_X550EM_x:
2495         case ixgbe_mac_x550em_a:
2496                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2497                 break;
2498         default:
2499                 break;
2500         }
2501         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2502
2503         /* set up to autoclear timer, and the vectors */
2504         mask = IXGBE_EIMS_ENABLE_MASK;
2505         mask &= ~(IXGBE_EIMS_OTHER |
2506                   IXGBE_EIMS_MAILBOX |
2507                   IXGBE_EIMS_LSC);
2508
2509         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2510 }
2511
2512 /**
2513  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2514  * @q_vector: structure containing interrupt and ring information
2515  * @ring_container: structure containing ring performance data
2516  *
2517  *      Stores a new ITR value based on packets and byte
2518  *      counts during the last interrupt.  The advantage of per interrupt
2519  *      computation is faster updates and more accurate ITR for the current
2520  *      traffic pattern.  Constants in this function were computed
2521  *      based on theoretical maximum wire speed and thresholds were set based
2522  *      on testing data as well as attempting to minimize response time
2523  *      while increasing bulk throughput.
2524  **/
2525 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2526                              struct ixgbe_ring_container *ring_container)
2527 {
2528         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2529                            IXGBE_ITR_ADAPTIVE_LATENCY;
2530         unsigned int avg_wire_size, packets, bytes;
2531         unsigned long next_update = jiffies;
2532
2533         /* If we don't have any rings just leave ourselves set for maximum
2534          * possible latency so we take ourselves out of the equation.
2535          */
2536         if (!ring_container->ring)
2537                 return;
2538
2539         /* If we didn't update within up to 1 - 2 jiffies we can assume
2540          * that either packets are coming in so slow there hasn't been
2541          * any work, or that there is so much work that NAPI is dealing
2542          * with interrupt moderation and we don't need to do anything.
2543          */
2544         if (time_after(next_update, ring_container->next_update))
2545                 goto clear_counts;
2546
2547         packets = ring_container->total_packets;
2548
2549         /* We have no packets to actually measure against. This means
2550          * either one of the other queues on this vector is active or
2551          * we are a Tx queue doing TSO with too high of an interrupt rate.
2552          *
2553          * When this occurs just tick up our delay by the minimum value
2554          * and hope that this extra delay will prevent us from being called
2555          * without any work on our queue.
2556          */
2557         if (!packets) {
2558                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2559                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2560                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2561                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2562                 goto clear_counts;
2563         }
2564
2565         bytes = ring_container->total_bytes;
2566
2567         /* If packets are less than 4 or bytes are less than 9000 assume
2568          * insufficient data to use bulk rate limiting approach. We are
2569          * likely latency driven.
2570          */
2571         if (packets < 4 && bytes < 9000) {
2572                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2573                 goto adjust_by_size;
2574         }
2575
2576         /* Between 4 and 48 we can assume that our current interrupt delay
2577          * is only slightly too low. As such we should increase it by a small
2578          * fixed amount.
2579          */
2580         if (packets < 48) {
2581                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2582                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2583                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2584                 goto clear_counts;
2585         }
2586
2587         /* Between 48 and 96 is our "goldilocks" zone where we are working
2588          * out "just right". Just report that our current ITR is good for us.
2589          */
2590         if (packets < 96) {
2591                 itr = q_vector->itr >> 2;
2592                 goto clear_counts;
2593         }
2594
2595         /* If packet count is 96 or greater we are likely looking at a slight
2596          * overrun of the delay we want. Try halving our delay to see if that
2597          * will cut the number of packets in half per interrupt.
2598          */
2599         if (packets < 256) {
2600                 itr = q_vector->itr >> 3;
2601                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2602                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2603                 goto clear_counts;
2604         }
2605
2606         /* The paths below assume we are dealing with a bulk ITR since number
2607          * of packets is 256 or greater. We are just going to have to compute
2608          * a value and try to bring the count under control, though for smaller
2609          * packet sizes there isn't much we can do as NAPI polling will likely
2610          * be kicking in sooner rather than later.
2611          */
2612         itr = IXGBE_ITR_ADAPTIVE_BULK;
2613
2614 adjust_by_size:
2615         /* If packet counts are 256 or greater we can assume we have a gross
2616          * overestimation of what the rate should be. Instead of trying to fine
2617          * tune it just use the formula below to try and dial in an exact value
2618          * give the current packet size of the frame.
2619          */
2620         avg_wire_size = bytes / packets;
2621
2622         /* The following is a crude approximation of:
2623          *  wmem_default / (size + overhead) = desired_pkts_per_int
2624          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2625          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2626          *
2627          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2628          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2629          * formula down to
2630          *
2631          *  (170 * (size + 24)) / (size + 640) = ITR
2632          *
2633          * We first do some math on the packet size and then finally bitshift
2634          * by 8 after rounding up. We also have to account for PCIe link speed
2635          * difference as ITR scales based on this.
2636          */
2637         if (avg_wire_size <= 60) {
2638                 /* Start at 50k ints/sec */
2639                 avg_wire_size = 5120;
2640         } else if (avg_wire_size <= 316) {
2641                 /* 50K ints/sec to 16K ints/sec */
2642                 avg_wire_size *= 40;
2643                 avg_wire_size += 2720;
2644         } else if (avg_wire_size <= 1084) {
2645                 /* 16K ints/sec to 9.2K ints/sec */
2646                 avg_wire_size *= 15;
2647                 avg_wire_size += 11452;
2648         } else if (avg_wire_size < 1968) {
2649                 /* 9.2K ints/sec to 8K ints/sec */
2650                 avg_wire_size *= 5;
2651                 avg_wire_size += 22420;
2652         } else {
2653                 /* plateau at a limit of 8K ints/sec */
2654                 avg_wire_size = 32256;
2655         }
2656
2657         /* If we are in low latency mode half our delay which doubles the rate
2658          * to somewhere between 100K to 16K ints/sec
2659          */
2660         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2661                 avg_wire_size >>= 1;
2662
2663         /* Resultant value is 256 times larger than it needs to be. This
2664          * gives us room to adjust the value as needed to either increase
2665          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2666          *
2667          * Use addition as we have already recorded the new latency flag
2668          * for the ITR value.
2669          */
2670         switch (q_vector->adapter->link_speed) {
2671         case IXGBE_LINK_SPEED_10GB_FULL:
2672         case IXGBE_LINK_SPEED_100_FULL:
2673         default:
2674                 itr += DIV_ROUND_UP(avg_wire_size,
2675                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2676                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2677                 break;
2678         case IXGBE_LINK_SPEED_2_5GB_FULL:
2679         case IXGBE_LINK_SPEED_1GB_FULL:
2680         case IXGBE_LINK_SPEED_10_FULL:
2681                 if (avg_wire_size > 8064)
2682                         avg_wire_size = 8064;
2683                 itr += DIV_ROUND_UP(avg_wire_size,
2684                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2685                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2686                 break;
2687         }
2688
2689 clear_counts:
2690         /* write back value */
2691         ring_container->itr = itr;
2692
2693         /* next update should occur within next jiffy */
2694         ring_container->next_update = next_update + 1;
2695
2696         ring_container->total_bytes = 0;
2697         ring_container->total_packets = 0;
2698 }
2699
2700 /**
2701  * ixgbe_write_eitr - write EITR register in hardware specific way
2702  * @q_vector: structure containing interrupt and ring information
2703  *
2704  * This function is made to be called by ethtool and by the driver
2705  * when it needs to update EITR registers at runtime.  Hardware
2706  * specific quirks/differences are taken care of here.
2707  */
2708 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2709 {
2710         struct ixgbe_adapter *adapter = q_vector->adapter;
2711         struct ixgbe_hw *hw = &adapter->hw;
2712         int v_idx = q_vector->v_idx;
2713         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2714
2715         switch (adapter->hw.mac.type) {
2716         case ixgbe_mac_82598EB:
2717                 /* must write high and low 16 bits to reset counter */
2718                 itr_reg |= (itr_reg << 16);
2719                 break;
2720         case ixgbe_mac_82599EB:
2721         case ixgbe_mac_X540:
2722         case ixgbe_mac_X550:
2723         case ixgbe_mac_X550EM_x:
2724         case ixgbe_mac_x550em_a:
2725                 /*
2726                  * set the WDIS bit to not clear the timer bits and cause an
2727                  * immediate assertion of the interrupt
2728                  */
2729                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2730                 break;
2731         default:
2732                 break;
2733         }
2734         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2735 }
2736
2737 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2738 {
2739         u32 new_itr;
2740
2741         ixgbe_update_itr(q_vector, &q_vector->tx);
2742         ixgbe_update_itr(q_vector, &q_vector->rx);
2743
2744         /* use the smallest value of new ITR delay calculations */
2745         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2746
2747         /* Clear latency flag if set, shift into correct position */
2748         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2749         new_itr <<= 2;
2750
2751         if (new_itr != q_vector->itr) {
2752                 /* save the algorithm value here */
2753                 q_vector->itr = new_itr;
2754
2755                 ixgbe_write_eitr(q_vector);
2756         }
2757 }
2758
2759 /**
2760  * ixgbe_check_overtemp_subtask - check for over temperature
2761  * @adapter: pointer to adapter
2762  **/
2763 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2764 {
2765         struct ixgbe_hw *hw = &adapter->hw;
2766         u32 eicr = adapter->interrupt_event;
2767         s32 rc;
2768
2769         if (test_bit(__IXGBE_DOWN, &adapter->state))
2770                 return;
2771
2772         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2773                 return;
2774
2775         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2776
2777         switch (hw->device_id) {
2778         case IXGBE_DEV_ID_82599_T3_LOM:
2779                 /*
2780                  * Since the warning interrupt is for both ports
2781                  * we don't have to check if:
2782                  *  - This interrupt wasn't for our port.
2783                  *  - We may have missed the interrupt so always have to
2784                  *    check if we  got a LSC
2785                  */
2786                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2787                     !(eicr & IXGBE_EICR_LSC))
2788                         return;
2789
2790                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2791                         u32 speed;
2792                         bool link_up = false;
2793
2794                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2795
2796                         if (link_up)
2797                                 return;
2798                 }
2799
2800                 /* Check if this is not due to overtemp */
2801                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2802                         return;
2803
2804                 break;
2805         case IXGBE_DEV_ID_X550EM_A_1G_T:
2806         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2807                 rc = hw->phy.ops.check_overtemp(hw);
2808                 if (rc != IXGBE_ERR_OVERTEMP)
2809                         return;
2810                 break;
2811         default:
2812                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2813                         return;
2814                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2815                         return;
2816                 break;
2817         }
2818         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2819
2820         adapter->interrupt_event = 0;
2821 }
2822
2823 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2824 {
2825         struct ixgbe_hw *hw = &adapter->hw;
2826
2827         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2828             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2829                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2830                 /* write to clear the interrupt */
2831                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2832         }
2833 }
2834
2835 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2836 {
2837         struct ixgbe_hw *hw = &adapter->hw;
2838
2839         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2840                 return;
2841
2842         switch (adapter->hw.mac.type) {
2843         case ixgbe_mac_82599EB:
2844                 /*
2845                  * Need to check link state so complete overtemp check
2846                  * on service task
2847                  */
2848                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2849                      (eicr & IXGBE_EICR_LSC)) &&
2850                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2851                         adapter->interrupt_event = eicr;
2852                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2853                         ixgbe_service_event_schedule(adapter);
2854                         return;
2855                 }
2856                 return;
2857         case ixgbe_mac_x550em_a:
2858                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2859                         adapter->interrupt_event = eicr;
2860                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2861                         ixgbe_service_event_schedule(adapter);
2862                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2863                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2864                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2865                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2866                 }
2867                 return;
2868         case ixgbe_mac_X550:
2869         case ixgbe_mac_X540:
2870                 if (!(eicr & IXGBE_EICR_TS))
2871                         return;
2872                 break;
2873         default:
2874                 return;
2875         }
2876
2877         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2878 }
2879
2880 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2881 {
2882         switch (hw->mac.type) {
2883         case ixgbe_mac_82598EB:
2884                 if (hw->phy.type == ixgbe_phy_nl)
2885                         return true;
2886                 return false;
2887         case ixgbe_mac_82599EB:
2888         case ixgbe_mac_X550EM_x:
2889         case ixgbe_mac_x550em_a:
2890                 switch (hw->mac.ops.get_media_type(hw)) {
2891                 case ixgbe_media_type_fiber:
2892                 case ixgbe_media_type_fiber_qsfp:
2893                         return true;
2894                 default:
2895                         return false;
2896                 }
2897         default:
2898                 return false;
2899         }
2900 }
2901
2902 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2903 {
2904         struct ixgbe_hw *hw = &adapter->hw;
2905         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2906
2907         if (!ixgbe_is_sfp(hw))
2908                 return;
2909
2910         /* Later MAC's use different SDP */
2911         if (hw->mac.type >= ixgbe_mac_X540)
2912                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2913
2914         if (eicr & eicr_mask) {
2915                 /* Clear the interrupt */
2916                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2917                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2918                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2919                         adapter->sfp_poll_time = 0;
2920                         ixgbe_service_event_schedule(adapter);
2921                 }
2922         }
2923
2924         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2925             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2926                 /* Clear the interrupt */
2927                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2928                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2929                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2930                         ixgbe_service_event_schedule(adapter);
2931                 }
2932         }
2933 }
2934
2935 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2936 {
2937         struct ixgbe_hw *hw = &adapter->hw;
2938
2939         adapter->lsc_int++;
2940         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2941         adapter->link_check_timeout = jiffies;
2942         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2943                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2944                 IXGBE_WRITE_FLUSH(hw);
2945                 ixgbe_service_event_schedule(adapter);
2946         }
2947 }
2948
2949 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2950                                            u64 qmask)
2951 {
2952         u32 mask;
2953         struct ixgbe_hw *hw = &adapter->hw;
2954
2955         switch (hw->mac.type) {
2956         case ixgbe_mac_82598EB:
2957                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2958                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2959                 break;
2960         case ixgbe_mac_82599EB:
2961         case ixgbe_mac_X540:
2962         case ixgbe_mac_X550:
2963         case ixgbe_mac_X550EM_x:
2964         case ixgbe_mac_x550em_a:
2965                 mask = (qmask & 0xFFFFFFFF);
2966                 if (mask)
2967                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2968                 mask = (qmask >> 32);
2969                 if (mask)
2970                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2971                 break;
2972         default:
2973                 break;
2974         }
2975         /* skip the flush */
2976 }
2977
2978 /**
2979  * ixgbe_irq_enable - Enable default interrupt generation settings
2980  * @adapter: board private structure
2981  * @queues: enable irqs for queues
2982  * @flush: flush register write
2983  **/
2984 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2985                                     bool flush)
2986 {
2987         struct ixgbe_hw *hw = &adapter->hw;
2988         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2989
2990         /* don't reenable LSC while waiting for link */
2991         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2992                 mask &= ~IXGBE_EIMS_LSC;
2993
2994         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2995                 switch (adapter->hw.mac.type) {
2996                 case ixgbe_mac_82599EB:
2997                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2998                         break;
2999                 case ixgbe_mac_X540:
3000                 case ixgbe_mac_X550:
3001                 case ixgbe_mac_X550EM_x:
3002                 case ixgbe_mac_x550em_a:
3003                         mask |= IXGBE_EIMS_TS;
3004                         break;
3005                 default:
3006                         break;
3007                 }
3008         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3009                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3010         switch (adapter->hw.mac.type) {
3011         case ixgbe_mac_82599EB:
3012                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3013                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3014                 fallthrough;
3015         case ixgbe_mac_X540:
3016         case ixgbe_mac_X550:
3017         case ixgbe_mac_X550EM_x:
3018         case ixgbe_mac_x550em_a:
3019                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3020                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3021                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3022                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3023                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3024                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3025                 mask |= IXGBE_EIMS_ECC;
3026                 mask |= IXGBE_EIMS_MAILBOX;
3027                 break;
3028         default:
3029                 break;
3030         }
3031
3032         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3033             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3034                 mask |= IXGBE_EIMS_FLOW_DIR;
3035
3036         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3037         if (queues)
3038                 ixgbe_irq_enable_queues(adapter, ~0);
3039         if (flush)
3040                 IXGBE_WRITE_FLUSH(&adapter->hw);
3041 }
3042
3043 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3044 {
3045         struct ixgbe_adapter *adapter = data;
3046         struct ixgbe_hw *hw = &adapter->hw;
3047         u32 eicr;
3048
3049         /*
3050          * Workaround for Silicon errata.  Use clear-by-write instead
3051          * of clear-by-read.  Reading with EICS will return the
3052          * interrupt causes without clearing, which later be done
3053          * with the write to EICR.
3054          */
3055         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3056
3057         /* The lower 16bits of the EICR register are for the queue interrupts
3058          * which should be masked here in order to not accidentally clear them if
3059          * the bits are high when ixgbe_msix_other is called. There is a race
3060          * condition otherwise which results in possible performance loss
3061          * especially if the ixgbe_msix_other interrupt is triggering
3062          * consistently (as it would when PPS is turned on for the X540 device)
3063          */
3064         eicr &= 0xFFFF0000;
3065
3066         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3067
3068         if (eicr & IXGBE_EICR_LSC)
3069                 ixgbe_check_lsc(adapter);
3070
3071         if (eicr & IXGBE_EICR_MAILBOX)
3072                 ixgbe_msg_task(adapter);
3073
3074         switch (hw->mac.type) {
3075         case ixgbe_mac_82599EB:
3076         case ixgbe_mac_X540:
3077         case ixgbe_mac_X550:
3078         case ixgbe_mac_X550EM_x:
3079         case ixgbe_mac_x550em_a:
3080                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3081                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3082                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3083                         ixgbe_service_event_schedule(adapter);
3084                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3085                                         IXGBE_EICR_GPI_SDP0_X540);
3086                 }
3087                 if (eicr & IXGBE_EICR_ECC) {
3088                         e_info(link, "Received ECC Err, initiating reset\n");
3089                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3090                         ixgbe_service_event_schedule(adapter);
3091                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3092                 }
3093                 /* Handle Flow Director Full threshold interrupt */
3094                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3095                         int reinit_count = 0;
3096                         int i;
3097                         for (i = 0; i < adapter->num_tx_queues; i++) {
3098                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3099                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3100                                                        &ring->state))
3101                                         reinit_count++;
3102                         }
3103                         if (reinit_count) {
3104                                 /* no more flow director interrupts until after init */
3105                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3106                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3107                                 ixgbe_service_event_schedule(adapter);
3108                         }
3109                 }
3110                 ixgbe_check_sfp_event(adapter, eicr);
3111                 ixgbe_check_overtemp_event(adapter, eicr);
3112                 break;
3113         default:
3114                 break;
3115         }
3116
3117         ixgbe_check_fan_failure(adapter, eicr);
3118
3119         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3120                 ixgbe_ptp_check_pps_event(adapter);
3121
3122         /* re-enable the original interrupt state, no lsc, no queues */
3123         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3124                 ixgbe_irq_enable(adapter, false, false);
3125
3126         return IRQ_HANDLED;
3127 }
3128
3129 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3130 {
3131         struct ixgbe_q_vector *q_vector = data;
3132
3133         /* EIAM disabled interrupts (on this vector) for us */
3134
3135         if (q_vector->rx.ring || q_vector->tx.ring)
3136                 napi_schedule_irqoff(&q_vector->napi);
3137
3138         return IRQ_HANDLED;
3139 }
3140
3141 /**
3142  * ixgbe_poll - NAPI Rx polling callback
3143  * @napi: structure for representing this polling device
3144  * @budget: how many packets driver is allowed to clean
3145  *
3146  * This function is used for legacy and MSI, NAPI mode
3147  **/
3148 int ixgbe_poll(struct napi_struct *napi, int budget)
3149 {
3150         struct ixgbe_q_vector *q_vector =
3151                                 container_of(napi, struct ixgbe_q_vector, napi);
3152         struct ixgbe_adapter *adapter = q_vector->adapter;
3153         struct ixgbe_ring *ring;
3154         int per_ring_budget, work_done = 0;
3155         bool clean_complete = true;
3156
3157 #ifdef CONFIG_IXGBE_DCA
3158         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3159                 ixgbe_update_dca(q_vector);
3160 #endif
3161
3162         ixgbe_for_each_ring(ring, q_vector->tx) {
3163                 bool wd = ring->xsk_pool ?
3164                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3165                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3166
3167                 if (!wd)
3168                         clean_complete = false;
3169         }
3170
3171         /* Exit if we are called by netpoll */
3172         if (budget <= 0)
3173                 return budget;
3174
3175         /* attempt to distribute budget to each queue fairly, but don't allow
3176          * the budget to go below 1 because we'll exit polling */
3177         if (q_vector->rx.count > 1)
3178                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3179         else
3180                 per_ring_budget = budget;
3181
3182         ixgbe_for_each_ring(ring, q_vector->rx) {
3183                 int cleaned = ring->xsk_pool ?
3184                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3185                                                     per_ring_budget) :
3186                               ixgbe_clean_rx_irq(q_vector, ring,
3187                                                  per_ring_budget);
3188
3189                 work_done += cleaned;
3190                 if (cleaned >= per_ring_budget)
3191                         clean_complete = false;
3192         }
3193
3194         /* If all work not completed, return budget and keep polling */
3195         if (!clean_complete)
3196                 return budget;
3197
3198         /* all work done, exit the polling mode */
3199         if (likely(napi_complete_done(napi, work_done))) {
3200                 if (adapter->rx_itr_setting & 1)
3201                         ixgbe_set_itr(q_vector);
3202                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3203                         ixgbe_irq_enable_queues(adapter,
3204                                                 BIT_ULL(q_vector->v_idx));
3205         }
3206
3207         return min(work_done, budget - 1);
3208 }
3209
3210 /**
3211  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3212  * @adapter: board private structure
3213  *
3214  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3215  * interrupts from the kernel.
3216  **/
3217 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3218 {
3219         struct net_device *netdev = adapter->netdev;
3220         unsigned int ri = 0, ti = 0;
3221         int vector, err;
3222
3223         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3224                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3225                 struct msix_entry *entry = &adapter->msix_entries[vector];
3226
3227                 if (q_vector->tx.ring && q_vector->rx.ring) {
3228                         snprintf(q_vector->name, sizeof(q_vector->name),
3229                                  "%s-TxRx-%u", netdev->name, ri++);
3230                         ti++;
3231                 } else if (q_vector->rx.ring) {
3232                         snprintf(q_vector->name, sizeof(q_vector->name),
3233                                  "%s-rx-%u", netdev->name, ri++);
3234                 } else if (q_vector->tx.ring) {
3235                         snprintf(q_vector->name, sizeof(q_vector->name),
3236                                  "%s-tx-%u", netdev->name, ti++);
3237                 } else {
3238                         /* skip this unused q_vector */
3239                         continue;
3240                 }
3241                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3242                                   q_vector->name, q_vector);
3243                 if (err) {
3244                         e_err(probe, "request_irq failed for MSIX interrupt "
3245                               "Error: %d\n", err);
3246                         goto free_queue_irqs;
3247                 }
3248                 /* If Flow Director is enabled, set interrupt affinity */
3249                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3250                         /* assign the mask for this irq */
3251                         irq_set_affinity_hint(entry->vector,
3252                                               &q_vector->affinity_mask);
3253                 }
3254         }
3255
3256         err = request_irq(adapter->msix_entries[vector].vector,
3257                           ixgbe_msix_other, 0, netdev->name, adapter);
3258         if (err) {
3259                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3260                 goto free_queue_irqs;
3261         }
3262
3263         return 0;
3264
3265 free_queue_irqs:
3266         while (vector) {
3267                 vector--;
3268                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3269                                       NULL);
3270                 free_irq(adapter->msix_entries[vector].vector,
3271                          adapter->q_vector[vector]);
3272         }
3273         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3274         pci_disable_msix(adapter->pdev);
3275         kfree(adapter->msix_entries);
3276         adapter->msix_entries = NULL;
3277         return err;
3278 }
3279
3280 /**
3281  * ixgbe_intr - legacy mode Interrupt Handler
3282  * @irq: interrupt number
3283  * @data: pointer to a network interface device structure
3284  **/
3285 static irqreturn_t ixgbe_intr(int irq, void *data)
3286 {
3287         struct ixgbe_adapter *adapter = data;
3288         struct ixgbe_hw *hw = &adapter->hw;
3289         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3290         u32 eicr;
3291
3292         /*
3293          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3294          * before the read of EICR.
3295          */
3296         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3297
3298         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3299          * therefore no explicit interrupt disable is necessary */
3300         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3301         if (!eicr) {
3302                 /*
3303                  * shared interrupt alert!
3304                  * make sure interrupts are enabled because the read will
3305                  * have disabled interrupts due to EIAM
3306                  * finish the workaround of silicon errata on 82598.  Unmask
3307                  * the interrupt that we masked before the EICR read.
3308                  */
3309                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3310                         ixgbe_irq_enable(adapter, true, true);
3311                 return IRQ_NONE;        /* Not our interrupt */
3312         }
3313
3314         if (eicr & IXGBE_EICR_LSC)
3315                 ixgbe_check_lsc(adapter);
3316
3317         switch (hw->mac.type) {
3318         case ixgbe_mac_82599EB:
3319                 ixgbe_check_sfp_event(adapter, eicr);
3320                 fallthrough;
3321         case ixgbe_mac_X540:
3322         case ixgbe_mac_X550:
3323         case ixgbe_mac_X550EM_x:
3324         case ixgbe_mac_x550em_a:
3325                 if (eicr & IXGBE_EICR_ECC) {
3326                         e_info(link, "Received ECC Err, initiating reset\n");
3327                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3328                         ixgbe_service_event_schedule(adapter);
3329                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3330                 }
3331                 ixgbe_check_overtemp_event(adapter, eicr);
3332                 break;
3333         default:
3334                 break;
3335         }
3336
3337         ixgbe_check_fan_failure(adapter, eicr);
3338         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3339                 ixgbe_ptp_check_pps_event(adapter);
3340
3341         /* would disable interrupts here but EIAM disabled it */
3342         napi_schedule_irqoff(&q_vector->napi);
3343
3344         /*
3345          * re-enable link(maybe) and non-queue interrupts, no flush.
3346          * ixgbe_poll will re-enable the queue interrupts
3347          */
3348         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3349                 ixgbe_irq_enable(adapter, false, false);
3350
3351         return IRQ_HANDLED;
3352 }
3353
3354 /**
3355  * ixgbe_request_irq - initialize interrupts
3356  * @adapter: board private structure
3357  *
3358  * Attempts to configure interrupts using the best available
3359  * capabilities of the hardware and kernel.
3360  **/
3361 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3362 {
3363         struct net_device *netdev = adapter->netdev;
3364         int err;
3365
3366         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3367                 err = ixgbe_request_msix_irqs(adapter);
3368         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3369                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3370                                   netdev->name, adapter);
3371         else
3372                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3373                                   netdev->name, adapter);
3374
3375         if (err)
3376                 e_err(probe, "request_irq failed, Error %d\n", err);
3377
3378         return err;
3379 }
3380
3381 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3382 {
3383         int vector;
3384
3385         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3386                 free_irq(adapter->pdev->irq, adapter);
3387                 return;
3388         }
3389
3390         if (!adapter->msix_entries)
3391                 return;
3392
3393         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3394                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3395                 struct msix_entry *entry = &adapter->msix_entries[vector];
3396
3397                 /* free only the irqs that were actually requested */
3398                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3399                         continue;
3400
3401                 /* clear the affinity_mask in the IRQ descriptor */
3402                 irq_set_affinity_hint(entry->vector, NULL);
3403
3404                 free_irq(entry->vector, q_vector);
3405         }
3406
3407         free_irq(adapter->msix_entries[vector].vector, adapter);
3408 }
3409
3410 /**
3411  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3412  * @adapter: board private structure
3413  **/
3414 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3415 {
3416         switch (adapter->hw.mac.type) {
3417         case ixgbe_mac_82598EB:
3418                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3419                 break;
3420         case ixgbe_mac_82599EB:
3421         case ixgbe_mac_X540:
3422         case ixgbe_mac_X550:
3423         case ixgbe_mac_X550EM_x:
3424         case ixgbe_mac_x550em_a:
3425                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3426                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3428                 break;
3429         default:
3430                 break;
3431         }
3432         IXGBE_WRITE_FLUSH(&adapter->hw);
3433         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3434                 int vector;
3435
3436                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3437                         synchronize_irq(adapter->msix_entries[vector].vector);
3438
3439                 synchronize_irq(adapter->msix_entries[vector++].vector);
3440         } else {
3441                 synchronize_irq(adapter->pdev->irq);
3442         }
3443 }
3444
3445 /**
3446  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3447  * @adapter: board private structure
3448  *
3449  **/
3450 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3451 {
3452         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3453
3454         ixgbe_write_eitr(q_vector);
3455
3456         ixgbe_set_ivar(adapter, 0, 0, 0);
3457         ixgbe_set_ivar(adapter, 1, 0, 0);
3458
3459         e_info(hw, "Legacy interrupt IVAR setup done\n");
3460 }
3461
3462 /**
3463  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3464  * @adapter: board private structure
3465  * @ring: structure containing ring specific data
3466  *
3467  * Configure the Tx descriptor ring after a reset.
3468  **/
3469 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3470                              struct ixgbe_ring *ring)
3471 {
3472         struct ixgbe_hw *hw = &adapter->hw;
3473         u64 tdba = ring->dma;
3474         int wait_loop = 10;
3475         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3476         u8 reg_idx = ring->reg_idx;
3477
3478         ring->xsk_pool = NULL;
3479         if (ring_is_xdp(ring))
3480                 ring->xsk_pool = ixgbe_xsk_pool(adapter, ring);
3481
3482         /* disable queue to avoid issues while updating state */
3483         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3484         IXGBE_WRITE_FLUSH(hw);
3485
3486         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3487                         (tdba & DMA_BIT_MASK(32)));
3488         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3489         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3490                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3491         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3492         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3493         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3494
3495         /*
3496          * set WTHRESH to encourage burst writeback, it should not be set
3497          * higher than 1 when:
3498          * - ITR is 0 as it could cause false TX hangs
3499          * - ITR is set to > 100k int/sec and BQL is enabled
3500          *
3501          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3502          * to or less than the number of on chip descriptors, which is
3503          * currently 40.
3504          */
3505         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3506                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3507         else
3508                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3509
3510         /*
3511          * Setting PTHRESH to 32 both improves performance
3512          * and avoids a TX hang with DFP enabled
3513          */
3514         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3515                    32;          /* PTHRESH = 32 */
3516
3517         /* reinitialize flowdirector state */
3518         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3519                 ring->atr_sample_rate = adapter->atr_sample_rate;
3520                 ring->atr_count = 0;
3521                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3522         } else {
3523                 ring->atr_sample_rate = 0;
3524         }
3525
3526         /* initialize XPS */
3527         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3528                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3529
3530                 if (q_vector)
3531                         netif_set_xps_queue(ring->netdev,
3532                                             &q_vector->affinity_mask,
3533                                             ring->queue_index);
3534         }
3535
3536         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3537
3538         /* reinitialize tx_buffer_info */
3539         memset(ring->tx_buffer_info, 0,
3540                sizeof(struct ixgbe_tx_buffer) * ring->count);
3541
3542         /* enable queue */
3543         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3544
3545         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3546         if (hw->mac.type == ixgbe_mac_82598EB &&
3547             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3548                 return;
3549
3550         /* poll to verify queue is enabled */
3551         do {
3552                 usleep_range(1000, 2000);
3553                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3554         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3555         if (!wait_loop)
3556                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3557 }
3558
3559 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3560 {
3561         struct ixgbe_hw *hw = &adapter->hw;
3562         u32 rttdcs, mtqc;
3563         u8 tcs = adapter->hw_tcs;
3564
3565         if (hw->mac.type == ixgbe_mac_82598EB)
3566                 return;
3567
3568         /* disable the arbiter while setting MTQC */
3569         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3570         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3571         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3572
3573         /* set transmit pool layout */
3574         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3575                 mtqc = IXGBE_MTQC_VT_ENA;
3576                 if (tcs > 4)
3577                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3578                 else if (tcs > 1)
3579                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3580                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3581                          IXGBE_82599_VMDQ_4Q_MASK)
3582                         mtqc |= IXGBE_MTQC_32VF;
3583                 else
3584                         mtqc |= IXGBE_MTQC_64VF;
3585         } else {
3586                 if (tcs > 4) {
3587                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3588                 } else if (tcs > 1) {
3589                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3590                 } else {
3591                         u8 max_txq = adapter->num_tx_queues +
3592                                 adapter->num_xdp_queues;
3593                         if (max_txq > 63)
3594                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3595                         else
3596                                 mtqc = IXGBE_MTQC_64Q_1PB;
3597                 }
3598         }
3599
3600         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3601
3602         /* Enable Security TX Buffer IFG for multiple pb */
3603         if (tcs) {
3604                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3605                 sectx |= IXGBE_SECTX_DCB;
3606                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3607         }
3608
3609         /* re-enable the arbiter */
3610         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3611         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3612 }
3613
3614 /**
3615  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3616  * @adapter: board private structure
3617  *
3618  * Configure the Tx unit of the MAC after a reset.
3619  **/
3620 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3621 {
3622         struct ixgbe_hw *hw = &adapter->hw;
3623         u32 dmatxctl;
3624         u32 i;
3625
3626         ixgbe_setup_mtqc(adapter);
3627
3628         if (hw->mac.type != ixgbe_mac_82598EB) {
3629                 /* DMATXCTL.EN must be before Tx queues are enabled */
3630                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3631                 dmatxctl |= IXGBE_DMATXCTL_TE;
3632                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3633         }
3634
3635         /* Setup the HW Tx Head and Tail descriptor pointers */
3636         for (i = 0; i < adapter->num_tx_queues; i++)
3637                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3638         for (i = 0; i < adapter->num_xdp_queues; i++)
3639                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3640 }
3641
3642 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3643                                  struct ixgbe_ring *ring)
3644 {
3645         struct ixgbe_hw *hw = &adapter->hw;
3646         u8 reg_idx = ring->reg_idx;
3647         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3648
3649         srrctl |= IXGBE_SRRCTL_DROP_EN;
3650
3651         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3652 }
3653
3654 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3655                                   struct ixgbe_ring *ring)
3656 {
3657         struct ixgbe_hw *hw = &adapter->hw;
3658         u8 reg_idx = ring->reg_idx;
3659         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3660
3661         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3662
3663         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3664 }
3665
3666 #ifdef CONFIG_IXGBE_DCB
3667 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3668 #else
3669 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3670 #endif
3671 {
3672         int i;
3673         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3674
3675         if (adapter->ixgbe_ieee_pfc)
3676                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3677
3678         /*
3679          * We should set the drop enable bit if:
3680          *  SR-IOV is enabled
3681          *   or
3682          *  Number of Rx queues > 1 and flow control is disabled
3683          *
3684          *  This allows us to avoid head of line blocking for security
3685          *  and performance reasons.
3686          */
3687         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3688             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3689                 for (i = 0; i < adapter->num_rx_queues; i++)
3690                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3691         } else {
3692                 for (i = 0; i < adapter->num_rx_queues; i++)
3693                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3694         }
3695 }
3696
3697 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3698
3699 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3700                                    struct ixgbe_ring *rx_ring)
3701 {
3702         struct ixgbe_hw *hw = &adapter->hw;
3703         u32 srrctl;
3704         u8 reg_idx = rx_ring->reg_idx;
3705
3706         if (hw->mac.type == ixgbe_mac_82598EB) {
3707                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3708
3709                 /*
3710                  * if VMDq is not active we must program one srrctl register
3711                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3712                  */
3713                 reg_idx &= mask;
3714         }
3715
3716         /* configure header buffer length, needed for RSC */
3717         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3718
3719         /* configure the packet buffer length */
3720         if (rx_ring->xsk_pool) {
3721                 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(rx_ring->xsk_pool);
3722
3723                 /* If the MAC support setting RXDCTL.RLPML, the
3724                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3725                  * RXDCTL.RLPML is set to the actual UMEM buffer
3726                  * size. If not, then we are stuck with a 1k buffer
3727                  * size resolution. In this case frames larger than
3728                  * the UMEM buffer size viewed in a 1k resolution will
3729                  * be dropped.
3730                  */
3731                 if (hw->mac.type != ixgbe_mac_82599EB)
3732                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3733                 else
3734                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3735         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3736                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3737         } else {
3738                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3739         }
3740
3741         /* configure descriptor type */
3742         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3743
3744         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3745 }
3746
3747 /**
3748  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3749  * @adapter: device handle
3750  *
3751  *  - 82598/82599/X540:     128
3752  *  - X550(non-SRIOV mode): 512
3753  *  - X550(SRIOV mode):     64
3754  */
3755 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3756 {
3757         if (adapter->hw.mac.type < ixgbe_mac_X550)
3758                 return 128;
3759         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3760                 return 64;
3761         else
3762                 return 512;
3763 }
3764
3765 /**
3766  * ixgbe_store_key - Write the RSS key to HW
3767  * @adapter: device handle
3768  *
3769  * Write the RSS key stored in adapter.rss_key to HW.
3770  */
3771 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3772 {
3773         struct ixgbe_hw *hw = &adapter->hw;
3774         int i;
3775
3776         for (i = 0; i < 10; i++)
3777                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3778 }
3779
3780 /**
3781  * ixgbe_init_rss_key - Initialize adapter RSS key
3782  * @adapter: device handle
3783  *
3784  * Allocates and initializes the RSS key if it is not allocated.
3785  **/
3786 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3787 {
3788         u32 *rss_key;
3789
3790         if (!adapter->rss_key) {
3791                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3792                 if (unlikely(!rss_key))
3793                         return -ENOMEM;
3794
3795                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3796                 adapter->rss_key = rss_key;
3797         }
3798
3799         return 0;
3800 }
3801
3802 /**
3803  * ixgbe_store_reta - Write the RETA table to HW
3804  * @adapter: device handle
3805  *
3806  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3807  */
3808 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3809 {
3810         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3811         struct ixgbe_hw *hw = &adapter->hw;
3812         u32 reta = 0;
3813         u32 indices_multi;
3814         u8 *indir_tbl = adapter->rss_indir_tbl;
3815
3816         /* Fill out the redirection table as follows:
3817          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3818          *    indices.
3819          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3820          *  - X550:       8 bit wide entries containing 6 bit RSS index
3821          */
3822         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3823                 indices_multi = 0x11;
3824         else
3825                 indices_multi = 0x1;
3826
3827         /* Write redirection table to HW */
3828         for (i = 0; i < reta_entries; i++) {
3829                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3830                 if ((i & 3) == 3) {
3831                         if (i < 128)
3832                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3833                         else
3834                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3835                                                 reta);
3836                         reta = 0;
3837                 }
3838         }
3839 }
3840
3841 /**
3842  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3843  * @adapter: device handle
3844  *
3845  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3846  */
3847 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3848 {
3849         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3850         struct ixgbe_hw *hw = &adapter->hw;
3851         u32 vfreta = 0;
3852
3853         /* Write redirection table to HW */
3854         for (i = 0; i < reta_entries; i++) {
3855                 u16 pool = adapter->num_rx_pools;
3856
3857                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3858                 if ((i & 3) != 3)
3859                         continue;
3860
3861                 while (pool--)
3862                         IXGBE_WRITE_REG(hw,
3863                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3864                                         vfreta);
3865                 vfreta = 0;
3866         }
3867 }
3868
3869 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3870 {
3871         u32 i, j;
3872         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3873         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3874
3875         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3876          * make full use of any rings they may have.  We will use the
3877          * PSRTYPE register to control how many rings we use within the PF.
3878          */
3879         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3880                 rss_i = 4;
3881
3882         /* Fill out hash function seeds */
3883         ixgbe_store_key(adapter);
3884
3885         /* Fill out redirection table */
3886         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3887
3888         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3889                 if (j == rss_i)
3890                         j = 0;
3891
3892                 adapter->rss_indir_tbl[i] = j;
3893         }
3894
3895         ixgbe_store_reta(adapter);
3896 }
3897
3898 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3899 {
3900         struct ixgbe_hw *hw = &adapter->hw;
3901         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3902         int i, j;
3903
3904         /* Fill out hash function seeds */
3905         for (i = 0; i < 10; i++) {
3906                 u16 pool = adapter->num_rx_pools;
3907
3908                 while (pool--)
3909                         IXGBE_WRITE_REG(hw,
3910                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3911                                         *(adapter->rss_key + i));
3912         }
3913
3914         /* Fill out the redirection table */
3915         for (i = 0, j = 0; i < 64; i++, j++) {
3916                 if (j == rss_i)
3917                         j = 0;
3918
3919                 adapter->rss_indir_tbl[i] = j;
3920         }
3921
3922         ixgbe_store_vfreta(adapter);
3923 }
3924
3925 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3926 {
3927         struct ixgbe_hw *hw = &adapter->hw;
3928         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3929         u32 rxcsum;
3930
3931         /* Disable indicating checksum in descriptor, enables RSS hash */
3932         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3933         rxcsum |= IXGBE_RXCSUM_PCSD;
3934         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3935
3936         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3937                 if (adapter->ring_feature[RING_F_RSS].mask)
3938                         mrqc = IXGBE_MRQC_RSSEN;
3939         } else {
3940                 u8 tcs = adapter->hw_tcs;
3941
3942                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3943                         if (tcs > 4)
3944                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3945                         else if (tcs > 1)
3946                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3947                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3948                                  IXGBE_82599_VMDQ_4Q_MASK)
3949                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3950                         else
3951                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3952
3953                         /* Enable L3/L4 for Tx Switched packets only for X550,
3954                          * older devices do not support this feature
3955                          */
3956                         if (hw->mac.type >= ixgbe_mac_X550)
3957                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3958                 } else {
3959                         if (tcs > 4)
3960                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3961                         else if (tcs > 1)
3962                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3963                         else
3964                                 mrqc = IXGBE_MRQC_RSSEN;
3965                 }
3966         }
3967
3968         /* Perform hash on these packet types */
3969         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3970                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3971                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3972                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3973
3974         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3975                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3976         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3977                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3978
3979         if ((hw->mac.type >= ixgbe_mac_X550) &&
3980             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3981                 u16 pool = adapter->num_rx_pools;
3982
3983                 /* Enable VF RSS mode */
3984                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3985                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3986
3987                 /* Setup RSS through the VF registers */
3988                 ixgbe_setup_vfreta(adapter);
3989                 vfmrqc = IXGBE_MRQC_RSSEN;
3990                 vfmrqc |= rss_field;
3991
3992                 while (pool--)
3993                         IXGBE_WRITE_REG(hw,
3994                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3995                                         vfmrqc);
3996         } else {
3997                 ixgbe_setup_reta(adapter);
3998                 mrqc |= rss_field;
3999                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4000         }
4001 }
4002
4003 /**
4004  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4005  * @adapter: address of board private structure
4006  * @ring: structure containing ring specific data
4007  **/
4008 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4009                                    struct ixgbe_ring *ring)
4010 {
4011         struct ixgbe_hw *hw = &adapter->hw;
4012         u32 rscctrl;
4013         u8 reg_idx = ring->reg_idx;
4014
4015         if (!ring_is_rsc_enabled(ring))
4016                 return;
4017
4018         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4019         rscctrl |= IXGBE_RSCCTL_RSCEN;
4020         /*
4021          * we must limit the number of descriptors so that the
4022          * total size of max desc * buf_len is not greater
4023          * than 65536
4024          */
4025         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4026         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4027 }
4028
4029 #define IXGBE_MAX_RX_DESC_POLL 10
4030 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4031                                        struct ixgbe_ring *ring)
4032 {
4033         struct ixgbe_hw *hw = &adapter->hw;
4034         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4035         u32 rxdctl;
4036         u8 reg_idx = ring->reg_idx;
4037
4038         if (ixgbe_removed(hw->hw_addr))
4039                 return;
4040         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4041         if (hw->mac.type == ixgbe_mac_82598EB &&
4042             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4043                 return;
4044
4045         do {
4046                 usleep_range(1000, 2000);
4047                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4048         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4049
4050         if (!wait_loop) {
4051                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4052                       "the polling period\n", reg_idx);
4053         }
4054 }
4055
4056 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4057                              struct ixgbe_ring *ring)
4058 {
4059         struct ixgbe_hw *hw = &adapter->hw;
4060         union ixgbe_adv_rx_desc *rx_desc;
4061         u64 rdba = ring->dma;
4062         u32 rxdctl;
4063         u8 reg_idx = ring->reg_idx;
4064
4065         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4066         ring->xsk_pool = ixgbe_xsk_pool(adapter, ring);
4067         if (ring->xsk_pool) {
4068                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4069                                                    MEM_TYPE_XSK_BUFF_POOL,
4070                                                    NULL));
4071                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
4072         } else {
4073                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4074                                                    MEM_TYPE_PAGE_SHARED, NULL));
4075         }
4076
4077         /* disable queue to avoid use of these values while updating state */
4078         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4079         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4080
4081         /* write value back with RXDCTL.ENABLE bit cleared */
4082         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4083         IXGBE_WRITE_FLUSH(hw);
4084
4085         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4086         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4087         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4088                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4089         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4090         IXGBE_WRITE_FLUSH(hw);
4091
4092         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4093         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4094         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4095
4096         ixgbe_configure_srrctl(adapter, ring);
4097         ixgbe_configure_rscctl(adapter, ring);
4098
4099         if (hw->mac.type == ixgbe_mac_82598EB) {
4100                 /*
4101                  * enable cache line friendly hardware writes:
4102                  * PTHRESH=32 descriptors (half the internal cache),
4103                  * this also removes ugly rx_no_buffer_count increment
4104                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4105                  * WTHRESH=8 burst writeback up to two cache lines
4106                  */
4107                 rxdctl &= ~0x3FFFFF;
4108                 rxdctl |=  0x080420;
4109 #if (PAGE_SIZE < 8192)
4110         /* RXDCTL.RLPML does not work on 82599 */
4111         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4112                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4113                             IXGBE_RXDCTL_RLPML_EN);
4114
4115                 /* Limit the maximum frame size so we don't overrun the skb.
4116                  * This can happen in SRIOV mode when the MTU of the VF is
4117                  * higher than the MTU of the PF.
4118                  */
4119                 if (ring_uses_build_skb(ring) &&
4120                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4121                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4122                                   IXGBE_RXDCTL_RLPML_EN;
4123 #endif
4124         }
4125
4126         if (ring->xsk_pool && hw->mac.type != ixgbe_mac_82599EB) {
4127                 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
4128
4129                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4130                             IXGBE_RXDCTL_RLPML_EN);
4131                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4132
4133                 ring->rx_buf_len = xsk_buf_len;
4134         }
4135
4136         /* initialize rx_buffer_info */
4137         memset(ring->rx_buffer_info, 0,
4138                sizeof(struct ixgbe_rx_buffer) * ring->count);
4139
4140         /* initialize Rx descriptor 0 */
4141         rx_desc = IXGBE_RX_DESC(ring, 0);
4142         rx_desc->wb.upper.length = 0;
4143
4144         /* enable receive descriptor ring */
4145         rxdctl |= IXGBE_RXDCTL_ENABLE;
4146         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4147
4148         ixgbe_rx_desc_queue_enable(adapter, ring);
4149         if (ring->xsk_pool)
4150                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4151         else
4152                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4153 }
4154
4155 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4156 {
4157         struct ixgbe_hw *hw = &adapter->hw;
4158         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4159         u16 pool = adapter->num_rx_pools;
4160
4161         /* PSRTYPE must be initialized in non 82598 adapters */
4162         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4163                       IXGBE_PSRTYPE_UDPHDR |
4164                       IXGBE_PSRTYPE_IPV4HDR |
4165                       IXGBE_PSRTYPE_L2HDR |
4166                       IXGBE_PSRTYPE_IPV6HDR;
4167
4168         if (hw->mac.type == ixgbe_mac_82598EB)
4169                 return;
4170
4171         if (rss_i > 3)
4172                 psrtype |= 2u << 29;
4173         else if (rss_i > 1)
4174                 psrtype |= 1u << 29;
4175
4176         while (pool--)
4177                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4178 }
4179
4180 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4181 {
4182         struct ixgbe_hw *hw = &adapter->hw;
4183         u16 pool = adapter->num_rx_pools;
4184         u32 reg_offset, vf_shift, vmolr;
4185         u32 gcr_ext, vmdctl;
4186         int i;
4187
4188         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4189                 return;
4190
4191         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4192         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4193         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4194         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4195         vmdctl |= IXGBE_VT_CTL_REPLEN;
4196         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4197
4198         /* accept untagged packets until a vlan tag is
4199          * specifically set for the VMDQ queue/pool
4200          */
4201         vmolr = IXGBE_VMOLR_AUPE;
4202         while (pool--)
4203                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4204
4205         vf_shift = VMDQ_P(0) % 32;
4206         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4207
4208         /* Enable only the PF's pool for Tx/Rx */
4209         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4210         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4211         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4212         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4213         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4214                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4215
4216         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4217         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4218
4219         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4220         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4221
4222         /*
4223          * Set up VF register offsets for selected VT Mode,
4224          * i.e. 32 or 64 VFs for SR-IOV
4225          */
4226         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4227         case IXGBE_82599_VMDQ_8Q_MASK:
4228                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4229                 break;
4230         case IXGBE_82599_VMDQ_4Q_MASK:
4231                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4232                 break;
4233         default:
4234                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4235                 break;
4236         }
4237
4238         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4239
4240         for (i = 0; i < adapter->num_vfs; i++) {
4241                 /* configure spoof checking */
4242                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4243                                           adapter->vfinfo[i].spoofchk_enabled);
4244
4245                 /* Enable/Disable RSS query feature  */
4246                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4247                                           adapter->vfinfo[i].rss_query_enabled);
4248         }
4249 }
4250
4251 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4252 {
4253         struct ixgbe_hw *hw = &adapter->hw;
4254         struct net_device *netdev = adapter->netdev;
4255         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4256         struct ixgbe_ring *rx_ring;
4257         int i;
4258         u32 mhadd, hlreg0;
4259
4260 #ifdef IXGBE_FCOE
4261         /* adjust max frame to be able to do baby jumbo for FCoE */
4262         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4263             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4264                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4265
4266 #endif /* IXGBE_FCOE */
4267
4268         /* adjust max frame to be at least the size of a standard frame */
4269         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4270                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4271
4272         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4273         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4274                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4275                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4276
4277                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4278         }
4279
4280         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4281         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4282         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4283         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4284
4285         /*
4286          * Setup the HW Rx Head and Tail Descriptor Pointers and
4287          * the Base and Length of the Rx Descriptor Ring
4288          */
4289         for (i = 0; i < adapter->num_rx_queues; i++) {
4290                 rx_ring = adapter->rx_ring[i];
4291
4292                 clear_ring_rsc_enabled(rx_ring);
4293                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4294                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4295
4296                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4297                         set_ring_rsc_enabled(rx_ring);
4298
4299                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4300                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4301
4302                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4303                         continue;
4304
4305                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4306
4307 #if (PAGE_SIZE < 8192)
4308                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4309                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4310
4311                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4312                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4313                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4314 #endif
4315         }
4316 }
4317
4318 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4319 {
4320         struct ixgbe_hw *hw = &adapter->hw;
4321         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4322
4323         switch (hw->mac.type) {
4324         case ixgbe_mac_82598EB:
4325                 /*
4326                  * For VMDq support of different descriptor types or
4327                  * buffer sizes through the use of multiple SRRCTL
4328                  * registers, RDRXCTL.MVMEN must be set to 1
4329                  *
4330                  * also, the manual doesn't mention it clearly but DCA hints
4331                  * will only use queue 0's tags unless this bit is set.  Side
4332                  * effects of setting this bit are only that SRRCTL must be
4333                  * fully programmed [0..15]
4334                  */
4335                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4336                 break;
4337         case ixgbe_mac_X550:
4338         case ixgbe_mac_X550EM_x:
4339         case ixgbe_mac_x550em_a:
4340                 if (adapter->num_vfs)
4341                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4342                 fallthrough;
4343         case ixgbe_mac_82599EB:
4344         case ixgbe_mac_X540:
4345                 /* Disable RSC for ACK packets */
4346                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4347                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4348                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4349                 /* hardware requires some bits to be set by default */
4350                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4351                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4352                 break;
4353         default:
4354                 /* We should do nothing since we don't know this hardware */
4355                 return;
4356         }
4357
4358         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4359 }
4360
4361 /**
4362  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4363  * @adapter: board private structure
4364  *
4365  * Configure the Rx unit of the MAC after a reset.
4366  **/
4367 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4368 {
4369         struct ixgbe_hw *hw = &adapter->hw;
4370         int i;
4371         u32 rxctrl, rfctl;
4372
4373         /* disable receives while setting up the descriptors */
4374         hw->mac.ops.disable_rx(hw);
4375
4376         ixgbe_setup_psrtype(adapter);
4377         ixgbe_setup_rdrxctl(adapter);
4378
4379         /* RSC Setup */
4380         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4381         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4382         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4383                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4384
4385         /* disable NFS filtering */
4386         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4387         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4388
4389         /* Program registers for the distribution of queues */
4390         ixgbe_setup_mrqc(adapter);
4391
4392         /* set_rx_buffer_len must be called before ring initialization */
4393         ixgbe_set_rx_buffer_len(adapter);
4394
4395         /*
4396          * Setup the HW Rx Head and Tail Descriptor Pointers and
4397          * the Base and Length of the Rx Descriptor Ring
4398          */
4399         for (i = 0; i < adapter->num_rx_queues; i++)
4400                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4401
4402         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4403         /* disable drop enable for 82598 parts */
4404         if (hw->mac.type == ixgbe_mac_82598EB)
4405                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4406
4407         /* enable all receives */
4408         rxctrl |= IXGBE_RXCTRL_RXEN;
4409         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4410 }
4411
4412 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4413                                  __be16 proto, u16 vid)
4414 {
4415         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4416         struct ixgbe_hw *hw = &adapter->hw;
4417
4418         /* add VID to filter table */
4419         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4420                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4421
4422         set_bit(vid, adapter->active_vlans);
4423
4424         return 0;
4425 }
4426
4427 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4428 {
4429         u32 vlvf;
4430         int idx;
4431
4432         /* short cut the special case */
4433         if (vlan == 0)
4434                 return 0;
4435
4436         /* Search for the vlan id in the VLVF entries */
4437         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4438                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4439                 if ((vlvf & VLAN_VID_MASK) == vlan)
4440                         break;
4441         }
4442
4443         return idx;
4444 }
4445
4446 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4447 {
4448         struct ixgbe_hw *hw = &adapter->hw;
4449         u32 bits, word;
4450         int idx;
4451
4452         idx = ixgbe_find_vlvf_entry(hw, vid);
4453         if (!idx)
4454                 return;
4455
4456         /* See if any other pools are set for this VLAN filter
4457          * entry other than the PF.
4458          */
4459         word = idx * 2 + (VMDQ_P(0) / 32);
4460         bits = ~BIT(VMDQ_P(0) % 32);
4461         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4462
4463         /* Disable the filter so this falls into the default pool. */
4464         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4465                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4466                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4467                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4468         }
4469 }
4470
4471 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4472                                   __be16 proto, u16 vid)
4473 {
4474         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4475         struct ixgbe_hw *hw = &adapter->hw;
4476
4477         /* remove VID from filter table */
4478         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4479                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4480
4481         clear_bit(vid, adapter->active_vlans);
4482
4483         return 0;
4484 }
4485
4486 /**
4487  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4488  * @adapter: driver data
4489  */
4490 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4491 {
4492         struct ixgbe_hw *hw = &adapter->hw;
4493         u32 vlnctrl;
4494         int i, j;
4495
4496         switch (hw->mac.type) {
4497         case ixgbe_mac_82598EB:
4498                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4499                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4500                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4501                 break;
4502         case ixgbe_mac_82599EB:
4503         case ixgbe_mac_X540:
4504         case ixgbe_mac_X550:
4505         case ixgbe_mac_X550EM_x:
4506         case ixgbe_mac_x550em_a:
4507                 for (i = 0; i < adapter->num_rx_queues; i++) {
4508                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4509
4510                         if (!netif_is_ixgbe(ring->netdev))
4511                                 continue;
4512
4513                         j = ring->reg_idx;
4514                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4515                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4516                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4517                 }
4518                 break;
4519         default:
4520                 break;
4521         }
4522 }
4523
4524 /**
4525  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4526  * @adapter: driver data
4527  */
4528 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4529 {
4530         struct ixgbe_hw *hw = &adapter->hw;
4531         u32 vlnctrl;
4532         int i, j;
4533
4534         switch (hw->mac.type) {
4535         case ixgbe_mac_82598EB:
4536                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4537                 vlnctrl |= IXGBE_VLNCTRL_VME;
4538                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4539                 break;
4540         case ixgbe_mac_82599EB:
4541         case ixgbe_mac_X540:
4542         case ixgbe_mac_X550:
4543         case ixgbe_mac_X550EM_x:
4544         case ixgbe_mac_x550em_a:
4545                 for (i = 0; i < adapter->num_rx_queues; i++) {
4546                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4547
4548                         if (!netif_is_ixgbe(ring->netdev))
4549                                 continue;
4550
4551                         j = ring->reg_idx;
4552                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4553                         vlnctrl |= IXGBE_RXDCTL_VME;
4554                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4555                 }
4556                 break;
4557         default:
4558                 break;
4559         }
4560 }
4561
4562 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4563 {
4564         struct ixgbe_hw *hw = &adapter->hw;
4565         u32 vlnctrl, i;
4566
4567         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4568
4569         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4570         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4571                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4572                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4573         } else {
4574                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4575                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4576                 return;
4577         }
4578
4579         /* Nothing to do for 82598 */
4580         if (hw->mac.type == ixgbe_mac_82598EB)
4581                 return;
4582
4583         /* We are already in VLAN promisc, nothing to do */
4584         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4585                 return;
4586
4587         /* Set flag so we don't redo unnecessary work */
4588         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4589
4590         /* Add PF to all active pools */
4591         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4592                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4593                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4594
4595                 vlvfb |= BIT(VMDQ_P(0) % 32);
4596                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4597         }
4598
4599         /* Set all bits in the VLAN filter table array */
4600         for (i = hw->mac.vft_size; i--;)
4601                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4602 }
4603
4604 #define VFTA_BLOCK_SIZE 8
4605 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4606 {
4607         struct ixgbe_hw *hw = &adapter->hw;
4608         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4609         u32 vid_start = vfta_offset * 32;
4610         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4611         u32 i, vid, word, bits;
4612
4613         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4614                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4615
4616                 /* pull VLAN ID from VLVF */
4617                 vid = vlvf & VLAN_VID_MASK;
4618
4619                 /* only concern outselves with a certain range */
4620                 if (vid < vid_start || vid >= vid_end)
4621                         continue;
4622
4623                 if (vlvf) {
4624                         /* record VLAN ID in VFTA */
4625                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4626
4627                         /* if PF is part of this then continue */
4628                         if (test_bit(vid, adapter->active_vlans))
4629                                 continue;
4630                 }
4631
4632                 /* remove PF from the pool */
4633                 word = i * 2 + VMDQ_P(0) / 32;
4634                 bits = ~BIT(VMDQ_P(0) % 32);
4635                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4636                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4637         }
4638
4639         /* extract values from active_vlans and write back to VFTA */
4640         for (i = VFTA_BLOCK_SIZE; i--;) {
4641                 vid = (vfta_offset + i) * 32;
4642                 word = vid / BITS_PER_LONG;
4643                 bits = vid % BITS_PER_LONG;
4644
4645                 vfta[i] |= adapter->active_vlans[word] >> bits;
4646
4647                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4648         }
4649 }
4650
4651 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4652 {
4653         struct ixgbe_hw *hw = &adapter->hw;
4654         u32 vlnctrl, i;
4655
4656         /* Set VLAN filtering to enabled */
4657         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4658         vlnctrl |= IXGBE_VLNCTRL_VFE;
4659         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4660
4661         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4662             hw->mac.type == ixgbe_mac_82598EB)
4663                 return;
4664
4665         /* We are not in VLAN promisc, nothing to do */
4666         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4667                 return;
4668
4669         /* Set flag so we don't redo unnecessary work */
4670         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4671
4672         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4673                 ixgbe_scrub_vfta(adapter, i);
4674 }
4675
4676 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4677 {
4678         u16 vid = 1;
4679
4680         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4681
4682         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4683                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4684 }
4685
4686 /**
4687  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4688  * @netdev: network interface device structure
4689  *
4690  * Writes multicast address list to the MTA hash table.
4691  * Returns: -ENOMEM on failure
4692  *                0 on no addresses written
4693  *                X on writing X addresses to MTA
4694  **/
4695 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4696 {
4697         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4698         struct ixgbe_hw *hw = &adapter->hw;
4699
4700         if (!netif_running(netdev))
4701                 return 0;
4702
4703         if (hw->mac.ops.update_mc_addr_list)
4704                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4705         else
4706                 return -ENOMEM;
4707
4708 #ifdef CONFIG_PCI_IOV
4709         ixgbe_restore_vf_multicasts(adapter);
4710 #endif
4711
4712         return netdev_mc_count(netdev);
4713 }
4714
4715 #ifdef CONFIG_PCI_IOV
4716 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4717 {
4718         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4719         struct ixgbe_hw *hw = &adapter->hw;
4720         int i;
4721
4722         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4723                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4724
4725                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4726                         hw->mac.ops.set_rar(hw, i,
4727                                             mac_table->addr,
4728                                             mac_table->pool,
4729                                             IXGBE_RAH_AV);
4730                 else
4731                         hw->mac.ops.clear_rar(hw, i);
4732         }
4733 }
4734
4735 #endif
4736 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4737 {
4738         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4739         struct ixgbe_hw *hw = &adapter->hw;
4740         int i;
4741
4742         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4743                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4744                         continue;
4745
4746                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4747
4748                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4749                         hw->mac.ops.set_rar(hw, i,
4750                                             mac_table->addr,
4751                                             mac_table->pool,
4752                                             IXGBE_RAH_AV);
4753                 else
4754                         hw->mac.ops.clear_rar(hw, i);
4755         }
4756 }
4757
4758 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4759 {
4760         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4761         struct ixgbe_hw *hw = &adapter->hw;
4762         int i;
4763
4764         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4765                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4766                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4767         }
4768
4769         ixgbe_sync_mac_table(adapter);
4770 }
4771
4772 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4773 {
4774         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4775         struct ixgbe_hw *hw = &adapter->hw;
4776         int i, count = 0;
4777
4778         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4779                 /* do not count default RAR as available */
4780                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4781                         continue;
4782
4783                 /* only count unused and addresses that belong to us */
4784                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4785                         if (mac_table->pool != pool)
4786                                 continue;
4787                 }
4788
4789                 count++;
4790         }
4791
4792         return count;
4793 }
4794
4795 /* this function destroys the first RAR entry */
4796 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4797 {
4798         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4799         struct ixgbe_hw *hw = &adapter->hw;
4800
4801         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4802         mac_table->pool = VMDQ_P(0);
4803
4804         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4805
4806         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4807                             IXGBE_RAH_AV);
4808 }
4809
4810 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4811                          const u8 *addr, u16 pool)
4812 {
4813         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4814         struct ixgbe_hw *hw = &adapter->hw;
4815         int i;
4816
4817         if (is_zero_ether_addr(addr))
4818                 return -EINVAL;
4819
4820         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4821                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4822                         continue;
4823
4824                 ether_addr_copy(mac_table->addr, addr);
4825                 mac_table->pool = pool;
4826
4827                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4828                                     IXGBE_MAC_STATE_IN_USE;
4829
4830                 ixgbe_sync_mac_table(adapter);
4831
4832                 return i;
4833         }
4834
4835         return -ENOMEM;
4836 }
4837
4838 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4839                          const u8 *addr, u16 pool)
4840 {
4841         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4842         struct ixgbe_hw *hw = &adapter->hw;
4843         int i;
4844
4845         if (is_zero_ether_addr(addr))
4846                 return -EINVAL;
4847
4848         /* search table for addr, if found clear IN_USE flag and sync */
4849         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4850                 /* we can only delete an entry if it is in use */
4851                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4852                         continue;
4853                 /* we only care about entries that belong to the given pool */
4854                 if (mac_table->pool != pool)
4855                         continue;
4856                 /* we only care about a specific MAC address */
4857                 if (!ether_addr_equal(addr, mac_table->addr))
4858                         continue;
4859
4860                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4861                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4862
4863                 ixgbe_sync_mac_table(adapter);
4864
4865                 return 0;
4866         }
4867
4868         return -ENOMEM;
4869 }
4870
4871 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4872 {
4873         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4874         int ret;
4875
4876         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4877
4878         return min_t(int, ret, 0);
4879 }
4880
4881 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4882 {
4883         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4884
4885         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4886
4887         return 0;
4888 }
4889
4890 /**
4891  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4892  * @netdev: network interface device structure
4893  *
4894  * The set_rx_method entry point is called whenever the unicast/multicast
4895  * address list or the network interface flags are updated.  This routine is
4896  * responsible for configuring the hardware for proper unicast, multicast and
4897  * promiscuous mode.
4898  **/
4899 void ixgbe_set_rx_mode(struct net_device *netdev)
4900 {
4901         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4902         struct ixgbe_hw *hw = &adapter->hw;
4903         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4904         netdev_features_t features = netdev->features;
4905         int count;
4906
4907         /* Check for Promiscuous and All Multicast modes */
4908         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4909
4910         /* set all bits that we expect to always be set */
4911         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4912         fctrl |= IXGBE_FCTRL_BAM;
4913         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4914         fctrl |= IXGBE_FCTRL_PMCF;
4915
4916         /* clear the bits we are changing the status of */
4917         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4918         if (netdev->flags & IFF_PROMISC) {
4919                 hw->addr_ctrl.user_set_promisc = true;
4920                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4921                 vmolr |= IXGBE_VMOLR_MPE;
4922                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4923         } else {
4924                 if (netdev->flags & IFF_ALLMULTI) {
4925                         fctrl |= IXGBE_FCTRL_MPE;
4926                         vmolr |= IXGBE_VMOLR_MPE;
4927                 }
4928                 hw->addr_ctrl.user_set_promisc = false;
4929         }
4930
4931         /*
4932          * Write addresses to available RAR registers, if there is not
4933          * sufficient space to store all the addresses then enable
4934          * unicast promiscuous mode
4935          */
4936         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4937                 fctrl |= IXGBE_FCTRL_UPE;
4938                 vmolr |= IXGBE_VMOLR_ROPE;
4939         }
4940
4941         /* Write addresses to the MTA, if the attempt fails
4942          * then we should just turn on promiscuous mode so
4943          * that we can at least receive multicast traffic
4944          */
4945         count = ixgbe_write_mc_addr_list(netdev);
4946         if (count < 0) {
4947                 fctrl |= IXGBE_FCTRL_MPE;
4948                 vmolr |= IXGBE_VMOLR_MPE;
4949         } else if (count) {
4950                 vmolr |= IXGBE_VMOLR_ROMPE;
4951         }
4952
4953         if (hw->mac.type != ixgbe_mac_82598EB) {
4954                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4955                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4956                            IXGBE_VMOLR_ROPE);
4957                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4958         }
4959
4960         /* This is useful for sniffing bad packets. */
4961         if (features & NETIF_F_RXALL) {
4962                 /* UPE and MPE will be handled by normal PROMISC logic
4963                  * in e1000e_set_rx_mode */
4964                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4965                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4966                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4967
4968                 fctrl &= ~(IXGBE_FCTRL_DPF);
4969                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4970         }
4971
4972         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4973
4974         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4975                 ixgbe_vlan_strip_enable(adapter);
4976         else
4977                 ixgbe_vlan_strip_disable(adapter);
4978
4979         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4980                 ixgbe_vlan_promisc_disable(adapter);
4981         else
4982                 ixgbe_vlan_promisc_enable(adapter);
4983 }
4984
4985 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4986 {
4987         int q_idx;
4988
4989         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4990                 napi_enable(&adapter->q_vector[q_idx]->napi);
4991 }
4992
4993 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4994 {
4995         int q_idx;
4996
4997         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4998                 napi_disable(&adapter->q_vector[q_idx]->napi);
4999 }
5000
5001 static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)
5002 {
5003         struct ixgbe_adapter *adapter = netdev_priv(dev);
5004         struct ixgbe_hw *hw = &adapter->hw;
5005         struct udp_tunnel_info ti;
5006
5007         udp_tunnel_nic_get_port(dev, table, 0, &ti);
5008         if (ti.type == UDP_TUNNEL_TYPE_VXLAN)
5009                 adapter->vxlan_port = ti.port;
5010         else
5011                 adapter->geneve_port = ti.port;
5012
5013         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL,
5014                         ntohs(adapter->vxlan_port) |
5015                         ntohs(adapter->geneve_port) <<
5016                                 IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT);
5017         return 0;
5018 }
5019
5020 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550 = {
5021         .sync_table     = ixgbe_udp_tunnel_sync,
5022         .flags          = UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
5023         .tables         = {
5024                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },
5025         },
5026 };
5027
5028 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550em_a = {
5029         .sync_table     = ixgbe_udp_tunnel_sync,
5030         .flags          = UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
5031         .tables         = {
5032                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },
5033                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },
5034         },
5035 };
5036
5037 #ifdef CONFIG_IXGBE_DCB
5038 /**
5039  * ixgbe_configure_dcb - Configure DCB hardware
5040  * @adapter: ixgbe adapter struct
5041  *
5042  * This is called by the driver on open to configure the DCB hardware.
5043  * This is also called by the gennetlink interface when reconfiguring
5044  * the DCB state.
5045  */
5046 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5047 {
5048         struct ixgbe_hw *hw = &adapter->hw;
5049         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5050
5051         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5052                 if (hw->mac.type == ixgbe_mac_82598EB)
5053                         netif_set_gso_max_size(adapter->netdev, 65536);
5054                 return;
5055         }
5056
5057         if (hw->mac.type == ixgbe_mac_82598EB)
5058                 netif_set_gso_max_size(adapter->netdev, 32768);
5059
5060 #ifdef IXGBE_FCOE
5061         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5062                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5063 #endif
5064
5065         /* reconfigure the hardware */
5066         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5067                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5068                                                 DCB_TX_CONFIG);
5069                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5070                                                 DCB_RX_CONFIG);
5071                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5072         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5073                 ixgbe_dcb_hw_ets(&adapter->hw,
5074                                  adapter->ixgbe_ieee_ets,
5075                                  max_frame);
5076                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5077                                         adapter->ixgbe_ieee_pfc->pfc_en,
5078                                         adapter->ixgbe_ieee_ets->prio_tc);
5079         }
5080
5081         /* Enable RSS Hash per TC */
5082         if (hw->mac.type != ixgbe_mac_82598EB) {
5083                 u32 msb = 0;
5084                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5085
5086                 while (rss_i) {
5087                         msb++;
5088                         rss_i >>= 1;
5089                 }
5090
5091                 /* write msb to all 8 TCs in one write */
5092                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5093         }
5094 }
5095 #endif
5096
5097 /* Additional bittime to account for IXGBE framing */
5098 #define IXGBE_ETH_FRAMING 20
5099
5100 /**
5101  * ixgbe_hpbthresh - calculate high water mark for flow control
5102  *
5103  * @adapter: board private structure to calculate for
5104  * @pb: packet buffer to calculate
5105  */
5106 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5107 {
5108         struct ixgbe_hw *hw = &adapter->hw;
5109         struct net_device *dev = adapter->netdev;
5110         int link, tc, kb, marker;
5111         u32 dv_id, rx_pba;
5112
5113         /* Calculate max LAN frame size */
5114         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5115
5116 #ifdef IXGBE_FCOE
5117         /* FCoE traffic class uses FCOE jumbo frames */
5118         if ((dev->features & NETIF_F_FCOE_MTU) &&
5119             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5120             (pb == ixgbe_fcoe_get_tc(adapter)))
5121                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5122 #endif
5123
5124         /* Calculate delay value for device */
5125         switch (hw->mac.type) {
5126         case ixgbe_mac_X540:
5127         case ixgbe_mac_X550:
5128         case ixgbe_mac_X550EM_x:
5129         case ixgbe_mac_x550em_a:
5130                 dv_id = IXGBE_DV_X540(link, tc);
5131                 break;
5132         default:
5133                 dv_id = IXGBE_DV(link, tc);
5134                 break;
5135         }
5136
5137         /* Loopback switch introduces additional latency */
5138         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5139                 dv_id += IXGBE_B2BT(tc);
5140
5141         /* Delay value is calculated in bit times convert to KB */
5142         kb = IXGBE_BT2KB(dv_id);
5143         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5144
5145         marker = rx_pba - kb;
5146
5147         /* It is possible that the packet buffer is not large enough
5148          * to provide required headroom. In this case throw an error
5149          * to user and a do the best we can.
5150          */
5151         if (marker < 0) {
5152                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5153                             "headroom to support flow control."
5154                             "Decrease MTU or number of traffic classes\n", pb);
5155                 marker = tc + 1;
5156         }
5157
5158         return marker;
5159 }
5160
5161 /**
5162  * ixgbe_lpbthresh - calculate low water mark for for flow control
5163  *
5164  * @adapter: board private structure to calculate for
5165  * @pb: packet buffer to calculate
5166  */
5167 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5168 {
5169         struct ixgbe_hw *hw = &adapter->hw;
5170         struct net_device *dev = adapter->netdev;
5171         int tc;
5172         u32 dv_id;
5173
5174         /* Calculate max LAN frame size */
5175         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5176
5177 #ifdef IXGBE_FCOE
5178         /* FCoE traffic class uses FCOE jumbo frames */
5179         if ((dev->features & NETIF_F_FCOE_MTU) &&
5180             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5181             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5182                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5183 #endif
5184
5185         /* Calculate delay value for device */
5186         switch (hw->mac.type) {
5187         case ixgbe_mac_X540:
5188         case ixgbe_mac_X550:
5189         case ixgbe_mac_X550EM_x:
5190         case ixgbe_mac_x550em_a:
5191                 dv_id = IXGBE_LOW_DV_X540(tc);
5192                 break;
5193         default:
5194                 dv_id = IXGBE_LOW_DV(tc);
5195                 break;
5196         }
5197
5198         /* Delay value is calculated in bit times convert to KB */
5199         return IXGBE_BT2KB(dv_id);
5200 }
5201
5202 /*
5203  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5204  */
5205 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5206 {
5207         struct ixgbe_hw *hw = &adapter->hw;
5208         int num_tc = adapter->hw_tcs;
5209         int i;
5210
5211         if (!num_tc)
5212                 num_tc = 1;
5213
5214         for (i = 0; i < num_tc; i++) {
5215                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5216                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5217
5218                 /* Low water marks must not be larger than high water marks */
5219                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5220                         hw->fc.low_water[i] = 0;
5221         }
5222
5223         for (; i < MAX_TRAFFIC_CLASS; i++)
5224                 hw->fc.high_water[i] = 0;
5225 }
5226
5227 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5228 {
5229         struct ixgbe_hw *hw = &adapter->hw;
5230         int hdrm;
5231         u8 tc = adapter->hw_tcs;
5232
5233         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5234             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5235                 hdrm = 32 << adapter->fdir_pballoc;
5236         else
5237                 hdrm = 0;
5238
5239         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5240         ixgbe_pbthresh_setup(adapter);
5241 }
5242
5243 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5244 {
5245         struct ixgbe_hw *hw = &adapter->hw;
5246         struct hlist_node *node2;
5247         struct ixgbe_fdir_filter *filter;
5248         u8 queue;
5249
5250         spin_lock(&adapter->fdir_perfect_lock);
5251
5252         if (!hlist_empty(&adapter->fdir_filter_list))
5253                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5254
5255         hlist_for_each_entry_safe(filter, node2,
5256                                   &adapter->fdir_filter_list, fdir_node) {
5257                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5258                         queue = IXGBE_FDIR_DROP_QUEUE;
5259                 } else {
5260                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5261                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5262
5263                         if (!vf && (ring >= adapter->num_rx_queues)) {
5264                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5265                                       ring);
5266                                 continue;
5267                         } else if (vf &&
5268                                    ((vf > adapter->num_vfs) ||
5269                                      ring >= adapter->num_rx_queues_per_pool)) {
5270                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5271                                       vf, ring);
5272                                 continue;
5273                         }
5274
5275                         /* Map the ring onto the absolute queue index */
5276                         if (!vf)
5277                                 queue = adapter->rx_ring[ring]->reg_idx;
5278                         else
5279                                 queue = ((vf - 1) *
5280                                         adapter->num_rx_queues_per_pool) + ring;
5281                 }
5282
5283                 ixgbe_fdir_write_perfect_filter_82599(hw,
5284                                 &filter->filter, filter->sw_idx, queue);
5285         }
5286
5287         spin_unlock(&adapter->fdir_perfect_lock);
5288 }
5289
5290 /**
5291  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5292  * @rx_ring: ring to free buffers from
5293  **/
5294 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5295 {
5296         u16 i = rx_ring->next_to_clean;
5297         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5298
5299         if (rx_ring->xsk_pool) {
5300                 ixgbe_xsk_clean_rx_ring(rx_ring);
5301                 goto skip_free;
5302         }
5303
5304         /* Free all the Rx ring sk_buffs */
5305         while (i != rx_ring->next_to_alloc) {
5306                 if (rx_buffer->skb) {
5307                         struct sk_buff *skb = rx_buffer->skb;
5308                         if (IXGBE_CB(skb)->page_released)
5309                                 dma_unmap_page_attrs(rx_ring->dev,
5310                                                      IXGBE_CB(skb)->dma,
5311                                                      ixgbe_rx_pg_size(rx_ring),
5312                                                      DMA_FROM_DEVICE,
5313                                                      IXGBE_RX_DMA_ATTR);
5314                         dev_kfree_skb(skb);
5315                 }
5316
5317                 /* Invalidate cache lines that may have been written to by
5318                  * device so that we avoid corrupting memory.
5319                  */
5320                 dma_sync_single_range_for_cpu(rx_ring->dev,
5321                                               rx_buffer->dma,
5322                                               rx_buffer->page_offset,
5323                                               ixgbe_rx_bufsz(rx_ring),
5324                                               DMA_FROM_DEVICE);
5325
5326                 /* free resources associated with mapping */
5327                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5328                                      ixgbe_rx_pg_size(rx_ring),
5329                                      DMA_FROM_DEVICE,
5330                                      IXGBE_RX_DMA_ATTR);
5331                 __page_frag_cache_drain(rx_buffer->page,
5332                                         rx_buffer->pagecnt_bias);
5333
5334                 i++;
5335                 rx_buffer++;
5336                 if (i == rx_ring->count) {
5337                         i = 0;
5338                         rx_buffer = rx_ring->rx_buffer_info;
5339                 }
5340         }
5341
5342 skip_free:
5343         rx_ring->next_to_alloc = 0;
5344         rx_ring->next_to_clean = 0;
5345         rx_ring->next_to_use = 0;
5346 }
5347
5348 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5349                              struct ixgbe_fwd_adapter *accel)
5350 {
5351         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5352         int num_tc = netdev_get_num_tc(adapter->netdev);
5353         struct net_device *vdev = accel->netdev;
5354         int i, baseq, err;
5355
5356         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5357         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5358                    accel->pool, adapter->num_rx_pools,
5359                    baseq, baseq + adapter->num_rx_queues_per_pool);
5360
5361         accel->rx_base_queue = baseq;
5362         accel->tx_base_queue = baseq;
5363
5364         /* record configuration for macvlan interface in vdev */
5365         for (i = 0; i < num_tc; i++)
5366                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5367                                              i, rss_i, baseq + (rss_i * i));
5368
5369         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5370                 adapter->rx_ring[baseq + i]->netdev = vdev;
5371
5372         /* Guarantee all rings are updated before we update the
5373          * MAC address filter.
5374          */
5375         wmb();
5376
5377         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5378          * need to only treat it as an error value if it is negative.
5379          */
5380         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5381                                    VMDQ_P(accel->pool));
5382         if (err >= 0)
5383                 return 0;
5384
5385         /* if we cannot add the MAC rule then disable the offload */
5386         macvlan_release_l2fw_offload(vdev);
5387
5388         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5389                 adapter->rx_ring[baseq + i]->netdev = NULL;
5390
5391         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5392
5393         /* unbind the queues and drop the subordinate channel config */
5394         netdev_unbind_sb_channel(adapter->netdev, vdev);
5395         netdev_set_sb_channel(vdev, 0);
5396
5397         clear_bit(accel->pool, adapter->fwd_bitmask);
5398         kfree(accel);
5399
5400         return err;
5401 }
5402
5403 static int ixgbe_macvlan_up(struct net_device *vdev,
5404                             struct netdev_nested_priv *priv)
5405 {
5406         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data;
5407         struct ixgbe_fwd_adapter *accel;
5408
5409         if (!netif_is_macvlan(vdev))
5410                 return 0;
5411
5412         accel = macvlan_accel_priv(vdev);
5413         if (!accel)
5414                 return 0;
5415
5416         ixgbe_fwd_ring_up(adapter, accel);
5417
5418         return 0;
5419 }
5420
5421 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5422 {
5423         struct netdev_nested_priv priv = {
5424                 .data = (void *)adapter,
5425         };
5426
5427         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5428                                       ixgbe_macvlan_up, &priv);
5429 }
5430
5431 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5432 {
5433         struct ixgbe_hw *hw = &adapter->hw;
5434
5435         ixgbe_configure_pb(adapter);
5436 #ifdef CONFIG_IXGBE_DCB
5437         ixgbe_configure_dcb(adapter);
5438 #endif
5439         /*
5440          * We must restore virtualization before VLANs or else
5441          * the VLVF registers will not be populated
5442          */
5443         ixgbe_configure_virtualization(adapter);
5444
5445         ixgbe_set_rx_mode(adapter->netdev);
5446         ixgbe_restore_vlan(adapter);
5447         ixgbe_ipsec_restore(adapter);
5448
5449         switch (hw->mac.type) {
5450         case ixgbe_mac_82599EB:
5451         case ixgbe_mac_X540:
5452                 hw->mac.ops.disable_rx_buff(hw);
5453                 break;
5454         default:
5455                 break;
5456         }
5457
5458         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5459                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5460                                                 adapter->fdir_pballoc);
5461         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5462                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5463                                               adapter->fdir_pballoc);
5464                 ixgbe_fdir_filter_restore(adapter);
5465         }
5466
5467         switch (hw->mac.type) {
5468         case ixgbe_mac_82599EB:
5469         case ixgbe_mac_X540:
5470                 hw->mac.ops.enable_rx_buff(hw);
5471                 break;
5472         default:
5473                 break;
5474         }
5475
5476 #ifdef CONFIG_IXGBE_DCA
5477         /* configure DCA */
5478         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5479                 ixgbe_setup_dca(adapter);
5480 #endif /* CONFIG_IXGBE_DCA */
5481
5482 #ifdef IXGBE_FCOE
5483         /* configure FCoE L2 filters, redirection table, and Rx control */
5484         ixgbe_configure_fcoe(adapter);
5485
5486 #endif /* IXGBE_FCOE */
5487         ixgbe_configure_tx(adapter);
5488         ixgbe_configure_rx(adapter);
5489         ixgbe_configure_dfwd(adapter);
5490 }
5491
5492 /**
5493  * ixgbe_sfp_link_config - set up SFP+ link
5494  * @adapter: pointer to private adapter struct
5495  **/
5496 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5497 {
5498         /*
5499          * We are assuming the worst case scenario here, and that
5500          * is that an SFP was inserted/removed after the reset
5501          * but before SFP detection was enabled.  As such the best
5502          * solution is to just start searching as soon as we start
5503          */
5504         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5505                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5506
5507         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5508         adapter->sfp_poll_time = 0;
5509 }
5510
5511 /**
5512  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5513  * @hw: pointer to private hardware struct
5514  *
5515  * Returns 0 on success, negative on failure
5516  **/
5517 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5518 {
5519         u32 speed;
5520         bool autoneg, link_up = false;
5521         int ret = IXGBE_ERR_LINK_SETUP;
5522
5523         if (hw->mac.ops.check_link)
5524                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5525
5526         if (ret)
5527                 return ret;
5528
5529         speed = hw->phy.autoneg_advertised;
5530         if (!speed && hw->mac.ops.get_link_capabilities) {
5531                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5532                                                         &autoneg);
5533                 speed &= ~(IXGBE_LINK_SPEED_5GB_FULL |
5534                            IXGBE_LINK_SPEED_2_5GB_FULL);
5535         }
5536
5537         if (ret)
5538                 return ret;
5539
5540         if (hw->mac.ops.setup_link)
5541                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5542
5543         return ret;
5544 }
5545
5546 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5547 {
5548         struct ixgbe_hw *hw = &adapter->hw;
5549         u32 gpie = 0;
5550
5551         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5552                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5553                        IXGBE_GPIE_OCD;
5554                 gpie |= IXGBE_GPIE_EIAME;
5555                 /*
5556                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5557                  * this saves a register write for every interrupt
5558                  */
5559                 switch (hw->mac.type) {
5560                 case ixgbe_mac_82598EB:
5561                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5562                         break;
5563                 case ixgbe_mac_82599EB:
5564                 case ixgbe_mac_X540:
5565                 case ixgbe_mac_X550:
5566                 case ixgbe_mac_X550EM_x:
5567                 case ixgbe_mac_x550em_a:
5568                 default:
5569                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5570                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5571                         break;
5572                 }
5573         } else {
5574                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5575                  * specifically only auto mask tx and rx interrupts */
5576                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5577         }
5578
5579         /* XXX: to interrupt immediately for EICS writes, enable this */
5580         /* gpie |= IXGBE_GPIE_EIMEN; */
5581
5582         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5583                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5584
5585                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5586                 case IXGBE_82599_VMDQ_8Q_MASK:
5587                         gpie |= IXGBE_GPIE_VTMODE_16;
5588                         break;
5589                 case IXGBE_82599_VMDQ_4Q_MASK:
5590                         gpie |= IXGBE_GPIE_VTMODE_32;
5591                         break;
5592                 default:
5593                         gpie |= IXGBE_GPIE_VTMODE_64;
5594                         break;
5595                 }
5596         }
5597
5598         /* Enable Thermal over heat sensor interrupt */
5599         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5600                 switch (adapter->hw.mac.type) {
5601                 case ixgbe_mac_82599EB:
5602                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5603                         break;
5604                 default:
5605                         break;
5606                 }
5607         }
5608
5609         /* Enable fan failure interrupt */
5610         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5611                 gpie |= IXGBE_SDP1_GPIEN(hw);
5612
5613         switch (hw->mac.type) {
5614         case ixgbe_mac_82599EB:
5615                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5616                 break;
5617         case ixgbe_mac_X550EM_x:
5618         case ixgbe_mac_x550em_a:
5619                 gpie |= IXGBE_SDP0_GPIEN_X540;
5620                 break;
5621         default:
5622                 break;
5623         }
5624
5625         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5626 }
5627
5628 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5629 {
5630         struct ixgbe_hw *hw = &adapter->hw;
5631         int err;
5632         u32 ctrl_ext;
5633
5634         ixgbe_get_hw_control(adapter);
5635         ixgbe_setup_gpie(adapter);
5636
5637         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5638                 ixgbe_configure_msix(adapter);
5639         else
5640                 ixgbe_configure_msi_and_legacy(adapter);
5641
5642         /* enable the optics for 82599 SFP+ fiber */
5643         if (hw->mac.ops.enable_tx_laser)
5644                 hw->mac.ops.enable_tx_laser(hw);
5645
5646         if (hw->phy.ops.set_phy_power)
5647                 hw->phy.ops.set_phy_power(hw, true);
5648
5649         smp_mb__before_atomic();
5650         clear_bit(__IXGBE_DOWN, &adapter->state);
5651         ixgbe_napi_enable_all(adapter);
5652
5653         if (ixgbe_is_sfp(hw)) {
5654                 ixgbe_sfp_link_config(adapter);
5655         } else {
5656                 err = ixgbe_non_sfp_link_config(hw);
5657                 if (err)
5658                         e_err(probe, "link_config FAILED %d\n", err);
5659         }
5660
5661         /* clear any pending interrupts, may auto mask */
5662         IXGBE_READ_REG(hw, IXGBE_EICR);
5663         ixgbe_irq_enable(adapter, true, true);
5664
5665         /*
5666          * If this adapter has a fan, check to see if we had a failure
5667          * before we enabled the interrupt.
5668          */
5669         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5670                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5671                 if (esdp & IXGBE_ESDP_SDP1)
5672                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5673         }
5674
5675         /* bring the link up in the watchdog, this could race with our first
5676          * link up interrupt but shouldn't be a problem */
5677         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5678         adapter->link_check_timeout = jiffies;
5679         mod_timer(&adapter->service_timer, jiffies);
5680
5681         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5682         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5683         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5684         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5685 }
5686
5687 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5688 {
5689         /* put off any impending NetWatchDogTimeout */
5690         netif_trans_update(adapter->netdev);
5691
5692         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5693                 usleep_range(1000, 2000);
5694         if (adapter->hw.phy.type == ixgbe_phy_fw)
5695                 ixgbe_watchdog_link_is_down(adapter);
5696         ixgbe_down(adapter);
5697         /*
5698          * If SR-IOV enabled then wait a bit before bringing the adapter
5699          * back up to give the VFs time to respond to the reset.  The
5700          * two second wait is based upon the watchdog timer cycle in
5701          * the VF driver.
5702          */
5703         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5704                 msleep(2000);
5705         ixgbe_up(adapter);
5706         clear_bit(__IXGBE_RESETTING, &adapter->state);
5707 }
5708
5709 void ixgbe_up(struct ixgbe_adapter *adapter)
5710 {
5711         /* hardware has been reset, we need to reload some things */
5712         ixgbe_configure(adapter);
5713
5714         ixgbe_up_complete(adapter);
5715 }
5716
5717 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5718 {
5719         u16 devctl2;
5720
5721         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5722
5723         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5724         case IXGBE_PCIDEVCTRL2_17_34s:
5725         case IXGBE_PCIDEVCTRL2_4_8s:
5726                 /* For now we cap the upper limit on delay to 2 seconds
5727                  * as we end up going up to 34 seconds of delay in worst
5728                  * case timeout value.
5729                  */
5730         case IXGBE_PCIDEVCTRL2_1_2s:
5731                 return 2000000ul;       /* 2.0 s */
5732         case IXGBE_PCIDEVCTRL2_260_520ms:
5733                 return 520000ul;        /* 520 ms */
5734         case IXGBE_PCIDEVCTRL2_65_130ms:
5735                 return 130000ul;        /* 130 ms */
5736         case IXGBE_PCIDEVCTRL2_16_32ms:
5737                 return 32000ul;         /* 32 ms */
5738         case IXGBE_PCIDEVCTRL2_1_2ms:
5739                 return 2000ul;          /* 2 ms */
5740         case IXGBE_PCIDEVCTRL2_50_100us:
5741                 return 100ul;           /* 100 us */
5742         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5743                 return 32000ul;         /* 32 ms */
5744         default:
5745                 break;
5746         }
5747
5748         /* We shouldn't need to hit this path, but just in case default as
5749          * though completion timeout is not supported and support 32ms.
5750          */
5751         return 32000ul;
5752 }
5753
5754 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5755 {
5756         unsigned long wait_delay, delay_interval;
5757         struct ixgbe_hw *hw = &adapter->hw;
5758         int i, wait_loop;
5759         u32 rxdctl;
5760
5761         /* disable receives */
5762         hw->mac.ops.disable_rx(hw);
5763
5764         if (ixgbe_removed(hw->hw_addr))
5765                 return;
5766
5767         /* disable all enabled Rx queues */
5768         for (i = 0; i < adapter->num_rx_queues; i++) {
5769                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5770                 u8 reg_idx = ring->reg_idx;
5771
5772                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5773                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5774                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5775
5776                 /* write value back with RXDCTL.ENABLE bit cleared */
5777                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5778         }
5779
5780         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5781         if (hw->mac.type == ixgbe_mac_82598EB &&
5782             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5783                 return;
5784
5785         /* Determine our minimum delay interval. We will increase this value
5786          * with each subsequent test. This way if the device returns quickly
5787          * we should spend as little time as possible waiting, however as
5788          * the time increases we will wait for larger periods of time.
5789          *
5790          * The trick here is that we increase the interval using the
5791          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5792          * of that wait is that it totals up to 100x whatever interval we
5793          * choose. Since our minimum wait is 100us we can just divide the
5794          * total timeout by 100 to get our minimum delay interval.
5795          */
5796         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5797
5798         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5799         wait_delay = delay_interval;
5800
5801         while (wait_loop--) {
5802                 usleep_range(wait_delay, wait_delay + 10);
5803                 wait_delay += delay_interval * 2;
5804                 rxdctl = 0;
5805
5806                 /* OR together the reading of all the active RXDCTL registers,
5807                  * and then test the result. We need the disable to complete
5808                  * before we start freeing the memory and invalidating the
5809                  * DMA mappings.
5810                  */
5811                 for (i = 0; i < adapter->num_rx_queues; i++) {
5812                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5813                         u8 reg_idx = ring->reg_idx;
5814
5815                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5816                 }
5817
5818                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5819                         return;
5820         }
5821
5822         e_err(drv,
5823               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5824 }
5825
5826 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5827 {
5828         unsigned long wait_delay, delay_interval;
5829         struct ixgbe_hw *hw = &adapter->hw;
5830         int i, wait_loop;
5831         u32 txdctl;
5832
5833         if (ixgbe_removed(hw->hw_addr))
5834                 return;
5835
5836         /* disable all enabled Tx queues */
5837         for (i = 0; i < adapter->num_tx_queues; i++) {
5838                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5839                 u8 reg_idx = ring->reg_idx;
5840
5841                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5842         }
5843
5844         /* disable all enabled XDP Tx queues */
5845         for (i = 0; i < adapter->num_xdp_queues; i++) {
5846                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5847                 u8 reg_idx = ring->reg_idx;
5848
5849                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5850         }
5851
5852         /* If the link is not up there shouldn't be much in the way of
5853          * pending transactions. Those that are left will be flushed out
5854          * when the reset logic goes through the flush sequence to clean out
5855          * the pending Tx transactions.
5856          */
5857         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5858                 goto dma_engine_disable;
5859
5860         /* Determine our minimum delay interval. We will increase this value
5861          * with each subsequent test. This way if the device returns quickly
5862          * we should spend as little time as possible waiting, however as
5863          * the time increases we will wait for larger periods of time.
5864          *
5865          * The trick here is that we increase the interval using the
5866          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5867          * of that wait is that it totals up to 100x whatever interval we
5868          * choose. Since our minimum wait is 100us we can just divide the
5869          * total timeout by 100 to get our minimum delay interval.
5870          */
5871         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5872
5873         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5874         wait_delay = delay_interval;
5875
5876         while (wait_loop--) {
5877                 usleep_range(wait_delay, wait_delay + 10);
5878                 wait_delay += delay_interval * 2;
5879                 txdctl = 0;
5880
5881                 /* OR together the reading of all the active TXDCTL registers,
5882                  * and then test the result. We need the disable to complete
5883                  * before we start freeing the memory and invalidating the
5884                  * DMA mappings.
5885                  */
5886                 for (i = 0; i < adapter->num_tx_queues; i++) {
5887                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5888                         u8 reg_idx = ring->reg_idx;
5889
5890                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5891                 }
5892                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5893                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5894                         u8 reg_idx = ring->reg_idx;
5895
5896                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5897                 }
5898
5899                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5900                         goto dma_engine_disable;
5901         }
5902
5903         e_err(drv,
5904               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5905
5906 dma_engine_disable:
5907         /* Disable the Tx DMA engine on 82599 and later MAC */
5908         switch (hw->mac.type) {
5909         case ixgbe_mac_82599EB:
5910         case ixgbe_mac_X540:
5911         case ixgbe_mac_X550:
5912         case ixgbe_mac_X550EM_x:
5913         case ixgbe_mac_x550em_a:
5914                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5915                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5916                                  ~IXGBE_DMATXCTL_TE));
5917                 fallthrough;
5918         default:
5919                 break;
5920         }
5921 }
5922
5923 void ixgbe_reset(struct ixgbe_adapter *adapter)
5924 {
5925         struct ixgbe_hw *hw = &adapter->hw;
5926         struct net_device *netdev = adapter->netdev;
5927         int err;
5928
5929         if (ixgbe_removed(hw->hw_addr))
5930                 return;
5931         /* lock SFP init bit to prevent race conditions with the watchdog */
5932         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5933                 usleep_range(1000, 2000);
5934
5935         /* clear all SFP and link config related flags while holding SFP_INIT */
5936         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5937                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5938         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5939
5940         err = hw->mac.ops.init_hw(hw);
5941         switch (err) {
5942         case 0:
5943         case IXGBE_ERR_SFP_NOT_PRESENT:
5944         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5945                 break;
5946         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5947                 e_dev_err("master disable timed out\n");
5948                 break;
5949         case IXGBE_ERR_EEPROM_VERSION:
5950                 /* We are running on a pre-production device, log a warning */
5951                 e_dev_warn("This device is a pre-production adapter/LOM. "
5952                            "Please be aware there may be issues associated with "
5953                            "your hardware.  If you are experiencing problems "
5954                            "please contact your Intel or hardware "
5955                            "representative who provided you with this "
5956                            "hardware.\n");
5957                 break;
5958         default:
5959                 e_dev_err("Hardware Error: %d\n", err);
5960         }
5961
5962         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5963
5964         /* flush entries out of MAC table */
5965         ixgbe_flush_sw_mac_table(adapter);
5966         __dev_uc_unsync(netdev, NULL);
5967
5968         /* do not flush user set addresses */
5969         ixgbe_mac_set_default_filter(adapter);
5970
5971         /* update SAN MAC vmdq pool selection */
5972         if (hw->mac.san_mac_rar_index)
5973                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5974
5975         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5976                 ixgbe_ptp_reset(adapter);
5977
5978         if (hw->phy.ops.set_phy_power) {
5979                 if (!netif_running(adapter->netdev) && !adapter->wol)
5980                         hw->phy.ops.set_phy_power(hw, false);
5981                 else
5982                         hw->phy.ops.set_phy_power(hw, true);
5983         }
5984 }
5985
5986 /**
5987  * ixgbe_clean_tx_ring - Free Tx Buffers
5988  * @tx_ring: ring to be cleaned
5989  **/
5990 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5991 {
5992         u16 i = tx_ring->next_to_clean;
5993         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5994
5995         if (tx_ring->xsk_pool) {
5996                 ixgbe_xsk_clean_tx_ring(tx_ring);
5997                 goto out;
5998         }
5999
6000         while (i != tx_ring->next_to_use) {
6001                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
6002
6003                 /* Free all the Tx ring sk_buffs */
6004                 if (ring_is_xdp(tx_ring))
6005                         xdp_return_frame(tx_buffer->xdpf);
6006                 else
6007                         dev_kfree_skb_any(tx_buffer->skb);
6008
6009                 /* unmap skb header data */
6010                 dma_unmap_single(tx_ring->dev,
6011                                  dma_unmap_addr(tx_buffer, dma),
6012                                  dma_unmap_len(tx_buffer, len),
6013                                  DMA_TO_DEVICE);
6014
6015                 /* check for eop_desc to determine the end of the packet */
6016                 eop_desc = tx_buffer->next_to_watch;
6017                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6018
6019                 /* unmap remaining buffers */
6020                 while (tx_desc != eop_desc) {
6021                         tx_buffer++;
6022                         tx_desc++;
6023                         i++;
6024                         if (unlikely(i == tx_ring->count)) {
6025                                 i = 0;
6026                                 tx_buffer = tx_ring->tx_buffer_info;
6027                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6028                         }
6029
6030                         /* unmap any remaining paged data */
6031                         if (dma_unmap_len(tx_buffer, len))
6032                                 dma_unmap_page(tx_ring->dev,
6033                                                dma_unmap_addr(tx_buffer, dma),
6034                                                dma_unmap_len(tx_buffer, len),
6035                                                DMA_TO_DEVICE);
6036                 }
6037
6038                 /* move us one more past the eop_desc for start of next pkt */
6039                 tx_buffer++;
6040                 i++;
6041                 if (unlikely(i == tx_ring->count)) {
6042                         i = 0;
6043                         tx_buffer = tx_ring->tx_buffer_info;
6044                 }
6045         }
6046
6047         /* reset BQL for queue */
6048         if (!ring_is_xdp(tx_ring))
6049                 netdev_tx_reset_queue(txring_txq(tx_ring));
6050
6051 out:
6052         /* reset next_to_use and next_to_clean */
6053         tx_ring->next_to_use = 0;
6054         tx_ring->next_to_clean = 0;
6055 }
6056
6057 /**
6058  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6059  * @adapter: board private structure
6060  **/
6061 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6062 {
6063         int i;
6064
6065         for (i = 0; i < adapter->num_rx_queues; i++)
6066                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6067 }
6068
6069 /**
6070  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6071  * @adapter: board private structure
6072  **/
6073 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6074 {
6075         int i;
6076
6077         for (i = 0; i < adapter->num_tx_queues; i++)
6078                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6079         for (i = 0; i < adapter->num_xdp_queues; i++)
6080                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6081 }
6082
6083 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6084 {
6085         struct hlist_node *node2;
6086         struct ixgbe_fdir_filter *filter;
6087
6088         spin_lock(&adapter->fdir_perfect_lock);
6089
6090         hlist_for_each_entry_safe(filter, node2,
6091                                   &adapter->fdir_filter_list, fdir_node) {
6092                 hlist_del(&filter->fdir_node);
6093                 kfree(filter);
6094         }
6095         adapter->fdir_filter_count = 0;
6096
6097         spin_unlock(&adapter->fdir_perfect_lock);
6098 }
6099
6100 void ixgbe_down(struct ixgbe_adapter *adapter)
6101 {
6102         struct net_device *netdev = adapter->netdev;
6103         struct ixgbe_hw *hw = &adapter->hw;
6104         int i;
6105
6106         /* signal that we are down to the interrupt handler */
6107         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6108                 return; /* do nothing if already down */
6109
6110         /* Shut off incoming Tx traffic */
6111         netif_tx_stop_all_queues(netdev);
6112
6113         /* call carrier off first to avoid false dev_watchdog timeouts */
6114         netif_carrier_off(netdev);
6115         netif_tx_disable(netdev);
6116
6117         /* Disable Rx */
6118         ixgbe_disable_rx(adapter);
6119
6120         /* synchronize_rcu() needed for pending XDP buffers to drain */
6121         if (adapter->xdp_ring[0])
6122                 synchronize_rcu();
6123
6124         ixgbe_irq_disable(adapter);
6125
6126         ixgbe_napi_disable_all(adapter);
6127
6128         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6129         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6130         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6131
6132         del_timer_sync(&adapter->service_timer);
6133
6134         if (adapter->num_vfs) {
6135                 /* Clear EITR Select mapping */
6136                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6137
6138                 /* Mark all the VFs as inactive */
6139                 for (i = 0 ; i < adapter->num_vfs; i++)
6140                         adapter->vfinfo[i].clear_to_send = false;
6141
6142                 /* ping all the active vfs to let them know we are going down */
6143                 ixgbe_ping_all_vfs(adapter);
6144
6145                 /* Disable all VFTE/VFRE TX/RX */
6146                 ixgbe_disable_tx_rx(adapter);
6147         }
6148
6149         /* disable transmits in the hardware now that interrupts are off */
6150         ixgbe_disable_tx(adapter);
6151
6152         if (!pci_channel_offline(adapter->pdev))
6153                 ixgbe_reset(adapter);
6154
6155         /* power down the optics for 82599 SFP+ fiber */
6156         if (hw->mac.ops.disable_tx_laser)
6157                 hw->mac.ops.disable_tx_laser(hw);
6158
6159         ixgbe_clean_all_tx_rings(adapter);
6160         ixgbe_clean_all_rx_rings(adapter);
6161 }
6162
6163 /**
6164  * ixgbe_eee_capable - helper function to determine EEE support on X550
6165  * @adapter: board private structure
6166  */
6167 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6168 {
6169         struct ixgbe_hw *hw = &adapter->hw;
6170
6171         switch (hw->device_id) {
6172         case IXGBE_DEV_ID_X550EM_A_1G_T:
6173         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6174                 if (!hw->phy.eee_speeds_supported)
6175                         break;
6176                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6177                 if (!hw->phy.eee_speeds_advertised)
6178                         break;
6179                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6180                 break;
6181         default:
6182                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6183                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6184                 break;
6185         }
6186 }
6187
6188 /**
6189  * ixgbe_tx_timeout - Respond to a Tx Hang
6190  * @netdev: network interface device structure
6191  * @txqueue: queue number that timed out
6192  **/
6193 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6194 {
6195         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6196
6197         /* Do the reset outside of interrupt context */
6198         ixgbe_tx_timeout_reset(adapter);
6199 }
6200
6201 #ifdef CONFIG_IXGBE_DCB
6202 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6203 {
6204         struct ixgbe_hw *hw = &adapter->hw;
6205         struct tc_configuration *tc;
6206         int j;
6207
6208         switch (hw->mac.type) {
6209         case ixgbe_mac_82598EB:
6210         case ixgbe_mac_82599EB:
6211                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6212                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6213                 break;
6214         case ixgbe_mac_X540:
6215         case ixgbe_mac_X550:
6216                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6217                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6218                 break;
6219         case ixgbe_mac_X550EM_x:
6220         case ixgbe_mac_x550em_a:
6221         default:
6222                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6223                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6224                 break;
6225         }
6226
6227         /* Configure DCB traffic classes */
6228         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6229                 tc = &adapter->dcb_cfg.tc_config[j];
6230                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6231                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6232                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6233                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6234                 tc->dcb_pfc = pfc_disabled;
6235         }
6236
6237         /* Initialize default user to priority mapping, UPx->TC0 */
6238         tc = &adapter->dcb_cfg.tc_config[0];
6239         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6240         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6241
6242         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6243         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6244         adapter->dcb_cfg.pfc_mode_enable = false;
6245         adapter->dcb_set_bitmap = 0x00;
6246         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6247                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6248         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6249                sizeof(adapter->temp_dcb_cfg));
6250 }
6251 #endif
6252
6253 /**
6254  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6255  * @adapter: board private structure to initialize
6256  * @ii: pointer to ixgbe_info for device
6257  *
6258  * ixgbe_sw_init initializes the Adapter private data structure.
6259  * Fields are initialized based on PCI device information and
6260  * OS network device settings (MTU size).
6261  **/
6262 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6263                          const struct ixgbe_info *ii)
6264 {
6265         struct ixgbe_hw *hw = &adapter->hw;
6266         struct pci_dev *pdev = adapter->pdev;
6267         unsigned int rss, fdir;
6268         u32 fwsm;
6269         int i;
6270
6271         /* PCI config space info */
6272
6273         hw->vendor_id = pdev->vendor;
6274         hw->device_id = pdev->device;
6275         hw->revision_id = pdev->revision;
6276         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6277         hw->subsystem_device_id = pdev->subsystem_device;
6278
6279         /* get_invariants needs the device IDs */
6280         ii->get_invariants(hw);
6281
6282         /* Set common capability flags and settings */
6283         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6284         adapter->ring_feature[RING_F_RSS].limit = rss;
6285         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6286         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6287         adapter->atr_sample_rate = 20;
6288         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6289         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6290         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6291         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6292 #ifdef CONFIG_IXGBE_DCA
6293         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6294 #endif
6295 #ifdef CONFIG_IXGBE_DCB
6296         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6297         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6298 #endif
6299 #ifdef IXGBE_FCOE
6300         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6301         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6302 #ifdef CONFIG_IXGBE_DCB
6303         /* Default traffic class to use for FCoE */
6304         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6305 #endif /* CONFIG_IXGBE_DCB */
6306 #endif /* IXGBE_FCOE */
6307
6308         /* initialize static ixgbe jump table entries */
6309         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6310                                           GFP_KERNEL);
6311         if (!adapter->jump_tables[0])
6312                 return -ENOMEM;
6313         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6314
6315         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6316                 adapter->jump_tables[i] = NULL;
6317
6318         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6319                                      sizeof(struct ixgbe_mac_addr),
6320                                      GFP_KERNEL);
6321         if (!adapter->mac_table)
6322                 return -ENOMEM;
6323
6324         if (ixgbe_init_rss_key(adapter))
6325                 return -ENOMEM;
6326
6327         adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6328         if (!adapter->af_xdp_zc_qps)
6329                 return -ENOMEM;
6330
6331         /* Set MAC specific capability flags and exceptions */
6332         switch (hw->mac.type) {
6333         case ixgbe_mac_82598EB:
6334                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6335
6336                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6337                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6338
6339                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6340                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6341                 adapter->atr_sample_rate = 0;
6342                 adapter->fdir_pballoc = 0;
6343 #ifdef IXGBE_FCOE
6344                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6345                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6346 #ifdef CONFIG_IXGBE_DCB
6347                 adapter->fcoe.up = 0;
6348 #endif /* IXGBE_DCB */
6349 #endif /* IXGBE_FCOE */
6350                 break;
6351         case ixgbe_mac_82599EB:
6352                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6353                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6354                 break;
6355         case ixgbe_mac_X540:
6356                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6357                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6358                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6359                 break;
6360         case ixgbe_mac_x550em_a:
6361                 switch (hw->device_id) {
6362                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6363                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6364                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6365                         break;
6366                 default:
6367                         break;
6368                 }
6369                 fallthrough;
6370         case ixgbe_mac_X550EM_x:
6371 #ifdef CONFIG_IXGBE_DCB
6372                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6373 #endif
6374 #ifdef IXGBE_FCOE
6375                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6376 #ifdef CONFIG_IXGBE_DCB
6377                 adapter->fcoe.up = 0;
6378 #endif /* IXGBE_DCB */
6379 #endif /* IXGBE_FCOE */
6380                 fallthrough;
6381         case ixgbe_mac_X550:
6382                 if (hw->mac.type == ixgbe_mac_X550)
6383                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6384 #ifdef CONFIG_IXGBE_DCA
6385                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6386 #endif
6387                 break;
6388         default:
6389                 break;
6390         }
6391
6392 #ifdef IXGBE_FCOE
6393         /* FCoE support exists, always init the FCoE lock */
6394         spin_lock_init(&adapter->fcoe.lock);
6395
6396 #endif
6397         /* n-tuple support exists, always init our spinlock */
6398         spin_lock_init(&adapter->fdir_perfect_lock);
6399
6400 #ifdef CONFIG_IXGBE_DCB
6401         ixgbe_init_dcb(adapter);
6402 #endif
6403         ixgbe_init_ipsec_offload(adapter);
6404
6405         /* default flow control settings */
6406         hw->fc.requested_mode = ixgbe_fc_full;
6407         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6408         ixgbe_pbthresh_setup(adapter);
6409         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6410         hw->fc.send_xon = true;
6411         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6412
6413 #ifdef CONFIG_PCI_IOV
6414         if (max_vfs > 0)
6415                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6416
6417         /* assign number of SR-IOV VFs */
6418         if (hw->mac.type != ixgbe_mac_82598EB) {
6419                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6420                         max_vfs = 0;
6421                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6422                 }
6423         }
6424 #endif /* CONFIG_PCI_IOV */
6425
6426         /* enable itr by default in dynamic mode */
6427         adapter->rx_itr_setting = 1;
6428         adapter->tx_itr_setting = 1;
6429
6430         /* set default ring sizes */
6431         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6432         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6433
6434         /* set default work limits */
6435         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6436
6437         /* initialize eeprom parameters */
6438         if (ixgbe_init_eeprom_params_generic(hw)) {
6439                 e_dev_err("EEPROM initialization failed\n");
6440                 return -EIO;
6441         }
6442
6443         /* PF holds first pool slot */
6444         set_bit(0, adapter->fwd_bitmask);
6445         set_bit(__IXGBE_DOWN, &adapter->state);
6446
6447         return 0;
6448 }
6449
6450 /**
6451  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6452  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6453  *
6454  * Return 0 on success, negative on failure
6455  **/
6456 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6457 {
6458         struct device *dev = tx_ring->dev;
6459         int orig_node = dev_to_node(dev);
6460         int ring_node = NUMA_NO_NODE;
6461         int size;
6462
6463         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6464
6465         if (tx_ring->q_vector)
6466                 ring_node = tx_ring->q_vector->numa_node;
6467
6468         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6469         if (!tx_ring->tx_buffer_info)
6470                 tx_ring->tx_buffer_info = vmalloc(size);
6471         if (!tx_ring->tx_buffer_info)
6472                 goto err;
6473
6474         /* round up to nearest 4K */
6475         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6476         tx_ring->size = ALIGN(tx_ring->size, 4096);
6477
6478         set_dev_node(dev, ring_node);
6479         tx_ring->desc = dma_alloc_coherent(dev,
6480                                            tx_ring->size,
6481                                            &tx_ring->dma,
6482                                            GFP_KERNEL);
6483         set_dev_node(dev, orig_node);
6484         if (!tx_ring->desc)
6485                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6486                                                    &tx_ring->dma, GFP_KERNEL);
6487         if (!tx_ring->desc)
6488                 goto err;
6489
6490         tx_ring->next_to_use = 0;
6491         tx_ring->next_to_clean = 0;
6492         return 0;
6493
6494 err:
6495         vfree(tx_ring->tx_buffer_info);
6496         tx_ring->tx_buffer_info = NULL;
6497         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6498         return -ENOMEM;
6499 }
6500
6501 /**
6502  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6503  * @adapter: board private structure
6504  *
6505  * If this function returns with an error, then it's possible one or
6506  * more of the rings is populated (while the rest are not).  It is the
6507  * callers duty to clean those orphaned rings.
6508  *
6509  * Return 0 on success, negative on failure
6510  **/
6511 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6512 {
6513         int i, j = 0, err = 0;
6514
6515         for (i = 0; i < adapter->num_tx_queues; i++) {
6516                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6517                 if (!err)
6518                         continue;
6519
6520                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6521                 goto err_setup_tx;
6522         }
6523         for (j = 0; j < adapter->num_xdp_queues; j++) {
6524                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6525                 if (!err)
6526                         continue;
6527
6528                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6529                 goto err_setup_tx;
6530         }
6531
6532         return 0;
6533 err_setup_tx:
6534         /* rewind the index freeing the rings as we go */
6535         while (j--)
6536                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6537         while (i--)
6538                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6539         return err;
6540 }
6541
6542 /**
6543  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6544  * @adapter: pointer to ixgbe_adapter
6545  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6546  *
6547  * Returns 0 on success, negative on failure
6548  **/
6549 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6550                              struct ixgbe_ring *rx_ring)
6551 {
6552         struct device *dev = rx_ring->dev;
6553         int orig_node = dev_to_node(dev);
6554         int ring_node = NUMA_NO_NODE;
6555         int size;
6556
6557         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6558
6559         if (rx_ring->q_vector)
6560                 ring_node = rx_ring->q_vector->numa_node;
6561
6562         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6563         if (!rx_ring->rx_buffer_info)
6564                 rx_ring->rx_buffer_info = vmalloc(size);
6565         if (!rx_ring->rx_buffer_info)
6566                 goto err;
6567
6568         /* Round up to nearest 4K */
6569         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6570         rx_ring->size = ALIGN(rx_ring->size, 4096);
6571
6572         set_dev_node(dev, ring_node);
6573         rx_ring->desc = dma_alloc_coherent(dev,
6574                                            rx_ring->size,
6575                                            &rx_ring->dma,
6576                                            GFP_KERNEL);
6577         set_dev_node(dev, orig_node);
6578         if (!rx_ring->desc)
6579                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6580                                                    &rx_ring->dma, GFP_KERNEL);
6581         if (!rx_ring->desc)
6582                 goto err;
6583
6584         rx_ring->next_to_clean = 0;
6585         rx_ring->next_to_use = 0;
6586
6587         /* XDP RX-queue info */
6588         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6589                              rx_ring->queue_index, rx_ring->q_vector->napi.napi_id) < 0)
6590                 goto err;
6591
6592         rx_ring->xdp_prog = adapter->xdp_prog;
6593
6594         return 0;
6595 err:
6596         vfree(rx_ring->rx_buffer_info);
6597         rx_ring->rx_buffer_info = NULL;
6598         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6599         return -ENOMEM;
6600 }
6601
6602 /**
6603  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6604  * @adapter: board private structure
6605  *
6606  * If this function returns with an error, then it's possible one or
6607  * more of the rings is populated (while the rest are not).  It is the
6608  * callers duty to clean those orphaned rings.
6609  *
6610  * Return 0 on success, negative on failure
6611  **/
6612 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6613 {
6614         int i, err = 0;
6615
6616         for (i = 0; i < adapter->num_rx_queues; i++) {
6617                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6618                 if (!err)
6619                         continue;
6620
6621                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6622                 goto err_setup_rx;
6623         }
6624
6625 #ifdef IXGBE_FCOE
6626         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6627         if (!err)
6628 #endif
6629                 return 0;
6630 err_setup_rx:
6631         /* rewind the index freeing the rings as we go */
6632         while (i--)
6633                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6634         return err;
6635 }
6636
6637 /**
6638  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6639  * @tx_ring: Tx descriptor ring for a specific queue
6640  *
6641  * Free all transmit software resources
6642  **/
6643 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6644 {
6645         ixgbe_clean_tx_ring(tx_ring);
6646
6647         vfree(tx_ring->tx_buffer_info);
6648         tx_ring->tx_buffer_info = NULL;
6649
6650         /* if not set, then don't free */
6651         if (!tx_ring->desc)
6652                 return;
6653
6654         dma_free_coherent(tx_ring->dev, tx_ring->size,
6655                           tx_ring->desc, tx_ring->dma);
6656
6657         tx_ring->desc = NULL;
6658 }
6659
6660 /**
6661  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6662  * @adapter: board private structure
6663  *
6664  * Free all transmit software resources
6665  **/
6666 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6667 {
6668         int i;
6669
6670         for (i = 0; i < adapter->num_tx_queues; i++)
6671                 if (adapter->tx_ring[i]->desc)
6672                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6673         for (i = 0; i < adapter->num_xdp_queues; i++)
6674                 if (adapter->xdp_ring[i]->desc)
6675                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6676 }
6677
6678 /**
6679  * ixgbe_free_rx_resources - Free Rx Resources
6680  * @rx_ring: ring to clean the resources from
6681  *
6682  * Free all receive software resources
6683  **/
6684 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6685 {
6686         ixgbe_clean_rx_ring(rx_ring);
6687
6688         rx_ring->xdp_prog = NULL;
6689         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6690         vfree(rx_ring->rx_buffer_info);
6691         rx_ring->rx_buffer_info = NULL;
6692
6693         /* if not set, then don't free */
6694         if (!rx_ring->desc)
6695                 return;
6696
6697         dma_free_coherent(rx_ring->dev, rx_ring->size,
6698                           rx_ring->desc, rx_ring->dma);
6699
6700         rx_ring->desc = NULL;
6701 }
6702
6703 /**
6704  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6705  * @adapter: board private structure
6706  *
6707  * Free all receive software resources
6708  **/
6709 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6710 {
6711         int i;
6712
6713 #ifdef IXGBE_FCOE
6714         ixgbe_free_fcoe_ddp_resources(adapter);
6715
6716 #endif
6717         for (i = 0; i < adapter->num_rx_queues; i++)
6718                 if (adapter->rx_ring[i]->desc)
6719                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6720 }
6721
6722 /**
6723  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6724  * @netdev: network interface device structure
6725  * @new_mtu: new value for maximum frame size
6726  *
6727  * Returns 0 on success, negative on failure
6728  **/
6729 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6730 {
6731         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6732
6733         if (adapter->xdp_prog) {
6734                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6735                                      VLAN_HLEN;
6736                 int i;
6737
6738                 for (i = 0; i < adapter->num_rx_queues; i++) {
6739                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6740
6741                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6742                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6743                                 return -EINVAL;
6744                         }
6745                 }
6746         }
6747
6748         /*
6749          * For 82599EB we cannot allow legacy VFs to enable their receive
6750          * paths when MTU greater than 1500 is configured.  So display a
6751          * warning that legacy VFs will be disabled.
6752          */
6753         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6754             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6755             (new_mtu > ETH_DATA_LEN))
6756                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6757
6758         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6759                    netdev->mtu, new_mtu);
6760
6761         /* must set new MTU before calling down or up */
6762         netdev->mtu = new_mtu;
6763
6764         if (netif_running(netdev))
6765                 ixgbe_reinit_locked(adapter);
6766
6767         return 0;
6768 }
6769
6770 /**
6771  * ixgbe_open - Called when a network interface is made active
6772  * @netdev: network interface device structure
6773  *
6774  * Returns 0 on success, negative value on failure
6775  *
6776  * The open entry point is called when a network interface is made
6777  * active by the system (IFF_UP).  At this point all resources needed
6778  * for transmit and receive operations are allocated, the interrupt
6779  * handler is registered with the OS, the watchdog timer is started,
6780  * and the stack is notified that the interface is ready.
6781  **/
6782 int ixgbe_open(struct net_device *netdev)
6783 {
6784         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6785         struct ixgbe_hw *hw = &adapter->hw;
6786         int err, queues;
6787
6788         /* disallow open during test */
6789         if (test_bit(__IXGBE_TESTING, &adapter->state))
6790                 return -EBUSY;
6791
6792         netif_carrier_off(netdev);
6793
6794         /* allocate transmit descriptors */
6795         err = ixgbe_setup_all_tx_resources(adapter);
6796         if (err)
6797                 goto err_setup_tx;
6798
6799         /* allocate receive descriptors */
6800         err = ixgbe_setup_all_rx_resources(adapter);
6801         if (err)
6802                 goto err_setup_rx;
6803
6804         ixgbe_configure(adapter);
6805
6806         err = ixgbe_request_irq(adapter);
6807         if (err)
6808                 goto err_req_irq;
6809
6810         /* Notify the stack of the actual queue counts. */
6811         queues = adapter->num_tx_queues;
6812         err = netif_set_real_num_tx_queues(netdev, queues);
6813         if (err)
6814                 goto err_set_queues;
6815
6816         queues = adapter->num_rx_queues;
6817         err = netif_set_real_num_rx_queues(netdev, queues);
6818         if (err)
6819                 goto err_set_queues;
6820
6821         ixgbe_ptp_init(adapter);
6822
6823         ixgbe_up_complete(adapter);
6824
6825         udp_tunnel_nic_reset_ntf(netdev);
6826
6827         return 0;
6828
6829 err_set_queues:
6830         ixgbe_free_irq(adapter);
6831 err_req_irq:
6832         ixgbe_free_all_rx_resources(adapter);
6833         if (hw->phy.ops.set_phy_power && !adapter->wol)
6834                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6835 err_setup_rx:
6836         ixgbe_free_all_tx_resources(adapter);
6837 err_setup_tx:
6838         ixgbe_reset(adapter);
6839
6840         return err;
6841 }
6842
6843 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6844 {
6845         ixgbe_ptp_suspend(adapter);
6846
6847         if (adapter->hw.phy.ops.enter_lplu) {
6848                 adapter->hw.phy.reset_disable = true;
6849                 ixgbe_down(adapter);
6850                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6851                 adapter->hw.phy.reset_disable = false;
6852         } else {
6853                 ixgbe_down(adapter);
6854         }
6855
6856         ixgbe_free_irq(adapter);
6857
6858         ixgbe_free_all_tx_resources(adapter);
6859         ixgbe_free_all_rx_resources(adapter);
6860 }
6861
6862 /**
6863  * ixgbe_close - Disables a network interface
6864  * @netdev: network interface device structure
6865  *
6866  * Returns 0, this is not allowed to fail
6867  *
6868  * The close entry point is called when an interface is de-activated
6869  * by the OS.  The hardware is still under the drivers control, but
6870  * needs to be disabled.  A global MAC reset is issued to stop the
6871  * hardware, and all transmit and receive resources are freed.
6872  **/
6873 int ixgbe_close(struct net_device *netdev)
6874 {
6875         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6876
6877         ixgbe_ptp_stop(adapter);
6878
6879         if (netif_device_present(netdev))
6880                 ixgbe_close_suspend(adapter);
6881
6882         ixgbe_fdir_filter_exit(adapter);
6883
6884         ixgbe_release_hw_control(adapter);
6885
6886         return 0;
6887 }
6888
6889 static int __maybe_unused ixgbe_resume(struct device *dev_d)
6890 {
6891         struct pci_dev *pdev = to_pci_dev(dev_d);
6892         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6893         struct net_device *netdev = adapter->netdev;
6894         u32 err;
6895
6896         adapter->hw.hw_addr = adapter->io_addr;
6897
6898         smp_mb__before_atomic();
6899         clear_bit(__IXGBE_DISABLED, &adapter->state);
6900         pci_set_master(pdev);
6901
6902         device_wakeup_disable(dev_d);
6903
6904         ixgbe_reset(adapter);
6905
6906         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6907
6908         rtnl_lock();
6909         err = ixgbe_init_interrupt_scheme(adapter);
6910         if (!err && netif_running(netdev))
6911                 err = ixgbe_open(netdev);
6912
6913
6914         if (!err)
6915                 netif_device_attach(netdev);
6916         rtnl_unlock();
6917
6918         return err;
6919 }
6920
6921 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6922 {
6923         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6924         struct net_device *netdev = adapter->netdev;
6925         struct ixgbe_hw *hw = &adapter->hw;
6926         u32 ctrl;
6927         u32 wufc = adapter->wol;
6928
6929         rtnl_lock();
6930         netif_device_detach(netdev);
6931
6932         if (netif_running(netdev))
6933                 ixgbe_close_suspend(adapter);
6934
6935         ixgbe_clear_interrupt_scheme(adapter);
6936         rtnl_unlock();
6937
6938         if (hw->mac.ops.stop_link_on_d3)
6939                 hw->mac.ops.stop_link_on_d3(hw);
6940
6941         if (wufc) {
6942                 u32 fctrl;
6943
6944                 ixgbe_set_rx_mode(netdev);
6945
6946                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6947                 if (hw->mac.ops.enable_tx_laser)
6948                         hw->mac.ops.enable_tx_laser(hw);
6949
6950                 /* enable the reception of multicast packets */
6951                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6952                 fctrl |= IXGBE_FCTRL_MPE;
6953                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6954
6955                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6956                 ctrl |= IXGBE_CTRL_GIO_DIS;
6957                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6958
6959                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6960         } else {
6961                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6962                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6963         }
6964
6965         switch (hw->mac.type) {
6966         case ixgbe_mac_82598EB:
6967                 pci_wake_from_d3(pdev, false);
6968                 break;
6969         case ixgbe_mac_82599EB:
6970         case ixgbe_mac_X540:
6971         case ixgbe_mac_X550:
6972         case ixgbe_mac_X550EM_x:
6973         case ixgbe_mac_x550em_a:
6974                 pci_wake_from_d3(pdev, !!wufc);
6975                 break;
6976         default:
6977                 break;
6978         }
6979
6980         *enable_wake = !!wufc;
6981         if (hw->phy.ops.set_phy_power && !*enable_wake)
6982                 hw->phy.ops.set_phy_power(hw, false);
6983
6984         ixgbe_release_hw_control(adapter);
6985
6986         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6987                 pci_disable_device(pdev);
6988
6989         return 0;
6990 }
6991
6992 static int __maybe_unused ixgbe_suspend(struct device *dev_d)
6993 {
6994         struct pci_dev *pdev = to_pci_dev(dev_d);
6995         int retval;
6996         bool wake;
6997
6998         retval = __ixgbe_shutdown(pdev, &wake);
6999
7000         device_set_wakeup_enable(dev_d, wake);
7001
7002         return retval;
7003 }
7004
7005 static void ixgbe_shutdown(struct pci_dev *pdev)
7006 {
7007         bool wake;
7008
7009         __ixgbe_shutdown(pdev, &wake);
7010
7011         if (system_state == SYSTEM_POWER_OFF) {
7012                 pci_wake_from_d3(pdev, wake);
7013                 pci_set_power_state(pdev, PCI_D3hot);
7014         }
7015 }
7016
7017 /**
7018  * ixgbe_update_stats - Update the board statistics counters.
7019  * @adapter: board private structure
7020  **/
7021 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7022 {
7023         struct net_device *netdev = adapter->netdev;
7024         struct ixgbe_hw *hw = &adapter->hw;
7025         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7026         u64 total_mpc = 0;
7027         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7028         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7029         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7030         u64 alloc_rx_page = 0;
7031         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7032
7033         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7034             test_bit(__IXGBE_RESETTING, &adapter->state))
7035                 return;
7036
7037         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7038                 u64 rsc_count = 0;
7039                 u64 rsc_flush = 0;
7040                 for (i = 0; i < adapter->num_rx_queues; i++) {
7041                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7042                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7043                 }
7044                 adapter->rsc_total_count = rsc_count;
7045                 adapter->rsc_total_flush = rsc_flush;
7046         }
7047
7048         for (i = 0; i < adapter->num_rx_queues; i++) {
7049                 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]);
7050
7051                 if (!rx_ring)
7052                         continue;
7053                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7054                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7055                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7056                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7057                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7058                 bytes += rx_ring->stats.bytes;
7059                 packets += rx_ring->stats.packets;
7060         }
7061         adapter->non_eop_descs = non_eop_descs;
7062         adapter->alloc_rx_page = alloc_rx_page;
7063         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7064         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7065         adapter->hw_csum_rx_error = hw_csum_rx_error;
7066         netdev->stats.rx_bytes = bytes;
7067         netdev->stats.rx_packets = packets;
7068
7069         bytes = 0;
7070         packets = 0;
7071         /* gather some stats to the adapter struct that are per queue */
7072         for (i = 0; i < adapter->num_tx_queues; i++) {
7073                 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]);
7074
7075                 if (!tx_ring)
7076                         continue;
7077                 restart_queue += tx_ring->tx_stats.restart_queue;
7078                 tx_busy += tx_ring->tx_stats.tx_busy;
7079                 bytes += tx_ring->stats.bytes;
7080                 packets += tx_ring->stats.packets;
7081         }
7082         for (i = 0; i < adapter->num_xdp_queues; i++) {
7083                 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]);
7084
7085                 if (!xdp_ring)
7086                         continue;
7087                 restart_queue += xdp_ring->tx_stats.restart_queue;
7088                 tx_busy += xdp_ring->tx_stats.tx_busy;
7089                 bytes += xdp_ring->stats.bytes;
7090                 packets += xdp_ring->stats.packets;
7091         }
7092         adapter->restart_queue = restart_queue;
7093         adapter->tx_busy = tx_busy;
7094         netdev->stats.tx_bytes = bytes;
7095         netdev->stats.tx_packets = packets;
7096
7097         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7098
7099         /* 8 register reads */
7100         for (i = 0; i < 8; i++) {
7101                 /* for packet buffers not used, the register should read 0 */
7102                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7103                 missed_rx += mpc;
7104                 hwstats->mpc[i] += mpc;
7105                 total_mpc += hwstats->mpc[i];
7106                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7107                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7108                 switch (hw->mac.type) {
7109                 case ixgbe_mac_82598EB:
7110                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7111                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7112                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7113                         hwstats->pxonrxc[i] +=
7114                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7115                         break;
7116                 case ixgbe_mac_82599EB:
7117                 case ixgbe_mac_X540:
7118                 case ixgbe_mac_X550:
7119                 case ixgbe_mac_X550EM_x:
7120                 case ixgbe_mac_x550em_a:
7121                         hwstats->pxonrxc[i] +=
7122                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7123                         break;
7124                 default:
7125                         break;
7126                 }
7127         }
7128
7129         /*16 register reads */
7130         for (i = 0; i < 16; i++) {
7131                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7132                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7133                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7134                     (hw->mac.type == ixgbe_mac_X540) ||
7135                     (hw->mac.type == ixgbe_mac_X550) ||
7136                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7137                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7138                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7139                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7140                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7141                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7142                 }
7143         }
7144
7145         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7146         /* work around hardware counting issue */
7147         hwstats->gprc -= missed_rx;
7148
7149         ixgbe_update_xoff_received(adapter);
7150
7151         /* 82598 hardware only has a 32 bit counter in the high register */
7152         switch (hw->mac.type) {
7153         case ixgbe_mac_82598EB:
7154                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7155                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7156                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7157                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7158                 break;
7159         case ixgbe_mac_X540:
7160         case ixgbe_mac_X550:
7161         case ixgbe_mac_X550EM_x:
7162         case ixgbe_mac_x550em_a:
7163                 /* OS2BMC stats are X540 and later */
7164                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7165                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7166                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7167                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7168                 fallthrough;
7169         case ixgbe_mac_82599EB:
7170                 for (i = 0; i < 16; i++)
7171                         adapter->hw_rx_no_dma_resources +=
7172                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7173                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7174                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7175                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7176                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7177                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7178                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7179                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7180                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7181                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7182 #ifdef IXGBE_FCOE
7183                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7184                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7185                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7186                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7187                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7188                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7189                 /* Add up per cpu counters for total ddp aloc fail */
7190                 if (adapter->fcoe.ddp_pool) {
7191                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7192                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7193                         unsigned int cpu;
7194                         u64 noddp = 0, noddp_ext_buff = 0;
7195                         for_each_possible_cpu(cpu) {
7196                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7197                                 noddp += ddp_pool->noddp;
7198                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7199                         }
7200                         hwstats->fcoe_noddp = noddp;
7201                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7202                 }
7203 #endif /* IXGBE_FCOE */
7204                 break;
7205         default:
7206                 break;
7207         }
7208         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7209         hwstats->bprc += bprc;
7210         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7211         if (hw->mac.type == ixgbe_mac_82598EB)
7212                 hwstats->mprc -= bprc;
7213         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7214         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7215         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7216         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7217         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7218         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7219         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7220         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7221         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7222         hwstats->lxontxc += lxon;
7223         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7224         hwstats->lxofftxc += lxoff;
7225         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7226         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7227         /*
7228          * 82598 errata - tx of flow control packets is included in tx counters
7229          */
7230         xon_off_tot = lxon + lxoff;
7231         hwstats->gptc -= xon_off_tot;
7232         hwstats->mptc -= xon_off_tot;
7233         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7234         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7235         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7236         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7237         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7238         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7239         hwstats->ptc64 -= xon_off_tot;
7240         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7241         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7242         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7243         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7244         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7245         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7246
7247         /* Fill out the OS statistics structure */
7248         netdev->stats.multicast = hwstats->mprc;
7249
7250         /* Rx Errors */
7251         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7252         netdev->stats.rx_dropped = 0;
7253         netdev->stats.rx_length_errors = hwstats->rlec;
7254         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7255         netdev->stats.rx_missed_errors = total_mpc;
7256 }
7257
7258 /**
7259  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7260  * @adapter: pointer to the device adapter structure
7261  **/
7262 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7263 {
7264         struct ixgbe_hw *hw = &adapter->hw;
7265         int i;
7266
7267         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7268                 return;
7269
7270         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7271
7272         /* if interface is down do nothing */
7273         if (test_bit(__IXGBE_DOWN, &adapter->state))
7274                 return;
7275
7276         /* do nothing if we are not using signature filters */
7277         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7278                 return;
7279
7280         adapter->fdir_overflow++;
7281
7282         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7283                 for (i = 0; i < adapter->num_tx_queues; i++)
7284                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7285                                 &(adapter->tx_ring[i]->state));
7286                 for (i = 0; i < adapter->num_xdp_queues; i++)
7287                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7288                                 &adapter->xdp_ring[i]->state);
7289                 /* re-enable flow director interrupts */
7290                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7291         } else {
7292                 e_err(probe, "failed to finish FDIR re-initialization, "
7293                       "ignored adding FDIR ATR filters\n");
7294         }
7295 }
7296
7297 /**
7298  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7299  * @adapter: pointer to the device adapter structure
7300  *
7301  * This function serves two purposes.  First it strobes the interrupt lines
7302  * in order to make certain interrupts are occurring.  Secondly it sets the
7303  * bits needed to check for TX hangs.  As a result we should immediately
7304  * determine if a hang has occurred.
7305  */
7306 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7307 {
7308         struct ixgbe_hw *hw = &adapter->hw;
7309         u64 eics = 0;
7310         int i;
7311
7312         /* If we're down, removing or resetting, just bail */
7313         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7314             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7315             test_bit(__IXGBE_RESETTING, &adapter->state))
7316                 return;
7317
7318         /* Force detection of hung controller */
7319         if (netif_carrier_ok(adapter->netdev)) {
7320                 for (i = 0; i < adapter->num_tx_queues; i++)
7321                         set_check_for_tx_hang(adapter->tx_ring[i]);
7322                 for (i = 0; i < adapter->num_xdp_queues; i++)
7323                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7324         }
7325
7326         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7327                 /*
7328                  * for legacy and MSI interrupts don't set any bits
7329                  * that are enabled for EIAM, because this operation
7330                  * would set *both* EIMS and EICS for any bit in EIAM
7331                  */
7332                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7333                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7334         } else {
7335                 /* get one bit for every active tx/rx interrupt vector */
7336                 for (i = 0; i < adapter->num_q_vectors; i++) {
7337                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7338                         if (qv->rx.ring || qv->tx.ring)
7339                                 eics |= BIT_ULL(i);
7340                 }
7341         }
7342
7343         /* Cause software interrupt to ensure rings are cleaned */
7344         ixgbe_irq_rearm_queues(adapter, eics);
7345 }
7346
7347 /**
7348  * ixgbe_watchdog_update_link - update the link status
7349  * @adapter: pointer to the device adapter structure
7350  **/
7351 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7352 {
7353         struct ixgbe_hw *hw = &adapter->hw;
7354         u32 link_speed = adapter->link_speed;
7355         bool link_up = adapter->link_up;
7356         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7357
7358         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7359                 return;
7360
7361         if (hw->mac.ops.check_link) {
7362                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7363         } else {
7364                 /* always assume link is up, if no check link function */
7365                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7366                 link_up = true;
7367         }
7368
7369         if (adapter->ixgbe_ieee_pfc)
7370                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7371
7372         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7373                 hw->mac.ops.fc_enable(hw);
7374                 ixgbe_set_rx_drop_en(adapter);
7375         }
7376
7377         if (link_up ||
7378             time_after(jiffies, (adapter->link_check_timeout +
7379                                  IXGBE_TRY_LINK_TIMEOUT))) {
7380                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7381                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7382                 IXGBE_WRITE_FLUSH(hw);
7383         }
7384
7385         adapter->link_up = link_up;
7386         adapter->link_speed = link_speed;
7387 }
7388
7389 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7390 {
7391 #ifdef CONFIG_IXGBE_DCB
7392         struct net_device *netdev = adapter->netdev;
7393         struct dcb_app app = {
7394                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7395                               .protocol = 0,
7396                              };
7397         u8 up = 0;
7398
7399         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7400                 up = dcb_ieee_getapp_mask(netdev, &app);
7401
7402         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7403 #endif
7404 }
7405
7406 /**
7407  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7408  *                             print link up message
7409  * @adapter: pointer to the device adapter structure
7410  **/
7411 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7412 {
7413         struct net_device *netdev = adapter->netdev;
7414         struct ixgbe_hw *hw = &adapter->hw;
7415         u32 link_speed = adapter->link_speed;
7416         const char *speed_str;
7417         bool flow_rx, flow_tx;
7418
7419         /* only continue if link was previously down */
7420         if (netif_carrier_ok(netdev))
7421                 return;
7422
7423         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7424
7425         switch (hw->mac.type) {
7426         case ixgbe_mac_82598EB: {
7427                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7428                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7429                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7430                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7431         }
7432                 break;
7433         case ixgbe_mac_X540:
7434         case ixgbe_mac_X550:
7435         case ixgbe_mac_X550EM_x:
7436         case ixgbe_mac_x550em_a:
7437         case ixgbe_mac_82599EB: {
7438                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7439                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7440                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7441                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7442         }
7443                 break;
7444         default:
7445                 flow_tx = false;
7446                 flow_rx = false;
7447                 break;
7448         }
7449
7450         adapter->last_rx_ptp_check = jiffies;
7451
7452         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7453                 ixgbe_ptp_start_cyclecounter(adapter);
7454
7455         switch (link_speed) {
7456         case IXGBE_LINK_SPEED_10GB_FULL:
7457                 speed_str = "10 Gbps";
7458                 break;
7459         case IXGBE_LINK_SPEED_5GB_FULL:
7460                 speed_str = "5 Gbps";
7461                 break;
7462         case IXGBE_LINK_SPEED_2_5GB_FULL:
7463                 speed_str = "2.5 Gbps";
7464                 break;
7465         case IXGBE_LINK_SPEED_1GB_FULL:
7466                 speed_str = "1 Gbps";
7467                 break;
7468         case IXGBE_LINK_SPEED_100_FULL:
7469                 speed_str = "100 Mbps";
7470                 break;
7471         case IXGBE_LINK_SPEED_10_FULL:
7472                 speed_str = "10 Mbps";
7473                 break;
7474         default:
7475                 speed_str = "unknown speed";
7476                 break;
7477         }
7478         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7479                ((flow_rx && flow_tx) ? "RX/TX" :
7480                (flow_rx ? "RX" :
7481                (flow_tx ? "TX" : "None"))));
7482
7483         netif_carrier_on(netdev);
7484         ixgbe_check_vf_rate_limit(adapter);
7485
7486         /* enable transmits */
7487         netif_tx_wake_all_queues(adapter->netdev);
7488
7489         /* update the default user priority for VFs */
7490         ixgbe_update_default_up(adapter);
7491
7492         /* ping all the active vfs to let them know link has changed */
7493         ixgbe_ping_all_vfs(adapter);
7494 }
7495
7496 /**
7497  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7498  *                               print link down message
7499  * @adapter: pointer to the adapter structure
7500  **/
7501 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7502 {
7503         struct net_device *netdev = adapter->netdev;
7504         struct ixgbe_hw *hw = &adapter->hw;
7505
7506         adapter->link_up = false;
7507         adapter->link_speed = 0;
7508
7509         /* only continue if link was up previously */
7510         if (!netif_carrier_ok(netdev))
7511                 return;
7512
7513         /* poll for SFP+ cable when link is down */
7514         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7515                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7516
7517         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7518                 ixgbe_ptp_start_cyclecounter(adapter);
7519
7520         e_info(drv, "NIC Link is Down\n");
7521         netif_carrier_off(netdev);
7522
7523         /* ping all the active vfs to let them know link has changed */
7524         ixgbe_ping_all_vfs(adapter);
7525 }
7526
7527 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7528 {
7529         int i;
7530
7531         for (i = 0; i < adapter->num_tx_queues; i++) {
7532                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7533
7534                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7535                         return true;
7536         }
7537
7538         for (i = 0; i < adapter->num_xdp_queues; i++) {
7539                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7540
7541                 if (ring->next_to_use != ring->next_to_clean)
7542                         return true;
7543         }
7544
7545         return false;
7546 }
7547
7548 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7549 {
7550         struct ixgbe_hw *hw = &adapter->hw;
7551         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7552         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7553
7554         int i, j;
7555
7556         if (!adapter->num_vfs)
7557                 return false;
7558
7559         /* resetting the PF is only needed for MAC before X550 */
7560         if (hw->mac.type >= ixgbe_mac_X550)
7561                 return false;
7562
7563         for (i = 0; i < adapter->num_vfs; i++) {
7564                 for (j = 0; j < q_per_pool; j++) {
7565                         u32 h, t;
7566
7567                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7568                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7569
7570                         if (h != t)
7571                                 return true;
7572                 }
7573         }
7574
7575         return false;
7576 }
7577
7578 /**
7579  * ixgbe_watchdog_flush_tx - flush queues on link down
7580  * @adapter: pointer to the device adapter structure
7581  **/
7582 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7583 {
7584         if (!netif_carrier_ok(adapter->netdev)) {
7585                 if (ixgbe_ring_tx_pending(adapter) ||
7586                     ixgbe_vf_tx_pending(adapter)) {
7587                         /* We've lost link, so the controller stops DMA,
7588                          * but we've got queued Tx work that's never going
7589                          * to get done, so reset controller to flush Tx.
7590                          * (Do the reset outside of interrupt context).
7591                          */
7592                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7593                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7594                 }
7595         }
7596 }
7597
7598 #ifdef CONFIG_PCI_IOV
7599 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7600 {
7601         struct ixgbe_hw *hw = &adapter->hw;
7602         struct pci_dev *pdev = adapter->pdev;
7603         unsigned int vf;
7604         u32 gpc;
7605
7606         if (!(netif_carrier_ok(adapter->netdev)))
7607                 return;
7608
7609         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7610         if (gpc) /* If incrementing then no need for the check below */
7611                 return;
7612         /* Check to see if a bad DMA write target from an errant or
7613          * malicious VF has caused a PCIe error.  If so then we can
7614          * issue a VFLR to the offending VF(s) and then resume without
7615          * requesting a full slot reset.
7616          */
7617
7618         if (!pdev)
7619                 return;
7620
7621         /* check status reg for all VFs owned by this PF */
7622         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7623                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7624                 u16 status_reg;
7625
7626                 if (!vfdev)
7627                         continue;
7628                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7629                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7630                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7631                         pcie_flr(vfdev);
7632         }
7633 }
7634
7635 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7636 {
7637         u32 ssvpc;
7638
7639         /* Do not perform spoof check for 82598 or if not in IOV mode */
7640         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7641             adapter->num_vfs == 0)
7642                 return;
7643
7644         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7645
7646         /*
7647          * ssvpc register is cleared on read, if zero then no
7648          * spoofed packets in the last interval.
7649          */
7650         if (!ssvpc)
7651                 return;
7652
7653         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7654 }
7655 #else
7656 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7657 {
7658 }
7659
7660 static void
7661 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7662 {
7663 }
7664 #endif /* CONFIG_PCI_IOV */
7665
7666
7667 /**
7668  * ixgbe_watchdog_subtask - check and bring link up
7669  * @adapter: pointer to the device adapter structure
7670  **/
7671 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7672 {
7673         /* if interface is down, removing or resetting, do nothing */
7674         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7675             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7676             test_bit(__IXGBE_RESETTING, &adapter->state))
7677                 return;
7678
7679         ixgbe_watchdog_update_link(adapter);
7680
7681         if (adapter->link_up)
7682                 ixgbe_watchdog_link_is_up(adapter);
7683         else
7684                 ixgbe_watchdog_link_is_down(adapter);
7685
7686         ixgbe_check_for_bad_vf(adapter);
7687         ixgbe_spoof_check(adapter);
7688         ixgbe_update_stats(adapter);
7689
7690         ixgbe_watchdog_flush_tx(adapter);
7691 }
7692
7693 /**
7694  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7695  * @adapter: the ixgbe adapter structure
7696  **/
7697 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7698 {
7699         struct ixgbe_hw *hw = &adapter->hw;
7700         s32 err;
7701
7702         /* not searching for SFP so there is nothing to do here */
7703         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7704             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7705                 return;
7706
7707         if (adapter->sfp_poll_time &&
7708             time_after(adapter->sfp_poll_time, jiffies))
7709                 return; /* If not yet time to poll for SFP */
7710
7711         /* someone else is in init, wait until next service event */
7712         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7713                 return;
7714
7715         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7716
7717         err = hw->phy.ops.identify_sfp(hw);
7718         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7719                 goto sfp_out;
7720
7721         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7722                 /* If no cable is present, then we need to reset
7723                  * the next time we find a good cable. */
7724                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7725         }
7726
7727         /* exit on error */
7728         if (err)
7729                 goto sfp_out;
7730
7731         /* exit if reset not needed */
7732         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7733                 goto sfp_out;
7734
7735         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7736
7737         /*
7738          * A module may be identified correctly, but the EEPROM may not have
7739          * support for that module.  setup_sfp() will fail in that case, so
7740          * we should not allow that module to load.
7741          */
7742         if (hw->mac.type == ixgbe_mac_82598EB)
7743                 err = hw->phy.ops.reset(hw);
7744         else
7745                 err = hw->mac.ops.setup_sfp(hw);
7746
7747         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7748                 goto sfp_out;
7749
7750         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7751         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7752
7753 sfp_out:
7754         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7755
7756         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7757             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7758                 e_dev_err("failed to initialize because an unsupported "
7759                           "SFP+ module type was detected.\n");
7760                 e_dev_err("Reload the driver after installing a "
7761                           "supported module.\n");
7762                 unregister_netdev(adapter->netdev);
7763         }
7764 }
7765
7766 /**
7767  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7768  * @adapter: the ixgbe adapter structure
7769  **/
7770 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7771 {
7772         struct ixgbe_hw *hw = &adapter->hw;
7773         u32 cap_speed;
7774         u32 speed;
7775         bool autoneg = false;
7776
7777         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7778                 return;
7779
7780         /* someone else is in init, wait until next service event */
7781         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7782                 return;
7783
7784         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7785
7786         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7787
7788         /* advertise highest capable link speed */
7789         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7790                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7791         else
7792                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7793                                      IXGBE_LINK_SPEED_1GB_FULL);
7794
7795         if (hw->mac.ops.setup_link)
7796                 hw->mac.ops.setup_link(hw, speed, true);
7797
7798         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7799         adapter->link_check_timeout = jiffies;
7800         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7801 }
7802
7803 /**
7804  * ixgbe_service_timer - Timer Call-back
7805  * @t: pointer to timer_list structure
7806  **/
7807 static void ixgbe_service_timer(struct timer_list *t)
7808 {
7809         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7810         unsigned long next_event_offset;
7811
7812         /* poll faster when waiting for link */
7813         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7814                 next_event_offset = HZ / 10;
7815         else
7816                 next_event_offset = HZ * 2;
7817
7818         /* Reset the timer */
7819         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7820
7821         ixgbe_service_event_schedule(adapter);
7822 }
7823
7824 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7825 {
7826         struct ixgbe_hw *hw = &adapter->hw;
7827         u32 status;
7828
7829         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7830                 return;
7831
7832         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7833
7834         if (!hw->phy.ops.handle_lasi)
7835                 return;
7836
7837         status = hw->phy.ops.handle_lasi(&adapter->hw);
7838         if (status != IXGBE_ERR_OVERTEMP)
7839                 return;
7840
7841         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7842 }
7843
7844 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7845 {
7846         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7847                 return;
7848
7849         rtnl_lock();
7850         /* If we're already down, removing or resetting, just bail */
7851         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7852             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7853             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7854                 rtnl_unlock();
7855                 return;
7856         }
7857
7858         ixgbe_dump(adapter);
7859         netdev_err(adapter->netdev, "Reset adapter\n");
7860         adapter->tx_timeout_count++;
7861
7862         ixgbe_reinit_locked(adapter);
7863         rtnl_unlock();
7864 }
7865
7866 /**
7867  * ixgbe_check_fw_error - Check firmware for errors
7868  * @adapter: the adapter private structure
7869  *
7870  * Check firmware errors in register FWSM
7871  */
7872 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7873 {
7874         struct ixgbe_hw *hw = &adapter->hw;
7875         u32 fwsm;
7876
7877         /* read fwsm.ext_err_ind register and log errors */
7878         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7879
7880         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7881             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7882                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7883                            fwsm);
7884
7885         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7886                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7887                 return true;
7888         }
7889
7890         return false;
7891 }
7892
7893 /**
7894  * ixgbe_service_task - manages and runs subtasks
7895  * @work: pointer to work_struct containing our data
7896  **/
7897 static void ixgbe_service_task(struct work_struct *work)
7898 {
7899         struct ixgbe_adapter *adapter = container_of(work,
7900                                                      struct ixgbe_adapter,
7901                                                      service_task);
7902         if (ixgbe_removed(adapter->hw.hw_addr)) {
7903                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7904                         rtnl_lock();
7905                         ixgbe_down(adapter);
7906                         rtnl_unlock();
7907                 }
7908                 ixgbe_service_event_complete(adapter);
7909                 return;
7910         }
7911         if (ixgbe_check_fw_error(adapter)) {
7912                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
7913                         unregister_netdev(adapter->netdev);
7914                 ixgbe_service_event_complete(adapter);
7915                 return;
7916         }
7917         ixgbe_reset_subtask(adapter);
7918         ixgbe_phy_interrupt_subtask(adapter);
7919         ixgbe_sfp_detection_subtask(adapter);
7920         ixgbe_sfp_link_config_subtask(adapter);
7921         ixgbe_check_overtemp_subtask(adapter);
7922         ixgbe_watchdog_subtask(adapter);
7923         ixgbe_fdir_reinit_subtask(adapter);
7924         ixgbe_check_hang_subtask(adapter);
7925
7926         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7927                 ixgbe_ptp_overflow_check(adapter);
7928                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7929                         ixgbe_ptp_rx_hang(adapter);
7930                 ixgbe_ptp_tx_hang(adapter);
7931         }
7932
7933         ixgbe_service_event_complete(adapter);
7934 }
7935
7936 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7937                      struct ixgbe_tx_buffer *first,
7938                      u8 *hdr_len,
7939                      struct ixgbe_ipsec_tx_data *itd)
7940 {
7941         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7942         struct sk_buff *skb = first->skb;
7943         union {
7944                 struct iphdr *v4;
7945                 struct ipv6hdr *v6;
7946                 unsigned char *hdr;
7947         } ip;
7948         union {
7949                 struct tcphdr *tcp;
7950                 struct udphdr *udp;
7951                 unsigned char *hdr;
7952         } l4;
7953         u32 paylen, l4_offset;
7954         u32 fceof_saidx = 0;
7955         int err;
7956
7957         if (skb->ip_summed != CHECKSUM_PARTIAL)
7958                 return 0;
7959
7960         if (!skb_is_gso(skb))
7961                 return 0;
7962
7963         err = skb_cow_head(skb, 0);
7964         if (err < 0)
7965                 return err;
7966
7967         if (eth_p_mpls(first->protocol))
7968                 ip.hdr = skb_inner_network_header(skb);
7969         else
7970                 ip.hdr = skb_network_header(skb);
7971         l4.hdr = skb_checksum_start(skb);
7972
7973         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7974         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
7975                       IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP;
7976
7977         /* initialize outer IP header fields */
7978         if (ip.v4->version == 4) {
7979                 unsigned char *csum_start = skb_checksum_start(skb);
7980                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7981                 int len = csum_start - trans_start;
7982
7983                 /* IP header will have to cancel out any data that
7984                  * is not a part of the outer IP header, so set to
7985                  * a reverse csum if needed, else init check to 0.
7986                  */
7987                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7988                                            csum_fold(csum_partial(trans_start,
7989                                                                   len, 0)) : 0;
7990                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7991
7992                 ip.v4->tot_len = 0;
7993                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7994                                    IXGBE_TX_FLAGS_CSUM |
7995                                    IXGBE_TX_FLAGS_IPV4;
7996         } else {
7997                 ip.v6->payload_len = 0;
7998                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7999                                    IXGBE_TX_FLAGS_CSUM;
8000         }
8001
8002         /* determine offset of inner transport header */
8003         l4_offset = l4.hdr - skb->data;
8004
8005         /* remove payload length from inner checksum */
8006         paylen = skb->len - l4_offset;
8007
8008         if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) {
8009                 /* compute length of segmentation header */
8010                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
8011                 csum_replace_by_diff(&l4.tcp->check,
8012                                      (__force __wsum)htonl(paylen));
8013         } else {
8014                 /* compute length of segmentation header */
8015                 *hdr_len = sizeof(*l4.udp) + l4_offset;
8016                 csum_replace_by_diff(&l4.udp->check,
8017                                      (__force __wsum)htonl(paylen));
8018         }
8019
8020         /* update gso size and bytecount with header size */
8021         first->gso_segs = skb_shinfo(skb)->gso_segs;
8022         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8023
8024         /* mss_l4len_id: use 0 as index for TSO */
8025         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8026         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8027
8028         fceof_saidx |= itd->sa_idx;
8029         type_tucmd |= itd->flags | itd->trailer_len;
8030
8031         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8032         vlan_macip_lens = l4.hdr - ip.hdr;
8033         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8034         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8035
8036         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8037                           mss_l4len_idx);
8038
8039         return 1;
8040 }
8041
8042 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8043                           struct ixgbe_tx_buffer *first,
8044                           struct ixgbe_ipsec_tx_data *itd)
8045 {
8046         struct sk_buff *skb = first->skb;
8047         u32 vlan_macip_lens = 0;
8048         u32 fceof_saidx = 0;
8049         u32 type_tucmd = 0;
8050
8051         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8052 csum_failed:
8053                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8054                                          IXGBE_TX_FLAGS_CC)))
8055                         return;
8056                 goto no_csum;
8057         }
8058
8059         switch (skb->csum_offset) {
8060         case offsetof(struct tcphdr, check):
8061                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8062                 fallthrough;
8063         case offsetof(struct udphdr, check):
8064                 break;
8065         case offsetof(struct sctphdr, checksum):
8066                 /* validate that this is actually an SCTP request */
8067                 if (skb_csum_is_sctp(skb)) {
8068                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8069                         break;
8070                 }
8071                 fallthrough;
8072         default:
8073                 skb_checksum_help(skb);
8074                 goto csum_failed;
8075         }
8076
8077         /* update TX checksum flag */
8078         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8079         vlan_macip_lens = skb_checksum_start_offset(skb) -
8080                           skb_network_offset(skb);
8081 no_csum:
8082         /* vlan_macip_lens: MACLEN, VLAN tag */
8083         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8084         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8085
8086         fceof_saidx |= itd->sa_idx;
8087         type_tucmd |= itd->flags | itd->trailer_len;
8088
8089         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8090 }
8091
8092 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8093         ((_flag <= _result) ? \
8094          ((u32)(_input & _flag) * (_result / _flag)) : \
8095          ((u32)(_input & _flag) / (_flag / _result)))
8096
8097 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8098 {
8099         /* set type for advanced descriptor with frame checksum insertion */
8100         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8101                        IXGBE_ADVTXD_DCMD_DEXT |
8102                        IXGBE_ADVTXD_DCMD_IFCS;
8103
8104         /* set HW vlan bit if vlan is present */
8105         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8106                                    IXGBE_ADVTXD_DCMD_VLE);
8107
8108         /* set segmentation enable bits for TSO/FSO */
8109         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8110                                    IXGBE_ADVTXD_DCMD_TSE);
8111
8112         /* set timestamp bit if present */
8113         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8114                                    IXGBE_ADVTXD_MAC_TSTAMP);
8115
8116         /* insert frame checksum */
8117         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8118
8119         return cmd_type;
8120 }
8121
8122 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8123                                    u32 tx_flags, unsigned int paylen)
8124 {
8125         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8126
8127         /* enable L4 checksum for TSO and TX checksum offload */
8128         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8129                                         IXGBE_TX_FLAGS_CSUM,
8130                                         IXGBE_ADVTXD_POPTS_TXSM);
8131
8132         /* enable IPv4 checksum for TSO */
8133         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8134                                         IXGBE_TX_FLAGS_IPV4,
8135                                         IXGBE_ADVTXD_POPTS_IXSM);
8136
8137         /* enable IPsec */
8138         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8139                                         IXGBE_TX_FLAGS_IPSEC,
8140                                         IXGBE_ADVTXD_POPTS_IPSEC);
8141
8142         /*
8143          * Check Context must be set if Tx switch is enabled, which it
8144          * always is for case where virtual functions are running
8145          */
8146         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8147                                         IXGBE_TX_FLAGS_CC,
8148                                         IXGBE_ADVTXD_CC);
8149
8150         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8151 }
8152
8153 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8154 {
8155         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8156
8157         /* Herbert's original patch had:
8158          *  smp_mb__after_netif_stop_queue();
8159          * but since that doesn't exist yet, just open code it.
8160          */
8161         smp_mb();
8162
8163         /* We need to check again in a case another CPU has just
8164          * made room available.
8165          */
8166         if (likely(ixgbe_desc_unused(tx_ring) < size))
8167                 return -EBUSY;
8168
8169         /* A reprieve! - use start_queue because it doesn't call schedule */
8170         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8171         ++tx_ring->tx_stats.restart_queue;
8172         return 0;
8173 }
8174
8175 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8176 {
8177         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8178                 return 0;
8179
8180         return __ixgbe_maybe_stop_tx(tx_ring, size);
8181 }
8182
8183 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8184                         struct ixgbe_tx_buffer *first,
8185                         const u8 hdr_len)
8186 {
8187         struct sk_buff *skb = first->skb;
8188         struct ixgbe_tx_buffer *tx_buffer;
8189         union ixgbe_adv_tx_desc *tx_desc;
8190         skb_frag_t *frag;
8191         dma_addr_t dma;
8192         unsigned int data_len, size;
8193         u32 tx_flags = first->tx_flags;
8194         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8195         u16 i = tx_ring->next_to_use;
8196
8197         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8198
8199         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8200
8201         size = skb_headlen(skb);
8202         data_len = skb->data_len;
8203
8204 #ifdef IXGBE_FCOE
8205         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8206                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8207                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8208                         data_len = 0;
8209                 } else {
8210                         data_len -= sizeof(struct fcoe_crc_eof);
8211                 }
8212         }
8213
8214 #endif
8215         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8216
8217         tx_buffer = first;
8218
8219         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8220                 if (dma_mapping_error(tx_ring->dev, dma))
8221                         goto dma_error;
8222
8223                 /* record length, and DMA address */
8224                 dma_unmap_len_set(tx_buffer, len, size);
8225                 dma_unmap_addr_set(tx_buffer, dma, dma);
8226
8227                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8228
8229                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8230                         tx_desc->read.cmd_type_len =
8231                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8232
8233                         i++;
8234                         tx_desc++;
8235                         if (i == tx_ring->count) {
8236                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8237                                 i = 0;
8238                         }
8239                         tx_desc->read.olinfo_status = 0;
8240
8241                         dma += IXGBE_MAX_DATA_PER_TXD;
8242                         size -= IXGBE_MAX_DATA_PER_TXD;
8243
8244                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8245                 }
8246
8247                 if (likely(!data_len))
8248                         break;
8249
8250                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8251
8252                 i++;
8253                 tx_desc++;
8254                 if (i == tx_ring->count) {
8255                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8256                         i = 0;
8257                 }
8258                 tx_desc->read.olinfo_status = 0;
8259
8260 #ifdef IXGBE_FCOE
8261                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8262 #else
8263                 size = skb_frag_size(frag);
8264 #endif
8265                 data_len -= size;
8266
8267                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8268                                        DMA_TO_DEVICE);
8269
8270                 tx_buffer = &tx_ring->tx_buffer_info[i];
8271         }
8272
8273         /* write last descriptor with RS and EOP bits */
8274         cmd_type |= size | IXGBE_TXD_CMD;
8275         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8276
8277         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8278
8279         /* set the timestamp */
8280         first->time_stamp = jiffies;
8281
8282         skb_tx_timestamp(skb);
8283
8284         /*
8285          * Force memory writes to complete before letting h/w know there
8286          * are new descriptors to fetch.  (Only applicable for weak-ordered
8287          * memory model archs, such as IA-64).
8288          *
8289          * We also need this memory barrier to make certain all of the
8290          * status bits have been updated before next_to_watch is written.
8291          */
8292         wmb();
8293
8294         /* set next_to_watch value indicating a packet is present */
8295         first->next_to_watch = tx_desc;
8296
8297         i++;
8298         if (i == tx_ring->count)
8299                 i = 0;
8300
8301         tx_ring->next_to_use = i;
8302
8303         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8304
8305         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8306                 writel(i, tx_ring->tail);
8307         }
8308
8309         return 0;
8310 dma_error:
8311         dev_err(tx_ring->dev, "TX DMA map failed\n");
8312
8313         /* clear dma mappings for failed tx_buffer_info map */
8314         for (;;) {
8315                 tx_buffer = &tx_ring->tx_buffer_info[i];
8316                 if (dma_unmap_len(tx_buffer, len))
8317                         dma_unmap_page(tx_ring->dev,
8318                                        dma_unmap_addr(tx_buffer, dma),
8319                                        dma_unmap_len(tx_buffer, len),
8320                                        DMA_TO_DEVICE);
8321                 dma_unmap_len_set(tx_buffer, len, 0);
8322                 if (tx_buffer == first)
8323                         break;
8324                 if (i == 0)
8325                         i += tx_ring->count;
8326                 i--;
8327         }
8328
8329         dev_kfree_skb_any(first->skb);
8330         first->skb = NULL;
8331
8332         tx_ring->next_to_use = i;
8333
8334         return -1;
8335 }
8336
8337 static void ixgbe_atr(struct ixgbe_ring *ring,
8338                       struct ixgbe_tx_buffer *first)
8339 {
8340         struct ixgbe_q_vector *q_vector = ring->q_vector;
8341         union ixgbe_atr_hash_dword input = { .dword = 0 };
8342         union ixgbe_atr_hash_dword common = { .dword = 0 };
8343         union {
8344                 unsigned char *network;
8345                 struct iphdr *ipv4;
8346                 struct ipv6hdr *ipv6;
8347         } hdr;
8348         struct tcphdr *th;
8349         unsigned int hlen;
8350         struct sk_buff *skb;
8351         __be16 vlan_id;
8352         int l4_proto;
8353
8354         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8355         if (!q_vector)
8356                 return;
8357
8358         /* do nothing if sampling is disabled */
8359         if (!ring->atr_sample_rate)
8360                 return;
8361
8362         ring->atr_count++;
8363
8364         /* currently only IPv4/IPv6 with TCP is supported */
8365         if ((first->protocol != htons(ETH_P_IP)) &&
8366             (first->protocol != htons(ETH_P_IPV6)))
8367                 return;
8368
8369         /* snag network header to get L4 type and address */
8370         skb = first->skb;
8371         hdr.network = skb_network_header(skb);
8372         if (unlikely(hdr.network <= skb->data))
8373                 return;
8374         if (skb->encapsulation &&
8375             first->protocol == htons(ETH_P_IP) &&
8376             hdr.ipv4->protocol == IPPROTO_UDP) {
8377                 struct ixgbe_adapter *adapter = q_vector->adapter;
8378
8379                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8380                              VXLAN_HEADROOM))
8381                         return;
8382
8383                 /* verify the port is recognized as VXLAN */
8384                 if (adapter->vxlan_port &&
8385                     udp_hdr(skb)->dest == adapter->vxlan_port)
8386                         hdr.network = skb_inner_network_header(skb);
8387
8388                 if (adapter->geneve_port &&
8389                     udp_hdr(skb)->dest == adapter->geneve_port)
8390                         hdr.network = skb_inner_network_header(skb);
8391         }
8392
8393         /* Make sure we have at least [minimum IPv4 header + TCP]
8394          * or [IPv6 header] bytes
8395          */
8396         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8397                 return;
8398
8399         /* Currently only IPv4/IPv6 with TCP is supported */
8400         switch (hdr.ipv4->version) {
8401         case IPVERSION:
8402                 /* access ihl as u8 to avoid unaligned access on ia64 */
8403                 hlen = (hdr.network[0] & 0x0F) << 2;
8404                 l4_proto = hdr.ipv4->protocol;
8405                 break;
8406         case 6:
8407                 hlen = hdr.network - skb->data;
8408                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8409                 hlen -= hdr.network - skb->data;
8410                 break;
8411         default:
8412                 return;
8413         }
8414
8415         if (l4_proto != IPPROTO_TCP)
8416                 return;
8417
8418         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8419                      hlen + sizeof(struct tcphdr)))
8420                 return;
8421
8422         th = (struct tcphdr *)(hdr.network + hlen);
8423
8424         /* skip this packet since the socket is closing */
8425         if (th->fin)
8426                 return;
8427
8428         /* sample on all syn packets or once every atr sample count */
8429         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8430                 return;
8431
8432         /* reset sample count */
8433         ring->atr_count = 0;
8434
8435         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8436
8437         /*
8438          * src and dst are inverted, think how the receiver sees them
8439          *
8440          * The input is broken into two sections, a non-compressed section
8441          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8442          * is XORed together and stored in the compressed dword.
8443          */
8444         input.formatted.vlan_id = vlan_id;
8445
8446         /*
8447          * since src port and flex bytes occupy the same word XOR them together
8448          * and write the value to source port portion of compressed dword
8449          */
8450         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8451                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8452         else
8453                 common.port.src ^= th->dest ^ first->protocol;
8454         common.port.dst ^= th->source;
8455
8456         switch (hdr.ipv4->version) {
8457         case IPVERSION:
8458                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8459                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8460                 break;
8461         case 6:
8462                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8463                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8464                              hdr.ipv6->saddr.s6_addr32[1] ^
8465                              hdr.ipv6->saddr.s6_addr32[2] ^
8466                              hdr.ipv6->saddr.s6_addr32[3] ^
8467                              hdr.ipv6->daddr.s6_addr32[0] ^
8468                              hdr.ipv6->daddr.s6_addr32[1] ^
8469                              hdr.ipv6->daddr.s6_addr32[2] ^
8470                              hdr.ipv6->daddr.s6_addr32[3];
8471                 break;
8472         default:
8473                 break;
8474         }
8475
8476         if (hdr.network != skb_network_header(skb))
8477                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8478
8479         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8480         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8481                                               input, common, ring->queue_index);
8482 }
8483
8484 #ifdef IXGBE_FCOE
8485 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8486                               struct net_device *sb_dev)
8487 {
8488         struct ixgbe_adapter *adapter;
8489         struct ixgbe_ring_feature *f;
8490         int txq;
8491
8492         if (sb_dev) {
8493                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8494                 struct net_device *vdev = sb_dev;
8495
8496                 txq = vdev->tc_to_txq[tc].offset;
8497                 txq += reciprocal_scale(skb_get_hash(skb),
8498                                         vdev->tc_to_txq[tc].count);
8499
8500                 return txq;
8501         }
8502
8503         /*
8504          * only execute the code below if protocol is FCoE
8505          * or FIP and we have FCoE enabled on the adapter
8506          */
8507         switch (vlan_get_protocol(skb)) {
8508         case htons(ETH_P_FCOE):
8509         case htons(ETH_P_FIP):
8510                 adapter = netdev_priv(dev);
8511
8512                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8513                         break;
8514                 fallthrough;
8515         default:
8516                 return netdev_pick_tx(dev, skb, sb_dev);
8517         }
8518
8519         f = &adapter->ring_feature[RING_F_FCOE];
8520
8521         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8522                                            smp_processor_id();
8523
8524         while (txq >= f->indices)
8525                 txq -= f->indices;
8526
8527         return txq + f->offset;
8528 }
8529
8530 #endif
8531 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8532                         struct xdp_frame *xdpf)
8533 {
8534         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8535         struct ixgbe_tx_buffer *tx_buffer;
8536         union ixgbe_adv_tx_desc *tx_desc;
8537         u32 len, cmd_type;
8538         dma_addr_t dma;
8539         u16 i;
8540
8541         len = xdpf->len;
8542
8543         if (unlikely(!ixgbe_desc_unused(ring)))
8544                 return IXGBE_XDP_CONSUMED;
8545
8546         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8547         if (dma_mapping_error(ring->dev, dma))
8548                 return IXGBE_XDP_CONSUMED;
8549
8550         /* record the location of the first descriptor for this packet */
8551         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8552         tx_buffer->bytecount = len;
8553         tx_buffer->gso_segs = 1;
8554         tx_buffer->protocol = 0;
8555
8556         i = ring->next_to_use;
8557         tx_desc = IXGBE_TX_DESC(ring, i);
8558
8559         dma_unmap_len_set(tx_buffer, len, len);
8560         dma_unmap_addr_set(tx_buffer, dma, dma);
8561         tx_buffer->xdpf = xdpf;
8562
8563         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8564
8565         /* put descriptor type bits */
8566         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8567                    IXGBE_ADVTXD_DCMD_DEXT |
8568                    IXGBE_ADVTXD_DCMD_IFCS;
8569         cmd_type |= len | IXGBE_TXD_CMD;
8570         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8571         tx_desc->read.olinfo_status =
8572                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8573
8574         /* Avoid any potential race with xdp_xmit and cleanup */
8575         smp_wmb();
8576
8577         /* set next_to_watch value indicating a packet is present */
8578         i++;
8579         if (i == ring->count)
8580                 i = 0;
8581
8582         tx_buffer->next_to_watch = tx_desc;
8583         ring->next_to_use = i;
8584
8585         return IXGBE_XDP_TX;
8586 }
8587
8588 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8589                           struct ixgbe_adapter *adapter,
8590                           struct ixgbe_ring *tx_ring)
8591 {
8592         struct ixgbe_tx_buffer *first;
8593         int tso;
8594         u32 tx_flags = 0;
8595         unsigned short f;
8596         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8597         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8598         __be16 protocol = skb->protocol;
8599         u8 hdr_len = 0;
8600
8601         /*
8602          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8603          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8604          *       + 2 desc gap to keep tail from touching head,
8605          *       + 1 desc for context descriptor,
8606          * otherwise try next time
8607          */
8608         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8609                 count += TXD_USE_COUNT(skb_frag_size(
8610                                                 &skb_shinfo(skb)->frags[f]));
8611
8612         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8613                 tx_ring->tx_stats.tx_busy++;
8614                 return NETDEV_TX_BUSY;
8615         }
8616
8617         /* record the location of the first descriptor for this packet */
8618         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8619         first->skb = skb;
8620         first->bytecount = skb->len;
8621         first->gso_segs = 1;
8622
8623         /* if we have a HW VLAN tag being added default to the HW one */
8624         if (skb_vlan_tag_present(skb)) {
8625                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8626                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8627         /* else if it is a SW VLAN check the next protocol and store the tag */
8628         } else if (protocol == htons(ETH_P_8021Q)) {
8629                 struct vlan_hdr *vhdr, _vhdr;
8630                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8631                 if (!vhdr)
8632                         goto out_drop;
8633
8634                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8635                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8636                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8637         }
8638         protocol = vlan_get_protocol(skb);
8639
8640         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8641             adapter->ptp_clock) {
8642                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8643                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8644                                            &adapter->state)) {
8645                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8646                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8647
8648                         /* schedule check for Tx timestamp */
8649                         adapter->ptp_tx_skb = skb_get(skb);
8650                         adapter->ptp_tx_start = jiffies;
8651                         schedule_work(&adapter->ptp_tx_work);
8652                 } else {
8653                         adapter->tx_hwtstamp_skipped++;
8654                 }
8655         }
8656
8657 #ifdef CONFIG_PCI_IOV
8658         /*
8659          * Use the l2switch_enable flag - would be false if the DMA
8660          * Tx switch had been disabled.
8661          */
8662         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8663                 tx_flags |= IXGBE_TX_FLAGS_CC;
8664
8665 #endif
8666         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8667         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8668             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8669              (skb->priority != TC_PRIO_CONTROL))) {
8670                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8671                 tx_flags |= (skb->priority & 0x7) <<
8672                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8673                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8674                         struct vlan_ethhdr *vhdr;
8675
8676                         if (skb_cow_head(skb, 0))
8677                                 goto out_drop;
8678                         vhdr = (struct vlan_ethhdr *)skb->data;
8679                         vhdr->h_vlan_TCI = htons(tx_flags >>
8680                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8681                 } else {
8682                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8683                 }
8684         }
8685
8686         /* record initial flags and protocol */
8687         first->tx_flags = tx_flags;
8688         first->protocol = protocol;
8689
8690 #ifdef IXGBE_FCOE
8691         /* setup tx offload for FCoE */
8692         if ((protocol == htons(ETH_P_FCOE)) &&
8693             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8694                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8695                 if (tso < 0)
8696                         goto out_drop;
8697
8698                 goto xmit_fcoe;
8699         }
8700
8701 #endif /* IXGBE_FCOE */
8702
8703 #ifdef CONFIG_IXGBE_IPSEC
8704         if (xfrm_offload(skb) &&
8705             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8706                 goto out_drop;
8707 #endif
8708         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8709         if (tso < 0)
8710                 goto out_drop;
8711         else if (!tso)
8712                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8713
8714         /* add the ATR filter if ATR is on */
8715         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8716                 ixgbe_atr(tx_ring, first);
8717
8718 #ifdef IXGBE_FCOE
8719 xmit_fcoe:
8720 #endif /* IXGBE_FCOE */
8721         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8722                 goto cleanup_tx_timestamp;
8723
8724         return NETDEV_TX_OK;
8725
8726 out_drop:
8727         dev_kfree_skb_any(first->skb);
8728         first->skb = NULL;
8729 cleanup_tx_timestamp:
8730         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8731                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8732                 adapter->ptp_tx_skb = NULL;
8733                 cancel_work_sync(&adapter->ptp_tx_work);
8734                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8735         }
8736
8737         return NETDEV_TX_OK;
8738 }
8739
8740 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8741                                       struct net_device *netdev,
8742                                       struct ixgbe_ring *ring)
8743 {
8744         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8745         struct ixgbe_ring *tx_ring;
8746
8747         /*
8748          * The minimum packet size for olinfo paylen is 17 so pad the skb
8749          * in order to meet this minimum size requirement.
8750          */
8751         if (skb_put_padto(skb, 17))
8752                 return NETDEV_TX_OK;
8753
8754         tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)];
8755         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8756                 return NETDEV_TX_BUSY;
8757
8758         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8759 }
8760
8761 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8762                                     struct net_device *netdev)
8763 {
8764         return __ixgbe_xmit_frame(skb, netdev, NULL);
8765 }
8766
8767 /**
8768  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8769  * @netdev: network interface device structure
8770  * @p: pointer to an address structure
8771  *
8772  * Returns 0 on success, negative on failure
8773  **/
8774 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8775 {
8776         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8777         struct ixgbe_hw *hw = &adapter->hw;
8778         struct sockaddr *addr = p;
8779
8780         if (!is_valid_ether_addr(addr->sa_data))
8781                 return -EADDRNOTAVAIL;
8782
8783         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8784         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8785
8786         ixgbe_mac_set_default_filter(adapter);
8787
8788         return 0;
8789 }
8790
8791 static int
8792 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8793 {
8794         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8795         struct ixgbe_hw *hw = &adapter->hw;
8796         u16 value;
8797         int rc;
8798
8799         if (adapter->mii_bus) {
8800                 int regnum = addr;
8801
8802                 if (devad != MDIO_DEVAD_NONE)
8803                         regnum |= (devad << 16) | MII_ADDR_C45;
8804
8805                 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8806         }
8807
8808         if (prtad != hw->phy.mdio.prtad)
8809                 return -EINVAL;
8810         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8811         if (!rc)
8812                 rc = value;
8813         return rc;
8814 }
8815
8816 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8817                             u16 addr, u16 value)
8818 {
8819         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8820         struct ixgbe_hw *hw = &adapter->hw;
8821
8822         if (adapter->mii_bus) {
8823                 int regnum = addr;
8824
8825                 if (devad != MDIO_DEVAD_NONE)
8826                         regnum |= (devad << 16) | MII_ADDR_C45;
8827
8828                 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8829         }
8830
8831         if (prtad != hw->phy.mdio.prtad)
8832                 return -EINVAL;
8833         return hw->phy.ops.write_reg(hw, addr, devad, value);
8834 }
8835
8836 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8837 {
8838         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8839
8840         switch (cmd) {
8841         case SIOCSHWTSTAMP:
8842                 return ixgbe_ptp_set_ts_config(adapter, req);
8843         case SIOCGHWTSTAMP:
8844                 return ixgbe_ptp_get_ts_config(adapter, req);
8845         case SIOCGMIIPHY:
8846                 if (!adapter->hw.phy.ops.read_reg)
8847                         return -EOPNOTSUPP;
8848                 fallthrough;
8849         default:
8850                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8851         }
8852 }
8853
8854 /**
8855  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8856  * netdev->dev_addrs
8857  * @dev: network interface device structure
8858  *
8859  * Returns non-zero on failure
8860  **/
8861 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8862 {
8863         int err = 0;
8864         struct ixgbe_adapter *adapter = netdev_priv(dev);
8865         struct ixgbe_hw *hw = &adapter->hw;
8866
8867         if (is_valid_ether_addr(hw->mac.san_addr)) {
8868                 rtnl_lock();
8869                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8870                 rtnl_unlock();
8871
8872                 /* update SAN MAC vmdq pool selection */
8873                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8874         }
8875         return err;
8876 }
8877
8878 /**
8879  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8880  * netdev->dev_addrs
8881  * @dev: network interface device structure
8882  *
8883  * Returns non-zero on failure
8884  **/
8885 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8886 {
8887         int err = 0;
8888         struct ixgbe_adapter *adapter = netdev_priv(dev);
8889         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8890
8891         if (is_valid_ether_addr(mac->san_addr)) {
8892                 rtnl_lock();
8893                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8894                 rtnl_unlock();
8895         }
8896         return err;
8897 }
8898
8899 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8900                                    struct ixgbe_ring *ring)
8901 {
8902         u64 bytes, packets;
8903         unsigned int start;
8904
8905         if (ring) {
8906                 do {
8907                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8908                         packets = ring->stats.packets;
8909                         bytes   = ring->stats.bytes;
8910                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8911                 stats->tx_packets += packets;
8912                 stats->tx_bytes   += bytes;
8913         }
8914 }
8915
8916 static void ixgbe_get_stats64(struct net_device *netdev,
8917                               struct rtnl_link_stats64 *stats)
8918 {
8919         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8920         int i;
8921
8922         rcu_read_lock();
8923         for (i = 0; i < adapter->num_rx_queues; i++) {
8924                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8925                 u64 bytes, packets;
8926                 unsigned int start;
8927
8928                 if (ring) {
8929                         do {
8930                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8931                                 packets = ring->stats.packets;
8932                                 bytes   = ring->stats.bytes;
8933                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8934                         stats->rx_packets += packets;
8935                         stats->rx_bytes   += bytes;
8936                 }
8937         }
8938
8939         for (i = 0; i < adapter->num_tx_queues; i++) {
8940                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8941
8942                 ixgbe_get_ring_stats64(stats, ring);
8943         }
8944         for (i = 0; i < adapter->num_xdp_queues; i++) {
8945                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8946
8947                 ixgbe_get_ring_stats64(stats, ring);
8948         }
8949         rcu_read_unlock();
8950
8951         /* following stats updated by ixgbe_watchdog_task() */
8952         stats->multicast        = netdev->stats.multicast;
8953         stats->rx_errors        = netdev->stats.rx_errors;
8954         stats->rx_length_errors = netdev->stats.rx_length_errors;
8955         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8956         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8957 }
8958
8959 #ifdef CONFIG_IXGBE_DCB
8960 /**
8961  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8962  * @adapter: pointer to ixgbe_adapter
8963  * @tc: number of traffic classes currently enabled
8964  *
8965  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8966  * 802.1Q priority maps to a packet buffer that exists.
8967  */
8968 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8969 {
8970         struct ixgbe_hw *hw = &adapter->hw;
8971         u32 reg, rsave;
8972         int i;
8973
8974         /* 82598 have a static priority to TC mapping that can not
8975          * be changed so no validation is needed.
8976          */
8977         if (hw->mac.type == ixgbe_mac_82598EB)
8978                 return;
8979
8980         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8981         rsave = reg;
8982
8983         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8984                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8985
8986                 /* If up2tc is out of bounds default to zero */
8987                 if (up2tc > tc)
8988                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8989         }
8990
8991         if (reg != rsave)
8992                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8993
8994         return;
8995 }
8996
8997 /**
8998  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8999  * @adapter: Pointer to adapter struct
9000  *
9001  * Populate the netdev user priority to tc map
9002  */
9003 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9004 {
9005         struct net_device *dev = adapter->netdev;
9006         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9007         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9008         u8 prio;
9009
9010         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9011                 u8 tc = 0;
9012
9013                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9014                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9015                 else if (ets)
9016                         tc = ets->prio_tc[prio];
9017
9018                 netdev_set_prio_tc_map(dev, prio, tc);
9019         }
9020 }
9021
9022 #endif /* CONFIG_IXGBE_DCB */
9023 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev,
9024                                        struct netdev_nested_priv *priv)
9025 {
9026         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)priv->data;
9027         struct ixgbe_fwd_adapter *accel;
9028         int pool;
9029
9030         /* we only care about macvlans... */
9031         if (!netif_is_macvlan(vdev))
9032                 return 0;
9033
9034         /* that have hardware offload enabled... */
9035         accel = macvlan_accel_priv(vdev);
9036         if (!accel)
9037                 return 0;
9038
9039         /* If we can relocate to a different bit do so */
9040         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9041         if (pool < adapter->num_rx_pools) {
9042                 set_bit(pool, adapter->fwd_bitmask);
9043                 accel->pool = pool;
9044                 return 0;
9045         }
9046
9047         /* if we cannot find a free pool then disable the offload */
9048         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9049         macvlan_release_l2fw_offload(vdev);
9050
9051         /* unbind the queues and drop the subordinate channel config */
9052         netdev_unbind_sb_channel(adapter->netdev, vdev);
9053         netdev_set_sb_channel(vdev, 0);
9054
9055         kfree(accel);
9056
9057         return 0;
9058 }
9059
9060 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9061 {
9062         struct ixgbe_adapter *adapter = netdev_priv(dev);
9063         struct netdev_nested_priv priv = {
9064                 .data = (void *)adapter,
9065         };
9066
9067         /* flush any stale bits out of the fwd bitmask */
9068         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9069
9070         /* walk through upper devices reassigning pools */
9071         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9072                                       &priv);
9073 }
9074
9075 /**
9076  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9077  *
9078  * @dev: net device to configure
9079  * @tc: number of traffic classes to enable
9080  */
9081 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9082 {
9083         struct ixgbe_adapter *adapter = netdev_priv(dev);
9084         struct ixgbe_hw *hw = &adapter->hw;
9085
9086         /* Hardware supports up to 8 traffic classes */
9087         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9088                 return -EINVAL;
9089
9090         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9091                 return -EINVAL;
9092
9093         /* Hardware has to reinitialize queues and interrupts to
9094          * match packet buffer alignment. Unfortunately, the
9095          * hardware is not flexible enough to do this dynamically.
9096          */
9097         if (netif_running(dev))
9098                 ixgbe_close(dev);
9099         else
9100                 ixgbe_reset(adapter);
9101
9102         ixgbe_clear_interrupt_scheme(adapter);
9103
9104 #ifdef CONFIG_IXGBE_DCB
9105         if (tc) {
9106                 if (adapter->xdp_prog) {
9107                         e_warn(probe, "DCB is not supported with XDP\n");
9108
9109                         ixgbe_init_interrupt_scheme(adapter);
9110                         if (netif_running(dev))
9111                                 ixgbe_open(dev);
9112                         return -EINVAL;
9113                 }
9114
9115                 netdev_set_num_tc(dev, tc);
9116                 ixgbe_set_prio_tc_map(adapter);
9117
9118                 adapter->hw_tcs = tc;
9119                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9120
9121                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9122                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9123                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9124                 }
9125         } else {
9126                 netdev_reset_tc(dev);
9127
9128                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9129                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9130
9131                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9132                 adapter->hw_tcs = tc;
9133
9134                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9135                 adapter->dcb_cfg.pfc_mode_enable = false;
9136         }
9137
9138         ixgbe_validate_rtr(adapter, tc);
9139
9140 #endif /* CONFIG_IXGBE_DCB */
9141         ixgbe_init_interrupt_scheme(adapter);
9142
9143         ixgbe_defrag_macvlan_pools(dev);
9144
9145         if (netif_running(dev))
9146                 return ixgbe_open(dev);
9147
9148         return 0;
9149 }
9150
9151 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9152                                struct tc_cls_u32_offload *cls)
9153 {
9154         u32 hdl = cls->knode.handle;
9155         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9156         u32 loc = cls->knode.handle & 0xfffff;
9157         int err = 0, i, j;
9158         struct ixgbe_jump_table *jump = NULL;
9159
9160         if (loc > IXGBE_MAX_HW_ENTRIES)
9161                 return -EINVAL;
9162
9163         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9164                 return -EINVAL;
9165
9166         /* Clear this filter in the link data it is associated with */
9167         if (uhtid != 0x800) {
9168                 jump = adapter->jump_tables[uhtid];
9169                 if (!jump)
9170                         return -EINVAL;
9171                 if (!test_bit(loc - 1, jump->child_loc_map))
9172                         return -EINVAL;
9173                 clear_bit(loc - 1, jump->child_loc_map);
9174         }
9175
9176         /* Check if the filter being deleted is a link */
9177         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9178                 jump = adapter->jump_tables[i];
9179                 if (jump && jump->link_hdl == hdl) {
9180                         /* Delete filters in the hardware in the child hash
9181                          * table associated with this link
9182                          */
9183                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9184                                 if (!test_bit(j, jump->child_loc_map))
9185                                         continue;
9186                                 spin_lock(&adapter->fdir_perfect_lock);
9187                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9188                                                                       NULL,
9189                                                                       j + 1);
9190                                 spin_unlock(&adapter->fdir_perfect_lock);
9191                                 clear_bit(j, jump->child_loc_map);
9192                         }
9193                         /* Remove resources for this link */
9194                         kfree(jump->input);
9195                         kfree(jump->mask);
9196                         kfree(jump);
9197                         adapter->jump_tables[i] = NULL;
9198                         return err;
9199                 }
9200         }
9201
9202         spin_lock(&adapter->fdir_perfect_lock);
9203         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9204         spin_unlock(&adapter->fdir_perfect_lock);
9205         return err;
9206 }
9207
9208 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9209                                             struct tc_cls_u32_offload *cls)
9210 {
9211         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9212
9213         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9214                 return -EINVAL;
9215
9216         /* This ixgbe devices do not support hash tables at the moment
9217          * so abort when given hash tables.
9218          */
9219         if (cls->hnode.divisor > 0)
9220                 return -EINVAL;
9221
9222         set_bit(uhtid - 1, &adapter->tables);
9223         return 0;
9224 }
9225
9226 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9227                                             struct tc_cls_u32_offload *cls)
9228 {
9229         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9230
9231         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9232                 return -EINVAL;
9233
9234         clear_bit(uhtid - 1, &adapter->tables);
9235         return 0;
9236 }
9237
9238 #ifdef CONFIG_NET_CLS_ACT
9239 struct upper_walk_data {
9240         struct ixgbe_adapter *adapter;
9241         u64 action;
9242         int ifindex;
9243         u8 queue;
9244 };
9245
9246 static int get_macvlan_queue(struct net_device *upper,
9247                              struct netdev_nested_priv *priv)
9248 {
9249         if (netif_is_macvlan(upper)) {
9250                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9251                 struct ixgbe_adapter *adapter;
9252                 struct upper_walk_data *data;
9253                 int ifindex;
9254
9255                 data = (struct upper_walk_data *)priv->data;
9256                 ifindex = data->ifindex;
9257                 adapter = data->adapter;
9258                 if (vadapter && upper->ifindex == ifindex) {
9259                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9260                         data->action = data->queue;
9261                         return 1;
9262                 }
9263         }
9264
9265         return 0;
9266 }
9267
9268 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9269                                   u8 *queue, u64 *action)
9270 {
9271         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9272         unsigned int num_vfs = adapter->num_vfs, vf;
9273         struct netdev_nested_priv priv;
9274         struct upper_walk_data data;
9275         struct net_device *upper;
9276
9277         /* redirect to a SRIOV VF */
9278         for (vf = 0; vf < num_vfs; ++vf) {
9279                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9280                 if (upper->ifindex == ifindex) {
9281                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9282                         *action = vf + 1;
9283                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9284                         return 0;
9285                 }
9286         }
9287
9288         /* redirect to a offloaded macvlan netdev */
9289         data.adapter = adapter;
9290         data.ifindex = ifindex;
9291         data.action = 0;
9292         data.queue = 0;
9293         priv.data = (void *)&data;
9294         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9295                                           get_macvlan_queue, &priv)) {
9296                 *action = data.action;
9297                 *queue = data.queue;
9298
9299                 return 0;
9300         }
9301
9302         return -EINVAL;
9303 }
9304
9305 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9306                             struct tcf_exts *exts, u64 *action, u8 *queue)
9307 {
9308         const struct tc_action *a;
9309         int i;
9310
9311         if (!tcf_exts_has_actions(exts))
9312                 return -EINVAL;
9313
9314         tcf_exts_for_each_action(i, a, exts) {
9315                 /* Drop action */
9316                 if (is_tcf_gact_shot(a)) {
9317                         *action = IXGBE_FDIR_DROP_QUEUE;
9318                         *queue = IXGBE_FDIR_DROP_QUEUE;
9319                         return 0;
9320                 }
9321
9322                 /* Redirect to a VF or a offloaded macvlan */
9323                 if (is_tcf_mirred_egress_redirect(a)) {
9324                         struct net_device *dev = tcf_mirred_dev(a);
9325
9326                         if (!dev)
9327                                 return -EINVAL;
9328                         return handle_redirect_action(adapter, dev->ifindex,
9329                                                       queue, action);
9330                 }
9331
9332                 return -EINVAL;
9333         }
9334
9335         return -EINVAL;
9336 }
9337 #else
9338 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9339                             struct tcf_exts *exts, u64 *action, u8 *queue)
9340 {
9341         return -EINVAL;
9342 }
9343 #endif /* CONFIG_NET_CLS_ACT */
9344
9345 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9346                                     union ixgbe_atr_input *mask,
9347                                     struct tc_cls_u32_offload *cls,
9348                                     struct ixgbe_mat_field *field_ptr,
9349                                     struct ixgbe_nexthdr *nexthdr)
9350 {
9351         int i, j, off;
9352         __be32 val, m;
9353         bool found_entry = false, found_jump_field = false;
9354
9355         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9356                 off = cls->knode.sel->keys[i].off;
9357                 val = cls->knode.sel->keys[i].val;
9358                 m = cls->knode.sel->keys[i].mask;
9359
9360                 for (j = 0; field_ptr[j].val; j++) {
9361                         if (field_ptr[j].off == off) {
9362                                 field_ptr[j].val(input, mask, (__force u32)val,
9363                                                  (__force u32)m);
9364                                 input->filter.formatted.flow_type |=
9365                                         field_ptr[j].type;
9366                                 found_entry = true;
9367                                 break;
9368                         }
9369                 }
9370                 if (nexthdr) {
9371                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9372                             nexthdr->val ==
9373                             (__force u32)cls->knode.sel->keys[i].val &&
9374                             nexthdr->mask ==
9375                             (__force u32)cls->knode.sel->keys[i].mask)
9376                                 found_jump_field = true;
9377                         else
9378                                 continue;
9379                 }
9380         }
9381
9382         if (nexthdr && !found_jump_field)
9383                 return -EINVAL;
9384
9385         if (!found_entry)
9386                 return 0;
9387
9388         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9389                                     IXGBE_ATR_L4TYPE_MASK;
9390
9391         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9392                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9393
9394         return 0;
9395 }
9396
9397 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9398                                   struct tc_cls_u32_offload *cls)
9399 {
9400         __be16 protocol = cls->common.protocol;
9401         u32 loc = cls->knode.handle & 0xfffff;
9402         struct ixgbe_hw *hw = &adapter->hw;
9403         struct ixgbe_mat_field *field_ptr;
9404         struct ixgbe_fdir_filter *input = NULL;
9405         union ixgbe_atr_input *mask = NULL;
9406         struct ixgbe_jump_table *jump = NULL;
9407         int i, err = -EINVAL;
9408         u8 queue;
9409         u32 uhtid, link_uhtid;
9410
9411         uhtid = TC_U32_USERHTID(cls->knode.handle);
9412         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9413
9414         /* At the moment cls_u32 jumps to network layer and skips past
9415          * L2 headers. The canonical method to match L2 frames is to use
9416          * negative values. However this is error prone at best but really
9417          * just broken because there is no way to "know" what sort of hdr
9418          * is in front of the network layer. Fix cls_u32 to support L2
9419          * headers when needed.
9420          */
9421         if (protocol != htons(ETH_P_IP))
9422                 return err;
9423
9424         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9425                 e_err(drv, "Location out of range\n");
9426                 return err;
9427         }
9428
9429         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9430          * links and also the fields used to advance the parser across each
9431          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9432          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9433          * To add support for new nodes update ixgbe_model.h parse structures
9434          * this function _should_ be generic try not to hardcode values here.
9435          */
9436         if (uhtid == 0x800) {
9437                 field_ptr = (adapter->jump_tables[0])->mat;
9438         } else {
9439                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9440                         return err;
9441                 if (!adapter->jump_tables[uhtid])
9442                         return err;
9443                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9444         }
9445
9446         if (!field_ptr)
9447                 return err;
9448
9449         /* At this point we know the field_ptr is valid and need to either
9450          * build cls_u32 link or attach filter. Because adding a link to
9451          * a handle that does not exist is invalid and the same for adding
9452          * rules to handles that don't exist.
9453          */
9454
9455         if (link_uhtid) {
9456                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9457
9458                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9459                         return err;
9460
9461                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9462                         return err;
9463
9464                 /* Multiple filters as links to the same hash table are not
9465                  * supported. To add a new filter with the same next header
9466                  * but different match/jump conditions, create a new hash table
9467                  * and link to it.
9468                  */
9469                 if (adapter->jump_tables[link_uhtid] &&
9470                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9471                         e_err(drv, "Link filter exists for link: %x\n",
9472                               link_uhtid);
9473                         return err;
9474                 }
9475
9476                 for (i = 0; nexthdr[i].jump; i++) {
9477                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9478                             nexthdr[i].s != cls->knode.sel->offshift ||
9479                             nexthdr[i].m !=
9480                             (__force u32)cls->knode.sel->offmask)
9481                                 return err;
9482
9483                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9484                         if (!jump)
9485                                 return -ENOMEM;
9486                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9487                         if (!input) {
9488                                 err = -ENOMEM;
9489                                 goto free_jump;
9490                         }
9491                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9492                         if (!mask) {
9493                                 err = -ENOMEM;
9494                                 goto free_input;
9495                         }
9496                         jump->input = input;
9497                         jump->mask = mask;
9498                         jump->link_hdl = cls->knode.handle;
9499
9500                         err = ixgbe_clsu32_build_input(input, mask, cls,
9501                                                        field_ptr, &nexthdr[i]);
9502                         if (!err) {
9503                                 jump->mat = nexthdr[i].jump;
9504                                 adapter->jump_tables[link_uhtid] = jump;
9505                                 break;
9506                         } else {
9507                                 kfree(mask);
9508                                 kfree(input);
9509                                 kfree(jump);
9510                         }
9511                 }
9512                 return 0;
9513         }
9514
9515         input = kzalloc(sizeof(*input), GFP_KERNEL);
9516         if (!input)
9517                 return -ENOMEM;
9518         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9519         if (!mask) {
9520                 err = -ENOMEM;
9521                 goto free_input;
9522         }
9523
9524         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9525                 if ((adapter->jump_tables[uhtid])->input)
9526                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9527                                sizeof(*input));
9528                 if ((adapter->jump_tables[uhtid])->mask)
9529                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9530                                sizeof(*mask));
9531
9532                 /* Lookup in all child hash tables if this location is already
9533                  * filled with a filter
9534                  */
9535                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9536                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9537
9538                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9539                                 e_err(drv, "Filter exists in location: %x\n",
9540                                       loc);
9541                                 err = -EINVAL;
9542                                 goto err_out;
9543                         }
9544                 }
9545         }
9546         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9547         if (err)
9548                 goto err_out;
9549
9550         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9551                                &queue);
9552         if (err < 0)
9553                 goto err_out;
9554
9555         input->sw_idx = loc;
9556
9557         spin_lock(&adapter->fdir_perfect_lock);
9558
9559         if (hlist_empty(&adapter->fdir_filter_list)) {
9560                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9561                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9562                 if (err)
9563                         goto err_out_w_lock;
9564         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9565                 err = -EINVAL;
9566                 goto err_out_w_lock;
9567         }
9568
9569         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9570         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9571                                                     input->sw_idx, queue);
9572         if (!err)
9573                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9574         spin_unlock(&adapter->fdir_perfect_lock);
9575
9576         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9577                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9578
9579         kfree(mask);
9580         return err;
9581 err_out_w_lock:
9582         spin_unlock(&adapter->fdir_perfect_lock);
9583 err_out:
9584         kfree(mask);
9585 free_input:
9586         kfree(input);
9587 free_jump:
9588         kfree(jump);
9589         return err;
9590 }
9591
9592 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9593                                   struct tc_cls_u32_offload *cls_u32)
9594 {
9595         switch (cls_u32->command) {
9596         case TC_CLSU32_NEW_KNODE:
9597         case TC_CLSU32_REPLACE_KNODE:
9598                 return ixgbe_configure_clsu32(adapter, cls_u32);
9599         case TC_CLSU32_DELETE_KNODE:
9600                 return ixgbe_delete_clsu32(adapter, cls_u32);
9601         case TC_CLSU32_NEW_HNODE:
9602         case TC_CLSU32_REPLACE_HNODE:
9603                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9604         case TC_CLSU32_DELETE_HNODE:
9605                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9606         default:
9607                 return -EOPNOTSUPP;
9608         }
9609 }
9610
9611 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9612                                    void *cb_priv)
9613 {
9614         struct ixgbe_adapter *adapter = cb_priv;
9615
9616         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9617                 return -EOPNOTSUPP;
9618
9619         switch (type) {
9620         case TC_SETUP_CLSU32:
9621                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9622         default:
9623                 return -EOPNOTSUPP;
9624         }
9625 }
9626
9627 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9628                                  struct tc_mqprio_qopt *mqprio)
9629 {
9630         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9631         return ixgbe_setup_tc(dev, mqprio->num_tc);
9632 }
9633
9634 static LIST_HEAD(ixgbe_block_cb_list);
9635
9636 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9637                             void *type_data)
9638 {
9639         struct ixgbe_adapter *adapter = netdev_priv(dev);
9640
9641         switch (type) {
9642         case TC_SETUP_BLOCK:
9643                 return flow_block_cb_setup_simple(type_data,
9644                                                   &ixgbe_block_cb_list,
9645                                                   ixgbe_setup_tc_block_cb,
9646                                                   adapter, adapter, true);
9647         case TC_SETUP_QDISC_MQPRIO:
9648                 return ixgbe_setup_tc_mqprio(dev, type_data);
9649         default:
9650                 return -EOPNOTSUPP;
9651         }
9652 }
9653
9654 #ifdef CONFIG_PCI_IOV
9655 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9656 {
9657         struct net_device *netdev = adapter->netdev;
9658
9659         rtnl_lock();
9660         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9661         rtnl_unlock();
9662 }
9663
9664 #endif
9665 void ixgbe_do_reset(struct net_device *netdev)
9666 {
9667         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9668
9669         if (netif_running(netdev))
9670                 ixgbe_reinit_locked(adapter);
9671         else
9672                 ixgbe_reset(adapter);
9673 }
9674
9675 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9676                                             netdev_features_t features)
9677 {
9678         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9679
9680         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9681         if (!(features & NETIF_F_RXCSUM))
9682                 features &= ~NETIF_F_LRO;
9683
9684         /* Turn off LRO if not RSC capable */
9685         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9686                 features &= ~NETIF_F_LRO;
9687
9688         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9689                 e_dev_err("LRO is not supported with XDP\n");
9690                 features &= ~NETIF_F_LRO;
9691         }
9692
9693         return features;
9694 }
9695
9696 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9697 {
9698         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9699                         num_online_cpus());
9700
9701         /* go back to full RSS if we're not running SR-IOV */
9702         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9703                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9704                                     IXGBE_FLAG_SRIOV_ENABLED);
9705
9706         adapter->ring_feature[RING_F_RSS].limit = rss;
9707         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9708
9709         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9710 }
9711
9712 static int ixgbe_set_features(struct net_device *netdev,
9713                               netdev_features_t features)
9714 {
9715         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9716         netdev_features_t changed = netdev->features ^ features;
9717         bool need_reset = false;
9718
9719         /* Make sure RSC matches LRO, reset if change */
9720         if (!(features & NETIF_F_LRO)) {
9721                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9722                         need_reset = true;
9723                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9724         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9725                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9726                 if (adapter->rx_itr_setting == 1 ||
9727                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9728                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9729                         need_reset = true;
9730                 } else if ((changed ^ features) & NETIF_F_LRO) {
9731                         e_info(probe, "rx-usecs set too low, "
9732                                "disabling RSC\n");
9733                 }
9734         }
9735
9736         /*
9737          * Check if Flow Director n-tuple support or hw_tc support was
9738          * enabled or disabled.  If the state changed, we need to reset.
9739          */
9740         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9741                 /* turn off ATR, enable perfect filters and reset */
9742                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9743                         need_reset = true;
9744
9745                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9746                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9747         } else {
9748                 /* turn off perfect filters, enable ATR and reset */
9749                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9750                         need_reset = true;
9751
9752                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9753
9754                 /* We cannot enable ATR if SR-IOV is enabled */
9755                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9756                     /* We cannot enable ATR if we have 2 or more tcs */
9757                     (adapter->hw_tcs > 1) ||
9758                     /* We cannot enable ATR if RSS is disabled */
9759                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9760                     /* A sample rate of 0 indicates ATR disabled */
9761                     (!adapter->atr_sample_rate))
9762                         ; /* do nothing not supported */
9763                 else /* otherwise supported and set the flag */
9764                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9765         }
9766
9767         if (changed & NETIF_F_RXALL)
9768                 need_reset = true;
9769
9770         netdev->features = features;
9771
9772         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9773                 ixgbe_reset_l2fw_offload(adapter);
9774         else if (need_reset)
9775                 ixgbe_do_reset(netdev);
9776         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9777                             NETIF_F_HW_VLAN_CTAG_FILTER))
9778                 ixgbe_set_rx_mode(netdev);
9779
9780         return 1;
9781 }
9782
9783 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9784                              struct net_device *dev,
9785                              const unsigned char *addr, u16 vid,
9786                              u16 flags,
9787                              struct netlink_ext_ack *extack)
9788 {
9789         /* guarantee we can provide a unique filter for the unicast address */
9790         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9791                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9792                 u16 pool = VMDQ_P(0);
9793
9794                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9795                         return -ENOMEM;
9796         }
9797
9798         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9799 }
9800
9801 /**
9802  * ixgbe_configure_bridge_mode - set various bridge modes
9803  * @adapter: the private structure
9804  * @mode: requested bridge mode
9805  *
9806  * Configure some settings require for various bridge modes.
9807  **/
9808 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9809                                        __u16 mode)
9810 {
9811         struct ixgbe_hw *hw = &adapter->hw;
9812         unsigned int p, num_pools;
9813         u32 vmdctl;
9814
9815         switch (mode) {
9816         case BRIDGE_MODE_VEPA:
9817                 /* disable Tx loopback, rely on switch hairpin mode */
9818                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9819
9820                 /* must enable Rx switching replication to allow multicast
9821                  * packet reception on all VFs, and to enable source address
9822                  * pruning.
9823                  */
9824                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9825                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9826                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9827
9828                 /* enable Rx source address pruning. Note, this requires
9829                  * replication to be enabled or else it does nothing.
9830                  */
9831                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9832                 for (p = 0; p < num_pools; p++) {
9833                         if (hw->mac.ops.set_source_address_pruning)
9834                                 hw->mac.ops.set_source_address_pruning(hw,
9835                                                                        true,
9836                                                                        p);
9837                 }
9838                 break;
9839         case BRIDGE_MODE_VEB:
9840                 /* enable Tx loopback for internal VF/PF communication */
9841                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9842                                 IXGBE_PFDTXGSWC_VT_LBEN);
9843
9844                 /* disable Rx switching replication unless we have SR-IOV
9845                  * virtual functions
9846                  */
9847                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9848                 if (!adapter->num_vfs)
9849                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9850                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9851
9852                 /* disable Rx source address pruning, since we don't expect to
9853                  * be receiving external loopback of our transmitted frames.
9854                  */
9855                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9856                 for (p = 0; p < num_pools; p++) {
9857                         if (hw->mac.ops.set_source_address_pruning)
9858                                 hw->mac.ops.set_source_address_pruning(hw,
9859                                                                        false,
9860                                                                        p);
9861                 }
9862                 break;
9863         default:
9864                 return -EINVAL;
9865         }
9866
9867         adapter->bridge_mode = mode;
9868
9869         e_info(drv, "enabling bridge mode: %s\n",
9870                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9871
9872         return 0;
9873 }
9874
9875 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9876                                     struct nlmsghdr *nlh, u16 flags,
9877                                     struct netlink_ext_ack *extack)
9878 {
9879         struct ixgbe_adapter *adapter = netdev_priv(dev);
9880         struct nlattr *attr, *br_spec;
9881         int rem;
9882
9883         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9884                 return -EOPNOTSUPP;
9885
9886         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9887         if (!br_spec)
9888                 return -EINVAL;
9889
9890         nla_for_each_nested(attr, br_spec, rem) {
9891                 int status;
9892                 __u16 mode;
9893
9894                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9895                         continue;
9896
9897                 if (nla_len(attr) < sizeof(mode))
9898                         return -EINVAL;
9899
9900                 mode = nla_get_u16(attr);
9901                 status = ixgbe_configure_bridge_mode(adapter, mode);
9902                 if (status)
9903                         return status;
9904
9905                 break;
9906         }
9907
9908         return 0;
9909 }
9910
9911 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9912                                     struct net_device *dev,
9913                                     u32 filter_mask, int nlflags)
9914 {
9915         struct ixgbe_adapter *adapter = netdev_priv(dev);
9916
9917         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9918                 return 0;
9919
9920         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9921                                        adapter->bridge_mode, 0, 0, nlflags,
9922                                        filter_mask, NULL);
9923 }
9924
9925 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9926 {
9927         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9928         struct ixgbe_fwd_adapter *accel;
9929         int tcs = adapter->hw_tcs ? : 1;
9930         int pool, err;
9931
9932         if (adapter->xdp_prog) {
9933                 e_warn(probe, "L2FW offload is not supported with XDP\n");
9934                 return ERR_PTR(-EINVAL);
9935         }
9936
9937         /* The hardware supported by ixgbe only filters on the destination MAC
9938          * address. In order to avoid issues we only support offloading modes
9939          * where the hardware can actually provide the functionality.
9940          */
9941         if (!macvlan_supports_dest_filter(vdev))
9942                 return ERR_PTR(-EMEDIUMTYPE);
9943
9944         /* We need to lock down the macvlan to be a single queue device so that
9945          * we can reuse the tc_to_txq field in the macvlan netdev to represent
9946          * the queue mapping to our netdev.
9947          */
9948         if (netif_is_multiqueue(vdev))
9949                 return ERR_PTR(-ERANGE);
9950
9951         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9952         if (pool == adapter->num_rx_pools) {
9953                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
9954                 u16 reserved_pools;
9955
9956                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9957                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9958                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
9959                         return ERR_PTR(-EBUSY);
9960
9961                 /* Hardware has a limited number of available pools. Each VF,
9962                  * and the PF require a pool. Check to ensure we don't
9963                  * attempt to use more then the available number of pools.
9964                  */
9965                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9966                         return ERR_PTR(-EBUSY);
9967
9968                 /* Enable VMDq flag so device will be set in VM mode */
9969                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
9970                                   IXGBE_FLAG_SRIOV_ENABLED;
9971
9972                 /* Try to reserve as many queues per pool as possible,
9973                  * we start with the configurations that support 4 queues
9974                  * per pools, followed by 2, and then by just 1 per pool.
9975                  */
9976                 if (used_pools < 32 && adapter->num_rx_pools < 16)
9977                         reserved_pools = min_t(u16,
9978                                                32 - used_pools,
9979                                                16 - adapter->num_rx_pools);
9980                 else if (adapter->num_rx_pools < 32)
9981                         reserved_pools = min_t(u16,
9982                                                64 - used_pools,
9983                                                32 - adapter->num_rx_pools);
9984                 else
9985                         reserved_pools = 64 - used_pools;
9986
9987
9988                 if (!reserved_pools)
9989                         return ERR_PTR(-EBUSY);
9990
9991                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
9992
9993                 /* Force reinit of ring allocation with VMDQ enabled */
9994                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
9995                 if (err)
9996                         return ERR_PTR(err);
9997
9998                 if (pool >= adapter->num_rx_pools)
9999                         return ERR_PTR(-ENOMEM);
10000         }
10001
10002         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10003         if (!accel)
10004                 return ERR_PTR(-ENOMEM);
10005
10006         set_bit(pool, adapter->fwd_bitmask);
10007         netdev_set_sb_channel(vdev, pool);
10008         accel->pool = pool;
10009         accel->netdev = vdev;
10010
10011         if (!netif_running(pdev))
10012                 return accel;
10013
10014         err = ixgbe_fwd_ring_up(adapter, accel);
10015         if (err)
10016                 return ERR_PTR(err);
10017
10018         return accel;
10019 }
10020
10021 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10022 {
10023         struct ixgbe_fwd_adapter *accel = priv;
10024         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10025         unsigned int rxbase = accel->rx_base_queue;
10026         unsigned int i;
10027
10028         /* delete unicast filter associated with offloaded interface */
10029         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10030                              VMDQ_P(accel->pool));
10031
10032         /* Allow remaining Rx packets to get flushed out of the
10033          * Rx FIFO before we drop the netdev for the ring.
10034          */
10035         usleep_range(10000, 20000);
10036
10037         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10038                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10039                 struct ixgbe_q_vector *qv = ring->q_vector;
10040
10041                 /* Make sure we aren't processing any packets and clear
10042                  * netdev to shut down the ring.
10043                  */
10044                 if (netif_running(adapter->netdev))
10045                         napi_synchronize(&qv->napi);
10046                 ring->netdev = NULL;
10047         }
10048
10049         /* unbind the queues and drop the subordinate channel config */
10050         netdev_unbind_sb_channel(pdev, accel->netdev);
10051         netdev_set_sb_channel(accel->netdev, 0);
10052
10053         clear_bit(accel->pool, adapter->fwd_bitmask);
10054         kfree(accel);
10055 }
10056
10057 #define IXGBE_MAX_MAC_HDR_LEN           127
10058 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10059
10060 static netdev_features_t
10061 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10062                      netdev_features_t features)
10063 {
10064         unsigned int network_hdr_len, mac_hdr_len;
10065
10066         /* Make certain the headers can be described by a context descriptor */
10067         mac_hdr_len = skb_network_header(skb) - skb->data;
10068         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10069                 return features & ~(NETIF_F_HW_CSUM |
10070                                     NETIF_F_SCTP_CRC |
10071                                     NETIF_F_GSO_UDP_L4 |
10072                                     NETIF_F_HW_VLAN_CTAG_TX |
10073                                     NETIF_F_TSO |
10074                                     NETIF_F_TSO6);
10075
10076         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10077         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10078                 return features & ~(NETIF_F_HW_CSUM |
10079                                     NETIF_F_SCTP_CRC |
10080                                     NETIF_F_GSO_UDP_L4 |
10081                                     NETIF_F_TSO |
10082                                     NETIF_F_TSO6);
10083
10084         /* We can only support IPV4 TSO in tunnels if we can mangle the
10085          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10086          * IPsec offoad sets skb->encapsulation but still can handle
10087          * the TSO, so it's the exception.
10088          */
10089         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10090 #ifdef CONFIG_IXGBE_IPSEC
10091                 if (!secpath_exists(skb))
10092 #endif
10093                         features &= ~NETIF_F_TSO;
10094         }
10095
10096         return features;
10097 }
10098
10099 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10100 {
10101         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10102         struct ixgbe_adapter *adapter = netdev_priv(dev);
10103         struct bpf_prog *old_prog;
10104         bool need_reset;
10105
10106         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10107                 return -EINVAL;
10108
10109         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10110                 return -EINVAL;
10111
10112         /* verify ixgbe ring attributes are sufficient for XDP */
10113         for (i = 0; i < adapter->num_rx_queues; i++) {
10114                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10115
10116                 if (ring_is_rsc_enabled(ring))
10117                         return -EINVAL;
10118
10119                 if (frame_size > ixgbe_rx_bufsz(ring))
10120                         return -EINVAL;
10121         }
10122
10123         if (nr_cpu_ids > MAX_XDP_QUEUES)
10124                 return -ENOMEM;
10125
10126         old_prog = xchg(&adapter->xdp_prog, prog);
10127         need_reset = (!!prog != !!old_prog);
10128
10129         /* If transitioning XDP modes reconfigure rings */
10130         if (need_reset) {
10131                 int err;
10132
10133                 if (!prog)
10134                         /* Wait until ndo_xsk_wakeup completes. */
10135                         synchronize_rcu();
10136                 err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10137
10138                 if (err) {
10139                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10140                         return -EINVAL;
10141                 }
10142         } else {
10143                 for (i = 0; i < adapter->num_rx_queues; i++)
10144                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10145                             adapter->xdp_prog);
10146         }
10147
10148         if (old_prog)
10149                 bpf_prog_put(old_prog);
10150
10151         /* Kick start the NAPI context if there is an AF_XDP socket open
10152          * on that queue id. This so that receiving will start.
10153          */
10154         if (need_reset && prog)
10155                 for (i = 0; i < adapter->num_rx_queues; i++)
10156                         if (adapter->xdp_ring[i]->xsk_pool)
10157                                 (void)ixgbe_xsk_wakeup(adapter->netdev, i,
10158                                                        XDP_WAKEUP_RX);
10159
10160         return 0;
10161 }
10162
10163 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10164 {
10165         struct ixgbe_adapter *adapter = netdev_priv(dev);
10166
10167         switch (xdp->command) {
10168         case XDP_SETUP_PROG:
10169                 return ixgbe_xdp_setup(dev, xdp->prog);
10170         case XDP_SETUP_XSK_POOL:
10171                 return ixgbe_xsk_pool_setup(adapter, xdp->xsk.pool,
10172                                             xdp->xsk.queue_id);
10173
10174         default:
10175                 return -EINVAL;
10176         }
10177 }
10178
10179 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10180 {
10181         /* Force memory writes to complete before letting h/w know there
10182          * are new descriptors to fetch.
10183          */
10184         wmb();
10185         writel(ring->next_to_use, ring->tail);
10186 }
10187
10188 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10189                           struct xdp_frame **frames, u32 flags)
10190 {
10191         struct ixgbe_adapter *adapter = netdev_priv(dev);
10192         struct ixgbe_ring *ring;
10193         int drops = 0;
10194         int i;
10195
10196         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10197                 return -ENETDOWN;
10198
10199         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10200                 return -EINVAL;
10201
10202         /* During program transitions its possible adapter->xdp_prog is assigned
10203          * but ring has not been configured yet. In this case simply abort xmit.
10204          */
10205         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10206         if (unlikely(!ring))
10207                 return -ENXIO;
10208
10209         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10210                 return -ENXIO;
10211
10212         for (i = 0; i < n; i++) {
10213                 struct xdp_frame *xdpf = frames[i];
10214                 int err;
10215
10216                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10217                 if (err != IXGBE_XDP_TX) {
10218                         xdp_return_frame_rx_napi(xdpf);
10219                         drops++;
10220                 }
10221         }
10222
10223         if (unlikely(flags & XDP_XMIT_FLUSH))
10224                 ixgbe_xdp_ring_update_tail(ring);
10225
10226         return n - drops;
10227 }
10228
10229 static const struct net_device_ops ixgbe_netdev_ops = {
10230         .ndo_open               = ixgbe_open,
10231         .ndo_stop               = ixgbe_close,
10232         .ndo_start_xmit         = ixgbe_xmit_frame,
10233         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10234         .ndo_validate_addr      = eth_validate_addr,
10235         .ndo_set_mac_address    = ixgbe_set_mac,
10236         .ndo_change_mtu         = ixgbe_change_mtu,
10237         .ndo_tx_timeout         = ixgbe_tx_timeout,
10238         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10239         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10240         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10241         .ndo_do_ioctl           = ixgbe_ioctl,
10242         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10243         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10244         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10245         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10246         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10247         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10248         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10249         .ndo_get_stats64        = ixgbe_get_stats64,
10250         .ndo_setup_tc           = __ixgbe_setup_tc,
10251 #ifdef IXGBE_FCOE
10252         .ndo_select_queue       = ixgbe_select_queue,
10253         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10254         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10255         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10256         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10257         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10258         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10259         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10260 #endif /* IXGBE_FCOE */
10261         .ndo_set_features = ixgbe_set_features,
10262         .ndo_fix_features = ixgbe_fix_features,
10263         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10264         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10265         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10266         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10267         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10268         .ndo_features_check     = ixgbe_features_check,
10269         .ndo_bpf                = ixgbe_xdp,
10270         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10271         .ndo_xsk_wakeup         = ixgbe_xsk_wakeup,
10272 };
10273
10274 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10275                                  struct ixgbe_ring *tx_ring)
10276 {
10277         unsigned long wait_delay, delay_interval;
10278         struct ixgbe_hw *hw = &adapter->hw;
10279         u8 reg_idx = tx_ring->reg_idx;
10280         int wait_loop;
10281         u32 txdctl;
10282
10283         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10284
10285         /* delay mechanism from ixgbe_disable_tx */
10286         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10287
10288         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10289         wait_delay = delay_interval;
10290
10291         while (wait_loop--) {
10292                 usleep_range(wait_delay, wait_delay + 10);
10293                 wait_delay += delay_interval * 2;
10294                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10295
10296                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10297                         return;
10298         }
10299
10300         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10301 }
10302
10303 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10304                               struct ixgbe_ring *tx_ring)
10305 {
10306         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10307         ixgbe_disable_txr_hw(adapter, tx_ring);
10308 }
10309
10310 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10311                                  struct ixgbe_ring *rx_ring)
10312 {
10313         unsigned long wait_delay, delay_interval;
10314         struct ixgbe_hw *hw = &adapter->hw;
10315         u8 reg_idx = rx_ring->reg_idx;
10316         int wait_loop;
10317         u32 rxdctl;
10318
10319         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10320         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10321         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10322
10323         /* write value back with RXDCTL.ENABLE bit cleared */
10324         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10325
10326         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10327         if (hw->mac.type == ixgbe_mac_82598EB &&
10328             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10329                 return;
10330
10331         /* delay mechanism from ixgbe_disable_rx */
10332         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10333
10334         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10335         wait_delay = delay_interval;
10336
10337         while (wait_loop--) {
10338                 usleep_range(wait_delay, wait_delay + 10);
10339                 wait_delay += delay_interval * 2;
10340                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10341
10342                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10343                         return;
10344         }
10345
10346         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10347 }
10348
10349 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10350 {
10351         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10352         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10353 }
10354
10355 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10356 {
10357         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10358         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10359 }
10360
10361 /**
10362  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10363  * @adapter: adapter structure
10364  * @ring: ring index
10365  *
10366  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10367  * assumes that the netdev is running.
10368  **/
10369 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10370 {
10371         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10372
10373         rx_ring = adapter->rx_ring[ring];
10374         tx_ring = adapter->tx_ring[ring];
10375         xdp_ring = adapter->xdp_ring[ring];
10376
10377         ixgbe_disable_txr(adapter, tx_ring);
10378         if (xdp_ring)
10379                 ixgbe_disable_txr(adapter, xdp_ring);
10380         ixgbe_disable_rxr_hw(adapter, rx_ring);
10381
10382         if (xdp_ring)
10383                 synchronize_rcu();
10384
10385         /* Rx/Tx/XDP Tx share the same napi context. */
10386         napi_disable(&rx_ring->q_vector->napi);
10387
10388         ixgbe_clean_tx_ring(tx_ring);
10389         if (xdp_ring)
10390                 ixgbe_clean_tx_ring(xdp_ring);
10391         ixgbe_clean_rx_ring(rx_ring);
10392
10393         ixgbe_reset_txr_stats(tx_ring);
10394         if (xdp_ring)
10395                 ixgbe_reset_txr_stats(xdp_ring);
10396         ixgbe_reset_rxr_stats(rx_ring);
10397 }
10398
10399 /**
10400  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10401  * @adapter: adapter structure
10402  * @ring: ring index
10403  *
10404  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10405  * assumes that the netdev is running.
10406  **/
10407 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10408 {
10409         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10410
10411         rx_ring = adapter->rx_ring[ring];
10412         tx_ring = adapter->tx_ring[ring];
10413         xdp_ring = adapter->xdp_ring[ring];
10414
10415         /* Rx/Tx/XDP Tx share the same napi context. */
10416         napi_enable(&rx_ring->q_vector->napi);
10417
10418         ixgbe_configure_tx_ring(adapter, tx_ring);
10419         if (xdp_ring)
10420                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10421         ixgbe_configure_rx_ring(adapter, rx_ring);
10422
10423         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10424         if (xdp_ring)
10425                 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10426 }
10427
10428 /**
10429  * ixgbe_enumerate_functions - Get the number of ports this device has
10430  * @adapter: adapter structure
10431  *
10432  * This function enumerates the phsyical functions co-located on a single slot,
10433  * in order to determine how many ports a device has. This is most useful in
10434  * determining the required GT/s of PCIe bandwidth necessary for optimal
10435  * performance.
10436  **/
10437 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10438 {
10439         struct pci_dev *entry, *pdev = adapter->pdev;
10440         int physfns = 0;
10441
10442         /* Some cards can not use the generic count PCIe functions method,
10443          * because they are behind a parent switch, so we hardcode these with
10444          * the correct number of functions.
10445          */
10446         if (ixgbe_pcie_from_parent(&adapter->hw))
10447                 physfns = 4;
10448
10449         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10450                 /* don't count virtual functions */
10451                 if (entry->is_virtfn)
10452                         continue;
10453
10454                 /* When the devices on the bus don't all match our device ID,
10455                  * we can't reliably determine the correct number of
10456                  * functions. This can occur if a function has been direct
10457                  * attached to a virtual machine using VT-d, for example. In
10458                  * this case, simply return -1 to indicate this.
10459                  */
10460                 if ((entry->vendor != pdev->vendor) ||
10461                     (entry->device != pdev->device))
10462                         return -1;
10463
10464                 physfns++;
10465         }
10466
10467         return physfns;
10468 }
10469
10470 /**
10471  * ixgbe_wol_supported - Check whether device supports WoL
10472  * @adapter: the adapter private structure
10473  * @device_id: the device ID
10474  * @subdevice_id: the subsystem device ID
10475  *
10476  * This function is used by probe and ethtool to determine
10477  * which devices have WoL support
10478  *
10479  **/
10480 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10481                          u16 subdevice_id)
10482 {
10483         struct ixgbe_hw *hw = &adapter->hw;
10484         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10485
10486         /* WOL not supported on 82598 */
10487         if (hw->mac.type == ixgbe_mac_82598EB)
10488                 return false;
10489
10490         /* check eeprom to see if WOL is enabled for X540 and newer */
10491         if (hw->mac.type >= ixgbe_mac_X540) {
10492                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10493                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10494                      (hw->bus.func == 0)))
10495                         return true;
10496         }
10497
10498         /* WOL is determined based on device IDs for 82599 MACs */
10499         switch (device_id) {
10500         case IXGBE_DEV_ID_82599_SFP:
10501                 /* Only these subdevices could supports WOL */
10502                 switch (subdevice_id) {
10503                 case IXGBE_SUBDEV_ID_82599_560FLR:
10504                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10505                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10506                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10507                         /* only support first port */
10508                         if (hw->bus.func != 0)
10509                                 break;
10510                         fallthrough;
10511                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10512                 case IXGBE_SUBDEV_ID_82599_SFP:
10513                 case IXGBE_SUBDEV_ID_82599_RNDC:
10514                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10515                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10516                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10517                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10518                         return true;
10519                 }
10520                 break;
10521         case IXGBE_DEV_ID_82599EN_SFP:
10522                 /* Only these subdevices support WOL */
10523                 switch (subdevice_id) {
10524                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10525                         return true;
10526                 }
10527                 break;
10528         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10529                 /* All except this subdevice support WOL */
10530                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10531                         return true;
10532                 break;
10533         case IXGBE_DEV_ID_82599_KX4:
10534                 return  true;
10535         default:
10536                 break;
10537         }
10538
10539         return false;
10540 }
10541
10542 /**
10543  * ixgbe_set_fw_version - Set FW version
10544  * @adapter: the adapter private structure
10545  *
10546  * This function is used by probe and ethtool to determine the FW version to
10547  * format to display. The FW version is taken from the EEPROM/NVM.
10548  */
10549 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10550 {
10551         struct ixgbe_hw *hw = &adapter->hw;
10552         struct ixgbe_nvm_version nvm_ver;
10553
10554         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10555         if (nvm_ver.oem_valid) {
10556                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10557                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10558                          nvm_ver.oem_release);
10559                 return;
10560         }
10561
10562         ixgbe_get_etk_id(hw, &nvm_ver);
10563         ixgbe_get_orom_version(hw, &nvm_ver);
10564
10565         if (nvm_ver.or_valid) {
10566                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10567                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10568                          nvm_ver.or_build, nvm_ver.or_patch);
10569                 return;
10570         }
10571
10572         /* Set ETrack ID format */
10573         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10574                  "0x%08x", nvm_ver.etk_id);
10575 }
10576
10577 /**
10578  * ixgbe_probe - Device Initialization Routine
10579  * @pdev: PCI device information struct
10580  * @ent: entry in ixgbe_pci_tbl
10581  *
10582  * Returns 0 on success, negative on failure
10583  *
10584  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10585  * The OS initialization, configuring of the adapter private structure,
10586  * and a hardware reset occur.
10587  **/
10588 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10589 {
10590         struct net_device *netdev;
10591         struct ixgbe_adapter *adapter = NULL;
10592         struct ixgbe_hw *hw;
10593         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10594         int i, err, pci_using_dac, expected_gts;
10595         unsigned int indices = MAX_TX_QUEUES;
10596         u8 part_str[IXGBE_PBANUM_LENGTH];
10597         bool disable_dev = false;
10598 #ifdef IXGBE_FCOE
10599         u16 device_caps;
10600 #endif
10601         u32 eec;
10602
10603         /* Catch broken hardware that put the wrong VF device ID in
10604          * the PCIe SR-IOV capability.
10605          */
10606         if (pdev->is_virtfn) {
10607                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10608                      pci_name(pdev), pdev->vendor, pdev->device);
10609                 return -EINVAL;
10610         }
10611
10612         err = pci_enable_device_mem(pdev);
10613         if (err)
10614                 return err;
10615
10616         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10617                 pci_using_dac = 1;
10618         } else {
10619                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10620                 if (err) {
10621                         dev_err(&pdev->dev,
10622                                 "No usable DMA configuration, aborting\n");
10623                         goto err_dma;
10624                 }
10625                 pci_using_dac = 0;
10626         }
10627
10628         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10629         if (err) {
10630                 dev_err(&pdev->dev,
10631                         "pci_request_selected_regions failed 0x%x\n", err);
10632                 goto err_pci_reg;
10633         }
10634
10635         pci_enable_pcie_error_reporting(pdev);
10636
10637         pci_set_master(pdev);
10638         pci_save_state(pdev);
10639
10640         if (ii->mac == ixgbe_mac_82598EB) {
10641 #ifdef CONFIG_IXGBE_DCB
10642                 /* 8 TC w/ 4 queues per TC */
10643                 indices = 4 * MAX_TRAFFIC_CLASS;
10644 #else
10645                 indices = IXGBE_MAX_RSS_INDICES;
10646 #endif
10647         }
10648
10649         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10650         if (!netdev) {
10651                 err = -ENOMEM;
10652                 goto err_alloc_etherdev;
10653         }
10654
10655         SET_NETDEV_DEV(netdev, &pdev->dev);
10656
10657         adapter = netdev_priv(netdev);
10658
10659         adapter->netdev = netdev;
10660         adapter->pdev = pdev;
10661         hw = &adapter->hw;
10662         hw->back = adapter;
10663         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10664
10665         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10666                               pci_resource_len(pdev, 0));
10667         adapter->io_addr = hw->hw_addr;
10668         if (!hw->hw_addr) {
10669                 err = -EIO;
10670                 goto err_ioremap;
10671         }
10672
10673         netdev->netdev_ops = &ixgbe_netdev_ops;
10674         ixgbe_set_ethtool_ops(netdev);
10675         netdev->watchdog_timeo = 5 * HZ;
10676         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10677
10678         /* Setup hw api */
10679         hw->mac.ops   = *ii->mac_ops;
10680         hw->mac.type  = ii->mac;
10681         hw->mvals     = ii->mvals;
10682         if (ii->link_ops)
10683                 hw->link.ops  = *ii->link_ops;
10684
10685         /* EEPROM */
10686         hw->eeprom.ops = *ii->eeprom_ops;
10687         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10688         if (ixgbe_removed(hw->hw_addr)) {
10689                 err = -EIO;
10690                 goto err_ioremap;
10691         }
10692         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10693         if (!(eec & BIT(8)))
10694                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10695
10696         /* PHY */
10697         hw->phy.ops = *ii->phy_ops;
10698         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10699         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10700         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10701         hw->phy.mdio.mmds = 0;
10702         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10703         hw->phy.mdio.dev = netdev;
10704         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10705         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10706
10707         /* setup the private structure */
10708         err = ixgbe_sw_init(adapter, ii);
10709         if (err)
10710                 goto err_sw_init;
10711
10712         switch (adapter->hw.mac.type) {
10713         case ixgbe_mac_X550:
10714         case ixgbe_mac_X550EM_x:
10715                 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550;
10716                 break;
10717         case ixgbe_mac_x550em_a:
10718                 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550em_a;
10719                 break;
10720         default:
10721                 break;
10722         }
10723
10724         /* Make sure the SWFW semaphore is in a valid state */
10725         if (hw->mac.ops.init_swfw_sync)
10726                 hw->mac.ops.init_swfw_sync(hw);
10727
10728         /* Make it possible the adapter to be woken up via WOL */
10729         switch (adapter->hw.mac.type) {
10730         case ixgbe_mac_82599EB:
10731         case ixgbe_mac_X540:
10732         case ixgbe_mac_X550:
10733         case ixgbe_mac_X550EM_x:
10734         case ixgbe_mac_x550em_a:
10735                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10736                 break;
10737         default:
10738                 break;
10739         }
10740
10741         /*
10742          * If there is a fan on this device and it has failed log the
10743          * failure.
10744          */
10745         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10746                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10747                 if (esdp & IXGBE_ESDP_SDP1)
10748                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10749         }
10750
10751         if (allow_unsupported_sfp)
10752                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10753
10754         /* reset_hw fills in the perm_addr as well */
10755         hw->phy.reset_if_overtemp = true;
10756         err = hw->mac.ops.reset_hw(hw);
10757         hw->phy.reset_if_overtemp = false;
10758         ixgbe_set_eee_capable(adapter);
10759         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10760                 err = 0;
10761         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10762                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10763                 e_dev_err("Reload the driver after installing a supported module.\n");
10764                 goto err_sw_init;
10765         } else if (err) {
10766                 e_dev_err("HW Init failed: %d\n", err);
10767                 goto err_sw_init;
10768         }
10769
10770 #ifdef CONFIG_PCI_IOV
10771         /* SR-IOV not supported on the 82598 */
10772         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10773                 goto skip_sriov;
10774         /* Mailbox */
10775         ixgbe_init_mbx_params_pf(hw);
10776         hw->mbx.ops = ii->mbx_ops;
10777         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10778         ixgbe_enable_sriov(adapter, max_vfs);
10779 skip_sriov:
10780
10781 #endif
10782         netdev->features = NETIF_F_SG |
10783                            NETIF_F_TSO |
10784                            NETIF_F_TSO6 |
10785                            NETIF_F_RXHASH |
10786                            NETIF_F_RXCSUM |
10787                            NETIF_F_HW_CSUM;
10788
10789 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10790                                     NETIF_F_GSO_GRE_CSUM | \
10791                                     NETIF_F_GSO_IPXIP4 | \
10792                                     NETIF_F_GSO_IPXIP6 | \
10793                                     NETIF_F_GSO_UDP_TUNNEL | \
10794                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10795
10796         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10797         netdev->features |= NETIF_F_GSO_PARTIAL |
10798                             IXGBE_GSO_PARTIAL_FEATURES;
10799
10800         if (hw->mac.type >= ixgbe_mac_82599EB)
10801                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
10802
10803 #ifdef CONFIG_IXGBE_IPSEC
10804 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10805                                  NETIF_F_HW_ESP_TX_CSUM | \
10806                                  NETIF_F_GSO_ESP)
10807
10808         if (adapter->ipsec)
10809                 netdev->features |= IXGBE_ESP_FEATURES;
10810 #endif
10811         /* copy netdev features into list of user selectable features */
10812         netdev->hw_features |= netdev->features |
10813                                NETIF_F_HW_VLAN_CTAG_FILTER |
10814                                NETIF_F_HW_VLAN_CTAG_RX |
10815                                NETIF_F_HW_VLAN_CTAG_TX |
10816                                NETIF_F_RXALL |
10817                                NETIF_F_HW_L2FW_DOFFLOAD;
10818
10819         if (hw->mac.type >= ixgbe_mac_82599EB)
10820                 netdev->hw_features |= NETIF_F_NTUPLE |
10821                                        NETIF_F_HW_TC;
10822
10823         if (pci_using_dac)
10824                 netdev->features |= NETIF_F_HIGHDMA;
10825
10826         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10827         netdev->hw_enc_features |= netdev->vlan_features;
10828         netdev->mpls_features |= NETIF_F_SG |
10829                                  NETIF_F_TSO |
10830                                  NETIF_F_TSO6 |
10831                                  NETIF_F_HW_CSUM;
10832         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10833
10834         /* set this bit last since it cannot be part of vlan_features */
10835         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10836                             NETIF_F_HW_VLAN_CTAG_RX |
10837                             NETIF_F_HW_VLAN_CTAG_TX;
10838
10839         netdev->priv_flags |= IFF_UNICAST_FLT;
10840         netdev->priv_flags |= IFF_SUPP_NOFCS;
10841
10842         /* MTU range: 68 - 9710 */
10843         netdev->min_mtu = ETH_MIN_MTU;
10844         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10845
10846 #ifdef CONFIG_IXGBE_DCB
10847         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10848                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10849 #endif
10850
10851 #ifdef IXGBE_FCOE
10852         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10853                 unsigned int fcoe_l;
10854
10855                 if (hw->mac.ops.get_device_caps) {
10856                         hw->mac.ops.get_device_caps(hw, &device_caps);
10857                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10858                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10859                 }
10860
10861
10862                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10863                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10864
10865                 netdev->features |= NETIF_F_FSO |
10866                                     NETIF_F_FCOE_CRC;
10867
10868                 netdev->vlan_features |= NETIF_F_FSO |
10869                                          NETIF_F_FCOE_CRC |
10870                                          NETIF_F_FCOE_MTU;
10871         }
10872 #endif /* IXGBE_FCOE */
10873         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10874                 netdev->hw_features |= NETIF_F_LRO;
10875         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10876                 netdev->features |= NETIF_F_LRO;
10877
10878         if (ixgbe_check_fw_error(adapter)) {
10879                 err = -EIO;
10880                 goto err_sw_init;
10881         }
10882
10883         /* make sure the EEPROM is good */
10884         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10885                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10886                 err = -EIO;
10887                 goto err_sw_init;
10888         }
10889
10890         eth_platform_get_mac_address(&adapter->pdev->dev,
10891                                      adapter->hw.mac.perm_addr);
10892
10893         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10894
10895         if (!is_valid_ether_addr(netdev->dev_addr)) {
10896                 e_dev_err("invalid MAC address\n");
10897                 err = -EIO;
10898                 goto err_sw_init;
10899         }
10900
10901         /* Set hw->mac.addr to permanent MAC address */
10902         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10903         ixgbe_mac_set_default_filter(adapter);
10904
10905         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10906
10907         if (ixgbe_removed(hw->hw_addr)) {
10908                 err = -EIO;
10909                 goto err_sw_init;
10910         }
10911         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10912         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10913         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10914
10915         err = ixgbe_init_interrupt_scheme(adapter);
10916         if (err)
10917                 goto err_sw_init;
10918
10919         for (i = 0; i < adapter->num_rx_queues; i++)
10920                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10921         for (i = 0; i < adapter->num_tx_queues; i++)
10922                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10923         for (i = 0; i < adapter->num_xdp_queues; i++)
10924                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10925
10926         /* WOL not supported for all devices */
10927         adapter->wol = 0;
10928         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10929         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10930                                                 pdev->subsystem_device);
10931         if (hw->wol_enabled)
10932                 adapter->wol = IXGBE_WUFC_MAG;
10933
10934         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10935
10936         /* save off EEPROM version number */
10937         ixgbe_set_fw_version(adapter);
10938
10939         /* pick up the PCI bus settings for reporting later */
10940         if (ixgbe_pcie_from_parent(hw))
10941                 ixgbe_get_parent_bus_info(adapter);
10942         else
10943                  hw->mac.ops.get_bus_info(hw);
10944
10945         /* calculate the expected PCIe bandwidth required for optimal
10946          * performance. Note that some older parts will never have enough
10947          * bandwidth due to being older generation PCIe parts. We clamp these
10948          * parts to ensure no warning is displayed if it can't be fixed.
10949          */
10950         switch (hw->mac.type) {
10951         case ixgbe_mac_82598EB:
10952                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10953                 break;
10954         default:
10955                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10956                 break;
10957         }
10958
10959         /* don't check link if we failed to enumerate functions */
10960         if (expected_gts > 0)
10961                 ixgbe_check_minimum_link(adapter, expected_gts);
10962
10963         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10964         if (err)
10965                 strlcpy(part_str, "Unknown", sizeof(part_str));
10966         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10967                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10968                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10969                            part_str);
10970         else
10971                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10972                            hw->mac.type, hw->phy.type, part_str);
10973
10974         e_dev_info("%pM\n", netdev->dev_addr);
10975
10976         /* reset the hardware with the new settings */
10977         err = hw->mac.ops.start_hw(hw);
10978         if (err == IXGBE_ERR_EEPROM_VERSION) {
10979                 /* We are running on a pre-production device, log a warning */
10980                 e_dev_warn("This device is a pre-production adapter/LOM. "
10981                            "Please be aware there may be issues associated "
10982                            "with your hardware.  If you are experiencing "
10983                            "problems please contact your Intel or hardware "
10984                            "representative who provided you with this "
10985                            "hardware.\n");
10986         }
10987         strcpy(netdev->name, "eth%d");
10988         pci_set_drvdata(pdev, adapter);
10989         err = register_netdev(netdev);
10990         if (err)
10991                 goto err_register;
10992
10993
10994         /* power down the optics for 82599 SFP+ fiber */
10995         if (hw->mac.ops.disable_tx_laser)
10996                 hw->mac.ops.disable_tx_laser(hw);
10997
10998         /* carrier off reporting is important to ethtool even BEFORE open */
10999         netif_carrier_off(netdev);
11000
11001 #ifdef CONFIG_IXGBE_DCA
11002         if (dca_add_requester(&pdev->dev) == 0) {
11003                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11004                 ixgbe_setup_dca(adapter);
11005         }
11006 #endif
11007         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11008                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11009                 for (i = 0; i < adapter->num_vfs; i++)
11010                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11011         }
11012
11013         /* firmware requires driver version to be 0xFFFFFFFF
11014          * since os does not support feature
11015          */
11016         if (hw->mac.ops.set_fw_drv_ver)
11017                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11018                                            sizeof(UTS_RELEASE) - 1,
11019                                            UTS_RELEASE);
11020
11021         /* add san mac addr to netdev */
11022         ixgbe_add_sanmac_netdev(netdev);
11023
11024         e_dev_info("%s\n", ixgbe_default_device_descr);
11025
11026 #ifdef CONFIG_IXGBE_HWMON
11027         if (ixgbe_sysfs_init(adapter))
11028                 e_err(probe, "failed to allocate sysfs resources\n");
11029 #endif /* CONFIG_IXGBE_HWMON */
11030
11031         ixgbe_dbg_adapter_init(adapter);
11032
11033         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11034         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11035                 hw->mac.ops.setup_link(hw,
11036                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11037                         true);
11038
11039         err = ixgbe_mii_bus_init(hw);
11040         if (err)
11041                 goto err_netdev;
11042
11043         return 0;
11044
11045 err_netdev:
11046         unregister_netdev(netdev);
11047 err_register:
11048         ixgbe_release_hw_control(adapter);
11049         ixgbe_clear_interrupt_scheme(adapter);
11050 err_sw_init:
11051         ixgbe_disable_sriov(adapter);
11052         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11053         iounmap(adapter->io_addr);
11054         kfree(adapter->jump_tables[0]);
11055         kfree(adapter->mac_table);
11056         kfree(adapter->rss_key);
11057         bitmap_free(adapter->af_xdp_zc_qps);
11058 err_ioremap:
11059         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11060         free_netdev(netdev);
11061 err_alloc_etherdev:
11062         pci_release_mem_regions(pdev);
11063 err_pci_reg:
11064 err_dma:
11065         if (!adapter || disable_dev)
11066                 pci_disable_device(pdev);
11067         return err;
11068 }
11069
11070 /**
11071  * ixgbe_remove - Device Removal Routine
11072  * @pdev: PCI device information struct
11073  *
11074  * ixgbe_remove is called by the PCI subsystem to alert the driver
11075  * that it should release a PCI device.  The could be caused by a
11076  * Hot-Plug event, or because the driver is going to be removed from
11077  * memory.
11078  **/
11079 static void ixgbe_remove(struct pci_dev *pdev)
11080 {
11081         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11082         struct net_device *netdev;
11083         bool disable_dev;
11084         int i;
11085
11086         /* if !adapter then we already cleaned up in probe */
11087         if (!adapter)
11088                 return;
11089
11090         netdev  = adapter->netdev;
11091         ixgbe_dbg_adapter_exit(adapter);
11092
11093         set_bit(__IXGBE_REMOVING, &adapter->state);
11094         cancel_work_sync(&adapter->service_task);
11095
11096         if (adapter->mii_bus)
11097                 mdiobus_unregister(adapter->mii_bus);
11098
11099 #ifdef CONFIG_IXGBE_DCA
11100         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11101                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11102                 dca_remove_requester(&pdev->dev);
11103                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11104                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11105         }
11106
11107 #endif
11108 #ifdef CONFIG_IXGBE_HWMON
11109         ixgbe_sysfs_exit(adapter);
11110 #endif /* CONFIG_IXGBE_HWMON */
11111
11112         /* remove the added san mac */
11113         ixgbe_del_sanmac_netdev(netdev);
11114
11115 #ifdef CONFIG_PCI_IOV
11116         ixgbe_disable_sriov(adapter);
11117 #endif
11118         if (netdev->reg_state == NETREG_REGISTERED)
11119                 unregister_netdev(netdev);
11120
11121         ixgbe_stop_ipsec_offload(adapter);
11122         ixgbe_clear_interrupt_scheme(adapter);
11123
11124         ixgbe_release_hw_control(adapter);
11125
11126 #ifdef CONFIG_DCB
11127         kfree(adapter->ixgbe_ieee_pfc);
11128         kfree(adapter->ixgbe_ieee_ets);
11129
11130 #endif
11131         iounmap(adapter->io_addr);
11132         pci_release_mem_regions(pdev);
11133
11134         e_dev_info("complete\n");
11135
11136         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11137                 if (adapter->jump_tables[i]) {
11138                         kfree(adapter->jump_tables[i]->input);
11139                         kfree(adapter->jump_tables[i]->mask);
11140                 }
11141                 kfree(adapter->jump_tables[i]);
11142         }
11143
11144         kfree(adapter->mac_table);
11145         kfree(adapter->rss_key);
11146         bitmap_free(adapter->af_xdp_zc_qps);
11147         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11148         free_netdev(netdev);
11149
11150         pci_disable_pcie_error_reporting(pdev);
11151
11152         if (disable_dev)
11153                 pci_disable_device(pdev);
11154 }
11155
11156 /**
11157  * ixgbe_io_error_detected - called when PCI error is detected
11158  * @pdev: Pointer to PCI device
11159  * @state: The current pci connection state
11160  *
11161  * This function is called after a PCI bus error affecting
11162  * this device has been detected.
11163  */
11164 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11165                                                 pci_channel_state_t state)
11166 {
11167         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11168         struct net_device *netdev = adapter->netdev;
11169
11170 #ifdef CONFIG_PCI_IOV
11171         struct ixgbe_hw *hw = &adapter->hw;
11172         struct pci_dev *bdev, *vfdev;
11173         u32 dw0, dw1, dw2, dw3;
11174         int vf, pos;
11175         u16 req_id, pf_func;
11176
11177         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11178             adapter->num_vfs == 0)
11179                 goto skip_bad_vf_detection;
11180
11181         bdev = pdev->bus->self;
11182         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11183                 bdev = bdev->bus->self;
11184
11185         if (!bdev)
11186                 goto skip_bad_vf_detection;
11187
11188         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11189         if (!pos)
11190                 goto skip_bad_vf_detection;
11191
11192         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11193         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11194         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11195         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11196         if (ixgbe_removed(hw->hw_addr))
11197                 goto skip_bad_vf_detection;
11198
11199         req_id = dw1 >> 16;
11200         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11201         if (!(req_id & 0x0080))
11202                 goto skip_bad_vf_detection;
11203
11204         pf_func = req_id & 0x01;
11205         if ((pf_func & 1) == (pdev->devfn & 1)) {
11206                 unsigned int device_id;
11207
11208                 vf = (req_id & 0x7F) >> 1;
11209                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11210                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11211                                 "%8.8x\tdw3: %8.8x\n",
11212                 dw0, dw1, dw2, dw3);
11213                 switch (adapter->hw.mac.type) {
11214                 case ixgbe_mac_82599EB:
11215                         device_id = IXGBE_82599_VF_DEVICE_ID;
11216                         break;
11217                 case ixgbe_mac_X540:
11218                         device_id = IXGBE_X540_VF_DEVICE_ID;
11219                         break;
11220                 case ixgbe_mac_X550:
11221                         device_id = IXGBE_DEV_ID_X550_VF;
11222                         break;
11223                 case ixgbe_mac_X550EM_x:
11224                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11225                         break;
11226                 case ixgbe_mac_x550em_a:
11227                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11228                         break;
11229                 default:
11230                         device_id = 0;
11231                         break;
11232                 }
11233
11234                 /* Find the pci device of the offending VF */
11235                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11236                 while (vfdev) {
11237                         if (vfdev->devfn == (req_id & 0xFF))
11238                                 break;
11239                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11240                                                device_id, vfdev);
11241                 }
11242                 /*
11243                  * There's a slim chance the VF could have been hot plugged,
11244                  * so if it is no longer present we don't need to issue the
11245                  * VFLR.  Just clean up the AER in that case.
11246                  */
11247                 if (vfdev) {
11248                         pcie_flr(vfdev);
11249                         /* Free device reference count */
11250                         pci_dev_put(vfdev);
11251                 }
11252         }
11253
11254         /*
11255          * Even though the error may have occurred on the other port
11256          * we still need to increment the vf error reference count for
11257          * both ports because the I/O resume function will be called
11258          * for both of them.
11259          */
11260         adapter->vferr_refcount++;
11261
11262         return PCI_ERS_RESULT_RECOVERED;
11263
11264 skip_bad_vf_detection:
11265 #endif /* CONFIG_PCI_IOV */
11266         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11267                 return PCI_ERS_RESULT_DISCONNECT;
11268
11269         if (!netif_device_present(netdev))
11270                 return PCI_ERS_RESULT_DISCONNECT;
11271
11272         rtnl_lock();
11273         netif_device_detach(netdev);
11274
11275         if (netif_running(netdev))
11276                 ixgbe_close_suspend(adapter);
11277
11278         if (state == pci_channel_io_perm_failure) {
11279                 rtnl_unlock();
11280                 return PCI_ERS_RESULT_DISCONNECT;
11281         }
11282
11283         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11284                 pci_disable_device(pdev);
11285         rtnl_unlock();
11286
11287         /* Request a slot reset. */
11288         return PCI_ERS_RESULT_NEED_RESET;
11289 }
11290
11291 /**
11292  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11293  * @pdev: Pointer to PCI device
11294  *
11295  * Restart the card from scratch, as if from a cold-boot.
11296  */
11297 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11298 {
11299         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11300         pci_ers_result_t result;
11301
11302         if (pci_enable_device_mem(pdev)) {
11303                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11304                 result = PCI_ERS_RESULT_DISCONNECT;
11305         } else {
11306                 smp_mb__before_atomic();
11307                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11308                 adapter->hw.hw_addr = adapter->io_addr;
11309                 pci_set_master(pdev);
11310                 pci_restore_state(pdev);
11311                 pci_save_state(pdev);
11312
11313                 pci_wake_from_d3(pdev, false);
11314
11315                 ixgbe_reset(adapter);
11316                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11317                 result = PCI_ERS_RESULT_RECOVERED;
11318         }
11319
11320         return result;
11321 }
11322
11323 /**
11324  * ixgbe_io_resume - called when traffic can start flowing again.
11325  * @pdev: Pointer to PCI device
11326  *
11327  * This callback is called when the error recovery driver tells us that
11328  * its OK to resume normal operation.
11329  */
11330 static void ixgbe_io_resume(struct pci_dev *pdev)
11331 {
11332         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11333         struct net_device *netdev = adapter->netdev;
11334
11335 #ifdef CONFIG_PCI_IOV
11336         if (adapter->vferr_refcount) {
11337                 e_info(drv, "Resuming after VF err\n");
11338                 adapter->vferr_refcount--;
11339                 return;
11340         }
11341
11342 #endif
11343         rtnl_lock();
11344         if (netif_running(netdev))
11345                 ixgbe_open(netdev);
11346
11347         netif_device_attach(netdev);
11348         rtnl_unlock();
11349 }
11350
11351 static const struct pci_error_handlers ixgbe_err_handler = {
11352         .error_detected = ixgbe_io_error_detected,
11353         .slot_reset = ixgbe_io_slot_reset,
11354         .resume = ixgbe_io_resume,
11355 };
11356
11357 static SIMPLE_DEV_PM_OPS(ixgbe_pm_ops, ixgbe_suspend, ixgbe_resume);
11358
11359 static struct pci_driver ixgbe_driver = {
11360         .name      = ixgbe_driver_name,
11361         .id_table  = ixgbe_pci_tbl,
11362         .probe     = ixgbe_probe,
11363         .remove    = ixgbe_remove,
11364         .driver.pm = &ixgbe_pm_ops,
11365         .shutdown  = ixgbe_shutdown,
11366         .sriov_configure = ixgbe_pci_sriov_configure,
11367         .err_handler = &ixgbe_err_handler
11368 };
11369
11370 /**
11371  * ixgbe_init_module - Driver Registration Routine
11372  *
11373  * ixgbe_init_module is the first routine called when the driver is
11374  * loaded. All it does is register with the PCI subsystem.
11375  **/
11376 static int __init ixgbe_init_module(void)
11377 {
11378         int ret;
11379         pr_info("%s\n", ixgbe_driver_string);
11380         pr_info("%s\n", ixgbe_copyright);
11381
11382         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11383         if (!ixgbe_wq) {
11384                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11385                 return -ENOMEM;
11386         }
11387
11388         ixgbe_dbg_init();
11389
11390         ret = pci_register_driver(&ixgbe_driver);
11391         if (ret) {
11392                 destroy_workqueue(ixgbe_wq);
11393                 ixgbe_dbg_exit();
11394                 return ret;
11395         }
11396
11397 #ifdef CONFIG_IXGBE_DCA
11398         dca_register_notify(&dca_notifier);
11399 #endif
11400
11401         return 0;
11402 }
11403
11404 module_init(ixgbe_init_module);
11405
11406 /**
11407  * ixgbe_exit_module - Driver Exit Cleanup Routine
11408  *
11409  * ixgbe_exit_module is called just before the driver is removed
11410  * from memory.
11411  **/
11412 static void __exit ixgbe_exit_module(void)
11413 {
11414 #ifdef CONFIG_IXGBE_DCA
11415         dca_unregister_notify(&dca_notifier);
11416 #endif
11417         pci_unregister_driver(&ixgbe_driver);
11418
11419         ixgbe_dbg_exit();
11420         if (ixgbe_wq) {
11421                 destroy_workqueue(ixgbe_wq);
11422                 ixgbe_wq = NULL;
11423         }
11424 }
11425
11426 #ifdef CONFIG_IXGBE_DCA
11427 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11428                             void *p)
11429 {
11430         int ret_val;
11431
11432         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11433                                          __ixgbe_notify_dca);
11434
11435         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11436 }
11437
11438 #endif /* CONFIG_IXGBE_DCA */
11439
11440 module_exit(ixgbe_exit_module);
11441
11442 /* ixgbe_main.c */