1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 #include <linux/types.h>
5 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/vmalloc.h>
9 #include <linux/string.h>
11 #include <linux/interrupt.h>
13 #include <linux/tcp.h>
14 #include <linux/sctp.h>
15 #include <linux/pkt_sched.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/etherdevice.h>
21 #include <linux/ethtool.h>
23 #include <linux/if_vlan.h>
24 #include <linux/if_macvlan.h>
25 #include <linux/if_bridge.h>
26 #include <linux/prefetch.h>
27 #include <linux/bpf.h>
28 #include <linux/bpf_trace.h>
29 #include <linux/atomic.h>
30 #include <linux/numa.h>
31 #include <scsi/fc/fc_fcoe.h>
32 #include <net/udp_tunnel.h>
33 #include <net/pkt_cls.h>
34 #include <net/tc_act/tc_gact.h>
35 #include <net/tc_act/tc_mirred.h>
36 #include <net/vxlan.h>
38 #include <net/xdp_sock.h>
41 #include "ixgbe_common.h"
42 #include "ixgbe_dcb_82599.h"
43 #include "ixgbe_phy.h"
44 #include "ixgbe_sriov.h"
45 #include "ixgbe_model.h"
46 #include "ixgbe_txrx_common.h"
48 char ixgbe_driver_name[] = "ixgbe";
49 static const char ixgbe_driver_string[] =
50 "Intel(R) 10 Gigabit PCI Express Network Driver";
52 char ixgbe_default_device_descr[] =
53 "Intel(R) 10 Gigabit Network Connection";
55 static char ixgbe_default_device_descr[] =
56 "Intel(R) 10 Gigabit Network Connection";
58 #define DRV_VERSION "5.1.0-k"
59 const char ixgbe_driver_version[] = DRV_VERSION;
60 static const char ixgbe_copyright[] =
61 "Copyright (c) 1999-2016 Intel Corporation.";
63 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
65 static const struct ixgbe_info *ixgbe_info_tbl[] = {
66 [board_82598] = &ixgbe_82598_info,
67 [board_82599] = &ixgbe_82599_info,
68 [board_X540] = &ixgbe_X540_info,
69 [board_X550] = &ixgbe_X550_info,
70 [board_X550EM_x] = &ixgbe_X550EM_x_info,
71 [board_x550em_x_fw] = &ixgbe_x550em_x_fw_info,
72 [board_x550em_a] = &ixgbe_x550em_a_info,
73 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info,
76 /* ixgbe_pci_tbl - PCI Device ID Table
78 * Wildcard entries (PCI_ANY_ID) should come last
79 * Last entry must be all 0s
81 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
82 * Class, Class Mask, private data (not used) }
84 static const struct pci_device_id ixgbe_pci_tbl[] = {
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
131 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
132 /* required last entry */
135 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
137 #ifdef CONFIG_IXGBE_DCA
138 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
140 static struct notifier_block dca_notifier = {
141 .notifier_call = ixgbe_notify_dca,
147 #ifdef CONFIG_PCI_IOV
148 static unsigned int max_vfs;
149 module_param(max_vfs, uint, 0);
150 MODULE_PARM_DESC(max_vfs,
151 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
152 #endif /* CONFIG_PCI_IOV */
154 static unsigned int allow_unsupported_sfp;
155 module_param(allow_unsupported_sfp, uint, 0);
156 MODULE_PARM_DESC(allow_unsupported_sfp,
157 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
159 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
160 static int debug = -1;
161 module_param(debug, int, 0);
162 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
164 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
165 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
166 MODULE_LICENSE("GPL v2");
167 MODULE_VERSION(DRV_VERSION);
169 static struct workqueue_struct *ixgbe_wq;
171 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
172 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
174 static const struct net_device_ops ixgbe_netdev_ops;
176 static bool netif_is_ixgbe(struct net_device *dev)
178 return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
181 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
184 struct pci_dev *parent_dev;
185 struct pci_bus *parent_bus;
187 parent_bus = adapter->pdev->bus->parent;
191 parent_dev = parent_bus->self;
195 if (!pci_is_pcie(parent_dev))
198 pcie_capability_read_word(parent_dev, reg, value);
199 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
200 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
205 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
207 struct ixgbe_hw *hw = &adapter->hw;
211 hw->bus.type = ixgbe_bus_type_pci_express;
213 /* Get the negotiated link width and speed from PCI config space of the
214 * parent, as this device is behind a switch
216 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
218 /* assume caller will handle error case */
222 hw->bus.width = ixgbe_convert_bus_width(link_status);
223 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
229 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
230 * @hw: hw specific details
232 * This function is used by probe to determine whether a device's PCI-Express
233 * bandwidth details should be gathered from the parent bus instead of from the
234 * device. Used to ensure that various locations all have the correct device ID
237 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
239 switch (hw->device_id) {
240 case IXGBE_DEV_ID_82599_SFP_SF_QP:
241 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
248 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
251 struct ixgbe_hw *hw = &adapter->hw;
252 struct pci_dev *pdev;
254 /* Some devices are not connected over PCIe and thus do not negotiate
255 * speed. These devices do not have valid bus info, and thus any report
256 * we generate may not be correct.
258 if (hw->bus.type == ixgbe_bus_type_internal)
261 /* determine whether to use the parent device */
262 if (ixgbe_pcie_from_parent(&adapter->hw))
263 pdev = adapter->pdev->bus->parent->self;
265 pdev = adapter->pdev;
267 pcie_print_link_status(pdev);
270 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
272 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
273 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
274 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
275 queue_work(ixgbe_wq, &adapter->service_task);
278 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
280 struct ixgbe_adapter *adapter = hw->back;
285 e_dev_err("Adapter removed\n");
286 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
287 ixgbe_service_event_schedule(adapter);
290 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
292 u8 __iomem *reg_addr;
296 reg_addr = READ_ONCE(hw->hw_addr);
297 if (ixgbe_removed(reg_addr))
298 return IXGBE_FAILED_READ_REG;
300 /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
301 * so perform several status register reads to determine if the adapter
304 for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
305 value = readl(reg_addr + IXGBE_STATUS);
306 if (value != IXGBE_FAILED_READ_REG)
311 if (value == IXGBE_FAILED_READ_REG)
312 ixgbe_remove_adapter(hw);
314 value = readl(reg_addr + reg);
319 * ixgbe_read_reg - Read from device register
320 * @hw: hw specific details
321 * @reg: offset of register to read
323 * Returns : value read or IXGBE_FAILED_READ_REG if removed
325 * This function is used to read device registers. It checks for device
326 * removal by confirming any read that returns all ones by checking the
327 * status register value for all ones. This function avoids reading from
328 * the hardware if a removal was previously detected in which case it
329 * returns IXGBE_FAILED_READ_REG (all ones).
331 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
333 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
336 if (ixgbe_removed(reg_addr))
337 return IXGBE_FAILED_READ_REG;
338 if (unlikely(hw->phy.nw_mng_if_sel &
339 IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
340 struct ixgbe_adapter *adapter;
343 for (i = 0; i < 200; ++i) {
344 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
346 goto writes_completed;
347 if (value == IXGBE_FAILED_READ_REG) {
348 ixgbe_remove_adapter(hw);
349 return IXGBE_FAILED_READ_REG;
355 e_warn(hw, "register writes incomplete %08x\n", value);
359 value = readl(reg_addr + reg);
360 if (unlikely(value == IXGBE_FAILED_READ_REG))
361 value = ixgbe_check_remove(hw, reg);
365 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
369 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
370 if (value == IXGBE_FAILED_READ_CFG_WORD) {
371 ixgbe_remove_adapter(hw);
377 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
379 struct ixgbe_adapter *adapter = hw->back;
382 if (ixgbe_removed(hw->hw_addr))
383 return IXGBE_FAILED_READ_CFG_WORD;
384 pci_read_config_word(adapter->pdev, reg, &value);
385 if (value == IXGBE_FAILED_READ_CFG_WORD &&
386 ixgbe_check_cfg_remove(hw, adapter->pdev))
387 return IXGBE_FAILED_READ_CFG_WORD;
391 #ifdef CONFIG_PCI_IOV
392 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
394 struct ixgbe_adapter *adapter = hw->back;
397 if (ixgbe_removed(hw->hw_addr))
398 return IXGBE_FAILED_READ_CFG_DWORD;
399 pci_read_config_dword(adapter->pdev, reg, &value);
400 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
401 ixgbe_check_cfg_remove(hw, adapter->pdev))
402 return IXGBE_FAILED_READ_CFG_DWORD;
405 #endif /* CONFIG_PCI_IOV */
407 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
409 struct ixgbe_adapter *adapter = hw->back;
411 if (ixgbe_removed(hw->hw_addr))
413 pci_write_config_word(adapter->pdev, reg, value);
416 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
418 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
420 /* flush memory to make sure state is correct before next watchdog */
421 smp_mb__before_atomic();
422 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
425 struct ixgbe_reg_info {
430 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
432 /* General Registers */
433 {IXGBE_CTRL, "CTRL"},
434 {IXGBE_STATUS, "STATUS"},
435 {IXGBE_CTRL_EXT, "CTRL_EXT"},
437 /* Interrupt Registers */
438 {IXGBE_EICR, "EICR"},
441 {IXGBE_SRRCTL(0), "SRRCTL"},
442 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
443 {IXGBE_RDLEN(0), "RDLEN"},
444 {IXGBE_RDH(0), "RDH"},
445 {IXGBE_RDT(0), "RDT"},
446 {IXGBE_RXDCTL(0), "RXDCTL"},
447 {IXGBE_RDBAL(0), "RDBAL"},
448 {IXGBE_RDBAH(0), "RDBAH"},
451 {IXGBE_TDBAL(0), "TDBAL"},
452 {IXGBE_TDBAH(0), "TDBAH"},
453 {IXGBE_TDLEN(0), "TDLEN"},
454 {IXGBE_TDH(0), "TDH"},
455 {IXGBE_TDT(0), "TDT"},
456 {IXGBE_TXDCTL(0), "TXDCTL"},
458 /* List Terminator */
464 * ixgbe_regdump - register printout routine
466 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
472 switch (reginfo->ofs) {
473 case IXGBE_SRRCTL(0):
474 for (i = 0; i < 64; i++)
475 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
477 case IXGBE_DCA_RXCTRL(0):
478 for (i = 0; i < 64; i++)
479 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
482 for (i = 0; i < 64; i++)
483 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
486 for (i = 0; i < 64; i++)
487 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
490 for (i = 0; i < 64; i++)
491 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
493 case IXGBE_RXDCTL(0):
494 for (i = 0; i < 64; i++)
495 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
498 for (i = 0; i < 64; i++)
499 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
502 for (i = 0; i < 64; i++)
503 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
506 for (i = 0; i < 64; i++)
507 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
510 for (i = 0; i < 64; i++)
511 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
514 for (i = 0; i < 64; i++)
515 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
518 for (i = 0; i < 64; i++)
519 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
522 for (i = 0; i < 64; i++)
523 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
525 case IXGBE_TXDCTL(0):
526 for (i = 0; i < 64; i++)
527 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
530 pr_info("%-15s %08x\n",
531 reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
541 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
542 for (j = 0; j < 8; j++)
543 p += sprintf(p, " %08x", regs[i++]);
544 pr_err("%-15s%s\n", rname, buf);
549 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
551 struct ixgbe_tx_buffer *tx_buffer;
553 tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
554 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
555 n, ring->next_to_use, ring->next_to_clean,
556 (u64)dma_unmap_addr(tx_buffer, dma),
557 dma_unmap_len(tx_buffer, len),
558 tx_buffer->next_to_watch,
559 (u64)tx_buffer->time_stamp);
563 * ixgbe_dump - Print registers, tx-rings and rx-rings
565 static void ixgbe_dump(struct ixgbe_adapter *adapter)
567 struct net_device *netdev = adapter->netdev;
568 struct ixgbe_hw *hw = &adapter->hw;
569 struct ixgbe_reg_info *reginfo;
571 struct ixgbe_ring *ring;
572 struct ixgbe_tx_buffer *tx_buffer;
573 union ixgbe_adv_tx_desc *tx_desc;
574 struct my_u0 { u64 a; u64 b; } *u0;
575 struct ixgbe_ring *rx_ring;
576 union ixgbe_adv_rx_desc *rx_desc;
577 struct ixgbe_rx_buffer *rx_buffer_info;
580 if (!netif_msg_hw(adapter))
583 /* Print netdevice Info */
585 dev_info(&adapter->pdev->dev, "Net device Info\n");
586 pr_info("Device Name state "
588 pr_info("%-15s %016lX %016lX\n",
591 dev_trans_start(netdev));
594 /* Print Registers */
595 dev_info(&adapter->pdev->dev, "Register Dump\n");
596 pr_info(" Register Name Value\n");
597 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
598 reginfo->name; reginfo++) {
599 ixgbe_regdump(hw, reginfo);
602 /* Print TX Ring Summary */
603 if (!netdev || !netif_running(netdev))
606 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
607 pr_info(" %s %s %s %s\n",
608 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
609 "leng", "ntw", "timestamp");
610 for (n = 0; n < adapter->num_tx_queues; n++) {
611 ring = adapter->tx_ring[n];
612 ixgbe_print_buffer(ring, n);
615 for (n = 0; n < adapter->num_xdp_queues; n++) {
616 ring = adapter->xdp_ring[n];
617 ixgbe_print_buffer(ring, n);
621 if (!netif_msg_tx_done(adapter))
622 goto rx_ring_summary;
624 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
626 /* Transmit Descriptor Formats
628 * 82598 Advanced Transmit Descriptor
629 * +--------------------------------------------------------------+
630 * 0 | Buffer Address [63:0] |
631 * +--------------------------------------------------------------+
632 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
633 * +--------------------------------------------------------------+
634 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
636 * 82598 Advanced Transmit Descriptor (Write-Back Format)
637 * +--------------------------------------------------------------+
639 * +--------------------------------------------------------------+
640 * 8 | RSV | STA | NXTSEQ |
641 * +--------------------------------------------------------------+
644 * 82599+ Advanced Transmit Descriptor
645 * +--------------------------------------------------------------+
646 * 0 | Buffer Address [63:0] |
647 * +--------------------------------------------------------------+
648 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
649 * +--------------------------------------------------------------+
650 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
652 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
653 * +--------------------------------------------------------------+
655 * +--------------------------------------------------------------+
656 * 8 | RSV | STA | RSV |
657 * +--------------------------------------------------------------+
661 for (n = 0; n < adapter->num_tx_queues; n++) {
662 ring = adapter->tx_ring[n];
663 pr_info("------------------------------------\n");
664 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
665 pr_info("------------------------------------\n");
666 pr_info("%s%s %s %s %s %s\n",
667 "T [desc] [address 63:0 ] ",
668 "[PlPOIdStDDt Ln] [bi->dma ] ",
669 "leng", "ntw", "timestamp", "bi->skb");
671 for (i = 0; ring->desc && (i < ring->count); i++) {
672 tx_desc = IXGBE_TX_DESC(ring, i);
673 tx_buffer = &ring->tx_buffer_info[i];
674 u0 = (struct my_u0 *)tx_desc;
675 if (dma_unmap_len(tx_buffer, len) > 0) {
676 const char *ring_desc;
678 if (i == ring->next_to_use &&
679 i == ring->next_to_clean)
680 ring_desc = " NTC/U";
681 else if (i == ring->next_to_use)
683 else if (i == ring->next_to_clean)
687 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s",
689 le64_to_cpu((__force __le64)u0->a),
690 le64_to_cpu((__force __le64)u0->b),
691 (u64)dma_unmap_addr(tx_buffer, dma),
692 dma_unmap_len(tx_buffer, len),
693 tx_buffer->next_to_watch,
694 (u64)tx_buffer->time_stamp,
698 if (netif_msg_pktdata(adapter) &&
700 print_hex_dump(KERN_INFO, "",
701 DUMP_PREFIX_ADDRESS, 16, 1,
702 tx_buffer->skb->data,
703 dma_unmap_len(tx_buffer, len),
709 /* Print RX Rings Summary */
711 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
712 pr_info("Queue [NTU] [NTC]\n");
713 for (n = 0; n < adapter->num_rx_queues; n++) {
714 rx_ring = adapter->rx_ring[n];
715 pr_info("%5d %5X %5X\n",
716 n, rx_ring->next_to_use, rx_ring->next_to_clean);
720 if (!netif_msg_rx_status(adapter))
723 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
725 /* Receive Descriptor Formats
727 * 82598 Advanced Receive Descriptor (Read) Format
729 * +-----------------------------------------------------+
730 * 0 | Packet Buffer Address [63:1] |A0/NSE|
731 * +----------------------------------------------+------+
732 * 8 | Header Buffer Address [63:1] | DD |
733 * +-----------------------------------------------------+
736 * 82598 Advanced Receive Descriptor (Write-Back) Format
738 * 63 48 47 32 31 30 21 20 16 15 4 3 0
739 * +------------------------------------------------------+
740 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
741 * | Packet | IP | | | | Type | Type |
742 * | Checksum | Ident | | | | | |
743 * +------------------------------------------------------+
744 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
745 * +------------------------------------------------------+
746 * 63 48 47 32 31 20 19 0
748 * 82599+ Advanced Receive Descriptor (Read) Format
750 * +-----------------------------------------------------+
751 * 0 | Packet Buffer Address [63:1] |A0/NSE|
752 * +----------------------------------------------+------+
753 * 8 | Header Buffer Address [63:1] | DD |
754 * +-----------------------------------------------------+
757 * 82599+ Advanced Receive Descriptor (Write-Back) Format
759 * 63 48 47 32 31 30 21 20 17 16 4 3 0
760 * +------------------------------------------------------+
761 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
762 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
763 * |/ Flow Dir Flt ID | | | | | |
764 * +------------------------------------------------------+
765 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
766 * +------------------------------------------------------+
767 * 63 48 47 32 31 20 19 0
770 for (n = 0; n < adapter->num_rx_queues; n++) {
771 rx_ring = adapter->rx_ring[n];
772 pr_info("------------------------------------\n");
773 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
774 pr_info("------------------------------------\n");
776 "R [desc] [ PktBuf A0] ",
777 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
778 "<-- Adv Rx Read format");
780 "RWB[desc] [PcsmIpSHl PtRs] ",
781 "[vl er S cks ln] ---------------- [bi->skb ] ",
782 "<-- Adv Rx Write-Back format");
784 for (i = 0; i < rx_ring->count; i++) {
785 const char *ring_desc;
787 if (i == rx_ring->next_to_use)
789 else if (i == rx_ring->next_to_clean)
794 rx_buffer_info = &rx_ring->rx_buffer_info[i];
795 rx_desc = IXGBE_RX_DESC(rx_ring, i);
796 u0 = (struct my_u0 *)rx_desc;
797 if (rx_desc->wb.upper.length) {
798 /* Descriptor Done */
799 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n",
801 le64_to_cpu((__force __le64)u0->a),
802 le64_to_cpu((__force __le64)u0->b),
806 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n",
808 le64_to_cpu((__force __le64)u0->a),
809 le64_to_cpu((__force __le64)u0->b),
810 (u64)rx_buffer_info->dma,
814 if (netif_msg_pktdata(adapter) &&
815 rx_buffer_info->dma) {
816 print_hex_dump(KERN_INFO, "",
817 DUMP_PREFIX_ADDRESS, 16, 1,
818 page_address(rx_buffer_info->page) +
819 rx_buffer_info->page_offset,
820 ixgbe_rx_bufsz(rx_ring), true);
827 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
831 /* Let firmware take over control of h/w */
832 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
833 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
834 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
837 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
841 /* Let firmware know the driver has taken over */
842 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
843 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
844 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
848 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
849 * @adapter: pointer to adapter struct
850 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
851 * @queue: queue to map the corresponding interrupt to
852 * @msix_vector: the vector to map to the corresponding queue
855 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
856 u8 queue, u8 msix_vector)
859 struct ixgbe_hw *hw = &adapter->hw;
860 switch (hw->mac.type) {
861 case ixgbe_mac_82598EB:
862 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
865 index = (((direction * 64) + queue) >> 2) & 0x1F;
866 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
867 ivar &= ~(0xFF << (8 * (queue & 0x3)));
868 ivar |= (msix_vector << (8 * (queue & 0x3)));
869 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
871 case ixgbe_mac_82599EB:
874 case ixgbe_mac_X550EM_x:
875 case ixgbe_mac_x550em_a:
876 if (direction == -1) {
878 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
879 index = ((queue & 1) * 8);
880 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
881 ivar &= ~(0xFF << index);
882 ivar |= (msix_vector << index);
883 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
886 /* tx or rx causes */
887 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
888 index = ((16 * (queue & 1)) + (8 * direction));
889 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
890 ivar &= ~(0xFF << index);
891 ivar |= (msix_vector << index);
892 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
900 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
905 switch (adapter->hw.mac.type) {
906 case ixgbe_mac_82598EB:
907 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
908 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
910 case ixgbe_mac_82599EB:
913 case ixgbe_mac_X550EM_x:
914 case ixgbe_mac_x550em_a:
915 mask = (qmask & 0xFFFFFFFF);
916 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
917 mask = (qmask >> 32);
918 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
925 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
927 struct ixgbe_hw *hw = &adapter->hw;
928 struct ixgbe_hw_stats *hwstats = &adapter->stats;
932 if ((hw->fc.current_mode != ixgbe_fc_full) &&
933 (hw->fc.current_mode != ixgbe_fc_rx_pause))
936 switch (hw->mac.type) {
937 case ixgbe_mac_82598EB:
938 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
941 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
943 hwstats->lxoffrxc += data;
945 /* refill credits (no tx hang) if we received xoff */
949 for (i = 0; i < adapter->num_tx_queues; i++)
950 clear_bit(__IXGBE_HANG_CHECK_ARMED,
951 &adapter->tx_ring[i]->state);
953 for (i = 0; i < adapter->num_xdp_queues; i++)
954 clear_bit(__IXGBE_HANG_CHECK_ARMED,
955 &adapter->xdp_ring[i]->state);
958 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
960 struct ixgbe_hw *hw = &adapter->hw;
961 struct ixgbe_hw_stats *hwstats = &adapter->stats;
965 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
967 if (adapter->ixgbe_ieee_pfc)
968 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
970 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
971 ixgbe_update_xoff_rx_lfc(adapter);
975 /* update stats for each tc, only valid with PFC enabled */
976 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
979 switch (hw->mac.type) {
980 case ixgbe_mac_82598EB:
981 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
984 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
986 hwstats->pxoffrxc[i] += pxoffrxc;
987 /* Get the TC for given UP */
988 tc = netdev_get_prio_tc_map(adapter->netdev, i);
989 xoff[tc] += pxoffrxc;
992 /* disarm tx queues that have received xoff frames */
993 for (i = 0; i < adapter->num_tx_queues; i++) {
994 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
996 tc = tx_ring->dcb_tc;
998 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1001 for (i = 0; i < adapter->num_xdp_queues; i++) {
1002 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1004 tc = xdp_ring->dcb_tc;
1006 clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1010 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1012 return ring->stats.packets;
1015 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1017 unsigned int head, tail;
1019 head = ring->next_to_clean;
1020 tail = ring->next_to_use;
1022 return ((head <= tail) ? tail : tail + ring->count) - head;
1025 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1027 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1028 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1029 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1031 clear_check_for_tx_hang(tx_ring);
1034 * Check for a hung queue, but be thorough. This verifies
1035 * that a transmit has been completed since the previous
1036 * check AND there is at least one packet pending. The
1037 * ARMED bit is set to indicate a potential hang. The
1038 * bit is cleared if a pause frame is received to remove
1039 * false hang detection due to PFC or 802.3x frames. By
1040 * requiring this to fail twice we avoid races with
1041 * pfc clearing the ARMED bit and conditions where we
1042 * run the check_tx_hang logic with a transmit completion
1043 * pending but without time to complete it yet.
1045 if (tx_done_old == tx_done && tx_pending)
1046 /* make sure it is true for two checks in a row */
1047 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1049 /* update completed stats and continue */
1050 tx_ring->tx_stats.tx_done_old = tx_done;
1051 /* reset the countdown */
1052 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1058 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1059 * @adapter: driver private struct
1061 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1064 /* Do the reset outside of interrupt context */
1065 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1066 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1067 e_warn(drv, "initiating reset due to tx timeout\n");
1068 ixgbe_service_event_schedule(adapter);
1073 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1074 * @netdev: network interface device structure
1075 * @queue_index: Tx queue to set
1076 * @maxrate: desired maximum transmit bitrate
1078 static int ixgbe_tx_maxrate(struct net_device *netdev,
1079 int queue_index, u32 maxrate)
1081 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1082 struct ixgbe_hw *hw = &adapter->hw;
1083 u32 bcnrc_val = ixgbe_link_mbps(adapter);
1088 /* Calculate the rate factor values to set */
1089 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1090 bcnrc_val /= maxrate;
1092 /* clear everything but the rate factor */
1093 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1094 IXGBE_RTTBCNRC_RF_DEC_MASK;
1096 /* enable the rate scheduler */
1097 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1099 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1100 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1106 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1107 * @q_vector: structure containing interrupt and ring information
1108 * @tx_ring: tx ring to clean
1109 * @napi_budget: Used to determine if we are in netpoll
1111 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1112 struct ixgbe_ring *tx_ring, int napi_budget)
1114 struct ixgbe_adapter *adapter = q_vector->adapter;
1115 struct ixgbe_tx_buffer *tx_buffer;
1116 union ixgbe_adv_tx_desc *tx_desc;
1117 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1118 unsigned int budget = q_vector->tx.work_limit;
1119 unsigned int i = tx_ring->next_to_clean;
1121 if (test_bit(__IXGBE_DOWN, &adapter->state))
1124 tx_buffer = &tx_ring->tx_buffer_info[i];
1125 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1126 i -= tx_ring->count;
1129 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1131 /* if next_to_watch is not set then there is no work pending */
1135 /* prevent any other reads prior to eop_desc */
1138 /* if DD is not set pending work has not been completed */
1139 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1142 /* clear next_to_watch to prevent false hangs */
1143 tx_buffer->next_to_watch = NULL;
1145 /* update the statistics for this packet */
1146 total_bytes += tx_buffer->bytecount;
1147 total_packets += tx_buffer->gso_segs;
1148 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1152 if (ring_is_xdp(tx_ring))
1153 xdp_return_frame(tx_buffer->xdpf);
1155 napi_consume_skb(tx_buffer->skb, napi_budget);
1157 /* unmap skb header data */
1158 dma_unmap_single(tx_ring->dev,
1159 dma_unmap_addr(tx_buffer, dma),
1160 dma_unmap_len(tx_buffer, len),
1163 /* clear tx_buffer data */
1164 dma_unmap_len_set(tx_buffer, len, 0);
1166 /* unmap remaining buffers */
1167 while (tx_desc != eop_desc) {
1172 i -= tx_ring->count;
1173 tx_buffer = tx_ring->tx_buffer_info;
1174 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1177 /* unmap any remaining paged data */
1178 if (dma_unmap_len(tx_buffer, len)) {
1179 dma_unmap_page(tx_ring->dev,
1180 dma_unmap_addr(tx_buffer, dma),
1181 dma_unmap_len(tx_buffer, len),
1183 dma_unmap_len_set(tx_buffer, len, 0);
1187 /* move us one more past the eop_desc for start of next pkt */
1192 i -= tx_ring->count;
1193 tx_buffer = tx_ring->tx_buffer_info;
1194 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1197 /* issue prefetch for next Tx descriptor */
1200 /* update budget accounting */
1202 } while (likely(budget));
1204 i += tx_ring->count;
1205 tx_ring->next_to_clean = i;
1206 u64_stats_update_begin(&tx_ring->syncp);
1207 tx_ring->stats.bytes += total_bytes;
1208 tx_ring->stats.packets += total_packets;
1209 u64_stats_update_end(&tx_ring->syncp);
1210 q_vector->tx.total_bytes += total_bytes;
1211 q_vector->tx.total_packets += total_packets;
1212 adapter->tx_ipsec += total_ipsec;
1214 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1215 /* schedule immediate reset if we believe we hung */
1216 struct ixgbe_hw *hw = &adapter->hw;
1217 e_err(drv, "Detected Tx Unit Hang %s\n"
1219 " TDH, TDT <%x>, <%x>\n"
1220 " next_to_use <%x>\n"
1221 " next_to_clean <%x>\n"
1222 "tx_buffer_info[next_to_clean]\n"
1223 " time_stamp <%lx>\n"
1225 ring_is_xdp(tx_ring) ? "(XDP)" : "",
1226 tx_ring->queue_index,
1227 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1228 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1229 tx_ring->next_to_use, i,
1230 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1232 if (!ring_is_xdp(tx_ring))
1233 netif_stop_subqueue(tx_ring->netdev,
1234 tx_ring->queue_index);
1237 "tx hang %d detected on queue %d, resetting adapter\n",
1238 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1240 /* schedule immediate reset if we believe we hung */
1241 ixgbe_tx_timeout_reset(adapter);
1243 /* the adapter is about to reset, no point in enabling stuff */
1247 if (ring_is_xdp(tx_ring))
1250 netdev_tx_completed_queue(txring_txq(tx_ring),
1251 total_packets, total_bytes);
1253 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1254 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1255 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1256 /* Make sure that anybody stopping the queue after this
1257 * sees the new next_to_clean.
1260 if (__netif_subqueue_stopped(tx_ring->netdev,
1261 tx_ring->queue_index)
1262 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1263 netif_wake_subqueue(tx_ring->netdev,
1264 tx_ring->queue_index);
1265 ++tx_ring->tx_stats.restart_queue;
1272 #ifdef CONFIG_IXGBE_DCA
1273 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1274 struct ixgbe_ring *tx_ring,
1277 struct ixgbe_hw *hw = &adapter->hw;
1281 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1282 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1284 switch (hw->mac.type) {
1285 case ixgbe_mac_82598EB:
1286 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1288 case ixgbe_mac_82599EB:
1289 case ixgbe_mac_X540:
1290 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1291 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1294 /* for unknown hardware do not write register */
1299 * We can enable relaxed ordering for reads, but not writes when
1300 * DCA is enabled. This is due to a known issue in some chipsets
1301 * which will cause the DCA tag to be cleared.
1303 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1304 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1305 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1307 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1310 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1311 struct ixgbe_ring *rx_ring,
1314 struct ixgbe_hw *hw = &adapter->hw;
1316 u8 reg_idx = rx_ring->reg_idx;
1318 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1319 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1321 switch (hw->mac.type) {
1322 case ixgbe_mac_82599EB:
1323 case ixgbe_mac_X540:
1324 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1331 * We can enable relaxed ordering for reads, but not writes when
1332 * DCA is enabled. This is due to a known issue in some chipsets
1333 * which will cause the DCA tag to be cleared.
1335 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1336 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1337 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1339 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1342 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1344 struct ixgbe_adapter *adapter = q_vector->adapter;
1345 struct ixgbe_ring *ring;
1346 int cpu = get_cpu();
1348 if (q_vector->cpu == cpu)
1351 ixgbe_for_each_ring(ring, q_vector->tx)
1352 ixgbe_update_tx_dca(adapter, ring, cpu);
1354 ixgbe_for_each_ring(ring, q_vector->rx)
1355 ixgbe_update_rx_dca(adapter, ring, cpu);
1357 q_vector->cpu = cpu;
1362 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1366 /* always use CB2 mode, difference is masked in the CB driver */
1367 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1368 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1369 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1371 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1372 IXGBE_DCA_CTRL_DCA_DISABLE);
1374 for (i = 0; i < adapter->num_q_vectors; i++) {
1375 adapter->q_vector[i]->cpu = -1;
1376 ixgbe_update_dca(adapter->q_vector[i]);
1380 static int __ixgbe_notify_dca(struct device *dev, void *data)
1382 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1383 unsigned long event = *(unsigned long *)data;
1385 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1389 case DCA_PROVIDER_ADD:
1390 /* if we're already enabled, don't do it again */
1391 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1393 if (dca_add_requester(dev) == 0) {
1394 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1395 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1396 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1399 /* fall through - DCA is disabled. */
1400 case DCA_PROVIDER_REMOVE:
1401 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1402 dca_remove_requester(dev);
1403 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1404 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1405 IXGBE_DCA_CTRL_DCA_DISABLE);
1413 #endif /* CONFIG_IXGBE_DCA */
1415 #define IXGBE_RSS_L4_TYPES_MASK \
1416 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1417 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1418 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1419 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1421 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1422 union ixgbe_adv_rx_desc *rx_desc,
1423 struct sk_buff *skb)
1427 if (!(ring->netdev->features & NETIF_F_RXHASH))
1430 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1431 IXGBE_RXDADV_RSSTYPE_MASK;
1436 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1437 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1438 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1443 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1444 * @ring: structure containing ring specific data
1445 * @rx_desc: advanced rx descriptor
1447 * Returns : true if it is FCoE pkt
1449 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1450 union ixgbe_adv_rx_desc *rx_desc)
1452 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1454 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1455 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1456 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1457 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1460 #endif /* IXGBE_FCOE */
1462 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1463 * @ring: structure containing ring specific data
1464 * @rx_desc: current Rx descriptor being processed
1465 * @skb: skb currently being received and modified
1467 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1468 union ixgbe_adv_rx_desc *rx_desc,
1469 struct sk_buff *skb)
1471 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1472 bool encap_pkt = false;
1474 skb_checksum_none_assert(skb);
1476 /* Rx csum disabled */
1477 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1480 /* check for VXLAN and Geneve packets */
1481 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1483 skb->encapsulation = 1;
1486 /* if IP and error */
1487 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1488 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1489 ring->rx_stats.csum_err++;
1493 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1496 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1498 * 82599 errata, UDP frames with a 0 checksum can be marked as
1501 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1502 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1505 ring->rx_stats.csum_err++;
1509 /* It must be a TCP or UDP packet with a valid checksum */
1510 skb->ip_summed = CHECKSUM_UNNECESSARY;
1512 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1515 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1516 skb->ip_summed = CHECKSUM_NONE;
1519 /* If we checked the outer header let the stack know */
1520 skb->csum_level = 1;
1524 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1526 return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1529 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1530 struct ixgbe_rx_buffer *bi)
1532 struct page *page = bi->page;
1535 /* since we are recycling buffers we should seldom need to alloc */
1539 /* alloc new page for storage */
1540 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1541 if (unlikely(!page)) {
1542 rx_ring->rx_stats.alloc_rx_page_failed++;
1546 /* map page for use */
1547 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1548 ixgbe_rx_pg_size(rx_ring),
1553 * if mapping failed free memory back to system since
1554 * there isn't much point in holding memory we can't use
1556 if (dma_mapping_error(rx_ring->dev, dma)) {
1557 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1559 rx_ring->rx_stats.alloc_rx_page_failed++;
1565 bi->page_offset = ixgbe_rx_offset(rx_ring);
1566 page_ref_add(page, USHRT_MAX - 1);
1567 bi->pagecnt_bias = USHRT_MAX;
1568 rx_ring->rx_stats.alloc_rx_page++;
1574 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1575 * @rx_ring: ring to place buffers on
1576 * @cleaned_count: number of buffers to replace
1578 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1580 union ixgbe_adv_rx_desc *rx_desc;
1581 struct ixgbe_rx_buffer *bi;
1582 u16 i = rx_ring->next_to_use;
1589 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1590 bi = &rx_ring->rx_buffer_info[i];
1591 i -= rx_ring->count;
1593 bufsz = ixgbe_rx_bufsz(rx_ring);
1596 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1599 /* sync the buffer for use by the device */
1600 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1601 bi->page_offset, bufsz,
1605 * Refresh the desc even if buffer_addrs didn't change
1606 * because each write-back erases this info.
1608 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1614 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1615 bi = rx_ring->rx_buffer_info;
1616 i -= rx_ring->count;
1619 /* clear the length for the next_to_use descriptor */
1620 rx_desc->wb.upper.length = 0;
1623 } while (cleaned_count);
1625 i += rx_ring->count;
1627 if (rx_ring->next_to_use != i) {
1628 rx_ring->next_to_use = i;
1630 /* update next to alloc since we have filled the ring */
1631 rx_ring->next_to_alloc = i;
1633 /* Force memory writes to complete before letting h/w
1634 * know there are new descriptors to fetch. (Only
1635 * applicable for weak-ordered memory model archs,
1639 writel(i, rx_ring->tail);
1643 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1644 struct sk_buff *skb)
1646 u16 hdr_len = skb_headlen(skb);
1648 /* set gso_size to avoid messing up TCP MSS */
1649 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1650 IXGBE_CB(skb)->append_cnt);
1651 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1654 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1655 struct sk_buff *skb)
1657 /* if append_cnt is 0 then frame is not RSC */
1658 if (!IXGBE_CB(skb)->append_cnt)
1661 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1662 rx_ring->rx_stats.rsc_flush++;
1664 ixgbe_set_rsc_gso_size(rx_ring, skb);
1666 /* gso_size is computed using append_cnt so always clear it last */
1667 IXGBE_CB(skb)->append_cnt = 0;
1671 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1672 * @rx_ring: rx descriptor ring packet is being transacted on
1673 * @rx_desc: pointer to the EOP Rx descriptor
1674 * @skb: pointer to current skb being populated
1676 * This function checks the ring, descriptor, and packet information in
1677 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1678 * other fields within the skb.
1680 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1681 union ixgbe_adv_rx_desc *rx_desc,
1682 struct sk_buff *skb)
1684 struct net_device *dev = rx_ring->netdev;
1685 u32 flags = rx_ring->q_vector->adapter->flags;
1687 ixgbe_update_rsc_stats(rx_ring, skb);
1689 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1691 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1693 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1694 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1696 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1697 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1698 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1699 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1702 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1703 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1705 /* record Rx queue, or update MACVLAN statistics */
1706 if (netif_is_ixgbe(dev))
1707 skb_record_rx_queue(skb, rx_ring->queue_index);
1709 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1712 skb->protocol = eth_type_trans(skb, dev);
1715 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1716 struct sk_buff *skb)
1718 napi_gro_receive(&q_vector->napi, skb);
1722 * ixgbe_is_non_eop - process handling of non-EOP buffers
1723 * @rx_ring: Rx ring being processed
1724 * @rx_desc: Rx descriptor for current buffer
1725 * @skb: Current socket buffer containing buffer in progress
1727 * This function updates next to clean. If the buffer is an EOP buffer
1728 * this function exits returning false, otherwise it will place the
1729 * sk_buff in the next buffer to be chained and return true indicating
1730 * that this is in fact a non-EOP buffer.
1732 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1733 union ixgbe_adv_rx_desc *rx_desc,
1734 struct sk_buff *skb)
1736 u32 ntc = rx_ring->next_to_clean + 1;
1738 /* fetch, update, and store next to clean */
1739 ntc = (ntc < rx_ring->count) ? ntc : 0;
1740 rx_ring->next_to_clean = ntc;
1742 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1744 /* update RSC append count if present */
1745 if (ring_is_rsc_enabled(rx_ring)) {
1746 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1747 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1749 if (unlikely(rsc_enabled)) {
1750 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1752 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1753 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1755 /* update ntc based on RSC value */
1756 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1757 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1758 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1762 /* if we are the last buffer then there is nothing else to do */
1763 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1766 /* place skb in next buffer to be received */
1767 rx_ring->rx_buffer_info[ntc].skb = skb;
1768 rx_ring->rx_stats.non_eop_descs++;
1774 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1775 * @rx_ring: rx descriptor ring packet is being transacted on
1776 * @skb: pointer to current skb being adjusted
1778 * This function is an ixgbe specific version of __pskb_pull_tail. The
1779 * main difference between this version and the original function is that
1780 * this function can make several assumptions about the state of things
1781 * that allow for significant optimizations versus the standard function.
1782 * As a result we can do things like drop a frag and maintain an accurate
1783 * truesize for the skb.
1785 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1786 struct sk_buff *skb)
1788 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1790 unsigned int pull_len;
1793 * it is valid to use page_address instead of kmap since we are
1794 * working with pages allocated out of the lomem pool per
1795 * alloc_page(GFP_ATOMIC)
1797 va = skb_frag_address(frag);
1800 * we need the header to contain the greater of either ETH_HLEN or
1801 * 60 bytes if the skb->len is less than 60 for skb_pad.
1803 pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1805 /* align pull length to size of long to optimize memcpy performance */
1806 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1808 /* update all of the pointers */
1809 skb_frag_size_sub(frag, pull_len);
1810 frag->page_offset += pull_len;
1811 skb->data_len -= pull_len;
1812 skb->tail += pull_len;
1816 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1817 * @rx_ring: rx descriptor ring packet is being transacted on
1818 * @skb: pointer to current skb being updated
1820 * This function provides a basic DMA sync up for the first fragment of an
1821 * skb. The reason for doing this is that the first fragment cannot be
1822 * unmapped until we have reached the end of packet descriptor for a buffer
1825 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1826 struct sk_buff *skb)
1828 /* if the page was released unmap it, else just sync our portion */
1829 if (unlikely(IXGBE_CB(skb)->page_released)) {
1830 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1831 ixgbe_rx_pg_size(rx_ring),
1834 } else if (ring_uses_build_skb(rx_ring)) {
1835 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1837 dma_sync_single_range_for_cpu(rx_ring->dev,
1843 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1845 dma_sync_single_range_for_cpu(rx_ring->dev,
1848 skb_frag_size(frag),
1854 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1855 * @rx_ring: rx descriptor ring packet is being transacted on
1856 * @rx_desc: pointer to the EOP Rx descriptor
1857 * @skb: pointer to current skb being fixed
1859 * Check if the skb is valid in the XDP case it will be an error pointer.
1860 * Return true in this case to abort processing and advance to next
1863 * Check for corrupted packet headers caused by senders on the local L2
1864 * embedded NIC switch not setting up their Tx Descriptors right. These
1865 * should be very rare.
1867 * Also address the case where we are pulling data in on pages only
1868 * and as such no data is present in the skb header.
1870 * In addition if skb is not at least 60 bytes we need to pad it so that
1871 * it is large enough to qualify as a valid Ethernet frame.
1873 * Returns true if an error was encountered and skb was freed.
1875 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1876 union ixgbe_adv_rx_desc *rx_desc,
1877 struct sk_buff *skb)
1879 struct net_device *netdev = rx_ring->netdev;
1881 /* XDP packets use error pointer so abort at this point */
1885 /* Verify netdev is present, and that packet does not have any
1886 * errors that would be unacceptable to the netdev.
1889 (unlikely(ixgbe_test_staterr(rx_desc,
1890 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1891 !(netdev->features & NETIF_F_RXALL)))) {
1892 dev_kfree_skb_any(skb);
1896 /* place header in linear portion of buffer */
1897 if (!skb_headlen(skb))
1898 ixgbe_pull_tail(rx_ring, skb);
1901 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1902 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1906 /* if eth_skb_pad returns an error the skb was freed */
1907 if (eth_skb_pad(skb))
1914 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1915 * @rx_ring: rx descriptor ring to store buffers on
1916 * @old_buff: donor buffer to have page reused
1918 * Synchronizes page for reuse by the adapter
1920 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1921 struct ixgbe_rx_buffer *old_buff)
1923 struct ixgbe_rx_buffer *new_buff;
1924 u16 nta = rx_ring->next_to_alloc;
1926 new_buff = &rx_ring->rx_buffer_info[nta];
1928 /* update, and store next to alloc */
1930 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1932 /* Transfer page from old buffer to new buffer.
1933 * Move each member individually to avoid possible store
1934 * forwarding stalls and unnecessary copy of skb.
1936 new_buff->dma = old_buff->dma;
1937 new_buff->page = old_buff->page;
1938 new_buff->page_offset = old_buff->page_offset;
1939 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
1942 static inline bool ixgbe_page_is_reserved(struct page *page)
1944 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1947 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1949 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1950 struct page *page = rx_buffer->page;
1952 /* avoid re-using remote pages */
1953 if (unlikely(ixgbe_page_is_reserved(page)))
1956 #if (PAGE_SIZE < 8192)
1957 /* if we are only owner of page we can reuse it */
1958 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1961 /* The last offset is a bit aggressive in that we assume the
1962 * worst case of FCoE being enabled and using a 3K buffer.
1963 * However this should have minimal impact as the 1K extra is
1964 * still less than one buffer in size.
1966 #define IXGBE_LAST_OFFSET \
1967 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1968 if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1972 /* If we have drained the page fragment pool we need to update
1973 * the pagecnt_bias and page count so that we fully restock the
1974 * number of references the driver holds.
1976 if (unlikely(pagecnt_bias == 1)) {
1977 page_ref_add(page, USHRT_MAX - 1);
1978 rx_buffer->pagecnt_bias = USHRT_MAX;
1985 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1986 * @rx_ring: rx descriptor ring to transact packets on
1987 * @rx_buffer: buffer containing page to add
1988 * @skb: sk_buff to place the data into
1989 * @size: size of data in rx_buffer
1991 * This function will add the data contained in rx_buffer->page to the skb.
1992 * This is done either through a direct copy if the data in the buffer is
1993 * less than the skb header size, otherwise it will just attach the page as
1994 * a frag to the skb.
1996 * The function will then update the page offset if necessary and return
1997 * true if the buffer can be reused by the adapter.
1999 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2000 struct ixgbe_rx_buffer *rx_buffer,
2001 struct sk_buff *skb,
2004 #if (PAGE_SIZE < 8192)
2005 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2007 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2008 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2009 SKB_DATA_ALIGN(size);
2011 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2012 rx_buffer->page_offset, size, truesize);
2013 #if (PAGE_SIZE < 8192)
2014 rx_buffer->page_offset ^= truesize;
2016 rx_buffer->page_offset += truesize;
2020 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2021 union ixgbe_adv_rx_desc *rx_desc,
2022 struct sk_buff **skb,
2023 const unsigned int size)
2025 struct ixgbe_rx_buffer *rx_buffer;
2027 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2028 prefetchw(rx_buffer->page);
2029 *skb = rx_buffer->skb;
2031 /* Delay unmapping of the first packet. It carries the header
2032 * information, HW may still access the header after the writeback.
2033 * Only unmap it when EOP is reached
2035 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2040 ixgbe_dma_sync_frag(rx_ring, *skb);
2043 /* we are reusing so sync this buffer for CPU use */
2044 dma_sync_single_range_for_cpu(rx_ring->dev,
2046 rx_buffer->page_offset,
2050 rx_buffer->pagecnt_bias--;
2055 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2056 struct ixgbe_rx_buffer *rx_buffer,
2057 struct sk_buff *skb)
2059 if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2060 /* hand second half of page back to the ring */
2061 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2063 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2064 /* the page has been released from the ring */
2065 IXGBE_CB(skb)->page_released = true;
2067 /* we are not reusing the buffer so unmap it */
2068 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2069 ixgbe_rx_pg_size(rx_ring),
2073 __page_frag_cache_drain(rx_buffer->page,
2074 rx_buffer->pagecnt_bias);
2077 /* clear contents of rx_buffer */
2078 rx_buffer->page = NULL;
2079 rx_buffer->skb = NULL;
2082 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2083 struct ixgbe_rx_buffer *rx_buffer,
2084 struct xdp_buff *xdp,
2085 union ixgbe_adv_rx_desc *rx_desc)
2087 unsigned int size = xdp->data_end - xdp->data;
2088 #if (PAGE_SIZE < 8192)
2089 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2091 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2092 xdp->data_hard_start);
2094 struct sk_buff *skb;
2096 /* prefetch first cache line of first page */
2097 prefetch(xdp->data);
2098 #if L1_CACHE_BYTES < 128
2099 prefetch(xdp->data + L1_CACHE_BYTES);
2101 /* Note, we get here by enabling legacy-rx via:
2103 * ethtool --set-priv-flags <dev> legacy-rx on
2105 * In this mode, we currently get 0 extra XDP headroom as
2106 * opposed to having legacy-rx off, where we process XDP
2107 * packets going to stack via ixgbe_build_skb(). The latter
2108 * provides us currently with 192 bytes of headroom.
2110 * For ixgbe_construct_skb() mode it means that the
2111 * xdp->data_meta will always point to xdp->data, since
2112 * the helper cannot expand the head. Should this ever
2113 * change in future for legacy-rx mode on, then lets also
2114 * add xdp->data_meta handling here.
2117 /* allocate a skb to store the frags */
2118 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2122 if (size > IXGBE_RX_HDR_SIZE) {
2123 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2124 IXGBE_CB(skb)->dma = rx_buffer->dma;
2126 skb_add_rx_frag(skb, 0, rx_buffer->page,
2127 xdp->data - page_address(rx_buffer->page),
2129 #if (PAGE_SIZE < 8192)
2130 rx_buffer->page_offset ^= truesize;
2132 rx_buffer->page_offset += truesize;
2135 memcpy(__skb_put(skb, size),
2136 xdp->data, ALIGN(size, sizeof(long)));
2137 rx_buffer->pagecnt_bias++;
2143 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2144 struct ixgbe_rx_buffer *rx_buffer,
2145 struct xdp_buff *xdp,
2146 union ixgbe_adv_rx_desc *rx_desc)
2148 unsigned int metasize = xdp->data - xdp->data_meta;
2149 #if (PAGE_SIZE < 8192)
2150 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2152 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2153 SKB_DATA_ALIGN(xdp->data_end -
2154 xdp->data_hard_start);
2156 struct sk_buff *skb;
2158 /* Prefetch first cache line of first page. If xdp->data_meta
2159 * is unused, this points extactly as xdp->data, otherwise we
2160 * likely have a consumer accessing first few bytes of meta
2161 * data, and then actual data.
2163 prefetch(xdp->data_meta);
2164 #if L1_CACHE_BYTES < 128
2165 prefetch(xdp->data_meta + L1_CACHE_BYTES);
2168 /* build an skb to around the page buffer */
2169 skb = build_skb(xdp->data_hard_start, truesize);
2173 /* update pointers within the skb to store the data */
2174 skb_reserve(skb, xdp->data - xdp->data_hard_start);
2175 __skb_put(skb, xdp->data_end - xdp->data);
2177 skb_metadata_set(skb, metasize);
2179 /* record DMA address if this is the start of a chain of buffers */
2180 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2181 IXGBE_CB(skb)->dma = rx_buffer->dma;
2183 /* update buffer offset */
2184 #if (PAGE_SIZE < 8192)
2185 rx_buffer->page_offset ^= truesize;
2187 rx_buffer->page_offset += truesize;
2193 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2194 struct ixgbe_ring *rx_ring,
2195 struct xdp_buff *xdp)
2197 int err, result = IXGBE_XDP_PASS;
2198 struct bpf_prog *xdp_prog;
2199 struct xdp_frame *xdpf;
2203 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2208 prefetchw(xdp->data_hard_start); /* xdp_frame write */
2210 act = bpf_prog_run_xdp(xdp_prog, xdp);
2215 xdpf = convert_to_xdp_frame(xdp);
2216 if (unlikely(!xdpf)) {
2217 result = IXGBE_XDP_CONSUMED;
2220 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2223 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2225 result = IXGBE_XDP_REDIR;
2227 result = IXGBE_XDP_CONSUMED;
2230 bpf_warn_invalid_xdp_action(act);
2233 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2234 /* fallthrough -- handle aborts by dropping packet */
2236 result = IXGBE_XDP_CONSUMED;
2241 return ERR_PTR(-result);
2244 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2245 struct ixgbe_rx_buffer *rx_buffer,
2248 #if (PAGE_SIZE < 8192)
2249 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2251 rx_buffer->page_offset ^= truesize;
2253 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2254 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2255 SKB_DATA_ALIGN(size);
2257 rx_buffer->page_offset += truesize;
2262 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2263 * @q_vector: structure containing interrupt and ring information
2264 * @rx_ring: rx descriptor ring to transact packets on
2265 * @budget: Total limit on number of packets to process
2267 * This function provides a "bounce buffer" approach to Rx interrupt
2268 * processing. The advantage to this is that on systems that have
2269 * expensive overhead for IOMMU access this provides a means of avoiding
2270 * it by maintaining the mapping of the page to the syste.
2272 * Returns amount of work completed
2274 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2275 struct ixgbe_ring *rx_ring,
2278 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2279 struct ixgbe_adapter *adapter = q_vector->adapter;
2282 unsigned int mss = 0;
2283 #endif /* IXGBE_FCOE */
2284 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2285 unsigned int xdp_xmit = 0;
2286 struct xdp_buff xdp;
2288 xdp.rxq = &rx_ring->xdp_rxq;
2290 while (likely(total_rx_packets < budget)) {
2291 union ixgbe_adv_rx_desc *rx_desc;
2292 struct ixgbe_rx_buffer *rx_buffer;
2293 struct sk_buff *skb;
2296 /* return some buffers to hardware, one at a time is too slow */
2297 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2298 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2302 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2303 size = le16_to_cpu(rx_desc->wb.upper.length);
2307 /* This memory barrier is needed to keep us from reading
2308 * any other fields out of the rx_desc until we know the
2309 * descriptor has been written back
2313 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2315 /* retrieve a buffer from the ring */
2317 xdp.data = page_address(rx_buffer->page) +
2318 rx_buffer->page_offset;
2319 xdp.data_meta = xdp.data;
2320 xdp.data_hard_start = xdp.data -
2321 ixgbe_rx_offset(rx_ring);
2322 xdp.data_end = xdp.data + size;
2324 skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2328 unsigned int xdp_res = -PTR_ERR(skb);
2330 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2331 xdp_xmit |= xdp_res;
2332 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2334 rx_buffer->pagecnt_bias++;
2337 total_rx_bytes += size;
2339 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2340 } else if (ring_uses_build_skb(rx_ring)) {
2341 skb = ixgbe_build_skb(rx_ring, rx_buffer,
2344 skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2348 /* exit if we failed to retrieve a buffer */
2350 rx_ring->rx_stats.alloc_rx_buff_failed++;
2351 rx_buffer->pagecnt_bias++;
2355 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2358 /* place incomplete frames back on ring for completion */
2359 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2362 /* verify the packet layout is correct */
2363 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2366 /* probably a little skewed due to removing CRC */
2367 total_rx_bytes += skb->len;
2369 /* populate checksum, timestamp, VLAN, and protocol */
2370 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2373 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2374 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2375 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2376 /* include DDPed FCoE data */
2377 if (ddp_bytes > 0) {
2379 mss = rx_ring->netdev->mtu -
2380 sizeof(struct fcoe_hdr) -
2381 sizeof(struct fc_frame_header) -
2382 sizeof(struct fcoe_crc_eof);
2386 total_rx_bytes += ddp_bytes;
2387 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2391 dev_kfree_skb_any(skb);
2396 #endif /* IXGBE_FCOE */
2397 ixgbe_rx_skb(q_vector, skb);
2399 /* update budget accounting */
2403 if (xdp_xmit & IXGBE_XDP_REDIR)
2406 if (xdp_xmit & IXGBE_XDP_TX) {
2407 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2409 /* Force memory writes to complete before letting h/w
2410 * know there are new descriptors to fetch.
2413 writel(ring->next_to_use, ring->tail);
2416 u64_stats_update_begin(&rx_ring->syncp);
2417 rx_ring->stats.packets += total_rx_packets;
2418 rx_ring->stats.bytes += total_rx_bytes;
2419 u64_stats_update_end(&rx_ring->syncp);
2420 q_vector->rx.total_packets += total_rx_packets;
2421 q_vector->rx.total_bytes += total_rx_bytes;
2423 return total_rx_packets;
2427 * ixgbe_configure_msix - Configure MSI-X hardware
2428 * @adapter: board private structure
2430 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2433 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2435 struct ixgbe_q_vector *q_vector;
2439 /* Populate MSIX to EITR Select */
2440 if (adapter->num_vfs > 32) {
2441 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2442 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2446 * Populate the IVAR table and set the ITR values to the
2447 * corresponding register.
2449 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2450 struct ixgbe_ring *ring;
2451 q_vector = adapter->q_vector[v_idx];
2453 ixgbe_for_each_ring(ring, q_vector->rx)
2454 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2456 ixgbe_for_each_ring(ring, q_vector->tx)
2457 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2459 ixgbe_write_eitr(q_vector);
2462 switch (adapter->hw.mac.type) {
2463 case ixgbe_mac_82598EB:
2464 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2467 case ixgbe_mac_82599EB:
2468 case ixgbe_mac_X540:
2469 case ixgbe_mac_X550:
2470 case ixgbe_mac_X550EM_x:
2471 case ixgbe_mac_x550em_a:
2472 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2477 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2479 /* set up to autoclear timer, and the vectors */
2480 mask = IXGBE_EIMS_ENABLE_MASK;
2481 mask &= ~(IXGBE_EIMS_OTHER |
2482 IXGBE_EIMS_MAILBOX |
2485 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2489 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2490 * @q_vector: structure containing interrupt and ring information
2491 * @ring_container: structure containing ring performance data
2493 * Stores a new ITR value based on packets and byte
2494 * counts during the last interrupt. The advantage of per interrupt
2495 * computation is faster updates and more accurate ITR for the current
2496 * traffic pattern. Constants in this function were computed
2497 * based on theoretical maximum wire speed and thresholds were set based
2498 * on testing data as well as attempting to minimize response time
2499 * while increasing bulk throughput.
2501 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2502 struct ixgbe_ring_container *ring_container)
2504 unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2505 IXGBE_ITR_ADAPTIVE_LATENCY;
2506 unsigned int avg_wire_size, packets, bytes;
2507 unsigned long next_update = jiffies;
2509 /* If we don't have any rings just leave ourselves set for maximum
2510 * possible latency so we take ourselves out of the equation.
2512 if (!ring_container->ring)
2515 /* If we didn't update within up to 1 - 2 jiffies we can assume
2516 * that either packets are coming in so slow there hasn't been
2517 * any work, or that there is so much work that NAPI is dealing
2518 * with interrupt moderation and we don't need to do anything.
2520 if (time_after(next_update, ring_container->next_update))
2523 packets = ring_container->total_packets;
2525 /* We have no packets to actually measure against. This means
2526 * either one of the other queues on this vector is active or
2527 * we are a Tx queue doing TSO with too high of an interrupt rate.
2529 * When this occurs just tick up our delay by the minimum value
2530 * and hope that this extra delay will prevent us from being called
2531 * without any work on our queue.
2534 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2535 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2536 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2537 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2541 bytes = ring_container->total_bytes;
2543 /* If packets are less than 4 or bytes are less than 9000 assume
2544 * insufficient data to use bulk rate limiting approach. We are
2545 * likely latency driven.
2547 if (packets < 4 && bytes < 9000) {
2548 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2549 goto adjust_by_size;
2552 /* Between 4 and 48 we can assume that our current interrupt delay
2553 * is only slightly too low. As such we should increase it by a small
2557 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2558 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2559 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2563 /* Between 48 and 96 is our "goldilocks" zone where we are working
2564 * out "just right". Just report that our current ITR is good for us.
2567 itr = q_vector->itr >> 2;
2571 /* If packet count is 96 or greater we are likely looking at a slight
2572 * overrun of the delay we want. Try halving our delay to see if that
2573 * will cut the number of packets in half per interrupt.
2575 if (packets < 256) {
2576 itr = q_vector->itr >> 3;
2577 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2578 itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2582 /* The paths below assume we are dealing with a bulk ITR since number
2583 * of packets is 256 or greater. We are just going to have to compute
2584 * a value and try to bring the count under control, though for smaller
2585 * packet sizes there isn't much we can do as NAPI polling will likely
2586 * be kicking in sooner rather than later.
2588 itr = IXGBE_ITR_ADAPTIVE_BULK;
2591 /* If packet counts are 256 or greater we can assume we have a gross
2592 * overestimation of what the rate should be. Instead of trying to fine
2593 * tune it just use the formula below to try and dial in an exact value
2594 * give the current packet size of the frame.
2596 avg_wire_size = bytes / packets;
2598 /* The following is a crude approximation of:
2599 * wmem_default / (size + overhead) = desired_pkts_per_int
2600 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2601 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2603 * Assuming wmem_default is 212992 and overhead is 640 bytes per
2604 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2607 * (170 * (size + 24)) / (size + 640) = ITR
2609 * We first do some math on the packet size and then finally bitshift
2610 * by 8 after rounding up. We also have to account for PCIe link speed
2611 * difference as ITR scales based on this.
2613 if (avg_wire_size <= 60) {
2614 /* Start at 50k ints/sec */
2615 avg_wire_size = 5120;
2616 } else if (avg_wire_size <= 316) {
2617 /* 50K ints/sec to 16K ints/sec */
2618 avg_wire_size *= 40;
2619 avg_wire_size += 2720;
2620 } else if (avg_wire_size <= 1084) {
2621 /* 16K ints/sec to 9.2K ints/sec */
2622 avg_wire_size *= 15;
2623 avg_wire_size += 11452;
2624 } else if (avg_wire_size <= 1980) {
2625 /* 9.2K ints/sec to 8K ints/sec */
2627 avg_wire_size += 22420;
2629 /* plateau at a limit of 8K ints/sec */
2630 avg_wire_size = 32256;
2633 /* If we are in low latency mode half our delay which doubles the rate
2634 * to somewhere between 100K to 16K ints/sec
2636 if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2637 avg_wire_size >>= 1;
2639 /* Resultant value is 256 times larger than it needs to be. This
2640 * gives us room to adjust the value as needed to either increase
2641 * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2643 * Use addition as we have already recorded the new latency flag
2644 * for the ITR value.
2646 switch (q_vector->adapter->link_speed) {
2647 case IXGBE_LINK_SPEED_10GB_FULL:
2648 case IXGBE_LINK_SPEED_100_FULL:
2650 itr += DIV_ROUND_UP(avg_wire_size,
2651 IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2652 IXGBE_ITR_ADAPTIVE_MIN_INC;
2654 case IXGBE_LINK_SPEED_2_5GB_FULL:
2655 case IXGBE_LINK_SPEED_1GB_FULL:
2656 case IXGBE_LINK_SPEED_10_FULL:
2657 itr += DIV_ROUND_UP(avg_wire_size,
2658 IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2659 IXGBE_ITR_ADAPTIVE_MIN_INC;
2664 /* write back value */
2665 ring_container->itr = itr;
2667 /* next update should occur within next jiffy */
2668 ring_container->next_update = next_update + 1;
2670 ring_container->total_bytes = 0;
2671 ring_container->total_packets = 0;
2675 * ixgbe_write_eitr - write EITR register in hardware specific way
2676 * @q_vector: structure containing interrupt and ring information
2678 * This function is made to be called by ethtool and by the driver
2679 * when it needs to update EITR registers at runtime. Hardware
2680 * specific quirks/differences are taken care of here.
2682 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2684 struct ixgbe_adapter *adapter = q_vector->adapter;
2685 struct ixgbe_hw *hw = &adapter->hw;
2686 int v_idx = q_vector->v_idx;
2687 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2689 switch (adapter->hw.mac.type) {
2690 case ixgbe_mac_82598EB:
2691 /* must write high and low 16 bits to reset counter */
2692 itr_reg |= (itr_reg << 16);
2694 case ixgbe_mac_82599EB:
2695 case ixgbe_mac_X540:
2696 case ixgbe_mac_X550:
2697 case ixgbe_mac_X550EM_x:
2698 case ixgbe_mac_x550em_a:
2700 * set the WDIS bit to not clear the timer bits and cause an
2701 * immediate assertion of the interrupt
2703 itr_reg |= IXGBE_EITR_CNT_WDIS;
2708 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2711 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2715 ixgbe_update_itr(q_vector, &q_vector->tx);
2716 ixgbe_update_itr(q_vector, &q_vector->rx);
2718 /* use the smallest value of new ITR delay calculations */
2719 new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2721 /* Clear latency flag if set, shift into correct position */
2722 new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2725 if (new_itr != q_vector->itr) {
2726 /* save the algorithm value here */
2727 q_vector->itr = new_itr;
2729 ixgbe_write_eitr(q_vector);
2734 * ixgbe_check_overtemp_subtask - check for over temperature
2735 * @adapter: pointer to adapter
2737 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2739 struct ixgbe_hw *hw = &adapter->hw;
2740 u32 eicr = adapter->interrupt_event;
2743 if (test_bit(__IXGBE_DOWN, &adapter->state))
2746 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2749 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2751 switch (hw->device_id) {
2752 case IXGBE_DEV_ID_82599_T3_LOM:
2754 * Since the warning interrupt is for both ports
2755 * we don't have to check if:
2756 * - This interrupt wasn't for our port.
2757 * - We may have missed the interrupt so always have to
2758 * check if we got a LSC
2760 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2761 !(eicr & IXGBE_EICR_LSC))
2764 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2766 bool link_up = false;
2768 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2774 /* Check if this is not due to overtemp */
2775 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2779 case IXGBE_DEV_ID_X550EM_A_1G_T:
2780 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2781 rc = hw->phy.ops.check_overtemp(hw);
2782 if (rc != IXGBE_ERR_OVERTEMP)
2786 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2788 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2792 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2794 adapter->interrupt_event = 0;
2797 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2799 struct ixgbe_hw *hw = &adapter->hw;
2801 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2802 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2803 e_crit(probe, "Fan has stopped, replace the adapter\n");
2804 /* write to clear the interrupt */
2805 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2809 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2811 struct ixgbe_hw *hw = &adapter->hw;
2813 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2816 switch (adapter->hw.mac.type) {
2817 case ixgbe_mac_82599EB:
2819 * Need to check link state so complete overtemp check
2822 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2823 (eicr & IXGBE_EICR_LSC)) &&
2824 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2825 adapter->interrupt_event = eicr;
2826 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2827 ixgbe_service_event_schedule(adapter);
2831 case ixgbe_mac_x550em_a:
2832 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2833 adapter->interrupt_event = eicr;
2834 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2835 ixgbe_service_event_schedule(adapter);
2836 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2837 IXGBE_EICR_GPI_SDP0_X550EM_a);
2838 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2839 IXGBE_EICR_GPI_SDP0_X550EM_a);
2842 case ixgbe_mac_X550:
2843 case ixgbe_mac_X540:
2844 if (!(eicr & IXGBE_EICR_TS))
2851 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2854 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2856 switch (hw->mac.type) {
2857 case ixgbe_mac_82598EB:
2858 if (hw->phy.type == ixgbe_phy_nl)
2861 case ixgbe_mac_82599EB:
2862 case ixgbe_mac_X550EM_x:
2863 case ixgbe_mac_x550em_a:
2864 switch (hw->mac.ops.get_media_type(hw)) {
2865 case ixgbe_media_type_fiber:
2866 case ixgbe_media_type_fiber_qsfp:
2876 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2878 struct ixgbe_hw *hw = &adapter->hw;
2879 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2881 if (!ixgbe_is_sfp(hw))
2884 /* Later MAC's use different SDP */
2885 if (hw->mac.type >= ixgbe_mac_X540)
2886 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2888 if (eicr & eicr_mask) {
2889 /* Clear the interrupt */
2890 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2891 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2892 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2893 adapter->sfp_poll_time = 0;
2894 ixgbe_service_event_schedule(adapter);
2898 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2899 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2900 /* Clear the interrupt */
2901 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2902 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2903 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2904 ixgbe_service_event_schedule(adapter);
2909 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2911 struct ixgbe_hw *hw = &adapter->hw;
2914 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2915 adapter->link_check_timeout = jiffies;
2916 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2917 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2918 IXGBE_WRITE_FLUSH(hw);
2919 ixgbe_service_event_schedule(adapter);
2923 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2927 struct ixgbe_hw *hw = &adapter->hw;
2929 switch (hw->mac.type) {
2930 case ixgbe_mac_82598EB:
2931 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2932 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2934 case ixgbe_mac_82599EB:
2935 case ixgbe_mac_X540:
2936 case ixgbe_mac_X550:
2937 case ixgbe_mac_X550EM_x:
2938 case ixgbe_mac_x550em_a:
2939 mask = (qmask & 0xFFFFFFFF);
2941 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2942 mask = (qmask >> 32);
2944 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2949 /* skip the flush */
2952 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2956 struct ixgbe_hw *hw = &adapter->hw;
2958 switch (hw->mac.type) {
2959 case ixgbe_mac_82598EB:
2960 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2961 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2963 case ixgbe_mac_82599EB:
2964 case ixgbe_mac_X540:
2965 case ixgbe_mac_X550:
2966 case ixgbe_mac_X550EM_x:
2967 case ixgbe_mac_x550em_a:
2968 mask = (qmask & 0xFFFFFFFF);
2970 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2971 mask = (qmask >> 32);
2973 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2978 /* skip the flush */
2982 * ixgbe_irq_enable - Enable default interrupt generation settings
2983 * @adapter: board private structure
2984 * @queues: enable irqs for queues
2985 * @flush: flush register write
2987 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2990 struct ixgbe_hw *hw = &adapter->hw;
2991 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2993 /* don't reenable LSC while waiting for link */
2994 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2995 mask &= ~IXGBE_EIMS_LSC;
2997 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2998 switch (adapter->hw.mac.type) {
2999 case ixgbe_mac_82599EB:
3000 mask |= IXGBE_EIMS_GPI_SDP0(hw);
3002 case ixgbe_mac_X540:
3003 case ixgbe_mac_X550:
3004 case ixgbe_mac_X550EM_x:
3005 case ixgbe_mac_x550em_a:
3006 mask |= IXGBE_EIMS_TS;
3011 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3012 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3013 switch (adapter->hw.mac.type) {
3014 case ixgbe_mac_82599EB:
3015 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3016 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3018 case ixgbe_mac_X540:
3019 case ixgbe_mac_X550:
3020 case ixgbe_mac_X550EM_x:
3021 case ixgbe_mac_x550em_a:
3022 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3023 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3024 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3025 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3026 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3027 mask |= IXGBE_EICR_GPI_SDP0_X540;
3028 mask |= IXGBE_EIMS_ECC;
3029 mask |= IXGBE_EIMS_MAILBOX;
3035 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3036 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3037 mask |= IXGBE_EIMS_FLOW_DIR;
3039 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3041 ixgbe_irq_enable_queues(adapter, ~0);
3043 IXGBE_WRITE_FLUSH(&adapter->hw);
3046 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3048 struct ixgbe_adapter *adapter = data;
3049 struct ixgbe_hw *hw = &adapter->hw;
3053 * Workaround for Silicon errata. Use clear-by-write instead
3054 * of clear-by-read. Reading with EICS will return the
3055 * interrupt causes without clearing, which later be done
3056 * with the write to EICR.
3058 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3060 /* The lower 16bits of the EICR register are for the queue interrupts
3061 * which should be masked here in order to not accidentally clear them if
3062 * the bits are high when ixgbe_msix_other is called. There is a race
3063 * condition otherwise which results in possible performance loss
3064 * especially if the ixgbe_msix_other interrupt is triggering
3065 * consistently (as it would when PPS is turned on for the X540 device)
3069 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3071 if (eicr & IXGBE_EICR_LSC)
3072 ixgbe_check_lsc(adapter);
3074 if (eicr & IXGBE_EICR_MAILBOX)
3075 ixgbe_msg_task(adapter);
3077 switch (hw->mac.type) {
3078 case ixgbe_mac_82599EB:
3079 case ixgbe_mac_X540:
3080 case ixgbe_mac_X550:
3081 case ixgbe_mac_X550EM_x:
3082 case ixgbe_mac_x550em_a:
3083 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3084 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3085 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3086 ixgbe_service_event_schedule(adapter);
3087 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3088 IXGBE_EICR_GPI_SDP0_X540);
3090 if (eicr & IXGBE_EICR_ECC) {
3091 e_info(link, "Received ECC Err, initiating reset\n");
3092 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3093 ixgbe_service_event_schedule(adapter);
3094 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3096 /* Handle Flow Director Full threshold interrupt */
3097 if (eicr & IXGBE_EICR_FLOW_DIR) {
3098 int reinit_count = 0;
3100 for (i = 0; i < adapter->num_tx_queues; i++) {
3101 struct ixgbe_ring *ring = adapter->tx_ring[i];
3102 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3107 /* no more flow director interrupts until after init */
3108 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3109 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3110 ixgbe_service_event_schedule(adapter);
3113 ixgbe_check_sfp_event(adapter, eicr);
3114 ixgbe_check_overtemp_event(adapter, eicr);
3120 ixgbe_check_fan_failure(adapter, eicr);
3122 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3123 ixgbe_ptp_check_pps_event(adapter);
3125 /* re-enable the original interrupt state, no lsc, no queues */
3126 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3127 ixgbe_irq_enable(adapter, false, false);
3132 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3134 struct ixgbe_q_vector *q_vector = data;
3136 /* EIAM disabled interrupts (on this vector) for us */
3138 if (q_vector->rx.ring || q_vector->tx.ring)
3139 napi_schedule_irqoff(&q_vector->napi);
3145 * ixgbe_poll - NAPI Rx polling callback
3146 * @napi: structure for representing this polling device
3147 * @budget: how many packets driver is allowed to clean
3149 * This function is used for legacy and MSI, NAPI mode
3151 int ixgbe_poll(struct napi_struct *napi, int budget)
3153 struct ixgbe_q_vector *q_vector =
3154 container_of(napi, struct ixgbe_q_vector, napi);
3155 struct ixgbe_adapter *adapter = q_vector->adapter;
3156 struct ixgbe_ring *ring;
3157 int per_ring_budget, work_done = 0;
3158 bool clean_complete = true;
3160 #ifdef CONFIG_IXGBE_DCA
3161 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3162 ixgbe_update_dca(q_vector);
3165 ixgbe_for_each_ring(ring, q_vector->tx) {
3166 bool wd = ring->xsk_umem ?
3167 ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3168 ixgbe_clean_tx_irq(q_vector, ring, budget);
3171 clean_complete = false;
3174 /* Exit if we are called by netpoll */
3178 /* attempt to distribute budget to each queue fairly, but don't allow
3179 * the budget to go below 1 because we'll exit polling */
3180 if (q_vector->rx.count > 1)
3181 per_ring_budget = max(budget/q_vector->rx.count, 1);
3183 per_ring_budget = budget;
3185 ixgbe_for_each_ring(ring, q_vector->rx) {
3186 int cleaned = ring->xsk_umem ?
3187 ixgbe_clean_rx_irq_zc(q_vector, ring,
3189 ixgbe_clean_rx_irq(q_vector, ring,
3192 work_done += cleaned;
3193 if (cleaned >= per_ring_budget)
3194 clean_complete = false;
3197 /* If all work not completed, return budget and keep polling */
3198 if (!clean_complete)
3201 /* all work done, exit the polling mode */
3202 if (likely(napi_complete_done(napi, work_done))) {
3203 if (adapter->rx_itr_setting & 1)
3204 ixgbe_set_itr(q_vector);
3205 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3206 ixgbe_irq_enable_queues(adapter,
3207 BIT_ULL(q_vector->v_idx));
3210 return min(work_done, budget - 1);
3214 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3215 * @adapter: board private structure
3217 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3218 * interrupts from the kernel.
3220 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3222 struct net_device *netdev = adapter->netdev;
3223 unsigned int ri = 0, ti = 0;
3226 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3227 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3228 struct msix_entry *entry = &adapter->msix_entries[vector];
3230 if (q_vector->tx.ring && q_vector->rx.ring) {
3231 snprintf(q_vector->name, sizeof(q_vector->name),
3232 "%s-TxRx-%u", netdev->name, ri++);
3234 } else if (q_vector->rx.ring) {
3235 snprintf(q_vector->name, sizeof(q_vector->name),
3236 "%s-rx-%u", netdev->name, ri++);
3237 } else if (q_vector->tx.ring) {
3238 snprintf(q_vector->name, sizeof(q_vector->name),
3239 "%s-tx-%u", netdev->name, ti++);
3241 /* skip this unused q_vector */
3244 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3245 q_vector->name, q_vector);
3247 e_err(probe, "request_irq failed for MSIX interrupt "
3248 "Error: %d\n", err);
3249 goto free_queue_irqs;
3251 /* If Flow Director is enabled, set interrupt affinity */
3252 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3253 /* assign the mask for this irq */
3254 irq_set_affinity_hint(entry->vector,
3255 &q_vector->affinity_mask);
3259 err = request_irq(adapter->msix_entries[vector].vector,
3260 ixgbe_msix_other, 0, netdev->name, adapter);
3262 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3263 goto free_queue_irqs;
3271 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3273 free_irq(adapter->msix_entries[vector].vector,
3274 adapter->q_vector[vector]);
3276 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3277 pci_disable_msix(adapter->pdev);
3278 kfree(adapter->msix_entries);
3279 adapter->msix_entries = NULL;
3284 * ixgbe_intr - legacy mode Interrupt Handler
3285 * @irq: interrupt number
3286 * @data: pointer to a network interface device structure
3288 static irqreturn_t ixgbe_intr(int irq, void *data)
3290 struct ixgbe_adapter *adapter = data;
3291 struct ixgbe_hw *hw = &adapter->hw;
3292 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3296 * Workaround for silicon errata #26 on 82598. Mask the interrupt
3297 * before the read of EICR.
3299 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3301 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3302 * therefore no explicit interrupt disable is necessary */
3303 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3306 * shared interrupt alert!
3307 * make sure interrupts are enabled because the read will
3308 * have disabled interrupts due to EIAM
3309 * finish the workaround of silicon errata on 82598. Unmask
3310 * the interrupt that we masked before the EICR read.
3312 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3313 ixgbe_irq_enable(adapter, true, true);
3314 return IRQ_NONE; /* Not our interrupt */
3317 if (eicr & IXGBE_EICR_LSC)
3318 ixgbe_check_lsc(adapter);
3320 switch (hw->mac.type) {
3321 case ixgbe_mac_82599EB:
3322 ixgbe_check_sfp_event(adapter, eicr);
3324 case ixgbe_mac_X540:
3325 case ixgbe_mac_X550:
3326 case ixgbe_mac_X550EM_x:
3327 case ixgbe_mac_x550em_a:
3328 if (eicr & IXGBE_EICR_ECC) {
3329 e_info(link, "Received ECC Err, initiating reset\n");
3330 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3331 ixgbe_service_event_schedule(adapter);
3332 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3334 ixgbe_check_overtemp_event(adapter, eicr);
3340 ixgbe_check_fan_failure(adapter, eicr);
3341 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3342 ixgbe_ptp_check_pps_event(adapter);
3344 /* would disable interrupts here but EIAM disabled it */
3345 napi_schedule_irqoff(&q_vector->napi);
3348 * re-enable link(maybe) and non-queue interrupts, no flush.
3349 * ixgbe_poll will re-enable the queue interrupts
3351 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3352 ixgbe_irq_enable(adapter, false, false);
3358 * ixgbe_request_irq - initialize interrupts
3359 * @adapter: board private structure
3361 * Attempts to configure interrupts using the best available
3362 * capabilities of the hardware and kernel.
3364 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3366 struct net_device *netdev = adapter->netdev;
3369 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3370 err = ixgbe_request_msix_irqs(adapter);
3371 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3372 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3373 netdev->name, adapter);
3375 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3376 netdev->name, adapter);
3379 e_err(probe, "request_irq failed, Error %d\n", err);
3384 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3388 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3389 free_irq(adapter->pdev->irq, adapter);
3393 if (!adapter->msix_entries)
3396 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3397 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3398 struct msix_entry *entry = &adapter->msix_entries[vector];
3400 /* free only the irqs that were actually requested */
3401 if (!q_vector->rx.ring && !q_vector->tx.ring)
3404 /* clear the affinity_mask in the IRQ descriptor */
3405 irq_set_affinity_hint(entry->vector, NULL);
3407 free_irq(entry->vector, q_vector);
3410 free_irq(adapter->msix_entries[vector].vector, adapter);
3414 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3415 * @adapter: board private structure
3417 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3419 switch (adapter->hw.mac.type) {
3420 case ixgbe_mac_82598EB:
3421 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3423 case ixgbe_mac_82599EB:
3424 case ixgbe_mac_X540:
3425 case ixgbe_mac_X550:
3426 case ixgbe_mac_X550EM_x:
3427 case ixgbe_mac_x550em_a:
3428 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3429 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3430 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3435 IXGBE_WRITE_FLUSH(&adapter->hw);
3436 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3439 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3440 synchronize_irq(adapter->msix_entries[vector].vector);
3442 synchronize_irq(adapter->msix_entries[vector++].vector);
3444 synchronize_irq(adapter->pdev->irq);
3449 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3450 * @adapter: board private structure
3453 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3455 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3457 ixgbe_write_eitr(q_vector);
3459 ixgbe_set_ivar(adapter, 0, 0, 0);
3460 ixgbe_set_ivar(adapter, 1, 0, 0);
3462 e_info(hw, "Legacy interrupt IVAR setup done\n");
3466 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3467 * @adapter: board private structure
3468 * @ring: structure containing ring specific data
3470 * Configure the Tx descriptor ring after a reset.
3472 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3473 struct ixgbe_ring *ring)
3475 struct ixgbe_hw *hw = &adapter->hw;
3476 u64 tdba = ring->dma;
3478 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3479 u8 reg_idx = ring->reg_idx;
3481 ring->xsk_umem = NULL;
3482 if (ring_is_xdp(ring))
3483 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3485 /* disable queue to avoid issues while updating state */
3486 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3487 IXGBE_WRITE_FLUSH(hw);
3489 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3490 (tdba & DMA_BIT_MASK(32)));
3491 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3492 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3493 ring->count * sizeof(union ixgbe_adv_tx_desc));
3494 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3495 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3496 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3499 * set WTHRESH to encourage burst writeback, it should not be set
3500 * higher than 1 when:
3501 * - ITR is 0 as it could cause false TX hangs
3502 * - ITR is set to > 100k int/sec and BQL is enabled
3504 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3505 * to or less than the number of on chip descriptors, which is
3508 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3509 txdctl |= 1u << 16; /* WTHRESH = 1 */
3511 txdctl |= 8u << 16; /* WTHRESH = 8 */
3514 * Setting PTHRESH to 32 both improves performance
3515 * and avoids a TX hang with DFP enabled
3517 txdctl |= (1u << 8) | /* HTHRESH = 1 */
3518 32; /* PTHRESH = 32 */
3520 /* reinitialize flowdirector state */
3521 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3522 ring->atr_sample_rate = adapter->atr_sample_rate;
3523 ring->atr_count = 0;
3524 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3526 ring->atr_sample_rate = 0;
3529 /* initialize XPS */
3530 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3531 struct ixgbe_q_vector *q_vector = ring->q_vector;
3534 netif_set_xps_queue(ring->netdev,
3535 &q_vector->affinity_mask,
3539 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3541 /* reinitialize tx_buffer_info */
3542 memset(ring->tx_buffer_info, 0,
3543 sizeof(struct ixgbe_tx_buffer) * ring->count);
3546 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3548 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3549 if (hw->mac.type == ixgbe_mac_82598EB &&
3550 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3553 /* poll to verify queue is enabled */
3555 usleep_range(1000, 2000);
3556 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3557 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3559 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3562 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3564 struct ixgbe_hw *hw = &adapter->hw;
3566 u8 tcs = adapter->hw_tcs;
3568 if (hw->mac.type == ixgbe_mac_82598EB)
3571 /* disable the arbiter while setting MTQC */
3572 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3573 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3574 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3576 /* set transmit pool layout */
3577 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3578 mtqc = IXGBE_MTQC_VT_ENA;
3580 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3582 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3583 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3584 IXGBE_82599_VMDQ_4Q_MASK)
3585 mtqc |= IXGBE_MTQC_32VF;
3587 mtqc |= IXGBE_MTQC_64VF;
3590 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3591 } else if (tcs > 1) {
3592 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3594 u8 max_txq = adapter->num_tx_queues +
3595 adapter->num_xdp_queues;
3597 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3599 mtqc = IXGBE_MTQC_64Q_1PB;
3603 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3605 /* Enable Security TX Buffer IFG for multiple pb */
3607 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3608 sectx |= IXGBE_SECTX_DCB;
3609 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3612 /* re-enable the arbiter */
3613 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3614 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3618 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3619 * @adapter: board private structure
3621 * Configure the Tx unit of the MAC after a reset.
3623 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3625 struct ixgbe_hw *hw = &adapter->hw;
3629 ixgbe_setup_mtqc(adapter);
3631 if (hw->mac.type != ixgbe_mac_82598EB) {
3632 /* DMATXCTL.EN must be before Tx queues are enabled */
3633 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3634 dmatxctl |= IXGBE_DMATXCTL_TE;
3635 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3638 /* Setup the HW Tx Head and Tail descriptor pointers */
3639 for (i = 0; i < adapter->num_tx_queues; i++)
3640 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3641 for (i = 0; i < adapter->num_xdp_queues; i++)
3642 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3645 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3646 struct ixgbe_ring *ring)
3648 struct ixgbe_hw *hw = &adapter->hw;
3649 u8 reg_idx = ring->reg_idx;
3650 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3652 srrctl |= IXGBE_SRRCTL_DROP_EN;
3654 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3657 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3658 struct ixgbe_ring *ring)
3660 struct ixgbe_hw *hw = &adapter->hw;
3661 u8 reg_idx = ring->reg_idx;
3662 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3664 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3666 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3669 #ifdef CONFIG_IXGBE_DCB
3670 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3672 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3676 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3678 if (adapter->ixgbe_ieee_pfc)
3679 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3682 * We should set the drop enable bit if:
3685 * Number of Rx queues > 1 and flow control is disabled
3687 * This allows us to avoid head of line blocking for security
3688 * and performance reasons.
3690 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3691 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3692 for (i = 0; i < adapter->num_rx_queues; i++)
3693 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3695 for (i = 0; i < adapter->num_rx_queues; i++)
3696 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3700 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3702 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3703 struct ixgbe_ring *rx_ring)
3705 struct ixgbe_hw *hw = &adapter->hw;
3707 u8 reg_idx = rx_ring->reg_idx;
3709 if (hw->mac.type == ixgbe_mac_82598EB) {
3710 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3713 * if VMDq is not active we must program one srrctl register
3714 * per RSS queue since we have enabled RDRXCTL.MVMEN
3719 /* configure header buffer length, needed for RSC */
3720 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3722 /* configure the packet buffer length */
3723 if (rx_ring->xsk_umem) {
3724 u32 xsk_buf_len = rx_ring->xsk_umem->chunk_size_nohr -
3725 XDP_PACKET_HEADROOM;
3727 /* If the MAC support setting RXDCTL.RLPML, the
3728 * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3729 * RXDCTL.RLPML is set to the actual UMEM buffer
3730 * size. If not, then we are stuck with a 1k buffer
3731 * size resolution. In this case frames larger than
3732 * the UMEM buffer size viewed in a 1k resolution will
3735 if (hw->mac.type != ixgbe_mac_82599EB)
3736 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3738 srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3739 } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3740 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3742 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3745 /* configure descriptor type */
3746 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3748 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3752 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3753 * @adapter: device handle
3755 * - 82598/82599/X540: 128
3756 * - X550(non-SRIOV mode): 512
3757 * - X550(SRIOV mode): 64
3759 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3761 if (adapter->hw.mac.type < ixgbe_mac_X550)
3763 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3770 * ixgbe_store_key - Write the RSS key to HW
3771 * @adapter: device handle
3773 * Write the RSS key stored in adapter.rss_key to HW.
3775 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3777 struct ixgbe_hw *hw = &adapter->hw;
3780 for (i = 0; i < 10; i++)
3781 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3785 * ixgbe_init_rss_key - Initialize adapter RSS key
3786 * @adapter: device handle
3788 * Allocates and initializes the RSS key if it is not allocated.
3790 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3794 if (!adapter->rss_key) {
3795 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3796 if (unlikely(!rss_key))
3799 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3800 adapter->rss_key = rss_key;
3807 * ixgbe_store_reta - Write the RETA table to HW
3808 * @adapter: device handle
3810 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3812 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3814 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3815 struct ixgbe_hw *hw = &adapter->hw;
3818 u8 *indir_tbl = adapter->rss_indir_tbl;
3820 /* Fill out the redirection table as follows:
3821 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3823 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3824 * - X550: 8 bit wide entries containing 6 bit RSS index
3826 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3827 indices_multi = 0x11;
3829 indices_multi = 0x1;
3831 /* Write redirection table to HW */
3832 for (i = 0; i < reta_entries; i++) {
3833 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3836 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3838 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3846 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3847 * @adapter: device handle
3849 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3851 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3853 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3854 struct ixgbe_hw *hw = &adapter->hw;
3857 /* Write redirection table to HW */
3858 for (i = 0; i < reta_entries; i++) {
3859 u16 pool = adapter->num_rx_pools;
3861 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3867 IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3873 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3876 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3877 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3879 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3880 * make full use of any rings they may have. We will use the
3881 * PSRTYPE register to control how many rings we use within the PF.
3883 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3886 /* Fill out hash function seeds */
3887 ixgbe_store_key(adapter);
3889 /* Fill out redirection table */
3890 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3892 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3896 adapter->rss_indir_tbl[i] = j;
3899 ixgbe_store_reta(adapter);
3902 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3904 struct ixgbe_hw *hw = &adapter->hw;
3905 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3908 /* Fill out hash function seeds */
3909 for (i = 0; i < 10; i++) {
3910 u16 pool = adapter->num_rx_pools;
3914 IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3915 *(adapter->rss_key + i));
3918 /* Fill out the redirection table */
3919 for (i = 0, j = 0; i < 64; i++, j++) {
3923 adapter->rss_indir_tbl[i] = j;
3926 ixgbe_store_vfreta(adapter);
3929 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3931 struct ixgbe_hw *hw = &adapter->hw;
3932 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3935 /* Disable indicating checksum in descriptor, enables RSS hash */
3936 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3937 rxcsum |= IXGBE_RXCSUM_PCSD;
3938 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3940 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3941 if (adapter->ring_feature[RING_F_RSS].mask)
3942 mrqc = IXGBE_MRQC_RSSEN;
3944 u8 tcs = adapter->hw_tcs;
3946 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3948 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3950 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3951 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3952 IXGBE_82599_VMDQ_4Q_MASK)
3953 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3955 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3957 /* Enable L3/L4 for Tx Switched packets only for X550,
3958 * older devices do not support this feature
3960 if (hw->mac.type >= ixgbe_mac_X550)
3961 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3964 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3966 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3968 mrqc = IXGBE_MRQC_RSSEN;
3972 /* Perform hash on these packet types */
3973 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3974 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3975 IXGBE_MRQC_RSS_FIELD_IPV6 |
3976 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3978 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3979 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3980 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3981 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3983 if ((hw->mac.type >= ixgbe_mac_X550) &&
3984 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3985 u16 pool = adapter->num_rx_pools;
3987 /* Enable VF RSS mode */
3988 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3989 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3991 /* Setup RSS through the VF registers */
3992 ixgbe_setup_vfreta(adapter);
3993 vfmrqc = IXGBE_MRQC_RSSEN;
3994 vfmrqc |= rss_field;
3998 IXGBE_PFVFMRQC(VMDQ_P(pool)),
4001 ixgbe_setup_reta(adapter);
4003 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4008 * ixgbe_configure_rscctl - enable RSC for the indicated ring
4009 * @adapter: address of board private structure
4010 * @ring: structure containing ring specific data
4012 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4013 struct ixgbe_ring *ring)
4015 struct ixgbe_hw *hw = &adapter->hw;
4017 u8 reg_idx = ring->reg_idx;
4019 if (!ring_is_rsc_enabled(ring))
4022 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4023 rscctrl |= IXGBE_RSCCTL_RSCEN;
4025 * we must limit the number of descriptors so that the
4026 * total size of max desc * buf_len is not greater
4029 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4030 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4033 #define IXGBE_MAX_RX_DESC_POLL 10
4034 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4035 struct ixgbe_ring *ring)
4037 struct ixgbe_hw *hw = &adapter->hw;
4038 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4040 u8 reg_idx = ring->reg_idx;
4042 if (ixgbe_removed(hw->hw_addr))
4044 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4045 if (hw->mac.type == ixgbe_mac_82598EB &&
4046 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4050 usleep_range(1000, 2000);
4051 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4052 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4055 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4056 "the polling period\n", reg_idx);
4060 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4061 struct ixgbe_ring *ring)
4063 struct ixgbe_hw *hw = &adapter->hw;
4064 union ixgbe_adv_rx_desc *rx_desc;
4065 u64 rdba = ring->dma;
4067 u8 reg_idx = ring->reg_idx;
4069 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4070 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4071 if (ring->xsk_umem) {
4072 ring->zca.free = ixgbe_zca_free;
4073 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4078 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4079 MEM_TYPE_PAGE_SHARED, NULL));
4082 /* disable queue to avoid use of these values while updating state */
4083 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4084 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4086 /* write value back with RXDCTL.ENABLE bit cleared */
4087 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4088 IXGBE_WRITE_FLUSH(hw);
4090 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4091 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4092 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4093 ring->count * sizeof(union ixgbe_adv_rx_desc));
4094 /* Force flushing of IXGBE_RDLEN to prevent MDD */
4095 IXGBE_WRITE_FLUSH(hw);
4097 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4098 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4099 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4101 ixgbe_configure_srrctl(adapter, ring);
4102 ixgbe_configure_rscctl(adapter, ring);
4104 if (hw->mac.type == ixgbe_mac_82598EB) {
4106 * enable cache line friendly hardware writes:
4107 * PTHRESH=32 descriptors (half the internal cache),
4108 * this also removes ugly rx_no_buffer_count increment
4109 * HTHRESH=4 descriptors (to minimize latency on fetch)
4110 * WTHRESH=8 burst writeback up to two cache lines
4112 rxdctl &= ~0x3FFFFF;
4114 #if (PAGE_SIZE < 8192)
4115 /* RXDCTL.RLPML does not work on 82599 */
4116 } else if (hw->mac.type != ixgbe_mac_82599EB) {
4117 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4118 IXGBE_RXDCTL_RLPML_EN);
4120 /* Limit the maximum frame size so we don't overrun the skb.
4121 * This can happen in SRIOV mode when the MTU of the VF is
4122 * higher than the MTU of the PF.
4124 if (ring_uses_build_skb(ring) &&
4125 !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4126 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4127 IXGBE_RXDCTL_RLPML_EN;
4131 if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4132 u32 xsk_buf_len = ring->xsk_umem->chunk_size_nohr -
4133 XDP_PACKET_HEADROOM;
4135 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4136 IXGBE_RXDCTL_RLPML_EN);
4137 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4139 ring->rx_buf_len = xsk_buf_len;
4142 /* initialize rx_buffer_info */
4143 memset(ring->rx_buffer_info, 0,
4144 sizeof(struct ixgbe_rx_buffer) * ring->count);
4146 /* initialize Rx descriptor 0 */
4147 rx_desc = IXGBE_RX_DESC(ring, 0);
4148 rx_desc->wb.upper.length = 0;
4150 /* enable receive descriptor ring */
4151 rxdctl |= IXGBE_RXDCTL_ENABLE;
4152 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4154 ixgbe_rx_desc_queue_enable(adapter, ring);
4156 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4158 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4161 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4163 struct ixgbe_hw *hw = &adapter->hw;
4164 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4165 u16 pool = adapter->num_rx_pools;
4167 /* PSRTYPE must be initialized in non 82598 adapters */
4168 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4169 IXGBE_PSRTYPE_UDPHDR |
4170 IXGBE_PSRTYPE_IPV4HDR |
4171 IXGBE_PSRTYPE_L2HDR |
4172 IXGBE_PSRTYPE_IPV6HDR;
4174 if (hw->mac.type == ixgbe_mac_82598EB)
4178 psrtype |= 2u << 29;
4180 psrtype |= 1u << 29;
4183 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4186 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4188 struct ixgbe_hw *hw = &adapter->hw;
4189 u16 pool = adapter->num_rx_pools;
4190 u32 reg_offset, vf_shift, vmolr;
4191 u32 gcr_ext, vmdctl;
4194 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4197 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4198 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4199 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4200 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4201 vmdctl |= IXGBE_VT_CTL_REPLEN;
4202 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4204 /* accept untagged packets until a vlan tag is
4205 * specifically set for the VMDQ queue/pool
4207 vmolr = IXGBE_VMOLR_AUPE;
4209 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4211 vf_shift = VMDQ_P(0) % 32;
4212 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4214 /* Enable only the PF's pool for Tx/Rx */
4215 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4216 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4217 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4218 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4219 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4220 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4222 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4223 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4225 /* clear VLAN promisc flag so VFTA will be updated if necessary */
4226 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4229 * Set up VF register offsets for selected VT Mode,
4230 * i.e. 32 or 64 VFs for SR-IOV
4232 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4233 case IXGBE_82599_VMDQ_8Q_MASK:
4234 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4236 case IXGBE_82599_VMDQ_4Q_MASK:
4237 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4240 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4244 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4246 for (i = 0; i < adapter->num_vfs; i++) {
4247 /* configure spoof checking */
4248 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4249 adapter->vfinfo[i].spoofchk_enabled);
4251 /* Enable/Disable RSS query feature */
4252 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4253 adapter->vfinfo[i].rss_query_enabled);
4257 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4259 struct ixgbe_hw *hw = &adapter->hw;
4260 struct net_device *netdev = adapter->netdev;
4261 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4262 struct ixgbe_ring *rx_ring;
4267 /* adjust max frame to be able to do baby jumbo for FCoE */
4268 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4269 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4270 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4272 #endif /* IXGBE_FCOE */
4274 /* adjust max frame to be at least the size of a standard frame */
4275 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4276 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4278 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4279 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4280 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4281 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4283 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4286 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4287 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4288 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4289 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4292 * Setup the HW Rx Head and Tail Descriptor Pointers and
4293 * the Base and Length of the Rx Descriptor Ring
4295 for (i = 0; i < adapter->num_rx_queues; i++) {
4296 rx_ring = adapter->rx_ring[i];
4298 clear_ring_rsc_enabled(rx_ring);
4299 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4300 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4302 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4303 set_ring_rsc_enabled(rx_ring);
4305 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4306 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4308 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4309 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4312 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4314 #if (PAGE_SIZE < 8192)
4315 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4316 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4318 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4319 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4320 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4325 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4327 struct ixgbe_hw *hw = &adapter->hw;
4328 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4330 switch (hw->mac.type) {
4331 case ixgbe_mac_82598EB:
4333 * For VMDq support of different descriptor types or
4334 * buffer sizes through the use of multiple SRRCTL
4335 * registers, RDRXCTL.MVMEN must be set to 1
4337 * also, the manual doesn't mention it clearly but DCA hints
4338 * will only use queue 0's tags unless this bit is set. Side
4339 * effects of setting this bit are only that SRRCTL must be
4340 * fully programmed [0..15]
4342 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4344 case ixgbe_mac_X550:
4345 case ixgbe_mac_X550EM_x:
4346 case ixgbe_mac_x550em_a:
4347 if (adapter->num_vfs)
4348 rdrxctl |= IXGBE_RDRXCTL_PSP;
4350 case ixgbe_mac_82599EB:
4351 case ixgbe_mac_X540:
4352 /* Disable RSC for ACK packets */
4353 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4354 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4355 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4356 /* hardware requires some bits to be set by default */
4357 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4358 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4361 /* We should do nothing since we don't know this hardware */
4365 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4369 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4370 * @adapter: board private structure
4372 * Configure the Rx unit of the MAC after a reset.
4374 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4376 struct ixgbe_hw *hw = &adapter->hw;
4380 /* disable receives while setting up the descriptors */
4381 hw->mac.ops.disable_rx(hw);
4383 ixgbe_setup_psrtype(adapter);
4384 ixgbe_setup_rdrxctl(adapter);
4387 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4388 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4389 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4390 rfctl |= IXGBE_RFCTL_RSC_DIS;
4392 /* disable NFS filtering */
4393 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4394 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4396 /* Program registers for the distribution of queues */
4397 ixgbe_setup_mrqc(adapter);
4399 /* set_rx_buffer_len must be called before ring initialization */
4400 ixgbe_set_rx_buffer_len(adapter);
4403 * Setup the HW Rx Head and Tail Descriptor Pointers and
4404 * the Base and Length of the Rx Descriptor Ring
4406 for (i = 0; i < adapter->num_rx_queues; i++)
4407 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4409 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4410 /* disable drop enable for 82598 parts */
4411 if (hw->mac.type == ixgbe_mac_82598EB)
4412 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4414 /* enable all receives */
4415 rxctrl |= IXGBE_RXCTRL_RXEN;
4416 hw->mac.ops.enable_rx_dma(hw, rxctrl);
4419 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4420 __be16 proto, u16 vid)
4422 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4423 struct ixgbe_hw *hw = &adapter->hw;
4425 /* add VID to filter table */
4426 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4427 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4429 set_bit(vid, adapter->active_vlans);
4434 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4439 /* short cut the special case */
4443 /* Search for the vlan id in the VLVF entries */
4444 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4445 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4446 if ((vlvf & VLAN_VID_MASK) == vlan)
4453 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4455 struct ixgbe_hw *hw = &adapter->hw;
4459 idx = ixgbe_find_vlvf_entry(hw, vid);
4463 /* See if any other pools are set for this VLAN filter
4464 * entry other than the PF.
4466 word = idx * 2 + (VMDQ_P(0) / 32);
4467 bits = ~BIT(VMDQ_P(0) % 32);
4468 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4470 /* Disable the filter so this falls into the default pool. */
4471 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4472 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4473 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4474 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4478 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4479 __be16 proto, u16 vid)
4481 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4482 struct ixgbe_hw *hw = &adapter->hw;
4484 /* remove VID from filter table */
4485 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4486 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4488 clear_bit(vid, adapter->active_vlans);
4494 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4495 * @adapter: driver data
4497 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4499 struct ixgbe_hw *hw = &adapter->hw;
4503 switch (hw->mac.type) {
4504 case ixgbe_mac_82598EB:
4505 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4506 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4507 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4509 case ixgbe_mac_82599EB:
4510 case ixgbe_mac_X540:
4511 case ixgbe_mac_X550:
4512 case ixgbe_mac_X550EM_x:
4513 case ixgbe_mac_x550em_a:
4514 for (i = 0; i < adapter->num_rx_queues; i++) {
4515 struct ixgbe_ring *ring = adapter->rx_ring[i];
4517 if (!netif_is_ixgbe(ring->netdev))
4521 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4522 vlnctrl &= ~IXGBE_RXDCTL_VME;
4523 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4532 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4533 * @adapter: driver data
4535 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4537 struct ixgbe_hw *hw = &adapter->hw;
4541 switch (hw->mac.type) {
4542 case ixgbe_mac_82598EB:
4543 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4544 vlnctrl |= IXGBE_VLNCTRL_VME;
4545 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4547 case ixgbe_mac_82599EB:
4548 case ixgbe_mac_X540:
4549 case ixgbe_mac_X550:
4550 case ixgbe_mac_X550EM_x:
4551 case ixgbe_mac_x550em_a:
4552 for (i = 0; i < adapter->num_rx_queues; i++) {
4553 struct ixgbe_ring *ring = adapter->rx_ring[i];
4555 if (!netif_is_ixgbe(ring->netdev))
4559 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4560 vlnctrl |= IXGBE_RXDCTL_VME;
4561 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4569 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4571 struct ixgbe_hw *hw = &adapter->hw;
4574 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4576 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4577 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4578 vlnctrl |= IXGBE_VLNCTRL_VFE;
4579 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4581 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4582 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4586 /* Nothing to do for 82598 */
4587 if (hw->mac.type == ixgbe_mac_82598EB)
4590 /* We are already in VLAN promisc, nothing to do */
4591 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4594 /* Set flag so we don't redo unnecessary work */
4595 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4597 /* Add PF to all active pools */
4598 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4599 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4600 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4602 vlvfb |= BIT(VMDQ_P(0) % 32);
4603 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4606 /* Set all bits in the VLAN filter table array */
4607 for (i = hw->mac.vft_size; i--;)
4608 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4611 #define VFTA_BLOCK_SIZE 8
4612 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4614 struct ixgbe_hw *hw = &adapter->hw;
4615 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4616 u32 vid_start = vfta_offset * 32;
4617 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4618 u32 i, vid, word, bits;
4620 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4621 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4623 /* pull VLAN ID from VLVF */
4624 vid = vlvf & VLAN_VID_MASK;
4626 /* only concern outselves with a certain range */
4627 if (vid < vid_start || vid >= vid_end)
4631 /* record VLAN ID in VFTA */
4632 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4634 /* if PF is part of this then continue */
4635 if (test_bit(vid, adapter->active_vlans))
4639 /* remove PF from the pool */
4640 word = i * 2 + VMDQ_P(0) / 32;
4641 bits = ~BIT(VMDQ_P(0) % 32);
4642 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4643 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4646 /* extract values from active_vlans and write back to VFTA */
4647 for (i = VFTA_BLOCK_SIZE; i--;) {
4648 vid = (vfta_offset + i) * 32;
4649 word = vid / BITS_PER_LONG;
4650 bits = vid % BITS_PER_LONG;
4652 vfta[i] |= adapter->active_vlans[word] >> bits;
4654 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4658 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4660 struct ixgbe_hw *hw = &adapter->hw;
4663 /* Set VLAN filtering to enabled */
4664 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4665 vlnctrl |= IXGBE_VLNCTRL_VFE;
4666 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4668 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4669 hw->mac.type == ixgbe_mac_82598EB)
4672 /* We are not in VLAN promisc, nothing to do */
4673 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4676 /* Set flag so we don't redo unnecessary work */
4677 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4679 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4680 ixgbe_scrub_vfta(adapter, i);
4683 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4687 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4689 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4690 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4694 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4695 * @netdev: network interface device structure
4697 * Writes multicast address list to the MTA hash table.
4698 * Returns: -ENOMEM on failure
4699 * 0 on no addresses written
4700 * X on writing X addresses to MTA
4702 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4704 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4705 struct ixgbe_hw *hw = &adapter->hw;
4707 if (!netif_running(netdev))
4710 if (hw->mac.ops.update_mc_addr_list)
4711 hw->mac.ops.update_mc_addr_list(hw, netdev);
4715 #ifdef CONFIG_PCI_IOV
4716 ixgbe_restore_vf_multicasts(adapter);
4719 return netdev_mc_count(netdev);
4722 #ifdef CONFIG_PCI_IOV
4723 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4725 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4726 struct ixgbe_hw *hw = &adapter->hw;
4729 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4730 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4732 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4733 hw->mac.ops.set_rar(hw, i,
4738 hw->mac.ops.clear_rar(hw, i);
4743 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4745 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4746 struct ixgbe_hw *hw = &adapter->hw;
4749 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4750 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4753 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4755 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4756 hw->mac.ops.set_rar(hw, i,
4761 hw->mac.ops.clear_rar(hw, i);
4765 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4767 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4768 struct ixgbe_hw *hw = &adapter->hw;
4771 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4772 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4773 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4776 ixgbe_sync_mac_table(adapter);
4779 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4781 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4782 struct ixgbe_hw *hw = &adapter->hw;
4785 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4786 /* do not count default RAR as available */
4787 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4790 /* only count unused and addresses that belong to us */
4791 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4792 if (mac_table->pool != pool)
4802 /* this function destroys the first RAR entry */
4803 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4805 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4806 struct ixgbe_hw *hw = &adapter->hw;
4808 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4809 mac_table->pool = VMDQ_P(0);
4811 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4813 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4817 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4818 const u8 *addr, u16 pool)
4820 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4821 struct ixgbe_hw *hw = &adapter->hw;
4824 if (is_zero_ether_addr(addr))
4827 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4828 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4831 ether_addr_copy(mac_table->addr, addr);
4832 mac_table->pool = pool;
4834 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4835 IXGBE_MAC_STATE_IN_USE;
4837 ixgbe_sync_mac_table(adapter);
4845 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4846 const u8 *addr, u16 pool)
4848 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4849 struct ixgbe_hw *hw = &adapter->hw;
4852 if (is_zero_ether_addr(addr))
4855 /* search table for addr, if found clear IN_USE flag and sync */
4856 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4857 /* we can only delete an entry if it is in use */
4858 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4860 /* we only care about entries that belong to the given pool */
4861 if (mac_table->pool != pool)
4863 /* we only care about a specific MAC address */
4864 if (!ether_addr_equal(addr, mac_table->addr))
4867 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4868 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4870 ixgbe_sync_mac_table(adapter);
4878 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4880 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4883 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4885 return min_t(int, ret, 0);
4888 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4890 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4892 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4898 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4899 * @netdev: network interface device structure
4901 * The set_rx_method entry point is called whenever the unicast/multicast
4902 * address list or the network interface flags are updated. This routine is
4903 * responsible for configuring the hardware for proper unicast, multicast and
4906 void ixgbe_set_rx_mode(struct net_device *netdev)
4908 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4909 struct ixgbe_hw *hw = &adapter->hw;
4910 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4911 netdev_features_t features = netdev->features;
4914 /* Check for Promiscuous and All Multicast modes */
4915 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4917 /* set all bits that we expect to always be set */
4918 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4919 fctrl |= IXGBE_FCTRL_BAM;
4920 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4921 fctrl |= IXGBE_FCTRL_PMCF;
4923 /* clear the bits we are changing the status of */
4924 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4925 if (netdev->flags & IFF_PROMISC) {
4926 hw->addr_ctrl.user_set_promisc = true;
4927 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4928 vmolr |= IXGBE_VMOLR_MPE;
4929 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4931 if (netdev->flags & IFF_ALLMULTI) {
4932 fctrl |= IXGBE_FCTRL_MPE;
4933 vmolr |= IXGBE_VMOLR_MPE;
4935 hw->addr_ctrl.user_set_promisc = false;
4939 * Write addresses to available RAR registers, if there is not
4940 * sufficient space to store all the addresses then enable
4941 * unicast promiscuous mode
4943 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4944 fctrl |= IXGBE_FCTRL_UPE;
4945 vmolr |= IXGBE_VMOLR_ROPE;
4948 /* Write addresses to the MTA, if the attempt fails
4949 * then we should just turn on promiscuous mode so
4950 * that we can at least receive multicast traffic
4952 count = ixgbe_write_mc_addr_list(netdev);
4954 fctrl |= IXGBE_FCTRL_MPE;
4955 vmolr |= IXGBE_VMOLR_MPE;
4957 vmolr |= IXGBE_VMOLR_ROMPE;
4960 if (hw->mac.type != ixgbe_mac_82598EB) {
4961 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4962 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4964 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4967 /* This is useful for sniffing bad packets. */
4968 if (features & NETIF_F_RXALL) {
4969 /* UPE and MPE will be handled by normal PROMISC logic
4970 * in e1000e_set_rx_mode */
4971 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4972 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4973 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4975 fctrl &= ~(IXGBE_FCTRL_DPF);
4976 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4979 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4981 if (features & NETIF_F_HW_VLAN_CTAG_RX)
4982 ixgbe_vlan_strip_enable(adapter);
4984 ixgbe_vlan_strip_disable(adapter);
4986 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4987 ixgbe_vlan_promisc_disable(adapter);
4989 ixgbe_vlan_promisc_enable(adapter);
4992 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4996 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4997 napi_enable(&adapter->q_vector[q_idx]->napi);
5000 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5004 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5005 napi_disable(&adapter->q_vector[q_idx]->napi);
5008 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5010 struct ixgbe_hw *hw = &adapter->hw;
5013 if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5014 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5017 vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5018 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5020 if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5021 adapter->vxlan_port = 0;
5023 if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5024 adapter->geneve_port = 0;
5027 #ifdef CONFIG_IXGBE_DCB
5029 * ixgbe_configure_dcb - Configure DCB hardware
5030 * @adapter: ixgbe adapter struct
5032 * This is called by the driver on open to configure the DCB hardware.
5033 * This is also called by the gennetlink interface when reconfiguring
5036 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5038 struct ixgbe_hw *hw = &adapter->hw;
5039 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5041 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5042 if (hw->mac.type == ixgbe_mac_82598EB)
5043 netif_set_gso_max_size(adapter->netdev, 65536);
5047 if (hw->mac.type == ixgbe_mac_82598EB)
5048 netif_set_gso_max_size(adapter->netdev, 32768);
5051 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5052 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5055 /* reconfigure the hardware */
5056 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5057 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5059 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5061 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5062 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5063 ixgbe_dcb_hw_ets(&adapter->hw,
5064 adapter->ixgbe_ieee_ets,
5066 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5067 adapter->ixgbe_ieee_pfc->pfc_en,
5068 adapter->ixgbe_ieee_ets->prio_tc);
5071 /* Enable RSS Hash per TC */
5072 if (hw->mac.type != ixgbe_mac_82598EB) {
5074 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5081 /* write msb to all 8 TCs in one write */
5082 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5087 /* Additional bittime to account for IXGBE framing */
5088 #define IXGBE_ETH_FRAMING 20
5091 * ixgbe_hpbthresh - calculate high water mark for flow control
5093 * @adapter: board private structure to calculate for
5094 * @pb: packet buffer to calculate
5096 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5098 struct ixgbe_hw *hw = &adapter->hw;
5099 struct net_device *dev = adapter->netdev;
5100 int link, tc, kb, marker;
5103 /* Calculate max LAN frame size */
5104 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5107 /* FCoE traffic class uses FCOE jumbo frames */
5108 if ((dev->features & NETIF_F_FCOE_MTU) &&
5109 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5110 (pb == ixgbe_fcoe_get_tc(adapter)))
5111 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5114 /* Calculate delay value for device */
5115 switch (hw->mac.type) {
5116 case ixgbe_mac_X540:
5117 case ixgbe_mac_X550:
5118 case ixgbe_mac_X550EM_x:
5119 case ixgbe_mac_x550em_a:
5120 dv_id = IXGBE_DV_X540(link, tc);
5123 dv_id = IXGBE_DV(link, tc);
5127 /* Loopback switch introduces additional latency */
5128 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5129 dv_id += IXGBE_B2BT(tc);
5131 /* Delay value is calculated in bit times convert to KB */
5132 kb = IXGBE_BT2KB(dv_id);
5133 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5135 marker = rx_pba - kb;
5137 /* It is possible that the packet buffer is not large enough
5138 * to provide required headroom. In this case throw an error
5139 * to user and a do the best we can.
5142 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5143 "headroom to support flow control."
5144 "Decrease MTU or number of traffic classes\n", pb);
5152 * ixgbe_lpbthresh - calculate low water mark for for flow control
5154 * @adapter: board private structure to calculate for
5155 * @pb: packet buffer to calculate
5157 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5159 struct ixgbe_hw *hw = &adapter->hw;
5160 struct net_device *dev = adapter->netdev;
5164 /* Calculate max LAN frame size */
5165 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5168 /* FCoE traffic class uses FCOE jumbo frames */
5169 if ((dev->features & NETIF_F_FCOE_MTU) &&
5170 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5171 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5172 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5175 /* Calculate delay value for device */
5176 switch (hw->mac.type) {
5177 case ixgbe_mac_X540:
5178 case ixgbe_mac_X550:
5179 case ixgbe_mac_X550EM_x:
5180 case ixgbe_mac_x550em_a:
5181 dv_id = IXGBE_LOW_DV_X540(tc);
5184 dv_id = IXGBE_LOW_DV(tc);
5188 /* Delay value is calculated in bit times convert to KB */
5189 return IXGBE_BT2KB(dv_id);
5193 * ixgbe_pbthresh_setup - calculate and setup high low water marks
5195 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5197 struct ixgbe_hw *hw = &adapter->hw;
5198 int num_tc = adapter->hw_tcs;
5204 for (i = 0; i < num_tc; i++) {
5205 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5206 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5208 /* Low water marks must not be larger than high water marks */
5209 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5210 hw->fc.low_water[i] = 0;
5213 for (; i < MAX_TRAFFIC_CLASS; i++)
5214 hw->fc.high_water[i] = 0;
5217 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5219 struct ixgbe_hw *hw = &adapter->hw;
5221 u8 tc = adapter->hw_tcs;
5223 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5224 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5225 hdrm = 32 << adapter->fdir_pballoc;
5229 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5230 ixgbe_pbthresh_setup(adapter);
5233 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5235 struct ixgbe_hw *hw = &adapter->hw;
5236 struct hlist_node *node2;
5237 struct ixgbe_fdir_filter *filter;
5240 spin_lock(&adapter->fdir_perfect_lock);
5242 if (!hlist_empty(&adapter->fdir_filter_list))
5243 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5245 hlist_for_each_entry_safe(filter, node2,
5246 &adapter->fdir_filter_list, fdir_node) {
5247 action = filter->action;
5248 if (action != IXGBE_FDIR_DROP_QUEUE && action != 0)
5250 (action >> ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF) - 1;
5252 ixgbe_fdir_write_perfect_filter_82599(hw,
5255 (action == IXGBE_FDIR_DROP_QUEUE) ?
5256 IXGBE_FDIR_DROP_QUEUE :
5257 adapter->rx_ring[action]->reg_idx);
5260 spin_unlock(&adapter->fdir_perfect_lock);
5264 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5265 * @rx_ring: ring to free buffers from
5267 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5269 u16 i = rx_ring->next_to_clean;
5270 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5272 if (rx_ring->xsk_umem) {
5273 ixgbe_xsk_clean_rx_ring(rx_ring);
5277 /* Free all the Rx ring sk_buffs */
5278 while (i != rx_ring->next_to_alloc) {
5279 if (rx_buffer->skb) {
5280 struct sk_buff *skb = rx_buffer->skb;
5281 if (IXGBE_CB(skb)->page_released)
5282 dma_unmap_page_attrs(rx_ring->dev,
5284 ixgbe_rx_pg_size(rx_ring),
5290 /* Invalidate cache lines that may have been written to by
5291 * device so that we avoid corrupting memory.
5293 dma_sync_single_range_for_cpu(rx_ring->dev,
5295 rx_buffer->page_offset,
5296 ixgbe_rx_bufsz(rx_ring),
5299 /* free resources associated with mapping */
5300 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5301 ixgbe_rx_pg_size(rx_ring),
5304 __page_frag_cache_drain(rx_buffer->page,
5305 rx_buffer->pagecnt_bias);
5309 if (i == rx_ring->count) {
5311 rx_buffer = rx_ring->rx_buffer_info;
5316 rx_ring->next_to_alloc = 0;
5317 rx_ring->next_to_clean = 0;
5318 rx_ring->next_to_use = 0;
5321 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5322 struct ixgbe_fwd_adapter *accel)
5324 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5325 int num_tc = netdev_get_num_tc(adapter->netdev);
5326 struct net_device *vdev = accel->netdev;
5329 baseq = accel->pool * adapter->num_rx_queues_per_pool;
5330 netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5331 accel->pool, adapter->num_rx_pools,
5332 baseq, baseq + adapter->num_rx_queues_per_pool);
5334 accel->rx_base_queue = baseq;
5335 accel->tx_base_queue = baseq;
5337 /* record configuration for macvlan interface in vdev */
5338 for (i = 0; i < num_tc; i++)
5339 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5340 i, rss_i, baseq + (rss_i * i));
5342 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5343 adapter->rx_ring[baseq + i]->netdev = vdev;
5345 /* Guarantee all rings are updated before we update the
5346 * MAC address filter.
5350 /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5351 * need to only treat it as an error value if it is negative.
5353 err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5354 VMDQ_P(accel->pool));
5358 /* if we cannot add the MAC rule then disable the offload */
5359 macvlan_release_l2fw_offload(vdev);
5361 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5362 adapter->rx_ring[baseq + i]->netdev = NULL;
5364 netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5366 /* unbind the queues and drop the subordinate channel config */
5367 netdev_unbind_sb_channel(adapter->netdev, vdev);
5368 netdev_set_sb_channel(vdev, 0);
5370 clear_bit(accel->pool, adapter->fwd_bitmask);
5376 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5378 struct ixgbe_adapter *adapter = data;
5379 struct ixgbe_fwd_adapter *accel;
5381 if (!netif_is_macvlan(vdev))
5384 accel = macvlan_accel_priv(vdev);
5388 ixgbe_fwd_ring_up(adapter, accel);
5393 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5395 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5396 ixgbe_macvlan_up, adapter);
5399 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5401 struct ixgbe_hw *hw = &adapter->hw;
5403 ixgbe_configure_pb(adapter);
5404 #ifdef CONFIG_IXGBE_DCB
5405 ixgbe_configure_dcb(adapter);
5408 * We must restore virtualization before VLANs or else
5409 * the VLVF registers will not be populated
5411 ixgbe_configure_virtualization(adapter);
5413 ixgbe_set_rx_mode(adapter->netdev);
5414 ixgbe_restore_vlan(adapter);
5415 ixgbe_ipsec_restore(adapter);
5417 switch (hw->mac.type) {
5418 case ixgbe_mac_82599EB:
5419 case ixgbe_mac_X540:
5420 hw->mac.ops.disable_rx_buff(hw);
5426 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5427 ixgbe_init_fdir_signature_82599(&adapter->hw,
5428 adapter->fdir_pballoc);
5429 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5430 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5431 adapter->fdir_pballoc);
5432 ixgbe_fdir_filter_restore(adapter);
5435 switch (hw->mac.type) {
5436 case ixgbe_mac_82599EB:
5437 case ixgbe_mac_X540:
5438 hw->mac.ops.enable_rx_buff(hw);
5444 #ifdef CONFIG_IXGBE_DCA
5446 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5447 ixgbe_setup_dca(adapter);
5448 #endif /* CONFIG_IXGBE_DCA */
5451 /* configure FCoE L2 filters, redirection table, and Rx control */
5452 ixgbe_configure_fcoe(adapter);
5454 #endif /* IXGBE_FCOE */
5455 ixgbe_configure_tx(adapter);
5456 ixgbe_configure_rx(adapter);
5457 ixgbe_configure_dfwd(adapter);
5461 * ixgbe_sfp_link_config - set up SFP+ link
5462 * @adapter: pointer to private adapter struct
5464 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5467 * We are assuming the worst case scenario here, and that
5468 * is that an SFP was inserted/removed after the reset
5469 * but before SFP detection was enabled. As such the best
5470 * solution is to just start searching as soon as we start
5472 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5473 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5475 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5476 adapter->sfp_poll_time = 0;
5480 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5481 * @hw: pointer to private hardware struct
5483 * Returns 0 on success, negative on failure
5485 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5488 bool autoneg, link_up = false;
5489 int ret = IXGBE_ERR_LINK_SETUP;
5491 if (hw->mac.ops.check_link)
5492 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5497 speed = hw->phy.autoneg_advertised;
5498 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5499 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5504 if (hw->mac.ops.setup_link)
5505 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5510 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5512 struct ixgbe_hw *hw = &adapter->hw;
5515 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5516 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5518 gpie |= IXGBE_GPIE_EIAME;
5520 * use EIAM to auto-mask when MSI-X interrupt is asserted
5521 * this saves a register write for every interrupt
5523 switch (hw->mac.type) {
5524 case ixgbe_mac_82598EB:
5525 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5527 case ixgbe_mac_82599EB:
5528 case ixgbe_mac_X540:
5529 case ixgbe_mac_X550:
5530 case ixgbe_mac_X550EM_x:
5531 case ixgbe_mac_x550em_a:
5533 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5534 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5538 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5539 * specifically only auto mask tx and rx interrupts */
5540 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5543 /* XXX: to interrupt immediately for EICS writes, enable this */
5544 /* gpie |= IXGBE_GPIE_EIMEN; */
5546 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5547 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5549 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5550 case IXGBE_82599_VMDQ_8Q_MASK:
5551 gpie |= IXGBE_GPIE_VTMODE_16;
5553 case IXGBE_82599_VMDQ_4Q_MASK:
5554 gpie |= IXGBE_GPIE_VTMODE_32;
5557 gpie |= IXGBE_GPIE_VTMODE_64;
5562 /* Enable Thermal over heat sensor interrupt */
5563 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5564 switch (adapter->hw.mac.type) {
5565 case ixgbe_mac_82599EB:
5566 gpie |= IXGBE_SDP0_GPIEN_8259X;
5573 /* Enable fan failure interrupt */
5574 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5575 gpie |= IXGBE_SDP1_GPIEN(hw);
5577 switch (hw->mac.type) {
5578 case ixgbe_mac_82599EB:
5579 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5581 case ixgbe_mac_X550EM_x:
5582 case ixgbe_mac_x550em_a:
5583 gpie |= IXGBE_SDP0_GPIEN_X540;
5589 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5592 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5594 struct ixgbe_hw *hw = &adapter->hw;
5598 ixgbe_get_hw_control(adapter);
5599 ixgbe_setup_gpie(adapter);
5601 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5602 ixgbe_configure_msix(adapter);
5604 ixgbe_configure_msi_and_legacy(adapter);
5606 /* enable the optics for 82599 SFP+ fiber */
5607 if (hw->mac.ops.enable_tx_laser)
5608 hw->mac.ops.enable_tx_laser(hw);
5610 if (hw->phy.ops.set_phy_power)
5611 hw->phy.ops.set_phy_power(hw, true);
5613 smp_mb__before_atomic();
5614 clear_bit(__IXGBE_DOWN, &adapter->state);
5615 ixgbe_napi_enable_all(adapter);
5617 if (ixgbe_is_sfp(hw)) {
5618 ixgbe_sfp_link_config(adapter);
5620 err = ixgbe_non_sfp_link_config(hw);
5622 e_err(probe, "link_config FAILED %d\n", err);
5625 /* clear any pending interrupts, may auto mask */
5626 IXGBE_READ_REG(hw, IXGBE_EICR);
5627 ixgbe_irq_enable(adapter, true, true);
5630 * If this adapter has a fan, check to see if we had a failure
5631 * before we enabled the interrupt.
5633 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5634 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5635 if (esdp & IXGBE_ESDP_SDP1)
5636 e_crit(drv, "Fan has stopped, replace the adapter\n");
5639 /* bring the link up in the watchdog, this could race with our first
5640 * link up interrupt but shouldn't be a problem */
5641 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5642 adapter->link_check_timeout = jiffies;
5643 mod_timer(&adapter->service_timer, jiffies);
5645 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5646 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5647 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5648 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5651 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5653 WARN_ON(in_interrupt());
5654 /* put off any impending NetWatchDogTimeout */
5655 netif_trans_update(adapter->netdev);
5657 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5658 usleep_range(1000, 2000);
5659 if (adapter->hw.phy.type == ixgbe_phy_fw)
5660 ixgbe_watchdog_link_is_down(adapter);
5661 ixgbe_down(adapter);
5663 * If SR-IOV enabled then wait a bit before bringing the adapter
5664 * back up to give the VFs time to respond to the reset. The
5665 * two second wait is based upon the watchdog timer cycle in
5668 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5671 clear_bit(__IXGBE_RESETTING, &adapter->state);
5674 void ixgbe_up(struct ixgbe_adapter *adapter)
5676 /* hardware has been reset, we need to reload some things */
5677 ixgbe_configure(adapter);
5679 ixgbe_up_complete(adapter);
5682 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5686 pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5688 switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5689 case IXGBE_PCIDEVCTRL2_17_34s:
5690 case IXGBE_PCIDEVCTRL2_4_8s:
5691 /* For now we cap the upper limit on delay to 2 seconds
5692 * as we end up going up to 34 seconds of delay in worst
5693 * case timeout value.
5695 case IXGBE_PCIDEVCTRL2_1_2s:
5696 return 2000000ul; /* 2.0 s */
5697 case IXGBE_PCIDEVCTRL2_260_520ms:
5698 return 520000ul; /* 520 ms */
5699 case IXGBE_PCIDEVCTRL2_65_130ms:
5700 return 130000ul; /* 130 ms */
5701 case IXGBE_PCIDEVCTRL2_16_32ms:
5702 return 32000ul; /* 32 ms */
5703 case IXGBE_PCIDEVCTRL2_1_2ms:
5704 return 2000ul; /* 2 ms */
5705 case IXGBE_PCIDEVCTRL2_50_100us:
5706 return 100ul; /* 100 us */
5707 case IXGBE_PCIDEVCTRL2_16_32ms_def:
5708 return 32000ul; /* 32 ms */
5713 /* We shouldn't need to hit this path, but just in case default as
5714 * though completion timeout is not supported and support 32ms.
5719 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5721 unsigned long wait_delay, delay_interval;
5722 struct ixgbe_hw *hw = &adapter->hw;
5726 /* disable receives */
5727 hw->mac.ops.disable_rx(hw);
5729 if (ixgbe_removed(hw->hw_addr))
5732 /* disable all enabled Rx queues */
5733 for (i = 0; i < adapter->num_rx_queues; i++) {
5734 struct ixgbe_ring *ring = adapter->rx_ring[i];
5735 u8 reg_idx = ring->reg_idx;
5737 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5738 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5739 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5741 /* write value back with RXDCTL.ENABLE bit cleared */
5742 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5745 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5746 if (hw->mac.type == ixgbe_mac_82598EB &&
5747 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5750 /* Determine our minimum delay interval. We will increase this value
5751 * with each subsequent test. This way if the device returns quickly
5752 * we should spend as little time as possible waiting, however as
5753 * the time increases we will wait for larger periods of time.
5755 * The trick here is that we increase the interval using the
5756 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5757 * of that wait is that it totals up to 100x whatever interval we
5758 * choose. Since our minimum wait is 100us we can just divide the
5759 * total timeout by 100 to get our minimum delay interval.
5761 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5763 wait_loop = IXGBE_MAX_RX_DESC_POLL;
5764 wait_delay = delay_interval;
5766 while (wait_loop--) {
5767 usleep_range(wait_delay, wait_delay + 10);
5768 wait_delay += delay_interval * 2;
5771 /* OR together the reading of all the active RXDCTL registers,
5772 * and then test the result. We need the disable to complete
5773 * before we start freeing the memory and invalidating the
5776 for (i = 0; i < adapter->num_rx_queues; i++) {
5777 struct ixgbe_ring *ring = adapter->rx_ring[i];
5778 u8 reg_idx = ring->reg_idx;
5780 rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5783 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5788 "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5791 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5793 unsigned long wait_delay, delay_interval;
5794 struct ixgbe_hw *hw = &adapter->hw;
5798 if (ixgbe_removed(hw->hw_addr))
5801 /* disable all enabled Tx queues */
5802 for (i = 0; i < adapter->num_tx_queues; i++) {
5803 struct ixgbe_ring *ring = adapter->tx_ring[i];
5804 u8 reg_idx = ring->reg_idx;
5806 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5809 /* disable all enabled XDP Tx queues */
5810 for (i = 0; i < adapter->num_xdp_queues; i++) {
5811 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5812 u8 reg_idx = ring->reg_idx;
5814 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5817 /* If the link is not up there shouldn't be much in the way of
5818 * pending transactions. Those that are left will be flushed out
5819 * when the reset logic goes through the flush sequence to clean out
5820 * the pending Tx transactions.
5822 if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5823 goto dma_engine_disable;
5825 /* Determine our minimum delay interval. We will increase this value
5826 * with each subsequent test. This way if the device returns quickly
5827 * we should spend as little time as possible waiting, however as
5828 * the time increases we will wait for larger periods of time.
5830 * The trick here is that we increase the interval using the
5831 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5832 * of that wait is that it totals up to 100x whatever interval we
5833 * choose. Since our minimum wait is 100us we can just divide the
5834 * total timeout by 100 to get our minimum delay interval.
5836 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5838 wait_loop = IXGBE_MAX_RX_DESC_POLL;
5839 wait_delay = delay_interval;
5841 while (wait_loop--) {
5842 usleep_range(wait_delay, wait_delay + 10);
5843 wait_delay += delay_interval * 2;
5846 /* OR together the reading of all the active TXDCTL registers,
5847 * and then test the result. We need the disable to complete
5848 * before we start freeing the memory and invalidating the
5851 for (i = 0; i < adapter->num_tx_queues; i++) {
5852 struct ixgbe_ring *ring = adapter->tx_ring[i];
5853 u8 reg_idx = ring->reg_idx;
5855 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5857 for (i = 0; i < adapter->num_xdp_queues; i++) {
5858 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5859 u8 reg_idx = ring->reg_idx;
5861 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5864 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5865 goto dma_engine_disable;
5869 "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5872 /* Disable the Tx DMA engine on 82599 and later MAC */
5873 switch (hw->mac.type) {
5874 case ixgbe_mac_82599EB:
5875 case ixgbe_mac_X540:
5876 case ixgbe_mac_X550:
5877 case ixgbe_mac_X550EM_x:
5878 case ixgbe_mac_x550em_a:
5879 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5880 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5881 ~IXGBE_DMATXCTL_TE));
5888 void ixgbe_reset(struct ixgbe_adapter *adapter)
5890 struct ixgbe_hw *hw = &adapter->hw;
5891 struct net_device *netdev = adapter->netdev;
5894 if (ixgbe_removed(hw->hw_addr))
5896 /* lock SFP init bit to prevent race conditions with the watchdog */
5897 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5898 usleep_range(1000, 2000);
5900 /* clear all SFP and link config related flags while holding SFP_INIT */
5901 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5902 IXGBE_FLAG2_SFP_NEEDS_RESET);
5903 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5905 err = hw->mac.ops.init_hw(hw);
5908 case IXGBE_ERR_SFP_NOT_PRESENT:
5909 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5911 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5912 e_dev_err("master disable timed out\n");
5914 case IXGBE_ERR_EEPROM_VERSION:
5915 /* We are running on a pre-production device, log a warning */
5916 e_dev_warn("This device is a pre-production adapter/LOM. "
5917 "Please be aware there may be issues associated with "
5918 "your hardware. If you are experiencing problems "
5919 "please contact your Intel or hardware "
5920 "representative who provided you with this "
5924 e_dev_err("Hardware Error: %d\n", err);
5927 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5929 /* flush entries out of MAC table */
5930 ixgbe_flush_sw_mac_table(adapter);
5931 __dev_uc_unsync(netdev, NULL);
5933 /* do not flush user set addresses */
5934 ixgbe_mac_set_default_filter(adapter);
5936 /* update SAN MAC vmdq pool selection */
5937 if (hw->mac.san_mac_rar_index)
5938 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5940 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5941 ixgbe_ptp_reset(adapter);
5943 if (hw->phy.ops.set_phy_power) {
5944 if (!netif_running(adapter->netdev) && !adapter->wol)
5945 hw->phy.ops.set_phy_power(hw, false);
5947 hw->phy.ops.set_phy_power(hw, true);
5952 * ixgbe_clean_tx_ring - Free Tx Buffers
5953 * @tx_ring: ring to be cleaned
5955 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5957 u16 i = tx_ring->next_to_clean;
5958 struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5960 if (tx_ring->xsk_umem) {
5961 ixgbe_xsk_clean_tx_ring(tx_ring);
5965 while (i != tx_ring->next_to_use) {
5966 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5968 /* Free all the Tx ring sk_buffs */
5969 if (ring_is_xdp(tx_ring))
5970 xdp_return_frame(tx_buffer->xdpf);
5972 dev_kfree_skb_any(tx_buffer->skb);
5974 /* unmap skb header data */
5975 dma_unmap_single(tx_ring->dev,
5976 dma_unmap_addr(tx_buffer, dma),
5977 dma_unmap_len(tx_buffer, len),
5980 /* check for eop_desc to determine the end of the packet */
5981 eop_desc = tx_buffer->next_to_watch;
5982 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5984 /* unmap remaining buffers */
5985 while (tx_desc != eop_desc) {
5989 if (unlikely(i == tx_ring->count)) {
5991 tx_buffer = tx_ring->tx_buffer_info;
5992 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5995 /* unmap any remaining paged data */
5996 if (dma_unmap_len(tx_buffer, len))
5997 dma_unmap_page(tx_ring->dev,
5998 dma_unmap_addr(tx_buffer, dma),
5999 dma_unmap_len(tx_buffer, len),
6003 /* move us one more past the eop_desc for start of next pkt */
6006 if (unlikely(i == tx_ring->count)) {
6008 tx_buffer = tx_ring->tx_buffer_info;
6012 /* reset BQL for queue */
6013 if (!ring_is_xdp(tx_ring))
6014 netdev_tx_reset_queue(txring_txq(tx_ring));
6017 /* reset next_to_use and next_to_clean */
6018 tx_ring->next_to_use = 0;
6019 tx_ring->next_to_clean = 0;
6023 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6024 * @adapter: board private structure
6026 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6030 for (i = 0; i < adapter->num_rx_queues; i++)
6031 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6035 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6036 * @adapter: board private structure
6038 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6042 for (i = 0; i < adapter->num_tx_queues; i++)
6043 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6044 for (i = 0; i < adapter->num_xdp_queues; i++)
6045 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6048 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6050 struct hlist_node *node2;
6051 struct ixgbe_fdir_filter *filter;
6053 spin_lock(&adapter->fdir_perfect_lock);
6055 hlist_for_each_entry_safe(filter, node2,
6056 &adapter->fdir_filter_list, fdir_node) {
6057 hlist_del(&filter->fdir_node);
6060 adapter->fdir_filter_count = 0;
6062 spin_unlock(&adapter->fdir_perfect_lock);
6065 void ixgbe_down(struct ixgbe_adapter *adapter)
6067 struct net_device *netdev = adapter->netdev;
6068 struct ixgbe_hw *hw = &adapter->hw;
6071 /* signal that we are down to the interrupt handler */
6072 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6073 return; /* do nothing if already down */
6075 /* Shut off incoming Tx traffic */
6076 netif_tx_stop_all_queues(netdev);
6078 /* call carrier off first to avoid false dev_watchdog timeouts */
6079 netif_carrier_off(netdev);
6080 netif_tx_disable(netdev);
6083 ixgbe_disable_rx(adapter);
6085 /* synchronize_rcu() needed for pending XDP buffers to drain */
6086 if (adapter->xdp_ring[0])
6089 ixgbe_irq_disable(adapter);
6091 ixgbe_napi_disable_all(adapter);
6093 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6094 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6095 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6097 del_timer_sync(&adapter->service_timer);
6099 if (adapter->num_vfs) {
6100 /* Clear EITR Select mapping */
6101 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6103 /* Mark all the VFs as inactive */
6104 for (i = 0 ; i < adapter->num_vfs; i++)
6105 adapter->vfinfo[i].clear_to_send = false;
6107 /* ping all the active vfs to let them know we are going down */
6108 ixgbe_ping_all_vfs(adapter);
6110 /* Disable all VFTE/VFRE TX/RX */
6111 ixgbe_disable_tx_rx(adapter);
6114 /* disable transmits in the hardware now that interrupts are off */
6115 ixgbe_disable_tx(adapter);
6117 if (!pci_channel_offline(adapter->pdev))
6118 ixgbe_reset(adapter);
6120 /* power down the optics for 82599 SFP+ fiber */
6121 if (hw->mac.ops.disable_tx_laser)
6122 hw->mac.ops.disable_tx_laser(hw);
6124 ixgbe_clean_all_tx_rings(adapter);
6125 ixgbe_clean_all_rx_rings(adapter);
6129 * ixgbe_eee_capable - helper function to determine EEE support on X550
6130 * @adapter: board private structure
6132 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6134 struct ixgbe_hw *hw = &adapter->hw;
6136 switch (hw->device_id) {
6137 case IXGBE_DEV_ID_X550EM_A_1G_T:
6138 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6139 if (!hw->phy.eee_speeds_supported)
6141 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6142 if (!hw->phy.eee_speeds_advertised)
6144 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6147 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6148 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6154 * ixgbe_tx_timeout - Respond to a Tx Hang
6155 * @netdev: network interface device structure
6157 static void ixgbe_tx_timeout(struct net_device *netdev)
6159 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6161 /* Do the reset outside of interrupt context */
6162 ixgbe_tx_timeout_reset(adapter);
6165 #ifdef CONFIG_IXGBE_DCB
6166 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6168 struct ixgbe_hw *hw = &adapter->hw;
6169 struct tc_configuration *tc;
6172 switch (hw->mac.type) {
6173 case ixgbe_mac_82598EB:
6174 case ixgbe_mac_82599EB:
6175 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6176 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6178 case ixgbe_mac_X540:
6179 case ixgbe_mac_X550:
6180 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6181 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6183 case ixgbe_mac_X550EM_x:
6184 case ixgbe_mac_x550em_a:
6186 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6187 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6191 /* Configure DCB traffic classes */
6192 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6193 tc = &adapter->dcb_cfg.tc_config[j];
6194 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6195 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6196 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6197 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6198 tc->dcb_pfc = pfc_disabled;
6201 /* Initialize default user to priority mapping, UPx->TC0 */
6202 tc = &adapter->dcb_cfg.tc_config[0];
6203 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6204 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6206 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6207 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6208 adapter->dcb_cfg.pfc_mode_enable = false;
6209 adapter->dcb_set_bitmap = 0x00;
6210 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6211 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6212 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6213 sizeof(adapter->temp_dcb_cfg));
6218 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6219 * @adapter: board private structure to initialize
6220 * @ii: pointer to ixgbe_info for device
6222 * ixgbe_sw_init initializes the Adapter private data structure.
6223 * Fields are initialized based on PCI device information and
6224 * OS network device settings (MTU size).
6226 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6227 const struct ixgbe_info *ii)
6229 struct ixgbe_hw *hw = &adapter->hw;
6230 struct pci_dev *pdev = adapter->pdev;
6231 unsigned int rss, fdir;
6235 /* PCI config space info */
6237 hw->vendor_id = pdev->vendor;
6238 hw->device_id = pdev->device;
6239 hw->revision_id = pdev->revision;
6240 hw->subsystem_vendor_id = pdev->subsystem_vendor;
6241 hw->subsystem_device_id = pdev->subsystem_device;
6243 /* get_invariants needs the device IDs */
6244 ii->get_invariants(hw);
6246 /* Set common capability flags and settings */
6247 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6248 adapter->ring_feature[RING_F_RSS].limit = rss;
6249 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6250 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6251 adapter->atr_sample_rate = 20;
6252 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6253 adapter->ring_feature[RING_F_FDIR].limit = fdir;
6254 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6255 adapter->ring_feature[RING_F_VMDQ].limit = 1;
6256 #ifdef CONFIG_IXGBE_DCA
6257 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6259 #ifdef CONFIG_IXGBE_DCB
6260 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6261 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6264 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6265 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6266 #ifdef CONFIG_IXGBE_DCB
6267 /* Default traffic class to use for FCoE */
6268 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6269 #endif /* CONFIG_IXGBE_DCB */
6270 #endif /* IXGBE_FCOE */
6272 /* initialize static ixgbe jump table entries */
6273 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6275 if (!adapter->jump_tables[0])
6277 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6279 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6280 adapter->jump_tables[i] = NULL;
6282 adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6283 sizeof(struct ixgbe_mac_addr),
6285 if (!adapter->mac_table)
6288 if (ixgbe_init_rss_key(adapter))
6291 adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6292 if (!adapter->af_xdp_zc_qps)
6295 /* Set MAC specific capability flags and exceptions */
6296 switch (hw->mac.type) {
6297 case ixgbe_mac_82598EB:
6298 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6300 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6301 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6303 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6304 adapter->ring_feature[RING_F_FDIR].limit = 0;
6305 adapter->atr_sample_rate = 0;
6306 adapter->fdir_pballoc = 0;
6308 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6309 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6310 #ifdef CONFIG_IXGBE_DCB
6311 adapter->fcoe.up = 0;
6312 #endif /* IXGBE_DCB */
6313 #endif /* IXGBE_FCOE */
6315 case ixgbe_mac_82599EB:
6316 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6317 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6319 case ixgbe_mac_X540:
6320 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6321 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6322 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6324 case ixgbe_mac_x550em_a:
6325 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6326 switch (hw->device_id) {
6327 case IXGBE_DEV_ID_X550EM_A_1G_T:
6328 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6329 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6335 case ixgbe_mac_X550EM_x:
6336 #ifdef CONFIG_IXGBE_DCB
6337 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6340 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6341 #ifdef CONFIG_IXGBE_DCB
6342 adapter->fcoe.up = 0;
6343 #endif /* IXGBE_DCB */
6344 #endif /* IXGBE_FCOE */
6346 case ixgbe_mac_X550:
6347 if (hw->mac.type == ixgbe_mac_X550)
6348 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6349 #ifdef CONFIG_IXGBE_DCA
6350 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6352 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6359 /* FCoE support exists, always init the FCoE lock */
6360 spin_lock_init(&adapter->fcoe.lock);
6363 /* n-tuple support exists, always init our spinlock */
6364 spin_lock_init(&adapter->fdir_perfect_lock);
6366 #ifdef CONFIG_IXGBE_DCB
6367 ixgbe_init_dcb(adapter);
6369 ixgbe_init_ipsec_offload(adapter);
6371 /* default flow control settings */
6372 hw->fc.requested_mode = ixgbe_fc_full;
6373 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
6374 ixgbe_pbthresh_setup(adapter);
6375 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6376 hw->fc.send_xon = true;
6377 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6379 #ifdef CONFIG_PCI_IOV
6381 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6383 /* assign number of SR-IOV VFs */
6384 if (hw->mac.type != ixgbe_mac_82598EB) {
6385 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6387 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6390 #endif /* CONFIG_PCI_IOV */
6392 /* enable itr by default in dynamic mode */
6393 adapter->rx_itr_setting = 1;
6394 adapter->tx_itr_setting = 1;
6396 /* set default ring sizes */
6397 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6398 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6400 /* set default work limits */
6401 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6403 /* initialize eeprom parameters */
6404 if (ixgbe_init_eeprom_params_generic(hw)) {
6405 e_dev_err("EEPROM initialization failed\n");
6409 /* PF holds first pool slot */
6410 set_bit(0, adapter->fwd_bitmask);
6411 set_bit(__IXGBE_DOWN, &adapter->state);
6417 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6418 * @tx_ring: tx descriptor ring (for a specific queue) to setup
6420 * Return 0 on success, negative on failure
6422 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6424 struct device *dev = tx_ring->dev;
6425 int orig_node = dev_to_node(dev);
6426 int ring_node = NUMA_NO_NODE;
6429 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6431 if (tx_ring->q_vector)
6432 ring_node = tx_ring->q_vector->numa_node;
6434 tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6435 if (!tx_ring->tx_buffer_info)
6436 tx_ring->tx_buffer_info = vmalloc(size);
6437 if (!tx_ring->tx_buffer_info)
6440 /* round up to nearest 4K */
6441 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6442 tx_ring->size = ALIGN(tx_ring->size, 4096);
6444 set_dev_node(dev, ring_node);
6445 tx_ring->desc = dma_alloc_coherent(dev,
6449 set_dev_node(dev, orig_node);
6451 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6452 &tx_ring->dma, GFP_KERNEL);
6456 tx_ring->next_to_use = 0;
6457 tx_ring->next_to_clean = 0;
6461 vfree(tx_ring->tx_buffer_info);
6462 tx_ring->tx_buffer_info = NULL;
6463 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6468 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6469 * @adapter: board private structure
6471 * If this function returns with an error, then it's possible one or
6472 * more of the rings is populated (while the rest are not). It is the
6473 * callers duty to clean those orphaned rings.
6475 * Return 0 on success, negative on failure
6477 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6479 int i, j = 0, err = 0;
6481 for (i = 0; i < adapter->num_tx_queues; i++) {
6482 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6486 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6489 for (j = 0; j < adapter->num_xdp_queues; j++) {
6490 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6494 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6500 /* rewind the index freeing the rings as we go */
6502 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6504 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6509 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6510 * @adapter: pointer to ixgbe_adapter
6511 * @rx_ring: rx descriptor ring (for a specific queue) to setup
6513 * Returns 0 on success, negative on failure
6515 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6516 struct ixgbe_ring *rx_ring)
6518 struct device *dev = rx_ring->dev;
6519 int orig_node = dev_to_node(dev);
6520 int ring_node = NUMA_NO_NODE;
6523 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6525 if (rx_ring->q_vector)
6526 ring_node = rx_ring->q_vector->numa_node;
6528 rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6529 if (!rx_ring->rx_buffer_info)
6530 rx_ring->rx_buffer_info = vmalloc(size);
6531 if (!rx_ring->rx_buffer_info)
6534 /* Round up to nearest 4K */
6535 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6536 rx_ring->size = ALIGN(rx_ring->size, 4096);
6538 set_dev_node(dev, ring_node);
6539 rx_ring->desc = dma_alloc_coherent(dev,
6543 set_dev_node(dev, orig_node);
6545 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6546 &rx_ring->dma, GFP_KERNEL);
6550 rx_ring->next_to_clean = 0;
6551 rx_ring->next_to_use = 0;
6553 /* XDP RX-queue info */
6554 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6555 rx_ring->queue_index) < 0)
6558 rx_ring->xdp_prog = adapter->xdp_prog;
6562 vfree(rx_ring->rx_buffer_info);
6563 rx_ring->rx_buffer_info = NULL;
6564 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6569 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6570 * @adapter: board private structure
6572 * If this function returns with an error, then it's possible one or
6573 * more of the rings is populated (while the rest are not). It is the
6574 * callers duty to clean those orphaned rings.
6576 * Return 0 on success, negative on failure
6578 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6582 for (i = 0; i < adapter->num_rx_queues; i++) {
6583 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6587 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6592 err = ixgbe_setup_fcoe_ddp_resources(adapter);
6597 /* rewind the index freeing the rings as we go */
6599 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6604 * ixgbe_free_tx_resources - Free Tx Resources per Queue
6605 * @tx_ring: Tx descriptor ring for a specific queue
6607 * Free all transmit software resources
6609 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6611 ixgbe_clean_tx_ring(tx_ring);
6613 vfree(tx_ring->tx_buffer_info);
6614 tx_ring->tx_buffer_info = NULL;
6616 /* if not set, then don't free */
6620 dma_free_coherent(tx_ring->dev, tx_ring->size,
6621 tx_ring->desc, tx_ring->dma);
6623 tx_ring->desc = NULL;
6627 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6628 * @adapter: board private structure
6630 * Free all transmit software resources
6632 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6636 for (i = 0; i < adapter->num_tx_queues; i++)
6637 if (adapter->tx_ring[i]->desc)
6638 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6639 for (i = 0; i < adapter->num_xdp_queues; i++)
6640 if (adapter->xdp_ring[i]->desc)
6641 ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6645 * ixgbe_free_rx_resources - Free Rx Resources
6646 * @rx_ring: ring to clean the resources from
6648 * Free all receive software resources
6650 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6652 ixgbe_clean_rx_ring(rx_ring);
6654 rx_ring->xdp_prog = NULL;
6655 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6656 vfree(rx_ring->rx_buffer_info);
6657 rx_ring->rx_buffer_info = NULL;
6659 /* if not set, then don't free */
6663 dma_free_coherent(rx_ring->dev, rx_ring->size,
6664 rx_ring->desc, rx_ring->dma);
6666 rx_ring->desc = NULL;
6670 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6671 * @adapter: board private structure
6673 * Free all receive software resources
6675 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6680 ixgbe_free_fcoe_ddp_resources(adapter);
6683 for (i = 0; i < adapter->num_rx_queues; i++)
6684 if (adapter->rx_ring[i]->desc)
6685 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6689 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6690 * @netdev: network interface device structure
6691 * @new_mtu: new value for maximum frame size
6693 * Returns 0 on success, negative on failure
6695 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6697 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6699 if (adapter->xdp_prog) {
6700 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6704 for (i = 0; i < adapter->num_rx_queues; i++) {
6705 struct ixgbe_ring *ring = adapter->rx_ring[i];
6707 if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6708 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6715 * For 82599EB we cannot allow legacy VFs to enable their receive
6716 * paths when MTU greater than 1500 is configured. So display a
6717 * warning that legacy VFs will be disabled.
6719 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6720 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6721 (new_mtu > ETH_DATA_LEN))
6722 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6724 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6726 /* must set new MTU before calling down or up */
6727 netdev->mtu = new_mtu;
6729 if (netif_running(netdev))
6730 ixgbe_reinit_locked(adapter);
6736 * ixgbe_open - Called when a network interface is made active
6737 * @netdev: network interface device structure
6739 * Returns 0 on success, negative value on failure
6741 * The open entry point is called when a network interface is made
6742 * active by the system (IFF_UP). At this point all resources needed
6743 * for transmit and receive operations are allocated, the interrupt
6744 * handler is registered with the OS, the watchdog timer is started,
6745 * and the stack is notified that the interface is ready.
6747 int ixgbe_open(struct net_device *netdev)
6749 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6750 struct ixgbe_hw *hw = &adapter->hw;
6753 /* disallow open during test */
6754 if (test_bit(__IXGBE_TESTING, &adapter->state))
6757 netif_carrier_off(netdev);
6759 /* allocate transmit descriptors */
6760 err = ixgbe_setup_all_tx_resources(adapter);
6764 /* allocate receive descriptors */
6765 err = ixgbe_setup_all_rx_resources(adapter);
6769 ixgbe_configure(adapter);
6771 err = ixgbe_request_irq(adapter);
6775 /* Notify the stack of the actual queue counts. */
6776 queues = adapter->num_tx_queues;
6777 err = netif_set_real_num_tx_queues(netdev, queues);
6779 goto err_set_queues;
6781 queues = adapter->num_rx_queues;
6782 err = netif_set_real_num_rx_queues(netdev, queues);
6784 goto err_set_queues;
6786 ixgbe_ptp_init(adapter);
6788 ixgbe_up_complete(adapter);
6790 ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6791 udp_tunnel_get_rx_info(netdev);
6796 ixgbe_free_irq(adapter);
6798 ixgbe_free_all_rx_resources(adapter);
6799 if (hw->phy.ops.set_phy_power && !adapter->wol)
6800 hw->phy.ops.set_phy_power(&adapter->hw, false);
6802 ixgbe_free_all_tx_resources(adapter);
6804 ixgbe_reset(adapter);
6809 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6811 ixgbe_ptp_suspend(adapter);
6813 if (adapter->hw.phy.ops.enter_lplu) {
6814 adapter->hw.phy.reset_disable = true;
6815 ixgbe_down(adapter);
6816 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6817 adapter->hw.phy.reset_disable = false;
6819 ixgbe_down(adapter);
6822 ixgbe_free_irq(adapter);
6824 ixgbe_free_all_tx_resources(adapter);
6825 ixgbe_free_all_rx_resources(adapter);
6829 * ixgbe_close - Disables a network interface
6830 * @netdev: network interface device structure
6832 * Returns 0, this is not allowed to fail
6834 * The close entry point is called when an interface is de-activated
6835 * by the OS. The hardware is still under the drivers control, but
6836 * needs to be disabled. A global MAC reset is issued to stop the
6837 * hardware, and all transmit and receive resources are freed.
6839 int ixgbe_close(struct net_device *netdev)
6841 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6843 ixgbe_ptp_stop(adapter);
6845 if (netif_device_present(netdev))
6846 ixgbe_close_suspend(adapter);
6848 ixgbe_fdir_filter_exit(adapter);
6850 ixgbe_release_hw_control(adapter);
6856 static int ixgbe_resume(struct pci_dev *pdev)
6858 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6859 struct net_device *netdev = adapter->netdev;
6862 adapter->hw.hw_addr = adapter->io_addr;
6863 pci_set_power_state(pdev, PCI_D0);
6864 pci_restore_state(pdev);
6866 * pci_restore_state clears dev->state_saved so call
6867 * pci_save_state to restore it.
6869 pci_save_state(pdev);
6871 err = pci_enable_device_mem(pdev);
6873 e_dev_err("Cannot enable PCI device from suspend\n");
6876 smp_mb__before_atomic();
6877 clear_bit(__IXGBE_DISABLED, &adapter->state);
6878 pci_set_master(pdev);
6880 pci_wake_from_d3(pdev, false);
6882 ixgbe_reset(adapter);
6884 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6887 err = ixgbe_init_interrupt_scheme(adapter);
6888 if (!err && netif_running(netdev))
6889 err = ixgbe_open(netdev);
6893 netif_device_attach(netdev);
6898 #endif /* CONFIG_PM */
6900 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6902 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6903 struct net_device *netdev = adapter->netdev;
6904 struct ixgbe_hw *hw = &adapter->hw;
6906 u32 wufc = adapter->wol;
6912 netif_device_detach(netdev);
6914 if (netif_running(netdev))
6915 ixgbe_close_suspend(adapter);
6917 ixgbe_clear_interrupt_scheme(adapter);
6921 retval = pci_save_state(pdev);
6926 if (hw->mac.ops.stop_link_on_d3)
6927 hw->mac.ops.stop_link_on_d3(hw);
6932 ixgbe_set_rx_mode(netdev);
6934 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6935 if (hw->mac.ops.enable_tx_laser)
6936 hw->mac.ops.enable_tx_laser(hw);
6938 /* enable the reception of multicast packets */
6939 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6940 fctrl |= IXGBE_FCTRL_MPE;
6941 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6943 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6944 ctrl |= IXGBE_CTRL_GIO_DIS;
6945 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6947 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6949 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6950 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6953 switch (hw->mac.type) {
6954 case ixgbe_mac_82598EB:
6955 pci_wake_from_d3(pdev, false);
6957 case ixgbe_mac_82599EB:
6958 case ixgbe_mac_X540:
6959 case ixgbe_mac_X550:
6960 case ixgbe_mac_X550EM_x:
6961 case ixgbe_mac_x550em_a:
6962 pci_wake_from_d3(pdev, !!wufc);
6968 *enable_wake = !!wufc;
6969 if (hw->phy.ops.set_phy_power && !*enable_wake)
6970 hw->phy.ops.set_phy_power(hw, false);
6972 ixgbe_release_hw_control(adapter);
6974 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6975 pci_disable_device(pdev);
6981 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6986 retval = __ixgbe_shutdown(pdev, &wake);
6991 pci_prepare_to_sleep(pdev);
6993 pci_wake_from_d3(pdev, false);
6994 pci_set_power_state(pdev, PCI_D3hot);
6999 #endif /* CONFIG_PM */
7001 static void ixgbe_shutdown(struct pci_dev *pdev)
7005 __ixgbe_shutdown(pdev, &wake);
7007 if (system_state == SYSTEM_POWER_OFF) {
7008 pci_wake_from_d3(pdev, wake);
7009 pci_set_power_state(pdev, PCI_D3hot);
7014 * ixgbe_update_stats - Update the board statistics counters.
7015 * @adapter: board private structure
7017 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7019 struct net_device *netdev = adapter->netdev;
7020 struct ixgbe_hw *hw = &adapter->hw;
7021 struct ixgbe_hw_stats *hwstats = &adapter->stats;
7023 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7024 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7025 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7026 u64 alloc_rx_page = 0;
7027 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7029 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7030 test_bit(__IXGBE_RESETTING, &adapter->state))
7033 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7036 for (i = 0; i < adapter->num_rx_queues; i++) {
7037 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7038 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7040 adapter->rsc_total_count = rsc_count;
7041 adapter->rsc_total_flush = rsc_flush;
7044 for (i = 0; i < adapter->num_rx_queues; i++) {
7045 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
7046 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7047 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7048 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7049 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7050 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7051 bytes += rx_ring->stats.bytes;
7052 packets += rx_ring->stats.packets;
7054 adapter->non_eop_descs = non_eop_descs;
7055 adapter->alloc_rx_page = alloc_rx_page;
7056 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7057 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7058 adapter->hw_csum_rx_error = hw_csum_rx_error;
7059 netdev->stats.rx_bytes = bytes;
7060 netdev->stats.rx_packets = packets;
7064 /* gather some stats to the adapter struct that are per queue */
7065 for (i = 0; i < adapter->num_tx_queues; i++) {
7066 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7067 restart_queue += tx_ring->tx_stats.restart_queue;
7068 tx_busy += tx_ring->tx_stats.tx_busy;
7069 bytes += tx_ring->stats.bytes;
7070 packets += tx_ring->stats.packets;
7072 for (i = 0; i < adapter->num_xdp_queues; i++) {
7073 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
7075 restart_queue += xdp_ring->tx_stats.restart_queue;
7076 tx_busy += xdp_ring->tx_stats.tx_busy;
7077 bytes += xdp_ring->stats.bytes;
7078 packets += xdp_ring->stats.packets;
7080 adapter->restart_queue = restart_queue;
7081 adapter->tx_busy = tx_busy;
7082 netdev->stats.tx_bytes = bytes;
7083 netdev->stats.tx_packets = packets;
7085 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7087 /* 8 register reads */
7088 for (i = 0; i < 8; i++) {
7089 /* for packet buffers not used, the register should read 0 */
7090 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7092 hwstats->mpc[i] += mpc;
7093 total_mpc += hwstats->mpc[i];
7094 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7095 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7096 switch (hw->mac.type) {
7097 case ixgbe_mac_82598EB:
7098 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7099 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7100 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7101 hwstats->pxonrxc[i] +=
7102 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7104 case ixgbe_mac_82599EB:
7105 case ixgbe_mac_X540:
7106 case ixgbe_mac_X550:
7107 case ixgbe_mac_X550EM_x:
7108 case ixgbe_mac_x550em_a:
7109 hwstats->pxonrxc[i] +=
7110 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7117 /*16 register reads */
7118 for (i = 0; i < 16; i++) {
7119 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7120 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7121 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7122 (hw->mac.type == ixgbe_mac_X540) ||
7123 (hw->mac.type == ixgbe_mac_X550) ||
7124 (hw->mac.type == ixgbe_mac_X550EM_x) ||
7125 (hw->mac.type == ixgbe_mac_x550em_a)) {
7126 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7127 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7128 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7129 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7133 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7134 /* work around hardware counting issue */
7135 hwstats->gprc -= missed_rx;
7137 ixgbe_update_xoff_received(adapter);
7139 /* 82598 hardware only has a 32 bit counter in the high register */
7140 switch (hw->mac.type) {
7141 case ixgbe_mac_82598EB:
7142 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7143 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7144 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7145 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7147 case ixgbe_mac_X540:
7148 case ixgbe_mac_X550:
7149 case ixgbe_mac_X550EM_x:
7150 case ixgbe_mac_x550em_a:
7151 /* OS2BMC stats are X540 and later */
7152 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7153 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7154 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7155 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7157 case ixgbe_mac_82599EB:
7158 for (i = 0; i < 16; i++)
7159 adapter->hw_rx_no_dma_resources +=
7160 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7161 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7162 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7163 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7164 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7165 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7166 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7167 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7168 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7169 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7171 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7172 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7173 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7174 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7175 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7176 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7177 /* Add up per cpu counters for total ddp aloc fail */
7178 if (adapter->fcoe.ddp_pool) {
7179 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7180 struct ixgbe_fcoe_ddp_pool *ddp_pool;
7182 u64 noddp = 0, noddp_ext_buff = 0;
7183 for_each_possible_cpu(cpu) {
7184 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7185 noddp += ddp_pool->noddp;
7186 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7188 hwstats->fcoe_noddp = noddp;
7189 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7191 #endif /* IXGBE_FCOE */
7196 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7197 hwstats->bprc += bprc;
7198 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7199 if (hw->mac.type == ixgbe_mac_82598EB)
7200 hwstats->mprc -= bprc;
7201 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7202 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7203 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7204 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7205 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7206 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7207 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7208 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7209 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7210 hwstats->lxontxc += lxon;
7211 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7212 hwstats->lxofftxc += lxoff;
7213 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7214 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7216 * 82598 errata - tx of flow control packets is included in tx counters
7218 xon_off_tot = lxon + lxoff;
7219 hwstats->gptc -= xon_off_tot;
7220 hwstats->mptc -= xon_off_tot;
7221 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7222 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7223 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7224 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7225 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7226 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7227 hwstats->ptc64 -= xon_off_tot;
7228 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7229 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7230 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7231 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7232 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7233 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7235 /* Fill out the OS statistics structure */
7236 netdev->stats.multicast = hwstats->mprc;
7239 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7240 netdev->stats.rx_dropped = 0;
7241 netdev->stats.rx_length_errors = hwstats->rlec;
7242 netdev->stats.rx_crc_errors = hwstats->crcerrs;
7243 netdev->stats.rx_missed_errors = total_mpc;
7247 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7248 * @adapter: pointer to the device adapter structure
7250 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7252 struct ixgbe_hw *hw = &adapter->hw;
7255 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7258 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7260 /* if interface is down do nothing */
7261 if (test_bit(__IXGBE_DOWN, &adapter->state))
7264 /* do nothing if we are not using signature filters */
7265 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7268 adapter->fdir_overflow++;
7270 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7271 for (i = 0; i < adapter->num_tx_queues; i++)
7272 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7273 &(adapter->tx_ring[i]->state));
7274 for (i = 0; i < adapter->num_xdp_queues; i++)
7275 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7276 &adapter->xdp_ring[i]->state);
7277 /* re-enable flow director interrupts */
7278 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7280 e_err(probe, "failed to finish FDIR re-initialization, "
7281 "ignored adding FDIR ATR filters\n");
7286 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7287 * @adapter: pointer to the device adapter structure
7289 * This function serves two purposes. First it strobes the interrupt lines
7290 * in order to make certain interrupts are occurring. Secondly it sets the
7291 * bits needed to check for TX hangs. As a result we should immediately
7292 * determine if a hang has occurred.
7294 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7296 struct ixgbe_hw *hw = &adapter->hw;
7300 /* If we're down, removing or resetting, just bail */
7301 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7302 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7303 test_bit(__IXGBE_RESETTING, &adapter->state))
7306 /* Force detection of hung controller */
7307 if (netif_carrier_ok(adapter->netdev)) {
7308 for (i = 0; i < adapter->num_tx_queues; i++)
7309 set_check_for_tx_hang(adapter->tx_ring[i]);
7310 for (i = 0; i < adapter->num_xdp_queues; i++)
7311 set_check_for_tx_hang(adapter->xdp_ring[i]);
7314 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7316 * for legacy and MSI interrupts don't set any bits
7317 * that are enabled for EIAM, because this operation
7318 * would set *both* EIMS and EICS for any bit in EIAM
7320 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7321 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7323 /* get one bit for every active tx/rx interrupt vector */
7324 for (i = 0; i < adapter->num_q_vectors; i++) {
7325 struct ixgbe_q_vector *qv = adapter->q_vector[i];
7326 if (qv->rx.ring || qv->tx.ring)
7331 /* Cause software interrupt to ensure rings are cleaned */
7332 ixgbe_irq_rearm_queues(adapter, eics);
7336 * ixgbe_watchdog_update_link - update the link status
7337 * @adapter: pointer to the device adapter structure
7339 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7341 struct ixgbe_hw *hw = &adapter->hw;
7342 u32 link_speed = adapter->link_speed;
7343 bool link_up = adapter->link_up;
7344 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7346 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7349 if (hw->mac.ops.check_link) {
7350 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7352 /* always assume link is up, if no check link function */
7353 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7357 if (adapter->ixgbe_ieee_pfc)
7358 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7360 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7361 hw->mac.ops.fc_enable(hw);
7362 ixgbe_set_rx_drop_en(adapter);
7366 time_after(jiffies, (adapter->link_check_timeout +
7367 IXGBE_TRY_LINK_TIMEOUT))) {
7368 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7369 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7370 IXGBE_WRITE_FLUSH(hw);
7373 adapter->link_up = link_up;
7374 adapter->link_speed = link_speed;
7377 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7379 #ifdef CONFIG_IXGBE_DCB
7380 struct net_device *netdev = adapter->netdev;
7381 struct dcb_app app = {
7382 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7387 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7388 up = dcb_ieee_getapp_mask(netdev, &app);
7390 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7395 * ixgbe_watchdog_link_is_up - update netif_carrier status and
7396 * print link up message
7397 * @adapter: pointer to the device adapter structure
7399 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7401 struct net_device *netdev = adapter->netdev;
7402 struct ixgbe_hw *hw = &adapter->hw;
7403 u32 link_speed = adapter->link_speed;
7404 const char *speed_str;
7405 bool flow_rx, flow_tx;
7407 /* only continue if link was previously down */
7408 if (netif_carrier_ok(netdev))
7411 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7413 switch (hw->mac.type) {
7414 case ixgbe_mac_82598EB: {
7415 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7416 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7417 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7418 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7421 case ixgbe_mac_X540:
7422 case ixgbe_mac_X550:
7423 case ixgbe_mac_X550EM_x:
7424 case ixgbe_mac_x550em_a:
7425 case ixgbe_mac_82599EB: {
7426 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7427 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7428 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7429 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7438 adapter->last_rx_ptp_check = jiffies;
7440 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7441 ixgbe_ptp_start_cyclecounter(adapter);
7443 switch (link_speed) {
7444 case IXGBE_LINK_SPEED_10GB_FULL:
7445 speed_str = "10 Gbps";
7447 case IXGBE_LINK_SPEED_5GB_FULL:
7448 speed_str = "5 Gbps";
7450 case IXGBE_LINK_SPEED_2_5GB_FULL:
7451 speed_str = "2.5 Gbps";
7453 case IXGBE_LINK_SPEED_1GB_FULL:
7454 speed_str = "1 Gbps";
7456 case IXGBE_LINK_SPEED_100_FULL:
7457 speed_str = "100 Mbps";
7459 case IXGBE_LINK_SPEED_10_FULL:
7460 speed_str = "10 Mbps";
7463 speed_str = "unknown speed";
7466 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7467 ((flow_rx && flow_tx) ? "RX/TX" :
7469 (flow_tx ? "TX" : "None"))));
7471 netif_carrier_on(netdev);
7472 ixgbe_check_vf_rate_limit(adapter);
7474 /* enable transmits */
7475 netif_tx_wake_all_queues(adapter->netdev);
7477 /* update the default user priority for VFs */
7478 ixgbe_update_default_up(adapter);
7480 /* ping all the active vfs to let them know link has changed */
7481 ixgbe_ping_all_vfs(adapter);
7485 * ixgbe_watchdog_link_is_down - update netif_carrier status and
7486 * print link down message
7487 * @adapter: pointer to the adapter structure
7489 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7491 struct net_device *netdev = adapter->netdev;
7492 struct ixgbe_hw *hw = &adapter->hw;
7494 adapter->link_up = false;
7495 adapter->link_speed = 0;
7497 /* only continue if link was up previously */
7498 if (!netif_carrier_ok(netdev))
7501 /* poll for SFP+ cable when link is down */
7502 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7503 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7505 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7506 ixgbe_ptp_start_cyclecounter(adapter);
7508 e_info(drv, "NIC Link is Down\n");
7509 netif_carrier_off(netdev);
7511 /* ping all the active vfs to let them know link has changed */
7512 ixgbe_ping_all_vfs(adapter);
7515 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7519 for (i = 0; i < adapter->num_tx_queues; i++) {
7520 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7522 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7526 for (i = 0; i < adapter->num_xdp_queues; i++) {
7527 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7529 if (ring->next_to_use != ring->next_to_clean)
7536 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7538 struct ixgbe_hw *hw = &adapter->hw;
7539 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7540 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7544 if (!adapter->num_vfs)
7547 /* resetting the PF is only needed for MAC before X550 */
7548 if (hw->mac.type >= ixgbe_mac_X550)
7551 for (i = 0; i < adapter->num_vfs; i++) {
7552 for (j = 0; j < q_per_pool; j++) {
7555 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7556 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7567 * ixgbe_watchdog_flush_tx - flush queues on link down
7568 * @adapter: pointer to the device adapter structure
7570 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7572 if (!netif_carrier_ok(adapter->netdev)) {
7573 if (ixgbe_ring_tx_pending(adapter) ||
7574 ixgbe_vf_tx_pending(adapter)) {
7575 /* We've lost link, so the controller stops DMA,
7576 * but we've got queued Tx work that's never going
7577 * to get done, so reset controller to flush Tx.
7578 * (Do the reset outside of interrupt context).
7580 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7581 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7586 #ifdef CONFIG_PCI_IOV
7587 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7589 struct ixgbe_hw *hw = &adapter->hw;
7590 struct pci_dev *pdev = adapter->pdev;
7594 if (!(netif_carrier_ok(adapter->netdev)))
7597 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7598 if (gpc) /* If incrementing then no need for the check below */
7600 /* Check to see if a bad DMA write target from an errant or
7601 * malicious VF has caused a PCIe error. If so then we can
7602 * issue a VFLR to the offending VF(s) and then resume without
7603 * requesting a full slot reset.
7609 /* check status reg for all VFs owned by this PF */
7610 for (vf = 0; vf < adapter->num_vfs; ++vf) {
7611 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7616 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7617 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7618 status_reg & PCI_STATUS_REC_MASTER_ABORT)
7623 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7627 /* Do not perform spoof check for 82598 or if not in IOV mode */
7628 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7629 adapter->num_vfs == 0)
7632 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7635 * ssvpc register is cleared on read, if zero then no
7636 * spoofed packets in the last interval.
7641 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7644 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7649 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7652 #endif /* CONFIG_PCI_IOV */
7656 * ixgbe_watchdog_subtask - check and bring link up
7657 * @adapter: pointer to the device adapter structure
7659 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7661 /* if interface is down, removing or resetting, do nothing */
7662 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7663 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7664 test_bit(__IXGBE_RESETTING, &adapter->state))
7667 ixgbe_watchdog_update_link(adapter);
7669 if (adapter->link_up)
7670 ixgbe_watchdog_link_is_up(adapter);
7672 ixgbe_watchdog_link_is_down(adapter);
7674 ixgbe_check_for_bad_vf(adapter);
7675 ixgbe_spoof_check(adapter);
7676 ixgbe_update_stats(adapter);
7678 ixgbe_watchdog_flush_tx(adapter);
7682 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7683 * @adapter: the ixgbe adapter structure
7685 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7687 struct ixgbe_hw *hw = &adapter->hw;
7690 /* not searching for SFP so there is nothing to do here */
7691 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7692 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7695 if (adapter->sfp_poll_time &&
7696 time_after(adapter->sfp_poll_time, jiffies))
7697 return; /* If not yet time to poll for SFP */
7699 /* someone else is in init, wait until next service event */
7700 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7703 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7705 err = hw->phy.ops.identify_sfp(hw);
7706 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7709 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7710 /* If no cable is present, then we need to reset
7711 * the next time we find a good cable. */
7712 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7719 /* exit if reset not needed */
7720 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7723 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7726 * A module may be identified correctly, but the EEPROM may not have
7727 * support for that module. setup_sfp() will fail in that case, so
7728 * we should not allow that module to load.
7730 if (hw->mac.type == ixgbe_mac_82598EB)
7731 err = hw->phy.ops.reset(hw);
7733 err = hw->mac.ops.setup_sfp(hw);
7735 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7738 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7739 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7742 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7744 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7745 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7746 e_dev_err("failed to initialize because an unsupported "
7747 "SFP+ module type was detected.\n");
7748 e_dev_err("Reload the driver after installing a "
7749 "supported module.\n");
7750 unregister_netdev(adapter->netdev);
7755 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7756 * @adapter: the ixgbe adapter structure
7758 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7760 struct ixgbe_hw *hw = &adapter->hw;
7763 bool autoneg = false;
7765 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7768 /* someone else is in init, wait until next service event */
7769 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7772 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7774 hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7776 /* advertise highest capable link speed */
7777 if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7778 speed = IXGBE_LINK_SPEED_10GB_FULL;
7780 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7781 IXGBE_LINK_SPEED_1GB_FULL);
7783 if (hw->mac.ops.setup_link)
7784 hw->mac.ops.setup_link(hw, speed, true);
7786 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7787 adapter->link_check_timeout = jiffies;
7788 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7792 * ixgbe_service_timer - Timer Call-back
7793 * @t: pointer to timer_list structure
7795 static void ixgbe_service_timer(struct timer_list *t)
7797 struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7798 unsigned long next_event_offset;
7800 /* poll faster when waiting for link */
7801 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7802 next_event_offset = HZ / 10;
7804 next_event_offset = HZ * 2;
7806 /* Reset the timer */
7807 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7809 ixgbe_service_event_schedule(adapter);
7812 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7814 struct ixgbe_hw *hw = &adapter->hw;
7817 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7820 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7822 if (!hw->phy.ops.handle_lasi)
7825 status = hw->phy.ops.handle_lasi(&adapter->hw);
7826 if (status != IXGBE_ERR_OVERTEMP)
7829 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7832 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7834 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7838 /* If we're already down, removing or resetting, just bail */
7839 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7840 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7841 test_bit(__IXGBE_RESETTING, &adapter->state)) {
7846 ixgbe_dump(adapter);
7847 netdev_err(adapter->netdev, "Reset adapter\n");
7848 adapter->tx_timeout_count++;
7850 ixgbe_reinit_locked(adapter);
7855 * ixgbe_check_fw_error - Check firmware for errors
7856 * @adapter: the adapter private structure
7858 * Check firmware errors in register FWSM
7860 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7862 struct ixgbe_hw *hw = &adapter->hw;
7865 /* read fwsm.ext_err_ind register and log errors */
7866 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7868 if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7869 !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7870 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7873 if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7874 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7882 * ixgbe_service_task - manages and runs subtasks
7883 * @work: pointer to work_struct containing our data
7885 static void ixgbe_service_task(struct work_struct *work)
7887 struct ixgbe_adapter *adapter = container_of(work,
7888 struct ixgbe_adapter,
7890 if (ixgbe_removed(adapter->hw.hw_addr)) {
7891 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7893 ixgbe_down(adapter);
7896 ixgbe_service_event_complete(adapter);
7899 if (ixgbe_check_fw_error(adapter)) {
7900 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7902 unregister_netdev(adapter->netdev);
7905 ixgbe_service_event_complete(adapter);
7908 if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7910 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7911 udp_tunnel_get_rx_info(adapter->netdev);
7914 ixgbe_reset_subtask(adapter);
7915 ixgbe_phy_interrupt_subtask(adapter);
7916 ixgbe_sfp_detection_subtask(adapter);
7917 ixgbe_sfp_link_config_subtask(adapter);
7918 ixgbe_check_overtemp_subtask(adapter);
7919 ixgbe_watchdog_subtask(adapter);
7920 ixgbe_fdir_reinit_subtask(adapter);
7921 ixgbe_check_hang_subtask(adapter);
7923 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7924 ixgbe_ptp_overflow_check(adapter);
7925 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7926 ixgbe_ptp_rx_hang(adapter);
7927 ixgbe_ptp_tx_hang(adapter);
7930 ixgbe_service_event_complete(adapter);
7933 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7934 struct ixgbe_tx_buffer *first,
7936 struct ixgbe_ipsec_tx_data *itd)
7938 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7939 struct sk_buff *skb = first->skb;
7949 u32 paylen, l4_offset;
7950 u32 fceof_saidx = 0;
7953 if (skb->ip_summed != CHECKSUM_PARTIAL)
7956 if (!skb_is_gso(skb))
7959 err = skb_cow_head(skb, 0);
7963 if (eth_p_mpls(first->protocol))
7964 ip.hdr = skb_inner_network_header(skb);
7966 ip.hdr = skb_network_header(skb);
7967 l4.hdr = skb_checksum_start(skb);
7969 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7970 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7972 /* initialize outer IP header fields */
7973 if (ip.v4->version == 4) {
7974 unsigned char *csum_start = skb_checksum_start(skb);
7975 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7976 int len = csum_start - trans_start;
7978 /* IP header will have to cancel out any data that
7979 * is not a part of the outer IP header, so set to
7980 * a reverse csum if needed, else init check to 0.
7982 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7983 csum_fold(csum_partial(trans_start,
7985 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7988 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7989 IXGBE_TX_FLAGS_CSUM |
7990 IXGBE_TX_FLAGS_IPV4;
7992 ip.v6->payload_len = 0;
7993 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7994 IXGBE_TX_FLAGS_CSUM;
7997 /* determine offset of inner transport header */
7998 l4_offset = l4.hdr - skb->data;
8000 /* compute length of segmentation header */
8001 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
8003 /* remove payload length from inner checksum */
8004 paylen = skb->len - l4_offset;
8005 csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
8007 /* update gso size and bytecount with header size */
8008 first->gso_segs = skb_shinfo(skb)->gso_segs;
8009 first->bytecount += (first->gso_segs - 1) * *hdr_len;
8011 /* mss_l4len_id: use 0 as index for TSO */
8012 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8013 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8015 fceof_saidx |= itd->sa_idx;
8016 type_tucmd |= itd->flags | itd->trailer_len;
8018 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8019 vlan_macip_lens = l4.hdr - ip.hdr;
8020 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8021 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8023 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8029 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8031 unsigned int offset = 0;
8033 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8035 return offset == skb_checksum_start_offset(skb);
8038 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8039 struct ixgbe_tx_buffer *first,
8040 struct ixgbe_ipsec_tx_data *itd)
8042 struct sk_buff *skb = first->skb;
8043 u32 vlan_macip_lens = 0;
8044 u32 fceof_saidx = 0;
8047 if (skb->ip_summed != CHECKSUM_PARTIAL) {
8049 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8050 IXGBE_TX_FLAGS_CC)))
8055 switch (skb->csum_offset) {
8056 case offsetof(struct tcphdr, check):
8057 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8059 case offsetof(struct udphdr, check):
8061 case offsetof(struct sctphdr, checksum):
8062 /* validate that this is actually an SCTP request */
8063 if (((first->protocol == htons(ETH_P_IP)) &&
8064 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8065 ((first->protocol == htons(ETH_P_IPV6)) &&
8066 ixgbe_ipv6_csum_is_sctp(skb))) {
8067 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8072 skb_checksum_help(skb);
8076 /* update TX checksum flag */
8077 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8078 vlan_macip_lens = skb_checksum_start_offset(skb) -
8079 skb_network_offset(skb);
8081 /* vlan_macip_lens: MACLEN, VLAN tag */
8082 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8083 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8085 fceof_saidx |= itd->sa_idx;
8086 type_tucmd |= itd->flags | itd->trailer_len;
8088 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8091 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8092 ((_flag <= _result) ? \
8093 ((u32)(_input & _flag) * (_result / _flag)) : \
8094 ((u32)(_input & _flag) / (_flag / _result)))
8096 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8098 /* set type for advanced descriptor with frame checksum insertion */
8099 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8100 IXGBE_ADVTXD_DCMD_DEXT |
8101 IXGBE_ADVTXD_DCMD_IFCS;
8103 /* set HW vlan bit if vlan is present */
8104 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8105 IXGBE_ADVTXD_DCMD_VLE);
8107 /* set segmentation enable bits for TSO/FSO */
8108 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8109 IXGBE_ADVTXD_DCMD_TSE);
8111 /* set timestamp bit if present */
8112 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8113 IXGBE_ADVTXD_MAC_TSTAMP);
8115 /* insert frame checksum */
8116 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8121 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8122 u32 tx_flags, unsigned int paylen)
8124 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8126 /* enable L4 checksum for TSO and TX checksum offload */
8127 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8128 IXGBE_TX_FLAGS_CSUM,
8129 IXGBE_ADVTXD_POPTS_TXSM);
8131 /* enable IPv4 checksum for TSO */
8132 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8133 IXGBE_TX_FLAGS_IPV4,
8134 IXGBE_ADVTXD_POPTS_IXSM);
8137 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8138 IXGBE_TX_FLAGS_IPSEC,
8139 IXGBE_ADVTXD_POPTS_IPSEC);
8142 * Check Context must be set if Tx switch is enabled, which it
8143 * always is for case where virtual functions are running
8145 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8149 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8152 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8154 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8156 /* Herbert's original patch had:
8157 * smp_mb__after_netif_stop_queue();
8158 * but since that doesn't exist yet, just open code it.
8162 /* We need to check again in a case another CPU has just
8163 * made room available.
8165 if (likely(ixgbe_desc_unused(tx_ring) < size))
8168 /* A reprieve! - use start_queue because it doesn't call schedule */
8169 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8170 ++tx_ring->tx_stats.restart_queue;
8174 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8176 if (likely(ixgbe_desc_unused(tx_ring) >= size))
8179 return __ixgbe_maybe_stop_tx(tx_ring, size);
8182 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8183 struct ixgbe_tx_buffer *first,
8186 struct sk_buff *skb = first->skb;
8187 struct ixgbe_tx_buffer *tx_buffer;
8188 union ixgbe_adv_tx_desc *tx_desc;
8189 struct skb_frag_struct *frag;
8191 unsigned int data_len, size;
8192 u32 tx_flags = first->tx_flags;
8193 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8194 u16 i = tx_ring->next_to_use;
8196 tx_desc = IXGBE_TX_DESC(tx_ring, i);
8198 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8200 size = skb_headlen(skb);
8201 data_len = skb->data_len;
8204 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8205 if (data_len < sizeof(struct fcoe_crc_eof)) {
8206 size -= sizeof(struct fcoe_crc_eof) - data_len;
8209 data_len -= sizeof(struct fcoe_crc_eof);
8214 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8218 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8219 if (dma_mapping_error(tx_ring->dev, dma))
8222 /* record length, and DMA address */
8223 dma_unmap_len_set(tx_buffer, len, size);
8224 dma_unmap_addr_set(tx_buffer, dma, dma);
8226 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8228 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8229 tx_desc->read.cmd_type_len =
8230 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8234 if (i == tx_ring->count) {
8235 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8238 tx_desc->read.olinfo_status = 0;
8240 dma += IXGBE_MAX_DATA_PER_TXD;
8241 size -= IXGBE_MAX_DATA_PER_TXD;
8243 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8246 if (likely(!data_len))
8249 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8253 if (i == tx_ring->count) {
8254 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8257 tx_desc->read.olinfo_status = 0;
8260 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8262 size = skb_frag_size(frag);
8266 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8269 tx_buffer = &tx_ring->tx_buffer_info[i];
8272 /* write last descriptor with RS and EOP bits */
8273 cmd_type |= size | IXGBE_TXD_CMD;
8274 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8276 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8278 /* set the timestamp */
8279 first->time_stamp = jiffies;
8281 skb_tx_timestamp(skb);
8284 * Force memory writes to complete before letting h/w know there
8285 * are new descriptors to fetch. (Only applicable for weak-ordered
8286 * memory model archs, such as IA-64).
8288 * We also need this memory barrier to make certain all of the
8289 * status bits have been updated before next_to_watch is written.
8293 /* set next_to_watch value indicating a packet is present */
8294 first->next_to_watch = tx_desc;
8297 if (i == tx_ring->count)
8300 tx_ring->next_to_use = i;
8302 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8304 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8305 writel(i, tx_ring->tail);
8310 dev_err(tx_ring->dev, "TX DMA map failed\n");
8312 /* clear dma mappings for failed tx_buffer_info map */
8314 tx_buffer = &tx_ring->tx_buffer_info[i];
8315 if (dma_unmap_len(tx_buffer, len))
8316 dma_unmap_page(tx_ring->dev,
8317 dma_unmap_addr(tx_buffer, dma),
8318 dma_unmap_len(tx_buffer, len),
8320 dma_unmap_len_set(tx_buffer, len, 0);
8321 if (tx_buffer == first)
8324 i += tx_ring->count;
8328 dev_kfree_skb_any(first->skb);
8331 tx_ring->next_to_use = i;
8336 static void ixgbe_atr(struct ixgbe_ring *ring,
8337 struct ixgbe_tx_buffer *first)
8339 struct ixgbe_q_vector *q_vector = ring->q_vector;
8340 union ixgbe_atr_hash_dword input = { .dword = 0 };
8341 union ixgbe_atr_hash_dword common = { .dword = 0 };
8343 unsigned char *network;
8345 struct ipv6hdr *ipv6;
8349 struct sk_buff *skb;
8353 /* if ring doesn't have a interrupt vector, cannot perform ATR */
8357 /* do nothing if sampling is disabled */
8358 if (!ring->atr_sample_rate)
8363 /* currently only IPv4/IPv6 with TCP is supported */
8364 if ((first->protocol != htons(ETH_P_IP)) &&
8365 (first->protocol != htons(ETH_P_IPV6)))
8368 /* snag network header to get L4 type and address */
8370 hdr.network = skb_network_header(skb);
8371 if (unlikely(hdr.network <= skb->data))
8373 if (skb->encapsulation &&
8374 first->protocol == htons(ETH_P_IP) &&
8375 hdr.ipv4->protocol == IPPROTO_UDP) {
8376 struct ixgbe_adapter *adapter = q_vector->adapter;
8378 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8382 /* verify the port is recognized as VXLAN */
8383 if (adapter->vxlan_port &&
8384 udp_hdr(skb)->dest == adapter->vxlan_port)
8385 hdr.network = skb_inner_network_header(skb);
8387 if (adapter->geneve_port &&
8388 udp_hdr(skb)->dest == adapter->geneve_port)
8389 hdr.network = skb_inner_network_header(skb);
8392 /* Make sure we have at least [minimum IPv4 header + TCP]
8393 * or [IPv6 header] bytes
8395 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8398 /* Currently only IPv4/IPv6 with TCP is supported */
8399 switch (hdr.ipv4->version) {
8401 /* access ihl as u8 to avoid unaligned access on ia64 */
8402 hlen = (hdr.network[0] & 0x0F) << 2;
8403 l4_proto = hdr.ipv4->protocol;
8406 hlen = hdr.network - skb->data;
8407 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8408 hlen -= hdr.network - skb->data;
8414 if (l4_proto != IPPROTO_TCP)
8417 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8418 hlen + sizeof(struct tcphdr)))
8421 th = (struct tcphdr *)(hdr.network + hlen);
8423 /* skip this packet since the socket is closing */
8427 /* sample on all syn packets or once every atr sample count */
8428 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8431 /* reset sample count */
8432 ring->atr_count = 0;
8434 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8437 * src and dst are inverted, think how the receiver sees them
8439 * The input is broken into two sections, a non-compressed section
8440 * containing vm_pool, vlan_id, and flow_type. The rest of the data
8441 * is XORed together and stored in the compressed dword.
8443 input.formatted.vlan_id = vlan_id;
8446 * since src port and flex bytes occupy the same word XOR them together
8447 * and write the value to source port portion of compressed dword
8449 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8450 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8452 common.port.src ^= th->dest ^ first->protocol;
8453 common.port.dst ^= th->source;
8455 switch (hdr.ipv4->version) {
8457 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8458 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8461 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8462 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8463 hdr.ipv6->saddr.s6_addr32[1] ^
8464 hdr.ipv6->saddr.s6_addr32[2] ^
8465 hdr.ipv6->saddr.s6_addr32[3] ^
8466 hdr.ipv6->daddr.s6_addr32[0] ^
8467 hdr.ipv6->daddr.s6_addr32[1] ^
8468 hdr.ipv6->daddr.s6_addr32[2] ^
8469 hdr.ipv6->daddr.s6_addr32[3];
8475 if (hdr.network != skb_network_header(skb))
8476 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8478 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8479 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8480 input, common, ring->queue_index);
8484 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8485 struct net_device *sb_dev)
8487 struct ixgbe_adapter *adapter;
8488 struct ixgbe_ring_feature *f;
8492 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8493 struct net_device *vdev = sb_dev;
8495 txq = vdev->tc_to_txq[tc].offset;
8496 txq += reciprocal_scale(skb_get_hash(skb),
8497 vdev->tc_to_txq[tc].count);
8503 * only execute the code below if protocol is FCoE
8504 * or FIP and we have FCoE enabled on the adapter
8506 switch (vlan_get_protocol(skb)) {
8507 case htons(ETH_P_FCOE):
8508 case htons(ETH_P_FIP):
8509 adapter = netdev_priv(dev);
8511 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8515 return netdev_pick_tx(dev, skb, sb_dev);
8518 f = &adapter->ring_feature[RING_F_FCOE];
8520 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8523 while (txq >= f->indices)
8526 return txq + f->offset;
8530 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8531 struct xdp_frame *xdpf)
8533 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8534 struct ixgbe_tx_buffer *tx_buffer;
8535 union ixgbe_adv_tx_desc *tx_desc;
8542 if (unlikely(!ixgbe_desc_unused(ring)))
8543 return IXGBE_XDP_CONSUMED;
8545 dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8546 if (dma_mapping_error(ring->dev, dma))
8547 return IXGBE_XDP_CONSUMED;
8549 /* record the location of the first descriptor for this packet */
8550 tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8551 tx_buffer->bytecount = len;
8552 tx_buffer->gso_segs = 1;
8553 tx_buffer->protocol = 0;
8555 i = ring->next_to_use;
8556 tx_desc = IXGBE_TX_DESC(ring, i);
8558 dma_unmap_len_set(tx_buffer, len, len);
8559 dma_unmap_addr_set(tx_buffer, dma, dma);
8560 tx_buffer->xdpf = xdpf;
8562 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8564 /* put descriptor type bits */
8565 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8566 IXGBE_ADVTXD_DCMD_DEXT |
8567 IXGBE_ADVTXD_DCMD_IFCS;
8568 cmd_type |= len | IXGBE_TXD_CMD;
8569 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8570 tx_desc->read.olinfo_status =
8571 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8573 /* Avoid any potential race with xdp_xmit and cleanup */
8576 /* set next_to_watch value indicating a packet is present */
8578 if (i == ring->count)
8581 tx_buffer->next_to_watch = tx_desc;
8582 ring->next_to_use = i;
8584 return IXGBE_XDP_TX;
8587 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8588 struct ixgbe_adapter *adapter,
8589 struct ixgbe_ring *tx_ring)
8591 struct ixgbe_tx_buffer *first;
8595 u16 count = TXD_USE_COUNT(skb_headlen(skb));
8596 struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8597 __be16 protocol = skb->protocol;
8601 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8602 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8603 * + 2 desc gap to keep tail from touching head,
8604 * + 1 desc for context descriptor,
8605 * otherwise try next time
8607 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8608 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8610 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8611 tx_ring->tx_stats.tx_busy++;
8612 return NETDEV_TX_BUSY;
8615 /* record the location of the first descriptor for this packet */
8616 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8618 first->bytecount = skb->len;
8619 first->gso_segs = 1;
8621 /* if we have a HW VLAN tag being added default to the HW one */
8622 if (skb_vlan_tag_present(skb)) {
8623 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8624 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8625 /* else if it is a SW VLAN check the next protocol and store the tag */
8626 } else if (protocol == htons(ETH_P_8021Q)) {
8627 struct vlan_hdr *vhdr, _vhdr;
8628 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8632 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8633 IXGBE_TX_FLAGS_VLAN_SHIFT;
8634 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8636 protocol = vlan_get_protocol(skb);
8638 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8639 adapter->ptp_clock) {
8640 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8642 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8643 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8645 /* schedule check for Tx timestamp */
8646 adapter->ptp_tx_skb = skb_get(skb);
8647 adapter->ptp_tx_start = jiffies;
8648 schedule_work(&adapter->ptp_tx_work);
8650 adapter->tx_hwtstamp_skipped++;
8654 #ifdef CONFIG_PCI_IOV
8656 * Use the l2switch_enable flag - would be false if the DMA
8657 * Tx switch had been disabled.
8659 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8660 tx_flags |= IXGBE_TX_FLAGS_CC;
8663 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8664 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8665 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8666 (skb->priority != TC_PRIO_CONTROL))) {
8667 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8668 tx_flags |= (skb->priority & 0x7) <<
8669 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8670 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8671 struct vlan_ethhdr *vhdr;
8673 if (skb_cow_head(skb, 0))
8675 vhdr = (struct vlan_ethhdr *)skb->data;
8676 vhdr->h_vlan_TCI = htons(tx_flags >>
8677 IXGBE_TX_FLAGS_VLAN_SHIFT);
8679 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8683 /* record initial flags and protocol */
8684 first->tx_flags = tx_flags;
8685 first->protocol = protocol;
8688 /* setup tx offload for FCoE */
8689 if ((protocol == htons(ETH_P_FCOE)) &&
8690 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8691 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8698 #endif /* IXGBE_FCOE */
8700 #ifdef CONFIG_IXGBE_IPSEC
8701 if (secpath_exists(skb) &&
8702 !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8705 tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8709 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8711 /* add the ATR filter if ATR is on */
8712 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8713 ixgbe_atr(tx_ring, first);
8717 #endif /* IXGBE_FCOE */
8718 if (ixgbe_tx_map(tx_ring, first, hdr_len))
8719 goto cleanup_tx_timestamp;
8721 return NETDEV_TX_OK;
8724 dev_kfree_skb_any(first->skb);
8726 cleanup_tx_timestamp:
8727 if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8728 dev_kfree_skb_any(adapter->ptp_tx_skb);
8729 adapter->ptp_tx_skb = NULL;
8730 cancel_work_sync(&adapter->ptp_tx_work);
8731 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8734 return NETDEV_TX_OK;
8737 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8738 struct net_device *netdev,
8739 struct ixgbe_ring *ring)
8741 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8742 struct ixgbe_ring *tx_ring;
8745 * The minimum packet size for olinfo paylen is 17 so pad the skb
8746 * in order to meet this minimum size requirement.
8748 if (skb_put_padto(skb, 17))
8749 return NETDEV_TX_OK;
8751 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8752 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8753 return NETDEV_TX_BUSY;
8755 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8758 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8759 struct net_device *netdev)
8761 return __ixgbe_xmit_frame(skb, netdev, NULL);
8765 * ixgbe_set_mac - Change the Ethernet Address of the NIC
8766 * @netdev: network interface device structure
8767 * @p: pointer to an address structure
8769 * Returns 0 on success, negative on failure
8771 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8773 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8774 struct ixgbe_hw *hw = &adapter->hw;
8775 struct sockaddr *addr = p;
8777 if (!is_valid_ether_addr(addr->sa_data))
8778 return -EADDRNOTAVAIL;
8780 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8781 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8783 ixgbe_mac_set_default_filter(adapter);
8789 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8791 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8792 struct ixgbe_hw *hw = &adapter->hw;
8796 if (adapter->mii_bus) {
8799 if (devad != MDIO_DEVAD_NONE)
8800 regnum |= (devad << 16) | MII_ADDR_C45;
8802 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8805 if (prtad != hw->phy.mdio.prtad)
8807 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8813 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8814 u16 addr, u16 value)
8816 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8817 struct ixgbe_hw *hw = &adapter->hw;
8819 if (adapter->mii_bus) {
8822 if (devad != MDIO_DEVAD_NONE)
8823 regnum |= (devad << 16) | MII_ADDR_C45;
8825 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8828 if (prtad != hw->phy.mdio.prtad)
8830 return hw->phy.ops.write_reg(hw, addr, devad, value);
8833 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8835 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8839 return ixgbe_ptp_set_ts_config(adapter, req);
8841 return ixgbe_ptp_get_ts_config(adapter, req);
8843 if (!adapter->hw.phy.ops.read_reg)
8847 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8852 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8854 * @dev: network interface device structure
8856 * Returns non-zero on failure
8858 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8861 struct ixgbe_adapter *adapter = netdev_priv(dev);
8862 struct ixgbe_hw *hw = &adapter->hw;
8864 if (is_valid_ether_addr(hw->mac.san_addr)) {
8866 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8869 /* update SAN MAC vmdq pool selection */
8870 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8876 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8878 * @dev: network interface device structure
8880 * Returns non-zero on failure
8882 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8885 struct ixgbe_adapter *adapter = netdev_priv(dev);
8886 struct ixgbe_mac_info *mac = &adapter->hw.mac;
8888 if (is_valid_ether_addr(mac->san_addr)) {
8890 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8896 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8897 struct ixgbe_ring *ring)
8904 start = u64_stats_fetch_begin_irq(&ring->syncp);
8905 packets = ring->stats.packets;
8906 bytes = ring->stats.bytes;
8907 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8908 stats->tx_packets += packets;
8909 stats->tx_bytes += bytes;
8913 static void ixgbe_get_stats64(struct net_device *netdev,
8914 struct rtnl_link_stats64 *stats)
8916 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8920 for (i = 0; i < adapter->num_rx_queues; i++) {
8921 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8927 start = u64_stats_fetch_begin_irq(&ring->syncp);
8928 packets = ring->stats.packets;
8929 bytes = ring->stats.bytes;
8930 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8931 stats->rx_packets += packets;
8932 stats->rx_bytes += bytes;
8936 for (i = 0; i < adapter->num_tx_queues; i++) {
8937 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8939 ixgbe_get_ring_stats64(stats, ring);
8941 for (i = 0; i < adapter->num_xdp_queues; i++) {
8942 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8944 ixgbe_get_ring_stats64(stats, ring);
8948 /* following stats updated by ixgbe_watchdog_task() */
8949 stats->multicast = netdev->stats.multicast;
8950 stats->rx_errors = netdev->stats.rx_errors;
8951 stats->rx_length_errors = netdev->stats.rx_length_errors;
8952 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8953 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8956 #ifdef CONFIG_IXGBE_DCB
8958 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8959 * @adapter: pointer to ixgbe_adapter
8960 * @tc: number of traffic classes currently enabled
8962 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8963 * 802.1Q priority maps to a packet buffer that exists.
8965 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8967 struct ixgbe_hw *hw = &adapter->hw;
8971 /* 82598 have a static priority to TC mapping that can not
8972 * be changed so no validation is needed.
8974 if (hw->mac.type == ixgbe_mac_82598EB)
8977 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8980 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8981 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8983 /* If up2tc is out of bounds default to zero */
8985 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8989 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8995 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8996 * @adapter: Pointer to adapter struct
8998 * Populate the netdev user priority to tc map
9000 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9002 struct net_device *dev = adapter->netdev;
9003 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9004 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9007 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9010 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9011 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9013 tc = ets->prio_tc[prio];
9015 netdev_set_prio_tc_map(dev, prio, tc);
9019 #endif /* CONFIG_IXGBE_DCB */
9020 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9022 struct ixgbe_adapter *adapter = data;
9023 struct ixgbe_fwd_adapter *accel;
9026 /* we only care about macvlans... */
9027 if (!netif_is_macvlan(vdev))
9030 /* that have hardware offload enabled... */
9031 accel = macvlan_accel_priv(vdev);
9035 /* If we can relocate to a different bit do so */
9036 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9037 if (pool < adapter->num_rx_pools) {
9038 set_bit(pool, adapter->fwd_bitmask);
9043 /* if we cannot find a free pool then disable the offload */
9044 netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9045 macvlan_release_l2fw_offload(vdev);
9047 /* unbind the queues and drop the subordinate channel config */
9048 netdev_unbind_sb_channel(adapter->netdev, vdev);
9049 netdev_set_sb_channel(vdev, 0);
9056 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9058 struct ixgbe_adapter *adapter = netdev_priv(dev);
9060 /* flush any stale bits out of the fwd bitmask */
9061 bitmap_clear(adapter->fwd_bitmask, 1, 63);
9063 /* walk through upper devices reassigning pools */
9064 netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9069 * ixgbe_setup_tc - configure net_device for multiple traffic classes
9071 * @dev: net device to configure
9072 * @tc: number of traffic classes to enable
9074 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9076 struct ixgbe_adapter *adapter = netdev_priv(dev);
9077 struct ixgbe_hw *hw = &adapter->hw;
9079 /* Hardware supports up to 8 traffic classes */
9080 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9083 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9086 /* Hardware has to reinitialize queues and interrupts to
9087 * match packet buffer alignment. Unfortunately, the
9088 * hardware is not flexible enough to do this dynamically.
9090 if (netif_running(dev))
9093 ixgbe_reset(adapter);
9095 ixgbe_clear_interrupt_scheme(adapter);
9097 #ifdef CONFIG_IXGBE_DCB
9099 if (adapter->xdp_prog) {
9100 e_warn(probe, "DCB is not supported with XDP\n");
9102 ixgbe_init_interrupt_scheme(adapter);
9103 if (netif_running(dev))
9108 netdev_set_num_tc(dev, tc);
9109 ixgbe_set_prio_tc_map(adapter);
9111 adapter->hw_tcs = tc;
9112 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9114 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9115 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9116 adapter->hw.fc.requested_mode = ixgbe_fc_none;
9119 netdev_reset_tc(dev);
9121 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9122 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9124 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9125 adapter->hw_tcs = tc;
9127 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9128 adapter->dcb_cfg.pfc_mode_enable = false;
9131 ixgbe_validate_rtr(adapter, tc);
9133 #endif /* CONFIG_IXGBE_DCB */
9134 ixgbe_init_interrupt_scheme(adapter);
9136 ixgbe_defrag_macvlan_pools(dev);
9138 if (netif_running(dev))
9139 return ixgbe_open(dev);
9144 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9145 struct tc_cls_u32_offload *cls)
9147 u32 hdl = cls->knode.handle;
9148 u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9149 u32 loc = cls->knode.handle & 0xfffff;
9151 struct ixgbe_jump_table *jump = NULL;
9153 if (loc > IXGBE_MAX_HW_ENTRIES)
9156 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9159 /* Clear this filter in the link data it is associated with */
9160 if (uhtid != 0x800) {
9161 jump = adapter->jump_tables[uhtid];
9164 if (!test_bit(loc - 1, jump->child_loc_map))
9166 clear_bit(loc - 1, jump->child_loc_map);
9169 /* Check if the filter being deleted is a link */
9170 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9171 jump = adapter->jump_tables[i];
9172 if (jump && jump->link_hdl == hdl) {
9173 /* Delete filters in the hardware in the child hash
9174 * table associated with this link
9176 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9177 if (!test_bit(j, jump->child_loc_map))
9179 spin_lock(&adapter->fdir_perfect_lock);
9180 err = ixgbe_update_ethtool_fdir_entry(adapter,
9183 spin_unlock(&adapter->fdir_perfect_lock);
9184 clear_bit(j, jump->child_loc_map);
9186 /* Remove resources for this link */
9190 adapter->jump_tables[i] = NULL;
9195 spin_lock(&adapter->fdir_perfect_lock);
9196 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9197 spin_unlock(&adapter->fdir_perfect_lock);
9201 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9202 struct tc_cls_u32_offload *cls)
9204 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9206 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9209 /* This ixgbe devices do not support hash tables at the moment
9210 * so abort when given hash tables.
9212 if (cls->hnode.divisor > 0)
9215 set_bit(uhtid - 1, &adapter->tables);
9219 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9220 struct tc_cls_u32_offload *cls)
9222 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9224 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9227 clear_bit(uhtid - 1, &adapter->tables);
9231 #ifdef CONFIG_NET_CLS_ACT
9232 struct upper_walk_data {
9233 struct ixgbe_adapter *adapter;
9239 static int get_macvlan_queue(struct net_device *upper, void *_data)
9241 if (netif_is_macvlan(upper)) {
9242 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9243 struct upper_walk_data *data = _data;
9244 struct ixgbe_adapter *adapter = data->adapter;
9245 int ifindex = data->ifindex;
9247 if (vadapter && upper->ifindex == ifindex) {
9248 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9249 data->action = data->queue;
9257 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9258 u8 *queue, u64 *action)
9260 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9261 unsigned int num_vfs = adapter->num_vfs, vf;
9262 struct upper_walk_data data;
9263 struct net_device *upper;
9265 /* redirect to a SRIOV VF */
9266 for (vf = 0; vf < num_vfs; ++vf) {
9267 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9268 if (upper->ifindex == ifindex) {
9269 *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9271 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9276 /* redirect to a offloaded macvlan netdev */
9277 data.adapter = adapter;
9278 data.ifindex = ifindex;
9281 if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9282 get_macvlan_queue, &data)) {
9283 *action = data.action;
9284 *queue = data.queue;
9292 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9293 struct tcf_exts *exts, u64 *action, u8 *queue)
9295 const struct tc_action *a;
9298 if (!tcf_exts_has_actions(exts))
9301 tcf_exts_for_each_action(i, a, exts) {
9303 if (is_tcf_gact_shot(a)) {
9304 *action = IXGBE_FDIR_DROP_QUEUE;
9305 *queue = IXGBE_FDIR_DROP_QUEUE;
9309 /* Redirect to a VF or a offloaded macvlan */
9310 if (is_tcf_mirred_egress_redirect(a)) {
9311 struct net_device *dev = tcf_mirred_dev(a);
9315 return handle_redirect_action(adapter, dev->ifindex,
9325 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9326 struct tcf_exts *exts, u64 *action, u8 *queue)
9330 #endif /* CONFIG_NET_CLS_ACT */
9332 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9333 union ixgbe_atr_input *mask,
9334 struct tc_cls_u32_offload *cls,
9335 struct ixgbe_mat_field *field_ptr,
9336 struct ixgbe_nexthdr *nexthdr)
9340 bool found_entry = false, found_jump_field = false;
9342 for (i = 0; i < cls->knode.sel->nkeys; i++) {
9343 off = cls->knode.sel->keys[i].off;
9344 val = cls->knode.sel->keys[i].val;
9345 m = cls->knode.sel->keys[i].mask;
9347 for (j = 0; field_ptr[j].val; j++) {
9348 if (field_ptr[j].off == off) {
9349 field_ptr[j].val(input, mask, (__force u32)val,
9351 input->filter.formatted.flow_type |=
9358 if (nexthdr->off == cls->knode.sel->keys[i].off &&
9360 (__force u32)cls->knode.sel->keys[i].val &&
9362 (__force u32)cls->knode.sel->keys[i].mask)
9363 found_jump_field = true;
9369 if (nexthdr && !found_jump_field)
9375 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9376 IXGBE_ATR_L4TYPE_MASK;
9378 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9379 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9384 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9385 struct tc_cls_u32_offload *cls)
9387 __be16 protocol = cls->common.protocol;
9388 u32 loc = cls->knode.handle & 0xfffff;
9389 struct ixgbe_hw *hw = &adapter->hw;
9390 struct ixgbe_mat_field *field_ptr;
9391 struct ixgbe_fdir_filter *input = NULL;
9392 union ixgbe_atr_input *mask = NULL;
9393 struct ixgbe_jump_table *jump = NULL;
9394 int i, err = -EINVAL;
9396 u32 uhtid, link_uhtid;
9398 uhtid = TC_U32_USERHTID(cls->knode.handle);
9399 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9401 /* At the moment cls_u32 jumps to network layer and skips past
9402 * L2 headers. The canonical method to match L2 frames is to use
9403 * negative values. However this is error prone at best but really
9404 * just broken because there is no way to "know" what sort of hdr
9405 * is in front of the network layer. Fix cls_u32 to support L2
9406 * headers when needed.
9408 if (protocol != htons(ETH_P_IP))
9411 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9412 e_err(drv, "Location out of range\n");
9416 /* cls u32 is a graph starting at root node 0x800. The driver tracks
9417 * links and also the fields used to advance the parser across each
9418 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9419 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9420 * To add support for new nodes update ixgbe_model.h parse structures
9421 * this function _should_ be generic try not to hardcode values here.
9423 if (uhtid == 0x800) {
9424 field_ptr = (adapter->jump_tables[0])->mat;
9426 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9428 if (!adapter->jump_tables[uhtid])
9430 field_ptr = (adapter->jump_tables[uhtid])->mat;
9436 /* At this point we know the field_ptr is valid and need to either
9437 * build cls_u32 link or attach filter. Because adding a link to
9438 * a handle that does not exist is invalid and the same for adding
9439 * rules to handles that don't exist.
9443 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9445 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9448 if (!test_bit(link_uhtid - 1, &adapter->tables))
9451 /* Multiple filters as links to the same hash table are not
9452 * supported. To add a new filter with the same next header
9453 * but different match/jump conditions, create a new hash table
9456 if (adapter->jump_tables[link_uhtid] &&
9457 (adapter->jump_tables[link_uhtid])->link_hdl) {
9458 e_err(drv, "Link filter exists for link: %x\n",
9463 for (i = 0; nexthdr[i].jump; i++) {
9464 if (nexthdr[i].o != cls->knode.sel->offoff ||
9465 nexthdr[i].s != cls->knode.sel->offshift ||
9467 (__force u32)cls->knode.sel->offmask)
9470 jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9473 input = kzalloc(sizeof(*input), GFP_KERNEL);
9478 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9483 jump->input = input;
9485 jump->link_hdl = cls->knode.handle;
9487 err = ixgbe_clsu32_build_input(input, mask, cls,
9488 field_ptr, &nexthdr[i]);
9490 jump->mat = nexthdr[i].jump;
9491 adapter->jump_tables[link_uhtid] = jump;
9498 input = kzalloc(sizeof(*input), GFP_KERNEL);
9501 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9507 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9508 if ((adapter->jump_tables[uhtid])->input)
9509 memcpy(input, (adapter->jump_tables[uhtid])->input,
9511 if ((adapter->jump_tables[uhtid])->mask)
9512 memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9515 /* Lookup in all child hash tables if this location is already
9516 * filled with a filter
9518 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9519 struct ixgbe_jump_table *link = adapter->jump_tables[i];
9521 if (link && (test_bit(loc - 1, link->child_loc_map))) {
9522 e_err(drv, "Filter exists in location: %x\n",
9529 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9533 err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9538 input->sw_idx = loc;
9540 spin_lock(&adapter->fdir_perfect_lock);
9542 if (hlist_empty(&adapter->fdir_filter_list)) {
9543 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9544 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9546 goto err_out_w_lock;
9547 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9549 goto err_out_w_lock;
9552 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9553 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9554 input->sw_idx, queue);
9556 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9557 spin_unlock(&adapter->fdir_perfect_lock);
9559 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9560 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9565 spin_unlock(&adapter->fdir_perfect_lock);
9575 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9576 struct tc_cls_u32_offload *cls_u32)
9578 switch (cls_u32->command) {
9579 case TC_CLSU32_NEW_KNODE:
9580 case TC_CLSU32_REPLACE_KNODE:
9581 return ixgbe_configure_clsu32(adapter, cls_u32);
9582 case TC_CLSU32_DELETE_KNODE:
9583 return ixgbe_delete_clsu32(adapter, cls_u32);
9584 case TC_CLSU32_NEW_HNODE:
9585 case TC_CLSU32_REPLACE_HNODE:
9586 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9587 case TC_CLSU32_DELETE_HNODE:
9588 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9594 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9597 struct ixgbe_adapter *adapter = cb_priv;
9599 if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9603 case TC_SETUP_CLSU32:
9604 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9610 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9611 struct tc_mqprio_qopt *mqprio)
9613 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9614 return ixgbe_setup_tc(dev, mqprio->num_tc);
9617 static LIST_HEAD(ixgbe_block_cb_list);
9619 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9622 struct ixgbe_adapter *adapter = netdev_priv(dev);
9625 case TC_SETUP_BLOCK:
9626 return flow_block_cb_setup_simple(type_data,
9627 &ixgbe_block_cb_list,
9628 ixgbe_setup_tc_block_cb,
9629 adapter, adapter, true);
9630 case TC_SETUP_QDISC_MQPRIO:
9631 return ixgbe_setup_tc_mqprio(dev, type_data);
9637 #ifdef CONFIG_PCI_IOV
9638 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9640 struct net_device *netdev = adapter->netdev;
9643 ixgbe_setup_tc(netdev, adapter->hw_tcs);
9648 void ixgbe_do_reset(struct net_device *netdev)
9650 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9652 if (netif_running(netdev))
9653 ixgbe_reinit_locked(adapter);
9655 ixgbe_reset(adapter);
9658 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9659 netdev_features_t features)
9661 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9663 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9664 if (!(features & NETIF_F_RXCSUM))
9665 features &= ~NETIF_F_LRO;
9667 /* Turn off LRO if not RSC capable */
9668 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9669 features &= ~NETIF_F_LRO;
9671 if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9672 e_dev_err("LRO is not supported with XDP\n");
9673 features &= ~NETIF_F_LRO;
9679 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9681 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9684 /* go back to full RSS if we're not running SR-IOV */
9685 if (!adapter->ring_feature[RING_F_VMDQ].offset)
9686 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9687 IXGBE_FLAG_SRIOV_ENABLED);
9689 adapter->ring_feature[RING_F_RSS].limit = rss;
9690 adapter->ring_feature[RING_F_VMDQ].limit = 1;
9692 ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9695 static int ixgbe_set_features(struct net_device *netdev,
9696 netdev_features_t features)
9698 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9699 netdev_features_t changed = netdev->features ^ features;
9700 bool need_reset = false;
9702 /* Make sure RSC matches LRO, reset if change */
9703 if (!(features & NETIF_F_LRO)) {
9704 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9706 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9707 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9708 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9709 if (adapter->rx_itr_setting == 1 ||
9710 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9711 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9713 } else if ((changed ^ features) & NETIF_F_LRO) {
9714 e_info(probe, "rx-usecs set too low, "
9720 * Check if Flow Director n-tuple support or hw_tc support was
9721 * enabled or disabled. If the state changed, we need to reset.
9723 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9724 /* turn off ATR, enable perfect filters and reset */
9725 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9728 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9729 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9731 /* turn off perfect filters, enable ATR and reset */
9732 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9735 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9737 /* We cannot enable ATR if SR-IOV is enabled */
9738 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9739 /* We cannot enable ATR if we have 2 or more tcs */
9740 (adapter->hw_tcs > 1) ||
9741 /* We cannot enable ATR if RSS is disabled */
9742 (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9743 /* A sample rate of 0 indicates ATR disabled */
9744 (!adapter->atr_sample_rate))
9745 ; /* do nothing not supported */
9746 else /* otherwise supported and set the flag */
9747 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9750 if (changed & NETIF_F_RXALL)
9753 netdev->features = features;
9755 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9756 if (features & NETIF_F_RXCSUM) {
9757 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9759 u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9761 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9765 if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9766 if (features & NETIF_F_RXCSUM) {
9767 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9769 u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9771 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9775 if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9776 ixgbe_reset_l2fw_offload(adapter);
9777 else if (need_reset)
9778 ixgbe_do_reset(netdev);
9779 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9780 NETIF_F_HW_VLAN_CTAG_FILTER))
9781 ixgbe_set_rx_mode(netdev);
9787 * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9788 * @dev: The port's netdev
9789 * @ti: Tunnel endpoint information
9791 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9792 struct udp_tunnel_info *ti)
9794 struct ixgbe_adapter *adapter = netdev_priv(dev);
9795 struct ixgbe_hw *hw = &adapter->hw;
9796 __be16 port = ti->port;
9800 if (ti->sa_family != AF_INET)
9804 case UDP_TUNNEL_TYPE_VXLAN:
9805 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9808 if (adapter->vxlan_port == port)
9811 if (adapter->vxlan_port) {
9813 "VXLAN port %d set, not adding port %d\n",
9814 ntohs(adapter->vxlan_port),
9819 adapter->vxlan_port = port;
9821 case UDP_TUNNEL_TYPE_GENEVE:
9822 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9825 if (adapter->geneve_port == port)
9828 if (adapter->geneve_port) {
9830 "GENEVE port %d set, not adding port %d\n",
9831 ntohs(adapter->geneve_port),
9836 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9837 adapter->geneve_port = port;
9843 reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9844 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9848 * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9849 * @dev: The port's netdev
9850 * @ti: Tunnel endpoint information
9852 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9853 struct udp_tunnel_info *ti)
9855 struct ixgbe_adapter *adapter = netdev_priv(dev);
9858 if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9859 ti->type != UDP_TUNNEL_TYPE_GENEVE)
9862 if (ti->sa_family != AF_INET)
9866 case UDP_TUNNEL_TYPE_VXLAN:
9867 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9870 if (adapter->vxlan_port != ti->port) {
9871 netdev_info(dev, "VXLAN port %d not found\n",
9876 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9878 case UDP_TUNNEL_TYPE_GENEVE:
9879 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9882 if (adapter->geneve_port != ti->port) {
9883 netdev_info(dev, "GENEVE port %d not found\n",
9888 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9894 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9895 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9898 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9899 struct net_device *dev,
9900 const unsigned char *addr, u16 vid,
9902 struct netlink_ext_ack *extack)
9904 /* guarantee we can provide a unique filter for the unicast address */
9905 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9906 struct ixgbe_adapter *adapter = netdev_priv(dev);
9907 u16 pool = VMDQ_P(0);
9909 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9913 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9917 * ixgbe_configure_bridge_mode - set various bridge modes
9918 * @adapter: the private structure
9919 * @mode: requested bridge mode
9921 * Configure some settings require for various bridge modes.
9923 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9926 struct ixgbe_hw *hw = &adapter->hw;
9927 unsigned int p, num_pools;
9931 case BRIDGE_MODE_VEPA:
9932 /* disable Tx loopback, rely on switch hairpin mode */
9933 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9935 /* must enable Rx switching replication to allow multicast
9936 * packet reception on all VFs, and to enable source address
9939 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9940 vmdctl |= IXGBE_VT_CTL_REPLEN;
9941 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9943 /* enable Rx source address pruning. Note, this requires
9944 * replication to be enabled or else it does nothing.
9946 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9947 for (p = 0; p < num_pools; p++) {
9948 if (hw->mac.ops.set_source_address_pruning)
9949 hw->mac.ops.set_source_address_pruning(hw,
9954 case BRIDGE_MODE_VEB:
9955 /* enable Tx loopback for internal VF/PF communication */
9956 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9957 IXGBE_PFDTXGSWC_VT_LBEN);
9959 /* disable Rx switching replication unless we have SR-IOV
9962 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9963 if (!adapter->num_vfs)
9964 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9965 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9967 /* disable Rx source address pruning, since we don't expect to
9968 * be receiving external loopback of our transmitted frames.
9970 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9971 for (p = 0; p < num_pools; p++) {
9972 if (hw->mac.ops.set_source_address_pruning)
9973 hw->mac.ops.set_source_address_pruning(hw,
9982 adapter->bridge_mode = mode;
9984 e_info(drv, "enabling bridge mode: %s\n",
9985 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9990 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9991 struct nlmsghdr *nlh, u16 flags,
9992 struct netlink_ext_ack *extack)
9994 struct ixgbe_adapter *adapter = netdev_priv(dev);
9995 struct nlattr *attr, *br_spec;
9998 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10001 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
10005 nla_for_each_nested(attr, br_spec, rem) {
10009 if (nla_type(attr) != IFLA_BRIDGE_MODE)
10012 if (nla_len(attr) < sizeof(mode))
10015 mode = nla_get_u16(attr);
10016 status = ixgbe_configure_bridge_mode(adapter, mode);
10026 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
10027 struct net_device *dev,
10028 u32 filter_mask, int nlflags)
10030 struct ixgbe_adapter *adapter = netdev_priv(dev);
10032 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10035 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
10036 adapter->bridge_mode, 0, 0, nlflags,
10037 filter_mask, NULL);
10040 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10042 struct ixgbe_adapter *adapter = netdev_priv(pdev);
10043 struct ixgbe_fwd_adapter *accel;
10044 int tcs = adapter->hw_tcs ? : 1;
10047 if (adapter->xdp_prog) {
10048 e_warn(probe, "L2FW offload is not supported with XDP\n");
10049 return ERR_PTR(-EINVAL);
10052 /* The hardware supported by ixgbe only filters on the destination MAC
10053 * address. In order to avoid issues we only support offloading modes
10054 * where the hardware can actually provide the functionality.
10056 if (!macvlan_supports_dest_filter(vdev))
10057 return ERR_PTR(-EMEDIUMTYPE);
10059 /* We need to lock down the macvlan to be a single queue device so that
10060 * we can reuse the tc_to_txq field in the macvlan netdev to represent
10061 * the queue mapping to our netdev.
10063 if (netif_is_multiqueue(vdev))
10064 return ERR_PTR(-ERANGE);
10066 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10067 if (pool == adapter->num_rx_pools) {
10068 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10069 u16 reserved_pools;
10071 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10072 adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10073 adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10074 return ERR_PTR(-EBUSY);
10076 /* Hardware has a limited number of available pools. Each VF,
10077 * and the PF require a pool. Check to ensure we don't
10078 * attempt to use more then the available number of pools.
10080 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10081 return ERR_PTR(-EBUSY);
10083 /* Enable VMDq flag so device will be set in VM mode */
10084 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10085 IXGBE_FLAG_SRIOV_ENABLED;
10087 /* Try to reserve as many queues per pool as possible,
10088 * we start with the configurations that support 4 queues
10089 * per pools, followed by 2, and then by just 1 per pool.
10091 if (used_pools < 32 && adapter->num_rx_pools < 16)
10092 reserved_pools = min_t(u16,
10094 16 - adapter->num_rx_pools);
10095 else if (adapter->num_rx_pools < 32)
10096 reserved_pools = min_t(u16,
10098 32 - adapter->num_rx_pools);
10100 reserved_pools = 64 - used_pools;
10103 if (!reserved_pools)
10104 return ERR_PTR(-EBUSY);
10106 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10108 /* Force reinit of ring allocation with VMDQ enabled */
10109 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10111 return ERR_PTR(err);
10113 if (pool >= adapter->num_rx_pools)
10114 return ERR_PTR(-ENOMEM);
10117 accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10119 return ERR_PTR(-ENOMEM);
10121 set_bit(pool, adapter->fwd_bitmask);
10122 netdev_set_sb_channel(vdev, pool);
10123 accel->pool = pool;
10124 accel->netdev = vdev;
10126 if (!netif_running(pdev))
10129 err = ixgbe_fwd_ring_up(adapter, accel);
10131 return ERR_PTR(err);
10136 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10138 struct ixgbe_fwd_adapter *accel = priv;
10139 struct ixgbe_adapter *adapter = netdev_priv(pdev);
10140 unsigned int rxbase = accel->rx_base_queue;
10143 /* delete unicast filter associated with offloaded interface */
10144 ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10145 VMDQ_P(accel->pool));
10147 /* Allow remaining Rx packets to get flushed out of the
10148 * Rx FIFO before we drop the netdev for the ring.
10150 usleep_range(10000, 20000);
10152 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10153 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10154 struct ixgbe_q_vector *qv = ring->q_vector;
10156 /* Make sure we aren't processing any packets and clear
10157 * netdev to shut down the ring.
10159 if (netif_running(adapter->netdev))
10160 napi_synchronize(&qv->napi);
10161 ring->netdev = NULL;
10164 /* unbind the queues and drop the subordinate channel config */
10165 netdev_unbind_sb_channel(pdev, accel->netdev);
10166 netdev_set_sb_channel(accel->netdev, 0);
10168 clear_bit(accel->pool, adapter->fwd_bitmask);
10172 #define IXGBE_MAX_MAC_HDR_LEN 127
10173 #define IXGBE_MAX_NETWORK_HDR_LEN 511
10175 static netdev_features_t
10176 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10177 netdev_features_t features)
10179 unsigned int network_hdr_len, mac_hdr_len;
10181 /* Make certain the headers can be described by a context descriptor */
10182 mac_hdr_len = skb_network_header(skb) - skb->data;
10183 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10184 return features & ~(NETIF_F_HW_CSUM |
10186 NETIF_F_HW_VLAN_CTAG_TX |
10190 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10191 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN))
10192 return features & ~(NETIF_F_HW_CSUM |
10197 /* We can only support IPV4 TSO in tunnels if we can mangle the
10198 * inner IP ID field, so strip TSO if MANGLEID is not supported.
10199 * IPsec offoad sets skb->encapsulation but still can handle
10200 * the TSO, so it's the exception.
10202 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10203 #ifdef CONFIG_IXGBE_IPSEC
10204 if (!secpath_exists(skb))
10206 features &= ~NETIF_F_TSO;
10212 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10214 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10215 struct ixgbe_adapter *adapter = netdev_priv(dev);
10216 struct bpf_prog *old_prog;
10219 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10222 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10225 /* verify ixgbe ring attributes are sufficient for XDP */
10226 for (i = 0; i < adapter->num_rx_queues; i++) {
10227 struct ixgbe_ring *ring = adapter->rx_ring[i];
10229 if (ring_is_rsc_enabled(ring))
10232 if (frame_size > ixgbe_rx_bufsz(ring))
10236 if (nr_cpu_ids > MAX_XDP_QUEUES)
10239 old_prog = xchg(&adapter->xdp_prog, prog);
10240 need_reset = (!!prog != !!old_prog);
10242 /* If transitioning XDP modes reconfigure rings */
10244 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10247 rcu_assign_pointer(adapter->xdp_prog, old_prog);
10251 for (i = 0; i < adapter->num_rx_queues; i++)
10252 (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10253 adapter->xdp_prog);
10257 bpf_prog_put(old_prog);
10259 /* Kick start the NAPI context if there is an AF_XDP socket open
10260 * on that queue id. This so that receiving will start.
10262 if (need_reset && prog)
10263 for (i = 0; i < adapter->num_rx_queues; i++)
10264 if (adapter->xdp_ring[i]->xsk_umem)
10265 (void)ixgbe_xsk_async_xmit(adapter->netdev, i);
10270 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10272 struct ixgbe_adapter *adapter = netdev_priv(dev);
10274 switch (xdp->command) {
10275 case XDP_SETUP_PROG:
10276 return ixgbe_xdp_setup(dev, xdp->prog);
10277 case XDP_QUERY_PROG:
10278 xdp->prog_id = adapter->xdp_prog ?
10279 adapter->xdp_prog->aux->id : 0;
10281 case XDP_SETUP_XSK_UMEM:
10282 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10283 xdp->xsk.queue_id);
10290 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10292 /* Force memory writes to complete before letting h/w know there
10293 * are new descriptors to fetch.
10296 writel(ring->next_to_use, ring->tail);
10299 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10300 struct xdp_frame **frames, u32 flags)
10302 struct ixgbe_adapter *adapter = netdev_priv(dev);
10303 struct ixgbe_ring *ring;
10307 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10310 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10313 /* During program transitions its possible adapter->xdp_prog is assigned
10314 * but ring has not been configured yet. In this case simply abort xmit.
10316 ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10317 if (unlikely(!ring))
10320 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10323 for (i = 0; i < n; i++) {
10324 struct xdp_frame *xdpf = frames[i];
10327 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10328 if (err != IXGBE_XDP_TX) {
10329 xdp_return_frame_rx_napi(xdpf);
10334 if (unlikely(flags & XDP_XMIT_FLUSH))
10335 ixgbe_xdp_ring_update_tail(ring);
10340 static const struct net_device_ops ixgbe_netdev_ops = {
10341 .ndo_open = ixgbe_open,
10342 .ndo_stop = ixgbe_close,
10343 .ndo_start_xmit = ixgbe_xmit_frame,
10344 .ndo_set_rx_mode = ixgbe_set_rx_mode,
10345 .ndo_validate_addr = eth_validate_addr,
10346 .ndo_set_mac_address = ixgbe_set_mac,
10347 .ndo_change_mtu = ixgbe_change_mtu,
10348 .ndo_tx_timeout = ixgbe_tx_timeout,
10349 .ndo_set_tx_maxrate = ixgbe_tx_maxrate,
10350 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
10351 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
10352 .ndo_do_ioctl = ixgbe_ioctl,
10353 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
10354 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
10355 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
10356 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
10357 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10358 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
10359 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
10360 .ndo_get_stats64 = ixgbe_get_stats64,
10361 .ndo_setup_tc = __ixgbe_setup_tc,
10363 .ndo_select_queue = ixgbe_select_queue,
10364 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10365 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10366 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10367 .ndo_fcoe_enable = ixgbe_fcoe_enable,
10368 .ndo_fcoe_disable = ixgbe_fcoe_disable,
10369 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10370 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10371 #endif /* IXGBE_FCOE */
10372 .ndo_set_features = ixgbe_set_features,
10373 .ndo_fix_features = ixgbe_fix_features,
10374 .ndo_fdb_add = ixgbe_ndo_fdb_add,
10375 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
10376 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
10377 .ndo_dfwd_add_station = ixgbe_fwd_add,
10378 .ndo_dfwd_del_station = ixgbe_fwd_del,
10379 .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port,
10380 .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port,
10381 .ndo_features_check = ixgbe_features_check,
10382 .ndo_bpf = ixgbe_xdp,
10383 .ndo_xdp_xmit = ixgbe_xdp_xmit,
10384 .ndo_xsk_async_xmit = ixgbe_xsk_async_xmit,
10387 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10388 struct ixgbe_ring *tx_ring)
10390 unsigned long wait_delay, delay_interval;
10391 struct ixgbe_hw *hw = &adapter->hw;
10392 u8 reg_idx = tx_ring->reg_idx;
10396 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10398 /* delay mechanism from ixgbe_disable_tx */
10399 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10401 wait_loop = IXGBE_MAX_RX_DESC_POLL;
10402 wait_delay = delay_interval;
10404 while (wait_loop--) {
10405 usleep_range(wait_delay, wait_delay + 10);
10406 wait_delay += delay_interval * 2;
10407 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10409 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10413 e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10416 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10417 struct ixgbe_ring *tx_ring)
10419 set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10420 ixgbe_disable_txr_hw(adapter, tx_ring);
10423 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10424 struct ixgbe_ring *rx_ring)
10426 unsigned long wait_delay, delay_interval;
10427 struct ixgbe_hw *hw = &adapter->hw;
10428 u8 reg_idx = rx_ring->reg_idx;
10432 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10433 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10434 rxdctl |= IXGBE_RXDCTL_SWFLSH;
10436 /* write value back with RXDCTL.ENABLE bit cleared */
10437 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10439 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10440 if (hw->mac.type == ixgbe_mac_82598EB &&
10441 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10444 /* delay mechanism from ixgbe_disable_rx */
10445 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10447 wait_loop = IXGBE_MAX_RX_DESC_POLL;
10448 wait_delay = delay_interval;
10450 while (wait_loop--) {
10451 usleep_range(wait_delay, wait_delay + 10);
10452 wait_delay += delay_interval * 2;
10453 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10455 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10459 e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10462 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10464 memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10465 memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10468 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10470 memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10471 memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10475 * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10476 * @adapter: adapter structure
10477 * @ring: ring index
10479 * This function disables a certain Rx/Tx/XDP Tx ring. The function
10480 * assumes that the netdev is running.
10482 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10484 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10486 rx_ring = adapter->rx_ring[ring];
10487 tx_ring = adapter->tx_ring[ring];
10488 xdp_ring = adapter->xdp_ring[ring];
10490 ixgbe_disable_txr(adapter, tx_ring);
10492 ixgbe_disable_txr(adapter, xdp_ring);
10493 ixgbe_disable_rxr_hw(adapter, rx_ring);
10498 /* Rx/Tx/XDP Tx share the same napi context. */
10499 napi_disable(&rx_ring->q_vector->napi);
10501 ixgbe_clean_tx_ring(tx_ring);
10503 ixgbe_clean_tx_ring(xdp_ring);
10504 ixgbe_clean_rx_ring(rx_ring);
10506 ixgbe_reset_txr_stats(tx_ring);
10508 ixgbe_reset_txr_stats(xdp_ring);
10509 ixgbe_reset_rxr_stats(rx_ring);
10513 * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10514 * @adapter: adapter structure
10515 * @ring: ring index
10517 * This function enables a certain Rx/Tx/XDP Tx ring. The function
10518 * assumes that the netdev is running.
10520 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10522 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10524 rx_ring = adapter->rx_ring[ring];
10525 tx_ring = adapter->tx_ring[ring];
10526 xdp_ring = adapter->xdp_ring[ring];
10528 /* Rx/Tx/XDP Tx share the same napi context. */
10529 napi_enable(&rx_ring->q_vector->napi);
10531 ixgbe_configure_tx_ring(adapter, tx_ring);
10533 ixgbe_configure_tx_ring(adapter, xdp_ring);
10534 ixgbe_configure_rx_ring(adapter, rx_ring);
10536 clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10538 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10542 * ixgbe_enumerate_functions - Get the number of ports this device has
10543 * @adapter: adapter structure
10545 * This function enumerates the phsyical functions co-located on a single slot,
10546 * in order to determine how many ports a device has. This is most useful in
10547 * determining the required GT/s of PCIe bandwidth necessary for optimal
10550 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10552 struct pci_dev *entry, *pdev = adapter->pdev;
10555 /* Some cards can not use the generic count PCIe functions method,
10556 * because they are behind a parent switch, so we hardcode these with
10557 * the correct number of functions.
10559 if (ixgbe_pcie_from_parent(&adapter->hw))
10562 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10563 /* don't count virtual functions */
10564 if (entry->is_virtfn)
10567 /* When the devices on the bus don't all match our device ID,
10568 * we can't reliably determine the correct number of
10569 * functions. This can occur if a function has been direct
10570 * attached to a virtual machine using VT-d, for example. In
10571 * this case, simply return -1 to indicate this.
10573 if ((entry->vendor != pdev->vendor) ||
10574 (entry->device != pdev->device))
10584 * ixgbe_wol_supported - Check whether device supports WoL
10585 * @adapter: the adapter private structure
10586 * @device_id: the device ID
10587 * @subdevice_id: the subsystem device ID
10589 * This function is used by probe and ethtool to determine
10590 * which devices have WoL support
10593 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10596 struct ixgbe_hw *hw = &adapter->hw;
10597 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10599 /* WOL not supported on 82598 */
10600 if (hw->mac.type == ixgbe_mac_82598EB)
10603 /* check eeprom to see if WOL is enabled for X540 and newer */
10604 if (hw->mac.type >= ixgbe_mac_X540) {
10605 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10606 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10607 (hw->bus.func == 0)))
10611 /* WOL is determined based on device IDs for 82599 MACs */
10612 switch (device_id) {
10613 case IXGBE_DEV_ID_82599_SFP:
10614 /* Only these subdevices could supports WOL */
10615 switch (subdevice_id) {
10616 case IXGBE_SUBDEV_ID_82599_560FLR:
10617 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10618 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10619 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10620 /* only support first port */
10621 if (hw->bus.func != 0)
10624 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10625 case IXGBE_SUBDEV_ID_82599_SFP:
10626 case IXGBE_SUBDEV_ID_82599_RNDC:
10627 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10628 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10629 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10630 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10634 case IXGBE_DEV_ID_82599EN_SFP:
10635 /* Only these subdevices support WOL */
10636 switch (subdevice_id) {
10637 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10641 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10642 /* All except this subdevice support WOL */
10643 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10646 case IXGBE_DEV_ID_82599_KX4:
10656 * ixgbe_set_fw_version - Set FW version
10657 * @adapter: the adapter private structure
10659 * This function is used by probe and ethtool to determine the FW version to
10660 * format to display. The FW version is taken from the EEPROM/NVM.
10662 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10664 struct ixgbe_hw *hw = &adapter->hw;
10665 struct ixgbe_nvm_version nvm_ver;
10667 ixgbe_get_oem_prod_version(hw, &nvm_ver);
10668 if (nvm_ver.oem_valid) {
10669 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10670 "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10671 nvm_ver.oem_release);
10675 ixgbe_get_etk_id(hw, &nvm_ver);
10676 ixgbe_get_orom_version(hw, &nvm_ver);
10678 if (nvm_ver.or_valid) {
10679 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10680 "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10681 nvm_ver.or_build, nvm_ver.or_patch);
10685 /* Set ETrack ID format */
10686 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10687 "0x%08x", nvm_ver.etk_id);
10691 * ixgbe_probe - Device Initialization Routine
10692 * @pdev: PCI device information struct
10693 * @ent: entry in ixgbe_pci_tbl
10695 * Returns 0 on success, negative on failure
10697 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10698 * The OS initialization, configuring of the adapter private structure,
10699 * and a hardware reset occur.
10701 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10703 struct net_device *netdev;
10704 struct ixgbe_adapter *adapter = NULL;
10705 struct ixgbe_hw *hw;
10706 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10707 int i, err, pci_using_dac, expected_gts;
10708 unsigned int indices = MAX_TX_QUEUES;
10709 u8 part_str[IXGBE_PBANUM_LENGTH];
10710 bool disable_dev = false;
10716 /* Catch broken hardware that put the wrong VF device ID in
10717 * the PCIe SR-IOV capability.
10719 if (pdev->is_virtfn) {
10720 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10721 pci_name(pdev), pdev->vendor, pdev->device);
10725 err = pci_enable_device_mem(pdev);
10729 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10732 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10734 dev_err(&pdev->dev,
10735 "No usable DMA configuration, aborting\n");
10741 err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10743 dev_err(&pdev->dev,
10744 "pci_request_selected_regions failed 0x%x\n", err);
10748 pci_enable_pcie_error_reporting(pdev);
10750 pci_set_master(pdev);
10751 pci_save_state(pdev);
10753 if (ii->mac == ixgbe_mac_82598EB) {
10754 #ifdef CONFIG_IXGBE_DCB
10755 /* 8 TC w/ 4 queues per TC */
10756 indices = 4 * MAX_TRAFFIC_CLASS;
10758 indices = IXGBE_MAX_RSS_INDICES;
10762 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10765 goto err_alloc_etherdev;
10768 SET_NETDEV_DEV(netdev, &pdev->dev);
10770 adapter = netdev_priv(netdev);
10772 adapter->netdev = netdev;
10773 adapter->pdev = pdev;
10775 hw->back = adapter;
10776 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10778 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10779 pci_resource_len(pdev, 0));
10780 adapter->io_addr = hw->hw_addr;
10781 if (!hw->hw_addr) {
10786 netdev->netdev_ops = &ixgbe_netdev_ops;
10787 ixgbe_set_ethtool_ops(netdev);
10788 netdev->watchdog_timeo = 5 * HZ;
10789 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10792 hw->mac.ops = *ii->mac_ops;
10793 hw->mac.type = ii->mac;
10794 hw->mvals = ii->mvals;
10796 hw->link.ops = *ii->link_ops;
10799 hw->eeprom.ops = *ii->eeprom_ops;
10800 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10801 if (ixgbe_removed(hw->hw_addr)) {
10805 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10806 if (!(eec & BIT(8)))
10807 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10810 hw->phy.ops = *ii->phy_ops;
10811 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10812 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10813 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10814 hw->phy.mdio.mmds = 0;
10815 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10816 hw->phy.mdio.dev = netdev;
10817 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10818 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10820 /* setup the private structure */
10821 err = ixgbe_sw_init(adapter, ii);
10825 /* Make sure the SWFW semaphore is in a valid state */
10826 if (hw->mac.ops.init_swfw_sync)
10827 hw->mac.ops.init_swfw_sync(hw);
10829 /* Make it possible the adapter to be woken up via WOL */
10830 switch (adapter->hw.mac.type) {
10831 case ixgbe_mac_82599EB:
10832 case ixgbe_mac_X540:
10833 case ixgbe_mac_X550:
10834 case ixgbe_mac_X550EM_x:
10835 case ixgbe_mac_x550em_a:
10836 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10843 * If there is a fan on this device and it has failed log the
10846 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10847 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10848 if (esdp & IXGBE_ESDP_SDP1)
10849 e_crit(probe, "Fan has stopped, replace the adapter\n");
10852 if (allow_unsupported_sfp)
10853 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10855 /* reset_hw fills in the perm_addr as well */
10856 hw->phy.reset_if_overtemp = true;
10857 err = hw->mac.ops.reset_hw(hw);
10858 hw->phy.reset_if_overtemp = false;
10859 ixgbe_set_eee_capable(adapter);
10860 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10862 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10863 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10864 e_dev_err("Reload the driver after installing a supported module.\n");
10867 e_dev_err("HW Init failed: %d\n", err);
10871 #ifdef CONFIG_PCI_IOV
10872 /* SR-IOV not supported on the 82598 */
10873 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10876 ixgbe_init_mbx_params_pf(hw);
10877 hw->mbx.ops = ii->mbx_ops;
10878 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10879 ixgbe_enable_sriov(adapter, max_vfs);
10883 netdev->features = NETIF_F_SG |
10890 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10891 NETIF_F_GSO_GRE_CSUM | \
10892 NETIF_F_GSO_IPXIP4 | \
10893 NETIF_F_GSO_IPXIP6 | \
10894 NETIF_F_GSO_UDP_TUNNEL | \
10895 NETIF_F_GSO_UDP_TUNNEL_CSUM)
10897 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10898 netdev->features |= NETIF_F_GSO_PARTIAL |
10899 IXGBE_GSO_PARTIAL_FEATURES;
10901 if (hw->mac.type >= ixgbe_mac_82599EB)
10902 netdev->features |= NETIF_F_SCTP_CRC;
10904 #ifdef CONFIG_IXGBE_IPSEC
10905 #define IXGBE_ESP_FEATURES (NETIF_F_HW_ESP | \
10906 NETIF_F_HW_ESP_TX_CSUM | \
10909 if (adapter->ipsec)
10910 netdev->features |= IXGBE_ESP_FEATURES;
10912 /* copy netdev features into list of user selectable features */
10913 netdev->hw_features |= netdev->features |
10914 NETIF_F_HW_VLAN_CTAG_FILTER |
10915 NETIF_F_HW_VLAN_CTAG_RX |
10916 NETIF_F_HW_VLAN_CTAG_TX |
10918 NETIF_F_HW_L2FW_DOFFLOAD;
10920 if (hw->mac.type >= ixgbe_mac_82599EB)
10921 netdev->hw_features |= NETIF_F_NTUPLE |
10925 netdev->features |= NETIF_F_HIGHDMA;
10927 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10928 netdev->hw_enc_features |= netdev->vlan_features;
10929 netdev->mpls_features |= NETIF_F_SG |
10933 netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10935 /* set this bit last since it cannot be part of vlan_features */
10936 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10937 NETIF_F_HW_VLAN_CTAG_RX |
10938 NETIF_F_HW_VLAN_CTAG_TX;
10940 netdev->priv_flags |= IFF_UNICAST_FLT;
10941 netdev->priv_flags |= IFF_SUPP_NOFCS;
10943 /* MTU range: 68 - 9710 */
10944 netdev->min_mtu = ETH_MIN_MTU;
10945 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10947 #ifdef CONFIG_IXGBE_DCB
10948 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10949 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10953 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10954 unsigned int fcoe_l;
10956 if (hw->mac.ops.get_device_caps) {
10957 hw->mac.ops.get_device_caps(hw, &device_caps);
10958 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10959 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10963 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10964 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10966 netdev->features |= NETIF_F_FSO |
10969 netdev->vlan_features |= NETIF_F_FSO |
10973 #endif /* IXGBE_FCOE */
10974 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10975 netdev->hw_features |= NETIF_F_LRO;
10976 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10977 netdev->features |= NETIF_F_LRO;
10979 if (ixgbe_check_fw_error(adapter)) {
10984 /* make sure the EEPROM is good */
10985 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10986 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10991 eth_platform_get_mac_address(&adapter->pdev->dev,
10992 adapter->hw.mac.perm_addr);
10994 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10996 if (!is_valid_ether_addr(netdev->dev_addr)) {
10997 e_dev_err("invalid MAC address\n");
11002 /* Set hw->mac.addr to permanent MAC address */
11003 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
11004 ixgbe_mac_set_default_filter(adapter);
11006 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
11008 if (ixgbe_removed(hw->hw_addr)) {
11012 INIT_WORK(&adapter->service_task, ixgbe_service_task);
11013 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
11014 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
11016 err = ixgbe_init_interrupt_scheme(adapter);
11020 for (i = 0; i < adapter->num_rx_queues; i++)
11021 u64_stats_init(&adapter->rx_ring[i]->syncp);
11022 for (i = 0; i < adapter->num_tx_queues; i++)
11023 u64_stats_init(&adapter->tx_ring[i]->syncp);
11024 for (i = 0; i < adapter->num_xdp_queues; i++)
11025 u64_stats_init(&adapter->xdp_ring[i]->syncp);
11027 /* WOL not supported for all devices */
11029 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
11030 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
11031 pdev->subsystem_device);
11032 if (hw->wol_enabled)
11033 adapter->wol = IXGBE_WUFC_MAG;
11035 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
11037 /* save off EEPROM version number */
11038 ixgbe_set_fw_version(adapter);
11040 /* pick up the PCI bus settings for reporting later */
11041 if (ixgbe_pcie_from_parent(hw))
11042 ixgbe_get_parent_bus_info(adapter);
11044 hw->mac.ops.get_bus_info(hw);
11046 /* calculate the expected PCIe bandwidth required for optimal
11047 * performance. Note that some older parts will never have enough
11048 * bandwidth due to being older generation PCIe parts. We clamp these
11049 * parts to ensure no warning is displayed if it can't be fixed.
11051 switch (hw->mac.type) {
11052 case ixgbe_mac_82598EB:
11053 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
11056 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
11060 /* don't check link if we failed to enumerate functions */
11061 if (expected_gts > 0)
11062 ixgbe_check_minimum_link(adapter, expected_gts);
11064 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11066 strlcpy(part_str, "Unknown", sizeof(part_str));
11067 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
11068 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
11069 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
11072 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11073 hw->mac.type, hw->phy.type, part_str);
11075 e_dev_info("%pM\n", netdev->dev_addr);
11077 /* reset the hardware with the new settings */
11078 err = hw->mac.ops.start_hw(hw);
11079 if (err == IXGBE_ERR_EEPROM_VERSION) {
11080 /* We are running on a pre-production device, log a warning */
11081 e_dev_warn("This device is a pre-production adapter/LOM. "
11082 "Please be aware there may be issues associated "
11083 "with your hardware. If you are experiencing "
11084 "problems please contact your Intel or hardware "
11085 "representative who provided you with this "
11088 strcpy(netdev->name, "eth%d");
11089 pci_set_drvdata(pdev, adapter);
11090 err = register_netdev(netdev);
11095 /* power down the optics for 82599 SFP+ fiber */
11096 if (hw->mac.ops.disable_tx_laser)
11097 hw->mac.ops.disable_tx_laser(hw);
11099 /* carrier off reporting is important to ethtool even BEFORE open */
11100 netif_carrier_off(netdev);
11102 #ifdef CONFIG_IXGBE_DCA
11103 if (dca_add_requester(&pdev->dev) == 0) {
11104 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11105 ixgbe_setup_dca(adapter);
11108 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11109 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11110 for (i = 0; i < adapter->num_vfs; i++)
11111 ixgbe_vf_configuration(pdev, (i | 0x10000000));
11114 /* firmware requires driver version to be 0xFFFFFFFF
11115 * since os does not support feature
11117 if (hw->mac.ops.set_fw_drv_ver)
11118 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11119 sizeof(ixgbe_driver_version) - 1,
11120 ixgbe_driver_version);
11122 /* add san mac addr to netdev */
11123 ixgbe_add_sanmac_netdev(netdev);
11125 e_dev_info("%s\n", ixgbe_default_device_descr);
11127 #ifdef CONFIG_IXGBE_HWMON
11128 if (ixgbe_sysfs_init(adapter))
11129 e_err(probe, "failed to allocate sysfs resources\n");
11130 #endif /* CONFIG_IXGBE_HWMON */
11132 ixgbe_dbg_adapter_init(adapter);
11134 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11135 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11136 hw->mac.ops.setup_link(hw,
11137 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11140 ixgbe_mii_bus_init(hw);
11145 ixgbe_release_hw_control(adapter);
11146 ixgbe_clear_interrupt_scheme(adapter);
11148 ixgbe_disable_sriov(adapter);
11149 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11150 iounmap(adapter->io_addr);
11151 kfree(adapter->jump_tables[0]);
11152 kfree(adapter->mac_table);
11153 kfree(adapter->rss_key);
11154 bitmap_free(adapter->af_xdp_zc_qps);
11156 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11157 free_netdev(netdev);
11158 err_alloc_etherdev:
11159 pci_release_mem_regions(pdev);
11162 if (!adapter || disable_dev)
11163 pci_disable_device(pdev);
11168 * ixgbe_remove - Device Removal Routine
11169 * @pdev: PCI device information struct
11171 * ixgbe_remove is called by the PCI subsystem to alert the driver
11172 * that it should release a PCI device. The could be caused by a
11173 * Hot-Plug event, or because the driver is going to be removed from
11176 static void ixgbe_remove(struct pci_dev *pdev)
11178 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11179 struct net_device *netdev;
11183 /* if !adapter then we already cleaned up in probe */
11187 netdev = adapter->netdev;
11188 ixgbe_dbg_adapter_exit(adapter);
11190 set_bit(__IXGBE_REMOVING, &adapter->state);
11191 cancel_work_sync(&adapter->service_task);
11193 if (adapter->mii_bus)
11194 mdiobus_unregister(adapter->mii_bus);
11196 #ifdef CONFIG_IXGBE_DCA
11197 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11198 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11199 dca_remove_requester(&pdev->dev);
11200 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11201 IXGBE_DCA_CTRL_DCA_DISABLE);
11205 #ifdef CONFIG_IXGBE_HWMON
11206 ixgbe_sysfs_exit(adapter);
11207 #endif /* CONFIG_IXGBE_HWMON */
11209 /* remove the added san mac */
11210 ixgbe_del_sanmac_netdev(netdev);
11212 #ifdef CONFIG_PCI_IOV
11213 ixgbe_disable_sriov(adapter);
11215 if (netdev->reg_state == NETREG_REGISTERED)
11216 unregister_netdev(netdev);
11218 ixgbe_stop_ipsec_offload(adapter);
11219 ixgbe_clear_interrupt_scheme(adapter);
11221 ixgbe_release_hw_control(adapter);
11224 kfree(adapter->ixgbe_ieee_pfc);
11225 kfree(adapter->ixgbe_ieee_ets);
11228 iounmap(adapter->io_addr);
11229 pci_release_mem_regions(pdev);
11231 e_dev_info("complete\n");
11233 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11234 if (adapter->jump_tables[i]) {
11235 kfree(adapter->jump_tables[i]->input);
11236 kfree(adapter->jump_tables[i]->mask);
11238 kfree(adapter->jump_tables[i]);
11241 kfree(adapter->mac_table);
11242 kfree(adapter->rss_key);
11243 bitmap_free(adapter->af_xdp_zc_qps);
11244 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11245 free_netdev(netdev);
11247 pci_disable_pcie_error_reporting(pdev);
11250 pci_disable_device(pdev);
11254 * ixgbe_io_error_detected - called when PCI error is detected
11255 * @pdev: Pointer to PCI device
11256 * @state: The current pci connection state
11258 * This function is called after a PCI bus error affecting
11259 * this device has been detected.
11261 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11262 pci_channel_state_t state)
11264 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11265 struct net_device *netdev = adapter->netdev;
11267 #ifdef CONFIG_PCI_IOV
11268 struct ixgbe_hw *hw = &adapter->hw;
11269 struct pci_dev *bdev, *vfdev;
11270 u32 dw0, dw1, dw2, dw3;
11272 u16 req_id, pf_func;
11274 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11275 adapter->num_vfs == 0)
11276 goto skip_bad_vf_detection;
11278 bdev = pdev->bus->self;
11279 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11280 bdev = bdev->bus->self;
11283 goto skip_bad_vf_detection;
11285 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11287 goto skip_bad_vf_detection;
11289 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11290 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11291 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11292 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11293 if (ixgbe_removed(hw->hw_addr))
11294 goto skip_bad_vf_detection;
11296 req_id = dw1 >> 16;
11297 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11298 if (!(req_id & 0x0080))
11299 goto skip_bad_vf_detection;
11301 pf_func = req_id & 0x01;
11302 if ((pf_func & 1) == (pdev->devfn & 1)) {
11303 unsigned int device_id;
11305 vf = (req_id & 0x7F) >> 1;
11306 e_dev_err("VF %d has caused a PCIe error\n", vf);
11307 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11308 "%8.8x\tdw3: %8.8x\n",
11309 dw0, dw1, dw2, dw3);
11310 switch (adapter->hw.mac.type) {
11311 case ixgbe_mac_82599EB:
11312 device_id = IXGBE_82599_VF_DEVICE_ID;
11314 case ixgbe_mac_X540:
11315 device_id = IXGBE_X540_VF_DEVICE_ID;
11317 case ixgbe_mac_X550:
11318 device_id = IXGBE_DEV_ID_X550_VF;
11320 case ixgbe_mac_X550EM_x:
11321 device_id = IXGBE_DEV_ID_X550EM_X_VF;
11323 case ixgbe_mac_x550em_a:
11324 device_id = IXGBE_DEV_ID_X550EM_A_VF;
11331 /* Find the pci device of the offending VF */
11332 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11334 if (vfdev->devfn == (req_id & 0xFF))
11336 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11340 * There's a slim chance the VF could have been hot plugged,
11341 * so if it is no longer present we don't need to issue the
11342 * VFLR. Just clean up the AER in that case.
11346 /* Free device reference count */
11347 pci_dev_put(vfdev);
11352 * Even though the error may have occurred on the other port
11353 * we still need to increment the vf error reference count for
11354 * both ports because the I/O resume function will be called
11355 * for both of them.
11357 adapter->vferr_refcount++;
11359 return PCI_ERS_RESULT_RECOVERED;
11361 skip_bad_vf_detection:
11362 #endif /* CONFIG_PCI_IOV */
11363 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11364 return PCI_ERS_RESULT_DISCONNECT;
11366 if (!netif_device_present(netdev))
11367 return PCI_ERS_RESULT_DISCONNECT;
11370 netif_device_detach(netdev);
11372 if (netif_running(netdev))
11373 ixgbe_close_suspend(adapter);
11375 if (state == pci_channel_io_perm_failure) {
11377 return PCI_ERS_RESULT_DISCONNECT;
11380 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11381 pci_disable_device(pdev);
11384 /* Request a slot reset. */
11385 return PCI_ERS_RESULT_NEED_RESET;
11389 * ixgbe_io_slot_reset - called after the pci bus has been reset.
11390 * @pdev: Pointer to PCI device
11392 * Restart the card from scratch, as if from a cold-boot.
11394 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11396 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11397 pci_ers_result_t result;
11399 if (pci_enable_device_mem(pdev)) {
11400 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11401 result = PCI_ERS_RESULT_DISCONNECT;
11403 smp_mb__before_atomic();
11404 clear_bit(__IXGBE_DISABLED, &adapter->state);
11405 adapter->hw.hw_addr = adapter->io_addr;
11406 pci_set_master(pdev);
11407 pci_restore_state(pdev);
11408 pci_save_state(pdev);
11410 pci_wake_from_d3(pdev, false);
11412 ixgbe_reset(adapter);
11413 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11414 result = PCI_ERS_RESULT_RECOVERED;
11421 * ixgbe_io_resume - called when traffic can start flowing again.
11422 * @pdev: Pointer to PCI device
11424 * This callback is called when the error recovery driver tells us that
11425 * its OK to resume normal operation.
11427 static void ixgbe_io_resume(struct pci_dev *pdev)
11429 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11430 struct net_device *netdev = adapter->netdev;
11432 #ifdef CONFIG_PCI_IOV
11433 if (adapter->vferr_refcount) {
11434 e_info(drv, "Resuming after VF err\n");
11435 adapter->vferr_refcount--;
11441 if (netif_running(netdev))
11442 ixgbe_open(netdev);
11444 netif_device_attach(netdev);
11448 static const struct pci_error_handlers ixgbe_err_handler = {
11449 .error_detected = ixgbe_io_error_detected,
11450 .slot_reset = ixgbe_io_slot_reset,
11451 .resume = ixgbe_io_resume,
11454 static struct pci_driver ixgbe_driver = {
11455 .name = ixgbe_driver_name,
11456 .id_table = ixgbe_pci_tbl,
11457 .probe = ixgbe_probe,
11458 .remove = ixgbe_remove,
11460 .suspend = ixgbe_suspend,
11461 .resume = ixgbe_resume,
11463 .shutdown = ixgbe_shutdown,
11464 .sriov_configure = ixgbe_pci_sriov_configure,
11465 .err_handler = &ixgbe_err_handler
11469 * ixgbe_init_module - Driver Registration Routine
11471 * ixgbe_init_module is the first routine called when the driver is
11472 * loaded. All it does is register with the PCI subsystem.
11474 static int __init ixgbe_init_module(void)
11477 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11478 pr_info("%s\n", ixgbe_copyright);
11480 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11482 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11488 ret = pci_register_driver(&ixgbe_driver);
11490 destroy_workqueue(ixgbe_wq);
11495 #ifdef CONFIG_IXGBE_DCA
11496 dca_register_notify(&dca_notifier);
11502 module_init(ixgbe_init_module);
11505 * ixgbe_exit_module - Driver Exit Cleanup Routine
11507 * ixgbe_exit_module is called just before the driver is removed
11510 static void __exit ixgbe_exit_module(void)
11512 #ifdef CONFIG_IXGBE_DCA
11513 dca_unregister_notify(&dca_notifier);
11515 pci_unregister_driver(&ixgbe_driver);
11519 destroy_workqueue(ixgbe_wq);
11524 #ifdef CONFIG_IXGBE_DCA
11525 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11530 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11531 __ixgbe_notify_dca);
11533 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11536 #endif /* CONFIG_IXGBE_DCA */
11538 module_exit(ixgbe_exit_module);