drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <linux/bpf.h>
  53 #include <linux/bpf_trace.h>
  54 #include <linux/atomic.h>
  55 #include <scsi/fc/fc_fcoe.h>
  56 #include <net/udp_tunnel.h>
  57 #include <net/pkt_cls.h>
  58 #include <net/tc_act/tc_gact.h>
  59 #include <net/tc_act/tc_mirred.h>
  60 #include <net/vxlan.h>
  61 #include <net/mpls.h>
  62
  63 #include "ixgbe.h"
  64 #include "ixgbe_common.h"
  65 #include "ixgbe_dcb_82599.h"
  66 #include "ixgbe_sriov.h"
  67 #include "ixgbe_model.h"
  68
  69 char ixgbe_driver_name[] = "ixgbe";
  70 static const char ixgbe_driver_string[] =
  71                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  72 #ifdef IXGBE_FCOE
  73 char ixgbe_default_device_descr[] =
  74                               "Intel(R) 10 Gigabit Network Connection";
  75 #else
  76 static char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #endif
  79 #define DRV_VERSION "5.1.0-k"
  80 const char ixgbe_driver_version[] = DRV_VERSION;
  81 static const char ixgbe_copyright[] =
  82                                 "Copyright (c) 1999-2016 Intel Corporation.";
  83
  84 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  85
  86 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  87         [board_82598]           = &ixgbe_82598_info,
  88         [board_82599]           = &ixgbe_82599_info,
  89         [board_X540]            = &ixgbe_X540_info,
  90         [board_X550]            = &ixgbe_X550_info,
  91         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  92         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  93         [board_x550em_a]        = &ixgbe_x550em_a_info,
  94         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 141         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 142         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 143         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 144         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 145         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 146         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 147         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 148         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 149         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 150         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 151         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 152         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 153         /* required last entry */
 154         {0, }
 155 };
 156 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 157
 158 #ifdef CONFIG_IXGBE_DCA
 159 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 160                             void *p);
 161 static struct notifier_block dca_notifier = {
 162         .notifier_call = ixgbe_notify_dca,
 163         .next          = NULL,
 164         .priority      = 0
 165 };
 166 #endif
 167
 168 #ifdef CONFIG_PCI_IOV
 169 static unsigned int max_vfs;
 170 module_param(max_vfs, uint, 0);
 171 MODULE_PARM_DESC(max_vfs,
 172                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 173 #endif /* CONFIG_PCI_IOV */
 174
 175 static unsigned int allow_unsupported_sfp;
 176 module_param(allow_unsupported_sfp, uint, 0);
 177 MODULE_PARM_DESC(allow_unsupported_sfp,
 178                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 179
 180 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 181 static int debug = -1;
 182 module_param(debug, int, 0);
 183 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 184
 185 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 186 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 187 MODULE_LICENSE("GPL");
 188 MODULE_VERSION(DRV_VERSION);
 189
 190 static struct workqueue_struct *ixgbe_wq;
 191
 192 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 193 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 194
 195 static const struct net_device_ops ixgbe_netdev_ops;
 196
 197 static bool netif_is_ixgbe(struct net_device *dev)
 198 {
 199         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 200 }
 201
 202 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 203                                           u32 reg, u16 *value)
 204 {
 205         struct pci_dev *parent_dev;
 206         struct pci_bus *parent_bus;
 207
 208         parent_bus = adapter->pdev->bus->parent;
 209         if (!parent_bus)
 210                 return -1;
 211
 212         parent_dev = parent_bus->self;
 213         if (!parent_dev)
 214                 return -1;
 215
 216         if (!pci_is_pcie(parent_dev))
 217                 return -1;
 218
 219         pcie_capability_read_word(parent_dev, reg, value);
 220         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 221             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 222                 return -1;
 223         return 0;
 224 }
 225
 226 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 227 {
 228         struct ixgbe_hw *hw = &adapter->hw;
 229         u16 link_status = 0;
 230         int err;
 231
 232         hw->bus.type = ixgbe_bus_type_pci_express;
 233
 234         /* Get the negotiated link width and speed from PCI config space of the
 235          * parent, as this device is behind a switch
 236          */
 237         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 238
 239         /* assume caller will handle error case */
 240         if (err)
 241                 return err;
 242
 243         hw->bus.width = ixgbe_convert_bus_width(link_status);
 244         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 245
 246         return 0;
 247 }
 248
 249 /**
 250  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 251  * @hw: hw specific details
 252  *
 253  * This function is used by probe to determine whether a device's PCI-Express
 254  * bandwidth details should be gathered from the parent bus instead of from the
 255  * device. Used to ensure that various locations all have the correct device ID
 256  * checks.
 257  */
 258 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 259 {
 260         switch (hw->device_id) {
 261         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 262         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 263                 return true;
 264         default:
 265                 return false;
 266         }
 267 }
 268
 269 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 270                                      int expected_gts)
 271 {
 272         struct ixgbe_hw *hw = &adapter->hw;
 273         int max_gts = 0;
 274         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 275         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 276         struct pci_dev *pdev;
 277
 278         /* Some devices are not connected over PCIe and thus do not negotiate
 279          * speed. These devices do not have valid bus info, and thus any report
 280          * we generate may not be correct.
 281          */
 282         if (hw->bus.type == ixgbe_bus_type_internal)
 283                 return;
 284
 285         /* determine whether to use the parent device */
 286         if (ixgbe_pcie_from_parent(&adapter->hw))
 287                 pdev = adapter->pdev->bus->parent->self;
 288         else
 289                 pdev = adapter->pdev;
 290
 291         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 292             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 293                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 294                 return;
 295         }
 296
 297         switch (speed) {
 298         case PCIE_SPEED_2_5GT:
 299                 /* 8b/10b encoding reduces max throughput by 20% */
 300                 max_gts = 2 * width;
 301                 break;
 302         case PCIE_SPEED_5_0GT:
 303                 /* 8b/10b encoding reduces max throughput by 20% */
 304                 max_gts = 4 * width;
 305                 break;
 306         case PCIE_SPEED_8_0GT:
 307                 /* 128b/130b encoding reduces throughput by less than 2% */
 308                 max_gts = 8 * width;
 309                 break;
 310         default:
 311                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 312                 return;
 313         }
 314
 315         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 316                    max_gts);
 317         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 318                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 319                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 320                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 321                     "Unknown"),
 322                    width,
 323                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 324                     speed == PCIE_SPEED_5_0GT ? "20%" :
 325                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 326                     "Unknown"));
 327
 328         if (max_gts < expected_gts) {
 329                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 330                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 331                         expected_gts);
 332                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 333         }
 334 }
 335
 336 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 337 {
 338         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 339             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 340             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 341                 queue_work(ixgbe_wq, &adapter->service_task);
 342 }
 343
 344 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 345 {
 346         struct ixgbe_adapter *adapter = hw->back;
 347
 348         if (!hw->hw_addr)
 349                 return;
 350         hw->hw_addr = NULL;
 351         e_dev_err("Adapter removed\n");
 352         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 353                 ixgbe_service_event_schedule(adapter);
 354 }
 355
 356 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 357 {
 358         u32 value;
 359
 360         /* The following check not only optimizes a bit by not
 361          * performing a read on the status register when the
 362          * register just read was a status register read that
 363          * returned IXGBE_FAILED_READ_REG. It also blocks any
 364          * potential recursion.
 365          */
 366         if (reg == IXGBE_STATUS) {
 367                 ixgbe_remove_adapter(hw);
 368                 return;
 369         }
 370         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 371         if (value == IXGBE_FAILED_READ_REG)
 372                 ixgbe_remove_adapter(hw);
 373 }
 374
 375 /**
 376  * ixgbe_read_reg - Read from device register
 377  * @hw: hw specific details
 378  * @reg: offset of register to read
 379  *
 380  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 381  *
 382  * This function is used to read device registers. It checks for device
 383  * removal by confirming any read that returns all ones by checking the
 384  * status register value for all ones. This function avoids reading from
 385  * the hardware if a removal was previously detected in which case it
 386  * returns IXGBE_FAILED_READ_REG (all ones).
 387  */
 388 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 389 {
 390         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 391         u32 value;
 392
 393         if (ixgbe_removed(reg_addr))
 394                 return IXGBE_FAILED_READ_REG;
 395         if (unlikely(hw->phy.nw_mng_if_sel &
 396                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 397                 struct ixgbe_adapter *adapter;
 398                 int i;
 399
 400                 for (i = 0; i < 200; ++i) {
 401                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 402                         if (likely(!value))
 403                                 goto writes_completed;
 404                         if (value == IXGBE_FAILED_READ_REG) {
 405                                 ixgbe_remove_adapter(hw);
 406                                 return IXGBE_FAILED_READ_REG;
 407                         }
 408                         udelay(5);
 409                 }
 410
 411                 adapter = hw->back;
 412                 e_warn(hw, "register writes incomplete %08x\n", value);
 413         }
 414
 415 writes_completed:
 416         value = readl(reg_addr + reg);
 417         if (unlikely(value == IXGBE_FAILED_READ_REG))
 418                 ixgbe_check_remove(hw, reg);
 419         return value;
 420 }
 421
 422 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 423 {
 424         u16 value;
 425
 426         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 427         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 428                 ixgbe_remove_adapter(hw);
 429                 return true;
 430         }
 431         return false;
 432 }
 433
 434 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 435 {
 436         struct ixgbe_adapter *adapter = hw->back;
 437         u16 value;
 438
 439         if (ixgbe_removed(hw->hw_addr))
 440                 return IXGBE_FAILED_READ_CFG_WORD;
 441         pci_read_config_word(adapter->pdev, reg, &value);
 442         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 443             ixgbe_check_cfg_remove(hw, adapter->pdev))
 444                 return IXGBE_FAILED_READ_CFG_WORD;
 445         return value;
 446 }
 447
 448 #ifdef CONFIG_PCI_IOV
 449 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 450 {
 451         struct ixgbe_adapter *adapter = hw->back;
 452         u32 value;
 453
 454         if (ixgbe_removed(hw->hw_addr))
 455                 return IXGBE_FAILED_READ_CFG_DWORD;
 456         pci_read_config_dword(adapter->pdev, reg, &value);
 457         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 458             ixgbe_check_cfg_remove(hw, adapter->pdev))
 459                 return IXGBE_FAILED_READ_CFG_DWORD;
 460         return value;
 461 }
 462 #endif /* CONFIG_PCI_IOV */
 463
 464 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 465 {
 466         struct ixgbe_adapter *adapter = hw->back;
 467
 468         if (ixgbe_removed(hw->hw_addr))
 469                 return;
 470         pci_write_config_word(adapter->pdev, reg, value);
 471 }
 472
 473 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 474 {
 475         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 476
 477         /* flush memory to make sure state is correct before next watchdog */
 478         smp_mb__before_atomic();
 479         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 480 }
 481
 482 struct ixgbe_reg_info {
 483         u32 ofs;
 484         char *name;
 485 };
 486
 487 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 488
 489         /* General Registers */
 490         {IXGBE_CTRL, "CTRL"},
 491         {IXGBE_STATUS, "STATUS"},
 492         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 493
 494         /* Interrupt Registers */
 495         {IXGBE_EICR, "EICR"},
 496
 497         /* RX Registers */
 498         {IXGBE_SRRCTL(0), "SRRCTL"},
 499         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 500         {IXGBE_RDLEN(0), "RDLEN"},
 501         {IXGBE_RDH(0), "RDH"},
 502         {IXGBE_RDT(0), "RDT"},
 503         {IXGBE_RXDCTL(0), "RXDCTL"},
 504         {IXGBE_RDBAL(0), "RDBAL"},
 505         {IXGBE_RDBAH(0), "RDBAH"},
 506
 507         /* TX Registers */
 508         {IXGBE_TDBAL(0), "TDBAL"},
 509         {IXGBE_TDBAH(0), "TDBAH"},
 510         {IXGBE_TDLEN(0), "TDLEN"},
 511         {IXGBE_TDH(0), "TDH"},
 512         {IXGBE_TDT(0), "TDT"},
 513         {IXGBE_TXDCTL(0), "TXDCTL"},
 514
 515         /* List Terminator */
 516         { .name = NULL }
 517 };
 518
 519
 520 /*
 521  * ixgbe_regdump - register printout routine
 522  */
 523 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 524 {
 525         int i;
 526         char rname[16];
 527         u32 regs[64];
 528
 529         switch (reginfo->ofs) {
 530         case IXGBE_SRRCTL(0):
 531                 for (i = 0; i < 64; i++)
 532                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 533                 break;
 534         case IXGBE_DCA_RXCTRL(0):
 535                 for (i = 0; i < 64; i++)
 536                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 537                 break;
 538         case IXGBE_RDLEN(0):
 539                 for (i = 0; i < 64; i++)
 540                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 541                 break;
 542         case IXGBE_RDH(0):
 543                 for (i = 0; i < 64; i++)
 544                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 545                 break;
 546         case IXGBE_RDT(0):
 547                 for (i = 0; i < 64; i++)
 548                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 549                 break;
 550         case IXGBE_RXDCTL(0):
 551                 for (i = 0; i < 64; i++)
 552                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 553                 break;
 554         case IXGBE_RDBAL(0):
 555                 for (i = 0; i < 64; i++)
 556                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 557                 break;
 558         case IXGBE_RDBAH(0):
 559                 for (i = 0; i < 64; i++)
 560                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 561                 break;
 562         case IXGBE_TDBAL(0):
 563                 for (i = 0; i < 64; i++)
 564                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 565                 break;
 566         case IXGBE_TDBAH(0):
 567                 for (i = 0; i < 64; i++)
 568                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 569                 break;
 570         case IXGBE_TDLEN(0):
 571                 for (i = 0; i < 64; i++)
 572                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 573                 break;
 574         case IXGBE_TDH(0):
 575                 for (i = 0; i < 64; i++)
 576                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 577                 break;
 578         case IXGBE_TDT(0):
 579                 for (i = 0; i < 64; i++)
 580                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 581                 break;
 582         case IXGBE_TXDCTL(0):
 583                 for (i = 0; i < 64; i++)
 584                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 585                 break;
 586         default:
 587                 pr_info("%-15s %08x\n",
 588                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 589                 return;
 590         }
 591
 592         i = 0;
 593         while (i < 64) {
 594                 int j;
 595                 char buf[9 * 8 + 1];
 596                 char *p = buf;
 597
 598                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 599                 for (j = 0; j < 8; j++)
 600                         p += sprintf(p, " %08x", regs[i++]);
 601                 pr_err("%-15s%s\n", rname, buf);
 602         }
 603
 604 }
 605
 606 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 607 {
 608         struct ixgbe_tx_buffer *tx_buffer;
 609
 610         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 611         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 612                 n, ring->next_to_use, ring->next_to_clean,
 613                 (u64)dma_unmap_addr(tx_buffer, dma),
 614                 dma_unmap_len(tx_buffer, len),
 615                 tx_buffer->next_to_watch,
 616                 (u64)tx_buffer->time_stamp);
 617 }
 618
 619 /*
 620  * ixgbe_dump - Print registers, tx-rings and rx-rings
 621  */
 622 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 623 {
 624         struct net_device *netdev = adapter->netdev;
 625         struct ixgbe_hw *hw = &adapter->hw;
 626         struct ixgbe_reg_info *reginfo;
 627         int n = 0;
 628         struct ixgbe_ring *ring;
 629         struct ixgbe_tx_buffer *tx_buffer;
 630         union ixgbe_adv_tx_desc *tx_desc;
 631         struct my_u0 { u64 a; u64 b; } *u0;
 632         struct ixgbe_ring *rx_ring;
 633         union ixgbe_adv_rx_desc *rx_desc;
 634         struct ixgbe_rx_buffer *rx_buffer_info;
 635         int i = 0;
 636
 637         if (!netif_msg_hw(adapter))
 638                 return;
 639
 640         /* Print netdevice Info */
 641         if (netdev) {
 642                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 643                 pr_info("Device Name     state            "
 644                         "trans_start\n");
 645                 pr_info("%-15s %016lX %016lX\n",
 646                         netdev->name,
 647                         netdev->state,
 648                         dev_trans_start(netdev));
 649         }
 650
 651         /* Print Registers */
 652         dev_info(&adapter->pdev->dev, "Register Dump\n");
 653         pr_info(" Register Name   Value\n");
 654         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 655              reginfo->name; reginfo++) {
 656                 ixgbe_regdump(hw, reginfo);
 657         }
 658
 659         /* Print TX Ring Summary */
 660         if (!netdev || !netif_running(netdev))
 661                 return;
 662
 663         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 664         pr_info(" %s     %s              %s        %s\n",
 665                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 666                 "leng", "ntw", "timestamp");
 667         for (n = 0; n < adapter->num_tx_queues; n++) {
 668                 ring = adapter->tx_ring[n];
 669                 ixgbe_print_buffer(ring, n);
 670         }
 671
 672         for (n = 0; n < adapter->num_xdp_queues; n++) {
 673                 ring = adapter->xdp_ring[n];
 674                 ixgbe_print_buffer(ring, n);
 675         }
 676
 677         /* Print TX Rings */
 678         if (!netif_msg_tx_done(adapter))
 679                 goto rx_ring_summary;
 680
 681         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 682
 683         /* Transmit Descriptor Formats
 684          *
 685          * 82598 Advanced Transmit Descriptor
 686          *   +--------------------------------------------------------------+
 687          * 0 |         Buffer Address [63:0]                                |
 688          *   +--------------------------------------------------------------+
 689          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 690          *   +--------------------------------------------------------------+
 691          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 692          *
 693          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 694          *   +--------------------------------------------------------------+
 695          * 0 |                          RSV [63:0]                          |
 696          *   +--------------------------------------------------------------+
 697          * 8 |            RSV           |  STA  |          NXTSEQ           |
 698          *   +--------------------------------------------------------------+
 699          *   63                       36 35   32 31                         0
 700          *
 701          * 82599+ Advanced Transmit Descriptor
 702          *   +--------------------------------------------------------------+
 703          * 0 |         Buffer Address [63:0]                                |
 704          *   +--------------------------------------------------------------+
 705          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 706          *   +--------------------------------------------------------------+
 707          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 708          *
 709          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 710          *   +--------------------------------------------------------------+
 711          * 0 |                          RSV [63:0]                          |
 712          *   +--------------------------------------------------------------+
 713          * 8 |            RSV           |  STA  |           RSV             |
 714          *   +--------------------------------------------------------------+
 715          *   63                       36 35   32 31                         0
 716          */
 717
 718         for (n = 0; n < adapter->num_tx_queues; n++) {
 719                 ring = adapter->tx_ring[n];
 720                 pr_info("------------------------------------\n");
 721                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 722                 pr_info("------------------------------------\n");
 723                 pr_info("%s%s    %s              %s        %s          %s\n",
 724                         "T [desc]     [address 63:0  ] ",
 725                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 726                         "leng", "ntw", "timestamp", "bi->skb");
 727
 728                 for (i = 0; ring->desc && (i < ring->count); i++) {
 729                         tx_desc = IXGBE_TX_DESC(ring, i);
 730                         tx_buffer = &ring->tx_buffer_info[i];
 731                         u0 = (struct my_u0 *)tx_desc;
 732                         if (dma_unmap_len(tx_buffer, len) > 0) {
 733                                 const char *ring_desc;
 734
 735                                 if (i == ring->next_to_use &&
 736                                     i == ring->next_to_clean)
 737                                         ring_desc = " NTC/U";
 738                                 else if (i == ring->next_to_use)
 739                                         ring_desc = " NTU";
 740                                 else if (i == ring->next_to_clean)
 741                                         ring_desc = " NTC";
 742                                 else
 743                                         ring_desc = "";
 744                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 745                                         i,
 746                                         le64_to_cpu(u0->a),
 747                                         le64_to_cpu(u0->b),
 748                                         (u64)dma_unmap_addr(tx_buffer, dma),
 749                                         dma_unmap_len(tx_buffer, len),
 750                                         tx_buffer->next_to_watch,
 751                                         (u64)tx_buffer->time_stamp,
 752                                         tx_buffer->skb,
 753                                         ring_desc);
 754
 755                                 if (netif_msg_pktdata(adapter) &&
 756                                     tx_buffer->skb)
 757                                         print_hex_dump(KERN_INFO, "",
 758                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 759                                                 tx_buffer->skb->data,
 760                                                 dma_unmap_len(tx_buffer, len),
 761                                                 true);
 762                         }
 763                 }
 764         }
 765
 766         /* Print RX Rings Summary */
 767 rx_ring_summary:
 768         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 769         pr_info("Queue [NTU] [NTC]\n");
 770         for (n = 0; n < adapter->num_rx_queues; n++) {
 771                 rx_ring = adapter->rx_ring[n];
 772                 pr_info("%5d %5X %5X\n",
 773                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 774         }
 775
 776         /* Print RX Rings */
 777         if (!netif_msg_rx_status(adapter))
 778                 return;
 779
 780         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 781
 782         /* Receive Descriptor Formats
 783          *
 784          * 82598 Advanced Receive Descriptor (Read) Format
 785          *    63                                           1        0
 786          *    +-----------------------------------------------------+
 787          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 788          *    +----------------------------------------------+------+
 789          *  8 |       Header Buffer Address [63:1]           |  DD  |
 790          *    +-----------------------------------------------------+
 791          *
 792          *
 793          * 82598 Advanced Receive Descriptor (Write-Back) Format
 794          *
 795          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 796          *   +------------------------------------------------------+
 797          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 798          *   | Packet   | IP     |   |          |     | Type | Type |
 799          *   | Checksum | Ident  |   |          |     |      |      |
 800          *   +------------------------------------------------------+
 801          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 802          *   +------------------------------------------------------+
 803          *   63       48 47    32 31            20 19               0
 804          *
 805          * 82599+ Advanced Receive Descriptor (Read) Format
 806          *    63                                           1        0
 807          *    +-----------------------------------------------------+
 808          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 809          *    +----------------------------------------------+------+
 810          *  8 |       Header Buffer Address [63:1]           |  DD  |
 811          *    +-----------------------------------------------------+
 812          *
 813          *
 814          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 815          *
 816          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 817          *   +------------------------------------------------------+
 818          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 819          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 820          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 821          *   +------------------------------------------------------+
 822          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 823          *   +------------------------------------------------------+
 824          *   63       48 47    32 31          20 19                 0
 825          */
 826
 827         for (n = 0; n < adapter->num_rx_queues; n++) {
 828                 rx_ring = adapter->rx_ring[n];
 829                 pr_info("------------------------------------\n");
 830                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 831                 pr_info("------------------------------------\n");
 832                 pr_info("%s%s%s\n",
 833                         "R  [desc]      [ PktBuf     A0] ",
 834                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 835                         "<-- Adv Rx Read format");
 836                 pr_info("%s%s%s\n",
 837                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 838                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 839                         "<-- Adv Rx Write-Back format");
 840
 841                 for (i = 0; i < rx_ring->count; i++) {
 842                         const char *ring_desc;
 843
 844                         if (i == rx_ring->next_to_use)
 845                                 ring_desc = " NTU";
 846                         else if (i == rx_ring->next_to_clean)
 847                                 ring_desc = " NTC";
 848                         else
 849                                 ring_desc = "";
 850
 851                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 852                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 853                         u0 = (struct my_u0 *)rx_desc;
 854                         if (rx_desc->wb.upper.length) {
 855                                 /* Descriptor Done */
 856                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 857                                         i,
 858                                         le64_to_cpu(u0->a),
 859                                         le64_to_cpu(u0->b),
 860                                         rx_buffer_info->skb,
 861                                         ring_desc);
 862                         } else {
 863                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 864                                         i,
 865                                         le64_to_cpu(u0->a),
 866                                         le64_to_cpu(u0->b),
 867                                         (u64)rx_buffer_info->dma,
 868                                         rx_buffer_info->skb,
 869                                         ring_desc);
 870
 871                                 if (netif_msg_pktdata(adapter) &&
 872                                     rx_buffer_info->dma) {
 873                                         print_hex_dump(KERN_INFO, "",
 874                                            DUMP_PREFIX_ADDRESS, 16, 1,
 875                                            page_address(rx_buffer_info->page) +
 876                                                     rx_buffer_info->page_offset,
 877                                            ixgbe_rx_bufsz(rx_ring), true);
 878                                 }
 879                         }
 880                 }
 881         }
 882 }
 883
 884 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 885 {
 886         u32 ctrl_ext;
 887
 888         /* Let firmware take over control of h/w */
 889         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 890         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 891                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 892 }
 893
 894 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 895 {
 896         u32 ctrl_ext;
 897
 898         /* Let firmware know the driver has taken over */
 899         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 900         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 901                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 902 }
 903
 904 /**
 905  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 906  * @adapter: pointer to adapter struct
 907  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 908  * @queue: queue to map the corresponding interrupt to
 909  * @msix_vector: the vector to map to the corresponding queue
 910  *
 911  */
 912 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 913                            u8 queue, u8 msix_vector)
 914 {
 915         u32 ivar, index;
 916         struct ixgbe_hw *hw = &adapter->hw;
 917         switch (hw->mac.type) {
 918         case ixgbe_mac_82598EB:
 919                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 920                 if (direction == -1)
 921                         direction = 0;
 922                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 923                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 924                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 925                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 926                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 927                 break;
 928         case ixgbe_mac_82599EB:
 929         case ixgbe_mac_X540:
 930         case ixgbe_mac_X550:
 931         case ixgbe_mac_X550EM_x:
 932         case ixgbe_mac_x550em_a:
 933                 if (direction == -1) {
 934                         /* other causes */
 935                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 936                         index = ((queue & 1) * 8);
 937                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 938                         ivar &= ~(0xFF << index);
 939                         ivar |= (msix_vector << index);
 940                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 941                         break;
 942                 } else {
 943                         /* tx or rx causes */
 944                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 945                         index = ((16 * (queue & 1)) + (8 * direction));
 946                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 947                         ivar &= ~(0xFF << index);
 948                         ivar |= (msix_vector << index);
 949                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 950                         break;
 951                 }
 952         default:
 953                 break;
 954         }
 955 }
 956
 957 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 958                                           u64 qmask)
 959 {
 960         u32 mask;
 961
 962         switch (adapter->hw.mac.type) {
 963         case ixgbe_mac_82598EB:
 964                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 965                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 966                 break;
 967         case ixgbe_mac_82599EB:
 968         case ixgbe_mac_X540:
 969         case ixgbe_mac_X550:
 970         case ixgbe_mac_X550EM_x:
 971         case ixgbe_mac_x550em_a:
 972                 mask = (qmask & 0xFFFFFFFF);
 973                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 974                 mask = (qmask >> 32);
 975                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 976                 break;
 977         default:
 978                 break;
 979         }
 980 }
 981
 982 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 983 {
 984         struct ixgbe_hw *hw = &adapter->hw;
 985         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 986         int i;
 987         u32 data;
 988
 989         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 990             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 991                 return;
 992
 993         switch (hw->mac.type) {
 994         case ixgbe_mac_82598EB:
 995                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 996                 break;
 997         default:
 998                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 999         }
1000         hwstats->lxoffrxc += data;
1001
1002         /* refill credits (no tx hang) if we received xoff */
1003         if (!data)
1004                 return;
1005
1006         for (i = 0; i < adapter->num_tx_queues; i++)
1007                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1008                           &adapter->tx_ring[i]->state);
1009
1010         for (i = 0; i < adapter->num_xdp_queues; i++)
1011                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
1012                           &adapter->xdp_ring[i]->state);
1013 }
1014
1015 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
1016 {
1017         struct ixgbe_hw *hw = &adapter->hw;
1018         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1019         u32 xoff[8] = {0};
1020         u8 tc;
1021         int i;
1022         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
1023
1024         if (adapter->ixgbe_ieee_pfc)
1025                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
1026
1027         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
1028                 ixgbe_update_xoff_rx_lfc(adapter);
1029                 return;
1030         }
1031
1032         /* update stats for each tc, only valid with PFC enabled */
1033         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1034                 u32 pxoffrxc;
1035
1036                 switch (hw->mac.type) {
1037                 case ixgbe_mac_82598EB:
1038                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
1039                         break;
1040                 default:
1041                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
1042                 }
1043                 hwstats->pxoffrxc[i] += pxoffrxc;
1044                 /* Get the TC for given UP */
1045                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1046                 xoff[tc] += pxoffrxc;
1047         }
1048
1049         /* disarm tx queues that have received xoff frames */
1050         for (i = 0; i < adapter->num_tx_queues; i++) {
1051                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1052
1053                 tc = tx_ring->dcb_tc;
1054                 if (xoff[tc])
1055                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1056         }
1057
1058         for (i = 0; i < adapter->num_xdp_queues; i++) {
1059                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1060
1061                 tc = xdp_ring->dcb_tc;
1062                 if (xoff[tc])
1063                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1064         }
1065 }
1066
1067 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1068 {
1069         return ring->stats.packets;
1070 }
1071
1072 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1073 {
1074         unsigned int head, tail;
1075
1076         head = ring->next_to_clean;
1077         tail = ring->next_to_use;
1078
1079         return ((head <= tail) ? tail : tail + ring->count) - head;
1080 }
1081
1082 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1083 {
1084         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1085         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1086         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1087
1088         clear_check_for_tx_hang(tx_ring);
1089
1090         /*
1091          * Check for a hung queue, but be thorough. This verifies
1092          * that a transmit has been completed since the previous
1093          * check AND there is at least one packet pending. The
1094          * ARMED bit is set to indicate a potential hang. The
1095          * bit is cleared if a pause frame is received to remove
1096          * false hang detection due to PFC or 802.3x frames. By
1097          * requiring this to fail twice we avoid races with
1098          * pfc clearing the ARMED bit and conditions where we
1099          * run the check_tx_hang logic with a transmit completion
1100          * pending but without time to complete it yet.
1101          */
1102         if (tx_done_old == tx_done && tx_pending)
1103                 /* make sure it is true for two checks in a row */
1104                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1105                                         &tx_ring->state);
1106         /* update completed stats and continue */
1107         tx_ring->tx_stats.tx_done_old = tx_done;
1108         /* reset the countdown */
1109         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1110
1111         return false;
1112 }
1113
1114 /**
1115  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1116  * @adapter: driver private struct
1117  **/
1118 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1119 {
1120
1121         /* Do the reset outside of interrupt context */
1122         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1123                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1124                 e_warn(drv, "initiating reset due to tx timeout\n");
1125                 ixgbe_service_event_schedule(adapter);
1126         }
1127 }
1128
1129 /**
1130  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1131  * @netdev: network interface device structure
1132  * @queue_index: Tx queue to set
1133  * @maxrate: desired maximum transmit bitrate
1134  **/
1135 static int ixgbe_tx_maxrate(struct net_device *netdev,
1136                             int queue_index, u32 maxrate)
1137 {
1138         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1139         struct ixgbe_hw *hw = &adapter->hw;
1140         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1141
1142         if (!maxrate)
1143                 return 0;
1144
1145         /* Calculate the rate factor values to set */
1146         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1147         bcnrc_val /= maxrate;
1148
1149         /* clear everything but the rate factor */
1150         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1151         IXGBE_RTTBCNRC_RF_DEC_MASK;
1152
1153         /* enable the rate scheduler */
1154         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1155
1156         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1157         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1158
1159         return 0;
1160 }
1161
1162 /**
1163  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1164  * @q_vector: structure containing interrupt and ring information
1165  * @tx_ring: tx ring to clean
1166  * @napi_budget: Used to determine if we are in netpoll
1167  **/
1168 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1169                                struct ixgbe_ring *tx_ring, int napi_budget)
1170 {
1171         struct ixgbe_adapter *adapter = q_vector->adapter;
1172         struct ixgbe_tx_buffer *tx_buffer;
1173         union ixgbe_adv_tx_desc *tx_desc;
1174         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1175         unsigned int budget = q_vector->tx.work_limit;
1176         unsigned int i = tx_ring->next_to_clean;
1177
1178         if (test_bit(__IXGBE_DOWN, &adapter->state))
1179                 return true;
1180
1181         tx_buffer = &tx_ring->tx_buffer_info[i];
1182         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1183         i -= tx_ring->count;
1184
1185         do {
1186                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1187
1188                 /* if next_to_watch is not set then there is no work pending */
1189                 if (!eop_desc)
1190                         break;
1191
1192                 /* prevent any other reads prior to eop_desc */
1193                 smp_rmb();
1194
1195                 /* if DD is not set pending work has not been completed */
1196                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1197                         break;
1198
1199                 /* clear next_to_watch to prevent false hangs */
1200                 tx_buffer->next_to_watch = NULL;
1201
1202                 /* update the statistics for this packet */
1203                 total_bytes += tx_buffer->bytecount;
1204                 total_packets += tx_buffer->gso_segs;
1205                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1206                         total_ipsec++;
1207
1208                 /* free the skb */
1209                 if (ring_is_xdp(tx_ring))
1210                         page_frag_free(tx_buffer->data);
1211                 else
1212                         napi_consume_skb(tx_buffer->skb, napi_budget);
1213
1214                 /* unmap skb header data */
1215                 dma_unmap_single(tx_ring->dev,
1216                                  dma_unmap_addr(tx_buffer, dma),
1217                                  dma_unmap_len(tx_buffer, len),
1218                                  DMA_TO_DEVICE);
1219
1220                 /* clear tx_buffer data */
1221                 dma_unmap_len_set(tx_buffer, len, 0);
1222
1223                 /* unmap remaining buffers */
1224                 while (tx_desc != eop_desc) {
1225                         tx_buffer++;
1226                         tx_desc++;
1227                         i++;
1228                         if (unlikely(!i)) {
1229                                 i -= tx_ring->count;
1230                                 tx_buffer = tx_ring->tx_buffer_info;
1231                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1232                         }
1233
1234                         /* unmap any remaining paged data */
1235                         if (dma_unmap_len(tx_buffer, len)) {
1236                                 dma_unmap_page(tx_ring->dev,
1237                                                dma_unmap_addr(tx_buffer, dma),
1238                                                dma_unmap_len(tx_buffer, len),
1239                                                DMA_TO_DEVICE);
1240                                 dma_unmap_len_set(tx_buffer, len, 0);
1241                         }
1242                 }
1243
1244                 /* move us one more past the eop_desc for start of next pkt */
1245                 tx_buffer++;
1246                 tx_desc++;
1247                 i++;
1248                 if (unlikely(!i)) {
1249                         i -= tx_ring->count;
1250                         tx_buffer = tx_ring->tx_buffer_info;
1251                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1252                 }
1253
1254                 /* issue prefetch for next Tx descriptor */
1255                 prefetch(tx_desc);
1256
1257                 /* update budget accounting */
1258                 budget--;
1259         } while (likely(budget));
1260
1261         i += tx_ring->count;
1262         tx_ring->next_to_clean = i;
1263         u64_stats_update_begin(&tx_ring->syncp);
1264         tx_ring->stats.bytes += total_bytes;
1265         tx_ring->stats.packets += total_packets;
1266         u64_stats_update_end(&tx_ring->syncp);
1267         q_vector->tx.total_bytes += total_bytes;
1268         q_vector->tx.total_packets += total_packets;
1269         adapter->tx_ipsec += total_ipsec;
1270
1271         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1272                 /* schedule immediate reset if we believe we hung */
1273                 struct ixgbe_hw *hw = &adapter->hw;
1274                 e_err(drv, "Detected Tx Unit Hang %s\n"
1275                         "  Tx Queue             <%d>\n"
1276                         "  TDH, TDT             <%x>, <%x>\n"
1277                         "  next_to_use          <%x>\n"
1278                         "  next_to_clean        <%x>\n"
1279                         "tx_buffer_info[next_to_clean]\n"
1280                         "  time_stamp           <%lx>\n"
1281                         "  jiffies              <%lx>\n",
1282                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1283                         tx_ring->queue_index,
1284                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1285                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1286                         tx_ring->next_to_use, i,
1287                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1288
1289                 if (!ring_is_xdp(tx_ring))
1290                         netif_stop_subqueue(tx_ring->netdev,
1291                                             tx_ring->queue_index);
1292
1293                 e_info(probe,
1294                        "tx hang %d detected on queue %d, resetting adapter\n",
1295                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1296
1297                 /* schedule immediate reset if we believe we hung */
1298                 ixgbe_tx_timeout_reset(adapter);
1299
1300                 /* the adapter is about to reset, no point in enabling stuff */
1301                 return true;
1302         }
1303
1304         if (ring_is_xdp(tx_ring))
1305                 return !!budget;
1306
1307         netdev_tx_completed_queue(txring_txq(tx_ring),
1308                                   total_packets, total_bytes);
1309
1310 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1311         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1312                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1313                 /* Make sure that anybody stopping the queue after this
1314                  * sees the new next_to_clean.
1315                  */
1316                 smp_mb();
1317                 if (__netif_subqueue_stopped(tx_ring->netdev,
1318                                              tx_ring->queue_index)
1319                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1320                         netif_wake_subqueue(tx_ring->netdev,
1321                                             tx_ring->queue_index);
1322                         ++tx_ring->tx_stats.restart_queue;
1323                 }
1324         }
1325
1326         return !!budget;
1327 }
1328
1329 #ifdef CONFIG_IXGBE_DCA
1330 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1331                                 struct ixgbe_ring *tx_ring,
1332                                 int cpu)
1333 {
1334         struct ixgbe_hw *hw = &adapter->hw;
1335         u32 txctrl = 0;
1336         u16 reg_offset;
1337
1338         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1339                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1340
1341         switch (hw->mac.type) {
1342         case ixgbe_mac_82598EB:
1343                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1344                 break;
1345         case ixgbe_mac_82599EB:
1346         case ixgbe_mac_X540:
1347                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1348                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1349                 break;
1350         default:
1351                 /* for unknown hardware do not write register */
1352                 return;
1353         }
1354
1355         /*
1356          * We can enable relaxed ordering for reads, but not writes when
1357          * DCA is enabled.  This is due to a known issue in some chipsets
1358          * which will cause the DCA tag to be cleared.
1359          */
1360         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1361                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1362                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1363
1364         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1365 }
1366
1367 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1368                                 struct ixgbe_ring *rx_ring,
1369                                 int cpu)
1370 {
1371         struct ixgbe_hw *hw = &adapter->hw;
1372         u32 rxctrl = 0;
1373         u8 reg_idx = rx_ring->reg_idx;
1374
1375         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1376                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1377
1378         switch (hw->mac.type) {
1379         case ixgbe_mac_82599EB:
1380         case ixgbe_mac_X540:
1381                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1382                 break;
1383         default:
1384                 break;
1385         }
1386
1387         /*
1388          * We can enable relaxed ordering for reads, but not writes when
1389          * DCA is enabled.  This is due to a known issue in some chipsets
1390          * which will cause the DCA tag to be cleared.
1391          */
1392         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1393                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1394                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1395
1396         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1397 }
1398
1399 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1400 {
1401         struct ixgbe_adapter *adapter = q_vector->adapter;
1402         struct ixgbe_ring *ring;
1403         int cpu = get_cpu();
1404
1405         if (q_vector->cpu == cpu)
1406                 goto out_no_update;
1407
1408         ixgbe_for_each_ring(ring, q_vector->tx)
1409                 ixgbe_update_tx_dca(adapter, ring, cpu);
1410
1411         ixgbe_for_each_ring(ring, q_vector->rx)
1412                 ixgbe_update_rx_dca(adapter, ring, cpu);
1413
1414         q_vector->cpu = cpu;
1415 out_no_update:
1416         put_cpu();
1417 }
1418
1419 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1420 {
1421         int i;
1422
1423         /* always use CB2 mode, difference is masked in the CB driver */
1424         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1425                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1426                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1427         else
1428                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1429                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1430
1431         for (i = 0; i < adapter->num_q_vectors; i++) {
1432                 adapter->q_vector[i]->cpu = -1;
1433                 ixgbe_update_dca(adapter->q_vector[i]);
1434         }
1435 }
1436
1437 static int __ixgbe_notify_dca(struct device *dev, void *data)
1438 {
1439         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1440         unsigned long event = *(unsigned long *)data;
1441
1442         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1443                 return 0;
1444
1445         switch (event) {
1446         case DCA_PROVIDER_ADD:
1447                 /* if we're already enabled, don't do it again */
1448                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1449                         break;
1450                 if (dca_add_requester(dev) == 0) {
1451                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1452                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1453                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1454                         break;
1455                 }
1456                 /* fall through - DCA is disabled. */
1457         case DCA_PROVIDER_REMOVE:
1458                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1459                         dca_remove_requester(dev);
1460                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1461                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1462                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1463                 }
1464                 break;
1465         }
1466
1467         return 0;
1468 }
1469
1470 #endif /* CONFIG_IXGBE_DCA */
1471
1472 #define IXGBE_RSS_L4_TYPES_MASK \
1473         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1474          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1475          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1476          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1477
1478 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1479                                  union ixgbe_adv_rx_desc *rx_desc,
1480                                  struct sk_buff *skb)
1481 {
1482         u16 rss_type;
1483
1484         if (!(ring->netdev->features & NETIF_F_RXHASH))
1485                 return;
1486
1487         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1488                    IXGBE_RXDADV_RSSTYPE_MASK;
1489
1490         if (!rss_type)
1491                 return;
1492
1493         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1494                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1495                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1496 }
1497
1498 #ifdef IXGBE_FCOE
1499 /**
1500  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1501  * @ring: structure containing ring specific data
1502  * @rx_desc: advanced rx descriptor
1503  *
1504  * Returns : true if it is FCoE pkt
1505  */
1506 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1507                                     union ixgbe_adv_rx_desc *rx_desc)
1508 {
1509         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1510
1511         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1512                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1513                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1514                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1515 }
1516
1517 #endif /* IXGBE_FCOE */
1518 /**
1519  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1520  * @ring: structure containing ring specific data
1521  * @rx_desc: current Rx descriptor being processed
1522  * @skb: skb currently being received and modified
1523  **/
1524 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1525                                      union ixgbe_adv_rx_desc *rx_desc,
1526                                      struct sk_buff *skb)
1527 {
1528         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1529         bool encap_pkt = false;
1530
1531         skb_checksum_none_assert(skb);
1532
1533         /* Rx csum disabled */
1534         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1535                 return;
1536
1537         /* check for VXLAN and Geneve packets */
1538         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1539                 encap_pkt = true;
1540                 skb->encapsulation = 1;
1541         }
1542
1543         /* if IP and error */
1544         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1545             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1546                 ring->rx_stats.csum_err++;
1547                 return;
1548         }
1549
1550         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1551                 return;
1552
1553         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1554                 /*
1555                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1556                  * checksum errors.
1557                  */
1558                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1559                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1560                         return;
1561
1562                 ring->rx_stats.csum_err++;
1563                 return;
1564         }
1565
1566         /* It must be a TCP or UDP packet with a valid checksum */
1567         skb->ip_summed = CHECKSUM_UNNECESSARY;
1568         if (encap_pkt) {
1569                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1570                         return;
1571
1572                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1573                         skb->ip_summed = CHECKSUM_NONE;
1574                         return;
1575                 }
1576                 /* If we checked the outer header let the stack know */
1577                 skb->csum_level = 1;
1578         }
1579 }
1580
1581 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1582 {
1583         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1584 }
1585
1586 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1587                                     struct ixgbe_rx_buffer *bi)
1588 {
1589         struct page *page = bi->page;
1590         dma_addr_t dma;
1591
1592         /* since we are recycling buffers we should seldom need to alloc */
1593         if (likely(page))
1594                 return true;
1595
1596         /* alloc new page for storage */
1597         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1598         if (unlikely(!page)) {
1599                 rx_ring->rx_stats.alloc_rx_page_failed++;
1600                 return false;
1601         }
1602
1603         /* map page for use */
1604         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1605                                  ixgbe_rx_pg_size(rx_ring),
1606                                  DMA_FROM_DEVICE,
1607                                  IXGBE_RX_DMA_ATTR);
1608
1609         /*
1610          * if mapping failed free memory back to system since
1611          * there isn't much point in holding memory we can't use
1612          */
1613         if (dma_mapping_error(rx_ring->dev, dma)) {
1614                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1615
1616                 rx_ring->rx_stats.alloc_rx_page_failed++;
1617                 return false;
1618         }
1619
1620         bi->dma = dma;
1621         bi->page = page;
1622         bi->page_offset = ixgbe_rx_offset(rx_ring);
1623         bi->pagecnt_bias = 1;
1624         rx_ring->rx_stats.alloc_rx_page++;
1625
1626         return true;
1627 }
1628
1629 /**
1630  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1631  * @rx_ring: ring to place buffers on
1632  * @cleaned_count: number of buffers to replace
1633  **/
1634 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1635 {
1636         union ixgbe_adv_rx_desc *rx_desc;
1637         struct ixgbe_rx_buffer *bi;
1638         u16 i = rx_ring->next_to_use;
1639         u16 bufsz;
1640
1641         /* nothing to do */
1642         if (!cleaned_count)
1643                 return;
1644
1645         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1646         bi = &rx_ring->rx_buffer_info[i];
1647         i -= rx_ring->count;
1648
1649         bufsz = ixgbe_rx_bufsz(rx_ring);
1650
1651         do {
1652                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1653                         break;
1654
1655                 /* sync the buffer for use by the device */
1656                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1657                                                  bi->page_offset, bufsz,
1658                                                  DMA_FROM_DEVICE);
1659
1660                 /*
1661                  * Refresh the desc even if buffer_addrs didn't change
1662                  * because each write-back erases this info.
1663                  */
1664                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1665
1666                 rx_desc++;
1667                 bi++;
1668                 i++;
1669                 if (unlikely(!i)) {
1670                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1671                         bi = rx_ring->rx_buffer_info;
1672                         i -= rx_ring->count;
1673                 }
1674
1675                 /* clear the length for the next_to_use descriptor */
1676                 rx_desc->wb.upper.length = 0;
1677
1678                 cleaned_count--;
1679         } while (cleaned_count);
1680
1681         i += rx_ring->count;
1682
1683         if (rx_ring->next_to_use != i) {
1684                 rx_ring->next_to_use = i;
1685
1686                 /* update next to alloc since we have filled the ring */
1687                 rx_ring->next_to_alloc = i;
1688
1689                 /* Force memory writes to complete before letting h/w
1690                  * know there are new descriptors to fetch.  (Only
1691                  * applicable for weak-ordered memory model archs,
1692                  * such as IA-64).
1693                  */
1694                 wmb();
1695                 writel(i, rx_ring->tail);
1696         }
1697 }
1698
1699 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1700                                    struct sk_buff *skb)
1701 {
1702         u16 hdr_len = skb_headlen(skb);
1703
1704         /* set gso_size to avoid messing up TCP MSS */
1705         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1706                                                  IXGBE_CB(skb)->append_cnt);
1707         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1708 }
1709
1710 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1711                                    struct sk_buff *skb)
1712 {
1713         /* if append_cnt is 0 then frame is not RSC */
1714         if (!IXGBE_CB(skb)->append_cnt)
1715                 return;
1716
1717         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1718         rx_ring->rx_stats.rsc_flush++;
1719
1720         ixgbe_set_rsc_gso_size(rx_ring, skb);
1721
1722         /* gso_size is computed using append_cnt so always clear it last */
1723         IXGBE_CB(skb)->append_cnt = 0;
1724 }
1725
1726 /**
1727  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1728  * @rx_ring: rx descriptor ring packet is being transacted on
1729  * @rx_desc: pointer to the EOP Rx descriptor
1730  * @skb: pointer to current skb being populated
1731  *
1732  * This function checks the ring, descriptor, and packet information in
1733  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1734  * other fields within the skb.
1735  **/
1736 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1737                                      union ixgbe_adv_rx_desc *rx_desc,
1738                                      struct sk_buff *skb)
1739 {
1740         struct net_device *dev = rx_ring->netdev;
1741         u32 flags = rx_ring->q_vector->adapter->flags;
1742
1743         ixgbe_update_rsc_stats(rx_ring, skb);
1744
1745         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1746
1747         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1748
1749         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1750                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1751
1752         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1753             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1754                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1755                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1756         }
1757
1758         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1759                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1760
1761         skb->protocol = eth_type_trans(skb, dev);
1762
1763         /* record Rx queue, or update MACVLAN statistics */
1764         if (netif_is_ixgbe(dev))
1765                 skb_record_rx_queue(skb, rx_ring->queue_index);
1766         else
1767                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1768                                  (skb->pkt_type == PACKET_BROADCAST) ||
1769                                  (skb->pkt_type == PACKET_MULTICAST));
1770 }
1771
1772 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1773                          struct sk_buff *skb)
1774 {
1775         napi_gro_receive(&q_vector->napi, skb);
1776 }
1777
1778 /**
1779  * ixgbe_is_non_eop - process handling of non-EOP buffers
1780  * @rx_ring: Rx ring being processed
1781  * @rx_desc: Rx descriptor for current buffer
1782  * @skb: Current socket buffer containing buffer in progress
1783  *
1784  * This function updates next to clean.  If the buffer is an EOP buffer
1785  * this function exits returning false, otherwise it will place the
1786  * sk_buff in the next buffer to be chained and return true indicating
1787  * that this is in fact a non-EOP buffer.
1788  **/
1789 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1790                              union ixgbe_adv_rx_desc *rx_desc,
1791                              struct sk_buff *skb)
1792 {
1793         u32 ntc = rx_ring->next_to_clean + 1;
1794
1795         /* fetch, update, and store next to clean */
1796         ntc = (ntc < rx_ring->count) ? ntc : 0;
1797         rx_ring->next_to_clean = ntc;
1798
1799         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1800
1801         /* update RSC append count if present */
1802         if (ring_is_rsc_enabled(rx_ring)) {
1803                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1804                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1805
1806                 if (unlikely(rsc_enabled)) {
1807                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1808
1809                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1810                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1811
1812                         /* update ntc based on RSC value */
1813                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1814                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1815                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1816                 }
1817         }
1818
1819         /* if we are the last buffer then there is nothing else to do */
1820         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1821                 return false;
1822
1823         /* place skb in next buffer to be received */
1824         rx_ring->rx_buffer_info[ntc].skb = skb;
1825         rx_ring->rx_stats.non_eop_descs++;
1826
1827         return true;
1828 }
1829
1830 /**
1831  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1832  * @rx_ring: rx descriptor ring packet is being transacted on
1833  * @skb: pointer to current skb being adjusted
1834  *
1835  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1836  * main difference between this version and the original function is that
1837  * this function can make several assumptions about the state of things
1838  * that allow for significant optimizations versus the standard function.
1839  * As a result we can do things like drop a frag and maintain an accurate
1840  * truesize for the skb.
1841  */
1842 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1843                             struct sk_buff *skb)
1844 {
1845         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1846         unsigned char *va;
1847         unsigned int pull_len;
1848
1849         /*
1850          * it is valid to use page_address instead of kmap since we are
1851          * working with pages allocated out of the lomem pool per
1852          * alloc_page(GFP_ATOMIC)
1853          */
1854         va = skb_frag_address(frag);
1855
1856         /*
1857          * we need the header to contain the greater of either ETH_HLEN or
1858          * 60 bytes if the skb->len is less than 60 for skb_pad.
1859          */
1860         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1861
1862         /* align pull length to size of long to optimize memcpy performance */
1863         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1864
1865         /* update all of the pointers */
1866         skb_frag_size_sub(frag, pull_len);
1867         frag->page_offset += pull_len;
1868         skb->data_len -= pull_len;
1869         skb->tail += pull_len;
1870 }
1871
1872 /**
1873  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1874  * @rx_ring: rx descriptor ring packet is being transacted on
1875  * @skb: pointer to current skb being updated
1876  *
1877  * This function provides a basic DMA sync up for the first fragment of an
1878  * skb.  The reason for doing this is that the first fragment cannot be
1879  * unmapped until we have reached the end of packet descriptor for a buffer
1880  * chain.
1881  */
1882 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1883                                 struct sk_buff *skb)
1884 {
1885         /* if the page was released unmap it, else just sync our portion */
1886         if (unlikely(IXGBE_CB(skb)->page_released)) {
1887                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1888                                      ixgbe_rx_pg_size(rx_ring),
1889                                      DMA_FROM_DEVICE,
1890                                      IXGBE_RX_DMA_ATTR);
1891         } else {
1892                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1893
1894                 dma_sync_single_range_for_cpu(rx_ring->dev,
1895                                               IXGBE_CB(skb)->dma,
1896                                               frag->page_offset,
1897                                               skb_frag_size(frag),
1898                                               DMA_FROM_DEVICE);
1899         }
1900 }
1901
1902 /**
1903  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1904  * @rx_ring: rx descriptor ring packet is being transacted on
1905  * @rx_desc: pointer to the EOP Rx descriptor
1906  * @skb: pointer to current skb being fixed
1907  *
1908  * Check if the skb is valid in the XDP case it will be an error pointer.
1909  * Return true in this case to abort processing and advance to next
1910  * descriptor.
1911  *
1912  * Check for corrupted packet headers caused by senders on the local L2
1913  * embedded NIC switch not setting up their Tx Descriptors right.  These
1914  * should be very rare.
1915  *
1916  * Also address the case where we are pulling data in on pages only
1917  * and as such no data is present in the skb header.
1918  *
1919  * In addition if skb is not at least 60 bytes we need to pad it so that
1920  * it is large enough to qualify as a valid Ethernet frame.
1921  *
1922  * Returns true if an error was encountered and skb was freed.
1923  **/
1924 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1925                                   union ixgbe_adv_rx_desc *rx_desc,
1926                                   struct sk_buff *skb)
1927 {
1928         struct net_device *netdev = rx_ring->netdev;
1929
1930         /* XDP packets use error pointer so abort at this point */
1931         if (IS_ERR(skb))
1932                 return true;
1933
1934         /* Verify netdev is present, and that packet does not have any
1935          * errors that would be unacceptable to the netdev.
1936          */
1937         if (!netdev ||
1938             (unlikely(ixgbe_test_staterr(rx_desc,
1939                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1940              !(netdev->features & NETIF_F_RXALL)))) {
1941                 dev_kfree_skb_any(skb);
1942                 return true;
1943         }
1944
1945         /* place header in linear portion of buffer */
1946         if (!skb_headlen(skb))
1947                 ixgbe_pull_tail(rx_ring, skb);
1948
1949 #ifdef IXGBE_FCOE
1950         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1951         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1952                 return false;
1953
1954 #endif
1955         /* if eth_skb_pad returns an error the skb was freed */
1956         if (eth_skb_pad(skb))
1957                 return true;
1958
1959         return false;
1960 }
1961
1962 /**
1963  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1964  * @rx_ring: rx descriptor ring to store buffers on
1965  * @old_buff: donor buffer to have page reused
1966  *
1967  * Synchronizes page for reuse by the adapter
1968  **/
1969 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1970                                 struct ixgbe_rx_buffer *old_buff)
1971 {
1972         struct ixgbe_rx_buffer *new_buff;
1973         u16 nta = rx_ring->next_to_alloc;
1974
1975         new_buff = &rx_ring->rx_buffer_info[nta];
1976
1977         /* update, and store next to alloc */
1978         nta++;
1979         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1980
1981         /* Transfer page from old buffer to new buffer.
1982          * Move each member individually to avoid possible store
1983          * forwarding stalls and unnecessary copy of skb.
1984          */
1985         new_buff->dma           = old_buff->dma;
1986         new_buff->page          = old_buff->page;
1987         new_buff->page_offset   = old_buff->page_offset;
1988         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1989 }
1990
1991 static inline bool ixgbe_page_is_reserved(struct page *page)
1992 {
1993         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1994 }
1995
1996 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1997 {
1998         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1999         struct page *page = rx_buffer->page;
2000
2001         /* avoid re-using remote pages */
2002         if (unlikely(ixgbe_page_is_reserved(page)))
2003                 return false;
2004
2005 #if (PAGE_SIZE < 8192)
2006         /* if we are only owner of page we can reuse it */
2007         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
2008                 return false;
2009 #else
2010         /* The last offset is a bit aggressive in that we assume the
2011          * worst case of FCoE being enabled and using a 3K buffer.
2012          * However this should have minimal impact as the 1K extra is
2013          * still less than one buffer in size.
2014          */
2015 #define IXGBE_LAST_OFFSET \
2016         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
2017         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
2018                 return false;
2019 #endif
2020
2021         /* If we have drained the page fragment pool we need to update
2022          * the pagecnt_bias and page count so that we fully restock the
2023          * number of references the driver holds.
2024          */
2025         if (unlikely(!pagecnt_bias)) {
2026                 page_ref_add(page, USHRT_MAX);
2027                 rx_buffer->pagecnt_bias = USHRT_MAX;
2028         }
2029
2030         return true;
2031 }
2032
2033 /**
2034  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
2035  * @rx_ring: rx descriptor ring to transact packets on
2036  * @rx_buffer: buffer containing page to add
2037  * @skb: sk_buff to place the data into
2038  * @size: size of data in rx_buffer
2039  *
2040  * This function will add the data contained in rx_buffer->page to the skb.
2041  * This is done either through a direct copy if the data in the buffer is
2042  * less than the skb header size, otherwise it will just attach the page as
2043  * a frag to the skb.
2044  *
2045  * The function will then update the page offset if necessary and return
2046  * true if the buffer can be reused by the adapter.
2047  **/
2048 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2049                               struct ixgbe_rx_buffer *rx_buffer,
2050                               struct sk_buff *skb,
2051                               unsigned int size)
2052 {
2053 #if (PAGE_SIZE < 8192)
2054         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2055 #else
2056         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2057                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2058                                 SKB_DATA_ALIGN(size);
2059 #endif
2060         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2061                         rx_buffer->page_offset, size, truesize);
2062 #if (PAGE_SIZE < 8192)
2063         rx_buffer->page_offset ^= truesize;
2064 #else
2065         rx_buffer->page_offset += truesize;
2066 #endif
2067 }
2068
2069 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2070                                                    union ixgbe_adv_rx_desc *rx_desc,
2071                                                    struct sk_buff **skb,
2072                                                    const unsigned int size)
2073 {
2074         struct ixgbe_rx_buffer *rx_buffer;
2075
2076         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2077         prefetchw(rx_buffer->page);
2078         *skb = rx_buffer->skb;
2079
2080         /* Delay unmapping of the first packet. It carries the header
2081          * information, HW may still access the header after the writeback.
2082          * Only unmap it when EOP is reached
2083          */
2084         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2085                 if (!*skb)
2086                         goto skip_sync;
2087         } else {
2088                 if (*skb)
2089                         ixgbe_dma_sync_frag(rx_ring, *skb);
2090         }
2091
2092         /* we are reusing so sync this buffer for CPU use */
2093         dma_sync_single_range_for_cpu(rx_ring->dev,
2094                                       rx_buffer->dma,
2095                                       rx_buffer->page_offset,
2096                                       size,
2097                                       DMA_FROM_DEVICE);
2098 skip_sync:
2099         rx_buffer->pagecnt_bias--;
2100
2101         return rx_buffer;
2102 }
2103
2104 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2105                                 struct ixgbe_rx_buffer *rx_buffer,
2106                                 struct sk_buff *skb)
2107 {
2108         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2109                 /* hand second half of page back to the ring */
2110                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2111         } else {
2112                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2113                         /* the page has been released from the ring */
2114                         IXGBE_CB(skb)->page_released = true;
2115                 } else {
2116                         /* we are not reusing the buffer so unmap it */
2117                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2118                                              ixgbe_rx_pg_size(rx_ring),
2119                                              DMA_FROM_DEVICE,
2120                                              IXGBE_RX_DMA_ATTR);
2121                 }
2122                 __page_frag_cache_drain(rx_buffer->page,
2123                                         rx_buffer->pagecnt_bias);
2124         }
2125
2126         /* clear contents of rx_buffer */
2127         rx_buffer->page = NULL;
2128         rx_buffer->skb = NULL;
2129 }
2130
2131 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2132                                            struct ixgbe_rx_buffer *rx_buffer,
2133                                            struct xdp_buff *xdp,
2134                                            union ixgbe_adv_rx_desc *rx_desc)
2135 {
2136         unsigned int size = xdp->data_end - xdp->data;
2137 #if (PAGE_SIZE < 8192)
2138         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2139 #else
2140         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2141                                                xdp->data_hard_start);
2142 #endif
2143         struct sk_buff *skb;
2144
2145         /* prefetch first cache line of first page */
2146         prefetch(xdp->data);
2147 #if L1_CACHE_BYTES < 128
2148         prefetch(xdp->data + L1_CACHE_BYTES);
2149 #endif
2150         /* Note, we get here by enabling legacy-rx via:
2151          *
2152          *    ethtool --set-priv-flags <dev> legacy-rx on
2153          *
2154          * In this mode, we currently get 0 extra XDP headroom as
2155          * opposed to having legacy-rx off, where we process XDP
2156          * packets going to stack via ixgbe_build_skb(). The latter
2157          * provides us currently with 192 bytes of headroom.
2158          *
2159          * For ixgbe_construct_skb() mode it means that the
2160          * xdp->data_meta will always point to xdp->data, since
2161          * the helper cannot expand the head. Should this ever
2162          * change in future for legacy-rx mode on, then lets also
2163          * add xdp->data_meta handling here.
2164          */
2165
2166         /* allocate a skb to store the frags */
2167         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2168         if (unlikely(!skb))
2169                 return NULL;
2170
2171         if (size > IXGBE_RX_HDR_SIZE) {
2172                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2173                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2174
2175                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2176                                 xdp->data - page_address(rx_buffer->page),
2177                                 size, truesize);
2178 #if (PAGE_SIZE < 8192)
2179                 rx_buffer->page_offset ^= truesize;
2180 #else
2181                 rx_buffer->page_offset += truesize;
2182 #endif
2183         } else {
2184                 memcpy(__skb_put(skb, size),
2185                        xdp->data, ALIGN(size, sizeof(long)));
2186                 rx_buffer->pagecnt_bias++;
2187         }
2188
2189         return skb;
2190 }
2191
2192 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2193                                        struct ixgbe_rx_buffer *rx_buffer,
2194                                        struct xdp_buff *xdp,
2195                                        union ixgbe_adv_rx_desc *rx_desc)
2196 {
2197         unsigned int metasize = xdp->data - xdp->data_meta;
2198 #if (PAGE_SIZE < 8192)
2199         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2200 #else
2201         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2202                                 SKB_DATA_ALIGN(xdp->data_end -
2203                                                xdp->data_hard_start);
2204 #endif
2205         struct sk_buff *skb;
2206
2207         /* Prefetch first cache line of first page. If xdp->data_meta
2208          * is unused, this points extactly as xdp->data, otherwise we
2209          * likely have a consumer accessing first few bytes of meta
2210          * data, and then actual data.
2211          */
2212         prefetch(xdp->data_meta);
2213 #if L1_CACHE_BYTES < 128
2214         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2215 #endif
2216
2217         /* build an skb to around the page buffer */
2218         skb = build_skb(xdp->data_hard_start, truesize);
2219         if (unlikely(!skb))
2220                 return NULL;
2221
2222         /* update pointers within the skb to store the data */
2223         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2224         __skb_put(skb, xdp->data_end - xdp->data);
2225         if (metasize)
2226                 skb_metadata_set(skb, metasize);
2227
2228         /* record DMA address if this is the start of a chain of buffers */
2229         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2230                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2231
2232         /* update buffer offset */
2233 #if (PAGE_SIZE < 8192)
2234         rx_buffer->page_offset ^= truesize;
2235 #else
2236         rx_buffer->page_offset += truesize;
2237 #endif
2238
2239         return skb;
2240 }
2241
2242 #define IXGBE_XDP_PASS 0
2243 #define IXGBE_XDP_CONSUMED 1
2244 #define IXGBE_XDP_TX 2
2245
2246 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2247                                struct xdp_buff *xdp);
2248
2249 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2250                                      struct ixgbe_ring *rx_ring,
2251                                      struct xdp_buff *xdp)
2252 {
2253         int err, result = IXGBE_XDP_PASS;
2254         struct bpf_prog *xdp_prog;
2255         u32 act;
2256
2257         rcu_read_lock();
2258         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2259
2260         if (!xdp_prog)
2261                 goto xdp_out;
2262
2263         act = bpf_prog_run_xdp(xdp_prog, xdp);
2264         switch (act) {
2265         case XDP_PASS:
2266                 break;
2267         case XDP_TX:
2268                 result = ixgbe_xmit_xdp_ring(adapter, xdp);
2269                 break;
2270         case XDP_REDIRECT:
2271                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2272                 if (!err)
2273                         result = IXGBE_XDP_TX;
2274                 else
2275                         result = IXGBE_XDP_CONSUMED;
2276                 break;
2277         default:
2278                 bpf_warn_invalid_xdp_action(act);
2279                 /* fallthrough */
2280         case XDP_ABORTED:
2281                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2282                 /* fallthrough -- handle aborts by dropping packet */
2283         case XDP_DROP:
2284                 result = IXGBE_XDP_CONSUMED;
2285                 break;
2286         }
2287 xdp_out:
2288         rcu_read_unlock();
2289         return ERR_PTR(-result);
2290 }
2291
2292 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2293                                  struct ixgbe_rx_buffer *rx_buffer,
2294                                  unsigned int size)
2295 {
2296 #if (PAGE_SIZE < 8192)
2297         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2298
2299         rx_buffer->page_offset ^= truesize;
2300 #else
2301         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2302                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2303                                 SKB_DATA_ALIGN(size);
2304
2305         rx_buffer->page_offset += truesize;
2306 #endif
2307 }
2308
2309 /**
2310  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2311  * @q_vector: structure containing interrupt and ring information
2312  * @rx_ring: rx descriptor ring to transact packets on
2313  * @budget: Total limit on number of packets to process
2314  *
2315  * This function provides a "bounce buffer" approach to Rx interrupt
2316  * processing.  The advantage to this is that on systems that have
2317  * expensive overhead for IOMMU access this provides a means of avoiding
2318  * it by maintaining the mapping of the page to the syste.
2319  *
2320  * Returns amount of work completed
2321  **/
2322 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2323                                struct ixgbe_ring *rx_ring,
2324                                const int budget)
2325 {
2326         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2327         struct ixgbe_adapter *adapter = q_vector->adapter;
2328 #ifdef IXGBE_FCOE
2329         int ddp_bytes;
2330         unsigned int mss = 0;
2331 #endif /* IXGBE_FCOE */
2332         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2333         bool xdp_xmit = false;
2334         struct xdp_buff xdp;
2335
2336         xdp.rxq = &rx_ring->xdp_rxq;
2337
2338         while (likely(total_rx_packets < budget)) {
2339                 union ixgbe_adv_rx_desc *rx_desc;
2340                 struct ixgbe_rx_buffer *rx_buffer;
2341                 struct sk_buff *skb;
2342                 unsigned int size;
2343
2344                 /* return some buffers to hardware, one at a time is too slow */
2345                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2346                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2347                         cleaned_count = 0;
2348                 }
2349
2350                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2351                 size = le16_to_cpu(rx_desc->wb.upper.length);
2352                 if (!size)
2353                         break;
2354
2355                 /* This memory barrier is needed to keep us from reading
2356                  * any other fields out of the rx_desc until we know the
2357                  * descriptor has been written back
2358                  */
2359                 dma_rmb();
2360
2361                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2362
2363                 /* retrieve a buffer from the ring */
2364                 if (!skb) {
2365                         xdp.data = page_address(rx_buffer->page) +
2366                                    rx_buffer->page_offset;
2367                         xdp.data_meta = xdp.data;
2368                         xdp.data_hard_start = xdp.data -
2369                                               ixgbe_rx_offset(rx_ring);
2370                         xdp.data_end = xdp.data + size;
2371
2372                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2373                 }
2374
2375                 if (IS_ERR(skb)) {
2376                         if (PTR_ERR(skb) == -IXGBE_XDP_TX) {
2377                                 xdp_xmit = true;
2378                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2379                         } else {
2380                                 rx_buffer->pagecnt_bias++;
2381                         }
2382                         total_rx_packets++;
2383                         total_rx_bytes += size;
2384                 } else if (skb) {
2385                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2386                 } else if (ring_uses_build_skb(rx_ring)) {
2387                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2388                                               &xdp, rx_desc);
2389                 } else {
2390                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2391                                                   &xdp, rx_desc);
2392                 }
2393
2394                 /* exit if we failed to retrieve a buffer */
2395                 if (!skb) {
2396                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2397                         rx_buffer->pagecnt_bias++;
2398                         break;
2399                 }
2400
2401                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2402                 cleaned_count++;
2403
2404                 /* place incomplete frames back on ring for completion */
2405                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2406                         continue;
2407
2408                 /* verify the packet layout is correct */
2409                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2410                         continue;
2411
2412                 /* probably a little skewed due to removing CRC */
2413                 total_rx_bytes += skb->len;
2414
2415                 /* populate checksum, timestamp, VLAN, and protocol */
2416                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2417
2418 #ifdef IXGBE_FCOE
2419                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2420                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2421                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2422                         /* include DDPed FCoE data */
2423                         if (ddp_bytes > 0) {
2424                                 if (!mss) {
2425                                         mss = rx_ring->netdev->mtu -
2426                                                 sizeof(struct fcoe_hdr) -
2427                                                 sizeof(struct fc_frame_header) -
2428                                                 sizeof(struct fcoe_crc_eof);
2429                                         if (mss > 512)
2430                                                 mss &= ~511;
2431                                 }
2432                                 total_rx_bytes += ddp_bytes;
2433                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2434                                                                  mss);
2435                         }
2436                         if (!ddp_bytes) {
2437                                 dev_kfree_skb_any(skb);
2438                                 continue;
2439                         }
2440                 }
2441
2442 #endif /* IXGBE_FCOE */
2443                 ixgbe_rx_skb(q_vector, skb);
2444
2445                 /* update budget accounting */
2446                 total_rx_packets++;
2447         }
2448
2449         if (xdp_xmit) {
2450                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2451
2452                 /* Force memory writes to complete before letting h/w
2453                  * know there are new descriptors to fetch.
2454                  */
2455                 wmb();
2456                 writel(ring->next_to_use, ring->tail);
2457
2458                 xdp_do_flush_map();
2459         }
2460
2461         u64_stats_update_begin(&rx_ring->syncp);
2462         rx_ring->stats.packets += total_rx_packets;
2463         rx_ring->stats.bytes += total_rx_bytes;
2464         u64_stats_update_end(&rx_ring->syncp);
2465         q_vector->rx.total_packets += total_rx_packets;
2466         q_vector->rx.total_bytes += total_rx_bytes;
2467
2468         return total_rx_packets;
2469 }
2470
2471 /**
2472  * ixgbe_configure_msix - Configure MSI-X hardware
2473  * @adapter: board private structure
2474  *
2475  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2476  * interrupts.
2477  **/
2478 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2479 {
2480         struct ixgbe_q_vector *q_vector;
2481         int v_idx;
2482         u32 mask;
2483
2484         /* Populate MSIX to EITR Select */
2485         if (adapter->num_vfs > 32) {
2486                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2487                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2488         }
2489
2490         /*
2491          * Populate the IVAR table and set the ITR values to the
2492          * corresponding register.
2493          */
2494         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2495                 struct ixgbe_ring *ring;
2496                 q_vector = adapter->q_vector[v_idx];
2497
2498                 ixgbe_for_each_ring(ring, q_vector->rx)
2499                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2500
2501                 ixgbe_for_each_ring(ring, q_vector->tx)
2502                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2503
2504                 ixgbe_write_eitr(q_vector);
2505         }
2506
2507         switch (adapter->hw.mac.type) {
2508         case ixgbe_mac_82598EB:
2509                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2510                                v_idx);
2511                 break;
2512         case ixgbe_mac_82599EB:
2513         case ixgbe_mac_X540:
2514         case ixgbe_mac_X550:
2515         case ixgbe_mac_X550EM_x:
2516         case ixgbe_mac_x550em_a:
2517                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2518                 break;
2519         default:
2520                 break;
2521         }
2522         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2523
2524         /* set up to autoclear timer, and the vectors */
2525         mask = IXGBE_EIMS_ENABLE_MASK;
2526         mask &= ~(IXGBE_EIMS_OTHER |
2527                   IXGBE_EIMS_MAILBOX |
2528                   IXGBE_EIMS_LSC);
2529
2530         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2531 }
2532
2533 /**
2534  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2535  * @q_vector: structure containing interrupt and ring information
2536  * @ring_container: structure containing ring performance data
2537  *
2538  *      Stores a new ITR value based on packets and byte
2539  *      counts during the last interrupt.  The advantage of per interrupt
2540  *      computation is faster updates and more accurate ITR for the current
2541  *      traffic pattern.  Constants in this function were computed
2542  *      based on theoretical maximum wire speed and thresholds were set based
2543  *      on testing data as well as attempting to minimize response time
2544  *      while increasing bulk throughput.
2545  **/
2546 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2547                              struct ixgbe_ring_container *ring_container)
2548 {
2549         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2550                            IXGBE_ITR_ADAPTIVE_LATENCY;
2551         unsigned int avg_wire_size, packets, bytes;
2552         unsigned long next_update = jiffies;
2553
2554         /* If we don't have any rings just leave ourselves set for maximum
2555          * possible latency so we take ourselves out of the equation.
2556          */
2557         if (!ring_container->ring)
2558                 return;
2559
2560         /* If we didn't update within up to 1 - 2 jiffies we can assume
2561          * that either packets are coming in so slow there hasn't been
2562          * any work, or that there is so much work that NAPI is dealing
2563          * with interrupt moderation and we don't need to do anything.
2564          */
2565         if (time_after(next_update, ring_container->next_update))
2566                 goto clear_counts;
2567
2568         packets = ring_container->total_packets;
2569
2570         /* We have no packets to actually measure against. This means
2571          * either one of the other queues on this vector is active or
2572          * we are a Tx queue doing TSO with too high of an interrupt rate.
2573          *
2574          * When this occurs just tick up our delay by the minimum value
2575          * and hope that this extra delay will prevent us from being called
2576          * without any work on our queue.
2577          */
2578         if (!packets) {
2579                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2580                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2581                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2582                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2583                 goto clear_counts;
2584         }
2585
2586         bytes = ring_container->total_bytes;
2587
2588         /* If packets are less than 4 or bytes are less than 9000 assume
2589          * insufficient data to use bulk rate limiting approach. We are
2590          * likely latency driven.
2591          */
2592         if (packets < 4 && bytes < 9000) {
2593                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2594                 goto adjust_by_size;
2595         }
2596
2597         /* Between 4 and 48 we can assume that our current interrupt delay
2598          * is only slightly too low. As such we should increase it by a small
2599          * fixed amount.
2600          */
2601         if (packets < 48) {
2602                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2603                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2604                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2605                 goto clear_counts;
2606         }
2607
2608         /* Between 48 and 96 is our "goldilocks" zone where we are working
2609          * out "just right". Just report that our current ITR is good for us.
2610          */
2611         if (packets < 96) {
2612                 itr = q_vector->itr >> 2;
2613                 goto clear_counts;
2614         }
2615
2616         /* If packet count is 96 or greater we are likely looking at a slight
2617          * overrun of the delay we want. Try halving our delay to see if that
2618          * will cut the number of packets in half per interrupt.
2619          */
2620         if (packets < 256) {
2621                 itr = q_vector->itr >> 3;
2622                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2623                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2624                 goto clear_counts;
2625         }
2626
2627         /* The paths below assume we are dealing with a bulk ITR since number
2628          * of packets is 256 or greater. We are just going to have to compute
2629          * a value and try to bring the count under control, though for smaller
2630          * packet sizes there isn't much we can do as NAPI polling will likely
2631          * be kicking in sooner rather than later.
2632          */
2633         itr = IXGBE_ITR_ADAPTIVE_BULK;
2634
2635 adjust_by_size:
2636         /* If packet counts are 256 or greater we can assume we have a gross
2637          * overestimation of what the rate should be. Instead of trying to fine
2638          * tune it just use the formula below to try and dial in an exact value
2639          * give the current packet size of the frame.
2640          */
2641         avg_wire_size = bytes / packets;
2642
2643         /* The following is a crude approximation of:
2644          *  wmem_default / (size + overhead) = desired_pkts_per_int
2645          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2646          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2647          *
2648          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2649          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2650          * formula down to
2651          *
2652          *  (170 * (size + 24)) / (size + 640) = ITR
2653          *
2654          * We first do some math on the packet size and then finally bitshift
2655          * by 8 after rounding up. We also have to account for PCIe link speed
2656          * difference as ITR scales based on this.
2657          */
2658         if (avg_wire_size <= 60) {
2659                 /* Start at 50k ints/sec */
2660                 avg_wire_size = 5120;
2661         } else if (avg_wire_size <= 316) {
2662                 /* 50K ints/sec to 16K ints/sec */
2663                 avg_wire_size *= 40;
2664                 avg_wire_size += 2720;
2665         } else if (avg_wire_size <= 1084) {
2666                 /* 16K ints/sec to 9.2K ints/sec */
2667                 avg_wire_size *= 15;
2668                 avg_wire_size += 11452;
2669         } else if (avg_wire_size <= 1980) {
2670                 /* 9.2K ints/sec to 8K ints/sec */
2671                 avg_wire_size *= 5;
2672                 avg_wire_size += 22420;
2673         } else {
2674                 /* plateau at a limit of 8K ints/sec */
2675                 avg_wire_size = 32256;
2676         }
2677
2678         /* If we are in low latency mode half our delay which doubles the rate
2679          * to somewhere between 100K to 16K ints/sec
2680          */
2681         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2682                 avg_wire_size >>= 1;
2683
2684         /* Resultant value is 256 times larger than it needs to be. This
2685          * gives us room to adjust the value as needed to either increase
2686          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2687          *
2688          * Use addition as we have already recorded the new latency flag
2689          * for the ITR value.
2690          */
2691         switch (q_vector->adapter->link_speed) {
2692         case IXGBE_LINK_SPEED_10GB_FULL:
2693         case IXGBE_LINK_SPEED_100_FULL:
2694         default:
2695                 itr += DIV_ROUND_UP(avg_wire_size,
2696                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2697                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2698                 break;
2699         case IXGBE_LINK_SPEED_2_5GB_FULL:
2700         case IXGBE_LINK_SPEED_1GB_FULL:
2701         case IXGBE_LINK_SPEED_10_FULL:
2702                 itr += DIV_ROUND_UP(avg_wire_size,
2703                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2704                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2705                 break;
2706         }
2707
2708 clear_counts:
2709         /* write back value */
2710         ring_container->itr = itr;
2711
2712         /* next update should occur within next jiffy */
2713         ring_container->next_update = next_update + 1;
2714
2715         ring_container->total_bytes = 0;
2716         ring_container->total_packets = 0;
2717 }
2718
2719 /**
2720  * ixgbe_write_eitr - write EITR register in hardware specific way
2721  * @q_vector: structure containing interrupt and ring information
2722  *
2723  * This function is made to be called by ethtool and by the driver
2724  * when it needs to update EITR registers at runtime.  Hardware
2725  * specific quirks/differences are taken care of here.
2726  */
2727 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2728 {
2729         struct ixgbe_adapter *adapter = q_vector->adapter;
2730         struct ixgbe_hw *hw = &adapter->hw;
2731         int v_idx = q_vector->v_idx;
2732         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2733
2734         switch (adapter->hw.mac.type) {
2735         case ixgbe_mac_82598EB:
2736                 /* must write high and low 16 bits to reset counter */
2737                 itr_reg |= (itr_reg << 16);
2738                 break;
2739         case ixgbe_mac_82599EB:
2740         case ixgbe_mac_X540:
2741         case ixgbe_mac_X550:
2742         case ixgbe_mac_X550EM_x:
2743         case ixgbe_mac_x550em_a:
2744                 /*
2745                  * set the WDIS bit to not clear the timer bits and cause an
2746                  * immediate assertion of the interrupt
2747                  */
2748                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2749                 break;
2750         default:
2751                 break;
2752         }
2753         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2754 }
2755
2756 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2757 {
2758         u32 new_itr;
2759
2760         ixgbe_update_itr(q_vector, &q_vector->tx);
2761         ixgbe_update_itr(q_vector, &q_vector->rx);
2762
2763         /* use the smallest value of new ITR delay calculations */
2764         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2765
2766         /* Clear latency flag if set, shift into correct position */
2767         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2768         new_itr <<= 2;
2769
2770         if (new_itr != q_vector->itr) {
2771                 /* save the algorithm value here */
2772                 q_vector->itr = new_itr;
2773
2774                 ixgbe_write_eitr(q_vector);
2775         }
2776 }
2777
2778 /**
2779  * ixgbe_check_overtemp_subtask - check for over temperature
2780  * @adapter: pointer to adapter
2781  **/
2782 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2783 {
2784         struct ixgbe_hw *hw = &adapter->hw;
2785         u32 eicr = adapter->interrupt_event;
2786         s32 rc;
2787
2788         if (test_bit(__IXGBE_DOWN, &adapter->state))
2789                 return;
2790
2791         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2792                 return;
2793
2794         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2795
2796         switch (hw->device_id) {
2797         case IXGBE_DEV_ID_82599_T3_LOM:
2798                 /*
2799                  * Since the warning interrupt is for both ports
2800                  * we don't have to check if:
2801                  *  - This interrupt wasn't for our port.
2802                  *  - We may have missed the interrupt so always have to
2803                  *    check if we  got a LSC
2804                  */
2805                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2806                     !(eicr & IXGBE_EICR_LSC))
2807                         return;
2808
2809                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2810                         u32 speed;
2811                         bool link_up = false;
2812
2813                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2814
2815                         if (link_up)
2816                                 return;
2817                 }
2818
2819                 /* Check if this is not due to overtemp */
2820                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2821                         return;
2822
2823                 break;
2824         case IXGBE_DEV_ID_X550EM_A_1G_T:
2825         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2826                 rc = hw->phy.ops.check_overtemp(hw);
2827                 if (rc != IXGBE_ERR_OVERTEMP)
2828                         return;
2829                 break;
2830         default:
2831                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2832                         return;
2833                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2834                         return;
2835                 break;
2836         }
2837         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2838
2839         adapter->interrupt_event = 0;
2840 }
2841
2842 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2843 {
2844         struct ixgbe_hw *hw = &adapter->hw;
2845
2846         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2847             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2848                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2849                 /* write to clear the interrupt */
2850                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2851         }
2852 }
2853
2854 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2855 {
2856         struct ixgbe_hw *hw = &adapter->hw;
2857
2858         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2859                 return;
2860
2861         switch (adapter->hw.mac.type) {
2862         case ixgbe_mac_82599EB:
2863                 /*
2864                  * Need to check link state so complete overtemp check
2865                  * on service task
2866                  */
2867                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2868                      (eicr & IXGBE_EICR_LSC)) &&
2869                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2870                         adapter->interrupt_event = eicr;
2871                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2872                         ixgbe_service_event_schedule(adapter);
2873                         return;
2874                 }
2875                 return;
2876         case ixgbe_mac_x550em_a:
2877                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2878                         adapter->interrupt_event = eicr;
2879                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2880                         ixgbe_service_event_schedule(adapter);
2881                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2882                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2883                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2884                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2885                 }
2886                 return;
2887         case ixgbe_mac_X550:
2888         case ixgbe_mac_X540:
2889                 if (!(eicr & IXGBE_EICR_TS))
2890                         return;
2891                 break;
2892         default:
2893                 return;
2894         }
2895
2896         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2897 }
2898
2899 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2900 {
2901         switch (hw->mac.type) {
2902         case ixgbe_mac_82598EB:
2903                 if (hw->phy.type == ixgbe_phy_nl)
2904                         return true;
2905                 return false;
2906         case ixgbe_mac_82599EB:
2907         case ixgbe_mac_X550EM_x:
2908         case ixgbe_mac_x550em_a:
2909                 switch (hw->mac.ops.get_media_type(hw)) {
2910                 case ixgbe_media_type_fiber:
2911                 case ixgbe_media_type_fiber_qsfp:
2912                         return true;
2913                 default:
2914                         return false;
2915                 }
2916         default:
2917                 return false;
2918         }
2919 }
2920
2921 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2922 {
2923         struct ixgbe_hw *hw = &adapter->hw;
2924         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2925
2926         if (!ixgbe_is_sfp(hw))
2927                 return;
2928
2929         /* Later MAC's use different SDP */
2930         if (hw->mac.type >= ixgbe_mac_X540)
2931                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2932
2933         if (eicr & eicr_mask) {
2934                 /* Clear the interrupt */
2935                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2936                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2937                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2938                         adapter->sfp_poll_time = 0;
2939                         ixgbe_service_event_schedule(adapter);
2940                 }
2941         }
2942
2943         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2944             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2945                 /* Clear the interrupt */
2946                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2947                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2948                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2949                         ixgbe_service_event_schedule(adapter);
2950                 }
2951         }
2952 }
2953
2954 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2955 {
2956         struct ixgbe_hw *hw = &adapter->hw;
2957
2958         adapter->lsc_int++;
2959         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2960         adapter->link_check_timeout = jiffies;
2961         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2962                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2963                 IXGBE_WRITE_FLUSH(hw);
2964                 ixgbe_service_event_schedule(adapter);
2965         }
2966 }
2967
2968 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2969                                            u64 qmask)
2970 {
2971         u32 mask;
2972         struct ixgbe_hw *hw = &adapter->hw;
2973
2974         switch (hw->mac.type) {
2975         case ixgbe_mac_82598EB:
2976                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2977                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2978                 break;
2979         case ixgbe_mac_82599EB:
2980         case ixgbe_mac_X540:
2981         case ixgbe_mac_X550:
2982         case ixgbe_mac_X550EM_x:
2983         case ixgbe_mac_x550em_a:
2984                 mask = (qmask & 0xFFFFFFFF);
2985                 if (mask)
2986                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2987                 mask = (qmask >> 32);
2988                 if (mask)
2989                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2990                 break;
2991         default:
2992                 break;
2993         }
2994         /* skip the flush */
2995 }
2996
2997 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2998                                             u64 qmask)
2999 {
3000         u32 mask;
3001         struct ixgbe_hw *hw = &adapter->hw;
3002
3003         switch (hw->mac.type) {
3004         case ixgbe_mac_82598EB:
3005                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
3006                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
3007                 break;
3008         case ixgbe_mac_82599EB:
3009         case ixgbe_mac_X540:
3010         case ixgbe_mac_X550:
3011         case ixgbe_mac_X550EM_x:
3012         case ixgbe_mac_x550em_a:
3013                 mask = (qmask & 0xFFFFFFFF);
3014                 if (mask)
3015                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
3016                 mask = (qmask >> 32);
3017                 if (mask)
3018                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
3019                 break;
3020         default:
3021                 break;
3022         }
3023         /* skip the flush */
3024 }
3025
3026 /**
3027  * ixgbe_irq_enable - Enable default interrupt generation settings
3028  * @adapter: board private structure
3029  * @queues: enable irqs for queues
3030  * @flush: flush register write
3031  **/
3032 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
3033                                     bool flush)
3034 {
3035         struct ixgbe_hw *hw = &adapter->hw;
3036         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
3037
3038         /* don't reenable LSC while waiting for link */
3039         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
3040                 mask &= ~IXGBE_EIMS_LSC;
3041
3042         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3043                 switch (adapter->hw.mac.type) {
3044                 case ixgbe_mac_82599EB:
3045                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3046                         break;
3047                 case ixgbe_mac_X540:
3048                 case ixgbe_mac_X550:
3049                 case ixgbe_mac_X550EM_x:
3050                 case ixgbe_mac_x550em_a:
3051                         mask |= IXGBE_EIMS_TS;
3052                         break;
3053                 default:
3054                         break;
3055                 }
3056         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3057                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3058         switch (adapter->hw.mac.type) {
3059         case ixgbe_mac_82599EB:
3060                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3061                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3062                 /* fall through */
3063         case ixgbe_mac_X540:
3064         case ixgbe_mac_X550:
3065         case ixgbe_mac_X550EM_x:
3066         case ixgbe_mac_x550em_a:
3067                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3068                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3069                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3070                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3071                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3072                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3073                 mask |= IXGBE_EIMS_ECC;
3074                 mask |= IXGBE_EIMS_MAILBOX;
3075                 break;
3076         default:
3077                 break;
3078         }
3079
3080         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3081             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3082                 mask |= IXGBE_EIMS_FLOW_DIR;
3083
3084         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3085         if (queues)
3086                 ixgbe_irq_enable_queues(adapter, ~0);
3087         if (flush)
3088                 IXGBE_WRITE_FLUSH(&adapter->hw);
3089 }
3090
3091 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3092 {
3093         struct ixgbe_adapter *adapter = data;
3094         struct ixgbe_hw *hw = &adapter->hw;
3095         u32 eicr;
3096
3097         /*
3098          * Workaround for Silicon errata.  Use clear-by-write instead
3099          * of clear-by-read.  Reading with EICS will return the
3100          * interrupt causes without clearing, which later be done
3101          * with the write to EICR.
3102          */
3103         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3104
3105         /* The lower 16bits of the EICR register are for the queue interrupts
3106          * which should be masked here in order to not accidentally clear them if
3107          * the bits are high when ixgbe_msix_other is called. There is a race
3108          * condition otherwise which results in possible performance loss
3109          * especially if the ixgbe_msix_other interrupt is triggering
3110          * consistently (as it would when PPS is turned on for the X540 device)
3111          */
3112         eicr &= 0xFFFF0000;
3113
3114         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3115
3116         if (eicr & IXGBE_EICR_LSC)
3117                 ixgbe_check_lsc(adapter);
3118
3119         if (eicr & IXGBE_EICR_MAILBOX)
3120                 ixgbe_msg_task(adapter);
3121
3122         switch (hw->mac.type) {
3123         case ixgbe_mac_82599EB:
3124         case ixgbe_mac_X540:
3125         case ixgbe_mac_X550:
3126         case ixgbe_mac_X550EM_x:
3127         case ixgbe_mac_x550em_a:
3128                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3129                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3130                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3131                         ixgbe_service_event_schedule(adapter);
3132                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3133                                         IXGBE_EICR_GPI_SDP0_X540);
3134                 }
3135                 if (eicr & IXGBE_EICR_ECC) {
3136                         e_info(link, "Received ECC Err, initiating reset\n");
3137                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3138                         ixgbe_service_event_schedule(adapter);
3139                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3140                 }
3141                 /* Handle Flow Director Full threshold interrupt */
3142                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3143                         int reinit_count = 0;
3144                         int i;
3145                         for (i = 0; i < adapter->num_tx_queues; i++) {
3146                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3147                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3148                                                        &ring->state))
3149                                         reinit_count++;
3150                         }
3151                         if (reinit_count) {
3152                                 /* no more flow director interrupts until after init */
3153                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3154                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3155                                 ixgbe_service_event_schedule(adapter);
3156                         }
3157                 }
3158                 ixgbe_check_sfp_event(adapter, eicr);
3159                 ixgbe_check_overtemp_event(adapter, eicr);
3160                 break;
3161         default:
3162                 break;
3163         }
3164
3165         ixgbe_check_fan_failure(adapter, eicr);
3166
3167         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3168                 ixgbe_ptp_check_pps_event(adapter);
3169
3170         /* re-enable the original interrupt state, no lsc, no queues */
3171         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3172                 ixgbe_irq_enable(adapter, false, false);
3173
3174         return IRQ_HANDLED;
3175 }
3176
3177 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3178 {
3179         struct ixgbe_q_vector *q_vector = data;
3180
3181         /* EIAM disabled interrupts (on this vector) for us */
3182
3183         if (q_vector->rx.ring || q_vector->tx.ring)
3184                 napi_schedule_irqoff(&q_vector->napi);
3185
3186         return IRQ_HANDLED;
3187 }
3188
3189 /**
3190  * ixgbe_poll - NAPI Rx polling callback
3191  * @napi: structure for representing this polling device
3192  * @budget: how many packets driver is allowed to clean
3193  *
3194  * This function is used for legacy and MSI, NAPI mode
3195  **/
3196 int ixgbe_poll(struct napi_struct *napi, int budget)
3197 {
3198         struct ixgbe_q_vector *q_vector =
3199                                 container_of(napi, struct ixgbe_q_vector, napi);
3200         struct ixgbe_adapter *adapter = q_vector->adapter;
3201         struct ixgbe_ring *ring;
3202         int per_ring_budget, work_done = 0;
3203         bool clean_complete = true;
3204
3205 #ifdef CONFIG_IXGBE_DCA
3206         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3207                 ixgbe_update_dca(q_vector);
3208 #endif
3209
3210         ixgbe_for_each_ring(ring, q_vector->tx) {
3211                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3212                         clean_complete = false;
3213         }
3214
3215         /* Exit if we are called by netpoll */
3216         if (budget <= 0)
3217                 return budget;
3218
3219         /* attempt to distribute budget to each queue fairly, but don't allow
3220          * the budget to go below 1 because we'll exit polling */
3221         if (q_vector->rx.count > 1)
3222                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3223         else
3224                 per_ring_budget = budget;
3225
3226         ixgbe_for_each_ring(ring, q_vector->rx) {
3227                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3228                                                  per_ring_budget);
3229
3230                 work_done += cleaned;
3231                 if (cleaned >= per_ring_budget)
3232                         clean_complete = false;
3233         }
3234
3235         /* If all work not completed, return budget and keep polling */
3236         if (!clean_complete)
3237                 return budget;
3238
3239         /* all work done, exit the polling mode */
3240         napi_complete_done(napi, work_done);
3241         if (adapter->rx_itr_setting & 1)
3242                 ixgbe_set_itr(q_vector);
3243         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3244                 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3245
3246         return min(work_done, budget - 1);
3247 }
3248
3249 /**
3250  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3251  * @adapter: board private structure
3252  *
3253  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3254  * interrupts from the kernel.
3255  **/
3256 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3257 {
3258         struct net_device *netdev = adapter->netdev;
3259         unsigned int ri = 0, ti = 0;
3260         int vector, err;
3261
3262         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3263                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3264                 struct msix_entry *entry = &adapter->msix_entries[vector];
3265
3266                 if (q_vector->tx.ring && q_vector->rx.ring) {
3267                         snprintf(q_vector->name, sizeof(q_vector->name),
3268                                  "%s-TxRx-%u", netdev->name, ri++);
3269                         ti++;
3270                 } else if (q_vector->rx.ring) {
3271                         snprintf(q_vector->name, sizeof(q_vector->name),
3272                                  "%s-rx-%u", netdev->name, ri++);
3273                 } else if (q_vector->tx.ring) {
3274                         snprintf(q_vector->name, sizeof(q_vector->name),
3275                                  "%s-tx-%u", netdev->name, ti++);
3276                 } else {
3277                         /* skip this unused q_vector */
3278                         continue;
3279                 }
3280                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3281                                   q_vector->name, q_vector);
3282                 if (err) {
3283                         e_err(probe, "request_irq failed for MSIX interrupt "
3284                               "Error: %d\n", err);
3285                         goto free_queue_irqs;
3286                 }
3287                 /* If Flow Director is enabled, set interrupt affinity */
3288                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3289                         /* assign the mask for this irq */
3290                         irq_set_affinity_hint(entry->vector,
3291                                               &q_vector->affinity_mask);
3292                 }
3293         }
3294
3295         err = request_irq(adapter->msix_entries[vector].vector,
3296                           ixgbe_msix_other, 0, netdev->name, adapter);
3297         if (err) {
3298                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3299                 goto free_queue_irqs;
3300         }
3301
3302         return 0;
3303
3304 free_queue_irqs:
3305         while (vector) {
3306                 vector--;
3307                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3308                                       NULL);
3309                 free_irq(adapter->msix_entries[vector].vector,
3310                          adapter->q_vector[vector]);
3311         }
3312         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3313         pci_disable_msix(adapter->pdev);
3314         kfree(adapter->msix_entries);
3315         adapter->msix_entries = NULL;
3316         return err;
3317 }
3318
3319 /**
3320  * ixgbe_intr - legacy mode Interrupt Handler
3321  * @irq: interrupt number
3322  * @data: pointer to a network interface device structure
3323  **/
3324 static irqreturn_t ixgbe_intr(int irq, void *data)
3325 {
3326         struct ixgbe_adapter *adapter = data;
3327         struct ixgbe_hw *hw = &adapter->hw;
3328         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3329         u32 eicr;
3330
3331         /*
3332          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3333          * before the read of EICR.
3334          */
3335         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3336
3337         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3338          * therefore no explicit interrupt disable is necessary */
3339         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3340         if (!eicr) {
3341                 /*
3342                  * shared interrupt alert!
3343                  * make sure interrupts are enabled because the read will
3344                  * have disabled interrupts due to EIAM
3345                  * finish the workaround of silicon errata on 82598.  Unmask
3346                  * the interrupt that we masked before the EICR read.
3347                  */
3348                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3349                         ixgbe_irq_enable(adapter, true, true);
3350                 return IRQ_NONE;        /* Not our interrupt */
3351         }
3352
3353         if (eicr & IXGBE_EICR_LSC)
3354                 ixgbe_check_lsc(adapter);
3355
3356         switch (hw->mac.type) {
3357         case ixgbe_mac_82599EB:
3358                 ixgbe_check_sfp_event(adapter, eicr);
3359                 /* Fall through */
3360         case ixgbe_mac_X540:
3361         case ixgbe_mac_X550:
3362         case ixgbe_mac_X550EM_x:
3363         case ixgbe_mac_x550em_a:
3364                 if (eicr & IXGBE_EICR_ECC) {
3365                         e_info(link, "Received ECC Err, initiating reset\n");
3366                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3367                         ixgbe_service_event_schedule(adapter);
3368                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3369                 }
3370                 ixgbe_check_overtemp_event(adapter, eicr);
3371                 break;
3372         default:
3373                 break;
3374         }
3375
3376         ixgbe_check_fan_failure(adapter, eicr);
3377         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3378                 ixgbe_ptp_check_pps_event(adapter);
3379
3380         /* would disable interrupts here but EIAM disabled it */
3381         napi_schedule_irqoff(&q_vector->napi);
3382
3383         /*
3384          * re-enable link(maybe) and non-queue interrupts, no flush.
3385          * ixgbe_poll will re-enable the queue interrupts
3386          */
3387         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3388                 ixgbe_irq_enable(adapter, false, false);
3389
3390         return IRQ_HANDLED;
3391 }
3392
3393 /**
3394  * ixgbe_request_irq - initialize interrupts
3395  * @adapter: board private structure
3396  *
3397  * Attempts to configure interrupts using the best available
3398  * capabilities of the hardware and kernel.
3399  **/
3400 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3401 {
3402         struct net_device *netdev = adapter->netdev;
3403         int err;
3404
3405         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3406                 err = ixgbe_request_msix_irqs(adapter);
3407         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3408                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3409                                   netdev->name, adapter);
3410         else
3411                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3412                                   netdev->name, adapter);
3413
3414         if (err)
3415                 e_err(probe, "request_irq failed, Error %d\n", err);
3416
3417         return err;
3418 }
3419
3420 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3421 {
3422         int vector;
3423
3424         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3425                 free_irq(adapter->pdev->irq, adapter);
3426                 return;
3427         }
3428
3429         if (!adapter->msix_entries)
3430                 return;
3431
3432         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3433                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3434                 struct msix_entry *entry = &adapter->msix_entries[vector];
3435
3436                 /* free only the irqs that were actually requested */
3437                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3438                         continue;
3439
3440                 /* clear the affinity_mask in the IRQ descriptor */
3441                 irq_set_affinity_hint(entry->vector, NULL);
3442
3443                 free_irq(entry->vector, q_vector);
3444         }
3445
3446         free_irq(adapter->msix_entries[vector].vector, adapter);
3447 }
3448
3449 /**
3450  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3451  * @adapter: board private structure
3452  **/
3453 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3454 {
3455         switch (adapter->hw.mac.type) {
3456         case ixgbe_mac_82598EB:
3457                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3458                 break;
3459         case ixgbe_mac_82599EB:
3460         case ixgbe_mac_X540:
3461         case ixgbe_mac_X550:
3462         case ixgbe_mac_X550EM_x:
3463         case ixgbe_mac_x550em_a:
3464                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3465                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3466                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3467                 break;
3468         default:
3469                 break;
3470         }
3471         IXGBE_WRITE_FLUSH(&adapter->hw);
3472         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3473                 int vector;
3474
3475                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3476                         synchronize_irq(adapter->msix_entries[vector].vector);
3477
3478                 synchronize_irq(adapter->msix_entries[vector++].vector);
3479         } else {
3480                 synchronize_irq(adapter->pdev->irq);
3481         }
3482 }
3483
3484 /**
3485  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3486  * @adapter: board private structure
3487  *
3488  **/
3489 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3490 {
3491         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3492
3493         ixgbe_write_eitr(q_vector);
3494
3495         ixgbe_set_ivar(adapter, 0, 0, 0);
3496         ixgbe_set_ivar(adapter, 1, 0, 0);
3497
3498         e_info(hw, "Legacy interrupt IVAR setup done\n");
3499 }
3500
3501 /**
3502  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3503  * @adapter: board private structure
3504  * @ring: structure containing ring specific data
3505  *
3506  * Configure the Tx descriptor ring after a reset.
3507  **/
3508 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3509                              struct ixgbe_ring *ring)
3510 {
3511         struct ixgbe_hw *hw = &adapter->hw;
3512         u64 tdba = ring->dma;
3513         int wait_loop = 10;
3514         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3515         u8 reg_idx = ring->reg_idx;
3516
3517         /* disable queue to avoid issues while updating state */
3518         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3519         IXGBE_WRITE_FLUSH(hw);
3520
3521         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3522                         (tdba & DMA_BIT_MASK(32)));
3523         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3524         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3525                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3526         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3527         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3528         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3529
3530         /*
3531          * set WTHRESH to encourage burst writeback, it should not be set
3532          * higher than 1 when:
3533          * - ITR is 0 as it could cause false TX hangs
3534          * - ITR is set to > 100k int/sec and BQL is enabled
3535          *
3536          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3537          * to or less than the number of on chip descriptors, which is
3538          * currently 40.
3539          */
3540         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3541                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3542         else
3543                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3544
3545         /*
3546          * Setting PTHRESH to 32 both improves performance
3547          * and avoids a TX hang with DFP enabled
3548          */
3549         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3550                    32;          /* PTHRESH = 32 */
3551
3552         /* reinitialize flowdirector state */
3553         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3554                 ring->atr_sample_rate = adapter->atr_sample_rate;
3555                 ring->atr_count = 0;
3556                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3557         } else {
3558                 ring->atr_sample_rate = 0;
3559         }
3560
3561         /* initialize XPS */
3562         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3563                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3564
3565                 if (q_vector)
3566                         netif_set_xps_queue(ring->netdev,
3567                                             &q_vector->affinity_mask,
3568                                             ring->queue_index);
3569         }
3570
3571         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3572
3573         /* reinitialize tx_buffer_info */
3574         memset(ring->tx_buffer_info, 0,
3575                sizeof(struct ixgbe_tx_buffer) * ring->count);
3576
3577         /* enable queue */
3578         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3579
3580         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3581         if (hw->mac.type == ixgbe_mac_82598EB &&
3582             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3583                 return;
3584
3585         /* poll to verify queue is enabled */
3586         do {
3587                 usleep_range(1000, 2000);
3588                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3589         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3590         if (!wait_loop)
3591                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3592 }
3593
3594 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3595 {
3596         struct ixgbe_hw *hw = &adapter->hw;
3597         u32 rttdcs, mtqc;
3598         u8 tcs = adapter->hw_tcs;
3599
3600         if (hw->mac.type == ixgbe_mac_82598EB)
3601                 return;
3602
3603         /* disable the arbiter while setting MTQC */
3604         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3605         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3606         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3607
3608         /* set transmit pool layout */
3609         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3610                 mtqc = IXGBE_MTQC_VT_ENA;
3611                 if (tcs > 4)
3612                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3613                 else if (tcs > 1)
3614                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3615                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3616                          IXGBE_82599_VMDQ_4Q_MASK)
3617                         mtqc |= IXGBE_MTQC_32VF;
3618                 else
3619                         mtqc |= IXGBE_MTQC_64VF;
3620         } else {
3621                 if (tcs > 4)
3622                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3623                 else if (tcs > 1)
3624                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3625                 else
3626                         mtqc = IXGBE_MTQC_64Q_1PB;
3627         }
3628
3629         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3630
3631         /* Enable Security TX Buffer IFG for multiple pb */
3632         if (tcs) {
3633                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3634                 sectx |= IXGBE_SECTX_DCB;
3635                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3636         }
3637
3638         /* re-enable the arbiter */
3639         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3640         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3641 }
3642
3643 /**
3644  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3645  * @adapter: board private structure
3646  *
3647  * Configure the Tx unit of the MAC after a reset.
3648  **/
3649 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3650 {
3651         struct ixgbe_hw *hw = &adapter->hw;
3652         u32 dmatxctl;
3653         u32 i;
3654
3655         ixgbe_setup_mtqc(adapter);
3656
3657         if (hw->mac.type != ixgbe_mac_82598EB) {
3658                 /* DMATXCTL.EN must be before Tx queues are enabled */
3659                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3660                 dmatxctl |= IXGBE_DMATXCTL_TE;
3661                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3662         }
3663
3664         /* Setup the HW Tx Head and Tail descriptor pointers */
3665         for (i = 0; i < adapter->num_tx_queues; i++)
3666                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3667         for (i = 0; i < adapter->num_xdp_queues; i++)
3668                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3669 }
3670
3671 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3672                                  struct ixgbe_ring *ring)
3673 {
3674         struct ixgbe_hw *hw = &adapter->hw;
3675         u8 reg_idx = ring->reg_idx;
3676         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3677
3678         srrctl |= IXGBE_SRRCTL_DROP_EN;
3679
3680         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3681 }
3682
3683 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3684                                   struct ixgbe_ring *ring)
3685 {
3686         struct ixgbe_hw *hw = &adapter->hw;
3687         u8 reg_idx = ring->reg_idx;
3688         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3689
3690         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3691
3692         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3693 }
3694
3695 #ifdef CONFIG_IXGBE_DCB
3696 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3697 #else
3698 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3699 #endif
3700 {
3701         int i;
3702         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3703
3704         if (adapter->ixgbe_ieee_pfc)
3705                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3706
3707         /*
3708          * We should set the drop enable bit if:
3709          *  SR-IOV is enabled
3710          *   or
3711          *  Number of Rx queues > 1 and flow control is disabled
3712          *
3713          *  This allows us to avoid head of line blocking for security
3714          *  and performance reasons.
3715          */
3716         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3717             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3718                 for (i = 0; i < adapter->num_rx_queues; i++)
3719                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3720         } else {
3721                 for (i = 0; i < adapter->num_rx_queues; i++)
3722                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3723         }
3724 }
3725
3726 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3727
3728 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3729                                    struct ixgbe_ring *rx_ring)
3730 {
3731         struct ixgbe_hw *hw = &adapter->hw;
3732         u32 srrctl;
3733         u8 reg_idx = rx_ring->reg_idx;
3734
3735         if (hw->mac.type == ixgbe_mac_82598EB) {
3736                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3737
3738                 /*
3739                  * if VMDq is not active we must program one srrctl register
3740                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3741                  */
3742                 reg_idx &= mask;
3743         }
3744
3745         /* configure header buffer length, needed for RSC */
3746         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3747
3748         /* configure the packet buffer length */
3749         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3750                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3751         else
3752                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3753
3754         /* configure descriptor type */
3755         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3756
3757         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3758 }
3759
3760 /**
3761  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3762  * @adapter: device handle
3763  *
3764  *  - 82598/82599/X540:     128
3765  *  - X550(non-SRIOV mode): 512
3766  *  - X550(SRIOV mode):     64
3767  */
3768 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3769 {
3770         if (adapter->hw.mac.type < ixgbe_mac_X550)
3771                 return 128;
3772         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3773                 return 64;
3774         else
3775                 return 512;
3776 }
3777
3778 /**
3779  * ixgbe_store_key - Write the RSS key to HW
3780  * @adapter: device handle
3781  *
3782  * Write the RSS key stored in adapter.rss_key to HW.
3783  */
3784 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3785 {
3786         struct ixgbe_hw *hw = &adapter->hw;
3787         int i;
3788
3789         for (i = 0; i < 10; i++)
3790                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3791 }
3792
3793 /**
3794  * ixgbe_init_rss_key - Initialize adapter RSS key
3795  * @adapter: device handle
3796  *
3797  * Allocates and initializes the RSS key if it is not allocated.
3798  **/
3799 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3800 {
3801         u32 *rss_key;
3802
3803         if (!adapter->rss_key) {
3804                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3805                 if (unlikely(!rss_key))
3806                         return -ENOMEM;
3807
3808                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3809                 adapter->rss_key = rss_key;
3810         }
3811
3812         return 0;
3813 }
3814
3815 /**
3816  * ixgbe_store_reta - Write the RETA table to HW
3817  * @adapter: device handle
3818  *
3819  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3820  */
3821 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3822 {
3823         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3824         struct ixgbe_hw *hw = &adapter->hw;
3825         u32 reta = 0;
3826         u32 indices_multi;
3827         u8 *indir_tbl = adapter->rss_indir_tbl;
3828
3829         /* Fill out the redirection table as follows:
3830          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3831          *    indices.
3832          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3833          *  - X550:       8 bit wide entries containing 6 bit RSS index
3834          */
3835         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3836                 indices_multi = 0x11;
3837         else
3838                 indices_multi = 0x1;
3839
3840         /* Write redirection table to HW */
3841         for (i = 0; i < reta_entries; i++) {
3842                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3843                 if ((i & 3) == 3) {
3844                         if (i < 128)
3845                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3846                         else
3847                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3848                                                 reta);
3849                         reta = 0;
3850                 }
3851         }
3852 }
3853
3854 /**
3855  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3856  * @adapter: device handle
3857  *
3858  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3859  */
3860 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3861 {
3862         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3863         struct ixgbe_hw *hw = &adapter->hw;
3864         u32 vfreta = 0;
3865
3866         /* Write redirection table to HW */
3867         for (i = 0; i < reta_entries; i++) {
3868                 u16 pool = adapter->num_rx_pools;
3869
3870                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3871                 if ((i & 3) != 3)
3872                         continue;
3873
3874                 while (pool--)
3875                         IXGBE_WRITE_REG(hw,
3876                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3877                                         vfreta);
3878                 vfreta = 0;
3879         }
3880 }
3881
3882 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3883 {
3884         u32 i, j;
3885         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3886         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3887
3888         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3889          * make full use of any rings they may have.  We will use the
3890          * PSRTYPE register to control how many rings we use within the PF.
3891          */
3892         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3893                 rss_i = 4;
3894
3895         /* Fill out hash function seeds */
3896         ixgbe_store_key(adapter);
3897
3898         /* Fill out redirection table */
3899         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3900
3901         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3902                 if (j == rss_i)
3903                         j = 0;
3904
3905                 adapter->rss_indir_tbl[i] = j;
3906         }
3907
3908         ixgbe_store_reta(adapter);
3909 }
3910
3911 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3912 {
3913         struct ixgbe_hw *hw = &adapter->hw;
3914         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3915         int i, j;
3916
3917         /* Fill out hash function seeds */
3918         for (i = 0; i < 10; i++) {
3919                 u16 pool = adapter->num_rx_pools;
3920
3921                 while (pool--)
3922                         IXGBE_WRITE_REG(hw,
3923                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3924                                         *(adapter->rss_key + i));
3925         }
3926
3927         /* Fill out the redirection table */
3928         for (i = 0, j = 0; i < 64; i++, j++) {
3929                 if (j == rss_i)
3930                         j = 0;
3931
3932                 adapter->rss_indir_tbl[i] = j;
3933         }
3934
3935         ixgbe_store_vfreta(adapter);
3936 }
3937
3938 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3939 {
3940         struct ixgbe_hw *hw = &adapter->hw;
3941         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3942         u32 rxcsum;
3943
3944         /* Disable indicating checksum in descriptor, enables RSS hash */
3945         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3946         rxcsum |= IXGBE_RXCSUM_PCSD;
3947         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3948
3949         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3950                 if (adapter->ring_feature[RING_F_RSS].mask)
3951                         mrqc = IXGBE_MRQC_RSSEN;
3952         } else {
3953                 u8 tcs = adapter->hw_tcs;
3954
3955                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3956                         if (tcs > 4)
3957                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3958                         else if (tcs > 1)
3959                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3960                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3961                                  IXGBE_82599_VMDQ_4Q_MASK)
3962                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3963                         else
3964                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3965
3966                         /* Enable L3/L4 for Tx Switched packets */
3967                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3968                 } else {
3969                         if (tcs > 4)
3970                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3971                         else if (tcs > 1)
3972                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3973                         else
3974                                 mrqc = IXGBE_MRQC_RSSEN;
3975                 }
3976         }
3977
3978         /* Perform hash on these packet types */
3979         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3980                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3981                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3982                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3983
3984         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3985                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3986         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3987                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3988
3989         if ((hw->mac.type >= ixgbe_mac_X550) &&
3990             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3991                 u16 pool = adapter->num_rx_pools;
3992
3993                 /* Enable VF RSS mode */
3994                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3995                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3996
3997                 /* Setup RSS through the VF registers */
3998                 ixgbe_setup_vfreta(adapter);
3999                 vfmrqc = IXGBE_MRQC_RSSEN;
4000                 vfmrqc |= rss_field;
4001
4002                 while (pool--)
4003                         IXGBE_WRITE_REG(hw,
4004                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
4005                                         vfmrqc);
4006         } else {
4007                 ixgbe_setup_reta(adapter);
4008                 mrqc |= rss_field;
4009                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4010         }
4011 }
4012
4013 /**
4014  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4015  * @adapter: address of board private structure
4016  * @ring: structure containing ring specific data
4017  **/
4018 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4019                                    struct ixgbe_ring *ring)
4020 {
4021         struct ixgbe_hw *hw = &adapter->hw;
4022         u32 rscctrl;
4023         u8 reg_idx = ring->reg_idx;
4024
4025         if (!ring_is_rsc_enabled(ring))
4026                 return;
4027
4028         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4029         rscctrl |= IXGBE_RSCCTL_RSCEN;
4030         /*
4031          * we must limit the number of descriptors so that the
4032          * total size of max desc * buf_len is not greater
4033          * than 65536
4034          */
4035         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4036         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4037 }
4038
4039 #define IXGBE_MAX_RX_DESC_POLL 10
4040 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4041                                        struct ixgbe_ring *ring)
4042 {
4043         struct ixgbe_hw *hw = &adapter->hw;
4044         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4045         u32 rxdctl;
4046         u8 reg_idx = ring->reg_idx;
4047
4048         if (ixgbe_removed(hw->hw_addr))
4049                 return;
4050         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4051         if (hw->mac.type == ixgbe_mac_82598EB &&
4052             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4053                 return;
4054
4055         do {
4056                 usleep_range(1000, 2000);
4057                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4058         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4059
4060         if (!wait_loop) {
4061                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4062                       "the polling period\n", reg_idx);
4063         }
4064 }
4065
4066 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
4067                             struct ixgbe_ring *ring)
4068 {
4069         struct ixgbe_hw *hw = &adapter->hw;
4070         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4071         u32 rxdctl;
4072         u8 reg_idx = ring->reg_idx;
4073
4074         if (ixgbe_removed(hw->hw_addr))
4075                 return;
4076         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4077         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4078
4079         /* write value back with RXDCTL.ENABLE bit cleared */
4080         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4081
4082         if (hw->mac.type == ixgbe_mac_82598EB &&
4083             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4084                 return;
4085
4086         /* the hardware may take up to 100us to really disable the rx queue */
4087         do {
4088                 udelay(10);
4089                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4090         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
4091
4092         if (!wait_loop) {
4093                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
4094                       "the polling period\n", reg_idx);
4095         }
4096 }
4097
4098 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4099                              struct ixgbe_ring *ring)
4100 {
4101         struct ixgbe_hw *hw = &adapter->hw;
4102         union ixgbe_adv_rx_desc *rx_desc;
4103         u64 rdba = ring->dma;
4104         u32 rxdctl;
4105         u8 reg_idx = ring->reg_idx;
4106
4107         /* disable queue to avoid issues while updating state */
4108         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4109         ixgbe_disable_rx_queue(adapter, ring);
4110
4111         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4112         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4113         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4114                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4115         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4116         IXGBE_WRITE_FLUSH(hw);
4117
4118         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4119         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4120         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4121
4122         ixgbe_configure_srrctl(adapter, ring);
4123         ixgbe_configure_rscctl(adapter, ring);
4124
4125         if (hw->mac.type == ixgbe_mac_82598EB) {
4126                 /*
4127                  * enable cache line friendly hardware writes:
4128                  * PTHRESH=32 descriptors (half the internal cache),
4129                  * this also removes ugly rx_no_buffer_count increment
4130                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4131                  * WTHRESH=8 burst writeback up to two cache lines
4132                  */
4133                 rxdctl &= ~0x3FFFFF;
4134                 rxdctl |=  0x080420;
4135 #if (PAGE_SIZE < 8192)
4136         } else {
4137                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4138                             IXGBE_RXDCTL_RLPML_EN);
4139
4140                 /* Limit the maximum frame size so we don't overrun the skb */
4141                 if (ring_uses_build_skb(ring) &&
4142                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4143                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4144                                   IXGBE_RXDCTL_RLPML_EN;
4145 #endif
4146         }
4147
4148         /* initialize rx_buffer_info */
4149         memset(ring->rx_buffer_info, 0,
4150                sizeof(struct ixgbe_rx_buffer) * ring->count);
4151
4152         /* initialize Rx descriptor 0 */
4153         rx_desc = IXGBE_RX_DESC(ring, 0);
4154         rx_desc->wb.upper.length = 0;
4155
4156         /* enable receive descriptor ring */
4157         rxdctl |= IXGBE_RXDCTL_ENABLE;
4158         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4159
4160         ixgbe_rx_desc_queue_enable(adapter, ring);
4161         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4162 }
4163
4164 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4165 {
4166         struct ixgbe_hw *hw = &adapter->hw;
4167         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4168         u16 pool = adapter->num_rx_pools;
4169
4170         /* PSRTYPE must be initialized in non 82598 adapters */
4171         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4172                       IXGBE_PSRTYPE_UDPHDR |
4173                       IXGBE_PSRTYPE_IPV4HDR |
4174                       IXGBE_PSRTYPE_L2HDR |
4175                       IXGBE_PSRTYPE_IPV6HDR;
4176
4177         if (hw->mac.type == ixgbe_mac_82598EB)
4178                 return;
4179
4180         if (rss_i > 3)
4181                 psrtype |= 2u << 29;
4182         else if (rss_i > 1)
4183                 psrtype |= 1u << 29;
4184
4185         while (pool--)
4186                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4187 }
4188
4189 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4190 {
4191         struct ixgbe_hw *hw = &adapter->hw;
4192         u32 reg_offset, vf_shift;
4193         u32 gcr_ext, vmdctl;
4194         int i;
4195
4196         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4197                 return;
4198
4199         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4200         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4201         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4202         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4203         vmdctl |= IXGBE_VT_CTL_REPLEN;
4204         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4205
4206         vf_shift = VMDQ_P(0) % 32;
4207         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4208
4209         /* Enable only the PF's pool for Tx/Rx */
4210         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4211         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4212         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4213         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4214         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4215                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4216
4217         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4218         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4219
4220         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4221         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4222
4223         /*
4224          * Set up VF register offsets for selected VT Mode,
4225          * i.e. 32 or 64 VFs for SR-IOV
4226          */
4227         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4228         case IXGBE_82599_VMDQ_8Q_MASK:
4229                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4230                 break;
4231         case IXGBE_82599_VMDQ_4Q_MASK:
4232                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4233                 break;
4234         default:
4235                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4236                 break;
4237         }
4238
4239         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4240
4241         for (i = 0; i < adapter->num_vfs; i++) {
4242                 /* configure spoof checking */
4243                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4244                                           adapter->vfinfo[i].spoofchk_enabled);
4245
4246                 /* Enable/Disable RSS query feature  */
4247                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4248                                           adapter->vfinfo[i].rss_query_enabled);
4249         }
4250 }
4251
4252 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4253 {
4254         struct ixgbe_hw *hw = &adapter->hw;
4255         struct net_device *netdev = adapter->netdev;
4256         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4257         struct ixgbe_ring *rx_ring;
4258         int i;
4259         u32 mhadd, hlreg0;
4260
4261 #ifdef IXGBE_FCOE
4262         /* adjust max frame to be able to do baby jumbo for FCoE */
4263         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4264             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4265                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4266
4267 #endif /* IXGBE_FCOE */
4268
4269         /* adjust max frame to be at least the size of a standard frame */
4270         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4271                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4272
4273         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4274         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4275                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4276                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4277
4278                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4279         }
4280
4281         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4282         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4283         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4284         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4285
4286         /*
4287          * Setup the HW Rx Head and Tail Descriptor Pointers and
4288          * the Base and Length of the Rx Descriptor Ring
4289          */
4290         for (i = 0; i < adapter->num_rx_queues; i++) {
4291                 rx_ring = adapter->rx_ring[i];
4292
4293                 clear_ring_rsc_enabled(rx_ring);
4294                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4295                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4296
4297                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4298                         set_ring_rsc_enabled(rx_ring);
4299
4300                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4301                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4302
4303                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4304                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4305                         continue;
4306
4307                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4308
4309 #if (PAGE_SIZE < 8192)
4310                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4311                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4312
4313                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4314                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4315                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4316 #endif
4317         }
4318 }
4319
4320 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4321 {
4322         struct ixgbe_hw *hw = &adapter->hw;
4323         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4324
4325         switch (hw->mac.type) {
4326         case ixgbe_mac_82598EB:
4327                 /*
4328                  * For VMDq support of different descriptor types or
4329                  * buffer sizes through the use of multiple SRRCTL
4330                  * registers, RDRXCTL.MVMEN must be set to 1
4331                  *
4332                  * also, the manual doesn't mention it clearly but DCA hints
4333                  * will only use queue 0's tags unless this bit is set.  Side
4334                  * effects of setting this bit are only that SRRCTL must be
4335                  * fully programmed [0..15]
4336                  */
4337                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4338                 break;
4339         case ixgbe_mac_X550:
4340         case ixgbe_mac_X550EM_x:
4341         case ixgbe_mac_x550em_a:
4342                 if (adapter->num_vfs)
4343                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4344                 /* fall through */
4345         case ixgbe_mac_82599EB:
4346         case ixgbe_mac_X540:
4347                 /* Disable RSC for ACK packets */
4348                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4349                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4350                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4351                 /* hardware requires some bits to be set by default */
4352                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4353                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4354                 break;
4355         default:
4356                 /* We should do nothing since we don't know this hardware */
4357                 return;
4358         }
4359
4360         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4361 }
4362
4363 /**
4364  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4365  * @adapter: board private structure
4366  *
4367  * Configure the Rx unit of the MAC after a reset.
4368  **/
4369 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4370 {
4371         struct ixgbe_hw *hw = &adapter->hw;
4372         int i;
4373         u32 rxctrl, rfctl;
4374
4375         /* disable receives while setting up the descriptors */
4376         hw->mac.ops.disable_rx(hw);
4377
4378         ixgbe_setup_psrtype(adapter);
4379         ixgbe_setup_rdrxctl(adapter);
4380
4381         /* RSC Setup */
4382         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4383         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4384         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4385                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4386
4387         /* disable NFS filtering */
4388         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4389         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4390
4391         /* Program registers for the distribution of queues */
4392         ixgbe_setup_mrqc(adapter);
4393
4394         /* set_rx_buffer_len must be called before ring initialization */
4395         ixgbe_set_rx_buffer_len(adapter);
4396
4397         /*
4398          * Setup the HW Rx Head and Tail Descriptor Pointers and
4399          * the Base and Length of the Rx Descriptor Ring
4400          */
4401         for (i = 0; i < adapter->num_rx_queues; i++)
4402                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4403
4404         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4405         /* disable drop enable for 82598 parts */
4406         if (hw->mac.type == ixgbe_mac_82598EB)
4407                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4408
4409         /* enable all receives */
4410         rxctrl |= IXGBE_RXCTRL_RXEN;
4411         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4412 }
4413
4414 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4415                                  __be16 proto, u16 vid)
4416 {
4417         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4418         struct ixgbe_hw *hw = &adapter->hw;
4419
4420         /* add VID to filter table */
4421         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4422                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4423
4424         set_bit(vid, adapter->active_vlans);
4425
4426         return 0;
4427 }
4428
4429 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4430 {
4431         u32 vlvf;
4432         int idx;
4433
4434         /* short cut the special case */
4435         if (vlan == 0)
4436                 return 0;
4437
4438         /* Search for the vlan id in the VLVF entries */
4439         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4440                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4441                 if ((vlvf & VLAN_VID_MASK) == vlan)
4442                         break;
4443         }
4444
4445         return idx;
4446 }
4447
4448 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4449 {
4450         struct ixgbe_hw *hw = &adapter->hw;
4451         u32 bits, word;
4452         int idx;
4453
4454         idx = ixgbe_find_vlvf_entry(hw, vid);
4455         if (!idx)
4456                 return;
4457
4458         /* See if any other pools are set for this VLAN filter
4459          * entry other than the PF.
4460          */
4461         word = idx * 2 + (VMDQ_P(0) / 32);
4462         bits = ~BIT(VMDQ_P(0) % 32);
4463         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4464
4465         /* Disable the filter so this falls into the default pool. */
4466         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4467                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4468                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4469                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4470         }
4471 }
4472
4473 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4474                                   __be16 proto, u16 vid)
4475 {
4476         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4477         struct ixgbe_hw *hw = &adapter->hw;
4478
4479         /* remove VID from filter table */
4480         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4481                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4482
4483         clear_bit(vid, adapter->active_vlans);
4484
4485         return 0;
4486 }
4487
4488 /**
4489  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4490  * @adapter: driver data
4491  */
4492 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4493 {
4494         struct ixgbe_hw *hw = &adapter->hw;
4495         u32 vlnctrl;
4496         int i, j;
4497
4498         switch (hw->mac.type) {
4499         case ixgbe_mac_82598EB:
4500                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4501                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4502                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4503                 break;
4504         case ixgbe_mac_82599EB:
4505         case ixgbe_mac_X540:
4506         case ixgbe_mac_X550:
4507         case ixgbe_mac_X550EM_x:
4508         case ixgbe_mac_x550em_a:
4509                 for (i = 0; i < adapter->num_rx_queues; i++) {
4510                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4511
4512                         if (!netif_is_ixgbe(ring->netdev))
4513                                 continue;
4514
4515                         j = ring->reg_idx;
4516                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4517                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4518                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4519                 }
4520                 break;
4521         default:
4522                 break;
4523         }
4524 }
4525
4526 /**
4527  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4528  * @adapter: driver data
4529  */
4530 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4531 {
4532         struct ixgbe_hw *hw = &adapter->hw;
4533         u32 vlnctrl;
4534         int i, j;
4535
4536         switch (hw->mac.type) {
4537         case ixgbe_mac_82598EB:
4538                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4539                 vlnctrl |= IXGBE_VLNCTRL_VME;
4540                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4541                 break;
4542         case ixgbe_mac_82599EB:
4543         case ixgbe_mac_X540:
4544         case ixgbe_mac_X550:
4545         case ixgbe_mac_X550EM_x:
4546         case ixgbe_mac_x550em_a:
4547                 for (i = 0; i < adapter->num_rx_queues; i++) {
4548                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4549
4550                         if (!netif_is_ixgbe(ring->netdev))
4551                                 continue;
4552
4553                         j = ring->reg_idx;
4554                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4555                         vlnctrl |= IXGBE_RXDCTL_VME;
4556                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4557                 }
4558                 break;
4559         default:
4560                 break;
4561         }
4562 }
4563
4564 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4565 {
4566         struct ixgbe_hw *hw = &adapter->hw;
4567         u32 vlnctrl, i;
4568
4569         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4570
4571         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4572         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4573                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4574                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4575         } else {
4576                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4577                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4578                 return;
4579         }
4580
4581         /* Nothing to do for 82598 */
4582         if (hw->mac.type == ixgbe_mac_82598EB)
4583                 return;
4584
4585         /* We are already in VLAN promisc, nothing to do */
4586         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4587                 return;
4588
4589         /* Set flag so we don't redo unnecessary work */
4590         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4591
4592         /* Add PF to all active pools */
4593         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4594                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4595                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4596
4597                 vlvfb |= BIT(VMDQ_P(0) % 32);
4598                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4599         }
4600
4601         /* Set all bits in the VLAN filter table array */
4602         for (i = hw->mac.vft_size; i--;)
4603                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4604 }
4605
4606 #define VFTA_BLOCK_SIZE 8
4607 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4608 {
4609         struct ixgbe_hw *hw = &adapter->hw;
4610         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4611         u32 vid_start = vfta_offset * 32;
4612         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4613         u32 i, vid, word, bits;
4614
4615         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4616                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4617
4618                 /* pull VLAN ID from VLVF */
4619                 vid = vlvf & VLAN_VID_MASK;
4620
4621                 /* only concern outselves with a certain range */
4622                 if (vid < vid_start || vid >= vid_end)
4623                         continue;
4624
4625                 if (vlvf) {
4626                         /* record VLAN ID in VFTA */
4627                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4628
4629                         /* if PF is part of this then continue */
4630                         if (test_bit(vid, adapter->active_vlans))
4631                                 continue;
4632                 }
4633
4634                 /* remove PF from the pool */
4635                 word = i * 2 + VMDQ_P(0) / 32;
4636                 bits = ~BIT(VMDQ_P(0) % 32);
4637                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4638                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4639         }
4640
4641         /* extract values from active_vlans and write back to VFTA */
4642         for (i = VFTA_BLOCK_SIZE; i--;) {
4643                 vid = (vfta_offset + i) * 32;
4644                 word = vid / BITS_PER_LONG;
4645                 bits = vid % BITS_PER_LONG;
4646
4647                 vfta[i] |= adapter->active_vlans[word] >> bits;
4648
4649                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4650         }
4651 }
4652
4653 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4654 {
4655         struct ixgbe_hw *hw = &adapter->hw;
4656         u32 vlnctrl, i;
4657
4658         /* Set VLAN filtering to enabled */
4659         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4660         vlnctrl |= IXGBE_VLNCTRL_VFE;
4661         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4662
4663         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4664             hw->mac.type == ixgbe_mac_82598EB)
4665                 return;
4666
4667         /* We are not in VLAN promisc, nothing to do */
4668         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4669                 return;
4670
4671         /* Set flag so we don't redo unnecessary work */
4672         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4673
4674         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4675                 ixgbe_scrub_vfta(adapter, i);
4676 }
4677
4678 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4679 {
4680         u16 vid = 1;
4681
4682         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4683
4684         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4685                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4686 }
4687
4688 /**
4689  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4690  * @netdev: network interface device structure
4691  *
4692  * Writes multicast address list to the MTA hash table.
4693  * Returns: -ENOMEM on failure
4694  *                0 on no addresses written
4695  *                X on writing X addresses to MTA
4696  **/
4697 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4698 {
4699         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4700         struct ixgbe_hw *hw = &adapter->hw;
4701
4702         if (!netif_running(netdev))
4703                 return 0;
4704
4705         if (hw->mac.ops.update_mc_addr_list)
4706                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4707         else
4708                 return -ENOMEM;
4709
4710 #ifdef CONFIG_PCI_IOV
4711         ixgbe_restore_vf_multicasts(adapter);
4712 #endif
4713
4714         return netdev_mc_count(netdev);
4715 }
4716
4717 #ifdef CONFIG_PCI_IOV
4718 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4719 {
4720         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4721         struct ixgbe_hw *hw = &adapter->hw;
4722         int i;
4723
4724         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4725                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4726
4727                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4728                         hw->mac.ops.set_rar(hw, i,
4729                                             mac_table->addr,
4730                                             mac_table->pool,
4731                                             IXGBE_RAH_AV);
4732                 else
4733                         hw->mac.ops.clear_rar(hw, i);
4734         }
4735 }
4736
4737 #endif
4738 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4739 {
4740         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4741         struct ixgbe_hw *hw = &adapter->hw;
4742         int i;
4743
4744         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4745                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4746                         continue;
4747
4748                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4749
4750                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4751                         hw->mac.ops.set_rar(hw, i,
4752                                             mac_table->addr,
4753                                             mac_table->pool,
4754                                             IXGBE_RAH_AV);
4755                 else
4756                         hw->mac.ops.clear_rar(hw, i);
4757         }
4758 }
4759
4760 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4761 {
4762         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4763         struct ixgbe_hw *hw = &adapter->hw;
4764         int i;
4765
4766         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4767                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4768                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4769         }
4770
4771         ixgbe_sync_mac_table(adapter);
4772 }
4773
4774 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4775 {
4776         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4777         struct ixgbe_hw *hw = &adapter->hw;
4778         int i, count = 0;
4779
4780         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4781                 /* do not count default RAR as available */
4782                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4783                         continue;
4784
4785                 /* only count unused and addresses that belong to us */
4786                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4787                         if (mac_table->pool != pool)
4788                                 continue;
4789                 }
4790
4791                 count++;
4792         }
4793
4794         return count;
4795 }
4796
4797 /* this function destroys the first RAR entry */
4798 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4799 {
4800         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4801         struct ixgbe_hw *hw = &adapter->hw;
4802
4803         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4804         mac_table->pool = VMDQ_P(0);
4805
4806         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4807
4808         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4809                             IXGBE_RAH_AV);
4810 }
4811
4812 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4813                          const u8 *addr, u16 pool)
4814 {
4815         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4816         struct ixgbe_hw *hw = &adapter->hw;
4817         int i;
4818
4819         if (is_zero_ether_addr(addr))
4820                 return -EINVAL;
4821
4822         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4823                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4824                         continue;
4825
4826                 ether_addr_copy(mac_table->addr, addr);
4827                 mac_table->pool = pool;
4828
4829                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4830                                     IXGBE_MAC_STATE_IN_USE;
4831
4832                 ixgbe_sync_mac_table(adapter);
4833
4834                 return i;
4835         }
4836
4837         return -ENOMEM;
4838 }
4839
4840 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4841                          const u8 *addr, u16 pool)
4842 {
4843         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4844         struct ixgbe_hw *hw = &adapter->hw;
4845         int i;
4846
4847         if (is_zero_ether_addr(addr))
4848                 return -EINVAL;
4849
4850         /* search table for addr, if found clear IN_USE flag and sync */
4851         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4852                 /* we can only delete an entry if it is in use */
4853                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4854                         continue;
4855                 /* we only care about entries that belong to the given pool */
4856                 if (mac_table->pool != pool)
4857                         continue;
4858                 /* we only care about a specific MAC address */
4859                 if (!ether_addr_equal(addr, mac_table->addr))
4860                         continue;
4861
4862                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4863                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4864
4865                 ixgbe_sync_mac_table(adapter);
4866
4867                 return 0;
4868         }
4869
4870         return -ENOMEM;
4871 }
4872
4873 /**
4874  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4875  * @netdev: network interface device structure
4876  * @vfn: pool to associate with unicast addresses
4877  *
4878  * Writes unicast address list to the RAR table.
4879  * Returns: -ENOMEM on failure/insufficient address space
4880  *                0 on no addresses written
4881  *                X on writing X addresses to the RAR table
4882  **/
4883 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4884 {
4885         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4886         int count = 0;
4887
4888         /* return ENOMEM indicating insufficient memory for addresses */
4889         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter, vfn))
4890                 return -ENOMEM;
4891
4892         if (!netdev_uc_empty(netdev)) {
4893                 struct netdev_hw_addr *ha;
4894                 netdev_for_each_uc_addr(ha, netdev) {
4895                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4896                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4897                         count++;
4898                 }
4899         }
4900         return count;
4901 }
4902
4903 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4904 {
4905         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4906         int ret;
4907
4908         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4909
4910         return min_t(int, ret, 0);
4911 }
4912
4913 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4914 {
4915         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4916
4917         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4918
4919         return 0;
4920 }
4921
4922 /**
4923  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4924  * @netdev: network interface device structure
4925  *
4926  * The set_rx_method entry point is called whenever the unicast/multicast
4927  * address list or the network interface flags are updated.  This routine is
4928  * responsible for configuring the hardware for proper unicast, multicast and
4929  * promiscuous mode.
4930  **/
4931 void ixgbe_set_rx_mode(struct net_device *netdev)
4932 {
4933         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4934         struct ixgbe_hw *hw = &adapter->hw;
4935         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4936         netdev_features_t features = netdev->features;
4937         int count;
4938
4939         /* Check for Promiscuous and All Multicast modes */
4940         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4941
4942         /* set all bits that we expect to always be set */
4943         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4944         fctrl |= IXGBE_FCTRL_BAM;
4945         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4946         fctrl |= IXGBE_FCTRL_PMCF;
4947
4948         /* clear the bits we are changing the status of */
4949         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4950         if (netdev->flags & IFF_PROMISC) {
4951                 hw->addr_ctrl.user_set_promisc = true;
4952                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4953                 vmolr |= IXGBE_VMOLR_MPE;
4954                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4955         } else {
4956                 if (netdev->flags & IFF_ALLMULTI) {
4957                         fctrl |= IXGBE_FCTRL_MPE;
4958                         vmolr |= IXGBE_VMOLR_MPE;
4959                 }
4960                 hw->addr_ctrl.user_set_promisc = false;
4961         }
4962
4963         /*
4964          * Write addresses to available RAR registers, if there is not
4965          * sufficient space to store all the addresses then enable
4966          * unicast promiscuous mode
4967          */
4968         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4969                 fctrl |= IXGBE_FCTRL_UPE;
4970                 vmolr |= IXGBE_VMOLR_ROPE;
4971         }
4972
4973         /* Write addresses to the MTA, if the attempt fails
4974          * then we should just turn on promiscuous mode so
4975          * that we can at least receive multicast traffic
4976          */
4977         count = ixgbe_write_mc_addr_list(netdev);
4978         if (count < 0) {
4979                 fctrl |= IXGBE_FCTRL_MPE;
4980                 vmolr |= IXGBE_VMOLR_MPE;
4981         } else if (count) {
4982                 vmolr |= IXGBE_VMOLR_ROMPE;
4983         }
4984
4985         if (hw->mac.type != ixgbe_mac_82598EB) {
4986                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4987                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4988                            IXGBE_VMOLR_ROPE);
4989                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4990         }
4991
4992         /* This is useful for sniffing bad packets. */
4993         if (features & NETIF_F_RXALL) {
4994                 /* UPE and MPE will be handled by normal PROMISC logic
4995                  * in e1000e_set_rx_mode */
4996                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4997                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4998                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4999
5000                 fctrl &= ~(IXGBE_FCTRL_DPF);
5001                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
5002         }
5003
5004         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5005
5006         if (features & NETIF_F_HW_VLAN_CTAG_RX)
5007                 ixgbe_vlan_strip_enable(adapter);
5008         else
5009                 ixgbe_vlan_strip_disable(adapter);
5010
5011         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
5012                 ixgbe_vlan_promisc_disable(adapter);
5013         else
5014                 ixgbe_vlan_promisc_enable(adapter);
5015 }
5016
5017 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
5018 {
5019         int q_idx;
5020
5021         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5022                 napi_enable(&adapter->q_vector[q_idx]->napi);
5023 }
5024
5025 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5026 {
5027         int q_idx;
5028
5029         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5030                 napi_disable(&adapter->q_vector[q_idx]->napi);
5031 }
5032
5033 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5034 {
5035         struct ixgbe_hw *hw = &adapter->hw;
5036         u32 vxlanctrl;
5037
5038         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5039                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5040                 return;
5041
5042         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5043         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5044
5045         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5046                 adapter->vxlan_port = 0;
5047
5048         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5049                 adapter->geneve_port = 0;
5050 }
5051
5052 #ifdef CONFIG_IXGBE_DCB
5053 /**
5054  * ixgbe_configure_dcb - Configure DCB hardware
5055  * @adapter: ixgbe adapter struct
5056  *
5057  * This is called by the driver on open to configure the DCB hardware.
5058  * This is also called by the gennetlink interface when reconfiguring
5059  * the DCB state.
5060  */
5061 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5062 {
5063         struct ixgbe_hw *hw = &adapter->hw;
5064         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5065
5066         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5067                 if (hw->mac.type == ixgbe_mac_82598EB)
5068                         netif_set_gso_max_size(adapter->netdev, 65536);
5069                 return;
5070         }
5071
5072         if (hw->mac.type == ixgbe_mac_82598EB)
5073                 netif_set_gso_max_size(adapter->netdev, 32768);
5074
5075 #ifdef IXGBE_FCOE
5076         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5077                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5078 #endif
5079
5080         /* reconfigure the hardware */
5081         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5082                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5083                                                 DCB_TX_CONFIG);
5084                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5085                                                 DCB_RX_CONFIG);
5086                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5087         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5088                 ixgbe_dcb_hw_ets(&adapter->hw,
5089                                  adapter->ixgbe_ieee_ets,
5090                                  max_frame);
5091                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5092                                         adapter->ixgbe_ieee_pfc->pfc_en,
5093                                         adapter->ixgbe_ieee_ets->prio_tc);
5094         }
5095
5096         /* Enable RSS Hash per TC */
5097         if (hw->mac.type != ixgbe_mac_82598EB) {
5098                 u32 msb = 0;
5099                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5100
5101                 while (rss_i) {
5102                         msb++;
5103                         rss_i >>= 1;
5104                 }
5105
5106                 /* write msb to all 8 TCs in one write */
5107                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5108         }
5109 }
5110 #endif
5111
5112 /* Additional bittime to account for IXGBE framing */
5113 #define IXGBE_ETH_FRAMING 20
5114
5115 /**
5116  * ixgbe_hpbthresh - calculate high water mark for flow control
5117  *
5118  * @adapter: board private structure to calculate for
5119  * @pb: packet buffer to calculate
5120  */
5121 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5122 {
5123         struct ixgbe_hw *hw = &adapter->hw;
5124         struct net_device *dev = adapter->netdev;
5125         int link, tc, kb, marker;
5126         u32 dv_id, rx_pba;
5127
5128         /* Calculate max LAN frame size */
5129         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5130
5131 #ifdef IXGBE_FCOE
5132         /* FCoE traffic class uses FCOE jumbo frames */
5133         if ((dev->features & NETIF_F_FCOE_MTU) &&
5134             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5135             (pb == ixgbe_fcoe_get_tc(adapter)))
5136                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5137 #endif
5138
5139         /* Calculate delay value for device */
5140         switch (hw->mac.type) {
5141         case ixgbe_mac_X540:
5142         case ixgbe_mac_X550:
5143         case ixgbe_mac_X550EM_x:
5144         case ixgbe_mac_x550em_a:
5145                 dv_id = IXGBE_DV_X540(link, tc);
5146                 break;
5147         default:
5148                 dv_id = IXGBE_DV(link, tc);
5149                 break;
5150         }
5151
5152         /* Loopback switch introduces additional latency */
5153         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5154                 dv_id += IXGBE_B2BT(tc);
5155
5156         /* Delay value is calculated in bit times convert to KB */
5157         kb = IXGBE_BT2KB(dv_id);
5158         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5159
5160         marker = rx_pba - kb;
5161
5162         /* It is possible that the packet buffer is not large enough
5163          * to provide required headroom. In this case throw an error
5164          * to user and a do the best we can.
5165          */
5166         if (marker < 0) {
5167                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5168                             "headroom to support flow control."
5169                             "Decrease MTU or number of traffic classes\n", pb);
5170                 marker = tc + 1;
5171         }
5172
5173         return marker;
5174 }
5175
5176 /**
5177  * ixgbe_lpbthresh - calculate low water mark for for flow control
5178  *
5179  * @adapter: board private structure to calculate for
5180  * @pb: packet buffer to calculate
5181  */
5182 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5183 {
5184         struct ixgbe_hw *hw = &adapter->hw;
5185         struct net_device *dev = adapter->netdev;
5186         int tc;
5187         u32 dv_id;
5188
5189         /* Calculate max LAN frame size */
5190         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5191
5192 #ifdef IXGBE_FCOE
5193         /* FCoE traffic class uses FCOE jumbo frames */
5194         if ((dev->features & NETIF_F_FCOE_MTU) &&
5195             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5196             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5197                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5198 #endif
5199
5200         /* Calculate delay value for device */
5201         switch (hw->mac.type) {
5202         case ixgbe_mac_X540:
5203         case ixgbe_mac_X550:
5204         case ixgbe_mac_X550EM_x:
5205         case ixgbe_mac_x550em_a:
5206                 dv_id = IXGBE_LOW_DV_X540(tc);
5207                 break;
5208         default:
5209                 dv_id = IXGBE_LOW_DV(tc);
5210                 break;
5211         }
5212
5213         /* Delay value is calculated in bit times convert to KB */
5214         return IXGBE_BT2KB(dv_id);
5215 }
5216
5217 /*
5218  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5219  */
5220 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5221 {
5222         struct ixgbe_hw *hw = &adapter->hw;
5223         int num_tc = adapter->hw_tcs;
5224         int i;
5225
5226         if (!num_tc)
5227                 num_tc = 1;
5228
5229         for (i = 0; i < num_tc; i++) {
5230                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5231                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5232
5233                 /* Low water marks must not be larger than high water marks */
5234                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5235                         hw->fc.low_water[i] = 0;
5236         }
5237
5238         for (; i < MAX_TRAFFIC_CLASS; i++)
5239                 hw->fc.high_water[i] = 0;
5240 }
5241
5242 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5243 {
5244         struct ixgbe_hw *hw = &adapter->hw;
5245         int hdrm;
5246         u8 tc = adapter->hw_tcs;
5247
5248         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5249             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5250                 hdrm = 32 << adapter->fdir_pballoc;
5251         else
5252                 hdrm = 0;
5253
5254         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5255         ixgbe_pbthresh_setup(adapter);
5256 }
5257
5258 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5259 {
5260         struct ixgbe_hw *hw = &adapter->hw;
5261         struct hlist_node *node2;
5262         struct ixgbe_fdir_filter *filter;
5263
5264         spin_lock(&adapter->fdir_perfect_lock);
5265
5266         if (!hlist_empty(&adapter->fdir_filter_list))
5267                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5268
5269         hlist_for_each_entry_safe(filter, node2,
5270                                   &adapter->fdir_filter_list, fdir_node) {
5271                 ixgbe_fdir_write_perfect_filter_82599(hw,
5272                                 &filter->filter,
5273                                 filter->sw_idx,
5274                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5275                                 IXGBE_FDIR_DROP_QUEUE :
5276                                 adapter->rx_ring[filter->action]->reg_idx);
5277         }
5278
5279         spin_unlock(&adapter->fdir_perfect_lock);
5280 }
5281
5282 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
5283                                       struct ixgbe_adapter *adapter)
5284 {
5285         struct ixgbe_hw *hw = &adapter->hw;
5286         u32 vmolr;
5287
5288         /* No unicast promiscuous support for VMDQ devices. */
5289         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
5290         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
5291
5292         /* clear the affected bit */
5293         vmolr &= ~IXGBE_VMOLR_MPE;
5294
5295         if (dev->flags & IFF_ALLMULTI) {
5296                 vmolr |= IXGBE_VMOLR_MPE;
5297         } else {
5298                 vmolr |= IXGBE_VMOLR_ROMPE;
5299                 hw->mac.ops.update_mc_addr_list(hw, dev);
5300         }
5301         ixgbe_write_uc_addr_list(adapter->netdev, pool);
5302         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
5303 }
5304
5305 /**
5306  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5307  * @rx_ring: ring to free buffers from
5308  **/
5309 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5310 {
5311         u16 i = rx_ring->next_to_clean;
5312         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5313
5314         /* Free all the Rx ring sk_buffs */
5315         while (i != rx_ring->next_to_alloc) {
5316                 if (rx_buffer->skb) {
5317                         struct sk_buff *skb = rx_buffer->skb;
5318                         if (IXGBE_CB(skb)->page_released)
5319                                 dma_unmap_page_attrs(rx_ring->dev,
5320                                                      IXGBE_CB(skb)->dma,
5321                                                      ixgbe_rx_pg_size(rx_ring),
5322                                                      DMA_FROM_DEVICE,
5323                                                      IXGBE_RX_DMA_ATTR);
5324                         dev_kfree_skb(skb);
5325                 }
5326
5327                 /* Invalidate cache lines that may have been written to by
5328                  * device so that we avoid corrupting memory.
5329                  */
5330                 dma_sync_single_range_for_cpu(rx_ring->dev,
5331                                               rx_buffer->dma,
5332                                               rx_buffer->page_offset,
5333                                               ixgbe_rx_bufsz(rx_ring),
5334                                               DMA_FROM_DEVICE);
5335
5336                 /* free resources associated with mapping */
5337                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5338                                      ixgbe_rx_pg_size(rx_ring),
5339                                      DMA_FROM_DEVICE,
5340                                      IXGBE_RX_DMA_ATTR);
5341                 __page_frag_cache_drain(rx_buffer->page,
5342                                         rx_buffer->pagecnt_bias);
5343
5344                 i++;
5345                 rx_buffer++;
5346                 if (i == rx_ring->count) {
5347                         i = 0;
5348                         rx_buffer = rx_ring->rx_buffer_info;
5349                 }
5350         }
5351
5352         rx_ring->next_to_alloc = 0;
5353         rx_ring->next_to_clean = 0;
5354         rx_ring->next_to_use = 0;
5355 }
5356
5357 static int ixgbe_fwd_ring_up(struct net_device *vdev,
5358                              struct ixgbe_fwd_adapter *accel)
5359 {
5360         struct ixgbe_adapter *adapter = accel->real_adapter;
5361         int i, baseq, err;
5362
5363         if (!test_bit(accel->pool, adapter->fwd_bitmask))
5364                 return 0;
5365
5366         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5367         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5368                    accel->pool, adapter->num_rx_pools,
5369                    baseq, baseq + adapter->num_rx_queues_per_pool);
5370
5371         accel->netdev = vdev;
5372         accel->rx_base_queue = baseq;
5373         accel->tx_base_queue = baseq;
5374
5375         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5376                 adapter->rx_ring[baseq + i]->netdev = vdev;
5377
5378         /* Guarantee all rings are updated before we update the
5379          * MAC address filter.
5380          */
5381         wmb();
5382
5383         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5384          * need to only treat it as an error value if it is negative.
5385          */
5386         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5387                                    VMDQ_P(accel->pool));
5388         if (err >= 0) {
5389                 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
5390                 return 0;
5391         }
5392
5393         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5394                 adapter->rx_ring[baseq + i]->netdev = NULL;
5395
5396         return err;
5397 }
5398
5399 static int ixgbe_upper_dev_walk(struct net_device *upper, void *data)
5400 {
5401         if (netif_is_macvlan(upper)) {
5402                 struct macvlan_dev *dfwd = netdev_priv(upper);
5403                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
5404
5405                 if (dfwd->fwd_priv)
5406                         ixgbe_fwd_ring_up(upper, vadapter);
5407         }
5408
5409         return 0;
5410 }
5411
5412 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5413 {
5414         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5415                                       ixgbe_upper_dev_walk, NULL);
5416 }
5417
5418 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5419 {
5420         struct ixgbe_hw *hw = &adapter->hw;
5421
5422         ixgbe_configure_pb(adapter);
5423 #ifdef CONFIG_IXGBE_DCB
5424         ixgbe_configure_dcb(adapter);
5425 #endif
5426         /*
5427          * We must restore virtualization before VLANs or else
5428          * the VLVF registers will not be populated
5429          */
5430         ixgbe_configure_virtualization(adapter);
5431
5432         ixgbe_set_rx_mode(adapter->netdev);
5433         ixgbe_restore_vlan(adapter);
5434         ixgbe_ipsec_restore(adapter);
5435
5436         switch (hw->mac.type) {
5437         case ixgbe_mac_82599EB:
5438         case ixgbe_mac_X540:
5439                 hw->mac.ops.disable_rx_buff(hw);
5440                 break;
5441         default:
5442                 break;
5443         }
5444
5445         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5446                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5447                                                 adapter->fdir_pballoc);
5448         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5449                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5450                                               adapter->fdir_pballoc);
5451                 ixgbe_fdir_filter_restore(adapter);
5452         }
5453
5454         switch (hw->mac.type) {
5455         case ixgbe_mac_82599EB:
5456         case ixgbe_mac_X540:
5457                 hw->mac.ops.enable_rx_buff(hw);
5458                 break;
5459         default:
5460                 break;
5461         }
5462
5463 #ifdef CONFIG_IXGBE_DCA
5464         /* configure DCA */
5465         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5466                 ixgbe_setup_dca(adapter);
5467 #endif /* CONFIG_IXGBE_DCA */
5468
5469 #ifdef IXGBE_FCOE
5470         /* configure FCoE L2 filters, redirection table, and Rx control */
5471         ixgbe_configure_fcoe(adapter);
5472
5473 #endif /* IXGBE_FCOE */
5474         ixgbe_configure_tx(adapter);
5475         ixgbe_configure_rx(adapter);
5476         ixgbe_configure_dfwd(adapter);
5477 }
5478
5479 /**
5480  * ixgbe_sfp_link_config - set up SFP+ link
5481  * @adapter: pointer to private adapter struct
5482  **/
5483 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5484 {
5485         /*
5486          * We are assuming the worst case scenario here, and that
5487          * is that an SFP was inserted/removed after the reset
5488          * but before SFP detection was enabled.  As such the best
5489          * solution is to just start searching as soon as we start
5490          */
5491         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5492                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5493
5494         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5495         adapter->sfp_poll_time = 0;
5496 }
5497
5498 /**
5499  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5500  * @hw: pointer to private hardware struct
5501  *
5502  * Returns 0 on success, negative on failure
5503  **/
5504 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5505 {
5506         u32 speed;
5507         bool autoneg, link_up = false;
5508         int ret = IXGBE_ERR_LINK_SETUP;
5509
5510         if (hw->mac.ops.check_link)
5511                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5512
5513         if (ret)
5514                 return ret;
5515
5516         speed = hw->phy.autoneg_advertised;
5517         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5518                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5519                                                         &autoneg);
5520         if (ret)
5521                 return ret;
5522
5523         if (hw->mac.ops.setup_link)
5524                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5525
5526         return ret;
5527 }
5528
5529 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5530 {
5531         struct ixgbe_hw *hw = &adapter->hw;
5532         u32 gpie = 0;
5533
5534         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5535                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5536                        IXGBE_GPIE_OCD;
5537                 gpie |= IXGBE_GPIE_EIAME;
5538                 /*
5539                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5540                  * this saves a register write for every interrupt
5541                  */
5542                 switch (hw->mac.type) {
5543                 case ixgbe_mac_82598EB:
5544                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5545                         break;
5546                 case ixgbe_mac_82599EB:
5547                 case ixgbe_mac_X540:
5548                 case ixgbe_mac_X550:
5549                 case ixgbe_mac_X550EM_x:
5550                 case ixgbe_mac_x550em_a:
5551                 default:
5552                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5553                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5554                         break;
5555                 }
5556         } else {
5557                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5558                  * specifically only auto mask tx and rx interrupts */
5559                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5560         }
5561
5562         /* XXX: to interrupt immediately for EICS writes, enable this */
5563         /* gpie |= IXGBE_GPIE_EIMEN; */
5564
5565         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5566                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5567
5568                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5569                 case IXGBE_82599_VMDQ_8Q_MASK:
5570                         gpie |= IXGBE_GPIE_VTMODE_16;
5571                         break;
5572                 case IXGBE_82599_VMDQ_4Q_MASK:
5573                         gpie |= IXGBE_GPIE_VTMODE_32;
5574                         break;
5575                 default:
5576                         gpie |= IXGBE_GPIE_VTMODE_64;
5577                         break;
5578                 }
5579         }
5580
5581         /* Enable Thermal over heat sensor interrupt */
5582         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5583                 switch (adapter->hw.mac.type) {
5584                 case ixgbe_mac_82599EB:
5585                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5586                         break;
5587                 default:
5588                         break;
5589                 }
5590         }
5591
5592         /* Enable fan failure interrupt */
5593         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5594                 gpie |= IXGBE_SDP1_GPIEN(hw);
5595
5596         switch (hw->mac.type) {
5597         case ixgbe_mac_82599EB:
5598                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5599                 break;
5600         case ixgbe_mac_X550EM_x:
5601         case ixgbe_mac_x550em_a:
5602                 gpie |= IXGBE_SDP0_GPIEN_X540;
5603                 break;
5604         default:
5605                 break;
5606         }
5607
5608         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5609 }
5610
5611 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5612 {
5613         struct ixgbe_hw *hw = &adapter->hw;
5614         int err;
5615         u32 ctrl_ext;
5616
5617         ixgbe_get_hw_control(adapter);
5618         ixgbe_setup_gpie(adapter);
5619
5620         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5621                 ixgbe_configure_msix(adapter);
5622         else
5623                 ixgbe_configure_msi_and_legacy(adapter);
5624
5625         /* enable the optics for 82599 SFP+ fiber */
5626         if (hw->mac.ops.enable_tx_laser)
5627                 hw->mac.ops.enable_tx_laser(hw);
5628
5629         if (hw->phy.ops.set_phy_power)
5630                 hw->phy.ops.set_phy_power(hw, true);
5631
5632         smp_mb__before_atomic();
5633         clear_bit(__IXGBE_DOWN, &adapter->state);
5634         ixgbe_napi_enable_all(adapter);
5635
5636         if (ixgbe_is_sfp(hw)) {
5637                 ixgbe_sfp_link_config(adapter);
5638         } else {
5639                 err = ixgbe_non_sfp_link_config(hw);
5640                 if (err)
5641                         e_err(probe, "link_config FAILED %d\n", err);
5642         }
5643
5644         /* clear any pending interrupts, may auto mask */
5645         IXGBE_READ_REG(hw, IXGBE_EICR);
5646         ixgbe_irq_enable(adapter, true, true);
5647
5648         /*
5649          * If this adapter has a fan, check to see if we had a failure
5650          * before we enabled the interrupt.
5651          */
5652         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5653                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5654                 if (esdp & IXGBE_ESDP_SDP1)
5655                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5656         }
5657
5658         /* bring the link up in the watchdog, this could race with our first
5659          * link up interrupt but shouldn't be a problem */
5660         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5661         adapter->link_check_timeout = jiffies;
5662         mod_timer(&adapter->service_timer, jiffies);
5663
5664         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5665         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5666         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5667         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5668 }
5669
5670 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5671 {
5672         WARN_ON(in_interrupt());
5673         /* put off any impending NetWatchDogTimeout */
5674         netif_trans_update(adapter->netdev);
5675
5676         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5677                 usleep_range(1000, 2000);
5678         if (adapter->hw.phy.type == ixgbe_phy_fw)
5679                 ixgbe_watchdog_link_is_down(adapter);
5680         ixgbe_down(adapter);
5681         /*
5682          * If SR-IOV enabled then wait a bit before bringing the adapter
5683          * back up to give the VFs time to respond to the reset.  The
5684          * two second wait is based upon the watchdog timer cycle in
5685          * the VF driver.
5686          */
5687         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5688                 msleep(2000);
5689         ixgbe_up(adapter);
5690         clear_bit(__IXGBE_RESETTING, &adapter->state);
5691 }
5692
5693 void ixgbe_up(struct ixgbe_adapter *adapter)
5694 {
5695         /* hardware has been reset, we need to reload some things */
5696         ixgbe_configure(adapter);
5697
5698         ixgbe_up_complete(adapter);
5699 }
5700
5701 void ixgbe_reset(struct ixgbe_adapter *adapter)
5702 {
5703         struct ixgbe_hw *hw = &adapter->hw;
5704         struct net_device *netdev = adapter->netdev;
5705         int err;
5706
5707         if (ixgbe_removed(hw->hw_addr))
5708                 return;
5709         /* lock SFP init bit to prevent race conditions with the watchdog */
5710         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5711                 usleep_range(1000, 2000);
5712
5713         /* clear all SFP and link config related flags while holding SFP_INIT */
5714         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5715                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5716         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5717
5718         err = hw->mac.ops.init_hw(hw);
5719         switch (err) {
5720         case 0:
5721         case IXGBE_ERR_SFP_NOT_PRESENT:
5722         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5723                 break;
5724         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5725                 e_dev_err("master disable timed out\n");
5726                 break;
5727         case IXGBE_ERR_EEPROM_VERSION:
5728                 /* We are running on a pre-production device, log a warning */
5729                 e_dev_warn("This device is a pre-production adapter/LOM. "
5730                            "Please be aware there may be issues associated with "
5731                            "your hardware.  If you are experiencing problems "
5732                            "please contact your Intel or hardware "
5733                            "representative who provided you with this "
5734                            "hardware.\n");
5735                 break;
5736         default:
5737                 e_dev_err("Hardware Error: %d\n", err);
5738         }
5739
5740         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5741
5742         /* flush entries out of MAC table */
5743         ixgbe_flush_sw_mac_table(adapter);
5744         __dev_uc_unsync(netdev, NULL);
5745
5746         /* do not flush user set addresses */
5747         ixgbe_mac_set_default_filter(adapter);
5748
5749         /* update SAN MAC vmdq pool selection */
5750         if (hw->mac.san_mac_rar_index)
5751                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5752
5753         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5754                 ixgbe_ptp_reset(adapter);
5755
5756         if (hw->phy.ops.set_phy_power) {
5757                 if (!netif_running(adapter->netdev) && !adapter->wol)
5758                         hw->phy.ops.set_phy_power(hw, false);
5759                 else
5760                         hw->phy.ops.set_phy_power(hw, true);
5761         }
5762 }
5763
5764 /**
5765  * ixgbe_clean_tx_ring - Free Tx Buffers
5766  * @tx_ring: ring to be cleaned
5767  **/
5768 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5769 {
5770         u16 i = tx_ring->next_to_clean;
5771         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5772
5773         while (i != tx_ring->next_to_use) {
5774                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5775
5776                 /* Free all the Tx ring sk_buffs */
5777                 if (ring_is_xdp(tx_ring))
5778                         page_frag_free(tx_buffer->data);
5779                 else
5780                         dev_kfree_skb_any(tx_buffer->skb);
5781
5782                 /* unmap skb header data */
5783                 dma_unmap_single(tx_ring->dev,
5784                                  dma_unmap_addr(tx_buffer, dma),
5785                                  dma_unmap_len(tx_buffer, len),
5786                                  DMA_TO_DEVICE);
5787
5788                 /* check for eop_desc to determine the end of the packet */
5789                 eop_desc = tx_buffer->next_to_watch;
5790                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5791
5792                 /* unmap remaining buffers */
5793                 while (tx_desc != eop_desc) {
5794                         tx_buffer++;
5795                         tx_desc++;
5796                         i++;
5797                         if (unlikely(i == tx_ring->count)) {
5798                                 i = 0;
5799                                 tx_buffer = tx_ring->tx_buffer_info;
5800                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5801                         }
5802
5803                         /* unmap any remaining paged data */
5804                         if (dma_unmap_len(tx_buffer, len))
5805                                 dma_unmap_page(tx_ring->dev,
5806                                                dma_unmap_addr(tx_buffer, dma),
5807                                                dma_unmap_len(tx_buffer, len),
5808                                                DMA_TO_DEVICE);
5809                 }
5810
5811                 /* move us one more past the eop_desc for start of next pkt */
5812                 tx_buffer++;
5813                 i++;
5814                 if (unlikely(i == tx_ring->count)) {
5815                         i = 0;
5816                         tx_buffer = tx_ring->tx_buffer_info;
5817                 }
5818         }
5819
5820         /* reset BQL for queue */
5821         if (!ring_is_xdp(tx_ring))
5822                 netdev_tx_reset_queue(txring_txq(tx_ring));
5823
5824         /* reset next_to_use and next_to_clean */
5825         tx_ring->next_to_use = 0;
5826         tx_ring->next_to_clean = 0;
5827 }
5828
5829 /**
5830  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5831  * @adapter: board private structure
5832  **/
5833 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5834 {
5835         int i;
5836
5837         for (i = 0; i < adapter->num_rx_queues; i++)
5838                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5839 }
5840
5841 /**
5842  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5843  * @adapter: board private structure
5844  **/
5845 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5846 {
5847         int i;
5848
5849         for (i = 0; i < adapter->num_tx_queues; i++)
5850                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5851         for (i = 0; i < adapter->num_xdp_queues; i++)
5852                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5853 }
5854
5855 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5856 {
5857         struct hlist_node *node2;
5858         struct ixgbe_fdir_filter *filter;
5859
5860         spin_lock(&adapter->fdir_perfect_lock);
5861
5862         hlist_for_each_entry_safe(filter, node2,
5863                                   &adapter->fdir_filter_list, fdir_node) {
5864                 hlist_del(&filter->fdir_node);
5865                 kfree(filter);
5866         }
5867         adapter->fdir_filter_count = 0;
5868
5869         spin_unlock(&adapter->fdir_perfect_lock);
5870 }
5871
5872 void ixgbe_down(struct ixgbe_adapter *adapter)
5873 {
5874         struct net_device *netdev = adapter->netdev;
5875         struct ixgbe_hw *hw = &adapter->hw;
5876         int i;
5877
5878         /* signal that we are down to the interrupt handler */
5879         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5880                 return; /* do nothing if already down */
5881
5882         /* disable receives */
5883         hw->mac.ops.disable_rx(hw);
5884
5885         /* disable all enabled rx queues */
5886         for (i = 0; i < adapter->num_rx_queues; i++)
5887                 /* this call also flushes the previous write */
5888                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5889
5890         usleep_range(10000, 20000);
5891
5892         /* synchronize_sched() needed for pending XDP buffers to drain */
5893         if (adapter->xdp_ring[0])
5894                 synchronize_sched();
5895         netif_tx_stop_all_queues(netdev);
5896
5897         /* call carrier off first to avoid false dev_watchdog timeouts */
5898         netif_carrier_off(netdev);
5899         netif_tx_disable(netdev);
5900
5901         ixgbe_irq_disable(adapter);
5902
5903         ixgbe_napi_disable_all(adapter);
5904
5905         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
5906         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5907         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5908
5909         del_timer_sync(&adapter->service_timer);
5910
5911         if (adapter->num_vfs) {
5912                 /* Clear EITR Select mapping */
5913                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5914
5915                 /* Mark all the VFs as inactive */
5916                 for (i = 0 ; i < adapter->num_vfs; i++)
5917                         adapter->vfinfo[i].clear_to_send = false;
5918
5919                 /* ping all the active vfs to let them know we are going down */
5920                 ixgbe_ping_all_vfs(adapter);
5921
5922                 /* Disable all VFTE/VFRE TX/RX */
5923                 ixgbe_disable_tx_rx(adapter);
5924         }
5925
5926         /* disable transmits in the hardware now that interrupts are off */
5927         for (i = 0; i < adapter->num_tx_queues; i++) {
5928                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5929                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5930         }
5931         for (i = 0; i < adapter->num_xdp_queues; i++) {
5932                 u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
5933
5934                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5935         }
5936
5937         /* Disable the Tx DMA engine on 82599 and later MAC */
5938         switch (hw->mac.type) {
5939         case ixgbe_mac_82599EB:
5940         case ixgbe_mac_X540:
5941         case ixgbe_mac_X550:
5942         case ixgbe_mac_X550EM_x:
5943         case ixgbe_mac_x550em_a:
5944                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5945                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5946                                  ~IXGBE_DMATXCTL_TE));
5947                 break;
5948         default:
5949                 break;
5950         }
5951
5952         if (!pci_channel_offline(adapter->pdev))
5953                 ixgbe_reset(adapter);
5954
5955         /* power down the optics for 82599 SFP+ fiber */
5956         if (hw->mac.ops.disable_tx_laser)
5957                 hw->mac.ops.disable_tx_laser(hw);
5958
5959         ixgbe_clean_all_tx_rings(adapter);
5960         ixgbe_clean_all_rx_rings(adapter);
5961 }
5962
5963 /**
5964  * ixgbe_eee_capable - helper function to determine EEE support on X550
5965  * @adapter: board private structure
5966  */
5967 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
5968 {
5969         struct ixgbe_hw *hw = &adapter->hw;
5970
5971         switch (hw->device_id) {
5972         case IXGBE_DEV_ID_X550EM_A_1G_T:
5973         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
5974                 if (!hw->phy.eee_speeds_supported)
5975                         break;
5976                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
5977                 if (!hw->phy.eee_speeds_advertised)
5978                         break;
5979                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
5980                 break;
5981         default:
5982                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
5983                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
5984                 break;
5985         }
5986 }
5987
5988 /**
5989  * ixgbe_tx_timeout - Respond to a Tx Hang
5990  * @netdev: network interface device structure
5991  **/
5992 static void ixgbe_tx_timeout(struct net_device *netdev)
5993 {
5994         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5995
5996         /* Do the reset outside of interrupt context */
5997         ixgbe_tx_timeout_reset(adapter);
5998 }
5999
6000 #ifdef CONFIG_IXGBE_DCB
6001 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6002 {
6003         struct ixgbe_hw *hw = &adapter->hw;
6004         struct tc_configuration *tc;
6005         int j;
6006
6007         switch (hw->mac.type) {
6008         case ixgbe_mac_82598EB:
6009         case ixgbe_mac_82599EB:
6010                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6011                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6012                 break;
6013         case ixgbe_mac_X540:
6014         case ixgbe_mac_X550:
6015                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6016                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6017                 break;
6018         case ixgbe_mac_X550EM_x:
6019         case ixgbe_mac_x550em_a:
6020         default:
6021                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6022                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6023                 break;
6024         }
6025
6026         /* Configure DCB traffic classes */
6027         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6028                 tc = &adapter->dcb_cfg.tc_config[j];
6029                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6030                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6031                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6032                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6033                 tc->dcb_pfc = pfc_disabled;
6034         }
6035
6036         /* Initialize default user to priority mapping, UPx->TC0 */
6037         tc = &adapter->dcb_cfg.tc_config[0];
6038         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6039         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6040
6041         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6042         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6043         adapter->dcb_cfg.pfc_mode_enable = false;
6044         adapter->dcb_set_bitmap = 0x00;
6045         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6046                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6047         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6048                sizeof(adapter->temp_dcb_cfg));
6049 }
6050 #endif
6051
6052 /**
6053  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6054  * @adapter: board private structure to initialize
6055  * @ii: pointer to ixgbe_info for device
6056  *
6057  * ixgbe_sw_init initializes the Adapter private data structure.
6058  * Fields are initialized based on PCI device information and
6059  * OS network device settings (MTU size).
6060  **/
6061 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6062                          const struct ixgbe_info *ii)
6063 {
6064         struct ixgbe_hw *hw = &adapter->hw;
6065         struct pci_dev *pdev = adapter->pdev;
6066         unsigned int rss, fdir;
6067         u32 fwsm;
6068         int i;
6069
6070         /* PCI config space info */
6071
6072         hw->vendor_id = pdev->vendor;
6073         hw->device_id = pdev->device;
6074         hw->revision_id = pdev->revision;
6075         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6076         hw->subsystem_device_id = pdev->subsystem_device;
6077
6078         /* get_invariants needs the device IDs */
6079         ii->get_invariants(hw);
6080
6081         /* Set common capability flags and settings */
6082         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6083         adapter->ring_feature[RING_F_RSS].limit = rss;
6084         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6085         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6086         adapter->atr_sample_rate = 20;
6087         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6088         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6089         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6090         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6091 #ifdef CONFIG_IXGBE_DCA
6092         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6093 #endif
6094 #ifdef CONFIG_IXGBE_DCB
6095         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6096         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6097 #endif
6098 #ifdef IXGBE_FCOE
6099         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6100         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6101 #ifdef CONFIG_IXGBE_DCB
6102         /* Default traffic class to use for FCoE */
6103         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6104 #endif /* CONFIG_IXGBE_DCB */
6105 #endif /* IXGBE_FCOE */
6106
6107         /* initialize static ixgbe jump table entries */
6108         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6109                                           GFP_KERNEL);
6110         if (!adapter->jump_tables[0])
6111                 return -ENOMEM;
6112         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6113
6114         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6115                 adapter->jump_tables[i] = NULL;
6116
6117         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
6118                                      hw->mac.num_rar_entries,
6119                                      GFP_ATOMIC);
6120         if (!adapter->mac_table)
6121                 return -ENOMEM;
6122
6123         if (ixgbe_init_rss_key(adapter))
6124                 return -ENOMEM;
6125
6126         /* Set MAC specific capability flags and exceptions */
6127         switch (hw->mac.type) {
6128         case ixgbe_mac_82598EB:
6129                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6130
6131                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6132                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6133
6134                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6135                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6136                 adapter->atr_sample_rate = 0;
6137                 adapter->fdir_pballoc = 0;
6138 #ifdef IXGBE_FCOE
6139                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6140                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6141 #ifdef CONFIG_IXGBE_DCB
6142                 adapter->fcoe.up = 0;
6143 #endif /* IXGBE_DCB */
6144 #endif /* IXGBE_FCOE */
6145                 break;
6146         case ixgbe_mac_82599EB:
6147                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6148                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6149                 break;
6150         case ixgbe_mac_X540:
6151                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6152                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6153                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6154                 break;
6155         case ixgbe_mac_x550em_a:
6156                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6157                 switch (hw->device_id) {
6158                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6159                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6160                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6161                         break;
6162                 default:
6163                         break;
6164                 }
6165         /* fall through */
6166         case ixgbe_mac_X550EM_x:
6167 #ifdef CONFIG_IXGBE_DCB
6168                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6169 #endif
6170 #ifdef IXGBE_FCOE
6171                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6172 #ifdef CONFIG_IXGBE_DCB
6173                 adapter->fcoe.up = 0;
6174 #endif /* IXGBE_DCB */
6175 #endif /* IXGBE_FCOE */
6176         /* Fall Through */
6177         case ixgbe_mac_X550:
6178                 if (hw->mac.type == ixgbe_mac_X550)
6179                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6180 #ifdef CONFIG_IXGBE_DCA
6181                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6182 #endif
6183                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6184                 break;
6185         default:
6186                 break;
6187         }
6188
6189 #ifdef IXGBE_FCOE
6190         /* FCoE support exists, always init the FCoE lock */
6191         spin_lock_init(&adapter->fcoe.lock);
6192
6193 #endif
6194         /* n-tuple support exists, always init our spinlock */
6195         spin_lock_init(&adapter->fdir_perfect_lock);
6196
6197 #ifdef CONFIG_IXGBE_DCB
6198         ixgbe_init_dcb(adapter);
6199 #endif
6200
6201         /* default flow control settings */
6202         hw->fc.requested_mode = ixgbe_fc_full;
6203         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6204         ixgbe_pbthresh_setup(adapter);
6205         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6206         hw->fc.send_xon = true;
6207         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6208
6209 #ifdef CONFIG_PCI_IOV
6210         if (max_vfs > 0)
6211                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6212
6213         /* assign number of SR-IOV VFs */
6214         if (hw->mac.type != ixgbe_mac_82598EB) {
6215                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6216                         max_vfs = 0;
6217                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6218                 }
6219         }
6220 #endif /* CONFIG_PCI_IOV */
6221
6222         /* enable itr by default in dynamic mode */
6223         adapter->rx_itr_setting = 1;
6224         adapter->tx_itr_setting = 1;
6225
6226         /* set default ring sizes */
6227         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6228         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6229
6230         /* set default work limits */
6231         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6232
6233         /* initialize eeprom parameters */
6234         if (ixgbe_init_eeprom_params_generic(hw)) {
6235                 e_dev_err("EEPROM initialization failed\n");
6236                 return -EIO;
6237         }
6238
6239         /* PF holds first pool slot */
6240         set_bit(0, adapter->fwd_bitmask);
6241         set_bit(__IXGBE_DOWN, &adapter->state);
6242
6243         return 0;
6244 }
6245
6246 /**
6247  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6248  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6249  *
6250  * Return 0 on success, negative on failure
6251  **/
6252 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6253 {
6254         struct device *dev = tx_ring->dev;
6255         int orig_node = dev_to_node(dev);
6256         int ring_node = -1;
6257         int size;
6258
6259         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6260
6261         if (tx_ring->q_vector)
6262                 ring_node = tx_ring->q_vector->numa_node;
6263
6264         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6265         if (!tx_ring->tx_buffer_info)
6266                 tx_ring->tx_buffer_info = vmalloc(size);
6267         if (!tx_ring->tx_buffer_info)
6268                 goto err;
6269
6270         /* round up to nearest 4K */
6271         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6272         tx_ring->size = ALIGN(tx_ring->size, 4096);
6273
6274         set_dev_node(dev, ring_node);
6275         tx_ring->desc = dma_alloc_coherent(dev,
6276                                            tx_ring->size,
6277                                            &tx_ring->dma,
6278                                            GFP_KERNEL);
6279         set_dev_node(dev, orig_node);
6280         if (!tx_ring->desc)
6281                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6282                                                    &tx_ring->dma, GFP_KERNEL);
6283         if (!tx_ring->desc)
6284                 goto err;
6285
6286         tx_ring->next_to_use = 0;
6287         tx_ring->next_to_clean = 0;
6288         return 0;
6289
6290 err:
6291         vfree(tx_ring->tx_buffer_info);
6292         tx_ring->tx_buffer_info = NULL;
6293         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6294         return -ENOMEM;
6295 }
6296
6297 /**
6298  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6299  * @adapter: board private structure
6300  *
6301  * If this function returns with an error, then it's possible one or
6302  * more of the rings is populated (while the rest are not).  It is the
6303  * callers duty to clean those orphaned rings.
6304  *
6305  * Return 0 on success, negative on failure
6306  **/
6307 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6308 {
6309         int i, j = 0, err = 0;
6310
6311         for (i = 0; i < adapter->num_tx_queues; i++) {
6312                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6313                 if (!err)
6314                         continue;
6315
6316                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6317                 goto err_setup_tx;
6318         }
6319         for (j = 0; j < adapter->num_xdp_queues; j++) {
6320                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6321                 if (!err)
6322                         continue;
6323
6324                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6325                 goto err_setup_tx;
6326         }
6327
6328         return 0;
6329 err_setup_tx:
6330         /* rewind the index freeing the rings as we go */
6331         while (j--)
6332                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6333         while (i--)
6334                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6335         return err;
6336 }
6337
6338 /**
6339  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6340  * @adapter: pointer to ixgbe_adapter
6341  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6342  *
6343  * Returns 0 on success, negative on failure
6344  **/
6345 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6346                              struct ixgbe_ring *rx_ring)
6347 {
6348         struct device *dev = rx_ring->dev;
6349         int orig_node = dev_to_node(dev);
6350         int ring_node = -1;
6351         int size;
6352
6353         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6354
6355         if (rx_ring->q_vector)
6356                 ring_node = rx_ring->q_vector->numa_node;
6357
6358         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6359         if (!rx_ring->rx_buffer_info)
6360                 rx_ring->rx_buffer_info = vmalloc(size);
6361         if (!rx_ring->rx_buffer_info)
6362                 goto err;
6363
6364         /* Round up to nearest 4K */
6365         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6366         rx_ring->size = ALIGN(rx_ring->size, 4096);
6367
6368         set_dev_node(dev, ring_node);
6369         rx_ring->desc = dma_alloc_coherent(dev,
6370                                            rx_ring->size,
6371                                            &rx_ring->dma,
6372                                            GFP_KERNEL);
6373         set_dev_node(dev, orig_node);
6374         if (!rx_ring->desc)
6375                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6376                                                    &rx_ring->dma, GFP_KERNEL);
6377         if (!rx_ring->desc)
6378                 goto err;
6379
6380         rx_ring->next_to_clean = 0;
6381         rx_ring->next_to_use = 0;
6382
6383         /* XDP RX-queue info */
6384         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6385                              rx_ring->queue_index) < 0)
6386                 goto err;
6387
6388         rx_ring->xdp_prog = adapter->xdp_prog;
6389
6390         return 0;
6391 err:
6392         vfree(rx_ring->rx_buffer_info);
6393         rx_ring->rx_buffer_info = NULL;
6394         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6395         return -ENOMEM;
6396 }
6397
6398 /**
6399  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6400  * @adapter: board private structure
6401  *
6402  * If this function returns with an error, then it's possible one or
6403  * more of the rings is populated (while the rest are not).  It is the
6404  * callers duty to clean those orphaned rings.
6405  *
6406  * Return 0 on success, negative on failure
6407  **/
6408 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6409 {
6410         int i, err = 0;
6411
6412         for (i = 0; i < adapter->num_rx_queues; i++) {
6413                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6414                 if (!err)
6415                         continue;
6416
6417                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6418                 goto err_setup_rx;
6419         }
6420
6421 #ifdef IXGBE_FCOE
6422         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6423         if (!err)
6424 #endif
6425                 return 0;
6426 err_setup_rx:
6427         /* rewind the index freeing the rings as we go */
6428         while (i--)
6429                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6430         return err;
6431 }
6432
6433 /**
6434  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6435  * @tx_ring: Tx descriptor ring for a specific queue
6436  *
6437  * Free all transmit software resources
6438  **/
6439 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6440 {
6441         ixgbe_clean_tx_ring(tx_ring);
6442
6443         vfree(tx_ring->tx_buffer_info);
6444         tx_ring->tx_buffer_info = NULL;
6445
6446         /* if not set, then don't free */
6447         if (!tx_ring->desc)
6448                 return;
6449
6450         dma_free_coherent(tx_ring->dev, tx_ring->size,
6451                           tx_ring->desc, tx_ring->dma);
6452
6453         tx_ring->desc = NULL;
6454 }
6455
6456 /**
6457  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6458  * @adapter: board private structure
6459  *
6460  * Free all transmit software resources
6461  **/
6462 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6463 {
6464         int i;
6465
6466         for (i = 0; i < adapter->num_tx_queues; i++)
6467                 if (adapter->tx_ring[i]->desc)
6468                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6469         for (i = 0; i < adapter->num_xdp_queues; i++)
6470                 if (adapter->xdp_ring[i]->desc)
6471                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6472 }
6473
6474 /**
6475  * ixgbe_free_rx_resources - Free Rx Resources
6476  * @rx_ring: ring to clean the resources from
6477  *
6478  * Free all receive software resources
6479  **/
6480 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6481 {
6482         ixgbe_clean_rx_ring(rx_ring);
6483
6484         rx_ring->xdp_prog = NULL;
6485         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6486         vfree(rx_ring->rx_buffer_info);
6487         rx_ring->rx_buffer_info = NULL;
6488
6489         /* if not set, then don't free */
6490         if (!rx_ring->desc)
6491                 return;
6492
6493         dma_free_coherent(rx_ring->dev, rx_ring->size,
6494                           rx_ring->desc, rx_ring->dma);
6495
6496         rx_ring->desc = NULL;
6497 }
6498
6499 /**
6500  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6501  * @adapter: board private structure
6502  *
6503  * Free all receive software resources
6504  **/
6505 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6506 {
6507         int i;
6508
6509 #ifdef IXGBE_FCOE
6510         ixgbe_free_fcoe_ddp_resources(adapter);
6511
6512 #endif
6513         for (i = 0; i < adapter->num_rx_queues; i++)
6514                 if (adapter->rx_ring[i]->desc)
6515                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6516 }
6517
6518 /**
6519  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6520  * @netdev: network interface device structure
6521  * @new_mtu: new value for maximum frame size
6522  *
6523  * Returns 0 on success, negative on failure
6524  **/
6525 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6526 {
6527         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6528
6529         /*
6530          * For 82599EB we cannot allow legacy VFs to enable their receive
6531          * paths when MTU greater than 1500 is configured.  So display a
6532          * warning that legacy VFs will be disabled.
6533          */
6534         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6535             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6536             (new_mtu > ETH_DATA_LEN))
6537                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6538
6539         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6540
6541         /* must set new MTU before calling down or up */
6542         netdev->mtu = new_mtu;
6543
6544         if (netif_running(netdev))
6545                 ixgbe_reinit_locked(adapter);
6546
6547         return 0;
6548 }
6549
6550 /**
6551  * ixgbe_open - Called when a network interface is made active
6552  * @netdev: network interface device structure
6553  *
6554  * Returns 0 on success, negative value on failure
6555  *
6556  * The open entry point is called when a network interface is made
6557  * active by the system (IFF_UP).  At this point all resources needed
6558  * for transmit and receive operations are allocated, the interrupt
6559  * handler is registered with the OS, the watchdog timer is started,
6560  * and the stack is notified that the interface is ready.
6561  **/
6562 int ixgbe_open(struct net_device *netdev)
6563 {
6564         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6565         struct ixgbe_hw *hw = &adapter->hw;
6566         int err, queues;
6567
6568         /* disallow open during test */
6569         if (test_bit(__IXGBE_TESTING, &adapter->state))
6570                 return -EBUSY;
6571
6572         netif_carrier_off(netdev);
6573
6574         /* allocate transmit descriptors */
6575         err = ixgbe_setup_all_tx_resources(adapter);
6576         if (err)
6577                 goto err_setup_tx;
6578
6579         /* allocate receive descriptors */
6580         err = ixgbe_setup_all_rx_resources(adapter);
6581         if (err)
6582                 goto err_setup_rx;
6583
6584         ixgbe_configure(adapter);
6585
6586         err = ixgbe_request_irq(adapter);
6587         if (err)
6588                 goto err_req_irq;
6589
6590         /* Notify the stack of the actual queue counts. */
6591         queues = adapter->num_tx_queues;
6592         err = netif_set_real_num_tx_queues(netdev, queues);
6593         if (err)
6594                 goto err_set_queues;
6595
6596         queues = adapter->num_rx_queues;
6597         err = netif_set_real_num_rx_queues(netdev, queues);
6598         if (err)
6599                 goto err_set_queues;
6600
6601         ixgbe_ptp_init(adapter);
6602
6603         ixgbe_up_complete(adapter);
6604
6605         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6606         udp_tunnel_get_rx_info(netdev);
6607
6608         return 0;
6609
6610 err_set_queues:
6611         ixgbe_free_irq(adapter);
6612 err_req_irq:
6613         ixgbe_free_all_rx_resources(adapter);
6614         if (hw->phy.ops.set_phy_power && !adapter->wol)
6615                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6616 err_setup_rx:
6617         ixgbe_free_all_tx_resources(adapter);
6618 err_setup_tx:
6619         ixgbe_reset(adapter);
6620
6621         return err;
6622 }
6623
6624 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6625 {
6626         ixgbe_ptp_suspend(adapter);
6627
6628         if (adapter->hw.phy.ops.enter_lplu) {
6629                 adapter->hw.phy.reset_disable = true;
6630                 ixgbe_down(adapter);
6631                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6632                 adapter->hw.phy.reset_disable = false;
6633         } else {
6634                 ixgbe_down(adapter);
6635         }
6636
6637         ixgbe_free_irq(adapter);
6638
6639         ixgbe_free_all_tx_resources(adapter);
6640         ixgbe_free_all_rx_resources(adapter);
6641 }
6642
6643 /**
6644  * ixgbe_close - Disables a network interface
6645  * @netdev: network interface device structure
6646  *
6647  * Returns 0, this is not allowed to fail
6648  *
6649  * The close entry point is called when an interface is de-activated
6650  * by the OS.  The hardware is still under the drivers control, but
6651  * needs to be disabled.  A global MAC reset is issued to stop the
6652  * hardware, and all transmit and receive resources are freed.
6653  **/
6654 int ixgbe_close(struct net_device *netdev)
6655 {
6656         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6657
6658         ixgbe_ptp_stop(adapter);
6659
6660         if (netif_device_present(netdev))
6661                 ixgbe_close_suspend(adapter);
6662
6663         ixgbe_fdir_filter_exit(adapter);
6664
6665         ixgbe_release_hw_control(adapter);
6666
6667         return 0;
6668 }
6669
6670 #ifdef CONFIG_PM
6671 static int ixgbe_resume(struct pci_dev *pdev)
6672 {
6673         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6674         struct net_device *netdev = adapter->netdev;
6675         u32 err;
6676
6677         adapter->hw.hw_addr = adapter->io_addr;
6678         pci_set_power_state(pdev, PCI_D0);
6679         pci_restore_state(pdev);
6680         /*
6681          * pci_restore_state clears dev->state_saved so call
6682          * pci_save_state to restore it.
6683          */
6684         pci_save_state(pdev);
6685
6686         err = pci_enable_device_mem(pdev);
6687         if (err) {
6688                 e_dev_err("Cannot enable PCI device from suspend\n");
6689                 return err;
6690         }
6691         smp_mb__before_atomic();
6692         clear_bit(__IXGBE_DISABLED, &adapter->state);
6693         pci_set_master(pdev);
6694
6695         pci_wake_from_d3(pdev, false);
6696
6697         ixgbe_reset(adapter);
6698
6699         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6700
6701         rtnl_lock();
6702         err = ixgbe_init_interrupt_scheme(adapter);
6703         if (!err && netif_running(netdev))
6704                 err = ixgbe_open(netdev);
6705
6706
6707         if (!err)
6708                 netif_device_attach(netdev);
6709         rtnl_unlock();
6710
6711         return err;
6712 }
6713 #endif /* CONFIG_PM */
6714
6715 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6716 {
6717         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6718         struct net_device *netdev = adapter->netdev;
6719         struct ixgbe_hw *hw = &adapter->hw;
6720         u32 ctrl;
6721         u32 wufc = adapter->wol;
6722 #ifdef CONFIG_PM
6723         int retval = 0;
6724 #endif
6725
6726         rtnl_lock();
6727         netif_device_detach(netdev);
6728
6729         if (netif_running(netdev))
6730                 ixgbe_close_suspend(adapter);
6731
6732         ixgbe_clear_interrupt_scheme(adapter);
6733         rtnl_unlock();
6734
6735 #ifdef CONFIG_PM
6736         retval = pci_save_state(pdev);
6737         if (retval)
6738                 return retval;
6739
6740 #endif
6741         if (hw->mac.ops.stop_link_on_d3)
6742                 hw->mac.ops.stop_link_on_d3(hw);
6743
6744         if (wufc) {
6745                 u32 fctrl;
6746
6747                 ixgbe_set_rx_mode(netdev);
6748
6749                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6750                 if (hw->mac.ops.enable_tx_laser)
6751                         hw->mac.ops.enable_tx_laser(hw);
6752
6753                 /* enable the reception of multicast packets */
6754                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6755                 fctrl |= IXGBE_FCTRL_MPE;
6756                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6757
6758                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6759                 ctrl |= IXGBE_CTRL_GIO_DIS;
6760                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6761
6762                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6763         } else {
6764                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6765                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6766         }
6767
6768         switch (hw->mac.type) {
6769         case ixgbe_mac_82598EB:
6770                 pci_wake_from_d3(pdev, false);
6771                 break;
6772         case ixgbe_mac_82599EB:
6773         case ixgbe_mac_X540:
6774         case ixgbe_mac_X550:
6775         case ixgbe_mac_X550EM_x:
6776         case ixgbe_mac_x550em_a:
6777                 pci_wake_from_d3(pdev, !!wufc);
6778                 break;
6779         default:
6780                 break;
6781         }
6782
6783         *enable_wake = !!wufc;
6784         if (hw->phy.ops.set_phy_power && !*enable_wake)
6785                 hw->phy.ops.set_phy_power(hw, false);
6786
6787         ixgbe_release_hw_control(adapter);
6788
6789         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6790                 pci_disable_device(pdev);
6791
6792         return 0;
6793 }
6794
6795 #ifdef CONFIG_PM
6796 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6797 {
6798         int retval;
6799         bool wake;
6800
6801         retval = __ixgbe_shutdown(pdev, &wake);
6802         if (retval)
6803                 return retval;
6804
6805         if (wake) {
6806                 pci_prepare_to_sleep(pdev);
6807         } else {
6808                 pci_wake_from_d3(pdev, false);
6809                 pci_set_power_state(pdev, PCI_D3hot);
6810         }
6811
6812         return 0;
6813 }
6814 #endif /* CONFIG_PM */
6815
6816 static void ixgbe_shutdown(struct pci_dev *pdev)
6817 {
6818         bool wake;
6819
6820         __ixgbe_shutdown(pdev, &wake);
6821
6822         if (system_state == SYSTEM_POWER_OFF) {
6823                 pci_wake_from_d3(pdev, wake);
6824                 pci_set_power_state(pdev, PCI_D3hot);
6825         }
6826 }
6827
6828 /**
6829  * ixgbe_update_stats - Update the board statistics counters.
6830  * @adapter: board private structure
6831  **/
6832 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6833 {
6834         struct net_device *netdev = adapter->netdev;
6835         struct ixgbe_hw *hw = &adapter->hw;
6836         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6837         u64 total_mpc = 0;
6838         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6839         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6840         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6841         u64 alloc_rx_page = 0;
6842         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6843
6844         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6845             test_bit(__IXGBE_RESETTING, &adapter->state))
6846                 return;
6847
6848         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6849                 u64 rsc_count = 0;
6850                 u64 rsc_flush = 0;
6851                 for (i = 0; i < adapter->num_rx_queues; i++) {
6852                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6853                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6854                 }
6855                 adapter->rsc_total_count = rsc_count;
6856                 adapter->rsc_total_flush = rsc_flush;
6857         }
6858
6859         for (i = 0; i < adapter->num_rx_queues; i++) {
6860                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6861                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6862                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6863                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6864                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6865                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6866                 bytes += rx_ring->stats.bytes;
6867                 packets += rx_ring->stats.packets;
6868         }
6869         adapter->non_eop_descs = non_eop_descs;
6870         adapter->alloc_rx_page = alloc_rx_page;
6871         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6872         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6873         adapter->hw_csum_rx_error = hw_csum_rx_error;
6874         netdev->stats.rx_bytes = bytes;
6875         netdev->stats.rx_packets = packets;
6876
6877         bytes = 0;
6878         packets = 0;
6879         /* gather some stats to the adapter struct that are per queue */
6880         for (i = 0; i < adapter->num_tx_queues; i++) {
6881                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6882                 restart_queue += tx_ring->tx_stats.restart_queue;
6883                 tx_busy += tx_ring->tx_stats.tx_busy;
6884                 bytes += tx_ring->stats.bytes;
6885                 packets += tx_ring->stats.packets;
6886         }
6887         for (i = 0; i < adapter->num_xdp_queues; i++) {
6888                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6889
6890                 restart_queue += xdp_ring->tx_stats.restart_queue;
6891                 tx_busy += xdp_ring->tx_stats.tx_busy;
6892                 bytes += xdp_ring->stats.bytes;
6893                 packets += xdp_ring->stats.packets;
6894         }
6895         adapter->restart_queue = restart_queue;
6896         adapter->tx_busy = tx_busy;
6897         netdev->stats.tx_bytes = bytes;
6898         netdev->stats.tx_packets = packets;
6899
6900         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6901
6902         /* 8 register reads */
6903         for (i = 0; i < 8; i++) {
6904                 /* for packet buffers not used, the register should read 0 */
6905                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6906                 missed_rx += mpc;
6907                 hwstats->mpc[i] += mpc;
6908                 total_mpc += hwstats->mpc[i];
6909                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6910                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6911                 switch (hw->mac.type) {
6912                 case ixgbe_mac_82598EB:
6913                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6914                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6915                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6916                         hwstats->pxonrxc[i] +=
6917                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6918                         break;
6919                 case ixgbe_mac_82599EB:
6920                 case ixgbe_mac_X540:
6921                 case ixgbe_mac_X550:
6922                 case ixgbe_mac_X550EM_x:
6923                 case ixgbe_mac_x550em_a:
6924                         hwstats->pxonrxc[i] +=
6925                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6926                         break;
6927                 default:
6928                         break;
6929                 }
6930         }
6931
6932         /*16 register reads */
6933         for (i = 0; i < 16; i++) {
6934                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6935                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6936                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6937                     (hw->mac.type == ixgbe_mac_X540) ||
6938                     (hw->mac.type == ixgbe_mac_X550) ||
6939                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
6940                     (hw->mac.type == ixgbe_mac_x550em_a)) {
6941                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6942                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6943                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6944                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6945                 }
6946         }
6947
6948         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6949         /* work around hardware counting issue */
6950         hwstats->gprc -= missed_rx;
6951
6952         ixgbe_update_xoff_received(adapter);
6953
6954         /* 82598 hardware only has a 32 bit counter in the high register */
6955         switch (hw->mac.type) {
6956         case ixgbe_mac_82598EB:
6957                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6958                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6959                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6960                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6961                 break;
6962         case ixgbe_mac_X540:
6963         case ixgbe_mac_X550:
6964         case ixgbe_mac_X550EM_x:
6965         case ixgbe_mac_x550em_a:
6966                 /* OS2BMC stats are X540 and later */
6967                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6968                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6969                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6970                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6971                 /* fall through */
6972         case ixgbe_mac_82599EB:
6973                 for (i = 0; i < 16; i++)
6974                         adapter->hw_rx_no_dma_resources +=
6975                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6976                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6977                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6978                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6979                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6980                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6981                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6982                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6983                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6984                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6985 #ifdef IXGBE_FCOE
6986                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6987                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6988                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6989                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6990                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6991                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6992                 /* Add up per cpu counters for total ddp aloc fail */
6993                 if (adapter->fcoe.ddp_pool) {
6994                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6995                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6996                         unsigned int cpu;
6997                         u64 noddp = 0, noddp_ext_buff = 0;
6998                         for_each_possible_cpu(cpu) {
6999                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7000                                 noddp += ddp_pool->noddp;
7001                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7002                         }
7003                         hwstats->fcoe_noddp = noddp;
7004                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7005                 }
7006 #endif /* IXGBE_FCOE */
7007                 break;
7008         default:
7009                 break;
7010         }
7011         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7012         hwstats->bprc += bprc;
7013         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7014         if (hw->mac.type == ixgbe_mac_82598EB)
7015                 hwstats->mprc -= bprc;
7016         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7017         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7018         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7019         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7020         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7021         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7022         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7023         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7024         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7025         hwstats->lxontxc += lxon;
7026         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7027         hwstats->lxofftxc += lxoff;
7028         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7029         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7030         /*
7031          * 82598 errata - tx of flow control packets is included in tx counters
7032          */
7033         xon_off_tot = lxon + lxoff;
7034         hwstats->gptc -= xon_off_tot;
7035         hwstats->mptc -= xon_off_tot;
7036         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7037         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7038         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7039         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7040         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7041         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7042         hwstats->ptc64 -= xon_off_tot;
7043         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7044         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7045         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7046         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7047         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7048         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7049
7050         /* Fill out the OS statistics structure */
7051         netdev->stats.multicast = hwstats->mprc;
7052
7053         /* Rx Errors */
7054         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7055         netdev->stats.rx_dropped = 0;
7056         netdev->stats.rx_length_errors = hwstats->rlec;
7057         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7058         netdev->stats.rx_missed_errors = total_mpc;
7059 }
7060
7061 /**
7062  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7063  * @adapter: pointer to the device adapter structure
7064  **/
7065 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7066 {
7067         struct ixgbe_hw *hw = &adapter->hw;
7068         int i;
7069
7070         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7071                 return;
7072
7073         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7074
7075         /* if interface is down do nothing */
7076         if (test_bit(__IXGBE_DOWN, &adapter->state))
7077                 return;
7078
7079         /* do nothing if we are not using signature filters */
7080         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7081                 return;
7082
7083         adapter->fdir_overflow++;
7084
7085         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7086                 for (i = 0; i < adapter->num_tx_queues; i++)
7087                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7088                                 &(adapter->tx_ring[i]->state));
7089                 for (i = 0; i < adapter->num_xdp_queues; i++)
7090                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7091                                 &adapter->xdp_ring[i]->state);
7092                 /* re-enable flow director interrupts */
7093                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7094         } else {
7095                 e_err(probe, "failed to finish FDIR re-initialization, "
7096                       "ignored adding FDIR ATR filters\n");
7097         }
7098 }
7099
7100 /**
7101  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7102  * @adapter: pointer to the device adapter structure
7103  *
7104  * This function serves two purposes.  First it strobes the interrupt lines
7105  * in order to make certain interrupts are occurring.  Secondly it sets the
7106  * bits needed to check for TX hangs.  As a result we should immediately
7107  * determine if a hang has occurred.
7108  */
7109 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7110 {
7111         struct ixgbe_hw *hw = &adapter->hw;
7112         u64 eics = 0;
7113         int i;
7114
7115         /* If we're down, removing or resetting, just bail */
7116         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7117             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7118             test_bit(__IXGBE_RESETTING, &adapter->state))
7119                 return;
7120
7121         /* Force detection of hung controller */
7122         if (netif_carrier_ok(adapter->netdev)) {
7123                 for (i = 0; i < adapter->num_tx_queues; i++)
7124                         set_check_for_tx_hang(adapter->tx_ring[i]);
7125                 for (i = 0; i < adapter->num_xdp_queues; i++)
7126                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7127         }
7128
7129         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7130                 /*
7131                  * for legacy and MSI interrupts don't set any bits
7132                  * that are enabled for EIAM, because this operation
7133                  * would set *both* EIMS and EICS for any bit in EIAM
7134                  */
7135                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7136                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7137         } else {
7138                 /* get one bit for every active tx/rx interrupt vector */
7139                 for (i = 0; i < adapter->num_q_vectors; i++) {
7140                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7141                         if (qv->rx.ring || qv->tx.ring)
7142                                 eics |= BIT_ULL(i);
7143                 }
7144         }
7145
7146         /* Cause software interrupt to ensure rings are cleaned */
7147         ixgbe_irq_rearm_queues(adapter, eics);
7148 }
7149
7150 /**
7151  * ixgbe_watchdog_update_link - update the link status
7152  * @adapter: pointer to the device adapter structure
7153  **/
7154 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7155 {
7156         struct ixgbe_hw *hw = &adapter->hw;
7157         u32 link_speed = adapter->link_speed;
7158         bool link_up = adapter->link_up;
7159         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7160
7161         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7162                 return;
7163
7164         if (hw->mac.ops.check_link) {
7165                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7166         } else {
7167                 /* always assume link is up, if no check link function */
7168                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7169                 link_up = true;
7170         }
7171
7172         if (adapter->ixgbe_ieee_pfc)
7173                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7174
7175         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7176                 hw->mac.ops.fc_enable(hw);
7177                 ixgbe_set_rx_drop_en(adapter);
7178         }
7179
7180         if (link_up ||
7181             time_after(jiffies, (adapter->link_check_timeout +
7182                                  IXGBE_TRY_LINK_TIMEOUT))) {
7183                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7184                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7185                 IXGBE_WRITE_FLUSH(hw);
7186         }
7187
7188         adapter->link_up = link_up;
7189         adapter->link_speed = link_speed;
7190 }
7191
7192 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7193 {
7194 #ifdef CONFIG_IXGBE_DCB
7195         struct net_device *netdev = adapter->netdev;
7196         struct dcb_app app = {
7197                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7198                               .protocol = 0,
7199                              };
7200         u8 up = 0;
7201
7202         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7203                 up = dcb_ieee_getapp_mask(netdev, &app);
7204
7205         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7206 #endif
7207 }
7208
7209 /**
7210  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7211  *                             print link up message
7212  * @adapter: pointer to the device adapter structure
7213  **/
7214 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7215 {
7216         struct net_device *netdev = adapter->netdev;
7217         struct ixgbe_hw *hw = &adapter->hw;
7218         u32 link_speed = adapter->link_speed;
7219         const char *speed_str;
7220         bool flow_rx, flow_tx;
7221
7222         /* only continue if link was previously down */
7223         if (netif_carrier_ok(netdev))
7224                 return;
7225
7226         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7227
7228         switch (hw->mac.type) {
7229         case ixgbe_mac_82598EB: {
7230                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7231                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7232                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7233                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7234         }
7235                 break;
7236         case ixgbe_mac_X540:
7237         case ixgbe_mac_X550:
7238         case ixgbe_mac_X550EM_x:
7239         case ixgbe_mac_x550em_a:
7240         case ixgbe_mac_82599EB: {
7241                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7242                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7243                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7244                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7245         }
7246                 break;
7247         default:
7248                 flow_tx = false;
7249                 flow_rx = false;
7250                 break;
7251         }
7252
7253         adapter->last_rx_ptp_check = jiffies;
7254
7255         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7256                 ixgbe_ptp_start_cyclecounter(adapter);
7257
7258         switch (link_speed) {
7259         case IXGBE_LINK_SPEED_10GB_FULL:
7260                 speed_str = "10 Gbps";
7261                 break;
7262         case IXGBE_LINK_SPEED_2_5GB_FULL:
7263                 speed_str = "2.5 Gbps";
7264                 break;
7265         case IXGBE_LINK_SPEED_1GB_FULL:
7266                 speed_str = "1 Gbps";
7267                 break;
7268         case IXGBE_LINK_SPEED_100_FULL:
7269                 speed_str = "100 Mbps";
7270                 break;
7271         case IXGBE_LINK_SPEED_10_FULL:
7272                 speed_str = "10 Mbps";
7273                 break;
7274         default:
7275                 speed_str = "unknown speed";
7276                 break;
7277         }
7278         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7279                ((flow_rx && flow_tx) ? "RX/TX" :
7280                (flow_rx ? "RX" :
7281                (flow_tx ? "TX" : "None"))));
7282
7283         netif_carrier_on(netdev);
7284         ixgbe_check_vf_rate_limit(adapter);
7285
7286         /* enable transmits */
7287         netif_tx_wake_all_queues(adapter->netdev);
7288
7289         /* update the default user priority for VFs */
7290         ixgbe_update_default_up(adapter);
7291
7292         /* ping all the active vfs to let them know link has changed */
7293         ixgbe_ping_all_vfs(adapter);
7294 }
7295
7296 /**
7297  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7298  *                               print link down message
7299  * @adapter: pointer to the adapter structure
7300  **/
7301 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7302 {
7303         struct net_device *netdev = adapter->netdev;
7304         struct ixgbe_hw *hw = &adapter->hw;
7305
7306         adapter->link_up = false;
7307         adapter->link_speed = 0;
7308
7309         /* only continue if link was up previously */
7310         if (!netif_carrier_ok(netdev))
7311                 return;
7312
7313         /* poll for SFP+ cable when link is down */
7314         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7315                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7316
7317         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7318                 ixgbe_ptp_start_cyclecounter(adapter);
7319
7320         e_info(drv, "NIC Link is Down\n");
7321         netif_carrier_off(netdev);
7322
7323         /* ping all the active vfs to let them know link has changed */
7324         ixgbe_ping_all_vfs(adapter);
7325 }
7326
7327 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7328 {
7329         int i;
7330
7331         for (i = 0; i < adapter->num_tx_queues; i++) {
7332                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7333
7334                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7335                         return true;
7336         }
7337
7338         for (i = 0; i < adapter->num_xdp_queues; i++) {
7339                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7340
7341                 if (ring->next_to_use != ring->next_to_clean)
7342                         return true;
7343         }
7344
7345         return false;
7346 }
7347
7348 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7349 {
7350         struct ixgbe_hw *hw = &adapter->hw;
7351         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7352         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7353
7354         int i, j;
7355
7356         if (!adapter->num_vfs)
7357                 return false;
7358
7359         /* resetting the PF is only needed for MAC before X550 */
7360         if (hw->mac.type >= ixgbe_mac_X550)
7361                 return false;
7362
7363         for (i = 0; i < adapter->num_vfs; i++) {
7364                 for (j = 0; j < q_per_pool; j++) {
7365                         u32 h, t;
7366
7367                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7368                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7369
7370                         if (h != t)
7371                                 return true;
7372                 }
7373         }
7374
7375         return false;
7376 }
7377
7378 /**
7379  * ixgbe_watchdog_flush_tx - flush queues on link down
7380  * @adapter: pointer to the device adapter structure
7381  **/
7382 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7383 {
7384         if (!netif_carrier_ok(adapter->netdev)) {
7385                 if (ixgbe_ring_tx_pending(adapter) ||
7386                     ixgbe_vf_tx_pending(adapter)) {
7387                         /* We've lost link, so the controller stops DMA,
7388                          * but we've got queued Tx work that's never going
7389                          * to get done, so reset controller to flush Tx.
7390                          * (Do the reset outside of interrupt context).
7391                          */
7392                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7393                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7394                 }
7395         }
7396 }
7397
7398 #ifdef CONFIG_PCI_IOV
7399 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7400 {
7401         struct ixgbe_hw *hw = &adapter->hw;
7402         struct pci_dev *pdev = adapter->pdev;
7403         unsigned int vf;
7404         u32 gpc;
7405
7406         if (!(netif_carrier_ok(adapter->netdev)))
7407                 return;
7408
7409         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7410         if (gpc) /* If incrementing then no need for the check below */
7411                 return;
7412         /* Check to see if a bad DMA write target from an errant or
7413          * malicious VF has caused a PCIe error.  If so then we can
7414          * issue a VFLR to the offending VF(s) and then resume without
7415          * requesting a full slot reset.
7416          */
7417
7418         if (!pdev)
7419                 return;
7420
7421         /* check status reg for all VFs owned by this PF */
7422         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7423                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7424                 u16 status_reg;
7425
7426                 if (!vfdev)
7427                         continue;
7428                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7429                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7430                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7431                         pcie_flr(vfdev);
7432         }
7433 }
7434
7435 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7436 {
7437         u32 ssvpc;
7438
7439         /* Do not perform spoof check for 82598 or if not in IOV mode */
7440         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7441             adapter->num_vfs == 0)
7442                 return;
7443
7444         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7445
7446         /*
7447          * ssvpc register is cleared on read, if zero then no
7448          * spoofed packets in the last interval.
7449          */
7450         if (!ssvpc)
7451                 return;
7452
7453         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7454 }
7455 #else
7456 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7457 {
7458 }
7459
7460 static void
7461 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7462 {
7463 }
7464 #endif /* CONFIG_PCI_IOV */
7465
7466
7467 /**
7468  * ixgbe_watchdog_subtask - check and bring link up
7469  * @adapter: pointer to the device adapter structure
7470  **/
7471 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7472 {
7473         /* if interface is down, removing or resetting, do nothing */
7474         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7475             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7476             test_bit(__IXGBE_RESETTING, &adapter->state))
7477                 return;
7478
7479         ixgbe_watchdog_update_link(adapter);
7480
7481         if (adapter->link_up)
7482                 ixgbe_watchdog_link_is_up(adapter);
7483         else
7484                 ixgbe_watchdog_link_is_down(adapter);
7485
7486         ixgbe_check_for_bad_vf(adapter);
7487         ixgbe_spoof_check(adapter);
7488         ixgbe_update_stats(adapter);
7489
7490         ixgbe_watchdog_flush_tx(adapter);
7491 }
7492
7493 /**
7494  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7495  * @adapter: the ixgbe adapter structure
7496  **/
7497 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7498 {
7499         struct ixgbe_hw *hw = &adapter->hw;
7500         s32 err;
7501
7502         /* not searching for SFP so there is nothing to do here */
7503         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7504             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7505                 return;
7506
7507         if (adapter->sfp_poll_time &&
7508             time_after(adapter->sfp_poll_time, jiffies))
7509                 return; /* If not yet time to poll for SFP */
7510
7511         /* someone else is in init, wait until next service event */
7512         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7513                 return;
7514
7515         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7516
7517         err = hw->phy.ops.identify_sfp(hw);
7518         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7519                 goto sfp_out;
7520
7521         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7522                 /* If no cable is present, then we need to reset
7523                  * the next time we find a good cable. */
7524                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7525         }
7526
7527         /* exit on error */
7528         if (err)
7529                 goto sfp_out;
7530
7531         /* exit if reset not needed */
7532         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7533                 goto sfp_out;
7534
7535         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7536
7537         /*
7538          * A module may be identified correctly, but the EEPROM may not have
7539          * support for that module.  setup_sfp() will fail in that case, so
7540          * we should not allow that module to load.
7541          */
7542         if (hw->mac.type == ixgbe_mac_82598EB)
7543                 err = hw->phy.ops.reset(hw);
7544         else
7545                 err = hw->mac.ops.setup_sfp(hw);
7546
7547         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7548                 goto sfp_out;
7549
7550         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7551         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7552
7553 sfp_out:
7554         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7555
7556         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7557             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7558                 e_dev_err("failed to initialize because an unsupported "
7559                           "SFP+ module type was detected.\n");
7560                 e_dev_err("Reload the driver after installing a "
7561                           "supported module.\n");
7562                 unregister_netdev(adapter->netdev);
7563         }
7564 }
7565
7566 /**
7567  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7568  * @adapter: the ixgbe adapter structure
7569  **/
7570 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7571 {
7572         struct ixgbe_hw *hw = &adapter->hw;
7573         u32 cap_speed;
7574         u32 speed;
7575         bool autoneg = false;
7576
7577         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7578                 return;
7579
7580         /* someone else is in init, wait until next service event */
7581         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7582                 return;
7583
7584         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7585
7586         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7587
7588         /* advertise highest capable link speed */
7589         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7590                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7591         else
7592                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7593                                      IXGBE_LINK_SPEED_1GB_FULL);
7594
7595         if (hw->mac.ops.setup_link)
7596                 hw->mac.ops.setup_link(hw, speed, true);
7597
7598         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7599         adapter->link_check_timeout = jiffies;
7600         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7601 }
7602
7603 /**
7604  * ixgbe_service_timer - Timer Call-back
7605  * @t: pointer to timer_list structure
7606  **/
7607 static void ixgbe_service_timer(struct timer_list *t)
7608 {
7609         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7610         unsigned long next_event_offset;
7611
7612         /* poll faster when waiting for link */
7613         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7614                 next_event_offset = HZ / 10;
7615         else
7616                 next_event_offset = HZ * 2;
7617
7618         /* Reset the timer */
7619         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7620
7621         ixgbe_service_event_schedule(adapter);
7622 }
7623
7624 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7625 {
7626         struct ixgbe_hw *hw = &adapter->hw;
7627         u32 status;
7628
7629         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7630                 return;
7631
7632         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7633
7634         if (!hw->phy.ops.handle_lasi)
7635                 return;
7636
7637         status = hw->phy.ops.handle_lasi(&adapter->hw);
7638         if (status != IXGBE_ERR_OVERTEMP)
7639                 return;
7640
7641         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7642 }
7643
7644 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7645 {
7646         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7647                 return;
7648
7649         /* If we're already down, removing or resetting, just bail */
7650         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7651             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7652             test_bit(__IXGBE_RESETTING, &adapter->state))
7653                 return;
7654
7655         ixgbe_dump(adapter);
7656         netdev_err(adapter->netdev, "Reset adapter\n");
7657         adapter->tx_timeout_count++;
7658
7659         rtnl_lock();
7660         ixgbe_reinit_locked(adapter);
7661         rtnl_unlock();
7662 }
7663
7664 /**
7665  * ixgbe_service_task - manages and runs subtasks
7666  * @work: pointer to work_struct containing our data
7667  **/
7668 static void ixgbe_service_task(struct work_struct *work)
7669 {
7670         struct ixgbe_adapter *adapter = container_of(work,
7671                                                      struct ixgbe_adapter,
7672                                                      service_task);
7673         if (ixgbe_removed(adapter->hw.hw_addr)) {
7674                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7675                         rtnl_lock();
7676                         ixgbe_down(adapter);
7677                         rtnl_unlock();
7678                 }
7679                 ixgbe_service_event_complete(adapter);
7680                 return;
7681         }
7682         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7683                 rtnl_lock();
7684                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7685                 udp_tunnel_get_rx_info(adapter->netdev);
7686                 rtnl_unlock();
7687         }
7688         ixgbe_reset_subtask(adapter);
7689         ixgbe_phy_interrupt_subtask(adapter);
7690         ixgbe_sfp_detection_subtask(adapter);
7691         ixgbe_sfp_link_config_subtask(adapter);
7692         ixgbe_check_overtemp_subtask(adapter);
7693         ixgbe_watchdog_subtask(adapter);
7694         ixgbe_fdir_reinit_subtask(adapter);
7695         ixgbe_check_hang_subtask(adapter);
7696
7697         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7698                 ixgbe_ptp_overflow_check(adapter);
7699                 ixgbe_ptp_rx_hang(adapter);
7700                 ixgbe_ptp_tx_hang(adapter);
7701         }
7702
7703         ixgbe_service_event_complete(adapter);
7704 }
7705
7706 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7707                      struct ixgbe_tx_buffer *first,
7708                      u8 *hdr_len)
7709 {
7710         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7711         struct sk_buff *skb = first->skb;
7712         union {
7713                 struct iphdr *v4;
7714                 struct ipv6hdr *v6;
7715                 unsigned char *hdr;
7716         } ip;
7717         union {
7718                 struct tcphdr *tcp;
7719                 unsigned char *hdr;
7720         } l4;
7721         u32 paylen, l4_offset;
7722         int err;
7723
7724         if (skb->ip_summed != CHECKSUM_PARTIAL)
7725                 return 0;
7726
7727         if (!skb_is_gso(skb))
7728                 return 0;
7729
7730         err = skb_cow_head(skb, 0);
7731         if (err < 0)
7732                 return err;
7733
7734         if (eth_p_mpls(first->protocol))
7735                 ip.hdr = skb_inner_network_header(skb);
7736         else
7737                 ip.hdr = skb_network_header(skb);
7738         l4.hdr = skb_checksum_start(skb);
7739
7740         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7741         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7742
7743         /* initialize outer IP header fields */
7744         if (ip.v4->version == 4) {
7745                 unsigned char *csum_start = skb_checksum_start(skb);
7746                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7747
7748                 /* IP header will have to cancel out any data that
7749                  * is not a part of the outer IP header
7750                  */
7751                 ip.v4->check = csum_fold(csum_partial(trans_start,
7752                                                       csum_start - trans_start,
7753                                                       0));
7754                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7755
7756                 ip.v4->tot_len = 0;
7757                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7758                                    IXGBE_TX_FLAGS_CSUM |
7759                                    IXGBE_TX_FLAGS_IPV4;
7760         } else {
7761                 ip.v6->payload_len = 0;
7762                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7763                                    IXGBE_TX_FLAGS_CSUM;
7764         }
7765
7766         /* determine offset of inner transport header */
7767         l4_offset = l4.hdr - skb->data;
7768
7769         /* compute length of segmentation header */
7770         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7771
7772         /* remove payload length from inner checksum */
7773         paylen = skb->len - l4_offset;
7774         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
7775
7776         /* update gso size and bytecount with header size */
7777         first->gso_segs = skb_shinfo(skb)->gso_segs;
7778         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7779
7780         /* mss_l4len_id: use 0 as index for TSO */
7781         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7782         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7783
7784         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7785         vlan_macip_lens = l4.hdr - ip.hdr;
7786         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7787         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7788
7789         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
7790                           mss_l4len_idx);
7791
7792         return 1;
7793 }
7794
7795 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7796 {
7797         unsigned int offset = 0;
7798
7799         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7800
7801         return offset == skb_checksum_start_offset(skb);
7802 }
7803
7804 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7805                           struct ixgbe_tx_buffer *first,
7806                           struct ixgbe_ipsec_tx_data *itd)
7807 {
7808         struct sk_buff *skb = first->skb;
7809         u32 vlan_macip_lens = 0;
7810         u32 fceof_saidx = 0;
7811         u32 type_tucmd = 0;
7812
7813         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7814 csum_failed:
7815                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7816                                          IXGBE_TX_FLAGS_CC)))
7817                         return;
7818                 goto no_csum;
7819         }
7820
7821         switch (skb->csum_offset) {
7822         case offsetof(struct tcphdr, check):
7823                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7824                 /* fall through */
7825         case offsetof(struct udphdr, check):
7826                 break;
7827         case offsetof(struct sctphdr, checksum):
7828                 /* validate that this is actually an SCTP request */
7829                 if (((first->protocol == htons(ETH_P_IP)) &&
7830                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7831                     ((first->protocol == htons(ETH_P_IPV6)) &&
7832                      ixgbe_ipv6_csum_is_sctp(skb))) {
7833                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7834                         break;
7835                 }
7836                 /* fall through */
7837         default:
7838                 skb_checksum_help(skb);
7839                 goto csum_failed;
7840         }
7841
7842         /* update TX checksum flag */
7843         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7844         vlan_macip_lens = skb_checksum_start_offset(skb) -
7845                           skb_network_offset(skb);
7846 no_csum:
7847         /* vlan_macip_lens: MACLEN, VLAN tag */
7848         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7849         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7850
7851         if (first->tx_flags & IXGBE_TX_FLAGS_IPSEC) {
7852                 fceof_saidx |= itd->sa_idx;
7853                 type_tucmd |= itd->flags | itd->trailer_len;
7854         }
7855
7856         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
7857 }
7858
7859 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7860         ((_flag <= _result) ? \
7861          ((u32)(_input & _flag) * (_result / _flag)) : \
7862          ((u32)(_input & _flag) / (_flag / _result)))
7863
7864 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7865 {
7866         /* set type for advanced descriptor with frame checksum insertion */
7867         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7868                        IXGBE_ADVTXD_DCMD_DEXT |
7869                        IXGBE_ADVTXD_DCMD_IFCS;
7870
7871         /* set HW vlan bit if vlan is present */
7872         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7873                                    IXGBE_ADVTXD_DCMD_VLE);
7874
7875         /* set segmentation enable bits for TSO/FSO */
7876         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7877                                    IXGBE_ADVTXD_DCMD_TSE);
7878
7879         /* set timestamp bit if present */
7880         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7881                                    IXGBE_ADVTXD_MAC_TSTAMP);
7882
7883         /* insert frame checksum */
7884         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7885
7886         return cmd_type;
7887 }
7888
7889 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7890                                    u32 tx_flags, unsigned int paylen)
7891 {
7892         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7893
7894         /* enable L4 checksum for TSO and TX checksum offload */
7895         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7896                                         IXGBE_TX_FLAGS_CSUM,
7897                                         IXGBE_ADVTXD_POPTS_TXSM);
7898
7899         /* enable IPv4 checksum for TSO */
7900         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7901                                         IXGBE_TX_FLAGS_IPV4,
7902                                         IXGBE_ADVTXD_POPTS_IXSM);
7903
7904         /* enable IPsec */
7905         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7906                                         IXGBE_TX_FLAGS_IPSEC,
7907                                         IXGBE_ADVTXD_POPTS_IPSEC);
7908
7909         /*
7910          * Check Context must be set if Tx switch is enabled, which it
7911          * always is for case where virtual functions are running
7912          */
7913         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7914                                         IXGBE_TX_FLAGS_CC,
7915                                         IXGBE_ADVTXD_CC);
7916
7917         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7918 }
7919
7920 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7921 {
7922         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7923
7924         /* Herbert's original patch had:
7925          *  smp_mb__after_netif_stop_queue();
7926          * but since that doesn't exist yet, just open code it.
7927          */
7928         smp_mb();
7929
7930         /* We need to check again in a case another CPU has just
7931          * made room available.
7932          */
7933         if (likely(ixgbe_desc_unused(tx_ring) < size))
7934                 return -EBUSY;
7935
7936         /* A reprieve! - use start_queue because it doesn't call schedule */
7937         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7938         ++tx_ring->tx_stats.restart_queue;
7939         return 0;
7940 }
7941
7942 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7943 {
7944         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7945                 return 0;
7946
7947         return __ixgbe_maybe_stop_tx(tx_ring, size);
7948 }
7949
7950 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7951                        IXGBE_TXD_CMD_RS)
7952
7953 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7954                         struct ixgbe_tx_buffer *first,
7955                         const u8 hdr_len)
7956 {
7957         struct sk_buff *skb = first->skb;
7958         struct ixgbe_tx_buffer *tx_buffer;
7959         union ixgbe_adv_tx_desc *tx_desc;
7960         struct skb_frag_struct *frag;
7961         dma_addr_t dma;
7962         unsigned int data_len, size;
7963         u32 tx_flags = first->tx_flags;
7964         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7965         u16 i = tx_ring->next_to_use;
7966
7967         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7968
7969         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7970
7971         size = skb_headlen(skb);
7972         data_len = skb->data_len;
7973
7974 #ifdef IXGBE_FCOE
7975         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7976                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7977                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7978                         data_len = 0;
7979                 } else {
7980                         data_len -= sizeof(struct fcoe_crc_eof);
7981                 }
7982         }
7983
7984 #endif
7985         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7986
7987         tx_buffer = first;
7988
7989         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7990                 if (dma_mapping_error(tx_ring->dev, dma))
7991                         goto dma_error;
7992
7993                 /* record length, and DMA address */
7994                 dma_unmap_len_set(tx_buffer, len, size);
7995                 dma_unmap_addr_set(tx_buffer, dma, dma);
7996
7997                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7998
7999                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8000                         tx_desc->read.cmd_type_len =
8001                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8002
8003                         i++;
8004                         tx_desc++;
8005                         if (i == tx_ring->count) {
8006                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8007                                 i = 0;
8008                         }
8009                         tx_desc->read.olinfo_status = 0;
8010
8011                         dma += IXGBE_MAX_DATA_PER_TXD;
8012                         size -= IXGBE_MAX_DATA_PER_TXD;
8013
8014                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8015                 }
8016
8017                 if (likely(!data_len))
8018                         break;
8019
8020                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8021
8022                 i++;
8023                 tx_desc++;
8024                 if (i == tx_ring->count) {
8025                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8026                         i = 0;
8027                 }
8028                 tx_desc->read.olinfo_status = 0;
8029
8030 #ifdef IXGBE_FCOE
8031                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8032 #else
8033                 size = skb_frag_size(frag);
8034 #endif
8035                 data_len -= size;
8036
8037                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8038                                        DMA_TO_DEVICE);
8039
8040                 tx_buffer = &tx_ring->tx_buffer_info[i];
8041         }
8042
8043         /* write last descriptor with RS and EOP bits */
8044         cmd_type |= size | IXGBE_TXD_CMD;
8045         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8046
8047         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8048
8049         /* set the timestamp */
8050         first->time_stamp = jiffies;
8051
8052         /*
8053          * Force memory writes to complete before letting h/w know there
8054          * are new descriptors to fetch.  (Only applicable for weak-ordered
8055          * memory model archs, such as IA-64).
8056          *
8057          * We also need this memory barrier to make certain all of the
8058          * status bits have been updated before next_to_watch is written.
8059          */
8060         wmb();
8061
8062         /* set next_to_watch value indicating a packet is present */
8063         first->next_to_watch = tx_desc;
8064
8065         i++;
8066         if (i == tx_ring->count)
8067                 i = 0;
8068
8069         tx_ring->next_to_use = i;
8070
8071         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8072
8073         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8074                 writel(i, tx_ring->tail);
8075
8076                 /* we need this if more than one processor can write to our tail
8077                  * at a time, it synchronizes IO on IA64/Altix systems
8078                  */
8079                 mmiowb();
8080         }
8081
8082         return 0;
8083 dma_error:
8084         dev_err(tx_ring->dev, "TX DMA map failed\n");
8085
8086         /* clear dma mappings for failed tx_buffer_info map */
8087         for (;;) {
8088                 tx_buffer = &tx_ring->tx_buffer_info[i];
8089                 if (dma_unmap_len(tx_buffer, len))
8090                         dma_unmap_page(tx_ring->dev,
8091                                        dma_unmap_addr(tx_buffer, dma),
8092                                        dma_unmap_len(tx_buffer, len),
8093                                        DMA_TO_DEVICE);
8094                 dma_unmap_len_set(tx_buffer, len, 0);
8095                 if (tx_buffer == first)
8096                         break;
8097                 if (i == 0)
8098                         i += tx_ring->count;
8099                 i--;
8100         }
8101
8102         dev_kfree_skb_any(first->skb);
8103         first->skb = NULL;
8104
8105         tx_ring->next_to_use = i;
8106
8107         return -1;
8108 }
8109
8110 static void ixgbe_atr(struct ixgbe_ring *ring,
8111                       struct ixgbe_tx_buffer *first)
8112 {
8113         struct ixgbe_q_vector *q_vector = ring->q_vector;
8114         union ixgbe_atr_hash_dword input = { .dword = 0 };
8115         union ixgbe_atr_hash_dword common = { .dword = 0 };
8116         union {
8117                 unsigned char *network;
8118                 struct iphdr *ipv4;
8119                 struct ipv6hdr *ipv6;
8120         } hdr;
8121         struct tcphdr *th;
8122         unsigned int hlen;
8123         struct sk_buff *skb;
8124         __be16 vlan_id;
8125         int l4_proto;
8126
8127         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8128         if (!q_vector)
8129                 return;
8130
8131         /* do nothing if sampling is disabled */
8132         if (!ring->atr_sample_rate)
8133                 return;
8134
8135         ring->atr_count++;
8136
8137         /* currently only IPv4/IPv6 with TCP is supported */
8138         if ((first->protocol != htons(ETH_P_IP)) &&
8139             (first->protocol != htons(ETH_P_IPV6)))
8140                 return;
8141
8142         /* snag network header to get L4 type and address */
8143         skb = first->skb;
8144         hdr.network = skb_network_header(skb);
8145         if (unlikely(hdr.network <= skb->data))
8146                 return;
8147         if (skb->encapsulation &&
8148             first->protocol == htons(ETH_P_IP) &&
8149             hdr.ipv4->protocol == IPPROTO_UDP) {
8150                 struct ixgbe_adapter *adapter = q_vector->adapter;
8151
8152                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8153                              VXLAN_HEADROOM))
8154                         return;
8155
8156                 /* verify the port is recognized as VXLAN */
8157                 if (adapter->vxlan_port &&
8158                     udp_hdr(skb)->dest == adapter->vxlan_port)
8159                         hdr.network = skb_inner_network_header(skb);
8160
8161                 if (adapter->geneve_port &&
8162                     udp_hdr(skb)->dest == adapter->geneve_port)
8163                         hdr.network = skb_inner_network_header(skb);
8164         }
8165
8166         /* Make sure we have at least [minimum IPv4 header + TCP]
8167          * or [IPv6 header] bytes
8168          */
8169         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8170                 return;
8171
8172         /* Currently only IPv4/IPv6 with TCP is supported */
8173         switch (hdr.ipv4->version) {
8174         case IPVERSION:
8175                 /* access ihl as u8 to avoid unaligned access on ia64 */
8176                 hlen = (hdr.network[0] & 0x0F) << 2;
8177                 l4_proto = hdr.ipv4->protocol;
8178                 break;
8179         case 6:
8180                 hlen = hdr.network - skb->data;
8181                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8182                 hlen -= hdr.network - skb->data;
8183                 break;
8184         default:
8185                 return;
8186         }
8187
8188         if (l4_proto != IPPROTO_TCP)
8189                 return;
8190
8191         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8192                      hlen + sizeof(struct tcphdr)))
8193                 return;
8194
8195         th = (struct tcphdr *)(hdr.network + hlen);
8196
8197         /* skip this packet since the socket is closing */
8198         if (th->fin)
8199                 return;
8200
8201         /* sample on all syn packets or once every atr sample count */
8202         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8203                 return;
8204
8205         /* reset sample count */
8206         ring->atr_count = 0;
8207
8208         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8209
8210         /*
8211          * src and dst are inverted, think how the receiver sees them
8212          *
8213          * The input is broken into two sections, a non-compressed section
8214          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8215          * is XORed together and stored in the compressed dword.
8216          */
8217         input.formatted.vlan_id = vlan_id;
8218
8219         /*
8220          * since src port and flex bytes occupy the same word XOR them together
8221          * and write the value to source port portion of compressed dword
8222          */
8223         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8224                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8225         else
8226                 common.port.src ^= th->dest ^ first->protocol;
8227         common.port.dst ^= th->source;
8228
8229         switch (hdr.ipv4->version) {
8230         case IPVERSION:
8231                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8232                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8233                 break;
8234         case 6:
8235                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8236                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8237                              hdr.ipv6->saddr.s6_addr32[1] ^
8238                              hdr.ipv6->saddr.s6_addr32[2] ^
8239                              hdr.ipv6->saddr.s6_addr32[3] ^
8240                              hdr.ipv6->daddr.s6_addr32[0] ^
8241                              hdr.ipv6->daddr.s6_addr32[1] ^
8242                              hdr.ipv6->daddr.s6_addr32[2] ^
8243                              hdr.ipv6->daddr.s6_addr32[3];
8244                 break;
8245         default:
8246                 break;
8247         }
8248
8249         if (hdr.network != skb_network_header(skb))
8250                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8251
8252         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8253         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8254                                               input, common, ring->queue_index);
8255 }
8256
8257 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8258                               void *accel_priv, select_queue_fallback_t fallback)
8259 {
8260         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
8261         struct ixgbe_adapter *adapter;
8262         int txq;
8263 #ifdef IXGBE_FCOE
8264         struct ixgbe_ring_feature *f;
8265 #endif
8266
8267         if (fwd_adapter) {
8268                 adapter = netdev_priv(dev);
8269                 txq = reciprocal_scale(skb_get_hash(skb),
8270                                        adapter->num_rx_queues_per_pool);
8271
8272                 return txq + fwd_adapter->tx_base_queue;
8273         }
8274
8275 #ifdef IXGBE_FCOE
8276
8277         /*
8278          * only execute the code below if protocol is FCoE
8279          * or FIP and we have FCoE enabled on the adapter
8280          */
8281         switch (vlan_get_protocol(skb)) {
8282         case htons(ETH_P_FCOE):
8283         case htons(ETH_P_FIP):
8284                 adapter = netdev_priv(dev);
8285
8286                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
8287                         break;
8288                 /* fall through */
8289         default:
8290                 return fallback(dev, skb);
8291         }
8292
8293         f = &adapter->ring_feature[RING_F_FCOE];
8294
8295         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8296                                            smp_processor_id();
8297
8298         while (txq >= f->indices)
8299                 txq -= f->indices;
8300
8301         return txq + f->offset;
8302 #else
8303         return fallback(dev, skb);
8304 #endif
8305 }
8306
8307 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8308                                struct xdp_buff *xdp)
8309 {
8310         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8311         struct ixgbe_tx_buffer *tx_buffer;
8312         union ixgbe_adv_tx_desc *tx_desc;
8313         u32 len, cmd_type;
8314         dma_addr_t dma;
8315         u16 i;
8316
8317         len = xdp->data_end - xdp->data;
8318
8319         if (unlikely(!ixgbe_desc_unused(ring)))
8320                 return IXGBE_XDP_CONSUMED;
8321
8322         dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
8323         if (dma_mapping_error(ring->dev, dma))
8324                 return IXGBE_XDP_CONSUMED;
8325
8326         /* record the location of the first descriptor for this packet */
8327         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8328         tx_buffer->bytecount = len;
8329         tx_buffer->gso_segs = 1;
8330         tx_buffer->protocol = 0;
8331
8332         i = ring->next_to_use;
8333         tx_desc = IXGBE_TX_DESC(ring, i);
8334
8335         dma_unmap_len_set(tx_buffer, len, len);
8336         dma_unmap_addr_set(tx_buffer, dma, dma);
8337         tx_buffer->data = xdp->data;
8338         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8339
8340         /* put descriptor type bits */
8341         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8342                    IXGBE_ADVTXD_DCMD_DEXT |
8343                    IXGBE_ADVTXD_DCMD_IFCS;
8344         cmd_type |= len | IXGBE_TXD_CMD;
8345         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8346         tx_desc->read.olinfo_status =
8347                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8348
8349         /* Avoid any potential race with xdp_xmit and cleanup */
8350         smp_wmb();
8351
8352         /* set next_to_watch value indicating a packet is present */
8353         i++;
8354         if (i == ring->count)
8355                 i = 0;
8356
8357         tx_buffer->next_to_watch = tx_desc;
8358         ring->next_to_use = i;
8359
8360         return IXGBE_XDP_TX;
8361 }
8362
8363 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8364                           struct ixgbe_adapter *adapter,
8365                           struct ixgbe_ring *tx_ring)
8366 {
8367         struct ixgbe_tx_buffer *first;
8368         int tso;
8369         u32 tx_flags = 0;
8370         unsigned short f;
8371         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8372         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8373         __be16 protocol = skb->protocol;
8374         u8 hdr_len = 0;
8375
8376         /*
8377          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8378          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8379          *       + 2 desc gap to keep tail from touching head,
8380          *       + 1 desc for context descriptor,
8381          * otherwise try next time
8382          */
8383         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8384                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8385
8386         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8387                 tx_ring->tx_stats.tx_busy++;
8388                 return NETDEV_TX_BUSY;
8389         }
8390
8391         /* record the location of the first descriptor for this packet */
8392         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8393         first->skb = skb;
8394         first->bytecount = skb->len;
8395         first->gso_segs = 1;
8396
8397         /* if we have a HW VLAN tag being added default to the HW one */
8398         if (skb_vlan_tag_present(skb)) {
8399                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8400                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8401         /* else if it is a SW VLAN check the next protocol and store the tag */
8402         } else if (protocol == htons(ETH_P_8021Q)) {
8403                 struct vlan_hdr *vhdr, _vhdr;
8404                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8405                 if (!vhdr)
8406                         goto out_drop;
8407
8408                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8409                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8410                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8411         }
8412         protocol = vlan_get_protocol(skb);
8413
8414         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8415             adapter->ptp_clock) {
8416                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8417                                            &adapter->state)) {
8418                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8419                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8420
8421                         /* schedule check for Tx timestamp */
8422                         adapter->ptp_tx_skb = skb_get(skb);
8423                         adapter->ptp_tx_start = jiffies;
8424                         schedule_work(&adapter->ptp_tx_work);
8425                 } else {
8426                         adapter->tx_hwtstamp_skipped++;
8427                 }
8428         }
8429
8430         skb_tx_timestamp(skb);
8431
8432 #ifdef CONFIG_PCI_IOV
8433         /*
8434          * Use the l2switch_enable flag - would be false if the DMA
8435          * Tx switch had been disabled.
8436          */
8437         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8438                 tx_flags |= IXGBE_TX_FLAGS_CC;
8439
8440 #endif
8441         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8442         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8443             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8444              (skb->priority != TC_PRIO_CONTROL))) {
8445                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8446                 tx_flags |= (skb->priority & 0x7) <<
8447                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8448                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8449                         struct vlan_ethhdr *vhdr;
8450
8451                         if (skb_cow_head(skb, 0))
8452                                 goto out_drop;
8453                         vhdr = (struct vlan_ethhdr *)skb->data;
8454                         vhdr->h_vlan_TCI = htons(tx_flags >>
8455                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8456                 } else {
8457                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8458                 }
8459         }
8460
8461         /* record initial flags and protocol */
8462         first->tx_flags = tx_flags;
8463         first->protocol = protocol;
8464
8465 #ifdef IXGBE_FCOE
8466         /* setup tx offload for FCoE */
8467         if ((protocol == htons(ETH_P_FCOE)) &&
8468             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8469                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8470                 if (tso < 0)
8471                         goto out_drop;
8472
8473                 goto xmit_fcoe;
8474         }
8475
8476 #endif /* IXGBE_FCOE */
8477
8478 #ifdef CONFIG_XFRM_OFFLOAD
8479         if (skb->sp && !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8480                 goto out_drop;
8481 #endif
8482         tso = ixgbe_tso(tx_ring, first, &hdr_len);
8483         if (tso < 0)
8484                 goto out_drop;
8485         else if (!tso)
8486                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8487
8488         /* add the ATR filter if ATR is on */
8489         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8490                 ixgbe_atr(tx_ring, first);
8491
8492 #ifdef IXGBE_FCOE
8493 xmit_fcoe:
8494 #endif /* IXGBE_FCOE */
8495         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8496                 goto cleanup_tx_timestamp;
8497
8498         return NETDEV_TX_OK;
8499
8500 out_drop:
8501         dev_kfree_skb_any(first->skb);
8502         first->skb = NULL;
8503 cleanup_tx_timestamp:
8504         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8505                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8506                 adapter->ptp_tx_skb = NULL;
8507                 cancel_work_sync(&adapter->ptp_tx_work);
8508                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8509         }
8510
8511         return NETDEV_TX_OK;
8512 }
8513
8514 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8515                                       struct net_device *netdev,
8516                                       struct ixgbe_ring *ring)
8517 {
8518         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8519         struct ixgbe_ring *tx_ring;
8520
8521         /*
8522          * The minimum packet size for olinfo paylen is 17 so pad the skb
8523          * in order to meet this minimum size requirement.
8524          */
8525         if (skb_put_padto(skb, 17))
8526                 return NETDEV_TX_OK;
8527
8528         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8529
8530         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8531 }
8532
8533 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8534                                     struct net_device *netdev)
8535 {
8536         return __ixgbe_xmit_frame(skb, netdev, NULL);
8537 }
8538
8539 /**
8540  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8541  * @netdev: network interface device structure
8542  * @p: pointer to an address structure
8543  *
8544  * Returns 0 on success, negative on failure
8545  **/
8546 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8547 {
8548         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8549         struct ixgbe_hw *hw = &adapter->hw;
8550         struct sockaddr *addr = p;
8551
8552         if (!is_valid_ether_addr(addr->sa_data))
8553                 return -EADDRNOTAVAIL;
8554
8555         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8556         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8557
8558         ixgbe_mac_set_default_filter(adapter);
8559
8560         return 0;
8561 }
8562
8563 static int
8564 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8565 {
8566         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8567         struct ixgbe_hw *hw = &adapter->hw;
8568         u16 value;
8569         int rc;
8570
8571         if (prtad != hw->phy.mdio.prtad)
8572                 return -EINVAL;
8573         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8574         if (!rc)
8575                 rc = value;
8576         return rc;
8577 }
8578
8579 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8580                             u16 addr, u16 value)
8581 {
8582         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8583         struct ixgbe_hw *hw = &adapter->hw;
8584
8585         if (prtad != hw->phy.mdio.prtad)
8586                 return -EINVAL;
8587         return hw->phy.ops.write_reg(hw, addr, devad, value);
8588 }
8589
8590 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8591 {
8592         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8593
8594         switch (cmd) {
8595         case SIOCSHWTSTAMP:
8596                 return ixgbe_ptp_set_ts_config(adapter, req);
8597         case SIOCGHWTSTAMP:
8598                 return ixgbe_ptp_get_ts_config(adapter, req);
8599         case SIOCGMIIPHY:
8600                 if (!adapter->hw.phy.ops.read_reg)
8601                         return -EOPNOTSUPP;
8602                 /* fall through */
8603         default:
8604                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8605         }
8606 }
8607
8608 /**
8609  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8610  * netdev->dev_addrs
8611  * @dev: network interface device structure
8612  *
8613  * Returns non-zero on failure
8614  **/
8615 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8616 {
8617         int err = 0;
8618         struct ixgbe_adapter *adapter = netdev_priv(dev);
8619         struct ixgbe_hw *hw = &adapter->hw;
8620
8621         if (is_valid_ether_addr(hw->mac.san_addr)) {
8622                 rtnl_lock();
8623                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8624                 rtnl_unlock();
8625
8626                 /* update SAN MAC vmdq pool selection */
8627                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8628         }
8629         return err;
8630 }
8631
8632 /**
8633  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8634  * netdev->dev_addrs
8635  * @dev: network interface device structure
8636  *
8637  * Returns non-zero on failure
8638  **/
8639 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8640 {
8641         int err = 0;
8642         struct ixgbe_adapter *adapter = netdev_priv(dev);
8643         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8644
8645         if (is_valid_ether_addr(mac->san_addr)) {
8646                 rtnl_lock();
8647                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8648                 rtnl_unlock();
8649         }
8650         return err;
8651 }
8652
8653 #ifdef CONFIG_NET_POLL_CONTROLLER
8654 /*
8655  * Polling 'interrupt' - used by things like netconsole to send skbs
8656  * without having to re-enable interrupts. It's not called while
8657  * the interrupt routine is executing.
8658  */
8659 static void ixgbe_netpoll(struct net_device *netdev)
8660 {
8661         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8662         int i;
8663
8664         /* if interface is down do nothing */
8665         if (test_bit(__IXGBE_DOWN, &adapter->state))
8666                 return;
8667
8668         /* loop through and schedule all active queues */
8669         for (i = 0; i < adapter->num_q_vectors; i++)
8670                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8671 }
8672
8673 #endif
8674
8675 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8676                                    struct ixgbe_ring *ring)
8677 {
8678         u64 bytes, packets;
8679         unsigned int start;
8680
8681         if (ring) {
8682                 do {
8683                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8684                         packets = ring->stats.packets;
8685                         bytes   = ring->stats.bytes;
8686                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8687                 stats->tx_packets += packets;
8688                 stats->tx_bytes   += bytes;
8689         }
8690 }
8691
8692 static void ixgbe_get_stats64(struct net_device *netdev,
8693                               struct rtnl_link_stats64 *stats)
8694 {
8695         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8696         int i;
8697
8698         rcu_read_lock();
8699         for (i = 0; i < adapter->num_rx_queues; i++) {
8700                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8701                 u64 bytes, packets;
8702                 unsigned int start;
8703
8704                 if (ring) {
8705                         do {
8706                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8707                                 packets = ring->stats.packets;
8708                                 bytes   = ring->stats.bytes;
8709                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8710                         stats->rx_packets += packets;
8711                         stats->rx_bytes   += bytes;
8712                 }
8713         }
8714
8715         for (i = 0; i < adapter->num_tx_queues; i++) {
8716                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8717
8718                 ixgbe_get_ring_stats64(stats, ring);
8719         }
8720         for (i = 0; i < adapter->num_xdp_queues; i++) {
8721                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8722
8723                 ixgbe_get_ring_stats64(stats, ring);
8724         }
8725         rcu_read_unlock();
8726
8727         /* following stats updated by ixgbe_watchdog_task() */
8728         stats->multicast        = netdev->stats.multicast;
8729         stats->rx_errors        = netdev->stats.rx_errors;
8730         stats->rx_length_errors = netdev->stats.rx_length_errors;
8731         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8732         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8733 }
8734
8735 #ifdef CONFIG_IXGBE_DCB
8736 /**
8737  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8738  * @adapter: pointer to ixgbe_adapter
8739  * @tc: number of traffic classes currently enabled
8740  *
8741  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8742  * 802.1Q priority maps to a packet buffer that exists.
8743  */
8744 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8745 {
8746         struct ixgbe_hw *hw = &adapter->hw;
8747         u32 reg, rsave;
8748         int i;
8749
8750         /* 82598 have a static priority to TC mapping that can not
8751          * be changed so no validation is needed.
8752          */
8753         if (hw->mac.type == ixgbe_mac_82598EB)
8754                 return;
8755
8756         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8757         rsave = reg;
8758
8759         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8760                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8761
8762                 /* If up2tc is out of bounds default to zero */
8763                 if (up2tc > tc)
8764                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8765         }
8766
8767         if (reg != rsave)
8768                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8769
8770         return;
8771 }
8772
8773 /**
8774  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8775  * @adapter: Pointer to adapter struct
8776  *
8777  * Populate the netdev user priority to tc map
8778  */
8779 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8780 {
8781         struct net_device *dev = adapter->netdev;
8782         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8783         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8784         u8 prio;
8785
8786         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8787                 u8 tc = 0;
8788
8789                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8790                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8791                 else if (ets)
8792                         tc = ets->prio_tc[prio];
8793
8794                 netdev_set_prio_tc_map(dev, prio, tc);
8795         }
8796 }
8797
8798 #endif /* CONFIG_IXGBE_DCB */
8799 /**
8800  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8801  *
8802  * @dev: net device to configure
8803  * @tc: number of traffic classes to enable
8804  */
8805 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8806 {
8807         struct ixgbe_adapter *adapter = netdev_priv(dev);
8808         struct ixgbe_hw *hw = &adapter->hw;
8809
8810         /* Hardware supports up to 8 traffic classes */
8811         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8812                 return -EINVAL;
8813
8814         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8815                 return -EINVAL;
8816
8817         /* Hardware has to reinitialize queues and interrupts to
8818          * match packet buffer alignment. Unfortunately, the
8819          * hardware is not flexible enough to do this dynamically.
8820          */
8821         if (netif_running(dev))
8822                 ixgbe_close(dev);
8823         else
8824                 ixgbe_reset(adapter);
8825
8826         ixgbe_clear_interrupt_scheme(adapter);
8827
8828 #ifdef CONFIG_IXGBE_DCB
8829         if (tc) {
8830                 netdev_set_num_tc(dev, tc);
8831                 ixgbe_set_prio_tc_map(adapter);
8832
8833                 adapter->hw_tcs = tc;
8834                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8835
8836                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8837                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8838                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8839                 }
8840         } else {
8841                 netdev_reset_tc(dev);
8842
8843                 /* To support macvlan offload we have to use num_tc to
8844                  * restrict the queues that can be used by the device.
8845                  * By doing this we can avoid reporting a false number of
8846                  * queues.
8847                  */
8848                 if (!tc && adapter->num_rx_pools > 1)
8849                         netdev_set_num_tc(dev, 1);
8850
8851                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8852                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
8853
8854                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
8855                 adapter->hw_tcs = tc;
8856
8857                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
8858                 adapter->dcb_cfg.pfc_mode_enable = false;
8859         }
8860
8861         ixgbe_validate_rtr(adapter, tc);
8862
8863 #endif /* CONFIG_IXGBE_DCB */
8864         ixgbe_init_interrupt_scheme(adapter);
8865
8866         if (netif_running(dev))
8867                 return ixgbe_open(dev);
8868
8869         return 0;
8870 }
8871
8872 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
8873                                struct tc_cls_u32_offload *cls)
8874 {
8875         u32 hdl = cls->knode.handle;
8876         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
8877         u32 loc = cls->knode.handle & 0xfffff;
8878         int err = 0, i, j;
8879         struct ixgbe_jump_table *jump = NULL;
8880
8881         if (loc > IXGBE_MAX_HW_ENTRIES)
8882                 return -EINVAL;
8883
8884         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
8885                 return -EINVAL;
8886
8887         /* Clear this filter in the link data it is associated with */
8888         if (uhtid != 0x800) {
8889                 jump = adapter->jump_tables[uhtid];
8890                 if (!jump)
8891                         return -EINVAL;
8892                 if (!test_bit(loc - 1, jump->child_loc_map))
8893                         return -EINVAL;
8894                 clear_bit(loc - 1, jump->child_loc_map);
8895         }
8896
8897         /* Check if the filter being deleted is a link */
8898         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
8899                 jump = adapter->jump_tables[i];
8900                 if (jump && jump->link_hdl == hdl) {
8901                         /* Delete filters in the hardware in the child hash
8902                          * table associated with this link
8903                          */
8904                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
8905                                 if (!test_bit(j, jump->child_loc_map))
8906                                         continue;
8907                                 spin_lock(&adapter->fdir_perfect_lock);
8908                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
8909                                                                       NULL,
8910                                                                       j + 1);
8911                                 spin_unlock(&adapter->fdir_perfect_lock);
8912                                 clear_bit(j, jump->child_loc_map);
8913                         }
8914                         /* Remove resources for this link */
8915                         kfree(jump->input);
8916                         kfree(jump->mask);
8917                         kfree(jump);
8918                         adapter->jump_tables[i] = NULL;
8919                         return err;
8920                 }
8921         }
8922
8923         spin_lock(&adapter->fdir_perfect_lock);
8924         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
8925         spin_unlock(&adapter->fdir_perfect_lock);
8926         return err;
8927 }
8928
8929 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
8930                                             struct tc_cls_u32_offload *cls)
8931 {
8932         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8933
8934         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8935                 return -EINVAL;
8936
8937         /* This ixgbe devices do not support hash tables at the moment
8938          * so abort when given hash tables.
8939          */
8940         if (cls->hnode.divisor > 0)
8941                 return -EINVAL;
8942
8943         set_bit(uhtid - 1, &adapter->tables);
8944         return 0;
8945 }
8946
8947 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
8948                                             struct tc_cls_u32_offload *cls)
8949 {
8950         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
8951
8952         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
8953                 return -EINVAL;
8954
8955         clear_bit(uhtid - 1, &adapter->tables);
8956         return 0;
8957 }
8958
8959 #ifdef CONFIG_NET_CLS_ACT
8960 struct upper_walk_data {
8961         struct ixgbe_adapter *adapter;
8962         u64 action;
8963         int ifindex;
8964         u8 queue;
8965 };
8966
8967 static int get_macvlan_queue(struct net_device *upper, void *_data)
8968 {
8969         if (netif_is_macvlan(upper)) {
8970                 struct macvlan_dev *dfwd = netdev_priv(upper);
8971                 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
8972                 struct upper_walk_data *data = _data;
8973                 struct ixgbe_adapter *adapter = data->adapter;
8974                 int ifindex = data->ifindex;
8975
8976                 if (vadapter && vadapter->netdev->ifindex == ifindex) {
8977                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
8978                         data->action = data->queue;
8979                         return 1;
8980                 }
8981         }
8982
8983         return 0;
8984 }
8985
8986 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
8987                                   u8 *queue, u64 *action)
8988 {
8989         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
8990         unsigned int num_vfs = adapter->num_vfs, vf;
8991         struct upper_walk_data data;
8992         struct net_device *upper;
8993
8994         /* redirect to a SRIOV VF */
8995         for (vf = 0; vf < num_vfs; ++vf) {
8996                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
8997                 if (upper->ifindex == ifindex) {
8998                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
8999                         *action = vf + 1;
9000                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9001                         return 0;
9002                 }
9003         }
9004
9005         /* redirect to a offloaded macvlan netdev */
9006         data.adapter = adapter;
9007         data.ifindex = ifindex;
9008         data.action = 0;
9009         data.queue = 0;
9010         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9011                                           get_macvlan_queue, &data)) {
9012                 *action = data.action;
9013                 *queue = data.queue;
9014
9015                 return 0;
9016         }
9017
9018         return -EINVAL;
9019 }
9020
9021 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9022                             struct tcf_exts *exts, u64 *action, u8 *queue)
9023 {
9024         const struct tc_action *a;
9025         LIST_HEAD(actions);
9026         int err;
9027
9028         if (!tcf_exts_has_actions(exts))
9029                 return -EINVAL;
9030
9031         tcf_exts_to_list(exts, &actions);
9032         list_for_each_entry(a, &actions, list) {
9033
9034                 /* Drop action */
9035                 if (is_tcf_gact_shot(a)) {
9036                         *action = IXGBE_FDIR_DROP_QUEUE;
9037                         *queue = IXGBE_FDIR_DROP_QUEUE;
9038                         return 0;
9039                 }
9040
9041                 /* Redirect to a VF or a offloaded macvlan */
9042                 if (is_tcf_mirred_egress_redirect(a)) {
9043                         struct net_device *dev = tcf_mirred_dev(a);
9044
9045                         if (!dev)
9046                                 return -EINVAL;
9047                         err = handle_redirect_action(adapter, dev->ifindex, queue,
9048                                                      action);
9049                         if (err == 0)
9050                                 return err;
9051                 }
9052         }
9053
9054         return -EINVAL;
9055 }
9056 #else
9057 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9058                             struct tcf_exts *exts, u64 *action, u8 *queue)
9059 {
9060         return -EINVAL;
9061 }
9062 #endif /* CONFIG_NET_CLS_ACT */
9063
9064 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9065                                     union ixgbe_atr_input *mask,
9066                                     struct tc_cls_u32_offload *cls,
9067                                     struct ixgbe_mat_field *field_ptr,
9068                                     struct ixgbe_nexthdr *nexthdr)
9069 {
9070         int i, j, off;
9071         __be32 val, m;
9072         bool found_entry = false, found_jump_field = false;
9073
9074         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9075                 off = cls->knode.sel->keys[i].off;
9076                 val = cls->knode.sel->keys[i].val;
9077                 m = cls->knode.sel->keys[i].mask;
9078
9079                 for (j = 0; field_ptr[j].val; j++) {
9080                         if (field_ptr[j].off == off) {
9081                                 field_ptr[j].val(input, mask, val, m);
9082                                 input->filter.formatted.flow_type |=
9083                                         field_ptr[j].type;
9084                                 found_entry = true;
9085                                 break;
9086                         }
9087                 }
9088                 if (nexthdr) {
9089                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9090                             nexthdr->val == cls->knode.sel->keys[i].val &&
9091                             nexthdr->mask == cls->knode.sel->keys[i].mask)
9092                                 found_jump_field = true;
9093                         else
9094                                 continue;
9095                 }
9096         }
9097
9098         if (nexthdr && !found_jump_field)
9099                 return -EINVAL;
9100
9101         if (!found_entry)
9102                 return 0;
9103
9104         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9105                                     IXGBE_ATR_L4TYPE_MASK;
9106
9107         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9108                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9109
9110         return 0;
9111 }
9112
9113 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9114                                   struct tc_cls_u32_offload *cls)
9115 {
9116         __be16 protocol = cls->common.protocol;
9117         u32 loc = cls->knode.handle & 0xfffff;
9118         struct ixgbe_hw *hw = &adapter->hw;
9119         struct ixgbe_mat_field *field_ptr;
9120         struct ixgbe_fdir_filter *input = NULL;
9121         union ixgbe_atr_input *mask = NULL;
9122         struct ixgbe_jump_table *jump = NULL;
9123         int i, err = -EINVAL;
9124         u8 queue;
9125         u32 uhtid, link_uhtid;
9126
9127         uhtid = TC_U32_USERHTID(cls->knode.handle);
9128         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9129
9130         /* At the moment cls_u32 jumps to network layer and skips past
9131          * L2 headers. The canonical method to match L2 frames is to use
9132          * negative values. However this is error prone at best but really
9133          * just broken because there is no way to "know" what sort of hdr
9134          * is in front of the network layer. Fix cls_u32 to support L2
9135          * headers when needed.
9136          */
9137         if (protocol != htons(ETH_P_IP))
9138                 return err;
9139
9140         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9141                 e_err(drv, "Location out of range\n");
9142                 return err;
9143         }
9144
9145         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9146          * links and also the fields used to advance the parser across each
9147          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9148          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9149          * To add support for new nodes update ixgbe_model.h parse structures
9150          * this function _should_ be generic try not to hardcode values here.
9151          */
9152         if (uhtid == 0x800) {
9153                 field_ptr = (adapter->jump_tables[0])->mat;
9154         } else {
9155                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9156                         return err;
9157                 if (!adapter->jump_tables[uhtid])
9158                         return err;
9159                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9160         }
9161
9162         if (!field_ptr)
9163                 return err;
9164
9165         /* At this point we know the field_ptr is valid and need to either
9166          * build cls_u32 link or attach filter. Because adding a link to
9167          * a handle that does not exist is invalid and the same for adding
9168          * rules to handles that don't exist.
9169          */
9170
9171         if (link_uhtid) {
9172                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9173
9174                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9175                         return err;
9176
9177                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9178                         return err;
9179
9180                 /* Multiple filters as links to the same hash table are not
9181                  * supported. To add a new filter with the same next header
9182                  * but different match/jump conditions, create a new hash table
9183                  * and link to it.
9184                  */
9185                 if (adapter->jump_tables[link_uhtid] &&
9186                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9187                         e_err(drv, "Link filter exists for link: %x\n",
9188                               link_uhtid);
9189                         return err;
9190                 }
9191
9192                 for (i = 0; nexthdr[i].jump; i++) {
9193                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9194                             nexthdr[i].s != cls->knode.sel->offshift ||
9195                             nexthdr[i].m != cls->knode.sel->offmask)
9196                                 return err;
9197
9198                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9199                         if (!jump)
9200                                 return -ENOMEM;
9201                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9202                         if (!input) {
9203                                 err = -ENOMEM;
9204                                 goto free_jump;
9205                         }
9206                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9207                         if (!mask) {
9208                                 err = -ENOMEM;
9209                                 goto free_input;
9210                         }
9211                         jump->input = input;
9212                         jump->mask = mask;
9213                         jump->link_hdl = cls->knode.handle;
9214
9215                         err = ixgbe_clsu32_build_input(input, mask, cls,
9216                                                        field_ptr, &nexthdr[i]);
9217                         if (!err) {
9218                                 jump->mat = nexthdr[i].jump;
9219                                 adapter->jump_tables[link_uhtid] = jump;
9220                                 break;
9221                         }
9222                 }
9223                 return 0;
9224         }
9225
9226         input = kzalloc(sizeof(*input), GFP_KERNEL);
9227         if (!input)
9228                 return -ENOMEM;
9229         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9230         if (!mask) {
9231                 err = -ENOMEM;
9232                 goto free_input;
9233         }
9234
9235         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9236                 if ((adapter->jump_tables[uhtid])->input)
9237                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9238                                sizeof(*input));
9239                 if ((adapter->jump_tables[uhtid])->mask)
9240                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9241                                sizeof(*mask));
9242
9243                 /* Lookup in all child hash tables if this location is already
9244                  * filled with a filter
9245                  */
9246                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9247                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9248
9249                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9250                                 e_err(drv, "Filter exists in location: %x\n",
9251                                       loc);
9252                                 err = -EINVAL;
9253                                 goto err_out;
9254                         }
9255                 }
9256         }
9257         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9258         if (err)
9259                 goto err_out;
9260
9261         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9262                                &queue);
9263         if (err < 0)
9264                 goto err_out;
9265
9266         input->sw_idx = loc;
9267
9268         spin_lock(&adapter->fdir_perfect_lock);
9269
9270         if (hlist_empty(&adapter->fdir_filter_list)) {
9271                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9272                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9273                 if (err)
9274                         goto err_out_w_lock;
9275         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9276                 err = -EINVAL;
9277                 goto err_out_w_lock;
9278         }
9279
9280         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9281         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9282                                                     input->sw_idx, queue);
9283         if (!err)
9284                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9285         spin_unlock(&adapter->fdir_perfect_lock);
9286
9287         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9288                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9289
9290         kfree(mask);
9291         return err;
9292 err_out_w_lock:
9293         spin_unlock(&adapter->fdir_perfect_lock);
9294 err_out:
9295         kfree(mask);
9296 free_input:
9297         kfree(input);
9298 free_jump:
9299         kfree(jump);
9300         return err;
9301 }
9302
9303 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9304                                   struct tc_cls_u32_offload *cls_u32)
9305 {
9306         switch (cls_u32->command) {
9307         case TC_CLSU32_NEW_KNODE:
9308         case TC_CLSU32_REPLACE_KNODE:
9309                 return ixgbe_configure_clsu32(adapter, cls_u32);
9310         case TC_CLSU32_DELETE_KNODE:
9311                 return ixgbe_delete_clsu32(adapter, cls_u32);
9312         case TC_CLSU32_NEW_HNODE:
9313         case TC_CLSU32_REPLACE_HNODE:
9314                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9315         case TC_CLSU32_DELETE_HNODE:
9316                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9317         default:
9318                 return -EOPNOTSUPP;
9319         }
9320 }
9321
9322 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9323                                    void *cb_priv)
9324 {
9325         struct ixgbe_adapter *adapter = cb_priv;
9326
9327         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9328                 return -EOPNOTSUPP;
9329
9330         switch (type) {
9331         case TC_SETUP_CLSU32:
9332                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9333         default:
9334                 return -EOPNOTSUPP;
9335         }
9336 }
9337
9338 static int ixgbe_setup_tc_block(struct net_device *dev,
9339                                 struct tc_block_offload *f)
9340 {
9341         struct ixgbe_adapter *adapter = netdev_priv(dev);
9342
9343         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9344                 return -EOPNOTSUPP;
9345
9346         switch (f->command) {
9347         case TC_BLOCK_BIND:
9348                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9349                                              adapter, adapter);
9350         case TC_BLOCK_UNBIND:
9351                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9352                                         adapter);
9353                 return 0;
9354         default:
9355                 return -EOPNOTSUPP;
9356         }
9357 }
9358
9359 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9360                                  struct tc_mqprio_qopt *mqprio)
9361 {
9362         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9363         return ixgbe_setup_tc(dev, mqprio->num_tc);
9364 }
9365
9366 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9367                             void *type_data)
9368 {
9369         switch (type) {
9370         case TC_SETUP_BLOCK:
9371                 return ixgbe_setup_tc_block(dev, type_data);
9372         case TC_SETUP_QDISC_MQPRIO:
9373                 return ixgbe_setup_tc_mqprio(dev, type_data);
9374         default:
9375                 return -EOPNOTSUPP;
9376         }
9377 }
9378
9379 #ifdef CONFIG_PCI_IOV
9380 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9381 {
9382         struct net_device *netdev = adapter->netdev;
9383
9384         rtnl_lock();
9385         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9386         rtnl_unlock();
9387 }
9388
9389 #endif
9390 void ixgbe_do_reset(struct net_device *netdev)
9391 {
9392         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9393
9394         if (netif_running(netdev))
9395                 ixgbe_reinit_locked(adapter);
9396         else
9397                 ixgbe_reset(adapter);
9398 }
9399
9400 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9401                                             netdev_features_t features)
9402 {
9403         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9404
9405         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9406         if (!(features & NETIF_F_RXCSUM))
9407                 features &= ~NETIF_F_LRO;
9408
9409         /* Turn off LRO if not RSC capable */
9410         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9411                 features &= ~NETIF_F_LRO;
9412
9413         return features;
9414 }
9415
9416 static int ixgbe_set_features(struct net_device *netdev,
9417                               netdev_features_t features)
9418 {
9419         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9420         netdev_features_t changed = netdev->features ^ features;
9421         bool need_reset = false;
9422
9423         /* Make sure RSC matches LRO, reset if change */
9424         if (!(features & NETIF_F_LRO)) {
9425                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9426                         need_reset = true;
9427                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9428         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9429                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9430                 if (adapter->rx_itr_setting == 1 ||
9431                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9432                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9433                         need_reset = true;
9434                 } else if ((changed ^ features) & NETIF_F_LRO) {
9435                         e_info(probe, "rx-usecs set too low, "
9436                                "disabling RSC\n");
9437                 }
9438         }
9439
9440         /*
9441          * Check if Flow Director n-tuple support or hw_tc support was
9442          * enabled or disabled.  If the state changed, we need to reset.
9443          */
9444         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9445                 /* turn off ATR, enable perfect filters and reset */
9446                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9447                         need_reset = true;
9448
9449                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9450                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9451         } else {
9452                 /* turn off perfect filters, enable ATR and reset */
9453                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9454                         need_reset = true;
9455
9456                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9457
9458                 /* We cannot enable ATR if SR-IOV is enabled */
9459                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9460                     /* We cannot enable ATR if we have 2 or more tcs */
9461                     (adapter->hw_tcs > 1) ||
9462                     /* We cannot enable ATR if RSS is disabled */
9463                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9464                     /* A sample rate of 0 indicates ATR disabled */
9465                     (!adapter->atr_sample_rate))
9466                         ; /* do nothing not supported */
9467                 else /* otherwise supported and set the flag */
9468                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9469         }
9470
9471         if (changed & NETIF_F_RXALL)
9472                 need_reset = true;
9473
9474         netdev->features = features;
9475
9476         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9477                 if (features & NETIF_F_RXCSUM) {
9478                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9479                 } else {
9480                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9481
9482                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9483                 }
9484         }
9485
9486         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9487                 if (features & NETIF_F_RXCSUM) {
9488                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9489                 } else {
9490                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9491
9492                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9493                 }
9494         }
9495
9496         if (need_reset)
9497                 ixgbe_do_reset(netdev);
9498         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9499                             NETIF_F_HW_VLAN_CTAG_FILTER))
9500                 ixgbe_set_rx_mode(netdev);
9501
9502         return 0;
9503 }
9504
9505 /**
9506  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9507  * @dev: The port's netdev
9508  * @ti: Tunnel endpoint information
9509  **/
9510 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9511                                       struct udp_tunnel_info *ti)
9512 {
9513         struct ixgbe_adapter *adapter = netdev_priv(dev);
9514         struct ixgbe_hw *hw = &adapter->hw;
9515         __be16 port = ti->port;
9516         u32 port_shift = 0;
9517         u32 reg;
9518
9519         if (ti->sa_family != AF_INET)
9520                 return;
9521
9522         switch (ti->type) {
9523         case UDP_TUNNEL_TYPE_VXLAN:
9524                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9525                         return;
9526
9527                 if (adapter->vxlan_port == port)
9528                         return;
9529
9530                 if (adapter->vxlan_port) {
9531                         netdev_info(dev,
9532                                     "VXLAN port %d set, not adding port %d\n",
9533                                     ntohs(adapter->vxlan_port),
9534                                     ntohs(port));
9535                         return;
9536                 }
9537
9538                 adapter->vxlan_port = port;
9539                 break;
9540         case UDP_TUNNEL_TYPE_GENEVE:
9541                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9542                         return;
9543
9544                 if (adapter->geneve_port == port)
9545                         return;
9546
9547                 if (adapter->geneve_port) {
9548                         netdev_info(dev,
9549                                     "GENEVE port %d set, not adding port %d\n",
9550                                     ntohs(adapter->geneve_port),
9551                                     ntohs(port));
9552                         return;
9553                 }
9554
9555                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9556                 adapter->geneve_port = port;
9557                 break;
9558         default:
9559                 return;
9560         }
9561
9562         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9563         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9564 }
9565
9566 /**
9567  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9568  * @dev: The port's netdev
9569  * @ti: Tunnel endpoint information
9570  **/
9571 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9572                                       struct udp_tunnel_info *ti)
9573 {
9574         struct ixgbe_adapter *adapter = netdev_priv(dev);
9575         u32 port_mask;
9576
9577         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9578             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9579                 return;
9580
9581         if (ti->sa_family != AF_INET)
9582                 return;
9583
9584         switch (ti->type) {
9585         case UDP_TUNNEL_TYPE_VXLAN:
9586                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9587                         return;
9588
9589                 if (adapter->vxlan_port != ti->port) {
9590                         netdev_info(dev, "VXLAN port %d not found\n",
9591                                     ntohs(ti->port));
9592                         return;
9593                 }
9594
9595                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9596                 break;
9597         case UDP_TUNNEL_TYPE_GENEVE:
9598                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9599                         return;
9600
9601                 if (adapter->geneve_port != ti->port) {
9602                         netdev_info(dev, "GENEVE port %d not found\n",
9603                                     ntohs(ti->port));
9604                         return;
9605                 }
9606
9607                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9608                 break;
9609         default:
9610                 return;
9611         }
9612
9613         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9614         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9615 }
9616
9617 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9618                              struct net_device *dev,
9619                              const unsigned char *addr, u16 vid,
9620                              u16 flags)
9621 {
9622         /* guarantee we can provide a unique filter for the unicast address */
9623         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9624                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9625                 u16 pool = VMDQ_P(0);
9626
9627                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9628                         return -ENOMEM;
9629         }
9630
9631         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9632 }
9633
9634 /**
9635  * ixgbe_configure_bridge_mode - set various bridge modes
9636  * @adapter: the private structure
9637  * @mode: requested bridge mode
9638  *
9639  * Configure some settings require for various bridge modes.
9640  **/
9641 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9642                                        __u16 mode)
9643 {
9644         struct ixgbe_hw *hw = &adapter->hw;
9645         unsigned int p, num_pools;
9646         u32 vmdctl;
9647
9648         switch (mode) {
9649         case BRIDGE_MODE_VEPA:
9650                 /* disable Tx loopback, rely on switch hairpin mode */
9651                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9652
9653                 /* must enable Rx switching replication to allow multicast
9654                  * packet reception on all VFs, and to enable source address
9655                  * pruning.
9656                  */
9657                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9658                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9659                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9660
9661                 /* enable Rx source address pruning. Note, this requires
9662                  * replication to be enabled or else it does nothing.
9663                  */
9664                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9665                 for (p = 0; p < num_pools; p++) {
9666                         if (hw->mac.ops.set_source_address_pruning)
9667                                 hw->mac.ops.set_source_address_pruning(hw,
9668                                                                        true,
9669                                                                        p);
9670                 }
9671                 break;
9672         case BRIDGE_MODE_VEB:
9673                 /* enable Tx loopback for internal VF/PF communication */
9674                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9675                                 IXGBE_PFDTXGSWC_VT_LBEN);
9676
9677                 /* disable Rx switching replication unless we have SR-IOV
9678                  * virtual functions
9679                  */
9680                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9681                 if (!adapter->num_vfs)
9682                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9683                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9684
9685                 /* disable Rx source address pruning, since we don't expect to
9686                  * be receiving external loopback of our transmitted frames.
9687                  */
9688                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9689                 for (p = 0; p < num_pools; p++) {
9690                         if (hw->mac.ops.set_source_address_pruning)
9691                                 hw->mac.ops.set_source_address_pruning(hw,
9692                                                                        false,
9693                                                                        p);
9694                 }
9695                 break;
9696         default:
9697                 return -EINVAL;
9698         }
9699
9700         adapter->bridge_mode = mode;
9701
9702         e_info(drv, "enabling bridge mode: %s\n",
9703                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9704
9705         return 0;
9706 }
9707
9708 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9709                                     struct nlmsghdr *nlh, u16 flags)
9710 {
9711         struct ixgbe_adapter *adapter = netdev_priv(dev);
9712         struct nlattr *attr, *br_spec;
9713         int rem;
9714
9715         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9716                 return -EOPNOTSUPP;
9717
9718         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9719         if (!br_spec)
9720                 return -EINVAL;
9721
9722         nla_for_each_nested(attr, br_spec, rem) {
9723                 int status;
9724                 __u16 mode;
9725
9726                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9727                         continue;
9728
9729                 if (nla_len(attr) < sizeof(mode))
9730                         return -EINVAL;
9731
9732                 mode = nla_get_u16(attr);
9733                 status = ixgbe_configure_bridge_mode(adapter, mode);
9734                 if (status)
9735                         return status;
9736
9737                 break;
9738         }
9739
9740         return 0;
9741 }
9742
9743 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9744                                     struct net_device *dev,
9745                                     u32 filter_mask, int nlflags)
9746 {
9747         struct ixgbe_adapter *adapter = netdev_priv(dev);
9748
9749         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9750                 return 0;
9751
9752         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9753                                        adapter->bridge_mode, 0, 0, nlflags,
9754                                        filter_mask, NULL);
9755 }
9756
9757 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9758 {
9759         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
9760         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9761         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
9762         int tcs = adapter->hw_tcs ? : 1;
9763         unsigned int limit;
9764         int pool, err;
9765
9766         /* Hardware has a limited number of available pools. Each VF, and the
9767          * PF require a pool. Check to ensure we don't attempt to use more
9768          * then the available number of pools.
9769          */
9770         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9771                 return ERR_PTR(-EINVAL);
9772
9773         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9774               adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9775             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
9776                 return ERR_PTR(-EBUSY);
9777
9778         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
9779         if (!fwd_adapter)
9780                 return ERR_PTR(-ENOMEM);
9781
9782         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9783         set_bit(pool, adapter->fwd_bitmask);
9784         limit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools + 1);
9785
9786         /* Enable VMDq flag so device will be set in VM mode */
9787         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
9788         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9789
9790         fwd_adapter->pool = pool;
9791         fwd_adapter->real_adapter = adapter;
9792
9793         /* Force reinit of ring allocation with VMDQ enabled */
9794         err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
9795
9796         if (!err && netif_running(pdev))
9797                 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
9798
9799         if (!err)
9800                 return fwd_adapter;
9801
9802         /* unwind counter and free adapter struct */
9803         netdev_info(pdev,
9804                     "%s: dfwd hardware acceleration failed\n", vdev->name);
9805         clear_bit(pool, adapter->fwd_bitmask);
9806         kfree(fwd_adapter);
9807         return ERR_PTR(err);
9808 }
9809
9810 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
9811 {
9812         struct ixgbe_fwd_adapter *accel = priv;
9813         struct ixgbe_adapter *adapter = accel->real_adapter;
9814         unsigned int rxbase = accel->rx_base_queue;
9815         unsigned int limit, i;
9816
9817         /* delete unicast filter associated with offloaded interface */
9818         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
9819                              VMDQ_P(accel->pool));
9820
9821         /* disable ability to receive packets for this pool */
9822         IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(accel->pool), 0);
9823
9824         /* Allow remaining Rx packets to get flushed out of the
9825          * Rx FIFO before we drop the netdev for the ring.
9826          */
9827         usleep_range(10000, 20000);
9828
9829         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
9830                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
9831                 struct ixgbe_q_vector *qv = ring->q_vector;
9832
9833                 /* Make sure we aren't processing any packets and clear
9834                  * netdev to shut down the ring.
9835                  */
9836                 if (netif_running(adapter->netdev))
9837                         napi_synchronize(&qv->napi);
9838                 ring->netdev = NULL;
9839         }
9840
9841         clear_bit(accel->pool, adapter->fwd_bitmask);
9842         limit = find_last_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9843         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
9844
9845         /* go back to full RSS if we're done with our VMQs */
9846         if (adapter->ring_feature[RING_F_VMDQ].limit == 1) {
9847                 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9848                                 num_online_cpus());
9849
9850                 adapter->flags &= ~IXGBE_FLAG_VMDQ_ENABLED;
9851                 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
9852                 adapter->ring_feature[RING_F_RSS].limit = rss;
9853         }
9854
9855         ixgbe_setup_tc(pdev, adapter->hw_tcs);
9856         netdev_dbg(pdev, "pool %i:%i queues %i:%i\n",
9857                    accel->pool, adapter->num_rx_pools,
9858                    accel->rx_base_queue,
9859                    accel->rx_base_queue +
9860                    adapter->num_rx_queues_per_pool);
9861         kfree(accel);
9862 }
9863
9864 #define IXGBE_MAX_MAC_HDR_LEN           127
9865 #define IXGBE_MAX_NETWORK_HDR_LEN       511
9866
9867 static netdev_features_t
9868 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
9869                      netdev_features_t features)
9870 {
9871         unsigned int network_hdr_len, mac_hdr_len;
9872
9873         /* Make certain the headers can be described by a context descriptor */
9874         mac_hdr_len = skb_network_header(skb) - skb->data;
9875         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
9876                 return features & ~(NETIF_F_HW_CSUM |
9877                                     NETIF_F_SCTP_CRC |
9878                                     NETIF_F_HW_VLAN_CTAG_TX |
9879                                     NETIF_F_TSO |
9880                                     NETIF_F_TSO6);
9881
9882         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
9883         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
9884                 return features & ~(NETIF_F_HW_CSUM |
9885                                     NETIF_F_SCTP_CRC |
9886                                     NETIF_F_TSO |
9887                                     NETIF_F_TSO6);
9888
9889         /* We can only support IPV4 TSO in tunnels if we can mangle the
9890          * inner IP ID field, so strip TSO if MANGLEID is not supported.
9891          */
9892         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
9893                 features &= ~NETIF_F_TSO;
9894
9895 #ifdef CONFIG_XFRM_OFFLOAD
9896         /* IPsec offload doesn't get along well with others *yet* */
9897         if (skb->sp)
9898                 features &= ~(NETIF_F_TSO | NETIF_F_HW_CSUM);
9899 #endif
9900
9901         return features;
9902 }
9903
9904 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
9905 {
9906         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
9907         struct ixgbe_adapter *adapter = netdev_priv(dev);
9908         struct bpf_prog *old_prog;
9909
9910         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
9911                 return -EINVAL;
9912
9913         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
9914                 return -EINVAL;
9915
9916         /* verify ixgbe ring attributes are sufficient for XDP */
9917         for (i = 0; i < adapter->num_rx_queues; i++) {
9918                 struct ixgbe_ring *ring = adapter->rx_ring[i];
9919
9920                 if (ring_is_rsc_enabled(ring))
9921                         return -EINVAL;
9922
9923                 if (frame_size > ixgbe_rx_bufsz(ring))
9924                         return -EINVAL;
9925         }
9926
9927         if (nr_cpu_ids > MAX_XDP_QUEUES)
9928                 return -ENOMEM;
9929
9930         old_prog = xchg(&adapter->xdp_prog, prog);
9931
9932         /* If transitioning XDP modes reconfigure rings */
9933         if (!!prog != !!old_prog) {
9934                 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
9935
9936                 if (err) {
9937                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
9938                         return -EINVAL;
9939                 }
9940         } else {
9941                 for (i = 0; i < adapter->num_rx_queues; i++)
9942                         xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
9943         }
9944
9945         if (old_prog)
9946                 bpf_prog_put(old_prog);
9947
9948         return 0;
9949 }
9950
9951 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
9952 {
9953         struct ixgbe_adapter *adapter = netdev_priv(dev);
9954
9955         switch (xdp->command) {
9956         case XDP_SETUP_PROG:
9957                 return ixgbe_xdp_setup(dev, xdp->prog);
9958         case XDP_QUERY_PROG:
9959                 xdp->prog_attached = !!(adapter->xdp_prog);
9960                 xdp->prog_id = adapter->xdp_prog ?
9961                         adapter->xdp_prog->aux->id : 0;
9962                 return 0;
9963         default:
9964                 return -EINVAL;
9965         }
9966 }
9967
9968 static int ixgbe_xdp_xmit(struct net_device *dev, struct xdp_buff *xdp)
9969 {
9970         struct ixgbe_adapter *adapter = netdev_priv(dev);
9971         struct ixgbe_ring *ring;
9972         int err;
9973
9974         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
9975                 return -ENETDOWN;
9976
9977         /* During program transitions its possible adapter->xdp_prog is assigned
9978          * but ring has not been configured yet. In this case simply abort xmit.
9979          */
9980         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
9981         if (unlikely(!ring))
9982                 return -ENXIO;
9983
9984         err = ixgbe_xmit_xdp_ring(adapter, xdp);
9985         if (err != IXGBE_XDP_TX)
9986                 return -ENOSPC;
9987
9988         return 0;
9989 }
9990
9991 static void ixgbe_xdp_flush(struct net_device *dev)
9992 {
9993         struct ixgbe_adapter *adapter = netdev_priv(dev);
9994         struct ixgbe_ring *ring;
9995
9996         /* Its possible the device went down between xdp xmit and flush so
9997          * we need to ensure device is still up.
9998          */
9999         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10000                 return;
10001
10002         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10003         if (unlikely(!ring))
10004                 return;
10005
10006         /* Force memory writes to complete before letting h/w know there
10007          * are new descriptors to fetch.
10008          */
10009         wmb();
10010         writel(ring->next_to_use, ring->tail);
10011
10012         return;
10013 }
10014
10015 static const struct net_device_ops ixgbe_netdev_ops = {
10016         .ndo_open               = ixgbe_open,
10017         .ndo_stop               = ixgbe_close,
10018         .ndo_start_xmit         = ixgbe_xmit_frame,
10019         .ndo_select_queue       = ixgbe_select_queue,
10020         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10021         .ndo_validate_addr      = eth_validate_addr,
10022         .ndo_set_mac_address    = ixgbe_set_mac,
10023         .ndo_change_mtu         = ixgbe_change_mtu,
10024         .ndo_tx_timeout         = ixgbe_tx_timeout,
10025         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10026         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10027         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10028         .ndo_do_ioctl           = ixgbe_ioctl,
10029         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10030         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10031         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10032         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10033         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10034         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10035         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10036         .ndo_get_stats64        = ixgbe_get_stats64,
10037         .ndo_setup_tc           = __ixgbe_setup_tc,
10038 #ifdef CONFIG_NET_POLL_CONTROLLER
10039         .ndo_poll_controller    = ixgbe_netpoll,
10040 #endif
10041 #ifdef IXGBE_FCOE
10042         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10043         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10044         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10045         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10046         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10047         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10048         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10049 #endif /* IXGBE_FCOE */
10050         .ndo_set_features = ixgbe_set_features,
10051         .ndo_fix_features = ixgbe_fix_features,
10052         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10053         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10054         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10055         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10056         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10057         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10058         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10059         .ndo_features_check     = ixgbe_features_check,
10060         .ndo_bpf                = ixgbe_xdp,
10061         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10062         .ndo_xdp_flush          = ixgbe_xdp_flush,
10063 };
10064
10065 /**
10066  * ixgbe_enumerate_functions - Get the number of ports this device has
10067  * @adapter: adapter structure
10068  *
10069  * This function enumerates the phsyical functions co-located on a single slot,
10070  * in order to determine how many ports a device has. This is most useful in
10071  * determining the required GT/s of PCIe bandwidth necessary for optimal
10072  * performance.
10073  **/
10074 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10075 {
10076         struct pci_dev *entry, *pdev = adapter->pdev;
10077         int physfns = 0;
10078
10079         /* Some cards can not use the generic count PCIe functions method,
10080          * because they are behind a parent switch, so we hardcode these with
10081          * the correct number of functions.
10082          */
10083         if (ixgbe_pcie_from_parent(&adapter->hw))
10084                 physfns = 4;
10085
10086         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10087                 /* don't count virtual functions */
10088                 if (entry->is_virtfn)
10089                         continue;
10090
10091                 /* When the devices on the bus don't all match our device ID,
10092                  * we can't reliably determine the correct number of
10093                  * functions. This can occur if a function has been direct
10094                  * attached to a virtual machine using VT-d, for example. In
10095                  * this case, simply return -1 to indicate this.
10096                  */
10097                 if ((entry->vendor != pdev->vendor) ||
10098                     (entry->device != pdev->device))
10099                         return -1;
10100
10101                 physfns++;
10102         }
10103
10104         return physfns;
10105 }
10106
10107 /**
10108  * ixgbe_wol_supported - Check whether device supports WoL
10109  * @adapter: the adapter private structure
10110  * @device_id: the device ID
10111  * @subdevice_id: the subsystem device ID
10112  *
10113  * This function is used by probe and ethtool to determine
10114  * which devices have WoL support
10115  *
10116  **/
10117 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10118                          u16 subdevice_id)
10119 {
10120         struct ixgbe_hw *hw = &adapter->hw;
10121         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10122
10123         /* WOL not supported on 82598 */
10124         if (hw->mac.type == ixgbe_mac_82598EB)
10125                 return false;
10126
10127         /* check eeprom to see if WOL is enabled for X540 and newer */
10128         if (hw->mac.type >= ixgbe_mac_X540) {
10129                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10130                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10131                      (hw->bus.func == 0)))
10132                         return true;
10133         }
10134
10135         /* WOL is determined based on device IDs for 82599 MACs */
10136         switch (device_id) {
10137         case IXGBE_DEV_ID_82599_SFP:
10138                 /* Only these subdevices could supports WOL */
10139                 switch (subdevice_id) {
10140                 case IXGBE_SUBDEV_ID_82599_560FLR:
10141                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10142                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10143                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10144                         /* only support first port */
10145                         if (hw->bus.func != 0)
10146                                 break;
10147                         /* fall through */
10148                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10149                 case IXGBE_SUBDEV_ID_82599_SFP:
10150                 case IXGBE_SUBDEV_ID_82599_RNDC:
10151                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10152                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10153                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10154                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10155                         return true;
10156                 }
10157                 break;
10158         case IXGBE_DEV_ID_82599EN_SFP:
10159                 /* Only these subdevices support WOL */
10160                 switch (subdevice_id) {
10161                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10162                         return true;
10163                 }
10164                 break;
10165         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10166                 /* All except this subdevice support WOL */
10167                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10168                         return true;
10169                 break;
10170         case IXGBE_DEV_ID_82599_KX4:
10171                 return  true;
10172         default:
10173                 break;
10174         }
10175
10176         return false;
10177 }
10178
10179 /**
10180  * ixgbe_set_fw_version - Set FW version
10181  * @adapter: the adapter private structure
10182  *
10183  * This function is used by probe and ethtool to determine the FW version to
10184  * format to display. The FW version is taken from the EEPROM/NVM.
10185  */
10186 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10187 {
10188         struct ixgbe_hw *hw = &adapter->hw;
10189         struct ixgbe_nvm_version nvm_ver;
10190
10191         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10192         if (nvm_ver.oem_valid) {
10193                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10194                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10195                          nvm_ver.oem_release);
10196                 return;
10197         }
10198
10199         ixgbe_get_etk_id(hw, &nvm_ver);
10200         ixgbe_get_orom_version(hw, &nvm_ver);
10201
10202         if (nvm_ver.or_valid) {
10203                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10204                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10205                          nvm_ver.or_build, nvm_ver.or_patch);
10206                 return;
10207         }
10208
10209         /* Set ETrack ID format */
10210         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10211                  "0x%08x", nvm_ver.etk_id);
10212 }
10213
10214 /**
10215  * ixgbe_probe - Device Initialization Routine
10216  * @pdev: PCI device information struct
10217  * @ent: entry in ixgbe_pci_tbl
10218  *
10219  * Returns 0 on success, negative on failure
10220  *
10221  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10222  * The OS initialization, configuring of the adapter private structure,
10223  * and a hardware reset occur.
10224  **/
10225 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10226 {
10227         struct net_device *netdev;
10228         struct ixgbe_adapter *adapter = NULL;
10229         struct ixgbe_hw *hw;
10230         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10231         int i, err, pci_using_dac, expected_gts;
10232         unsigned int indices = MAX_TX_QUEUES;
10233         u8 part_str[IXGBE_PBANUM_LENGTH];
10234         bool disable_dev = false;
10235 #ifdef IXGBE_FCOE
10236         u16 device_caps;
10237 #endif
10238         u32 eec;
10239
10240         /* Catch broken hardware that put the wrong VF device ID in
10241          * the PCIe SR-IOV capability.
10242          */
10243         if (pdev->is_virtfn) {
10244                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10245                      pci_name(pdev), pdev->vendor, pdev->device);
10246                 return -EINVAL;
10247         }
10248
10249         err = pci_enable_device_mem(pdev);
10250         if (err)
10251                 return err;
10252
10253         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10254                 pci_using_dac = 1;
10255         } else {
10256                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10257                 if (err) {
10258                         dev_err(&pdev->dev,
10259                                 "No usable DMA configuration, aborting\n");
10260                         goto err_dma;
10261                 }
10262                 pci_using_dac = 0;
10263         }
10264
10265         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10266         if (err) {
10267                 dev_err(&pdev->dev,
10268                         "pci_request_selected_regions failed 0x%x\n", err);
10269                 goto err_pci_reg;
10270         }
10271
10272         pci_enable_pcie_error_reporting(pdev);
10273
10274         pci_set_master(pdev);
10275         pci_save_state(pdev);
10276
10277         if (ii->mac == ixgbe_mac_82598EB) {
10278 #ifdef CONFIG_IXGBE_DCB
10279                 /* 8 TC w/ 4 queues per TC */
10280                 indices = 4 * MAX_TRAFFIC_CLASS;
10281 #else
10282                 indices = IXGBE_MAX_RSS_INDICES;
10283 #endif
10284         }
10285
10286         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10287         if (!netdev) {
10288                 err = -ENOMEM;
10289                 goto err_alloc_etherdev;
10290         }
10291
10292         SET_NETDEV_DEV(netdev, &pdev->dev);
10293
10294         adapter = netdev_priv(netdev);
10295
10296         adapter->netdev = netdev;
10297         adapter->pdev = pdev;
10298         hw = &adapter->hw;
10299         hw->back = adapter;
10300         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10301
10302         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10303                               pci_resource_len(pdev, 0));
10304         adapter->io_addr = hw->hw_addr;
10305         if (!hw->hw_addr) {
10306                 err = -EIO;
10307                 goto err_ioremap;
10308         }
10309
10310         netdev->netdev_ops = &ixgbe_netdev_ops;
10311         ixgbe_set_ethtool_ops(netdev);
10312         netdev->watchdog_timeo = 5 * HZ;
10313         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10314
10315         /* Setup hw api */
10316         hw->mac.ops   = *ii->mac_ops;
10317         hw->mac.type  = ii->mac;
10318         hw->mvals     = ii->mvals;
10319         if (ii->link_ops)
10320                 hw->link.ops  = *ii->link_ops;
10321
10322         /* EEPROM */
10323         hw->eeprom.ops = *ii->eeprom_ops;
10324         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10325         if (ixgbe_removed(hw->hw_addr)) {
10326                 err = -EIO;
10327                 goto err_ioremap;
10328         }
10329         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10330         if (!(eec & BIT(8)))
10331                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10332
10333         /* PHY */
10334         hw->phy.ops = *ii->phy_ops;
10335         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10336         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10337         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10338         hw->phy.mdio.mmds = 0;
10339         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10340         hw->phy.mdio.dev = netdev;
10341         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10342         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10343
10344         /* setup the private structure */
10345         err = ixgbe_sw_init(adapter, ii);
10346         if (err)
10347                 goto err_sw_init;
10348
10349         /* Make sure the SWFW semaphore is in a valid state */
10350         if (hw->mac.ops.init_swfw_sync)
10351                 hw->mac.ops.init_swfw_sync(hw);
10352
10353         /* Make it possible the adapter to be woken up via WOL */
10354         switch (adapter->hw.mac.type) {
10355         case ixgbe_mac_82599EB:
10356         case ixgbe_mac_X540:
10357         case ixgbe_mac_X550:
10358         case ixgbe_mac_X550EM_x:
10359         case ixgbe_mac_x550em_a:
10360                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10361                 break;
10362         default:
10363                 break;
10364         }
10365
10366         /*
10367          * If there is a fan on this device and it has failed log the
10368          * failure.
10369          */
10370         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10371                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10372                 if (esdp & IXGBE_ESDP_SDP1)
10373                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10374         }
10375
10376         if (allow_unsupported_sfp)
10377                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10378
10379         /* reset_hw fills in the perm_addr as well */
10380         hw->phy.reset_if_overtemp = true;
10381         err = hw->mac.ops.reset_hw(hw);
10382         hw->phy.reset_if_overtemp = false;
10383         ixgbe_set_eee_capable(adapter);
10384         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10385                 err = 0;
10386         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10387                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10388                 e_dev_err("Reload the driver after installing a supported module.\n");
10389                 goto err_sw_init;
10390         } else if (err) {
10391                 e_dev_err("HW Init failed: %d\n", err);
10392                 goto err_sw_init;
10393         }
10394
10395 #ifdef CONFIG_PCI_IOV
10396         /* SR-IOV not supported on the 82598 */
10397         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10398                 goto skip_sriov;
10399         /* Mailbox */
10400         ixgbe_init_mbx_params_pf(hw);
10401         hw->mbx.ops = ii->mbx_ops;
10402         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10403         ixgbe_enable_sriov(adapter, max_vfs);
10404 skip_sriov:
10405
10406 #endif
10407         netdev->features = NETIF_F_SG |
10408                            NETIF_F_TSO |
10409                            NETIF_F_TSO6 |
10410                            NETIF_F_RXHASH |
10411                            NETIF_F_RXCSUM |
10412                            NETIF_F_HW_CSUM;
10413
10414 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10415                                     NETIF_F_GSO_GRE_CSUM | \
10416                                     NETIF_F_GSO_IPXIP4 | \
10417                                     NETIF_F_GSO_IPXIP6 | \
10418                                     NETIF_F_GSO_UDP_TUNNEL | \
10419                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10420
10421         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10422         netdev->features |= NETIF_F_GSO_PARTIAL |
10423                             IXGBE_GSO_PARTIAL_FEATURES;
10424
10425         if (hw->mac.type >= ixgbe_mac_82599EB)
10426                 netdev->features |= NETIF_F_SCTP_CRC;
10427
10428         /* copy netdev features into list of user selectable features */
10429         netdev->hw_features |= netdev->features |
10430                                NETIF_F_HW_VLAN_CTAG_FILTER |
10431                                NETIF_F_HW_VLAN_CTAG_RX |
10432                                NETIF_F_HW_VLAN_CTAG_TX |
10433                                NETIF_F_RXALL |
10434                                NETIF_F_HW_L2FW_DOFFLOAD;
10435
10436         if (hw->mac.type >= ixgbe_mac_82599EB)
10437                 netdev->hw_features |= NETIF_F_NTUPLE |
10438                                        NETIF_F_HW_TC;
10439
10440         if (pci_using_dac)
10441                 netdev->features |= NETIF_F_HIGHDMA;
10442
10443         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10444         netdev->hw_enc_features |= netdev->vlan_features;
10445         netdev->mpls_features |= NETIF_F_SG |
10446                                  NETIF_F_TSO |
10447                                  NETIF_F_TSO6 |
10448                                  NETIF_F_HW_CSUM;
10449         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10450
10451         /* set this bit last since it cannot be part of vlan_features */
10452         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10453                             NETIF_F_HW_VLAN_CTAG_RX |
10454                             NETIF_F_HW_VLAN_CTAG_TX;
10455
10456         netdev->priv_flags |= IFF_UNICAST_FLT;
10457         netdev->priv_flags |= IFF_SUPP_NOFCS;
10458
10459         /* MTU range: 68 - 9710 */
10460         netdev->min_mtu = ETH_MIN_MTU;
10461         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10462
10463 #ifdef CONFIG_IXGBE_DCB
10464         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10465                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10466 #endif
10467
10468 #ifdef IXGBE_FCOE
10469         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10470                 unsigned int fcoe_l;
10471
10472                 if (hw->mac.ops.get_device_caps) {
10473                         hw->mac.ops.get_device_caps(hw, &device_caps);
10474                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10475                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10476                 }
10477
10478
10479                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10480                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10481
10482                 netdev->features |= NETIF_F_FSO |
10483                                     NETIF_F_FCOE_CRC;
10484
10485                 netdev->vlan_features |= NETIF_F_FSO |
10486                                          NETIF_F_FCOE_CRC |
10487                                          NETIF_F_FCOE_MTU;
10488         }
10489 #endif /* IXGBE_FCOE */
10490         ixgbe_init_ipsec_offload(adapter);
10491
10492         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10493                 netdev->hw_features |= NETIF_F_LRO;
10494         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10495                 netdev->features |= NETIF_F_LRO;
10496
10497         /* make sure the EEPROM is good */
10498         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10499                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10500                 err = -EIO;
10501                 goto err_sw_init;
10502         }
10503
10504         eth_platform_get_mac_address(&adapter->pdev->dev,
10505                                      adapter->hw.mac.perm_addr);
10506
10507         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10508
10509         if (!is_valid_ether_addr(netdev->dev_addr)) {
10510                 e_dev_err("invalid MAC address\n");
10511                 err = -EIO;
10512                 goto err_sw_init;
10513         }
10514
10515         /* Set hw->mac.addr to permanent MAC address */
10516         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10517         ixgbe_mac_set_default_filter(adapter);
10518
10519         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10520
10521         if (ixgbe_removed(hw->hw_addr)) {
10522                 err = -EIO;
10523                 goto err_sw_init;
10524         }
10525         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10526         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10527         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10528
10529         err = ixgbe_init_interrupt_scheme(adapter);
10530         if (err)
10531                 goto err_sw_init;
10532
10533         for (i = 0; i < adapter->num_rx_queues; i++)
10534                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10535         for (i = 0; i < adapter->num_tx_queues; i++)
10536                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10537         for (i = 0; i < adapter->num_xdp_queues; i++)
10538                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10539
10540         /* WOL not supported for all devices */
10541         adapter->wol = 0;
10542         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10543         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10544                                                 pdev->subsystem_device);
10545         if (hw->wol_enabled)
10546                 adapter->wol = IXGBE_WUFC_MAG;
10547
10548         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10549
10550         /* save off EEPROM version number */
10551         ixgbe_set_fw_version(adapter);
10552
10553         /* pick up the PCI bus settings for reporting later */
10554         if (ixgbe_pcie_from_parent(hw))
10555                 ixgbe_get_parent_bus_info(adapter);
10556         else
10557                  hw->mac.ops.get_bus_info(hw);
10558
10559         /* calculate the expected PCIe bandwidth required for optimal
10560          * performance. Note that some older parts will never have enough
10561          * bandwidth due to being older generation PCIe parts. We clamp these
10562          * parts to ensure no warning is displayed if it can't be fixed.
10563          */
10564         switch (hw->mac.type) {
10565         case ixgbe_mac_82598EB:
10566                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10567                 break;
10568         default:
10569                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10570                 break;
10571         }
10572
10573         /* don't check link if we failed to enumerate functions */
10574         if (expected_gts > 0)
10575                 ixgbe_check_minimum_link(adapter, expected_gts);
10576
10577         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10578         if (err)
10579                 strlcpy(part_str, "Unknown", sizeof(part_str));
10580         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10581                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10582                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10583                            part_str);
10584         else
10585                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10586                            hw->mac.type, hw->phy.type, part_str);
10587
10588         e_dev_info("%pM\n", netdev->dev_addr);
10589
10590         /* reset the hardware with the new settings */
10591         err = hw->mac.ops.start_hw(hw);
10592         if (err == IXGBE_ERR_EEPROM_VERSION) {
10593                 /* We are running on a pre-production device, log a warning */
10594                 e_dev_warn("This device is a pre-production adapter/LOM. "
10595                            "Please be aware there may be issues associated "
10596                            "with your hardware.  If you are experiencing "
10597                            "problems please contact your Intel or hardware "
10598                            "representative who provided you with this "
10599                            "hardware.\n");
10600         }
10601         strcpy(netdev->name, "eth%d");
10602         pci_set_drvdata(pdev, adapter);
10603         err = register_netdev(netdev);
10604         if (err)
10605                 goto err_register;
10606
10607
10608         /* power down the optics for 82599 SFP+ fiber */
10609         if (hw->mac.ops.disable_tx_laser)
10610                 hw->mac.ops.disable_tx_laser(hw);
10611
10612         /* carrier off reporting is important to ethtool even BEFORE open */
10613         netif_carrier_off(netdev);
10614
10615 #ifdef CONFIG_IXGBE_DCA
10616         if (dca_add_requester(&pdev->dev) == 0) {
10617                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10618                 ixgbe_setup_dca(adapter);
10619         }
10620 #endif
10621         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10622                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10623                 for (i = 0; i < adapter->num_vfs; i++)
10624                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10625         }
10626
10627         /* firmware requires driver version to be 0xFFFFFFFF
10628          * since os does not support feature
10629          */
10630         if (hw->mac.ops.set_fw_drv_ver)
10631                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10632                                            sizeof(ixgbe_driver_version) - 1,
10633                                            ixgbe_driver_version);
10634
10635         /* add san mac addr to netdev */
10636         ixgbe_add_sanmac_netdev(netdev);
10637
10638         e_dev_info("%s\n", ixgbe_default_device_descr);
10639
10640 #ifdef CONFIG_IXGBE_HWMON
10641         if (ixgbe_sysfs_init(adapter))
10642                 e_err(probe, "failed to allocate sysfs resources\n");
10643 #endif /* CONFIG_IXGBE_HWMON */
10644
10645         ixgbe_dbg_adapter_init(adapter);
10646
10647         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10648         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10649                 hw->mac.ops.setup_link(hw,
10650                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10651                         true);
10652
10653         return 0;
10654
10655 err_register:
10656         ixgbe_release_hw_control(adapter);
10657         ixgbe_clear_interrupt_scheme(adapter);
10658 err_sw_init:
10659         ixgbe_disable_sriov(adapter);
10660         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10661         iounmap(adapter->io_addr);
10662         kfree(adapter->jump_tables[0]);
10663         kfree(adapter->mac_table);
10664         kfree(adapter->rss_key);
10665 err_ioremap:
10666         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10667         free_netdev(netdev);
10668 err_alloc_etherdev:
10669         pci_release_mem_regions(pdev);
10670 err_pci_reg:
10671 err_dma:
10672         if (!adapter || disable_dev)
10673                 pci_disable_device(pdev);
10674         return err;
10675 }
10676
10677 /**
10678  * ixgbe_remove - Device Removal Routine
10679  * @pdev: PCI device information struct
10680  *
10681  * ixgbe_remove is called by the PCI subsystem to alert the driver
10682  * that it should release a PCI device.  The could be caused by a
10683  * Hot-Plug event, or because the driver is going to be removed from
10684  * memory.
10685  **/
10686 static void ixgbe_remove(struct pci_dev *pdev)
10687 {
10688         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10689         struct net_device *netdev;
10690         bool disable_dev;
10691         int i;
10692
10693         /* if !adapter then we already cleaned up in probe */
10694         if (!adapter)
10695                 return;
10696
10697         netdev  = adapter->netdev;
10698         ixgbe_dbg_adapter_exit(adapter);
10699
10700         set_bit(__IXGBE_REMOVING, &adapter->state);
10701         cancel_work_sync(&adapter->service_task);
10702
10703
10704 #ifdef CONFIG_IXGBE_DCA
10705         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10706                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10707                 dca_remove_requester(&pdev->dev);
10708                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10709                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10710         }
10711
10712 #endif
10713 #ifdef CONFIG_IXGBE_HWMON
10714         ixgbe_sysfs_exit(adapter);
10715 #endif /* CONFIG_IXGBE_HWMON */
10716
10717         /* remove the added san mac */
10718         ixgbe_del_sanmac_netdev(netdev);
10719
10720 #ifdef CONFIG_PCI_IOV
10721         ixgbe_disable_sriov(adapter);
10722 #endif
10723         if (netdev->reg_state == NETREG_REGISTERED)
10724                 unregister_netdev(netdev);
10725
10726         ixgbe_stop_ipsec_offload(adapter);
10727         ixgbe_clear_interrupt_scheme(adapter);
10728
10729         ixgbe_release_hw_control(adapter);
10730
10731 #ifdef CONFIG_DCB
10732         kfree(adapter->ixgbe_ieee_pfc);
10733         kfree(adapter->ixgbe_ieee_ets);
10734
10735 #endif
10736         iounmap(adapter->io_addr);
10737         pci_release_mem_regions(pdev);
10738
10739         e_dev_info("complete\n");
10740
10741         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10742                 if (adapter->jump_tables[i]) {
10743                         kfree(adapter->jump_tables[i]->input);
10744                         kfree(adapter->jump_tables[i]->mask);
10745                 }
10746                 kfree(adapter->jump_tables[i]);
10747         }
10748
10749         kfree(adapter->mac_table);
10750         kfree(adapter->rss_key);
10751         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10752         free_netdev(netdev);
10753
10754         pci_disable_pcie_error_reporting(pdev);
10755
10756         if (disable_dev)
10757                 pci_disable_device(pdev);
10758 }
10759
10760 /**
10761  * ixgbe_io_error_detected - called when PCI error is detected
10762  * @pdev: Pointer to PCI device
10763  * @state: The current pci connection state
10764  *
10765  * This function is called after a PCI bus error affecting
10766  * this device has been detected.
10767  */
10768 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10769                                                 pci_channel_state_t state)
10770 {
10771         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10772         struct net_device *netdev = adapter->netdev;
10773
10774 #ifdef CONFIG_PCI_IOV
10775         struct ixgbe_hw *hw = &adapter->hw;
10776         struct pci_dev *bdev, *vfdev;
10777         u32 dw0, dw1, dw2, dw3;
10778         int vf, pos;
10779         u16 req_id, pf_func;
10780
10781         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10782             adapter->num_vfs == 0)
10783                 goto skip_bad_vf_detection;
10784
10785         bdev = pdev->bus->self;
10786         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10787                 bdev = bdev->bus->self;
10788
10789         if (!bdev)
10790                 goto skip_bad_vf_detection;
10791
10792         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10793         if (!pos)
10794                 goto skip_bad_vf_detection;
10795
10796         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10797         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10798         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10799         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10800         if (ixgbe_removed(hw->hw_addr))
10801                 goto skip_bad_vf_detection;
10802
10803         req_id = dw1 >> 16;
10804         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
10805         if (!(req_id & 0x0080))
10806                 goto skip_bad_vf_detection;
10807
10808         pf_func = req_id & 0x01;
10809         if ((pf_func & 1) == (pdev->devfn & 1)) {
10810                 unsigned int device_id;
10811
10812                 vf = (req_id & 0x7F) >> 1;
10813                 e_dev_err("VF %d has caused a PCIe error\n", vf);
10814                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
10815                                 "%8.8x\tdw3: %8.8x\n",
10816                 dw0, dw1, dw2, dw3);
10817                 switch (adapter->hw.mac.type) {
10818                 case ixgbe_mac_82599EB:
10819                         device_id = IXGBE_82599_VF_DEVICE_ID;
10820                         break;
10821                 case ixgbe_mac_X540:
10822                         device_id = IXGBE_X540_VF_DEVICE_ID;
10823                         break;
10824                 case ixgbe_mac_X550:
10825                         device_id = IXGBE_DEV_ID_X550_VF;
10826                         break;
10827                 case ixgbe_mac_X550EM_x:
10828                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
10829                         break;
10830                 case ixgbe_mac_x550em_a:
10831                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
10832                         break;
10833                 default:
10834                         device_id = 0;
10835                         break;
10836                 }
10837
10838                 /* Find the pci device of the offending VF */
10839                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
10840                 while (vfdev) {
10841                         if (vfdev->devfn == (req_id & 0xFF))
10842                                 break;
10843                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
10844                                                device_id, vfdev);
10845                 }
10846                 /*
10847                  * There's a slim chance the VF could have been hot plugged,
10848                  * so if it is no longer present we don't need to issue the
10849                  * VFLR.  Just clean up the AER in that case.
10850                  */
10851                 if (vfdev) {
10852                         pcie_flr(vfdev);
10853                         /* Free device reference count */
10854                         pci_dev_put(vfdev);
10855                 }
10856
10857                 pci_cleanup_aer_uncorrect_error_status(pdev);
10858         }
10859
10860         /*
10861          * Even though the error may have occurred on the other port
10862          * we still need to increment the vf error reference count for
10863          * both ports because the I/O resume function will be called
10864          * for both of them.
10865          */
10866         adapter->vferr_refcount++;
10867
10868         return PCI_ERS_RESULT_RECOVERED;
10869
10870 skip_bad_vf_detection:
10871 #endif /* CONFIG_PCI_IOV */
10872         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
10873                 return PCI_ERS_RESULT_DISCONNECT;
10874
10875         if (!netif_device_present(netdev))
10876                 return PCI_ERS_RESULT_DISCONNECT;
10877
10878         rtnl_lock();
10879         netif_device_detach(netdev);
10880
10881         if (state == pci_channel_io_perm_failure) {
10882                 rtnl_unlock();
10883                 return PCI_ERS_RESULT_DISCONNECT;
10884         }
10885
10886         if (netif_running(netdev))
10887                 ixgbe_close_suspend(adapter);
10888
10889         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
10890                 pci_disable_device(pdev);
10891         rtnl_unlock();
10892
10893         /* Request a slot reset. */
10894         return PCI_ERS_RESULT_NEED_RESET;
10895 }
10896
10897 /**
10898  * ixgbe_io_slot_reset - called after the pci bus has been reset.
10899  * @pdev: Pointer to PCI device
10900  *
10901  * Restart the card from scratch, as if from a cold-boot.
10902  */
10903 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
10904 {
10905         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10906         pci_ers_result_t result;
10907         int err;
10908
10909         if (pci_enable_device_mem(pdev)) {
10910                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
10911                 result = PCI_ERS_RESULT_DISCONNECT;
10912         } else {
10913                 smp_mb__before_atomic();
10914                 clear_bit(__IXGBE_DISABLED, &adapter->state);
10915                 adapter->hw.hw_addr = adapter->io_addr;
10916                 pci_set_master(pdev);
10917                 pci_restore_state(pdev);
10918                 pci_save_state(pdev);
10919
10920                 pci_wake_from_d3(pdev, false);
10921
10922                 ixgbe_reset(adapter);
10923                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10924                 result = PCI_ERS_RESULT_RECOVERED;
10925         }
10926
10927         err = pci_cleanup_aer_uncorrect_error_status(pdev);
10928         if (err) {
10929                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
10930                           "failed 0x%0x\n", err);
10931                 /* non-fatal, continue */
10932         }
10933
10934         return result;
10935 }
10936
10937 /**
10938  * ixgbe_io_resume - called when traffic can start flowing again.
10939  * @pdev: Pointer to PCI device
10940  *
10941  * This callback is called when the error recovery driver tells us that
10942  * its OK to resume normal operation.
10943  */
10944 static void ixgbe_io_resume(struct pci_dev *pdev)
10945 {
10946         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10947         struct net_device *netdev = adapter->netdev;
10948
10949 #ifdef CONFIG_PCI_IOV
10950         if (adapter->vferr_refcount) {
10951                 e_info(drv, "Resuming after VF err\n");
10952                 adapter->vferr_refcount--;
10953                 return;
10954         }
10955
10956 #endif
10957         rtnl_lock();
10958         if (netif_running(netdev))
10959                 ixgbe_open(netdev);
10960
10961         netif_device_attach(netdev);
10962         rtnl_unlock();
10963 }
10964
10965 static const struct pci_error_handlers ixgbe_err_handler = {
10966         .error_detected = ixgbe_io_error_detected,
10967         .slot_reset = ixgbe_io_slot_reset,
10968         .resume = ixgbe_io_resume,
10969 };
10970
10971 static struct pci_driver ixgbe_driver = {
10972         .name     = ixgbe_driver_name,
10973         .id_table = ixgbe_pci_tbl,
10974         .probe    = ixgbe_probe,
10975         .remove   = ixgbe_remove,
10976 #ifdef CONFIG_PM
10977         .suspend  = ixgbe_suspend,
10978         .resume   = ixgbe_resume,
10979 #endif
10980         .shutdown = ixgbe_shutdown,
10981         .sriov_configure = ixgbe_pci_sriov_configure,
10982         .err_handler = &ixgbe_err_handler
10983 };
10984
10985 /**
10986  * ixgbe_init_module - Driver Registration Routine
10987  *
10988  * ixgbe_init_module is the first routine called when the driver is
10989  * loaded. All it does is register with the PCI subsystem.
10990  **/
10991 static int __init ixgbe_init_module(void)
10992 {
10993         int ret;
10994         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
10995         pr_info("%s\n", ixgbe_copyright);
10996
10997         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
10998         if (!ixgbe_wq) {
10999                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11000                 return -ENOMEM;
11001         }
11002
11003         ixgbe_dbg_init();
11004
11005         ret = pci_register_driver(&ixgbe_driver);
11006         if (ret) {
11007                 destroy_workqueue(ixgbe_wq);
11008                 ixgbe_dbg_exit();
11009                 return ret;
11010         }
11011
11012 #ifdef CONFIG_IXGBE_DCA
11013         dca_register_notify(&dca_notifier);
11014 #endif
11015
11016         return 0;
11017 }
11018
11019 module_init(ixgbe_init_module);
11020
11021 /**
11022  * ixgbe_exit_module - Driver Exit Cleanup Routine
11023  *
11024  * ixgbe_exit_module is called just before the driver is removed
11025  * from memory.
11026  **/
11027 static void __exit ixgbe_exit_module(void)
11028 {
11029 #ifdef CONFIG_IXGBE_DCA
11030         dca_unregister_notify(&dca_notifier);
11031 #endif
11032         pci_unregister_driver(&ixgbe_driver);
11033
11034         ixgbe_dbg_exit();
11035         if (ixgbe_wq) {
11036                 destroy_workqueue(ixgbe_wq);
11037                 ixgbe_wq = NULL;
11038         }
11039 }
11040
11041 #ifdef CONFIG_IXGBE_DCA
11042 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11043                             void *p)
11044 {
11045         int ret_val;
11046
11047         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11048                                          __ixgbe_notify_dca);
11049
11050         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11051 }
11052
11053 #endif /* CONFIG_IXGBE_DCA */
11054
11055 module_exit(ixgbe_exit_module);
11056
11057 /* ixgbe_main.c */