drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <linux/numa.h>
  31 #include <generated/utsrelease.h>
  32 #include <scsi/fc/fc_fcoe.h>
  33 #include <net/udp_tunnel.h>
  34 #include <net/pkt_cls.h>
  35 #include <net/tc_act/tc_gact.h>
  36 #include <net/tc_act/tc_mirred.h>
  37 #include <net/vxlan.h>
  38 #include <net/mpls.h>
  39 #include <net/xdp_sock_drv.h>
  40 #include <net/xfrm.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_common.h"
  44 #include "ixgbe_dcb_82599.h"
  45 #include "ixgbe_phy.h"
  46 #include "ixgbe_sriov.h"
  47 #include "ixgbe_model.h"
  48 #include "ixgbe_txrx_common.h"
  49
  50 char ixgbe_driver_name[] = "ixgbe";
  51 static const char ixgbe_driver_string[] =
  52                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  53 #ifdef IXGBE_FCOE
  54 char ixgbe_default_device_descr[] =
  55                               "Intel(R) 10 Gigabit Network Connection";
  56 #else
  57 static char ixgbe_default_device_descr[] =
  58                               "Intel(R) 10 Gigabit Network Connection";
  59 #endif
  60 static const char ixgbe_copyright[] =
  61                                 "Copyright (c) 1999-2016 Intel Corporation.";
  62
  63 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  64
  65 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  66         [board_82598]           = &ixgbe_82598_info,
  67         [board_82599]           = &ixgbe_82599_info,
  68         [board_X540]            = &ixgbe_X540_info,
  69         [board_X550]            = &ixgbe_X550_info,
  70         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  71         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  72         [board_x550em_a]        = &ixgbe_x550em_a_info,
  73         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  74 };
  75
  76 /* ixgbe_pci_tbl - PCI Device ID Table
  77  *
  78  * Wildcard entries (PCI_ANY_ID) should come last
  79  * Last entry must be all 0s
  80  *
  81  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  82  *   Class, Class Mask, private data (not used) }
  83  */
  84 static const struct pci_device_id ixgbe_pci_tbl[] = {
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 132         /* required last entry */
 133         {0, }
 134 };
 135 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 136
 137 #ifdef CONFIG_IXGBE_DCA
 138 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 139                             void *p);
 140 static struct notifier_block dca_notifier = {
 141         .notifier_call = ixgbe_notify_dca,
 142         .next          = NULL,
 143         .priority      = 0
 144 };
 145 #endif
 146
 147 #ifdef CONFIG_PCI_IOV
 148 static unsigned int max_vfs;
 149 module_param(max_vfs, uint, 0);
 150 MODULE_PARM_DESC(max_vfs,
 151                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 152 #endif /* CONFIG_PCI_IOV */
 153
 154 static unsigned int allow_unsupported_sfp;
 155 module_param(allow_unsupported_sfp, uint, 0);
 156 MODULE_PARM_DESC(allow_unsupported_sfp,
 157                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 158
 159 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 160 static int debug = -1;
 161 module_param(debug, int, 0);
 162 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 163
 164 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 165 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 166 MODULE_LICENSE("GPL v2");
 167
 168 static struct workqueue_struct *ixgbe_wq;
 169
 170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 171 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 172
 173 static const struct net_device_ops ixgbe_netdev_ops;
 174
 175 static bool netif_is_ixgbe(struct net_device *dev)
 176 {
 177         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 178 }
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         struct pci_dev *pdev;
 252
 253         /* Some devices are not connected over PCIe and thus do not negotiate
 254          * speed. These devices do not have valid bus info, and thus any report
 255          * we generate may not be correct.
 256          */
 257         if (hw->bus.type == ixgbe_bus_type_internal)
 258                 return;
 259
 260         /* determine whether to use the parent device */
 261         if (ixgbe_pcie_from_parent(&adapter->hw))
 262                 pdev = adapter->pdev->bus->parent->self;
 263         else
 264                 pdev = adapter->pdev;
 265
 266         pcie_print_link_status(pdev);
 267 }
 268
 269 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 270 {
 271         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 272             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 273             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 274                 queue_work(ixgbe_wq, &adapter->service_task);
 275 }
 276
 277 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 278 {
 279         struct ixgbe_adapter *adapter = hw->back;
 280
 281         if (!hw->hw_addr)
 282                 return;
 283         hw->hw_addr = NULL;
 284         e_dev_err("Adapter removed\n");
 285         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 286                 ixgbe_service_event_schedule(adapter);
 287 }
 288
 289 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 290 {
 291         u8 __iomem *reg_addr;
 292         u32 value;
 293         int i;
 294
 295         reg_addr = READ_ONCE(hw->hw_addr);
 296         if (ixgbe_removed(reg_addr))
 297                 return IXGBE_FAILED_READ_REG;
 298
 299         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 300          * so perform several status register reads to determine if the adapter
 301          * has been removed.
 302          */
 303         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 304                 value = readl(reg_addr + IXGBE_STATUS);
 305                 if (value != IXGBE_FAILED_READ_REG)
 306                         break;
 307                 mdelay(3);
 308         }
 309
 310         if (value == IXGBE_FAILED_READ_REG)
 311                 ixgbe_remove_adapter(hw);
 312         else
 313                 value = readl(reg_addr + reg);
 314         return value;
 315 }
 316
 317 /**
 318  * ixgbe_read_reg - Read from device register
 319  * @hw: hw specific details
 320  * @reg: offset of register to read
 321  *
 322  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 323  *
 324  * This function is used to read device registers. It checks for device
 325  * removal by confirming any read that returns all ones by checking the
 326  * status register value for all ones. This function avoids reading from
 327  * the hardware if a removal was previously detected in which case it
 328  * returns IXGBE_FAILED_READ_REG (all ones).
 329  */
 330 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 331 {
 332         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 333         u32 value;
 334
 335         if (ixgbe_removed(reg_addr))
 336                 return IXGBE_FAILED_READ_REG;
 337         if (unlikely(hw->phy.nw_mng_if_sel &
 338                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 339                 struct ixgbe_adapter *adapter;
 340                 int i;
 341
 342                 for (i = 0; i < 200; ++i) {
 343                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 344                         if (likely(!value))
 345                                 goto writes_completed;
 346                         if (value == IXGBE_FAILED_READ_REG) {
 347                                 ixgbe_remove_adapter(hw);
 348                                 return IXGBE_FAILED_READ_REG;
 349                         }
 350                         udelay(5);
 351                 }
 352
 353                 adapter = hw->back;
 354                 e_warn(hw, "register writes incomplete %08x\n", value);
 355         }
 356
 357 writes_completed:
 358         value = readl(reg_addr + reg);
 359         if (unlikely(value == IXGBE_FAILED_READ_REG))
 360                 value = ixgbe_check_remove(hw, reg);
 361         return value;
 362 }
 363
 364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 365 {
 366         u16 value;
 367
 368         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 369         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 370                 ixgbe_remove_adapter(hw);
 371                 return true;
 372         }
 373         return false;
 374 }
 375
 376 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 377 {
 378         struct ixgbe_adapter *adapter = hw->back;
 379         u16 value;
 380
 381         if (ixgbe_removed(hw->hw_addr))
 382                 return IXGBE_FAILED_READ_CFG_WORD;
 383         pci_read_config_word(adapter->pdev, reg, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 385             ixgbe_check_cfg_remove(hw, adapter->pdev))
 386                 return IXGBE_FAILED_READ_CFG_WORD;
 387         return value;
 388 }
 389
 390 #ifdef CONFIG_PCI_IOV
 391 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u32 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_DWORD;
 398         pci_read_config_dword(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_DWORD;
 402         return value;
 403 }
 404 #endif /* CONFIG_PCI_IOV */
 405
 406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409
 410         if (ixgbe_removed(hw->hw_addr))
 411                 return;
 412         pci_write_config_word(adapter->pdev, reg, value);
 413 }
 414
 415 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 416 {
 417         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 418
 419         /* flush memory to make sure state is correct before next watchdog */
 420         smp_mb__before_atomic();
 421         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 422 }
 423
 424 struct ixgbe_reg_info {
 425         u32 ofs;
 426         char *name;
 427 };
 428
 429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 430
 431         /* General Registers */
 432         {IXGBE_CTRL, "CTRL"},
 433         {IXGBE_STATUS, "STATUS"},
 434         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 435
 436         /* Interrupt Registers */
 437         {IXGBE_EICR, "EICR"},
 438
 439         /* RX Registers */
 440         {IXGBE_SRRCTL(0), "SRRCTL"},
 441         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 442         {IXGBE_RDLEN(0), "RDLEN"},
 443         {IXGBE_RDH(0), "RDH"},
 444         {IXGBE_RDT(0), "RDT"},
 445         {IXGBE_RXDCTL(0), "RXDCTL"},
 446         {IXGBE_RDBAL(0), "RDBAL"},
 447         {IXGBE_RDBAH(0), "RDBAH"},
 448
 449         /* TX Registers */
 450         {IXGBE_TDBAL(0), "TDBAL"},
 451         {IXGBE_TDBAH(0), "TDBAH"},
 452         {IXGBE_TDLEN(0), "TDLEN"},
 453         {IXGBE_TDH(0), "TDH"},
 454         {IXGBE_TDT(0), "TDT"},
 455         {IXGBE_TXDCTL(0), "TXDCTL"},
 456
 457         /* List Terminator */
 458         { .name = NULL }
 459 };
 460
 461
 462 /*
 463  * ixgbe_regdump - register printout routine
 464  */
 465 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 466 {
 467         int i;
 468         char rname[16];
 469         u32 regs[64];
 470
 471         switch (reginfo->ofs) {
 472         case IXGBE_SRRCTL(0):
 473                 for (i = 0; i < 64; i++)
 474                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 475                 break;
 476         case IXGBE_DCA_RXCTRL(0):
 477                 for (i = 0; i < 64; i++)
 478                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 479                 break;
 480         case IXGBE_RDLEN(0):
 481                 for (i = 0; i < 64; i++)
 482                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 483                 break;
 484         case IXGBE_RDH(0):
 485                 for (i = 0; i < 64; i++)
 486                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 487                 break;
 488         case IXGBE_RDT(0):
 489                 for (i = 0; i < 64; i++)
 490                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 491                 break;
 492         case IXGBE_RXDCTL(0):
 493                 for (i = 0; i < 64; i++)
 494                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 495                 break;
 496         case IXGBE_RDBAL(0):
 497                 for (i = 0; i < 64; i++)
 498                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 499                 break;
 500         case IXGBE_RDBAH(0):
 501                 for (i = 0; i < 64; i++)
 502                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 503                 break;
 504         case IXGBE_TDBAL(0):
 505                 for (i = 0; i < 64; i++)
 506                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 507                 break;
 508         case IXGBE_TDBAH(0):
 509                 for (i = 0; i < 64; i++)
 510                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 511                 break;
 512         case IXGBE_TDLEN(0):
 513                 for (i = 0; i < 64; i++)
 514                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 515                 break;
 516         case IXGBE_TDH(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 519                 break;
 520         case IXGBE_TDT(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 523                 break;
 524         case IXGBE_TXDCTL(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 527                 break;
 528         default:
 529                 pr_info("%-15s %08x\n",
 530                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 531                 return;
 532         }
 533
 534         i = 0;
 535         while (i < 64) {
 536                 int j;
 537                 char buf[9 * 8 + 1];
 538                 char *p = buf;
 539
 540                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 541                 for (j = 0; j < 8; j++)
 542                         p += sprintf(p, " %08x", regs[i++]);
 543                 pr_err("%-15s%s\n", rname, buf);
 544         }
 545
 546 }
 547
 548 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 549 {
 550         struct ixgbe_tx_buffer *tx_buffer;
 551
 552         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 553         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 554                 n, ring->next_to_use, ring->next_to_clean,
 555                 (u64)dma_unmap_addr(tx_buffer, dma),
 556                 dma_unmap_len(tx_buffer, len),
 557                 tx_buffer->next_to_watch,
 558                 (u64)tx_buffer->time_stamp);
 559 }
 560
 561 /*
 562  * ixgbe_dump - Print registers, tx-rings and rx-rings
 563  */
 564 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 565 {
 566         struct net_device *netdev = adapter->netdev;
 567         struct ixgbe_hw *hw = &adapter->hw;
 568         struct ixgbe_reg_info *reginfo;
 569         int n = 0;
 570         struct ixgbe_ring *ring;
 571         struct ixgbe_tx_buffer *tx_buffer;
 572         union ixgbe_adv_tx_desc *tx_desc;
 573         struct my_u0 { u64 a; u64 b; } *u0;
 574         struct ixgbe_ring *rx_ring;
 575         union ixgbe_adv_rx_desc *rx_desc;
 576         struct ixgbe_rx_buffer *rx_buffer_info;
 577         int i = 0;
 578
 579         if (!netif_msg_hw(adapter))
 580                 return;
 581
 582         /* Print netdevice Info */
 583         if (netdev) {
 584                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 585                 pr_info("Device Name     state            "
 586                         "trans_start\n");
 587                 pr_info("%-15s %016lX %016lX\n",
 588                         netdev->name,
 589                         netdev->state,
 590                         dev_trans_start(netdev));
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 ring = adapter->tx_ring[n];
 611                 ixgbe_print_buffer(ring, n);
 612         }
 613
 614         for (n = 0; n < adapter->num_xdp_queues; n++) {
 615                 ring = adapter->xdp_ring[n];
 616                 ixgbe_print_buffer(ring, n);
 617         }
 618
 619         /* Print TX Rings */
 620         if (!netif_msg_tx_done(adapter))
 621                 goto rx_ring_summary;
 622
 623         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 624
 625         /* Transmit Descriptor Formats
 626          *
 627          * 82598 Advanced Transmit Descriptor
 628          *   +--------------------------------------------------------------+
 629          * 0 |         Buffer Address [63:0]                                |
 630          *   +--------------------------------------------------------------+
 631          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 632          *   +--------------------------------------------------------------+
 633          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 634          *
 635          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 636          *   +--------------------------------------------------------------+
 637          * 0 |                          RSV [63:0]                          |
 638          *   +--------------------------------------------------------------+
 639          * 8 |            RSV           |  STA  |          NXTSEQ           |
 640          *   +--------------------------------------------------------------+
 641          *   63                       36 35   32 31                         0
 642          *
 643          * 82599+ Advanced Transmit Descriptor
 644          *   +--------------------------------------------------------------+
 645          * 0 |         Buffer Address [63:0]                                |
 646          *   +--------------------------------------------------------------+
 647          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 648          *   +--------------------------------------------------------------+
 649          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 650          *
 651          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 652          *   +--------------------------------------------------------------+
 653          * 0 |                          RSV [63:0]                          |
 654          *   +--------------------------------------------------------------+
 655          * 8 |            RSV           |  STA  |           RSV             |
 656          *   +--------------------------------------------------------------+
 657          *   63                       36 35   32 31                         0
 658          */
 659
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 pr_info("------------------------------------\n");
 663                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 664                 pr_info("------------------------------------\n");
 665                 pr_info("%s%s    %s              %s        %s          %s\n",
 666                         "T [desc]     [address 63:0  ] ",
 667                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 668                         "leng", "ntw", "timestamp", "bi->skb");
 669
 670                 for (i = 0; ring->desc && (i < ring->count); i++) {
 671                         tx_desc = IXGBE_TX_DESC(ring, i);
 672                         tx_buffer = &ring->tx_buffer_info[i];
 673                         u0 = (struct my_u0 *)tx_desc;
 674                         if (dma_unmap_len(tx_buffer, len) > 0) {
 675                                 const char *ring_desc;
 676
 677                                 if (i == ring->next_to_use &&
 678                                     i == ring->next_to_clean)
 679                                         ring_desc = " NTC/U";
 680                                 else if (i == ring->next_to_use)
 681                                         ring_desc = " NTU";
 682                                 else if (i == ring->next_to_clean)
 683                                         ring_desc = " NTC";
 684                                 else
 685                                         ring_desc = "";
 686                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 687                                         i,
 688                                         le64_to_cpu((__force __le64)u0->a),
 689                                         le64_to_cpu((__force __le64)u0->b),
 690                                         (u64)dma_unmap_addr(tx_buffer, dma),
 691                                         dma_unmap_len(tx_buffer, len),
 692                                         tx_buffer->next_to_watch,
 693                                         (u64)tx_buffer->time_stamp,
 694                                         tx_buffer->skb,
 695                                         ring_desc);
 696
 697                                 if (netif_msg_pktdata(adapter) &&
 698                                     tx_buffer->skb)
 699                                         print_hex_dump(KERN_INFO, "",
 700                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 701                                                 tx_buffer->skb->data,
 702                                                 dma_unmap_len(tx_buffer, len),
 703                                                 true);
 704                         }
 705                 }
 706         }
 707
 708         /* Print RX Rings Summary */
 709 rx_ring_summary:
 710         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 711         pr_info("Queue [NTU] [NTC]\n");
 712         for (n = 0; n < adapter->num_rx_queues; n++) {
 713                 rx_ring = adapter->rx_ring[n];
 714                 pr_info("%5d %5X %5X\n",
 715                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 716         }
 717
 718         /* Print RX Rings */
 719         if (!netif_msg_rx_status(adapter))
 720                 return;
 721
 722         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 723
 724         /* Receive Descriptor Formats
 725          *
 726          * 82598 Advanced Receive Descriptor (Read) Format
 727          *    63                                           1        0
 728          *    +-----------------------------------------------------+
 729          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 730          *    +----------------------------------------------+------+
 731          *  8 |       Header Buffer Address [63:1]           |  DD  |
 732          *    +-----------------------------------------------------+
 733          *
 734          *
 735          * 82598 Advanced Receive Descriptor (Write-Back) Format
 736          *
 737          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 738          *   +------------------------------------------------------+
 739          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 740          *   | Packet   | IP     |   |          |     | Type | Type |
 741          *   | Checksum | Ident  |   |          |     |      |      |
 742          *   +------------------------------------------------------+
 743          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 744          *   +------------------------------------------------------+
 745          *   63       48 47    32 31            20 19               0
 746          *
 747          * 82599+ Advanced Receive Descriptor (Read) Format
 748          *    63                                           1        0
 749          *    +-----------------------------------------------------+
 750          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 751          *    +----------------------------------------------+------+
 752          *  8 |       Header Buffer Address [63:1]           |  DD  |
 753          *    +-----------------------------------------------------+
 754          *
 755          *
 756          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 757          *
 758          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 759          *   +------------------------------------------------------+
 760          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 761          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 762          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 763          *   +------------------------------------------------------+
 764          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 765          *   +------------------------------------------------------+
 766          *   63       48 47    32 31          20 19                 0
 767          */
 768
 769         for (n = 0; n < adapter->num_rx_queues; n++) {
 770                 rx_ring = adapter->rx_ring[n];
 771                 pr_info("------------------------------------\n");
 772                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 773                 pr_info("------------------------------------\n");
 774                 pr_info("%s%s%s\n",
 775                         "R  [desc]      [ PktBuf     A0] ",
 776                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 777                         "<-- Adv Rx Read format");
 778                 pr_info("%s%s%s\n",
 779                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 780                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 781                         "<-- Adv Rx Write-Back format");
 782
 783                 for (i = 0; i < rx_ring->count; i++) {
 784                         const char *ring_desc;
 785
 786                         if (i == rx_ring->next_to_use)
 787                                 ring_desc = " NTU";
 788                         else if (i == rx_ring->next_to_clean)
 789                                 ring_desc = " NTC";
 790                         else
 791                                 ring_desc = "";
 792
 793                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 794                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 795                         u0 = (struct my_u0 *)rx_desc;
 796                         if (rx_desc->wb.upper.length) {
 797                                 /* Descriptor Done */
 798                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 799                                         i,
 800                                         le64_to_cpu((__force __le64)u0->a),
 801                                         le64_to_cpu((__force __le64)u0->b),
 802                                         rx_buffer_info->skb,
 803                                         ring_desc);
 804                         } else {
 805                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 806                                         i,
 807                                         le64_to_cpu((__force __le64)u0->a),
 808                                         le64_to_cpu((__force __le64)u0->b),
 809                                         (u64)rx_buffer_info->dma,
 810                                         rx_buffer_info->skb,
 811                                         ring_desc);
 812
 813                                 if (netif_msg_pktdata(adapter) &&
 814                                     rx_buffer_info->dma) {
 815                                         print_hex_dump(KERN_INFO, "",
 816                                            DUMP_PREFIX_ADDRESS, 16, 1,
 817                                            page_address(rx_buffer_info->page) +
 818                                                     rx_buffer_info->page_offset,
 819                                            ixgbe_rx_bufsz(rx_ring), true);
 820                                 }
 821                         }
 822                 }
 823         }
 824 }
 825
 826 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 827 {
 828         u32 ctrl_ext;
 829
 830         /* Let firmware take over control of h/w */
 831         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 832         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 833                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 834 }
 835
 836 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 837 {
 838         u32 ctrl_ext;
 839
 840         /* Let firmware know the driver has taken over */
 841         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 842         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 843                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 844 }
 845
 846 /**
 847  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 848  * @adapter: pointer to adapter struct
 849  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 850  * @queue: queue to map the corresponding interrupt to
 851  * @msix_vector: the vector to map to the corresponding queue
 852  *
 853  */
 854 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 855                            u8 queue, u8 msix_vector)
 856 {
 857         u32 ivar, index;
 858         struct ixgbe_hw *hw = &adapter->hw;
 859         switch (hw->mac.type) {
 860         case ixgbe_mac_82598EB:
 861                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 862                 if (direction == -1)
 863                         direction = 0;
 864                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 865                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 866                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 867                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 868                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 869                 break;
 870         case ixgbe_mac_82599EB:
 871         case ixgbe_mac_X540:
 872         case ixgbe_mac_X550:
 873         case ixgbe_mac_X550EM_x:
 874         case ixgbe_mac_x550em_a:
 875                 if (direction == -1) {
 876                         /* other causes */
 877                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 878                         index = ((queue & 1) * 8);
 879                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 880                         ivar &= ~(0xFF << index);
 881                         ivar |= (msix_vector << index);
 882                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 883                         break;
 884                 } else {
 885                         /* tx or rx causes */
 886                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 887                         index = ((16 * (queue & 1)) + (8 * direction));
 888                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 889                         ivar &= ~(0xFF << index);
 890                         ivar |= (msix_vector << index);
 891                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 892                         break;
 893                 }
 894         default:
 895                 break;
 896         }
 897 }
 898
 899 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 900                             u64 qmask)
 901 {
 902         u32 mask;
 903
 904         switch (adapter->hw.mac.type) {
 905         case ixgbe_mac_82598EB:
 906                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 907                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 908                 break;
 909         case ixgbe_mac_82599EB:
 910         case ixgbe_mac_X540:
 911         case ixgbe_mac_X550:
 912         case ixgbe_mac_X550EM_x:
 913         case ixgbe_mac_x550em_a:
 914                 mask = (qmask & 0xFFFFFFFF);
 915                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 916                 mask = (qmask >> 32);
 917                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 918                 break;
 919         default:
 920                 break;
 921         }
 922 }
 923
 924 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 925 {
 926         struct ixgbe_hw *hw = &adapter->hw;
 927         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 928         int i;
 929         u32 data;
 930
 931         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 932             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 933                 return;
 934
 935         switch (hw->mac.type) {
 936         case ixgbe_mac_82598EB:
 937                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 938                 break;
 939         default:
 940                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 941         }
 942         hwstats->lxoffrxc += data;
 943
 944         /* refill credits (no tx hang) if we received xoff */
 945         if (!data)
 946                 return;
 947
 948         for (i = 0; i < adapter->num_tx_queues; i++)
 949                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 950                           &adapter->tx_ring[i]->state);
 951
 952         for (i = 0; i < adapter->num_xdp_queues; i++)
 953                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 954                           &adapter->xdp_ring[i]->state);
 955 }
 956
 957 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 958 {
 959         struct ixgbe_hw *hw = &adapter->hw;
 960         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 961         u32 xoff[8] = {0};
 962         u8 tc;
 963         int i;
 964         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 965
 966         if (adapter->ixgbe_ieee_pfc)
 967                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 968
 969         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 970                 ixgbe_update_xoff_rx_lfc(adapter);
 971                 return;
 972         }
 973
 974         /* update stats for each tc, only valid with PFC enabled */
 975         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 976                 u32 pxoffrxc;
 977
 978                 switch (hw->mac.type) {
 979                 case ixgbe_mac_82598EB:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 981                         break;
 982                 default:
 983                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 984                 }
 985                 hwstats->pxoffrxc[i] += pxoffrxc;
 986                 /* Get the TC for given UP */
 987                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 988                 xoff[tc] += pxoffrxc;
 989         }
 990
 991         /* disarm tx queues that have received xoff frames */
 992         for (i = 0; i < adapter->num_tx_queues; i++) {
 993                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 994
 995                 tc = tx_ring->dcb_tc;
 996                 if (xoff[tc])
 997                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 998         }
 999
1000         for (i = 0; i < adapter->num_xdp_queues; i++) {
1001                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1002
1003                 tc = xdp_ring->dcb_tc;
1004                 if (xoff[tc])
1005                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1006         }
1007 }
1008
1009 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1010 {
1011         return ring->stats.packets;
1012 }
1013
1014 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1015 {
1016         unsigned int head, tail;
1017
1018         head = ring->next_to_clean;
1019         tail = ring->next_to_use;
1020
1021         return ((head <= tail) ? tail : tail + ring->count) - head;
1022 }
1023
1024 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1025 {
1026         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1027         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1028         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1029
1030         clear_check_for_tx_hang(tx_ring);
1031
1032         /*
1033          * Check for a hung queue, but be thorough. This verifies
1034          * that a transmit has been completed since the previous
1035          * check AND there is at least one packet pending. The
1036          * ARMED bit is set to indicate a potential hang. The
1037          * bit is cleared if a pause frame is received to remove
1038          * false hang detection due to PFC or 802.3x frames. By
1039          * requiring this to fail twice we avoid races with
1040          * pfc clearing the ARMED bit and conditions where we
1041          * run the check_tx_hang logic with a transmit completion
1042          * pending but without time to complete it yet.
1043          */
1044         if (tx_done_old == tx_done && tx_pending)
1045                 /* make sure it is true for two checks in a row */
1046                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1047                                         &tx_ring->state);
1048         /* update completed stats and continue */
1049         tx_ring->tx_stats.tx_done_old = tx_done;
1050         /* reset the countdown */
1051         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1052
1053         return false;
1054 }
1055
1056 /**
1057  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1058  * @adapter: driver private struct
1059  **/
1060 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1061 {
1062
1063         /* Do the reset outside of interrupt context */
1064         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1065                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1066                 e_warn(drv, "initiating reset due to tx timeout\n");
1067                 ixgbe_service_event_schedule(adapter);
1068         }
1069 }
1070
1071 /**
1072  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1073  * @netdev: network interface device structure
1074  * @queue_index: Tx queue to set
1075  * @maxrate: desired maximum transmit bitrate
1076  **/
1077 static int ixgbe_tx_maxrate(struct net_device *netdev,
1078                             int queue_index, u32 maxrate)
1079 {
1080         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1081         struct ixgbe_hw *hw = &adapter->hw;
1082         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1083
1084         if (!maxrate)
1085                 return 0;
1086
1087         /* Calculate the rate factor values to set */
1088         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1089         bcnrc_val /= maxrate;
1090
1091         /* clear everything but the rate factor */
1092         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1093         IXGBE_RTTBCNRC_RF_DEC_MASK;
1094
1095         /* enable the rate scheduler */
1096         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1097
1098         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1099         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1100
1101         return 0;
1102 }
1103
1104 /**
1105  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1106  * @q_vector: structure containing interrupt and ring information
1107  * @tx_ring: tx ring to clean
1108  * @napi_budget: Used to determine if we are in netpoll
1109  **/
1110 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1111                                struct ixgbe_ring *tx_ring, int napi_budget)
1112 {
1113         struct ixgbe_adapter *adapter = q_vector->adapter;
1114         struct ixgbe_tx_buffer *tx_buffer;
1115         union ixgbe_adv_tx_desc *tx_desc;
1116         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1117         unsigned int budget = q_vector->tx.work_limit;
1118         unsigned int i = tx_ring->next_to_clean;
1119
1120         if (test_bit(__IXGBE_DOWN, &adapter->state))
1121                 return true;
1122
1123         tx_buffer = &tx_ring->tx_buffer_info[i];
1124         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1125         i -= tx_ring->count;
1126
1127         do {
1128                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1129
1130                 /* if next_to_watch is not set then there is no work pending */
1131                 if (!eop_desc)
1132                         break;
1133
1134                 /* prevent any other reads prior to eop_desc */
1135                 smp_rmb();
1136
1137                 /* if DD is not set pending work has not been completed */
1138                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1139                         break;
1140
1141                 /* clear next_to_watch to prevent false hangs */
1142                 tx_buffer->next_to_watch = NULL;
1143
1144                 /* update the statistics for this packet */
1145                 total_bytes += tx_buffer->bytecount;
1146                 total_packets += tx_buffer->gso_segs;
1147                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1148                         total_ipsec++;
1149
1150                 /* free the skb */
1151                 if (ring_is_xdp(tx_ring))
1152                         xdp_return_frame(tx_buffer->xdpf);
1153                 else
1154                         napi_consume_skb(tx_buffer->skb, napi_budget);
1155
1156                 /* unmap skb header data */
1157                 dma_unmap_single(tx_ring->dev,
1158                                  dma_unmap_addr(tx_buffer, dma),
1159                                  dma_unmap_len(tx_buffer, len),
1160                                  DMA_TO_DEVICE);
1161
1162                 /* clear tx_buffer data */
1163                 dma_unmap_len_set(tx_buffer, len, 0);
1164
1165                 /* unmap remaining buffers */
1166                 while (tx_desc != eop_desc) {
1167                         tx_buffer++;
1168                         tx_desc++;
1169                         i++;
1170                         if (unlikely(!i)) {
1171                                 i -= tx_ring->count;
1172                                 tx_buffer = tx_ring->tx_buffer_info;
1173                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1174                         }
1175
1176                         /* unmap any remaining paged data */
1177                         if (dma_unmap_len(tx_buffer, len)) {
1178                                 dma_unmap_page(tx_ring->dev,
1179                                                dma_unmap_addr(tx_buffer, dma),
1180                                                dma_unmap_len(tx_buffer, len),
1181                                                DMA_TO_DEVICE);
1182                                 dma_unmap_len_set(tx_buffer, len, 0);
1183                         }
1184                 }
1185
1186                 /* move us one more past the eop_desc for start of next pkt */
1187                 tx_buffer++;
1188                 tx_desc++;
1189                 i++;
1190                 if (unlikely(!i)) {
1191                         i -= tx_ring->count;
1192                         tx_buffer = tx_ring->tx_buffer_info;
1193                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1194                 }
1195
1196                 /* issue prefetch for next Tx descriptor */
1197                 prefetch(tx_desc);
1198
1199                 /* update budget accounting */
1200                 budget--;
1201         } while (likely(budget));
1202
1203         i += tx_ring->count;
1204         tx_ring->next_to_clean = i;
1205         u64_stats_update_begin(&tx_ring->syncp);
1206         tx_ring->stats.bytes += total_bytes;
1207         tx_ring->stats.packets += total_packets;
1208         u64_stats_update_end(&tx_ring->syncp);
1209         q_vector->tx.total_bytes += total_bytes;
1210         q_vector->tx.total_packets += total_packets;
1211         adapter->tx_ipsec += total_ipsec;
1212
1213         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1214                 /* schedule immediate reset if we believe we hung */
1215                 struct ixgbe_hw *hw = &adapter->hw;
1216                 e_err(drv, "Detected Tx Unit Hang %s\n"
1217                         "  Tx Queue             <%d>\n"
1218                         "  TDH, TDT             <%x>, <%x>\n"
1219                         "  next_to_use          <%x>\n"
1220                         "  next_to_clean        <%x>\n"
1221                         "tx_buffer_info[next_to_clean]\n"
1222                         "  time_stamp           <%lx>\n"
1223                         "  jiffies              <%lx>\n",
1224                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1225                         tx_ring->queue_index,
1226                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1227                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1228                         tx_ring->next_to_use, i,
1229                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1230
1231                 if (!ring_is_xdp(tx_ring))
1232                         netif_stop_subqueue(tx_ring->netdev,
1233                                             tx_ring->queue_index);
1234
1235                 e_info(probe,
1236                        "tx hang %d detected on queue %d, resetting adapter\n",
1237                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1238
1239                 /* schedule immediate reset if we believe we hung */
1240                 ixgbe_tx_timeout_reset(adapter);
1241
1242                 /* the adapter is about to reset, no point in enabling stuff */
1243                 return true;
1244         }
1245
1246         if (ring_is_xdp(tx_ring))
1247                 return !!budget;
1248
1249         netdev_tx_completed_queue(txring_txq(tx_ring),
1250                                   total_packets, total_bytes);
1251
1252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1253         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1254                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1255                 /* Make sure that anybody stopping the queue after this
1256                  * sees the new next_to_clean.
1257                  */
1258                 smp_mb();
1259                 if (__netif_subqueue_stopped(tx_ring->netdev,
1260                                              tx_ring->queue_index)
1261                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1262                         netif_wake_subqueue(tx_ring->netdev,
1263                                             tx_ring->queue_index);
1264                         ++tx_ring->tx_stats.restart_queue;
1265                 }
1266         }
1267
1268         return !!budget;
1269 }
1270
1271 #ifdef CONFIG_IXGBE_DCA
1272 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1273                                 struct ixgbe_ring *tx_ring,
1274                                 int cpu)
1275 {
1276         struct ixgbe_hw *hw = &adapter->hw;
1277         u32 txctrl = 0;
1278         u16 reg_offset;
1279
1280         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1281                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1282
1283         switch (hw->mac.type) {
1284         case ixgbe_mac_82598EB:
1285                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1286                 break;
1287         case ixgbe_mac_82599EB:
1288         case ixgbe_mac_X540:
1289                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1290                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1291                 break;
1292         default:
1293                 /* for unknown hardware do not write register */
1294                 return;
1295         }
1296
1297         /*
1298          * We can enable relaxed ordering for reads, but not writes when
1299          * DCA is enabled.  This is due to a known issue in some chipsets
1300          * which will cause the DCA tag to be cleared.
1301          */
1302         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1303                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1304                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1305
1306         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1307 }
1308
1309 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1310                                 struct ixgbe_ring *rx_ring,
1311                                 int cpu)
1312 {
1313         struct ixgbe_hw *hw = &adapter->hw;
1314         u32 rxctrl = 0;
1315         u8 reg_idx = rx_ring->reg_idx;
1316
1317         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1318                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1319
1320         switch (hw->mac.type) {
1321         case ixgbe_mac_82599EB:
1322         case ixgbe_mac_X540:
1323                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1324                 break;
1325         default:
1326                 break;
1327         }
1328
1329         /*
1330          * We can enable relaxed ordering for reads, but not writes when
1331          * DCA is enabled.  This is due to a known issue in some chipsets
1332          * which will cause the DCA tag to be cleared.
1333          */
1334         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1335                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1336                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1337
1338         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1339 }
1340
1341 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1342 {
1343         struct ixgbe_adapter *adapter = q_vector->adapter;
1344         struct ixgbe_ring *ring;
1345         int cpu = get_cpu();
1346
1347         if (q_vector->cpu == cpu)
1348                 goto out_no_update;
1349
1350         ixgbe_for_each_ring(ring, q_vector->tx)
1351                 ixgbe_update_tx_dca(adapter, ring, cpu);
1352
1353         ixgbe_for_each_ring(ring, q_vector->rx)
1354                 ixgbe_update_rx_dca(adapter, ring, cpu);
1355
1356         q_vector->cpu = cpu;
1357 out_no_update:
1358         put_cpu();
1359 }
1360
1361 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1362 {
1363         int i;
1364
1365         /* always use CB2 mode, difference is masked in the CB driver */
1366         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1369         else
1370                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1371                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1372
1373         for (i = 0; i < adapter->num_q_vectors; i++) {
1374                 adapter->q_vector[i]->cpu = -1;
1375                 ixgbe_update_dca(adapter->q_vector[i]);
1376         }
1377 }
1378
1379 static int __ixgbe_notify_dca(struct device *dev, void *data)
1380 {
1381         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1382         unsigned long event = *(unsigned long *)data;
1383
1384         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1385                 return 0;
1386
1387         switch (event) {
1388         case DCA_PROVIDER_ADD:
1389                 /* if we're already enabled, don't do it again */
1390                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1391                         break;
1392                 if (dca_add_requester(dev) == 0) {
1393                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1394                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1395                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1396                         break;
1397                 }
1398                 fallthrough; /* DCA is disabled. */
1399         case DCA_PROVIDER_REMOVE:
1400                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1401                         dca_remove_requester(dev);
1402                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1403                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1405                 }
1406                 break;
1407         }
1408
1409         return 0;
1410 }
1411
1412 #endif /* CONFIG_IXGBE_DCA */
1413
1414 #define IXGBE_RSS_L4_TYPES_MASK \
1415         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1416          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1417          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1418          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1419
1420 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1421                                  union ixgbe_adv_rx_desc *rx_desc,
1422                                  struct sk_buff *skb)
1423 {
1424         u16 rss_type;
1425
1426         if (!(ring->netdev->features & NETIF_F_RXHASH))
1427                 return;
1428
1429         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1430                    IXGBE_RXDADV_RSSTYPE_MASK;
1431
1432         if (!rss_type)
1433                 return;
1434
1435         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1436                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1437                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1438 }
1439
1440 #ifdef IXGBE_FCOE
1441 /**
1442  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1443  * @ring: structure containing ring specific data
1444  * @rx_desc: advanced rx descriptor
1445  *
1446  * Returns : true if it is FCoE pkt
1447  */
1448 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1449                                     union ixgbe_adv_rx_desc *rx_desc)
1450 {
1451         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1452
1453         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1454                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1455                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1456                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1457 }
1458
1459 #endif /* IXGBE_FCOE */
1460 /**
1461  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1462  * @ring: structure containing ring specific data
1463  * @rx_desc: current Rx descriptor being processed
1464  * @skb: skb currently being received and modified
1465  **/
1466 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1467                                      union ixgbe_adv_rx_desc *rx_desc,
1468                                      struct sk_buff *skb)
1469 {
1470         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1471         bool encap_pkt = false;
1472
1473         skb_checksum_none_assert(skb);
1474
1475         /* Rx csum disabled */
1476         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1477                 return;
1478
1479         /* check for VXLAN and Geneve packets */
1480         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1481                 encap_pkt = true;
1482                 skb->encapsulation = 1;
1483         }
1484
1485         /* if IP and error */
1486         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1487             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1488                 ring->rx_stats.csum_err++;
1489                 return;
1490         }
1491
1492         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1493                 return;
1494
1495         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1496                 /*
1497                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1498                  * checksum errors.
1499                  */
1500                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1501                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1502                         return;
1503
1504                 ring->rx_stats.csum_err++;
1505                 return;
1506         }
1507
1508         /* It must be a TCP or UDP packet with a valid checksum */
1509         skb->ip_summed = CHECKSUM_UNNECESSARY;
1510         if (encap_pkt) {
1511                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1512                         return;
1513
1514                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1515                         skb->ip_summed = CHECKSUM_NONE;
1516                         return;
1517                 }
1518                 /* If we checked the outer header let the stack know */
1519                 skb->csum_level = 1;
1520         }
1521 }
1522
1523 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1524 {
1525         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1526 }
1527
1528 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1529                                     struct ixgbe_rx_buffer *bi)
1530 {
1531         struct page *page = bi->page;
1532         dma_addr_t dma;
1533
1534         /* since we are recycling buffers we should seldom need to alloc */
1535         if (likely(page))
1536                 return true;
1537
1538         /* alloc new page for storage */
1539         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1540         if (unlikely(!page)) {
1541                 rx_ring->rx_stats.alloc_rx_page_failed++;
1542                 return false;
1543         }
1544
1545         /* map page for use */
1546         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1547                                  ixgbe_rx_pg_size(rx_ring),
1548                                  DMA_FROM_DEVICE,
1549                                  IXGBE_RX_DMA_ATTR);
1550
1551         /*
1552          * if mapping failed free memory back to system since
1553          * there isn't much point in holding memory we can't use
1554          */
1555         if (dma_mapping_error(rx_ring->dev, dma)) {
1556                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1557
1558                 rx_ring->rx_stats.alloc_rx_page_failed++;
1559                 return false;
1560         }
1561
1562         bi->dma = dma;
1563         bi->page = page;
1564         bi->page_offset = ixgbe_rx_offset(rx_ring);
1565         page_ref_add(page, USHRT_MAX - 1);
1566         bi->pagecnt_bias = USHRT_MAX;
1567         rx_ring->rx_stats.alloc_rx_page++;
1568
1569         return true;
1570 }
1571
1572 /**
1573  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1574  * @rx_ring: ring to place buffers on
1575  * @cleaned_count: number of buffers to replace
1576  **/
1577 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1578 {
1579         union ixgbe_adv_rx_desc *rx_desc;
1580         struct ixgbe_rx_buffer *bi;
1581         u16 i = rx_ring->next_to_use;
1582         u16 bufsz;
1583
1584         /* nothing to do */
1585         if (!cleaned_count)
1586                 return;
1587
1588         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1589         bi = &rx_ring->rx_buffer_info[i];
1590         i -= rx_ring->count;
1591
1592         bufsz = ixgbe_rx_bufsz(rx_ring);
1593
1594         do {
1595                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1596                         break;
1597
1598                 /* sync the buffer for use by the device */
1599                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1600                                                  bi->page_offset, bufsz,
1601                                                  DMA_FROM_DEVICE);
1602
1603                 /*
1604                  * Refresh the desc even if buffer_addrs didn't change
1605                  * because each write-back erases this info.
1606                  */
1607                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1608
1609                 rx_desc++;
1610                 bi++;
1611                 i++;
1612                 if (unlikely(!i)) {
1613                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1614                         bi = rx_ring->rx_buffer_info;
1615                         i -= rx_ring->count;
1616                 }
1617
1618                 /* clear the length for the next_to_use descriptor */
1619                 rx_desc->wb.upper.length = 0;
1620
1621                 cleaned_count--;
1622         } while (cleaned_count);
1623
1624         i += rx_ring->count;
1625
1626         if (rx_ring->next_to_use != i) {
1627                 rx_ring->next_to_use = i;
1628
1629                 /* update next to alloc since we have filled the ring */
1630                 rx_ring->next_to_alloc = i;
1631
1632                 /* Force memory writes to complete before letting h/w
1633                  * know there are new descriptors to fetch.  (Only
1634                  * applicable for weak-ordered memory model archs,
1635                  * such as IA-64).
1636                  */
1637                 wmb();
1638                 writel(i, rx_ring->tail);
1639         }
1640 }
1641
1642 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1643                                    struct sk_buff *skb)
1644 {
1645         u16 hdr_len = skb_headlen(skb);
1646
1647         /* set gso_size to avoid messing up TCP MSS */
1648         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1649                                                  IXGBE_CB(skb)->append_cnt);
1650         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1651 }
1652
1653 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1654                                    struct sk_buff *skb)
1655 {
1656         /* if append_cnt is 0 then frame is not RSC */
1657         if (!IXGBE_CB(skb)->append_cnt)
1658                 return;
1659
1660         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1661         rx_ring->rx_stats.rsc_flush++;
1662
1663         ixgbe_set_rsc_gso_size(rx_ring, skb);
1664
1665         /* gso_size is computed using append_cnt so always clear it last */
1666         IXGBE_CB(skb)->append_cnt = 0;
1667 }
1668
1669 /**
1670  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1671  * @rx_ring: rx descriptor ring packet is being transacted on
1672  * @rx_desc: pointer to the EOP Rx descriptor
1673  * @skb: pointer to current skb being populated
1674  *
1675  * This function checks the ring, descriptor, and packet information in
1676  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1677  * other fields within the skb.
1678  **/
1679 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1680                               union ixgbe_adv_rx_desc *rx_desc,
1681                               struct sk_buff *skb)
1682 {
1683         struct net_device *dev = rx_ring->netdev;
1684         u32 flags = rx_ring->q_vector->adapter->flags;
1685
1686         ixgbe_update_rsc_stats(rx_ring, skb);
1687
1688         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1689
1690         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1691
1692         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1693                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1694
1695         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1696             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1697                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1698                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1699         }
1700
1701         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1702                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1703
1704         /* record Rx queue, or update MACVLAN statistics */
1705         if (netif_is_ixgbe(dev))
1706                 skb_record_rx_queue(skb, rx_ring->queue_index);
1707         else
1708                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1709                                  false);
1710
1711         skb->protocol = eth_type_trans(skb, dev);
1712 }
1713
1714 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1715                   struct sk_buff *skb)
1716 {
1717         napi_gro_receive(&q_vector->napi, skb);
1718 }
1719
1720 /**
1721  * ixgbe_is_non_eop - process handling of non-EOP buffers
1722  * @rx_ring: Rx ring being processed
1723  * @rx_desc: Rx descriptor for current buffer
1724  * @skb: Current socket buffer containing buffer in progress
1725  *
1726  * This function updates next to clean.  If the buffer is an EOP buffer
1727  * this function exits returning false, otherwise it will place the
1728  * sk_buff in the next buffer to be chained and return true indicating
1729  * that this is in fact a non-EOP buffer.
1730  **/
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1732                              union ixgbe_adv_rx_desc *rx_desc,
1733                              struct sk_buff *skb)
1734 {
1735         u32 ntc = rx_ring->next_to_clean + 1;
1736
1737         /* fetch, update, and store next to clean */
1738         ntc = (ntc < rx_ring->count) ? ntc : 0;
1739         rx_ring->next_to_clean = ntc;
1740
1741         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1742
1743         /* update RSC append count if present */
1744         if (ring_is_rsc_enabled(rx_ring)) {
1745                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1746                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1747
1748                 if (unlikely(rsc_enabled)) {
1749                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1750
1751                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1752                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1753
1754                         /* update ntc based on RSC value */
1755                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1756                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1757                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1758                 }
1759         }
1760
1761         /* if we are the last buffer then there is nothing else to do */
1762         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1763                 return false;
1764
1765         /* place skb in next buffer to be received */
1766         rx_ring->rx_buffer_info[ntc].skb = skb;
1767         rx_ring->rx_stats.non_eop_descs++;
1768
1769         return true;
1770 }
1771
1772 /**
1773  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774  * @rx_ring: rx descriptor ring packet is being transacted on
1775  * @skb: pointer to current skb being adjusted
1776  *
1777  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1778  * main difference between this version and the original function is that
1779  * this function can make several assumptions about the state of things
1780  * that allow for significant optimizations versus the standard function.
1781  * As a result we can do things like drop a frag and maintain an accurate
1782  * truesize for the skb.
1783  */
1784 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1785                             struct sk_buff *skb)
1786 {
1787         skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1788         unsigned char *va;
1789         unsigned int pull_len;
1790
1791         /*
1792          * it is valid to use page_address instead of kmap since we are
1793          * working with pages allocated out of the lomem pool per
1794          * alloc_page(GFP_ATOMIC)
1795          */
1796         va = skb_frag_address(frag);
1797
1798         /*
1799          * we need the header to contain the greater of either ETH_HLEN or
1800          * 60 bytes if the skb->len is less than 60 for skb_pad.
1801          */
1802         pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1803
1804         /* align pull length to size of long to optimize memcpy performance */
1805         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1806
1807         /* update all of the pointers */
1808         skb_frag_size_sub(frag, pull_len);
1809         skb_frag_off_add(frag, pull_len);
1810         skb->data_len -= pull_len;
1811         skb->tail += pull_len;
1812 }
1813
1814 /**
1815  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816  * @rx_ring: rx descriptor ring packet is being transacted on
1817  * @skb: pointer to current skb being updated
1818  *
1819  * This function provides a basic DMA sync up for the first fragment of an
1820  * skb.  The reason for doing this is that the first fragment cannot be
1821  * unmapped until we have reached the end of packet descriptor for a buffer
1822  * chain.
1823  */
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1825                                 struct sk_buff *skb)
1826 {
1827         if (ring_uses_build_skb(rx_ring)) {
1828                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1829
1830                 dma_sync_single_range_for_cpu(rx_ring->dev,
1831                                               IXGBE_CB(skb)->dma,
1832                                               offset,
1833                                               skb_headlen(skb),
1834                                               DMA_FROM_DEVICE);
1835         } else {
1836                 skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1837
1838                 dma_sync_single_range_for_cpu(rx_ring->dev,
1839                                               IXGBE_CB(skb)->dma,
1840                                               skb_frag_off(frag),
1841                                               skb_frag_size(frag),
1842                                               DMA_FROM_DEVICE);
1843         }
1844
1845         /* If the page was released, just unmap it. */
1846         if (unlikely(IXGBE_CB(skb)->page_released)) {
1847                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1848                                      ixgbe_rx_pg_size(rx_ring),
1849                                      DMA_FROM_DEVICE,
1850                                      IXGBE_RX_DMA_ATTR);
1851         }
1852 }
1853
1854 /**
1855  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1856  * @rx_ring: rx descriptor ring packet is being transacted on
1857  * @rx_desc: pointer to the EOP Rx descriptor
1858  * @skb: pointer to current skb being fixed
1859  *
1860  * Check if the skb is valid in the XDP case it will be an error pointer.
1861  * Return true in this case to abort processing and advance to next
1862  * descriptor.
1863  *
1864  * Check for corrupted packet headers caused by senders on the local L2
1865  * embedded NIC switch not setting up their Tx Descriptors right.  These
1866  * should be very rare.
1867  *
1868  * Also address the case where we are pulling data in on pages only
1869  * and as such no data is present in the skb header.
1870  *
1871  * In addition if skb is not at least 60 bytes we need to pad it so that
1872  * it is large enough to qualify as a valid Ethernet frame.
1873  *
1874  * Returns true if an error was encountered and skb was freed.
1875  **/
1876 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1877                            union ixgbe_adv_rx_desc *rx_desc,
1878                            struct sk_buff *skb)
1879 {
1880         struct net_device *netdev = rx_ring->netdev;
1881
1882         /* XDP packets use error pointer so abort at this point */
1883         if (IS_ERR(skb))
1884                 return true;
1885
1886         /* Verify netdev is present, and that packet does not have any
1887          * errors that would be unacceptable to the netdev.
1888          */
1889         if (!netdev ||
1890             (unlikely(ixgbe_test_staterr(rx_desc,
1891                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1892              !(netdev->features & NETIF_F_RXALL)))) {
1893                 dev_kfree_skb_any(skb);
1894                 return true;
1895         }
1896
1897         /* place header in linear portion of buffer */
1898         if (!skb_headlen(skb))
1899                 ixgbe_pull_tail(rx_ring, skb);
1900
1901 #ifdef IXGBE_FCOE
1902         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1903         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1904                 return false;
1905
1906 #endif
1907         /* if eth_skb_pad returns an error the skb was freed */
1908         if (eth_skb_pad(skb))
1909                 return true;
1910
1911         return false;
1912 }
1913
1914 /**
1915  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1916  * @rx_ring: rx descriptor ring to store buffers on
1917  * @old_buff: donor buffer to have page reused
1918  *
1919  * Synchronizes page for reuse by the adapter
1920  **/
1921 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1922                                 struct ixgbe_rx_buffer *old_buff)
1923 {
1924         struct ixgbe_rx_buffer *new_buff;
1925         u16 nta = rx_ring->next_to_alloc;
1926
1927         new_buff = &rx_ring->rx_buffer_info[nta];
1928
1929         /* update, and store next to alloc */
1930         nta++;
1931         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1932
1933         /* Transfer page from old buffer to new buffer.
1934          * Move each member individually to avoid possible store
1935          * forwarding stalls and unnecessary copy of skb.
1936          */
1937         new_buff->dma           = old_buff->dma;
1938         new_buff->page          = old_buff->page;
1939         new_buff->page_offset   = old_buff->page_offset;
1940         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1941 }
1942
1943 static inline bool ixgbe_page_is_reserved(struct page *page)
1944 {
1945         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1946 }
1947
1948 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1949 {
1950         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1951         struct page *page = rx_buffer->page;
1952
1953         /* avoid re-using remote pages */
1954         if (unlikely(ixgbe_page_is_reserved(page)))
1955                 return false;
1956
1957 #if (PAGE_SIZE < 8192)
1958         /* if we are only owner of page we can reuse it */
1959         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1960                 return false;
1961 #else
1962         /* The last offset is a bit aggressive in that we assume the
1963          * worst case of FCoE being enabled and using a 3K buffer.
1964          * However this should have minimal impact as the 1K extra is
1965          * still less than one buffer in size.
1966          */
1967 #define IXGBE_LAST_OFFSET \
1968         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1969         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1970                 return false;
1971 #endif
1972
1973         /* If we have drained the page fragment pool we need to update
1974          * the pagecnt_bias and page count so that we fully restock the
1975          * number of references the driver holds.
1976          */
1977         if (unlikely(pagecnt_bias == 1)) {
1978                 page_ref_add(page, USHRT_MAX - 1);
1979                 rx_buffer->pagecnt_bias = USHRT_MAX;
1980         }
1981
1982         return true;
1983 }
1984
1985 /**
1986  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1987  * @rx_ring: rx descriptor ring to transact packets on
1988  * @rx_buffer: buffer containing page to add
1989  * @skb: sk_buff to place the data into
1990  * @size: size of data in rx_buffer
1991  *
1992  * This function will add the data contained in rx_buffer->page to the skb.
1993  * This is done either through a direct copy if the data in the buffer is
1994  * less than the skb header size, otherwise it will just attach the page as
1995  * a frag to the skb.
1996  *
1997  * The function will then update the page offset if necessary and return
1998  * true if the buffer can be reused by the adapter.
1999  **/
2000 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2001                               struct ixgbe_rx_buffer *rx_buffer,
2002                               struct sk_buff *skb,
2003                               unsigned int size)
2004 {
2005 #if (PAGE_SIZE < 8192)
2006         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2007 #else
2008         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2009                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2010                                 SKB_DATA_ALIGN(size);
2011 #endif
2012         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2013                         rx_buffer->page_offset, size, truesize);
2014 #if (PAGE_SIZE < 8192)
2015         rx_buffer->page_offset ^= truesize;
2016 #else
2017         rx_buffer->page_offset += truesize;
2018 #endif
2019 }
2020
2021 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2022                                                    union ixgbe_adv_rx_desc *rx_desc,
2023                                                    struct sk_buff **skb,
2024                                                    const unsigned int size)
2025 {
2026         struct ixgbe_rx_buffer *rx_buffer;
2027
2028         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2029         prefetchw(rx_buffer->page);
2030         *skb = rx_buffer->skb;
2031
2032         /* Delay unmapping of the first packet. It carries the header
2033          * information, HW may still access the header after the writeback.
2034          * Only unmap it when EOP is reached
2035          */
2036         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2037                 if (!*skb)
2038                         goto skip_sync;
2039         } else {
2040                 if (*skb)
2041                         ixgbe_dma_sync_frag(rx_ring, *skb);
2042         }
2043
2044         /* we are reusing so sync this buffer for CPU use */
2045         dma_sync_single_range_for_cpu(rx_ring->dev,
2046                                       rx_buffer->dma,
2047                                       rx_buffer->page_offset,
2048                                       size,
2049                                       DMA_FROM_DEVICE);
2050 skip_sync:
2051         rx_buffer->pagecnt_bias--;
2052
2053         return rx_buffer;
2054 }
2055
2056 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2057                                 struct ixgbe_rx_buffer *rx_buffer,
2058                                 struct sk_buff *skb)
2059 {
2060         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2061                 /* hand second half of page back to the ring */
2062                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2063         } else {
2064                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2065                         /* the page has been released from the ring */
2066                         IXGBE_CB(skb)->page_released = true;
2067                 } else {
2068                         /* we are not reusing the buffer so unmap it */
2069                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2070                                              ixgbe_rx_pg_size(rx_ring),
2071                                              DMA_FROM_DEVICE,
2072                                              IXGBE_RX_DMA_ATTR);
2073                 }
2074                 __page_frag_cache_drain(rx_buffer->page,
2075                                         rx_buffer->pagecnt_bias);
2076         }
2077
2078         /* clear contents of rx_buffer */
2079         rx_buffer->page = NULL;
2080         rx_buffer->skb = NULL;
2081 }
2082
2083 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2084                                            struct ixgbe_rx_buffer *rx_buffer,
2085                                            struct xdp_buff *xdp,
2086                                            union ixgbe_adv_rx_desc *rx_desc)
2087 {
2088         unsigned int size = xdp->data_end - xdp->data;
2089 #if (PAGE_SIZE < 8192)
2090         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2091 #else
2092         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2093                                                xdp->data_hard_start);
2094 #endif
2095         struct sk_buff *skb;
2096
2097         /* prefetch first cache line of first page */
2098         prefetch(xdp->data);
2099 #if L1_CACHE_BYTES < 128
2100         prefetch(xdp->data + L1_CACHE_BYTES);
2101 #endif
2102         /* Note, we get here by enabling legacy-rx via:
2103          *
2104          *    ethtool --set-priv-flags <dev> legacy-rx on
2105          *
2106          * In this mode, we currently get 0 extra XDP headroom as
2107          * opposed to having legacy-rx off, where we process XDP
2108          * packets going to stack via ixgbe_build_skb(). The latter
2109          * provides us currently with 192 bytes of headroom.
2110          *
2111          * For ixgbe_construct_skb() mode it means that the
2112          * xdp->data_meta will always point to xdp->data, since
2113          * the helper cannot expand the head. Should this ever
2114          * change in future for legacy-rx mode on, then lets also
2115          * add xdp->data_meta handling here.
2116          */
2117
2118         /* allocate a skb to store the frags */
2119         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2120         if (unlikely(!skb))
2121                 return NULL;
2122
2123         if (size > IXGBE_RX_HDR_SIZE) {
2124                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2125                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2126
2127                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2128                                 xdp->data - page_address(rx_buffer->page),
2129                                 size, truesize);
2130 #if (PAGE_SIZE < 8192)
2131                 rx_buffer->page_offset ^= truesize;
2132 #else
2133                 rx_buffer->page_offset += truesize;
2134 #endif
2135         } else {
2136                 memcpy(__skb_put(skb, size),
2137                        xdp->data, ALIGN(size, sizeof(long)));
2138                 rx_buffer->pagecnt_bias++;
2139         }
2140
2141         return skb;
2142 }
2143
2144 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2145                                        struct ixgbe_rx_buffer *rx_buffer,
2146                                        struct xdp_buff *xdp,
2147                                        union ixgbe_adv_rx_desc *rx_desc)
2148 {
2149         unsigned int metasize = xdp->data - xdp->data_meta;
2150 #if (PAGE_SIZE < 8192)
2151         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2152 #else
2153         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2154                                 SKB_DATA_ALIGN(xdp->data_end -
2155                                                xdp->data_hard_start);
2156 #endif
2157         struct sk_buff *skb;
2158
2159         /* Prefetch first cache line of first page. If xdp->data_meta
2160          * is unused, this points extactly as xdp->data, otherwise we
2161          * likely have a consumer accessing first few bytes of meta
2162          * data, and then actual data.
2163          */
2164         prefetch(xdp->data_meta);
2165 #if L1_CACHE_BYTES < 128
2166         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2167 #endif
2168
2169         /* build an skb to around the page buffer */
2170         skb = build_skb(xdp->data_hard_start, truesize);
2171         if (unlikely(!skb))
2172                 return NULL;
2173
2174         /* update pointers within the skb to store the data */
2175         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2176         __skb_put(skb, xdp->data_end - xdp->data);
2177         if (metasize)
2178                 skb_metadata_set(skb, metasize);
2179
2180         /* record DMA address if this is the start of a chain of buffers */
2181         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2182                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2183
2184         /* update buffer offset */
2185 #if (PAGE_SIZE < 8192)
2186         rx_buffer->page_offset ^= truesize;
2187 #else
2188         rx_buffer->page_offset += truesize;
2189 #endif
2190
2191         return skb;
2192 }
2193
2194 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2195                                      struct ixgbe_ring *rx_ring,
2196                                      struct xdp_buff *xdp)
2197 {
2198         int err, result = IXGBE_XDP_PASS;
2199         struct bpf_prog *xdp_prog;
2200         struct xdp_frame *xdpf;
2201         u32 act;
2202
2203         rcu_read_lock();
2204         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2205
2206         if (!xdp_prog)
2207                 goto xdp_out;
2208
2209         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2210
2211         act = bpf_prog_run_xdp(xdp_prog, xdp);
2212         switch (act) {
2213         case XDP_PASS:
2214                 break;
2215         case XDP_TX:
2216                 xdpf = xdp_convert_buff_to_frame(xdp);
2217                 if (unlikely(!xdpf)) {
2218                         result = IXGBE_XDP_CONSUMED;
2219                         break;
2220                 }
2221                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2222                 break;
2223         case XDP_REDIRECT:
2224                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2225                 if (!err)
2226                         result = IXGBE_XDP_REDIR;
2227                 else
2228                         result = IXGBE_XDP_CONSUMED;
2229                 break;
2230         default:
2231                 bpf_warn_invalid_xdp_action(act);
2232                 fallthrough;
2233         case XDP_ABORTED:
2234                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2235                 fallthrough; /* handle aborts by dropping packet */
2236         case XDP_DROP:
2237                 result = IXGBE_XDP_CONSUMED;
2238                 break;
2239         }
2240 xdp_out:
2241         rcu_read_unlock();
2242         return ERR_PTR(-result);
2243 }
2244
2245 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring,
2246                                             unsigned int size)
2247 {
2248         unsigned int truesize;
2249
2250 #if (PAGE_SIZE < 8192)
2251         truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
2252 #else
2253         truesize = ring_uses_build_skb(rx_ring) ?
2254                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2255                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2256                 SKB_DATA_ALIGN(size);
2257 #endif
2258         return truesize;
2259 }
2260
2261 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2262                                  struct ixgbe_rx_buffer *rx_buffer,
2263                                  unsigned int size)
2264 {
2265         unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size);
2266 #if (PAGE_SIZE < 8192)
2267         rx_buffer->page_offset ^= truesize;
2268 #else
2269         rx_buffer->page_offset += truesize;
2270 #endif
2271 }
2272
2273 /**
2274  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2275  * @q_vector: structure containing interrupt and ring information
2276  * @rx_ring: rx descriptor ring to transact packets on
2277  * @budget: Total limit on number of packets to process
2278  *
2279  * This function provides a "bounce buffer" approach to Rx interrupt
2280  * processing.  The advantage to this is that on systems that have
2281  * expensive overhead for IOMMU access this provides a means of avoiding
2282  * it by maintaining the mapping of the page to the syste.
2283  *
2284  * Returns amount of work completed
2285  **/
2286 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2287                                struct ixgbe_ring *rx_ring,
2288                                const int budget)
2289 {
2290         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2291         struct ixgbe_adapter *adapter = q_vector->adapter;
2292 #ifdef IXGBE_FCOE
2293         int ddp_bytes;
2294         unsigned int mss = 0;
2295 #endif /* IXGBE_FCOE */
2296         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2297         unsigned int xdp_xmit = 0;
2298         struct xdp_buff xdp;
2299
2300         xdp.rxq = &rx_ring->xdp_rxq;
2301
2302         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
2303 #if (PAGE_SIZE < 8192)
2304         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0);
2305 #endif
2306
2307         while (likely(total_rx_packets < budget)) {
2308                 union ixgbe_adv_rx_desc *rx_desc;
2309                 struct ixgbe_rx_buffer *rx_buffer;
2310                 struct sk_buff *skb;
2311                 unsigned int size;
2312
2313                 /* return some buffers to hardware, one at a time is too slow */
2314                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2315                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2316                         cleaned_count = 0;
2317                 }
2318
2319                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2320                 size = le16_to_cpu(rx_desc->wb.upper.length);
2321                 if (!size)
2322                         break;
2323
2324                 /* This memory barrier is needed to keep us from reading
2325                  * any other fields out of the rx_desc until we know the
2326                  * descriptor has been written back
2327                  */
2328                 dma_rmb();
2329
2330                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2331
2332                 /* retrieve a buffer from the ring */
2333                 if (!skb) {
2334                         xdp.data = page_address(rx_buffer->page) +
2335                                    rx_buffer->page_offset;
2336                         xdp.data_meta = xdp.data;
2337                         xdp.data_hard_start = xdp.data -
2338                                               ixgbe_rx_offset(rx_ring);
2339                         xdp.data_end = xdp.data + size;
2340 #if (PAGE_SIZE > 4096)
2341                         /* At larger PAGE_SIZE, frame_sz depend on len size */
2342                         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size);
2343 #endif
2344                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2345                 }
2346
2347                 if (IS_ERR(skb)) {
2348                         unsigned int xdp_res = -PTR_ERR(skb);
2349
2350                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2351                                 xdp_xmit |= xdp_res;
2352                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2353                         } else {
2354                                 rx_buffer->pagecnt_bias++;
2355                         }
2356                         total_rx_packets++;
2357                         total_rx_bytes += size;
2358                 } else if (skb) {
2359                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2360                 } else if (ring_uses_build_skb(rx_ring)) {
2361                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2362                                               &xdp, rx_desc);
2363                 } else {
2364                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2365                                                   &xdp, rx_desc);
2366                 }
2367
2368                 /* exit if we failed to retrieve a buffer */
2369                 if (!skb) {
2370                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2371                         rx_buffer->pagecnt_bias++;
2372                         break;
2373                 }
2374
2375                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2376                 cleaned_count++;
2377
2378                 /* place incomplete frames back on ring for completion */
2379                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2380                         continue;
2381
2382                 /* verify the packet layout is correct */
2383                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2384                         continue;
2385
2386                 /* probably a little skewed due to removing CRC */
2387                 total_rx_bytes += skb->len;
2388
2389                 /* populate checksum, timestamp, VLAN, and protocol */
2390                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2391
2392 #ifdef IXGBE_FCOE
2393                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2394                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2395                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2396                         /* include DDPed FCoE data */
2397                         if (ddp_bytes > 0) {
2398                                 if (!mss) {
2399                                         mss = rx_ring->netdev->mtu -
2400                                                 sizeof(struct fcoe_hdr) -
2401                                                 sizeof(struct fc_frame_header) -
2402                                                 sizeof(struct fcoe_crc_eof);
2403                                         if (mss > 512)
2404                                                 mss &= ~511;
2405                                 }
2406                                 total_rx_bytes += ddp_bytes;
2407                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2408                                                                  mss);
2409                         }
2410                         if (!ddp_bytes) {
2411                                 dev_kfree_skb_any(skb);
2412                                 continue;
2413                         }
2414                 }
2415
2416 #endif /* IXGBE_FCOE */
2417                 ixgbe_rx_skb(q_vector, skb);
2418
2419                 /* update budget accounting */
2420                 total_rx_packets++;
2421         }
2422
2423         if (xdp_xmit & IXGBE_XDP_REDIR)
2424                 xdp_do_flush_map();
2425
2426         if (xdp_xmit & IXGBE_XDP_TX) {
2427                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2428
2429                 /* Force memory writes to complete before letting h/w
2430                  * know there are new descriptors to fetch.
2431                  */
2432                 wmb();
2433                 writel(ring->next_to_use, ring->tail);
2434         }
2435
2436         u64_stats_update_begin(&rx_ring->syncp);
2437         rx_ring->stats.packets += total_rx_packets;
2438         rx_ring->stats.bytes += total_rx_bytes;
2439         u64_stats_update_end(&rx_ring->syncp);
2440         q_vector->rx.total_packets += total_rx_packets;
2441         q_vector->rx.total_bytes += total_rx_bytes;
2442
2443         return total_rx_packets;
2444 }
2445
2446 /**
2447  * ixgbe_configure_msix - Configure MSI-X hardware
2448  * @adapter: board private structure
2449  *
2450  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2451  * interrupts.
2452  **/
2453 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2454 {
2455         struct ixgbe_q_vector *q_vector;
2456         int v_idx;
2457         u32 mask;
2458
2459         /* Populate MSIX to EITR Select */
2460         if (adapter->num_vfs > 32) {
2461                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2462                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2463         }
2464
2465         /*
2466          * Populate the IVAR table and set the ITR values to the
2467          * corresponding register.
2468          */
2469         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2470                 struct ixgbe_ring *ring;
2471                 q_vector = adapter->q_vector[v_idx];
2472
2473                 ixgbe_for_each_ring(ring, q_vector->rx)
2474                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2475
2476                 ixgbe_for_each_ring(ring, q_vector->tx)
2477                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2478
2479                 ixgbe_write_eitr(q_vector);
2480         }
2481
2482         switch (adapter->hw.mac.type) {
2483         case ixgbe_mac_82598EB:
2484                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2485                                v_idx);
2486                 break;
2487         case ixgbe_mac_82599EB:
2488         case ixgbe_mac_X540:
2489         case ixgbe_mac_X550:
2490         case ixgbe_mac_X550EM_x:
2491         case ixgbe_mac_x550em_a:
2492                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2493                 break;
2494         default:
2495                 break;
2496         }
2497         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2498
2499         /* set up to autoclear timer, and the vectors */
2500         mask = IXGBE_EIMS_ENABLE_MASK;
2501         mask &= ~(IXGBE_EIMS_OTHER |
2502                   IXGBE_EIMS_MAILBOX |
2503                   IXGBE_EIMS_LSC);
2504
2505         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2506 }
2507
2508 /**
2509  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2510  * @q_vector: structure containing interrupt and ring information
2511  * @ring_container: structure containing ring performance data
2512  *
2513  *      Stores a new ITR value based on packets and byte
2514  *      counts during the last interrupt.  The advantage of per interrupt
2515  *      computation is faster updates and more accurate ITR for the current
2516  *      traffic pattern.  Constants in this function were computed
2517  *      based on theoretical maximum wire speed and thresholds were set based
2518  *      on testing data as well as attempting to minimize response time
2519  *      while increasing bulk throughput.
2520  **/
2521 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2522                              struct ixgbe_ring_container *ring_container)
2523 {
2524         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2525                            IXGBE_ITR_ADAPTIVE_LATENCY;
2526         unsigned int avg_wire_size, packets, bytes;
2527         unsigned long next_update = jiffies;
2528
2529         /* If we don't have any rings just leave ourselves set for maximum
2530          * possible latency so we take ourselves out of the equation.
2531          */
2532         if (!ring_container->ring)
2533                 return;
2534
2535         /* If we didn't update within up to 1 - 2 jiffies we can assume
2536          * that either packets are coming in so slow there hasn't been
2537          * any work, or that there is so much work that NAPI is dealing
2538          * with interrupt moderation and we don't need to do anything.
2539          */
2540         if (time_after(next_update, ring_container->next_update))
2541                 goto clear_counts;
2542
2543         packets = ring_container->total_packets;
2544
2545         /* We have no packets to actually measure against. This means
2546          * either one of the other queues on this vector is active or
2547          * we are a Tx queue doing TSO with too high of an interrupt rate.
2548          *
2549          * When this occurs just tick up our delay by the minimum value
2550          * and hope that this extra delay will prevent us from being called
2551          * without any work on our queue.
2552          */
2553         if (!packets) {
2554                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2555                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2556                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2557                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2558                 goto clear_counts;
2559         }
2560
2561         bytes = ring_container->total_bytes;
2562
2563         /* If packets are less than 4 or bytes are less than 9000 assume
2564          * insufficient data to use bulk rate limiting approach. We are
2565          * likely latency driven.
2566          */
2567         if (packets < 4 && bytes < 9000) {
2568                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2569                 goto adjust_by_size;
2570         }
2571
2572         /* Between 4 and 48 we can assume that our current interrupt delay
2573          * is only slightly too low. As such we should increase it by a small
2574          * fixed amount.
2575          */
2576         if (packets < 48) {
2577                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2578                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2579                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2580                 goto clear_counts;
2581         }
2582
2583         /* Between 48 and 96 is our "goldilocks" zone where we are working
2584          * out "just right". Just report that our current ITR is good for us.
2585          */
2586         if (packets < 96) {
2587                 itr = q_vector->itr >> 2;
2588                 goto clear_counts;
2589         }
2590
2591         /* If packet count is 96 or greater we are likely looking at a slight
2592          * overrun of the delay we want. Try halving our delay to see if that
2593          * will cut the number of packets in half per interrupt.
2594          */
2595         if (packets < 256) {
2596                 itr = q_vector->itr >> 3;
2597                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2598                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2599                 goto clear_counts;
2600         }
2601
2602         /* The paths below assume we are dealing with a bulk ITR since number
2603          * of packets is 256 or greater. We are just going to have to compute
2604          * a value and try to bring the count under control, though for smaller
2605          * packet sizes there isn't much we can do as NAPI polling will likely
2606          * be kicking in sooner rather than later.
2607          */
2608         itr = IXGBE_ITR_ADAPTIVE_BULK;
2609
2610 adjust_by_size:
2611         /* If packet counts are 256 or greater we can assume we have a gross
2612          * overestimation of what the rate should be. Instead of trying to fine
2613          * tune it just use the formula below to try and dial in an exact value
2614          * give the current packet size of the frame.
2615          */
2616         avg_wire_size = bytes / packets;
2617
2618         /* The following is a crude approximation of:
2619          *  wmem_default / (size + overhead) = desired_pkts_per_int
2620          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2621          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2622          *
2623          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2624          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2625          * formula down to
2626          *
2627          *  (170 * (size + 24)) / (size + 640) = ITR
2628          *
2629          * We first do some math on the packet size and then finally bitshift
2630          * by 8 after rounding up. We also have to account for PCIe link speed
2631          * difference as ITR scales based on this.
2632          */
2633         if (avg_wire_size <= 60) {
2634                 /* Start at 50k ints/sec */
2635                 avg_wire_size = 5120;
2636         } else if (avg_wire_size <= 316) {
2637                 /* 50K ints/sec to 16K ints/sec */
2638                 avg_wire_size *= 40;
2639                 avg_wire_size += 2720;
2640         } else if (avg_wire_size <= 1084) {
2641                 /* 16K ints/sec to 9.2K ints/sec */
2642                 avg_wire_size *= 15;
2643                 avg_wire_size += 11452;
2644         } else if (avg_wire_size < 1968) {
2645                 /* 9.2K ints/sec to 8K ints/sec */
2646                 avg_wire_size *= 5;
2647                 avg_wire_size += 22420;
2648         } else {
2649                 /* plateau at a limit of 8K ints/sec */
2650                 avg_wire_size = 32256;
2651         }
2652
2653         /* If we are in low latency mode half our delay which doubles the rate
2654          * to somewhere between 100K to 16K ints/sec
2655          */
2656         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2657                 avg_wire_size >>= 1;
2658
2659         /* Resultant value is 256 times larger than it needs to be. This
2660          * gives us room to adjust the value as needed to either increase
2661          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2662          *
2663          * Use addition as we have already recorded the new latency flag
2664          * for the ITR value.
2665          */
2666         switch (q_vector->adapter->link_speed) {
2667         case IXGBE_LINK_SPEED_10GB_FULL:
2668         case IXGBE_LINK_SPEED_100_FULL:
2669         default:
2670                 itr += DIV_ROUND_UP(avg_wire_size,
2671                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2672                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2673                 break;
2674         case IXGBE_LINK_SPEED_2_5GB_FULL:
2675         case IXGBE_LINK_SPEED_1GB_FULL:
2676         case IXGBE_LINK_SPEED_10_FULL:
2677                 if (avg_wire_size > 8064)
2678                         avg_wire_size = 8064;
2679                 itr += DIV_ROUND_UP(avg_wire_size,
2680                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2681                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2682                 break;
2683         }
2684
2685 clear_counts:
2686         /* write back value */
2687         ring_container->itr = itr;
2688
2689         /* next update should occur within next jiffy */
2690         ring_container->next_update = next_update + 1;
2691
2692         ring_container->total_bytes = 0;
2693         ring_container->total_packets = 0;
2694 }
2695
2696 /**
2697  * ixgbe_write_eitr - write EITR register in hardware specific way
2698  * @q_vector: structure containing interrupt and ring information
2699  *
2700  * This function is made to be called by ethtool and by the driver
2701  * when it needs to update EITR registers at runtime.  Hardware
2702  * specific quirks/differences are taken care of here.
2703  */
2704 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2705 {
2706         struct ixgbe_adapter *adapter = q_vector->adapter;
2707         struct ixgbe_hw *hw = &adapter->hw;
2708         int v_idx = q_vector->v_idx;
2709         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2710
2711         switch (adapter->hw.mac.type) {
2712         case ixgbe_mac_82598EB:
2713                 /* must write high and low 16 bits to reset counter */
2714                 itr_reg |= (itr_reg << 16);
2715                 break;
2716         case ixgbe_mac_82599EB:
2717         case ixgbe_mac_X540:
2718         case ixgbe_mac_X550:
2719         case ixgbe_mac_X550EM_x:
2720         case ixgbe_mac_x550em_a:
2721                 /*
2722                  * set the WDIS bit to not clear the timer bits and cause an
2723                  * immediate assertion of the interrupt
2724                  */
2725                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2726                 break;
2727         default:
2728                 break;
2729         }
2730         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2731 }
2732
2733 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2734 {
2735         u32 new_itr;
2736
2737         ixgbe_update_itr(q_vector, &q_vector->tx);
2738         ixgbe_update_itr(q_vector, &q_vector->rx);
2739
2740         /* use the smallest value of new ITR delay calculations */
2741         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2742
2743         /* Clear latency flag if set, shift into correct position */
2744         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2745         new_itr <<= 2;
2746
2747         if (new_itr != q_vector->itr) {
2748                 /* save the algorithm value here */
2749                 q_vector->itr = new_itr;
2750
2751                 ixgbe_write_eitr(q_vector);
2752         }
2753 }
2754
2755 /**
2756  * ixgbe_check_overtemp_subtask - check for over temperature
2757  * @adapter: pointer to adapter
2758  **/
2759 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2760 {
2761         struct ixgbe_hw *hw = &adapter->hw;
2762         u32 eicr = adapter->interrupt_event;
2763         s32 rc;
2764
2765         if (test_bit(__IXGBE_DOWN, &adapter->state))
2766                 return;
2767
2768         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2769                 return;
2770
2771         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2772
2773         switch (hw->device_id) {
2774         case IXGBE_DEV_ID_82599_T3_LOM:
2775                 /*
2776                  * Since the warning interrupt is for both ports
2777                  * we don't have to check if:
2778                  *  - This interrupt wasn't for our port.
2779                  *  - We may have missed the interrupt so always have to
2780                  *    check if we  got a LSC
2781                  */
2782                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2783                     !(eicr & IXGBE_EICR_LSC))
2784                         return;
2785
2786                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2787                         u32 speed;
2788                         bool link_up = false;
2789
2790                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2791
2792                         if (link_up)
2793                                 return;
2794                 }
2795
2796                 /* Check if this is not due to overtemp */
2797                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2798                         return;
2799
2800                 break;
2801         case IXGBE_DEV_ID_X550EM_A_1G_T:
2802         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2803                 rc = hw->phy.ops.check_overtemp(hw);
2804                 if (rc != IXGBE_ERR_OVERTEMP)
2805                         return;
2806                 break;
2807         default:
2808                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2809                         return;
2810                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2811                         return;
2812                 break;
2813         }
2814         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2815
2816         adapter->interrupt_event = 0;
2817 }
2818
2819 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2820 {
2821         struct ixgbe_hw *hw = &adapter->hw;
2822
2823         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2824             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2825                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2826                 /* write to clear the interrupt */
2827                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2828         }
2829 }
2830
2831 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2832 {
2833         struct ixgbe_hw *hw = &adapter->hw;
2834
2835         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2836                 return;
2837
2838         switch (adapter->hw.mac.type) {
2839         case ixgbe_mac_82599EB:
2840                 /*
2841                  * Need to check link state so complete overtemp check
2842                  * on service task
2843                  */
2844                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2845                      (eicr & IXGBE_EICR_LSC)) &&
2846                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2847                         adapter->interrupt_event = eicr;
2848                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2849                         ixgbe_service_event_schedule(adapter);
2850                         return;
2851                 }
2852                 return;
2853         case ixgbe_mac_x550em_a:
2854                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2855                         adapter->interrupt_event = eicr;
2856                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2857                         ixgbe_service_event_schedule(adapter);
2858                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2859                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2860                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2861                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2862                 }
2863                 return;
2864         case ixgbe_mac_X550:
2865         case ixgbe_mac_X540:
2866                 if (!(eicr & IXGBE_EICR_TS))
2867                         return;
2868                 break;
2869         default:
2870                 return;
2871         }
2872
2873         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2874 }
2875
2876 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2877 {
2878         switch (hw->mac.type) {
2879         case ixgbe_mac_82598EB:
2880                 if (hw->phy.type == ixgbe_phy_nl)
2881                         return true;
2882                 return false;
2883         case ixgbe_mac_82599EB:
2884         case ixgbe_mac_X550EM_x:
2885         case ixgbe_mac_x550em_a:
2886                 switch (hw->mac.ops.get_media_type(hw)) {
2887                 case ixgbe_media_type_fiber:
2888                 case ixgbe_media_type_fiber_qsfp:
2889                         return true;
2890                 default:
2891                         return false;
2892                 }
2893         default:
2894                 return false;
2895         }
2896 }
2897
2898 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2899 {
2900         struct ixgbe_hw *hw = &adapter->hw;
2901         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2902
2903         if (!ixgbe_is_sfp(hw))
2904                 return;
2905
2906         /* Later MAC's use different SDP */
2907         if (hw->mac.type >= ixgbe_mac_X540)
2908                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2909
2910         if (eicr & eicr_mask) {
2911                 /* Clear the interrupt */
2912                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2913                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2914                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2915                         adapter->sfp_poll_time = 0;
2916                         ixgbe_service_event_schedule(adapter);
2917                 }
2918         }
2919
2920         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2921             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2922                 /* Clear the interrupt */
2923                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2924                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2925                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2926                         ixgbe_service_event_schedule(adapter);
2927                 }
2928         }
2929 }
2930
2931 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2932 {
2933         struct ixgbe_hw *hw = &adapter->hw;
2934
2935         adapter->lsc_int++;
2936         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2937         adapter->link_check_timeout = jiffies;
2938         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2939                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2940                 IXGBE_WRITE_FLUSH(hw);
2941                 ixgbe_service_event_schedule(adapter);
2942         }
2943 }
2944
2945 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2946                                            u64 qmask)
2947 {
2948         u32 mask;
2949         struct ixgbe_hw *hw = &adapter->hw;
2950
2951         switch (hw->mac.type) {
2952         case ixgbe_mac_82598EB:
2953                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2954                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2955                 break;
2956         case ixgbe_mac_82599EB:
2957         case ixgbe_mac_X540:
2958         case ixgbe_mac_X550:
2959         case ixgbe_mac_X550EM_x:
2960         case ixgbe_mac_x550em_a:
2961                 mask = (qmask & 0xFFFFFFFF);
2962                 if (mask)
2963                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2964                 mask = (qmask >> 32);
2965                 if (mask)
2966                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2967                 break;
2968         default:
2969                 break;
2970         }
2971         /* skip the flush */
2972 }
2973
2974 /**
2975  * ixgbe_irq_enable - Enable default interrupt generation settings
2976  * @adapter: board private structure
2977  * @queues: enable irqs for queues
2978  * @flush: flush register write
2979  **/
2980 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2981                                     bool flush)
2982 {
2983         struct ixgbe_hw *hw = &adapter->hw;
2984         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2985
2986         /* don't reenable LSC while waiting for link */
2987         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2988                 mask &= ~IXGBE_EIMS_LSC;
2989
2990         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2991                 switch (adapter->hw.mac.type) {
2992                 case ixgbe_mac_82599EB:
2993                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2994                         break;
2995                 case ixgbe_mac_X540:
2996                 case ixgbe_mac_X550:
2997                 case ixgbe_mac_X550EM_x:
2998                 case ixgbe_mac_x550em_a:
2999                         mask |= IXGBE_EIMS_TS;
3000                         break;
3001                 default:
3002                         break;
3003                 }
3004         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3005                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3006         switch (adapter->hw.mac.type) {
3007         case ixgbe_mac_82599EB:
3008                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3009                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3010                 fallthrough;
3011         case ixgbe_mac_X540:
3012         case ixgbe_mac_X550:
3013         case ixgbe_mac_X550EM_x:
3014         case ixgbe_mac_x550em_a:
3015                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3016                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3017                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3018                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3019                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3020                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3021                 mask |= IXGBE_EIMS_ECC;
3022                 mask |= IXGBE_EIMS_MAILBOX;
3023                 break;
3024         default:
3025                 break;
3026         }
3027
3028         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3029             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3030                 mask |= IXGBE_EIMS_FLOW_DIR;
3031
3032         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3033         if (queues)
3034                 ixgbe_irq_enable_queues(adapter, ~0);
3035         if (flush)
3036                 IXGBE_WRITE_FLUSH(&adapter->hw);
3037 }
3038
3039 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3040 {
3041         struct ixgbe_adapter *adapter = data;
3042         struct ixgbe_hw *hw = &adapter->hw;
3043         u32 eicr;
3044
3045         /*
3046          * Workaround for Silicon errata.  Use clear-by-write instead
3047          * of clear-by-read.  Reading with EICS will return the
3048          * interrupt causes without clearing, which later be done
3049          * with the write to EICR.
3050          */
3051         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3052
3053         /* The lower 16bits of the EICR register are for the queue interrupts
3054          * which should be masked here in order to not accidentally clear them if
3055          * the bits are high when ixgbe_msix_other is called. There is a race
3056          * condition otherwise which results in possible performance loss
3057          * especially if the ixgbe_msix_other interrupt is triggering
3058          * consistently (as it would when PPS is turned on for the X540 device)
3059          */
3060         eicr &= 0xFFFF0000;
3061
3062         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3063
3064         if (eicr & IXGBE_EICR_LSC)
3065                 ixgbe_check_lsc(adapter);
3066
3067         if (eicr & IXGBE_EICR_MAILBOX)
3068                 ixgbe_msg_task(adapter);
3069
3070         switch (hw->mac.type) {
3071         case ixgbe_mac_82599EB:
3072         case ixgbe_mac_X540:
3073         case ixgbe_mac_X550:
3074         case ixgbe_mac_X550EM_x:
3075         case ixgbe_mac_x550em_a:
3076                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3077                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3078                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3079                         ixgbe_service_event_schedule(adapter);
3080                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3081                                         IXGBE_EICR_GPI_SDP0_X540);
3082                 }
3083                 if (eicr & IXGBE_EICR_ECC) {
3084                         e_info(link, "Received ECC Err, initiating reset\n");
3085                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3086                         ixgbe_service_event_schedule(adapter);
3087                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3088                 }
3089                 /* Handle Flow Director Full threshold interrupt */
3090                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3091                         int reinit_count = 0;
3092                         int i;
3093                         for (i = 0; i < adapter->num_tx_queues; i++) {
3094                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3095                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3096                                                        &ring->state))
3097                                         reinit_count++;
3098                         }
3099                         if (reinit_count) {
3100                                 /* no more flow director interrupts until after init */
3101                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3102                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3103                                 ixgbe_service_event_schedule(adapter);
3104                         }
3105                 }
3106                 ixgbe_check_sfp_event(adapter, eicr);
3107                 ixgbe_check_overtemp_event(adapter, eicr);
3108                 break;
3109         default:
3110                 break;
3111         }
3112
3113         ixgbe_check_fan_failure(adapter, eicr);
3114
3115         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3116                 ixgbe_ptp_check_pps_event(adapter);
3117
3118         /* re-enable the original interrupt state, no lsc, no queues */
3119         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3120                 ixgbe_irq_enable(adapter, false, false);
3121
3122         return IRQ_HANDLED;
3123 }
3124
3125 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3126 {
3127         struct ixgbe_q_vector *q_vector = data;
3128
3129         /* EIAM disabled interrupts (on this vector) for us */
3130
3131         if (q_vector->rx.ring || q_vector->tx.ring)
3132                 napi_schedule_irqoff(&q_vector->napi);
3133
3134         return IRQ_HANDLED;
3135 }
3136
3137 /**
3138  * ixgbe_poll - NAPI Rx polling callback
3139  * @napi: structure for representing this polling device
3140  * @budget: how many packets driver is allowed to clean
3141  *
3142  * This function is used for legacy and MSI, NAPI mode
3143  **/
3144 int ixgbe_poll(struct napi_struct *napi, int budget)
3145 {
3146         struct ixgbe_q_vector *q_vector =
3147                                 container_of(napi, struct ixgbe_q_vector, napi);
3148         struct ixgbe_adapter *adapter = q_vector->adapter;
3149         struct ixgbe_ring *ring;
3150         int per_ring_budget, work_done = 0;
3151         bool clean_complete = true;
3152
3153 #ifdef CONFIG_IXGBE_DCA
3154         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3155                 ixgbe_update_dca(q_vector);
3156 #endif
3157
3158         ixgbe_for_each_ring(ring, q_vector->tx) {
3159                 bool wd = ring->xsk_umem ?
3160                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3161                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3162
3163                 if (!wd)
3164                         clean_complete = false;
3165         }
3166
3167         /* Exit if we are called by netpoll */
3168         if (budget <= 0)
3169                 return budget;
3170
3171         /* attempt to distribute budget to each queue fairly, but don't allow
3172          * the budget to go below 1 because we'll exit polling */
3173         if (q_vector->rx.count > 1)
3174                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3175         else
3176                 per_ring_budget = budget;
3177
3178         ixgbe_for_each_ring(ring, q_vector->rx) {
3179                 int cleaned = ring->xsk_umem ?
3180                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3181                                                     per_ring_budget) :
3182                               ixgbe_clean_rx_irq(q_vector, ring,
3183                                                  per_ring_budget);
3184
3185                 work_done += cleaned;
3186                 if (cleaned >= per_ring_budget)
3187                         clean_complete = false;
3188         }
3189
3190         /* If all work not completed, return budget and keep polling */
3191         if (!clean_complete)
3192                 return budget;
3193
3194         /* all work done, exit the polling mode */
3195         if (likely(napi_complete_done(napi, work_done))) {
3196                 if (adapter->rx_itr_setting & 1)
3197                         ixgbe_set_itr(q_vector);
3198                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3199                         ixgbe_irq_enable_queues(adapter,
3200                                                 BIT_ULL(q_vector->v_idx));
3201         }
3202
3203         return min(work_done, budget - 1);
3204 }
3205
3206 /**
3207  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3208  * @adapter: board private structure
3209  *
3210  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3211  * interrupts from the kernel.
3212  **/
3213 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3214 {
3215         struct net_device *netdev = adapter->netdev;
3216         unsigned int ri = 0, ti = 0;
3217         int vector, err;
3218
3219         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3220                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3221                 struct msix_entry *entry = &adapter->msix_entries[vector];
3222
3223                 if (q_vector->tx.ring && q_vector->rx.ring) {
3224                         snprintf(q_vector->name, sizeof(q_vector->name),
3225                                  "%s-TxRx-%u", netdev->name, ri++);
3226                         ti++;
3227                 } else if (q_vector->rx.ring) {
3228                         snprintf(q_vector->name, sizeof(q_vector->name),
3229                                  "%s-rx-%u", netdev->name, ri++);
3230                 } else if (q_vector->tx.ring) {
3231                         snprintf(q_vector->name, sizeof(q_vector->name),
3232                                  "%s-tx-%u", netdev->name, ti++);
3233                 } else {
3234                         /* skip this unused q_vector */
3235                         continue;
3236                 }
3237                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3238                                   q_vector->name, q_vector);
3239                 if (err) {
3240                         e_err(probe, "request_irq failed for MSIX interrupt "
3241                               "Error: %d\n", err);
3242                         goto free_queue_irqs;
3243                 }
3244                 /* If Flow Director is enabled, set interrupt affinity */
3245                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3246                         /* assign the mask for this irq */
3247                         irq_set_affinity_hint(entry->vector,
3248                                               &q_vector->affinity_mask);
3249                 }
3250         }
3251
3252         err = request_irq(adapter->msix_entries[vector].vector,
3253                           ixgbe_msix_other, 0, netdev->name, adapter);
3254         if (err) {
3255                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3256                 goto free_queue_irqs;
3257         }
3258
3259         return 0;
3260
3261 free_queue_irqs:
3262         while (vector) {
3263                 vector--;
3264                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3265                                       NULL);
3266                 free_irq(adapter->msix_entries[vector].vector,
3267                          adapter->q_vector[vector]);
3268         }
3269         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3270         pci_disable_msix(adapter->pdev);
3271         kfree(adapter->msix_entries);
3272         adapter->msix_entries = NULL;
3273         return err;
3274 }
3275
3276 /**
3277  * ixgbe_intr - legacy mode Interrupt Handler
3278  * @irq: interrupt number
3279  * @data: pointer to a network interface device structure
3280  **/
3281 static irqreturn_t ixgbe_intr(int irq, void *data)
3282 {
3283         struct ixgbe_adapter *adapter = data;
3284         struct ixgbe_hw *hw = &adapter->hw;
3285         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3286         u32 eicr;
3287
3288         /*
3289          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3290          * before the read of EICR.
3291          */
3292         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3293
3294         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3295          * therefore no explicit interrupt disable is necessary */
3296         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3297         if (!eicr) {
3298                 /*
3299                  * shared interrupt alert!
3300                  * make sure interrupts are enabled because the read will
3301                  * have disabled interrupts due to EIAM
3302                  * finish the workaround of silicon errata on 82598.  Unmask
3303                  * the interrupt that we masked before the EICR read.
3304                  */
3305                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3306                         ixgbe_irq_enable(adapter, true, true);
3307                 return IRQ_NONE;        /* Not our interrupt */
3308         }
3309
3310         if (eicr & IXGBE_EICR_LSC)
3311                 ixgbe_check_lsc(adapter);
3312
3313         switch (hw->mac.type) {
3314         case ixgbe_mac_82599EB:
3315                 ixgbe_check_sfp_event(adapter, eicr);
3316                 fallthrough;
3317         case ixgbe_mac_X540:
3318         case ixgbe_mac_X550:
3319         case ixgbe_mac_X550EM_x:
3320         case ixgbe_mac_x550em_a:
3321                 if (eicr & IXGBE_EICR_ECC) {
3322                         e_info(link, "Received ECC Err, initiating reset\n");
3323                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3324                         ixgbe_service_event_schedule(adapter);
3325                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3326                 }
3327                 ixgbe_check_overtemp_event(adapter, eicr);
3328                 break;
3329         default:
3330                 break;
3331         }
3332
3333         ixgbe_check_fan_failure(adapter, eicr);
3334         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3335                 ixgbe_ptp_check_pps_event(adapter);
3336
3337         /* would disable interrupts here but EIAM disabled it */
3338         napi_schedule_irqoff(&q_vector->napi);
3339
3340         /*
3341          * re-enable link(maybe) and non-queue interrupts, no flush.
3342          * ixgbe_poll will re-enable the queue interrupts
3343          */
3344         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3345                 ixgbe_irq_enable(adapter, false, false);
3346
3347         return IRQ_HANDLED;
3348 }
3349
3350 /**
3351  * ixgbe_request_irq - initialize interrupts
3352  * @adapter: board private structure
3353  *
3354  * Attempts to configure interrupts using the best available
3355  * capabilities of the hardware and kernel.
3356  **/
3357 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3358 {
3359         struct net_device *netdev = adapter->netdev;
3360         int err;
3361
3362         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3363                 err = ixgbe_request_msix_irqs(adapter);
3364         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3365                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3366                                   netdev->name, adapter);
3367         else
3368                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3369                                   netdev->name, adapter);
3370
3371         if (err)
3372                 e_err(probe, "request_irq failed, Error %d\n", err);
3373
3374         return err;
3375 }
3376
3377 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3378 {
3379         int vector;
3380
3381         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3382                 free_irq(adapter->pdev->irq, adapter);
3383                 return;
3384         }
3385
3386         if (!adapter->msix_entries)
3387                 return;
3388
3389         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3390                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3391                 struct msix_entry *entry = &adapter->msix_entries[vector];
3392
3393                 /* free only the irqs that were actually requested */
3394                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3395                         continue;
3396
3397                 /* clear the affinity_mask in the IRQ descriptor */
3398                 irq_set_affinity_hint(entry->vector, NULL);
3399
3400                 free_irq(entry->vector, q_vector);
3401         }
3402
3403         free_irq(adapter->msix_entries[vector].vector, adapter);
3404 }
3405
3406 /**
3407  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3408  * @adapter: board private structure
3409  **/
3410 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3411 {
3412         switch (adapter->hw.mac.type) {
3413         case ixgbe_mac_82598EB:
3414                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3415                 break;
3416         case ixgbe_mac_82599EB:
3417         case ixgbe_mac_X540:
3418         case ixgbe_mac_X550:
3419         case ixgbe_mac_X550EM_x:
3420         case ixgbe_mac_x550em_a:
3421                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3422                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3423                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3424                 break;
3425         default:
3426                 break;
3427         }
3428         IXGBE_WRITE_FLUSH(&adapter->hw);
3429         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3430                 int vector;
3431
3432                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3433                         synchronize_irq(adapter->msix_entries[vector].vector);
3434
3435                 synchronize_irq(adapter->msix_entries[vector++].vector);
3436         } else {
3437                 synchronize_irq(adapter->pdev->irq);
3438         }
3439 }
3440
3441 /**
3442  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3443  * @adapter: board private structure
3444  *
3445  **/
3446 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3447 {
3448         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3449
3450         ixgbe_write_eitr(q_vector);
3451
3452         ixgbe_set_ivar(adapter, 0, 0, 0);
3453         ixgbe_set_ivar(adapter, 1, 0, 0);
3454
3455         e_info(hw, "Legacy interrupt IVAR setup done\n");
3456 }
3457
3458 /**
3459  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3460  * @adapter: board private structure
3461  * @ring: structure containing ring specific data
3462  *
3463  * Configure the Tx descriptor ring after a reset.
3464  **/
3465 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3466                              struct ixgbe_ring *ring)
3467 {
3468         struct ixgbe_hw *hw = &adapter->hw;
3469         u64 tdba = ring->dma;
3470         int wait_loop = 10;
3471         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3472         u8 reg_idx = ring->reg_idx;
3473
3474         ring->xsk_umem = NULL;
3475         if (ring_is_xdp(ring))
3476                 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3477
3478         /* disable queue to avoid issues while updating state */
3479         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3480         IXGBE_WRITE_FLUSH(hw);
3481
3482         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3483                         (tdba & DMA_BIT_MASK(32)));
3484         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3485         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3486                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3487         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3488         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3489         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3490
3491         /*
3492          * set WTHRESH to encourage burst writeback, it should not be set
3493          * higher than 1 when:
3494          * - ITR is 0 as it could cause false TX hangs
3495          * - ITR is set to > 100k int/sec and BQL is enabled
3496          *
3497          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3498          * to or less than the number of on chip descriptors, which is
3499          * currently 40.
3500          */
3501         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3502                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3503         else
3504                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3505
3506         /*
3507          * Setting PTHRESH to 32 both improves performance
3508          * and avoids a TX hang with DFP enabled
3509          */
3510         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3511                    32;          /* PTHRESH = 32 */
3512
3513         /* reinitialize flowdirector state */
3514         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3515                 ring->atr_sample_rate = adapter->atr_sample_rate;
3516                 ring->atr_count = 0;
3517                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3518         } else {
3519                 ring->atr_sample_rate = 0;
3520         }
3521
3522         /* initialize XPS */
3523         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3524                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3525
3526                 if (q_vector)
3527                         netif_set_xps_queue(ring->netdev,
3528                                             &q_vector->affinity_mask,
3529                                             ring->queue_index);
3530         }
3531
3532         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3533
3534         /* reinitialize tx_buffer_info */
3535         memset(ring->tx_buffer_info, 0,
3536                sizeof(struct ixgbe_tx_buffer) * ring->count);
3537
3538         /* enable queue */
3539         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3540
3541         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3542         if (hw->mac.type == ixgbe_mac_82598EB &&
3543             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3544                 return;
3545
3546         /* poll to verify queue is enabled */
3547         do {
3548                 usleep_range(1000, 2000);
3549                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3550         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3551         if (!wait_loop)
3552                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3553 }
3554
3555 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3556 {
3557         struct ixgbe_hw *hw = &adapter->hw;
3558         u32 rttdcs, mtqc;
3559         u8 tcs = adapter->hw_tcs;
3560
3561         if (hw->mac.type == ixgbe_mac_82598EB)
3562                 return;
3563
3564         /* disable the arbiter while setting MTQC */
3565         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3566         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3567         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3568
3569         /* set transmit pool layout */
3570         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3571                 mtqc = IXGBE_MTQC_VT_ENA;
3572                 if (tcs > 4)
3573                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3574                 else if (tcs > 1)
3575                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3576                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3577                          IXGBE_82599_VMDQ_4Q_MASK)
3578                         mtqc |= IXGBE_MTQC_32VF;
3579                 else
3580                         mtqc |= IXGBE_MTQC_64VF;
3581         } else {
3582                 if (tcs > 4) {
3583                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3584                 } else if (tcs > 1) {
3585                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3586                 } else {
3587                         u8 max_txq = adapter->num_tx_queues +
3588                                 adapter->num_xdp_queues;
3589                         if (max_txq > 63)
3590                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3591                         else
3592                                 mtqc = IXGBE_MTQC_64Q_1PB;
3593                 }
3594         }
3595
3596         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3597
3598         /* Enable Security TX Buffer IFG for multiple pb */
3599         if (tcs) {
3600                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3601                 sectx |= IXGBE_SECTX_DCB;
3602                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3603         }
3604
3605         /* re-enable the arbiter */
3606         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3607         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3608 }
3609
3610 /**
3611  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3612  * @adapter: board private structure
3613  *
3614  * Configure the Tx unit of the MAC after a reset.
3615  **/
3616 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3617 {
3618         struct ixgbe_hw *hw = &adapter->hw;
3619         u32 dmatxctl;
3620         u32 i;
3621
3622         ixgbe_setup_mtqc(adapter);
3623
3624         if (hw->mac.type != ixgbe_mac_82598EB) {
3625                 /* DMATXCTL.EN must be before Tx queues are enabled */
3626                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3627                 dmatxctl |= IXGBE_DMATXCTL_TE;
3628                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3629         }
3630
3631         /* Setup the HW Tx Head and Tail descriptor pointers */
3632         for (i = 0; i < adapter->num_tx_queues; i++)
3633                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3634         for (i = 0; i < adapter->num_xdp_queues; i++)
3635                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3636 }
3637
3638 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3639                                  struct ixgbe_ring *ring)
3640 {
3641         struct ixgbe_hw *hw = &adapter->hw;
3642         u8 reg_idx = ring->reg_idx;
3643         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3644
3645         srrctl |= IXGBE_SRRCTL_DROP_EN;
3646
3647         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3648 }
3649
3650 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3651                                   struct ixgbe_ring *ring)
3652 {
3653         struct ixgbe_hw *hw = &adapter->hw;
3654         u8 reg_idx = ring->reg_idx;
3655         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3656
3657         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3658
3659         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3660 }
3661
3662 #ifdef CONFIG_IXGBE_DCB
3663 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3664 #else
3665 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3666 #endif
3667 {
3668         int i;
3669         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3670
3671         if (adapter->ixgbe_ieee_pfc)
3672                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3673
3674         /*
3675          * We should set the drop enable bit if:
3676          *  SR-IOV is enabled
3677          *   or
3678          *  Number of Rx queues > 1 and flow control is disabled
3679          *
3680          *  This allows us to avoid head of line blocking for security
3681          *  and performance reasons.
3682          */
3683         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3684             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3685                 for (i = 0; i < adapter->num_rx_queues; i++)
3686                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3687         } else {
3688                 for (i = 0; i < adapter->num_rx_queues; i++)
3689                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3690         }
3691 }
3692
3693 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3694
3695 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3696                                    struct ixgbe_ring *rx_ring)
3697 {
3698         struct ixgbe_hw *hw = &adapter->hw;
3699         u32 srrctl;
3700         u8 reg_idx = rx_ring->reg_idx;
3701
3702         if (hw->mac.type == ixgbe_mac_82598EB) {
3703                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3704
3705                 /*
3706                  * if VMDq is not active we must program one srrctl register
3707                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3708                  */
3709                 reg_idx &= mask;
3710         }
3711
3712         /* configure header buffer length, needed for RSC */
3713         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3714
3715         /* configure the packet buffer length */
3716         if (rx_ring->xsk_umem) {
3717                 u32 xsk_buf_len = xsk_umem_get_rx_frame_size(rx_ring->xsk_umem);
3718
3719                 /* If the MAC support setting RXDCTL.RLPML, the
3720                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3721                  * RXDCTL.RLPML is set to the actual UMEM buffer
3722                  * size. If not, then we are stuck with a 1k buffer
3723                  * size resolution. In this case frames larger than
3724                  * the UMEM buffer size viewed in a 1k resolution will
3725                  * be dropped.
3726                  */
3727                 if (hw->mac.type != ixgbe_mac_82599EB)
3728                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3729                 else
3730                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3731         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3732                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3733         } else {
3734                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3735         }
3736
3737         /* configure descriptor type */
3738         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3739
3740         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3741 }
3742
3743 /**
3744  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3745  * @adapter: device handle
3746  *
3747  *  - 82598/82599/X540:     128
3748  *  - X550(non-SRIOV mode): 512
3749  *  - X550(SRIOV mode):     64
3750  */
3751 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3752 {
3753         if (adapter->hw.mac.type < ixgbe_mac_X550)
3754                 return 128;
3755         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3756                 return 64;
3757         else
3758                 return 512;
3759 }
3760
3761 /**
3762  * ixgbe_store_key - Write the RSS key to HW
3763  * @adapter: device handle
3764  *
3765  * Write the RSS key stored in adapter.rss_key to HW.
3766  */
3767 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3768 {
3769         struct ixgbe_hw *hw = &adapter->hw;
3770         int i;
3771
3772         for (i = 0; i < 10; i++)
3773                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3774 }
3775
3776 /**
3777  * ixgbe_init_rss_key - Initialize adapter RSS key
3778  * @adapter: device handle
3779  *
3780  * Allocates and initializes the RSS key if it is not allocated.
3781  **/
3782 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3783 {
3784         u32 *rss_key;
3785
3786         if (!adapter->rss_key) {
3787                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3788                 if (unlikely(!rss_key))
3789                         return -ENOMEM;
3790
3791                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3792                 adapter->rss_key = rss_key;
3793         }
3794
3795         return 0;
3796 }
3797
3798 /**
3799  * ixgbe_store_reta - Write the RETA table to HW
3800  * @adapter: device handle
3801  *
3802  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3803  */
3804 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3805 {
3806         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3807         struct ixgbe_hw *hw = &adapter->hw;
3808         u32 reta = 0;
3809         u32 indices_multi;
3810         u8 *indir_tbl = adapter->rss_indir_tbl;
3811
3812         /* Fill out the redirection table as follows:
3813          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3814          *    indices.
3815          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3816          *  - X550:       8 bit wide entries containing 6 bit RSS index
3817          */
3818         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3819                 indices_multi = 0x11;
3820         else
3821                 indices_multi = 0x1;
3822
3823         /* Write redirection table to HW */
3824         for (i = 0; i < reta_entries; i++) {
3825                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3826                 if ((i & 3) == 3) {
3827                         if (i < 128)
3828                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3829                         else
3830                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3831                                                 reta);
3832                         reta = 0;
3833                 }
3834         }
3835 }
3836
3837 /**
3838  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3839  * @adapter: device handle
3840  *
3841  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3842  */
3843 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3844 {
3845         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3846         struct ixgbe_hw *hw = &adapter->hw;
3847         u32 vfreta = 0;
3848
3849         /* Write redirection table to HW */
3850         for (i = 0; i < reta_entries; i++) {
3851                 u16 pool = adapter->num_rx_pools;
3852
3853                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3854                 if ((i & 3) != 3)
3855                         continue;
3856
3857                 while (pool--)
3858                         IXGBE_WRITE_REG(hw,
3859                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3860                                         vfreta);
3861                 vfreta = 0;
3862         }
3863 }
3864
3865 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3866 {
3867         u32 i, j;
3868         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3869         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3870
3871         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3872          * make full use of any rings they may have.  We will use the
3873          * PSRTYPE register to control how many rings we use within the PF.
3874          */
3875         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3876                 rss_i = 4;
3877
3878         /* Fill out hash function seeds */
3879         ixgbe_store_key(adapter);
3880
3881         /* Fill out redirection table */
3882         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3883
3884         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3885                 if (j == rss_i)
3886                         j = 0;
3887
3888                 adapter->rss_indir_tbl[i] = j;
3889         }
3890
3891         ixgbe_store_reta(adapter);
3892 }
3893
3894 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3895 {
3896         struct ixgbe_hw *hw = &adapter->hw;
3897         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3898         int i, j;
3899
3900         /* Fill out hash function seeds */
3901         for (i = 0; i < 10; i++) {
3902                 u16 pool = adapter->num_rx_pools;
3903
3904                 while (pool--)
3905                         IXGBE_WRITE_REG(hw,
3906                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3907                                         *(adapter->rss_key + i));
3908         }
3909
3910         /* Fill out the redirection table */
3911         for (i = 0, j = 0; i < 64; i++, j++) {
3912                 if (j == rss_i)
3913                         j = 0;
3914
3915                 adapter->rss_indir_tbl[i] = j;
3916         }
3917
3918         ixgbe_store_vfreta(adapter);
3919 }
3920
3921 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3922 {
3923         struct ixgbe_hw *hw = &adapter->hw;
3924         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3925         u32 rxcsum;
3926
3927         /* Disable indicating checksum in descriptor, enables RSS hash */
3928         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3929         rxcsum |= IXGBE_RXCSUM_PCSD;
3930         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3931
3932         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3933                 if (adapter->ring_feature[RING_F_RSS].mask)
3934                         mrqc = IXGBE_MRQC_RSSEN;
3935         } else {
3936                 u8 tcs = adapter->hw_tcs;
3937
3938                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3939                         if (tcs > 4)
3940                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3941                         else if (tcs > 1)
3942                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3943                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3944                                  IXGBE_82599_VMDQ_4Q_MASK)
3945                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3946                         else
3947                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3948
3949                         /* Enable L3/L4 for Tx Switched packets only for X550,
3950                          * older devices do not support this feature
3951                          */
3952                         if (hw->mac.type >= ixgbe_mac_X550)
3953                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3954                 } else {
3955                         if (tcs > 4)
3956                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3957                         else if (tcs > 1)
3958                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3959                         else
3960                                 mrqc = IXGBE_MRQC_RSSEN;
3961                 }
3962         }
3963
3964         /* Perform hash on these packet types */
3965         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3966                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3967                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3968                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3969
3970         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3971                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3972         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3973                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3974
3975         if ((hw->mac.type >= ixgbe_mac_X550) &&
3976             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3977                 u16 pool = adapter->num_rx_pools;
3978
3979                 /* Enable VF RSS mode */
3980                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3981                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3982
3983                 /* Setup RSS through the VF registers */
3984                 ixgbe_setup_vfreta(adapter);
3985                 vfmrqc = IXGBE_MRQC_RSSEN;
3986                 vfmrqc |= rss_field;
3987
3988                 while (pool--)
3989                         IXGBE_WRITE_REG(hw,
3990                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3991                                         vfmrqc);
3992         } else {
3993                 ixgbe_setup_reta(adapter);
3994                 mrqc |= rss_field;
3995                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3996         }
3997 }
3998
3999 /**
4000  * ixgbe_configure_rscctl - enable RSC for the indicated ring
4001  * @adapter: address of board private structure
4002  * @ring: structure containing ring specific data
4003  **/
4004 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4005                                    struct ixgbe_ring *ring)
4006 {
4007         struct ixgbe_hw *hw = &adapter->hw;
4008         u32 rscctrl;
4009         u8 reg_idx = ring->reg_idx;
4010
4011         if (!ring_is_rsc_enabled(ring))
4012                 return;
4013
4014         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4015         rscctrl |= IXGBE_RSCCTL_RSCEN;
4016         /*
4017          * we must limit the number of descriptors so that the
4018          * total size of max desc * buf_len is not greater
4019          * than 65536
4020          */
4021         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4022         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4023 }
4024
4025 #define IXGBE_MAX_RX_DESC_POLL 10
4026 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4027                                        struct ixgbe_ring *ring)
4028 {
4029         struct ixgbe_hw *hw = &adapter->hw;
4030         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4031         u32 rxdctl;
4032         u8 reg_idx = ring->reg_idx;
4033
4034         if (ixgbe_removed(hw->hw_addr))
4035                 return;
4036         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4037         if (hw->mac.type == ixgbe_mac_82598EB &&
4038             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4039                 return;
4040
4041         do {
4042                 usleep_range(1000, 2000);
4043                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4044         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4045
4046         if (!wait_loop) {
4047                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4048                       "the polling period\n", reg_idx);
4049         }
4050 }
4051
4052 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4053                              struct ixgbe_ring *ring)
4054 {
4055         struct ixgbe_hw *hw = &adapter->hw;
4056         union ixgbe_adv_rx_desc *rx_desc;
4057         u64 rdba = ring->dma;
4058         u32 rxdctl;
4059         u8 reg_idx = ring->reg_idx;
4060
4061         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4062         ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4063         if (ring->xsk_umem) {
4064                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4065                                                    MEM_TYPE_XSK_BUFF_POOL,
4066                                                    NULL));
4067                 xsk_buff_set_rxq_info(ring->xsk_umem, &ring->xdp_rxq);
4068         } else {
4069                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4070                                                    MEM_TYPE_PAGE_SHARED, NULL));
4071         }
4072
4073         /* disable queue to avoid use of these values while updating state */
4074         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4075         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4076
4077         /* write value back with RXDCTL.ENABLE bit cleared */
4078         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4079         IXGBE_WRITE_FLUSH(hw);
4080
4081         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4082         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4083         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4084                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4085         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4086         IXGBE_WRITE_FLUSH(hw);
4087
4088         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4089         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4090         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4091
4092         ixgbe_configure_srrctl(adapter, ring);
4093         ixgbe_configure_rscctl(adapter, ring);
4094
4095         if (hw->mac.type == ixgbe_mac_82598EB) {
4096                 /*
4097                  * enable cache line friendly hardware writes:
4098                  * PTHRESH=32 descriptors (half the internal cache),
4099                  * this also removes ugly rx_no_buffer_count increment
4100                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4101                  * WTHRESH=8 burst writeback up to two cache lines
4102                  */
4103                 rxdctl &= ~0x3FFFFF;
4104                 rxdctl |=  0x080420;
4105 #if (PAGE_SIZE < 8192)
4106         /* RXDCTL.RLPML does not work on 82599 */
4107         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4108                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4109                             IXGBE_RXDCTL_RLPML_EN);
4110
4111                 /* Limit the maximum frame size so we don't overrun the skb.
4112                  * This can happen in SRIOV mode when the MTU of the VF is
4113                  * higher than the MTU of the PF.
4114                  */
4115                 if (ring_uses_build_skb(ring) &&
4116                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4117                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4118                                   IXGBE_RXDCTL_RLPML_EN;
4119 #endif
4120         }
4121
4122         if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4123                 u32 xsk_buf_len = xsk_umem_get_rx_frame_size(ring->xsk_umem);
4124
4125                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4126                             IXGBE_RXDCTL_RLPML_EN);
4127                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4128
4129                 ring->rx_buf_len = xsk_buf_len;
4130         }
4131
4132         /* initialize rx_buffer_info */
4133         memset(ring->rx_buffer_info, 0,
4134                sizeof(struct ixgbe_rx_buffer) * ring->count);
4135
4136         /* initialize Rx descriptor 0 */
4137         rx_desc = IXGBE_RX_DESC(ring, 0);
4138         rx_desc->wb.upper.length = 0;
4139
4140         /* enable receive descriptor ring */
4141         rxdctl |= IXGBE_RXDCTL_ENABLE;
4142         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4143
4144         ixgbe_rx_desc_queue_enable(adapter, ring);
4145         if (ring->xsk_umem)
4146                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4147         else
4148                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4149 }
4150
4151 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4152 {
4153         struct ixgbe_hw *hw = &adapter->hw;
4154         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4155         u16 pool = adapter->num_rx_pools;
4156
4157         /* PSRTYPE must be initialized in non 82598 adapters */
4158         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4159                       IXGBE_PSRTYPE_UDPHDR |
4160                       IXGBE_PSRTYPE_IPV4HDR |
4161                       IXGBE_PSRTYPE_L2HDR |
4162                       IXGBE_PSRTYPE_IPV6HDR;
4163
4164         if (hw->mac.type == ixgbe_mac_82598EB)
4165                 return;
4166
4167         if (rss_i > 3)
4168                 psrtype |= 2u << 29;
4169         else if (rss_i > 1)
4170                 psrtype |= 1u << 29;
4171
4172         while (pool--)
4173                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4174 }
4175
4176 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4177 {
4178         struct ixgbe_hw *hw = &adapter->hw;
4179         u16 pool = adapter->num_rx_pools;
4180         u32 reg_offset, vf_shift, vmolr;
4181         u32 gcr_ext, vmdctl;
4182         int i;
4183
4184         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4185                 return;
4186
4187         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4188         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4189         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4190         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4191         vmdctl |= IXGBE_VT_CTL_REPLEN;
4192         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4193
4194         /* accept untagged packets until a vlan tag is
4195          * specifically set for the VMDQ queue/pool
4196          */
4197         vmolr = IXGBE_VMOLR_AUPE;
4198         while (pool--)
4199                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4200
4201         vf_shift = VMDQ_P(0) % 32;
4202         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4203
4204         /* Enable only the PF's pool for Tx/Rx */
4205         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4206         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4207         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4208         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4209         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4210                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4211
4212         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4213         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4214
4215         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4216         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4217
4218         /*
4219          * Set up VF register offsets for selected VT Mode,
4220          * i.e. 32 or 64 VFs for SR-IOV
4221          */
4222         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4223         case IXGBE_82599_VMDQ_8Q_MASK:
4224                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4225                 break;
4226         case IXGBE_82599_VMDQ_4Q_MASK:
4227                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4228                 break;
4229         default:
4230                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4231                 break;
4232         }
4233
4234         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4235
4236         for (i = 0; i < adapter->num_vfs; i++) {
4237                 /* configure spoof checking */
4238                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4239                                           adapter->vfinfo[i].spoofchk_enabled);
4240
4241                 /* Enable/Disable RSS query feature  */
4242                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4243                                           adapter->vfinfo[i].rss_query_enabled);
4244         }
4245 }
4246
4247 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4248 {
4249         struct ixgbe_hw *hw = &adapter->hw;
4250         struct net_device *netdev = adapter->netdev;
4251         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4252         struct ixgbe_ring *rx_ring;
4253         int i;
4254         u32 mhadd, hlreg0;
4255
4256 #ifdef IXGBE_FCOE
4257         /* adjust max frame to be able to do baby jumbo for FCoE */
4258         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4259             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4260                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4261
4262 #endif /* IXGBE_FCOE */
4263
4264         /* adjust max frame to be at least the size of a standard frame */
4265         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4266                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4267
4268         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4269         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4270                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4271                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4272
4273                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4274         }
4275
4276         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4277         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4278         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4279         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4280
4281         /*
4282          * Setup the HW Rx Head and Tail Descriptor Pointers and
4283          * the Base and Length of the Rx Descriptor Ring
4284          */
4285         for (i = 0; i < adapter->num_rx_queues; i++) {
4286                 rx_ring = adapter->rx_ring[i];
4287
4288                 clear_ring_rsc_enabled(rx_ring);
4289                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4290                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4291
4292                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4293                         set_ring_rsc_enabled(rx_ring);
4294
4295                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4296                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4297
4298                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4299                         continue;
4300
4301                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4302
4303 #if (PAGE_SIZE < 8192)
4304                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4305                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4306
4307                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4308                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4309                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4310 #endif
4311         }
4312 }
4313
4314 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4315 {
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4318
4319         switch (hw->mac.type) {
4320         case ixgbe_mac_82598EB:
4321                 /*
4322                  * For VMDq support of different descriptor types or
4323                  * buffer sizes through the use of multiple SRRCTL
4324                  * registers, RDRXCTL.MVMEN must be set to 1
4325                  *
4326                  * also, the manual doesn't mention it clearly but DCA hints
4327                  * will only use queue 0's tags unless this bit is set.  Side
4328                  * effects of setting this bit are only that SRRCTL must be
4329                  * fully programmed [0..15]
4330                  */
4331                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4332                 break;
4333         case ixgbe_mac_X550:
4334         case ixgbe_mac_X550EM_x:
4335         case ixgbe_mac_x550em_a:
4336                 if (adapter->num_vfs)
4337                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4338                 fallthrough;
4339         case ixgbe_mac_82599EB:
4340         case ixgbe_mac_X540:
4341                 /* Disable RSC for ACK packets */
4342                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4343                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4344                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4345                 /* hardware requires some bits to be set by default */
4346                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4347                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4348                 break;
4349         default:
4350                 /* We should do nothing since we don't know this hardware */
4351                 return;
4352         }
4353
4354         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4355 }
4356
4357 /**
4358  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4359  * @adapter: board private structure
4360  *
4361  * Configure the Rx unit of the MAC after a reset.
4362  **/
4363 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4364 {
4365         struct ixgbe_hw *hw = &adapter->hw;
4366         int i;
4367         u32 rxctrl, rfctl;
4368
4369         /* disable receives while setting up the descriptors */
4370         hw->mac.ops.disable_rx(hw);
4371
4372         ixgbe_setup_psrtype(adapter);
4373         ixgbe_setup_rdrxctl(adapter);
4374
4375         /* RSC Setup */
4376         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4377         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4378         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4379                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4380
4381         /* disable NFS filtering */
4382         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4383         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4384
4385         /* Program registers for the distribution of queues */
4386         ixgbe_setup_mrqc(adapter);
4387
4388         /* set_rx_buffer_len must be called before ring initialization */
4389         ixgbe_set_rx_buffer_len(adapter);
4390
4391         /*
4392          * Setup the HW Rx Head and Tail Descriptor Pointers and
4393          * the Base and Length of the Rx Descriptor Ring
4394          */
4395         for (i = 0; i < adapter->num_rx_queues; i++)
4396                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4397
4398         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4399         /* disable drop enable for 82598 parts */
4400         if (hw->mac.type == ixgbe_mac_82598EB)
4401                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4402
4403         /* enable all receives */
4404         rxctrl |= IXGBE_RXCTRL_RXEN;
4405         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4406 }
4407
4408 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4409                                  __be16 proto, u16 vid)
4410 {
4411         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4412         struct ixgbe_hw *hw = &adapter->hw;
4413
4414         /* add VID to filter table */
4415         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4416                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4417
4418         set_bit(vid, adapter->active_vlans);
4419
4420         return 0;
4421 }
4422
4423 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4424 {
4425         u32 vlvf;
4426         int idx;
4427
4428         /* short cut the special case */
4429         if (vlan == 0)
4430                 return 0;
4431
4432         /* Search for the vlan id in the VLVF entries */
4433         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4434                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4435                 if ((vlvf & VLAN_VID_MASK) == vlan)
4436                         break;
4437         }
4438
4439         return idx;
4440 }
4441
4442 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4443 {
4444         struct ixgbe_hw *hw = &adapter->hw;
4445         u32 bits, word;
4446         int idx;
4447
4448         idx = ixgbe_find_vlvf_entry(hw, vid);
4449         if (!idx)
4450                 return;
4451
4452         /* See if any other pools are set for this VLAN filter
4453          * entry other than the PF.
4454          */
4455         word = idx * 2 + (VMDQ_P(0) / 32);
4456         bits = ~BIT(VMDQ_P(0) % 32);
4457         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4458
4459         /* Disable the filter so this falls into the default pool. */
4460         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4461                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4462                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4463                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4464         }
4465 }
4466
4467 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4468                                   __be16 proto, u16 vid)
4469 {
4470         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4471         struct ixgbe_hw *hw = &adapter->hw;
4472
4473         /* remove VID from filter table */
4474         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4475                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4476
4477         clear_bit(vid, adapter->active_vlans);
4478
4479         return 0;
4480 }
4481
4482 /**
4483  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4484  * @adapter: driver data
4485  */
4486 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4487 {
4488         struct ixgbe_hw *hw = &adapter->hw;
4489         u32 vlnctrl;
4490         int i, j;
4491
4492         switch (hw->mac.type) {
4493         case ixgbe_mac_82598EB:
4494                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4495                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4496                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4497                 break;
4498         case ixgbe_mac_82599EB:
4499         case ixgbe_mac_X540:
4500         case ixgbe_mac_X550:
4501         case ixgbe_mac_X550EM_x:
4502         case ixgbe_mac_x550em_a:
4503                 for (i = 0; i < adapter->num_rx_queues; i++) {
4504                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4505
4506                         if (!netif_is_ixgbe(ring->netdev))
4507                                 continue;
4508
4509                         j = ring->reg_idx;
4510                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4511                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4512                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4513                 }
4514                 break;
4515         default:
4516                 break;
4517         }
4518 }
4519
4520 /**
4521  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4522  * @adapter: driver data
4523  */
4524 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4525 {
4526         struct ixgbe_hw *hw = &adapter->hw;
4527         u32 vlnctrl;
4528         int i, j;
4529
4530         switch (hw->mac.type) {
4531         case ixgbe_mac_82598EB:
4532                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4533                 vlnctrl |= IXGBE_VLNCTRL_VME;
4534                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4535                 break;
4536         case ixgbe_mac_82599EB:
4537         case ixgbe_mac_X540:
4538         case ixgbe_mac_X550:
4539         case ixgbe_mac_X550EM_x:
4540         case ixgbe_mac_x550em_a:
4541                 for (i = 0; i < adapter->num_rx_queues; i++) {
4542                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4543
4544                         if (!netif_is_ixgbe(ring->netdev))
4545                                 continue;
4546
4547                         j = ring->reg_idx;
4548                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4549                         vlnctrl |= IXGBE_RXDCTL_VME;
4550                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4551                 }
4552                 break;
4553         default:
4554                 break;
4555         }
4556 }
4557
4558 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4559 {
4560         struct ixgbe_hw *hw = &adapter->hw;
4561         u32 vlnctrl, i;
4562
4563         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4564
4565         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4566         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4567                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4568                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4569         } else {
4570                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4571                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4572                 return;
4573         }
4574
4575         /* Nothing to do for 82598 */
4576         if (hw->mac.type == ixgbe_mac_82598EB)
4577                 return;
4578
4579         /* We are already in VLAN promisc, nothing to do */
4580         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4581                 return;
4582
4583         /* Set flag so we don't redo unnecessary work */
4584         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4585
4586         /* Add PF to all active pools */
4587         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4588                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4589                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4590
4591                 vlvfb |= BIT(VMDQ_P(0) % 32);
4592                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4593         }
4594
4595         /* Set all bits in the VLAN filter table array */
4596         for (i = hw->mac.vft_size; i--;)
4597                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4598 }
4599
4600 #define VFTA_BLOCK_SIZE 8
4601 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4602 {
4603         struct ixgbe_hw *hw = &adapter->hw;
4604         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4605         u32 vid_start = vfta_offset * 32;
4606         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4607         u32 i, vid, word, bits;
4608
4609         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4610                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4611
4612                 /* pull VLAN ID from VLVF */
4613                 vid = vlvf & VLAN_VID_MASK;
4614
4615                 /* only concern outselves with a certain range */
4616                 if (vid < vid_start || vid >= vid_end)
4617                         continue;
4618
4619                 if (vlvf) {
4620                         /* record VLAN ID in VFTA */
4621                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4622
4623                         /* if PF is part of this then continue */
4624                         if (test_bit(vid, adapter->active_vlans))
4625                                 continue;
4626                 }
4627
4628                 /* remove PF from the pool */
4629                 word = i * 2 + VMDQ_P(0) / 32;
4630                 bits = ~BIT(VMDQ_P(0) % 32);
4631                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4632                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4633         }
4634
4635         /* extract values from active_vlans and write back to VFTA */
4636         for (i = VFTA_BLOCK_SIZE; i--;) {
4637                 vid = (vfta_offset + i) * 32;
4638                 word = vid / BITS_PER_LONG;
4639                 bits = vid % BITS_PER_LONG;
4640
4641                 vfta[i] |= adapter->active_vlans[word] >> bits;
4642
4643                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4644         }
4645 }
4646
4647 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4648 {
4649         struct ixgbe_hw *hw = &adapter->hw;
4650         u32 vlnctrl, i;
4651
4652         /* Set VLAN filtering to enabled */
4653         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4654         vlnctrl |= IXGBE_VLNCTRL_VFE;
4655         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4656
4657         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4658             hw->mac.type == ixgbe_mac_82598EB)
4659                 return;
4660
4661         /* We are not in VLAN promisc, nothing to do */
4662         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4663                 return;
4664
4665         /* Set flag so we don't redo unnecessary work */
4666         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4667
4668         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4669                 ixgbe_scrub_vfta(adapter, i);
4670 }
4671
4672 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4673 {
4674         u16 vid = 1;
4675
4676         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4677
4678         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4679                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4680 }
4681
4682 /**
4683  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4684  * @netdev: network interface device structure
4685  *
4686  * Writes multicast address list to the MTA hash table.
4687  * Returns: -ENOMEM on failure
4688  *                0 on no addresses written
4689  *                X on writing X addresses to MTA
4690  **/
4691 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4692 {
4693         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4694         struct ixgbe_hw *hw = &adapter->hw;
4695
4696         if (!netif_running(netdev))
4697                 return 0;
4698
4699         if (hw->mac.ops.update_mc_addr_list)
4700                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4701         else
4702                 return -ENOMEM;
4703
4704 #ifdef CONFIG_PCI_IOV
4705         ixgbe_restore_vf_multicasts(adapter);
4706 #endif
4707
4708         return netdev_mc_count(netdev);
4709 }
4710
4711 #ifdef CONFIG_PCI_IOV
4712 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4713 {
4714         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4715         struct ixgbe_hw *hw = &adapter->hw;
4716         int i;
4717
4718         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4719                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4720
4721                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4722                         hw->mac.ops.set_rar(hw, i,
4723                                             mac_table->addr,
4724                                             mac_table->pool,
4725                                             IXGBE_RAH_AV);
4726                 else
4727                         hw->mac.ops.clear_rar(hw, i);
4728         }
4729 }
4730
4731 #endif
4732 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4733 {
4734         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4735         struct ixgbe_hw *hw = &adapter->hw;
4736         int i;
4737
4738         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4739                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4740                         continue;
4741
4742                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4743
4744                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4745                         hw->mac.ops.set_rar(hw, i,
4746                                             mac_table->addr,
4747                                             mac_table->pool,
4748                                             IXGBE_RAH_AV);
4749                 else
4750                         hw->mac.ops.clear_rar(hw, i);
4751         }
4752 }
4753
4754 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4755 {
4756         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4757         struct ixgbe_hw *hw = &adapter->hw;
4758         int i;
4759
4760         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4761                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4762                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4763         }
4764
4765         ixgbe_sync_mac_table(adapter);
4766 }
4767
4768 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4769 {
4770         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4771         struct ixgbe_hw *hw = &adapter->hw;
4772         int i, count = 0;
4773
4774         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4775                 /* do not count default RAR as available */
4776                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4777                         continue;
4778
4779                 /* only count unused and addresses that belong to us */
4780                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4781                         if (mac_table->pool != pool)
4782                                 continue;
4783                 }
4784
4785                 count++;
4786         }
4787
4788         return count;
4789 }
4790
4791 /* this function destroys the first RAR entry */
4792 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4793 {
4794         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4795         struct ixgbe_hw *hw = &adapter->hw;
4796
4797         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4798         mac_table->pool = VMDQ_P(0);
4799
4800         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4801
4802         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4803                             IXGBE_RAH_AV);
4804 }
4805
4806 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4807                          const u8 *addr, u16 pool)
4808 {
4809         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4810         struct ixgbe_hw *hw = &adapter->hw;
4811         int i;
4812
4813         if (is_zero_ether_addr(addr))
4814                 return -EINVAL;
4815
4816         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4817                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4818                         continue;
4819
4820                 ether_addr_copy(mac_table->addr, addr);
4821                 mac_table->pool = pool;
4822
4823                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4824                                     IXGBE_MAC_STATE_IN_USE;
4825
4826                 ixgbe_sync_mac_table(adapter);
4827
4828                 return i;
4829         }
4830
4831         return -ENOMEM;
4832 }
4833
4834 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4835                          const u8 *addr, u16 pool)
4836 {
4837         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4838         struct ixgbe_hw *hw = &adapter->hw;
4839         int i;
4840
4841         if (is_zero_ether_addr(addr))
4842                 return -EINVAL;
4843
4844         /* search table for addr, if found clear IN_USE flag and sync */
4845         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4846                 /* we can only delete an entry if it is in use */
4847                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4848                         continue;
4849                 /* we only care about entries that belong to the given pool */
4850                 if (mac_table->pool != pool)
4851                         continue;
4852                 /* we only care about a specific MAC address */
4853                 if (!ether_addr_equal(addr, mac_table->addr))
4854                         continue;
4855
4856                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4857                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4858
4859                 ixgbe_sync_mac_table(adapter);
4860
4861                 return 0;
4862         }
4863
4864         return -ENOMEM;
4865 }
4866
4867 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4868 {
4869         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4870         int ret;
4871
4872         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4873
4874         return min_t(int, ret, 0);
4875 }
4876
4877 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4878 {
4879         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4880
4881         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4882
4883         return 0;
4884 }
4885
4886 /**
4887  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4888  * @netdev: network interface device structure
4889  *
4890  * The set_rx_method entry point is called whenever the unicast/multicast
4891  * address list or the network interface flags are updated.  This routine is
4892  * responsible for configuring the hardware for proper unicast, multicast and
4893  * promiscuous mode.
4894  **/
4895 void ixgbe_set_rx_mode(struct net_device *netdev)
4896 {
4897         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4898         struct ixgbe_hw *hw = &adapter->hw;
4899         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4900         netdev_features_t features = netdev->features;
4901         int count;
4902
4903         /* Check for Promiscuous and All Multicast modes */
4904         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4905
4906         /* set all bits that we expect to always be set */
4907         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4908         fctrl |= IXGBE_FCTRL_BAM;
4909         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4910         fctrl |= IXGBE_FCTRL_PMCF;
4911
4912         /* clear the bits we are changing the status of */
4913         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4914         if (netdev->flags & IFF_PROMISC) {
4915                 hw->addr_ctrl.user_set_promisc = true;
4916                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4917                 vmolr |= IXGBE_VMOLR_MPE;
4918                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4919         } else {
4920                 if (netdev->flags & IFF_ALLMULTI) {
4921                         fctrl |= IXGBE_FCTRL_MPE;
4922                         vmolr |= IXGBE_VMOLR_MPE;
4923                 }
4924                 hw->addr_ctrl.user_set_promisc = false;
4925         }
4926
4927         /*
4928          * Write addresses to available RAR registers, if there is not
4929          * sufficient space to store all the addresses then enable
4930          * unicast promiscuous mode
4931          */
4932         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4933                 fctrl |= IXGBE_FCTRL_UPE;
4934                 vmolr |= IXGBE_VMOLR_ROPE;
4935         }
4936
4937         /* Write addresses to the MTA, if the attempt fails
4938          * then we should just turn on promiscuous mode so
4939          * that we can at least receive multicast traffic
4940          */
4941         count = ixgbe_write_mc_addr_list(netdev);
4942         if (count < 0) {
4943                 fctrl |= IXGBE_FCTRL_MPE;
4944                 vmolr |= IXGBE_VMOLR_MPE;
4945         } else if (count) {
4946                 vmolr |= IXGBE_VMOLR_ROMPE;
4947         }
4948
4949         if (hw->mac.type != ixgbe_mac_82598EB) {
4950                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4951                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4952                            IXGBE_VMOLR_ROPE);
4953                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4954         }
4955
4956         /* This is useful for sniffing bad packets. */
4957         if (features & NETIF_F_RXALL) {
4958                 /* UPE and MPE will be handled by normal PROMISC logic
4959                  * in e1000e_set_rx_mode */
4960                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4961                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4962                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4963
4964                 fctrl &= ~(IXGBE_FCTRL_DPF);
4965                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4966         }
4967
4968         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4969
4970         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4971                 ixgbe_vlan_strip_enable(adapter);
4972         else
4973                 ixgbe_vlan_strip_disable(adapter);
4974
4975         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4976                 ixgbe_vlan_promisc_disable(adapter);
4977         else
4978                 ixgbe_vlan_promisc_enable(adapter);
4979 }
4980
4981 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4982 {
4983         int q_idx;
4984
4985         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4986                 napi_enable(&adapter->q_vector[q_idx]->napi);
4987 }
4988
4989 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4990 {
4991         int q_idx;
4992
4993         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4994                 napi_disable(&adapter->q_vector[q_idx]->napi);
4995 }
4996
4997 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4998 {
4999         struct ixgbe_hw *hw = &adapter->hw;
5000         u32 vxlanctrl;
5001
5002         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5003                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5004                 return;
5005
5006         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5007         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5008
5009         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5010                 adapter->vxlan_port = 0;
5011
5012         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5013                 adapter->geneve_port = 0;
5014 }
5015
5016 #ifdef CONFIG_IXGBE_DCB
5017 /**
5018  * ixgbe_configure_dcb - Configure DCB hardware
5019  * @adapter: ixgbe adapter struct
5020  *
5021  * This is called by the driver on open to configure the DCB hardware.
5022  * This is also called by the gennetlink interface when reconfiguring
5023  * the DCB state.
5024  */
5025 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5026 {
5027         struct ixgbe_hw *hw = &adapter->hw;
5028         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5029
5030         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5031                 if (hw->mac.type == ixgbe_mac_82598EB)
5032                         netif_set_gso_max_size(adapter->netdev, 65536);
5033                 return;
5034         }
5035
5036         if (hw->mac.type == ixgbe_mac_82598EB)
5037                 netif_set_gso_max_size(adapter->netdev, 32768);
5038
5039 #ifdef IXGBE_FCOE
5040         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5041                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5042 #endif
5043
5044         /* reconfigure the hardware */
5045         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5046                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5047                                                 DCB_TX_CONFIG);
5048                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5049                                                 DCB_RX_CONFIG);
5050                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5051         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5052                 ixgbe_dcb_hw_ets(&adapter->hw,
5053                                  adapter->ixgbe_ieee_ets,
5054                                  max_frame);
5055                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5056                                         adapter->ixgbe_ieee_pfc->pfc_en,
5057                                         adapter->ixgbe_ieee_ets->prio_tc);
5058         }
5059
5060         /* Enable RSS Hash per TC */
5061         if (hw->mac.type != ixgbe_mac_82598EB) {
5062                 u32 msb = 0;
5063                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5064
5065                 while (rss_i) {
5066                         msb++;
5067                         rss_i >>= 1;
5068                 }
5069
5070                 /* write msb to all 8 TCs in one write */
5071                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5072         }
5073 }
5074 #endif
5075
5076 /* Additional bittime to account for IXGBE framing */
5077 #define IXGBE_ETH_FRAMING 20
5078
5079 /**
5080  * ixgbe_hpbthresh - calculate high water mark for flow control
5081  *
5082  * @adapter: board private structure to calculate for
5083  * @pb: packet buffer to calculate
5084  */
5085 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5086 {
5087         struct ixgbe_hw *hw = &adapter->hw;
5088         struct net_device *dev = adapter->netdev;
5089         int link, tc, kb, marker;
5090         u32 dv_id, rx_pba;
5091
5092         /* Calculate max LAN frame size */
5093         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5094
5095 #ifdef IXGBE_FCOE
5096         /* FCoE traffic class uses FCOE jumbo frames */
5097         if ((dev->features & NETIF_F_FCOE_MTU) &&
5098             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5099             (pb == ixgbe_fcoe_get_tc(adapter)))
5100                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5101 #endif
5102
5103         /* Calculate delay value for device */
5104         switch (hw->mac.type) {
5105         case ixgbe_mac_X540:
5106         case ixgbe_mac_X550:
5107         case ixgbe_mac_X550EM_x:
5108         case ixgbe_mac_x550em_a:
5109                 dv_id = IXGBE_DV_X540(link, tc);
5110                 break;
5111         default:
5112                 dv_id = IXGBE_DV(link, tc);
5113                 break;
5114         }
5115
5116         /* Loopback switch introduces additional latency */
5117         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5118                 dv_id += IXGBE_B2BT(tc);
5119
5120         /* Delay value is calculated in bit times convert to KB */
5121         kb = IXGBE_BT2KB(dv_id);
5122         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5123
5124         marker = rx_pba - kb;
5125
5126         /* It is possible that the packet buffer is not large enough
5127          * to provide required headroom. In this case throw an error
5128          * to user and a do the best we can.
5129          */
5130         if (marker < 0) {
5131                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5132                             "headroom to support flow control."
5133                             "Decrease MTU or number of traffic classes\n", pb);
5134                 marker = tc + 1;
5135         }
5136
5137         return marker;
5138 }
5139
5140 /**
5141  * ixgbe_lpbthresh - calculate low water mark for for flow control
5142  *
5143  * @adapter: board private structure to calculate for
5144  * @pb: packet buffer to calculate
5145  */
5146 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5147 {
5148         struct ixgbe_hw *hw = &adapter->hw;
5149         struct net_device *dev = adapter->netdev;
5150         int tc;
5151         u32 dv_id;
5152
5153         /* Calculate max LAN frame size */
5154         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5155
5156 #ifdef IXGBE_FCOE
5157         /* FCoE traffic class uses FCOE jumbo frames */
5158         if ((dev->features & NETIF_F_FCOE_MTU) &&
5159             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5160             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5161                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5162 #endif
5163
5164         /* Calculate delay value for device */
5165         switch (hw->mac.type) {
5166         case ixgbe_mac_X540:
5167         case ixgbe_mac_X550:
5168         case ixgbe_mac_X550EM_x:
5169         case ixgbe_mac_x550em_a:
5170                 dv_id = IXGBE_LOW_DV_X540(tc);
5171                 break;
5172         default:
5173                 dv_id = IXGBE_LOW_DV(tc);
5174                 break;
5175         }
5176
5177         /* Delay value is calculated in bit times convert to KB */
5178         return IXGBE_BT2KB(dv_id);
5179 }
5180
5181 /*
5182  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5183  */
5184 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5185 {
5186         struct ixgbe_hw *hw = &adapter->hw;
5187         int num_tc = adapter->hw_tcs;
5188         int i;
5189
5190         if (!num_tc)
5191                 num_tc = 1;
5192
5193         for (i = 0; i < num_tc; i++) {
5194                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5195                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5196
5197                 /* Low water marks must not be larger than high water marks */
5198                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5199                         hw->fc.low_water[i] = 0;
5200         }
5201
5202         for (; i < MAX_TRAFFIC_CLASS; i++)
5203                 hw->fc.high_water[i] = 0;
5204 }
5205
5206 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5207 {
5208         struct ixgbe_hw *hw = &adapter->hw;
5209         int hdrm;
5210         u8 tc = adapter->hw_tcs;
5211
5212         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5213             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5214                 hdrm = 32 << adapter->fdir_pballoc;
5215         else
5216                 hdrm = 0;
5217
5218         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5219         ixgbe_pbthresh_setup(adapter);
5220 }
5221
5222 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5223 {
5224         struct ixgbe_hw *hw = &adapter->hw;
5225         struct hlist_node *node2;
5226         struct ixgbe_fdir_filter *filter;
5227         u8 queue;
5228
5229         spin_lock(&adapter->fdir_perfect_lock);
5230
5231         if (!hlist_empty(&adapter->fdir_filter_list))
5232                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5233
5234         hlist_for_each_entry_safe(filter, node2,
5235                                   &adapter->fdir_filter_list, fdir_node) {
5236                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5237                         queue = IXGBE_FDIR_DROP_QUEUE;
5238                 } else {
5239                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5240                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5241
5242                         if (!vf && (ring >= adapter->num_rx_queues)) {
5243                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5244                                       ring);
5245                                 continue;
5246                         } else if (vf &&
5247                                    ((vf > adapter->num_vfs) ||
5248                                      ring >= adapter->num_rx_queues_per_pool)) {
5249                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5250                                       vf, ring);
5251                                 continue;
5252                         }
5253
5254                         /* Map the ring onto the absolute queue index */
5255                         if (!vf)
5256                                 queue = adapter->rx_ring[ring]->reg_idx;
5257                         else
5258                                 queue = ((vf - 1) *
5259                                         adapter->num_rx_queues_per_pool) + ring;
5260                 }
5261
5262                 ixgbe_fdir_write_perfect_filter_82599(hw,
5263                                 &filter->filter, filter->sw_idx, queue);
5264         }
5265
5266         spin_unlock(&adapter->fdir_perfect_lock);
5267 }
5268
5269 /**
5270  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5271  * @rx_ring: ring to free buffers from
5272  **/
5273 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5274 {
5275         u16 i = rx_ring->next_to_clean;
5276         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5277
5278         if (rx_ring->xsk_umem) {
5279                 ixgbe_xsk_clean_rx_ring(rx_ring);
5280                 goto skip_free;
5281         }
5282
5283         /* Free all the Rx ring sk_buffs */
5284         while (i != rx_ring->next_to_alloc) {
5285                 if (rx_buffer->skb) {
5286                         struct sk_buff *skb = rx_buffer->skb;
5287                         if (IXGBE_CB(skb)->page_released)
5288                                 dma_unmap_page_attrs(rx_ring->dev,
5289                                                      IXGBE_CB(skb)->dma,
5290                                                      ixgbe_rx_pg_size(rx_ring),
5291                                                      DMA_FROM_DEVICE,
5292                                                      IXGBE_RX_DMA_ATTR);
5293                         dev_kfree_skb(skb);
5294                 }
5295
5296                 /* Invalidate cache lines that may have been written to by
5297                  * device so that we avoid corrupting memory.
5298                  */
5299                 dma_sync_single_range_for_cpu(rx_ring->dev,
5300                                               rx_buffer->dma,
5301                                               rx_buffer->page_offset,
5302                                               ixgbe_rx_bufsz(rx_ring),
5303                                               DMA_FROM_DEVICE);
5304
5305                 /* free resources associated with mapping */
5306                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5307                                      ixgbe_rx_pg_size(rx_ring),
5308                                      DMA_FROM_DEVICE,
5309                                      IXGBE_RX_DMA_ATTR);
5310                 __page_frag_cache_drain(rx_buffer->page,
5311                                         rx_buffer->pagecnt_bias);
5312
5313                 i++;
5314                 rx_buffer++;
5315                 if (i == rx_ring->count) {
5316                         i = 0;
5317                         rx_buffer = rx_ring->rx_buffer_info;
5318                 }
5319         }
5320
5321 skip_free:
5322         rx_ring->next_to_alloc = 0;
5323         rx_ring->next_to_clean = 0;
5324         rx_ring->next_to_use = 0;
5325 }
5326
5327 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5328                              struct ixgbe_fwd_adapter *accel)
5329 {
5330         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5331         int num_tc = netdev_get_num_tc(adapter->netdev);
5332         struct net_device *vdev = accel->netdev;
5333         int i, baseq, err;
5334
5335         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5336         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5337                    accel->pool, adapter->num_rx_pools,
5338                    baseq, baseq + adapter->num_rx_queues_per_pool);
5339
5340         accel->rx_base_queue = baseq;
5341         accel->tx_base_queue = baseq;
5342
5343         /* record configuration for macvlan interface in vdev */
5344         for (i = 0; i < num_tc; i++)
5345                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5346                                              i, rss_i, baseq + (rss_i * i));
5347
5348         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5349                 adapter->rx_ring[baseq + i]->netdev = vdev;
5350
5351         /* Guarantee all rings are updated before we update the
5352          * MAC address filter.
5353          */
5354         wmb();
5355
5356         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5357          * need to only treat it as an error value if it is negative.
5358          */
5359         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5360                                    VMDQ_P(accel->pool));
5361         if (err >= 0)
5362                 return 0;
5363
5364         /* if we cannot add the MAC rule then disable the offload */
5365         macvlan_release_l2fw_offload(vdev);
5366
5367         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5368                 adapter->rx_ring[baseq + i]->netdev = NULL;
5369
5370         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5371
5372         /* unbind the queues and drop the subordinate channel config */
5373         netdev_unbind_sb_channel(adapter->netdev, vdev);
5374         netdev_set_sb_channel(vdev, 0);
5375
5376         clear_bit(accel->pool, adapter->fwd_bitmask);
5377         kfree(accel);
5378
5379         return err;
5380 }
5381
5382 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5383 {
5384         struct ixgbe_adapter *adapter = data;
5385         struct ixgbe_fwd_adapter *accel;
5386
5387         if (!netif_is_macvlan(vdev))
5388                 return 0;
5389
5390         accel = macvlan_accel_priv(vdev);
5391         if (!accel)
5392                 return 0;
5393
5394         ixgbe_fwd_ring_up(adapter, accel);
5395
5396         return 0;
5397 }
5398
5399 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5400 {
5401         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5402                                       ixgbe_macvlan_up, adapter);
5403 }
5404
5405 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5406 {
5407         struct ixgbe_hw *hw = &adapter->hw;
5408
5409         ixgbe_configure_pb(adapter);
5410 #ifdef CONFIG_IXGBE_DCB
5411         ixgbe_configure_dcb(adapter);
5412 #endif
5413         /*
5414          * We must restore virtualization before VLANs or else
5415          * the VLVF registers will not be populated
5416          */
5417         ixgbe_configure_virtualization(adapter);
5418
5419         ixgbe_set_rx_mode(adapter->netdev);
5420         ixgbe_restore_vlan(adapter);
5421         ixgbe_ipsec_restore(adapter);
5422
5423         switch (hw->mac.type) {
5424         case ixgbe_mac_82599EB:
5425         case ixgbe_mac_X540:
5426                 hw->mac.ops.disable_rx_buff(hw);
5427                 break;
5428         default:
5429                 break;
5430         }
5431
5432         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5433                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5434                                                 adapter->fdir_pballoc);
5435         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5436                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5437                                               adapter->fdir_pballoc);
5438                 ixgbe_fdir_filter_restore(adapter);
5439         }
5440
5441         switch (hw->mac.type) {
5442         case ixgbe_mac_82599EB:
5443         case ixgbe_mac_X540:
5444                 hw->mac.ops.enable_rx_buff(hw);
5445                 break;
5446         default:
5447                 break;
5448         }
5449
5450 #ifdef CONFIG_IXGBE_DCA
5451         /* configure DCA */
5452         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5453                 ixgbe_setup_dca(adapter);
5454 #endif /* CONFIG_IXGBE_DCA */
5455
5456 #ifdef IXGBE_FCOE
5457         /* configure FCoE L2 filters, redirection table, and Rx control */
5458         ixgbe_configure_fcoe(adapter);
5459
5460 #endif /* IXGBE_FCOE */
5461         ixgbe_configure_tx(adapter);
5462         ixgbe_configure_rx(adapter);
5463         ixgbe_configure_dfwd(adapter);
5464 }
5465
5466 /**
5467  * ixgbe_sfp_link_config - set up SFP+ link
5468  * @adapter: pointer to private adapter struct
5469  **/
5470 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5471 {
5472         /*
5473          * We are assuming the worst case scenario here, and that
5474          * is that an SFP was inserted/removed after the reset
5475          * but before SFP detection was enabled.  As such the best
5476          * solution is to just start searching as soon as we start
5477          */
5478         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5479                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5480
5481         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5482         adapter->sfp_poll_time = 0;
5483 }
5484
5485 /**
5486  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5487  * @hw: pointer to private hardware struct
5488  *
5489  * Returns 0 on success, negative on failure
5490  **/
5491 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5492 {
5493         u32 speed;
5494         bool autoneg, link_up = false;
5495         int ret = IXGBE_ERR_LINK_SETUP;
5496
5497         if (hw->mac.ops.check_link)
5498                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5499
5500         if (ret)
5501                 return ret;
5502
5503         speed = hw->phy.autoneg_advertised;
5504         if (!speed && hw->mac.ops.get_link_capabilities) {
5505                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5506                                                         &autoneg);
5507                 speed &= ~(IXGBE_LINK_SPEED_5GB_FULL |
5508                            IXGBE_LINK_SPEED_2_5GB_FULL);
5509         }
5510
5511         if (ret)
5512                 return ret;
5513
5514         if (hw->mac.ops.setup_link)
5515                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5516
5517         return ret;
5518 }
5519
5520 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5521 {
5522         struct ixgbe_hw *hw = &adapter->hw;
5523         u32 gpie = 0;
5524
5525         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5526                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5527                        IXGBE_GPIE_OCD;
5528                 gpie |= IXGBE_GPIE_EIAME;
5529                 /*
5530                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5531                  * this saves a register write for every interrupt
5532                  */
5533                 switch (hw->mac.type) {
5534                 case ixgbe_mac_82598EB:
5535                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5536                         break;
5537                 case ixgbe_mac_82599EB:
5538                 case ixgbe_mac_X540:
5539                 case ixgbe_mac_X550:
5540                 case ixgbe_mac_X550EM_x:
5541                 case ixgbe_mac_x550em_a:
5542                 default:
5543                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5544                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5545                         break;
5546                 }
5547         } else {
5548                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5549                  * specifically only auto mask tx and rx interrupts */
5550                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5551         }
5552
5553         /* XXX: to interrupt immediately for EICS writes, enable this */
5554         /* gpie |= IXGBE_GPIE_EIMEN; */
5555
5556         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5557                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5558
5559                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5560                 case IXGBE_82599_VMDQ_8Q_MASK:
5561                         gpie |= IXGBE_GPIE_VTMODE_16;
5562                         break;
5563                 case IXGBE_82599_VMDQ_4Q_MASK:
5564                         gpie |= IXGBE_GPIE_VTMODE_32;
5565                         break;
5566                 default:
5567                         gpie |= IXGBE_GPIE_VTMODE_64;
5568                         break;
5569                 }
5570         }
5571
5572         /* Enable Thermal over heat sensor interrupt */
5573         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5574                 switch (adapter->hw.mac.type) {
5575                 case ixgbe_mac_82599EB:
5576                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5577                         break;
5578                 default:
5579                         break;
5580                 }
5581         }
5582
5583         /* Enable fan failure interrupt */
5584         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5585                 gpie |= IXGBE_SDP1_GPIEN(hw);
5586
5587         switch (hw->mac.type) {
5588         case ixgbe_mac_82599EB:
5589                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5590                 break;
5591         case ixgbe_mac_X550EM_x:
5592         case ixgbe_mac_x550em_a:
5593                 gpie |= IXGBE_SDP0_GPIEN_X540;
5594                 break;
5595         default:
5596                 break;
5597         }
5598
5599         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5600 }
5601
5602 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5603 {
5604         struct ixgbe_hw *hw = &adapter->hw;
5605         int err;
5606         u32 ctrl_ext;
5607
5608         ixgbe_get_hw_control(adapter);
5609         ixgbe_setup_gpie(adapter);
5610
5611         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5612                 ixgbe_configure_msix(adapter);
5613         else
5614                 ixgbe_configure_msi_and_legacy(adapter);
5615
5616         /* enable the optics for 82599 SFP+ fiber */
5617         if (hw->mac.ops.enable_tx_laser)
5618                 hw->mac.ops.enable_tx_laser(hw);
5619
5620         if (hw->phy.ops.set_phy_power)
5621                 hw->phy.ops.set_phy_power(hw, true);
5622
5623         smp_mb__before_atomic();
5624         clear_bit(__IXGBE_DOWN, &adapter->state);
5625         ixgbe_napi_enable_all(adapter);
5626
5627         if (ixgbe_is_sfp(hw)) {
5628                 ixgbe_sfp_link_config(adapter);
5629         } else {
5630                 err = ixgbe_non_sfp_link_config(hw);
5631                 if (err)
5632                         e_err(probe, "link_config FAILED %d\n", err);
5633         }
5634
5635         /* clear any pending interrupts, may auto mask */
5636         IXGBE_READ_REG(hw, IXGBE_EICR);
5637         ixgbe_irq_enable(adapter, true, true);
5638
5639         /*
5640          * If this adapter has a fan, check to see if we had a failure
5641          * before we enabled the interrupt.
5642          */
5643         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5644                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5645                 if (esdp & IXGBE_ESDP_SDP1)
5646                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5647         }
5648
5649         /* bring the link up in the watchdog, this could race with our first
5650          * link up interrupt but shouldn't be a problem */
5651         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5652         adapter->link_check_timeout = jiffies;
5653         mod_timer(&adapter->service_timer, jiffies);
5654
5655         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5656         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5657         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5658         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5659 }
5660
5661 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5662 {
5663         WARN_ON(in_interrupt());
5664         /* put off any impending NetWatchDogTimeout */
5665         netif_trans_update(adapter->netdev);
5666
5667         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5668                 usleep_range(1000, 2000);
5669         if (adapter->hw.phy.type == ixgbe_phy_fw)
5670                 ixgbe_watchdog_link_is_down(adapter);
5671         ixgbe_down(adapter);
5672         /*
5673          * If SR-IOV enabled then wait a bit before bringing the adapter
5674          * back up to give the VFs time to respond to the reset.  The
5675          * two second wait is based upon the watchdog timer cycle in
5676          * the VF driver.
5677          */
5678         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5679                 msleep(2000);
5680         ixgbe_up(adapter);
5681         clear_bit(__IXGBE_RESETTING, &adapter->state);
5682 }
5683
5684 void ixgbe_up(struct ixgbe_adapter *adapter)
5685 {
5686         /* hardware has been reset, we need to reload some things */
5687         ixgbe_configure(adapter);
5688
5689         ixgbe_up_complete(adapter);
5690 }
5691
5692 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5693 {
5694         u16 devctl2;
5695
5696         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5697
5698         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5699         case IXGBE_PCIDEVCTRL2_17_34s:
5700         case IXGBE_PCIDEVCTRL2_4_8s:
5701                 /* For now we cap the upper limit on delay to 2 seconds
5702                  * as we end up going up to 34 seconds of delay in worst
5703                  * case timeout value.
5704                  */
5705         case IXGBE_PCIDEVCTRL2_1_2s:
5706                 return 2000000ul;       /* 2.0 s */
5707         case IXGBE_PCIDEVCTRL2_260_520ms:
5708                 return 520000ul;        /* 520 ms */
5709         case IXGBE_PCIDEVCTRL2_65_130ms:
5710                 return 130000ul;        /* 130 ms */
5711         case IXGBE_PCIDEVCTRL2_16_32ms:
5712                 return 32000ul;         /* 32 ms */
5713         case IXGBE_PCIDEVCTRL2_1_2ms:
5714                 return 2000ul;          /* 2 ms */
5715         case IXGBE_PCIDEVCTRL2_50_100us:
5716                 return 100ul;           /* 100 us */
5717         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5718                 return 32000ul;         /* 32 ms */
5719         default:
5720                 break;
5721         }
5722
5723         /* We shouldn't need to hit this path, but just in case default as
5724          * though completion timeout is not supported and support 32ms.
5725          */
5726         return 32000ul;
5727 }
5728
5729 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5730 {
5731         unsigned long wait_delay, delay_interval;
5732         struct ixgbe_hw *hw = &adapter->hw;
5733         int i, wait_loop;
5734         u32 rxdctl;
5735
5736         /* disable receives */
5737         hw->mac.ops.disable_rx(hw);
5738
5739         if (ixgbe_removed(hw->hw_addr))
5740                 return;
5741
5742         /* disable all enabled Rx queues */
5743         for (i = 0; i < adapter->num_rx_queues; i++) {
5744                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5745                 u8 reg_idx = ring->reg_idx;
5746
5747                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5748                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5749                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5750
5751                 /* write value back with RXDCTL.ENABLE bit cleared */
5752                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5753         }
5754
5755         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5756         if (hw->mac.type == ixgbe_mac_82598EB &&
5757             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5758                 return;
5759
5760         /* Determine our minimum delay interval. We will increase this value
5761          * with each subsequent test. This way if the device returns quickly
5762          * we should spend as little time as possible waiting, however as
5763          * the time increases we will wait for larger periods of time.
5764          *
5765          * The trick here is that we increase the interval using the
5766          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5767          * of that wait is that it totals up to 100x whatever interval we
5768          * choose. Since our minimum wait is 100us we can just divide the
5769          * total timeout by 100 to get our minimum delay interval.
5770          */
5771         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5772
5773         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5774         wait_delay = delay_interval;
5775
5776         while (wait_loop--) {
5777                 usleep_range(wait_delay, wait_delay + 10);
5778                 wait_delay += delay_interval * 2;
5779                 rxdctl = 0;
5780
5781                 /* OR together the reading of all the active RXDCTL registers,
5782                  * and then test the result. We need the disable to complete
5783                  * before we start freeing the memory and invalidating the
5784                  * DMA mappings.
5785                  */
5786                 for (i = 0; i < adapter->num_rx_queues; i++) {
5787                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5788                         u8 reg_idx = ring->reg_idx;
5789
5790                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5791                 }
5792
5793                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5794                         return;
5795         }
5796
5797         e_err(drv,
5798               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5799 }
5800
5801 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5802 {
5803         unsigned long wait_delay, delay_interval;
5804         struct ixgbe_hw *hw = &adapter->hw;
5805         int i, wait_loop;
5806         u32 txdctl;
5807
5808         if (ixgbe_removed(hw->hw_addr))
5809                 return;
5810
5811         /* disable all enabled Tx queues */
5812         for (i = 0; i < adapter->num_tx_queues; i++) {
5813                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5814                 u8 reg_idx = ring->reg_idx;
5815
5816                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5817         }
5818
5819         /* disable all enabled XDP Tx queues */
5820         for (i = 0; i < adapter->num_xdp_queues; i++) {
5821                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5822                 u8 reg_idx = ring->reg_idx;
5823
5824                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5825         }
5826
5827         /* If the link is not up there shouldn't be much in the way of
5828          * pending transactions. Those that are left will be flushed out
5829          * when the reset logic goes through the flush sequence to clean out
5830          * the pending Tx transactions.
5831          */
5832         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5833                 goto dma_engine_disable;
5834
5835         /* Determine our minimum delay interval. We will increase this value
5836          * with each subsequent test. This way if the device returns quickly
5837          * we should spend as little time as possible waiting, however as
5838          * the time increases we will wait for larger periods of time.
5839          *
5840          * The trick here is that we increase the interval using the
5841          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5842          * of that wait is that it totals up to 100x whatever interval we
5843          * choose. Since our minimum wait is 100us we can just divide the
5844          * total timeout by 100 to get our minimum delay interval.
5845          */
5846         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5847
5848         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5849         wait_delay = delay_interval;
5850
5851         while (wait_loop--) {
5852                 usleep_range(wait_delay, wait_delay + 10);
5853                 wait_delay += delay_interval * 2;
5854                 txdctl = 0;
5855
5856                 /* OR together the reading of all the active TXDCTL registers,
5857                  * and then test the result. We need the disable to complete
5858                  * before we start freeing the memory and invalidating the
5859                  * DMA mappings.
5860                  */
5861                 for (i = 0; i < adapter->num_tx_queues; i++) {
5862                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5863                         u8 reg_idx = ring->reg_idx;
5864
5865                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5866                 }
5867                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5868                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5869                         u8 reg_idx = ring->reg_idx;
5870
5871                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5872                 }
5873
5874                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5875                         goto dma_engine_disable;
5876         }
5877
5878         e_err(drv,
5879               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5880
5881 dma_engine_disable:
5882         /* Disable the Tx DMA engine on 82599 and later MAC */
5883         switch (hw->mac.type) {
5884         case ixgbe_mac_82599EB:
5885         case ixgbe_mac_X540:
5886         case ixgbe_mac_X550:
5887         case ixgbe_mac_X550EM_x:
5888         case ixgbe_mac_x550em_a:
5889                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5890                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5891                                  ~IXGBE_DMATXCTL_TE));
5892                 fallthrough;
5893         default:
5894                 break;
5895         }
5896 }
5897
5898 void ixgbe_reset(struct ixgbe_adapter *adapter)
5899 {
5900         struct ixgbe_hw *hw = &adapter->hw;
5901         struct net_device *netdev = adapter->netdev;
5902         int err;
5903
5904         if (ixgbe_removed(hw->hw_addr))
5905                 return;
5906         /* lock SFP init bit to prevent race conditions with the watchdog */
5907         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5908                 usleep_range(1000, 2000);
5909
5910         /* clear all SFP and link config related flags while holding SFP_INIT */
5911         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5912                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5913         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5914
5915         err = hw->mac.ops.init_hw(hw);
5916         switch (err) {
5917         case 0:
5918         case IXGBE_ERR_SFP_NOT_PRESENT:
5919         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5920                 break;
5921         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5922                 e_dev_err("master disable timed out\n");
5923                 break;
5924         case IXGBE_ERR_EEPROM_VERSION:
5925                 /* We are running on a pre-production device, log a warning */
5926                 e_dev_warn("This device is a pre-production adapter/LOM. "
5927                            "Please be aware there may be issues associated with "
5928                            "your hardware.  If you are experiencing problems "
5929                            "please contact your Intel or hardware "
5930                            "representative who provided you with this "
5931                            "hardware.\n");
5932                 break;
5933         default:
5934                 e_dev_err("Hardware Error: %d\n", err);
5935         }
5936
5937         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5938
5939         /* flush entries out of MAC table */
5940         ixgbe_flush_sw_mac_table(adapter);
5941         __dev_uc_unsync(netdev, NULL);
5942
5943         /* do not flush user set addresses */
5944         ixgbe_mac_set_default_filter(adapter);
5945
5946         /* update SAN MAC vmdq pool selection */
5947         if (hw->mac.san_mac_rar_index)
5948                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5949
5950         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5951                 ixgbe_ptp_reset(adapter);
5952
5953         if (hw->phy.ops.set_phy_power) {
5954                 if (!netif_running(adapter->netdev) && !adapter->wol)
5955                         hw->phy.ops.set_phy_power(hw, false);
5956                 else
5957                         hw->phy.ops.set_phy_power(hw, true);
5958         }
5959 }
5960
5961 /**
5962  * ixgbe_clean_tx_ring - Free Tx Buffers
5963  * @tx_ring: ring to be cleaned
5964  **/
5965 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5966 {
5967         u16 i = tx_ring->next_to_clean;
5968         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5969
5970         if (tx_ring->xsk_umem) {
5971                 ixgbe_xsk_clean_tx_ring(tx_ring);
5972                 goto out;
5973         }
5974
5975         while (i != tx_ring->next_to_use) {
5976                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5977
5978                 /* Free all the Tx ring sk_buffs */
5979                 if (ring_is_xdp(tx_ring))
5980                         xdp_return_frame(tx_buffer->xdpf);
5981                 else
5982                         dev_kfree_skb_any(tx_buffer->skb);
5983
5984                 /* unmap skb header data */
5985                 dma_unmap_single(tx_ring->dev,
5986                                  dma_unmap_addr(tx_buffer, dma),
5987                                  dma_unmap_len(tx_buffer, len),
5988                                  DMA_TO_DEVICE);
5989
5990                 /* check for eop_desc to determine the end of the packet */
5991                 eop_desc = tx_buffer->next_to_watch;
5992                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5993
5994                 /* unmap remaining buffers */
5995                 while (tx_desc != eop_desc) {
5996                         tx_buffer++;
5997                         tx_desc++;
5998                         i++;
5999                         if (unlikely(i == tx_ring->count)) {
6000                                 i = 0;
6001                                 tx_buffer = tx_ring->tx_buffer_info;
6002                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6003                         }
6004
6005                         /* unmap any remaining paged data */
6006                         if (dma_unmap_len(tx_buffer, len))
6007                                 dma_unmap_page(tx_ring->dev,
6008                                                dma_unmap_addr(tx_buffer, dma),
6009                                                dma_unmap_len(tx_buffer, len),
6010                                                DMA_TO_DEVICE);
6011                 }
6012
6013                 /* move us one more past the eop_desc for start of next pkt */
6014                 tx_buffer++;
6015                 i++;
6016                 if (unlikely(i == tx_ring->count)) {
6017                         i = 0;
6018                         tx_buffer = tx_ring->tx_buffer_info;
6019                 }
6020         }
6021
6022         /* reset BQL for queue */
6023         if (!ring_is_xdp(tx_ring))
6024                 netdev_tx_reset_queue(txring_txq(tx_ring));
6025
6026 out:
6027         /* reset next_to_use and next_to_clean */
6028         tx_ring->next_to_use = 0;
6029         tx_ring->next_to_clean = 0;
6030 }
6031
6032 /**
6033  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6034  * @adapter: board private structure
6035  **/
6036 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6037 {
6038         int i;
6039
6040         for (i = 0; i < adapter->num_rx_queues; i++)
6041                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6042 }
6043
6044 /**
6045  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6046  * @adapter: board private structure
6047  **/
6048 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6049 {
6050         int i;
6051
6052         for (i = 0; i < adapter->num_tx_queues; i++)
6053                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6054         for (i = 0; i < adapter->num_xdp_queues; i++)
6055                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6056 }
6057
6058 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6059 {
6060         struct hlist_node *node2;
6061         struct ixgbe_fdir_filter *filter;
6062
6063         spin_lock(&adapter->fdir_perfect_lock);
6064
6065         hlist_for_each_entry_safe(filter, node2,
6066                                   &adapter->fdir_filter_list, fdir_node) {
6067                 hlist_del(&filter->fdir_node);
6068                 kfree(filter);
6069         }
6070         adapter->fdir_filter_count = 0;
6071
6072         spin_unlock(&adapter->fdir_perfect_lock);
6073 }
6074
6075 void ixgbe_down(struct ixgbe_adapter *adapter)
6076 {
6077         struct net_device *netdev = adapter->netdev;
6078         struct ixgbe_hw *hw = &adapter->hw;
6079         int i;
6080
6081         /* signal that we are down to the interrupt handler */
6082         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6083                 return; /* do nothing if already down */
6084
6085         /* Shut off incoming Tx traffic */
6086         netif_tx_stop_all_queues(netdev);
6087
6088         /* call carrier off first to avoid false dev_watchdog timeouts */
6089         netif_carrier_off(netdev);
6090         netif_tx_disable(netdev);
6091
6092         /* Disable Rx */
6093         ixgbe_disable_rx(adapter);
6094
6095         /* synchronize_rcu() needed for pending XDP buffers to drain */
6096         if (adapter->xdp_ring[0])
6097                 synchronize_rcu();
6098
6099         ixgbe_irq_disable(adapter);
6100
6101         ixgbe_napi_disable_all(adapter);
6102
6103         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6104         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6105         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6106
6107         del_timer_sync(&adapter->service_timer);
6108
6109         if (adapter->num_vfs) {
6110                 /* Clear EITR Select mapping */
6111                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6112
6113                 /* Mark all the VFs as inactive */
6114                 for (i = 0 ; i < adapter->num_vfs; i++)
6115                         adapter->vfinfo[i].clear_to_send = false;
6116
6117                 /* ping all the active vfs to let them know we are going down */
6118                 ixgbe_ping_all_vfs(adapter);
6119
6120                 /* Disable all VFTE/VFRE TX/RX */
6121                 ixgbe_disable_tx_rx(adapter);
6122         }
6123
6124         /* disable transmits in the hardware now that interrupts are off */
6125         ixgbe_disable_tx(adapter);
6126
6127         if (!pci_channel_offline(adapter->pdev))
6128                 ixgbe_reset(adapter);
6129
6130         /* power down the optics for 82599 SFP+ fiber */
6131         if (hw->mac.ops.disable_tx_laser)
6132                 hw->mac.ops.disable_tx_laser(hw);
6133
6134         ixgbe_clean_all_tx_rings(adapter);
6135         ixgbe_clean_all_rx_rings(adapter);
6136 }
6137
6138 /**
6139  * ixgbe_eee_capable - helper function to determine EEE support on X550
6140  * @adapter: board private structure
6141  */
6142 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6143 {
6144         struct ixgbe_hw *hw = &adapter->hw;
6145
6146         switch (hw->device_id) {
6147         case IXGBE_DEV_ID_X550EM_A_1G_T:
6148         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6149                 if (!hw->phy.eee_speeds_supported)
6150                         break;
6151                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6152                 if (!hw->phy.eee_speeds_advertised)
6153                         break;
6154                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6155                 break;
6156         default:
6157                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6158                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6159                 break;
6160         }
6161 }
6162
6163 /**
6164  * ixgbe_tx_timeout - Respond to a Tx Hang
6165  * @netdev: network interface device structure
6166  **/
6167 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int txqueue)
6168 {
6169         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6170
6171         /* Do the reset outside of interrupt context */
6172         ixgbe_tx_timeout_reset(adapter);
6173 }
6174
6175 #ifdef CONFIG_IXGBE_DCB
6176 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6177 {
6178         struct ixgbe_hw *hw = &adapter->hw;
6179         struct tc_configuration *tc;
6180         int j;
6181
6182         switch (hw->mac.type) {
6183         case ixgbe_mac_82598EB:
6184         case ixgbe_mac_82599EB:
6185                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6186                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6187                 break;
6188         case ixgbe_mac_X540:
6189         case ixgbe_mac_X550:
6190                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6191                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6192                 break;
6193         case ixgbe_mac_X550EM_x:
6194         case ixgbe_mac_x550em_a:
6195         default:
6196                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6197                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6198                 break;
6199         }
6200
6201         /* Configure DCB traffic classes */
6202         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6203                 tc = &adapter->dcb_cfg.tc_config[j];
6204                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6205                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6206                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6207                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6208                 tc->dcb_pfc = pfc_disabled;
6209         }
6210
6211         /* Initialize default user to priority mapping, UPx->TC0 */
6212         tc = &adapter->dcb_cfg.tc_config[0];
6213         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6214         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6215
6216         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6217         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6218         adapter->dcb_cfg.pfc_mode_enable = false;
6219         adapter->dcb_set_bitmap = 0x00;
6220         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6221                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6222         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6223                sizeof(adapter->temp_dcb_cfg));
6224 }
6225 #endif
6226
6227 /**
6228  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6229  * @adapter: board private structure to initialize
6230  * @ii: pointer to ixgbe_info for device
6231  *
6232  * ixgbe_sw_init initializes the Adapter private data structure.
6233  * Fields are initialized based on PCI device information and
6234  * OS network device settings (MTU size).
6235  **/
6236 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6237                          const struct ixgbe_info *ii)
6238 {
6239         struct ixgbe_hw *hw = &adapter->hw;
6240         struct pci_dev *pdev = adapter->pdev;
6241         unsigned int rss, fdir;
6242         u32 fwsm;
6243         int i;
6244
6245         /* PCI config space info */
6246
6247         hw->vendor_id = pdev->vendor;
6248         hw->device_id = pdev->device;
6249         hw->revision_id = pdev->revision;
6250         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6251         hw->subsystem_device_id = pdev->subsystem_device;
6252
6253         /* get_invariants needs the device IDs */
6254         ii->get_invariants(hw);
6255
6256         /* Set common capability flags and settings */
6257         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6258         adapter->ring_feature[RING_F_RSS].limit = rss;
6259         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6260         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6261         adapter->atr_sample_rate = 20;
6262         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6263         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6264         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6265         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6266 #ifdef CONFIG_IXGBE_DCA
6267         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6268 #endif
6269 #ifdef CONFIG_IXGBE_DCB
6270         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6271         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6272 #endif
6273 #ifdef IXGBE_FCOE
6274         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6275         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6276 #ifdef CONFIG_IXGBE_DCB
6277         /* Default traffic class to use for FCoE */
6278         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6279 #endif /* CONFIG_IXGBE_DCB */
6280 #endif /* IXGBE_FCOE */
6281
6282         /* initialize static ixgbe jump table entries */
6283         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6284                                           GFP_KERNEL);
6285         if (!adapter->jump_tables[0])
6286                 return -ENOMEM;
6287         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6288
6289         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6290                 adapter->jump_tables[i] = NULL;
6291
6292         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6293                                      sizeof(struct ixgbe_mac_addr),
6294                                      GFP_KERNEL);
6295         if (!adapter->mac_table)
6296                 return -ENOMEM;
6297
6298         if (ixgbe_init_rss_key(adapter))
6299                 return -ENOMEM;
6300
6301         adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6302         if (!adapter->af_xdp_zc_qps)
6303                 return -ENOMEM;
6304
6305         /* Set MAC specific capability flags and exceptions */
6306         switch (hw->mac.type) {
6307         case ixgbe_mac_82598EB:
6308                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6309
6310                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6311                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6312
6313                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6314                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6315                 adapter->atr_sample_rate = 0;
6316                 adapter->fdir_pballoc = 0;
6317 #ifdef IXGBE_FCOE
6318                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6319                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6320 #ifdef CONFIG_IXGBE_DCB
6321                 adapter->fcoe.up = 0;
6322 #endif /* IXGBE_DCB */
6323 #endif /* IXGBE_FCOE */
6324                 break;
6325         case ixgbe_mac_82599EB:
6326                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6327                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6328                 break;
6329         case ixgbe_mac_X540:
6330                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6331                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6332                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6333                 break;
6334         case ixgbe_mac_x550em_a:
6335                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6336                 switch (hw->device_id) {
6337                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6338                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6339                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6340                         break;
6341                 default:
6342                         break;
6343                 }
6344                 fallthrough;
6345         case ixgbe_mac_X550EM_x:
6346 #ifdef CONFIG_IXGBE_DCB
6347                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6348 #endif
6349 #ifdef IXGBE_FCOE
6350                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6351 #ifdef CONFIG_IXGBE_DCB
6352                 adapter->fcoe.up = 0;
6353 #endif /* IXGBE_DCB */
6354 #endif /* IXGBE_FCOE */
6355                 fallthrough;
6356         case ixgbe_mac_X550:
6357                 if (hw->mac.type == ixgbe_mac_X550)
6358                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6359 #ifdef CONFIG_IXGBE_DCA
6360                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6361 #endif
6362                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6363                 break;
6364         default:
6365                 break;
6366         }
6367
6368 #ifdef IXGBE_FCOE
6369         /* FCoE support exists, always init the FCoE lock */
6370         spin_lock_init(&adapter->fcoe.lock);
6371
6372 #endif
6373         /* n-tuple support exists, always init our spinlock */
6374         spin_lock_init(&adapter->fdir_perfect_lock);
6375
6376 #ifdef CONFIG_IXGBE_DCB
6377         ixgbe_init_dcb(adapter);
6378 #endif
6379         ixgbe_init_ipsec_offload(adapter);
6380
6381         /* default flow control settings */
6382         hw->fc.requested_mode = ixgbe_fc_full;
6383         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6384         ixgbe_pbthresh_setup(adapter);
6385         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6386         hw->fc.send_xon = true;
6387         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6388
6389 #ifdef CONFIG_PCI_IOV
6390         if (max_vfs > 0)
6391                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6392
6393         /* assign number of SR-IOV VFs */
6394         if (hw->mac.type != ixgbe_mac_82598EB) {
6395                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6396                         max_vfs = 0;
6397                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6398                 }
6399         }
6400 #endif /* CONFIG_PCI_IOV */
6401
6402         /* enable itr by default in dynamic mode */
6403         adapter->rx_itr_setting = 1;
6404         adapter->tx_itr_setting = 1;
6405
6406         /* set default ring sizes */
6407         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6408         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6409
6410         /* set default work limits */
6411         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6412
6413         /* initialize eeprom parameters */
6414         if (ixgbe_init_eeprom_params_generic(hw)) {
6415                 e_dev_err("EEPROM initialization failed\n");
6416                 return -EIO;
6417         }
6418
6419         /* PF holds first pool slot */
6420         set_bit(0, adapter->fwd_bitmask);
6421         set_bit(__IXGBE_DOWN, &adapter->state);
6422
6423         return 0;
6424 }
6425
6426 /**
6427  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6428  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6429  *
6430  * Return 0 on success, negative on failure
6431  **/
6432 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6433 {
6434         struct device *dev = tx_ring->dev;
6435         int orig_node = dev_to_node(dev);
6436         int ring_node = NUMA_NO_NODE;
6437         int size;
6438
6439         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6440
6441         if (tx_ring->q_vector)
6442                 ring_node = tx_ring->q_vector->numa_node;
6443
6444         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6445         if (!tx_ring->tx_buffer_info)
6446                 tx_ring->tx_buffer_info = vmalloc(size);
6447         if (!tx_ring->tx_buffer_info)
6448                 goto err;
6449
6450         /* round up to nearest 4K */
6451         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6452         tx_ring->size = ALIGN(tx_ring->size, 4096);
6453
6454         set_dev_node(dev, ring_node);
6455         tx_ring->desc = dma_alloc_coherent(dev,
6456                                            tx_ring->size,
6457                                            &tx_ring->dma,
6458                                            GFP_KERNEL);
6459         set_dev_node(dev, orig_node);
6460         if (!tx_ring->desc)
6461                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6462                                                    &tx_ring->dma, GFP_KERNEL);
6463         if (!tx_ring->desc)
6464                 goto err;
6465
6466         tx_ring->next_to_use = 0;
6467         tx_ring->next_to_clean = 0;
6468         return 0;
6469
6470 err:
6471         vfree(tx_ring->tx_buffer_info);
6472         tx_ring->tx_buffer_info = NULL;
6473         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6474         return -ENOMEM;
6475 }
6476
6477 /**
6478  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6479  * @adapter: board private structure
6480  *
6481  * If this function returns with an error, then it's possible one or
6482  * more of the rings is populated (while the rest are not).  It is the
6483  * callers duty to clean those orphaned rings.
6484  *
6485  * Return 0 on success, negative on failure
6486  **/
6487 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6488 {
6489         int i, j = 0, err = 0;
6490
6491         for (i = 0; i < adapter->num_tx_queues; i++) {
6492                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6493                 if (!err)
6494                         continue;
6495
6496                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6497                 goto err_setup_tx;
6498         }
6499         for (j = 0; j < adapter->num_xdp_queues; j++) {
6500                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6501                 if (!err)
6502                         continue;
6503
6504                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6505                 goto err_setup_tx;
6506         }
6507
6508         return 0;
6509 err_setup_tx:
6510         /* rewind the index freeing the rings as we go */
6511         while (j--)
6512                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6513         while (i--)
6514                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6515         return err;
6516 }
6517
6518 /**
6519  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6520  * @adapter: pointer to ixgbe_adapter
6521  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6522  *
6523  * Returns 0 on success, negative on failure
6524  **/
6525 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6526                              struct ixgbe_ring *rx_ring)
6527 {
6528         struct device *dev = rx_ring->dev;
6529         int orig_node = dev_to_node(dev);
6530         int ring_node = NUMA_NO_NODE;
6531         int size;
6532
6533         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6534
6535         if (rx_ring->q_vector)
6536                 ring_node = rx_ring->q_vector->numa_node;
6537
6538         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6539         if (!rx_ring->rx_buffer_info)
6540                 rx_ring->rx_buffer_info = vmalloc(size);
6541         if (!rx_ring->rx_buffer_info)
6542                 goto err;
6543
6544         /* Round up to nearest 4K */
6545         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6546         rx_ring->size = ALIGN(rx_ring->size, 4096);
6547
6548         set_dev_node(dev, ring_node);
6549         rx_ring->desc = dma_alloc_coherent(dev,
6550                                            rx_ring->size,
6551                                            &rx_ring->dma,
6552                                            GFP_KERNEL);
6553         set_dev_node(dev, orig_node);
6554         if (!rx_ring->desc)
6555                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6556                                                    &rx_ring->dma, GFP_KERNEL);
6557         if (!rx_ring->desc)
6558                 goto err;
6559
6560         rx_ring->next_to_clean = 0;
6561         rx_ring->next_to_use = 0;
6562
6563         /* XDP RX-queue info */
6564         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6565                              rx_ring->queue_index) < 0)
6566                 goto err;
6567
6568         rx_ring->xdp_prog = adapter->xdp_prog;
6569
6570         return 0;
6571 err:
6572         vfree(rx_ring->rx_buffer_info);
6573         rx_ring->rx_buffer_info = NULL;
6574         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6575         return -ENOMEM;
6576 }
6577
6578 /**
6579  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6580  * @adapter: board private structure
6581  *
6582  * If this function returns with an error, then it's possible one or
6583  * more of the rings is populated (while the rest are not).  It is the
6584  * callers duty to clean those orphaned rings.
6585  *
6586  * Return 0 on success, negative on failure
6587  **/
6588 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6589 {
6590         int i, err = 0;
6591
6592         for (i = 0; i < adapter->num_rx_queues; i++) {
6593                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6594                 if (!err)
6595                         continue;
6596
6597                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6598                 goto err_setup_rx;
6599         }
6600
6601 #ifdef IXGBE_FCOE
6602         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6603         if (!err)
6604 #endif
6605                 return 0;
6606 err_setup_rx:
6607         /* rewind the index freeing the rings as we go */
6608         while (i--)
6609                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6610         return err;
6611 }
6612
6613 /**
6614  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6615  * @tx_ring: Tx descriptor ring for a specific queue
6616  *
6617  * Free all transmit software resources
6618  **/
6619 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6620 {
6621         ixgbe_clean_tx_ring(tx_ring);
6622
6623         vfree(tx_ring->tx_buffer_info);
6624         tx_ring->tx_buffer_info = NULL;
6625
6626         /* if not set, then don't free */
6627         if (!tx_ring->desc)
6628                 return;
6629
6630         dma_free_coherent(tx_ring->dev, tx_ring->size,
6631                           tx_ring->desc, tx_ring->dma);
6632
6633         tx_ring->desc = NULL;
6634 }
6635
6636 /**
6637  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6638  * @adapter: board private structure
6639  *
6640  * Free all transmit software resources
6641  **/
6642 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6643 {
6644         int i;
6645
6646         for (i = 0; i < adapter->num_tx_queues; i++)
6647                 if (adapter->tx_ring[i]->desc)
6648                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6649         for (i = 0; i < adapter->num_xdp_queues; i++)
6650                 if (adapter->xdp_ring[i]->desc)
6651                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6652 }
6653
6654 /**
6655  * ixgbe_free_rx_resources - Free Rx Resources
6656  * @rx_ring: ring to clean the resources from
6657  *
6658  * Free all receive software resources
6659  **/
6660 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6661 {
6662         ixgbe_clean_rx_ring(rx_ring);
6663
6664         rx_ring->xdp_prog = NULL;
6665         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6666         vfree(rx_ring->rx_buffer_info);
6667         rx_ring->rx_buffer_info = NULL;
6668
6669         /* if not set, then don't free */
6670         if (!rx_ring->desc)
6671                 return;
6672
6673         dma_free_coherent(rx_ring->dev, rx_ring->size,
6674                           rx_ring->desc, rx_ring->dma);
6675
6676         rx_ring->desc = NULL;
6677 }
6678
6679 /**
6680  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6681  * @adapter: board private structure
6682  *
6683  * Free all receive software resources
6684  **/
6685 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6686 {
6687         int i;
6688
6689 #ifdef IXGBE_FCOE
6690         ixgbe_free_fcoe_ddp_resources(adapter);
6691
6692 #endif
6693         for (i = 0; i < adapter->num_rx_queues; i++)
6694                 if (adapter->rx_ring[i]->desc)
6695                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6696 }
6697
6698 /**
6699  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6700  * @netdev: network interface device structure
6701  * @new_mtu: new value for maximum frame size
6702  *
6703  * Returns 0 on success, negative on failure
6704  **/
6705 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6706 {
6707         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6708
6709         if (adapter->xdp_prog) {
6710                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6711                                      VLAN_HLEN;
6712                 int i;
6713
6714                 for (i = 0; i < adapter->num_rx_queues; i++) {
6715                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6716
6717                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6718                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6719                                 return -EINVAL;
6720                         }
6721                 }
6722         }
6723
6724         /*
6725          * For 82599EB we cannot allow legacy VFs to enable their receive
6726          * paths when MTU greater than 1500 is configured.  So display a
6727          * warning that legacy VFs will be disabled.
6728          */
6729         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6730             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6731             (new_mtu > ETH_DATA_LEN))
6732                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6733
6734         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6735                    netdev->mtu, new_mtu);
6736
6737         /* must set new MTU before calling down or up */
6738         netdev->mtu = new_mtu;
6739
6740         if (netif_running(netdev))
6741                 ixgbe_reinit_locked(adapter);
6742
6743         return 0;
6744 }
6745
6746 /**
6747  * ixgbe_open - Called when a network interface is made active
6748  * @netdev: network interface device structure
6749  *
6750  * Returns 0 on success, negative value on failure
6751  *
6752  * The open entry point is called when a network interface is made
6753  * active by the system (IFF_UP).  At this point all resources needed
6754  * for transmit and receive operations are allocated, the interrupt
6755  * handler is registered with the OS, the watchdog timer is started,
6756  * and the stack is notified that the interface is ready.
6757  **/
6758 int ixgbe_open(struct net_device *netdev)
6759 {
6760         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6761         struct ixgbe_hw *hw = &adapter->hw;
6762         int err, queues;
6763
6764         /* disallow open during test */
6765         if (test_bit(__IXGBE_TESTING, &adapter->state))
6766                 return -EBUSY;
6767
6768         netif_carrier_off(netdev);
6769
6770         /* allocate transmit descriptors */
6771         err = ixgbe_setup_all_tx_resources(adapter);
6772         if (err)
6773                 goto err_setup_tx;
6774
6775         /* allocate receive descriptors */
6776         err = ixgbe_setup_all_rx_resources(adapter);
6777         if (err)
6778                 goto err_setup_rx;
6779
6780         ixgbe_configure(adapter);
6781
6782         err = ixgbe_request_irq(adapter);
6783         if (err)
6784                 goto err_req_irq;
6785
6786         /* Notify the stack of the actual queue counts. */
6787         queues = adapter->num_tx_queues;
6788         err = netif_set_real_num_tx_queues(netdev, queues);
6789         if (err)
6790                 goto err_set_queues;
6791
6792         queues = adapter->num_rx_queues;
6793         err = netif_set_real_num_rx_queues(netdev, queues);
6794         if (err)
6795                 goto err_set_queues;
6796
6797         ixgbe_ptp_init(adapter);
6798
6799         ixgbe_up_complete(adapter);
6800
6801         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6802         udp_tunnel_get_rx_info(netdev);
6803
6804         return 0;
6805
6806 err_set_queues:
6807         ixgbe_free_irq(adapter);
6808 err_req_irq:
6809         ixgbe_free_all_rx_resources(adapter);
6810         if (hw->phy.ops.set_phy_power && !adapter->wol)
6811                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6812 err_setup_rx:
6813         ixgbe_free_all_tx_resources(adapter);
6814 err_setup_tx:
6815         ixgbe_reset(adapter);
6816
6817         return err;
6818 }
6819
6820 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6821 {
6822         ixgbe_ptp_suspend(adapter);
6823
6824         if (adapter->hw.phy.ops.enter_lplu) {
6825                 adapter->hw.phy.reset_disable = true;
6826                 ixgbe_down(adapter);
6827                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6828                 adapter->hw.phy.reset_disable = false;
6829         } else {
6830                 ixgbe_down(adapter);
6831         }
6832
6833         ixgbe_free_irq(adapter);
6834
6835         ixgbe_free_all_tx_resources(adapter);
6836         ixgbe_free_all_rx_resources(adapter);
6837 }
6838
6839 /**
6840  * ixgbe_close - Disables a network interface
6841  * @netdev: network interface device structure
6842  *
6843  * Returns 0, this is not allowed to fail
6844  *
6845  * The close entry point is called when an interface is de-activated
6846  * by the OS.  The hardware is still under the drivers control, but
6847  * needs to be disabled.  A global MAC reset is issued to stop the
6848  * hardware, and all transmit and receive resources are freed.
6849  **/
6850 int ixgbe_close(struct net_device *netdev)
6851 {
6852         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6853
6854         ixgbe_ptp_stop(adapter);
6855
6856         if (netif_device_present(netdev))
6857                 ixgbe_close_suspend(adapter);
6858
6859         ixgbe_fdir_filter_exit(adapter);
6860
6861         ixgbe_release_hw_control(adapter);
6862
6863         return 0;
6864 }
6865
6866 #ifdef CONFIG_PM
6867 static int ixgbe_resume(struct pci_dev *pdev)
6868 {
6869         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6870         struct net_device *netdev = adapter->netdev;
6871         u32 err;
6872
6873         adapter->hw.hw_addr = adapter->io_addr;
6874         pci_set_power_state(pdev, PCI_D0);
6875         pci_restore_state(pdev);
6876         /*
6877          * pci_restore_state clears dev->state_saved so call
6878          * pci_save_state to restore it.
6879          */
6880         pci_save_state(pdev);
6881
6882         err = pci_enable_device_mem(pdev);
6883         if (err) {
6884                 e_dev_err("Cannot enable PCI device from suspend\n");
6885                 return err;
6886         }
6887         smp_mb__before_atomic();
6888         clear_bit(__IXGBE_DISABLED, &adapter->state);
6889         pci_set_master(pdev);
6890
6891         pci_wake_from_d3(pdev, false);
6892
6893         ixgbe_reset(adapter);
6894
6895         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6896
6897         rtnl_lock();
6898         err = ixgbe_init_interrupt_scheme(adapter);
6899         if (!err && netif_running(netdev))
6900                 err = ixgbe_open(netdev);
6901
6902
6903         if (!err)
6904                 netif_device_attach(netdev);
6905         rtnl_unlock();
6906
6907         return err;
6908 }
6909 #endif /* CONFIG_PM */
6910
6911 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6912 {
6913         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6914         struct net_device *netdev = adapter->netdev;
6915         struct ixgbe_hw *hw = &adapter->hw;
6916         u32 ctrl;
6917         u32 wufc = adapter->wol;
6918 #ifdef CONFIG_PM
6919         int retval = 0;
6920 #endif
6921
6922         rtnl_lock();
6923         netif_device_detach(netdev);
6924
6925         if (netif_running(netdev))
6926                 ixgbe_close_suspend(adapter);
6927
6928         ixgbe_clear_interrupt_scheme(adapter);
6929         rtnl_unlock();
6930
6931 #ifdef CONFIG_PM
6932         retval = pci_save_state(pdev);
6933         if (retval)
6934                 return retval;
6935
6936 #endif
6937         if (hw->mac.ops.stop_link_on_d3)
6938                 hw->mac.ops.stop_link_on_d3(hw);
6939
6940         if (wufc) {
6941                 u32 fctrl;
6942
6943                 ixgbe_set_rx_mode(netdev);
6944
6945                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6946                 if (hw->mac.ops.enable_tx_laser)
6947                         hw->mac.ops.enable_tx_laser(hw);
6948
6949                 /* enable the reception of multicast packets */
6950                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6951                 fctrl |= IXGBE_FCTRL_MPE;
6952                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6953
6954                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6955                 ctrl |= IXGBE_CTRL_GIO_DIS;
6956                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6957
6958                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6959         } else {
6960                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6961                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6962         }
6963
6964         switch (hw->mac.type) {
6965         case ixgbe_mac_82598EB:
6966                 pci_wake_from_d3(pdev, false);
6967                 break;
6968         case ixgbe_mac_82599EB:
6969         case ixgbe_mac_X540:
6970         case ixgbe_mac_X550:
6971         case ixgbe_mac_X550EM_x:
6972         case ixgbe_mac_x550em_a:
6973                 pci_wake_from_d3(pdev, !!wufc);
6974                 break;
6975         default:
6976                 break;
6977         }
6978
6979         *enable_wake = !!wufc;
6980         if (hw->phy.ops.set_phy_power && !*enable_wake)
6981                 hw->phy.ops.set_phy_power(hw, false);
6982
6983         ixgbe_release_hw_control(adapter);
6984
6985         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6986                 pci_disable_device(pdev);
6987
6988         return 0;
6989 }
6990
6991 #ifdef CONFIG_PM
6992 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6993 {
6994         int retval;
6995         bool wake;
6996
6997         retval = __ixgbe_shutdown(pdev, &wake);
6998         if (retval)
6999                 return retval;
7000
7001         if (wake) {
7002                 pci_prepare_to_sleep(pdev);
7003         } else {
7004                 pci_wake_from_d3(pdev, false);
7005                 pci_set_power_state(pdev, PCI_D3hot);
7006         }
7007
7008         return 0;
7009 }
7010 #endif /* CONFIG_PM */
7011
7012 static void ixgbe_shutdown(struct pci_dev *pdev)
7013 {
7014         bool wake;
7015
7016         __ixgbe_shutdown(pdev, &wake);
7017
7018         if (system_state == SYSTEM_POWER_OFF) {
7019                 pci_wake_from_d3(pdev, wake);
7020                 pci_set_power_state(pdev, PCI_D3hot);
7021         }
7022 }
7023
7024 /**
7025  * ixgbe_update_stats - Update the board statistics counters.
7026  * @adapter: board private structure
7027  **/
7028 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7029 {
7030         struct net_device *netdev = adapter->netdev;
7031         struct ixgbe_hw *hw = &adapter->hw;
7032         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7033         u64 total_mpc = 0;
7034         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7035         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7036         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7037         u64 alloc_rx_page = 0;
7038         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7039
7040         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7041             test_bit(__IXGBE_RESETTING, &adapter->state))
7042                 return;
7043
7044         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7045                 u64 rsc_count = 0;
7046                 u64 rsc_flush = 0;
7047                 for (i = 0; i < adapter->num_rx_queues; i++) {
7048                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7049                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7050                 }
7051                 adapter->rsc_total_count = rsc_count;
7052                 adapter->rsc_total_flush = rsc_flush;
7053         }
7054
7055         for (i = 0; i < adapter->num_rx_queues; i++) {
7056                 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]);
7057
7058                 if (!rx_ring)
7059                         continue;
7060                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7061                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7062                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7063                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7064                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7065                 bytes += rx_ring->stats.bytes;
7066                 packets += rx_ring->stats.packets;
7067         }
7068         adapter->non_eop_descs = non_eop_descs;
7069         adapter->alloc_rx_page = alloc_rx_page;
7070         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7071         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7072         adapter->hw_csum_rx_error = hw_csum_rx_error;
7073         netdev->stats.rx_bytes = bytes;
7074         netdev->stats.rx_packets = packets;
7075
7076         bytes = 0;
7077         packets = 0;
7078         /* gather some stats to the adapter struct that are per queue */
7079         for (i = 0; i < adapter->num_tx_queues; i++) {
7080                 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]);
7081
7082                 if (!tx_ring)
7083                         continue;
7084                 restart_queue += tx_ring->tx_stats.restart_queue;
7085                 tx_busy += tx_ring->tx_stats.tx_busy;
7086                 bytes += tx_ring->stats.bytes;
7087                 packets += tx_ring->stats.packets;
7088         }
7089         for (i = 0; i < adapter->num_xdp_queues; i++) {
7090                 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]);
7091
7092                 if (!xdp_ring)
7093                         continue;
7094                 restart_queue += xdp_ring->tx_stats.restart_queue;
7095                 tx_busy += xdp_ring->tx_stats.tx_busy;
7096                 bytes += xdp_ring->stats.bytes;
7097                 packets += xdp_ring->stats.packets;
7098         }
7099         adapter->restart_queue = restart_queue;
7100         adapter->tx_busy = tx_busy;
7101         netdev->stats.tx_bytes = bytes;
7102         netdev->stats.tx_packets = packets;
7103
7104         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7105
7106         /* 8 register reads */
7107         for (i = 0; i < 8; i++) {
7108                 /* for packet buffers not used, the register should read 0 */
7109                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7110                 missed_rx += mpc;
7111                 hwstats->mpc[i] += mpc;
7112                 total_mpc += hwstats->mpc[i];
7113                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7114                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7115                 switch (hw->mac.type) {
7116                 case ixgbe_mac_82598EB:
7117                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7118                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7119                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7120                         hwstats->pxonrxc[i] +=
7121                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7122                         break;
7123                 case ixgbe_mac_82599EB:
7124                 case ixgbe_mac_X540:
7125                 case ixgbe_mac_X550:
7126                 case ixgbe_mac_X550EM_x:
7127                 case ixgbe_mac_x550em_a:
7128                         hwstats->pxonrxc[i] +=
7129                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7130                         break;
7131                 default:
7132                         break;
7133                 }
7134         }
7135
7136         /*16 register reads */
7137         for (i = 0; i < 16; i++) {
7138                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7139                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7140                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7141                     (hw->mac.type == ixgbe_mac_X540) ||
7142                     (hw->mac.type == ixgbe_mac_X550) ||
7143                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7144                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7145                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7146                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7147                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7148                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7149                 }
7150         }
7151
7152         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7153         /* work around hardware counting issue */
7154         hwstats->gprc -= missed_rx;
7155
7156         ixgbe_update_xoff_received(adapter);
7157
7158         /* 82598 hardware only has a 32 bit counter in the high register */
7159         switch (hw->mac.type) {
7160         case ixgbe_mac_82598EB:
7161                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7162                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7163                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7164                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7165                 break;
7166         case ixgbe_mac_X540:
7167         case ixgbe_mac_X550:
7168         case ixgbe_mac_X550EM_x:
7169         case ixgbe_mac_x550em_a:
7170                 /* OS2BMC stats are X540 and later */
7171                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7172                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7173                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7174                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7175                 fallthrough;
7176         case ixgbe_mac_82599EB:
7177                 for (i = 0; i < 16; i++)
7178                         adapter->hw_rx_no_dma_resources +=
7179                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7180                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7181                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7182                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7183                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7184                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7185                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7186                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7187                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7188                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7189 #ifdef IXGBE_FCOE
7190                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7191                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7192                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7193                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7194                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7195                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7196                 /* Add up per cpu counters for total ddp aloc fail */
7197                 if (adapter->fcoe.ddp_pool) {
7198                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7199                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7200                         unsigned int cpu;
7201                         u64 noddp = 0, noddp_ext_buff = 0;
7202                         for_each_possible_cpu(cpu) {
7203                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7204                                 noddp += ddp_pool->noddp;
7205                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7206                         }
7207                         hwstats->fcoe_noddp = noddp;
7208                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7209                 }
7210 #endif /* IXGBE_FCOE */
7211                 break;
7212         default:
7213                 break;
7214         }
7215         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7216         hwstats->bprc += bprc;
7217         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7218         if (hw->mac.type == ixgbe_mac_82598EB)
7219                 hwstats->mprc -= bprc;
7220         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7221         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7222         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7223         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7224         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7225         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7226         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7227         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7228         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7229         hwstats->lxontxc += lxon;
7230         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7231         hwstats->lxofftxc += lxoff;
7232         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7233         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7234         /*
7235          * 82598 errata - tx of flow control packets is included in tx counters
7236          */
7237         xon_off_tot = lxon + lxoff;
7238         hwstats->gptc -= xon_off_tot;
7239         hwstats->mptc -= xon_off_tot;
7240         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7241         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7242         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7243         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7244         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7245         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7246         hwstats->ptc64 -= xon_off_tot;
7247         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7248         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7249         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7250         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7251         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7252         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7253
7254         /* Fill out the OS statistics structure */
7255         netdev->stats.multicast = hwstats->mprc;
7256
7257         /* Rx Errors */
7258         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7259         netdev->stats.rx_dropped = 0;
7260         netdev->stats.rx_length_errors = hwstats->rlec;
7261         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7262         netdev->stats.rx_missed_errors = total_mpc;
7263 }
7264
7265 /**
7266  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7267  * @adapter: pointer to the device adapter structure
7268  **/
7269 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7270 {
7271         struct ixgbe_hw *hw = &adapter->hw;
7272         int i;
7273
7274         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7275                 return;
7276
7277         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7278
7279         /* if interface is down do nothing */
7280         if (test_bit(__IXGBE_DOWN, &adapter->state))
7281                 return;
7282
7283         /* do nothing if we are not using signature filters */
7284         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7285                 return;
7286
7287         adapter->fdir_overflow++;
7288
7289         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7290                 for (i = 0; i < adapter->num_tx_queues; i++)
7291                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7292                                 &(adapter->tx_ring[i]->state));
7293                 for (i = 0; i < adapter->num_xdp_queues; i++)
7294                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7295                                 &adapter->xdp_ring[i]->state);
7296                 /* re-enable flow director interrupts */
7297                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7298         } else {
7299                 e_err(probe, "failed to finish FDIR re-initialization, "
7300                       "ignored adding FDIR ATR filters\n");
7301         }
7302 }
7303
7304 /**
7305  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7306  * @adapter: pointer to the device adapter structure
7307  *
7308  * This function serves two purposes.  First it strobes the interrupt lines
7309  * in order to make certain interrupts are occurring.  Secondly it sets the
7310  * bits needed to check for TX hangs.  As a result we should immediately
7311  * determine if a hang has occurred.
7312  */
7313 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7314 {
7315         struct ixgbe_hw *hw = &adapter->hw;
7316         u64 eics = 0;
7317         int i;
7318
7319         /* If we're down, removing or resetting, just bail */
7320         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7321             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7322             test_bit(__IXGBE_RESETTING, &adapter->state))
7323                 return;
7324
7325         /* Force detection of hung controller */
7326         if (netif_carrier_ok(adapter->netdev)) {
7327                 for (i = 0; i < adapter->num_tx_queues; i++)
7328                         set_check_for_tx_hang(adapter->tx_ring[i]);
7329                 for (i = 0; i < adapter->num_xdp_queues; i++)
7330                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7331         }
7332
7333         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7334                 /*
7335                  * for legacy and MSI interrupts don't set any bits
7336                  * that are enabled for EIAM, because this operation
7337                  * would set *both* EIMS and EICS for any bit in EIAM
7338                  */
7339                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7340                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7341         } else {
7342                 /* get one bit for every active tx/rx interrupt vector */
7343                 for (i = 0; i < adapter->num_q_vectors; i++) {
7344                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7345                         if (qv->rx.ring || qv->tx.ring)
7346                                 eics |= BIT_ULL(i);
7347                 }
7348         }
7349
7350         /* Cause software interrupt to ensure rings are cleaned */
7351         ixgbe_irq_rearm_queues(adapter, eics);
7352 }
7353
7354 /**
7355  * ixgbe_watchdog_update_link - update the link status
7356  * @adapter: pointer to the device adapter structure
7357  **/
7358 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7359 {
7360         struct ixgbe_hw *hw = &adapter->hw;
7361         u32 link_speed = adapter->link_speed;
7362         bool link_up = adapter->link_up;
7363         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7364
7365         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7366                 return;
7367
7368         if (hw->mac.ops.check_link) {
7369                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7370         } else {
7371                 /* always assume link is up, if no check link function */
7372                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7373                 link_up = true;
7374         }
7375
7376         if (adapter->ixgbe_ieee_pfc)
7377                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7378
7379         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7380                 hw->mac.ops.fc_enable(hw);
7381                 ixgbe_set_rx_drop_en(adapter);
7382         }
7383
7384         if (link_up ||
7385             time_after(jiffies, (adapter->link_check_timeout +
7386                                  IXGBE_TRY_LINK_TIMEOUT))) {
7387                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7388                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7389                 IXGBE_WRITE_FLUSH(hw);
7390         }
7391
7392         adapter->link_up = link_up;
7393         adapter->link_speed = link_speed;
7394 }
7395
7396 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7397 {
7398 #ifdef CONFIG_IXGBE_DCB
7399         struct net_device *netdev = adapter->netdev;
7400         struct dcb_app app = {
7401                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7402                               .protocol = 0,
7403                              };
7404         u8 up = 0;
7405
7406         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7407                 up = dcb_ieee_getapp_mask(netdev, &app);
7408
7409         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7410 #endif
7411 }
7412
7413 /**
7414  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7415  *                             print link up message
7416  * @adapter: pointer to the device adapter structure
7417  **/
7418 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7419 {
7420         struct net_device *netdev = adapter->netdev;
7421         struct ixgbe_hw *hw = &adapter->hw;
7422         u32 link_speed = adapter->link_speed;
7423         const char *speed_str;
7424         bool flow_rx, flow_tx;
7425
7426         /* only continue if link was previously down */
7427         if (netif_carrier_ok(netdev))
7428                 return;
7429
7430         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7431
7432         switch (hw->mac.type) {
7433         case ixgbe_mac_82598EB: {
7434                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7435                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7436                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7437                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7438         }
7439                 break;
7440         case ixgbe_mac_X540:
7441         case ixgbe_mac_X550:
7442         case ixgbe_mac_X550EM_x:
7443         case ixgbe_mac_x550em_a:
7444         case ixgbe_mac_82599EB: {
7445                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7446                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7447                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7448                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7449         }
7450                 break;
7451         default:
7452                 flow_tx = false;
7453                 flow_rx = false;
7454                 break;
7455         }
7456
7457         adapter->last_rx_ptp_check = jiffies;
7458
7459         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7460                 ixgbe_ptp_start_cyclecounter(adapter);
7461
7462         switch (link_speed) {
7463         case IXGBE_LINK_SPEED_10GB_FULL:
7464                 speed_str = "10 Gbps";
7465                 break;
7466         case IXGBE_LINK_SPEED_5GB_FULL:
7467                 speed_str = "5 Gbps";
7468                 break;
7469         case IXGBE_LINK_SPEED_2_5GB_FULL:
7470                 speed_str = "2.5 Gbps";
7471                 break;
7472         case IXGBE_LINK_SPEED_1GB_FULL:
7473                 speed_str = "1 Gbps";
7474                 break;
7475         case IXGBE_LINK_SPEED_100_FULL:
7476                 speed_str = "100 Mbps";
7477                 break;
7478         case IXGBE_LINK_SPEED_10_FULL:
7479                 speed_str = "10 Mbps";
7480                 break;
7481         default:
7482                 speed_str = "unknown speed";
7483                 break;
7484         }
7485         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7486                ((flow_rx && flow_tx) ? "RX/TX" :
7487                (flow_rx ? "RX" :
7488                (flow_tx ? "TX" : "None"))));
7489
7490         netif_carrier_on(netdev);
7491         ixgbe_check_vf_rate_limit(adapter);
7492
7493         /* enable transmits */
7494         netif_tx_wake_all_queues(adapter->netdev);
7495
7496         /* update the default user priority for VFs */
7497         ixgbe_update_default_up(adapter);
7498
7499         /* ping all the active vfs to let them know link has changed */
7500         ixgbe_ping_all_vfs(adapter);
7501 }
7502
7503 /**
7504  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7505  *                               print link down message
7506  * @adapter: pointer to the adapter structure
7507  **/
7508 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7509 {
7510         struct net_device *netdev = adapter->netdev;
7511         struct ixgbe_hw *hw = &adapter->hw;
7512
7513         adapter->link_up = false;
7514         adapter->link_speed = 0;
7515
7516         /* only continue if link was up previously */
7517         if (!netif_carrier_ok(netdev))
7518                 return;
7519
7520         /* poll for SFP+ cable when link is down */
7521         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7522                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7523
7524         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7525                 ixgbe_ptp_start_cyclecounter(adapter);
7526
7527         e_info(drv, "NIC Link is Down\n");
7528         netif_carrier_off(netdev);
7529
7530         /* ping all the active vfs to let them know link has changed */
7531         ixgbe_ping_all_vfs(adapter);
7532 }
7533
7534 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7535 {
7536         int i;
7537
7538         for (i = 0; i < adapter->num_tx_queues; i++) {
7539                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7540
7541                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7542                         return true;
7543         }
7544
7545         for (i = 0; i < adapter->num_xdp_queues; i++) {
7546                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7547
7548                 if (ring->next_to_use != ring->next_to_clean)
7549                         return true;
7550         }
7551
7552         return false;
7553 }
7554
7555 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7556 {
7557         struct ixgbe_hw *hw = &adapter->hw;
7558         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7559         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7560
7561         int i, j;
7562
7563         if (!adapter->num_vfs)
7564                 return false;
7565
7566         /* resetting the PF is only needed for MAC before X550 */
7567         if (hw->mac.type >= ixgbe_mac_X550)
7568                 return false;
7569
7570         for (i = 0; i < adapter->num_vfs; i++) {
7571                 for (j = 0; j < q_per_pool; j++) {
7572                         u32 h, t;
7573
7574                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7575                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7576
7577                         if (h != t)
7578                                 return true;
7579                 }
7580         }
7581
7582         return false;
7583 }
7584
7585 /**
7586  * ixgbe_watchdog_flush_tx - flush queues on link down
7587  * @adapter: pointer to the device adapter structure
7588  **/
7589 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7590 {
7591         if (!netif_carrier_ok(adapter->netdev)) {
7592                 if (ixgbe_ring_tx_pending(adapter) ||
7593                     ixgbe_vf_tx_pending(adapter)) {
7594                         /* We've lost link, so the controller stops DMA,
7595                          * but we've got queued Tx work that's never going
7596                          * to get done, so reset controller to flush Tx.
7597                          * (Do the reset outside of interrupt context).
7598                          */
7599                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7600                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7601                 }
7602         }
7603 }
7604
7605 #ifdef CONFIG_PCI_IOV
7606 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7607 {
7608         struct ixgbe_hw *hw = &adapter->hw;
7609         struct pci_dev *pdev = adapter->pdev;
7610         unsigned int vf;
7611         u32 gpc;
7612
7613         if (!(netif_carrier_ok(adapter->netdev)))
7614                 return;
7615
7616         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7617         if (gpc) /* If incrementing then no need for the check below */
7618                 return;
7619         /* Check to see if a bad DMA write target from an errant or
7620          * malicious VF has caused a PCIe error.  If so then we can
7621          * issue a VFLR to the offending VF(s) and then resume without
7622          * requesting a full slot reset.
7623          */
7624
7625         if (!pdev)
7626                 return;
7627
7628         /* check status reg for all VFs owned by this PF */
7629         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7630                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7631                 u16 status_reg;
7632
7633                 if (!vfdev)
7634                         continue;
7635                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7636                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7637                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7638                         pcie_flr(vfdev);
7639         }
7640 }
7641
7642 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7643 {
7644         u32 ssvpc;
7645
7646         /* Do not perform spoof check for 82598 or if not in IOV mode */
7647         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7648             adapter->num_vfs == 0)
7649                 return;
7650
7651         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7652
7653         /*
7654          * ssvpc register is cleared on read, if zero then no
7655          * spoofed packets in the last interval.
7656          */
7657         if (!ssvpc)
7658                 return;
7659
7660         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7661 }
7662 #else
7663 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7664 {
7665 }
7666
7667 static void
7668 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7669 {
7670 }
7671 #endif /* CONFIG_PCI_IOV */
7672
7673
7674 /**
7675  * ixgbe_watchdog_subtask - check and bring link up
7676  * @adapter: pointer to the device adapter structure
7677  **/
7678 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7679 {
7680         /* if interface is down, removing or resetting, do nothing */
7681         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7682             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7683             test_bit(__IXGBE_RESETTING, &adapter->state))
7684                 return;
7685
7686         ixgbe_watchdog_update_link(adapter);
7687
7688         if (adapter->link_up)
7689                 ixgbe_watchdog_link_is_up(adapter);
7690         else
7691                 ixgbe_watchdog_link_is_down(adapter);
7692
7693         ixgbe_check_for_bad_vf(adapter);
7694         ixgbe_spoof_check(adapter);
7695         ixgbe_update_stats(adapter);
7696
7697         ixgbe_watchdog_flush_tx(adapter);
7698 }
7699
7700 /**
7701  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7702  * @adapter: the ixgbe adapter structure
7703  **/
7704 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7705 {
7706         struct ixgbe_hw *hw = &adapter->hw;
7707         s32 err;
7708
7709         /* not searching for SFP so there is nothing to do here */
7710         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7711             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7712                 return;
7713
7714         if (adapter->sfp_poll_time &&
7715             time_after(adapter->sfp_poll_time, jiffies))
7716                 return; /* If not yet time to poll for SFP */
7717
7718         /* someone else is in init, wait until next service event */
7719         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7720                 return;
7721
7722         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7723
7724         err = hw->phy.ops.identify_sfp(hw);
7725         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7726                 goto sfp_out;
7727
7728         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7729                 /* If no cable is present, then we need to reset
7730                  * the next time we find a good cable. */
7731                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7732         }
7733
7734         /* exit on error */
7735         if (err)
7736                 goto sfp_out;
7737
7738         /* exit if reset not needed */
7739         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7740                 goto sfp_out;
7741
7742         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7743
7744         /*
7745          * A module may be identified correctly, but the EEPROM may not have
7746          * support for that module.  setup_sfp() will fail in that case, so
7747          * we should not allow that module to load.
7748          */
7749         if (hw->mac.type == ixgbe_mac_82598EB)
7750                 err = hw->phy.ops.reset(hw);
7751         else
7752                 err = hw->mac.ops.setup_sfp(hw);
7753
7754         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7755                 goto sfp_out;
7756
7757         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7758         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7759
7760 sfp_out:
7761         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7762
7763         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7764             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7765                 e_dev_err("failed to initialize because an unsupported "
7766                           "SFP+ module type was detected.\n");
7767                 e_dev_err("Reload the driver after installing a "
7768                           "supported module.\n");
7769                 unregister_netdev(adapter->netdev);
7770         }
7771 }
7772
7773 /**
7774  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7775  * @adapter: the ixgbe adapter structure
7776  **/
7777 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7778 {
7779         struct ixgbe_hw *hw = &adapter->hw;
7780         u32 cap_speed;
7781         u32 speed;
7782         bool autoneg = false;
7783
7784         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7785                 return;
7786
7787         /* someone else is in init, wait until next service event */
7788         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7789                 return;
7790
7791         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7792
7793         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7794
7795         /* advertise highest capable link speed */
7796         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7797                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7798         else
7799                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7800                                      IXGBE_LINK_SPEED_1GB_FULL);
7801
7802         if (hw->mac.ops.setup_link)
7803                 hw->mac.ops.setup_link(hw, speed, true);
7804
7805         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7806         adapter->link_check_timeout = jiffies;
7807         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7808 }
7809
7810 /**
7811  * ixgbe_service_timer - Timer Call-back
7812  * @t: pointer to timer_list structure
7813  **/
7814 static void ixgbe_service_timer(struct timer_list *t)
7815 {
7816         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7817         unsigned long next_event_offset;
7818
7819         /* poll faster when waiting for link */
7820         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7821                 next_event_offset = HZ / 10;
7822         else
7823                 next_event_offset = HZ * 2;
7824
7825         /* Reset the timer */
7826         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7827
7828         ixgbe_service_event_schedule(adapter);
7829 }
7830
7831 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7832 {
7833         struct ixgbe_hw *hw = &adapter->hw;
7834         u32 status;
7835
7836         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7837                 return;
7838
7839         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7840
7841         if (!hw->phy.ops.handle_lasi)
7842                 return;
7843
7844         status = hw->phy.ops.handle_lasi(&adapter->hw);
7845         if (status != IXGBE_ERR_OVERTEMP)
7846                 return;
7847
7848         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7849 }
7850
7851 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7852 {
7853         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7854                 return;
7855
7856         rtnl_lock();
7857         /* If we're already down, removing or resetting, just bail */
7858         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7859             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7860             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7861                 rtnl_unlock();
7862                 return;
7863         }
7864
7865         ixgbe_dump(adapter);
7866         netdev_err(adapter->netdev, "Reset adapter\n");
7867         adapter->tx_timeout_count++;
7868
7869         ixgbe_reinit_locked(adapter);
7870         rtnl_unlock();
7871 }
7872
7873 /**
7874  * ixgbe_check_fw_error - Check firmware for errors
7875  * @adapter: the adapter private structure
7876  *
7877  * Check firmware errors in register FWSM
7878  */
7879 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7880 {
7881         struct ixgbe_hw *hw = &adapter->hw;
7882         u32 fwsm;
7883
7884         /* read fwsm.ext_err_ind register and log errors */
7885         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7886
7887         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7888             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7889                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7890                            fwsm);
7891
7892         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7893                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7894                 return true;
7895         }
7896
7897         return false;
7898 }
7899
7900 /**
7901  * ixgbe_service_task - manages and runs subtasks
7902  * @work: pointer to work_struct containing our data
7903  **/
7904 static void ixgbe_service_task(struct work_struct *work)
7905 {
7906         struct ixgbe_adapter *adapter = container_of(work,
7907                                                      struct ixgbe_adapter,
7908                                                      service_task);
7909         if (ixgbe_removed(adapter->hw.hw_addr)) {
7910                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7911                         rtnl_lock();
7912                         ixgbe_down(adapter);
7913                         rtnl_unlock();
7914                 }
7915                 ixgbe_service_event_complete(adapter);
7916                 return;
7917         }
7918         if (ixgbe_check_fw_error(adapter)) {
7919                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
7920                         unregister_netdev(adapter->netdev);
7921                 ixgbe_service_event_complete(adapter);
7922                 return;
7923         }
7924         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7925                 rtnl_lock();
7926                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7927                 udp_tunnel_get_rx_info(adapter->netdev);
7928                 rtnl_unlock();
7929         }
7930         ixgbe_reset_subtask(adapter);
7931         ixgbe_phy_interrupt_subtask(adapter);
7932         ixgbe_sfp_detection_subtask(adapter);
7933         ixgbe_sfp_link_config_subtask(adapter);
7934         ixgbe_check_overtemp_subtask(adapter);
7935         ixgbe_watchdog_subtask(adapter);
7936         ixgbe_fdir_reinit_subtask(adapter);
7937         ixgbe_check_hang_subtask(adapter);
7938
7939         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7940                 ixgbe_ptp_overflow_check(adapter);
7941                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7942                         ixgbe_ptp_rx_hang(adapter);
7943                 ixgbe_ptp_tx_hang(adapter);
7944         }
7945
7946         ixgbe_service_event_complete(adapter);
7947 }
7948
7949 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7950                      struct ixgbe_tx_buffer *first,
7951                      u8 *hdr_len,
7952                      struct ixgbe_ipsec_tx_data *itd)
7953 {
7954         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7955         struct sk_buff *skb = first->skb;
7956         union {
7957                 struct iphdr *v4;
7958                 struct ipv6hdr *v6;
7959                 unsigned char *hdr;
7960         } ip;
7961         union {
7962                 struct tcphdr *tcp;
7963                 struct udphdr *udp;
7964                 unsigned char *hdr;
7965         } l4;
7966         u32 paylen, l4_offset;
7967         u32 fceof_saidx = 0;
7968         int err;
7969
7970         if (skb->ip_summed != CHECKSUM_PARTIAL)
7971                 return 0;
7972
7973         if (!skb_is_gso(skb))
7974                 return 0;
7975
7976         err = skb_cow_head(skb, 0);
7977         if (err < 0)
7978                 return err;
7979
7980         if (eth_p_mpls(first->protocol))
7981                 ip.hdr = skb_inner_network_header(skb);
7982         else
7983                 ip.hdr = skb_network_header(skb);
7984         l4.hdr = skb_checksum_start(skb);
7985
7986         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7987         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
7988                       IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP;
7989
7990         /* initialize outer IP header fields */
7991         if (ip.v4->version == 4) {
7992                 unsigned char *csum_start = skb_checksum_start(skb);
7993                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7994                 int len = csum_start - trans_start;
7995
7996                 /* IP header will have to cancel out any data that
7997                  * is not a part of the outer IP header, so set to
7998                  * a reverse csum if needed, else init check to 0.
7999                  */
8000                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
8001                                            csum_fold(csum_partial(trans_start,
8002                                                                   len, 0)) : 0;
8003                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
8004
8005                 ip.v4->tot_len = 0;
8006                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8007                                    IXGBE_TX_FLAGS_CSUM |
8008                                    IXGBE_TX_FLAGS_IPV4;
8009         } else {
8010                 ip.v6->payload_len = 0;
8011                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
8012                                    IXGBE_TX_FLAGS_CSUM;
8013         }
8014
8015         /* determine offset of inner transport header */
8016         l4_offset = l4.hdr - skb->data;
8017
8018         /* remove payload length from inner checksum */
8019         paylen = skb->len - l4_offset;
8020
8021         if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) {
8022                 /* compute length of segmentation header */
8023                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
8024                 csum_replace_by_diff(&l4.tcp->check,
8025                                      (__force __wsum)htonl(paylen));
8026         } else {
8027                 /* compute length of segmentation header */
8028                 *hdr_len = sizeof(*l4.udp) + l4_offset;
8029                 csum_replace_by_diff(&l4.udp->check,
8030                                      (__force __wsum)htonl(paylen));
8031         }
8032
8033         /* update gso size and bytecount with header size */
8034         first->gso_segs = skb_shinfo(skb)->gso_segs;
8035         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8036
8037         /* mss_l4len_id: use 0 as index for TSO */
8038         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8039         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8040
8041         fceof_saidx |= itd->sa_idx;
8042         type_tucmd |= itd->flags | itd->trailer_len;
8043
8044         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8045         vlan_macip_lens = l4.hdr - ip.hdr;
8046         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8047         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8048
8049         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8050                           mss_l4len_idx);
8051
8052         return 1;
8053 }
8054
8055 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8056 {
8057         unsigned int offset = 0;
8058
8059         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8060
8061         return offset == skb_checksum_start_offset(skb);
8062 }
8063
8064 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8065                           struct ixgbe_tx_buffer *first,
8066                           struct ixgbe_ipsec_tx_data *itd)
8067 {
8068         struct sk_buff *skb = first->skb;
8069         u32 vlan_macip_lens = 0;
8070         u32 fceof_saidx = 0;
8071         u32 type_tucmd = 0;
8072
8073         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8074 csum_failed:
8075                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8076                                          IXGBE_TX_FLAGS_CC)))
8077                         return;
8078                 goto no_csum;
8079         }
8080
8081         switch (skb->csum_offset) {
8082         case offsetof(struct tcphdr, check):
8083                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8084                 fallthrough;
8085         case offsetof(struct udphdr, check):
8086                 break;
8087         case offsetof(struct sctphdr, checksum):
8088                 /* validate that this is actually an SCTP request */
8089                 if (((first->protocol == htons(ETH_P_IP)) &&
8090                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8091                     ((first->protocol == htons(ETH_P_IPV6)) &&
8092                      ixgbe_ipv6_csum_is_sctp(skb))) {
8093                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8094                         break;
8095                 }
8096                 fallthrough;
8097         default:
8098                 skb_checksum_help(skb);
8099                 goto csum_failed;
8100         }
8101
8102         /* update TX checksum flag */
8103         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8104         vlan_macip_lens = skb_checksum_start_offset(skb) -
8105                           skb_network_offset(skb);
8106 no_csum:
8107         /* vlan_macip_lens: MACLEN, VLAN tag */
8108         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8109         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8110
8111         fceof_saidx |= itd->sa_idx;
8112         type_tucmd |= itd->flags | itd->trailer_len;
8113
8114         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8115 }
8116
8117 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8118         ((_flag <= _result) ? \
8119          ((u32)(_input & _flag) * (_result / _flag)) : \
8120          ((u32)(_input & _flag) / (_flag / _result)))
8121
8122 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8123 {
8124         /* set type for advanced descriptor with frame checksum insertion */
8125         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8126                        IXGBE_ADVTXD_DCMD_DEXT |
8127                        IXGBE_ADVTXD_DCMD_IFCS;
8128
8129         /* set HW vlan bit if vlan is present */
8130         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8131                                    IXGBE_ADVTXD_DCMD_VLE);
8132
8133         /* set segmentation enable bits for TSO/FSO */
8134         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8135                                    IXGBE_ADVTXD_DCMD_TSE);
8136
8137         /* set timestamp bit if present */
8138         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8139                                    IXGBE_ADVTXD_MAC_TSTAMP);
8140
8141         /* insert frame checksum */
8142         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8143
8144         return cmd_type;
8145 }
8146
8147 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8148                                    u32 tx_flags, unsigned int paylen)
8149 {
8150         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8151
8152         /* enable L4 checksum for TSO and TX checksum offload */
8153         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8154                                         IXGBE_TX_FLAGS_CSUM,
8155                                         IXGBE_ADVTXD_POPTS_TXSM);
8156
8157         /* enable IPv4 checksum for TSO */
8158         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8159                                         IXGBE_TX_FLAGS_IPV4,
8160                                         IXGBE_ADVTXD_POPTS_IXSM);
8161
8162         /* enable IPsec */
8163         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8164                                         IXGBE_TX_FLAGS_IPSEC,
8165                                         IXGBE_ADVTXD_POPTS_IPSEC);
8166
8167         /*
8168          * Check Context must be set if Tx switch is enabled, which it
8169          * always is for case where virtual functions are running
8170          */
8171         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8172                                         IXGBE_TX_FLAGS_CC,
8173                                         IXGBE_ADVTXD_CC);
8174
8175         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8176 }
8177
8178 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8179 {
8180         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8181
8182         /* Herbert's original patch had:
8183          *  smp_mb__after_netif_stop_queue();
8184          * but since that doesn't exist yet, just open code it.
8185          */
8186         smp_mb();
8187
8188         /* We need to check again in a case another CPU has just
8189          * made room available.
8190          */
8191         if (likely(ixgbe_desc_unused(tx_ring) < size))
8192                 return -EBUSY;
8193
8194         /* A reprieve! - use start_queue because it doesn't call schedule */
8195         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8196         ++tx_ring->tx_stats.restart_queue;
8197         return 0;
8198 }
8199
8200 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8201 {
8202         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8203                 return 0;
8204
8205         return __ixgbe_maybe_stop_tx(tx_ring, size);
8206 }
8207
8208 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8209                         struct ixgbe_tx_buffer *first,
8210                         const u8 hdr_len)
8211 {
8212         struct sk_buff *skb = first->skb;
8213         struct ixgbe_tx_buffer *tx_buffer;
8214         union ixgbe_adv_tx_desc *tx_desc;
8215         skb_frag_t *frag;
8216         dma_addr_t dma;
8217         unsigned int data_len, size;
8218         u32 tx_flags = first->tx_flags;
8219         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8220         u16 i = tx_ring->next_to_use;
8221
8222         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8223
8224         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8225
8226         size = skb_headlen(skb);
8227         data_len = skb->data_len;
8228
8229 #ifdef IXGBE_FCOE
8230         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8231                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8232                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8233                         data_len = 0;
8234                 } else {
8235                         data_len -= sizeof(struct fcoe_crc_eof);
8236                 }
8237         }
8238
8239 #endif
8240         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8241
8242         tx_buffer = first;
8243
8244         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8245                 if (dma_mapping_error(tx_ring->dev, dma))
8246                         goto dma_error;
8247
8248                 /* record length, and DMA address */
8249                 dma_unmap_len_set(tx_buffer, len, size);
8250                 dma_unmap_addr_set(tx_buffer, dma, dma);
8251
8252                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8253
8254                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8255                         tx_desc->read.cmd_type_len =
8256                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8257
8258                         i++;
8259                         tx_desc++;
8260                         if (i == tx_ring->count) {
8261                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8262                                 i = 0;
8263                         }
8264                         tx_desc->read.olinfo_status = 0;
8265
8266                         dma += IXGBE_MAX_DATA_PER_TXD;
8267                         size -= IXGBE_MAX_DATA_PER_TXD;
8268
8269                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8270                 }
8271
8272                 if (likely(!data_len))
8273                         break;
8274
8275                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8276
8277                 i++;
8278                 tx_desc++;
8279                 if (i == tx_ring->count) {
8280                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8281                         i = 0;
8282                 }
8283                 tx_desc->read.olinfo_status = 0;
8284
8285 #ifdef IXGBE_FCOE
8286                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8287 #else
8288                 size = skb_frag_size(frag);
8289 #endif
8290                 data_len -= size;
8291
8292                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8293                                        DMA_TO_DEVICE);
8294
8295                 tx_buffer = &tx_ring->tx_buffer_info[i];
8296         }
8297
8298         /* write last descriptor with RS and EOP bits */
8299         cmd_type |= size | IXGBE_TXD_CMD;
8300         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8301
8302         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8303
8304         /* set the timestamp */
8305         first->time_stamp = jiffies;
8306
8307         skb_tx_timestamp(skb);
8308
8309         /*
8310          * Force memory writes to complete before letting h/w know there
8311          * are new descriptors to fetch.  (Only applicable for weak-ordered
8312          * memory model archs, such as IA-64).
8313          *
8314          * We also need this memory barrier to make certain all of the
8315          * status bits have been updated before next_to_watch is written.
8316          */
8317         wmb();
8318
8319         /* set next_to_watch value indicating a packet is present */
8320         first->next_to_watch = tx_desc;
8321
8322         i++;
8323         if (i == tx_ring->count)
8324                 i = 0;
8325
8326         tx_ring->next_to_use = i;
8327
8328         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8329
8330         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8331                 writel(i, tx_ring->tail);
8332         }
8333
8334         return 0;
8335 dma_error:
8336         dev_err(tx_ring->dev, "TX DMA map failed\n");
8337
8338         /* clear dma mappings for failed tx_buffer_info map */
8339         for (;;) {
8340                 tx_buffer = &tx_ring->tx_buffer_info[i];
8341                 if (dma_unmap_len(tx_buffer, len))
8342                         dma_unmap_page(tx_ring->dev,
8343                                        dma_unmap_addr(tx_buffer, dma),
8344                                        dma_unmap_len(tx_buffer, len),
8345                                        DMA_TO_DEVICE);
8346                 dma_unmap_len_set(tx_buffer, len, 0);
8347                 if (tx_buffer == first)
8348                         break;
8349                 if (i == 0)
8350                         i += tx_ring->count;
8351                 i--;
8352         }
8353
8354         dev_kfree_skb_any(first->skb);
8355         first->skb = NULL;
8356
8357         tx_ring->next_to_use = i;
8358
8359         return -1;
8360 }
8361
8362 static void ixgbe_atr(struct ixgbe_ring *ring,
8363                       struct ixgbe_tx_buffer *first)
8364 {
8365         struct ixgbe_q_vector *q_vector = ring->q_vector;
8366         union ixgbe_atr_hash_dword input = { .dword = 0 };
8367         union ixgbe_atr_hash_dword common = { .dword = 0 };
8368         union {
8369                 unsigned char *network;
8370                 struct iphdr *ipv4;
8371                 struct ipv6hdr *ipv6;
8372         } hdr;
8373         struct tcphdr *th;
8374         unsigned int hlen;
8375         struct sk_buff *skb;
8376         __be16 vlan_id;
8377         int l4_proto;
8378
8379         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8380         if (!q_vector)
8381                 return;
8382
8383         /* do nothing if sampling is disabled */
8384         if (!ring->atr_sample_rate)
8385                 return;
8386
8387         ring->atr_count++;
8388
8389         /* currently only IPv4/IPv6 with TCP is supported */
8390         if ((first->protocol != htons(ETH_P_IP)) &&
8391             (first->protocol != htons(ETH_P_IPV6)))
8392                 return;
8393
8394         /* snag network header to get L4 type and address */
8395         skb = first->skb;
8396         hdr.network = skb_network_header(skb);
8397         if (unlikely(hdr.network <= skb->data))
8398                 return;
8399         if (skb->encapsulation &&
8400             first->protocol == htons(ETH_P_IP) &&
8401             hdr.ipv4->protocol == IPPROTO_UDP) {
8402                 struct ixgbe_adapter *adapter = q_vector->adapter;
8403
8404                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8405                              VXLAN_HEADROOM))
8406                         return;
8407
8408                 /* verify the port is recognized as VXLAN */
8409                 if (adapter->vxlan_port &&
8410                     udp_hdr(skb)->dest == adapter->vxlan_port)
8411                         hdr.network = skb_inner_network_header(skb);
8412
8413                 if (adapter->geneve_port &&
8414                     udp_hdr(skb)->dest == adapter->geneve_port)
8415                         hdr.network = skb_inner_network_header(skb);
8416         }
8417
8418         /* Make sure we have at least [minimum IPv4 header + TCP]
8419          * or [IPv6 header] bytes
8420          */
8421         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8422                 return;
8423
8424         /* Currently only IPv4/IPv6 with TCP is supported */
8425         switch (hdr.ipv4->version) {
8426         case IPVERSION:
8427                 /* access ihl as u8 to avoid unaligned access on ia64 */
8428                 hlen = (hdr.network[0] & 0x0F) << 2;
8429                 l4_proto = hdr.ipv4->protocol;
8430                 break;
8431         case 6:
8432                 hlen = hdr.network - skb->data;
8433                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8434                 hlen -= hdr.network - skb->data;
8435                 break;
8436         default:
8437                 return;
8438         }
8439
8440         if (l4_proto != IPPROTO_TCP)
8441                 return;
8442
8443         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8444                      hlen + sizeof(struct tcphdr)))
8445                 return;
8446
8447         th = (struct tcphdr *)(hdr.network + hlen);
8448
8449         /* skip this packet since the socket is closing */
8450         if (th->fin)
8451                 return;
8452
8453         /* sample on all syn packets or once every atr sample count */
8454         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8455                 return;
8456
8457         /* reset sample count */
8458         ring->atr_count = 0;
8459
8460         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8461
8462         /*
8463          * src and dst are inverted, think how the receiver sees them
8464          *
8465          * The input is broken into two sections, a non-compressed section
8466          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8467          * is XORed together and stored in the compressed dword.
8468          */
8469         input.formatted.vlan_id = vlan_id;
8470
8471         /*
8472          * since src port and flex bytes occupy the same word XOR them together
8473          * and write the value to source port portion of compressed dword
8474          */
8475         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8476                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8477         else
8478                 common.port.src ^= th->dest ^ first->protocol;
8479         common.port.dst ^= th->source;
8480
8481         switch (hdr.ipv4->version) {
8482         case IPVERSION:
8483                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8484                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8485                 break;
8486         case 6:
8487                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8488                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8489                              hdr.ipv6->saddr.s6_addr32[1] ^
8490                              hdr.ipv6->saddr.s6_addr32[2] ^
8491                              hdr.ipv6->saddr.s6_addr32[3] ^
8492                              hdr.ipv6->daddr.s6_addr32[0] ^
8493                              hdr.ipv6->daddr.s6_addr32[1] ^
8494                              hdr.ipv6->daddr.s6_addr32[2] ^
8495                              hdr.ipv6->daddr.s6_addr32[3];
8496                 break;
8497         default:
8498                 break;
8499         }
8500
8501         if (hdr.network != skb_network_header(skb))
8502                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8503
8504         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8505         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8506                                               input, common, ring->queue_index);
8507 }
8508
8509 #ifdef IXGBE_FCOE
8510 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8511                               struct net_device *sb_dev)
8512 {
8513         struct ixgbe_adapter *adapter;
8514         struct ixgbe_ring_feature *f;
8515         int txq;
8516
8517         if (sb_dev) {
8518                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8519                 struct net_device *vdev = sb_dev;
8520
8521                 txq = vdev->tc_to_txq[tc].offset;
8522                 txq += reciprocal_scale(skb_get_hash(skb),
8523                                         vdev->tc_to_txq[tc].count);
8524
8525                 return txq;
8526         }
8527
8528         /*
8529          * only execute the code below if protocol is FCoE
8530          * or FIP and we have FCoE enabled on the adapter
8531          */
8532         switch (vlan_get_protocol(skb)) {
8533         case htons(ETH_P_FCOE):
8534         case htons(ETH_P_FIP):
8535                 adapter = netdev_priv(dev);
8536
8537                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8538                         break;
8539                 fallthrough;
8540         default:
8541                 return netdev_pick_tx(dev, skb, sb_dev);
8542         }
8543
8544         f = &adapter->ring_feature[RING_F_FCOE];
8545
8546         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8547                                            smp_processor_id();
8548
8549         while (txq >= f->indices)
8550                 txq -= f->indices;
8551
8552         return txq + f->offset;
8553 }
8554
8555 #endif
8556 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8557                         struct xdp_frame *xdpf)
8558 {
8559         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8560         struct ixgbe_tx_buffer *tx_buffer;
8561         union ixgbe_adv_tx_desc *tx_desc;
8562         u32 len, cmd_type;
8563         dma_addr_t dma;
8564         u16 i;
8565
8566         len = xdpf->len;
8567
8568         if (unlikely(!ixgbe_desc_unused(ring)))
8569                 return IXGBE_XDP_CONSUMED;
8570
8571         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8572         if (dma_mapping_error(ring->dev, dma))
8573                 return IXGBE_XDP_CONSUMED;
8574
8575         /* record the location of the first descriptor for this packet */
8576         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8577         tx_buffer->bytecount = len;
8578         tx_buffer->gso_segs = 1;
8579         tx_buffer->protocol = 0;
8580
8581         i = ring->next_to_use;
8582         tx_desc = IXGBE_TX_DESC(ring, i);
8583
8584         dma_unmap_len_set(tx_buffer, len, len);
8585         dma_unmap_addr_set(tx_buffer, dma, dma);
8586         tx_buffer->xdpf = xdpf;
8587
8588         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8589
8590         /* put descriptor type bits */
8591         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8592                    IXGBE_ADVTXD_DCMD_DEXT |
8593                    IXGBE_ADVTXD_DCMD_IFCS;
8594         cmd_type |= len | IXGBE_TXD_CMD;
8595         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8596         tx_desc->read.olinfo_status =
8597                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8598
8599         /* Avoid any potential race with xdp_xmit and cleanup */
8600         smp_wmb();
8601
8602         /* set next_to_watch value indicating a packet is present */
8603         i++;
8604         if (i == ring->count)
8605                 i = 0;
8606
8607         tx_buffer->next_to_watch = tx_desc;
8608         ring->next_to_use = i;
8609
8610         return IXGBE_XDP_TX;
8611 }
8612
8613 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8614                           struct ixgbe_adapter *adapter,
8615                           struct ixgbe_ring *tx_ring)
8616 {
8617         struct ixgbe_tx_buffer *first;
8618         int tso;
8619         u32 tx_flags = 0;
8620         unsigned short f;
8621         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8622         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8623         __be16 protocol = skb->protocol;
8624         u8 hdr_len = 0;
8625
8626         /*
8627          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8628          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8629          *       + 2 desc gap to keep tail from touching head,
8630          *       + 1 desc for context descriptor,
8631          * otherwise try next time
8632          */
8633         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8634                 count += TXD_USE_COUNT(skb_frag_size(
8635                                                 &skb_shinfo(skb)->frags[f]));
8636
8637         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8638                 tx_ring->tx_stats.tx_busy++;
8639                 return NETDEV_TX_BUSY;
8640         }
8641
8642         /* record the location of the first descriptor for this packet */
8643         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8644         first->skb = skb;
8645         first->bytecount = skb->len;
8646         first->gso_segs = 1;
8647
8648         /* if we have a HW VLAN tag being added default to the HW one */
8649         if (skb_vlan_tag_present(skb)) {
8650                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8651                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8652         /* else if it is a SW VLAN check the next protocol and store the tag */
8653         } else if (protocol == htons(ETH_P_8021Q)) {
8654                 struct vlan_hdr *vhdr, _vhdr;
8655                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8656                 if (!vhdr)
8657                         goto out_drop;
8658
8659                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8660                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8661                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8662         }
8663         protocol = vlan_get_protocol(skb);
8664
8665         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8666             adapter->ptp_clock) {
8667                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8668                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8669                                            &adapter->state)) {
8670                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8671                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8672
8673                         /* schedule check for Tx timestamp */
8674                         adapter->ptp_tx_skb = skb_get(skb);
8675                         adapter->ptp_tx_start = jiffies;
8676                         schedule_work(&adapter->ptp_tx_work);
8677                 } else {
8678                         adapter->tx_hwtstamp_skipped++;
8679                 }
8680         }
8681
8682 #ifdef CONFIG_PCI_IOV
8683         /*
8684          * Use the l2switch_enable flag - would be false if the DMA
8685          * Tx switch had been disabled.
8686          */
8687         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8688                 tx_flags |= IXGBE_TX_FLAGS_CC;
8689
8690 #endif
8691         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8692         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8693             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8694              (skb->priority != TC_PRIO_CONTROL))) {
8695                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8696                 tx_flags |= (skb->priority & 0x7) <<
8697                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8698                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8699                         struct vlan_ethhdr *vhdr;
8700
8701                         if (skb_cow_head(skb, 0))
8702                                 goto out_drop;
8703                         vhdr = (struct vlan_ethhdr *)skb->data;
8704                         vhdr->h_vlan_TCI = htons(tx_flags >>
8705                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8706                 } else {
8707                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8708                 }
8709         }
8710
8711         /* record initial flags and protocol */
8712         first->tx_flags = tx_flags;
8713         first->protocol = protocol;
8714
8715 #ifdef IXGBE_FCOE
8716         /* setup tx offload for FCoE */
8717         if ((protocol == htons(ETH_P_FCOE)) &&
8718             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8719                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8720                 if (tso < 0)
8721                         goto out_drop;
8722
8723                 goto xmit_fcoe;
8724         }
8725
8726 #endif /* IXGBE_FCOE */
8727
8728 #ifdef CONFIG_IXGBE_IPSEC
8729         if (xfrm_offload(skb) &&
8730             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8731                 goto out_drop;
8732 #endif
8733         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8734         if (tso < 0)
8735                 goto out_drop;
8736         else if (!tso)
8737                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8738
8739         /* add the ATR filter if ATR is on */
8740         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8741                 ixgbe_atr(tx_ring, first);
8742
8743 #ifdef IXGBE_FCOE
8744 xmit_fcoe:
8745 #endif /* IXGBE_FCOE */
8746         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8747                 goto cleanup_tx_timestamp;
8748
8749         return NETDEV_TX_OK;
8750
8751 out_drop:
8752         dev_kfree_skb_any(first->skb);
8753         first->skb = NULL;
8754 cleanup_tx_timestamp:
8755         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8756                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8757                 adapter->ptp_tx_skb = NULL;
8758                 cancel_work_sync(&adapter->ptp_tx_work);
8759                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8760         }
8761
8762         return NETDEV_TX_OK;
8763 }
8764
8765 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8766                                       struct net_device *netdev,
8767                                       struct ixgbe_ring *ring)
8768 {
8769         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8770         struct ixgbe_ring *tx_ring;
8771
8772         /*
8773          * The minimum packet size for olinfo paylen is 17 so pad the skb
8774          * in order to meet this minimum size requirement.
8775          */
8776         if (skb_put_padto(skb, 17))
8777                 return NETDEV_TX_OK;
8778
8779         tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)];
8780         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8781                 return NETDEV_TX_BUSY;
8782
8783         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8784 }
8785
8786 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8787                                     struct net_device *netdev)
8788 {
8789         return __ixgbe_xmit_frame(skb, netdev, NULL);
8790 }
8791
8792 /**
8793  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8794  * @netdev: network interface device structure
8795  * @p: pointer to an address structure
8796  *
8797  * Returns 0 on success, negative on failure
8798  **/
8799 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8800 {
8801         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8802         struct ixgbe_hw *hw = &adapter->hw;
8803         struct sockaddr *addr = p;
8804
8805         if (!is_valid_ether_addr(addr->sa_data))
8806                 return -EADDRNOTAVAIL;
8807
8808         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8809         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8810
8811         ixgbe_mac_set_default_filter(adapter);
8812
8813         return 0;
8814 }
8815
8816 static int
8817 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8818 {
8819         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8820         struct ixgbe_hw *hw = &adapter->hw;
8821         u16 value;
8822         int rc;
8823
8824         if (adapter->mii_bus) {
8825                 int regnum = addr;
8826
8827                 if (devad != MDIO_DEVAD_NONE)
8828                         regnum |= (devad << 16) | MII_ADDR_C45;
8829
8830                 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8831         }
8832
8833         if (prtad != hw->phy.mdio.prtad)
8834                 return -EINVAL;
8835         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8836         if (!rc)
8837                 rc = value;
8838         return rc;
8839 }
8840
8841 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8842                             u16 addr, u16 value)
8843 {
8844         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8845         struct ixgbe_hw *hw = &adapter->hw;
8846
8847         if (adapter->mii_bus) {
8848                 int regnum = addr;
8849
8850                 if (devad != MDIO_DEVAD_NONE)
8851                         regnum |= (devad << 16) | MII_ADDR_C45;
8852
8853                 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8854         }
8855
8856         if (prtad != hw->phy.mdio.prtad)
8857                 return -EINVAL;
8858         return hw->phy.ops.write_reg(hw, addr, devad, value);
8859 }
8860
8861 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8862 {
8863         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8864
8865         switch (cmd) {
8866         case SIOCSHWTSTAMP:
8867                 return ixgbe_ptp_set_ts_config(adapter, req);
8868         case SIOCGHWTSTAMP:
8869                 return ixgbe_ptp_get_ts_config(adapter, req);
8870         case SIOCGMIIPHY:
8871                 if (!adapter->hw.phy.ops.read_reg)
8872                         return -EOPNOTSUPP;
8873                 fallthrough;
8874         default:
8875                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8876         }
8877 }
8878
8879 /**
8880  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8881  * netdev->dev_addrs
8882  * @dev: network interface device structure
8883  *
8884  * Returns non-zero on failure
8885  **/
8886 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8887 {
8888         int err = 0;
8889         struct ixgbe_adapter *adapter = netdev_priv(dev);
8890         struct ixgbe_hw *hw = &adapter->hw;
8891
8892         if (is_valid_ether_addr(hw->mac.san_addr)) {
8893                 rtnl_lock();
8894                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8895                 rtnl_unlock();
8896
8897                 /* update SAN MAC vmdq pool selection */
8898                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8899         }
8900         return err;
8901 }
8902
8903 /**
8904  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8905  * netdev->dev_addrs
8906  * @dev: network interface device structure
8907  *
8908  * Returns non-zero on failure
8909  **/
8910 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8911 {
8912         int err = 0;
8913         struct ixgbe_adapter *adapter = netdev_priv(dev);
8914         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8915
8916         if (is_valid_ether_addr(mac->san_addr)) {
8917                 rtnl_lock();
8918                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8919                 rtnl_unlock();
8920         }
8921         return err;
8922 }
8923
8924 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8925                                    struct ixgbe_ring *ring)
8926 {
8927         u64 bytes, packets;
8928         unsigned int start;
8929
8930         if (ring) {
8931                 do {
8932                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8933                         packets = ring->stats.packets;
8934                         bytes   = ring->stats.bytes;
8935                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8936                 stats->tx_packets += packets;
8937                 stats->tx_bytes   += bytes;
8938         }
8939 }
8940
8941 static void ixgbe_get_stats64(struct net_device *netdev,
8942                               struct rtnl_link_stats64 *stats)
8943 {
8944         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8945         int i;
8946
8947         rcu_read_lock();
8948         for (i = 0; i < adapter->num_rx_queues; i++) {
8949                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8950                 u64 bytes, packets;
8951                 unsigned int start;
8952
8953                 if (ring) {
8954                         do {
8955                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8956                                 packets = ring->stats.packets;
8957                                 bytes   = ring->stats.bytes;
8958                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8959                         stats->rx_packets += packets;
8960                         stats->rx_bytes   += bytes;
8961                 }
8962         }
8963
8964         for (i = 0; i < adapter->num_tx_queues; i++) {
8965                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8966
8967                 ixgbe_get_ring_stats64(stats, ring);
8968         }
8969         for (i = 0; i < adapter->num_xdp_queues; i++) {
8970                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8971
8972                 ixgbe_get_ring_stats64(stats, ring);
8973         }
8974         rcu_read_unlock();
8975
8976         /* following stats updated by ixgbe_watchdog_task() */
8977         stats->multicast        = netdev->stats.multicast;
8978         stats->rx_errors        = netdev->stats.rx_errors;
8979         stats->rx_length_errors = netdev->stats.rx_length_errors;
8980         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8981         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8982 }
8983
8984 #ifdef CONFIG_IXGBE_DCB
8985 /**
8986  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8987  * @adapter: pointer to ixgbe_adapter
8988  * @tc: number of traffic classes currently enabled
8989  *
8990  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8991  * 802.1Q priority maps to a packet buffer that exists.
8992  */
8993 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8994 {
8995         struct ixgbe_hw *hw = &adapter->hw;
8996         u32 reg, rsave;
8997         int i;
8998
8999         /* 82598 have a static priority to TC mapping that can not
9000          * be changed so no validation is needed.
9001          */
9002         if (hw->mac.type == ixgbe_mac_82598EB)
9003                 return;
9004
9005         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
9006         rsave = reg;
9007
9008         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
9009                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
9010
9011                 /* If up2tc is out of bounds default to zero */
9012                 if (up2tc > tc)
9013                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
9014         }
9015
9016         if (reg != rsave)
9017                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
9018
9019         return;
9020 }
9021
9022 /**
9023  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
9024  * @adapter: Pointer to adapter struct
9025  *
9026  * Populate the netdev user priority to tc map
9027  */
9028 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9029 {
9030         struct net_device *dev = adapter->netdev;
9031         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9032         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9033         u8 prio;
9034
9035         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9036                 u8 tc = 0;
9037
9038                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9039                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9040                 else if (ets)
9041                         tc = ets->prio_tc[prio];
9042
9043                 netdev_set_prio_tc_map(dev, prio, tc);
9044         }
9045 }
9046
9047 #endif /* CONFIG_IXGBE_DCB */
9048 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9049 {
9050         struct ixgbe_adapter *adapter = data;
9051         struct ixgbe_fwd_adapter *accel;
9052         int pool;
9053
9054         /* we only care about macvlans... */
9055         if (!netif_is_macvlan(vdev))
9056                 return 0;
9057
9058         /* that have hardware offload enabled... */
9059         accel = macvlan_accel_priv(vdev);
9060         if (!accel)
9061                 return 0;
9062
9063         /* If we can relocate to a different bit do so */
9064         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9065         if (pool < adapter->num_rx_pools) {
9066                 set_bit(pool, adapter->fwd_bitmask);
9067                 accel->pool = pool;
9068                 return 0;
9069         }
9070
9071         /* if we cannot find a free pool then disable the offload */
9072         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9073         macvlan_release_l2fw_offload(vdev);
9074
9075         /* unbind the queues and drop the subordinate channel config */
9076         netdev_unbind_sb_channel(adapter->netdev, vdev);
9077         netdev_set_sb_channel(vdev, 0);
9078
9079         kfree(accel);
9080
9081         return 0;
9082 }
9083
9084 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9085 {
9086         struct ixgbe_adapter *adapter = netdev_priv(dev);
9087
9088         /* flush any stale bits out of the fwd bitmask */
9089         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9090
9091         /* walk through upper devices reassigning pools */
9092         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9093                                       adapter);
9094 }
9095
9096 /**
9097  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9098  *
9099  * @dev: net device to configure
9100  * @tc: number of traffic classes to enable
9101  */
9102 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9103 {
9104         struct ixgbe_adapter *adapter = netdev_priv(dev);
9105         struct ixgbe_hw *hw = &adapter->hw;
9106
9107         /* Hardware supports up to 8 traffic classes */
9108         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9109                 return -EINVAL;
9110
9111         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9112                 return -EINVAL;
9113
9114         /* Hardware has to reinitialize queues and interrupts to
9115          * match packet buffer alignment. Unfortunately, the
9116          * hardware is not flexible enough to do this dynamically.
9117          */
9118         if (netif_running(dev))
9119                 ixgbe_close(dev);
9120         else
9121                 ixgbe_reset(adapter);
9122
9123         ixgbe_clear_interrupt_scheme(adapter);
9124
9125 #ifdef CONFIG_IXGBE_DCB
9126         if (tc) {
9127                 if (adapter->xdp_prog) {
9128                         e_warn(probe, "DCB is not supported with XDP\n");
9129
9130                         ixgbe_init_interrupt_scheme(adapter);
9131                         if (netif_running(dev))
9132                                 ixgbe_open(dev);
9133                         return -EINVAL;
9134                 }
9135
9136                 netdev_set_num_tc(dev, tc);
9137                 ixgbe_set_prio_tc_map(adapter);
9138
9139                 adapter->hw_tcs = tc;
9140                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9141
9142                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9143                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9144                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9145                 }
9146         } else {
9147                 netdev_reset_tc(dev);
9148
9149                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9150                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9151
9152                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9153                 adapter->hw_tcs = tc;
9154
9155                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9156                 adapter->dcb_cfg.pfc_mode_enable = false;
9157         }
9158
9159         ixgbe_validate_rtr(adapter, tc);
9160
9161 #endif /* CONFIG_IXGBE_DCB */
9162         ixgbe_init_interrupt_scheme(adapter);
9163
9164         ixgbe_defrag_macvlan_pools(dev);
9165
9166         if (netif_running(dev))
9167                 return ixgbe_open(dev);
9168
9169         return 0;
9170 }
9171
9172 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9173                                struct tc_cls_u32_offload *cls)
9174 {
9175         u32 hdl = cls->knode.handle;
9176         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9177         u32 loc = cls->knode.handle & 0xfffff;
9178         int err = 0, i, j;
9179         struct ixgbe_jump_table *jump = NULL;
9180
9181         if (loc > IXGBE_MAX_HW_ENTRIES)
9182                 return -EINVAL;
9183
9184         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9185                 return -EINVAL;
9186
9187         /* Clear this filter in the link data it is associated with */
9188         if (uhtid != 0x800) {
9189                 jump = adapter->jump_tables[uhtid];
9190                 if (!jump)
9191                         return -EINVAL;
9192                 if (!test_bit(loc - 1, jump->child_loc_map))
9193                         return -EINVAL;
9194                 clear_bit(loc - 1, jump->child_loc_map);
9195         }
9196
9197         /* Check if the filter being deleted is a link */
9198         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9199                 jump = adapter->jump_tables[i];
9200                 if (jump && jump->link_hdl == hdl) {
9201                         /* Delete filters in the hardware in the child hash
9202                          * table associated with this link
9203                          */
9204                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9205                                 if (!test_bit(j, jump->child_loc_map))
9206                                         continue;
9207                                 spin_lock(&adapter->fdir_perfect_lock);
9208                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9209                                                                       NULL,
9210                                                                       j + 1);
9211                                 spin_unlock(&adapter->fdir_perfect_lock);
9212                                 clear_bit(j, jump->child_loc_map);
9213                         }
9214                         /* Remove resources for this link */
9215                         kfree(jump->input);
9216                         kfree(jump->mask);
9217                         kfree(jump);
9218                         adapter->jump_tables[i] = NULL;
9219                         return err;
9220                 }
9221         }
9222
9223         spin_lock(&adapter->fdir_perfect_lock);
9224         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9225         spin_unlock(&adapter->fdir_perfect_lock);
9226         return err;
9227 }
9228
9229 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9230                                             struct tc_cls_u32_offload *cls)
9231 {
9232         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9233
9234         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9235                 return -EINVAL;
9236
9237         /* This ixgbe devices do not support hash tables at the moment
9238          * so abort when given hash tables.
9239          */
9240         if (cls->hnode.divisor > 0)
9241                 return -EINVAL;
9242
9243         set_bit(uhtid - 1, &adapter->tables);
9244         return 0;
9245 }
9246
9247 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9248                                             struct tc_cls_u32_offload *cls)
9249 {
9250         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9251
9252         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9253                 return -EINVAL;
9254
9255         clear_bit(uhtid - 1, &adapter->tables);
9256         return 0;
9257 }
9258
9259 #ifdef CONFIG_NET_CLS_ACT
9260 struct upper_walk_data {
9261         struct ixgbe_adapter *adapter;
9262         u64 action;
9263         int ifindex;
9264         u8 queue;
9265 };
9266
9267 static int get_macvlan_queue(struct net_device *upper, void *_data)
9268 {
9269         if (netif_is_macvlan(upper)) {
9270                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9271                 struct upper_walk_data *data = _data;
9272                 struct ixgbe_adapter *adapter = data->adapter;
9273                 int ifindex = data->ifindex;
9274
9275                 if (vadapter && upper->ifindex == ifindex) {
9276                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9277                         data->action = data->queue;
9278                         return 1;
9279                 }
9280         }
9281
9282         return 0;
9283 }
9284
9285 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9286                                   u8 *queue, u64 *action)
9287 {
9288         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9289         unsigned int num_vfs = adapter->num_vfs, vf;
9290         struct upper_walk_data data;
9291         struct net_device *upper;
9292
9293         /* redirect to a SRIOV VF */
9294         for (vf = 0; vf < num_vfs; ++vf) {
9295                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9296                 if (upper->ifindex == ifindex) {
9297                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9298                         *action = vf + 1;
9299                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9300                         return 0;
9301                 }
9302         }
9303
9304         /* redirect to a offloaded macvlan netdev */
9305         data.adapter = adapter;
9306         data.ifindex = ifindex;
9307         data.action = 0;
9308         data.queue = 0;
9309         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9310                                           get_macvlan_queue, &data)) {
9311                 *action = data.action;
9312                 *queue = data.queue;
9313
9314                 return 0;
9315         }
9316
9317         return -EINVAL;
9318 }
9319
9320 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9321                             struct tcf_exts *exts, u64 *action, u8 *queue)
9322 {
9323         const struct tc_action *a;
9324         int i;
9325
9326         if (!tcf_exts_has_actions(exts))
9327                 return -EINVAL;
9328
9329         tcf_exts_for_each_action(i, a, exts) {
9330                 /* Drop action */
9331                 if (is_tcf_gact_shot(a)) {
9332                         *action = IXGBE_FDIR_DROP_QUEUE;
9333                         *queue = IXGBE_FDIR_DROP_QUEUE;
9334                         return 0;
9335                 }
9336
9337                 /* Redirect to a VF or a offloaded macvlan */
9338                 if (is_tcf_mirred_egress_redirect(a)) {
9339                         struct net_device *dev = tcf_mirred_dev(a);
9340
9341                         if (!dev)
9342                                 return -EINVAL;
9343                         return handle_redirect_action(adapter, dev->ifindex,
9344                                                       queue, action);
9345                 }
9346
9347                 return -EINVAL;
9348         }
9349
9350         return -EINVAL;
9351 }
9352 #else
9353 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9354                             struct tcf_exts *exts, u64 *action, u8 *queue)
9355 {
9356         return -EINVAL;
9357 }
9358 #endif /* CONFIG_NET_CLS_ACT */
9359
9360 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9361                                     union ixgbe_atr_input *mask,
9362                                     struct tc_cls_u32_offload *cls,
9363                                     struct ixgbe_mat_field *field_ptr,
9364                                     struct ixgbe_nexthdr *nexthdr)
9365 {
9366         int i, j, off;
9367         __be32 val, m;
9368         bool found_entry = false, found_jump_field = false;
9369
9370         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9371                 off = cls->knode.sel->keys[i].off;
9372                 val = cls->knode.sel->keys[i].val;
9373                 m = cls->knode.sel->keys[i].mask;
9374
9375                 for (j = 0; field_ptr[j].val; j++) {
9376                         if (field_ptr[j].off == off) {
9377                                 field_ptr[j].val(input, mask, (__force u32)val,
9378                                                  (__force u32)m);
9379                                 input->filter.formatted.flow_type |=
9380                                         field_ptr[j].type;
9381                                 found_entry = true;
9382                                 break;
9383                         }
9384                 }
9385                 if (nexthdr) {
9386                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9387                             nexthdr->val ==
9388                             (__force u32)cls->knode.sel->keys[i].val &&
9389                             nexthdr->mask ==
9390                             (__force u32)cls->knode.sel->keys[i].mask)
9391                                 found_jump_field = true;
9392                         else
9393                                 continue;
9394                 }
9395         }
9396
9397         if (nexthdr && !found_jump_field)
9398                 return -EINVAL;
9399
9400         if (!found_entry)
9401                 return 0;
9402
9403         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9404                                     IXGBE_ATR_L4TYPE_MASK;
9405
9406         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9407                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9408
9409         return 0;
9410 }
9411
9412 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9413                                   struct tc_cls_u32_offload *cls)
9414 {
9415         __be16 protocol = cls->common.protocol;
9416         u32 loc = cls->knode.handle & 0xfffff;
9417         struct ixgbe_hw *hw = &adapter->hw;
9418         struct ixgbe_mat_field *field_ptr;
9419         struct ixgbe_fdir_filter *input = NULL;
9420         union ixgbe_atr_input *mask = NULL;
9421         struct ixgbe_jump_table *jump = NULL;
9422         int i, err = -EINVAL;
9423         u8 queue;
9424         u32 uhtid, link_uhtid;
9425
9426         uhtid = TC_U32_USERHTID(cls->knode.handle);
9427         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9428
9429         /* At the moment cls_u32 jumps to network layer and skips past
9430          * L2 headers. The canonical method to match L2 frames is to use
9431          * negative values. However this is error prone at best but really
9432          * just broken because there is no way to "know" what sort of hdr
9433          * is in front of the network layer. Fix cls_u32 to support L2
9434          * headers when needed.
9435          */
9436         if (protocol != htons(ETH_P_IP))
9437                 return err;
9438
9439         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9440                 e_err(drv, "Location out of range\n");
9441                 return err;
9442         }
9443
9444         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9445          * links and also the fields used to advance the parser across each
9446          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9447          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9448          * To add support for new nodes update ixgbe_model.h parse structures
9449          * this function _should_ be generic try not to hardcode values here.
9450          */
9451         if (uhtid == 0x800) {
9452                 field_ptr = (adapter->jump_tables[0])->mat;
9453         } else {
9454                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9455                         return err;
9456                 if (!adapter->jump_tables[uhtid])
9457                         return err;
9458                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9459         }
9460
9461         if (!field_ptr)
9462                 return err;
9463
9464         /* At this point we know the field_ptr is valid and need to either
9465          * build cls_u32 link or attach filter. Because adding a link to
9466          * a handle that does not exist is invalid and the same for adding
9467          * rules to handles that don't exist.
9468          */
9469
9470         if (link_uhtid) {
9471                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9472
9473                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9474                         return err;
9475
9476                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9477                         return err;
9478
9479                 /* Multiple filters as links to the same hash table are not
9480                  * supported. To add a new filter with the same next header
9481                  * but different match/jump conditions, create a new hash table
9482                  * and link to it.
9483                  */
9484                 if (adapter->jump_tables[link_uhtid] &&
9485                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9486                         e_err(drv, "Link filter exists for link: %x\n",
9487                               link_uhtid);
9488                         return err;
9489                 }
9490
9491                 for (i = 0; nexthdr[i].jump; i++) {
9492                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9493                             nexthdr[i].s != cls->knode.sel->offshift ||
9494                             nexthdr[i].m !=
9495                             (__force u32)cls->knode.sel->offmask)
9496                                 return err;
9497
9498                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9499                         if (!jump)
9500                                 return -ENOMEM;
9501                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9502                         if (!input) {
9503                                 err = -ENOMEM;
9504                                 goto free_jump;
9505                         }
9506                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9507                         if (!mask) {
9508                                 err = -ENOMEM;
9509                                 goto free_input;
9510                         }
9511                         jump->input = input;
9512                         jump->mask = mask;
9513                         jump->link_hdl = cls->knode.handle;
9514
9515                         err = ixgbe_clsu32_build_input(input, mask, cls,
9516                                                        field_ptr, &nexthdr[i]);
9517                         if (!err) {
9518                                 jump->mat = nexthdr[i].jump;
9519                                 adapter->jump_tables[link_uhtid] = jump;
9520                                 break;
9521                         } else {
9522                                 kfree(mask);
9523                                 kfree(input);
9524                                 kfree(jump);
9525                         }
9526                 }
9527                 return 0;
9528         }
9529
9530         input = kzalloc(sizeof(*input), GFP_KERNEL);
9531         if (!input)
9532                 return -ENOMEM;
9533         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9534         if (!mask) {
9535                 err = -ENOMEM;
9536                 goto free_input;
9537         }
9538
9539         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9540                 if ((adapter->jump_tables[uhtid])->input)
9541                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9542                                sizeof(*input));
9543                 if ((adapter->jump_tables[uhtid])->mask)
9544                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9545                                sizeof(*mask));
9546
9547                 /* Lookup in all child hash tables if this location is already
9548                  * filled with a filter
9549                  */
9550                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9551                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9552
9553                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9554                                 e_err(drv, "Filter exists in location: %x\n",
9555                                       loc);
9556                                 err = -EINVAL;
9557                                 goto err_out;
9558                         }
9559                 }
9560         }
9561         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9562         if (err)
9563                 goto err_out;
9564
9565         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9566                                &queue);
9567         if (err < 0)
9568                 goto err_out;
9569
9570         input->sw_idx = loc;
9571
9572         spin_lock(&adapter->fdir_perfect_lock);
9573
9574         if (hlist_empty(&adapter->fdir_filter_list)) {
9575                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9576                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9577                 if (err)
9578                         goto err_out_w_lock;
9579         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9580                 err = -EINVAL;
9581                 goto err_out_w_lock;
9582         }
9583
9584         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9585         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9586                                                     input->sw_idx, queue);
9587         if (!err)
9588                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9589         spin_unlock(&adapter->fdir_perfect_lock);
9590
9591         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9592                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9593
9594         kfree(mask);
9595         return err;
9596 err_out_w_lock:
9597         spin_unlock(&adapter->fdir_perfect_lock);
9598 err_out:
9599         kfree(mask);
9600 free_input:
9601         kfree(input);
9602 free_jump:
9603         kfree(jump);
9604         return err;
9605 }
9606
9607 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9608                                   struct tc_cls_u32_offload *cls_u32)
9609 {
9610         switch (cls_u32->command) {
9611         case TC_CLSU32_NEW_KNODE:
9612         case TC_CLSU32_REPLACE_KNODE:
9613                 return ixgbe_configure_clsu32(adapter, cls_u32);
9614         case TC_CLSU32_DELETE_KNODE:
9615                 return ixgbe_delete_clsu32(adapter, cls_u32);
9616         case TC_CLSU32_NEW_HNODE:
9617         case TC_CLSU32_REPLACE_HNODE:
9618                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9619         case TC_CLSU32_DELETE_HNODE:
9620                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9621         default:
9622                 return -EOPNOTSUPP;
9623         }
9624 }
9625
9626 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9627                                    void *cb_priv)
9628 {
9629         struct ixgbe_adapter *adapter = cb_priv;
9630
9631         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9632                 return -EOPNOTSUPP;
9633
9634         switch (type) {
9635         case TC_SETUP_CLSU32:
9636                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9637         default:
9638                 return -EOPNOTSUPP;
9639         }
9640 }
9641
9642 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9643                                  struct tc_mqprio_qopt *mqprio)
9644 {
9645         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9646         return ixgbe_setup_tc(dev, mqprio->num_tc);
9647 }
9648
9649 static LIST_HEAD(ixgbe_block_cb_list);
9650
9651 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9652                             void *type_data)
9653 {
9654         struct ixgbe_adapter *adapter = netdev_priv(dev);
9655
9656         switch (type) {
9657         case TC_SETUP_BLOCK:
9658                 return flow_block_cb_setup_simple(type_data,
9659                                                   &ixgbe_block_cb_list,
9660                                                   ixgbe_setup_tc_block_cb,
9661                                                   adapter, adapter, true);
9662         case TC_SETUP_QDISC_MQPRIO:
9663                 return ixgbe_setup_tc_mqprio(dev, type_data);
9664         default:
9665                 return -EOPNOTSUPP;
9666         }
9667 }
9668
9669 #ifdef CONFIG_PCI_IOV
9670 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9671 {
9672         struct net_device *netdev = adapter->netdev;
9673
9674         rtnl_lock();
9675         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9676         rtnl_unlock();
9677 }
9678
9679 #endif
9680 void ixgbe_do_reset(struct net_device *netdev)
9681 {
9682         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9683
9684         if (netif_running(netdev))
9685                 ixgbe_reinit_locked(adapter);
9686         else
9687                 ixgbe_reset(adapter);
9688 }
9689
9690 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9691                                             netdev_features_t features)
9692 {
9693         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9694
9695         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9696         if (!(features & NETIF_F_RXCSUM))
9697                 features &= ~NETIF_F_LRO;
9698
9699         /* Turn off LRO if not RSC capable */
9700         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9701                 features &= ~NETIF_F_LRO;
9702
9703         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9704                 e_dev_err("LRO is not supported with XDP\n");
9705                 features &= ~NETIF_F_LRO;
9706         }
9707
9708         return features;
9709 }
9710
9711 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9712 {
9713         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9714                         num_online_cpus());
9715
9716         /* go back to full RSS if we're not running SR-IOV */
9717         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9718                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9719                                     IXGBE_FLAG_SRIOV_ENABLED);
9720
9721         adapter->ring_feature[RING_F_RSS].limit = rss;
9722         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9723
9724         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9725 }
9726
9727 static int ixgbe_set_features(struct net_device *netdev,
9728                               netdev_features_t features)
9729 {
9730         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9731         netdev_features_t changed = netdev->features ^ features;
9732         bool need_reset = false;
9733
9734         /* Make sure RSC matches LRO, reset if change */
9735         if (!(features & NETIF_F_LRO)) {
9736                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9737                         need_reset = true;
9738                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9739         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9740                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9741                 if (adapter->rx_itr_setting == 1 ||
9742                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9743                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9744                         need_reset = true;
9745                 } else if ((changed ^ features) & NETIF_F_LRO) {
9746                         e_info(probe, "rx-usecs set too low, "
9747                                "disabling RSC\n");
9748                 }
9749         }
9750
9751         /*
9752          * Check if Flow Director n-tuple support or hw_tc support was
9753          * enabled or disabled.  If the state changed, we need to reset.
9754          */
9755         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9756                 /* turn off ATR, enable perfect filters and reset */
9757                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9758                         need_reset = true;
9759
9760                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9761                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9762         } else {
9763                 /* turn off perfect filters, enable ATR and reset */
9764                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9765                         need_reset = true;
9766
9767                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9768
9769                 /* We cannot enable ATR if SR-IOV is enabled */
9770                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9771                     /* We cannot enable ATR if we have 2 or more tcs */
9772                     (adapter->hw_tcs > 1) ||
9773                     /* We cannot enable ATR if RSS is disabled */
9774                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9775                     /* A sample rate of 0 indicates ATR disabled */
9776                     (!adapter->atr_sample_rate))
9777                         ; /* do nothing not supported */
9778                 else /* otherwise supported and set the flag */
9779                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9780         }
9781
9782         if (changed & NETIF_F_RXALL)
9783                 need_reset = true;
9784
9785         netdev->features = features;
9786
9787         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9788                 ixgbe_reset_l2fw_offload(adapter);
9789         else if (need_reset)
9790                 ixgbe_do_reset(netdev);
9791         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9792                             NETIF_F_HW_VLAN_CTAG_FILTER))
9793                 ixgbe_set_rx_mode(netdev);
9794
9795         return 1;
9796 }
9797
9798 /**
9799  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9800  * @dev: The port's netdev
9801  * @ti: Tunnel endpoint information
9802  **/
9803 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9804                                       struct udp_tunnel_info *ti)
9805 {
9806         struct ixgbe_adapter *adapter = netdev_priv(dev);
9807         struct ixgbe_hw *hw = &adapter->hw;
9808         __be16 port = ti->port;
9809         u32 port_shift = 0;
9810         u32 reg;
9811
9812         if (ti->sa_family != AF_INET)
9813                 return;
9814
9815         switch (ti->type) {
9816         case UDP_TUNNEL_TYPE_VXLAN:
9817                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9818                         return;
9819
9820                 if (adapter->vxlan_port == port)
9821                         return;
9822
9823                 if (adapter->vxlan_port) {
9824                         netdev_info(dev,
9825                                     "VXLAN port %d set, not adding port %d\n",
9826                                     ntohs(adapter->vxlan_port),
9827                                     ntohs(port));
9828                         return;
9829                 }
9830
9831                 adapter->vxlan_port = port;
9832                 break;
9833         case UDP_TUNNEL_TYPE_GENEVE:
9834                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9835                         return;
9836
9837                 if (adapter->geneve_port == port)
9838                         return;
9839
9840                 if (adapter->geneve_port) {
9841                         netdev_info(dev,
9842                                     "GENEVE port %d set, not adding port %d\n",
9843                                     ntohs(adapter->geneve_port),
9844                                     ntohs(port));
9845                         return;
9846                 }
9847
9848                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9849                 adapter->geneve_port = port;
9850                 break;
9851         default:
9852                 return;
9853         }
9854
9855         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9856         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9857 }
9858
9859 /**
9860  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9861  * @dev: The port's netdev
9862  * @ti: Tunnel endpoint information
9863  **/
9864 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9865                                       struct udp_tunnel_info *ti)
9866 {
9867         struct ixgbe_adapter *adapter = netdev_priv(dev);
9868         u32 port_mask;
9869
9870         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9871             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9872                 return;
9873
9874         if (ti->sa_family != AF_INET)
9875                 return;
9876
9877         switch (ti->type) {
9878         case UDP_TUNNEL_TYPE_VXLAN:
9879                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9880                         return;
9881
9882                 if (adapter->vxlan_port != ti->port) {
9883                         netdev_info(dev, "VXLAN port %d not found\n",
9884                                     ntohs(ti->port));
9885                         return;
9886                 }
9887
9888                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9889                 break;
9890         case UDP_TUNNEL_TYPE_GENEVE:
9891                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9892                         return;
9893
9894                 if (adapter->geneve_port != ti->port) {
9895                         netdev_info(dev, "GENEVE port %d not found\n",
9896                                     ntohs(ti->port));
9897                         return;
9898                 }
9899
9900                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9901                 break;
9902         default:
9903                 return;
9904         }
9905
9906         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9907         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9908 }
9909
9910 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9911                              struct net_device *dev,
9912                              const unsigned char *addr, u16 vid,
9913                              u16 flags,
9914                              struct netlink_ext_ack *extack)
9915 {
9916         /* guarantee we can provide a unique filter for the unicast address */
9917         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9918                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9919                 u16 pool = VMDQ_P(0);
9920
9921                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9922                         return -ENOMEM;
9923         }
9924
9925         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9926 }
9927
9928 /**
9929  * ixgbe_configure_bridge_mode - set various bridge modes
9930  * @adapter: the private structure
9931  * @mode: requested bridge mode
9932  *
9933  * Configure some settings require for various bridge modes.
9934  **/
9935 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9936                                        __u16 mode)
9937 {
9938         struct ixgbe_hw *hw = &adapter->hw;
9939         unsigned int p, num_pools;
9940         u32 vmdctl;
9941
9942         switch (mode) {
9943         case BRIDGE_MODE_VEPA:
9944                 /* disable Tx loopback, rely on switch hairpin mode */
9945                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9946
9947                 /* must enable Rx switching replication to allow multicast
9948                  * packet reception on all VFs, and to enable source address
9949                  * pruning.
9950                  */
9951                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9952                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9953                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9954
9955                 /* enable Rx source address pruning. Note, this requires
9956                  * replication to be enabled or else it does nothing.
9957                  */
9958                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9959                 for (p = 0; p < num_pools; p++) {
9960                         if (hw->mac.ops.set_source_address_pruning)
9961                                 hw->mac.ops.set_source_address_pruning(hw,
9962                                                                        true,
9963                                                                        p);
9964                 }
9965                 break;
9966         case BRIDGE_MODE_VEB:
9967                 /* enable Tx loopback for internal VF/PF communication */
9968                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9969                                 IXGBE_PFDTXGSWC_VT_LBEN);
9970
9971                 /* disable Rx switching replication unless we have SR-IOV
9972                  * virtual functions
9973                  */
9974                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9975                 if (!adapter->num_vfs)
9976                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9977                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9978
9979                 /* disable Rx source address pruning, since we don't expect to
9980                  * be receiving external loopback of our transmitted frames.
9981                  */
9982                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9983                 for (p = 0; p < num_pools; p++) {
9984                         if (hw->mac.ops.set_source_address_pruning)
9985                                 hw->mac.ops.set_source_address_pruning(hw,
9986                                                                        false,
9987                                                                        p);
9988                 }
9989                 break;
9990         default:
9991                 return -EINVAL;
9992         }
9993
9994         adapter->bridge_mode = mode;
9995
9996         e_info(drv, "enabling bridge mode: %s\n",
9997                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9998
9999         return 0;
10000 }
10001
10002 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
10003                                     struct nlmsghdr *nlh, u16 flags,
10004                                     struct netlink_ext_ack *extack)
10005 {
10006         struct ixgbe_adapter *adapter = netdev_priv(dev);
10007         struct nlattr *attr, *br_spec;
10008         int rem;
10009
10010         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10011                 return -EOPNOTSUPP;
10012
10013         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
10014         if (!br_spec)
10015                 return -EINVAL;
10016
10017         nla_for_each_nested(attr, br_spec, rem) {
10018                 int status;
10019                 __u16 mode;
10020
10021                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
10022                         continue;
10023
10024                 if (nla_len(attr) < sizeof(mode))
10025                         return -EINVAL;
10026
10027                 mode = nla_get_u16(attr);
10028                 status = ixgbe_configure_bridge_mode(adapter, mode);
10029                 if (status)
10030                         return status;
10031
10032                 break;
10033         }
10034
10035         return 0;
10036 }
10037
10038 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
10039                                     struct net_device *dev,
10040                                     u32 filter_mask, int nlflags)
10041 {
10042         struct ixgbe_adapter *adapter = netdev_priv(dev);
10043
10044         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10045                 return 0;
10046
10047         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
10048                                        adapter->bridge_mode, 0, 0, nlflags,
10049                                        filter_mask, NULL);
10050 }
10051
10052 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10053 {
10054         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10055         struct ixgbe_fwd_adapter *accel;
10056         int tcs = adapter->hw_tcs ? : 1;
10057         int pool, err;
10058
10059         if (adapter->xdp_prog) {
10060                 e_warn(probe, "L2FW offload is not supported with XDP\n");
10061                 return ERR_PTR(-EINVAL);
10062         }
10063
10064         /* The hardware supported by ixgbe only filters on the destination MAC
10065          * address. In order to avoid issues we only support offloading modes
10066          * where the hardware can actually provide the functionality.
10067          */
10068         if (!macvlan_supports_dest_filter(vdev))
10069                 return ERR_PTR(-EMEDIUMTYPE);
10070
10071         /* We need to lock down the macvlan to be a single queue device so that
10072          * we can reuse the tc_to_txq field in the macvlan netdev to represent
10073          * the queue mapping to our netdev.
10074          */
10075         if (netif_is_multiqueue(vdev))
10076                 return ERR_PTR(-ERANGE);
10077
10078         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10079         if (pool == adapter->num_rx_pools) {
10080                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10081                 u16 reserved_pools;
10082
10083                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10084                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10085                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10086                         return ERR_PTR(-EBUSY);
10087
10088                 /* Hardware has a limited number of available pools. Each VF,
10089                  * and the PF require a pool. Check to ensure we don't
10090                  * attempt to use more then the available number of pools.
10091                  */
10092                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10093                         return ERR_PTR(-EBUSY);
10094
10095                 /* Enable VMDq flag so device will be set in VM mode */
10096                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10097                                   IXGBE_FLAG_SRIOV_ENABLED;
10098
10099                 /* Try to reserve as many queues per pool as possible,
10100                  * we start with the configurations that support 4 queues
10101                  * per pools, followed by 2, and then by just 1 per pool.
10102                  */
10103                 if (used_pools < 32 && adapter->num_rx_pools < 16)
10104                         reserved_pools = min_t(u16,
10105                                                32 - used_pools,
10106                                                16 - adapter->num_rx_pools);
10107                 else if (adapter->num_rx_pools < 32)
10108                         reserved_pools = min_t(u16,
10109                                                64 - used_pools,
10110                                                32 - adapter->num_rx_pools);
10111                 else
10112                         reserved_pools = 64 - used_pools;
10113
10114
10115                 if (!reserved_pools)
10116                         return ERR_PTR(-EBUSY);
10117
10118                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10119
10120                 /* Force reinit of ring allocation with VMDQ enabled */
10121                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10122                 if (err)
10123                         return ERR_PTR(err);
10124
10125                 if (pool >= adapter->num_rx_pools)
10126                         return ERR_PTR(-ENOMEM);
10127         }
10128
10129         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10130         if (!accel)
10131                 return ERR_PTR(-ENOMEM);
10132
10133         set_bit(pool, adapter->fwd_bitmask);
10134         netdev_set_sb_channel(vdev, pool);
10135         accel->pool = pool;
10136         accel->netdev = vdev;
10137
10138         if (!netif_running(pdev))
10139                 return accel;
10140
10141         err = ixgbe_fwd_ring_up(adapter, accel);
10142         if (err)
10143                 return ERR_PTR(err);
10144
10145         return accel;
10146 }
10147
10148 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10149 {
10150         struct ixgbe_fwd_adapter *accel = priv;
10151         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10152         unsigned int rxbase = accel->rx_base_queue;
10153         unsigned int i;
10154
10155         /* delete unicast filter associated with offloaded interface */
10156         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10157                              VMDQ_P(accel->pool));
10158
10159         /* Allow remaining Rx packets to get flushed out of the
10160          * Rx FIFO before we drop the netdev for the ring.
10161          */
10162         usleep_range(10000, 20000);
10163
10164         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10165                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10166                 struct ixgbe_q_vector *qv = ring->q_vector;
10167
10168                 /* Make sure we aren't processing any packets and clear
10169                  * netdev to shut down the ring.
10170                  */
10171                 if (netif_running(adapter->netdev))
10172                         napi_synchronize(&qv->napi);
10173                 ring->netdev = NULL;
10174         }
10175
10176         /* unbind the queues and drop the subordinate channel config */
10177         netdev_unbind_sb_channel(pdev, accel->netdev);
10178         netdev_set_sb_channel(accel->netdev, 0);
10179
10180         clear_bit(accel->pool, adapter->fwd_bitmask);
10181         kfree(accel);
10182 }
10183
10184 #define IXGBE_MAX_MAC_HDR_LEN           127
10185 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10186
10187 static netdev_features_t
10188 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10189                      netdev_features_t features)
10190 {
10191         unsigned int network_hdr_len, mac_hdr_len;
10192
10193         /* Make certain the headers can be described by a context descriptor */
10194         mac_hdr_len = skb_network_header(skb) - skb->data;
10195         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10196                 return features & ~(NETIF_F_HW_CSUM |
10197                                     NETIF_F_SCTP_CRC |
10198                                     NETIF_F_GSO_UDP_L4 |
10199                                     NETIF_F_HW_VLAN_CTAG_TX |
10200                                     NETIF_F_TSO |
10201                                     NETIF_F_TSO6);
10202
10203         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10204         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10205                 return features & ~(NETIF_F_HW_CSUM |
10206                                     NETIF_F_SCTP_CRC |
10207                                     NETIF_F_GSO_UDP_L4 |
10208                                     NETIF_F_TSO |
10209                                     NETIF_F_TSO6);
10210
10211         /* We can only support IPV4 TSO in tunnels if we can mangle the
10212          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10213          * IPsec offoad sets skb->encapsulation but still can handle
10214          * the TSO, so it's the exception.
10215          */
10216         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10217 #ifdef CONFIG_IXGBE_IPSEC
10218                 if (!secpath_exists(skb))
10219 #endif
10220                         features &= ~NETIF_F_TSO;
10221         }
10222
10223         return features;
10224 }
10225
10226 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10227 {
10228         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10229         struct ixgbe_adapter *adapter = netdev_priv(dev);
10230         struct bpf_prog *old_prog;
10231         bool need_reset;
10232
10233         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10234                 return -EINVAL;
10235
10236         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10237                 return -EINVAL;
10238
10239         /* verify ixgbe ring attributes are sufficient for XDP */
10240         for (i = 0; i < adapter->num_rx_queues; i++) {
10241                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10242
10243                 if (ring_is_rsc_enabled(ring))
10244                         return -EINVAL;
10245
10246                 if (frame_size > ixgbe_rx_bufsz(ring))
10247                         return -EINVAL;
10248         }
10249
10250         if (nr_cpu_ids > MAX_XDP_QUEUES)
10251                 return -ENOMEM;
10252
10253         old_prog = xchg(&adapter->xdp_prog, prog);
10254         need_reset = (!!prog != !!old_prog);
10255
10256         /* If transitioning XDP modes reconfigure rings */
10257         if (need_reset) {
10258                 int err;
10259
10260                 if (!prog)
10261                         /* Wait until ndo_xsk_wakeup completes. */
10262                         synchronize_rcu();
10263                 err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10264
10265                 if (err) {
10266                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10267                         return -EINVAL;
10268                 }
10269         } else {
10270                 for (i = 0; i < adapter->num_rx_queues; i++)
10271                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10272                             adapter->xdp_prog);
10273         }
10274
10275         if (old_prog)
10276                 bpf_prog_put(old_prog);
10277
10278         /* Kick start the NAPI context if there is an AF_XDP socket open
10279          * on that queue id. This so that receiving will start.
10280          */
10281         if (need_reset && prog)
10282                 for (i = 0; i < adapter->num_rx_queues; i++)
10283                         if (adapter->xdp_ring[i]->xsk_umem)
10284                                 (void)ixgbe_xsk_wakeup(adapter->netdev, i,
10285                                                        XDP_WAKEUP_RX);
10286
10287         return 0;
10288 }
10289
10290 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10291 {
10292         struct ixgbe_adapter *adapter = netdev_priv(dev);
10293
10294         switch (xdp->command) {
10295         case XDP_SETUP_PROG:
10296                 return ixgbe_xdp_setup(dev, xdp->prog);
10297         case XDP_QUERY_PROG:
10298                 xdp->prog_id = adapter->xdp_prog ?
10299                         adapter->xdp_prog->aux->id : 0;
10300                 return 0;
10301         case XDP_SETUP_XSK_UMEM:
10302                 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10303                                             xdp->xsk.queue_id);
10304
10305         default:
10306                 return -EINVAL;
10307         }
10308 }
10309
10310 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10311 {
10312         /* Force memory writes to complete before letting h/w know there
10313          * are new descriptors to fetch.
10314          */
10315         wmb();
10316         writel(ring->next_to_use, ring->tail);
10317 }
10318
10319 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10320                           struct xdp_frame **frames, u32 flags)
10321 {
10322         struct ixgbe_adapter *adapter = netdev_priv(dev);
10323         struct ixgbe_ring *ring;
10324         int drops = 0;
10325         int i;
10326
10327         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10328                 return -ENETDOWN;
10329
10330         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10331                 return -EINVAL;
10332
10333         /* During program transitions its possible adapter->xdp_prog is assigned
10334          * but ring has not been configured yet. In this case simply abort xmit.
10335          */
10336         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10337         if (unlikely(!ring))
10338                 return -ENXIO;
10339
10340         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10341                 return -ENXIO;
10342
10343         for (i = 0; i < n; i++) {
10344                 struct xdp_frame *xdpf = frames[i];
10345                 int err;
10346
10347                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10348                 if (err != IXGBE_XDP_TX) {
10349                         xdp_return_frame_rx_napi(xdpf);
10350                         drops++;
10351                 }
10352         }
10353
10354         if (unlikely(flags & XDP_XMIT_FLUSH))
10355                 ixgbe_xdp_ring_update_tail(ring);
10356
10357         return n - drops;
10358 }
10359
10360 static const struct net_device_ops ixgbe_netdev_ops = {
10361         .ndo_open               = ixgbe_open,
10362         .ndo_stop               = ixgbe_close,
10363         .ndo_start_xmit         = ixgbe_xmit_frame,
10364         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10365         .ndo_validate_addr      = eth_validate_addr,
10366         .ndo_set_mac_address    = ixgbe_set_mac,
10367         .ndo_change_mtu         = ixgbe_change_mtu,
10368         .ndo_tx_timeout         = ixgbe_tx_timeout,
10369         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10370         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10371         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10372         .ndo_do_ioctl           = ixgbe_ioctl,
10373         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10374         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10375         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10376         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10377         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10378         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10379         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10380         .ndo_get_stats64        = ixgbe_get_stats64,
10381         .ndo_setup_tc           = __ixgbe_setup_tc,
10382 #ifdef IXGBE_FCOE
10383         .ndo_select_queue       = ixgbe_select_queue,
10384         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10385         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10386         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10387         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10388         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10389         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10390         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10391 #endif /* IXGBE_FCOE */
10392         .ndo_set_features = ixgbe_set_features,
10393         .ndo_fix_features = ixgbe_fix_features,
10394         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10395         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10396         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10397         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10398         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10399         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10400         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10401         .ndo_features_check     = ixgbe_features_check,
10402         .ndo_bpf                = ixgbe_xdp,
10403         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10404         .ndo_xsk_wakeup         = ixgbe_xsk_wakeup,
10405 };
10406
10407 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10408                                  struct ixgbe_ring *tx_ring)
10409 {
10410         unsigned long wait_delay, delay_interval;
10411         struct ixgbe_hw *hw = &adapter->hw;
10412         u8 reg_idx = tx_ring->reg_idx;
10413         int wait_loop;
10414         u32 txdctl;
10415
10416         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10417
10418         /* delay mechanism from ixgbe_disable_tx */
10419         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10420
10421         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10422         wait_delay = delay_interval;
10423
10424         while (wait_loop--) {
10425                 usleep_range(wait_delay, wait_delay + 10);
10426                 wait_delay += delay_interval * 2;
10427                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10428
10429                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10430                         return;
10431         }
10432
10433         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10434 }
10435
10436 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10437                               struct ixgbe_ring *tx_ring)
10438 {
10439         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10440         ixgbe_disable_txr_hw(adapter, tx_ring);
10441 }
10442
10443 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10444                                  struct ixgbe_ring *rx_ring)
10445 {
10446         unsigned long wait_delay, delay_interval;
10447         struct ixgbe_hw *hw = &adapter->hw;
10448         u8 reg_idx = rx_ring->reg_idx;
10449         int wait_loop;
10450         u32 rxdctl;
10451
10452         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10453         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10454         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10455
10456         /* write value back with RXDCTL.ENABLE bit cleared */
10457         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10458
10459         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10460         if (hw->mac.type == ixgbe_mac_82598EB &&
10461             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10462                 return;
10463
10464         /* delay mechanism from ixgbe_disable_rx */
10465         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10466
10467         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10468         wait_delay = delay_interval;
10469
10470         while (wait_loop--) {
10471                 usleep_range(wait_delay, wait_delay + 10);
10472                 wait_delay += delay_interval * 2;
10473                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10474
10475                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10476                         return;
10477         }
10478
10479         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10480 }
10481
10482 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10483 {
10484         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10485         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10486 }
10487
10488 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10489 {
10490         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10491         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10492 }
10493
10494 /**
10495  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10496  * @adapter: adapter structure
10497  * @ring: ring index
10498  *
10499  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10500  * assumes that the netdev is running.
10501  **/
10502 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10503 {
10504         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10505
10506         rx_ring = adapter->rx_ring[ring];
10507         tx_ring = adapter->tx_ring[ring];
10508         xdp_ring = adapter->xdp_ring[ring];
10509
10510         ixgbe_disable_txr(adapter, tx_ring);
10511         if (xdp_ring)
10512                 ixgbe_disable_txr(adapter, xdp_ring);
10513         ixgbe_disable_rxr_hw(adapter, rx_ring);
10514
10515         if (xdp_ring)
10516                 synchronize_rcu();
10517
10518         /* Rx/Tx/XDP Tx share the same napi context. */
10519         napi_disable(&rx_ring->q_vector->napi);
10520
10521         ixgbe_clean_tx_ring(tx_ring);
10522         if (xdp_ring)
10523                 ixgbe_clean_tx_ring(xdp_ring);
10524         ixgbe_clean_rx_ring(rx_ring);
10525
10526         ixgbe_reset_txr_stats(tx_ring);
10527         if (xdp_ring)
10528                 ixgbe_reset_txr_stats(xdp_ring);
10529         ixgbe_reset_rxr_stats(rx_ring);
10530 }
10531
10532 /**
10533  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10534  * @adapter: adapter structure
10535  * @ring: ring index
10536  *
10537  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10538  * assumes that the netdev is running.
10539  **/
10540 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10541 {
10542         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10543
10544         rx_ring = adapter->rx_ring[ring];
10545         tx_ring = adapter->tx_ring[ring];
10546         xdp_ring = adapter->xdp_ring[ring];
10547
10548         /* Rx/Tx/XDP Tx share the same napi context. */
10549         napi_enable(&rx_ring->q_vector->napi);
10550
10551         ixgbe_configure_tx_ring(adapter, tx_ring);
10552         if (xdp_ring)
10553                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10554         ixgbe_configure_rx_ring(adapter, rx_ring);
10555
10556         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10557         if (xdp_ring)
10558                 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10559 }
10560
10561 /**
10562  * ixgbe_enumerate_functions - Get the number of ports this device has
10563  * @adapter: adapter structure
10564  *
10565  * This function enumerates the phsyical functions co-located on a single slot,
10566  * in order to determine how many ports a device has. This is most useful in
10567  * determining the required GT/s of PCIe bandwidth necessary for optimal
10568  * performance.
10569  **/
10570 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10571 {
10572         struct pci_dev *entry, *pdev = adapter->pdev;
10573         int physfns = 0;
10574
10575         /* Some cards can not use the generic count PCIe functions method,
10576          * because they are behind a parent switch, so we hardcode these with
10577          * the correct number of functions.
10578          */
10579         if (ixgbe_pcie_from_parent(&adapter->hw))
10580                 physfns = 4;
10581
10582         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10583                 /* don't count virtual functions */
10584                 if (entry->is_virtfn)
10585                         continue;
10586
10587                 /* When the devices on the bus don't all match our device ID,
10588                  * we can't reliably determine the correct number of
10589                  * functions. This can occur if a function has been direct
10590                  * attached to a virtual machine using VT-d, for example. In
10591                  * this case, simply return -1 to indicate this.
10592                  */
10593                 if ((entry->vendor != pdev->vendor) ||
10594                     (entry->device != pdev->device))
10595                         return -1;
10596
10597                 physfns++;
10598         }
10599
10600         return physfns;
10601 }
10602
10603 /**
10604  * ixgbe_wol_supported - Check whether device supports WoL
10605  * @adapter: the adapter private structure
10606  * @device_id: the device ID
10607  * @subdevice_id: the subsystem device ID
10608  *
10609  * This function is used by probe and ethtool to determine
10610  * which devices have WoL support
10611  *
10612  **/
10613 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10614                          u16 subdevice_id)
10615 {
10616         struct ixgbe_hw *hw = &adapter->hw;
10617         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10618
10619         /* WOL not supported on 82598 */
10620         if (hw->mac.type == ixgbe_mac_82598EB)
10621                 return false;
10622
10623         /* check eeprom to see if WOL is enabled for X540 and newer */
10624         if (hw->mac.type >= ixgbe_mac_X540) {
10625                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10626                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10627                      (hw->bus.func == 0)))
10628                         return true;
10629         }
10630
10631         /* WOL is determined based on device IDs for 82599 MACs */
10632         switch (device_id) {
10633         case IXGBE_DEV_ID_82599_SFP:
10634                 /* Only these subdevices could supports WOL */
10635                 switch (subdevice_id) {
10636                 case IXGBE_SUBDEV_ID_82599_560FLR:
10637                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10638                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10639                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10640                         /* only support first port */
10641                         if (hw->bus.func != 0)
10642                                 break;
10643                         fallthrough;
10644                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10645                 case IXGBE_SUBDEV_ID_82599_SFP:
10646                 case IXGBE_SUBDEV_ID_82599_RNDC:
10647                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10648                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10649                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10650                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10651                         return true;
10652                 }
10653                 break;
10654         case IXGBE_DEV_ID_82599EN_SFP:
10655                 /* Only these subdevices support WOL */
10656                 switch (subdevice_id) {
10657                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10658                         return true;
10659                 }
10660                 break;
10661         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10662                 /* All except this subdevice support WOL */
10663                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10664                         return true;
10665                 break;
10666         case IXGBE_DEV_ID_82599_KX4:
10667                 return  true;
10668         default:
10669                 break;
10670         }
10671
10672         return false;
10673 }
10674
10675 /**
10676  * ixgbe_set_fw_version - Set FW version
10677  * @adapter: the adapter private structure
10678  *
10679  * This function is used by probe and ethtool to determine the FW version to
10680  * format to display. The FW version is taken from the EEPROM/NVM.
10681  */
10682 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10683 {
10684         struct ixgbe_hw *hw = &adapter->hw;
10685         struct ixgbe_nvm_version nvm_ver;
10686
10687         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10688         if (nvm_ver.oem_valid) {
10689                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10690                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10691                          nvm_ver.oem_release);
10692                 return;
10693         }
10694
10695         ixgbe_get_etk_id(hw, &nvm_ver);
10696         ixgbe_get_orom_version(hw, &nvm_ver);
10697
10698         if (nvm_ver.or_valid) {
10699                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10700                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10701                          nvm_ver.or_build, nvm_ver.or_patch);
10702                 return;
10703         }
10704
10705         /* Set ETrack ID format */
10706         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10707                  "0x%08x", nvm_ver.etk_id);
10708 }
10709
10710 /**
10711  * ixgbe_probe - Device Initialization Routine
10712  * @pdev: PCI device information struct
10713  * @ent: entry in ixgbe_pci_tbl
10714  *
10715  * Returns 0 on success, negative on failure
10716  *
10717  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10718  * The OS initialization, configuring of the adapter private structure,
10719  * and a hardware reset occur.
10720  **/
10721 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10722 {
10723         struct net_device *netdev;
10724         struct ixgbe_adapter *adapter = NULL;
10725         struct ixgbe_hw *hw;
10726         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10727         int i, err, pci_using_dac, expected_gts;
10728         unsigned int indices = MAX_TX_QUEUES;
10729         u8 part_str[IXGBE_PBANUM_LENGTH];
10730         bool disable_dev = false;
10731 #ifdef IXGBE_FCOE
10732         u16 device_caps;
10733 #endif
10734         u32 eec;
10735
10736         /* Catch broken hardware that put the wrong VF device ID in
10737          * the PCIe SR-IOV capability.
10738          */
10739         if (pdev->is_virtfn) {
10740                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10741                      pci_name(pdev), pdev->vendor, pdev->device);
10742                 return -EINVAL;
10743         }
10744
10745         err = pci_enable_device_mem(pdev);
10746         if (err)
10747                 return err;
10748
10749         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10750                 pci_using_dac = 1;
10751         } else {
10752                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10753                 if (err) {
10754                         dev_err(&pdev->dev,
10755                                 "No usable DMA configuration, aborting\n");
10756                         goto err_dma;
10757                 }
10758                 pci_using_dac = 0;
10759         }
10760
10761         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10762         if (err) {
10763                 dev_err(&pdev->dev,
10764                         "pci_request_selected_regions failed 0x%x\n", err);
10765                 goto err_pci_reg;
10766         }
10767
10768         pci_enable_pcie_error_reporting(pdev);
10769
10770         pci_set_master(pdev);
10771         pci_save_state(pdev);
10772
10773         if (ii->mac == ixgbe_mac_82598EB) {
10774 #ifdef CONFIG_IXGBE_DCB
10775                 /* 8 TC w/ 4 queues per TC */
10776                 indices = 4 * MAX_TRAFFIC_CLASS;
10777 #else
10778                 indices = IXGBE_MAX_RSS_INDICES;
10779 #endif
10780         }
10781
10782         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10783         if (!netdev) {
10784                 err = -ENOMEM;
10785                 goto err_alloc_etherdev;
10786         }
10787
10788         SET_NETDEV_DEV(netdev, &pdev->dev);
10789
10790         adapter = netdev_priv(netdev);
10791
10792         adapter->netdev = netdev;
10793         adapter->pdev = pdev;
10794         hw = &adapter->hw;
10795         hw->back = adapter;
10796         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10797
10798         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10799                               pci_resource_len(pdev, 0));
10800         adapter->io_addr = hw->hw_addr;
10801         if (!hw->hw_addr) {
10802                 err = -EIO;
10803                 goto err_ioremap;
10804         }
10805
10806         netdev->netdev_ops = &ixgbe_netdev_ops;
10807         ixgbe_set_ethtool_ops(netdev);
10808         netdev->watchdog_timeo = 5 * HZ;
10809         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10810
10811         /* Setup hw api */
10812         hw->mac.ops   = *ii->mac_ops;
10813         hw->mac.type  = ii->mac;
10814         hw->mvals     = ii->mvals;
10815         if (ii->link_ops)
10816                 hw->link.ops  = *ii->link_ops;
10817
10818         /* EEPROM */
10819         hw->eeprom.ops = *ii->eeprom_ops;
10820         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10821         if (ixgbe_removed(hw->hw_addr)) {
10822                 err = -EIO;
10823                 goto err_ioremap;
10824         }
10825         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10826         if (!(eec & BIT(8)))
10827                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10828
10829         /* PHY */
10830         hw->phy.ops = *ii->phy_ops;
10831         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10832         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10833         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10834         hw->phy.mdio.mmds = 0;
10835         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10836         hw->phy.mdio.dev = netdev;
10837         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10838         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10839
10840         /* setup the private structure */
10841         err = ixgbe_sw_init(adapter, ii);
10842         if (err)
10843                 goto err_sw_init;
10844
10845         /* Make sure the SWFW semaphore is in a valid state */
10846         if (hw->mac.ops.init_swfw_sync)
10847                 hw->mac.ops.init_swfw_sync(hw);
10848
10849         /* Make it possible the adapter to be woken up via WOL */
10850         switch (adapter->hw.mac.type) {
10851         case ixgbe_mac_82599EB:
10852         case ixgbe_mac_X540:
10853         case ixgbe_mac_X550:
10854         case ixgbe_mac_X550EM_x:
10855         case ixgbe_mac_x550em_a:
10856                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10857                 break;
10858         default:
10859                 break;
10860         }
10861
10862         /*
10863          * If there is a fan on this device and it has failed log the
10864          * failure.
10865          */
10866         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10867                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10868                 if (esdp & IXGBE_ESDP_SDP1)
10869                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10870         }
10871
10872         if (allow_unsupported_sfp)
10873                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10874
10875         /* reset_hw fills in the perm_addr as well */
10876         hw->phy.reset_if_overtemp = true;
10877         err = hw->mac.ops.reset_hw(hw);
10878         hw->phy.reset_if_overtemp = false;
10879         ixgbe_set_eee_capable(adapter);
10880         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10881                 err = 0;
10882         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10883                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10884                 e_dev_err("Reload the driver after installing a supported module.\n");
10885                 goto err_sw_init;
10886         } else if (err) {
10887                 e_dev_err("HW Init failed: %d\n", err);
10888                 goto err_sw_init;
10889         }
10890
10891 #ifdef CONFIG_PCI_IOV
10892         /* SR-IOV not supported on the 82598 */
10893         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10894                 goto skip_sriov;
10895         /* Mailbox */
10896         ixgbe_init_mbx_params_pf(hw);
10897         hw->mbx.ops = ii->mbx_ops;
10898         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10899         ixgbe_enable_sriov(adapter, max_vfs);
10900 skip_sriov:
10901
10902 #endif
10903         netdev->features = NETIF_F_SG |
10904                            NETIF_F_TSO |
10905                            NETIF_F_TSO6 |
10906                            NETIF_F_RXHASH |
10907                            NETIF_F_RXCSUM |
10908                            NETIF_F_HW_CSUM;
10909
10910 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10911                                     NETIF_F_GSO_GRE_CSUM | \
10912                                     NETIF_F_GSO_IPXIP4 | \
10913                                     NETIF_F_GSO_IPXIP6 | \
10914                                     NETIF_F_GSO_UDP_TUNNEL | \
10915                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10916
10917         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10918         netdev->features |= NETIF_F_GSO_PARTIAL |
10919                             IXGBE_GSO_PARTIAL_FEATURES;
10920
10921         if (hw->mac.type >= ixgbe_mac_82599EB)
10922                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
10923
10924 #ifdef CONFIG_IXGBE_IPSEC
10925 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10926                                  NETIF_F_HW_ESP_TX_CSUM | \
10927                                  NETIF_F_GSO_ESP)
10928
10929         if (adapter->ipsec)
10930                 netdev->features |= IXGBE_ESP_FEATURES;
10931 #endif
10932         /* copy netdev features into list of user selectable features */
10933         netdev->hw_features |= netdev->features |
10934                                NETIF_F_HW_VLAN_CTAG_FILTER |
10935                                NETIF_F_HW_VLAN_CTAG_RX |
10936                                NETIF_F_HW_VLAN_CTAG_TX |
10937                                NETIF_F_RXALL |
10938                                NETIF_F_HW_L2FW_DOFFLOAD;
10939
10940         if (hw->mac.type >= ixgbe_mac_82599EB)
10941                 netdev->hw_features |= NETIF_F_NTUPLE |
10942                                        NETIF_F_HW_TC;
10943
10944         if (pci_using_dac)
10945                 netdev->features |= NETIF_F_HIGHDMA;
10946
10947         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10948         netdev->hw_enc_features |= netdev->vlan_features;
10949         netdev->mpls_features |= NETIF_F_SG |
10950                                  NETIF_F_TSO |
10951                                  NETIF_F_TSO6 |
10952                                  NETIF_F_HW_CSUM;
10953         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10954
10955         /* set this bit last since it cannot be part of vlan_features */
10956         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10957                             NETIF_F_HW_VLAN_CTAG_RX |
10958                             NETIF_F_HW_VLAN_CTAG_TX;
10959
10960         netdev->priv_flags |= IFF_UNICAST_FLT;
10961         netdev->priv_flags |= IFF_SUPP_NOFCS;
10962
10963         /* MTU range: 68 - 9710 */
10964         netdev->min_mtu = ETH_MIN_MTU;
10965         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10966
10967 #ifdef CONFIG_IXGBE_DCB
10968         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10969                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10970 #endif
10971
10972 #ifdef IXGBE_FCOE
10973         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10974                 unsigned int fcoe_l;
10975
10976                 if (hw->mac.ops.get_device_caps) {
10977                         hw->mac.ops.get_device_caps(hw, &device_caps);
10978                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10979                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10980                 }
10981
10982
10983                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10984                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10985
10986                 netdev->features |= NETIF_F_FSO |
10987                                     NETIF_F_FCOE_CRC;
10988
10989                 netdev->vlan_features |= NETIF_F_FSO |
10990                                          NETIF_F_FCOE_CRC |
10991                                          NETIF_F_FCOE_MTU;
10992         }
10993 #endif /* IXGBE_FCOE */
10994         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10995                 netdev->hw_features |= NETIF_F_LRO;
10996         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10997                 netdev->features |= NETIF_F_LRO;
10998
10999         if (ixgbe_check_fw_error(adapter)) {
11000                 err = -EIO;
11001                 goto err_sw_init;
11002         }
11003
11004         /* make sure the EEPROM is good */
11005         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
11006                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
11007                 err = -EIO;
11008                 goto err_sw_init;
11009         }
11010
11011         eth_platform_get_mac_address(&adapter->pdev->dev,
11012                                      adapter->hw.mac.perm_addr);
11013
11014         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
11015
11016         if (!is_valid_ether_addr(netdev->dev_addr)) {
11017                 e_dev_err("invalid MAC address\n");
11018                 err = -EIO;
11019                 goto err_sw_init;
11020         }
11021
11022         /* Set hw->mac.addr to permanent MAC address */
11023         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
11024         ixgbe_mac_set_default_filter(adapter);
11025
11026         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
11027
11028         if (ixgbe_removed(hw->hw_addr)) {
11029                 err = -EIO;
11030                 goto err_sw_init;
11031         }
11032         INIT_WORK(&adapter->service_task, ixgbe_service_task);
11033         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
11034         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
11035
11036         err = ixgbe_init_interrupt_scheme(adapter);
11037         if (err)
11038                 goto err_sw_init;
11039
11040         for (i = 0; i < adapter->num_rx_queues; i++)
11041                 u64_stats_init(&adapter->rx_ring[i]->syncp);
11042         for (i = 0; i < adapter->num_tx_queues; i++)
11043                 u64_stats_init(&adapter->tx_ring[i]->syncp);
11044         for (i = 0; i < adapter->num_xdp_queues; i++)
11045                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
11046
11047         /* WOL not supported for all devices */
11048         adapter->wol = 0;
11049         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
11050         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
11051                                                 pdev->subsystem_device);
11052         if (hw->wol_enabled)
11053                 adapter->wol = IXGBE_WUFC_MAG;
11054
11055         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
11056
11057         /* save off EEPROM version number */
11058         ixgbe_set_fw_version(adapter);
11059
11060         /* pick up the PCI bus settings for reporting later */
11061         if (ixgbe_pcie_from_parent(hw))
11062                 ixgbe_get_parent_bus_info(adapter);
11063         else
11064                  hw->mac.ops.get_bus_info(hw);
11065
11066         /* calculate the expected PCIe bandwidth required for optimal
11067          * performance. Note that some older parts will never have enough
11068          * bandwidth due to being older generation PCIe parts. We clamp these
11069          * parts to ensure no warning is displayed if it can't be fixed.
11070          */
11071         switch (hw->mac.type) {
11072         case ixgbe_mac_82598EB:
11073                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
11074                 break;
11075         default:
11076                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
11077                 break;
11078         }
11079
11080         /* don't check link if we failed to enumerate functions */
11081         if (expected_gts > 0)
11082                 ixgbe_check_minimum_link(adapter, expected_gts);
11083
11084         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11085         if (err)
11086                 strlcpy(part_str, "Unknown", sizeof(part_str));
11087         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
11088                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
11089                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
11090                            part_str);
11091         else
11092                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11093                            hw->mac.type, hw->phy.type, part_str);
11094
11095         e_dev_info("%pM\n", netdev->dev_addr);
11096
11097         /* reset the hardware with the new settings */
11098         err = hw->mac.ops.start_hw(hw);
11099         if (err == IXGBE_ERR_EEPROM_VERSION) {
11100                 /* We are running on a pre-production device, log a warning */
11101                 e_dev_warn("This device is a pre-production adapter/LOM. "
11102                            "Please be aware there may be issues associated "
11103                            "with your hardware.  If you are experiencing "
11104                            "problems please contact your Intel or hardware "
11105                            "representative who provided you with this "
11106                            "hardware.\n");
11107         }
11108         strcpy(netdev->name, "eth%d");
11109         pci_set_drvdata(pdev, adapter);
11110         err = register_netdev(netdev);
11111         if (err)
11112                 goto err_register;
11113
11114
11115         /* power down the optics for 82599 SFP+ fiber */
11116         if (hw->mac.ops.disable_tx_laser)
11117                 hw->mac.ops.disable_tx_laser(hw);
11118
11119         /* carrier off reporting is important to ethtool even BEFORE open */
11120         netif_carrier_off(netdev);
11121
11122 #ifdef CONFIG_IXGBE_DCA
11123         if (dca_add_requester(&pdev->dev) == 0) {
11124                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11125                 ixgbe_setup_dca(adapter);
11126         }
11127 #endif
11128         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11129                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11130                 for (i = 0; i < adapter->num_vfs; i++)
11131                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11132         }
11133
11134         /* firmware requires driver version to be 0xFFFFFFFF
11135          * since os does not support feature
11136          */
11137         if (hw->mac.ops.set_fw_drv_ver)
11138                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11139                                            sizeof(UTS_RELEASE) - 1,
11140                                            UTS_RELEASE);
11141
11142         /* add san mac addr to netdev */
11143         ixgbe_add_sanmac_netdev(netdev);
11144
11145         e_dev_info("%s\n", ixgbe_default_device_descr);
11146
11147 #ifdef CONFIG_IXGBE_HWMON
11148         if (ixgbe_sysfs_init(adapter))
11149                 e_err(probe, "failed to allocate sysfs resources\n");
11150 #endif /* CONFIG_IXGBE_HWMON */
11151
11152         ixgbe_dbg_adapter_init(adapter);
11153
11154         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11155         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11156                 hw->mac.ops.setup_link(hw,
11157                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11158                         true);
11159
11160         err = ixgbe_mii_bus_init(hw);
11161         if (err)
11162                 goto err_netdev;
11163
11164         return 0;
11165
11166 err_netdev:
11167         unregister_netdev(netdev);
11168 err_register:
11169         ixgbe_release_hw_control(adapter);
11170         ixgbe_clear_interrupt_scheme(adapter);
11171 err_sw_init:
11172         ixgbe_disable_sriov(adapter);
11173         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11174         iounmap(adapter->io_addr);
11175         kfree(adapter->jump_tables[0]);
11176         kfree(adapter->mac_table);
11177         kfree(adapter->rss_key);
11178         bitmap_free(adapter->af_xdp_zc_qps);
11179 err_ioremap:
11180         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11181         free_netdev(netdev);
11182 err_alloc_etherdev:
11183         pci_release_mem_regions(pdev);
11184 err_pci_reg:
11185 err_dma:
11186         if (!adapter || disable_dev)
11187                 pci_disable_device(pdev);
11188         return err;
11189 }
11190
11191 /**
11192  * ixgbe_remove - Device Removal Routine
11193  * @pdev: PCI device information struct
11194  *
11195  * ixgbe_remove is called by the PCI subsystem to alert the driver
11196  * that it should release a PCI device.  The could be caused by a
11197  * Hot-Plug event, or because the driver is going to be removed from
11198  * memory.
11199  **/
11200 static void ixgbe_remove(struct pci_dev *pdev)
11201 {
11202         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11203         struct net_device *netdev;
11204         bool disable_dev;
11205         int i;
11206
11207         /* if !adapter then we already cleaned up in probe */
11208         if (!adapter)
11209                 return;
11210
11211         netdev  = adapter->netdev;
11212         ixgbe_dbg_adapter_exit(adapter);
11213
11214         set_bit(__IXGBE_REMOVING, &adapter->state);
11215         cancel_work_sync(&adapter->service_task);
11216
11217         if (adapter->mii_bus)
11218                 mdiobus_unregister(adapter->mii_bus);
11219
11220 #ifdef CONFIG_IXGBE_DCA
11221         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11222                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11223                 dca_remove_requester(&pdev->dev);
11224                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11225                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11226         }
11227
11228 #endif
11229 #ifdef CONFIG_IXGBE_HWMON
11230         ixgbe_sysfs_exit(adapter);
11231 #endif /* CONFIG_IXGBE_HWMON */
11232
11233         /* remove the added san mac */
11234         ixgbe_del_sanmac_netdev(netdev);
11235
11236 #ifdef CONFIG_PCI_IOV
11237         ixgbe_disable_sriov(adapter);
11238 #endif
11239         if (netdev->reg_state == NETREG_REGISTERED)
11240                 unregister_netdev(netdev);
11241
11242         ixgbe_stop_ipsec_offload(adapter);
11243         ixgbe_clear_interrupt_scheme(adapter);
11244
11245         ixgbe_release_hw_control(adapter);
11246
11247 #ifdef CONFIG_DCB
11248         kfree(adapter->ixgbe_ieee_pfc);
11249         kfree(adapter->ixgbe_ieee_ets);
11250
11251 #endif
11252         iounmap(adapter->io_addr);
11253         pci_release_mem_regions(pdev);
11254
11255         e_dev_info("complete\n");
11256
11257         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11258                 if (adapter->jump_tables[i]) {
11259                         kfree(adapter->jump_tables[i]->input);
11260                         kfree(adapter->jump_tables[i]->mask);
11261                 }
11262                 kfree(adapter->jump_tables[i]);
11263         }
11264
11265         kfree(adapter->mac_table);
11266         kfree(adapter->rss_key);
11267         bitmap_free(adapter->af_xdp_zc_qps);
11268         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11269         free_netdev(netdev);
11270
11271         pci_disable_pcie_error_reporting(pdev);
11272
11273         if (disable_dev)
11274                 pci_disable_device(pdev);
11275 }
11276
11277 /**
11278  * ixgbe_io_error_detected - called when PCI error is detected
11279  * @pdev: Pointer to PCI device
11280  * @state: The current pci connection state
11281  *
11282  * This function is called after a PCI bus error affecting
11283  * this device has been detected.
11284  */
11285 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11286                                                 pci_channel_state_t state)
11287 {
11288         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11289         struct net_device *netdev = adapter->netdev;
11290
11291 #ifdef CONFIG_PCI_IOV
11292         struct ixgbe_hw *hw = &adapter->hw;
11293         struct pci_dev *bdev, *vfdev;
11294         u32 dw0, dw1, dw2, dw3;
11295         int vf, pos;
11296         u16 req_id, pf_func;
11297
11298         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11299             adapter->num_vfs == 0)
11300                 goto skip_bad_vf_detection;
11301
11302         bdev = pdev->bus->self;
11303         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11304                 bdev = bdev->bus->self;
11305
11306         if (!bdev)
11307                 goto skip_bad_vf_detection;
11308
11309         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11310         if (!pos)
11311                 goto skip_bad_vf_detection;
11312
11313         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11314         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11315         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11316         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11317         if (ixgbe_removed(hw->hw_addr))
11318                 goto skip_bad_vf_detection;
11319
11320         req_id = dw1 >> 16;
11321         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11322         if (!(req_id & 0x0080))
11323                 goto skip_bad_vf_detection;
11324
11325         pf_func = req_id & 0x01;
11326         if ((pf_func & 1) == (pdev->devfn & 1)) {
11327                 unsigned int device_id;
11328
11329                 vf = (req_id & 0x7F) >> 1;
11330                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11331                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11332                                 "%8.8x\tdw3: %8.8x\n",
11333                 dw0, dw1, dw2, dw3);
11334                 switch (adapter->hw.mac.type) {
11335                 case ixgbe_mac_82599EB:
11336                         device_id = IXGBE_82599_VF_DEVICE_ID;
11337                         break;
11338                 case ixgbe_mac_X540:
11339                         device_id = IXGBE_X540_VF_DEVICE_ID;
11340                         break;
11341                 case ixgbe_mac_X550:
11342                         device_id = IXGBE_DEV_ID_X550_VF;
11343                         break;
11344                 case ixgbe_mac_X550EM_x:
11345                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11346                         break;
11347                 case ixgbe_mac_x550em_a:
11348                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11349                         break;
11350                 default:
11351                         device_id = 0;
11352                         break;
11353                 }
11354
11355                 /* Find the pci device of the offending VF */
11356                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11357                 while (vfdev) {
11358                         if (vfdev->devfn == (req_id & 0xFF))
11359                                 break;
11360                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11361                                                device_id, vfdev);
11362                 }
11363                 /*
11364                  * There's a slim chance the VF could have been hot plugged,
11365                  * so if it is no longer present we don't need to issue the
11366                  * VFLR.  Just clean up the AER in that case.
11367                  */
11368                 if (vfdev) {
11369                         pcie_flr(vfdev);
11370                         /* Free device reference count */
11371                         pci_dev_put(vfdev);
11372                 }
11373         }
11374
11375         /*
11376          * Even though the error may have occurred on the other port
11377          * we still need to increment the vf error reference count for
11378          * both ports because the I/O resume function will be called
11379          * for both of them.
11380          */
11381         adapter->vferr_refcount++;
11382
11383         return PCI_ERS_RESULT_RECOVERED;
11384
11385 skip_bad_vf_detection:
11386 #endif /* CONFIG_PCI_IOV */
11387         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11388                 return PCI_ERS_RESULT_DISCONNECT;
11389
11390         if (!netif_device_present(netdev))
11391                 return PCI_ERS_RESULT_DISCONNECT;
11392
11393         rtnl_lock();
11394         netif_device_detach(netdev);
11395
11396         if (netif_running(netdev))
11397                 ixgbe_close_suspend(adapter);
11398
11399         if (state == pci_channel_io_perm_failure) {
11400                 rtnl_unlock();
11401                 return PCI_ERS_RESULT_DISCONNECT;
11402         }
11403
11404         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11405                 pci_disable_device(pdev);
11406         rtnl_unlock();
11407
11408         /* Request a slot reset. */
11409         return PCI_ERS_RESULT_NEED_RESET;
11410 }
11411
11412 /**
11413  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11414  * @pdev: Pointer to PCI device
11415  *
11416  * Restart the card from scratch, as if from a cold-boot.
11417  */
11418 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11419 {
11420         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11421         pci_ers_result_t result;
11422
11423         if (pci_enable_device_mem(pdev)) {
11424                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11425                 result = PCI_ERS_RESULT_DISCONNECT;
11426         } else {
11427                 smp_mb__before_atomic();
11428                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11429                 adapter->hw.hw_addr = adapter->io_addr;
11430                 pci_set_master(pdev);
11431                 pci_restore_state(pdev);
11432                 pci_save_state(pdev);
11433
11434                 pci_wake_from_d3(pdev, false);
11435
11436                 ixgbe_reset(adapter);
11437                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11438                 result = PCI_ERS_RESULT_RECOVERED;
11439         }
11440
11441         return result;
11442 }
11443
11444 /**
11445  * ixgbe_io_resume - called when traffic can start flowing again.
11446  * @pdev: Pointer to PCI device
11447  *
11448  * This callback is called when the error recovery driver tells us that
11449  * its OK to resume normal operation.
11450  */
11451 static void ixgbe_io_resume(struct pci_dev *pdev)
11452 {
11453         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11454         struct net_device *netdev = adapter->netdev;
11455
11456 #ifdef CONFIG_PCI_IOV
11457         if (adapter->vferr_refcount) {
11458                 e_info(drv, "Resuming after VF err\n");
11459                 adapter->vferr_refcount--;
11460                 return;
11461         }
11462
11463 #endif
11464         rtnl_lock();
11465         if (netif_running(netdev))
11466                 ixgbe_open(netdev);
11467
11468         netif_device_attach(netdev);
11469         rtnl_unlock();
11470 }
11471
11472 static const struct pci_error_handlers ixgbe_err_handler = {
11473         .error_detected = ixgbe_io_error_detected,
11474         .slot_reset = ixgbe_io_slot_reset,
11475         .resume = ixgbe_io_resume,
11476 };
11477
11478 static struct pci_driver ixgbe_driver = {
11479         .name     = ixgbe_driver_name,
11480         .id_table = ixgbe_pci_tbl,
11481         .probe    = ixgbe_probe,
11482         .remove   = ixgbe_remove,
11483 #ifdef CONFIG_PM
11484         .suspend  = ixgbe_suspend,
11485         .resume   = ixgbe_resume,
11486 #endif
11487         .shutdown = ixgbe_shutdown,
11488         .sriov_configure = ixgbe_pci_sriov_configure,
11489         .err_handler = &ixgbe_err_handler
11490 };
11491
11492 /**
11493  * ixgbe_init_module - Driver Registration Routine
11494  *
11495  * ixgbe_init_module is the first routine called when the driver is
11496  * loaded. All it does is register with the PCI subsystem.
11497  **/
11498 static int __init ixgbe_init_module(void)
11499 {
11500         int ret;
11501         pr_info("%s\n", ixgbe_driver_string);
11502         pr_info("%s\n", ixgbe_copyright);
11503
11504         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11505         if (!ixgbe_wq) {
11506                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11507                 return -ENOMEM;
11508         }
11509
11510         ixgbe_dbg_init();
11511
11512         ret = pci_register_driver(&ixgbe_driver);
11513         if (ret) {
11514                 destroy_workqueue(ixgbe_wq);
11515                 ixgbe_dbg_exit();
11516                 return ret;
11517         }
11518
11519 #ifdef CONFIG_IXGBE_DCA
11520         dca_register_notify(&dca_notifier);
11521 #endif
11522
11523         return 0;
11524 }
11525
11526 module_init(ixgbe_init_module);
11527
11528 /**
11529  * ixgbe_exit_module - Driver Exit Cleanup Routine
11530  *
11531  * ixgbe_exit_module is called just before the driver is removed
11532  * from memory.
11533  **/
11534 static void __exit ixgbe_exit_module(void)
11535 {
11536 #ifdef CONFIG_IXGBE_DCA
11537         dca_unregister_notify(&dca_notifier);
11538 #endif
11539         pci_unregister_driver(&ixgbe_driver);
11540
11541         ixgbe_dbg_exit();
11542         if (ixgbe_wq) {
11543                 destroy_workqueue(ixgbe_wq);
11544                 ixgbe_wq = NULL;
11545         }
11546 }
11547
11548 #ifdef CONFIG_IXGBE_DCA
11549 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11550                             void *p)
11551 {
11552         int ret_val;
11553
11554         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11555                                          __ixgbe_notify_dca);
11556
11557         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11558 }
11559
11560 #endif /* CONFIG_IXGBE_DCA */
11561
11562 module_exit(ixgbe_exit_module);
11563
11564 /* ixgbe_main.c */