drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <scsi/fc/fc_fcoe.h>
  31 #include <net/udp_tunnel.h>
  32 #include <net/pkt_cls.h>
  33 #include <net/tc_act/tc_gact.h>
  34 #include <net/tc_act/tc_mirred.h>
  35 #include <net/vxlan.h>
  36 #include <net/mpls.h>
  37
  38 #include "ixgbe.h"
  39 #include "ixgbe_common.h"
  40 #include "ixgbe_dcb_82599.h"
  41 #include "ixgbe_sriov.h"
  42 #include "ixgbe_model.h"
  43
  44 char ixgbe_driver_name[] = "ixgbe";
  45 static const char ixgbe_driver_string[] =
  46                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  47 #ifdef IXGBE_FCOE
  48 char ixgbe_default_device_descr[] =
  49                               "Intel(R) 10 Gigabit Network Connection";
  50 #else
  51 static char ixgbe_default_device_descr[] =
  52                               "Intel(R) 10 Gigabit Network Connection";
  53 #endif
  54 #define DRV_VERSION "5.1.0-k"
  55 const char ixgbe_driver_version[] = DRV_VERSION;
  56 static const char ixgbe_copyright[] =
  57                                 "Copyright (c) 1999-2016 Intel Corporation.";
  58
  59 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  60
  61 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  62         [board_82598]           = &ixgbe_82598_info,
  63         [board_82599]           = &ixgbe_82599_info,
  64         [board_X540]            = &ixgbe_X540_info,
  65         [board_X550]            = &ixgbe_X550_info,
  66         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  67         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  68         [board_x550em_a]        = &ixgbe_x550em_a_info,
  69         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  70 };
  71
  72 /* ixgbe_pci_tbl - PCI Device ID Table
  73  *
  74  * Wildcard entries (PCI_ANY_ID) should come last
  75  * Last entry must be all 0s
  76  *
  77  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  78  *   Class, Class Mask, private data (not used) }
  79  */
  80 static const struct pci_device_id ixgbe_pci_tbl[] = {
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  82         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  84         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 128         /* required last entry */
 129         {0, }
 130 };
 131 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 132
 133 #ifdef CONFIG_IXGBE_DCA
 134 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 135                             void *p);
 136 static struct notifier_block dca_notifier = {
 137         .notifier_call = ixgbe_notify_dca,
 138         .next          = NULL,
 139         .priority      = 0
 140 };
 141 #endif
 142
 143 #ifdef CONFIG_PCI_IOV
 144 static unsigned int max_vfs;
 145 module_param(max_vfs, uint, 0);
 146 MODULE_PARM_DESC(max_vfs,
 147                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 148 #endif /* CONFIG_PCI_IOV */
 149
 150 static unsigned int allow_unsupported_sfp;
 151 module_param(allow_unsupported_sfp, uint, 0);
 152 MODULE_PARM_DESC(allow_unsupported_sfp,
 153                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 154
 155 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 156 static int debug = -1;
 157 module_param(debug, int, 0);
 158 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 159
 160 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 161 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 162 MODULE_LICENSE("GPL");
 163 MODULE_VERSION(DRV_VERSION);
 164
 165 static struct workqueue_struct *ixgbe_wq;
 166
 167 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 168 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 169
 170 static const struct net_device_ops ixgbe_netdev_ops;
 171
 172 static bool netif_is_ixgbe(struct net_device *dev)
 173 {
 174         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 175 }
 176
 177 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 178                                           u32 reg, u16 *value)
 179 {
 180         struct pci_dev *parent_dev;
 181         struct pci_bus *parent_bus;
 182
 183         parent_bus = adapter->pdev->bus->parent;
 184         if (!parent_bus)
 185                 return -1;
 186
 187         parent_dev = parent_bus->self;
 188         if (!parent_dev)
 189                 return -1;
 190
 191         if (!pci_is_pcie(parent_dev))
 192                 return -1;
 193
 194         pcie_capability_read_word(parent_dev, reg, value);
 195         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 196             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 197                 return -1;
 198         return 0;
 199 }
 200
 201 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 202 {
 203         struct ixgbe_hw *hw = &adapter->hw;
 204         u16 link_status = 0;
 205         int err;
 206
 207         hw->bus.type = ixgbe_bus_type_pci_express;
 208
 209         /* Get the negotiated link width and speed from PCI config space of the
 210          * parent, as this device is behind a switch
 211          */
 212         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 213
 214         /* assume caller will handle error case */
 215         if (err)
 216                 return err;
 217
 218         hw->bus.width = ixgbe_convert_bus_width(link_status);
 219         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 220
 221         return 0;
 222 }
 223
 224 /**
 225  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 226  * @hw: hw specific details
 227  *
 228  * This function is used by probe to determine whether a device's PCI-Express
 229  * bandwidth details should be gathered from the parent bus instead of from the
 230  * device. Used to ensure that various locations all have the correct device ID
 231  * checks.
 232  */
 233 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 234 {
 235         switch (hw->device_id) {
 236         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 237         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 238                 return true;
 239         default:
 240                 return false;
 241         }
 242 }
 243
 244 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 245                                      int expected_gts)
 246 {
 247         struct ixgbe_hw *hw = &adapter->hw;
 248         struct pci_dev *pdev;
 249
 250         /* Some devices are not connected over PCIe and thus do not negotiate
 251          * speed. These devices do not have valid bus info, and thus any report
 252          * we generate may not be correct.
 253          */
 254         if (hw->bus.type == ixgbe_bus_type_internal)
 255                 return;
 256
 257         /* determine whether to use the parent device */
 258         if (ixgbe_pcie_from_parent(&adapter->hw))
 259                 pdev = adapter->pdev->bus->parent->self;
 260         else
 261                 pdev = adapter->pdev;
 262
 263         pcie_print_link_status(pdev);
 264 }
 265
 266 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 267 {
 268         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 269             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 270             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 271                 queue_work(ixgbe_wq, &adapter->service_task);
 272 }
 273
 274 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 275 {
 276         struct ixgbe_adapter *adapter = hw->back;
 277
 278         if (!hw->hw_addr)
 279                 return;
 280         hw->hw_addr = NULL;
 281         e_dev_err("Adapter removed\n");
 282         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 283                 ixgbe_service_event_schedule(adapter);
 284 }
 285
 286 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 287 {
 288         u8 __iomem *reg_addr;
 289         u32 value;
 290         int i;
 291
 292         reg_addr = READ_ONCE(hw->hw_addr);
 293         if (ixgbe_removed(reg_addr))
 294                 return IXGBE_FAILED_READ_REG;
 295
 296         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 297          * so perform several status register reads to determine if the adapter
 298          * has been removed.
 299          */
 300         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 301                 value = readl(reg_addr + IXGBE_STATUS);
 302                 if (value != IXGBE_FAILED_READ_REG)
 303                         break;
 304                 mdelay(3);
 305         }
 306
 307         if (value == IXGBE_FAILED_READ_REG)
 308                 ixgbe_remove_adapter(hw);
 309         else
 310                 value = readl(reg_addr + reg);
 311         return value;
 312 }
 313
 314 /**
 315  * ixgbe_read_reg - Read from device register
 316  * @hw: hw specific details
 317  * @reg: offset of register to read
 318  *
 319  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 320  *
 321  * This function is used to read device registers. It checks for device
 322  * removal by confirming any read that returns all ones by checking the
 323  * status register value for all ones. This function avoids reading from
 324  * the hardware if a removal was previously detected in which case it
 325  * returns IXGBE_FAILED_READ_REG (all ones).
 326  */
 327 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 328 {
 329         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 330         u32 value;
 331
 332         if (ixgbe_removed(reg_addr))
 333                 return IXGBE_FAILED_READ_REG;
 334         if (unlikely(hw->phy.nw_mng_if_sel &
 335                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 336                 struct ixgbe_adapter *adapter;
 337                 int i;
 338
 339                 for (i = 0; i < 200; ++i) {
 340                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 341                         if (likely(!value))
 342                                 goto writes_completed;
 343                         if (value == IXGBE_FAILED_READ_REG) {
 344                                 ixgbe_remove_adapter(hw);
 345                                 return IXGBE_FAILED_READ_REG;
 346                         }
 347                         udelay(5);
 348                 }
 349
 350                 adapter = hw->back;
 351                 e_warn(hw, "register writes incomplete %08x\n", value);
 352         }
 353
 354 writes_completed:
 355         value = readl(reg_addr + reg);
 356         if (unlikely(value == IXGBE_FAILED_READ_REG))
 357                 value = ixgbe_check_remove(hw, reg);
 358         return value;
 359 }
 360
 361 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 362 {
 363         u16 value;
 364
 365         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 366         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 367                 ixgbe_remove_adapter(hw);
 368                 return true;
 369         }
 370         return false;
 371 }
 372
 373 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 374 {
 375         struct ixgbe_adapter *adapter = hw->back;
 376         u16 value;
 377
 378         if (ixgbe_removed(hw->hw_addr))
 379                 return IXGBE_FAILED_READ_CFG_WORD;
 380         pci_read_config_word(adapter->pdev, reg, &value);
 381         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 382             ixgbe_check_cfg_remove(hw, adapter->pdev))
 383                 return IXGBE_FAILED_READ_CFG_WORD;
 384         return value;
 385 }
 386
 387 #ifdef CONFIG_PCI_IOV
 388 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 389 {
 390         struct ixgbe_adapter *adapter = hw->back;
 391         u32 value;
 392
 393         if (ixgbe_removed(hw->hw_addr))
 394                 return IXGBE_FAILED_READ_CFG_DWORD;
 395         pci_read_config_dword(adapter->pdev, reg, &value);
 396         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 397             ixgbe_check_cfg_remove(hw, adapter->pdev))
 398                 return IXGBE_FAILED_READ_CFG_DWORD;
 399         return value;
 400 }
 401 #endif /* CONFIG_PCI_IOV */
 402
 403 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 404 {
 405         struct ixgbe_adapter *adapter = hw->back;
 406
 407         if (ixgbe_removed(hw->hw_addr))
 408                 return;
 409         pci_write_config_word(adapter->pdev, reg, value);
 410 }
 411
 412 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 413 {
 414         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 415
 416         /* flush memory to make sure state is correct before next watchdog */
 417         smp_mb__before_atomic();
 418         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 419 }
 420
 421 struct ixgbe_reg_info {
 422         u32 ofs;
 423         char *name;
 424 };
 425
 426 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 427
 428         /* General Registers */
 429         {IXGBE_CTRL, "CTRL"},
 430         {IXGBE_STATUS, "STATUS"},
 431         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 432
 433         /* Interrupt Registers */
 434         {IXGBE_EICR, "EICR"},
 435
 436         /* RX Registers */
 437         {IXGBE_SRRCTL(0), "SRRCTL"},
 438         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 439         {IXGBE_RDLEN(0), "RDLEN"},
 440         {IXGBE_RDH(0), "RDH"},
 441         {IXGBE_RDT(0), "RDT"},
 442         {IXGBE_RXDCTL(0), "RXDCTL"},
 443         {IXGBE_RDBAL(0), "RDBAL"},
 444         {IXGBE_RDBAH(0), "RDBAH"},
 445
 446         /* TX Registers */
 447         {IXGBE_TDBAL(0), "TDBAL"},
 448         {IXGBE_TDBAH(0), "TDBAH"},
 449         {IXGBE_TDLEN(0), "TDLEN"},
 450         {IXGBE_TDH(0), "TDH"},
 451         {IXGBE_TDT(0), "TDT"},
 452         {IXGBE_TXDCTL(0), "TXDCTL"},
 453
 454         /* List Terminator */
 455         { .name = NULL }
 456 };
 457
 458
 459 /*
 460  * ixgbe_regdump - register printout routine
 461  */
 462 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 463 {
 464         int i;
 465         char rname[16];
 466         u32 regs[64];
 467
 468         switch (reginfo->ofs) {
 469         case IXGBE_SRRCTL(0):
 470                 for (i = 0; i < 64; i++)
 471                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 472                 break;
 473         case IXGBE_DCA_RXCTRL(0):
 474                 for (i = 0; i < 64; i++)
 475                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 476                 break;
 477         case IXGBE_RDLEN(0):
 478                 for (i = 0; i < 64; i++)
 479                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 480                 break;
 481         case IXGBE_RDH(0):
 482                 for (i = 0; i < 64; i++)
 483                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 484                 break;
 485         case IXGBE_RDT(0):
 486                 for (i = 0; i < 64; i++)
 487                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 488                 break;
 489         case IXGBE_RXDCTL(0):
 490                 for (i = 0; i < 64; i++)
 491                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 492                 break;
 493         case IXGBE_RDBAL(0):
 494                 for (i = 0; i < 64; i++)
 495                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 496                 break;
 497         case IXGBE_RDBAH(0):
 498                 for (i = 0; i < 64; i++)
 499                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 500                 break;
 501         case IXGBE_TDBAL(0):
 502                 for (i = 0; i < 64; i++)
 503                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 504                 break;
 505         case IXGBE_TDBAH(0):
 506                 for (i = 0; i < 64; i++)
 507                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 508                 break;
 509         case IXGBE_TDLEN(0):
 510                 for (i = 0; i < 64; i++)
 511                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 512                 break;
 513         case IXGBE_TDH(0):
 514                 for (i = 0; i < 64; i++)
 515                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 516                 break;
 517         case IXGBE_TDT(0):
 518                 for (i = 0; i < 64; i++)
 519                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 520                 break;
 521         case IXGBE_TXDCTL(0):
 522                 for (i = 0; i < 64; i++)
 523                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 524                 break;
 525         default:
 526                 pr_info("%-15s %08x\n",
 527                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 528                 return;
 529         }
 530
 531         i = 0;
 532         while (i < 64) {
 533                 int j;
 534                 char buf[9 * 8 + 1];
 535                 char *p = buf;
 536
 537                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 538                 for (j = 0; j < 8; j++)
 539                         p += sprintf(p, " %08x", regs[i++]);
 540                 pr_err("%-15s%s\n", rname, buf);
 541         }
 542
 543 }
 544
 545 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 546 {
 547         struct ixgbe_tx_buffer *tx_buffer;
 548
 549         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 550         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 551                 n, ring->next_to_use, ring->next_to_clean,
 552                 (u64)dma_unmap_addr(tx_buffer, dma),
 553                 dma_unmap_len(tx_buffer, len),
 554                 tx_buffer->next_to_watch,
 555                 (u64)tx_buffer->time_stamp);
 556 }
 557
 558 /*
 559  * ixgbe_dump - Print registers, tx-rings and rx-rings
 560  */
 561 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 562 {
 563         struct net_device *netdev = adapter->netdev;
 564         struct ixgbe_hw *hw = &adapter->hw;
 565         struct ixgbe_reg_info *reginfo;
 566         int n = 0;
 567         struct ixgbe_ring *ring;
 568         struct ixgbe_tx_buffer *tx_buffer;
 569         union ixgbe_adv_tx_desc *tx_desc;
 570         struct my_u0 { u64 a; u64 b; } *u0;
 571         struct ixgbe_ring *rx_ring;
 572         union ixgbe_adv_rx_desc *rx_desc;
 573         struct ixgbe_rx_buffer *rx_buffer_info;
 574         int i = 0;
 575
 576         if (!netif_msg_hw(adapter))
 577                 return;
 578
 579         /* Print netdevice Info */
 580         if (netdev) {
 581                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 582                 pr_info("Device Name     state            "
 583                         "trans_start\n");
 584                 pr_info("%-15s %016lX %016lX\n",
 585                         netdev->name,
 586                         netdev->state,
 587                         dev_trans_start(netdev));
 588         }
 589
 590         /* Print Registers */
 591         dev_info(&adapter->pdev->dev, "Register Dump\n");
 592         pr_info(" Register Name   Value\n");
 593         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 594              reginfo->name; reginfo++) {
 595                 ixgbe_regdump(hw, reginfo);
 596         }
 597
 598         /* Print TX Ring Summary */
 599         if (!netdev || !netif_running(netdev))
 600                 return;
 601
 602         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 603         pr_info(" %s     %s              %s        %s\n",
 604                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 605                 "leng", "ntw", "timestamp");
 606         for (n = 0; n < adapter->num_tx_queues; n++) {
 607                 ring = adapter->tx_ring[n];
 608                 ixgbe_print_buffer(ring, n);
 609         }
 610
 611         for (n = 0; n < adapter->num_xdp_queues; n++) {
 612                 ring = adapter->xdp_ring[n];
 613                 ixgbe_print_buffer(ring, n);
 614         }
 615
 616         /* Print TX Rings */
 617         if (!netif_msg_tx_done(adapter))
 618                 goto rx_ring_summary;
 619
 620         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 621
 622         /* Transmit Descriptor Formats
 623          *
 624          * 82598 Advanced Transmit Descriptor
 625          *   +--------------------------------------------------------------+
 626          * 0 |         Buffer Address [63:0]                                |
 627          *   +--------------------------------------------------------------+
 628          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 629          *   +--------------------------------------------------------------+
 630          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 631          *
 632          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 633          *   +--------------------------------------------------------------+
 634          * 0 |                          RSV [63:0]                          |
 635          *   +--------------------------------------------------------------+
 636          * 8 |            RSV           |  STA  |          NXTSEQ           |
 637          *   +--------------------------------------------------------------+
 638          *   63                       36 35   32 31                         0
 639          *
 640          * 82599+ Advanced Transmit Descriptor
 641          *   +--------------------------------------------------------------+
 642          * 0 |         Buffer Address [63:0]                                |
 643          *   +--------------------------------------------------------------+
 644          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 645          *   +--------------------------------------------------------------+
 646          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 647          *
 648          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 649          *   +--------------------------------------------------------------+
 650          * 0 |                          RSV [63:0]                          |
 651          *   +--------------------------------------------------------------+
 652          * 8 |            RSV           |  STA  |           RSV             |
 653          *   +--------------------------------------------------------------+
 654          *   63                       36 35   32 31                         0
 655          */
 656
 657         for (n = 0; n < adapter->num_tx_queues; n++) {
 658                 ring = adapter->tx_ring[n];
 659                 pr_info("------------------------------------\n");
 660                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 661                 pr_info("------------------------------------\n");
 662                 pr_info("%s%s    %s              %s        %s          %s\n",
 663                         "T [desc]     [address 63:0  ] ",
 664                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 665                         "leng", "ntw", "timestamp", "bi->skb");
 666
 667                 for (i = 0; ring->desc && (i < ring->count); i++) {
 668                         tx_desc = IXGBE_TX_DESC(ring, i);
 669                         tx_buffer = &ring->tx_buffer_info[i];
 670                         u0 = (struct my_u0 *)tx_desc;
 671                         if (dma_unmap_len(tx_buffer, len) > 0) {
 672                                 const char *ring_desc;
 673
 674                                 if (i == ring->next_to_use &&
 675                                     i == ring->next_to_clean)
 676                                         ring_desc = " NTC/U";
 677                                 else if (i == ring->next_to_use)
 678                                         ring_desc = " NTU";
 679                                 else if (i == ring->next_to_clean)
 680                                         ring_desc = " NTC";
 681                                 else
 682                                         ring_desc = "";
 683                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 684                                         i,
 685                                         le64_to_cpu((__force __le64)u0->a),
 686                                         le64_to_cpu((__force __le64)u0->b),
 687                                         (u64)dma_unmap_addr(tx_buffer, dma),
 688                                         dma_unmap_len(tx_buffer, len),
 689                                         tx_buffer->next_to_watch,
 690                                         (u64)tx_buffer->time_stamp,
 691                                         tx_buffer->skb,
 692                                         ring_desc);
 693
 694                                 if (netif_msg_pktdata(adapter) &&
 695                                     tx_buffer->skb)
 696                                         print_hex_dump(KERN_INFO, "",
 697                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 698                                                 tx_buffer->skb->data,
 699                                                 dma_unmap_len(tx_buffer, len),
 700                                                 true);
 701                         }
 702                 }
 703         }
 704
 705         /* Print RX Rings Summary */
 706 rx_ring_summary:
 707         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 708         pr_info("Queue [NTU] [NTC]\n");
 709         for (n = 0; n < adapter->num_rx_queues; n++) {
 710                 rx_ring = adapter->rx_ring[n];
 711                 pr_info("%5d %5X %5X\n",
 712                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 713         }
 714
 715         /* Print RX Rings */
 716         if (!netif_msg_rx_status(adapter))
 717                 return;
 718
 719         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 720
 721         /* Receive Descriptor Formats
 722          *
 723          * 82598 Advanced Receive Descriptor (Read) Format
 724          *    63                                           1        0
 725          *    +-----------------------------------------------------+
 726          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 727          *    +----------------------------------------------+------+
 728          *  8 |       Header Buffer Address [63:1]           |  DD  |
 729          *    +-----------------------------------------------------+
 730          *
 731          *
 732          * 82598 Advanced Receive Descriptor (Write-Back) Format
 733          *
 734          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 735          *   +------------------------------------------------------+
 736          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 737          *   | Packet   | IP     |   |          |     | Type | Type |
 738          *   | Checksum | Ident  |   |          |     |      |      |
 739          *   +------------------------------------------------------+
 740          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 741          *   +------------------------------------------------------+
 742          *   63       48 47    32 31            20 19               0
 743          *
 744          * 82599+ Advanced Receive Descriptor (Read) Format
 745          *    63                                           1        0
 746          *    +-----------------------------------------------------+
 747          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 748          *    +----------------------------------------------+------+
 749          *  8 |       Header Buffer Address [63:1]           |  DD  |
 750          *    +-----------------------------------------------------+
 751          *
 752          *
 753          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 754          *
 755          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 756          *   +------------------------------------------------------+
 757          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 758          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 759          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 760          *   +------------------------------------------------------+
 761          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 762          *   +------------------------------------------------------+
 763          *   63       48 47    32 31          20 19                 0
 764          */
 765
 766         for (n = 0; n < adapter->num_rx_queues; n++) {
 767                 rx_ring = adapter->rx_ring[n];
 768                 pr_info("------------------------------------\n");
 769                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 770                 pr_info("------------------------------------\n");
 771                 pr_info("%s%s%s\n",
 772                         "R  [desc]      [ PktBuf     A0] ",
 773                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 774                         "<-- Adv Rx Read format");
 775                 pr_info("%s%s%s\n",
 776                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 777                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 778                         "<-- Adv Rx Write-Back format");
 779
 780                 for (i = 0; i < rx_ring->count; i++) {
 781                         const char *ring_desc;
 782
 783                         if (i == rx_ring->next_to_use)
 784                                 ring_desc = " NTU";
 785                         else if (i == rx_ring->next_to_clean)
 786                                 ring_desc = " NTC";
 787                         else
 788                                 ring_desc = "";
 789
 790                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 791                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 792                         u0 = (struct my_u0 *)rx_desc;
 793                         if (rx_desc->wb.upper.length) {
 794                                 /* Descriptor Done */
 795                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 796                                         i,
 797                                         le64_to_cpu((__force __le64)u0->a),
 798                                         le64_to_cpu((__force __le64)u0->b),
 799                                         rx_buffer_info->skb,
 800                                         ring_desc);
 801                         } else {
 802                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 803                                         i,
 804                                         le64_to_cpu((__force __le64)u0->a),
 805                                         le64_to_cpu((__force __le64)u0->b),
 806                                         (u64)rx_buffer_info->dma,
 807                                         rx_buffer_info->skb,
 808                                         ring_desc);
 809
 810                                 if (netif_msg_pktdata(adapter) &&
 811                                     rx_buffer_info->dma) {
 812                                         print_hex_dump(KERN_INFO, "",
 813                                            DUMP_PREFIX_ADDRESS, 16, 1,
 814                                            page_address(rx_buffer_info->page) +
 815                                                     rx_buffer_info->page_offset,
 816                                            ixgbe_rx_bufsz(rx_ring), true);
 817                                 }
 818                         }
 819                 }
 820         }
 821 }
 822
 823 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 824 {
 825         u32 ctrl_ext;
 826
 827         /* Let firmware take over control of h/w */
 828         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 829         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 830                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 831 }
 832
 833 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 834 {
 835         u32 ctrl_ext;
 836
 837         /* Let firmware know the driver has taken over */
 838         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 839         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 840                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 841 }
 842
 843 /**
 844  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 845  * @adapter: pointer to adapter struct
 846  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 847  * @queue: queue to map the corresponding interrupt to
 848  * @msix_vector: the vector to map to the corresponding queue
 849  *
 850  */
 851 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 852                            u8 queue, u8 msix_vector)
 853 {
 854         u32 ivar, index;
 855         struct ixgbe_hw *hw = &adapter->hw;
 856         switch (hw->mac.type) {
 857         case ixgbe_mac_82598EB:
 858                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 859                 if (direction == -1)
 860                         direction = 0;
 861                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 862                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 863                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 864                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 865                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 866                 break;
 867         case ixgbe_mac_82599EB:
 868         case ixgbe_mac_X540:
 869         case ixgbe_mac_X550:
 870         case ixgbe_mac_X550EM_x:
 871         case ixgbe_mac_x550em_a:
 872                 if (direction == -1) {
 873                         /* other causes */
 874                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 875                         index = ((queue & 1) * 8);
 876                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 877                         ivar &= ~(0xFF << index);
 878                         ivar |= (msix_vector << index);
 879                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 880                         break;
 881                 } else {
 882                         /* tx or rx causes */
 883                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 884                         index = ((16 * (queue & 1)) + (8 * direction));
 885                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 886                         ivar &= ~(0xFF << index);
 887                         ivar |= (msix_vector << index);
 888                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 889                         break;
 890                 }
 891         default:
 892                 break;
 893         }
 894 }
 895
 896 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 897                                           u64 qmask)
 898 {
 899         u32 mask;
 900
 901         switch (adapter->hw.mac.type) {
 902         case ixgbe_mac_82598EB:
 903                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 904                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 905                 break;
 906         case ixgbe_mac_82599EB:
 907         case ixgbe_mac_X540:
 908         case ixgbe_mac_X550:
 909         case ixgbe_mac_X550EM_x:
 910         case ixgbe_mac_x550em_a:
 911                 mask = (qmask & 0xFFFFFFFF);
 912                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 913                 mask = (qmask >> 32);
 914                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 915                 break;
 916         default:
 917                 break;
 918         }
 919 }
 920
 921 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 922 {
 923         struct ixgbe_hw *hw = &adapter->hw;
 924         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 925         int i;
 926         u32 data;
 927
 928         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 929             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 930                 return;
 931
 932         switch (hw->mac.type) {
 933         case ixgbe_mac_82598EB:
 934                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 935                 break;
 936         default:
 937                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 938         }
 939         hwstats->lxoffrxc += data;
 940
 941         /* refill credits (no tx hang) if we received xoff */
 942         if (!data)
 943                 return;
 944
 945         for (i = 0; i < adapter->num_tx_queues; i++)
 946                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 947                           &adapter->tx_ring[i]->state);
 948
 949         for (i = 0; i < adapter->num_xdp_queues; i++)
 950                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 951                           &adapter->xdp_ring[i]->state);
 952 }
 953
 954 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 955 {
 956         struct ixgbe_hw *hw = &adapter->hw;
 957         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 958         u32 xoff[8] = {0};
 959         u8 tc;
 960         int i;
 961         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 962
 963         if (adapter->ixgbe_ieee_pfc)
 964                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 965
 966         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 967                 ixgbe_update_xoff_rx_lfc(adapter);
 968                 return;
 969         }
 970
 971         /* update stats for each tc, only valid with PFC enabled */
 972         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 973                 u32 pxoffrxc;
 974
 975                 switch (hw->mac.type) {
 976                 case ixgbe_mac_82598EB:
 977                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 978                         break;
 979                 default:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 981                 }
 982                 hwstats->pxoffrxc[i] += pxoffrxc;
 983                 /* Get the TC for given UP */
 984                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 985                 xoff[tc] += pxoffrxc;
 986         }
 987
 988         /* disarm tx queues that have received xoff frames */
 989         for (i = 0; i < adapter->num_tx_queues; i++) {
 990                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 991
 992                 tc = tx_ring->dcb_tc;
 993                 if (xoff[tc])
 994                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 995         }
 996
 997         for (i = 0; i < adapter->num_xdp_queues; i++) {
 998                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
 999
1000                 tc = xdp_ring->dcb_tc;
1001                 if (xoff[tc])
1002                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1003         }
1004 }
1005
1006 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1007 {
1008         return ring->stats.packets;
1009 }
1010
1011 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1012 {
1013         unsigned int head, tail;
1014
1015         head = ring->next_to_clean;
1016         tail = ring->next_to_use;
1017
1018         return ((head <= tail) ? tail : tail + ring->count) - head;
1019 }
1020
1021 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1022 {
1023         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1024         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1025         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1026
1027         clear_check_for_tx_hang(tx_ring);
1028
1029         /*
1030          * Check for a hung queue, but be thorough. This verifies
1031          * that a transmit has been completed since the previous
1032          * check AND there is at least one packet pending. The
1033          * ARMED bit is set to indicate a potential hang. The
1034          * bit is cleared if a pause frame is received to remove
1035          * false hang detection due to PFC or 802.3x frames. By
1036          * requiring this to fail twice we avoid races with
1037          * pfc clearing the ARMED bit and conditions where we
1038          * run the check_tx_hang logic with a transmit completion
1039          * pending but without time to complete it yet.
1040          */
1041         if (tx_done_old == tx_done && tx_pending)
1042                 /* make sure it is true for two checks in a row */
1043                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1044                                         &tx_ring->state);
1045         /* update completed stats and continue */
1046         tx_ring->tx_stats.tx_done_old = tx_done;
1047         /* reset the countdown */
1048         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1049
1050         return false;
1051 }
1052
1053 /**
1054  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1055  * @adapter: driver private struct
1056  **/
1057 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1058 {
1059
1060         /* Do the reset outside of interrupt context */
1061         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1062                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1063                 e_warn(drv, "initiating reset due to tx timeout\n");
1064                 ixgbe_service_event_schedule(adapter);
1065         }
1066 }
1067
1068 /**
1069  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1070  * @netdev: network interface device structure
1071  * @queue_index: Tx queue to set
1072  * @maxrate: desired maximum transmit bitrate
1073  **/
1074 static int ixgbe_tx_maxrate(struct net_device *netdev,
1075                             int queue_index, u32 maxrate)
1076 {
1077         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1078         struct ixgbe_hw *hw = &adapter->hw;
1079         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1080
1081         if (!maxrate)
1082                 return 0;
1083
1084         /* Calculate the rate factor values to set */
1085         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1086         bcnrc_val /= maxrate;
1087
1088         /* clear everything but the rate factor */
1089         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1090         IXGBE_RTTBCNRC_RF_DEC_MASK;
1091
1092         /* enable the rate scheduler */
1093         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1094
1095         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1096         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1097
1098         return 0;
1099 }
1100
1101 /**
1102  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1103  * @q_vector: structure containing interrupt and ring information
1104  * @tx_ring: tx ring to clean
1105  * @napi_budget: Used to determine if we are in netpoll
1106  **/
1107 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1108                                struct ixgbe_ring *tx_ring, int napi_budget)
1109 {
1110         struct ixgbe_adapter *adapter = q_vector->adapter;
1111         struct ixgbe_tx_buffer *tx_buffer;
1112         union ixgbe_adv_tx_desc *tx_desc;
1113         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1114         unsigned int budget = q_vector->tx.work_limit;
1115         unsigned int i = tx_ring->next_to_clean;
1116
1117         if (test_bit(__IXGBE_DOWN, &adapter->state))
1118                 return true;
1119
1120         tx_buffer = &tx_ring->tx_buffer_info[i];
1121         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1122         i -= tx_ring->count;
1123
1124         do {
1125                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1126
1127                 /* if next_to_watch is not set then there is no work pending */
1128                 if (!eop_desc)
1129                         break;
1130
1131                 /* prevent any other reads prior to eop_desc */
1132                 smp_rmb();
1133
1134                 /* if DD is not set pending work has not been completed */
1135                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1136                         break;
1137
1138                 /* clear next_to_watch to prevent false hangs */
1139                 tx_buffer->next_to_watch = NULL;
1140
1141                 /* update the statistics for this packet */
1142                 total_bytes += tx_buffer->bytecount;
1143                 total_packets += tx_buffer->gso_segs;
1144                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1145                         total_ipsec++;
1146
1147                 /* free the skb */
1148                 if (ring_is_xdp(tx_ring))
1149                         xdp_return_frame(tx_buffer->xdpf);
1150                 else
1151                         napi_consume_skb(tx_buffer->skb, napi_budget);
1152
1153                 /* unmap skb header data */
1154                 dma_unmap_single(tx_ring->dev,
1155                                  dma_unmap_addr(tx_buffer, dma),
1156                                  dma_unmap_len(tx_buffer, len),
1157                                  DMA_TO_DEVICE);
1158
1159                 /* clear tx_buffer data */
1160                 dma_unmap_len_set(tx_buffer, len, 0);
1161
1162                 /* unmap remaining buffers */
1163                 while (tx_desc != eop_desc) {
1164                         tx_buffer++;
1165                         tx_desc++;
1166                         i++;
1167                         if (unlikely(!i)) {
1168                                 i -= tx_ring->count;
1169                                 tx_buffer = tx_ring->tx_buffer_info;
1170                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1171                         }
1172
1173                         /* unmap any remaining paged data */
1174                         if (dma_unmap_len(tx_buffer, len)) {
1175                                 dma_unmap_page(tx_ring->dev,
1176                                                dma_unmap_addr(tx_buffer, dma),
1177                                                dma_unmap_len(tx_buffer, len),
1178                                                DMA_TO_DEVICE);
1179                                 dma_unmap_len_set(tx_buffer, len, 0);
1180                         }
1181                 }
1182
1183                 /* move us one more past the eop_desc for start of next pkt */
1184                 tx_buffer++;
1185                 tx_desc++;
1186                 i++;
1187                 if (unlikely(!i)) {
1188                         i -= tx_ring->count;
1189                         tx_buffer = tx_ring->tx_buffer_info;
1190                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1191                 }
1192
1193                 /* issue prefetch for next Tx descriptor */
1194                 prefetch(tx_desc);
1195
1196                 /* update budget accounting */
1197                 budget--;
1198         } while (likely(budget));
1199
1200         i += tx_ring->count;
1201         tx_ring->next_to_clean = i;
1202         u64_stats_update_begin(&tx_ring->syncp);
1203         tx_ring->stats.bytes += total_bytes;
1204         tx_ring->stats.packets += total_packets;
1205         u64_stats_update_end(&tx_ring->syncp);
1206         q_vector->tx.total_bytes += total_bytes;
1207         q_vector->tx.total_packets += total_packets;
1208         adapter->tx_ipsec += total_ipsec;
1209
1210         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1211                 /* schedule immediate reset if we believe we hung */
1212                 struct ixgbe_hw *hw = &adapter->hw;
1213                 e_err(drv, "Detected Tx Unit Hang %s\n"
1214                         "  Tx Queue             <%d>\n"
1215                         "  TDH, TDT             <%x>, <%x>\n"
1216                         "  next_to_use          <%x>\n"
1217                         "  next_to_clean        <%x>\n"
1218                         "tx_buffer_info[next_to_clean]\n"
1219                         "  time_stamp           <%lx>\n"
1220                         "  jiffies              <%lx>\n",
1221                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1222                         tx_ring->queue_index,
1223                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1224                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1225                         tx_ring->next_to_use, i,
1226                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1227
1228                 if (!ring_is_xdp(tx_ring))
1229                         netif_stop_subqueue(tx_ring->netdev,
1230                                             tx_ring->queue_index);
1231
1232                 e_info(probe,
1233                        "tx hang %d detected on queue %d, resetting adapter\n",
1234                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1235
1236                 /* schedule immediate reset if we believe we hung */
1237                 ixgbe_tx_timeout_reset(adapter);
1238
1239                 /* the adapter is about to reset, no point in enabling stuff */
1240                 return true;
1241         }
1242
1243         if (ring_is_xdp(tx_ring))
1244                 return !!budget;
1245
1246         netdev_tx_completed_queue(txring_txq(tx_ring),
1247                                   total_packets, total_bytes);
1248
1249 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1250         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1251                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1252                 /* Make sure that anybody stopping the queue after this
1253                  * sees the new next_to_clean.
1254                  */
1255                 smp_mb();
1256                 if (__netif_subqueue_stopped(tx_ring->netdev,
1257                                              tx_ring->queue_index)
1258                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1259                         netif_wake_subqueue(tx_ring->netdev,
1260                                             tx_ring->queue_index);
1261                         ++tx_ring->tx_stats.restart_queue;
1262                 }
1263         }
1264
1265         return !!budget;
1266 }
1267
1268 #ifdef CONFIG_IXGBE_DCA
1269 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1270                                 struct ixgbe_ring *tx_ring,
1271                                 int cpu)
1272 {
1273         struct ixgbe_hw *hw = &adapter->hw;
1274         u32 txctrl = 0;
1275         u16 reg_offset;
1276
1277         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1278                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1279
1280         switch (hw->mac.type) {
1281         case ixgbe_mac_82598EB:
1282                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1283                 break;
1284         case ixgbe_mac_82599EB:
1285         case ixgbe_mac_X540:
1286                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1287                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1288                 break;
1289         default:
1290                 /* for unknown hardware do not write register */
1291                 return;
1292         }
1293
1294         /*
1295          * We can enable relaxed ordering for reads, but not writes when
1296          * DCA is enabled.  This is due to a known issue in some chipsets
1297          * which will cause the DCA tag to be cleared.
1298          */
1299         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1300                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1301                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1302
1303         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1304 }
1305
1306 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1307                                 struct ixgbe_ring *rx_ring,
1308                                 int cpu)
1309 {
1310         struct ixgbe_hw *hw = &adapter->hw;
1311         u32 rxctrl = 0;
1312         u8 reg_idx = rx_ring->reg_idx;
1313
1314         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1315                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1316
1317         switch (hw->mac.type) {
1318         case ixgbe_mac_82599EB:
1319         case ixgbe_mac_X540:
1320                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1321                 break;
1322         default:
1323                 break;
1324         }
1325
1326         /*
1327          * We can enable relaxed ordering for reads, but not writes when
1328          * DCA is enabled.  This is due to a known issue in some chipsets
1329          * which will cause the DCA tag to be cleared.
1330          */
1331         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1332                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1333                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1334
1335         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1336 }
1337
1338 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1339 {
1340         struct ixgbe_adapter *adapter = q_vector->adapter;
1341         struct ixgbe_ring *ring;
1342         int cpu = get_cpu();
1343
1344         if (q_vector->cpu == cpu)
1345                 goto out_no_update;
1346
1347         ixgbe_for_each_ring(ring, q_vector->tx)
1348                 ixgbe_update_tx_dca(adapter, ring, cpu);
1349
1350         ixgbe_for_each_ring(ring, q_vector->rx)
1351                 ixgbe_update_rx_dca(adapter, ring, cpu);
1352
1353         q_vector->cpu = cpu;
1354 out_no_update:
1355         put_cpu();
1356 }
1357
1358 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1359 {
1360         int i;
1361
1362         /* always use CB2 mode, difference is masked in the CB driver */
1363         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1364                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1365                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1366         else
1367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1369
1370         for (i = 0; i < adapter->num_q_vectors; i++) {
1371                 adapter->q_vector[i]->cpu = -1;
1372                 ixgbe_update_dca(adapter->q_vector[i]);
1373         }
1374 }
1375
1376 static int __ixgbe_notify_dca(struct device *dev, void *data)
1377 {
1378         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1379         unsigned long event = *(unsigned long *)data;
1380
1381         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1382                 return 0;
1383
1384         switch (event) {
1385         case DCA_PROVIDER_ADD:
1386                 /* if we're already enabled, don't do it again */
1387                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1388                         break;
1389                 if (dca_add_requester(dev) == 0) {
1390                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1391                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1392                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1393                         break;
1394                 }
1395                 /* fall through - DCA is disabled. */
1396         case DCA_PROVIDER_REMOVE:
1397                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1398                         dca_remove_requester(dev);
1399                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1400                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1401                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1402                 }
1403                 break;
1404         }
1405
1406         return 0;
1407 }
1408
1409 #endif /* CONFIG_IXGBE_DCA */
1410
1411 #define IXGBE_RSS_L4_TYPES_MASK \
1412         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1413          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1414          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1415          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1416
1417 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1418                                  union ixgbe_adv_rx_desc *rx_desc,
1419                                  struct sk_buff *skb)
1420 {
1421         u16 rss_type;
1422
1423         if (!(ring->netdev->features & NETIF_F_RXHASH))
1424                 return;
1425
1426         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1427                    IXGBE_RXDADV_RSSTYPE_MASK;
1428
1429         if (!rss_type)
1430                 return;
1431
1432         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1433                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1434                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1435 }
1436
1437 #ifdef IXGBE_FCOE
1438 /**
1439  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1440  * @ring: structure containing ring specific data
1441  * @rx_desc: advanced rx descriptor
1442  *
1443  * Returns : true if it is FCoE pkt
1444  */
1445 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1446                                     union ixgbe_adv_rx_desc *rx_desc)
1447 {
1448         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1449
1450         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1451                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1452                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1453                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1454 }
1455
1456 #endif /* IXGBE_FCOE */
1457 /**
1458  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1459  * @ring: structure containing ring specific data
1460  * @rx_desc: current Rx descriptor being processed
1461  * @skb: skb currently being received and modified
1462  **/
1463 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1464                                      union ixgbe_adv_rx_desc *rx_desc,
1465                                      struct sk_buff *skb)
1466 {
1467         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1468         bool encap_pkt = false;
1469
1470         skb_checksum_none_assert(skb);
1471
1472         /* Rx csum disabled */
1473         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1474                 return;
1475
1476         /* check for VXLAN and Geneve packets */
1477         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1478                 encap_pkt = true;
1479                 skb->encapsulation = 1;
1480         }
1481
1482         /* if IP and error */
1483         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1484             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1485                 ring->rx_stats.csum_err++;
1486                 return;
1487         }
1488
1489         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1490                 return;
1491
1492         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1493                 /*
1494                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1495                  * checksum errors.
1496                  */
1497                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1498                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1499                         return;
1500
1501                 ring->rx_stats.csum_err++;
1502                 return;
1503         }
1504
1505         /* It must be a TCP or UDP packet with a valid checksum */
1506         skb->ip_summed = CHECKSUM_UNNECESSARY;
1507         if (encap_pkt) {
1508                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1509                         return;
1510
1511                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1512                         skb->ip_summed = CHECKSUM_NONE;
1513                         return;
1514                 }
1515                 /* If we checked the outer header let the stack know */
1516                 skb->csum_level = 1;
1517         }
1518 }
1519
1520 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1521 {
1522         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1523 }
1524
1525 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1526                                     struct ixgbe_rx_buffer *bi)
1527 {
1528         struct page *page = bi->page;
1529         dma_addr_t dma;
1530
1531         /* since we are recycling buffers we should seldom need to alloc */
1532         if (likely(page))
1533                 return true;
1534
1535         /* alloc new page for storage */
1536         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1537         if (unlikely(!page)) {
1538                 rx_ring->rx_stats.alloc_rx_page_failed++;
1539                 return false;
1540         }
1541
1542         /* map page for use */
1543         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1544                                  ixgbe_rx_pg_size(rx_ring),
1545                                  DMA_FROM_DEVICE,
1546                                  IXGBE_RX_DMA_ATTR);
1547
1548         /*
1549          * if mapping failed free memory back to system since
1550          * there isn't much point in holding memory we can't use
1551          */
1552         if (dma_mapping_error(rx_ring->dev, dma)) {
1553                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1554
1555                 rx_ring->rx_stats.alloc_rx_page_failed++;
1556                 return false;
1557         }
1558
1559         bi->dma = dma;
1560         bi->page = page;
1561         bi->page_offset = ixgbe_rx_offset(rx_ring);
1562         page_ref_add(page, USHRT_MAX - 1);
1563         bi->pagecnt_bias = USHRT_MAX;
1564         rx_ring->rx_stats.alloc_rx_page++;
1565
1566         return true;
1567 }
1568
1569 /**
1570  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1571  * @rx_ring: ring to place buffers on
1572  * @cleaned_count: number of buffers to replace
1573  **/
1574 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1575 {
1576         union ixgbe_adv_rx_desc *rx_desc;
1577         struct ixgbe_rx_buffer *bi;
1578         u16 i = rx_ring->next_to_use;
1579         u16 bufsz;
1580
1581         /* nothing to do */
1582         if (!cleaned_count)
1583                 return;
1584
1585         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1586         bi = &rx_ring->rx_buffer_info[i];
1587         i -= rx_ring->count;
1588
1589         bufsz = ixgbe_rx_bufsz(rx_ring);
1590
1591         do {
1592                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1593                         break;
1594
1595                 /* sync the buffer for use by the device */
1596                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1597                                                  bi->page_offset, bufsz,
1598                                                  DMA_FROM_DEVICE);
1599
1600                 /*
1601                  * Refresh the desc even if buffer_addrs didn't change
1602                  * because each write-back erases this info.
1603                  */
1604                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1605
1606                 rx_desc++;
1607                 bi++;
1608                 i++;
1609                 if (unlikely(!i)) {
1610                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1611                         bi = rx_ring->rx_buffer_info;
1612                         i -= rx_ring->count;
1613                 }
1614
1615                 /* clear the length for the next_to_use descriptor */
1616                 rx_desc->wb.upper.length = 0;
1617
1618                 cleaned_count--;
1619         } while (cleaned_count);
1620
1621         i += rx_ring->count;
1622
1623         if (rx_ring->next_to_use != i) {
1624                 rx_ring->next_to_use = i;
1625
1626                 /* update next to alloc since we have filled the ring */
1627                 rx_ring->next_to_alloc = i;
1628
1629                 /* Force memory writes to complete before letting h/w
1630                  * know there are new descriptors to fetch.  (Only
1631                  * applicable for weak-ordered memory model archs,
1632                  * such as IA-64).
1633                  */
1634                 wmb();
1635                 writel(i, rx_ring->tail);
1636         }
1637 }
1638
1639 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1640                                    struct sk_buff *skb)
1641 {
1642         u16 hdr_len = skb_headlen(skb);
1643
1644         /* set gso_size to avoid messing up TCP MSS */
1645         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1646                                                  IXGBE_CB(skb)->append_cnt);
1647         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1648 }
1649
1650 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1651                                    struct sk_buff *skb)
1652 {
1653         /* if append_cnt is 0 then frame is not RSC */
1654         if (!IXGBE_CB(skb)->append_cnt)
1655                 return;
1656
1657         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1658         rx_ring->rx_stats.rsc_flush++;
1659
1660         ixgbe_set_rsc_gso_size(rx_ring, skb);
1661
1662         /* gso_size is computed using append_cnt so always clear it last */
1663         IXGBE_CB(skb)->append_cnt = 0;
1664 }
1665
1666 /**
1667  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1668  * @rx_ring: rx descriptor ring packet is being transacted on
1669  * @rx_desc: pointer to the EOP Rx descriptor
1670  * @skb: pointer to current skb being populated
1671  *
1672  * This function checks the ring, descriptor, and packet information in
1673  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1674  * other fields within the skb.
1675  **/
1676 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1677                                      union ixgbe_adv_rx_desc *rx_desc,
1678                                      struct sk_buff *skb)
1679 {
1680         struct net_device *dev = rx_ring->netdev;
1681         u32 flags = rx_ring->q_vector->adapter->flags;
1682
1683         ixgbe_update_rsc_stats(rx_ring, skb);
1684
1685         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1686
1687         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1688
1689         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1690                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1691
1692         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1693             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1694                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1695                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1696         }
1697
1698         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1699                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1700
1701         /* record Rx queue, or update MACVLAN statistics */
1702         if (netif_is_ixgbe(dev))
1703                 skb_record_rx_queue(skb, rx_ring->queue_index);
1704         else
1705                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1706                                  false);
1707
1708         skb->protocol = eth_type_trans(skb, dev);
1709 }
1710
1711 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1712                          struct sk_buff *skb)
1713 {
1714         napi_gro_receive(&q_vector->napi, skb);
1715 }
1716
1717 /**
1718  * ixgbe_is_non_eop - process handling of non-EOP buffers
1719  * @rx_ring: Rx ring being processed
1720  * @rx_desc: Rx descriptor for current buffer
1721  * @skb: Current socket buffer containing buffer in progress
1722  *
1723  * This function updates next to clean.  If the buffer is an EOP buffer
1724  * this function exits returning false, otherwise it will place the
1725  * sk_buff in the next buffer to be chained and return true indicating
1726  * that this is in fact a non-EOP buffer.
1727  **/
1728 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1729                              union ixgbe_adv_rx_desc *rx_desc,
1730                              struct sk_buff *skb)
1731 {
1732         u32 ntc = rx_ring->next_to_clean + 1;
1733
1734         /* fetch, update, and store next to clean */
1735         ntc = (ntc < rx_ring->count) ? ntc : 0;
1736         rx_ring->next_to_clean = ntc;
1737
1738         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1739
1740         /* update RSC append count if present */
1741         if (ring_is_rsc_enabled(rx_ring)) {
1742                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1743                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1744
1745                 if (unlikely(rsc_enabled)) {
1746                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1747
1748                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1749                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1750
1751                         /* update ntc based on RSC value */
1752                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1753                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1754                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1755                 }
1756         }
1757
1758         /* if we are the last buffer then there is nothing else to do */
1759         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1760                 return false;
1761
1762         /* place skb in next buffer to be received */
1763         rx_ring->rx_buffer_info[ntc].skb = skb;
1764         rx_ring->rx_stats.non_eop_descs++;
1765
1766         return true;
1767 }
1768
1769 /**
1770  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1771  * @rx_ring: rx descriptor ring packet is being transacted on
1772  * @skb: pointer to current skb being adjusted
1773  *
1774  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1775  * main difference between this version and the original function is that
1776  * this function can make several assumptions about the state of things
1777  * that allow for significant optimizations versus the standard function.
1778  * As a result we can do things like drop a frag and maintain an accurate
1779  * truesize for the skb.
1780  */
1781 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1782                             struct sk_buff *skb)
1783 {
1784         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1785         unsigned char *va;
1786         unsigned int pull_len;
1787
1788         /*
1789          * it is valid to use page_address instead of kmap since we are
1790          * working with pages allocated out of the lomem pool per
1791          * alloc_page(GFP_ATOMIC)
1792          */
1793         va = skb_frag_address(frag);
1794
1795         /*
1796          * we need the header to contain the greater of either ETH_HLEN or
1797          * 60 bytes if the skb->len is less than 60 for skb_pad.
1798          */
1799         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1800
1801         /* align pull length to size of long to optimize memcpy performance */
1802         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1803
1804         /* update all of the pointers */
1805         skb_frag_size_sub(frag, pull_len);
1806         frag->page_offset += pull_len;
1807         skb->data_len -= pull_len;
1808         skb->tail += pull_len;
1809 }
1810
1811 /**
1812  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1813  * @rx_ring: rx descriptor ring packet is being transacted on
1814  * @skb: pointer to current skb being updated
1815  *
1816  * This function provides a basic DMA sync up for the first fragment of an
1817  * skb.  The reason for doing this is that the first fragment cannot be
1818  * unmapped until we have reached the end of packet descriptor for a buffer
1819  * chain.
1820  */
1821 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1822                                 struct sk_buff *skb)
1823 {
1824         /* if the page was released unmap it, else just sync our portion */
1825         if (unlikely(IXGBE_CB(skb)->page_released)) {
1826                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1827                                      ixgbe_rx_pg_size(rx_ring),
1828                                      DMA_FROM_DEVICE,
1829                                      IXGBE_RX_DMA_ATTR);
1830         } else if (ring_uses_build_skb(rx_ring)) {
1831                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1832
1833                 dma_sync_single_range_for_cpu(rx_ring->dev,
1834                                               IXGBE_CB(skb)->dma,
1835                                               offset,
1836                                               skb_headlen(skb),
1837                                               DMA_FROM_DEVICE);
1838         } else {
1839                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1840
1841                 dma_sync_single_range_for_cpu(rx_ring->dev,
1842                                               IXGBE_CB(skb)->dma,
1843                                               frag->page_offset,
1844                                               skb_frag_size(frag),
1845                                               DMA_FROM_DEVICE);
1846         }
1847 }
1848
1849 /**
1850  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1851  * @rx_ring: rx descriptor ring packet is being transacted on
1852  * @rx_desc: pointer to the EOP Rx descriptor
1853  * @skb: pointer to current skb being fixed
1854  *
1855  * Check if the skb is valid in the XDP case it will be an error pointer.
1856  * Return true in this case to abort processing and advance to next
1857  * descriptor.
1858  *
1859  * Check for corrupted packet headers caused by senders on the local L2
1860  * embedded NIC switch not setting up their Tx Descriptors right.  These
1861  * should be very rare.
1862  *
1863  * Also address the case where we are pulling data in on pages only
1864  * and as such no data is present in the skb header.
1865  *
1866  * In addition if skb is not at least 60 bytes we need to pad it so that
1867  * it is large enough to qualify as a valid Ethernet frame.
1868  *
1869  * Returns true if an error was encountered and skb was freed.
1870  **/
1871 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1872                                   union ixgbe_adv_rx_desc *rx_desc,
1873                                   struct sk_buff *skb)
1874 {
1875         struct net_device *netdev = rx_ring->netdev;
1876
1877         /* XDP packets use error pointer so abort at this point */
1878         if (IS_ERR(skb))
1879                 return true;
1880
1881         /* Verify netdev is present, and that packet does not have any
1882          * errors that would be unacceptable to the netdev.
1883          */
1884         if (!netdev ||
1885             (unlikely(ixgbe_test_staterr(rx_desc,
1886                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1887              !(netdev->features & NETIF_F_RXALL)))) {
1888                 dev_kfree_skb_any(skb);
1889                 return true;
1890         }
1891
1892         /* place header in linear portion of buffer */
1893         if (!skb_headlen(skb))
1894                 ixgbe_pull_tail(rx_ring, skb);
1895
1896 #ifdef IXGBE_FCOE
1897         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1898         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1899                 return false;
1900
1901 #endif
1902         /* if eth_skb_pad returns an error the skb was freed */
1903         if (eth_skb_pad(skb))
1904                 return true;
1905
1906         return false;
1907 }
1908
1909 /**
1910  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1911  * @rx_ring: rx descriptor ring to store buffers on
1912  * @old_buff: donor buffer to have page reused
1913  *
1914  * Synchronizes page for reuse by the adapter
1915  **/
1916 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1917                                 struct ixgbe_rx_buffer *old_buff)
1918 {
1919         struct ixgbe_rx_buffer *new_buff;
1920         u16 nta = rx_ring->next_to_alloc;
1921
1922         new_buff = &rx_ring->rx_buffer_info[nta];
1923
1924         /* update, and store next to alloc */
1925         nta++;
1926         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1927
1928         /* Transfer page from old buffer to new buffer.
1929          * Move each member individually to avoid possible store
1930          * forwarding stalls and unnecessary copy of skb.
1931          */
1932         new_buff->dma           = old_buff->dma;
1933         new_buff->page          = old_buff->page;
1934         new_buff->page_offset   = old_buff->page_offset;
1935         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1936 }
1937
1938 static inline bool ixgbe_page_is_reserved(struct page *page)
1939 {
1940         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1941 }
1942
1943 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1944 {
1945         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1946         struct page *page = rx_buffer->page;
1947
1948         /* avoid re-using remote pages */
1949         if (unlikely(ixgbe_page_is_reserved(page)))
1950                 return false;
1951
1952 #if (PAGE_SIZE < 8192)
1953         /* if we are only owner of page we can reuse it */
1954         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1955                 return false;
1956 #else
1957         /* The last offset is a bit aggressive in that we assume the
1958          * worst case of FCoE being enabled and using a 3K buffer.
1959          * However this should have minimal impact as the 1K extra is
1960          * still less than one buffer in size.
1961          */
1962 #define IXGBE_LAST_OFFSET \
1963         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1964         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1965                 return false;
1966 #endif
1967
1968         /* If we have drained the page fragment pool we need to update
1969          * the pagecnt_bias and page count so that we fully restock the
1970          * number of references the driver holds.
1971          */
1972         if (unlikely(pagecnt_bias == 1)) {
1973                 page_ref_add(page, USHRT_MAX - 1);
1974                 rx_buffer->pagecnt_bias = USHRT_MAX;
1975         }
1976
1977         return true;
1978 }
1979
1980 /**
1981  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1982  * @rx_ring: rx descriptor ring to transact packets on
1983  * @rx_buffer: buffer containing page to add
1984  * @skb: sk_buff to place the data into
1985  * @size: size of data in rx_buffer
1986  *
1987  * This function will add the data contained in rx_buffer->page to the skb.
1988  * This is done either through a direct copy if the data in the buffer is
1989  * less than the skb header size, otherwise it will just attach the page as
1990  * a frag to the skb.
1991  *
1992  * The function will then update the page offset if necessary and return
1993  * true if the buffer can be reused by the adapter.
1994  **/
1995 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1996                               struct ixgbe_rx_buffer *rx_buffer,
1997                               struct sk_buff *skb,
1998                               unsigned int size)
1999 {
2000 #if (PAGE_SIZE < 8192)
2001         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2002 #else
2003         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2004                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2005                                 SKB_DATA_ALIGN(size);
2006 #endif
2007         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2008                         rx_buffer->page_offset, size, truesize);
2009 #if (PAGE_SIZE < 8192)
2010         rx_buffer->page_offset ^= truesize;
2011 #else
2012         rx_buffer->page_offset += truesize;
2013 #endif
2014 }
2015
2016 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2017                                                    union ixgbe_adv_rx_desc *rx_desc,
2018                                                    struct sk_buff **skb,
2019                                                    const unsigned int size)
2020 {
2021         struct ixgbe_rx_buffer *rx_buffer;
2022
2023         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2024         prefetchw(rx_buffer->page);
2025         *skb = rx_buffer->skb;
2026
2027         /* Delay unmapping of the first packet. It carries the header
2028          * information, HW may still access the header after the writeback.
2029          * Only unmap it when EOP is reached
2030          */
2031         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2032                 if (!*skb)
2033                         goto skip_sync;
2034         } else {
2035                 if (*skb)
2036                         ixgbe_dma_sync_frag(rx_ring, *skb);
2037         }
2038
2039         /* we are reusing so sync this buffer for CPU use */
2040         dma_sync_single_range_for_cpu(rx_ring->dev,
2041                                       rx_buffer->dma,
2042                                       rx_buffer->page_offset,
2043                                       size,
2044                                       DMA_FROM_DEVICE);
2045 skip_sync:
2046         rx_buffer->pagecnt_bias--;
2047
2048         return rx_buffer;
2049 }
2050
2051 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2052                                 struct ixgbe_rx_buffer *rx_buffer,
2053                                 struct sk_buff *skb)
2054 {
2055         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2056                 /* hand second half of page back to the ring */
2057                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2058         } else {
2059                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2060                         /* the page has been released from the ring */
2061                         IXGBE_CB(skb)->page_released = true;
2062                 } else {
2063                         /* we are not reusing the buffer so unmap it */
2064                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2065                                              ixgbe_rx_pg_size(rx_ring),
2066                                              DMA_FROM_DEVICE,
2067                                              IXGBE_RX_DMA_ATTR);
2068                 }
2069                 __page_frag_cache_drain(rx_buffer->page,
2070                                         rx_buffer->pagecnt_bias);
2071         }
2072
2073         /* clear contents of rx_buffer */
2074         rx_buffer->page = NULL;
2075         rx_buffer->skb = NULL;
2076 }
2077
2078 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2079                                            struct ixgbe_rx_buffer *rx_buffer,
2080                                            struct xdp_buff *xdp,
2081                                            union ixgbe_adv_rx_desc *rx_desc)
2082 {
2083         unsigned int size = xdp->data_end - xdp->data;
2084 #if (PAGE_SIZE < 8192)
2085         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2086 #else
2087         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2088                                                xdp->data_hard_start);
2089 #endif
2090         struct sk_buff *skb;
2091
2092         /* prefetch first cache line of first page */
2093         prefetch(xdp->data);
2094 #if L1_CACHE_BYTES < 128
2095         prefetch(xdp->data + L1_CACHE_BYTES);
2096 #endif
2097         /* Note, we get here by enabling legacy-rx via:
2098          *
2099          *    ethtool --set-priv-flags <dev> legacy-rx on
2100          *
2101          * In this mode, we currently get 0 extra XDP headroom as
2102          * opposed to having legacy-rx off, where we process XDP
2103          * packets going to stack via ixgbe_build_skb(). The latter
2104          * provides us currently with 192 bytes of headroom.
2105          *
2106          * For ixgbe_construct_skb() mode it means that the
2107          * xdp->data_meta will always point to xdp->data, since
2108          * the helper cannot expand the head. Should this ever
2109          * change in future for legacy-rx mode on, then lets also
2110          * add xdp->data_meta handling here.
2111          */
2112
2113         /* allocate a skb to store the frags */
2114         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2115         if (unlikely(!skb))
2116                 return NULL;
2117
2118         if (size > IXGBE_RX_HDR_SIZE) {
2119                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2120                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2121
2122                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2123                                 xdp->data - page_address(rx_buffer->page),
2124                                 size, truesize);
2125 #if (PAGE_SIZE < 8192)
2126                 rx_buffer->page_offset ^= truesize;
2127 #else
2128                 rx_buffer->page_offset += truesize;
2129 #endif
2130         } else {
2131                 memcpy(__skb_put(skb, size),
2132                        xdp->data, ALIGN(size, sizeof(long)));
2133                 rx_buffer->pagecnt_bias++;
2134         }
2135
2136         return skb;
2137 }
2138
2139 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2140                                        struct ixgbe_rx_buffer *rx_buffer,
2141                                        struct xdp_buff *xdp,
2142                                        union ixgbe_adv_rx_desc *rx_desc)
2143 {
2144         unsigned int metasize = xdp->data - xdp->data_meta;
2145 #if (PAGE_SIZE < 8192)
2146         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2147 #else
2148         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2149                                 SKB_DATA_ALIGN(xdp->data_end -
2150                                                xdp->data_hard_start);
2151 #endif
2152         struct sk_buff *skb;
2153
2154         /* Prefetch first cache line of first page. If xdp->data_meta
2155          * is unused, this points extactly as xdp->data, otherwise we
2156          * likely have a consumer accessing first few bytes of meta
2157          * data, and then actual data.
2158          */
2159         prefetch(xdp->data_meta);
2160 #if L1_CACHE_BYTES < 128
2161         prefetch(xdp->data_meta + L1_CACHE_BYTES);
2162 #endif
2163
2164         /* build an skb to around the page buffer */
2165         skb = build_skb(xdp->data_hard_start, truesize);
2166         if (unlikely(!skb))
2167                 return NULL;
2168
2169         /* update pointers within the skb to store the data */
2170         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2171         __skb_put(skb, xdp->data_end - xdp->data);
2172         if (metasize)
2173                 skb_metadata_set(skb, metasize);
2174
2175         /* record DMA address if this is the start of a chain of buffers */
2176         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2177                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2178
2179         /* update buffer offset */
2180 #if (PAGE_SIZE < 8192)
2181         rx_buffer->page_offset ^= truesize;
2182 #else
2183         rx_buffer->page_offset += truesize;
2184 #endif
2185
2186         return skb;
2187 }
2188
2189 #define IXGBE_XDP_PASS          0
2190 #define IXGBE_XDP_CONSUMED      BIT(0)
2191 #define IXGBE_XDP_TX            BIT(1)
2192 #define IXGBE_XDP_REDIR         BIT(2)
2193
2194 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2195                                struct xdp_frame *xdpf);
2196
2197 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2198                                      struct ixgbe_ring *rx_ring,
2199                                      struct xdp_buff *xdp)
2200 {
2201         int err, result = IXGBE_XDP_PASS;
2202         struct bpf_prog *xdp_prog;
2203         struct xdp_frame *xdpf;
2204         u32 act;
2205
2206         rcu_read_lock();
2207         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2208
2209         if (!xdp_prog)
2210                 goto xdp_out;
2211
2212         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2213
2214         act = bpf_prog_run_xdp(xdp_prog, xdp);
2215         switch (act) {
2216         case XDP_PASS:
2217                 break;
2218         case XDP_TX:
2219                 xdpf = convert_to_xdp_frame(xdp);
2220                 if (unlikely(!xdpf)) {
2221                         result = IXGBE_XDP_CONSUMED;
2222                         break;
2223                 }
2224                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2225                 break;
2226         case XDP_REDIRECT:
2227                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2228                 if (!err)
2229                         result = IXGBE_XDP_REDIR;
2230                 else
2231                         result = IXGBE_XDP_CONSUMED;
2232                 break;
2233         default:
2234                 bpf_warn_invalid_xdp_action(act);
2235                 /* fallthrough */
2236         case XDP_ABORTED:
2237                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2238                 /* fallthrough -- handle aborts by dropping packet */
2239         case XDP_DROP:
2240                 result = IXGBE_XDP_CONSUMED;
2241                 break;
2242         }
2243 xdp_out:
2244         rcu_read_unlock();
2245         return ERR_PTR(-result);
2246 }
2247
2248 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2249                                  struct ixgbe_rx_buffer *rx_buffer,
2250                                  unsigned int size)
2251 {
2252 #if (PAGE_SIZE < 8192)
2253         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2254
2255         rx_buffer->page_offset ^= truesize;
2256 #else
2257         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2258                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2259                                 SKB_DATA_ALIGN(size);
2260
2261         rx_buffer->page_offset += truesize;
2262 #endif
2263 }
2264
2265 /**
2266  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2267  * @q_vector: structure containing interrupt and ring information
2268  * @rx_ring: rx descriptor ring to transact packets on
2269  * @budget: Total limit on number of packets to process
2270  *
2271  * This function provides a "bounce buffer" approach to Rx interrupt
2272  * processing.  The advantage to this is that on systems that have
2273  * expensive overhead for IOMMU access this provides a means of avoiding
2274  * it by maintaining the mapping of the page to the syste.
2275  *
2276  * Returns amount of work completed
2277  **/
2278 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2279                                struct ixgbe_ring *rx_ring,
2280                                const int budget)
2281 {
2282         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2283         struct ixgbe_adapter *adapter = q_vector->adapter;
2284 #ifdef IXGBE_FCOE
2285         int ddp_bytes;
2286         unsigned int mss = 0;
2287 #endif /* IXGBE_FCOE */
2288         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2289         unsigned int xdp_xmit = 0;
2290         struct xdp_buff xdp;
2291
2292         xdp.rxq = &rx_ring->xdp_rxq;
2293
2294         while (likely(total_rx_packets < budget)) {
2295                 union ixgbe_adv_rx_desc *rx_desc;
2296                 struct ixgbe_rx_buffer *rx_buffer;
2297                 struct sk_buff *skb;
2298                 unsigned int size;
2299
2300                 /* return some buffers to hardware, one at a time is too slow */
2301                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2302                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2303                         cleaned_count = 0;
2304                 }
2305
2306                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2307                 size = le16_to_cpu(rx_desc->wb.upper.length);
2308                 if (!size)
2309                         break;
2310
2311                 /* This memory barrier is needed to keep us from reading
2312                  * any other fields out of the rx_desc until we know the
2313                  * descriptor has been written back
2314                  */
2315                 dma_rmb();
2316
2317                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2318
2319                 /* retrieve a buffer from the ring */
2320                 if (!skb) {
2321                         xdp.data = page_address(rx_buffer->page) +
2322                                    rx_buffer->page_offset;
2323                         xdp.data_meta = xdp.data;
2324                         xdp.data_hard_start = xdp.data -
2325                                               ixgbe_rx_offset(rx_ring);
2326                         xdp.data_end = xdp.data + size;
2327
2328                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2329                 }
2330
2331                 if (IS_ERR(skb)) {
2332                         unsigned int xdp_res = -PTR_ERR(skb);
2333
2334                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2335                                 xdp_xmit |= xdp_res;
2336                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2337                         } else {
2338                                 rx_buffer->pagecnt_bias++;
2339                         }
2340                         total_rx_packets++;
2341                         total_rx_bytes += size;
2342                 } else if (skb) {
2343                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2344                 } else if (ring_uses_build_skb(rx_ring)) {
2345                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2346                                               &xdp, rx_desc);
2347                 } else {
2348                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2349                                                   &xdp, rx_desc);
2350                 }
2351
2352                 /* exit if we failed to retrieve a buffer */
2353                 if (!skb) {
2354                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2355                         rx_buffer->pagecnt_bias++;
2356                         break;
2357                 }
2358
2359                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2360                 cleaned_count++;
2361
2362                 /* place incomplete frames back on ring for completion */
2363                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2364                         continue;
2365
2366                 /* verify the packet layout is correct */
2367                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2368                         continue;
2369
2370                 /* probably a little skewed due to removing CRC */
2371                 total_rx_bytes += skb->len;
2372
2373                 /* populate checksum, timestamp, VLAN, and protocol */
2374                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2375
2376 #ifdef IXGBE_FCOE
2377                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2378                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2379                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2380                         /* include DDPed FCoE data */
2381                         if (ddp_bytes > 0) {
2382                                 if (!mss) {
2383                                         mss = rx_ring->netdev->mtu -
2384                                                 sizeof(struct fcoe_hdr) -
2385                                                 sizeof(struct fc_frame_header) -
2386                                                 sizeof(struct fcoe_crc_eof);
2387                                         if (mss > 512)
2388                                                 mss &= ~511;
2389                                 }
2390                                 total_rx_bytes += ddp_bytes;
2391                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2392                                                                  mss);
2393                         }
2394                         if (!ddp_bytes) {
2395                                 dev_kfree_skb_any(skb);
2396                                 continue;
2397                         }
2398                 }
2399
2400 #endif /* IXGBE_FCOE */
2401                 ixgbe_rx_skb(q_vector, skb);
2402
2403                 /* update budget accounting */
2404                 total_rx_packets++;
2405         }
2406
2407         if (xdp_xmit & IXGBE_XDP_REDIR)
2408                 xdp_do_flush_map();
2409
2410         if (xdp_xmit & IXGBE_XDP_TX) {
2411                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2412
2413                 /* Force memory writes to complete before letting h/w
2414                  * know there are new descriptors to fetch.
2415                  */
2416                 wmb();
2417                 writel(ring->next_to_use, ring->tail);
2418         }
2419
2420         u64_stats_update_begin(&rx_ring->syncp);
2421         rx_ring->stats.packets += total_rx_packets;
2422         rx_ring->stats.bytes += total_rx_bytes;
2423         u64_stats_update_end(&rx_ring->syncp);
2424         q_vector->rx.total_packets += total_rx_packets;
2425         q_vector->rx.total_bytes += total_rx_bytes;
2426
2427         return total_rx_packets;
2428 }
2429
2430 /**
2431  * ixgbe_configure_msix - Configure MSI-X hardware
2432  * @adapter: board private structure
2433  *
2434  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2435  * interrupts.
2436  **/
2437 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2438 {
2439         struct ixgbe_q_vector *q_vector;
2440         int v_idx;
2441         u32 mask;
2442
2443         /* Populate MSIX to EITR Select */
2444         if (adapter->num_vfs > 32) {
2445                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2446                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2447         }
2448
2449         /*
2450          * Populate the IVAR table and set the ITR values to the
2451          * corresponding register.
2452          */
2453         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2454                 struct ixgbe_ring *ring;
2455                 q_vector = adapter->q_vector[v_idx];
2456
2457                 ixgbe_for_each_ring(ring, q_vector->rx)
2458                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2459
2460                 ixgbe_for_each_ring(ring, q_vector->tx)
2461                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2462
2463                 ixgbe_write_eitr(q_vector);
2464         }
2465
2466         switch (adapter->hw.mac.type) {
2467         case ixgbe_mac_82598EB:
2468                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2469                                v_idx);
2470                 break;
2471         case ixgbe_mac_82599EB:
2472         case ixgbe_mac_X540:
2473         case ixgbe_mac_X550:
2474         case ixgbe_mac_X550EM_x:
2475         case ixgbe_mac_x550em_a:
2476                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2477                 break;
2478         default:
2479                 break;
2480         }
2481         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2482
2483         /* set up to autoclear timer, and the vectors */
2484         mask = IXGBE_EIMS_ENABLE_MASK;
2485         mask &= ~(IXGBE_EIMS_OTHER |
2486                   IXGBE_EIMS_MAILBOX |
2487                   IXGBE_EIMS_LSC);
2488
2489         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2490 }
2491
2492 /**
2493  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2494  * @q_vector: structure containing interrupt and ring information
2495  * @ring_container: structure containing ring performance data
2496  *
2497  *      Stores a new ITR value based on packets and byte
2498  *      counts during the last interrupt.  The advantage of per interrupt
2499  *      computation is faster updates and more accurate ITR for the current
2500  *      traffic pattern.  Constants in this function were computed
2501  *      based on theoretical maximum wire speed and thresholds were set based
2502  *      on testing data as well as attempting to minimize response time
2503  *      while increasing bulk throughput.
2504  **/
2505 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2506                              struct ixgbe_ring_container *ring_container)
2507 {
2508         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2509                            IXGBE_ITR_ADAPTIVE_LATENCY;
2510         unsigned int avg_wire_size, packets, bytes;
2511         unsigned long next_update = jiffies;
2512
2513         /* If we don't have any rings just leave ourselves set for maximum
2514          * possible latency so we take ourselves out of the equation.
2515          */
2516         if (!ring_container->ring)
2517                 return;
2518
2519         /* If we didn't update within up to 1 - 2 jiffies we can assume
2520          * that either packets are coming in so slow there hasn't been
2521          * any work, or that there is so much work that NAPI is dealing
2522          * with interrupt moderation and we don't need to do anything.
2523          */
2524         if (time_after(next_update, ring_container->next_update))
2525                 goto clear_counts;
2526
2527         packets = ring_container->total_packets;
2528
2529         /* We have no packets to actually measure against. This means
2530          * either one of the other queues on this vector is active or
2531          * we are a Tx queue doing TSO with too high of an interrupt rate.
2532          *
2533          * When this occurs just tick up our delay by the minimum value
2534          * and hope that this extra delay will prevent us from being called
2535          * without any work on our queue.
2536          */
2537         if (!packets) {
2538                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2539                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2540                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2541                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2542                 goto clear_counts;
2543         }
2544
2545         bytes = ring_container->total_bytes;
2546
2547         /* If packets are less than 4 or bytes are less than 9000 assume
2548          * insufficient data to use bulk rate limiting approach. We are
2549          * likely latency driven.
2550          */
2551         if (packets < 4 && bytes < 9000) {
2552                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2553                 goto adjust_by_size;
2554         }
2555
2556         /* Between 4 and 48 we can assume that our current interrupt delay
2557          * is only slightly too low. As such we should increase it by a small
2558          * fixed amount.
2559          */
2560         if (packets < 48) {
2561                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2562                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2563                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2564                 goto clear_counts;
2565         }
2566
2567         /* Between 48 and 96 is our "goldilocks" zone where we are working
2568          * out "just right". Just report that our current ITR is good for us.
2569          */
2570         if (packets < 96) {
2571                 itr = q_vector->itr >> 2;
2572                 goto clear_counts;
2573         }
2574
2575         /* If packet count is 96 or greater we are likely looking at a slight
2576          * overrun of the delay we want. Try halving our delay to see if that
2577          * will cut the number of packets in half per interrupt.
2578          */
2579         if (packets < 256) {
2580                 itr = q_vector->itr >> 3;
2581                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2582                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2583                 goto clear_counts;
2584         }
2585
2586         /* The paths below assume we are dealing with a bulk ITR since number
2587          * of packets is 256 or greater. We are just going to have to compute
2588          * a value and try to bring the count under control, though for smaller
2589          * packet sizes there isn't much we can do as NAPI polling will likely
2590          * be kicking in sooner rather than later.
2591          */
2592         itr = IXGBE_ITR_ADAPTIVE_BULK;
2593
2594 adjust_by_size:
2595         /* If packet counts are 256 or greater we can assume we have a gross
2596          * overestimation of what the rate should be. Instead of trying to fine
2597          * tune it just use the formula below to try and dial in an exact value
2598          * give the current packet size of the frame.
2599          */
2600         avg_wire_size = bytes / packets;
2601
2602         /* The following is a crude approximation of:
2603          *  wmem_default / (size + overhead) = desired_pkts_per_int
2604          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2605          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2606          *
2607          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2608          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2609          * formula down to
2610          *
2611          *  (170 * (size + 24)) / (size + 640) = ITR
2612          *
2613          * We first do some math on the packet size and then finally bitshift
2614          * by 8 after rounding up. We also have to account for PCIe link speed
2615          * difference as ITR scales based on this.
2616          */
2617         if (avg_wire_size <= 60) {
2618                 /* Start at 50k ints/sec */
2619                 avg_wire_size = 5120;
2620         } else if (avg_wire_size <= 316) {
2621                 /* 50K ints/sec to 16K ints/sec */
2622                 avg_wire_size *= 40;
2623                 avg_wire_size += 2720;
2624         } else if (avg_wire_size <= 1084) {
2625                 /* 16K ints/sec to 9.2K ints/sec */
2626                 avg_wire_size *= 15;
2627                 avg_wire_size += 11452;
2628         } else if (avg_wire_size <= 1980) {
2629                 /* 9.2K ints/sec to 8K ints/sec */
2630                 avg_wire_size *= 5;
2631                 avg_wire_size += 22420;
2632         } else {
2633                 /* plateau at a limit of 8K ints/sec */
2634                 avg_wire_size = 32256;
2635         }
2636
2637         /* If we are in low latency mode half our delay which doubles the rate
2638          * to somewhere between 100K to 16K ints/sec
2639          */
2640         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2641                 avg_wire_size >>= 1;
2642
2643         /* Resultant value is 256 times larger than it needs to be. This
2644          * gives us room to adjust the value as needed to either increase
2645          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2646          *
2647          * Use addition as we have already recorded the new latency flag
2648          * for the ITR value.
2649          */
2650         switch (q_vector->adapter->link_speed) {
2651         case IXGBE_LINK_SPEED_10GB_FULL:
2652         case IXGBE_LINK_SPEED_100_FULL:
2653         default:
2654                 itr += DIV_ROUND_UP(avg_wire_size,
2655                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2656                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2657                 break;
2658         case IXGBE_LINK_SPEED_2_5GB_FULL:
2659         case IXGBE_LINK_SPEED_1GB_FULL:
2660         case IXGBE_LINK_SPEED_10_FULL:
2661                 itr += DIV_ROUND_UP(avg_wire_size,
2662                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2663                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2664                 break;
2665         }
2666
2667 clear_counts:
2668         /* write back value */
2669         ring_container->itr = itr;
2670
2671         /* next update should occur within next jiffy */
2672         ring_container->next_update = next_update + 1;
2673
2674         ring_container->total_bytes = 0;
2675         ring_container->total_packets = 0;
2676 }
2677
2678 /**
2679  * ixgbe_write_eitr - write EITR register in hardware specific way
2680  * @q_vector: structure containing interrupt and ring information
2681  *
2682  * This function is made to be called by ethtool and by the driver
2683  * when it needs to update EITR registers at runtime.  Hardware
2684  * specific quirks/differences are taken care of here.
2685  */
2686 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2687 {
2688         struct ixgbe_adapter *adapter = q_vector->adapter;
2689         struct ixgbe_hw *hw = &adapter->hw;
2690         int v_idx = q_vector->v_idx;
2691         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2692
2693         switch (adapter->hw.mac.type) {
2694         case ixgbe_mac_82598EB:
2695                 /* must write high and low 16 bits to reset counter */
2696                 itr_reg |= (itr_reg << 16);
2697                 break;
2698         case ixgbe_mac_82599EB:
2699         case ixgbe_mac_X540:
2700         case ixgbe_mac_X550:
2701         case ixgbe_mac_X550EM_x:
2702         case ixgbe_mac_x550em_a:
2703                 /*
2704                  * set the WDIS bit to not clear the timer bits and cause an
2705                  * immediate assertion of the interrupt
2706                  */
2707                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2708                 break;
2709         default:
2710                 break;
2711         }
2712         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2713 }
2714
2715 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2716 {
2717         u32 new_itr;
2718
2719         ixgbe_update_itr(q_vector, &q_vector->tx);
2720         ixgbe_update_itr(q_vector, &q_vector->rx);
2721
2722         /* use the smallest value of new ITR delay calculations */
2723         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2724
2725         /* Clear latency flag if set, shift into correct position */
2726         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2727         new_itr <<= 2;
2728
2729         if (new_itr != q_vector->itr) {
2730                 /* save the algorithm value here */
2731                 q_vector->itr = new_itr;
2732
2733                 ixgbe_write_eitr(q_vector);
2734         }
2735 }
2736
2737 /**
2738  * ixgbe_check_overtemp_subtask - check for over temperature
2739  * @adapter: pointer to adapter
2740  **/
2741 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2742 {
2743         struct ixgbe_hw *hw = &adapter->hw;
2744         u32 eicr = adapter->interrupt_event;
2745         s32 rc;
2746
2747         if (test_bit(__IXGBE_DOWN, &adapter->state))
2748                 return;
2749
2750         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2751                 return;
2752
2753         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2754
2755         switch (hw->device_id) {
2756         case IXGBE_DEV_ID_82599_T3_LOM:
2757                 /*
2758                  * Since the warning interrupt is for both ports
2759                  * we don't have to check if:
2760                  *  - This interrupt wasn't for our port.
2761                  *  - We may have missed the interrupt so always have to
2762                  *    check if we  got a LSC
2763                  */
2764                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2765                     !(eicr & IXGBE_EICR_LSC))
2766                         return;
2767
2768                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2769                         u32 speed;
2770                         bool link_up = false;
2771
2772                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2773
2774                         if (link_up)
2775                                 return;
2776                 }
2777
2778                 /* Check if this is not due to overtemp */
2779                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2780                         return;
2781
2782                 break;
2783         case IXGBE_DEV_ID_X550EM_A_1G_T:
2784         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2785                 rc = hw->phy.ops.check_overtemp(hw);
2786                 if (rc != IXGBE_ERR_OVERTEMP)
2787                         return;
2788                 break;
2789         default:
2790                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2791                         return;
2792                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2793                         return;
2794                 break;
2795         }
2796         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2797
2798         adapter->interrupt_event = 0;
2799 }
2800
2801 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2802 {
2803         struct ixgbe_hw *hw = &adapter->hw;
2804
2805         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2806             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2807                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2808                 /* write to clear the interrupt */
2809                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2810         }
2811 }
2812
2813 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2814 {
2815         struct ixgbe_hw *hw = &adapter->hw;
2816
2817         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2818                 return;
2819
2820         switch (adapter->hw.mac.type) {
2821         case ixgbe_mac_82599EB:
2822                 /*
2823                  * Need to check link state so complete overtemp check
2824                  * on service task
2825                  */
2826                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2827                      (eicr & IXGBE_EICR_LSC)) &&
2828                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2829                         adapter->interrupt_event = eicr;
2830                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2831                         ixgbe_service_event_schedule(adapter);
2832                         return;
2833                 }
2834                 return;
2835         case ixgbe_mac_x550em_a:
2836                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2837                         adapter->interrupt_event = eicr;
2838                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2839                         ixgbe_service_event_schedule(adapter);
2840                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2841                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2842                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2843                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2844                 }
2845                 return;
2846         case ixgbe_mac_X550:
2847         case ixgbe_mac_X540:
2848                 if (!(eicr & IXGBE_EICR_TS))
2849                         return;
2850                 break;
2851         default:
2852                 return;
2853         }
2854
2855         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2856 }
2857
2858 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2859 {
2860         switch (hw->mac.type) {
2861         case ixgbe_mac_82598EB:
2862                 if (hw->phy.type == ixgbe_phy_nl)
2863                         return true;
2864                 return false;
2865         case ixgbe_mac_82599EB:
2866         case ixgbe_mac_X550EM_x:
2867         case ixgbe_mac_x550em_a:
2868                 switch (hw->mac.ops.get_media_type(hw)) {
2869                 case ixgbe_media_type_fiber:
2870                 case ixgbe_media_type_fiber_qsfp:
2871                         return true;
2872                 default:
2873                         return false;
2874                 }
2875         default:
2876                 return false;
2877         }
2878 }
2879
2880 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2881 {
2882         struct ixgbe_hw *hw = &adapter->hw;
2883         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2884
2885         if (!ixgbe_is_sfp(hw))
2886                 return;
2887
2888         /* Later MAC's use different SDP */
2889         if (hw->mac.type >= ixgbe_mac_X540)
2890                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2891
2892         if (eicr & eicr_mask) {
2893                 /* Clear the interrupt */
2894                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2895                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2896                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2897                         adapter->sfp_poll_time = 0;
2898                         ixgbe_service_event_schedule(adapter);
2899                 }
2900         }
2901
2902         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2903             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2904                 /* Clear the interrupt */
2905                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2906                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2907                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2908                         ixgbe_service_event_schedule(adapter);
2909                 }
2910         }
2911 }
2912
2913 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2914 {
2915         struct ixgbe_hw *hw = &adapter->hw;
2916
2917         adapter->lsc_int++;
2918         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2919         adapter->link_check_timeout = jiffies;
2920         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2921                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2922                 IXGBE_WRITE_FLUSH(hw);
2923                 ixgbe_service_event_schedule(adapter);
2924         }
2925 }
2926
2927 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2928                                            u64 qmask)
2929 {
2930         u32 mask;
2931         struct ixgbe_hw *hw = &adapter->hw;
2932
2933         switch (hw->mac.type) {
2934         case ixgbe_mac_82598EB:
2935                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2936                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2937                 break;
2938         case ixgbe_mac_82599EB:
2939         case ixgbe_mac_X540:
2940         case ixgbe_mac_X550:
2941         case ixgbe_mac_X550EM_x:
2942         case ixgbe_mac_x550em_a:
2943                 mask = (qmask & 0xFFFFFFFF);
2944                 if (mask)
2945                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2946                 mask = (qmask >> 32);
2947                 if (mask)
2948                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2949                 break;
2950         default:
2951                 break;
2952         }
2953         /* skip the flush */
2954 }
2955
2956 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2957                                             u64 qmask)
2958 {
2959         u32 mask;
2960         struct ixgbe_hw *hw = &adapter->hw;
2961
2962         switch (hw->mac.type) {
2963         case ixgbe_mac_82598EB:
2964                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2965                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2966                 break;
2967         case ixgbe_mac_82599EB:
2968         case ixgbe_mac_X540:
2969         case ixgbe_mac_X550:
2970         case ixgbe_mac_X550EM_x:
2971         case ixgbe_mac_x550em_a:
2972                 mask = (qmask & 0xFFFFFFFF);
2973                 if (mask)
2974                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2975                 mask = (qmask >> 32);
2976                 if (mask)
2977                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2978                 break;
2979         default:
2980                 break;
2981         }
2982         /* skip the flush */
2983 }
2984
2985 /**
2986  * ixgbe_irq_enable - Enable default interrupt generation settings
2987  * @adapter: board private structure
2988  * @queues: enable irqs for queues
2989  * @flush: flush register write
2990  **/
2991 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2992                                     bool flush)
2993 {
2994         struct ixgbe_hw *hw = &adapter->hw;
2995         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2996
2997         /* don't reenable LSC while waiting for link */
2998         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2999                 mask &= ~IXGBE_EIMS_LSC;
3000
3001         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3002                 switch (adapter->hw.mac.type) {
3003                 case ixgbe_mac_82599EB:
3004                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
3005                         break;
3006                 case ixgbe_mac_X540:
3007                 case ixgbe_mac_X550:
3008                 case ixgbe_mac_X550EM_x:
3009                 case ixgbe_mac_x550em_a:
3010                         mask |= IXGBE_EIMS_TS;
3011                         break;
3012                 default:
3013                         break;
3014                 }
3015         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3016                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3017         switch (adapter->hw.mac.type) {
3018         case ixgbe_mac_82599EB:
3019                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3020                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3021                 /* fall through */
3022         case ixgbe_mac_X540:
3023         case ixgbe_mac_X550:
3024         case ixgbe_mac_X550EM_x:
3025         case ixgbe_mac_x550em_a:
3026                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3027                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3028                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3029                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3030                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3031                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3032                 mask |= IXGBE_EIMS_ECC;
3033                 mask |= IXGBE_EIMS_MAILBOX;
3034                 break;
3035         default:
3036                 break;
3037         }
3038
3039         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3040             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3041                 mask |= IXGBE_EIMS_FLOW_DIR;
3042
3043         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3044         if (queues)
3045                 ixgbe_irq_enable_queues(adapter, ~0);
3046         if (flush)
3047                 IXGBE_WRITE_FLUSH(&adapter->hw);
3048 }
3049
3050 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3051 {
3052         struct ixgbe_adapter *adapter = data;
3053         struct ixgbe_hw *hw = &adapter->hw;
3054         u32 eicr;
3055
3056         /*
3057          * Workaround for Silicon errata.  Use clear-by-write instead
3058          * of clear-by-read.  Reading with EICS will return the
3059          * interrupt causes without clearing, which later be done
3060          * with the write to EICR.
3061          */
3062         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3063
3064         /* The lower 16bits of the EICR register are for the queue interrupts
3065          * which should be masked here in order to not accidentally clear them if
3066          * the bits are high when ixgbe_msix_other is called. There is a race
3067          * condition otherwise which results in possible performance loss
3068          * especially if the ixgbe_msix_other interrupt is triggering
3069          * consistently (as it would when PPS is turned on for the X540 device)
3070          */
3071         eicr &= 0xFFFF0000;
3072
3073         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3074
3075         if (eicr & IXGBE_EICR_LSC)
3076                 ixgbe_check_lsc(adapter);
3077
3078         if (eicr & IXGBE_EICR_MAILBOX)
3079                 ixgbe_msg_task(adapter);
3080
3081         switch (hw->mac.type) {
3082         case ixgbe_mac_82599EB:
3083         case ixgbe_mac_X540:
3084         case ixgbe_mac_X550:
3085         case ixgbe_mac_X550EM_x:
3086         case ixgbe_mac_x550em_a:
3087                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3088                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3089                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3090                         ixgbe_service_event_schedule(adapter);
3091                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3092                                         IXGBE_EICR_GPI_SDP0_X540);
3093                 }
3094                 if (eicr & IXGBE_EICR_ECC) {
3095                         e_info(link, "Received ECC Err, initiating reset\n");
3096                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3097                         ixgbe_service_event_schedule(adapter);
3098                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3099                 }
3100                 /* Handle Flow Director Full threshold interrupt */
3101                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3102                         int reinit_count = 0;
3103                         int i;
3104                         for (i = 0; i < adapter->num_tx_queues; i++) {
3105                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3106                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3107                                                        &ring->state))
3108                                         reinit_count++;
3109                         }
3110                         if (reinit_count) {
3111                                 /* no more flow director interrupts until after init */
3112                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3113                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3114                                 ixgbe_service_event_schedule(adapter);
3115                         }
3116                 }
3117                 ixgbe_check_sfp_event(adapter, eicr);
3118                 ixgbe_check_overtemp_event(adapter, eicr);
3119                 break;
3120         default:
3121                 break;
3122         }
3123
3124         ixgbe_check_fan_failure(adapter, eicr);
3125
3126         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3127                 ixgbe_ptp_check_pps_event(adapter);
3128
3129         /* re-enable the original interrupt state, no lsc, no queues */
3130         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3131                 ixgbe_irq_enable(adapter, false, false);
3132
3133         return IRQ_HANDLED;
3134 }
3135
3136 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3137 {
3138         struct ixgbe_q_vector *q_vector = data;
3139
3140         /* EIAM disabled interrupts (on this vector) for us */
3141
3142         if (q_vector->rx.ring || q_vector->tx.ring)
3143                 napi_schedule_irqoff(&q_vector->napi);
3144
3145         return IRQ_HANDLED;
3146 }
3147
3148 /**
3149  * ixgbe_poll - NAPI Rx polling callback
3150  * @napi: structure for representing this polling device
3151  * @budget: how many packets driver is allowed to clean
3152  *
3153  * This function is used for legacy and MSI, NAPI mode
3154  **/
3155 int ixgbe_poll(struct napi_struct *napi, int budget)
3156 {
3157         struct ixgbe_q_vector *q_vector =
3158                                 container_of(napi, struct ixgbe_q_vector, napi);
3159         struct ixgbe_adapter *adapter = q_vector->adapter;
3160         struct ixgbe_ring *ring;
3161         int per_ring_budget, work_done = 0;
3162         bool clean_complete = true;
3163
3164 #ifdef CONFIG_IXGBE_DCA
3165         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3166                 ixgbe_update_dca(q_vector);
3167 #endif
3168
3169         ixgbe_for_each_ring(ring, q_vector->tx) {
3170                 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3171                         clean_complete = false;
3172         }
3173
3174         /* Exit if we are called by netpoll */
3175         if (budget <= 0)
3176                 return budget;
3177
3178         /* attempt to distribute budget to each queue fairly, but don't allow
3179          * the budget to go below 1 because we'll exit polling */
3180         if (q_vector->rx.count > 1)
3181                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3182         else
3183                 per_ring_budget = budget;
3184
3185         ixgbe_for_each_ring(ring, q_vector->rx) {
3186                 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3187                                                  per_ring_budget);
3188
3189                 work_done += cleaned;
3190                 if (cleaned >= per_ring_budget)
3191                         clean_complete = false;
3192         }
3193
3194         /* If all work not completed, return budget and keep polling */
3195         if (!clean_complete)
3196                 return budget;
3197
3198         /* all work done, exit the polling mode */
3199         if (likely(napi_complete_done(napi, work_done))) {
3200                 if (adapter->rx_itr_setting & 1)
3201                         ixgbe_set_itr(q_vector);
3202                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3203                         ixgbe_irq_enable_queues(adapter,
3204                                                 BIT_ULL(q_vector->v_idx));
3205         }
3206
3207         return min(work_done, budget - 1);
3208 }
3209
3210 /**
3211  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3212  * @adapter: board private structure
3213  *
3214  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3215  * interrupts from the kernel.
3216  **/
3217 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3218 {
3219         struct net_device *netdev = adapter->netdev;
3220         unsigned int ri = 0, ti = 0;
3221         int vector, err;
3222
3223         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3224                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3225                 struct msix_entry *entry = &adapter->msix_entries[vector];
3226
3227                 if (q_vector->tx.ring && q_vector->rx.ring) {
3228                         snprintf(q_vector->name, sizeof(q_vector->name),
3229                                  "%s-TxRx-%u", netdev->name, ri++);
3230                         ti++;
3231                 } else if (q_vector->rx.ring) {
3232                         snprintf(q_vector->name, sizeof(q_vector->name),
3233                                  "%s-rx-%u", netdev->name, ri++);
3234                 } else if (q_vector->tx.ring) {
3235                         snprintf(q_vector->name, sizeof(q_vector->name),
3236                                  "%s-tx-%u", netdev->name, ti++);
3237                 } else {
3238                         /* skip this unused q_vector */
3239                         continue;
3240                 }
3241                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3242                                   q_vector->name, q_vector);
3243                 if (err) {
3244                         e_err(probe, "request_irq failed for MSIX interrupt "
3245                               "Error: %d\n", err);
3246                         goto free_queue_irqs;
3247                 }
3248                 /* If Flow Director is enabled, set interrupt affinity */
3249                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3250                         /* assign the mask for this irq */
3251                         irq_set_affinity_hint(entry->vector,
3252                                               &q_vector->affinity_mask);
3253                 }
3254         }
3255
3256         err = request_irq(adapter->msix_entries[vector].vector,
3257                           ixgbe_msix_other, 0, netdev->name, adapter);
3258         if (err) {
3259                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3260                 goto free_queue_irqs;
3261         }
3262
3263         return 0;
3264
3265 free_queue_irqs:
3266         while (vector) {
3267                 vector--;
3268                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3269                                       NULL);
3270                 free_irq(adapter->msix_entries[vector].vector,
3271                          adapter->q_vector[vector]);
3272         }
3273         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3274         pci_disable_msix(adapter->pdev);
3275         kfree(adapter->msix_entries);
3276         adapter->msix_entries = NULL;
3277         return err;
3278 }
3279
3280 /**
3281  * ixgbe_intr - legacy mode Interrupt Handler
3282  * @irq: interrupt number
3283  * @data: pointer to a network interface device structure
3284  **/
3285 static irqreturn_t ixgbe_intr(int irq, void *data)
3286 {
3287         struct ixgbe_adapter *adapter = data;
3288         struct ixgbe_hw *hw = &adapter->hw;
3289         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3290         u32 eicr;
3291
3292         /*
3293          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3294          * before the read of EICR.
3295          */
3296         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3297
3298         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3299          * therefore no explicit interrupt disable is necessary */
3300         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3301         if (!eicr) {
3302                 /*
3303                  * shared interrupt alert!
3304                  * make sure interrupts are enabled because the read will
3305                  * have disabled interrupts due to EIAM
3306                  * finish the workaround of silicon errata on 82598.  Unmask
3307                  * the interrupt that we masked before the EICR read.
3308                  */
3309                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3310                         ixgbe_irq_enable(adapter, true, true);
3311                 return IRQ_NONE;        /* Not our interrupt */
3312         }
3313
3314         if (eicr & IXGBE_EICR_LSC)
3315                 ixgbe_check_lsc(adapter);
3316
3317         switch (hw->mac.type) {
3318         case ixgbe_mac_82599EB:
3319                 ixgbe_check_sfp_event(adapter, eicr);
3320                 /* Fall through */
3321         case ixgbe_mac_X540:
3322         case ixgbe_mac_X550:
3323         case ixgbe_mac_X550EM_x:
3324         case ixgbe_mac_x550em_a:
3325                 if (eicr & IXGBE_EICR_ECC) {
3326                         e_info(link, "Received ECC Err, initiating reset\n");
3327                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3328                         ixgbe_service_event_schedule(adapter);
3329                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3330                 }
3331                 ixgbe_check_overtemp_event(adapter, eicr);
3332                 break;
3333         default:
3334                 break;
3335         }
3336
3337         ixgbe_check_fan_failure(adapter, eicr);
3338         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3339                 ixgbe_ptp_check_pps_event(adapter);
3340
3341         /* would disable interrupts here but EIAM disabled it */
3342         napi_schedule_irqoff(&q_vector->napi);
3343
3344         /*
3345          * re-enable link(maybe) and non-queue interrupts, no flush.
3346          * ixgbe_poll will re-enable the queue interrupts
3347          */
3348         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3349                 ixgbe_irq_enable(adapter, false, false);
3350
3351         return IRQ_HANDLED;
3352 }
3353
3354 /**
3355  * ixgbe_request_irq - initialize interrupts
3356  * @adapter: board private structure
3357  *
3358  * Attempts to configure interrupts using the best available
3359  * capabilities of the hardware and kernel.
3360  **/
3361 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3362 {
3363         struct net_device *netdev = adapter->netdev;
3364         int err;
3365
3366         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3367                 err = ixgbe_request_msix_irqs(adapter);
3368         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3369                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3370                                   netdev->name, adapter);
3371         else
3372                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3373                                   netdev->name, adapter);
3374
3375         if (err)
3376                 e_err(probe, "request_irq failed, Error %d\n", err);
3377
3378         return err;
3379 }
3380
3381 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3382 {
3383         int vector;
3384
3385         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3386                 free_irq(adapter->pdev->irq, adapter);
3387                 return;
3388         }
3389
3390         if (!adapter->msix_entries)
3391                 return;
3392
3393         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3394                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3395                 struct msix_entry *entry = &adapter->msix_entries[vector];
3396
3397                 /* free only the irqs that were actually requested */
3398                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3399                         continue;
3400
3401                 /* clear the affinity_mask in the IRQ descriptor */
3402                 irq_set_affinity_hint(entry->vector, NULL);
3403
3404                 free_irq(entry->vector, q_vector);
3405         }
3406
3407         free_irq(adapter->msix_entries[vector].vector, adapter);
3408 }
3409
3410 /**
3411  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3412  * @adapter: board private structure
3413  **/
3414 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3415 {
3416         switch (adapter->hw.mac.type) {
3417         case ixgbe_mac_82598EB:
3418                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3419                 break;
3420         case ixgbe_mac_82599EB:
3421         case ixgbe_mac_X540:
3422         case ixgbe_mac_X550:
3423         case ixgbe_mac_X550EM_x:
3424         case ixgbe_mac_x550em_a:
3425                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3426                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3427                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3428                 break;
3429         default:
3430                 break;
3431         }
3432         IXGBE_WRITE_FLUSH(&adapter->hw);
3433         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3434                 int vector;
3435
3436                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3437                         synchronize_irq(adapter->msix_entries[vector].vector);
3438
3439                 synchronize_irq(adapter->msix_entries[vector++].vector);
3440         } else {
3441                 synchronize_irq(adapter->pdev->irq);
3442         }
3443 }
3444
3445 /**
3446  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3447  * @adapter: board private structure
3448  *
3449  **/
3450 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3451 {
3452         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3453
3454         ixgbe_write_eitr(q_vector);
3455
3456         ixgbe_set_ivar(adapter, 0, 0, 0);
3457         ixgbe_set_ivar(adapter, 1, 0, 0);
3458
3459         e_info(hw, "Legacy interrupt IVAR setup done\n");
3460 }
3461
3462 /**
3463  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3464  * @adapter: board private structure
3465  * @ring: structure containing ring specific data
3466  *
3467  * Configure the Tx descriptor ring after a reset.
3468  **/
3469 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3470                              struct ixgbe_ring *ring)
3471 {
3472         struct ixgbe_hw *hw = &adapter->hw;
3473         u64 tdba = ring->dma;
3474         int wait_loop = 10;
3475         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3476         u8 reg_idx = ring->reg_idx;
3477
3478         /* disable queue to avoid issues while updating state */
3479         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3480         IXGBE_WRITE_FLUSH(hw);
3481
3482         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3483                         (tdba & DMA_BIT_MASK(32)));
3484         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3485         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3486                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3487         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3488         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3489         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3490
3491         /*
3492          * set WTHRESH to encourage burst writeback, it should not be set
3493          * higher than 1 when:
3494          * - ITR is 0 as it could cause false TX hangs
3495          * - ITR is set to > 100k int/sec and BQL is enabled
3496          *
3497          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3498          * to or less than the number of on chip descriptors, which is
3499          * currently 40.
3500          */
3501         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3502                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3503         else
3504                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3505
3506         /*
3507          * Setting PTHRESH to 32 both improves performance
3508          * and avoids a TX hang with DFP enabled
3509          */
3510         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3511                    32;          /* PTHRESH = 32 */
3512
3513         /* reinitialize flowdirector state */
3514         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3515                 ring->atr_sample_rate = adapter->atr_sample_rate;
3516                 ring->atr_count = 0;
3517                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3518         } else {
3519                 ring->atr_sample_rate = 0;
3520         }
3521
3522         /* initialize XPS */
3523         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3524                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3525
3526                 if (q_vector)
3527                         netif_set_xps_queue(ring->netdev,
3528                                             &q_vector->affinity_mask,
3529                                             ring->queue_index);
3530         }
3531
3532         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3533
3534         /* reinitialize tx_buffer_info */
3535         memset(ring->tx_buffer_info, 0,
3536                sizeof(struct ixgbe_tx_buffer) * ring->count);
3537
3538         /* enable queue */
3539         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3540
3541         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3542         if (hw->mac.type == ixgbe_mac_82598EB &&
3543             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3544                 return;
3545
3546         /* poll to verify queue is enabled */
3547         do {
3548                 usleep_range(1000, 2000);
3549                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3550         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3551         if (!wait_loop)
3552                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3553 }
3554
3555 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3556 {
3557         struct ixgbe_hw *hw = &adapter->hw;
3558         u32 rttdcs, mtqc;
3559         u8 tcs = adapter->hw_tcs;
3560
3561         if (hw->mac.type == ixgbe_mac_82598EB)
3562                 return;
3563
3564         /* disable the arbiter while setting MTQC */
3565         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3566         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3567         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3568
3569         /* set transmit pool layout */
3570         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3571                 mtqc = IXGBE_MTQC_VT_ENA;
3572                 if (tcs > 4)
3573                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3574                 else if (tcs > 1)
3575                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3576                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3577                          IXGBE_82599_VMDQ_4Q_MASK)
3578                         mtqc |= IXGBE_MTQC_32VF;
3579                 else
3580                         mtqc |= IXGBE_MTQC_64VF;
3581         } else {
3582                 if (tcs > 4)
3583                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3584                 else if (tcs > 1)
3585                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3586                 else
3587                         mtqc = IXGBE_MTQC_64Q_1PB;
3588         }
3589
3590         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3591
3592         /* Enable Security TX Buffer IFG for multiple pb */
3593         if (tcs) {
3594                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3595                 sectx |= IXGBE_SECTX_DCB;
3596                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3597         }
3598
3599         /* re-enable the arbiter */
3600         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3601         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3602 }
3603
3604 /**
3605  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3606  * @adapter: board private structure
3607  *
3608  * Configure the Tx unit of the MAC after a reset.
3609  **/
3610 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3611 {
3612         struct ixgbe_hw *hw = &adapter->hw;
3613         u32 dmatxctl;
3614         u32 i;
3615
3616         ixgbe_setup_mtqc(adapter);
3617
3618         if (hw->mac.type != ixgbe_mac_82598EB) {
3619                 /* DMATXCTL.EN must be before Tx queues are enabled */
3620                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3621                 dmatxctl |= IXGBE_DMATXCTL_TE;
3622                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3623         }
3624
3625         /* Setup the HW Tx Head and Tail descriptor pointers */
3626         for (i = 0; i < adapter->num_tx_queues; i++)
3627                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3628         for (i = 0; i < adapter->num_xdp_queues; i++)
3629                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3630 }
3631
3632 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3633                                  struct ixgbe_ring *ring)
3634 {
3635         struct ixgbe_hw *hw = &adapter->hw;
3636         u8 reg_idx = ring->reg_idx;
3637         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3638
3639         srrctl |= IXGBE_SRRCTL_DROP_EN;
3640
3641         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3642 }
3643
3644 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3645                                   struct ixgbe_ring *ring)
3646 {
3647         struct ixgbe_hw *hw = &adapter->hw;
3648         u8 reg_idx = ring->reg_idx;
3649         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3650
3651         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3652
3653         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3654 }
3655
3656 #ifdef CONFIG_IXGBE_DCB
3657 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3658 #else
3659 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3660 #endif
3661 {
3662         int i;
3663         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3664
3665         if (adapter->ixgbe_ieee_pfc)
3666                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3667
3668         /*
3669          * We should set the drop enable bit if:
3670          *  SR-IOV is enabled
3671          *   or
3672          *  Number of Rx queues > 1 and flow control is disabled
3673          *
3674          *  This allows us to avoid head of line blocking for security
3675          *  and performance reasons.
3676          */
3677         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3678             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3679                 for (i = 0; i < adapter->num_rx_queues; i++)
3680                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3681         } else {
3682                 for (i = 0; i < adapter->num_rx_queues; i++)
3683                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3684         }
3685 }
3686
3687 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3688
3689 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3690                                    struct ixgbe_ring *rx_ring)
3691 {
3692         struct ixgbe_hw *hw = &adapter->hw;
3693         u32 srrctl;
3694         u8 reg_idx = rx_ring->reg_idx;
3695
3696         if (hw->mac.type == ixgbe_mac_82598EB) {
3697                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3698
3699                 /*
3700                  * if VMDq is not active we must program one srrctl register
3701                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3702                  */
3703                 reg_idx &= mask;
3704         }
3705
3706         /* configure header buffer length, needed for RSC */
3707         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3708
3709         /* configure the packet buffer length */
3710         if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3711                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3712         else
3713                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3714
3715         /* configure descriptor type */
3716         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3717
3718         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3719 }
3720
3721 /**
3722  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3723  * @adapter: device handle
3724  *
3725  *  - 82598/82599/X540:     128
3726  *  - X550(non-SRIOV mode): 512
3727  *  - X550(SRIOV mode):     64
3728  */
3729 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3730 {
3731         if (adapter->hw.mac.type < ixgbe_mac_X550)
3732                 return 128;
3733         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3734                 return 64;
3735         else
3736                 return 512;
3737 }
3738
3739 /**
3740  * ixgbe_store_key - Write the RSS key to HW
3741  * @adapter: device handle
3742  *
3743  * Write the RSS key stored in adapter.rss_key to HW.
3744  */
3745 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3746 {
3747         struct ixgbe_hw *hw = &adapter->hw;
3748         int i;
3749
3750         for (i = 0; i < 10; i++)
3751                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3752 }
3753
3754 /**
3755  * ixgbe_init_rss_key - Initialize adapter RSS key
3756  * @adapter: device handle
3757  *
3758  * Allocates and initializes the RSS key if it is not allocated.
3759  **/
3760 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3761 {
3762         u32 *rss_key;
3763
3764         if (!adapter->rss_key) {
3765                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3766                 if (unlikely(!rss_key))
3767                         return -ENOMEM;
3768
3769                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3770                 adapter->rss_key = rss_key;
3771         }
3772
3773         return 0;
3774 }
3775
3776 /**
3777  * ixgbe_store_reta - Write the RETA table to HW
3778  * @adapter: device handle
3779  *
3780  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3781  */
3782 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3783 {
3784         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3785         struct ixgbe_hw *hw = &adapter->hw;
3786         u32 reta = 0;
3787         u32 indices_multi;
3788         u8 *indir_tbl = adapter->rss_indir_tbl;
3789
3790         /* Fill out the redirection table as follows:
3791          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3792          *    indices.
3793          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3794          *  - X550:       8 bit wide entries containing 6 bit RSS index
3795          */
3796         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3797                 indices_multi = 0x11;
3798         else
3799                 indices_multi = 0x1;
3800
3801         /* Write redirection table to HW */
3802         for (i = 0; i < reta_entries; i++) {
3803                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3804                 if ((i & 3) == 3) {
3805                         if (i < 128)
3806                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3807                         else
3808                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3809                                                 reta);
3810                         reta = 0;
3811                 }
3812         }
3813 }
3814
3815 /**
3816  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3817  * @adapter: device handle
3818  *
3819  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3820  */
3821 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3822 {
3823         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3824         struct ixgbe_hw *hw = &adapter->hw;
3825         u32 vfreta = 0;
3826
3827         /* Write redirection table to HW */
3828         for (i = 0; i < reta_entries; i++) {
3829                 u16 pool = adapter->num_rx_pools;
3830
3831                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3832                 if ((i & 3) != 3)
3833                         continue;
3834
3835                 while (pool--)
3836                         IXGBE_WRITE_REG(hw,
3837                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3838                                         vfreta);
3839                 vfreta = 0;
3840         }
3841 }
3842
3843 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3844 {
3845         u32 i, j;
3846         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3847         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3848
3849         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3850          * make full use of any rings they may have.  We will use the
3851          * PSRTYPE register to control how many rings we use within the PF.
3852          */
3853         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3854                 rss_i = 4;
3855
3856         /* Fill out hash function seeds */
3857         ixgbe_store_key(adapter);
3858
3859         /* Fill out redirection table */
3860         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3861
3862         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3863                 if (j == rss_i)
3864                         j = 0;
3865
3866                 adapter->rss_indir_tbl[i] = j;
3867         }
3868
3869         ixgbe_store_reta(adapter);
3870 }
3871
3872 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3873 {
3874         struct ixgbe_hw *hw = &adapter->hw;
3875         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3876         int i, j;
3877
3878         /* Fill out hash function seeds */
3879         for (i = 0; i < 10; i++) {
3880                 u16 pool = adapter->num_rx_pools;
3881
3882                 while (pool--)
3883                         IXGBE_WRITE_REG(hw,
3884                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3885                                         *(adapter->rss_key + i));
3886         }
3887
3888         /* Fill out the redirection table */
3889         for (i = 0, j = 0; i < 64; i++, j++) {
3890                 if (j == rss_i)
3891                         j = 0;
3892
3893                 adapter->rss_indir_tbl[i] = j;
3894         }
3895
3896         ixgbe_store_vfreta(adapter);
3897 }
3898
3899 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3900 {
3901         struct ixgbe_hw *hw = &adapter->hw;
3902         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3903         u32 rxcsum;
3904
3905         /* Disable indicating checksum in descriptor, enables RSS hash */
3906         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3907         rxcsum |= IXGBE_RXCSUM_PCSD;
3908         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3909
3910         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3911                 if (adapter->ring_feature[RING_F_RSS].mask)
3912                         mrqc = IXGBE_MRQC_RSSEN;
3913         } else {
3914                 u8 tcs = adapter->hw_tcs;
3915
3916                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3917                         if (tcs > 4)
3918                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3919                         else if (tcs > 1)
3920                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3921                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3922                                  IXGBE_82599_VMDQ_4Q_MASK)
3923                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3924                         else
3925                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3926
3927                         /* Enable L3/L4 for Tx Switched packets */
3928                         mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3929                 } else {
3930                         if (tcs > 4)
3931                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3932                         else if (tcs > 1)
3933                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3934                         else
3935                                 mrqc = IXGBE_MRQC_RSSEN;
3936                 }
3937         }
3938
3939         /* Perform hash on these packet types */
3940         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3941                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3942                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3943                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3944
3945         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3946                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3947         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3948                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3949
3950         if ((hw->mac.type >= ixgbe_mac_X550) &&
3951             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3952                 u16 pool = adapter->num_rx_pools;
3953
3954                 /* Enable VF RSS mode */
3955                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3956                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3957
3958                 /* Setup RSS through the VF registers */
3959                 ixgbe_setup_vfreta(adapter);
3960                 vfmrqc = IXGBE_MRQC_RSSEN;
3961                 vfmrqc |= rss_field;
3962
3963                 while (pool--)
3964                         IXGBE_WRITE_REG(hw,
3965                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3966                                         vfmrqc);
3967         } else {
3968                 ixgbe_setup_reta(adapter);
3969                 mrqc |= rss_field;
3970                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3971         }
3972 }
3973
3974 /**
3975  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3976  * @adapter: address of board private structure
3977  * @ring: structure containing ring specific data
3978  **/
3979 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3980                                    struct ixgbe_ring *ring)
3981 {
3982         struct ixgbe_hw *hw = &adapter->hw;
3983         u32 rscctrl;
3984         u8 reg_idx = ring->reg_idx;
3985
3986         if (!ring_is_rsc_enabled(ring))
3987                 return;
3988
3989         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3990         rscctrl |= IXGBE_RSCCTL_RSCEN;
3991         /*
3992          * we must limit the number of descriptors so that the
3993          * total size of max desc * buf_len is not greater
3994          * than 65536
3995          */
3996         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3997         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3998 }
3999
4000 #define IXGBE_MAX_RX_DESC_POLL 10
4001 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4002                                        struct ixgbe_ring *ring)
4003 {
4004         struct ixgbe_hw *hw = &adapter->hw;
4005         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4006         u32 rxdctl;
4007         u8 reg_idx = ring->reg_idx;
4008
4009         if (ixgbe_removed(hw->hw_addr))
4010                 return;
4011         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4012         if (hw->mac.type == ixgbe_mac_82598EB &&
4013             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4014                 return;
4015
4016         do {
4017                 usleep_range(1000, 2000);
4018                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4019         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4020
4021         if (!wait_loop) {
4022                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4023                       "the polling period\n", reg_idx);
4024         }
4025 }
4026
4027 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4028                              struct ixgbe_ring *ring)
4029 {
4030         struct ixgbe_hw *hw = &adapter->hw;
4031         union ixgbe_adv_rx_desc *rx_desc;
4032         u64 rdba = ring->dma;
4033         u32 rxdctl;
4034         u8 reg_idx = ring->reg_idx;
4035
4036         /* disable queue to avoid use of these values while updating state */
4037         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4038         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4039
4040         /* write value back with RXDCTL.ENABLE bit cleared */
4041         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4042         IXGBE_WRITE_FLUSH(hw);
4043
4044         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4045         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4046         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4047                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4048         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4049         IXGBE_WRITE_FLUSH(hw);
4050
4051         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4052         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4053         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4054
4055         ixgbe_configure_srrctl(adapter, ring);
4056         ixgbe_configure_rscctl(adapter, ring);
4057
4058         if (hw->mac.type == ixgbe_mac_82598EB) {
4059                 /*
4060                  * enable cache line friendly hardware writes:
4061                  * PTHRESH=32 descriptors (half the internal cache),
4062                  * this also removes ugly rx_no_buffer_count increment
4063                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4064                  * WTHRESH=8 burst writeback up to two cache lines
4065                  */
4066                 rxdctl &= ~0x3FFFFF;
4067                 rxdctl |=  0x080420;
4068 #if (PAGE_SIZE < 8192)
4069         /* RXDCTL.RLPML does not work on 82599 */
4070         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4071                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4072                             IXGBE_RXDCTL_RLPML_EN);
4073
4074                 /* Limit the maximum frame size so we don't overrun the skb.
4075                  * This can happen in SRIOV mode when the MTU of the VF is
4076                  * higher than the MTU of the PF.
4077                  */
4078                 if (ring_uses_build_skb(ring) &&
4079                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4080                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4081                                   IXGBE_RXDCTL_RLPML_EN;
4082 #endif
4083         }
4084
4085         /* initialize rx_buffer_info */
4086         memset(ring->rx_buffer_info, 0,
4087                sizeof(struct ixgbe_rx_buffer) * ring->count);
4088
4089         /* initialize Rx descriptor 0 */
4090         rx_desc = IXGBE_RX_DESC(ring, 0);
4091         rx_desc->wb.upper.length = 0;
4092
4093         /* enable receive descriptor ring */
4094         rxdctl |= IXGBE_RXDCTL_ENABLE;
4095         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4096
4097         ixgbe_rx_desc_queue_enable(adapter, ring);
4098         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4099 }
4100
4101 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4102 {
4103         struct ixgbe_hw *hw = &adapter->hw;
4104         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4105         u16 pool = adapter->num_rx_pools;
4106
4107         /* PSRTYPE must be initialized in non 82598 adapters */
4108         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4109                       IXGBE_PSRTYPE_UDPHDR |
4110                       IXGBE_PSRTYPE_IPV4HDR |
4111                       IXGBE_PSRTYPE_L2HDR |
4112                       IXGBE_PSRTYPE_IPV6HDR;
4113
4114         if (hw->mac.type == ixgbe_mac_82598EB)
4115                 return;
4116
4117         if (rss_i > 3)
4118                 psrtype |= 2u << 29;
4119         else if (rss_i > 1)
4120                 psrtype |= 1u << 29;
4121
4122         while (pool--)
4123                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4124 }
4125
4126 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4127 {
4128         struct ixgbe_hw *hw = &adapter->hw;
4129         u16 pool = adapter->num_rx_pools;
4130         u32 reg_offset, vf_shift, vmolr;
4131         u32 gcr_ext, vmdctl;
4132         int i;
4133
4134         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4135                 return;
4136
4137         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4138         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4139         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4140         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4141         vmdctl |= IXGBE_VT_CTL_REPLEN;
4142         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4143
4144         /* accept untagged packets until a vlan tag is
4145          * specifically set for the VMDQ queue/pool
4146          */
4147         vmolr = IXGBE_VMOLR_AUPE;
4148         while (pool--)
4149                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4150
4151         vf_shift = VMDQ_P(0) % 32;
4152         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4153
4154         /* Enable only the PF's pool for Tx/Rx */
4155         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4156         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4157         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4158         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4159         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4160                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4161
4162         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4163         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4164
4165         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4166         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4167
4168         /*
4169          * Set up VF register offsets for selected VT Mode,
4170          * i.e. 32 or 64 VFs for SR-IOV
4171          */
4172         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4173         case IXGBE_82599_VMDQ_8Q_MASK:
4174                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4175                 break;
4176         case IXGBE_82599_VMDQ_4Q_MASK:
4177                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4178                 break;
4179         default:
4180                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4181                 break;
4182         }
4183
4184         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4185
4186         for (i = 0; i < adapter->num_vfs; i++) {
4187                 /* configure spoof checking */
4188                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4189                                           adapter->vfinfo[i].spoofchk_enabled);
4190
4191                 /* Enable/Disable RSS query feature  */
4192                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4193                                           adapter->vfinfo[i].rss_query_enabled);
4194         }
4195 }
4196
4197 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4198 {
4199         struct ixgbe_hw *hw = &adapter->hw;
4200         struct net_device *netdev = adapter->netdev;
4201         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4202         struct ixgbe_ring *rx_ring;
4203         int i;
4204         u32 mhadd, hlreg0;
4205
4206 #ifdef IXGBE_FCOE
4207         /* adjust max frame to be able to do baby jumbo for FCoE */
4208         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4209             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4210                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4211
4212 #endif /* IXGBE_FCOE */
4213
4214         /* adjust max frame to be at least the size of a standard frame */
4215         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4216                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4217
4218         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4219         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4220                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4221                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4222
4223                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4224         }
4225
4226         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4227         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4228         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4229         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4230
4231         /*
4232          * Setup the HW Rx Head and Tail Descriptor Pointers and
4233          * the Base and Length of the Rx Descriptor Ring
4234          */
4235         for (i = 0; i < adapter->num_rx_queues; i++) {
4236                 rx_ring = adapter->rx_ring[i];
4237
4238                 clear_ring_rsc_enabled(rx_ring);
4239                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4240                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4241
4242                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4243                         set_ring_rsc_enabled(rx_ring);
4244
4245                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4246                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4247
4248                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4249                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4250                         continue;
4251
4252                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4253
4254 #if (PAGE_SIZE < 8192)
4255                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4256                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4257
4258                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4259                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4260                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4261 #endif
4262         }
4263 }
4264
4265 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4266 {
4267         struct ixgbe_hw *hw = &adapter->hw;
4268         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4269
4270         switch (hw->mac.type) {
4271         case ixgbe_mac_82598EB:
4272                 /*
4273                  * For VMDq support of different descriptor types or
4274                  * buffer sizes through the use of multiple SRRCTL
4275                  * registers, RDRXCTL.MVMEN must be set to 1
4276                  *
4277                  * also, the manual doesn't mention it clearly but DCA hints
4278                  * will only use queue 0's tags unless this bit is set.  Side
4279                  * effects of setting this bit are only that SRRCTL must be
4280                  * fully programmed [0..15]
4281                  */
4282                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4283                 break;
4284         case ixgbe_mac_X550:
4285         case ixgbe_mac_X550EM_x:
4286         case ixgbe_mac_x550em_a:
4287                 if (adapter->num_vfs)
4288                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4289                 /* fall through */
4290         case ixgbe_mac_82599EB:
4291         case ixgbe_mac_X540:
4292                 /* Disable RSC for ACK packets */
4293                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4294                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4295                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4296                 /* hardware requires some bits to be set by default */
4297                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4298                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4299                 break;
4300         default:
4301                 /* We should do nothing since we don't know this hardware */
4302                 return;
4303         }
4304
4305         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4306 }
4307
4308 /**
4309  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4310  * @adapter: board private structure
4311  *
4312  * Configure the Rx unit of the MAC after a reset.
4313  **/
4314 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4315 {
4316         struct ixgbe_hw *hw = &adapter->hw;
4317         int i;
4318         u32 rxctrl, rfctl;
4319
4320         /* disable receives while setting up the descriptors */
4321         hw->mac.ops.disable_rx(hw);
4322
4323         ixgbe_setup_psrtype(adapter);
4324         ixgbe_setup_rdrxctl(adapter);
4325
4326         /* RSC Setup */
4327         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4328         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4329         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4330                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4331
4332         /* disable NFS filtering */
4333         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4334         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4335
4336         /* Program registers for the distribution of queues */
4337         ixgbe_setup_mrqc(adapter);
4338
4339         /* set_rx_buffer_len must be called before ring initialization */
4340         ixgbe_set_rx_buffer_len(adapter);
4341
4342         /*
4343          * Setup the HW Rx Head and Tail Descriptor Pointers and
4344          * the Base and Length of the Rx Descriptor Ring
4345          */
4346         for (i = 0; i < adapter->num_rx_queues; i++)
4347                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4348
4349         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4350         /* disable drop enable for 82598 parts */
4351         if (hw->mac.type == ixgbe_mac_82598EB)
4352                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4353
4354         /* enable all receives */
4355         rxctrl |= IXGBE_RXCTRL_RXEN;
4356         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4357 }
4358
4359 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4360                                  __be16 proto, u16 vid)
4361 {
4362         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4363         struct ixgbe_hw *hw = &adapter->hw;
4364
4365         /* add VID to filter table */
4366         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4367                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4368
4369         set_bit(vid, adapter->active_vlans);
4370
4371         return 0;
4372 }
4373
4374 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4375 {
4376         u32 vlvf;
4377         int idx;
4378
4379         /* short cut the special case */
4380         if (vlan == 0)
4381                 return 0;
4382
4383         /* Search for the vlan id in the VLVF entries */
4384         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4385                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4386                 if ((vlvf & VLAN_VID_MASK) == vlan)
4387                         break;
4388         }
4389
4390         return idx;
4391 }
4392
4393 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4394 {
4395         struct ixgbe_hw *hw = &adapter->hw;
4396         u32 bits, word;
4397         int idx;
4398
4399         idx = ixgbe_find_vlvf_entry(hw, vid);
4400         if (!idx)
4401                 return;
4402
4403         /* See if any other pools are set for this VLAN filter
4404          * entry other than the PF.
4405          */
4406         word = idx * 2 + (VMDQ_P(0) / 32);
4407         bits = ~BIT(VMDQ_P(0) % 32);
4408         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4409
4410         /* Disable the filter so this falls into the default pool. */
4411         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4412                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4413                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4414                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4415         }
4416 }
4417
4418 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4419                                   __be16 proto, u16 vid)
4420 {
4421         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4422         struct ixgbe_hw *hw = &adapter->hw;
4423
4424         /* remove VID from filter table */
4425         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4426                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4427
4428         clear_bit(vid, adapter->active_vlans);
4429
4430         return 0;
4431 }
4432
4433 /**
4434  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4435  * @adapter: driver data
4436  */
4437 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4438 {
4439         struct ixgbe_hw *hw = &adapter->hw;
4440         u32 vlnctrl;
4441         int i, j;
4442
4443         switch (hw->mac.type) {
4444         case ixgbe_mac_82598EB:
4445                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4446                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4447                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4448                 break;
4449         case ixgbe_mac_82599EB:
4450         case ixgbe_mac_X540:
4451         case ixgbe_mac_X550:
4452         case ixgbe_mac_X550EM_x:
4453         case ixgbe_mac_x550em_a:
4454                 for (i = 0; i < adapter->num_rx_queues; i++) {
4455                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4456
4457                         if (!netif_is_ixgbe(ring->netdev))
4458                                 continue;
4459
4460                         j = ring->reg_idx;
4461                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4462                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4463                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4464                 }
4465                 break;
4466         default:
4467                 break;
4468         }
4469 }
4470
4471 /**
4472  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4473  * @adapter: driver data
4474  */
4475 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4476 {
4477         struct ixgbe_hw *hw = &adapter->hw;
4478         u32 vlnctrl;
4479         int i, j;
4480
4481         switch (hw->mac.type) {
4482         case ixgbe_mac_82598EB:
4483                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4484                 vlnctrl |= IXGBE_VLNCTRL_VME;
4485                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4486                 break;
4487         case ixgbe_mac_82599EB:
4488         case ixgbe_mac_X540:
4489         case ixgbe_mac_X550:
4490         case ixgbe_mac_X550EM_x:
4491         case ixgbe_mac_x550em_a:
4492                 for (i = 0; i < adapter->num_rx_queues; i++) {
4493                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4494
4495                         if (!netif_is_ixgbe(ring->netdev))
4496                                 continue;
4497
4498                         j = ring->reg_idx;
4499                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4500                         vlnctrl |= IXGBE_RXDCTL_VME;
4501                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4502                 }
4503                 break;
4504         default:
4505                 break;
4506         }
4507 }
4508
4509 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4510 {
4511         struct ixgbe_hw *hw = &adapter->hw;
4512         u32 vlnctrl, i;
4513
4514         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4515
4516         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4517         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4518                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4519                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4520         } else {
4521                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4522                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4523                 return;
4524         }
4525
4526         /* Nothing to do for 82598 */
4527         if (hw->mac.type == ixgbe_mac_82598EB)
4528                 return;
4529
4530         /* We are already in VLAN promisc, nothing to do */
4531         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4532                 return;
4533
4534         /* Set flag so we don't redo unnecessary work */
4535         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4536
4537         /* Add PF to all active pools */
4538         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4539                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4540                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4541
4542                 vlvfb |= BIT(VMDQ_P(0) % 32);
4543                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4544         }
4545
4546         /* Set all bits in the VLAN filter table array */
4547         for (i = hw->mac.vft_size; i--;)
4548                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4549 }
4550
4551 #define VFTA_BLOCK_SIZE 8
4552 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4553 {
4554         struct ixgbe_hw *hw = &adapter->hw;
4555         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4556         u32 vid_start = vfta_offset * 32;
4557         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4558         u32 i, vid, word, bits;
4559
4560         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4561                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4562
4563                 /* pull VLAN ID from VLVF */
4564                 vid = vlvf & VLAN_VID_MASK;
4565
4566                 /* only concern outselves with a certain range */
4567                 if (vid < vid_start || vid >= vid_end)
4568                         continue;
4569
4570                 if (vlvf) {
4571                         /* record VLAN ID in VFTA */
4572                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4573
4574                         /* if PF is part of this then continue */
4575                         if (test_bit(vid, adapter->active_vlans))
4576                                 continue;
4577                 }
4578
4579                 /* remove PF from the pool */
4580                 word = i * 2 + VMDQ_P(0) / 32;
4581                 bits = ~BIT(VMDQ_P(0) % 32);
4582                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4583                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4584         }
4585
4586         /* extract values from active_vlans and write back to VFTA */
4587         for (i = VFTA_BLOCK_SIZE; i--;) {
4588                 vid = (vfta_offset + i) * 32;
4589                 word = vid / BITS_PER_LONG;
4590                 bits = vid % BITS_PER_LONG;
4591
4592                 vfta[i] |= adapter->active_vlans[word] >> bits;
4593
4594                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4595         }
4596 }
4597
4598 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4599 {
4600         struct ixgbe_hw *hw = &adapter->hw;
4601         u32 vlnctrl, i;
4602
4603         /* Set VLAN filtering to enabled */
4604         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4605         vlnctrl |= IXGBE_VLNCTRL_VFE;
4606         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4607
4608         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4609             hw->mac.type == ixgbe_mac_82598EB)
4610                 return;
4611
4612         /* We are not in VLAN promisc, nothing to do */
4613         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4614                 return;
4615
4616         /* Set flag so we don't redo unnecessary work */
4617         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4618
4619         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4620                 ixgbe_scrub_vfta(adapter, i);
4621 }
4622
4623 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4624 {
4625         u16 vid = 1;
4626
4627         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4628
4629         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4630                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4631 }
4632
4633 /**
4634  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4635  * @netdev: network interface device structure
4636  *
4637  * Writes multicast address list to the MTA hash table.
4638  * Returns: -ENOMEM on failure
4639  *                0 on no addresses written
4640  *                X on writing X addresses to MTA
4641  **/
4642 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4643 {
4644         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4645         struct ixgbe_hw *hw = &adapter->hw;
4646
4647         if (!netif_running(netdev))
4648                 return 0;
4649
4650         if (hw->mac.ops.update_mc_addr_list)
4651                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4652         else
4653                 return -ENOMEM;
4654
4655 #ifdef CONFIG_PCI_IOV
4656         ixgbe_restore_vf_multicasts(adapter);
4657 #endif
4658
4659         return netdev_mc_count(netdev);
4660 }
4661
4662 #ifdef CONFIG_PCI_IOV
4663 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4664 {
4665         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4666         struct ixgbe_hw *hw = &adapter->hw;
4667         int i;
4668
4669         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4670                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4671
4672                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4673                         hw->mac.ops.set_rar(hw, i,
4674                                             mac_table->addr,
4675                                             mac_table->pool,
4676                                             IXGBE_RAH_AV);
4677                 else
4678                         hw->mac.ops.clear_rar(hw, i);
4679         }
4680 }
4681
4682 #endif
4683 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4684 {
4685         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4686         struct ixgbe_hw *hw = &adapter->hw;
4687         int i;
4688
4689         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4690                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4691                         continue;
4692
4693                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4694
4695                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4696                         hw->mac.ops.set_rar(hw, i,
4697                                             mac_table->addr,
4698                                             mac_table->pool,
4699                                             IXGBE_RAH_AV);
4700                 else
4701                         hw->mac.ops.clear_rar(hw, i);
4702         }
4703 }
4704
4705 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4706 {
4707         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4708         struct ixgbe_hw *hw = &adapter->hw;
4709         int i;
4710
4711         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4712                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4713                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4714         }
4715
4716         ixgbe_sync_mac_table(adapter);
4717 }
4718
4719 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4720 {
4721         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4722         struct ixgbe_hw *hw = &adapter->hw;
4723         int i, count = 0;
4724
4725         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4726                 /* do not count default RAR as available */
4727                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4728                         continue;
4729
4730                 /* only count unused and addresses that belong to us */
4731                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4732                         if (mac_table->pool != pool)
4733                                 continue;
4734                 }
4735
4736                 count++;
4737         }
4738
4739         return count;
4740 }
4741
4742 /* this function destroys the first RAR entry */
4743 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4744 {
4745         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4746         struct ixgbe_hw *hw = &adapter->hw;
4747
4748         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4749         mac_table->pool = VMDQ_P(0);
4750
4751         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4752
4753         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4754                             IXGBE_RAH_AV);
4755 }
4756
4757 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4758                          const u8 *addr, u16 pool)
4759 {
4760         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4761         struct ixgbe_hw *hw = &adapter->hw;
4762         int i;
4763
4764         if (is_zero_ether_addr(addr))
4765                 return -EINVAL;
4766
4767         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4768                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4769                         continue;
4770
4771                 ether_addr_copy(mac_table->addr, addr);
4772                 mac_table->pool = pool;
4773
4774                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4775                                     IXGBE_MAC_STATE_IN_USE;
4776
4777                 ixgbe_sync_mac_table(adapter);
4778
4779                 return i;
4780         }
4781
4782         return -ENOMEM;
4783 }
4784
4785 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4786                          const u8 *addr, u16 pool)
4787 {
4788         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4789         struct ixgbe_hw *hw = &adapter->hw;
4790         int i;
4791
4792         if (is_zero_ether_addr(addr))
4793                 return -EINVAL;
4794
4795         /* search table for addr, if found clear IN_USE flag and sync */
4796         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4797                 /* we can only delete an entry if it is in use */
4798                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4799                         continue;
4800                 /* we only care about entries that belong to the given pool */
4801                 if (mac_table->pool != pool)
4802                         continue;
4803                 /* we only care about a specific MAC address */
4804                 if (!ether_addr_equal(addr, mac_table->addr))
4805                         continue;
4806
4807                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4808                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4809
4810                 ixgbe_sync_mac_table(adapter);
4811
4812                 return 0;
4813         }
4814
4815         return -ENOMEM;
4816 }
4817
4818 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4819 {
4820         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4821         int ret;
4822
4823         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4824
4825         return min_t(int, ret, 0);
4826 }
4827
4828 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4829 {
4830         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4831
4832         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4833
4834         return 0;
4835 }
4836
4837 /**
4838  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4839  * @netdev: network interface device structure
4840  *
4841  * The set_rx_method entry point is called whenever the unicast/multicast
4842  * address list or the network interface flags are updated.  This routine is
4843  * responsible for configuring the hardware for proper unicast, multicast and
4844  * promiscuous mode.
4845  **/
4846 void ixgbe_set_rx_mode(struct net_device *netdev)
4847 {
4848         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4849         struct ixgbe_hw *hw = &adapter->hw;
4850         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4851         netdev_features_t features = netdev->features;
4852         int count;
4853
4854         /* Check for Promiscuous and All Multicast modes */
4855         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4856
4857         /* set all bits that we expect to always be set */
4858         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4859         fctrl |= IXGBE_FCTRL_BAM;
4860         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4861         fctrl |= IXGBE_FCTRL_PMCF;
4862
4863         /* clear the bits we are changing the status of */
4864         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4865         if (netdev->flags & IFF_PROMISC) {
4866                 hw->addr_ctrl.user_set_promisc = true;
4867                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4868                 vmolr |= IXGBE_VMOLR_MPE;
4869                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4870         } else {
4871                 if (netdev->flags & IFF_ALLMULTI) {
4872                         fctrl |= IXGBE_FCTRL_MPE;
4873                         vmolr |= IXGBE_VMOLR_MPE;
4874                 }
4875                 hw->addr_ctrl.user_set_promisc = false;
4876         }
4877
4878         /*
4879          * Write addresses to available RAR registers, if there is not
4880          * sufficient space to store all the addresses then enable
4881          * unicast promiscuous mode
4882          */
4883         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4884                 fctrl |= IXGBE_FCTRL_UPE;
4885                 vmolr |= IXGBE_VMOLR_ROPE;
4886         }
4887
4888         /* Write addresses to the MTA, if the attempt fails
4889          * then we should just turn on promiscuous mode so
4890          * that we can at least receive multicast traffic
4891          */
4892         count = ixgbe_write_mc_addr_list(netdev);
4893         if (count < 0) {
4894                 fctrl |= IXGBE_FCTRL_MPE;
4895                 vmolr |= IXGBE_VMOLR_MPE;
4896         } else if (count) {
4897                 vmolr |= IXGBE_VMOLR_ROMPE;
4898         }
4899
4900         if (hw->mac.type != ixgbe_mac_82598EB) {
4901                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4902                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4903                            IXGBE_VMOLR_ROPE);
4904                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4905         }
4906
4907         /* This is useful for sniffing bad packets. */
4908         if (features & NETIF_F_RXALL) {
4909                 /* UPE and MPE will be handled by normal PROMISC logic
4910                  * in e1000e_set_rx_mode */
4911                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4912                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4913                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4914
4915                 fctrl &= ~(IXGBE_FCTRL_DPF);
4916                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4917         }
4918
4919         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4920
4921         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4922                 ixgbe_vlan_strip_enable(adapter);
4923         else
4924                 ixgbe_vlan_strip_disable(adapter);
4925
4926         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4927                 ixgbe_vlan_promisc_disable(adapter);
4928         else
4929                 ixgbe_vlan_promisc_enable(adapter);
4930 }
4931
4932 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4933 {
4934         int q_idx;
4935
4936         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4937                 napi_enable(&adapter->q_vector[q_idx]->napi);
4938 }
4939
4940 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4941 {
4942         int q_idx;
4943
4944         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4945                 napi_disable(&adapter->q_vector[q_idx]->napi);
4946 }
4947
4948 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4949 {
4950         struct ixgbe_hw *hw = &adapter->hw;
4951         u32 vxlanctrl;
4952
4953         if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4954                                 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4955                 return;
4956
4957         vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
4958         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4959
4960         if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4961                 adapter->vxlan_port = 0;
4962
4963         if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4964                 adapter->geneve_port = 0;
4965 }
4966
4967 #ifdef CONFIG_IXGBE_DCB
4968 /**
4969  * ixgbe_configure_dcb - Configure DCB hardware
4970  * @adapter: ixgbe adapter struct
4971  *
4972  * This is called by the driver on open to configure the DCB hardware.
4973  * This is also called by the gennetlink interface when reconfiguring
4974  * the DCB state.
4975  */
4976 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4977 {
4978         struct ixgbe_hw *hw = &adapter->hw;
4979         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4980
4981         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4982                 if (hw->mac.type == ixgbe_mac_82598EB)
4983                         netif_set_gso_max_size(adapter->netdev, 65536);
4984                 return;
4985         }
4986
4987         if (hw->mac.type == ixgbe_mac_82598EB)
4988                 netif_set_gso_max_size(adapter->netdev, 32768);
4989
4990 #ifdef IXGBE_FCOE
4991         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4992                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4993 #endif
4994
4995         /* reconfigure the hardware */
4996         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4997                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4998                                                 DCB_TX_CONFIG);
4999                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5000                                                 DCB_RX_CONFIG);
5001                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5002         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5003                 ixgbe_dcb_hw_ets(&adapter->hw,
5004                                  adapter->ixgbe_ieee_ets,
5005                                  max_frame);
5006                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5007                                         adapter->ixgbe_ieee_pfc->pfc_en,
5008                                         adapter->ixgbe_ieee_ets->prio_tc);
5009         }
5010
5011         /* Enable RSS Hash per TC */
5012         if (hw->mac.type != ixgbe_mac_82598EB) {
5013                 u32 msb = 0;
5014                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5015
5016                 while (rss_i) {
5017                         msb++;
5018                         rss_i >>= 1;
5019                 }
5020
5021                 /* write msb to all 8 TCs in one write */
5022                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5023         }
5024 }
5025 #endif
5026
5027 /* Additional bittime to account for IXGBE framing */
5028 #define IXGBE_ETH_FRAMING 20
5029
5030 /**
5031  * ixgbe_hpbthresh - calculate high water mark for flow control
5032  *
5033  * @adapter: board private structure to calculate for
5034  * @pb: packet buffer to calculate
5035  */
5036 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5037 {
5038         struct ixgbe_hw *hw = &adapter->hw;
5039         struct net_device *dev = adapter->netdev;
5040         int link, tc, kb, marker;
5041         u32 dv_id, rx_pba;
5042
5043         /* Calculate max LAN frame size */
5044         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5045
5046 #ifdef IXGBE_FCOE
5047         /* FCoE traffic class uses FCOE jumbo frames */
5048         if ((dev->features & NETIF_F_FCOE_MTU) &&
5049             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5050             (pb == ixgbe_fcoe_get_tc(adapter)))
5051                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5052 #endif
5053
5054         /* Calculate delay value for device */
5055         switch (hw->mac.type) {
5056         case ixgbe_mac_X540:
5057         case ixgbe_mac_X550:
5058         case ixgbe_mac_X550EM_x:
5059         case ixgbe_mac_x550em_a:
5060                 dv_id = IXGBE_DV_X540(link, tc);
5061                 break;
5062         default:
5063                 dv_id = IXGBE_DV(link, tc);
5064                 break;
5065         }
5066
5067         /* Loopback switch introduces additional latency */
5068         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5069                 dv_id += IXGBE_B2BT(tc);
5070
5071         /* Delay value is calculated in bit times convert to KB */
5072         kb = IXGBE_BT2KB(dv_id);
5073         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5074
5075         marker = rx_pba - kb;
5076
5077         /* It is possible that the packet buffer is not large enough
5078          * to provide required headroom. In this case throw an error
5079          * to user and a do the best we can.
5080          */
5081         if (marker < 0) {
5082                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5083                             "headroom to support flow control."
5084                             "Decrease MTU or number of traffic classes\n", pb);
5085                 marker = tc + 1;
5086         }
5087
5088         return marker;
5089 }
5090
5091 /**
5092  * ixgbe_lpbthresh - calculate low water mark for for flow control
5093  *
5094  * @adapter: board private structure to calculate for
5095  * @pb: packet buffer to calculate
5096  */
5097 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5098 {
5099         struct ixgbe_hw *hw = &adapter->hw;
5100         struct net_device *dev = adapter->netdev;
5101         int tc;
5102         u32 dv_id;
5103
5104         /* Calculate max LAN frame size */
5105         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5106
5107 #ifdef IXGBE_FCOE
5108         /* FCoE traffic class uses FCOE jumbo frames */
5109         if ((dev->features & NETIF_F_FCOE_MTU) &&
5110             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5111             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5112                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5113 #endif
5114
5115         /* Calculate delay value for device */
5116         switch (hw->mac.type) {
5117         case ixgbe_mac_X540:
5118         case ixgbe_mac_X550:
5119         case ixgbe_mac_X550EM_x:
5120         case ixgbe_mac_x550em_a:
5121                 dv_id = IXGBE_LOW_DV_X540(tc);
5122                 break;
5123         default:
5124                 dv_id = IXGBE_LOW_DV(tc);
5125                 break;
5126         }
5127
5128         /* Delay value is calculated in bit times convert to KB */
5129         return IXGBE_BT2KB(dv_id);
5130 }
5131
5132 /*
5133  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5134  */
5135 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5136 {
5137         struct ixgbe_hw *hw = &adapter->hw;
5138         int num_tc = adapter->hw_tcs;
5139         int i;
5140
5141         if (!num_tc)
5142                 num_tc = 1;
5143
5144         for (i = 0; i < num_tc; i++) {
5145                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5146                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5147
5148                 /* Low water marks must not be larger than high water marks */
5149                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5150                         hw->fc.low_water[i] = 0;
5151         }
5152
5153         for (; i < MAX_TRAFFIC_CLASS; i++)
5154                 hw->fc.high_water[i] = 0;
5155 }
5156
5157 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5158 {
5159         struct ixgbe_hw *hw = &adapter->hw;
5160         int hdrm;
5161         u8 tc = adapter->hw_tcs;
5162
5163         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5164             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5165                 hdrm = 32 << adapter->fdir_pballoc;
5166         else
5167                 hdrm = 0;
5168
5169         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5170         ixgbe_pbthresh_setup(adapter);
5171 }
5172
5173 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5174 {
5175         struct ixgbe_hw *hw = &adapter->hw;
5176         struct hlist_node *node2;
5177         struct ixgbe_fdir_filter *filter;
5178
5179         spin_lock(&adapter->fdir_perfect_lock);
5180
5181         if (!hlist_empty(&adapter->fdir_filter_list))
5182                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5183
5184         hlist_for_each_entry_safe(filter, node2,
5185                                   &adapter->fdir_filter_list, fdir_node) {
5186                 ixgbe_fdir_write_perfect_filter_82599(hw,
5187                                 &filter->filter,
5188                                 filter->sw_idx,
5189                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5190                                 IXGBE_FDIR_DROP_QUEUE :
5191                                 adapter->rx_ring[filter->action]->reg_idx);
5192         }
5193
5194         spin_unlock(&adapter->fdir_perfect_lock);
5195 }
5196
5197 /**
5198  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5199  * @rx_ring: ring to free buffers from
5200  **/
5201 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5202 {
5203         u16 i = rx_ring->next_to_clean;
5204         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5205
5206         /* Free all the Rx ring sk_buffs */
5207         while (i != rx_ring->next_to_alloc) {
5208                 if (rx_buffer->skb) {
5209                         struct sk_buff *skb = rx_buffer->skb;
5210                         if (IXGBE_CB(skb)->page_released)
5211                                 dma_unmap_page_attrs(rx_ring->dev,
5212                                                      IXGBE_CB(skb)->dma,
5213                                                      ixgbe_rx_pg_size(rx_ring),
5214                                                      DMA_FROM_DEVICE,
5215                                                      IXGBE_RX_DMA_ATTR);
5216                         dev_kfree_skb(skb);
5217                 }
5218
5219                 /* Invalidate cache lines that may have been written to by
5220                  * device so that we avoid corrupting memory.
5221                  */
5222                 dma_sync_single_range_for_cpu(rx_ring->dev,
5223                                               rx_buffer->dma,
5224                                               rx_buffer->page_offset,
5225                                               ixgbe_rx_bufsz(rx_ring),
5226                                               DMA_FROM_DEVICE);
5227
5228                 /* free resources associated with mapping */
5229                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5230                                      ixgbe_rx_pg_size(rx_ring),
5231                                      DMA_FROM_DEVICE,
5232                                      IXGBE_RX_DMA_ATTR);
5233                 __page_frag_cache_drain(rx_buffer->page,
5234                                         rx_buffer->pagecnt_bias);
5235
5236                 i++;
5237                 rx_buffer++;
5238                 if (i == rx_ring->count) {
5239                         i = 0;
5240                         rx_buffer = rx_ring->rx_buffer_info;
5241                 }
5242         }
5243
5244         rx_ring->next_to_alloc = 0;
5245         rx_ring->next_to_clean = 0;
5246         rx_ring->next_to_use = 0;
5247 }
5248
5249 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5250                              struct ixgbe_fwd_adapter *accel)
5251 {
5252         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5253         int num_tc = netdev_get_num_tc(adapter->netdev);
5254         struct net_device *vdev = accel->netdev;
5255         int i, baseq, err;
5256
5257         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5258         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5259                    accel->pool, adapter->num_rx_pools,
5260                    baseq, baseq + adapter->num_rx_queues_per_pool);
5261
5262         accel->rx_base_queue = baseq;
5263         accel->tx_base_queue = baseq;
5264
5265         /* record configuration for macvlan interface in vdev */
5266         for (i = 0; i < num_tc; i++)
5267                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5268                                              i, rss_i, baseq + (rss_i * i));
5269
5270         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5271                 adapter->rx_ring[baseq + i]->netdev = vdev;
5272
5273         /* Guarantee all rings are updated before we update the
5274          * MAC address filter.
5275          */
5276         wmb();
5277
5278         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5279          * need to only treat it as an error value if it is negative.
5280          */
5281         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5282                                    VMDQ_P(accel->pool));
5283         if (err >= 0)
5284                 return 0;
5285
5286         /* if we cannot add the MAC rule then disable the offload */
5287         macvlan_release_l2fw_offload(vdev);
5288
5289         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5290                 adapter->rx_ring[baseq + i]->netdev = NULL;
5291
5292         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5293
5294         /* unbind the queues and drop the subordinate channel config */
5295         netdev_unbind_sb_channel(adapter->netdev, vdev);
5296         netdev_set_sb_channel(vdev, 0);
5297
5298         clear_bit(accel->pool, adapter->fwd_bitmask);
5299         kfree(accel);
5300
5301         return err;
5302 }
5303
5304 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5305 {
5306         struct ixgbe_adapter *adapter = data;
5307         struct ixgbe_fwd_adapter *accel;
5308
5309         if (!netif_is_macvlan(vdev))
5310                 return 0;
5311
5312         accel = macvlan_accel_priv(vdev);
5313         if (!accel)
5314                 return 0;
5315
5316         ixgbe_fwd_ring_up(adapter, accel);
5317
5318         return 0;
5319 }
5320
5321 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5322 {
5323         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5324                                       ixgbe_macvlan_up, adapter);
5325 }
5326
5327 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5328 {
5329         struct ixgbe_hw *hw = &adapter->hw;
5330
5331         ixgbe_configure_pb(adapter);
5332 #ifdef CONFIG_IXGBE_DCB
5333         ixgbe_configure_dcb(adapter);
5334 #endif
5335         /*
5336          * We must restore virtualization before VLANs or else
5337          * the VLVF registers will not be populated
5338          */
5339         ixgbe_configure_virtualization(adapter);
5340
5341         ixgbe_set_rx_mode(adapter->netdev);
5342         ixgbe_restore_vlan(adapter);
5343         ixgbe_ipsec_restore(adapter);
5344
5345         switch (hw->mac.type) {
5346         case ixgbe_mac_82599EB:
5347         case ixgbe_mac_X540:
5348                 hw->mac.ops.disable_rx_buff(hw);
5349                 break;
5350         default:
5351                 break;
5352         }
5353
5354         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5355                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5356                                                 adapter->fdir_pballoc);
5357         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5358                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5359                                               adapter->fdir_pballoc);
5360                 ixgbe_fdir_filter_restore(adapter);
5361         }
5362
5363         switch (hw->mac.type) {
5364         case ixgbe_mac_82599EB:
5365         case ixgbe_mac_X540:
5366                 hw->mac.ops.enable_rx_buff(hw);
5367                 break;
5368         default:
5369                 break;
5370         }
5371
5372 #ifdef CONFIG_IXGBE_DCA
5373         /* configure DCA */
5374         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5375                 ixgbe_setup_dca(adapter);
5376 #endif /* CONFIG_IXGBE_DCA */
5377
5378 #ifdef IXGBE_FCOE
5379         /* configure FCoE L2 filters, redirection table, and Rx control */
5380         ixgbe_configure_fcoe(adapter);
5381
5382 #endif /* IXGBE_FCOE */
5383         ixgbe_configure_tx(adapter);
5384         ixgbe_configure_rx(adapter);
5385         ixgbe_configure_dfwd(adapter);
5386 }
5387
5388 /**
5389  * ixgbe_sfp_link_config - set up SFP+ link
5390  * @adapter: pointer to private adapter struct
5391  **/
5392 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5393 {
5394         /*
5395          * We are assuming the worst case scenario here, and that
5396          * is that an SFP was inserted/removed after the reset
5397          * but before SFP detection was enabled.  As such the best
5398          * solution is to just start searching as soon as we start
5399          */
5400         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5401                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5402
5403         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5404         adapter->sfp_poll_time = 0;
5405 }
5406
5407 /**
5408  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5409  * @hw: pointer to private hardware struct
5410  *
5411  * Returns 0 on success, negative on failure
5412  **/
5413 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5414 {
5415         u32 speed;
5416         bool autoneg, link_up = false;
5417         int ret = IXGBE_ERR_LINK_SETUP;
5418
5419         if (hw->mac.ops.check_link)
5420                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5421
5422         if (ret)
5423                 return ret;
5424
5425         speed = hw->phy.autoneg_advertised;
5426         if ((!speed) && (hw->mac.ops.get_link_capabilities))
5427                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5428                                                         &autoneg);
5429         if (ret)
5430                 return ret;
5431
5432         if (hw->mac.ops.setup_link)
5433                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5434
5435         return ret;
5436 }
5437
5438 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5439 {
5440         struct ixgbe_hw *hw = &adapter->hw;
5441         u32 gpie = 0;
5442
5443         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5444                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5445                        IXGBE_GPIE_OCD;
5446                 gpie |= IXGBE_GPIE_EIAME;
5447                 /*
5448                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5449                  * this saves a register write for every interrupt
5450                  */
5451                 switch (hw->mac.type) {
5452                 case ixgbe_mac_82598EB:
5453                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5454                         break;
5455                 case ixgbe_mac_82599EB:
5456                 case ixgbe_mac_X540:
5457                 case ixgbe_mac_X550:
5458                 case ixgbe_mac_X550EM_x:
5459                 case ixgbe_mac_x550em_a:
5460                 default:
5461                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5462                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5463                         break;
5464                 }
5465         } else {
5466                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5467                  * specifically only auto mask tx and rx interrupts */
5468                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5469         }
5470
5471         /* XXX: to interrupt immediately for EICS writes, enable this */
5472         /* gpie |= IXGBE_GPIE_EIMEN; */
5473
5474         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5475                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5476
5477                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5478                 case IXGBE_82599_VMDQ_8Q_MASK:
5479                         gpie |= IXGBE_GPIE_VTMODE_16;
5480                         break;
5481                 case IXGBE_82599_VMDQ_4Q_MASK:
5482                         gpie |= IXGBE_GPIE_VTMODE_32;
5483                         break;
5484                 default:
5485                         gpie |= IXGBE_GPIE_VTMODE_64;
5486                         break;
5487                 }
5488         }
5489
5490         /* Enable Thermal over heat sensor interrupt */
5491         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5492                 switch (adapter->hw.mac.type) {
5493                 case ixgbe_mac_82599EB:
5494                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5495                         break;
5496                 default:
5497                         break;
5498                 }
5499         }
5500
5501         /* Enable fan failure interrupt */
5502         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5503                 gpie |= IXGBE_SDP1_GPIEN(hw);
5504
5505         switch (hw->mac.type) {
5506         case ixgbe_mac_82599EB:
5507                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5508                 break;
5509         case ixgbe_mac_X550EM_x:
5510         case ixgbe_mac_x550em_a:
5511                 gpie |= IXGBE_SDP0_GPIEN_X540;
5512                 break;
5513         default:
5514                 break;
5515         }
5516
5517         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5518 }
5519
5520 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5521 {
5522         struct ixgbe_hw *hw = &adapter->hw;
5523         int err;
5524         u32 ctrl_ext;
5525
5526         ixgbe_get_hw_control(adapter);
5527         ixgbe_setup_gpie(adapter);
5528
5529         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5530                 ixgbe_configure_msix(adapter);
5531         else
5532                 ixgbe_configure_msi_and_legacy(adapter);
5533
5534         /* enable the optics for 82599 SFP+ fiber */
5535         if (hw->mac.ops.enable_tx_laser)
5536                 hw->mac.ops.enable_tx_laser(hw);
5537
5538         if (hw->phy.ops.set_phy_power)
5539                 hw->phy.ops.set_phy_power(hw, true);
5540
5541         smp_mb__before_atomic();
5542         clear_bit(__IXGBE_DOWN, &adapter->state);
5543         ixgbe_napi_enable_all(adapter);
5544
5545         if (ixgbe_is_sfp(hw)) {
5546                 ixgbe_sfp_link_config(adapter);
5547         } else {
5548                 err = ixgbe_non_sfp_link_config(hw);
5549                 if (err)
5550                         e_err(probe, "link_config FAILED %d\n", err);
5551         }
5552
5553         /* clear any pending interrupts, may auto mask */
5554         IXGBE_READ_REG(hw, IXGBE_EICR);
5555         ixgbe_irq_enable(adapter, true, true);
5556
5557         /*
5558          * If this adapter has a fan, check to see if we had a failure
5559          * before we enabled the interrupt.
5560          */
5561         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5562                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5563                 if (esdp & IXGBE_ESDP_SDP1)
5564                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5565         }
5566
5567         /* bring the link up in the watchdog, this could race with our first
5568          * link up interrupt but shouldn't be a problem */
5569         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5570         adapter->link_check_timeout = jiffies;
5571         mod_timer(&adapter->service_timer, jiffies);
5572
5573         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5574         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5575         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5576         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5577 }
5578
5579 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5580 {
5581         WARN_ON(in_interrupt());
5582         /* put off any impending NetWatchDogTimeout */
5583         netif_trans_update(adapter->netdev);
5584
5585         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5586                 usleep_range(1000, 2000);
5587         if (adapter->hw.phy.type == ixgbe_phy_fw)
5588                 ixgbe_watchdog_link_is_down(adapter);
5589         ixgbe_down(adapter);
5590         /*
5591          * If SR-IOV enabled then wait a bit before bringing the adapter
5592          * back up to give the VFs time to respond to the reset.  The
5593          * two second wait is based upon the watchdog timer cycle in
5594          * the VF driver.
5595          */
5596         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5597                 msleep(2000);
5598         ixgbe_up(adapter);
5599         clear_bit(__IXGBE_RESETTING, &adapter->state);
5600 }
5601
5602 void ixgbe_up(struct ixgbe_adapter *adapter)
5603 {
5604         /* hardware has been reset, we need to reload some things */
5605         ixgbe_configure(adapter);
5606
5607         ixgbe_up_complete(adapter);
5608 }
5609
5610 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5611 {
5612         u16 devctl2;
5613
5614         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5615
5616         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5617         case IXGBE_PCIDEVCTRL2_17_34s:
5618         case IXGBE_PCIDEVCTRL2_4_8s:
5619                 /* For now we cap the upper limit on delay to 2 seconds
5620                  * as we end up going up to 34 seconds of delay in worst
5621                  * case timeout value.
5622                  */
5623         case IXGBE_PCIDEVCTRL2_1_2s:
5624                 return 2000000ul;       /* 2.0 s */
5625         case IXGBE_PCIDEVCTRL2_260_520ms:
5626                 return 520000ul;        /* 520 ms */
5627         case IXGBE_PCIDEVCTRL2_65_130ms:
5628                 return 130000ul;        /* 130 ms */
5629         case IXGBE_PCIDEVCTRL2_16_32ms:
5630                 return 32000ul;         /* 32 ms */
5631         case IXGBE_PCIDEVCTRL2_1_2ms:
5632                 return 2000ul;          /* 2 ms */
5633         case IXGBE_PCIDEVCTRL2_50_100us:
5634                 return 100ul;           /* 100 us */
5635         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5636                 return 32000ul;         /* 32 ms */
5637         default:
5638                 break;
5639         }
5640
5641         /* We shouldn't need to hit this path, but just in case default as
5642          * though completion timeout is not supported and support 32ms.
5643          */
5644         return 32000ul;
5645 }
5646
5647 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5648 {
5649         unsigned long wait_delay, delay_interval;
5650         struct ixgbe_hw *hw = &adapter->hw;
5651         int i, wait_loop;
5652         u32 rxdctl;
5653
5654         /* disable receives */
5655         hw->mac.ops.disable_rx(hw);
5656
5657         if (ixgbe_removed(hw->hw_addr))
5658                 return;
5659
5660         /* disable all enabled Rx queues */
5661         for (i = 0; i < adapter->num_rx_queues; i++) {
5662                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5663                 u8 reg_idx = ring->reg_idx;
5664
5665                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5666                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5667                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5668
5669                 /* write value back with RXDCTL.ENABLE bit cleared */
5670                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5671         }
5672
5673         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5674         if (hw->mac.type == ixgbe_mac_82598EB &&
5675             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5676                 return;
5677
5678         /* Determine our minimum delay interval. We will increase this value
5679          * with each subsequent test. This way if the device returns quickly
5680          * we should spend as little time as possible waiting, however as
5681          * the time increases we will wait for larger periods of time.
5682          *
5683          * The trick here is that we increase the interval using the
5684          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5685          * of that wait is that it totals up to 100x whatever interval we
5686          * choose. Since our minimum wait is 100us we can just divide the
5687          * total timeout by 100 to get our minimum delay interval.
5688          */
5689         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5690
5691         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5692         wait_delay = delay_interval;
5693
5694         while (wait_loop--) {
5695                 usleep_range(wait_delay, wait_delay + 10);
5696                 wait_delay += delay_interval * 2;
5697                 rxdctl = 0;
5698
5699                 /* OR together the reading of all the active RXDCTL registers,
5700                  * and then test the result. We need the disable to complete
5701                  * before we start freeing the memory and invalidating the
5702                  * DMA mappings.
5703                  */
5704                 for (i = 0; i < adapter->num_rx_queues; i++) {
5705                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5706                         u8 reg_idx = ring->reg_idx;
5707
5708                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5709                 }
5710
5711                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5712                         return;
5713         }
5714
5715         e_err(drv,
5716               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5717 }
5718
5719 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5720 {
5721         unsigned long wait_delay, delay_interval;
5722         struct ixgbe_hw *hw = &adapter->hw;
5723         int i, wait_loop;
5724         u32 txdctl;
5725
5726         if (ixgbe_removed(hw->hw_addr))
5727                 return;
5728
5729         /* disable all enabled Tx queues */
5730         for (i = 0; i < adapter->num_tx_queues; i++) {
5731                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5732                 u8 reg_idx = ring->reg_idx;
5733
5734                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5735         }
5736
5737         /* disable all enabled XDP Tx queues */
5738         for (i = 0; i < adapter->num_xdp_queues; i++) {
5739                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5740                 u8 reg_idx = ring->reg_idx;
5741
5742                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5743         }
5744
5745         /* If the link is not up there shouldn't be much in the way of
5746          * pending transactions. Those that are left will be flushed out
5747          * when the reset logic goes through the flush sequence to clean out
5748          * the pending Tx transactions.
5749          */
5750         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5751                 goto dma_engine_disable;
5752
5753         /* Determine our minimum delay interval. We will increase this value
5754          * with each subsequent test. This way if the device returns quickly
5755          * we should spend as little time as possible waiting, however as
5756          * the time increases we will wait for larger periods of time.
5757          *
5758          * The trick here is that we increase the interval using the
5759          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5760          * of that wait is that it totals up to 100x whatever interval we
5761          * choose. Since our minimum wait is 100us we can just divide the
5762          * total timeout by 100 to get our minimum delay interval.
5763          */
5764         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5765
5766         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5767         wait_delay = delay_interval;
5768
5769         while (wait_loop--) {
5770                 usleep_range(wait_delay, wait_delay + 10);
5771                 wait_delay += delay_interval * 2;
5772                 txdctl = 0;
5773
5774                 /* OR together the reading of all the active TXDCTL registers,
5775                  * and then test the result. We need the disable to complete
5776                  * before we start freeing the memory and invalidating the
5777                  * DMA mappings.
5778                  */
5779                 for (i = 0; i < adapter->num_tx_queues; i++) {
5780                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5781                         u8 reg_idx = ring->reg_idx;
5782
5783                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5784                 }
5785                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5786                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5787                         u8 reg_idx = ring->reg_idx;
5788
5789                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5790                 }
5791
5792                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5793                         goto dma_engine_disable;
5794         }
5795
5796         e_err(drv,
5797               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5798
5799 dma_engine_disable:
5800         /* Disable the Tx DMA engine on 82599 and later MAC */
5801         switch (hw->mac.type) {
5802         case ixgbe_mac_82599EB:
5803         case ixgbe_mac_X540:
5804         case ixgbe_mac_X550:
5805         case ixgbe_mac_X550EM_x:
5806         case ixgbe_mac_x550em_a:
5807                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5808                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5809                                  ~IXGBE_DMATXCTL_TE));
5810                 /* fall through */
5811         default:
5812                 break;
5813         }
5814 }
5815
5816 void ixgbe_reset(struct ixgbe_adapter *adapter)
5817 {
5818         struct ixgbe_hw *hw = &adapter->hw;
5819         struct net_device *netdev = adapter->netdev;
5820         int err;
5821
5822         if (ixgbe_removed(hw->hw_addr))
5823                 return;
5824         /* lock SFP init bit to prevent race conditions with the watchdog */
5825         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5826                 usleep_range(1000, 2000);
5827
5828         /* clear all SFP and link config related flags while holding SFP_INIT */
5829         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5830                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5831         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5832
5833         err = hw->mac.ops.init_hw(hw);
5834         switch (err) {
5835         case 0:
5836         case IXGBE_ERR_SFP_NOT_PRESENT:
5837         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5838                 break;
5839         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5840                 e_dev_err("master disable timed out\n");
5841                 break;
5842         case IXGBE_ERR_EEPROM_VERSION:
5843                 /* We are running on a pre-production device, log a warning */
5844                 e_dev_warn("This device is a pre-production adapter/LOM. "
5845                            "Please be aware there may be issues associated with "
5846                            "your hardware.  If you are experiencing problems "
5847                            "please contact your Intel or hardware "
5848                            "representative who provided you with this "
5849                            "hardware.\n");
5850                 break;
5851         default:
5852                 e_dev_err("Hardware Error: %d\n", err);
5853         }
5854
5855         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5856
5857         /* flush entries out of MAC table */
5858         ixgbe_flush_sw_mac_table(adapter);
5859         __dev_uc_unsync(netdev, NULL);
5860
5861         /* do not flush user set addresses */
5862         ixgbe_mac_set_default_filter(adapter);
5863
5864         /* update SAN MAC vmdq pool selection */
5865         if (hw->mac.san_mac_rar_index)
5866                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5867
5868         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5869                 ixgbe_ptp_reset(adapter);
5870
5871         if (hw->phy.ops.set_phy_power) {
5872                 if (!netif_running(adapter->netdev) && !adapter->wol)
5873                         hw->phy.ops.set_phy_power(hw, false);
5874                 else
5875                         hw->phy.ops.set_phy_power(hw, true);
5876         }
5877 }
5878
5879 /**
5880  * ixgbe_clean_tx_ring - Free Tx Buffers
5881  * @tx_ring: ring to be cleaned
5882  **/
5883 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5884 {
5885         u16 i = tx_ring->next_to_clean;
5886         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5887
5888         while (i != tx_ring->next_to_use) {
5889                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5890
5891                 /* Free all the Tx ring sk_buffs */
5892                 if (ring_is_xdp(tx_ring))
5893                         xdp_return_frame(tx_buffer->xdpf);
5894                 else
5895                         dev_kfree_skb_any(tx_buffer->skb);
5896
5897                 /* unmap skb header data */
5898                 dma_unmap_single(tx_ring->dev,
5899                                  dma_unmap_addr(tx_buffer, dma),
5900                                  dma_unmap_len(tx_buffer, len),
5901                                  DMA_TO_DEVICE);
5902
5903                 /* check for eop_desc to determine the end of the packet */
5904                 eop_desc = tx_buffer->next_to_watch;
5905                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5906
5907                 /* unmap remaining buffers */
5908                 while (tx_desc != eop_desc) {
5909                         tx_buffer++;
5910                         tx_desc++;
5911                         i++;
5912                         if (unlikely(i == tx_ring->count)) {
5913                                 i = 0;
5914                                 tx_buffer = tx_ring->tx_buffer_info;
5915                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5916                         }
5917
5918                         /* unmap any remaining paged data */
5919                         if (dma_unmap_len(tx_buffer, len))
5920                                 dma_unmap_page(tx_ring->dev,
5921                                                dma_unmap_addr(tx_buffer, dma),
5922                                                dma_unmap_len(tx_buffer, len),
5923                                                DMA_TO_DEVICE);
5924                 }
5925
5926                 /* move us one more past the eop_desc for start of next pkt */
5927                 tx_buffer++;
5928                 i++;
5929                 if (unlikely(i == tx_ring->count)) {
5930                         i = 0;
5931                         tx_buffer = tx_ring->tx_buffer_info;
5932                 }
5933         }
5934
5935         /* reset BQL for queue */
5936         if (!ring_is_xdp(tx_ring))
5937                 netdev_tx_reset_queue(txring_txq(tx_ring));
5938
5939         /* reset next_to_use and next_to_clean */
5940         tx_ring->next_to_use = 0;
5941         tx_ring->next_to_clean = 0;
5942 }
5943
5944 /**
5945  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5946  * @adapter: board private structure
5947  **/
5948 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5949 {
5950         int i;
5951
5952         for (i = 0; i < adapter->num_rx_queues; i++)
5953                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5954 }
5955
5956 /**
5957  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5958  * @adapter: board private structure
5959  **/
5960 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5961 {
5962         int i;
5963
5964         for (i = 0; i < adapter->num_tx_queues; i++)
5965                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5966         for (i = 0; i < adapter->num_xdp_queues; i++)
5967                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5968 }
5969
5970 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5971 {
5972         struct hlist_node *node2;
5973         struct ixgbe_fdir_filter *filter;
5974
5975         spin_lock(&adapter->fdir_perfect_lock);
5976
5977         hlist_for_each_entry_safe(filter, node2,
5978                                   &adapter->fdir_filter_list, fdir_node) {
5979                 hlist_del(&filter->fdir_node);
5980                 kfree(filter);
5981         }
5982         adapter->fdir_filter_count = 0;
5983
5984         spin_unlock(&adapter->fdir_perfect_lock);
5985 }
5986
5987 void ixgbe_down(struct ixgbe_adapter *adapter)
5988 {
5989         struct net_device *netdev = adapter->netdev;
5990         struct ixgbe_hw *hw = &adapter->hw;
5991         int i;
5992
5993         /* signal that we are down to the interrupt handler */
5994         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5995                 return; /* do nothing if already down */
5996
5997         /* Shut off incoming Tx traffic */
5998         netif_tx_stop_all_queues(netdev);
5999
6000         /* call carrier off first to avoid false dev_watchdog timeouts */
6001         netif_carrier_off(netdev);
6002         netif_tx_disable(netdev);
6003
6004         /* Disable Rx */
6005         ixgbe_disable_rx(adapter);
6006
6007         /* synchronize_sched() needed for pending XDP buffers to drain */
6008         if (adapter->xdp_ring[0])
6009                 synchronize_sched();
6010
6011         ixgbe_irq_disable(adapter);
6012
6013         ixgbe_napi_disable_all(adapter);
6014
6015         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6016         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6017         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6018
6019         del_timer_sync(&adapter->service_timer);
6020
6021         if (adapter->num_vfs) {
6022                 /* Clear EITR Select mapping */
6023                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6024
6025                 /* Mark all the VFs as inactive */
6026                 for (i = 0 ; i < adapter->num_vfs; i++)
6027                         adapter->vfinfo[i].clear_to_send = false;
6028
6029                 /* ping all the active vfs to let them know we are going down */
6030                 ixgbe_ping_all_vfs(adapter);
6031
6032                 /* Disable all VFTE/VFRE TX/RX */
6033                 ixgbe_disable_tx_rx(adapter);
6034         }
6035
6036         /* disable transmits in the hardware now that interrupts are off */
6037         ixgbe_disable_tx(adapter);
6038
6039         if (!pci_channel_offline(adapter->pdev))
6040                 ixgbe_reset(adapter);
6041
6042         /* power down the optics for 82599 SFP+ fiber */
6043         if (hw->mac.ops.disable_tx_laser)
6044                 hw->mac.ops.disable_tx_laser(hw);
6045
6046         ixgbe_clean_all_tx_rings(adapter);
6047         ixgbe_clean_all_rx_rings(adapter);
6048 }
6049
6050 /**
6051  * ixgbe_eee_capable - helper function to determine EEE support on X550
6052  * @adapter: board private structure
6053  */
6054 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6055 {
6056         struct ixgbe_hw *hw = &adapter->hw;
6057
6058         switch (hw->device_id) {
6059         case IXGBE_DEV_ID_X550EM_A_1G_T:
6060         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6061                 if (!hw->phy.eee_speeds_supported)
6062                         break;
6063                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6064                 if (!hw->phy.eee_speeds_advertised)
6065                         break;
6066                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6067                 break;
6068         default:
6069                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6070                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6071                 break;
6072         }
6073 }
6074
6075 /**
6076  * ixgbe_tx_timeout - Respond to a Tx Hang
6077  * @netdev: network interface device structure
6078  **/
6079 static void ixgbe_tx_timeout(struct net_device *netdev)
6080 {
6081         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6082
6083         /* Do the reset outside of interrupt context */
6084         ixgbe_tx_timeout_reset(adapter);
6085 }
6086
6087 #ifdef CONFIG_IXGBE_DCB
6088 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6089 {
6090         struct ixgbe_hw *hw = &adapter->hw;
6091         struct tc_configuration *tc;
6092         int j;
6093
6094         switch (hw->mac.type) {
6095         case ixgbe_mac_82598EB:
6096         case ixgbe_mac_82599EB:
6097                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6098                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6099                 break;
6100         case ixgbe_mac_X540:
6101         case ixgbe_mac_X550:
6102                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6103                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6104                 break;
6105         case ixgbe_mac_X550EM_x:
6106         case ixgbe_mac_x550em_a:
6107         default:
6108                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6109                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6110                 break;
6111         }
6112
6113         /* Configure DCB traffic classes */
6114         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6115                 tc = &adapter->dcb_cfg.tc_config[j];
6116                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6117                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6118                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6119                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6120                 tc->dcb_pfc = pfc_disabled;
6121         }
6122
6123         /* Initialize default user to priority mapping, UPx->TC0 */
6124         tc = &adapter->dcb_cfg.tc_config[0];
6125         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6126         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6127
6128         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6129         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6130         adapter->dcb_cfg.pfc_mode_enable = false;
6131         adapter->dcb_set_bitmap = 0x00;
6132         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6133                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6134         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6135                sizeof(adapter->temp_dcb_cfg));
6136 }
6137 #endif
6138
6139 /**
6140  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6141  * @adapter: board private structure to initialize
6142  * @ii: pointer to ixgbe_info for device
6143  *
6144  * ixgbe_sw_init initializes the Adapter private data structure.
6145  * Fields are initialized based on PCI device information and
6146  * OS network device settings (MTU size).
6147  **/
6148 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6149                          const struct ixgbe_info *ii)
6150 {
6151         struct ixgbe_hw *hw = &adapter->hw;
6152         struct pci_dev *pdev = adapter->pdev;
6153         unsigned int rss, fdir;
6154         u32 fwsm;
6155         int i;
6156
6157         /* PCI config space info */
6158
6159         hw->vendor_id = pdev->vendor;
6160         hw->device_id = pdev->device;
6161         hw->revision_id = pdev->revision;
6162         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6163         hw->subsystem_device_id = pdev->subsystem_device;
6164
6165         /* get_invariants needs the device IDs */
6166         ii->get_invariants(hw);
6167
6168         /* Set common capability flags and settings */
6169         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6170         adapter->ring_feature[RING_F_RSS].limit = rss;
6171         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6172         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6173         adapter->atr_sample_rate = 20;
6174         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6175         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6176         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6177         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6178 #ifdef CONFIG_IXGBE_DCA
6179         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6180 #endif
6181 #ifdef CONFIG_IXGBE_DCB
6182         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6183         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6184 #endif
6185 #ifdef IXGBE_FCOE
6186         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6187         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6188 #ifdef CONFIG_IXGBE_DCB
6189         /* Default traffic class to use for FCoE */
6190         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6191 #endif /* CONFIG_IXGBE_DCB */
6192 #endif /* IXGBE_FCOE */
6193
6194         /* initialize static ixgbe jump table entries */
6195         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6196                                           GFP_KERNEL);
6197         if (!adapter->jump_tables[0])
6198                 return -ENOMEM;
6199         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6200
6201         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6202                 adapter->jump_tables[i] = NULL;
6203
6204         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6205                                      sizeof(struct ixgbe_mac_addr),
6206                                      GFP_KERNEL);
6207         if (!adapter->mac_table)
6208                 return -ENOMEM;
6209
6210         if (ixgbe_init_rss_key(adapter))
6211                 return -ENOMEM;
6212
6213         /* Set MAC specific capability flags and exceptions */
6214         switch (hw->mac.type) {
6215         case ixgbe_mac_82598EB:
6216                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6217
6218                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6219                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6220
6221                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6222                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6223                 adapter->atr_sample_rate = 0;
6224                 adapter->fdir_pballoc = 0;
6225 #ifdef IXGBE_FCOE
6226                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6227                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6228 #ifdef CONFIG_IXGBE_DCB
6229                 adapter->fcoe.up = 0;
6230 #endif /* IXGBE_DCB */
6231 #endif /* IXGBE_FCOE */
6232                 break;
6233         case ixgbe_mac_82599EB:
6234                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6235                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6236                 break;
6237         case ixgbe_mac_X540:
6238                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6239                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6240                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6241                 break;
6242         case ixgbe_mac_x550em_a:
6243                 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6244                 switch (hw->device_id) {
6245                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6246                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6247                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6248                         break;
6249                 default:
6250                         break;
6251                 }
6252         /* fall through */
6253         case ixgbe_mac_X550EM_x:
6254 #ifdef CONFIG_IXGBE_DCB
6255                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6256 #endif
6257 #ifdef IXGBE_FCOE
6258                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6259 #ifdef CONFIG_IXGBE_DCB
6260                 adapter->fcoe.up = 0;
6261 #endif /* IXGBE_DCB */
6262 #endif /* IXGBE_FCOE */
6263         /* Fall Through */
6264         case ixgbe_mac_X550:
6265                 if (hw->mac.type == ixgbe_mac_X550)
6266                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6267 #ifdef CONFIG_IXGBE_DCA
6268                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6269 #endif
6270                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6271                 break;
6272         default:
6273                 break;
6274         }
6275
6276 #ifdef IXGBE_FCOE
6277         /* FCoE support exists, always init the FCoE lock */
6278         spin_lock_init(&adapter->fcoe.lock);
6279
6280 #endif
6281         /* n-tuple support exists, always init our spinlock */
6282         spin_lock_init(&adapter->fdir_perfect_lock);
6283
6284 #ifdef CONFIG_IXGBE_DCB
6285         ixgbe_init_dcb(adapter);
6286 #endif
6287         ixgbe_init_ipsec_offload(adapter);
6288
6289         /* default flow control settings */
6290         hw->fc.requested_mode = ixgbe_fc_full;
6291         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6292         ixgbe_pbthresh_setup(adapter);
6293         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6294         hw->fc.send_xon = true;
6295         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6296
6297 #ifdef CONFIG_PCI_IOV
6298         if (max_vfs > 0)
6299                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6300
6301         /* assign number of SR-IOV VFs */
6302         if (hw->mac.type != ixgbe_mac_82598EB) {
6303                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6304                         max_vfs = 0;
6305                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6306                 }
6307         }
6308 #endif /* CONFIG_PCI_IOV */
6309
6310         /* enable itr by default in dynamic mode */
6311         adapter->rx_itr_setting = 1;
6312         adapter->tx_itr_setting = 1;
6313
6314         /* set default ring sizes */
6315         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6316         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6317
6318         /* set default work limits */
6319         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6320
6321         /* initialize eeprom parameters */
6322         if (ixgbe_init_eeprom_params_generic(hw)) {
6323                 e_dev_err("EEPROM initialization failed\n");
6324                 return -EIO;
6325         }
6326
6327         /* PF holds first pool slot */
6328         set_bit(0, adapter->fwd_bitmask);
6329         set_bit(__IXGBE_DOWN, &adapter->state);
6330
6331         return 0;
6332 }
6333
6334 /**
6335  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6336  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6337  *
6338  * Return 0 on success, negative on failure
6339  **/
6340 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6341 {
6342         struct device *dev = tx_ring->dev;
6343         int orig_node = dev_to_node(dev);
6344         int ring_node = -1;
6345         int size;
6346
6347         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6348
6349         if (tx_ring->q_vector)
6350                 ring_node = tx_ring->q_vector->numa_node;
6351
6352         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6353         if (!tx_ring->tx_buffer_info)
6354                 tx_ring->tx_buffer_info = vmalloc(size);
6355         if (!tx_ring->tx_buffer_info)
6356                 goto err;
6357
6358         /* round up to nearest 4K */
6359         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6360         tx_ring->size = ALIGN(tx_ring->size, 4096);
6361
6362         set_dev_node(dev, ring_node);
6363         tx_ring->desc = dma_alloc_coherent(dev,
6364                                            tx_ring->size,
6365                                            &tx_ring->dma,
6366                                            GFP_KERNEL);
6367         set_dev_node(dev, orig_node);
6368         if (!tx_ring->desc)
6369                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6370                                                    &tx_ring->dma, GFP_KERNEL);
6371         if (!tx_ring->desc)
6372                 goto err;
6373
6374         tx_ring->next_to_use = 0;
6375         tx_ring->next_to_clean = 0;
6376         return 0;
6377
6378 err:
6379         vfree(tx_ring->tx_buffer_info);
6380         tx_ring->tx_buffer_info = NULL;
6381         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6382         return -ENOMEM;
6383 }
6384
6385 /**
6386  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6387  * @adapter: board private structure
6388  *
6389  * If this function returns with an error, then it's possible one or
6390  * more of the rings is populated (while the rest are not).  It is the
6391  * callers duty to clean those orphaned rings.
6392  *
6393  * Return 0 on success, negative on failure
6394  **/
6395 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6396 {
6397         int i, j = 0, err = 0;
6398
6399         for (i = 0; i < adapter->num_tx_queues; i++) {
6400                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6401                 if (!err)
6402                         continue;
6403
6404                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6405                 goto err_setup_tx;
6406         }
6407         for (j = 0; j < adapter->num_xdp_queues; j++) {
6408                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6409                 if (!err)
6410                         continue;
6411
6412                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6413                 goto err_setup_tx;
6414         }
6415
6416         return 0;
6417 err_setup_tx:
6418         /* rewind the index freeing the rings as we go */
6419         while (j--)
6420                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6421         while (i--)
6422                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6423         return err;
6424 }
6425
6426 /**
6427  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6428  * @adapter: pointer to ixgbe_adapter
6429  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6430  *
6431  * Returns 0 on success, negative on failure
6432  **/
6433 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6434                              struct ixgbe_ring *rx_ring)
6435 {
6436         struct device *dev = rx_ring->dev;
6437         int orig_node = dev_to_node(dev);
6438         int ring_node = -1;
6439         int size, err;
6440
6441         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6442
6443         if (rx_ring->q_vector)
6444                 ring_node = rx_ring->q_vector->numa_node;
6445
6446         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6447         if (!rx_ring->rx_buffer_info)
6448                 rx_ring->rx_buffer_info = vmalloc(size);
6449         if (!rx_ring->rx_buffer_info)
6450                 goto err;
6451
6452         /* Round up to nearest 4K */
6453         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6454         rx_ring->size = ALIGN(rx_ring->size, 4096);
6455
6456         set_dev_node(dev, ring_node);
6457         rx_ring->desc = dma_alloc_coherent(dev,
6458                                            rx_ring->size,
6459                                            &rx_ring->dma,
6460                                            GFP_KERNEL);
6461         set_dev_node(dev, orig_node);
6462         if (!rx_ring->desc)
6463                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6464                                                    &rx_ring->dma, GFP_KERNEL);
6465         if (!rx_ring->desc)
6466                 goto err;
6467
6468         rx_ring->next_to_clean = 0;
6469         rx_ring->next_to_use = 0;
6470
6471         /* XDP RX-queue info */
6472         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6473                              rx_ring->queue_index) < 0)
6474                 goto err;
6475
6476         err = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq,
6477                                          MEM_TYPE_PAGE_SHARED, NULL);
6478         if (err) {
6479                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6480                 goto err;
6481         }
6482
6483         rx_ring->xdp_prog = adapter->xdp_prog;
6484
6485         return 0;
6486 err:
6487         vfree(rx_ring->rx_buffer_info);
6488         rx_ring->rx_buffer_info = NULL;
6489         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6490         return -ENOMEM;
6491 }
6492
6493 /**
6494  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6495  * @adapter: board private structure
6496  *
6497  * If this function returns with an error, then it's possible one or
6498  * more of the rings is populated (while the rest are not).  It is the
6499  * callers duty to clean those orphaned rings.
6500  *
6501  * Return 0 on success, negative on failure
6502  **/
6503 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6504 {
6505         int i, err = 0;
6506
6507         for (i = 0; i < adapter->num_rx_queues; i++) {
6508                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6509                 if (!err)
6510                         continue;
6511
6512                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6513                 goto err_setup_rx;
6514         }
6515
6516 #ifdef IXGBE_FCOE
6517         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6518         if (!err)
6519 #endif
6520                 return 0;
6521 err_setup_rx:
6522         /* rewind the index freeing the rings as we go */
6523         while (i--)
6524                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6525         return err;
6526 }
6527
6528 /**
6529  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6530  * @tx_ring: Tx descriptor ring for a specific queue
6531  *
6532  * Free all transmit software resources
6533  **/
6534 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6535 {
6536         ixgbe_clean_tx_ring(tx_ring);
6537
6538         vfree(tx_ring->tx_buffer_info);
6539         tx_ring->tx_buffer_info = NULL;
6540
6541         /* if not set, then don't free */
6542         if (!tx_ring->desc)
6543                 return;
6544
6545         dma_free_coherent(tx_ring->dev, tx_ring->size,
6546                           tx_ring->desc, tx_ring->dma);
6547
6548         tx_ring->desc = NULL;
6549 }
6550
6551 /**
6552  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6553  * @adapter: board private structure
6554  *
6555  * Free all transmit software resources
6556  **/
6557 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6558 {
6559         int i;
6560
6561         for (i = 0; i < adapter->num_tx_queues; i++)
6562                 if (adapter->tx_ring[i]->desc)
6563                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6564         for (i = 0; i < adapter->num_xdp_queues; i++)
6565                 if (adapter->xdp_ring[i]->desc)
6566                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6567 }
6568
6569 /**
6570  * ixgbe_free_rx_resources - Free Rx Resources
6571  * @rx_ring: ring to clean the resources from
6572  *
6573  * Free all receive software resources
6574  **/
6575 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6576 {
6577         ixgbe_clean_rx_ring(rx_ring);
6578
6579         rx_ring->xdp_prog = NULL;
6580         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6581         vfree(rx_ring->rx_buffer_info);
6582         rx_ring->rx_buffer_info = NULL;
6583
6584         /* if not set, then don't free */
6585         if (!rx_ring->desc)
6586                 return;
6587
6588         dma_free_coherent(rx_ring->dev, rx_ring->size,
6589                           rx_ring->desc, rx_ring->dma);
6590
6591         rx_ring->desc = NULL;
6592 }
6593
6594 /**
6595  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6596  * @adapter: board private structure
6597  *
6598  * Free all receive software resources
6599  **/
6600 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6601 {
6602         int i;
6603
6604 #ifdef IXGBE_FCOE
6605         ixgbe_free_fcoe_ddp_resources(adapter);
6606
6607 #endif
6608         for (i = 0; i < adapter->num_rx_queues; i++)
6609                 if (adapter->rx_ring[i]->desc)
6610                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6611 }
6612
6613 /**
6614  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6615  * @netdev: network interface device structure
6616  * @new_mtu: new value for maximum frame size
6617  *
6618  * Returns 0 on success, negative on failure
6619  **/
6620 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6621 {
6622         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6623
6624         if (adapter->xdp_prog) {
6625                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6626                                      VLAN_HLEN;
6627                 int i;
6628
6629                 for (i = 0; i < adapter->num_rx_queues; i++) {
6630                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6631
6632                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6633                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6634                                 return -EINVAL;
6635                         }
6636                 }
6637         }
6638
6639         /*
6640          * For 82599EB we cannot allow legacy VFs to enable their receive
6641          * paths when MTU greater than 1500 is configured.  So display a
6642          * warning that legacy VFs will be disabled.
6643          */
6644         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6645             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6646             (new_mtu > ETH_DATA_LEN))
6647                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6648
6649         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6650
6651         /* must set new MTU before calling down or up */
6652         netdev->mtu = new_mtu;
6653
6654         if (netif_running(netdev))
6655                 ixgbe_reinit_locked(adapter);
6656
6657         return 0;
6658 }
6659
6660 /**
6661  * ixgbe_open - Called when a network interface is made active
6662  * @netdev: network interface device structure
6663  *
6664  * Returns 0 on success, negative value on failure
6665  *
6666  * The open entry point is called when a network interface is made
6667  * active by the system (IFF_UP).  At this point all resources needed
6668  * for transmit and receive operations are allocated, the interrupt
6669  * handler is registered with the OS, the watchdog timer is started,
6670  * and the stack is notified that the interface is ready.
6671  **/
6672 int ixgbe_open(struct net_device *netdev)
6673 {
6674         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6675         struct ixgbe_hw *hw = &adapter->hw;
6676         int err, queues;
6677
6678         /* disallow open during test */
6679         if (test_bit(__IXGBE_TESTING, &adapter->state))
6680                 return -EBUSY;
6681
6682         netif_carrier_off(netdev);
6683
6684         /* allocate transmit descriptors */
6685         err = ixgbe_setup_all_tx_resources(adapter);
6686         if (err)
6687                 goto err_setup_tx;
6688
6689         /* allocate receive descriptors */
6690         err = ixgbe_setup_all_rx_resources(adapter);
6691         if (err)
6692                 goto err_setup_rx;
6693
6694         ixgbe_configure(adapter);
6695
6696         err = ixgbe_request_irq(adapter);
6697         if (err)
6698                 goto err_req_irq;
6699
6700         /* Notify the stack of the actual queue counts. */
6701         queues = adapter->num_tx_queues;
6702         err = netif_set_real_num_tx_queues(netdev, queues);
6703         if (err)
6704                 goto err_set_queues;
6705
6706         queues = adapter->num_rx_queues;
6707         err = netif_set_real_num_rx_queues(netdev, queues);
6708         if (err)
6709                 goto err_set_queues;
6710
6711         ixgbe_ptp_init(adapter);
6712
6713         ixgbe_up_complete(adapter);
6714
6715         ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6716         udp_tunnel_get_rx_info(netdev);
6717
6718         return 0;
6719
6720 err_set_queues:
6721         ixgbe_free_irq(adapter);
6722 err_req_irq:
6723         ixgbe_free_all_rx_resources(adapter);
6724         if (hw->phy.ops.set_phy_power && !adapter->wol)
6725                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6726 err_setup_rx:
6727         ixgbe_free_all_tx_resources(adapter);
6728 err_setup_tx:
6729         ixgbe_reset(adapter);
6730
6731         return err;
6732 }
6733
6734 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6735 {
6736         ixgbe_ptp_suspend(adapter);
6737
6738         if (adapter->hw.phy.ops.enter_lplu) {
6739                 adapter->hw.phy.reset_disable = true;
6740                 ixgbe_down(adapter);
6741                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6742                 adapter->hw.phy.reset_disable = false;
6743         } else {
6744                 ixgbe_down(adapter);
6745         }
6746
6747         ixgbe_free_irq(adapter);
6748
6749         ixgbe_free_all_tx_resources(adapter);
6750         ixgbe_free_all_rx_resources(adapter);
6751 }
6752
6753 /**
6754  * ixgbe_close - Disables a network interface
6755  * @netdev: network interface device structure
6756  *
6757  * Returns 0, this is not allowed to fail
6758  *
6759  * The close entry point is called when an interface is de-activated
6760  * by the OS.  The hardware is still under the drivers control, but
6761  * needs to be disabled.  A global MAC reset is issued to stop the
6762  * hardware, and all transmit and receive resources are freed.
6763  **/
6764 int ixgbe_close(struct net_device *netdev)
6765 {
6766         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6767
6768         ixgbe_ptp_stop(adapter);
6769
6770         if (netif_device_present(netdev))
6771                 ixgbe_close_suspend(adapter);
6772
6773         ixgbe_fdir_filter_exit(adapter);
6774
6775         ixgbe_release_hw_control(adapter);
6776
6777         return 0;
6778 }
6779
6780 #ifdef CONFIG_PM
6781 static int ixgbe_resume(struct pci_dev *pdev)
6782 {
6783         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6784         struct net_device *netdev = adapter->netdev;
6785         u32 err;
6786
6787         adapter->hw.hw_addr = adapter->io_addr;
6788         pci_set_power_state(pdev, PCI_D0);
6789         pci_restore_state(pdev);
6790         /*
6791          * pci_restore_state clears dev->state_saved so call
6792          * pci_save_state to restore it.
6793          */
6794         pci_save_state(pdev);
6795
6796         err = pci_enable_device_mem(pdev);
6797         if (err) {
6798                 e_dev_err("Cannot enable PCI device from suspend\n");
6799                 return err;
6800         }
6801         smp_mb__before_atomic();
6802         clear_bit(__IXGBE_DISABLED, &adapter->state);
6803         pci_set_master(pdev);
6804
6805         pci_wake_from_d3(pdev, false);
6806
6807         ixgbe_reset(adapter);
6808
6809         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6810
6811         rtnl_lock();
6812         err = ixgbe_init_interrupt_scheme(adapter);
6813         if (!err && netif_running(netdev))
6814                 err = ixgbe_open(netdev);
6815
6816
6817         if (!err)
6818                 netif_device_attach(netdev);
6819         rtnl_unlock();
6820
6821         return err;
6822 }
6823 #endif /* CONFIG_PM */
6824
6825 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6826 {
6827         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6828         struct net_device *netdev = adapter->netdev;
6829         struct ixgbe_hw *hw = &adapter->hw;
6830         u32 ctrl;
6831         u32 wufc = adapter->wol;
6832 #ifdef CONFIG_PM
6833         int retval = 0;
6834 #endif
6835
6836         rtnl_lock();
6837         netif_device_detach(netdev);
6838
6839         if (netif_running(netdev))
6840                 ixgbe_close_suspend(adapter);
6841
6842         ixgbe_clear_interrupt_scheme(adapter);
6843         rtnl_unlock();
6844
6845 #ifdef CONFIG_PM
6846         retval = pci_save_state(pdev);
6847         if (retval)
6848                 return retval;
6849
6850 #endif
6851         if (hw->mac.ops.stop_link_on_d3)
6852                 hw->mac.ops.stop_link_on_d3(hw);
6853
6854         if (wufc) {
6855                 u32 fctrl;
6856
6857                 ixgbe_set_rx_mode(netdev);
6858
6859                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6860                 if (hw->mac.ops.enable_tx_laser)
6861                         hw->mac.ops.enable_tx_laser(hw);
6862
6863                 /* enable the reception of multicast packets */
6864                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6865                 fctrl |= IXGBE_FCTRL_MPE;
6866                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6867
6868                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6869                 ctrl |= IXGBE_CTRL_GIO_DIS;
6870                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6871
6872                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6873         } else {
6874                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6875                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6876         }
6877
6878         switch (hw->mac.type) {
6879         case ixgbe_mac_82598EB:
6880                 pci_wake_from_d3(pdev, false);
6881                 break;
6882         case ixgbe_mac_82599EB:
6883         case ixgbe_mac_X540:
6884         case ixgbe_mac_X550:
6885         case ixgbe_mac_X550EM_x:
6886         case ixgbe_mac_x550em_a:
6887                 pci_wake_from_d3(pdev, !!wufc);
6888                 break;
6889         default:
6890                 break;
6891         }
6892
6893         *enable_wake = !!wufc;
6894         if (hw->phy.ops.set_phy_power && !*enable_wake)
6895                 hw->phy.ops.set_phy_power(hw, false);
6896
6897         ixgbe_release_hw_control(adapter);
6898
6899         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6900                 pci_disable_device(pdev);
6901
6902         return 0;
6903 }
6904
6905 #ifdef CONFIG_PM
6906 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6907 {
6908         int retval;
6909         bool wake;
6910
6911         retval = __ixgbe_shutdown(pdev, &wake);
6912         if (retval)
6913                 return retval;
6914
6915         if (wake) {
6916                 pci_prepare_to_sleep(pdev);
6917         } else {
6918                 pci_wake_from_d3(pdev, false);
6919                 pci_set_power_state(pdev, PCI_D3hot);
6920         }
6921
6922         return 0;
6923 }
6924 #endif /* CONFIG_PM */
6925
6926 static void ixgbe_shutdown(struct pci_dev *pdev)
6927 {
6928         bool wake;
6929
6930         __ixgbe_shutdown(pdev, &wake);
6931
6932         if (system_state == SYSTEM_POWER_OFF) {
6933                 pci_wake_from_d3(pdev, wake);
6934                 pci_set_power_state(pdev, PCI_D3hot);
6935         }
6936 }
6937
6938 /**
6939  * ixgbe_update_stats - Update the board statistics counters.
6940  * @adapter: board private structure
6941  **/
6942 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6943 {
6944         struct net_device *netdev = adapter->netdev;
6945         struct ixgbe_hw *hw = &adapter->hw;
6946         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6947         u64 total_mpc = 0;
6948         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6949         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6950         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6951         u64 alloc_rx_page = 0;
6952         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6953
6954         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6955             test_bit(__IXGBE_RESETTING, &adapter->state))
6956                 return;
6957
6958         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6959                 u64 rsc_count = 0;
6960                 u64 rsc_flush = 0;
6961                 for (i = 0; i < adapter->num_rx_queues; i++) {
6962                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6963                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6964                 }
6965                 adapter->rsc_total_count = rsc_count;
6966                 adapter->rsc_total_flush = rsc_flush;
6967         }
6968
6969         for (i = 0; i < adapter->num_rx_queues; i++) {
6970                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6971                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6972                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6973                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6974                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6975                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6976                 bytes += rx_ring->stats.bytes;
6977                 packets += rx_ring->stats.packets;
6978         }
6979         adapter->non_eop_descs = non_eop_descs;
6980         adapter->alloc_rx_page = alloc_rx_page;
6981         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6982         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6983         adapter->hw_csum_rx_error = hw_csum_rx_error;
6984         netdev->stats.rx_bytes = bytes;
6985         netdev->stats.rx_packets = packets;
6986
6987         bytes = 0;
6988         packets = 0;
6989         /* gather some stats to the adapter struct that are per queue */
6990         for (i = 0; i < adapter->num_tx_queues; i++) {
6991                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6992                 restart_queue += tx_ring->tx_stats.restart_queue;
6993                 tx_busy += tx_ring->tx_stats.tx_busy;
6994                 bytes += tx_ring->stats.bytes;
6995                 packets += tx_ring->stats.packets;
6996         }
6997         for (i = 0; i < adapter->num_xdp_queues; i++) {
6998                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6999
7000                 restart_queue += xdp_ring->tx_stats.restart_queue;
7001                 tx_busy += xdp_ring->tx_stats.tx_busy;
7002                 bytes += xdp_ring->stats.bytes;
7003                 packets += xdp_ring->stats.packets;
7004         }
7005         adapter->restart_queue = restart_queue;
7006         adapter->tx_busy = tx_busy;
7007         netdev->stats.tx_bytes = bytes;
7008         netdev->stats.tx_packets = packets;
7009
7010         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7011
7012         /* 8 register reads */
7013         for (i = 0; i < 8; i++) {
7014                 /* for packet buffers not used, the register should read 0 */
7015                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7016                 missed_rx += mpc;
7017                 hwstats->mpc[i] += mpc;
7018                 total_mpc += hwstats->mpc[i];
7019                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7020                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7021                 switch (hw->mac.type) {
7022                 case ixgbe_mac_82598EB:
7023                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7024                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7025                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7026                         hwstats->pxonrxc[i] +=
7027                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7028                         break;
7029                 case ixgbe_mac_82599EB:
7030                 case ixgbe_mac_X540:
7031                 case ixgbe_mac_X550:
7032                 case ixgbe_mac_X550EM_x:
7033                 case ixgbe_mac_x550em_a:
7034                         hwstats->pxonrxc[i] +=
7035                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7036                         break;
7037                 default:
7038                         break;
7039                 }
7040         }
7041
7042         /*16 register reads */
7043         for (i = 0; i < 16; i++) {
7044                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7045                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7046                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7047                     (hw->mac.type == ixgbe_mac_X540) ||
7048                     (hw->mac.type == ixgbe_mac_X550) ||
7049                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7050                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7051                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7052                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7053                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7054                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7055                 }
7056         }
7057
7058         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7059         /* work around hardware counting issue */
7060         hwstats->gprc -= missed_rx;
7061
7062         ixgbe_update_xoff_received(adapter);
7063
7064         /* 82598 hardware only has a 32 bit counter in the high register */
7065         switch (hw->mac.type) {
7066         case ixgbe_mac_82598EB:
7067                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7068                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7069                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7070                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7071                 break;
7072         case ixgbe_mac_X540:
7073         case ixgbe_mac_X550:
7074         case ixgbe_mac_X550EM_x:
7075         case ixgbe_mac_x550em_a:
7076                 /* OS2BMC stats are X540 and later */
7077                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7078                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7079                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7080                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7081                 /* fall through */
7082         case ixgbe_mac_82599EB:
7083                 for (i = 0; i < 16; i++)
7084                         adapter->hw_rx_no_dma_resources +=
7085                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7086                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7087                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7088                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7089                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7090                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7091                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7092                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7093                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7094                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7095 #ifdef IXGBE_FCOE
7096                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7097                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7098                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7099                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7100                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7101                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7102                 /* Add up per cpu counters for total ddp aloc fail */
7103                 if (adapter->fcoe.ddp_pool) {
7104                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7105                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7106                         unsigned int cpu;
7107                         u64 noddp = 0, noddp_ext_buff = 0;
7108                         for_each_possible_cpu(cpu) {
7109                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7110                                 noddp += ddp_pool->noddp;
7111                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7112                         }
7113                         hwstats->fcoe_noddp = noddp;
7114                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7115                 }
7116 #endif /* IXGBE_FCOE */
7117                 break;
7118         default:
7119                 break;
7120         }
7121         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7122         hwstats->bprc += bprc;
7123         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7124         if (hw->mac.type == ixgbe_mac_82598EB)
7125                 hwstats->mprc -= bprc;
7126         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7127         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7128         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7129         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7130         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7131         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7132         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7133         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7134         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7135         hwstats->lxontxc += lxon;
7136         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7137         hwstats->lxofftxc += lxoff;
7138         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7139         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7140         /*
7141          * 82598 errata - tx of flow control packets is included in tx counters
7142          */
7143         xon_off_tot = lxon + lxoff;
7144         hwstats->gptc -= xon_off_tot;
7145         hwstats->mptc -= xon_off_tot;
7146         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7147         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7148         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7149         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7150         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7151         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7152         hwstats->ptc64 -= xon_off_tot;
7153         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7154         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7155         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7156         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7157         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7158         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7159
7160         /* Fill out the OS statistics structure */
7161         netdev->stats.multicast = hwstats->mprc;
7162
7163         /* Rx Errors */
7164         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7165         netdev->stats.rx_dropped = 0;
7166         netdev->stats.rx_length_errors = hwstats->rlec;
7167         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7168         netdev->stats.rx_missed_errors = total_mpc;
7169 }
7170
7171 /**
7172  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7173  * @adapter: pointer to the device adapter structure
7174  **/
7175 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7176 {
7177         struct ixgbe_hw *hw = &adapter->hw;
7178         int i;
7179
7180         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7181                 return;
7182
7183         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7184
7185         /* if interface is down do nothing */
7186         if (test_bit(__IXGBE_DOWN, &adapter->state))
7187                 return;
7188
7189         /* do nothing if we are not using signature filters */
7190         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7191                 return;
7192
7193         adapter->fdir_overflow++;
7194
7195         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7196                 for (i = 0; i < adapter->num_tx_queues; i++)
7197                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7198                                 &(adapter->tx_ring[i]->state));
7199                 for (i = 0; i < adapter->num_xdp_queues; i++)
7200                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7201                                 &adapter->xdp_ring[i]->state);
7202                 /* re-enable flow director interrupts */
7203                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7204         } else {
7205                 e_err(probe, "failed to finish FDIR re-initialization, "
7206                       "ignored adding FDIR ATR filters\n");
7207         }
7208 }
7209
7210 /**
7211  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7212  * @adapter: pointer to the device adapter structure
7213  *
7214  * This function serves two purposes.  First it strobes the interrupt lines
7215  * in order to make certain interrupts are occurring.  Secondly it sets the
7216  * bits needed to check for TX hangs.  As a result we should immediately
7217  * determine if a hang has occurred.
7218  */
7219 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7220 {
7221         struct ixgbe_hw *hw = &adapter->hw;
7222         u64 eics = 0;
7223         int i;
7224
7225         /* If we're down, removing or resetting, just bail */
7226         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7227             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7228             test_bit(__IXGBE_RESETTING, &adapter->state))
7229                 return;
7230
7231         /* Force detection of hung controller */
7232         if (netif_carrier_ok(adapter->netdev)) {
7233                 for (i = 0; i < adapter->num_tx_queues; i++)
7234                         set_check_for_tx_hang(adapter->tx_ring[i]);
7235                 for (i = 0; i < adapter->num_xdp_queues; i++)
7236                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7237         }
7238
7239         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7240                 /*
7241                  * for legacy and MSI interrupts don't set any bits
7242                  * that are enabled for EIAM, because this operation
7243                  * would set *both* EIMS and EICS for any bit in EIAM
7244                  */
7245                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7246                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7247         } else {
7248                 /* get one bit for every active tx/rx interrupt vector */
7249                 for (i = 0; i < adapter->num_q_vectors; i++) {
7250                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7251                         if (qv->rx.ring || qv->tx.ring)
7252                                 eics |= BIT_ULL(i);
7253                 }
7254         }
7255
7256         /* Cause software interrupt to ensure rings are cleaned */
7257         ixgbe_irq_rearm_queues(adapter, eics);
7258 }
7259
7260 /**
7261  * ixgbe_watchdog_update_link - update the link status
7262  * @adapter: pointer to the device adapter structure
7263  **/
7264 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7265 {
7266         struct ixgbe_hw *hw = &adapter->hw;
7267         u32 link_speed = adapter->link_speed;
7268         bool link_up = adapter->link_up;
7269         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7270
7271         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7272                 return;
7273
7274         if (hw->mac.ops.check_link) {
7275                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7276         } else {
7277                 /* always assume link is up, if no check link function */
7278                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7279                 link_up = true;
7280         }
7281
7282         if (adapter->ixgbe_ieee_pfc)
7283                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7284
7285         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7286                 hw->mac.ops.fc_enable(hw);
7287                 ixgbe_set_rx_drop_en(adapter);
7288         }
7289
7290         if (link_up ||
7291             time_after(jiffies, (adapter->link_check_timeout +
7292                                  IXGBE_TRY_LINK_TIMEOUT))) {
7293                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7294                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7295                 IXGBE_WRITE_FLUSH(hw);
7296         }
7297
7298         adapter->link_up = link_up;
7299         adapter->link_speed = link_speed;
7300 }
7301
7302 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7303 {
7304 #ifdef CONFIG_IXGBE_DCB
7305         struct net_device *netdev = adapter->netdev;
7306         struct dcb_app app = {
7307                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7308                               .protocol = 0,
7309                              };
7310         u8 up = 0;
7311
7312         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7313                 up = dcb_ieee_getapp_mask(netdev, &app);
7314
7315         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7316 #endif
7317 }
7318
7319 /**
7320  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7321  *                             print link up message
7322  * @adapter: pointer to the device adapter structure
7323  **/
7324 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7325 {
7326         struct net_device *netdev = adapter->netdev;
7327         struct ixgbe_hw *hw = &adapter->hw;
7328         u32 link_speed = adapter->link_speed;
7329         const char *speed_str;
7330         bool flow_rx, flow_tx;
7331
7332         /* only continue if link was previously down */
7333         if (netif_carrier_ok(netdev))
7334                 return;
7335
7336         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7337
7338         switch (hw->mac.type) {
7339         case ixgbe_mac_82598EB: {
7340                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7341                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7342                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7343                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7344         }
7345                 break;
7346         case ixgbe_mac_X540:
7347         case ixgbe_mac_X550:
7348         case ixgbe_mac_X550EM_x:
7349         case ixgbe_mac_x550em_a:
7350         case ixgbe_mac_82599EB: {
7351                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7352                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7353                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7354                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7355         }
7356                 break;
7357         default:
7358                 flow_tx = false;
7359                 flow_rx = false;
7360                 break;
7361         }
7362
7363         adapter->last_rx_ptp_check = jiffies;
7364
7365         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7366                 ixgbe_ptp_start_cyclecounter(adapter);
7367
7368         switch (link_speed) {
7369         case IXGBE_LINK_SPEED_10GB_FULL:
7370                 speed_str = "10 Gbps";
7371                 break;
7372         case IXGBE_LINK_SPEED_5GB_FULL:
7373                 speed_str = "5 Gbps";
7374                 break;
7375         case IXGBE_LINK_SPEED_2_5GB_FULL:
7376                 speed_str = "2.5 Gbps";
7377                 break;
7378         case IXGBE_LINK_SPEED_1GB_FULL:
7379                 speed_str = "1 Gbps";
7380                 break;
7381         case IXGBE_LINK_SPEED_100_FULL:
7382                 speed_str = "100 Mbps";
7383                 break;
7384         case IXGBE_LINK_SPEED_10_FULL:
7385                 speed_str = "10 Mbps";
7386                 break;
7387         default:
7388                 speed_str = "unknown speed";
7389                 break;
7390         }
7391         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7392                ((flow_rx && flow_tx) ? "RX/TX" :
7393                (flow_rx ? "RX" :
7394                (flow_tx ? "TX" : "None"))));
7395
7396         netif_carrier_on(netdev);
7397         ixgbe_check_vf_rate_limit(adapter);
7398
7399         /* enable transmits */
7400         netif_tx_wake_all_queues(adapter->netdev);
7401
7402         /* update the default user priority for VFs */
7403         ixgbe_update_default_up(adapter);
7404
7405         /* ping all the active vfs to let them know link has changed */
7406         ixgbe_ping_all_vfs(adapter);
7407 }
7408
7409 /**
7410  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7411  *                               print link down message
7412  * @adapter: pointer to the adapter structure
7413  **/
7414 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7415 {
7416         struct net_device *netdev = adapter->netdev;
7417         struct ixgbe_hw *hw = &adapter->hw;
7418
7419         adapter->link_up = false;
7420         adapter->link_speed = 0;
7421
7422         /* only continue if link was up previously */
7423         if (!netif_carrier_ok(netdev))
7424                 return;
7425
7426         /* poll for SFP+ cable when link is down */
7427         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7428                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7429
7430         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7431                 ixgbe_ptp_start_cyclecounter(adapter);
7432
7433         e_info(drv, "NIC Link is Down\n");
7434         netif_carrier_off(netdev);
7435
7436         /* ping all the active vfs to let them know link has changed */
7437         ixgbe_ping_all_vfs(adapter);
7438 }
7439
7440 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7441 {
7442         int i;
7443
7444         for (i = 0; i < adapter->num_tx_queues; i++) {
7445                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7446
7447                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7448                         return true;
7449         }
7450
7451         for (i = 0; i < adapter->num_xdp_queues; i++) {
7452                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7453
7454                 if (ring->next_to_use != ring->next_to_clean)
7455                         return true;
7456         }
7457
7458         return false;
7459 }
7460
7461 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7462 {
7463         struct ixgbe_hw *hw = &adapter->hw;
7464         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7465         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7466
7467         int i, j;
7468
7469         if (!adapter->num_vfs)
7470                 return false;
7471
7472         /* resetting the PF is only needed for MAC before X550 */
7473         if (hw->mac.type >= ixgbe_mac_X550)
7474                 return false;
7475
7476         for (i = 0; i < adapter->num_vfs; i++) {
7477                 for (j = 0; j < q_per_pool; j++) {
7478                         u32 h, t;
7479
7480                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7481                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7482
7483                         if (h != t)
7484                                 return true;
7485                 }
7486         }
7487
7488         return false;
7489 }
7490
7491 /**
7492  * ixgbe_watchdog_flush_tx - flush queues on link down
7493  * @adapter: pointer to the device adapter structure
7494  **/
7495 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7496 {
7497         if (!netif_carrier_ok(adapter->netdev)) {
7498                 if (ixgbe_ring_tx_pending(adapter) ||
7499                     ixgbe_vf_tx_pending(adapter)) {
7500                         /* We've lost link, so the controller stops DMA,
7501                          * but we've got queued Tx work that's never going
7502                          * to get done, so reset controller to flush Tx.
7503                          * (Do the reset outside of interrupt context).
7504                          */
7505                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7506                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7507                 }
7508         }
7509 }
7510
7511 #ifdef CONFIG_PCI_IOV
7512 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7513 {
7514         struct ixgbe_hw *hw = &adapter->hw;
7515         struct pci_dev *pdev = adapter->pdev;
7516         unsigned int vf;
7517         u32 gpc;
7518
7519         if (!(netif_carrier_ok(adapter->netdev)))
7520                 return;
7521
7522         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7523         if (gpc) /* If incrementing then no need for the check below */
7524                 return;
7525         /* Check to see if a bad DMA write target from an errant or
7526          * malicious VF has caused a PCIe error.  If so then we can
7527          * issue a VFLR to the offending VF(s) and then resume without
7528          * requesting a full slot reset.
7529          */
7530
7531         if (!pdev)
7532                 return;
7533
7534         /* check status reg for all VFs owned by this PF */
7535         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7536                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7537                 u16 status_reg;
7538
7539                 if (!vfdev)
7540                         continue;
7541                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7542                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7543                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7544                         pcie_flr(vfdev);
7545         }
7546 }
7547
7548 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7549 {
7550         u32 ssvpc;
7551
7552         /* Do not perform spoof check for 82598 or if not in IOV mode */
7553         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7554             adapter->num_vfs == 0)
7555                 return;
7556
7557         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7558
7559         /*
7560          * ssvpc register is cleared on read, if zero then no
7561          * spoofed packets in the last interval.
7562          */
7563         if (!ssvpc)
7564                 return;
7565
7566         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7567 }
7568 #else
7569 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7570 {
7571 }
7572
7573 static void
7574 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7575 {
7576 }
7577 #endif /* CONFIG_PCI_IOV */
7578
7579
7580 /**
7581  * ixgbe_watchdog_subtask - check and bring link up
7582  * @adapter: pointer to the device adapter structure
7583  **/
7584 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7585 {
7586         /* if interface is down, removing or resetting, do nothing */
7587         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7588             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7589             test_bit(__IXGBE_RESETTING, &adapter->state))
7590                 return;
7591
7592         ixgbe_watchdog_update_link(adapter);
7593
7594         if (adapter->link_up)
7595                 ixgbe_watchdog_link_is_up(adapter);
7596         else
7597                 ixgbe_watchdog_link_is_down(adapter);
7598
7599         ixgbe_check_for_bad_vf(adapter);
7600         ixgbe_spoof_check(adapter);
7601         ixgbe_update_stats(adapter);
7602
7603         ixgbe_watchdog_flush_tx(adapter);
7604 }
7605
7606 /**
7607  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7608  * @adapter: the ixgbe adapter structure
7609  **/
7610 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7611 {
7612         struct ixgbe_hw *hw = &adapter->hw;
7613         s32 err;
7614
7615         /* not searching for SFP so there is nothing to do here */
7616         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7617             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7618                 return;
7619
7620         if (adapter->sfp_poll_time &&
7621             time_after(adapter->sfp_poll_time, jiffies))
7622                 return; /* If not yet time to poll for SFP */
7623
7624         /* someone else is in init, wait until next service event */
7625         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7626                 return;
7627
7628         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7629
7630         err = hw->phy.ops.identify_sfp(hw);
7631         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7632                 goto sfp_out;
7633
7634         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7635                 /* If no cable is present, then we need to reset
7636                  * the next time we find a good cable. */
7637                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7638         }
7639
7640         /* exit on error */
7641         if (err)
7642                 goto sfp_out;
7643
7644         /* exit if reset not needed */
7645         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7646                 goto sfp_out;
7647
7648         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7649
7650         /*
7651          * A module may be identified correctly, but the EEPROM may not have
7652          * support for that module.  setup_sfp() will fail in that case, so
7653          * we should not allow that module to load.
7654          */
7655         if (hw->mac.type == ixgbe_mac_82598EB)
7656                 err = hw->phy.ops.reset(hw);
7657         else
7658                 err = hw->mac.ops.setup_sfp(hw);
7659
7660         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7661                 goto sfp_out;
7662
7663         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7664         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7665
7666 sfp_out:
7667         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7668
7669         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7670             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7671                 e_dev_err("failed to initialize because an unsupported "
7672                           "SFP+ module type was detected.\n");
7673                 e_dev_err("Reload the driver after installing a "
7674                           "supported module.\n");
7675                 unregister_netdev(adapter->netdev);
7676         }
7677 }
7678
7679 /**
7680  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7681  * @adapter: the ixgbe adapter structure
7682  **/
7683 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7684 {
7685         struct ixgbe_hw *hw = &adapter->hw;
7686         u32 cap_speed;
7687         u32 speed;
7688         bool autoneg = false;
7689
7690         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7691                 return;
7692
7693         /* someone else is in init, wait until next service event */
7694         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7695                 return;
7696
7697         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7698
7699         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7700
7701         /* advertise highest capable link speed */
7702         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7703                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7704         else
7705                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7706                                      IXGBE_LINK_SPEED_1GB_FULL);
7707
7708         if (hw->mac.ops.setup_link)
7709                 hw->mac.ops.setup_link(hw, speed, true);
7710
7711         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7712         adapter->link_check_timeout = jiffies;
7713         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7714 }
7715
7716 /**
7717  * ixgbe_service_timer - Timer Call-back
7718  * @t: pointer to timer_list structure
7719  **/
7720 static void ixgbe_service_timer(struct timer_list *t)
7721 {
7722         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7723         unsigned long next_event_offset;
7724
7725         /* poll faster when waiting for link */
7726         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7727                 next_event_offset = HZ / 10;
7728         else
7729                 next_event_offset = HZ * 2;
7730
7731         /* Reset the timer */
7732         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7733
7734         ixgbe_service_event_schedule(adapter);
7735 }
7736
7737 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7738 {
7739         struct ixgbe_hw *hw = &adapter->hw;
7740         u32 status;
7741
7742         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7743                 return;
7744
7745         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7746
7747         if (!hw->phy.ops.handle_lasi)
7748                 return;
7749
7750         status = hw->phy.ops.handle_lasi(&adapter->hw);
7751         if (status != IXGBE_ERR_OVERTEMP)
7752                 return;
7753
7754         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7755 }
7756
7757 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7758 {
7759         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7760                 return;
7761
7762         rtnl_lock();
7763         /* If we're already down, removing or resetting, just bail */
7764         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7765             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7766             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7767                 rtnl_unlock();
7768                 return;
7769         }
7770
7771         ixgbe_dump(adapter);
7772         netdev_err(adapter->netdev, "Reset adapter\n");
7773         adapter->tx_timeout_count++;
7774
7775         ixgbe_reinit_locked(adapter);
7776         rtnl_unlock();
7777 }
7778
7779 /**
7780  * ixgbe_service_task - manages and runs subtasks
7781  * @work: pointer to work_struct containing our data
7782  **/
7783 static void ixgbe_service_task(struct work_struct *work)
7784 {
7785         struct ixgbe_adapter *adapter = container_of(work,
7786                                                      struct ixgbe_adapter,
7787                                                      service_task);
7788         if (ixgbe_removed(adapter->hw.hw_addr)) {
7789                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7790                         rtnl_lock();
7791                         ixgbe_down(adapter);
7792                         rtnl_unlock();
7793                 }
7794                 ixgbe_service_event_complete(adapter);
7795                 return;
7796         }
7797         if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7798                 rtnl_lock();
7799                 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7800                 udp_tunnel_get_rx_info(adapter->netdev);
7801                 rtnl_unlock();
7802         }
7803         ixgbe_reset_subtask(adapter);
7804         ixgbe_phy_interrupt_subtask(adapter);
7805         ixgbe_sfp_detection_subtask(adapter);
7806         ixgbe_sfp_link_config_subtask(adapter);
7807         ixgbe_check_overtemp_subtask(adapter);
7808         ixgbe_watchdog_subtask(adapter);
7809         ixgbe_fdir_reinit_subtask(adapter);
7810         ixgbe_check_hang_subtask(adapter);
7811
7812         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7813                 ixgbe_ptp_overflow_check(adapter);
7814                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7815                         ixgbe_ptp_rx_hang(adapter);
7816                 ixgbe_ptp_tx_hang(adapter);
7817         }
7818
7819         ixgbe_service_event_complete(adapter);
7820 }
7821
7822 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7823                      struct ixgbe_tx_buffer *first,
7824                      u8 *hdr_len,
7825                      struct ixgbe_ipsec_tx_data *itd)
7826 {
7827         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7828         struct sk_buff *skb = first->skb;
7829         union {
7830                 struct iphdr *v4;
7831                 struct ipv6hdr *v6;
7832                 unsigned char *hdr;
7833         } ip;
7834         union {
7835                 struct tcphdr *tcp;
7836                 unsigned char *hdr;
7837         } l4;
7838         u32 paylen, l4_offset;
7839         u32 fceof_saidx = 0;
7840         int err;
7841
7842         if (skb->ip_summed != CHECKSUM_PARTIAL)
7843                 return 0;
7844
7845         if (!skb_is_gso(skb))
7846                 return 0;
7847
7848         err = skb_cow_head(skb, 0);
7849         if (err < 0)
7850                 return err;
7851
7852         if (eth_p_mpls(first->protocol))
7853                 ip.hdr = skb_inner_network_header(skb);
7854         else
7855                 ip.hdr = skb_network_header(skb);
7856         l4.hdr = skb_checksum_start(skb);
7857
7858         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7859         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7860
7861         /* initialize outer IP header fields */
7862         if (ip.v4->version == 4) {
7863                 unsigned char *csum_start = skb_checksum_start(skb);
7864                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7865                 int len = csum_start - trans_start;
7866
7867                 /* IP header will have to cancel out any data that
7868                  * is not a part of the outer IP header, so set to
7869                  * a reverse csum if needed, else init check to 0.
7870                  */
7871                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7872                                            csum_fold(csum_partial(trans_start,
7873                                                                   len, 0)) : 0;
7874                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7875
7876                 ip.v4->tot_len = 0;
7877                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7878                                    IXGBE_TX_FLAGS_CSUM |
7879                                    IXGBE_TX_FLAGS_IPV4;
7880         } else {
7881                 ip.v6->payload_len = 0;
7882                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7883                                    IXGBE_TX_FLAGS_CSUM;
7884         }
7885
7886         /* determine offset of inner transport header */
7887         l4_offset = l4.hdr - skb->data;
7888
7889         /* compute length of segmentation header */
7890         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7891
7892         /* remove payload length from inner checksum */
7893         paylen = skb->len - l4_offset;
7894         csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
7895
7896         /* update gso size and bytecount with header size */
7897         first->gso_segs = skb_shinfo(skb)->gso_segs;
7898         first->bytecount += (first->gso_segs - 1) * *hdr_len;
7899
7900         /* mss_l4len_id: use 0 as index for TSO */
7901         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7902         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7903
7904         fceof_saidx |= itd->sa_idx;
7905         type_tucmd |= itd->flags | itd->trailer_len;
7906
7907         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7908         vlan_macip_lens = l4.hdr - ip.hdr;
7909         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7910         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7911
7912         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
7913                           mss_l4len_idx);
7914
7915         return 1;
7916 }
7917
7918 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7919 {
7920         unsigned int offset = 0;
7921
7922         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7923
7924         return offset == skb_checksum_start_offset(skb);
7925 }
7926
7927 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7928                           struct ixgbe_tx_buffer *first,
7929                           struct ixgbe_ipsec_tx_data *itd)
7930 {
7931         struct sk_buff *skb = first->skb;
7932         u32 vlan_macip_lens = 0;
7933         u32 fceof_saidx = 0;
7934         u32 type_tucmd = 0;
7935
7936         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7937 csum_failed:
7938                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7939                                          IXGBE_TX_FLAGS_CC)))
7940                         return;
7941                 goto no_csum;
7942         }
7943
7944         switch (skb->csum_offset) {
7945         case offsetof(struct tcphdr, check):
7946                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7947                 /* fall through */
7948         case offsetof(struct udphdr, check):
7949                 break;
7950         case offsetof(struct sctphdr, checksum):
7951                 /* validate that this is actually an SCTP request */
7952                 if (((first->protocol == htons(ETH_P_IP)) &&
7953                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7954                     ((first->protocol == htons(ETH_P_IPV6)) &&
7955                      ixgbe_ipv6_csum_is_sctp(skb))) {
7956                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7957                         break;
7958                 }
7959                 /* fall through */
7960         default:
7961                 skb_checksum_help(skb);
7962                 goto csum_failed;
7963         }
7964
7965         /* update TX checksum flag */
7966         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7967         vlan_macip_lens = skb_checksum_start_offset(skb) -
7968                           skb_network_offset(skb);
7969 no_csum:
7970         /* vlan_macip_lens: MACLEN, VLAN tag */
7971         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7972         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7973
7974         fceof_saidx |= itd->sa_idx;
7975         type_tucmd |= itd->flags | itd->trailer_len;
7976
7977         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
7978 }
7979
7980 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7981         ((_flag <= _result) ? \
7982          ((u32)(_input & _flag) * (_result / _flag)) : \
7983          ((u32)(_input & _flag) / (_flag / _result)))
7984
7985 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7986 {
7987         /* set type for advanced descriptor with frame checksum insertion */
7988         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7989                        IXGBE_ADVTXD_DCMD_DEXT |
7990                        IXGBE_ADVTXD_DCMD_IFCS;
7991
7992         /* set HW vlan bit if vlan is present */
7993         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7994                                    IXGBE_ADVTXD_DCMD_VLE);
7995
7996         /* set segmentation enable bits for TSO/FSO */
7997         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7998                                    IXGBE_ADVTXD_DCMD_TSE);
7999
8000         /* set timestamp bit if present */
8001         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8002                                    IXGBE_ADVTXD_MAC_TSTAMP);
8003
8004         /* insert frame checksum */
8005         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8006
8007         return cmd_type;
8008 }
8009
8010 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8011                                    u32 tx_flags, unsigned int paylen)
8012 {
8013         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8014
8015         /* enable L4 checksum for TSO and TX checksum offload */
8016         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8017                                         IXGBE_TX_FLAGS_CSUM,
8018                                         IXGBE_ADVTXD_POPTS_TXSM);
8019
8020         /* enable IPv4 checksum for TSO */
8021         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8022                                         IXGBE_TX_FLAGS_IPV4,
8023                                         IXGBE_ADVTXD_POPTS_IXSM);
8024
8025         /* enable IPsec */
8026         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8027                                         IXGBE_TX_FLAGS_IPSEC,
8028                                         IXGBE_ADVTXD_POPTS_IPSEC);
8029
8030         /*
8031          * Check Context must be set if Tx switch is enabled, which it
8032          * always is for case where virtual functions are running
8033          */
8034         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8035                                         IXGBE_TX_FLAGS_CC,
8036                                         IXGBE_ADVTXD_CC);
8037
8038         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8039 }
8040
8041 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8042 {
8043         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8044
8045         /* Herbert's original patch had:
8046          *  smp_mb__after_netif_stop_queue();
8047          * but since that doesn't exist yet, just open code it.
8048          */
8049         smp_mb();
8050
8051         /* We need to check again in a case another CPU has just
8052          * made room available.
8053          */
8054         if (likely(ixgbe_desc_unused(tx_ring) < size))
8055                 return -EBUSY;
8056
8057         /* A reprieve! - use start_queue because it doesn't call schedule */
8058         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8059         ++tx_ring->tx_stats.restart_queue;
8060         return 0;
8061 }
8062
8063 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8064 {
8065         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8066                 return 0;
8067
8068         return __ixgbe_maybe_stop_tx(tx_ring, size);
8069 }
8070
8071 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8072                        IXGBE_TXD_CMD_RS)
8073
8074 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8075                         struct ixgbe_tx_buffer *first,
8076                         const u8 hdr_len)
8077 {
8078         struct sk_buff *skb = first->skb;
8079         struct ixgbe_tx_buffer *tx_buffer;
8080         union ixgbe_adv_tx_desc *tx_desc;
8081         struct skb_frag_struct *frag;
8082         dma_addr_t dma;
8083         unsigned int data_len, size;
8084         u32 tx_flags = first->tx_flags;
8085         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8086         u16 i = tx_ring->next_to_use;
8087
8088         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8089
8090         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8091
8092         size = skb_headlen(skb);
8093         data_len = skb->data_len;
8094
8095 #ifdef IXGBE_FCOE
8096         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8097                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8098                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8099                         data_len = 0;
8100                 } else {
8101                         data_len -= sizeof(struct fcoe_crc_eof);
8102                 }
8103         }
8104
8105 #endif
8106         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8107
8108         tx_buffer = first;
8109
8110         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8111                 if (dma_mapping_error(tx_ring->dev, dma))
8112                         goto dma_error;
8113
8114                 /* record length, and DMA address */
8115                 dma_unmap_len_set(tx_buffer, len, size);
8116                 dma_unmap_addr_set(tx_buffer, dma, dma);
8117
8118                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8119
8120                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8121                         tx_desc->read.cmd_type_len =
8122                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8123
8124                         i++;
8125                         tx_desc++;
8126                         if (i == tx_ring->count) {
8127                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8128                                 i = 0;
8129                         }
8130                         tx_desc->read.olinfo_status = 0;
8131
8132                         dma += IXGBE_MAX_DATA_PER_TXD;
8133                         size -= IXGBE_MAX_DATA_PER_TXD;
8134
8135                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8136                 }
8137
8138                 if (likely(!data_len))
8139                         break;
8140
8141                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8142
8143                 i++;
8144                 tx_desc++;
8145                 if (i == tx_ring->count) {
8146                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8147                         i = 0;
8148                 }
8149                 tx_desc->read.olinfo_status = 0;
8150
8151 #ifdef IXGBE_FCOE
8152                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8153 #else
8154                 size = skb_frag_size(frag);
8155 #endif
8156                 data_len -= size;
8157
8158                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8159                                        DMA_TO_DEVICE);
8160
8161                 tx_buffer = &tx_ring->tx_buffer_info[i];
8162         }
8163
8164         /* write last descriptor with RS and EOP bits */
8165         cmd_type |= size | IXGBE_TXD_CMD;
8166         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8167
8168         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8169
8170         /* set the timestamp */
8171         first->time_stamp = jiffies;
8172
8173         /*
8174          * Force memory writes to complete before letting h/w know there
8175          * are new descriptors to fetch.  (Only applicable for weak-ordered
8176          * memory model archs, such as IA-64).
8177          *
8178          * We also need this memory barrier to make certain all of the
8179          * status bits have been updated before next_to_watch is written.
8180          */
8181         wmb();
8182
8183         /* set next_to_watch value indicating a packet is present */
8184         first->next_to_watch = tx_desc;
8185
8186         i++;
8187         if (i == tx_ring->count)
8188                 i = 0;
8189
8190         tx_ring->next_to_use = i;
8191
8192         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8193
8194         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8195                 writel(i, tx_ring->tail);
8196
8197                 /* we need this if more than one processor can write to our tail
8198                  * at a time, it synchronizes IO on IA64/Altix systems
8199                  */
8200                 mmiowb();
8201         }
8202
8203         return 0;
8204 dma_error:
8205         dev_err(tx_ring->dev, "TX DMA map failed\n");
8206
8207         /* clear dma mappings for failed tx_buffer_info map */
8208         for (;;) {
8209                 tx_buffer = &tx_ring->tx_buffer_info[i];
8210                 if (dma_unmap_len(tx_buffer, len))
8211                         dma_unmap_page(tx_ring->dev,
8212                                        dma_unmap_addr(tx_buffer, dma),
8213                                        dma_unmap_len(tx_buffer, len),
8214                                        DMA_TO_DEVICE);
8215                 dma_unmap_len_set(tx_buffer, len, 0);
8216                 if (tx_buffer == first)
8217                         break;
8218                 if (i == 0)
8219                         i += tx_ring->count;
8220                 i--;
8221         }
8222
8223         dev_kfree_skb_any(first->skb);
8224         first->skb = NULL;
8225
8226         tx_ring->next_to_use = i;
8227
8228         return -1;
8229 }
8230
8231 static void ixgbe_atr(struct ixgbe_ring *ring,
8232                       struct ixgbe_tx_buffer *first)
8233 {
8234         struct ixgbe_q_vector *q_vector = ring->q_vector;
8235         union ixgbe_atr_hash_dword input = { .dword = 0 };
8236         union ixgbe_atr_hash_dword common = { .dword = 0 };
8237         union {
8238                 unsigned char *network;
8239                 struct iphdr *ipv4;
8240                 struct ipv6hdr *ipv6;
8241         } hdr;
8242         struct tcphdr *th;
8243         unsigned int hlen;
8244         struct sk_buff *skb;
8245         __be16 vlan_id;
8246         int l4_proto;
8247
8248         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8249         if (!q_vector)
8250                 return;
8251
8252         /* do nothing if sampling is disabled */
8253         if (!ring->atr_sample_rate)
8254                 return;
8255
8256         ring->atr_count++;
8257
8258         /* currently only IPv4/IPv6 with TCP is supported */
8259         if ((first->protocol != htons(ETH_P_IP)) &&
8260             (first->protocol != htons(ETH_P_IPV6)))
8261                 return;
8262
8263         /* snag network header to get L4 type and address */
8264         skb = first->skb;
8265         hdr.network = skb_network_header(skb);
8266         if (unlikely(hdr.network <= skb->data))
8267                 return;
8268         if (skb->encapsulation &&
8269             first->protocol == htons(ETH_P_IP) &&
8270             hdr.ipv4->protocol == IPPROTO_UDP) {
8271                 struct ixgbe_adapter *adapter = q_vector->adapter;
8272
8273                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8274                              VXLAN_HEADROOM))
8275                         return;
8276
8277                 /* verify the port is recognized as VXLAN */
8278                 if (adapter->vxlan_port &&
8279                     udp_hdr(skb)->dest == adapter->vxlan_port)
8280                         hdr.network = skb_inner_network_header(skb);
8281
8282                 if (adapter->geneve_port &&
8283                     udp_hdr(skb)->dest == adapter->geneve_port)
8284                         hdr.network = skb_inner_network_header(skb);
8285         }
8286
8287         /* Make sure we have at least [minimum IPv4 header + TCP]
8288          * or [IPv6 header] bytes
8289          */
8290         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8291                 return;
8292
8293         /* Currently only IPv4/IPv6 with TCP is supported */
8294         switch (hdr.ipv4->version) {
8295         case IPVERSION:
8296                 /* access ihl as u8 to avoid unaligned access on ia64 */
8297                 hlen = (hdr.network[0] & 0x0F) << 2;
8298                 l4_proto = hdr.ipv4->protocol;
8299                 break;
8300         case 6:
8301                 hlen = hdr.network - skb->data;
8302                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8303                 hlen -= hdr.network - skb->data;
8304                 break;
8305         default:
8306                 return;
8307         }
8308
8309         if (l4_proto != IPPROTO_TCP)
8310                 return;
8311
8312         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8313                      hlen + sizeof(struct tcphdr)))
8314                 return;
8315
8316         th = (struct tcphdr *)(hdr.network + hlen);
8317
8318         /* skip this packet since the socket is closing */
8319         if (th->fin)
8320                 return;
8321
8322         /* sample on all syn packets or once every atr sample count */
8323         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8324                 return;
8325
8326         /* reset sample count */
8327         ring->atr_count = 0;
8328
8329         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8330
8331         /*
8332          * src and dst are inverted, think how the receiver sees them
8333          *
8334          * The input is broken into two sections, a non-compressed section
8335          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8336          * is XORed together and stored in the compressed dword.
8337          */
8338         input.formatted.vlan_id = vlan_id;
8339
8340         /*
8341          * since src port and flex bytes occupy the same word XOR them together
8342          * and write the value to source port portion of compressed dword
8343          */
8344         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8345                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8346         else
8347                 common.port.src ^= th->dest ^ first->protocol;
8348         common.port.dst ^= th->source;
8349
8350         switch (hdr.ipv4->version) {
8351         case IPVERSION:
8352                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8353                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8354                 break;
8355         case 6:
8356                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8357                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8358                              hdr.ipv6->saddr.s6_addr32[1] ^
8359                              hdr.ipv6->saddr.s6_addr32[2] ^
8360                              hdr.ipv6->saddr.s6_addr32[3] ^
8361                              hdr.ipv6->daddr.s6_addr32[0] ^
8362                              hdr.ipv6->daddr.s6_addr32[1] ^
8363                              hdr.ipv6->daddr.s6_addr32[2] ^
8364                              hdr.ipv6->daddr.s6_addr32[3];
8365                 break;
8366         default:
8367                 break;
8368         }
8369
8370         if (hdr.network != skb_network_header(skb))
8371                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8372
8373         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8374         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8375                                               input, common, ring->queue_index);
8376 }
8377
8378 #ifdef IXGBE_FCOE
8379 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8380                               struct net_device *sb_dev,
8381                               select_queue_fallback_t fallback)
8382 {
8383         struct ixgbe_adapter *adapter;
8384         struct ixgbe_ring_feature *f;
8385         int txq;
8386
8387         if (sb_dev) {
8388                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8389                 struct net_device *vdev = sb_dev;
8390
8391                 txq = vdev->tc_to_txq[tc].offset;
8392                 txq += reciprocal_scale(skb_get_hash(skb),
8393                                         vdev->tc_to_txq[tc].count);
8394
8395                 return txq;
8396         }
8397
8398         /*
8399          * only execute the code below if protocol is FCoE
8400          * or FIP and we have FCoE enabled on the adapter
8401          */
8402         switch (vlan_get_protocol(skb)) {
8403         case htons(ETH_P_FCOE):
8404         case htons(ETH_P_FIP):
8405                 adapter = netdev_priv(dev);
8406
8407                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8408                         break;
8409                 /* fall through */
8410         default:
8411                 return fallback(dev, skb, sb_dev);
8412         }
8413
8414         f = &adapter->ring_feature[RING_F_FCOE];
8415
8416         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8417                                            smp_processor_id();
8418
8419         while (txq >= f->indices)
8420                 txq -= f->indices;
8421
8422         return txq + f->offset;
8423 }
8424
8425 #endif
8426 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8427                                struct xdp_frame *xdpf)
8428 {
8429         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8430         struct ixgbe_tx_buffer *tx_buffer;
8431         union ixgbe_adv_tx_desc *tx_desc;
8432         u32 len, cmd_type;
8433         dma_addr_t dma;
8434         u16 i;
8435
8436         len = xdpf->len;
8437
8438         if (unlikely(!ixgbe_desc_unused(ring)))
8439                 return IXGBE_XDP_CONSUMED;
8440
8441         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8442         if (dma_mapping_error(ring->dev, dma))
8443                 return IXGBE_XDP_CONSUMED;
8444
8445         /* record the location of the first descriptor for this packet */
8446         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8447         tx_buffer->bytecount = len;
8448         tx_buffer->gso_segs = 1;
8449         tx_buffer->protocol = 0;
8450
8451         i = ring->next_to_use;
8452         tx_desc = IXGBE_TX_DESC(ring, i);
8453
8454         dma_unmap_len_set(tx_buffer, len, len);
8455         dma_unmap_addr_set(tx_buffer, dma, dma);
8456         tx_buffer->xdpf = xdpf;
8457
8458         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8459
8460         /* put descriptor type bits */
8461         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8462                    IXGBE_ADVTXD_DCMD_DEXT |
8463                    IXGBE_ADVTXD_DCMD_IFCS;
8464         cmd_type |= len | IXGBE_TXD_CMD;
8465         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8466         tx_desc->read.olinfo_status =
8467                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8468
8469         /* Avoid any potential race with xdp_xmit and cleanup */
8470         smp_wmb();
8471
8472         /* set next_to_watch value indicating a packet is present */
8473         i++;
8474         if (i == ring->count)
8475                 i = 0;
8476
8477         tx_buffer->next_to_watch = tx_desc;
8478         ring->next_to_use = i;
8479
8480         return IXGBE_XDP_TX;
8481 }
8482
8483 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8484                           struct ixgbe_adapter *adapter,
8485                           struct ixgbe_ring *tx_ring)
8486 {
8487         struct ixgbe_tx_buffer *first;
8488         int tso;
8489         u32 tx_flags = 0;
8490         unsigned short f;
8491         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8492         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8493         __be16 protocol = skb->protocol;
8494         u8 hdr_len = 0;
8495
8496         /*
8497          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8498          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8499          *       + 2 desc gap to keep tail from touching head,
8500          *       + 1 desc for context descriptor,
8501          * otherwise try next time
8502          */
8503         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8504                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8505
8506         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8507                 tx_ring->tx_stats.tx_busy++;
8508                 return NETDEV_TX_BUSY;
8509         }
8510
8511         /* record the location of the first descriptor for this packet */
8512         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8513         first->skb = skb;
8514         first->bytecount = skb->len;
8515         first->gso_segs = 1;
8516
8517         /* if we have a HW VLAN tag being added default to the HW one */
8518         if (skb_vlan_tag_present(skb)) {
8519                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8520                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8521         /* else if it is a SW VLAN check the next protocol and store the tag */
8522         } else if (protocol == htons(ETH_P_8021Q)) {
8523                 struct vlan_hdr *vhdr, _vhdr;
8524                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8525                 if (!vhdr)
8526                         goto out_drop;
8527
8528                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8529                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8530                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8531         }
8532         protocol = vlan_get_protocol(skb);
8533
8534         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8535             adapter->ptp_clock) {
8536                 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8537                                            &adapter->state)) {
8538                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8539                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8540
8541                         /* schedule check for Tx timestamp */
8542                         adapter->ptp_tx_skb = skb_get(skb);
8543                         adapter->ptp_tx_start = jiffies;
8544                         schedule_work(&adapter->ptp_tx_work);
8545                 } else {
8546                         adapter->tx_hwtstamp_skipped++;
8547                 }
8548         }
8549
8550         skb_tx_timestamp(skb);
8551
8552 #ifdef CONFIG_PCI_IOV
8553         /*
8554          * Use the l2switch_enable flag - would be false if the DMA
8555          * Tx switch had been disabled.
8556          */
8557         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8558                 tx_flags |= IXGBE_TX_FLAGS_CC;
8559
8560 #endif
8561         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8562         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8563             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8564              (skb->priority != TC_PRIO_CONTROL))) {
8565                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8566                 tx_flags |= (skb->priority & 0x7) <<
8567                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8568                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8569                         struct vlan_ethhdr *vhdr;
8570
8571                         if (skb_cow_head(skb, 0))
8572                                 goto out_drop;
8573                         vhdr = (struct vlan_ethhdr *)skb->data;
8574                         vhdr->h_vlan_TCI = htons(tx_flags >>
8575                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8576                 } else {
8577                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8578                 }
8579         }
8580
8581         /* record initial flags and protocol */
8582         first->tx_flags = tx_flags;
8583         first->protocol = protocol;
8584
8585 #ifdef IXGBE_FCOE
8586         /* setup tx offload for FCoE */
8587         if ((protocol == htons(ETH_P_FCOE)) &&
8588             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8589                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8590                 if (tso < 0)
8591                         goto out_drop;
8592
8593                 goto xmit_fcoe;
8594         }
8595
8596 #endif /* IXGBE_FCOE */
8597
8598 #ifdef CONFIG_XFRM_OFFLOAD
8599         if (skb->sp && !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8600                 goto out_drop;
8601 #endif
8602         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8603         if (tso < 0)
8604                 goto out_drop;
8605         else if (!tso)
8606                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8607
8608         /* add the ATR filter if ATR is on */
8609         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8610                 ixgbe_atr(tx_ring, first);
8611
8612 #ifdef IXGBE_FCOE
8613 xmit_fcoe:
8614 #endif /* IXGBE_FCOE */
8615         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8616                 goto cleanup_tx_timestamp;
8617
8618         return NETDEV_TX_OK;
8619
8620 out_drop:
8621         dev_kfree_skb_any(first->skb);
8622         first->skb = NULL;
8623 cleanup_tx_timestamp:
8624         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8625                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8626                 adapter->ptp_tx_skb = NULL;
8627                 cancel_work_sync(&adapter->ptp_tx_work);
8628                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8629         }
8630
8631         return NETDEV_TX_OK;
8632 }
8633
8634 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8635                                       struct net_device *netdev,
8636                                       struct ixgbe_ring *ring)
8637 {
8638         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8639         struct ixgbe_ring *tx_ring;
8640
8641         /*
8642          * The minimum packet size for olinfo paylen is 17 so pad the skb
8643          * in order to meet this minimum size requirement.
8644          */
8645         if (skb_put_padto(skb, 17))
8646                 return NETDEV_TX_OK;
8647
8648         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8649
8650         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8651 }
8652
8653 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8654                                     struct net_device *netdev)
8655 {
8656         return __ixgbe_xmit_frame(skb, netdev, NULL);
8657 }
8658
8659 /**
8660  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8661  * @netdev: network interface device structure
8662  * @p: pointer to an address structure
8663  *
8664  * Returns 0 on success, negative on failure
8665  **/
8666 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8667 {
8668         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8669         struct ixgbe_hw *hw = &adapter->hw;
8670         struct sockaddr *addr = p;
8671
8672         if (!is_valid_ether_addr(addr->sa_data))
8673                 return -EADDRNOTAVAIL;
8674
8675         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8676         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8677
8678         ixgbe_mac_set_default_filter(adapter);
8679
8680         return 0;
8681 }
8682
8683 static int
8684 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8685 {
8686         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8687         struct ixgbe_hw *hw = &adapter->hw;
8688         u16 value;
8689         int rc;
8690
8691         if (prtad != hw->phy.mdio.prtad)
8692                 return -EINVAL;
8693         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8694         if (!rc)
8695                 rc = value;
8696         return rc;
8697 }
8698
8699 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8700                             u16 addr, u16 value)
8701 {
8702         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8703         struct ixgbe_hw *hw = &adapter->hw;
8704
8705         if (prtad != hw->phy.mdio.prtad)
8706                 return -EINVAL;
8707         return hw->phy.ops.write_reg(hw, addr, devad, value);
8708 }
8709
8710 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8711 {
8712         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8713
8714         switch (cmd) {
8715         case SIOCSHWTSTAMP:
8716                 return ixgbe_ptp_set_ts_config(adapter, req);
8717         case SIOCGHWTSTAMP:
8718                 return ixgbe_ptp_get_ts_config(adapter, req);
8719         case SIOCGMIIPHY:
8720                 if (!adapter->hw.phy.ops.read_reg)
8721                         return -EOPNOTSUPP;
8722                 /* fall through */
8723         default:
8724                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8725         }
8726 }
8727
8728 /**
8729  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8730  * netdev->dev_addrs
8731  * @dev: network interface device structure
8732  *
8733  * Returns non-zero on failure
8734  **/
8735 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8736 {
8737         int err = 0;
8738         struct ixgbe_adapter *adapter = netdev_priv(dev);
8739         struct ixgbe_hw *hw = &adapter->hw;
8740
8741         if (is_valid_ether_addr(hw->mac.san_addr)) {
8742                 rtnl_lock();
8743                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8744                 rtnl_unlock();
8745
8746                 /* update SAN MAC vmdq pool selection */
8747                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8748         }
8749         return err;
8750 }
8751
8752 /**
8753  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8754  * netdev->dev_addrs
8755  * @dev: network interface device structure
8756  *
8757  * Returns non-zero on failure
8758  **/
8759 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8760 {
8761         int err = 0;
8762         struct ixgbe_adapter *adapter = netdev_priv(dev);
8763         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8764
8765         if (is_valid_ether_addr(mac->san_addr)) {
8766                 rtnl_lock();
8767                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8768                 rtnl_unlock();
8769         }
8770         return err;
8771 }
8772
8773 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8774                                    struct ixgbe_ring *ring)
8775 {
8776         u64 bytes, packets;
8777         unsigned int start;
8778
8779         if (ring) {
8780                 do {
8781                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8782                         packets = ring->stats.packets;
8783                         bytes   = ring->stats.bytes;
8784                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8785                 stats->tx_packets += packets;
8786                 stats->tx_bytes   += bytes;
8787         }
8788 }
8789
8790 static void ixgbe_get_stats64(struct net_device *netdev,
8791                               struct rtnl_link_stats64 *stats)
8792 {
8793         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8794         int i;
8795
8796         rcu_read_lock();
8797         for (i = 0; i < adapter->num_rx_queues; i++) {
8798                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8799                 u64 bytes, packets;
8800                 unsigned int start;
8801
8802                 if (ring) {
8803                         do {
8804                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8805                                 packets = ring->stats.packets;
8806                                 bytes   = ring->stats.bytes;
8807                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8808                         stats->rx_packets += packets;
8809                         stats->rx_bytes   += bytes;
8810                 }
8811         }
8812
8813         for (i = 0; i < adapter->num_tx_queues; i++) {
8814                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8815
8816                 ixgbe_get_ring_stats64(stats, ring);
8817         }
8818         for (i = 0; i < adapter->num_xdp_queues; i++) {
8819                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8820
8821                 ixgbe_get_ring_stats64(stats, ring);
8822         }
8823         rcu_read_unlock();
8824
8825         /* following stats updated by ixgbe_watchdog_task() */
8826         stats->multicast        = netdev->stats.multicast;
8827         stats->rx_errors        = netdev->stats.rx_errors;
8828         stats->rx_length_errors = netdev->stats.rx_length_errors;
8829         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8830         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8831 }
8832
8833 #ifdef CONFIG_IXGBE_DCB
8834 /**
8835  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8836  * @adapter: pointer to ixgbe_adapter
8837  * @tc: number of traffic classes currently enabled
8838  *
8839  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8840  * 802.1Q priority maps to a packet buffer that exists.
8841  */
8842 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8843 {
8844         struct ixgbe_hw *hw = &adapter->hw;
8845         u32 reg, rsave;
8846         int i;
8847
8848         /* 82598 have a static priority to TC mapping that can not
8849          * be changed so no validation is needed.
8850          */
8851         if (hw->mac.type == ixgbe_mac_82598EB)
8852                 return;
8853
8854         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8855         rsave = reg;
8856
8857         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8858                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8859
8860                 /* If up2tc is out of bounds default to zero */
8861                 if (up2tc > tc)
8862                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8863         }
8864
8865         if (reg != rsave)
8866                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8867
8868         return;
8869 }
8870
8871 /**
8872  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8873  * @adapter: Pointer to adapter struct
8874  *
8875  * Populate the netdev user priority to tc map
8876  */
8877 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8878 {
8879         struct net_device *dev = adapter->netdev;
8880         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8881         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8882         u8 prio;
8883
8884         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8885                 u8 tc = 0;
8886
8887                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8888                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8889                 else if (ets)
8890                         tc = ets->prio_tc[prio];
8891
8892                 netdev_set_prio_tc_map(dev, prio, tc);
8893         }
8894 }
8895
8896 #endif /* CONFIG_IXGBE_DCB */
8897 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
8898 {
8899         struct ixgbe_adapter *adapter = data;
8900         struct ixgbe_fwd_adapter *accel;
8901         int pool;
8902
8903         /* we only care about macvlans... */
8904         if (!netif_is_macvlan(vdev))
8905                 return 0;
8906
8907         /* that have hardware offload enabled... */
8908         accel = macvlan_accel_priv(vdev);
8909         if (!accel)
8910                 return 0;
8911
8912         /* If we can relocate to a different bit do so */
8913         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
8914         if (pool < adapter->num_rx_pools) {
8915                 set_bit(pool, adapter->fwd_bitmask);
8916                 accel->pool = pool;
8917                 return 0;
8918         }
8919
8920         /* if we cannot find a free pool then disable the offload */
8921         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
8922         macvlan_release_l2fw_offload(vdev);
8923
8924         /* unbind the queues and drop the subordinate channel config */
8925         netdev_unbind_sb_channel(adapter->netdev, vdev);
8926         netdev_set_sb_channel(vdev, 0);
8927
8928         kfree(accel);
8929
8930         return 0;
8931 }
8932
8933 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
8934 {
8935         struct ixgbe_adapter *adapter = netdev_priv(dev);
8936
8937         /* flush any stale bits out of the fwd bitmask */
8938         bitmap_clear(adapter->fwd_bitmask, 1, 63);
8939
8940         /* walk through upper devices reassigning pools */
8941         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
8942                                       adapter);
8943 }
8944
8945 /**
8946  * ixgbe_setup_tc - configure net_device for multiple traffic classes
8947  *
8948  * @dev: net device to configure
8949  * @tc: number of traffic classes to enable
8950  */
8951 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8952 {
8953         struct ixgbe_adapter *adapter = netdev_priv(dev);
8954         struct ixgbe_hw *hw = &adapter->hw;
8955
8956         /* Hardware supports up to 8 traffic classes */
8957         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8958                 return -EINVAL;
8959
8960         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8961                 return -EINVAL;
8962
8963         /* Hardware has to reinitialize queues and interrupts to
8964          * match packet buffer alignment. Unfortunately, the
8965          * hardware is not flexible enough to do this dynamically.
8966          */
8967         if (netif_running(dev))
8968                 ixgbe_close(dev);
8969         else
8970                 ixgbe_reset(adapter);
8971
8972         ixgbe_clear_interrupt_scheme(adapter);
8973
8974 #ifdef CONFIG_IXGBE_DCB
8975         if (tc) {
8976                 if (adapter->xdp_prog) {
8977                         e_warn(probe, "DCB is not supported with XDP\n");
8978
8979                         ixgbe_init_interrupt_scheme(adapter);
8980                         if (netif_running(dev))
8981                                 ixgbe_open(dev);
8982                         return -EINVAL;
8983                 }
8984
8985                 netdev_set_num_tc(dev, tc);
8986                 ixgbe_set_prio_tc_map(adapter);
8987
8988                 adapter->hw_tcs = tc;
8989                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8990
8991                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8992                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8993                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
8994                 }
8995         } else {
8996                 netdev_reset_tc(dev);
8997
8998                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8999                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9000
9001                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9002                 adapter->hw_tcs = tc;
9003
9004                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9005                 adapter->dcb_cfg.pfc_mode_enable = false;
9006         }
9007
9008         ixgbe_validate_rtr(adapter, tc);
9009
9010 #endif /* CONFIG_IXGBE_DCB */
9011         ixgbe_init_interrupt_scheme(adapter);
9012
9013         ixgbe_defrag_macvlan_pools(dev);
9014
9015         if (netif_running(dev))
9016                 return ixgbe_open(dev);
9017
9018         return 0;
9019 }
9020
9021 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9022                                struct tc_cls_u32_offload *cls)
9023 {
9024         u32 hdl = cls->knode.handle;
9025         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9026         u32 loc = cls->knode.handle & 0xfffff;
9027         int err = 0, i, j;
9028         struct ixgbe_jump_table *jump = NULL;
9029
9030         if (loc > IXGBE_MAX_HW_ENTRIES)
9031                 return -EINVAL;
9032
9033         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9034                 return -EINVAL;
9035
9036         /* Clear this filter in the link data it is associated with */
9037         if (uhtid != 0x800) {
9038                 jump = adapter->jump_tables[uhtid];
9039                 if (!jump)
9040                         return -EINVAL;
9041                 if (!test_bit(loc - 1, jump->child_loc_map))
9042                         return -EINVAL;
9043                 clear_bit(loc - 1, jump->child_loc_map);
9044         }
9045
9046         /* Check if the filter being deleted is a link */
9047         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9048                 jump = adapter->jump_tables[i];
9049                 if (jump && jump->link_hdl == hdl) {
9050                         /* Delete filters in the hardware in the child hash
9051                          * table associated with this link
9052                          */
9053                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9054                                 if (!test_bit(j, jump->child_loc_map))
9055                                         continue;
9056                                 spin_lock(&adapter->fdir_perfect_lock);
9057                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9058                                                                       NULL,
9059                                                                       j + 1);
9060                                 spin_unlock(&adapter->fdir_perfect_lock);
9061                                 clear_bit(j, jump->child_loc_map);
9062                         }
9063                         /* Remove resources for this link */
9064                         kfree(jump->input);
9065                         kfree(jump->mask);
9066                         kfree(jump);
9067                         adapter->jump_tables[i] = NULL;
9068                         return err;
9069                 }
9070         }
9071
9072         spin_lock(&adapter->fdir_perfect_lock);
9073         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9074         spin_unlock(&adapter->fdir_perfect_lock);
9075         return err;
9076 }
9077
9078 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9079                                             struct tc_cls_u32_offload *cls)
9080 {
9081         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9082
9083         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9084                 return -EINVAL;
9085
9086         /* This ixgbe devices do not support hash tables at the moment
9087          * so abort when given hash tables.
9088          */
9089         if (cls->hnode.divisor > 0)
9090                 return -EINVAL;
9091
9092         set_bit(uhtid - 1, &adapter->tables);
9093         return 0;
9094 }
9095
9096 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9097                                             struct tc_cls_u32_offload *cls)
9098 {
9099         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9100
9101         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9102                 return -EINVAL;
9103
9104         clear_bit(uhtid - 1, &adapter->tables);
9105         return 0;
9106 }
9107
9108 #ifdef CONFIG_NET_CLS_ACT
9109 struct upper_walk_data {
9110         struct ixgbe_adapter *adapter;
9111         u64 action;
9112         int ifindex;
9113         u8 queue;
9114 };
9115
9116 static int get_macvlan_queue(struct net_device *upper, void *_data)
9117 {
9118         if (netif_is_macvlan(upper)) {
9119                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9120                 struct upper_walk_data *data = _data;
9121                 struct ixgbe_adapter *adapter = data->adapter;
9122                 int ifindex = data->ifindex;
9123
9124                 if (vadapter && upper->ifindex == ifindex) {
9125                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9126                         data->action = data->queue;
9127                         return 1;
9128                 }
9129         }
9130
9131         return 0;
9132 }
9133
9134 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9135                                   u8 *queue, u64 *action)
9136 {
9137         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9138         unsigned int num_vfs = adapter->num_vfs, vf;
9139         struct upper_walk_data data;
9140         struct net_device *upper;
9141
9142         /* redirect to a SRIOV VF */
9143         for (vf = 0; vf < num_vfs; ++vf) {
9144                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9145                 if (upper->ifindex == ifindex) {
9146                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9147                         *action = vf + 1;
9148                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9149                         return 0;
9150                 }
9151         }
9152
9153         /* redirect to a offloaded macvlan netdev */
9154         data.adapter = adapter;
9155         data.ifindex = ifindex;
9156         data.action = 0;
9157         data.queue = 0;
9158         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9159                                           get_macvlan_queue, &data)) {
9160                 *action = data.action;
9161                 *queue = data.queue;
9162
9163                 return 0;
9164         }
9165
9166         return -EINVAL;
9167 }
9168
9169 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9170                             struct tcf_exts *exts, u64 *action, u8 *queue)
9171 {
9172         const struct tc_action *a;
9173         int i;
9174
9175         if (!tcf_exts_has_actions(exts))
9176                 return -EINVAL;
9177
9178         tcf_exts_for_each_action(i, a, exts) {
9179                 /* Drop action */
9180                 if (is_tcf_gact_shot(a)) {
9181                         *action = IXGBE_FDIR_DROP_QUEUE;
9182                         *queue = IXGBE_FDIR_DROP_QUEUE;
9183                         return 0;
9184                 }
9185
9186                 /* Redirect to a VF or a offloaded macvlan */
9187                 if (is_tcf_mirred_egress_redirect(a)) {
9188                         struct net_device *dev = tcf_mirred_dev(a);
9189
9190                         if (!dev)
9191                                 return -EINVAL;
9192                         return handle_redirect_action(adapter, dev->ifindex,
9193                                                       queue, action);
9194                 }
9195
9196                 return -EINVAL;
9197         }
9198
9199         return -EINVAL;
9200 }
9201 #else
9202 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9203                             struct tcf_exts *exts, u64 *action, u8 *queue)
9204 {
9205         return -EINVAL;
9206 }
9207 #endif /* CONFIG_NET_CLS_ACT */
9208
9209 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9210                                     union ixgbe_atr_input *mask,
9211                                     struct tc_cls_u32_offload *cls,
9212                                     struct ixgbe_mat_field *field_ptr,
9213                                     struct ixgbe_nexthdr *nexthdr)
9214 {
9215         int i, j, off;
9216         __be32 val, m;
9217         bool found_entry = false, found_jump_field = false;
9218
9219         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9220                 off = cls->knode.sel->keys[i].off;
9221                 val = cls->knode.sel->keys[i].val;
9222                 m = cls->knode.sel->keys[i].mask;
9223
9224                 for (j = 0; field_ptr[j].val; j++) {
9225                         if (field_ptr[j].off == off) {
9226                                 field_ptr[j].val(input, mask, (__force u32)val,
9227                                                  (__force u32)m);
9228                                 input->filter.formatted.flow_type |=
9229                                         field_ptr[j].type;
9230                                 found_entry = true;
9231                                 break;
9232                         }
9233                 }
9234                 if (nexthdr) {
9235                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9236                             nexthdr->val ==
9237                             (__force u32)cls->knode.sel->keys[i].val &&
9238                             nexthdr->mask ==
9239                             (__force u32)cls->knode.sel->keys[i].mask)
9240                                 found_jump_field = true;
9241                         else
9242                                 continue;
9243                 }
9244         }
9245
9246         if (nexthdr && !found_jump_field)
9247                 return -EINVAL;
9248
9249         if (!found_entry)
9250                 return 0;
9251
9252         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9253                                     IXGBE_ATR_L4TYPE_MASK;
9254
9255         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9256                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9257
9258         return 0;
9259 }
9260
9261 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9262                                   struct tc_cls_u32_offload *cls)
9263 {
9264         __be16 protocol = cls->common.protocol;
9265         u32 loc = cls->knode.handle & 0xfffff;
9266         struct ixgbe_hw *hw = &adapter->hw;
9267         struct ixgbe_mat_field *field_ptr;
9268         struct ixgbe_fdir_filter *input = NULL;
9269         union ixgbe_atr_input *mask = NULL;
9270         struct ixgbe_jump_table *jump = NULL;
9271         int i, err = -EINVAL;
9272         u8 queue;
9273         u32 uhtid, link_uhtid;
9274
9275         uhtid = TC_U32_USERHTID(cls->knode.handle);
9276         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9277
9278         /* At the moment cls_u32 jumps to network layer and skips past
9279          * L2 headers. The canonical method to match L2 frames is to use
9280          * negative values. However this is error prone at best but really
9281          * just broken because there is no way to "know" what sort of hdr
9282          * is in front of the network layer. Fix cls_u32 to support L2
9283          * headers when needed.
9284          */
9285         if (protocol != htons(ETH_P_IP))
9286                 return err;
9287
9288         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9289                 e_err(drv, "Location out of range\n");
9290                 return err;
9291         }
9292
9293         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9294          * links and also the fields used to advance the parser across each
9295          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9296          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9297          * To add support for new nodes update ixgbe_model.h parse structures
9298          * this function _should_ be generic try not to hardcode values here.
9299          */
9300         if (uhtid == 0x800) {
9301                 field_ptr = (adapter->jump_tables[0])->mat;
9302         } else {
9303                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9304                         return err;
9305                 if (!adapter->jump_tables[uhtid])
9306                         return err;
9307                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9308         }
9309
9310         if (!field_ptr)
9311                 return err;
9312
9313         /* At this point we know the field_ptr is valid and need to either
9314          * build cls_u32 link or attach filter. Because adding a link to
9315          * a handle that does not exist is invalid and the same for adding
9316          * rules to handles that don't exist.
9317          */
9318
9319         if (link_uhtid) {
9320                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9321
9322                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9323                         return err;
9324
9325                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9326                         return err;
9327
9328                 /* Multiple filters as links to the same hash table are not
9329                  * supported. To add a new filter with the same next header
9330                  * but different match/jump conditions, create a new hash table
9331                  * and link to it.
9332                  */
9333                 if (adapter->jump_tables[link_uhtid] &&
9334                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9335                         e_err(drv, "Link filter exists for link: %x\n",
9336                               link_uhtid);
9337                         return err;
9338                 }
9339
9340                 for (i = 0; nexthdr[i].jump; i++) {
9341                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9342                             nexthdr[i].s != cls->knode.sel->offshift ||
9343                             nexthdr[i].m !=
9344                             (__force u32)cls->knode.sel->offmask)
9345                                 return err;
9346
9347                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9348                         if (!jump)
9349                                 return -ENOMEM;
9350                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9351                         if (!input) {
9352                                 err = -ENOMEM;
9353                                 goto free_jump;
9354                         }
9355                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9356                         if (!mask) {
9357                                 err = -ENOMEM;
9358                                 goto free_input;
9359                         }
9360                         jump->input = input;
9361                         jump->mask = mask;
9362                         jump->link_hdl = cls->knode.handle;
9363
9364                         err = ixgbe_clsu32_build_input(input, mask, cls,
9365                                                        field_ptr, &nexthdr[i]);
9366                         if (!err) {
9367                                 jump->mat = nexthdr[i].jump;
9368                                 adapter->jump_tables[link_uhtid] = jump;
9369                                 break;
9370                         }
9371                 }
9372                 return 0;
9373         }
9374
9375         input = kzalloc(sizeof(*input), GFP_KERNEL);
9376         if (!input)
9377                 return -ENOMEM;
9378         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9379         if (!mask) {
9380                 err = -ENOMEM;
9381                 goto free_input;
9382         }
9383
9384         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9385                 if ((adapter->jump_tables[uhtid])->input)
9386                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9387                                sizeof(*input));
9388                 if ((adapter->jump_tables[uhtid])->mask)
9389                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9390                                sizeof(*mask));
9391
9392                 /* Lookup in all child hash tables if this location is already
9393                  * filled with a filter
9394                  */
9395                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9396                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9397
9398                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9399                                 e_err(drv, "Filter exists in location: %x\n",
9400                                       loc);
9401                                 err = -EINVAL;
9402                                 goto err_out;
9403                         }
9404                 }
9405         }
9406         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9407         if (err)
9408                 goto err_out;
9409
9410         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9411                                &queue);
9412         if (err < 0)
9413                 goto err_out;
9414
9415         input->sw_idx = loc;
9416
9417         spin_lock(&adapter->fdir_perfect_lock);
9418
9419         if (hlist_empty(&adapter->fdir_filter_list)) {
9420                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9421                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9422                 if (err)
9423                         goto err_out_w_lock;
9424         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9425                 err = -EINVAL;
9426                 goto err_out_w_lock;
9427         }
9428
9429         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9430         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9431                                                     input->sw_idx, queue);
9432         if (!err)
9433                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9434         spin_unlock(&adapter->fdir_perfect_lock);
9435
9436         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9437                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9438
9439         kfree(mask);
9440         return err;
9441 err_out_w_lock:
9442         spin_unlock(&adapter->fdir_perfect_lock);
9443 err_out:
9444         kfree(mask);
9445 free_input:
9446         kfree(input);
9447 free_jump:
9448         kfree(jump);
9449         return err;
9450 }
9451
9452 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9453                                   struct tc_cls_u32_offload *cls_u32)
9454 {
9455         switch (cls_u32->command) {
9456         case TC_CLSU32_NEW_KNODE:
9457         case TC_CLSU32_REPLACE_KNODE:
9458                 return ixgbe_configure_clsu32(adapter, cls_u32);
9459         case TC_CLSU32_DELETE_KNODE:
9460                 return ixgbe_delete_clsu32(adapter, cls_u32);
9461         case TC_CLSU32_NEW_HNODE:
9462         case TC_CLSU32_REPLACE_HNODE:
9463                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9464         case TC_CLSU32_DELETE_HNODE:
9465                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9466         default:
9467                 return -EOPNOTSUPP;
9468         }
9469 }
9470
9471 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9472                                    void *cb_priv)
9473 {
9474         struct ixgbe_adapter *adapter = cb_priv;
9475
9476         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9477                 return -EOPNOTSUPP;
9478
9479         switch (type) {
9480         case TC_SETUP_CLSU32:
9481                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9482         default:
9483                 return -EOPNOTSUPP;
9484         }
9485 }
9486
9487 static int ixgbe_setup_tc_block(struct net_device *dev,
9488                                 struct tc_block_offload *f)
9489 {
9490         struct ixgbe_adapter *adapter = netdev_priv(dev);
9491
9492         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9493                 return -EOPNOTSUPP;
9494
9495         switch (f->command) {
9496         case TC_BLOCK_BIND:
9497                 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9498                                              adapter, adapter, f->extack);
9499         case TC_BLOCK_UNBIND:
9500                 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9501                                         adapter);
9502                 return 0;
9503         default:
9504                 return -EOPNOTSUPP;
9505         }
9506 }
9507
9508 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9509                                  struct tc_mqprio_qopt *mqprio)
9510 {
9511         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9512         return ixgbe_setup_tc(dev, mqprio->num_tc);
9513 }
9514
9515 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9516                             void *type_data)
9517 {
9518         switch (type) {
9519         case TC_SETUP_BLOCK:
9520                 return ixgbe_setup_tc_block(dev, type_data);
9521         case TC_SETUP_QDISC_MQPRIO:
9522                 return ixgbe_setup_tc_mqprio(dev, type_data);
9523         default:
9524                 return -EOPNOTSUPP;
9525         }
9526 }
9527
9528 #ifdef CONFIG_PCI_IOV
9529 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9530 {
9531         struct net_device *netdev = adapter->netdev;
9532
9533         rtnl_lock();
9534         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9535         rtnl_unlock();
9536 }
9537
9538 #endif
9539 void ixgbe_do_reset(struct net_device *netdev)
9540 {
9541         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9542
9543         if (netif_running(netdev))
9544                 ixgbe_reinit_locked(adapter);
9545         else
9546                 ixgbe_reset(adapter);
9547 }
9548
9549 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9550                                             netdev_features_t features)
9551 {
9552         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9553
9554         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9555         if (!(features & NETIF_F_RXCSUM))
9556                 features &= ~NETIF_F_LRO;
9557
9558         /* Turn off LRO if not RSC capable */
9559         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9560                 features &= ~NETIF_F_LRO;
9561
9562         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9563                 e_dev_err("LRO is not supported with XDP\n");
9564                 features &= ~NETIF_F_LRO;
9565         }
9566
9567         return features;
9568 }
9569
9570 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9571 {
9572         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9573                         num_online_cpus());
9574
9575         /* go back to full RSS if we're not running SR-IOV */
9576         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9577                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9578                                     IXGBE_FLAG_SRIOV_ENABLED);
9579
9580         adapter->ring_feature[RING_F_RSS].limit = rss;
9581         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9582
9583         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9584 }
9585
9586 static int ixgbe_set_features(struct net_device *netdev,
9587                               netdev_features_t features)
9588 {
9589         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9590         netdev_features_t changed = netdev->features ^ features;
9591         bool need_reset = false;
9592
9593         /* Make sure RSC matches LRO, reset if change */
9594         if (!(features & NETIF_F_LRO)) {
9595                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9596                         need_reset = true;
9597                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9598         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9599                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9600                 if (adapter->rx_itr_setting == 1 ||
9601                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9602                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9603                         need_reset = true;
9604                 } else if ((changed ^ features) & NETIF_F_LRO) {
9605                         e_info(probe, "rx-usecs set too low, "
9606                                "disabling RSC\n");
9607                 }
9608         }
9609
9610         /*
9611          * Check if Flow Director n-tuple support or hw_tc support was
9612          * enabled or disabled.  If the state changed, we need to reset.
9613          */
9614         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9615                 /* turn off ATR, enable perfect filters and reset */
9616                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9617                         need_reset = true;
9618
9619                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9620                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9621         } else {
9622                 /* turn off perfect filters, enable ATR and reset */
9623                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9624                         need_reset = true;
9625
9626                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9627
9628                 /* We cannot enable ATR if SR-IOV is enabled */
9629                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9630                     /* We cannot enable ATR if we have 2 or more tcs */
9631                     (adapter->hw_tcs > 1) ||
9632                     /* We cannot enable ATR if RSS is disabled */
9633                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9634                     /* A sample rate of 0 indicates ATR disabled */
9635                     (!adapter->atr_sample_rate))
9636                         ; /* do nothing not supported */
9637                 else /* otherwise supported and set the flag */
9638                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9639         }
9640
9641         if (changed & NETIF_F_RXALL)
9642                 need_reset = true;
9643
9644         netdev->features = features;
9645
9646         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9647                 if (features & NETIF_F_RXCSUM) {
9648                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9649                 } else {
9650                         u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9651
9652                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9653                 }
9654         }
9655
9656         if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9657                 if (features & NETIF_F_RXCSUM) {
9658                         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9659                 } else {
9660                         u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9661
9662                         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9663                 }
9664         }
9665
9666         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9667                 ixgbe_reset_l2fw_offload(adapter);
9668         else if (need_reset)
9669                 ixgbe_do_reset(netdev);
9670         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9671                             NETIF_F_HW_VLAN_CTAG_FILTER))
9672                 ixgbe_set_rx_mode(netdev);
9673
9674         return 0;
9675 }
9676
9677 /**
9678  * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9679  * @dev: The port's netdev
9680  * @ti: Tunnel endpoint information
9681  **/
9682 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9683                                       struct udp_tunnel_info *ti)
9684 {
9685         struct ixgbe_adapter *adapter = netdev_priv(dev);
9686         struct ixgbe_hw *hw = &adapter->hw;
9687         __be16 port = ti->port;
9688         u32 port_shift = 0;
9689         u32 reg;
9690
9691         if (ti->sa_family != AF_INET)
9692                 return;
9693
9694         switch (ti->type) {
9695         case UDP_TUNNEL_TYPE_VXLAN:
9696                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9697                         return;
9698
9699                 if (adapter->vxlan_port == port)
9700                         return;
9701
9702                 if (adapter->vxlan_port) {
9703                         netdev_info(dev,
9704                                     "VXLAN port %d set, not adding port %d\n",
9705                                     ntohs(adapter->vxlan_port),
9706                                     ntohs(port));
9707                         return;
9708                 }
9709
9710                 adapter->vxlan_port = port;
9711                 break;
9712         case UDP_TUNNEL_TYPE_GENEVE:
9713                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9714                         return;
9715
9716                 if (adapter->geneve_port == port)
9717                         return;
9718
9719                 if (adapter->geneve_port) {
9720                         netdev_info(dev,
9721                                     "GENEVE port %d set, not adding port %d\n",
9722                                     ntohs(adapter->geneve_port),
9723                                     ntohs(port));
9724                         return;
9725                 }
9726
9727                 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9728                 adapter->geneve_port = port;
9729                 break;
9730         default:
9731                 return;
9732         }
9733
9734         reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9735         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9736 }
9737
9738 /**
9739  * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9740  * @dev: The port's netdev
9741  * @ti: Tunnel endpoint information
9742  **/
9743 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9744                                       struct udp_tunnel_info *ti)
9745 {
9746         struct ixgbe_adapter *adapter = netdev_priv(dev);
9747         u32 port_mask;
9748
9749         if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9750             ti->type != UDP_TUNNEL_TYPE_GENEVE)
9751                 return;
9752
9753         if (ti->sa_family != AF_INET)
9754                 return;
9755
9756         switch (ti->type) {
9757         case UDP_TUNNEL_TYPE_VXLAN:
9758                 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9759                         return;
9760
9761                 if (adapter->vxlan_port != ti->port) {
9762                         netdev_info(dev, "VXLAN port %d not found\n",
9763                                     ntohs(ti->port));
9764                         return;
9765                 }
9766
9767                 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9768                 break;
9769         case UDP_TUNNEL_TYPE_GENEVE:
9770                 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9771                         return;
9772
9773                 if (adapter->geneve_port != ti->port) {
9774                         netdev_info(dev, "GENEVE port %d not found\n",
9775                                     ntohs(ti->port));
9776                         return;
9777                 }
9778
9779                 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9780                 break;
9781         default:
9782                 return;
9783         }
9784
9785         ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9786         adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9787 }
9788
9789 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9790                              struct net_device *dev,
9791                              const unsigned char *addr, u16 vid,
9792                              u16 flags)
9793 {
9794         /* guarantee we can provide a unique filter for the unicast address */
9795         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9796                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9797                 u16 pool = VMDQ_P(0);
9798
9799                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9800                         return -ENOMEM;
9801         }
9802
9803         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9804 }
9805
9806 /**
9807  * ixgbe_configure_bridge_mode - set various bridge modes
9808  * @adapter: the private structure
9809  * @mode: requested bridge mode
9810  *
9811  * Configure some settings require for various bridge modes.
9812  **/
9813 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9814                                        __u16 mode)
9815 {
9816         struct ixgbe_hw *hw = &adapter->hw;
9817         unsigned int p, num_pools;
9818         u32 vmdctl;
9819
9820         switch (mode) {
9821         case BRIDGE_MODE_VEPA:
9822                 /* disable Tx loopback, rely on switch hairpin mode */
9823                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9824
9825                 /* must enable Rx switching replication to allow multicast
9826                  * packet reception on all VFs, and to enable source address
9827                  * pruning.
9828                  */
9829                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9830                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9831                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9832
9833                 /* enable Rx source address pruning. Note, this requires
9834                  * replication to be enabled or else it does nothing.
9835                  */
9836                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9837                 for (p = 0; p < num_pools; p++) {
9838                         if (hw->mac.ops.set_source_address_pruning)
9839                                 hw->mac.ops.set_source_address_pruning(hw,
9840                                                                        true,
9841                                                                        p);
9842                 }
9843                 break;
9844         case BRIDGE_MODE_VEB:
9845                 /* enable Tx loopback for internal VF/PF communication */
9846                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9847                                 IXGBE_PFDTXGSWC_VT_LBEN);
9848
9849                 /* disable Rx switching replication unless we have SR-IOV
9850                  * virtual functions
9851                  */
9852                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9853                 if (!adapter->num_vfs)
9854                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9855                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9856
9857                 /* disable Rx source address pruning, since we don't expect to
9858                  * be receiving external loopback of our transmitted frames.
9859                  */
9860                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9861                 for (p = 0; p < num_pools; p++) {
9862                         if (hw->mac.ops.set_source_address_pruning)
9863                                 hw->mac.ops.set_source_address_pruning(hw,
9864                                                                        false,
9865                                                                        p);
9866                 }
9867                 break;
9868         default:
9869                 return -EINVAL;
9870         }
9871
9872         adapter->bridge_mode = mode;
9873
9874         e_info(drv, "enabling bridge mode: %s\n",
9875                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9876
9877         return 0;
9878 }
9879
9880 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9881                                     struct nlmsghdr *nlh, u16 flags)
9882 {
9883         struct ixgbe_adapter *adapter = netdev_priv(dev);
9884         struct nlattr *attr, *br_spec;
9885         int rem;
9886
9887         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9888                 return -EOPNOTSUPP;
9889
9890         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9891         if (!br_spec)
9892                 return -EINVAL;
9893
9894         nla_for_each_nested(attr, br_spec, rem) {
9895                 int status;
9896                 __u16 mode;
9897
9898                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9899                         continue;
9900
9901                 if (nla_len(attr) < sizeof(mode))
9902                         return -EINVAL;
9903
9904                 mode = nla_get_u16(attr);
9905                 status = ixgbe_configure_bridge_mode(adapter, mode);
9906                 if (status)
9907                         return status;
9908
9909                 break;
9910         }
9911
9912         return 0;
9913 }
9914
9915 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9916                                     struct net_device *dev,
9917                                     u32 filter_mask, int nlflags)
9918 {
9919         struct ixgbe_adapter *adapter = netdev_priv(dev);
9920
9921         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9922                 return 0;
9923
9924         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9925                                        adapter->bridge_mode, 0, 0, nlflags,
9926                                        filter_mask, NULL);
9927 }
9928
9929 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9930 {
9931         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9932         struct ixgbe_fwd_adapter *accel;
9933         int tcs = adapter->hw_tcs ? : 1;
9934         int pool, err;
9935
9936         if (adapter->xdp_prog) {
9937                 e_warn(probe, "L2FW offload is not supported with XDP\n");
9938                 return ERR_PTR(-EINVAL);
9939         }
9940
9941         /* The hardware supported by ixgbe only filters on the destination MAC
9942          * address. In order to avoid issues we only support offloading modes
9943          * where the hardware can actually provide the functionality.
9944          */
9945         if (!macvlan_supports_dest_filter(vdev))
9946                 return ERR_PTR(-EMEDIUMTYPE);
9947
9948         /* We need to lock down the macvlan to be a single queue device so that
9949          * we can reuse the tc_to_txq field in the macvlan netdev to represent
9950          * the queue mapping to our netdev.
9951          */
9952         if (netif_is_multiqueue(vdev))
9953                 return ERR_PTR(-ERANGE);
9954
9955         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9956         if (pool == adapter->num_rx_pools) {
9957                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
9958                 u16 reserved_pools;
9959
9960                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9961                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9962                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
9963                         return ERR_PTR(-EBUSY);
9964
9965                 /* Hardware has a limited number of available pools. Each VF,
9966                  * and the PF require a pool. Check to ensure we don't
9967                  * attempt to use more then the available number of pools.
9968                  */
9969                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9970                         return ERR_PTR(-EBUSY);
9971
9972                 /* Enable VMDq flag so device will be set in VM mode */
9973                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
9974                                   IXGBE_FLAG_SRIOV_ENABLED;
9975
9976                 /* Try to reserve as many queues per pool as possible,
9977                  * we start with the configurations that support 4 queues
9978                  * per pools, followed by 2, and then by just 1 per pool.
9979                  */
9980                 if (used_pools < 32 && adapter->num_rx_pools < 16)
9981                         reserved_pools = min_t(u16,
9982                                                32 - used_pools,
9983                                                16 - adapter->num_rx_pools);
9984                 else if (adapter->num_rx_pools < 32)
9985                         reserved_pools = min_t(u16,
9986                                                64 - used_pools,
9987                                                32 - adapter->num_rx_pools);
9988                 else
9989                         reserved_pools = 64 - used_pools;
9990
9991
9992                 if (!reserved_pools)
9993                         return ERR_PTR(-EBUSY);
9994
9995                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
9996
9997                 /* Force reinit of ring allocation with VMDQ enabled */
9998                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
9999                 if (err)
10000                         return ERR_PTR(err);
10001
10002                 if (pool >= adapter->num_rx_pools)
10003                         return ERR_PTR(-ENOMEM);
10004         }
10005
10006         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10007         if (!accel)
10008                 return ERR_PTR(-ENOMEM);
10009
10010         set_bit(pool, adapter->fwd_bitmask);
10011         netdev_set_sb_channel(vdev, pool);
10012         accel->pool = pool;
10013         accel->netdev = vdev;
10014
10015         if (!netif_running(pdev))
10016                 return accel;
10017
10018         err = ixgbe_fwd_ring_up(adapter, accel);
10019         if (err)
10020                 return ERR_PTR(err);
10021
10022         return accel;
10023 }
10024
10025 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10026 {
10027         struct ixgbe_fwd_adapter *accel = priv;
10028         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10029         unsigned int rxbase = accel->rx_base_queue;
10030         unsigned int i;
10031
10032         /* delete unicast filter associated with offloaded interface */
10033         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10034                              VMDQ_P(accel->pool));
10035
10036         /* Allow remaining Rx packets to get flushed out of the
10037          * Rx FIFO before we drop the netdev for the ring.
10038          */
10039         usleep_range(10000, 20000);
10040
10041         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10042                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10043                 struct ixgbe_q_vector *qv = ring->q_vector;
10044
10045                 /* Make sure we aren't processing any packets and clear
10046                  * netdev to shut down the ring.
10047                  */
10048                 if (netif_running(adapter->netdev))
10049                         napi_synchronize(&qv->napi);
10050                 ring->netdev = NULL;
10051         }
10052
10053         /* unbind the queues and drop the subordinate channel config */
10054         netdev_unbind_sb_channel(pdev, accel->netdev);
10055         netdev_set_sb_channel(accel->netdev, 0);
10056
10057         clear_bit(accel->pool, adapter->fwd_bitmask);
10058         kfree(accel);
10059 }
10060
10061 #define IXGBE_MAX_MAC_HDR_LEN           127
10062 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10063
10064 static netdev_features_t
10065 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10066                      netdev_features_t features)
10067 {
10068         unsigned int network_hdr_len, mac_hdr_len;
10069
10070         /* Make certain the headers can be described by a context descriptor */
10071         mac_hdr_len = skb_network_header(skb) - skb->data;
10072         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10073                 return features & ~(NETIF_F_HW_CSUM |
10074                                     NETIF_F_SCTP_CRC |
10075                                     NETIF_F_HW_VLAN_CTAG_TX |
10076                                     NETIF_F_TSO |
10077                                     NETIF_F_TSO6);
10078
10079         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10080         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10081                 return features & ~(NETIF_F_HW_CSUM |
10082                                     NETIF_F_SCTP_CRC |
10083                                     NETIF_F_TSO |
10084                                     NETIF_F_TSO6);
10085
10086         /* We can only support IPV4 TSO in tunnels if we can mangle the
10087          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10088          * IPsec offoad sets skb->encapsulation but still can handle
10089          * the TSO, so it's the exception.
10090          */
10091         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10092 #ifdef CONFIG_XFRM_OFFLOAD
10093                 if (!skb->sp)
10094 #endif
10095                         features &= ~NETIF_F_TSO;
10096         }
10097
10098         return features;
10099 }
10100
10101 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10102 {
10103         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10104         struct ixgbe_adapter *adapter = netdev_priv(dev);
10105         struct bpf_prog *old_prog;
10106
10107         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10108                 return -EINVAL;
10109
10110         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10111                 return -EINVAL;
10112
10113         /* verify ixgbe ring attributes are sufficient for XDP */
10114         for (i = 0; i < adapter->num_rx_queues; i++) {
10115                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10116
10117                 if (ring_is_rsc_enabled(ring))
10118                         return -EINVAL;
10119
10120                 if (frame_size > ixgbe_rx_bufsz(ring))
10121                         return -EINVAL;
10122         }
10123
10124         if (nr_cpu_ids > MAX_XDP_QUEUES)
10125                 return -ENOMEM;
10126
10127         old_prog = xchg(&adapter->xdp_prog, prog);
10128
10129         /* If transitioning XDP modes reconfigure rings */
10130         if (!!prog != !!old_prog) {
10131                 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10132
10133                 if (err) {
10134                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10135                         return -EINVAL;
10136                 }
10137         } else {
10138                 for (i = 0; i < adapter->num_rx_queues; i++)
10139                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10140                             adapter->xdp_prog);
10141         }
10142
10143         if (old_prog)
10144                 bpf_prog_put(old_prog);
10145
10146         return 0;
10147 }
10148
10149 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10150 {
10151         struct ixgbe_adapter *adapter = netdev_priv(dev);
10152
10153         switch (xdp->command) {
10154         case XDP_SETUP_PROG:
10155                 return ixgbe_xdp_setup(dev, xdp->prog);
10156         case XDP_QUERY_PROG:
10157                 xdp->prog_id = adapter->xdp_prog ?
10158                         adapter->xdp_prog->aux->id : 0;
10159                 return 0;
10160         default:
10161                 return -EINVAL;
10162         }
10163 }
10164
10165 static void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10166 {
10167         /* Force memory writes to complete before letting h/w know there
10168          * are new descriptors to fetch.
10169          */
10170         wmb();
10171         writel(ring->next_to_use, ring->tail);
10172 }
10173
10174 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10175                           struct xdp_frame **frames, u32 flags)
10176 {
10177         struct ixgbe_adapter *adapter = netdev_priv(dev);
10178         struct ixgbe_ring *ring;
10179         int drops = 0;
10180         int i;
10181
10182         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10183                 return -ENETDOWN;
10184
10185         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10186                 return -EINVAL;
10187
10188         /* During program transitions its possible adapter->xdp_prog is assigned
10189          * but ring has not been configured yet. In this case simply abort xmit.
10190          */
10191         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10192         if (unlikely(!ring))
10193                 return -ENXIO;
10194
10195         for (i = 0; i < n; i++) {
10196                 struct xdp_frame *xdpf = frames[i];
10197                 int err;
10198
10199                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10200                 if (err != IXGBE_XDP_TX) {
10201                         xdp_return_frame_rx_napi(xdpf);
10202                         drops++;
10203                 }
10204         }
10205
10206         if (unlikely(flags & XDP_XMIT_FLUSH))
10207                 ixgbe_xdp_ring_update_tail(ring);
10208
10209         return n - drops;
10210 }
10211
10212 static const struct net_device_ops ixgbe_netdev_ops = {
10213         .ndo_open               = ixgbe_open,
10214         .ndo_stop               = ixgbe_close,
10215         .ndo_start_xmit         = ixgbe_xmit_frame,
10216         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10217         .ndo_validate_addr      = eth_validate_addr,
10218         .ndo_set_mac_address    = ixgbe_set_mac,
10219         .ndo_change_mtu         = ixgbe_change_mtu,
10220         .ndo_tx_timeout         = ixgbe_tx_timeout,
10221         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10222         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10223         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10224         .ndo_do_ioctl           = ixgbe_ioctl,
10225         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10226         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10227         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10228         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10229         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10230         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10231         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10232         .ndo_get_stats64        = ixgbe_get_stats64,
10233         .ndo_setup_tc           = __ixgbe_setup_tc,
10234 #ifdef IXGBE_FCOE
10235         .ndo_select_queue       = ixgbe_select_queue,
10236         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10237         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10238         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10239         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10240         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10241         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10242         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10243 #endif /* IXGBE_FCOE */
10244         .ndo_set_features = ixgbe_set_features,
10245         .ndo_fix_features = ixgbe_fix_features,
10246         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10247         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10248         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10249         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10250         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10251         .ndo_udp_tunnel_add     = ixgbe_add_udp_tunnel_port,
10252         .ndo_udp_tunnel_del     = ixgbe_del_udp_tunnel_port,
10253         .ndo_features_check     = ixgbe_features_check,
10254         .ndo_bpf                = ixgbe_xdp,
10255         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10256 };
10257
10258 /**
10259  * ixgbe_enumerate_functions - Get the number of ports this device has
10260  * @adapter: adapter structure
10261  *
10262  * This function enumerates the phsyical functions co-located on a single slot,
10263  * in order to determine how many ports a device has. This is most useful in
10264  * determining the required GT/s of PCIe bandwidth necessary for optimal
10265  * performance.
10266  **/
10267 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10268 {
10269         struct pci_dev *entry, *pdev = adapter->pdev;
10270         int physfns = 0;
10271
10272         /* Some cards can not use the generic count PCIe functions method,
10273          * because they are behind a parent switch, so we hardcode these with
10274          * the correct number of functions.
10275          */
10276         if (ixgbe_pcie_from_parent(&adapter->hw))
10277                 physfns = 4;
10278
10279         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10280                 /* don't count virtual functions */
10281                 if (entry->is_virtfn)
10282                         continue;
10283
10284                 /* When the devices on the bus don't all match our device ID,
10285                  * we can't reliably determine the correct number of
10286                  * functions. This can occur if a function has been direct
10287                  * attached to a virtual machine using VT-d, for example. In
10288                  * this case, simply return -1 to indicate this.
10289                  */
10290                 if ((entry->vendor != pdev->vendor) ||
10291                     (entry->device != pdev->device))
10292                         return -1;
10293
10294                 physfns++;
10295         }
10296
10297         return physfns;
10298 }
10299
10300 /**
10301  * ixgbe_wol_supported - Check whether device supports WoL
10302  * @adapter: the adapter private structure
10303  * @device_id: the device ID
10304  * @subdevice_id: the subsystem device ID
10305  *
10306  * This function is used by probe and ethtool to determine
10307  * which devices have WoL support
10308  *
10309  **/
10310 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10311                          u16 subdevice_id)
10312 {
10313         struct ixgbe_hw *hw = &adapter->hw;
10314         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10315
10316         /* WOL not supported on 82598 */
10317         if (hw->mac.type == ixgbe_mac_82598EB)
10318                 return false;
10319
10320         /* check eeprom to see if WOL is enabled for X540 and newer */
10321         if (hw->mac.type >= ixgbe_mac_X540) {
10322                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10323                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10324                      (hw->bus.func == 0)))
10325                         return true;
10326         }
10327
10328         /* WOL is determined based on device IDs for 82599 MACs */
10329         switch (device_id) {
10330         case IXGBE_DEV_ID_82599_SFP:
10331                 /* Only these subdevices could supports WOL */
10332                 switch (subdevice_id) {
10333                 case IXGBE_SUBDEV_ID_82599_560FLR:
10334                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10335                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10336                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10337                         /* only support first port */
10338                         if (hw->bus.func != 0)
10339                                 break;
10340                         /* fall through */
10341                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10342                 case IXGBE_SUBDEV_ID_82599_SFP:
10343                 case IXGBE_SUBDEV_ID_82599_RNDC:
10344                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10345                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10346                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10347                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10348                         return true;
10349                 }
10350                 break;
10351         case IXGBE_DEV_ID_82599EN_SFP:
10352                 /* Only these subdevices support WOL */
10353                 switch (subdevice_id) {
10354                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10355                         return true;
10356                 }
10357                 break;
10358         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10359                 /* All except this subdevice support WOL */
10360                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10361                         return true;
10362                 break;
10363         case IXGBE_DEV_ID_82599_KX4:
10364                 return  true;
10365         default:
10366                 break;
10367         }
10368
10369         return false;
10370 }
10371
10372 /**
10373  * ixgbe_set_fw_version - Set FW version
10374  * @adapter: the adapter private structure
10375  *
10376  * This function is used by probe and ethtool to determine the FW version to
10377  * format to display. The FW version is taken from the EEPROM/NVM.
10378  */
10379 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10380 {
10381         struct ixgbe_hw *hw = &adapter->hw;
10382         struct ixgbe_nvm_version nvm_ver;
10383
10384         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10385         if (nvm_ver.oem_valid) {
10386                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10387                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10388                          nvm_ver.oem_release);
10389                 return;
10390         }
10391
10392         ixgbe_get_etk_id(hw, &nvm_ver);
10393         ixgbe_get_orom_version(hw, &nvm_ver);
10394
10395         if (nvm_ver.or_valid) {
10396                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10397                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10398                          nvm_ver.or_build, nvm_ver.or_patch);
10399                 return;
10400         }
10401
10402         /* Set ETrack ID format */
10403         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10404                  "0x%08x", nvm_ver.etk_id);
10405 }
10406
10407 /**
10408  * ixgbe_probe - Device Initialization Routine
10409  * @pdev: PCI device information struct
10410  * @ent: entry in ixgbe_pci_tbl
10411  *
10412  * Returns 0 on success, negative on failure
10413  *
10414  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10415  * The OS initialization, configuring of the adapter private structure,
10416  * and a hardware reset occur.
10417  **/
10418 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10419 {
10420         struct net_device *netdev;
10421         struct ixgbe_adapter *adapter = NULL;
10422         struct ixgbe_hw *hw;
10423         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10424         int i, err, pci_using_dac, expected_gts;
10425         unsigned int indices = MAX_TX_QUEUES;
10426         u8 part_str[IXGBE_PBANUM_LENGTH];
10427         bool disable_dev = false;
10428 #ifdef IXGBE_FCOE
10429         u16 device_caps;
10430 #endif
10431         u32 eec;
10432
10433         /* Catch broken hardware that put the wrong VF device ID in
10434          * the PCIe SR-IOV capability.
10435          */
10436         if (pdev->is_virtfn) {
10437                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10438                      pci_name(pdev), pdev->vendor, pdev->device);
10439                 return -EINVAL;
10440         }
10441
10442         err = pci_enable_device_mem(pdev);
10443         if (err)
10444                 return err;
10445
10446         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10447                 pci_using_dac = 1;
10448         } else {
10449                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10450                 if (err) {
10451                         dev_err(&pdev->dev,
10452                                 "No usable DMA configuration, aborting\n");
10453                         goto err_dma;
10454                 }
10455                 pci_using_dac = 0;
10456         }
10457
10458         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10459         if (err) {
10460                 dev_err(&pdev->dev,
10461                         "pci_request_selected_regions failed 0x%x\n", err);
10462                 goto err_pci_reg;
10463         }
10464
10465         pci_enable_pcie_error_reporting(pdev);
10466
10467         pci_set_master(pdev);
10468         pci_save_state(pdev);
10469
10470         if (ii->mac == ixgbe_mac_82598EB) {
10471 #ifdef CONFIG_IXGBE_DCB
10472                 /* 8 TC w/ 4 queues per TC */
10473                 indices = 4 * MAX_TRAFFIC_CLASS;
10474 #else
10475                 indices = IXGBE_MAX_RSS_INDICES;
10476 #endif
10477         }
10478
10479         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10480         if (!netdev) {
10481                 err = -ENOMEM;
10482                 goto err_alloc_etherdev;
10483         }
10484
10485         SET_NETDEV_DEV(netdev, &pdev->dev);
10486
10487         adapter = netdev_priv(netdev);
10488
10489         adapter->netdev = netdev;
10490         adapter->pdev = pdev;
10491         hw = &adapter->hw;
10492         hw->back = adapter;
10493         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10494
10495         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10496                               pci_resource_len(pdev, 0));
10497         adapter->io_addr = hw->hw_addr;
10498         if (!hw->hw_addr) {
10499                 err = -EIO;
10500                 goto err_ioremap;
10501         }
10502
10503         netdev->netdev_ops = &ixgbe_netdev_ops;
10504         ixgbe_set_ethtool_ops(netdev);
10505         netdev->watchdog_timeo = 5 * HZ;
10506         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10507
10508         /* Setup hw api */
10509         hw->mac.ops   = *ii->mac_ops;
10510         hw->mac.type  = ii->mac;
10511         hw->mvals     = ii->mvals;
10512         if (ii->link_ops)
10513                 hw->link.ops  = *ii->link_ops;
10514
10515         /* EEPROM */
10516         hw->eeprom.ops = *ii->eeprom_ops;
10517         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10518         if (ixgbe_removed(hw->hw_addr)) {
10519                 err = -EIO;
10520                 goto err_ioremap;
10521         }
10522         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10523         if (!(eec & BIT(8)))
10524                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10525
10526         /* PHY */
10527         hw->phy.ops = *ii->phy_ops;
10528         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10529         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10530         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10531         hw->phy.mdio.mmds = 0;
10532         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10533         hw->phy.mdio.dev = netdev;
10534         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10535         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10536
10537         /* setup the private structure */
10538         err = ixgbe_sw_init(adapter, ii);
10539         if (err)
10540                 goto err_sw_init;
10541
10542         /* Make sure the SWFW semaphore is in a valid state */
10543         if (hw->mac.ops.init_swfw_sync)
10544                 hw->mac.ops.init_swfw_sync(hw);
10545
10546         /* Make it possible the adapter to be woken up via WOL */
10547         switch (adapter->hw.mac.type) {
10548         case ixgbe_mac_82599EB:
10549         case ixgbe_mac_X540:
10550         case ixgbe_mac_X550:
10551         case ixgbe_mac_X550EM_x:
10552         case ixgbe_mac_x550em_a:
10553                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10554                 break;
10555         default:
10556                 break;
10557         }
10558
10559         /*
10560          * If there is a fan on this device and it has failed log the
10561          * failure.
10562          */
10563         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10564                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10565                 if (esdp & IXGBE_ESDP_SDP1)
10566                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10567         }
10568
10569         if (allow_unsupported_sfp)
10570                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10571
10572         /* reset_hw fills in the perm_addr as well */
10573         hw->phy.reset_if_overtemp = true;
10574         err = hw->mac.ops.reset_hw(hw);
10575         hw->phy.reset_if_overtemp = false;
10576         ixgbe_set_eee_capable(adapter);
10577         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10578                 err = 0;
10579         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10580                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10581                 e_dev_err("Reload the driver after installing a supported module.\n");
10582                 goto err_sw_init;
10583         } else if (err) {
10584                 e_dev_err("HW Init failed: %d\n", err);
10585                 goto err_sw_init;
10586         }
10587
10588 #ifdef CONFIG_PCI_IOV
10589         /* SR-IOV not supported on the 82598 */
10590         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10591                 goto skip_sriov;
10592         /* Mailbox */
10593         ixgbe_init_mbx_params_pf(hw);
10594         hw->mbx.ops = ii->mbx_ops;
10595         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10596         ixgbe_enable_sriov(adapter, max_vfs);
10597 skip_sriov:
10598
10599 #endif
10600         netdev->features = NETIF_F_SG |
10601                            NETIF_F_TSO |
10602                            NETIF_F_TSO6 |
10603                            NETIF_F_RXHASH |
10604                            NETIF_F_RXCSUM |
10605                            NETIF_F_HW_CSUM;
10606
10607 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10608                                     NETIF_F_GSO_GRE_CSUM | \
10609                                     NETIF_F_GSO_IPXIP4 | \
10610                                     NETIF_F_GSO_IPXIP6 | \
10611                                     NETIF_F_GSO_UDP_TUNNEL | \
10612                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10613
10614         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10615         netdev->features |= NETIF_F_GSO_PARTIAL |
10616                             IXGBE_GSO_PARTIAL_FEATURES;
10617
10618         if (hw->mac.type >= ixgbe_mac_82599EB)
10619                 netdev->features |= NETIF_F_SCTP_CRC;
10620
10621 #ifdef CONFIG_XFRM_OFFLOAD
10622 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10623                                  NETIF_F_HW_ESP_TX_CSUM | \
10624                                  NETIF_F_GSO_ESP)
10625
10626         if (adapter->ipsec)
10627                 netdev->features |= IXGBE_ESP_FEATURES;
10628 #endif
10629         /* copy netdev features into list of user selectable features */
10630         netdev->hw_features |= netdev->features |
10631                                NETIF_F_HW_VLAN_CTAG_FILTER |
10632                                NETIF_F_HW_VLAN_CTAG_RX |
10633                                NETIF_F_HW_VLAN_CTAG_TX |
10634                                NETIF_F_RXALL |
10635                                NETIF_F_HW_L2FW_DOFFLOAD;
10636
10637         if (hw->mac.type >= ixgbe_mac_82599EB)
10638                 netdev->hw_features |= NETIF_F_NTUPLE |
10639                                        NETIF_F_HW_TC;
10640
10641         if (pci_using_dac)
10642                 netdev->features |= NETIF_F_HIGHDMA;
10643
10644         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10645         netdev->hw_enc_features |= netdev->vlan_features;
10646         netdev->mpls_features |= NETIF_F_SG |
10647                                  NETIF_F_TSO |
10648                                  NETIF_F_TSO6 |
10649                                  NETIF_F_HW_CSUM;
10650         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10651
10652         /* set this bit last since it cannot be part of vlan_features */
10653         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10654                             NETIF_F_HW_VLAN_CTAG_RX |
10655                             NETIF_F_HW_VLAN_CTAG_TX;
10656
10657         netdev->priv_flags |= IFF_UNICAST_FLT;
10658         netdev->priv_flags |= IFF_SUPP_NOFCS;
10659
10660         /* MTU range: 68 - 9710 */
10661         netdev->min_mtu = ETH_MIN_MTU;
10662         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10663
10664 #ifdef CONFIG_IXGBE_DCB
10665         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10666                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10667 #endif
10668
10669 #ifdef IXGBE_FCOE
10670         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10671                 unsigned int fcoe_l;
10672
10673                 if (hw->mac.ops.get_device_caps) {
10674                         hw->mac.ops.get_device_caps(hw, &device_caps);
10675                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10676                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10677                 }
10678
10679
10680                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10681                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10682
10683                 netdev->features |= NETIF_F_FSO |
10684                                     NETIF_F_FCOE_CRC;
10685
10686                 netdev->vlan_features |= NETIF_F_FSO |
10687                                          NETIF_F_FCOE_CRC |
10688                                          NETIF_F_FCOE_MTU;
10689         }
10690 #endif /* IXGBE_FCOE */
10691         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10692                 netdev->hw_features |= NETIF_F_LRO;
10693         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10694                 netdev->features |= NETIF_F_LRO;
10695
10696         /* make sure the EEPROM is good */
10697         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10698                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10699                 err = -EIO;
10700                 goto err_sw_init;
10701         }
10702
10703         eth_platform_get_mac_address(&adapter->pdev->dev,
10704                                      adapter->hw.mac.perm_addr);
10705
10706         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10707
10708         if (!is_valid_ether_addr(netdev->dev_addr)) {
10709                 e_dev_err("invalid MAC address\n");
10710                 err = -EIO;
10711                 goto err_sw_init;
10712         }
10713
10714         /* Set hw->mac.addr to permanent MAC address */
10715         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10716         ixgbe_mac_set_default_filter(adapter);
10717
10718         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10719
10720         if (ixgbe_removed(hw->hw_addr)) {
10721                 err = -EIO;
10722                 goto err_sw_init;
10723         }
10724         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10725         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10726         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10727
10728         err = ixgbe_init_interrupt_scheme(adapter);
10729         if (err)
10730                 goto err_sw_init;
10731
10732         for (i = 0; i < adapter->num_rx_queues; i++)
10733                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10734         for (i = 0; i < adapter->num_tx_queues; i++)
10735                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10736         for (i = 0; i < adapter->num_xdp_queues; i++)
10737                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10738
10739         /* WOL not supported for all devices */
10740         adapter->wol = 0;
10741         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10742         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10743                                                 pdev->subsystem_device);
10744         if (hw->wol_enabled)
10745                 adapter->wol = IXGBE_WUFC_MAG;
10746
10747         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10748
10749         /* save off EEPROM version number */
10750         ixgbe_set_fw_version(adapter);
10751
10752         /* pick up the PCI bus settings for reporting later */
10753         if (ixgbe_pcie_from_parent(hw))
10754                 ixgbe_get_parent_bus_info(adapter);
10755         else
10756                  hw->mac.ops.get_bus_info(hw);
10757
10758         /* calculate the expected PCIe bandwidth required for optimal
10759          * performance. Note that some older parts will never have enough
10760          * bandwidth due to being older generation PCIe parts. We clamp these
10761          * parts to ensure no warning is displayed if it can't be fixed.
10762          */
10763         switch (hw->mac.type) {
10764         case ixgbe_mac_82598EB:
10765                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10766                 break;
10767         default:
10768                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10769                 break;
10770         }
10771
10772         /* don't check link if we failed to enumerate functions */
10773         if (expected_gts > 0)
10774                 ixgbe_check_minimum_link(adapter, expected_gts);
10775
10776         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10777         if (err)
10778                 strlcpy(part_str, "Unknown", sizeof(part_str));
10779         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10780                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10781                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10782                            part_str);
10783         else
10784                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10785                            hw->mac.type, hw->phy.type, part_str);
10786
10787         e_dev_info("%pM\n", netdev->dev_addr);
10788
10789         /* reset the hardware with the new settings */
10790         err = hw->mac.ops.start_hw(hw);
10791         if (err == IXGBE_ERR_EEPROM_VERSION) {
10792                 /* We are running on a pre-production device, log a warning */
10793                 e_dev_warn("This device is a pre-production adapter/LOM. "
10794                            "Please be aware there may be issues associated "
10795                            "with your hardware.  If you are experiencing "
10796                            "problems please contact your Intel or hardware "
10797                            "representative who provided you with this "
10798                            "hardware.\n");
10799         }
10800         strcpy(netdev->name, "eth%d");
10801         pci_set_drvdata(pdev, adapter);
10802         err = register_netdev(netdev);
10803         if (err)
10804                 goto err_register;
10805
10806
10807         /* power down the optics for 82599 SFP+ fiber */
10808         if (hw->mac.ops.disable_tx_laser)
10809                 hw->mac.ops.disable_tx_laser(hw);
10810
10811         /* carrier off reporting is important to ethtool even BEFORE open */
10812         netif_carrier_off(netdev);
10813
10814 #ifdef CONFIG_IXGBE_DCA
10815         if (dca_add_requester(&pdev->dev) == 0) {
10816                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10817                 ixgbe_setup_dca(adapter);
10818         }
10819 #endif
10820         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10821                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10822                 for (i = 0; i < adapter->num_vfs; i++)
10823                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
10824         }
10825
10826         /* firmware requires driver version to be 0xFFFFFFFF
10827          * since os does not support feature
10828          */
10829         if (hw->mac.ops.set_fw_drv_ver)
10830                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10831                                            sizeof(ixgbe_driver_version) - 1,
10832                                            ixgbe_driver_version);
10833
10834         /* add san mac addr to netdev */
10835         ixgbe_add_sanmac_netdev(netdev);
10836
10837         e_dev_info("%s\n", ixgbe_default_device_descr);
10838
10839 #ifdef CONFIG_IXGBE_HWMON
10840         if (ixgbe_sysfs_init(adapter))
10841                 e_err(probe, "failed to allocate sysfs resources\n");
10842 #endif /* CONFIG_IXGBE_HWMON */
10843
10844         ixgbe_dbg_adapter_init(adapter);
10845
10846         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10847         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10848                 hw->mac.ops.setup_link(hw,
10849                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10850                         true);
10851
10852         return 0;
10853
10854 err_register:
10855         ixgbe_release_hw_control(adapter);
10856         ixgbe_clear_interrupt_scheme(adapter);
10857 err_sw_init:
10858         ixgbe_disable_sriov(adapter);
10859         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10860         iounmap(adapter->io_addr);
10861         kfree(adapter->jump_tables[0]);
10862         kfree(adapter->mac_table);
10863         kfree(adapter->rss_key);
10864 err_ioremap:
10865         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10866         free_netdev(netdev);
10867 err_alloc_etherdev:
10868         pci_release_mem_regions(pdev);
10869 err_pci_reg:
10870 err_dma:
10871         if (!adapter || disable_dev)
10872                 pci_disable_device(pdev);
10873         return err;
10874 }
10875
10876 /**
10877  * ixgbe_remove - Device Removal Routine
10878  * @pdev: PCI device information struct
10879  *
10880  * ixgbe_remove is called by the PCI subsystem to alert the driver
10881  * that it should release a PCI device.  The could be caused by a
10882  * Hot-Plug event, or because the driver is going to be removed from
10883  * memory.
10884  **/
10885 static void ixgbe_remove(struct pci_dev *pdev)
10886 {
10887         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10888         struct net_device *netdev;
10889         bool disable_dev;
10890         int i;
10891
10892         /* if !adapter then we already cleaned up in probe */
10893         if (!adapter)
10894                 return;
10895
10896         netdev  = adapter->netdev;
10897         ixgbe_dbg_adapter_exit(adapter);
10898
10899         set_bit(__IXGBE_REMOVING, &adapter->state);
10900         cancel_work_sync(&adapter->service_task);
10901
10902
10903 #ifdef CONFIG_IXGBE_DCA
10904         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10905                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10906                 dca_remove_requester(&pdev->dev);
10907                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10908                                 IXGBE_DCA_CTRL_DCA_DISABLE);
10909         }
10910
10911 #endif
10912 #ifdef CONFIG_IXGBE_HWMON
10913         ixgbe_sysfs_exit(adapter);
10914 #endif /* CONFIG_IXGBE_HWMON */
10915
10916         /* remove the added san mac */
10917         ixgbe_del_sanmac_netdev(netdev);
10918
10919 #ifdef CONFIG_PCI_IOV
10920         ixgbe_disable_sriov(adapter);
10921 #endif
10922         if (netdev->reg_state == NETREG_REGISTERED)
10923                 unregister_netdev(netdev);
10924
10925         ixgbe_stop_ipsec_offload(adapter);
10926         ixgbe_clear_interrupt_scheme(adapter);
10927
10928         ixgbe_release_hw_control(adapter);
10929
10930 #ifdef CONFIG_DCB
10931         kfree(adapter->ixgbe_ieee_pfc);
10932         kfree(adapter->ixgbe_ieee_ets);
10933
10934 #endif
10935         iounmap(adapter->io_addr);
10936         pci_release_mem_regions(pdev);
10937
10938         e_dev_info("complete\n");
10939
10940         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10941                 if (adapter->jump_tables[i]) {
10942                         kfree(adapter->jump_tables[i]->input);
10943                         kfree(adapter->jump_tables[i]->mask);
10944                 }
10945                 kfree(adapter->jump_tables[i]);
10946         }
10947
10948         kfree(adapter->mac_table);
10949         kfree(adapter->rss_key);
10950         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10951         free_netdev(netdev);
10952
10953         pci_disable_pcie_error_reporting(pdev);
10954
10955         if (disable_dev)
10956                 pci_disable_device(pdev);
10957 }
10958
10959 /**
10960  * ixgbe_io_error_detected - called when PCI error is detected
10961  * @pdev: Pointer to PCI device
10962  * @state: The current pci connection state
10963  *
10964  * This function is called after a PCI bus error affecting
10965  * this device has been detected.
10966  */
10967 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10968                                                 pci_channel_state_t state)
10969 {
10970         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10971         struct net_device *netdev = adapter->netdev;
10972
10973 #ifdef CONFIG_PCI_IOV
10974         struct ixgbe_hw *hw = &adapter->hw;
10975         struct pci_dev *bdev, *vfdev;
10976         u32 dw0, dw1, dw2, dw3;
10977         int vf, pos;
10978         u16 req_id, pf_func;
10979
10980         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10981             adapter->num_vfs == 0)
10982                 goto skip_bad_vf_detection;
10983
10984         bdev = pdev->bus->self;
10985         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10986                 bdev = bdev->bus->self;
10987
10988         if (!bdev)
10989                 goto skip_bad_vf_detection;
10990
10991         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10992         if (!pos)
10993                 goto skip_bad_vf_detection;
10994
10995         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10996         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10997         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10998         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
10999         if (ixgbe_removed(hw->hw_addr))
11000                 goto skip_bad_vf_detection;
11001
11002         req_id = dw1 >> 16;
11003         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11004         if (!(req_id & 0x0080))
11005                 goto skip_bad_vf_detection;
11006
11007         pf_func = req_id & 0x01;
11008         if ((pf_func & 1) == (pdev->devfn & 1)) {
11009                 unsigned int device_id;
11010
11011                 vf = (req_id & 0x7F) >> 1;
11012                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11013                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11014                                 "%8.8x\tdw3: %8.8x\n",
11015                 dw0, dw1, dw2, dw3);
11016                 switch (adapter->hw.mac.type) {
11017                 case ixgbe_mac_82599EB:
11018                         device_id = IXGBE_82599_VF_DEVICE_ID;
11019                         break;
11020                 case ixgbe_mac_X540:
11021                         device_id = IXGBE_X540_VF_DEVICE_ID;
11022                         break;
11023                 case ixgbe_mac_X550:
11024                         device_id = IXGBE_DEV_ID_X550_VF;
11025                         break;
11026                 case ixgbe_mac_X550EM_x:
11027                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11028                         break;
11029                 case ixgbe_mac_x550em_a:
11030                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11031                         break;
11032                 default:
11033                         device_id = 0;
11034                         break;
11035                 }
11036
11037                 /* Find the pci device of the offending VF */
11038                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11039                 while (vfdev) {
11040                         if (vfdev->devfn == (req_id & 0xFF))
11041                                 break;
11042                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11043                                                device_id, vfdev);
11044                 }
11045                 /*
11046                  * There's a slim chance the VF could have been hot plugged,
11047                  * so if it is no longer present we don't need to issue the
11048                  * VFLR.  Just clean up the AER in that case.
11049                  */
11050                 if (vfdev) {
11051                         pcie_flr(vfdev);
11052                         /* Free device reference count */
11053                         pci_dev_put(vfdev);
11054                 }
11055
11056                 pci_cleanup_aer_uncorrect_error_status(pdev);
11057         }
11058
11059         /*
11060          * Even though the error may have occurred on the other port
11061          * we still need to increment the vf error reference count for
11062          * both ports because the I/O resume function will be called
11063          * for both of them.
11064          */
11065         adapter->vferr_refcount++;
11066
11067         return PCI_ERS_RESULT_RECOVERED;
11068
11069 skip_bad_vf_detection:
11070 #endif /* CONFIG_PCI_IOV */
11071         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11072                 return PCI_ERS_RESULT_DISCONNECT;
11073
11074         if (!netif_device_present(netdev))
11075                 return PCI_ERS_RESULT_DISCONNECT;
11076
11077         rtnl_lock();
11078         netif_device_detach(netdev);
11079
11080         if (netif_running(netdev))
11081                 ixgbe_close_suspend(adapter);
11082
11083         if (state == pci_channel_io_perm_failure) {
11084                 rtnl_unlock();
11085                 return PCI_ERS_RESULT_DISCONNECT;
11086         }
11087
11088         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11089                 pci_disable_device(pdev);
11090         rtnl_unlock();
11091
11092         /* Request a slot reset. */
11093         return PCI_ERS_RESULT_NEED_RESET;
11094 }
11095
11096 /**
11097  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11098  * @pdev: Pointer to PCI device
11099  *
11100  * Restart the card from scratch, as if from a cold-boot.
11101  */
11102 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11103 {
11104         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11105         pci_ers_result_t result;
11106         int err;
11107
11108         if (pci_enable_device_mem(pdev)) {
11109                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11110                 result = PCI_ERS_RESULT_DISCONNECT;
11111         } else {
11112                 smp_mb__before_atomic();
11113                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11114                 adapter->hw.hw_addr = adapter->io_addr;
11115                 pci_set_master(pdev);
11116                 pci_restore_state(pdev);
11117                 pci_save_state(pdev);
11118
11119                 pci_wake_from_d3(pdev, false);
11120
11121                 ixgbe_reset(adapter);
11122                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11123                 result = PCI_ERS_RESULT_RECOVERED;
11124         }
11125
11126         err = pci_cleanup_aer_uncorrect_error_status(pdev);
11127         if (err) {
11128                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
11129                           "failed 0x%0x\n", err);
11130                 /* non-fatal, continue */
11131         }
11132
11133         return result;
11134 }
11135
11136 /**
11137  * ixgbe_io_resume - called when traffic can start flowing again.
11138  * @pdev: Pointer to PCI device
11139  *
11140  * This callback is called when the error recovery driver tells us that
11141  * its OK to resume normal operation.
11142  */
11143 static void ixgbe_io_resume(struct pci_dev *pdev)
11144 {
11145         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11146         struct net_device *netdev = adapter->netdev;
11147
11148 #ifdef CONFIG_PCI_IOV
11149         if (adapter->vferr_refcount) {
11150                 e_info(drv, "Resuming after VF err\n");
11151                 adapter->vferr_refcount--;
11152                 return;
11153         }
11154
11155 #endif
11156         rtnl_lock();
11157         if (netif_running(netdev))
11158                 ixgbe_open(netdev);
11159
11160         netif_device_attach(netdev);
11161         rtnl_unlock();
11162 }
11163
11164 static const struct pci_error_handlers ixgbe_err_handler = {
11165         .error_detected = ixgbe_io_error_detected,
11166         .slot_reset = ixgbe_io_slot_reset,
11167         .resume = ixgbe_io_resume,
11168 };
11169
11170 static struct pci_driver ixgbe_driver = {
11171         .name     = ixgbe_driver_name,
11172         .id_table = ixgbe_pci_tbl,
11173         .probe    = ixgbe_probe,
11174         .remove   = ixgbe_remove,
11175 #ifdef CONFIG_PM
11176         .suspend  = ixgbe_suspend,
11177         .resume   = ixgbe_resume,
11178 #endif
11179         .shutdown = ixgbe_shutdown,
11180         .sriov_configure = ixgbe_pci_sriov_configure,
11181         .err_handler = &ixgbe_err_handler
11182 };
11183
11184 /**
11185  * ixgbe_init_module - Driver Registration Routine
11186  *
11187  * ixgbe_init_module is the first routine called when the driver is
11188  * loaded. All it does is register with the PCI subsystem.
11189  **/
11190 static int __init ixgbe_init_module(void)
11191 {
11192         int ret;
11193         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11194         pr_info("%s\n", ixgbe_copyright);
11195
11196         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11197         if (!ixgbe_wq) {
11198                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11199                 return -ENOMEM;
11200         }
11201
11202         ixgbe_dbg_init();
11203
11204         ret = pci_register_driver(&ixgbe_driver);
11205         if (ret) {
11206                 destroy_workqueue(ixgbe_wq);
11207                 ixgbe_dbg_exit();
11208                 return ret;
11209         }
11210
11211 #ifdef CONFIG_IXGBE_DCA
11212         dca_register_notify(&dca_notifier);
11213 #endif
11214
11215         return 0;
11216 }
11217
11218 module_init(ixgbe_init_module);
11219
11220 /**
11221  * ixgbe_exit_module - Driver Exit Cleanup Routine
11222  *
11223  * ixgbe_exit_module is called just before the driver is removed
11224  * from memory.
11225  **/
11226 static void __exit ixgbe_exit_module(void)
11227 {
11228 #ifdef CONFIG_IXGBE_DCA
11229         dca_unregister_notify(&dca_notifier);
11230 #endif
11231         pci_unregister_driver(&ixgbe_driver);
11232
11233         ixgbe_dbg_exit();
11234         if (ixgbe_wq) {
11235                 destroy_workqueue(ixgbe_wq);
11236                 ixgbe_wq = NULL;
11237         }
11238 }
11239
11240 #ifdef CONFIG_IXGBE_DCA
11241 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11242                             void *p)
11243 {
11244         int ret_val;
11245
11246         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11247                                          __ixgbe_notify_dca);
11248
11249         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11250 }
11251
11252 #endif /* CONFIG_IXGBE_DCA */
11253
11254 module_exit(ixgbe_exit_module);
11255
11256 /* ixgbe_main.c */