1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 #include <linux/types.h>
5 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/vmalloc.h>
9 #include <linux/string.h>
11 #include <linux/interrupt.h>
13 #include <linux/tcp.h>
14 #include <linux/sctp.h>
15 #include <linux/pkt_sched.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/etherdevice.h>
21 #include <linux/ethtool.h>
23 #include <linux/if_vlan.h>
24 #include <linux/if_macvlan.h>
25 #include <linux/if_bridge.h>
26 #include <linux/prefetch.h>
27 #include <linux/bpf.h>
28 #include <linux/bpf_trace.h>
29 #include <linux/atomic.h>
30 #include <scsi/fc/fc_fcoe.h>
31 #include <net/udp_tunnel.h>
32 #include <net/pkt_cls.h>
33 #include <net/tc_act/tc_gact.h>
34 #include <net/tc_act/tc_mirred.h>
35 #include <net/vxlan.h>
39 #include "ixgbe_common.h"
40 #include "ixgbe_dcb_82599.h"
41 #include "ixgbe_sriov.h"
42 #include "ixgbe_model.h"
44 char ixgbe_driver_name[] = "ixgbe";
45 static const char ixgbe_driver_string[] =
46 "Intel(R) 10 Gigabit PCI Express Network Driver";
48 char ixgbe_default_device_descr[] =
49 "Intel(R) 10 Gigabit Network Connection";
51 static char ixgbe_default_device_descr[] =
52 "Intel(R) 10 Gigabit Network Connection";
54 #define DRV_VERSION "5.1.0-k"
55 const char ixgbe_driver_version[] = DRV_VERSION;
56 static const char ixgbe_copyright[] =
57 "Copyright (c) 1999-2016 Intel Corporation.";
59 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
61 static const struct ixgbe_info *ixgbe_info_tbl[] = {
62 [board_82598] = &ixgbe_82598_info,
63 [board_82599] = &ixgbe_82599_info,
64 [board_X540] = &ixgbe_X540_info,
65 [board_X550] = &ixgbe_X550_info,
66 [board_X550EM_x] = &ixgbe_X550EM_x_info,
67 [board_x550em_x_fw] = &ixgbe_x550em_x_fw_info,
68 [board_x550em_a] = &ixgbe_x550em_a_info,
69 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info,
72 /* ixgbe_pci_tbl - PCI Device ID Table
74 * Wildcard entries (PCI_ANY_ID) should come last
75 * Last entry must be all 0s
77 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
78 * Class, Class Mask, private data (not used) }
80 static const struct pci_device_id ixgbe_pci_tbl[] = {
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
84 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
128 /* required last entry */
131 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
133 #ifdef CONFIG_IXGBE_DCA
134 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
136 static struct notifier_block dca_notifier = {
137 .notifier_call = ixgbe_notify_dca,
143 #ifdef CONFIG_PCI_IOV
144 static unsigned int max_vfs;
145 module_param(max_vfs, uint, 0);
146 MODULE_PARM_DESC(max_vfs,
147 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
148 #endif /* CONFIG_PCI_IOV */
150 static unsigned int allow_unsupported_sfp;
151 module_param(allow_unsupported_sfp, uint, 0);
152 MODULE_PARM_DESC(allow_unsupported_sfp,
153 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
155 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
156 static int debug = -1;
157 module_param(debug, int, 0);
158 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
160 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
161 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
162 MODULE_LICENSE("GPL");
163 MODULE_VERSION(DRV_VERSION);
165 static struct workqueue_struct *ixgbe_wq;
167 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
168 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
170 static const struct net_device_ops ixgbe_netdev_ops;
172 static bool netif_is_ixgbe(struct net_device *dev)
174 return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
177 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
180 struct pci_dev *parent_dev;
181 struct pci_bus *parent_bus;
183 parent_bus = adapter->pdev->bus->parent;
187 parent_dev = parent_bus->self;
191 if (!pci_is_pcie(parent_dev))
194 pcie_capability_read_word(parent_dev, reg, value);
195 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
196 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
201 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
203 struct ixgbe_hw *hw = &adapter->hw;
207 hw->bus.type = ixgbe_bus_type_pci_express;
209 /* Get the negotiated link width and speed from PCI config space of the
210 * parent, as this device is behind a switch
212 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
214 /* assume caller will handle error case */
218 hw->bus.width = ixgbe_convert_bus_width(link_status);
219 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
225 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
226 * @hw: hw specific details
228 * This function is used by probe to determine whether a device's PCI-Express
229 * bandwidth details should be gathered from the parent bus instead of from the
230 * device. Used to ensure that various locations all have the correct device ID
233 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
235 switch (hw->device_id) {
236 case IXGBE_DEV_ID_82599_SFP_SF_QP:
237 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
244 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
247 struct ixgbe_hw *hw = &adapter->hw;
248 struct pci_dev *pdev;
250 /* Some devices are not connected over PCIe and thus do not negotiate
251 * speed. These devices do not have valid bus info, and thus any report
252 * we generate may not be correct.
254 if (hw->bus.type == ixgbe_bus_type_internal)
257 /* determine whether to use the parent device */
258 if (ixgbe_pcie_from_parent(&adapter->hw))
259 pdev = adapter->pdev->bus->parent->self;
261 pdev = adapter->pdev;
263 pcie_print_link_status(pdev);
266 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
268 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
269 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
270 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
271 queue_work(ixgbe_wq, &adapter->service_task);
274 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
276 struct ixgbe_adapter *adapter = hw->back;
281 e_dev_err("Adapter removed\n");
282 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
283 ixgbe_service_event_schedule(adapter);
286 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
288 u8 __iomem *reg_addr;
292 reg_addr = READ_ONCE(hw->hw_addr);
293 if (ixgbe_removed(reg_addr))
294 return IXGBE_FAILED_READ_REG;
296 /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
297 * so perform several status register reads to determine if the adapter
300 for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
301 value = readl(reg_addr + IXGBE_STATUS);
302 if (value != IXGBE_FAILED_READ_REG)
307 if (value == IXGBE_FAILED_READ_REG)
308 ixgbe_remove_adapter(hw);
310 value = readl(reg_addr + reg);
315 * ixgbe_read_reg - Read from device register
316 * @hw: hw specific details
317 * @reg: offset of register to read
319 * Returns : value read or IXGBE_FAILED_READ_REG if removed
321 * This function is used to read device registers. It checks for device
322 * removal by confirming any read that returns all ones by checking the
323 * status register value for all ones. This function avoids reading from
324 * the hardware if a removal was previously detected in which case it
325 * returns IXGBE_FAILED_READ_REG (all ones).
327 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
329 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
332 if (ixgbe_removed(reg_addr))
333 return IXGBE_FAILED_READ_REG;
334 if (unlikely(hw->phy.nw_mng_if_sel &
335 IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
336 struct ixgbe_adapter *adapter;
339 for (i = 0; i < 200; ++i) {
340 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
342 goto writes_completed;
343 if (value == IXGBE_FAILED_READ_REG) {
344 ixgbe_remove_adapter(hw);
345 return IXGBE_FAILED_READ_REG;
351 e_warn(hw, "register writes incomplete %08x\n", value);
355 value = readl(reg_addr + reg);
356 if (unlikely(value == IXGBE_FAILED_READ_REG))
357 value = ixgbe_check_remove(hw, reg);
361 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
365 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
366 if (value == IXGBE_FAILED_READ_CFG_WORD) {
367 ixgbe_remove_adapter(hw);
373 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
375 struct ixgbe_adapter *adapter = hw->back;
378 if (ixgbe_removed(hw->hw_addr))
379 return IXGBE_FAILED_READ_CFG_WORD;
380 pci_read_config_word(adapter->pdev, reg, &value);
381 if (value == IXGBE_FAILED_READ_CFG_WORD &&
382 ixgbe_check_cfg_remove(hw, adapter->pdev))
383 return IXGBE_FAILED_READ_CFG_WORD;
387 #ifdef CONFIG_PCI_IOV
388 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
390 struct ixgbe_adapter *adapter = hw->back;
393 if (ixgbe_removed(hw->hw_addr))
394 return IXGBE_FAILED_READ_CFG_DWORD;
395 pci_read_config_dword(adapter->pdev, reg, &value);
396 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
397 ixgbe_check_cfg_remove(hw, adapter->pdev))
398 return IXGBE_FAILED_READ_CFG_DWORD;
401 #endif /* CONFIG_PCI_IOV */
403 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
405 struct ixgbe_adapter *adapter = hw->back;
407 if (ixgbe_removed(hw->hw_addr))
409 pci_write_config_word(adapter->pdev, reg, value);
412 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
414 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
416 /* flush memory to make sure state is correct before next watchdog */
417 smp_mb__before_atomic();
418 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
421 struct ixgbe_reg_info {
426 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
428 /* General Registers */
429 {IXGBE_CTRL, "CTRL"},
430 {IXGBE_STATUS, "STATUS"},
431 {IXGBE_CTRL_EXT, "CTRL_EXT"},
433 /* Interrupt Registers */
434 {IXGBE_EICR, "EICR"},
437 {IXGBE_SRRCTL(0), "SRRCTL"},
438 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
439 {IXGBE_RDLEN(0), "RDLEN"},
440 {IXGBE_RDH(0), "RDH"},
441 {IXGBE_RDT(0), "RDT"},
442 {IXGBE_RXDCTL(0), "RXDCTL"},
443 {IXGBE_RDBAL(0), "RDBAL"},
444 {IXGBE_RDBAH(0), "RDBAH"},
447 {IXGBE_TDBAL(0), "TDBAL"},
448 {IXGBE_TDBAH(0), "TDBAH"},
449 {IXGBE_TDLEN(0), "TDLEN"},
450 {IXGBE_TDH(0), "TDH"},
451 {IXGBE_TDT(0), "TDT"},
452 {IXGBE_TXDCTL(0), "TXDCTL"},
454 /* List Terminator */
460 * ixgbe_regdump - register printout routine
462 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
468 switch (reginfo->ofs) {
469 case IXGBE_SRRCTL(0):
470 for (i = 0; i < 64; i++)
471 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
473 case IXGBE_DCA_RXCTRL(0):
474 for (i = 0; i < 64; i++)
475 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
478 for (i = 0; i < 64; i++)
479 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
482 for (i = 0; i < 64; i++)
483 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
486 for (i = 0; i < 64; i++)
487 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
489 case IXGBE_RXDCTL(0):
490 for (i = 0; i < 64; i++)
491 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
494 for (i = 0; i < 64; i++)
495 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
498 for (i = 0; i < 64; i++)
499 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
502 for (i = 0; i < 64; i++)
503 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
506 for (i = 0; i < 64; i++)
507 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
510 for (i = 0; i < 64; i++)
511 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
514 for (i = 0; i < 64; i++)
515 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
518 for (i = 0; i < 64; i++)
519 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
521 case IXGBE_TXDCTL(0):
522 for (i = 0; i < 64; i++)
523 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
526 pr_info("%-15s %08x\n",
527 reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
537 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
538 for (j = 0; j < 8; j++)
539 p += sprintf(p, " %08x", regs[i++]);
540 pr_err("%-15s%s\n", rname, buf);
545 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
547 struct ixgbe_tx_buffer *tx_buffer;
549 tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
550 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
551 n, ring->next_to_use, ring->next_to_clean,
552 (u64)dma_unmap_addr(tx_buffer, dma),
553 dma_unmap_len(tx_buffer, len),
554 tx_buffer->next_to_watch,
555 (u64)tx_buffer->time_stamp);
559 * ixgbe_dump - Print registers, tx-rings and rx-rings
561 static void ixgbe_dump(struct ixgbe_adapter *adapter)
563 struct net_device *netdev = adapter->netdev;
564 struct ixgbe_hw *hw = &adapter->hw;
565 struct ixgbe_reg_info *reginfo;
567 struct ixgbe_ring *ring;
568 struct ixgbe_tx_buffer *tx_buffer;
569 union ixgbe_adv_tx_desc *tx_desc;
570 struct my_u0 { u64 a; u64 b; } *u0;
571 struct ixgbe_ring *rx_ring;
572 union ixgbe_adv_rx_desc *rx_desc;
573 struct ixgbe_rx_buffer *rx_buffer_info;
576 if (!netif_msg_hw(adapter))
579 /* Print netdevice Info */
581 dev_info(&adapter->pdev->dev, "Net device Info\n");
582 pr_info("Device Name state "
584 pr_info("%-15s %016lX %016lX\n",
587 dev_trans_start(netdev));
590 /* Print Registers */
591 dev_info(&adapter->pdev->dev, "Register Dump\n");
592 pr_info(" Register Name Value\n");
593 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
594 reginfo->name; reginfo++) {
595 ixgbe_regdump(hw, reginfo);
598 /* Print TX Ring Summary */
599 if (!netdev || !netif_running(netdev))
602 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
603 pr_info(" %s %s %s %s\n",
604 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
605 "leng", "ntw", "timestamp");
606 for (n = 0; n < adapter->num_tx_queues; n++) {
607 ring = adapter->tx_ring[n];
608 ixgbe_print_buffer(ring, n);
611 for (n = 0; n < adapter->num_xdp_queues; n++) {
612 ring = adapter->xdp_ring[n];
613 ixgbe_print_buffer(ring, n);
617 if (!netif_msg_tx_done(adapter))
618 goto rx_ring_summary;
620 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
622 /* Transmit Descriptor Formats
624 * 82598 Advanced Transmit Descriptor
625 * +--------------------------------------------------------------+
626 * 0 | Buffer Address [63:0] |
627 * +--------------------------------------------------------------+
628 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
629 * +--------------------------------------------------------------+
630 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
632 * 82598 Advanced Transmit Descriptor (Write-Back Format)
633 * +--------------------------------------------------------------+
635 * +--------------------------------------------------------------+
636 * 8 | RSV | STA | NXTSEQ |
637 * +--------------------------------------------------------------+
640 * 82599+ Advanced Transmit Descriptor
641 * +--------------------------------------------------------------+
642 * 0 | Buffer Address [63:0] |
643 * +--------------------------------------------------------------+
644 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
645 * +--------------------------------------------------------------+
646 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
648 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
649 * +--------------------------------------------------------------+
651 * +--------------------------------------------------------------+
652 * 8 | RSV | STA | RSV |
653 * +--------------------------------------------------------------+
657 for (n = 0; n < adapter->num_tx_queues; n++) {
658 ring = adapter->tx_ring[n];
659 pr_info("------------------------------------\n");
660 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
661 pr_info("------------------------------------\n");
662 pr_info("%s%s %s %s %s %s\n",
663 "T [desc] [address 63:0 ] ",
664 "[PlPOIdStDDt Ln] [bi->dma ] ",
665 "leng", "ntw", "timestamp", "bi->skb");
667 for (i = 0; ring->desc && (i < ring->count); i++) {
668 tx_desc = IXGBE_TX_DESC(ring, i);
669 tx_buffer = &ring->tx_buffer_info[i];
670 u0 = (struct my_u0 *)tx_desc;
671 if (dma_unmap_len(tx_buffer, len) > 0) {
672 const char *ring_desc;
674 if (i == ring->next_to_use &&
675 i == ring->next_to_clean)
676 ring_desc = " NTC/U";
677 else if (i == ring->next_to_use)
679 else if (i == ring->next_to_clean)
683 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s",
685 le64_to_cpu((__force __le64)u0->a),
686 le64_to_cpu((__force __le64)u0->b),
687 (u64)dma_unmap_addr(tx_buffer, dma),
688 dma_unmap_len(tx_buffer, len),
689 tx_buffer->next_to_watch,
690 (u64)tx_buffer->time_stamp,
694 if (netif_msg_pktdata(adapter) &&
696 print_hex_dump(KERN_INFO, "",
697 DUMP_PREFIX_ADDRESS, 16, 1,
698 tx_buffer->skb->data,
699 dma_unmap_len(tx_buffer, len),
705 /* Print RX Rings Summary */
707 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
708 pr_info("Queue [NTU] [NTC]\n");
709 for (n = 0; n < adapter->num_rx_queues; n++) {
710 rx_ring = adapter->rx_ring[n];
711 pr_info("%5d %5X %5X\n",
712 n, rx_ring->next_to_use, rx_ring->next_to_clean);
716 if (!netif_msg_rx_status(adapter))
719 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
721 /* Receive Descriptor Formats
723 * 82598 Advanced Receive Descriptor (Read) Format
725 * +-----------------------------------------------------+
726 * 0 | Packet Buffer Address [63:1] |A0/NSE|
727 * +----------------------------------------------+------+
728 * 8 | Header Buffer Address [63:1] | DD |
729 * +-----------------------------------------------------+
732 * 82598 Advanced Receive Descriptor (Write-Back) Format
734 * 63 48 47 32 31 30 21 20 16 15 4 3 0
735 * +------------------------------------------------------+
736 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
737 * | Packet | IP | | | | Type | Type |
738 * | Checksum | Ident | | | | | |
739 * +------------------------------------------------------+
740 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
741 * +------------------------------------------------------+
742 * 63 48 47 32 31 20 19 0
744 * 82599+ Advanced Receive Descriptor (Read) Format
746 * +-----------------------------------------------------+
747 * 0 | Packet Buffer Address [63:1] |A0/NSE|
748 * +----------------------------------------------+------+
749 * 8 | Header Buffer Address [63:1] | DD |
750 * +-----------------------------------------------------+
753 * 82599+ Advanced Receive Descriptor (Write-Back) Format
755 * 63 48 47 32 31 30 21 20 17 16 4 3 0
756 * +------------------------------------------------------+
757 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
758 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
759 * |/ Flow Dir Flt ID | | | | | |
760 * +------------------------------------------------------+
761 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
762 * +------------------------------------------------------+
763 * 63 48 47 32 31 20 19 0
766 for (n = 0; n < adapter->num_rx_queues; n++) {
767 rx_ring = adapter->rx_ring[n];
768 pr_info("------------------------------------\n");
769 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
770 pr_info("------------------------------------\n");
772 "R [desc] [ PktBuf A0] ",
773 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
774 "<-- Adv Rx Read format");
776 "RWB[desc] [PcsmIpSHl PtRs] ",
777 "[vl er S cks ln] ---------------- [bi->skb ] ",
778 "<-- Adv Rx Write-Back format");
780 for (i = 0; i < rx_ring->count; i++) {
781 const char *ring_desc;
783 if (i == rx_ring->next_to_use)
785 else if (i == rx_ring->next_to_clean)
790 rx_buffer_info = &rx_ring->rx_buffer_info[i];
791 rx_desc = IXGBE_RX_DESC(rx_ring, i);
792 u0 = (struct my_u0 *)rx_desc;
793 if (rx_desc->wb.upper.length) {
794 /* Descriptor Done */
795 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n",
797 le64_to_cpu((__force __le64)u0->a),
798 le64_to_cpu((__force __le64)u0->b),
802 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n",
804 le64_to_cpu((__force __le64)u0->a),
805 le64_to_cpu((__force __le64)u0->b),
806 (u64)rx_buffer_info->dma,
810 if (netif_msg_pktdata(adapter) &&
811 rx_buffer_info->dma) {
812 print_hex_dump(KERN_INFO, "",
813 DUMP_PREFIX_ADDRESS, 16, 1,
814 page_address(rx_buffer_info->page) +
815 rx_buffer_info->page_offset,
816 ixgbe_rx_bufsz(rx_ring), true);
823 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
827 /* Let firmware take over control of h/w */
828 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
829 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
830 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
833 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
837 /* Let firmware know the driver has taken over */
838 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
839 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
840 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
844 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
845 * @adapter: pointer to adapter struct
846 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
847 * @queue: queue to map the corresponding interrupt to
848 * @msix_vector: the vector to map to the corresponding queue
851 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
852 u8 queue, u8 msix_vector)
855 struct ixgbe_hw *hw = &adapter->hw;
856 switch (hw->mac.type) {
857 case ixgbe_mac_82598EB:
858 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
861 index = (((direction * 64) + queue) >> 2) & 0x1F;
862 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
863 ivar &= ~(0xFF << (8 * (queue & 0x3)));
864 ivar |= (msix_vector << (8 * (queue & 0x3)));
865 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
867 case ixgbe_mac_82599EB:
870 case ixgbe_mac_X550EM_x:
871 case ixgbe_mac_x550em_a:
872 if (direction == -1) {
874 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
875 index = ((queue & 1) * 8);
876 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
877 ivar &= ~(0xFF << index);
878 ivar |= (msix_vector << index);
879 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
882 /* tx or rx causes */
883 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
884 index = ((16 * (queue & 1)) + (8 * direction));
885 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
886 ivar &= ~(0xFF << index);
887 ivar |= (msix_vector << index);
888 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
896 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
901 switch (adapter->hw.mac.type) {
902 case ixgbe_mac_82598EB:
903 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
904 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
906 case ixgbe_mac_82599EB:
909 case ixgbe_mac_X550EM_x:
910 case ixgbe_mac_x550em_a:
911 mask = (qmask & 0xFFFFFFFF);
912 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
913 mask = (qmask >> 32);
914 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
921 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
923 struct ixgbe_hw *hw = &adapter->hw;
924 struct ixgbe_hw_stats *hwstats = &adapter->stats;
928 if ((hw->fc.current_mode != ixgbe_fc_full) &&
929 (hw->fc.current_mode != ixgbe_fc_rx_pause))
932 switch (hw->mac.type) {
933 case ixgbe_mac_82598EB:
934 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
937 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
939 hwstats->lxoffrxc += data;
941 /* refill credits (no tx hang) if we received xoff */
945 for (i = 0; i < adapter->num_tx_queues; i++)
946 clear_bit(__IXGBE_HANG_CHECK_ARMED,
947 &adapter->tx_ring[i]->state);
949 for (i = 0; i < adapter->num_xdp_queues; i++)
950 clear_bit(__IXGBE_HANG_CHECK_ARMED,
951 &adapter->xdp_ring[i]->state);
954 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
956 struct ixgbe_hw *hw = &adapter->hw;
957 struct ixgbe_hw_stats *hwstats = &adapter->stats;
961 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
963 if (adapter->ixgbe_ieee_pfc)
964 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
966 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
967 ixgbe_update_xoff_rx_lfc(adapter);
971 /* update stats for each tc, only valid with PFC enabled */
972 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
975 switch (hw->mac.type) {
976 case ixgbe_mac_82598EB:
977 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
980 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
982 hwstats->pxoffrxc[i] += pxoffrxc;
983 /* Get the TC for given UP */
984 tc = netdev_get_prio_tc_map(adapter->netdev, i);
985 xoff[tc] += pxoffrxc;
988 /* disarm tx queues that have received xoff frames */
989 for (i = 0; i < adapter->num_tx_queues; i++) {
990 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
992 tc = tx_ring->dcb_tc;
994 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
997 for (i = 0; i < adapter->num_xdp_queues; i++) {
998 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1000 tc = xdp_ring->dcb_tc;
1002 clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1006 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1008 return ring->stats.packets;
1011 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1013 unsigned int head, tail;
1015 head = ring->next_to_clean;
1016 tail = ring->next_to_use;
1018 return ((head <= tail) ? tail : tail + ring->count) - head;
1021 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1023 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1024 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1025 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1027 clear_check_for_tx_hang(tx_ring);
1030 * Check for a hung queue, but be thorough. This verifies
1031 * that a transmit has been completed since the previous
1032 * check AND there is at least one packet pending. The
1033 * ARMED bit is set to indicate a potential hang. The
1034 * bit is cleared if a pause frame is received to remove
1035 * false hang detection due to PFC or 802.3x frames. By
1036 * requiring this to fail twice we avoid races with
1037 * pfc clearing the ARMED bit and conditions where we
1038 * run the check_tx_hang logic with a transmit completion
1039 * pending but without time to complete it yet.
1041 if (tx_done_old == tx_done && tx_pending)
1042 /* make sure it is true for two checks in a row */
1043 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1045 /* update completed stats and continue */
1046 tx_ring->tx_stats.tx_done_old = tx_done;
1047 /* reset the countdown */
1048 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1054 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1055 * @adapter: driver private struct
1057 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1060 /* Do the reset outside of interrupt context */
1061 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1062 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1063 e_warn(drv, "initiating reset due to tx timeout\n");
1064 ixgbe_service_event_schedule(adapter);
1069 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1070 * @netdev: network interface device structure
1071 * @queue_index: Tx queue to set
1072 * @maxrate: desired maximum transmit bitrate
1074 static int ixgbe_tx_maxrate(struct net_device *netdev,
1075 int queue_index, u32 maxrate)
1077 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1078 struct ixgbe_hw *hw = &adapter->hw;
1079 u32 bcnrc_val = ixgbe_link_mbps(adapter);
1084 /* Calculate the rate factor values to set */
1085 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1086 bcnrc_val /= maxrate;
1088 /* clear everything but the rate factor */
1089 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1090 IXGBE_RTTBCNRC_RF_DEC_MASK;
1092 /* enable the rate scheduler */
1093 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1095 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1096 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1102 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1103 * @q_vector: structure containing interrupt and ring information
1104 * @tx_ring: tx ring to clean
1105 * @napi_budget: Used to determine if we are in netpoll
1107 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1108 struct ixgbe_ring *tx_ring, int napi_budget)
1110 struct ixgbe_adapter *adapter = q_vector->adapter;
1111 struct ixgbe_tx_buffer *tx_buffer;
1112 union ixgbe_adv_tx_desc *tx_desc;
1113 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1114 unsigned int budget = q_vector->tx.work_limit;
1115 unsigned int i = tx_ring->next_to_clean;
1117 if (test_bit(__IXGBE_DOWN, &adapter->state))
1120 tx_buffer = &tx_ring->tx_buffer_info[i];
1121 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1122 i -= tx_ring->count;
1125 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1127 /* if next_to_watch is not set then there is no work pending */
1131 /* prevent any other reads prior to eop_desc */
1134 /* if DD is not set pending work has not been completed */
1135 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1138 /* clear next_to_watch to prevent false hangs */
1139 tx_buffer->next_to_watch = NULL;
1141 /* update the statistics for this packet */
1142 total_bytes += tx_buffer->bytecount;
1143 total_packets += tx_buffer->gso_segs;
1144 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1148 if (ring_is_xdp(tx_ring))
1149 xdp_return_frame(tx_buffer->xdpf);
1151 napi_consume_skb(tx_buffer->skb, napi_budget);
1153 /* unmap skb header data */
1154 dma_unmap_single(tx_ring->dev,
1155 dma_unmap_addr(tx_buffer, dma),
1156 dma_unmap_len(tx_buffer, len),
1159 /* clear tx_buffer data */
1160 dma_unmap_len_set(tx_buffer, len, 0);
1162 /* unmap remaining buffers */
1163 while (tx_desc != eop_desc) {
1168 i -= tx_ring->count;
1169 tx_buffer = tx_ring->tx_buffer_info;
1170 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1173 /* unmap any remaining paged data */
1174 if (dma_unmap_len(tx_buffer, len)) {
1175 dma_unmap_page(tx_ring->dev,
1176 dma_unmap_addr(tx_buffer, dma),
1177 dma_unmap_len(tx_buffer, len),
1179 dma_unmap_len_set(tx_buffer, len, 0);
1183 /* move us one more past the eop_desc for start of next pkt */
1188 i -= tx_ring->count;
1189 tx_buffer = tx_ring->tx_buffer_info;
1190 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1193 /* issue prefetch for next Tx descriptor */
1196 /* update budget accounting */
1198 } while (likely(budget));
1200 i += tx_ring->count;
1201 tx_ring->next_to_clean = i;
1202 u64_stats_update_begin(&tx_ring->syncp);
1203 tx_ring->stats.bytes += total_bytes;
1204 tx_ring->stats.packets += total_packets;
1205 u64_stats_update_end(&tx_ring->syncp);
1206 q_vector->tx.total_bytes += total_bytes;
1207 q_vector->tx.total_packets += total_packets;
1208 adapter->tx_ipsec += total_ipsec;
1210 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1211 /* schedule immediate reset if we believe we hung */
1212 struct ixgbe_hw *hw = &adapter->hw;
1213 e_err(drv, "Detected Tx Unit Hang %s\n"
1215 " TDH, TDT <%x>, <%x>\n"
1216 " next_to_use <%x>\n"
1217 " next_to_clean <%x>\n"
1218 "tx_buffer_info[next_to_clean]\n"
1219 " time_stamp <%lx>\n"
1221 ring_is_xdp(tx_ring) ? "(XDP)" : "",
1222 tx_ring->queue_index,
1223 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1224 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1225 tx_ring->next_to_use, i,
1226 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1228 if (!ring_is_xdp(tx_ring))
1229 netif_stop_subqueue(tx_ring->netdev,
1230 tx_ring->queue_index);
1233 "tx hang %d detected on queue %d, resetting adapter\n",
1234 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1236 /* schedule immediate reset if we believe we hung */
1237 ixgbe_tx_timeout_reset(adapter);
1239 /* the adapter is about to reset, no point in enabling stuff */
1243 if (ring_is_xdp(tx_ring))
1246 netdev_tx_completed_queue(txring_txq(tx_ring),
1247 total_packets, total_bytes);
1249 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1250 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1251 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1252 /* Make sure that anybody stopping the queue after this
1253 * sees the new next_to_clean.
1256 if (__netif_subqueue_stopped(tx_ring->netdev,
1257 tx_ring->queue_index)
1258 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1259 netif_wake_subqueue(tx_ring->netdev,
1260 tx_ring->queue_index);
1261 ++tx_ring->tx_stats.restart_queue;
1268 #ifdef CONFIG_IXGBE_DCA
1269 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1270 struct ixgbe_ring *tx_ring,
1273 struct ixgbe_hw *hw = &adapter->hw;
1277 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1278 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1280 switch (hw->mac.type) {
1281 case ixgbe_mac_82598EB:
1282 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1284 case ixgbe_mac_82599EB:
1285 case ixgbe_mac_X540:
1286 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1287 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1290 /* for unknown hardware do not write register */
1295 * We can enable relaxed ordering for reads, but not writes when
1296 * DCA is enabled. This is due to a known issue in some chipsets
1297 * which will cause the DCA tag to be cleared.
1299 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1300 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1301 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1303 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1306 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1307 struct ixgbe_ring *rx_ring,
1310 struct ixgbe_hw *hw = &adapter->hw;
1312 u8 reg_idx = rx_ring->reg_idx;
1314 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1315 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1317 switch (hw->mac.type) {
1318 case ixgbe_mac_82599EB:
1319 case ixgbe_mac_X540:
1320 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1327 * We can enable relaxed ordering for reads, but not writes when
1328 * DCA is enabled. This is due to a known issue in some chipsets
1329 * which will cause the DCA tag to be cleared.
1331 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1332 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1333 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1335 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1338 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1340 struct ixgbe_adapter *adapter = q_vector->adapter;
1341 struct ixgbe_ring *ring;
1342 int cpu = get_cpu();
1344 if (q_vector->cpu == cpu)
1347 ixgbe_for_each_ring(ring, q_vector->tx)
1348 ixgbe_update_tx_dca(adapter, ring, cpu);
1350 ixgbe_for_each_ring(ring, q_vector->rx)
1351 ixgbe_update_rx_dca(adapter, ring, cpu);
1353 q_vector->cpu = cpu;
1358 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1362 /* always use CB2 mode, difference is masked in the CB driver */
1363 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1364 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1365 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1367 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368 IXGBE_DCA_CTRL_DCA_DISABLE);
1370 for (i = 0; i < adapter->num_q_vectors; i++) {
1371 adapter->q_vector[i]->cpu = -1;
1372 ixgbe_update_dca(adapter->q_vector[i]);
1376 static int __ixgbe_notify_dca(struct device *dev, void *data)
1378 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1379 unsigned long event = *(unsigned long *)data;
1381 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1385 case DCA_PROVIDER_ADD:
1386 /* if we're already enabled, don't do it again */
1387 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1389 if (dca_add_requester(dev) == 0) {
1390 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1391 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1392 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1395 /* fall through - DCA is disabled. */
1396 case DCA_PROVIDER_REMOVE:
1397 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1398 dca_remove_requester(dev);
1399 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1400 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1401 IXGBE_DCA_CTRL_DCA_DISABLE);
1409 #endif /* CONFIG_IXGBE_DCA */
1411 #define IXGBE_RSS_L4_TYPES_MASK \
1412 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1413 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1414 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1415 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1417 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1418 union ixgbe_adv_rx_desc *rx_desc,
1419 struct sk_buff *skb)
1423 if (!(ring->netdev->features & NETIF_F_RXHASH))
1426 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1427 IXGBE_RXDADV_RSSTYPE_MASK;
1432 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1433 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1434 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1439 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1440 * @ring: structure containing ring specific data
1441 * @rx_desc: advanced rx descriptor
1443 * Returns : true if it is FCoE pkt
1445 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1446 union ixgbe_adv_rx_desc *rx_desc)
1448 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1450 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1451 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1452 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1453 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1456 #endif /* IXGBE_FCOE */
1458 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1459 * @ring: structure containing ring specific data
1460 * @rx_desc: current Rx descriptor being processed
1461 * @skb: skb currently being received and modified
1463 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1464 union ixgbe_adv_rx_desc *rx_desc,
1465 struct sk_buff *skb)
1467 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1468 bool encap_pkt = false;
1470 skb_checksum_none_assert(skb);
1472 /* Rx csum disabled */
1473 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1476 /* check for VXLAN and Geneve packets */
1477 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1479 skb->encapsulation = 1;
1482 /* if IP and error */
1483 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1484 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1485 ring->rx_stats.csum_err++;
1489 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1492 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1494 * 82599 errata, UDP frames with a 0 checksum can be marked as
1497 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1498 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1501 ring->rx_stats.csum_err++;
1505 /* It must be a TCP or UDP packet with a valid checksum */
1506 skb->ip_summed = CHECKSUM_UNNECESSARY;
1508 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1511 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1512 skb->ip_summed = CHECKSUM_NONE;
1515 /* If we checked the outer header let the stack know */
1516 skb->csum_level = 1;
1520 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1522 return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1525 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1526 struct ixgbe_rx_buffer *bi)
1528 struct page *page = bi->page;
1531 /* since we are recycling buffers we should seldom need to alloc */
1535 /* alloc new page for storage */
1536 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1537 if (unlikely(!page)) {
1538 rx_ring->rx_stats.alloc_rx_page_failed++;
1542 /* map page for use */
1543 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1544 ixgbe_rx_pg_size(rx_ring),
1549 * if mapping failed free memory back to system since
1550 * there isn't much point in holding memory we can't use
1552 if (dma_mapping_error(rx_ring->dev, dma)) {
1553 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1555 rx_ring->rx_stats.alloc_rx_page_failed++;
1561 bi->page_offset = ixgbe_rx_offset(rx_ring);
1562 page_ref_add(page, USHRT_MAX - 1);
1563 bi->pagecnt_bias = USHRT_MAX;
1564 rx_ring->rx_stats.alloc_rx_page++;
1570 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1571 * @rx_ring: ring to place buffers on
1572 * @cleaned_count: number of buffers to replace
1574 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1576 union ixgbe_adv_rx_desc *rx_desc;
1577 struct ixgbe_rx_buffer *bi;
1578 u16 i = rx_ring->next_to_use;
1585 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1586 bi = &rx_ring->rx_buffer_info[i];
1587 i -= rx_ring->count;
1589 bufsz = ixgbe_rx_bufsz(rx_ring);
1592 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1595 /* sync the buffer for use by the device */
1596 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1597 bi->page_offset, bufsz,
1601 * Refresh the desc even if buffer_addrs didn't change
1602 * because each write-back erases this info.
1604 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1610 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1611 bi = rx_ring->rx_buffer_info;
1612 i -= rx_ring->count;
1615 /* clear the length for the next_to_use descriptor */
1616 rx_desc->wb.upper.length = 0;
1619 } while (cleaned_count);
1621 i += rx_ring->count;
1623 if (rx_ring->next_to_use != i) {
1624 rx_ring->next_to_use = i;
1626 /* update next to alloc since we have filled the ring */
1627 rx_ring->next_to_alloc = i;
1629 /* Force memory writes to complete before letting h/w
1630 * know there are new descriptors to fetch. (Only
1631 * applicable for weak-ordered memory model archs,
1635 writel(i, rx_ring->tail);
1639 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1640 struct sk_buff *skb)
1642 u16 hdr_len = skb_headlen(skb);
1644 /* set gso_size to avoid messing up TCP MSS */
1645 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1646 IXGBE_CB(skb)->append_cnt);
1647 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1650 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1651 struct sk_buff *skb)
1653 /* if append_cnt is 0 then frame is not RSC */
1654 if (!IXGBE_CB(skb)->append_cnt)
1657 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1658 rx_ring->rx_stats.rsc_flush++;
1660 ixgbe_set_rsc_gso_size(rx_ring, skb);
1662 /* gso_size is computed using append_cnt so always clear it last */
1663 IXGBE_CB(skb)->append_cnt = 0;
1667 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1668 * @rx_ring: rx descriptor ring packet is being transacted on
1669 * @rx_desc: pointer to the EOP Rx descriptor
1670 * @skb: pointer to current skb being populated
1672 * This function checks the ring, descriptor, and packet information in
1673 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1674 * other fields within the skb.
1676 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1677 union ixgbe_adv_rx_desc *rx_desc,
1678 struct sk_buff *skb)
1680 struct net_device *dev = rx_ring->netdev;
1681 u32 flags = rx_ring->q_vector->adapter->flags;
1683 ixgbe_update_rsc_stats(rx_ring, skb);
1685 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1687 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1689 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1690 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1692 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1693 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1694 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1695 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1698 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1699 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1701 /* record Rx queue, or update MACVLAN statistics */
1702 if (netif_is_ixgbe(dev))
1703 skb_record_rx_queue(skb, rx_ring->queue_index);
1705 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1708 skb->protocol = eth_type_trans(skb, dev);
1711 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1712 struct sk_buff *skb)
1714 napi_gro_receive(&q_vector->napi, skb);
1718 * ixgbe_is_non_eop - process handling of non-EOP buffers
1719 * @rx_ring: Rx ring being processed
1720 * @rx_desc: Rx descriptor for current buffer
1721 * @skb: Current socket buffer containing buffer in progress
1723 * This function updates next to clean. If the buffer is an EOP buffer
1724 * this function exits returning false, otherwise it will place the
1725 * sk_buff in the next buffer to be chained and return true indicating
1726 * that this is in fact a non-EOP buffer.
1728 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1729 union ixgbe_adv_rx_desc *rx_desc,
1730 struct sk_buff *skb)
1732 u32 ntc = rx_ring->next_to_clean + 1;
1734 /* fetch, update, and store next to clean */
1735 ntc = (ntc < rx_ring->count) ? ntc : 0;
1736 rx_ring->next_to_clean = ntc;
1738 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1740 /* update RSC append count if present */
1741 if (ring_is_rsc_enabled(rx_ring)) {
1742 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1743 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1745 if (unlikely(rsc_enabled)) {
1746 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1748 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1749 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1751 /* update ntc based on RSC value */
1752 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1753 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1754 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1758 /* if we are the last buffer then there is nothing else to do */
1759 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1762 /* place skb in next buffer to be received */
1763 rx_ring->rx_buffer_info[ntc].skb = skb;
1764 rx_ring->rx_stats.non_eop_descs++;
1770 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1771 * @rx_ring: rx descriptor ring packet is being transacted on
1772 * @skb: pointer to current skb being adjusted
1774 * This function is an ixgbe specific version of __pskb_pull_tail. The
1775 * main difference between this version and the original function is that
1776 * this function can make several assumptions about the state of things
1777 * that allow for significant optimizations versus the standard function.
1778 * As a result we can do things like drop a frag and maintain an accurate
1779 * truesize for the skb.
1781 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1782 struct sk_buff *skb)
1784 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1786 unsigned int pull_len;
1789 * it is valid to use page_address instead of kmap since we are
1790 * working with pages allocated out of the lomem pool per
1791 * alloc_page(GFP_ATOMIC)
1793 va = skb_frag_address(frag);
1796 * we need the header to contain the greater of either ETH_HLEN or
1797 * 60 bytes if the skb->len is less than 60 for skb_pad.
1799 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1801 /* align pull length to size of long to optimize memcpy performance */
1802 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1804 /* update all of the pointers */
1805 skb_frag_size_sub(frag, pull_len);
1806 frag->page_offset += pull_len;
1807 skb->data_len -= pull_len;
1808 skb->tail += pull_len;
1812 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1813 * @rx_ring: rx descriptor ring packet is being transacted on
1814 * @skb: pointer to current skb being updated
1816 * This function provides a basic DMA sync up for the first fragment of an
1817 * skb. The reason for doing this is that the first fragment cannot be
1818 * unmapped until we have reached the end of packet descriptor for a buffer
1821 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1822 struct sk_buff *skb)
1824 /* if the page was released unmap it, else just sync our portion */
1825 if (unlikely(IXGBE_CB(skb)->page_released)) {
1826 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1827 ixgbe_rx_pg_size(rx_ring),
1830 } else if (ring_uses_build_skb(rx_ring)) {
1831 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1833 dma_sync_single_range_for_cpu(rx_ring->dev,
1839 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1841 dma_sync_single_range_for_cpu(rx_ring->dev,
1844 skb_frag_size(frag),
1850 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1851 * @rx_ring: rx descriptor ring packet is being transacted on
1852 * @rx_desc: pointer to the EOP Rx descriptor
1853 * @skb: pointer to current skb being fixed
1855 * Check if the skb is valid in the XDP case it will be an error pointer.
1856 * Return true in this case to abort processing and advance to next
1859 * Check for corrupted packet headers caused by senders on the local L2
1860 * embedded NIC switch not setting up their Tx Descriptors right. These
1861 * should be very rare.
1863 * Also address the case where we are pulling data in on pages only
1864 * and as such no data is present in the skb header.
1866 * In addition if skb is not at least 60 bytes we need to pad it so that
1867 * it is large enough to qualify as a valid Ethernet frame.
1869 * Returns true if an error was encountered and skb was freed.
1871 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1872 union ixgbe_adv_rx_desc *rx_desc,
1873 struct sk_buff *skb)
1875 struct net_device *netdev = rx_ring->netdev;
1877 /* XDP packets use error pointer so abort at this point */
1881 /* Verify netdev is present, and that packet does not have any
1882 * errors that would be unacceptable to the netdev.
1885 (unlikely(ixgbe_test_staterr(rx_desc,
1886 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1887 !(netdev->features & NETIF_F_RXALL)))) {
1888 dev_kfree_skb_any(skb);
1892 /* place header in linear portion of buffer */
1893 if (!skb_headlen(skb))
1894 ixgbe_pull_tail(rx_ring, skb);
1897 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1898 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1902 /* if eth_skb_pad returns an error the skb was freed */
1903 if (eth_skb_pad(skb))
1910 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1911 * @rx_ring: rx descriptor ring to store buffers on
1912 * @old_buff: donor buffer to have page reused
1914 * Synchronizes page for reuse by the adapter
1916 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1917 struct ixgbe_rx_buffer *old_buff)
1919 struct ixgbe_rx_buffer *new_buff;
1920 u16 nta = rx_ring->next_to_alloc;
1922 new_buff = &rx_ring->rx_buffer_info[nta];
1924 /* update, and store next to alloc */
1926 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1928 /* Transfer page from old buffer to new buffer.
1929 * Move each member individually to avoid possible store
1930 * forwarding stalls and unnecessary copy of skb.
1932 new_buff->dma = old_buff->dma;
1933 new_buff->page = old_buff->page;
1934 new_buff->page_offset = old_buff->page_offset;
1935 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
1938 static inline bool ixgbe_page_is_reserved(struct page *page)
1940 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1943 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1945 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1946 struct page *page = rx_buffer->page;
1948 /* avoid re-using remote pages */
1949 if (unlikely(ixgbe_page_is_reserved(page)))
1952 #if (PAGE_SIZE < 8192)
1953 /* if we are only owner of page we can reuse it */
1954 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1957 /* The last offset is a bit aggressive in that we assume the
1958 * worst case of FCoE being enabled and using a 3K buffer.
1959 * However this should have minimal impact as the 1K extra is
1960 * still less than one buffer in size.
1962 #define IXGBE_LAST_OFFSET \
1963 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1964 if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1968 /* If we have drained the page fragment pool we need to update
1969 * the pagecnt_bias and page count so that we fully restock the
1970 * number of references the driver holds.
1972 if (unlikely(pagecnt_bias == 1)) {
1973 page_ref_add(page, USHRT_MAX - 1);
1974 rx_buffer->pagecnt_bias = USHRT_MAX;
1981 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1982 * @rx_ring: rx descriptor ring to transact packets on
1983 * @rx_buffer: buffer containing page to add
1984 * @skb: sk_buff to place the data into
1985 * @size: size of data in rx_buffer
1987 * This function will add the data contained in rx_buffer->page to the skb.
1988 * This is done either through a direct copy if the data in the buffer is
1989 * less than the skb header size, otherwise it will just attach the page as
1990 * a frag to the skb.
1992 * The function will then update the page offset if necessary and return
1993 * true if the buffer can be reused by the adapter.
1995 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1996 struct ixgbe_rx_buffer *rx_buffer,
1997 struct sk_buff *skb,
2000 #if (PAGE_SIZE < 8192)
2001 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2003 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2004 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2005 SKB_DATA_ALIGN(size);
2007 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2008 rx_buffer->page_offset, size, truesize);
2009 #if (PAGE_SIZE < 8192)
2010 rx_buffer->page_offset ^= truesize;
2012 rx_buffer->page_offset += truesize;
2016 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2017 union ixgbe_adv_rx_desc *rx_desc,
2018 struct sk_buff **skb,
2019 const unsigned int size)
2021 struct ixgbe_rx_buffer *rx_buffer;
2023 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2024 prefetchw(rx_buffer->page);
2025 *skb = rx_buffer->skb;
2027 /* Delay unmapping of the first packet. It carries the header
2028 * information, HW may still access the header after the writeback.
2029 * Only unmap it when EOP is reached
2031 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2036 ixgbe_dma_sync_frag(rx_ring, *skb);
2039 /* we are reusing so sync this buffer for CPU use */
2040 dma_sync_single_range_for_cpu(rx_ring->dev,
2042 rx_buffer->page_offset,
2046 rx_buffer->pagecnt_bias--;
2051 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2052 struct ixgbe_rx_buffer *rx_buffer,
2053 struct sk_buff *skb)
2055 if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2056 /* hand second half of page back to the ring */
2057 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2059 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2060 /* the page has been released from the ring */
2061 IXGBE_CB(skb)->page_released = true;
2063 /* we are not reusing the buffer so unmap it */
2064 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2065 ixgbe_rx_pg_size(rx_ring),
2069 __page_frag_cache_drain(rx_buffer->page,
2070 rx_buffer->pagecnt_bias);
2073 /* clear contents of rx_buffer */
2074 rx_buffer->page = NULL;
2075 rx_buffer->skb = NULL;
2078 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2079 struct ixgbe_rx_buffer *rx_buffer,
2080 struct xdp_buff *xdp,
2081 union ixgbe_adv_rx_desc *rx_desc)
2083 unsigned int size = xdp->data_end - xdp->data;
2084 #if (PAGE_SIZE < 8192)
2085 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2087 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2088 xdp->data_hard_start);
2090 struct sk_buff *skb;
2092 /* prefetch first cache line of first page */
2093 prefetch(xdp->data);
2094 #if L1_CACHE_BYTES < 128
2095 prefetch(xdp->data + L1_CACHE_BYTES);
2097 /* Note, we get here by enabling legacy-rx via:
2099 * ethtool --set-priv-flags <dev> legacy-rx on
2101 * In this mode, we currently get 0 extra XDP headroom as
2102 * opposed to having legacy-rx off, where we process XDP
2103 * packets going to stack via ixgbe_build_skb(). The latter
2104 * provides us currently with 192 bytes of headroom.
2106 * For ixgbe_construct_skb() mode it means that the
2107 * xdp->data_meta will always point to xdp->data, since
2108 * the helper cannot expand the head. Should this ever
2109 * change in future for legacy-rx mode on, then lets also
2110 * add xdp->data_meta handling here.
2113 /* allocate a skb to store the frags */
2114 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2118 if (size > IXGBE_RX_HDR_SIZE) {
2119 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2120 IXGBE_CB(skb)->dma = rx_buffer->dma;
2122 skb_add_rx_frag(skb, 0, rx_buffer->page,
2123 xdp->data - page_address(rx_buffer->page),
2125 #if (PAGE_SIZE < 8192)
2126 rx_buffer->page_offset ^= truesize;
2128 rx_buffer->page_offset += truesize;
2131 memcpy(__skb_put(skb, size),
2132 xdp->data, ALIGN(size, sizeof(long)));
2133 rx_buffer->pagecnt_bias++;
2139 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2140 struct ixgbe_rx_buffer *rx_buffer,
2141 struct xdp_buff *xdp,
2142 union ixgbe_adv_rx_desc *rx_desc)
2144 unsigned int metasize = xdp->data - xdp->data_meta;
2145 #if (PAGE_SIZE < 8192)
2146 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2148 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2149 SKB_DATA_ALIGN(xdp->data_end -
2150 xdp->data_hard_start);
2152 struct sk_buff *skb;
2154 /* Prefetch first cache line of first page. If xdp->data_meta
2155 * is unused, this points extactly as xdp->data, otherwise we
2156 * likely have a consumer accessing first few bytes of meta
2157 * data, and then actual data.
2159 prefetch(xdp->data_meta);
2160 #if L1_CACHE_BYTES < 128
2161 prefetch(xdp->data_meta + L1_CACHE_BYTES);
2164 /* build an skb to around the page buffer */
2165 skb = build_skb(xdp->data_hard_start, truesize);
2169 /* update pointers within the skb to store the data */
2170 skb_reserve(skb, xdp->data - xdp->data_hard_start);
2171 __skb_put(skb, xdp->data_end - xdp->data);
2173 skb_metadata_set(skb, metasize);
2175 /* record DMA address if this is the start of a chain of buffers */
2176 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2177 IXGBE_CB(skb)->dma = rx_buffer->dma;
2179 /* update buffer offset */
2180 #if (PAGE_SIZE < 8192)
2181 rx_buffer->page_offset ^= truesize;
2183 rx_buffer->page_offset += truesize;
2189 #define IXGBE_XDP_PASS 0
2190 #define IXGBE_XDP_CONSUMED BIT(0)
2191 #define IXGBE_XDP_TX BIT(1)
2192 #define IXGBE_XDP_REDIR BIT(2)
2194 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
2195 struct xdp_frame *xdpf);
2197 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2198 struct ixgbe_ring *rx_ring,
2199 struct xdp_buff *xdp)
2201 int err, result = IXGBE_XDP_PASS;
2202 struct bpf_prog *xdp_prog;
2203 struct xdp_frame *xdpf;
2207 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2212 prefetchw(xdp->data_hard_start); /* xdp_frame write */
2214 act = bpf_prog_run_xdp(xdp_prog, xdp);
2219 xdpf = convert_to_xdp_frame(xdp);
2220 if (unlikely(!xdpf)) {
2221 result = IXGBE_XDP_CONSUMED;
2224 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2227 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2229 result = IXGBE_XDP_REDIR;
2231 result = IXGBE_XDP_CONSUMED;
2234 bpf_warn_invalid_xdp_action(act);
2237 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2238 /* fallthrough -- handle aborts by dropping packet */
2240 result = IXGBE_XDP_CONSUMED;
2245 return ERR_PTR(-result);
2248 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2249 struct ixgbe_rx_buffer *rx_buffer,
2252 #if (PAGE_SIZE < 8192)
2253 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2255 rx_buffer->page_offset ^= truesize;
2257 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2258 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2259 SKB_DATA_ALIGN(size);
2261 rx_buffer->page_offset += truesize;
2266 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2267 * @q_vector: structure containing interrupt and ring information
2268 * @rx_ring: rx descriptor ring to transact packets on
2269 * @budget: Total limit on number of packets to process
2271 * This function provides a "bounce buffer" approach to Rx interrupt
2272 * processing. The advantage to this is that on systems that have
2273 * expensive overhead for IOMMU access this provides a means of avoiding
2274 * it by maintaining the mapping of the page to the syste.
2276 * Returns amount of work completed
2278 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2279 struct ixgbe_ring *rx_ring,
2282 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2283 struct ixgbe_adapter *adapter = q_vector->adapter;
2286 unsigned int mss = 0;
2287 #endif /* IXGBE_FCOE */
2288 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2289 unsigned int xdp_xmit = 0;
2290 struct xdp_buff xdp;
2292 xdp.rxq = &rx_ring->xdp_rxq;
2294 while (likely(total_rx_packets < budget)) {
2295 union ixgbe_adv_rx_desc *rx_desc;
2296 struct ixgbe_rx_buffer *rx_buffer;
2297 struct sk_buff *skb;
2300 /* return some buffers to hardware, one at a time is too slow */
2301 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2302 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2306 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2307 size = le16_to_cpu(rx_desc->wb.upper.length);
2311 /* This memory barrier is needed to keep us from reading
2312 * any other fields out of the rx_desc until we know the
2313 * descriptor has been written back
2317 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2319 /* retrieve a buffer from the ring */
2321 xdp.data = page_address(rx_buffer->page) +
2322 rx_buffer->page_offset;
2323 xdp.data_meta = xdp.data;
2324 xdp.data_hard_start = xdp.data -
2325 ixgbe_rx_offset(rx_ring);
2326 xdp.data_end = xdp.data + size;
2328 skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2332 unsigned int xdp_res = -PTR_ERR(skb);
2334 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2335 xdp_xmit |= xdp_res;
2336 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2338 rx_buffer->pagecnt_bias++;
2341 total_rx_bytes += size;
2343 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2344 } else if (ring_uses_build_skb(rx_ring)) {
2345 skb = ixgbe_build_skb(rx_ring, rx_buffer,
2348 skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2352 /* exit if we failed to retrieve a buffer */
2354 rx_ring->rx_stats.alloc_rx_buff_failed++;
2355 rx_buffer->pagecnt_bias++;
2359 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2362 /* place incomplete frames back on ring for completion */
2363 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2366 /* verify the packet layout is correct */
2367 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2370 /* probably a little skewed due to removing CRC */
2371 total_rx_bytes += skb->len;
2373 /* populate checksum, timestamp, VLAN, and protocol */
2374 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2377 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2378 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2379 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2380 /* include DDPed FCoE data */
2381 if (ddp_bytes > 0) {
2383 mss = rx_ring->netdev->mtu -
2384 sizeof(struct fcoe_hdr) -
2385 sizeof(struct fc_frame_header) -
2386 sizeof(struct fcoe_crc_eof);
2390 total_rx_bytes += ddp_bytes;
2391 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2395 dev_kfree_skb_any(skb);
2400 #endif /* IXGBE_FCOE */
2401 ixgbe_rx_skb(q_vector, skb);
2403 /* update budget accounting */
2407 if (xdp_xmit & IXGBE_XDP_REDIR)
2410 if (xdp_xmit & IXGBE_XDP_TX) {
2411 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2413 /* Force memory writes to complete before letting h/w
2414 * know there are new descriptors to fetch.
2417 writel(ring->next_to_use, ring->tail);
2420 u64_stats_update_begin(&rx_ring->syncp);
2421 rx_ring->stats.packets += total_rx_packets;
2422 rx_ring->stats.bytes += total_rx_bytes;
2423 u64_stats_update_end(&rx_ring->syncp);
2424 q_vector->rx.total_packets += total_rx_packets;
2425 q_vector->rx.total_bytes += total_rx_bytes;
2427 return total_rx_packets;
2431 * ixgbe_configure_msix - Configure MSI-X hardware
2432 * @adapter: board private structure
2434 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2437 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2439 struct ixgbe_q_vector *q_vector;
2443 /* Populate MSIX to EITR Select */
2444 if (adapter->num_vfs > 32) {
2445 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2446 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2450 * Populate the IVAR table and set the ITR values to the
2451 * corresponding register.
2453 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2454 struct ixgbe_ring *ring;
2455 q_vector = adapter->q_vector[v_idx];
2457 ixgbe_for_each_ring(ring, q_vector->rx)
2458 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2460 ixgbe_for_each_ring(ring, q_vector->tx)
2461 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2463 ixgbe_write_eitr(q_vector);
2466 switch (adapter->hw.mac.type) {
2467 case ixgbe_mac_82598EB:
2468 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2471 case ixgbe_mac_82599EB:
2472 case ixgbe_mac_X540:
2473 case ixgbe_mac_X550:
2474 case ixgbe_mac_X550EM_x:
2475 case ixgbe_mac_x550em_a:
2476 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2481 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2483 /* set up to autoclear timer, and the vectors */
2484 mask = IXGBE_EIMS_ENABLE_MASK;
2485 mask &= ~(IXGBE_EIMS_OTHER |
2486 IXGBE_EIMS_MAILBOX |
2489 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2493 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2494 * @q_vector: structure containing interrupt and ring information
2495 * @ring_container: structure containing ring performance data
2497 * Stores a new ITR value based on packets and byte
2498 * counts during the last interrupt. The advantage of per interrupt
2499 * computation is faster updates and more accurate ITR for the current
2500 * traffic pattern. Constants in this function were computed
2501 * based on theoretical maximum wire speed and thresholds were set based
2502 * on testing data as well as attempting to minimize response time
2503 * while increasing bulk throughput.
2505 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2506 struct ixgbe_ring_container *ring_container)
2508 unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2509 IXGBE_ITR_ADAPTIVE_LATENCY;
2510 unsigned int avg_wire_size, packets, bytes;
2511 unsigned long next_update = jiffies;
2513 /* If we don't have any rings just leave ourselves set for maximum
2514 * possible latency so we take ourselves out of the equation.
2516 if (!ring_container->ring)
2519 /* If we didn't update within up to 1 - 2 jiffies we can assume
2520 * that either packets are coming in so slow there hasn't been
2521 * any work, or that there is so much work that NAPI is dealing
2522 * with interrupt moderation and we don't need to do anything.
2524 if (time_after(next_update, ring_container->next_update))
2527 packets = ring_container->total_packets;
2529 /* We have no packets to actually measure against. This means
2530 * either one of the other queues on this vector is active or
2531 * we are a Tx queue doing TSO with too high of an interrupt rate.
2533 * When this occurs just tick up our delay by the minimum value
2534 * and hope that this extra delay will prevent us from being called
2535 * without any work on our queue.
2538 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2539 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2540 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2541 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2545 bytes = ring_container->total_bytes;
2547 /* If packets are less than 4 or bytes are less than 9000 assume
2548 * insufficient data to use bulk rate limiting approach. We are
2549 * likely latency driven.
2551 if (packets < 4 && bytes < 9000) {
2552 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2553 goto adjust_by_size;
2556 /* Between 4 and 48 we can assume that our current interrupt delay
2557 * is only slightly too low. As such we should increase it by a small
2561 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2562 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2563 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2567 /* Between 48 and 96 is our "goldilocks" zone where we are working
2568 * out "just right". Just report that our current ITR is good for us.
2571 itr = q_vector->itr >> 2;
2575 /* If packet count is 96 or greater we are likely looking at a slight
2576 * overrun of the delay we want. Try halving our delay to see if that
2577 * will cut the number of packets in half per interrupt.
2579 if (packets < 256) {
2580 itr = q_vector->itr >> 3;
2581 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2582 itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2586 /* The paths below assume we are dealing with a bulk ITR since number
2587 * of packets is 256 or greater. We are just going to have to compute
2588 * a value and try to bring the count under control, though for smaller
2589 * packet sizes there isn't much we can do as NAPI polling will likely
2590 * be kicking in sooner rather than later.
2592 itr = IXGBE_ITR_ADAPTIVE_BULK;
2595 /* If packet counts are 256 or greater we can assume we have a gross
2596 * overestimation of what the rate should be. Instead of trying to fine
2597 * tune it just use the formula below to try and dial in an exact value
2598 * give the current packet size of the frame.
2600 avg_wire_size = bytes / packets;
2602 /* The following is a crude approximation of:
2603 * wmem_default / (size + overhead) = desired_pkts_per_int
2604 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2605 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2607 * Assuming wmem_default is 212992 and overhead is 640 bytes per
2608 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2611 * (170 * (size + 24)) / (size + 640) = ITR
2613 * We first do some math on the packet size and then finally bitshift
2614 * by 8 after rounding up. We also have to account for PCIe link speed
2615 * difference as ITR scales based on this.
2617 if (avg_wire_size <= 60) {
2618 /* Start at 50k ints/sec */
2619 avg_wire_size = 5120;
2620 } else if (avg_wire_size <= 316) {
2621 /* 50K ints/sec to 16K ints/sec */
2622 avg_wire_size *= 40;
2623 avg_wire_size += 2720;
2624 } else if (avg_wire_size <= 1084) {
2625 /* 16K ints/sec to 9.2K ints/sec */
2626 avg_wire_size *= 15;
2627 avg_wire_size += 11452;
2628 } else if (avg_wire_size <= 1980) {
2629 /* 9.2K ints/sec to 8K ints/sec */
2631 avg_wire_size += 22420;
2633 /* plateau at a limit of 8K ints/sec */
2634 avg_wire_size = 32256;
2637 /* If we are in low latency mode half our delay which doubles the rate
2638 * to somewhere between 100K to 16K ints/sec
2640 if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2641 avg_wire_size >>= 1;
2643 /* Resultant value is 256 times larger than it needs to be. This
2644 * gives us room to adjust the value as needed to either increase
2645 * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2647 * Use addition as we have already recorded the new latency flag
2648 * for the ITR value.
2650 switch (q_vector->adapter->link_speed) {
2651 case IXGBE_LINK_SPEED_10GB_FULL:
2652 case IXGBE_LINK_SPEED_100_FULL:
2654 itr += DIV_ROUND_UP(avg_wire_size,
2655 IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2656 IXGBE_ITR_ADAPTIVE_MIN_INC;
2658 case IXGBE_LINK_SPEED_2_5GB_FULL:
2659 case IXGBE_LINK_SPEED_1GB_FULL:
2660 case IXGBE_LINK_SPEED_10_FULL:
2661 itr += DIV_ROUND_UP(avg_wire_size,
2662 IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2663 IXGBE_ITR_ADAPTIVE_MIN_INC;
2668 /* write back value */
2669 ring_container->itr = itr;
2671 /* next update should occur within next jiffy */
2672 ring_container->next_update = next_update + 1;
2674 ring_container->total_bytes = 0;
2675 ring_container->total_packets = 0;
2679 * ixgbe_write_eitr - write EITR register in hardware specific way
2680 * @q_vector: structure containing interrupt and ring information
2682 * This function is made to be called by ethtool and by the driver
2683 * when it needs to update EITR registers at runtime. Hardware
2684 * specific quirks/differences are taken care of here.
2686 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2688 struct ixgbe_adapter *adapter = q_vector->adapter;
2689 struct ixgbe_hw *hw = &adapter->hw;
2690 int v_idx = q_vector->v_idx;
2691 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2693 switch (adapter->hw.mac.type) {
2694 case ixgbe_mac_82598EB:
2695 /* must write high and low 16 bits to reset counter */
2696 itr_reg |= (itr_reg << 16);
2698 case ixgbe_mac_82599EB:
2699 case ixgbe_mac_X540:
2700 case ixgbe_mac_X550:
2701 case ixgbe_mac_X550EM_x:
2702 case ixgbe_mac_x550em_a:
2704 * set the WDIS bit to not clear the timer bits and cause an
2705 * immediate assertion of the interrupt
2707 itr_reg |= IXGBE_EITR_CNT_WDIS;
2712 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2715 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2719 ixgbe_update_itr(q_vector, &q_vector->tx);
2720 ixgbe_update_itr(q_vector, &q_vector->rx);
2722 /* use the smallest value of new ITR delay calculations */
2723 new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2725 /* Clear latency flag if set, shift into correct position */
2726 new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2729 if (new_itr != q_vector->itr) {
2730 /* save the algorithm value here */
2731 q_vector->itr = new_itr;
2733 ixgbe_write_eitr(q_vector);
2738 * ixgbe_check_overtemp_subtask - check for over temperature
2739 * @adapter: pointer to adapter
2741 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2743 struct ixgbe_hw *hw = &adapter->hw;
2744 u32 eicr = adapter->interrupt_event;
2747 if (test_bit(__IXGBE_DOWN, &adapter->state))
2750 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2753 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2755 switch (hw->device_id) {
2756 case IXGBE_DEV_ID_82599_T3_LOM:
2758 * Since the warning interrupt is for both ports
2759 * we don't have to check if:
2760 * - This interrupt wasn't for our port.
2761 * - We may have missed the interrupt so always have to
2762 * check if we got a LSC
2764 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2765 !(eicr & IXGBE_EICR_LSC))
2768 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2770 bool link_up = false;
2772 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2778 /* Check if this is not due to overtemp */
2779 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2783 case IXGBE_DEV_ID_X550EM_A_1G_T:
2784 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2785 rc = hw->phy.ops.check_overtemp(hw);
2786 if (rc != IXGBE_ERR_OVERTEMP)
2790 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2792 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2796 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2798 adapter->interrupt_event = 0;
2801 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2803 struct ixgbe_hw *hw = &adapter->hw;
2805 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2806 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2807 e_crit(probe, "Fan has stopped, replace the adapter\n");
2808 /* write to clear the interrupt */
2809 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2813 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2815 struct ixgbe_hw *hw = &adapter->hw;
2817 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2820 switch (adapter->hw.mac.type) {
2821 case ixgbe_mac_82599EB:
2823 * Need to check link state so complete overtemp check
2826 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2827 (eicr & IXGBE_EICR_LSC)) &&
2828 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2829 adapter->interrupt_event = eicr;
2830 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2831 ixgbe_service_event_schedule(adapter);
2835 case ixgbe_mac_x550em_a:
2836 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2837 adapter->interrupt_event = eicr;
2838 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2839 ixgbe_service_event_schedule(adapter);
2840 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2841 IXGBE_EICR_GPI_SDP0_X550EM_a);
2842 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2843 IXGBE_EICR_GPI_SDP0_X550EM_a);
2846 case ixgbe_mac_X550:
2847 case ixgbe_mac_X540:
2848 if (!(eicr & IXGBE_EICR_TS))
2855 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2858 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2860 switch (hw->mac.type) {
2861 case ixgbe_mac_82598EB:
2862 if (hw->phy.type == ixgbe_phy_nl)
2865 case ixgbe_mac_82599EB:
2866 case ixgbe_mac_X550EM_x:
2867 case ixgbe_mac_x550em_a:
2868 switch (hw->mac.ops.get_media_type(hw)) {
2869 case ixgbe_media_type_fiber:
2870 case ixgbe_media_type_fiber_qsfp:
2880 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2882 struct ixgbe_hw *hw = &adapter->hw;
2883 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2885 if (!ixgbe_is_sfp(hw))
2888 /* Later MAC's use different SDP */
2889 if (hw->mac.type >= ixgbe_mac_X540)
2890 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2892 if (eicr & eicr_mask) {
2893 /* Clear the interrupt */
2894 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2895 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2896 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2897 adapter->sfp_poll_time = 0;
2898 ixgbe_service_event_schedule(adapter);
2902 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2903 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2904 /* Clear the interrupt */
2905 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2906 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2907 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2908 ixgbe_service_event_schedule(adapter);
2913 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2915 struct ixgbe_hw *hw = &adapter->hw;
2918 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2919 adapter->link_check_timeout = jiffies;
2920 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2921 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2922 IXGBE_WRITE_FLUSH(hw);
2923 ixgbe_service_event_schedule(adapter);
2927 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2931 struct ixgbe_hw *hw = &adapter->hw;
2933 switch (hw->mac.type) {
2934 case ixgbe_mac_82598EB:
2935 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2936 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2938 case ixgbe_mac_82599EB:
2939 case ixgbe_mac_X540:
2940 case ixgbe_mac_X550:
2941 case ixgbe_mac_X550EM_x:
2942 case ixgbe_mac_x550em_a:
2943 mask = (qmask & 0xFFFFFFFF);
2945 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2946 mask = (qmask >> 32);
2948 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2953 /* skip the flush */
2956 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2960 struct ixgbe_hw *hw = &adapter->hw;
2962 switch (hw->mac.type) {
2963 case ixgbe_mac_82598EB:
2964 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2965 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2967 case ixgbe_mac_82599EB:
2968 case ixgbe_mac_X540:
2969 case ixgbe_mac_X550:
2970 case ixgbe_mac_X550EM_x:
2971 case ixgbe_mac_x550em_a:
2972 mask = (qmask & 0xFFFFFFFF);
2974 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2975 mask = (qmask >> 32);
2977 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2982 /* skip the flush */
2986 * ixgbe_irq_enable - Enable default interrupt generation settings
2987 * @adapter: board private structure
2988 * @queues: enable irqs for queues
2989 * @flush: flush register write
2991 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2994 struct ixgbe_hw *hw = &adapter->hw;
2995 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2997 /* don't reenable LSC while waiting for link */
2998 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2999 mask &= ~IXGBE_EIMS_LSC;
3001 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3002 switch (adapter->hw.mac.type) {
3003 case ixgbe_mac_82599EB:
3004 mask |= IXGBE_EIMS_GPI_SDP0(hw);
3006 case ixgbe_mac_X540:
3007 case ixgbe_mac_X550:
3008 case ixgbe_mac_X550EM_x:
3009 case ixgbe_mac_x550em_a:
3010 mask |= IXGBE_EIMS_TS;
3015 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3016 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3017 switch (adapter->hw.mac.type) {
3018 case ixgbe_mac_82599EB:
3019 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3020 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3022 case ixgbe_mac_X540:
3023 case ixgbe_mac_X550:
3024 case ixgbe_mac_X550EM_x:
3025 case ixgbe_mac_x550em_a:
3026 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3027 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3028 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3029 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3030 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3031 mask |= IXGBE_EICR_GPI_SDP0_X540;
3032 mask |= IXGBE_EIMS_ECC;
3033 mask |= IXGBE_EIMS_MAILBOX;
3039 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3040 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3041 mask |= IXGBE_EIMS_FLOW_DIR;
3043 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3045 ixgbe_irq_enable_queues(adapter, ~0);
3047 IXGBE_WRITE_FLUSH(&adapter->hw);
3050 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3052 struct ixgbe_adapter *adapter = data;
3053 struct ixgbe_hw *hw = &adapter->hw;
3057 * Workaround for Silicon errata. Use clear-by-write instead
3058 * of clear-by-read. Reading with EICS will return the
3059 * interrupt causes without clearing, which later be done
3060 * with the write to EICR.
3062 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3064 /* The lower 16bits of the EICR register are for the queue interrupts
3065 * which should be masked here in order to not accidentally clear them if
3066 * the bits are high when ixgbe_msix_other is called. There is a race
3067 * condition otherwise which results in possible performance loss
3068 * especially if the ixgbe_msix_other interrupt is triggering
3069 * consistently (as it would when PPS is turned on for the X540 device)
3073 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3075 if (eicr & IXGBE_EICR_LSC)
3076 ixgbe_check_lsc(adapter);
3078 if (eicr & IXGBE_EICR_MAILBOX)
3079 ixgbe_msg_task(adapter);
3081 switch (hw->mac.type) {
3082 case ixgbe_mac_82599EB:
3083 case ixgbe_mac_X540:
3084 case ixgbe_mac_X550:
3085 case ixgbe_mac_X550EM_x:
3086 case ixgbe_mac_x550em_a:
3087 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3088 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3089 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3090 ixgbe_service_event_schedule(adapter);
3091 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3092 IXGBE_EICR_GPI_SDP0_X540);
3094 if (eicr & IXGBE_EICR_ECC) {
3095 e_info(link, "Received ECC Err, initiating reset\n");
3096 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3097 ixgbe_service_event_schedule(adapter);
3098 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3100 /* Handle Flow Director Full threshold interrupt */
3101 if (eicr & IXGBE_EICR_FLOW_DIR) {
3102 int reinit_count = 0;
3104 for (i = 0; i < adapter->num_tx_queues; i++) {
3105 struct ixgbe_ring *ring = adapter->tx_ring[i];
3106 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3111 /* no more flow director interrupts until after init */
3112 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3113 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3114 ixgbe_service_event_schedule(adapter);
3117 ixgbe_check_sfp_event(adapter, eicr);
3118 ixgbe_check_overtemp_event(adapter, eicr);
3124 ixgbe_check_fan_failure(adapter, eicr);
3126 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3127 ixgbe_ptp_check_pps_event(adapter);
3129 /* re-enable the original interrupt state, no lsc, no queues */
3130 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3131 ixgbe_irq_enable(adapter, false, false);
3136 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3138 struct ixgbe_q_vector *q_vector = data;
3140 /* EIAM disabled interrupts (on this vector) for us */
3142 if (q_vector->rx.ring || q_vector->tx.ring)
3143 napi_schedule_irqoff(&q_vector->napi);
3149 * ixgbe_poll - NAPI Rx polling callback
3150 * @napi: structure for representing this polling device
3151 * @budget: how many packets driver is allowed to clean
3153 * This function is used for legacy and MSI, NAPI mode
3155 int ixgbe_poll(struct napi_struct *napi, int budget)
3157 struct ixgbe_q_vector *q_vector =
3158 container_of(napi, struct ixgbe_q_vector, napi);
3159 struct ixgbe_adapter *adapter = q_vector->adapter;
3160 struct ixgbe_ring *ring;
3161 int per_ring_budget, work_done = 0;
3162 bool clean_complete = true;
3164 #ifdef CONFIG_IXGBE_DCA
3165 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3166 ixgbe_update_dca(q_vector);
3169 ixgbe_for_each_ring(ring, q_vector->tx) {
3170 if (!ixgbe_clean_tx_irq(q_vector, ring, budget))
3171 clean_complete = false;
3174 /* Exit if we are called by netpoll */
3178 /* attempt to distribute budget to each queue fairly, but don't allow
3179 * the budget to go below 1 because we'll exit polling */
3180 if (q_vector->rx.count > 1)
3181 per_ring_budget = max(budget/q_vector->rx.count, 1);
3183 per_ring_budget = budget;
3185 ixgbe_for_each_ring(ring, q_vector->rx) {
3186 int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
3189 work_done += cleaned;
3190 if (cleaned >= per_ring_budget)
3191 clean_complete = false;
3194 /* If all work not completed, return budget and keep polling */
3195 if (!clean_complete)
3198 /* all work done, exit the polling mode */
3199 napi_complete_done(napi, work_done);
3200 if (adapter->rx_itr_setting & 1)
3201 ixgbe_set_itr(q_vector);
3202 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3203 ixgbe_irq_enable_queues(adapter, BIT_ULL(q_vector->v_idx));
3205 return min(work_done, budget - 1);
3209 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3210 * @adapter: board private structure
3212 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3213 * interrupts from the kernel.
3215 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3217 struct net_device *netdev = adapter->netdev;
3218 unsigned int ri = 0, ti = 0;
3221 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3222 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3223 struct msix_entry *entry = &adapter->msix_entries[vector];
3225 if (q_vector->tx.ring && q_vector->rx.ring) {
3226 snprintf(q_vector->name, sizeof(q_vector->name),
3227 "%s-TxRx-%u", netdev->name, ri++);
3229 } else if (q_vector->rx.ring) {
3230 snprintf(q_vector->name, sizeof(q_vector->name),
3231 "%s-rx-%u", netdev->name, ri++);
3232 } else if (q_vector->tx.ring) {
3233 snprintf(q_vector->name, sizeof(q_vector->name),
3234 "%s-tx-%u", netdev->name, ti++);
3236 /* skip this unused q_vector */
3239 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3240 q_vector->name, q_vector);
3242 e_err(probe, "request_irq failed for MSIX interrupt "
3243 "Error: %d\n", err);
3244 goto free_queue_irqs;
3246 /* If Flow Director is enabled, set interrupt affinity */
3247 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3248 /* assign the mask for this irq */
3249 irq_set_affinity_hint(entry->vector,
3250 &q_vector->affinity_mask);
3254 err = request_irq(adapter->msix_entries[vector].vector,
3255 ixgbe_msix_other, 0, netdev->name, adapter);
3257 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3258 goto free_queue_irqs;
3266 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3268 free_irq(adapter->msix_entries[vector].vector,
3269 adapter->q_vector[vector]);
3271 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3272 pci_disable_msix(adapter->pdev);
3273 kfree(adapter->msix_entries);
3274 adapter->msix_entries = NULL;
3279 * ixgbe_intr - legacy mode Interrupt Handler
3280 * @irq: interrupt number
3281 * @data: pointer to a network interface device structure
3283 static irqreturn_t ixgbe_intr(int irq, void *data)
3285 struct ixgbe_adapter *adapter = data;
3286 struct ixgbe_hw *hw = &adapter->hw;
3287 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3291 * Workaround for silicon errata #26 on 82598. Mask the interrupt
3292 * before the read of EICR.
3294 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3296 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3297 * therefore no explicit interrupt disable is necessary */
3298 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3301 * shared interrupt alert!
3302 * make sure interrupts are enabled because the read will
3303 * have disabled interrupts due to EIAM
3304 * finish the workaround of silicon errata on 82598. Unmask
3305 * the interrupt that we masked before the EICR read.
3307 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3308 ixgbe_irq_enable(adapter, true, true);
3309 return IRQ_NONE; /* Not our interrupt */
3312 if (eicr & IXGBE_EICR_LSC)
3313 ixgbe_check_lsc(adapter);
3315 switch (hw->mac.type) {
3316 case ixgbe_mac_82599EB:
3317 ixgbe_check_sfp_event(adapter, eicr);
3319 case ixgbe_mac_X540:
3320 case ixgbe_mac_X550:
3321 case ixgbe_mac_X550EM_x:
3322 case ixgbe_mac_x550em_a:
3323 if (eicr & IXGBE_EICR_ECC) {
3324 e_info(link, "Received ECC Err, initiating reset\n");
3325 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3326 ixgbe_service_event_schedule(adapter);
3327 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3329 ixgbe_check_overtemp_event(adapter, eicr);
3335 ixgbe_check_fan_failure(adapter, eicr);
3336 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3337 ixgbe_ptp_check_pps_event(adapter);
3339 /* would disable interrupts here but EIAM disabled it */
3340 napi_schedule_irqoff(&q_vector->napi);
3343 * re-enable link(maybe) and non-queue interrupts, no flush.
3344 * ixgbe_poll will re-enable the queue interrupts
3346 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3347 ixgbe_irq_enable(adapter, false, false);
3353 * ixgbe_request_irq - initialize interrupts
3354 * @adapter: board private structure
3356 * Attempts to configure interrupts using the best available
3357 * capabilities of the hardware and kernel.
3359 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3361 struct net_device *netdev = adapter->netdev;
3364 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3365 err = ixgbe_request_msix_irqs(adapter);
3366 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3367 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3368 netdev->name, adapter);
3370 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3371 netdev->name, adapter);
3374 e_err(probe, "request_irq failed, Error %d\n", err);
3379 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3383 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3384 free_irq(adapter->pdev->irq, adapter);
3388 if (!adapter->msix_entries)
3391 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3392 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3393 struct msix_entry *entry = &adapter->msix_entries[vector];
3395 /* free only the irqs that were actually requested */
3396 if (!q_vector->rx.ring && !q_vector->tx.ring)
3399 /* clear the affinity_mask in the IRQ descriptor */
3400 irq_set_affinity_hint(entry->vector, NULL);
3402 free_irq(entry->vector, q_vector);
3405 free_irq(adapter->msix_entries[vector].vector, adapter);
3409 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3410 * @adapter: board private structure
3412 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3414 switch (adapter->hw.mac.type) {
3415 case ixgbe_mac_82598EB:
3416 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3418 case ixgbe_mac_82599EB:
3419 case ixgbe_mac_X540:
3420 case ixgbe_mac_X550:
3421 case ixgbe_mac_X550EM_x:
3422 case ixgbe_mac_x550em_a:
3423 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3424 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3425 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3430 IXGBE_WRITE_FLUSH(&adapter->hw);
3431 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3434 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3435 synchronize_irq(adapter->msix_entries[vector].vector);
3437 synchronize_irq(adapter->msix_entries[vector++].vector);
3439 synchronize_irq(adapter->pdev->irq);
3444 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3445 * @adapter: board private structure
3448 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3450 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3452 ixgbe_write_eitr(q_vector);
3454 ixgbe_set_ivar(adapter, 0, 0, 0);
3455 ixgbe_set_ivar(adapter, 1, 0, 0);
3457 e_info(hw, "Legacy interrupt IVAR setup done\n");
3461 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3462 * @adapter: board private structure
3463 * @ring: structure containing ring specific data
3465 * Configure the Tx descriptor ring after a reset.
3467 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3468 struct ixgbe_ring *ring)
3470 struct ixgbe_hw *hw = &adapter->hw;
3471 u64 tdba = ring->dma;
3473 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3474 u8 reg_idx = ring->reg_idx;
3476 /* disable queue to avoid issues while updating state */
3477 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3478 IXGBE_WRITE_FLUSH(hw);
3480 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3481 (tdba & DMA_BIT_MASK(32)));
3482 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3483 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3484 ring->count * sizeof(union ixgbe_adv_tx_desc));
3485 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3486 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3487 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3490 * set WTHRESH to encourage burst writeback, it should not be set
3491 * higher than 1 when:
3492 * - ITR is 0 as it could cause false TX hangs
3493 * - ITR is set to > 100k int/sec and BQL is enabled
3495 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3496 * to or less than the number of on chip descriptors, which is
3499 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3500 txdctl |= 1u << 16; /* WTHRESH = 1 */
3502 txdctl |= 8u << 16; /* WTHRESH = 8 */
3505 * Setting PTHRESH to 32 both improves performance
3506 * and avoids a TX hang with DFP enabled
3508 txdctl |= (1u << 8) | /* HTHRESH = 1 */
3509 32; /* PTHRESH = 32 */
3511 /* reinitialize flowdirector state */
3512 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3513 ring->atr_sample_rate = adapter->atr_sample_rate;
3514 ring->atr_count = 0;
3515 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3517 ring->atr_sample_rate = 0;
3520 /* initialize XPS */
3521 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3522 struct ixgbe_q_vector *q_vector = ring->q_vector;
3525 netif_set_xps_queue(ring->netdev,
3526 &q_vector->affinity_mask,
3530 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3532 /* reinitialize tx_buffer_info */
3533 memset(ring->tx_buffer_info, 0,
3534 sizeof(struct ixgbe_tx_buffer) * ring->count);
3537 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3539 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3540 if (hw->mac.type == ixgbe_mac_82598EB &&
3541 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3544 /* poll to verify queue is enabled */
3546 usleep_range(1000, 2000);
3547 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3548 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3550 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3553 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3555 struct ixgbe_hw *hw = &adapter->hw;
3557 u8 tcs = adapter->hw_tcs;
3559 if (hw->mac.type == ixgbe_mac_82598EB)
3562 /* disable the arbiter while setting MTQC */
3563 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3564 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3565 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3567 /* set transmit pool layout */
3568 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3569 mtqc = IXGBE_MTQC_VT_ENA;
3571 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3573 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3574 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3575 IXGBE_82599_VMDQ_4Q_MASK)
3576 mtqc |= IXGBE_MTQC_32VF;
3578 mtqc |= IXGBE_MTQC_64VF;
3581 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3583 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3585 mtqc = IXGBE_MTQC_64Q_1PB;
3588 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3590 /* Enable Security TX Buffer IFG for multiple pb */
3592 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3593 sectx |= IXGBE_SECTX_DCB;
3594 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3597 /* re-enable the arbiter */
3598 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3599 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3603 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3604 * @adapter: board private structure
3606 * Configure the Tx unit of the MAC after a reset.
3608 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3610 struct ixgbe_hw *hw = &adapter->hw;
3614 ixgbe_setup_mtqc(adapter);
3616 if (hw->mac.type != ixgbe_mac_82598EB) {
3617 /* DMATXCTL.EN must be before Tx queues are enabled */
3618 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3619 dmatxctl |= IXGBE_DMATXCTL_TE;
3620 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3623 /* Setup the HW Tx Head and Tail descriptor pointers */
3624 for (i = 0; i < adapter->num_tx_queues; i++)
3625 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3626 for (i = 0; i < adapter->num_xdp_queues; i++)
3627 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3630 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3631 struct ixgbe_ring *ring)
3633 struct ixgbe_hw *hw = &adapter->hw;
3634 u8 reg_idx = ring->reg_idx;
3635 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3637 srrctl |= IXGBE_SRRCTL_DROP_EN;
3639 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3642 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3643 struct ixgbe_ring *ring)
3645 struct ixgbe_hw *hw = &adapter->hw;
3646 u8 reg_idx = ring->reg_idx;
3647 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3649 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3651 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3654 #ifdef CONFIG_IXGBE_DCB
3655 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3657 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3661 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3663 if (adapter->ixgbe_ieee_pfc)
3664 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3667 * We should set the drop enable bit if:
3670 * Number of Rx queues > 1 and flow control is disabled
3672 * This allows us to avoid head of line blocking for security
3673 * and performance reasons.
3675 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3676 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3677 for (i = 0; i < adapter->num_rx_queues; i++)
3678 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3680 for (i = 0; i < adapter->num_rx_queues; i++)
3681 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3685 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3687 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3688 struct ixgbe_ring *rx_ring)
3690 struct ixgbe_hw *hw = &adapter->hw;
3692 u8 reg_idx = rx_ring->reg_idx;
3694 if (hw->mac.type == ixgbe_mac_82598EB) {
3695 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3698 * if VMDq is not active we must program one srrctl register
3699 * per RSS queue since we have enabled RDRXCTL.MVMEN
3704 /* configure header buffer length, needed for RSC */
3705 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3707 /* configure the packet buffer length */
3708 if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state))
3709 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3711 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3713 /* configure descriptor type */
3714 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3716 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3720 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3721 * @adapter: device handle
3723 * - 82598/82599/X540: 128
3724 * - X550(non-SRIOV mode): 512
3725 * - X550(SRIOV mode): 64
3727 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3729 if (adapter->hw.mac.type < ixgbe_mac_X550)
3731 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3738 * ixgbe_store_key - Write the RSS key to HW
3739 * @adapter: device handle
3741 * Write the RSS key stored in adapter.rss_key to HW.
3743 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3745 struct ixgbe_hw *hw = &adapter->hw;
3748 for (i = 0; i < 10; i++)
3749 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3753 * ixgbe_init_rss_key - Initialize adapter RSS key
3754 * @adapter: device handle
3756 * Allocates and initializes the RSS key if it is not allocated.
3758 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3762 if (!adapter->rss_key) {
3763 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3764 if (unlikely(!rss_key))
3767 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3768 adapter->rss_key = rss_key;
3775 * ixgbe_store_reta - Write the RETA table to HW
3776 * @adapter: device handle
3778 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3780 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3782 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3783 struct ixgbe_hw *hw = &adapter->hw;
3786 u8 *indir_tbl = adapter->rss_indir_tbl;
3788 /* Fill out the redirection table as follows:
3789 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3791 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3792 * - X550: 8 bit wide entries containing 6 bit RSS index
3794 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3795 indices_multi = 0x11;
3797 indices_multi = 0x1;
3799 /* Write redirection table to HW */
3800 for (i = 0; i < reta_entries; i++) {
3801 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3804 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3806 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3814 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3815 * @adapter: device handle
3817 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3819 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3821 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3822 struct ixgbe_hw *hw = &adapter->hw;
3825 /* Write redirection table to HW */
3826 for (i = 0; i < reta_entries; i++) {
3827 u16 pool = adapter->num_rx_pools;
3829 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3835 IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3841 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3844 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3845 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3847 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3848 * make full use of any rings they may have. We will use the
3849 * PSRTYPE register to control how many rings we use within the PF.
3851 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3854 /* Fill out hash function seeds */
3855 ixgbe_store_key(adapter);
3857 /* Fill out redirection table */
3858 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3860 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3864 adapter->rss_indir_tbl[i] = j;
3867 ixgbe_store_reta(adapter);
3870 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3872 struct ixgbe_hw *hw = &adapter->hw;
3873 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3876 /* Fill out hash function seeds */
3877 for (i = 0; i < 10; i++) {
3878 u16 pool = adapter->num_rx_pools;
3882 IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3883 *(adapter->rss_key + i));
3886 /* Fill out the redirection table */
3887 for (i = 0, j = 0; i < 64; i++, j++) {
3891 adapter->rss_indir_tbl[i] = j;
3894 ixgbe_store_vfreta(adapter);
3897 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3899 struct ixgbe_hw *hw = &adapter->hw;
3900 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3903 /* Disable indicating checksum in descriptor, enables RSS hash */
3904 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3905 rxcsum |= IXGBE_RXCSUM_PCSD;
3906 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3908 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3909 if (adapter->ring_feature[RING_F_RSS].mask)
3910 mrqc = IXGBE_MRQC_RSSEN;
3912 u8 tcs = adapter->hw_tcs;
3914 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3916 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3918 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3919 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3920 IXGBE_82599_VMDQ_4Q_MASK)
3921 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3923 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3925 /* Enable L3/L4 for Tx Switched packets */
3926 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3929 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3931 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3933 mrqc = IXGBE_MRQC_RSSEN;
3937 /* Perform hash on these packet types */
3938 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3939 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3940 IXGBE_MRQC_RSS_FIELD_IPV6 |
3941 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3943 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3944 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3945 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3946 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3948 if ((hw->mac.type >= ixgbe_mac_X550) &&
3949 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3950 u16 pool = adapter->num_rx_pools;
3952 /* Enable VF RSS mode */
3953 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3954 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3956 /* Setup RSS through the VF registers */
3957 ixgbe_setup_vfreta(adapter);
3958 vfmrqc = IXGBE_MRQC_RSSEN;
3959 vfmrqc |= rss_field;
3963 IXGBE_PFVFMRQC(VMDQ_P(pool)),
3966 ixgbe_setup_reta(adapter);
3968 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3973 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3974 * @adapter: address of board private structure
3975 * @ring: structure containing ring specific data
3977 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3978 struct ixgbe_ring *ring)
3980 struct ixgbe_hw *hw = &adapter->hw;
3982 u8 reg_idx = ring->reg_idx;
3984 if (!ring_is_rsc_enabled(ring))
3987 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3988 rscctrl |= IXGBE_RSCCTL_RSCEN;
3990 * we must limit the number of descriptors so that the
3991 * total size of max desc * buf_len is not greater
3994 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3995 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3998 #define IXGBE_MAX_RX_DESC_POLL 10
3999 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4000 struct ixgbe_ring *ring)
4002 struct ixgbe_hw *hw = &adapter->hw;
4003 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4005 u8 reg_idx = ring->reg_idx;
4007 if (ixgbe_removed(hw->hw_addr))
4009 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4010 if (hw->mac.type == ixgbe_mac_82598EB &&
4011 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4015 usleep_range(1000, 2000);
4016 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4017 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4020 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4021 "the polling period\n", reg_idx);
4025 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4026 struct ixgbe_ring *ring)
4028 struct ixgbe_hw *hw = &adapter->hw;
4029 union ixgbe_adv_rx_desc *rx_desc;
4030 u64 rdba = ring->dma;
4032 u8 reg_idx = ring->reg_idx;
4034 /* disable queue to avoid use of these values while updating state */
4035 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4036 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4038 /* write value back with RXDCTL.ENABLE bit cleared */
4039 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4040 IXGBE_WRITE_FLUSH(hw);
4042 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4043 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4044 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4045 ring->count * sizeof(union ixgbe_adv_rx_desc));
4046 /* Force flushing of IXGBE_RDLEN to prevent MDD */
4047 IXGBE_WRITE_FLUSH(hw);
4049 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4050 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4051 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4053 ixgbe_configure_srrctl(adapter, ring);
4054 ixgbe_configure_rscctl(adapter, ring);
4056 if (hw->mac.type == ixgbe_mac_82598EB) {
4058 * enable cache line friendly hardware writes:
4059 * PTHRESH=32 descriptors (half the internal cache),
4060 * this also removes ugly rx_no_buffer_count increment
4061 * HTHRESH=4 descriptors (to minimize latency on fetch)
4062 * WTHRESH=8 burst writeback up to two cache lines
4064 rxdctl &= ~0x3FFFFF;
4066 #if (PAGE_SIZE < 8192)
4067 /* RXDCTL.RLPML does not work on 82599 */
4068 } else if (hw->mac.type != ixgbe_mac_82599EB) {
4069 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4070 IXGBE_RXDCTL_RLPML_EN);
4072 /* Limit the maximum frame size so we don't overrun the skb.
4073 * This can happen in SRIOV mode when the MTU of the VF is
4074 * higher than the MTU of the PF.
4076 if (ring_uses_build_skb(ring) &&
4077 !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4078 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4079 IXGBE_RXDCTL_RLPML_EN;
4083 /* initialize rx_buffer_info */
4084 memset(ring->rx_buffer_info, 0,
4085 sizeof(struct ixgbe_rx_buffer) * ring->count);
4087 /* initialize Rx descriptor 0 */
4088 rx_desc = IXGBE_RX_DESC(ring, 0);
4089 rx_desc->wb.upper.length = 0;
4091 /* enable receive descriptor ring */
4092 rxdctl |= IXGBE_RXDCTL_ENABLE;
4093 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4095 ixgbe_rx_desc_queue_enable(adapter, ring);
4096 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4099 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4101 struct ixgbe_hw *hw = &adapter->hw;
4102 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4103 u16 pool = adapter->num_rx_pools;
4105 /* PSRTYPE must be initialized in non 82598 adapters */
4106 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4107 IXGBE_PSRTYPE_UDPHDR |
4108 IXGBE_PSRTYPE_IPV4HDR |
4109 IXGBE_PSRTYPE_L2HDR |
4110 IXGBE_PSRTYPE_IPV6HDR;
4112 if (hw->mac.type == ixgbe_mac_82598EB)
4116 psrtype |= 2u << 29;
4118 psrtype |= 1u << 29;
4121 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4124 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4126 struct ixgbe_hw *hw = &adapter->hw;
4127 u16 pool = adapter->num_rx_pools;
4128 u32 reg_offset, vf_shift, vmolr;
4129 u32 gcr_ext, vmdctl;
4132 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4135 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4136 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4137 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4138 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4139 vmdctl |= IXGBE_VT_CTL_REPLEN;
4140 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4142 /* accept untagged packets until a vlan tag is
4143 * specifically set for the VMDQ queue/pool
4145 vmolr = IXGBE_VMOLR_AUPE;
4147 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4149 vf_shift = VMDQ_P(0) % 32;
4150 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4152 /* Enable only the PF's pool for Tx/Rx */
4153 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4154 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4155 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4156 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4157 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4158 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4160 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4161 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4163 /* clear VLAN promisc flag so VFTA will be updated if necessary */
4164 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4167 * Set up VF register offsets for selected VT Mode,
4168 * i.e. 32 or 64 VFs for SR-IOV
4170 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4171 case IXGBE_82599_VMDQ_8Q_MASK:
4172 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4174 case IXGBE_82599_VMDQ_4Q_MASK:
4175 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4178 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4182 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4184 for (i = 0; i < adapter->num_vfs; i++) {
4185 /* configure spoof checking */
4186 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4187 adapter->vfinfo[i].spoofchk_enabled);
4189 /* Enable/Disable RSS query feature */
4190 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4191 adapter->vfinfo[i].rss_query_enabled);
4195 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4197 struct ixgbe_hw *hw = &adapter->hw;
4198 struct net_device *netdev = adapter->netdev;
4199 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4200 struct ixgbe_ring *rx_ring;
4205 /* adjust max frame to be able to do baby jumbo for FCoE */
4206 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4207 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4208 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4210 #endif /* IXGBE_FCOE */
4212 /* adjust max frame to be at least the size of a standard frame */
4213 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4214 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4216 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4217 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4218 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4219 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4221 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4224 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4225 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4226 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4227 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4230 * Setup the HW Rx Head and Tail Descriptor Pointers and
4231 * the Base and Length of the Rx Descriptor Ring
4233 for (i = 0; i < adapter->num_rx_queues; i++) {
4234 rx_ring = adapter->rx_ring[i];
4236 clear_ring_rsc_enabled(rx_ring);
4237 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4238 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4240 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4241 set_ring_rsc_enabled(rx_ring);
4243 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4244 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4246 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4247 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4250 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4252 #if (PAGE_SIZE < 8192)
4253 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4254 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4256 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4257 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4258 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4263 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4265 struct ixgbe_hw *hw = &adapter->hw;
4266 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4268 switch (hw->mac.type) {
4269 case ixgbe_mac_82598EB:
4271 * For VMDq support of different descriptor types or
4272 * buffer sizes through the use of multiple SRRCTL
4273 * registers, RDRXCTL.MVMEN must be set to 1
4275 * also, the manual doesn't mention it clearly but DCA hints
4276 * will only use queue 0's tags unless this bit is set. Side
4277 * effects of setting this bit are only that SRRCTL must be
4278 * fully programmed [0..15]
4280 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4282 case ixgbe_mac_X550:
4283 case ixgbe_mac_X550EM_x:
4284 case ixgbe_mac_x550em_a:
4285 if (adapter->num_vfs)
4286 rdrxctl |= IXGBE_RDRXCTL_PSP;
4288 case ixgbe_mac_82599EB:
4289 case ixgbe_mac_X540:
4290 /* Disable RSC for ACK packets */
4291 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4292 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4293 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4294 /* hardware requires some bits to be set by default */
4295 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4296 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4299 /* We should do nothing since we don't know this hardware */
4303 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4307 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4308 * @adapter: board private structure
4310 * Configure the Rx unit of the MAC after a reset.
4312 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4314 struct ixgbe_hw *hw = &adapter->hw;
4318 /* disable receives while setting up the descriptors */
4319 hw->mac.ops.disable_rx(hw);
4321 ixgbe_setup_psrtype(adapter);
4322 ixgbe_setup_rdrxctl(adapter);
4325 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4326 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4327 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4328 rfctl |= IXGBE_RFCTL_RSC_DIS;
4330 /* disable NFS filtering */
4331 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4332 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4334 /* Program registers for the distribution of queues */
4335 ixgbe_setup_mrqc(adapter);
4337 /* set_rx_buffer_len must be called before ring initialization */
4338 ixgbe_set_rx_buffer_len(adapter);
4341 * Setup the HW Rx Head and Tail Descriptor Pointers and
4342 * the Base and Length of the Rx Descriptor Ring
4344 for (i = 0; i < adapter->num_rx_queues; i++)
4345 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4347 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4348 /* disable drop enable for 82598 parts */
4349 if (hw->mac.type == ixgbe_mac_82598EB)
4350 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4352 /* enable all receives */
4353 rxctrl |= IXGBE_RXCTRL_RXEN;
4354 hw->mac.ops.enable_rx_dma(hw, rxctrl);
4357 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4358 __be16 proto, u16 vid)
4360 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4361 struct ixgbe_hw *hw = &adapter->hw;
4363 /* add VID to filter table */
4364 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4365 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4367 set_bit(vid, adapter->active_vlans);
4372 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4377 /* short cut the special case */
4381 /* Search for the vlan id in the VLVF entries */
4382 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4383 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4384 if ((vlvf & VLAN_VID_MASK) == vlan)
4391 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4393 struct ixgbe_hw *hw = &adapter->hw;
4397 idx = ixgbe_find_vlvf_entry(hw, vid);
4401 /* See if any other pools are set for this VLAN filter
4402 * entry other than the PF.
4404 word = idx * 2 + (VMDQ_P(0) / 32);
4405 bits = ~BIT(VMDQ_P(0) % 32);
4406 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4408 /* Disable the filter so this falls into the default pool. */
4409 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4410 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4411 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4412 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4416 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4417 __be16 proto, u16 vid)
4419 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4420 struct ixgbe_hw *hw = &adapter->hw;
4422 /* remove VID from filter table */
4423 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4424 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4426 clear_bit(vid, adapter->active_vlans);
4432 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4433 * @adapter: driver data
4435 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4437 struct ixgbe_hw *hw = &adapter->hw;
4441 switch (hw->mac.type) {
4442 case ixgbe_mac_82598EB:
4443 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4444 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4445 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4447 case ixgbe_mac_82599EB:
4448 case ixgbe_mac_X540:
4449 case ixgbe_mac_X550:
4450 case ixgbe_mac_X550EM_x:
4451 case ixgbe_mac_x550em_a:
4452 for (i = 0; i < adapter->num_rx_queues; i++) {
4453 struct ixgbe_ring *ring = adapter->rx_ring[i];
4455 if (!netif_is_ixgbe(ring->netdev))
4459 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4460 vlnctrl &= ~IXGBE_RXDCTL_VME;
4461 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4470 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4471 * @adapter: driver data
4473 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4475 struct ixgbe_hw *hw = &adapter->hw;
4479 switch (hw->mac.type) {
4480 case ixgbe_mac_82598EB:
4481 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4482 vlnctrl |= IXGBE_VLNCTRL_VME;
4483 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4485 case ixgbe_mac_82599EB:
4486 case ixgbe_mac_X540:
4487 case ixgbe_mac_X550:
4488 case ixgbe_mac_X550EM_x:
4489 case ixgbe_mac_x550em_a:
4490 for (i = 0; i < adapter->num_rx_queues; i++) {
4491 struct ixgbe_ring *ring = adapter->rx_ring[i];
4493 if (!netif_is_ixgbe(ring->netdev))
4497 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4498 vlnctrl |= IXGBE_RXDCTL_VME;
4499 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4507 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4509 struct ixgbe_hw *hw = &adapter->hw;
4512 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4514 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4515 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4516 vlnctrl |= IXGBE_VLNCTRL_VFE;
4517 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4519 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4520 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4524 /* Nothing to do for 82598 */
4525 if (hw->mac.type == ixgbe_mac_82598EB)
4528 /* We are already in VLAN promisc, nothing to do */
4529 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4532 /* Set flag so we don't redo unnecessary work */
4533 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4535 /* Add PF to all active pools */
4536 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4537 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4538 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4540 vlvfb |= BIT(VMDQ_P(0) % 32);
4541 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4544 /* Set all bits in the VLAN filter table array */
4545 for (i = hw->mac.vft_size; i--;)
4546 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4549 #define VFTA_BLOCK_SIZE 8
4550 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4552 struct ixgbe_hw *hw = &adapter->hw;
4553 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4554 u32 vid_start = vfta_offset * 32;
4555 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4556 u32 i, vid, word, bits;
4558 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4559 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4561 /* pull VLAN ID from VLVF */
4562 vid = vlvf & VLAN_VID_MASK;
4564 /* only concern outselves with a certain range */
4565 if (vid < vid_start || vid >= vid_end)
4569 /* record VLAN ID in VFTA */
4570 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4572 /* if PF is part of this then continue */
4573 if (test_bit(vid, adapter->active_vlans))
4577 /* remove PF from the pool */
4578 word = i * 2 + VMDQ_P(0) / 32;
4579 bits = ~BIT(VMDQ_P(0) % 32);
4580 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4581 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4584 /* extract values from active_vlans and write back to VFTA */
4585 for (i = VFTA_BLOCK_SIZE; i--;) {
4586 vid = (vfta_offset + i) * 32;
4587 word = vid / BITS_PER_LONG;
4588 bits = vid % BITS_PER_LONG;
4590 vfta[i] |= adapter->active_vlans[word] >> bits;
4592 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4596 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4598 struct ixgbe_hw *hw = &adapter->hw;
4601 /* Set VLAN filtering to enabled */
4602 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4603 vlnctrl |= IXGBE_VLNCTRL_VFE;
4604 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4606 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4607 hw->mac.type == ixgbe_mac_82598EB)
4610 /* We are not in VLAN promisc, nothing to do */
4611 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4614 /* Set flag so we don't redo unnecessary work */
4615 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4617 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4618 ixgbe_scrub_vfta(adapter, i);
4621 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4625 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4627 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4628 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4632 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4633 * @netdev: network interface device structure
4635 * Writes multicast address list to the MTA hash table.
4636 * Returns: -ENOMEM on failure
4637 * 0 on no addresses written
4638 * X on writing X addresses to MTA
4640 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4642 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4643 struct ixgbe_hw *hw = &adapter->hw;
4645 if (!netif_running(netdev))
4648 if (hw->mac.ops.update_mc_addr_list)
4649 hw->mac.ops.update_mc_addr_list(hw, netdev);
4653 #ifdef CONFIG_PCI_IOV
4654 ixgbe_restore_vf_multicasts(adapter);
4657 return netdev_mc_count(netdev);
4660 #ifdef CONFIG_PCI_IOV
4661 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4663 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4664 struct ixgbe_hw *hw = &adapter->hw;
4667 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4668 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4670 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4671 hw->mac.ops.set_rar(hw, i,
4676 hw->mac.ops.clear_rar(hw, i);
4681 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4683 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4684 struct ixgbe_hw *hw = &adapter->hw;
4687 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4688 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4691 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4693 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4694 hw->mac.ops.set_rar(hw, i,
4699 hw->mac.ops.clear_rar(hw, i);
4703 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4705 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4706 struct ixgbe_hw *hw = &adapter->hw;
4709 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4710 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4711 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4714 ixgbe_sync_mac_table(adapter);
4717 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4719 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4720 struct ixgbe_hw *hw = &adapter->hw;
4723 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4724 /* do not count default RAR as available */
4725 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4728 /* only count unused and addresses that belong to us */
4729 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4730 if (mac_table->pool != pool)
4740 /* this function destroys the first RAR entry */
4741 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4743 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4744 struct ixgbe_hw *hw = &adapter->hw;
4746 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4747 mac_table->pool = VMDQ_P(0);
4749 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4751 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4755 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4756 const u8 *addr, u16 pool)
4758 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4759 struct ixgbe_hw *hw = &adapter->hw;
4762 if (is_zero_ether_addr(addr))
4765 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4766 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4769 ether_addr_copy(mac_table->addr, addr);
4770 mac_table->pool = pool;
4772 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4773 IXGBE_MAC_STATE_IN_USE;
4775 ixgbe_sync_mac_table(adapter);
4783 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4784 const u8 *addr, u16 pool)
4786 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4787 struct ixgbe_hw *hw = &adapter->hw;
4790 if (is_zero_ether_addr(addr))
4793 /* search table for addr, if found clear IN_USE flag and sync */
4794 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4795 /* we can only delete an entry if it is in use */
4796 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4798 /* we only care about entries that belong to the given pool */
4799 if (mac_table->pool != pool)
4801 /* we only care about a specific MAC address */
4802 if (!ether_addr_equal(addr, mac_table->addr))
4805 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4806 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4808 ixgbe_sync_mac_table(adapter);
4816 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4818 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4821 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4823 return min_t(int, ret, 0);
4826 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4828 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4830 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4836 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4837 * @netdev: network interface device structure
4839 * The set_rx_method entry point is called whenever the unicast/multicast
4840 * address list or the network interface flags are updated. This routine is
4841 * responsible for configuring the hardware for proper unicast, multicast and
4844 void ixgbe_set_rx_mode(struct net_device *netdev)
4846 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4847 struct ixgbe_hw *hw = &adapter->hw;
4848 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4849 netdev_features_t features = netdev->features;
4852 /* Check for Promiscuous and All Multicast modes */
4853 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4855 /* set all bits that we expect to always be set */
4856 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4857 fctrl |= IXGBE_FCTRL_BAM;
4858 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4859 fctrl |= IXGBE_FCTRL_PMCF;
4861 /* clear the bits we are changing the status of */
4862 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4863 if (netdev->flags & IFF_PROMISC) {
4864 hw->addr_ctrl.user_set_promisc = true;
4865 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4866 vmolr |= IXGBE_VMOLR_MPE;
4867 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4869 if (netdev->flags & IFF_ALLMULTI) {
4870 fctrl |= IXGBE_FCTRL_MPE;
4871 vmolr |= IXGBE_VMOLR_MPE;
4873 hw->addr_ctrl.user_set_promisc = false;
4877 * Write addresses to available RAR registers, if there is not
4878 * sufficient space to store all the addresses then enable
4879 * unicast promiscuous mode
4881 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4882 fctrl |= IXGBE_FCTRL_UPE;
4883 vmolr |= IXGBE_VMOLR_ROPE;
4886 /* Write addresses to the MTA, if the attempt fails
4887 * then we should just turn on promiscuous mode so
4888 * that we can at least receive multicast traffic
4890 count = ixgbe_write_mc_addr_list(netdev);
4892 fctrl |= IXGBE_FCTRL_MPE;
4893 vmolr |= IXGBE_VMOLR_MPE;
4895 vmolr |= IXGBE_VMOLR_ROMPE;
4898 if (hw->mac.type != ixgbe_mac_82598EB) {
4899 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4900 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4902 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4905 /* This is useful for sniffing bad packets. */
4906 if (features & NETIF_F_RXALL) {
4907 /* UPE and MPE will be handled by normal PROMISC logic
4908 * in e1000e_set_rx_mode */
4909 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4910 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4911 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4913 fctrl &= ~(IXGBE_FCTRL_DPF);
4914 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4917 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4919 if (features & NETIF_F_HW_VLAN_CTAG_RX)
4920 ixgbe_vlan_strip_enable(adapter);
4922 ixgbe_vlan_strip_disable(adapter);
4924 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4925 ixgbe_vlan_promisc_disable(adapter);
4927 ixgbe_vlan_promisc_enable(adapter);
4930 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4934 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4935 napi_enable(&adapter->q_vector[q_idx]->napi);
4938 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4942 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4943 napi_disable(&adapter->q_vector[q_idx]->napi);
4946 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
4948 struct ixgbe_hw *hw = &adapter->hw;
4951 if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
4952 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
4955 vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
4956 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
4958 if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
4959 adapter->vxlan_port = 0;
4961 if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
4962 adapter->geneve_port = 0;
4965 #ifdef CONFIG_IXGBE_DCB
4967 * ixgbe_configure_dcb - Configure DCB hardware
4968 * @adapter: ixgbe adapter struct
4970 * This is called by the driver on open to configure the DCB hardware.
4971 * This is also called by the gennetlink interface when reconfiguring
4974 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4976 struct ixgbe_hw *hw = &adapter->hw;
4977 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4979 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4980 if (hw->mac.type == ixgbe_mac_82598EB)
4981 netif_set_gso_max_size(adapter->netdev, 65536);
4985 if (hw->mac.type == ixgbe_mac_82598EB)
4986 netif_set_gso_max_size(adapter->netdev, 32768);
4989 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4990 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4993 /* reconfigure the hardware */
4994 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4995 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4997 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4999 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5000 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5001 ixgbe_dcb_hw_ets(&adapter->hw,
5002 adapter->ixgbe_ieee_ets,
5004 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5005 adapter->ixgbe_ieee_pfc->pfc_en,
5006 adapter->ixgbe_ieee_ets->prio_tc);
5009 /* Enable RSS Hash per TC */
5010 if (hw->mac.type != ixgbe_mac_82598EB) {
5012 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5019 /* write msb to all 8 TCs in one write */
5020 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5025 /* Additional bittime to account for IXGBE framing */
5026 #define IXGBE_ETH_FRAMING 20
5029 * ixgbe_hpbthresh - calculate high water mark for flow control
5031 * @adapter: board private structure to calculate for
5032 * @pb: packet buffer to calculate
5034 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5036 struct ixgbe_hw *hw = &adapter->hw;
5037 struct net_device *dev = adapter->netdev;
5038 int link, tc, kb, marker;
5041 /* Calculate max LAN frame size */
5042 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5045 /* FCoE traffic class uses FCOE jumbo frames */
5046 if ((dev->features & NETIF_F_FCOE_MTU) &&
5047 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5048 (pb == ixgbe_fcoe_get_tc(adapter)))
5049 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5052 /* Calculate delay value for device */
5053 switch (hw->mac.type) {
5054 case ixgbe_mac_X540:
5055 case ixgbe_mac_X550:
5056 case ixgbe_mac_X550EM_x:
5057 case ixgbe_mac_x550em_a:
5058 dv_id = IXGBE_DV_X540(link, tc);
5061 dv_id = IXGBE_DV(link, tc);
5065 /* Loopback switch introduces additional latency */
5066 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5067 dv_id += IXGBE_B2BT(tc);
5069 /* Delay value is calculated in bit times convert to KB */
5070 kb = IXGBE_BT2KB(dv_id);
5071 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5073 marker = rx_pba - kb;
5075 /* It is possible that the packet buffer is not large enough
5076 * to provide required headroom. In this case throw an error
5077 * to user and a do the best we can.
5080 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5081 "headroom to support flow control."
5082 "Decrease MTU or number of traffic classes\n", pb);
5090 * ixgbe_lpbthresh - calculate low water mark for for flow control
5092 * @adapter: board private structure to calculate for
5093 * @pb: packet buffer to calculate
5095 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5097 struct ixgbe_hw *hw = &adapter->hw;
5098 struct net_device *dev = adapter->netdev;
5102 /* Calculate max LAN frame size */
5103 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5106 /* FCoE traffic class uses FCOE jumbo frames */
5107 if ((dev->features & NETIF_F_FCOE_MTU) &&
5108 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5109 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5110 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5113 /* Calculate delay value for device */
5114 switch (hw->mac.type) {
5115 case ixgbe_mac_X540:
5116 case ixgbe_mac_X550:
5117 case ixgbe_mac_X550EM_x:
5118 case ixgbe_mac_x550em_a:
5119 dv_id = IXGBE_LOW_DV_X540(tc);
5122 dv_id = IXGBE_LOW_DV(tc);
5126 /* Delay value is calculated in bit times convert to KB */
5127 return IXGBE_BT2KB(dv_id);
5131 * ixgbe_pbthresh_setup - calculate and setup high low water marks
5133 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5135 struct ixgbe_hw *hw = &adapter->hw;
5136 int num_tc = adapter->hw_tcs;
5142 for (i = 0; i < num_tc; i++) {
5143 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5144 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5146 /* Low water marks must not be larger than high water marks */
5147 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5148 hw->fc.low_water[i] = 0;
5151 for (; i < MAX_TRAFFIC_CLASS; i++)
5152 hw->fc.high_water[i] = 0;
5155 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5157 struct ixgbe_hw *hw = &adapter->hw;
5159 u8 tc = adapter->hw_tcs;
5161 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5162 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5163 hdrm = 32 << adapter->fdir_pballoc;
5167 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5168 ixgbe_pbthresh_setup(adapter);
5171 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5173 struct ixgbe_hw *hw = &adapter->hw;
5174 struct hlist_node *node2;
5175 struct ixgbe_fdir_filter *filter;
5177 spin_lock(&adapter->fdir_perfect_lock);
5179 if (!hlist_empty(&adapter->fdir_filter_list))
5180 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5182 hlist_for_each_entry_safe(filter, node2,
5183 &adapter->fdir_filter_list, fdir_node) {
5184 ixgbe_fdir_write_perfect_filter_82599(hw,
5187 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
5188 IXGBE_FDIR_DROP_QUEUE :
5189 adapter->rx_ring[filter->action]->reg_idx);
5192 spin_unlock(&adapter->fdir_perfect_lock);
5196 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5197 * @rx_ring: ring to free buffers from
5199 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5201 u16 i = rx_ring->next_to_clean;
5202 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5204 /* Free all the Rx ring sk_buffs */
5205 while (i != rx_ring->next_to_alloc) {
5206 if (rx_buffer->skb) {
5207 struct sk_buff *skb = rx_buffer->skb;
5208 if (IXGBE_CB(skb)->page_released)
5209 dma_unmap_page_attrs(rx_ring->dev,
5211 ixgbe_rx_pg_size(rx_ring),
5217 /* Invalidate cache lines that may have been written to by
5218 * device so that we avoid corrupting memory.
5220 dma_sync_single_range_for_cpu(rx_ring->dev,
5222 rx_buffer->page_offset,
5223 ixgbe_rx_bufsz(rx_ring),
5226 /* free resources associated with mapping */
5227 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5228 ixgbe_rx_pg_size(rx_ring),
5231 __page_frag_cache_drain(rx_buffer->page,
5232 rx_buffer->pagecnt_bias);
5236 if (i == rx_ring->count) {
5238 rx_buffer = rx_ring->rx_buffer_info;
5242 rx_ring->next_to_alloc = 0;
5243 rx_ring->next_to_clean = 0;
5244 rx_ring->next_to_use = 0;
5247 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5248 struct ixgbe_fwd_adapter *accel)
5250 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5251 int num_tc = netdev_get_num_tc(adapter->netdev);
5252 struct net_device *vdev = accel->netdev;
5255 baseq = accel->pool * adapter->num_rx_queues_per_pool;
5256 netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5257 accel->pool, adapter->num_rx_pools,
5258 baseq, baseq + adapter->num_rx_queues_per_pool);
5260 accel->rx_base_queue = baseq;
5261 accel->tx_base_queue = baseq;
5263 /* record configuration for macvlan interface in vdev */
5264 for (i = 0; i < num_tc; i++)
5265 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5266 i, rss_i, baseq + (rss_i * i));
5268 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5269 adapter->rx_ring[baseq + i]->netdev = vdev;
5271 /* Guarantee all rings are updated before we update the
5272 * MAC address filter.
5276 /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5277 * need to only treat it as an error value if it is negative.
5279 err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5280 VMDQ_P(accel->pool));
5284 /* if we cannot add the MAC rule then disable the offload */
5285 macvlan_release_l2fw_offload(vdev);
5287 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5288 adapter->rx_ring[baseq + i]->netdev = NULL;
5290 netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5292 /* unbind the queues and drop the subordinate channel config */
5293 netdev_unbind_sb_channel(adapter->netdev, vdev);
5294 netdev_set_sb_channel(vdev, 0);
5296 clear_bit(accel->pool, adapter->fwd_bitmask);
5302 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5304 struct ixgbe_adapter *adapter = data;
5305 struct ixgbe_fwd_adapter *accel;
5307 if (!netif_is_macvlan(vdev))
5310 accel = macvlan_accel_priv(vdev);
5314 ixgbe_fwd_ring_up(adapter, accel);
5319 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5321 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5322 ixgbe_macvlan_up, adapter);
5325 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5327 struct ixgbe_hw *hw = &adapter->hw;
5329 ixgbe_configure_pb(adapter);
5330 #ifdef CONFIG_IXGBE_DCB
5331 ixgbe_configure_dcb(adapter);
5334 * We must restore virtualization before VLANs or else
5335 * the VLVF registers will not be populated
5337 ixgbe_configure_virtualization(adapter);
5339 ixgbe_set_rx_mode(adapter->netdev);
5340 ixgbe_restore_vlan(adapter);
5341 ixgbe_ipsec_restore(adapter);
5343 switch (hw->mac.type) {
5344 case ixgbe_mac_82599EB:
5345 case ixgbe_mac_X540:
5346 hw->mac.ops.disable_rx_buff(hw);
5352 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5353 ixgbe_init_fdir_signature_82599(&adapter->hw,
5354 adapter->fdir_pballoc);
5355 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5356 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5357 adapter->fdir_pballoc);
5358 ixgbe_fdir_filter_restore(adapter);
5361 switch (hw->mac.type) {
5362 case ixgbe_mac_82599EB:
5363 case ixgbe_mac_X540:
5364 hw->mac.ops.enable_rx_buff(hw);
5370 #ifdef CONFIG_IXGBE_DCA
5372 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5373 ixgbe_setup_dca(adapter);
5374 #endif /* CONFIG_IXGBE_DCA */
5377 /* configure FCoE L2 filters, redirection table, and Rx control */
5378 ixgbe_configure_fcoe(adapter);
5380 #endif /* IXGBE_FCOE */
5381 ixgbe_configure_tx(adapter);
5382 ixgbe_configure_rx(adapter);
5383 ixgbe_configure_dfwd(adapter);
5387 * ixgbe_sfp_link_config - set up SFP+ link
5388 * @adapter: pointer to private adapter struct
5390 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5393 * We are assuming the worst case scenario here, and that
5394 * is that an SFP was inserted/removed after the reset
5395 * but before SFP detection was enabled. As such the best
5396 * solution is to just start searching as soon as we start
5398 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5399 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5401 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5402 adapter->sfp_poll_time = 0;
5406 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5407 * @hw: pointer to private hardware struct
5409 * Returns 0 on success, negative on failure
5411 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5414 bool autoneg, link_up = false;
5415 int ret = IXGBE_ERR_LINK_SETUP;
5417 if (hw->mac.ops.check_link)
5418 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5423 speed = hw->phy.autoneg_advertised;
5424 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5425 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5430 if (hw->mac.ops.setup_link)
5431 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5436 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5438 struct ixgbe_hw *hw = &adapter->hw;
5441 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5442 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5444 gpie |= IXGBE_GPIE_EIAME;
5446 * use EIAM to auto-mask when MSI-X interrupt is asserted
5447 * this saves a register write for every interrupt
5449 switch (hw->mac.type) {
5450 case ixgbe_mac_82598EB:
5451 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5453 case ixgbe_mac_82599EB:
5454 case ixgbe_mac_X540:
5455 case ixgbe_mac_X550:
5456 case ixgbe_mac_X550EM_x:
5457 case ixgbe_mac_x550em_a:
5459 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5460 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5464 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5465 * specifically only auto mask tx and rx interrupts */
5466 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5469 /* XXX: to interrupt immediately for EICS writes, enable this */
5470 /* gpie |= IXGBE_GPIE_EIMEN; */
5472 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5473 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5475 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5476 case IXGBE_82599_VMDQ_8Q_MASK:
5477 gpie |= IXGBE_GPIE_VTMODE_16;
5479 case IXGBE_82599_VMDQ_4Q_MASK:
5480 gpie |= IXGBE_GPIE_VTMODE_32;
5483 gpie |= IXGBE_GPIE_VTMODE_64;
5488 /* Enable Thermal over heat sensor interrupt */
5489 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5490 switch (adapter->hw.mac.type) {
5491 case ixgbe_mac_82599EB:
5492 gpie |= IXGBE_SDP0_GPIEN_8259X;
5499 /* Enable fan failure interrupt */
5500 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5501 gpie |= IXGBE_SDP1_GPIEN(hw);
5503 switch (hw->mac.type) {
5504 case ixgbe_mac_82599EB:
5505 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5507 case ixgbe_mac_X550EM_x:
5508 case ixgbe_mac_x550em_a:
5509 gpie |= IXGBE_SDP0_GPIEN_X540;
5515 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5518 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5520 struct ixgbe_hw *hw = &adapter->hw;
5524 ixgbe_get_hw_control(adapter);
5525 ixgbe_setup_gpie(adapter);
5527 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5528 ixgbe_configure_msix(adapter);
5530 ixgbe_configure_msi_and_legacy(adapter);
5532 /* enable the optics for 82599 SFP+ fiber */
5533 if (hw->mac.ops.enable_tx_laser)
5534 hw->mac.ops.enable_tx_laser(hw);
5536 if (hw->phy.ops.set_phy_power)
5537 hw->phy.ops.set_phy_power(hw, true);
5539 smp_mb__before_atomic();
5540 clear_bit(__IXGBE_DOWN, &adapter->state);
5541 ixgbe_napi_enable_all(adapter);
5543 if (ixgbe_is_sfp(hw)) {
5544 ixgbe_sfp_link_config(adapter);
5546 err = ixgbe_non_sfp_link_config(hw);
5548 e_err(probe, "link_config FAILED %d\n", err);
5551 /* clear any pending interrupts, may auto mask */
5552 IXGBE_READ_REG(hw, IXGBE_EICR);
5553 ixgbe_irq_enable(adapter, true, true);
5556 * If this adapter has a fan, check to see if we had a failure
5557 * before we enabled the interrupt.
5559 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5560 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5561 if (esdp & IXGBE_ESDP_SDP1)
5562 e_crit(drv, "Fan has stopped, replace the adapter\n");
5565 /* bring the link up in the watchdog, this could race with our first
5566 * link up interrupt but shouldn't be a problem */
5567 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5568 adapter->link_check_timeout = jiffies;
5569 mod_timer(&adapter->service_timer, jiffies);
5571 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5572 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5573 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5574 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5577 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5579 WARN_ON(in_interrupt());
5580 /* put off any impending NetWatchDogTimeout */
5581 netif_trans_update(adapter->netdev);
5583 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5584 usleep_range(1000, 2000);
5585 if (adapter->hw.phy.type == ixgbe_phy_fw)
5586 ixgbe_watchdog_link_is_down(adapter);
5587 ixgbe_down(adapter);
5589 * If SR-IOV enabled then wait a bit before bringing the adapter
5590 * back up to give the VFs time to respond to the reset. The
5591 * two second wait is based upon the watchdog timer cycle in
5594 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5597 clear_bit(__IXGBE_RESETTING, &adapter->state);
5600 void ixgbe_up(struct ixgbe_adapter *adapter)
5602 /* hardware has been reset, we need to reload some things */
5603 ixgbe_configure(adapter);
5605 ixgbe_up_complete(adapter);
5608 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5612 pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5614 switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5615 case IXGBE_PCIDEVCTRL2_17_34s:
5616 case IXGBE_PCIDEVCTRL2_4_8s:
5617 /* For now we cap the upper limit on delay to 2 seconds
5618 * as we end up going up to 34 seconds of delay in worst
5619 * case timeout value.
5621 case IXGBE_PCIDEVCTRL2_1_2s:
5622 return 2000000ul; /* 2.0 s */
5623 case IXGBE_PCIDEVCTRL2_260_520ms:
5624 return 520000ul; /* 520 ms */
5625 case IXGBE_PCIDEVCTRL2_65_130ms:
5626 return 130000ul; /* 130 ms */
5627 case IXGBE_PCIDEVCTRL2_16_32ms:
5628 return 32000ul; /* 32 ms */
5629 case IXGBE_PCIDEVCTRL2_1_2ms:
5630 return 2000ul; /* 2 ms */
5631 case IXGBE_PCIDEVCTRL2_50_100us:
5632 return 100ul; /* 100 us */
5633 case IXGBE_PCIDEVCTRL2_16_32ms_def:
5634 return 32000ul; /* 32 ms */
5639 /* We shouldn't need to hit this path, but just in case default as
5640 * though completion timeout is not supported and support 32ms.
5645 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5647 unsigned long wait_delay, delay_interval;
5648 struct ixgbe_hw *hw = &adapter->hw;
5652 /* disable receives */
5653 hw->mac.ops.disable_rx(hw);
5655 if (ixgbe_removed(hw->hw_addr))
5658 /* disable all enabled Rx queues */
5659 for (i = 0; i < adapter->num_rx_queues; i++) {
5660 struct ixgbe_ring *ring = adapter->rx_ring[i];
5661 u8 reg_idx = ring->reg_idx;
5663 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5664 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5665 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5667 /* write value back with RXDCTL.ENABLE bit cleared */
5668 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5671 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5672 if (hw->mac.type == ixgbe_mac_82598EB &&
5673 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5676 /* Determine our minimum delay interval. We will increase this value
5677 * with each subsequent test. This way if the device returns quickly
5678 * we should spend as little time as possible waiting, however as
5679 * the time increases we will wait for larger periods of time.
5681 * The trick here is that we increase the interval using the
5682 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5683 * of that wait is that it totals up to 100x whatever interval we
5684 * choose. Since our minimum wait is 100us we can just divide the
5685 * total timeout by 100 to get our minimum delay interval.
5687 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5689 wait_loop = IXGBE_MAX_RX_DESC_POLL;
5690 wait_delay = delay_interval;
5692 while (wait_loop--) {
5693 usleep_range(wait_delay, wait_delay + 10);
5694 wait_delay += delay_interval * 2;
5697 /* OR together the reading of all the active RXDCTL registers,
5698 * and then test the result. We need the disable to complete
5699 * before we start freeing the memory and invalidating the
5702 for (i = 0; i < adapter->num_rx_queues; i++) {
5703 struct ixgbe_ring *ring = adapter->rx_ring[i];
5704 u8 reg_idx = ring->reg_idx;
5706 rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5709 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5714 "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5717 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5719 unsigned long wait_delay, delay_interval;
5720 struct ixgbe_hw *hw = &adapter->hw;
5724 if (ixgbe_removed(hw->hw_addr))
5727 /* disable all enabled Tx queues */
5728 for (i = 0; i < adapter->num_tx_queues; i++) {
5729 struct ixgbe_ring *ring = adapter->tx_ring[i];
5730 u8 reg_idx = ring->reg_idx;
5732 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5735 /* disable all enabled XDP Tx queues */
5736 for (i = 0; i < adapter->num_xdp_queues; i++) {
5737 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5738 u8 reg_idx = ring->reg_idx;
5740 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5743 /* If the link is not up there shouldn't be much in the way of
5744 * pending transactions. Those that are left will be flushed out
5745 * when the reset logic goes through the flush sequence to clean out
5746 * the pending Tx transactions.
5748 if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5749 goto dma_engine_disable;
5751 /* Determine our minimum delay interval. We will increase this value
5752 * with each subsequent test. This way if the device returns quickly
5753 * we should spend as little time as possible waiting, however as
5754 * the time increases we will wait for larger periods of time.
5756 * The trick here is that we increase the interval using the
5757 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5758 * of that wait is that it totals up to 100x whatever interval we
5759 * choose. Since our minimum wait is 100us we can just divide the
5760 * total timeout by 100 to get our minimum delay interval.
5762 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5764 wait_loop = IXGBE_MAX_RX_DESC_POLL;
5765 wait_delay = delay_interval;
5767 while (wait_loop--) {
5768 usleep_range(wait_delay, wait_delay + 10);
5769 wait_delay += delay_interval * 2;
5772 /* OR together the reading of all the active TXDCTL registers,
5773 * and then test the result. We need the disable to complete
5774 * before we start freeing the memory and invalidating the
5777 for (i = 0; i < adapter->num_tx_queues; i++) {
5778 struct ixgbe_ring *ring = adapter->tx_ring[i];
5779 u8 reg_idx = ring->reg_idx;
5781 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5783 for (i = 0; i < adapter->num_xdp_queues; i++) {
5784 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5785 u8 reg_idx = ring->reg_idx;
5787 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5790 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5791 goto dma_engine_disable;
5795 "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5798 /* Disable the Tx DMA engine on 82599 and later MAC */
5799 switch (hw->mac.type) {
5800 case ixgbe_mac_82599EB:
5801 case ixgbe_mac_X540:
5802 case ixgbe_mac_X550:
5803 case ixgbe_mac_X550EM_x:
5804 case ixgbe_mac_x550em_a:
5805 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5806 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5807 ~IXGBE_DMATXCTL_TE));
5814 void ixgbe_reset(struct ixgbe_adapter *adapter)
5816 struct ixgbe_hw *hw = &adapter->hw;
5817 struct net_device *netdev = adapter->netdev;
5820 if (ixgbe_removed(hw->hw_addr))
5822 /* lock SFP init bit to prevent race conditions with the watchdog */
5823 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5824 usleep_range(1000, 2000);
5826 /* clear all SFP and link config related flags while holding SFP_INIT */
5827 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5828 IXGBE_FLAG2_SFP_NEEDS_RESET);
5829 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5831 err = hw->mac.ops.init_hw(hw);
5834 case IXGBE_ERR_SFP_NOT_PRESENT:
5835 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5837 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5838 e_dev_err("master disable timed out\n");
5840 case IXGBE_ERR_EEPROM_VERSION:
5841 /* We are running on a pre-production device, log a warning */
5842 e_dev_warn("This device is a pre-production adapter/LOM. "
5843 "Please be aware there may be issues associated with "
5844 "your hardware. If you are experiencing problems "
5845 "please contact your Intel or hardware "
5846 "representative who provided you with this "
5850 e_dev_err("Hardware Error: %d\n", err);
5853 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5855 /* flush entries out of MAC table */
5856 ixgbe_flush_sw_mac_table(adapter);
5857 __dev_uc_unsync(netdev, NULL);
5859 /* do not flush user set addresses */
5860 ixgbe_mac_set_default_filter(adapter);
5862 /* update SAN MAC vmdq pool selection */
5863 if (hw->mac.san_mac_rar_index)
5864 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5866 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5867 ixgbe_ptp_reset(adapter);
5869 if (hw->phy.ops.set_phy_power) {
5870 if (!netif_running(adapter->netdev) && !adapter->wol)
5871 hw->phy.ops.set_phy_power(hw, false);
5873 hw->phy.ops.set_phy_power(hw, true);
5878 * ixgbe_clean_tx_ring - Free Tx Buffers
5879 * @tx_ring: ring to be cleaned
5881 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5883 u16 i = tx_ring->next_to_clean;
5884 struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5886 while (i != tx_ring->next_to_use) {
5887 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5889 /* Free all the Tx ring sk_buffs */
5890 if (ring_is_xdp(tx_ring))
5891 xdp_return_frame(tx_buffer->xdpf);
5893 dev_kfree_skb_any(tx_buffer->skb);
5895 /* unmap skb header data */
5896 dma_unmap_single(tx_ring->dev,
5897 dma_unmap_addr(tx_buffer, dma),
5898 dma_unmap_len(tx_buffer, len),
5901 /* check for eop_desc to determine the end of the packet */
5902 eop_desc = tx_buffer->next_to_watch;
5903 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5905 /* unmap remaining buffers */
5906 while (tx_desc != eop_desc) {
5910 if (unlikely(i == tx_ring->count)) {
5912 tx_buffer = tx_ring->tx_buffer_info;
5913 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5916 /* unmap any remaining paged data */
5917 if (dma_unmap_len(tx_buffer, len))
5918 dma_unmap_page(tx_ring->dev,
5919 dma_unmap_addr(tx_buffer, dma),
5920 dma_unmap_len(tx_buffer, len),
5924 /* move us one more past the eop_desc for start of next pkt */
5927 if (unlikely(i == tx_ring->count)) {
5929 tx_buffer = tx_ring->tx_buffer_info;
5933 /* reset BQL for queue */
5934 if (!ring_is_xdp(tx_ring))
5935 netdev_tx_reset_queue(txring_txq(tx_ring));
5937 /* reset next_to_use and next_to_clean */
5938 tx_ring->next_to_use = 0;
5939 tx_ring->next_to_clean = 0;
5943 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5944 * @adapter: board private structure
5946 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5950 for (i = 0; i < adapter->num_rx_queues; i++)
5951 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5955 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5956 * @adapter: board private structure
5958 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5962 for (i = 0; i < adapter->num_tx_queues; i++)
5963 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5964 for (i = 0; i < adapter->num_xdp_queues; i++)
5965 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
5968 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5970 struct hlist_node *node2;
5971 struct ixgbe_fdir_filter *filter;
5973 spin_lock(&adapter->fdir_perfect_lock);
5975 hlist_for_each_entry_safe(filter, node2,
5976 &adapter->fdir_filter_list, fdir_node) {
5977 hlist_del(&filter->fdir_node);
5980 adapter->fdir_filter_count = 0;
5982 spin_unlock(&adapter->fdir_perfect_lock);
5985 void ixgbe_down(struct ixgbe_adapter *adapter)
5987 struct net_device *netdev = adapter->netdev;
5988 struct ixgbe_hw *hw = &adapter->hw;
5991 /* signal that we are down to the interrupt handler */
5992 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5993 return; /* do nothing if already down */
5995 /* Shut off incoming Tx traffic */
5996 netif_tx_stop_all_queues(netdev);
5998 /* call carrier off first to avoid false dev_watchdog timeouts */
5999 netif_carrier_off(netdev);
6000 netif_tx_disable(netdev);
6003 ixgbe_disable_rx(adapter);
6005 /* synchronize_sched() needed for pending XDP buffers to drain */
6006 if (adapter->xdp_ring[0])
6007 synchronize_sched();
6009 ixgbe_irq_disable(adapter);
6011 ixgbe_napi_disable_all(adapter);
6013 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6014 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6015 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6017 del_timer_sync(&adapter->service_timer);
6019 if (adapter->num_vfs) {
6020 /* Clear EITR Select mapping */
6021 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6023 /* Mark all the VFs as inactive */
6024 for (i = 0 ; i < adapter->num_vfs; i++)
6025 adapter->vfinfo[i].clear_to_send = false;
6027 /* ping all the active vfs to let them know we are going down */
6028 ixgbe_ping_all_vfs(adapter);
6030 /* Disable all VFTE/VFRE TX/RX */
6031 ixgbe_disable_tx_rx(adapter);
6034 /* disable transmits in the hardware now that interrupts are off */
6035 ixgbe_disable_tx(adapter);
6037 if (!pci_channel_offline(adapter->pdev))
6038 ixgbe_reset(adapter);
6040 /* power down the optics for 82599 SFP+ fiber */
6041 if (hw->mac.ops.disable_tx_laser)
6042 hw->mac.ops.disable_tx_laser(hw);
6044 ixgbe_clean_all_tx_rings(adapter);
6045 ixgbe_clean_all_rx_rings(adapter);
6049 * ixgbe_eee_capable - helper function to determine EEE support on X550
6050 * @adapter: board private structure
6052 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6054 struct ixgbe_hw *hw = &adapter->hw;
6056 switch (hw->device_id) {
6057 case IXGBE_DEV_ID_X550EM_A_1G_T:
6058 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6059 if (!hw->phy.eee_speeds_supported)
6061 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6062 if (!hw->phy.eee_speeds_advertised)
6064 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6067 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6068 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6074 * ixgbe_tx_timeout - Respond to a Tx Hang
6075 * @netdev: network interface device structure
6077 static void ixgbe_tx_timeout(struct net_device *netdev)
6079 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6081 /* Do the reset outside of interrupt context */
6082 ixgbe_tx_timeout_reset(adapter);
6085 #ifdef CONFIG_IXGBE_DCB
6086 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6088 struct ixgbe_hw *hw = &adapter->hw;
6089 struct tc_configuration *tc;
6092 switch (hw->mac.type) {
6093 case ixgbe_mac_82598EB:
6094 case ixgbe_mac_82599EB:
6095 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6096 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6098 case ixgbe_mac_X540:
6099 case ixgbe_mac_X550:
6100 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6101 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6103 case ixgbe_mac_X550EM_x:
6104 case ixgbe_mac_x550em_a:
6106 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6107 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6111 /* Configure DCB traffic classes */
6112 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6113 tc = &adapter->dcb_cfg.tc_config[j];
6114 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6115 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6116 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6117 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6118 tc->dcb_pfc = pfc_disabled;
6121 /* Initialize default user to priority mapping, UPx->TC0 */
6122 tc = &adapter->dcb_cfg.tc_config[0];
6123 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6124 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6126 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6127 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6128 adapter->dcb_cfg.pfc_mode_enable = false;
6129 adapter->dcb_set_bitmap = 0x00;
6130 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6131 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6132 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6133 sizeof(adapter->temp_dcb_cfg));
6138 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6139 * @adapter: board private structure to initialize
6140 * @ii: pointer to ixgbe_info for device
6142 * ixgbe_sw_init initializes the Adapter private data structure.
6143 * Fields are initialized based on PCI device information and
6144 * OS network device settings (MTU size).
6146 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6147 const struct ixgbe_info *ii)
6149 struct ixgbe_hw *hw = &adapter->hw;
6150 struct pci_dev *pdev = adapter->pdev;
6151 unsigned int rss, fdir;
6155 /* PCI config space info */
6157 hw->vendor_id = pdev->vendor;
6158 hw->device_id = pdev->device;
6159 hw->revision_id = pdev->revision;
6160 hw->subsystem_vendor_id = pdev->subsystem_vendor;
6161 hw->subsystem_device_id = pdev->subsystem_device;
6163 /* get_invariants needs the device IDs */
6164 ii->get_invariants(hw);
6166 /* Set common capability flags and settings */
6167 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6168 adapter->ring_feature[RING_F_RSS].limit = rss;
6169 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6170 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6171 adapter->atr_sample_rate = 20;
6172 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6173 adapter->ring_feature[RING_F_FDIR].limit = fdir;
6174 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6175 adapter->ring_feature[RING_F_VMDQ].limit = 1;
6176 #ifdef CONFIG_IXGBE_DCA
6177 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6179 #ifdef CONFIG_IXGBE_DCB
6180 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6181 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6184 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6185 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6186 #ifdef CONFIG_IXGBE_DCB
6187 /* Default traffic class to use for FCoE */
6188 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6189 #endif /* CONFIG_IXGBE_DCB */
6190 #endif /* IXGBE_FCOE */
6192 /* initialize static ixgbe jump table entries */
6193 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6195 if (!adapter->jump_tables[0])
6197 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6199 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6200 adapter->jump_tables[i] = NULL;
6202 adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6203 sizeof(struct ixgbe_mac_addr),
6205 if (!adapter->mac_table)
6208 if (ixgbe_init_rss_key(adapter))
6211 /* Set MAC specific capability flags and exceptions */
6212 switch (hw->mac.type) {
6213 case ixgbe_mac_82598EB:
6214 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6216 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6217 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6219 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6220 adapter->ring_feature[RING_F_FDIR].limit = 0;
6221 adapter->atr_sample_rate = 0;
6222 adapter->fdir_pballoc = 0;
6224 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6225 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6226 #ifdef CONFIG_IXGBE_DCB
6227 adapter->fcoe.up = 0;
6228 #endif /* IXGBE_DCB */
6229 #endif /* IXGBE_FCOE */
6231 case ixgbe_mac_82599EB:
6232 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6233 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6235 case ixgbe_mac_X540:
6236 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6237 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6238 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6240 case ixgbe_mac_x550em_a:
6241 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6242 switch (hw->device_id) {
6243 case IXGBE_DEV_ID_X550EM_A_1G_T:
6244 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6245 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6251 case ixgbe_mac_X550EM_x:
6252 #ifdef CONFIG_IXGBE_DCB
6253 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6256 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6257 #ifdef CONFIG_IXGBE_DCB
6258 adapter->fcoe.up = 0;
6259 #endif /* IXGBE_DCB */
6260 #endif /* IXGBE_FCOE */
6262 case ixgbe_mac_X550:
6263 if (hw->mac.type == ixgbe_mac_X550)
6264 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6265 #ifdef CONFIG_IXGBE_DCA
6266 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6268 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6275 /* FCoE support exists, always init the FCoE lock */
6276 spin_lock_init(&adapter->fcoe.lock);
6279 /* n-tuple support exists, always init our spinlock */
6280 spin_lock_init(&adapter->fdir_perfect_lock);
6282 #ifdef CONFIG_IXGBE_DCB
6283 ixgbe_init_dcb(adapter);
6285 ixgbe_init_ipsec_offload(adapter);
6287 /* default flow control settings */
6288 hw->fc.requested_mode = ixgbe_fc_full;
6289 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
6290 ixgbe_pbthresh_setup(adapter);
6291 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6292 hw->fc.send_xon = true;
6293 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6295 #ifdef CONFIG_PCI_IOV
6297 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6299 /* assign number of SR-IOV VFs */
6300 if (hw->mac.type != ixgbe_mac_82598EB) {
6301 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6303 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6306 #endif /* CONFIG_PCI_IOV */
6308 /* enable itr by default in dynamic mode */
6309 adapter->rx_itr_setting = 1;
6310 adapter->tx_itr_setting = 1;
6312 /* set default ring sizes */
6313 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6314 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6316 /* set default work limits */
6317 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6319 /* initialize eeprom parameters */
6320 if (ixgbe_init_eeprom_params_generic(hw)) {
6321 e_dev_err("EEPROM initialization failed\n");
6325 /* PF holds first pool slot */
6326 set_bit(0, adapter->fwd_bitmask);
6327 set_bit(__IXGBE_DOWN, &adapter->state);
6333 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6334 * @tx_ring: tx descriptor ring (for a specific queue) to setup
6336 * Return 0 on success, negative on failure
6338 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6340 struct device *dev = tx_ring->dev;
6341 int orig_node = dev_to_node(dev);
6345 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6347 if (tx_ring->q_vector)
6348 ring_node = tx_ring->q_vector->numa_node;
6350 tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6351 if (!tx_ring->tx_buffer_info)
6352 tx_ring->tx_buffer_info = vmalloc(size);
6353 if (!tx_ring->tx_buffer_info)
6356 /* round up to nearest 4K */
6357 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6358 tx_ring->size = ALIGN(tx_ring->size, 4096);
6360 set_dev_node(dev, ring_node);
6361 tx_ring->desc = dma_alloc_coherent(dev,
6365 set_dev_node(dev, orig_node);
6367 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6368 &tx_ring->dma, GFP_KERNEL);
6372 tx_ring->next_to_use = 0;
6373 tx_ring->next_to_clean = 0;
6377 vfree(tx_ring->tx_buffer_info);
6378 tx_ring->tx_buffer_info = NULL;
6379 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6384 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6385 * @adapter: board private structure
6387 * If this function returns with an error, then it's possible one or
6388 * more of the rings is populated (while the rest are not). It is the
6389 * callers duty to clean those orphaned rings.
6391 * Return 0 on success, negative on failure
6393 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6395 int i, j = 0, err = 0;
6397 for (i = 0; i < adapter->num_tx_queues; i++) {
6398 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6402 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6405 for (j = 0; j < adapter->num_xdp_queues; j++) {
6406 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6410 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6416 /* rewind the index freeing the rings as we go */
6418 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6420 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6425 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6426 * @adapter: pointer to ixgbe_adapter
6427 * @rx_ring: rx descriptor ring (for a specific queue) to setup
6429 * Returns 0 on success, negative on failure
6431 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6432 struct ixgbe_ring *rx_ring)
6434 struct device *dev = rx_ring->dev;
6435 int orig_node = dev_to_node(dev);
6439 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6441 if (rx_ring->q_vector)
6442 ring_node = rx_ring->q_vector->numa_node;
6444 rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6445 if (!rx_ring->rx_buffer_info)
6446 rx_ring->rx_buffer_info = vmalloc(size);
6447 if (!rx_ring->rx_buffer_info)
6450 /* Round up to nearest 4K */
6451 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6452 rx_ring->size = ALIGN(rx_ring->size, 4096);
6454 set_dev_node(dev, ring_node);
6455 rx_ring->desc = dma_alloc_coherent(dev,
6459 set_dev_node(dev, orig_node);
6461 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6462 &rx_ring->dma, GFP_KERNEL);
6466 rx_ring->next_to_clean = 0;
6467 rx_ring->next_to_use = 0;
6469 /* XDP RX-queue info */
6470 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6471 rx_ring->queue_index) < 0)
6474 err = xdp_rxq_info_reg_mem_model(&rx_ring->xdp_rxq,
6475 MEM_TYPE_PAGE_SHARED, NULL);
6477 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6481 rx_ring->xdp_prog = adapter->xdp_prog;
6485 vfree(rx_ring->rx_buffer_info);
6486 rx_ring->rx_buffer_info = NULL;
6487 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6492 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6493 * @adapter: board private structure
6495 * If this function returns with an error, then it's possible one or
6496 * more of the rings is populated (while the rest are not). It is the
6497 * callers duty to clean those orphaned rings.
6499 * Return 0 on success, negative on failure
6501 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6505 for (i = 0; i < adapter->num_rx_queues; i++) {
6506 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6510 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6515 err = ixgbe_setup_fcoe_ddp_resources(adapter);
6520 /* rewind the index freeing the rings as we go */
6522 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6527 * ixgbe_free_tx_resources - Free Tx Resources per Queue
6528 * @tx_ring: Tx descriptor ring for a specific queue
6530 * Free all transmit software resources
6532 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6534 ixgbe_clean_tx_ring(tx_ring);
6536 vfree(tx_ring->tx_buffer_info);
6537 tx_ring->tx_buffer_info = NULL;
6539 /* if not set, then don't free */
6543 dma_free_coherent(tx_ring->dev, tx_ring->size,
6544 tx_ring->desc, tx_ring->dma);
6546 tx_ring->desc = NULL;
6550 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6551 * @adapter: board private structure
6553 * Free all transmit software resources
6555 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6559 for (i = 0; i < adapter->num_tx_queues; i++)
6560 if (adapter->tx_ring[i]->desc)
6561 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6562 for (i = 0; i < adapter->num_xdp_queues; i++)
6563 if (adapter->xdp_ring[i]->desc)
6564 ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6568 * ixgbe_free_rx_resources - Free Rx Resources
6569 * @rx_ring: ring to clean the resources from
6571 * Free all receive software resources
6573 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6575 ixgbe_clean_rx_ring(rx_ring);
6577 rx_ring->xdp_prog = NULL;
6578 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6579 vfree(rx_ring->rx_buffer_info);
6580 rx_ring->rx_buffer_info = NULL;
6582 /* if not set, then don't free */
6586 dma_free_coherent(rx_ring->dev, rx_ring->size,
6587 rx_ring->desc, rx_ring->dma);
6589 rx_ring->desc = NULL;
6593 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6594 * @adapter: board private structure
6596 * Free all receive software resources
6598 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6603 ixgbe_free_fcoe_ddp_resources(adapter);
6606 for (i = 0; i < adapter->num_rx_queues; i++)
6607 if (adapter->rx_ring[i]->desc)
6608 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6612 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6613 * @netdev: network interface device structure
6614 * @new_mtu: new value for maximum frame size
6616 * Returns 0 on success, negative on failure
6618 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6620 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6622 if (adapter->xdp_prog) {
6623 e_warn(probe, "MTU cannot be changed while XDP program is loaded\n");
6628 * For 82599EB we cannot allow legacy VFs to enable their receive
6629 * paths when MTU greater than 1500 is configured. So display a
6630 * warning that legacy VFs will be disabled.
6632 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6633 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6634 (new_mtu > ETH_DATA_LEN))
6635 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6637 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6639 /* must set new MTU before calling down or up */
6640 netdev->mtu = new_mtu;
6642 if (netif_running(netdev))
6643 ixgbe_reinit_locked(adapter);
6649 * ixgbe_open - Called when a network interface is made active
6650 * @netdev: network interface device structure
6652 * Returns 0 on success, negative value on failure
6654 * The open entry point is called when a network interface is made
6655 * active by the system (IFF_UP). At this point all resources needed
6656 * for transmit and receive operations are allocated, the interrupt
6657 * handler is registered with the OS, the watchdog timer is started,
6658 * and the stack is notified that the interface is ready.
6660 int ixgbe_open(struct net_device *netdev)
6662 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6663 struct ixgbe_hw *hw = &adapter->hw;
6666 /* disallow open during test */
6667 if (test_bit(__IXGBE_TESTING, &adapter->state))
6670 netif_carrier_off(netdev);
6672 /* allocate transmit descriptors */
6673 err = ixgbe_setup_all_tx_resources(adapter);
6677 /* allocate receive descriptors */
6678 err = ixgbe_setup_all_rx_resources(adapter);
6682 ixgbe_configure(adapter);
6684 err = ixgbe_request_irq(adapter);
6688 /* Notify the stack of the actual queue counts. */
6689 queues = adapter->num_tx_queues;
6690 err = netif_set_real_num_tx_queues(netdev, queues);
6692 goto err_set_queues;
6694 queues = adapter->num_rx_queues;
6695 err = netif_set_real_num_rx_queues(netdev, queues);
6697 goto err_set_queues;
6699 ixgbe_ptp_init(adapter);
6701 ixgbe_up_complete(adapter);
6703 ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6704 udp_tunnel_get_rx_info(netdev);
6709 ixgbe_free_irq(adapter);
6711 ixgbe_free_all_rx_resources(adapter);
6712 if (hw->phy.ops.set_phy_power && !adapter->wol)
6713 hw->phy.ops.set_phy_power(&adapter->hw, false);
6715 ixgbe_free_all_tx_resources(adapter);
6717 ixgbe_reset(adapter);
6722 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6724 ixgbe_ptp_suspend(adapter);
6726 if (adapter->hw.phy.ops.enter_lplu) {
6727 adapter->hw.phy.reset_disable = true;
6728 ixgbe_down(adapter);
6729 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6730 adapter->hw.phy.reset_disable = false;
6732 ixgbe_down(adapter);
6735 ixgbe_free_irq(adapter);
6737 ixgbe_free_all_tx_resources(adapter);
6738 ixgbe_free_all_rx_resources(adapter);
6742 * ixgbe_close - Disables a network interface
6743 * @netdev: network interface device structure
6745 * Returns 0, this is not allowed to fail
6747 * The close entry point is called when an interface is de-activated
6748 * by the OS. The hardware is still under the drivers control, but
6749 * needs to be disabled. A global MAC reset is issued to stop the
6750 * hardware, and all transmit and receive resources are freed.
6752 int ixgbe_close(struct net_device *netdev)
6754 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6756 ixgbe_ptp_stop(adapter);
6758 if (netif_device_present(netdev))
6759 ixgbe_close_suspend(adapter);
6761 ixgbe_fdir_filter_exit(adapter);
6763 ixgbe_release_hw_control(adapter);
6769 static int ixgbe_resume(struct pci_dev *pdev)
6771 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6772 struct net_device *netdev = adapter->netdev;
6775 adapter->hw.hw_addr = adapter->io_addr;
6776 pci_set_power_state(pdev, PCI_D0);
6777 pci_restore_state(pdev);
6779 * pci_restore_state clears dev->state_saved so call
6780 * pci_save_state to restore it.
6782 pci_save_state(pdev);
6784 err = pci_enable_device_mem(pdev);
6786 e_dev_err("Cannot enable PCI device from suspend\n");
6789 smp_mb__before_atomic();
6790 clear_bit(__IXGBE_DISABLED, &adapter->state);
6791 pci_set_master(pdev);
6793 pci_wake_from_d3(pdev, false);
6795 ixgbe_reset(adapter);
6797 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6800 err = ixgbe_init_interrupt_scheme(adapter);
6801 if (!err && netif_running(netdev))
6802 err = ixgbe_open(netdev);
6806 netif_device_attach(netdev);
6811 #endif /* CONFIG_PM */
6813 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6815 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6816 struct net_device *netdev = adapter->netdev;
6817 struct ixgbe_hw *hw = &adapter->hw;
6819 u32 wufc = adapter->wol;
6825 netif_device_detach(netdev);
6827 if (netif_running(netdev))
6828 ixgbe_close_suspend(adapter);
6830 ixgbe_clear_interrupt_scheme(adapter);
6834 retval = pci_save_state(pdev);
6839 if (hw->mac.ops.stop_link_on_d3)
6840 hw->mac.ops.stop_link_on_d3(hw);
6845 ixgbe_set_rx_mode(netdev);
6847 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6848 if (hw->mac.ops.enable_tx_laser)
6849 hw->mac.ops.enable_tx_laser(hw);
6851 /* enable the reception of multicast packets */
6852 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6853 fctrl |= IXGBE_FCTRL_MPE;
6854 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6856 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6857 ctrl |= IXGBE_CTRL_GIO_DIS;
6858 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6860 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6862 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6863 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6866 switch (hw->mac.type) {
6867 case ixgbe_mac_82598EB:
6868 pci_wake_from_d3(pdev, false);
6870 case ixgbe_mac_82599EB:
6871 case ixgbe_mac_X540:
6872 case ixgbe_mac_X550:
6873 case ixgbe_mac_X550EM_x:
6874 case ixgbe_mac_x550em_a:
6875 pci_wake_from_d3(pdev, !!wufc);
6881 *enable_wake = !!wufc;
6882 if (hw->phy.ops.set_phy_power && !*enable_wake)
6883 hw->phy.ops.set_phy_power(hw, false);
6885 ixgbe_release_hw_control(adapter);
6887 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6888 pci_disable_device(pdev);
6894 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6899 retval = __ixgbe_shutdown(pdev, &wake);
6904 pci_prepare_to_sleep(pdev);
6906 pci_wake_from_d3(pdev, false);
6907 pci_set_power_state(pdev, PCI_D3hot);
6912 #endif /* CONFIG_PM */
6914 static void ixgbe_shutdown(struct pci_dev *pdev)
6918 __ixgbe_shutdown(pdev, &wake);
6920 if (system_state == SYSTEM_POWER_OFF) {
6921 pci_wake_from_d3(pdev, wake);
6922 pci_set_power_state(pdev, PCI_D3hot);
6927 * ixgbe_update_stats - Update the board statistics counters.
6928 * @adapter: board private structure
6930 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6932 struct net_device *netdev = adapter->netdev;
6933 struct ixgbe_hw *hw = &adapter->hw;
6934 struct ixgbe_hw_stats *hwstats = &adapter->stats;
6936 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6937 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6938 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6939 u64 alloc_rx_page = 0;
6940 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6942 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6943 test_bit(__IXGBE_RESETTING, &adapter->state))
6946 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6949 for (i = 0; i < adapter->num_rx_queues; i++) {
6950 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6951 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6953 adapter->rsc_total_count = rsc_count;
6954 adapter->rsc_total_flush = rsc_flush;
6957 for (i = 0; i < adapter->num_rx_queues; i++) {
6958 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6959 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6960 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
6961 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6962 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6963 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6964 bytes += rx_ring->stats.bytes;
6965 packets += rx_ring->stats.packets;
6967 adapter->non_eop_descs = non_eop_descs;
6968 adapter->alloc_rx_page = alloc_rx_page;
6969 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6970 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6971 adapter->hw_csum_rx_error = hw_csum_rx_error;
6972 netdev->stats.rx_bytes = bytes;
6973 netdev->stats.rx_packets = packets;
6977 /* gather some stats to the adapter struct that are per queue */
6978 for (i = 0; i < adapter->num_tx_queues; i++) {
6979 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6980 restart_queue += tx_ring->tx_stats.restart_queue;
6981 tx_busy += tx_ring->tx_stats.tx_busy;
6982 bytes += tx_ring->stats.bytes;
6983 packets += tx_ring->stats.packets;
6985 for (i = 0; i < adapter->num_xdp_queues; i++) {
6986 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
6988 restart_queue += xdp_ring->tx_stats.restart_queue;
6989 tx_busy += xdp_ring->tx_stats.tx_busy;
6990 bytes += xdp_ring->stats.bytes;
6991 packets += xdp_ring->stats.packets;
6993 adapter->restart_queue = restart_queue;
6994 adapter->tx_busy = tx_busy;
6995 netdev->stats.tx_bytes = bytes;
6996 netdev->stats.tx_packets = packets;
6998 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7000 /* 8 register reads */
7001 for (i = 0; i < 8; i++) {
7002 /* for packet buffers not used, the register should read 0 */
7003 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7005 hwstats->mpc[i] += mpc;
7006 total_mpc += hwstats->mpc[i];
7007 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7008 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7009 switch (hw->mac.type) {
7010 case ixgbe_mac_82598EB:
7011 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7012 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7013 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7014 hwstats->pxonrxc[i] +=
7015 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7017 case ixgbe_mac_82599EB:
7018 case ixgbe_mac_X540:
7019 case ixgbe_mac_X550:
7020 case ixgbe_mac_X550EM_x:
7021 case ixgbe_mac_x550em_a:
7022 hwstats->pxonrxc[i] +=
7023 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7030 /*16 register reads */
7031 for (i = 0; i < 16; i++) {
7032 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7033 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7034 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7035 (hw->mac.type == ixgbe_mac_X540) ||
7036 (hw->mac.type == ixgbe_mac_X550) ||
7037 (hw->mac.type == ixgbe_mac_X550EM_x) ||
7038 (hw->mac.type == ixgbe_mac_x550em_a)) {
7039 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7040 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7041 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7042 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7046 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7047 /* work around hardware counting issue */
7048 hwstats->gprc -= missed_rx;
7050 ixgbe_update_xoff_received(adapter);
7052 /* 82598 hardware only has a 32 bit counter in the high register */
7053 switch (hw->mac.type) {
7054 case ixgbe_mac_82598EB:
7055 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7056 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7057 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7058 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7060 case ixgbe_mac_X540:
7061 case ixgbe_mac_X550:
7062 case ixgbe_mac_X550EM_x:
7063 case ixgbe_mac_x550em_a:
7064 /* OS2BMC stats are X540 and later */
7065 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7066 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7067 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7068 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7070 case ixgbe_mac_82599EB:
7071 for (i = 0; i < 16; i++)
7072 adapter->hw_rx_no_dma_resources +=
7073 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7074 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7075 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7076 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7077 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7078 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7079 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7080 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7081 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7082 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7084 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7085 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7086 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7087 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7088 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7089 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7090 /* Add up per cpu counters for total ddp aloc fail */
7091 if (adapter->fcoe.ddp_pool) {
7092 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7093 struct ixgbe_fcoe_ddp_pool *ddp_pool;
7095 u64 noddp = 0, noddp_ext_buff = 0;
7096 for_each_possible_cpu(cpu) {
7097 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7098 noddp += ddp_pool->noddp;
7099 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7101 hwstats->fcoe_noddp = noddp;
7102 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7104 #endif /* IXGBE_FCOE */
7109 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7110 hwstats->bprc += bprc;
7111 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7112 if (hw->mac.type == ixgbe_mac_82598EB)
7113 hwstats->mprc -= bprc;
7114 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7115 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7116 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7117 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7118 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7119 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7120 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7121 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7122 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7123 hwstats->lxontxc += lxon;
7124 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7125 hwstats->lxofftxc += lxoff;
7126 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7127 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7129 * 82598 errata - tx of flow control packets is included in tx counters
7131 xon_off_tot = lxon + lxoff;
7132 hwstats->gptc -= xon_off_tot;
7133 hwstats->mptc -= xon_off_tot;
7134 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7135 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7136 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7137 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7138 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7139 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7140 hwstats->ptc64 -= xon_off_tot;
7141 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7142 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7143 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7144 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7145 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7146 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7148 /* Fill out the OS statistics structure */
7149 netdev->stats.multicast = hwstats->mprc;
7152 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7153 netdev->stats.rx_dropped = 0;
7154 netdev->stats.rx_length_errors = hwstats->rlec;
7155 netdev->stats.rx_crc_errors = hwstats->crcerrs;
7156 netdev->stats.rx_missed_errors = total_mpc;
7160 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7161 * @adapter: pointer to the device adapter structure
7163 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7165 struct ixgbe_hw *hw = &adapter->hw;
7168 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7171 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7173 /* if interface is down do nothing */
7174 if (test_bit(__IXGBE_DOWN, &adapter->state))
7177 /* do nothing if we are not using signature filters */
7178 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7181 adapter->fdir_overflow++;
7183 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7184 for (i = 0; i < adapter->num_tx_queues; i++)
7185 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7186 &(adapter->tx_ring[i]->state));
7187 for (i = 0; i < adapter->num_xdp_queues; i++)
7188 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7189 &adapter->xdp_ring[i]->state);
7190 /* re-enable flow director interrupts */
7191 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7193 e_err(probe, "failed to finish FDIR re-initialization, "
7194 "ignored adding FDIR ATR filters\n");
7199 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7200 * @adapter: pointer to the device adapter structure
7202 * This function serves two purposes. First it strobes the interrupt lines
7203 * in order to make certain interrupts are occurring. Secondly it sets the
7204 * bits needed to check for TX hangs. As a result we should immediately
7205 * determine if a hang has occurred.
7207 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7209 struct ixgbe_hw *hw = &adapter->hw;
7213 /* If we're down, removing or resetting, just bail */
7214 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7215 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7216 test_bit(__IXGBE_RESETTING, &adapter->state))
7219 /* Force detection of hung controller */
7220 if (netif_carrier_ok(adapter->netdev)) {
7221 for (i = 0; i < adapter->num_tx_queues; i++)
7222 set_check_for_tx_hang(adapter->tx_ring[i]);
7223 for (i = 0; i < adapter->num_xdp_queues; i++)
7224 set_check_for_tx_hang(adapter->xdp_ring[i]);
7227 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7229 * for legacy and MSI interrupts don't set any bits
7230 * that are enabled for EIAM, because this operation
7231 * would set *both* EIMS and EICS for any bit in EIAM
7233 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7234 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7236 /* get one bit for every active tx/rx interrupt vector */
7237 for (i = 0; i < adapter->num_q_vectors; i++) {
7238 struct ixgbe_q_vector *qv = adapter->q_vector[i];
7239 if (qv->rx.ring || qv->tx.ring)
7244 /* Cause software interrupt to ensure rings are cleaned */
7245 ixgbe_irq_rearm_queues(adapter, eics);
7249 * ixgbe_watchdog_update_link - update the link status
7250 * @adapter: pointer to the device adapter structure
7252 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7254 struct ixgbe_hw *hw = &adapter->hw;
7255 u32 link_speed = adapter->link_speed;
7256 bool link_up = adapter->link_up;
7257 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7259 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7262 if (hw->mac.ops.check_link) {
7263 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7265 /* always assume link is up, if no check link function */
7266 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7270 if (adapter->ixgbe_ieee_pfc)
7271 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7273 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7274 hw->mac.ops.fc_enable(hw);
7275 ixgbe_set_rx_drop_en(adapter);
7279 time_after(jiffies, (adapter->link_check_timeout +
7280 IXGBE_TRY_LINK_TIMEOUT))) {
7281 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7282 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7283 IXGBE_WRITE_FLUSH(hw);
7286 adapter->link_up = link_up;
7287 adapter->link_speed = link_speed;
7290 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7292 #ifdef CONFIG_IXGBE_DCB
7293 struct net_device *netdev = adapter->netdev;
7294 struct dcb_app app = {
7295 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7300 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7301 up = dcb_ieee_getapp_mask(netdev, &app);
7303 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7308 * ixgbe_watchdog_link_is_up - update netif_carrier status and
7309 * print link up message
7310 * @adapter: pointer to the device adapter structure
7312 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7314 struct net_device *netdev = adapter->netdev;
7315 struct ixgbe_hw *hw = &adapter->hw;
7316 u32 link_speed = adapter->link_speed;
7317 const char *speed_str;
7318 bool flow_rx, flow_tx;
7320 /* only continue if link was previously down */
7321 if (netif_carrier_ok(netdev))
7324 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7326 switch (hw->mac.type) {
7327 case ixgbe_mac_82598EB: {
7328 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7329 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7330 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7331 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7334 case ixgbe_mac_X540:
7335 case ixgbe_mac_X550:
7336 case ixgbe_mac_X550EM_x:
7337 case ixgbe_mac_x550em_a:
7338 case ixgbe_mac_82599EB: {
7339 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7340 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7341 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7342 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7351 adapter->last_rx_ptp_check = jiffies;
7353 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7354 ixgbe_ptp_start_cyclecounter(adapter);
7356 switch (link_speed) {
7357 case IXGBE_LINK_SPEED_10GB_FULL:
7358 speed_str = "10 Gbps";
7360 case IXGBE_LINK_SPEED_5GB_FULL:
7361 speed_str = "5 Gbps";
7363 case IXGBE_LINK_SPEED_2_5GB_FULL:
7364 speed_str = "2.5 Gbps";
7366 case IXGBE_LINK_SPEED_1GB_FULL:
7367 speed_str = "1 Gbps";
7369 case IXGBE_LINK_SPEED_100_FULL:
7370 speed_str = "100 Mbps";
7372 case IXGBE_LINK_SPEED_10_FULL:
7373 speed_str = "10 Mbps";
7376 speed_str = "unknown speed";
7379 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7380 ((flow_rx && flow_tx) ? "RX/TX" :
7382 (flow_tx ? "TX" : "None"))));
7384 netif_carrier_on(netdev);
7385 ixgbe_check_vf_rate_limit(adapter);
7387 /* enable transmits */
7388 netif_tx_wake_all_queues(adapter->netdev);
7390 /* update the default user priority for VFs */
7391 ixgbe_update_default_up(adapter);
7393 /* ping all the active vfs to let them know link has changed */
7394 ixgbe_ping_all_vfs(adapter);
7398 * ixgbe_watchdog_link_is_down - update netif_carrier status and
7399 * print link down message
7400 * @adapter: pointer to the adapter structure
7402 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7404 struct net_device *netdev = adapter->netdev;
7405 struct ixgbe_hw *hw = &adapter->hw;
7407 adapter->link_up = false;
7408 adapter->link_speed = 0;
7410 /* only continue if link was up previously */
7411 if (!netif_carrier_ok(netdev))
7414 /* poll for SFP+ cable when link is down */
7415 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7416 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7418 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7419 ixgbe_ptp_start_cyclecounter(adapter);
7421 e_info(drv, "NIC Link is Down\n");
7422 netif_carrier_off(netdev);
7424 /* ping all the active vfs to let them know link has changed */
7425 ixgbe_ping_all_vfs(adapter);
7428 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7432 for (i = 0; i < adapter->num_tx_queues; i++) {
7433 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7435 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7439 for (i = 0; i < adapter->num_xdp_queues; i++) {
7440 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7442 if (ring->next_to_use != ring->next_to_clean)
7449 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7451 struct ixgbe_hw *hw = &adapter->hw;
7452 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7453 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7457 if (!adapter->num_vfs)
7460 /* resetting the PF is only needed for MAC before X550 */
7461 if (hw->mac.type >= ixgbe_mac_X550)
7464 for (i = 0; i < adapter->num_vfs; i++) {
7465 for (j = 0; j < q_per_pool; j++) {
7468 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7469 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7480 * ixgbe_watchdog_flush_tx - flush queues on link down
7481 * @adapter: pointer to the device adapter structure
7483 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7485 if (!netif_carrier_ok(adapter->netdev)) {
7486 if (ixgbe_ring_tx_pending(adapter) ||
7487 ixgbe_vf_tx_pending(adapter)) {
7488 /* We've lost link, so the controller stops DMA,
7489 * but we've got queued Tx work that's never going
7490 * to get done, so reset controller to flush Tx.
7491 * (Do the reset outside of interrupt context).
7493 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7494 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7499 #ifdef CONFIG_PCI_IOV
7500 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7502 struct ixgbe_hw *hw = &adapter->hw;
7503 struct pci_dev *pdev = adapter->pdev;
7507 if (!(netif_carrier_ok(adapter->netdev)))
7510 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7511 if (gpc) /* If incrementing then no need for the check below */
7513 /* Check to see if a bad DMA write target from an errant or
7514 * malicious VF has caused a PCIe error. If so then we can
7515 * issue a VFLR to the offending VF(s) and then resume without
7516 * requesting a full slot reset.
7522 /* check status reg for all VFs owned by this PF */
7523 for (vf = 0; vf < adapter->num_vfs; ++vf) {
7524 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7529 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7530 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7531 status_reg & PCI_STATUS_REC_MASTER_ABORT)
7536 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7540 /* Do not perform spoof check for 82598 or if not in IOV mode */
7541 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7542 adapter->num_vfs == 0)
7545 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7548 * ssvpc register is cleared on read, if zero then no
7549 * spoofed packets in the last interval.
7554 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7557 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7562 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7565 #endif /* CONFIG_PCI_IOV */
7569 * ixgbe_watchdog_subtask - check and bring link up
7570 * @adapter: pointer to the device adapter structure
7572 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7574 /* if interface is down, removing or resetting, do nothing */
7575 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7576 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7577 test_bit(__IXGBE_RESETTING, &adapter->state))
7580 ixgbe_watchdog_update_link(adapter);
7582 if (adapter->link_up)
7583 ixgbe_watchdog_link_is_up(adapter);
7585 ixgbe_watchdog_link_is_down(adapter);
7587 ixgbe_check_for_bad_vf(adapter);
7588 ixgbe_spoof_check(adapter);
7589 ixgbe_update_stats(adapter);
7591 ixgbe_watchdog_flush_tx(adapter);
7595 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7596 * @adapter: the ixgbe adapter structure
7598 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7600 struct ixgbe_hw *hw = &adapter->hw;
7603 /* not searching for SFP so there is nothing to do here */
7604 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7605 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7608 if (adapter->sfp_poll_time &&
7609 time_after(adapter->sfp_poll_time, jiffies))
7610 return; /* If not yet time to poll for SFP */
7612 /* someone else is in init, wait until next service event */
7613 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7616 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7618 err = hw->phy.ops.identify_sfp(hw);
7619 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7622 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7623 /* If no cable is present, then we need to reset
7624 * the next time we find a good cable. */
7625 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7632 /* exit if reset not needed */
7633 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7636 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7639 * A module may be identified correctly, but the EEPROM may not have
7640 * support for that module. setup_sfp() will fail in that case, so
7641 * we should not allow that module to load.
7643 if (hw->mac.type == ixgbe_mac_82598EB)
7644 err = hw->phy.ops.reset(hw);
7646 err = hw->mac.ops.setup_sfp(hw);
7648 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7651 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7652 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7655 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7657 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7658 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7659 e_dev_err("failed to initialize because an unsupported "
7660 "SFP+ module type was detected.\n");
7661 e_dev_err("Reload the driver after installing a "
7662 "supported module.\n");
7663 unregister_netdev(adapter->netdev);
7668 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7669 * @adapter: the ixgbe adapter structure
7671 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7673 struct ixgbe_hw *hw = &adapter->hw;
7676 bool autoneg = false;
7678 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7681 /* someone else is in init, wait until next service event */
7682 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7685 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7687 hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7689 /* advertise highest capable link speed */
7690 if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7691 speed = IXGBE_LINK_SPEED_10GB_FULL;
7693 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7694 IXGBE_LINK_SPEED_1GB_FULL);
7696 if (hw->mac.ops.setup_link)
7697 hw->mac.ops.setup_link(hw, speed, true);
7699 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7700 adapter->link_check_timeout = jiffies;
7701 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7705 * ixgbe_service_timer - Timer Call-back
7706 * @t: pointer to timer_list structure
7708 static void ixgbe_service_timer(struct timer_list *t)
7710 struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7711 unsigned long next_event_offset;
7713 /* poll faster when waiting for link */
7714 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7715 next_event_offset = HZ / 10;
7717 next_event_offset = HZ * 2;
7719 /* Reset the timer */
7720 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7722 ixgbe_service_event_schedule(adapter);
7725 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7727 struct ixgbe_hw *hw = &adapter->hw;
7730 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7733 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7735 if (!hw->phy.ops.handle_lasi)
7738 status = hw->phy.ops.handle_lasi(&adapter->hw);
7739 if (status != IXGBE_ERR_OVERTEMP)
7742 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7745 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7747 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7751 /* If we're already down, removing or resetting, just bail */
7752 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7753 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7754 test_bit(__IXGBE_RESETTING, &adapter->state)) {
7759 ixgbe_dump(adapter);
7760 netdev_err(adapter->netdev, "Reset adapter\n");
7761 adapter->tx_timeout_count++;
7763 ixgbe_reinit_locked(adapter);
7768 * ixgbe_service_task - manages and runs subtasks
7769 * @work: pointer to work_struct containing our data
7771 static void ixgbe_service_task(struct work_struct *work)
7773 struct ixgbe_adapter *adapter = container_of(work,
7774 struct ixgbe_adapter,
7776 if (ixgbe_removed(adapter->hw.hw_addr)) {
7777 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7779 ixgbe_down(adapter);
7782 ixgbe_service_event_complete(adapter);
7785 if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7787 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7788 udp_tunnel_get_rx_info(adapter->netdev);
7791 ixgbe_reset_subtask(adapter);
7792 ixgbe_phy_interrupt_subtask(adapter);
7793 ixgbe_sfp_detection_subtask(adapter);
7794 ixgbe_sfp_link_config_subtask(adapter);
7795 ixgbe_check_overtemp_subtask(adapter);
7796 ixgbe_watchdog_subtask(adapter);
7797 ixgbe_fdir_reinit_subtask(adapter);
7798 ixgbe_check_hang_subtask(adapter);
7800 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7801 ixgbe_ptp_overflow_check(adapter);
7802 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7803 ixgbe_ptp_rx_hang(adapter);
7804 ixgbe_ptp_tx_hang(adapter);
7807 ixgbe_service_event_complete(adapter);
7810 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7811 struct ixgbe_tx_buffer *first,
7813 struct ixgbe_ipsec_tx_data *itd)
7815 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7816 struct sk_buff *skb = first->skb;
7826 u32 paylen, l4_offset;
7827 u32 fceof_saidx = 0;
7830 if (skb->ip_summed != CHECKSUM_PARTIAL)
7833 if (!skb_is_gso(skb))
7836 err = skb_cow_head(skb, 0);
7840 if (eth_p_mpls(first->protocol))
7841 ip.hdr = skb_inner_network_header(skb);
7843 ip.hdr = skb_network_header(skb);
7844 l4.hdr = skb_checksum_start(skb);
7846 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7847 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7849 /* initialize outer IP header fields */
7850 if (ip.v4->version == 4) {
7851 unsigned char *csum_start = skb_checksum_start(skb);
7852 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7853 int len = csum_start - trans_start;
7855 /* IP header will have to cancel out any data that
7856 * is not a part of the outer IP header, so set to
7857 * a reverse csum if needed, else init check to 0.
7859 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7860 csum_fold(csum_partial(trans_start,
7862 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7865 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7866 IXGBE_TX_FLAGS_CSUM |
7867 IXGBE_TX_FLAGS_IPV4;
7869 ip.v6->payload_len = 0;
7870 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7871 IXGBE_TX_FLAGS_CSUM;
7874 /* determine offset of inner transport header */
7875 l4_offset = l4.hdr - skb->data;
7877 /* compute length of segmentation header */
7878 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7880 /* remove payload length from inner checksum */
7881 paylen = skb->len - l4_offset;
7882 csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
7884 /* update gso size and bytecount with header size */
7885 first->gso_segs = skb_shinfo(skb)->gso_segs;
7886 first->bytecount += (first->gso_segs - 1) * *hdr_len;
7888 /* mss_l4len_id: use 0 as index for TSO */
7889 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
7890 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
7892 fceof_saidx |= itd->sa_idx;
7893 type_tucmd |= itd->flags | itd->trailer_len;
7895 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7896 vlan_macip_lens = l4.hdr - ip.hdr;
7897 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
7898 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7900 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
7906 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
7908 unsigned int offset = 0;
7910 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
7912 return offset == skb_checksum_start_offset(skb);
7915 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
7916 struct ixgbe_tx_buffer *first,
7917 struct ixgbe_ipsec_tx_data *itd)
7919 struct sk_buff *skb = first->skb;
7920 u32 vlan_macip_lens = 0;
7921 u32 fceof_saidx = 0;
7924 if (skb->ip_summed != CHECKSUM_PARTIAL) {
7926 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
7927 IXGBE_TX_FLAGS_CC)))
7932 switch (skb->csum_offset) {
7933 case offsetof(struct tcphdr, check):
7934 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7936 case offsetof(struct udphdr, check):
7938 case offsetof(struct sctphdr, checksum):
7939 /* validate that this is actually an SCTP request */
7940 if (((first->protocol == htons(ETH_P_IP)) &&
7941 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
7942 ((first->protocol == htons(ETH_P_IPV6)) &&
7943 ixgbe_ipv6_csum_is_sctp(skb))) {
7944 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7949 skb_checksum_help(skb);
7953 /* update TX checksum flag */
7954 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7955 vlan_macip_lens = skb_checksum_start_offset(skb) -
7956 skb_network_offset(skb);
7958 /* vlan_macip_lens: MACLEN, VLAN tag */
7959 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7960 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7962 fceof_saidx |= itd->sa_idx;
7963 type_tucmd |= itd->flags | itd->trailer_len;
7965 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
7968 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7969 ((_flag <= _result) ? \
7970 ((u32)(_input & _flag) * (_result / _flag)) : \
7971 ((u32)(_input & _flag) / (_flag / _result)))
7973 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7975 /* set type for advanced descriptor with frame checksum insertion */
7976 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7977 IXGBE_ADVTXD_DCMD_DEXT |
7978 IXGBE_ADVTXD_DCMD_IFCS;
7980 /* set HW vlan bit if vlan is present */
7981 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7982 IXGBE_ADVTXD_DCMD_VLE);
7984 /* set segmentation enable bits for TSO/FSO */
7985 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7986 IXGBE_ADVTXD_DCMD_TSE);
7988 /* set timestamp bit if present */
7989 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7990 IXGBE_ADVTXD_MAC_TSTAMP);
7992 /* insert frame checksum */
7993 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7998 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7999 u32 tx_flags, unsigned int paylen)
8001 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8003 /* enable L4 checksum for TSO and TX checksum offload */
8004 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8005 IXGBE_TX_FLAGS_CSUM,
8006 IXGBE_ADVTXD_POPTS_TXSM);
8008 /* enable IPv4 checksum for TSO */
8009 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8010 IXGBE_TX_FLAGS_IPV4,
8011 IXGBE_ADVTXD_POPTS_IXSM);
8014 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8015 IXGBE_TX_FLAGS_IPSEC,
8016 IXGBE_ADVTXD_POPTS_IPSEC);
8019 * Check Context must be set if Tx switch is enabled, which it
8020 * always is for case where virtual functions are running
8022 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8026 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8029 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8031 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8033 /* Herbert's original patch had:
8034 * smp_mb__after_netif_stop_queue();
8035 * but since that doesn't exist yet, just open code it.
8039 /* We need to check again in a case another CPU has just
8040 * made room available.
8042 if (likely(ixgbe_desc_unused(tx_ring) < size))
8045 /* A reprieve! - use start_queue because it doesn't call schedule */
8046 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8047 ++tx_ring->tx_stats.restart_queue;
8051 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8053 if (likely(ixgbe_desc_unused(tx_ring) >= size))
8056 return __ixgbe_maybe_stop_tx(tx_ring, size);
8059 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
8062 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8063 struct ixgbe_tx_buffer *first,
8066 struct sk_buff *skb = first->skb;
8067 struct ixgbe_tx_buffer *tx_buffer;
8068 union ixgbe_adv_tx_desc *tx_desc;
8069 struct skb_frag_struct *frag;
8071 unsigned int data_len, size;
8072 u32 tx_flags = first->tx_flags;
8073 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8074 u16 i = tx_ring->next_to_use;
8076 tx_desc = IXGBE_TX_DESC(tx_ring, i);
8078 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8080 size = skb_headlen(skb);
8081 data_len = skb->data_len;
8084 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8085 if (data_len < sizeof(struct fcoe_crc_eof)) {
8086 size -= sizeof(struct fcoe_crc_eof) - data_len;
8089 data_len -= sizeof(struct fcoe_crc_eof);
8094 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8098 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8099 if (dma_mapping_error(tx_ring->dev, dma))
8102 /* record length, and DMA address */
8103 dma_unmap_len_set(tx_buffer, len, size);
8104 dma_unmap_addr_set(tx_buffer, dma, dma);
8106 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8108 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8109 tx_desc->read.cmd_type_len =
8110 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8114 if (i == tx_ring->count) {
8115 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8118 tx_desc->read.olinfo_status = 0;
8120 dma += IXGBE_MAX_DATA_PER_TXD;
8121 size -= IXGBE_MAX_DATA_PER_TXD;
8123 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8126 if (likely(!data_len))
8129 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8133 if (i == tx_ring->count) {
8134 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8137 tx_desc->read.olinfo_status = 0;
8140 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8142 size = skb_frag_size(frag);
8146 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8149 tx_buffer = &tx_ring->tx_buffer_info[i];
8152 /* write last descriptor with RS and EOP bits */
8153 cmd_type |= size | IXGBE_TXD_CMD;
8154 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8156 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8158 /* set the timestamp */
8159 first->time_stamp = jiffies;
8162 * Force memory writes to complete before letting h/w know there
8163 * are new descriptors to fetch. (Only applicable for weak-ordered
8164 * memory model archs, such as IA-64).
8166 * We also need this memory barrier to make certain all of the
8167 * status bits have been updated before next_to_watch is written.
8171 /* set next_to_watch value indicating a packet is present */
8172 first->next_to_watch = tx_desc;
8175 if (i == tx_ring->count)
8178 tx_ring->next_to_use = i;
8180 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8182 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8183 writel(i, tx_ring->tail);
8185 /* we need this if more than one processor can write to our tail
8186 * at a time, it synchronizes IO on IA64/Altix systems
8193 dev_err(tx_ring->dev, "TX DMA map failed\n");
8195 /* clear dma mappings for failed tx_buffer_info map */
8197 tx_buffer = &tx_ring->tx_buffer_info[i];
8198 if (dma_unmap_len(tx_buffer, len))
8199 dma_unmap_page(tx_ring->dev,
8200 dma_unmap_addr(tx_buffer, dma),
8201 dma_unmap_len(tx_buffer, len),
8203 dma_unmap_len_set(tx_buffer, len, 0);
8204 if (tx_buffer == first)
8207 i += tx_ring->count;
8211 dev_kfree_skb_any(first->skb);
8214 tx_ring->next_to_use = i;
8219 static void ixgbe_atr(struct ixgbe_ring *ring,
8220 struct ixgbe_tx_buffer *first)
8222 struct ixgbe_q_vector *q_vector = ring->q_vector;
8223 union ixgbe_atr_hash_dword input = { .dword = 0 };
8224 union ixgbe_atr_hash_dword common = { .dword = 0 };
8226 unsigned char *network;
8228 struct ipv6hdr *ipv6;
8232 struct sk_buff *skb;
8236 /* if ring doesn't have a interrupt vector, cannot perform ATR */
8240 /* do nothing if sampling is disabled */
8241 if (!ring->atr_sample_rate)
8246 /* currently only IPv4/IPv6 with TCP is supported */
8247 if ((first->protocol != htons(ETH_P_IP)) &&
8248 (first->protocol != htons(ETH_P_IPV6)))
8251 /* snag network header to get L4 type and address */
8253 hdr.network = skb_network_header(skb);
8254 if (unlikely(hdr.network <= skb->data))
8256 if (skb->encapsulation &&
8257 first->protocol == htons(ETH_P_IP) &&
8258 hdr.ipv4->protocol == IPPROTO_UDP) {
8259 struct ixgbe_adapter *adapter = q_vector->adapter;
8261 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8265 /* verify the port is recognized as VXLAN */
8266 if (adapter->vxlan_port &&
8267 udp_hdr(skb)->dest == adapter->vxlan_port)
8268 hdr.network = skb_inner_network_header(skb);
8270 if (adapter->geneve_port &&
8271 udp_hdr(skb)->dest == adapter->geneve_port)
8272 hdr.network = skb_inner_network_header(skb);
8275 /* Make sure we have at least [minimum IPv4 header + TCP]
8276 * or [IPv6 header] bytes
8278 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8281 /* Currently only IPv4/IPv6 with TCP is supported */
8282 switch (hdr.ipv4->version) {
8284 /* access ihl as u8 to avoid unaligned access on ia64 */
8285 hlen = (hdr.network[0] & 0x0F) << 2;
8286 l4_proto = hdr.ipv4->protocol;
8289 hlen = hdr.network - skb->data;
8290 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8291 hlen -= hdr.network - skb->data;
8297 if (l4_proto != IPPROTO_TCP)
8300 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8301 hlen + sizeof(struct tcphdr)))
8304 th = (struct tcphdr *)(hdr.network + hlen);
8306 /* skip this packet since the socket is closing */
8310 /* sample on all syn packets or once every atr sample count */
8311 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8314 /* reset sample count */
8315 ring->atr_count = 0;
8317 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8320 * src and dst are inverted, think how the receiver sees them
8322 * The input is broken into two sections, a non-compressed section
8323 * containing vm_pool, vlan_id, and flow_type. The rest of the data
8324 * is XORed together and stored in the compressed dword.
8326 input.formatted.vlan_id = vlan_id;
8329 * since src port and flex bytes occupy the same word XOR them together
8330 * and write the value to source port portion of compressed dword
8332 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8333 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8335 common.port.src ^= th->dest ^ first->protocol;
8336 common.port.dst ^= th->source;
8338 switch (hdr.ipv4->version) {
8340 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8341 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8344 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8345 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8346 hdr.ipv6->saddr.s6_addr32[1] ^
8347 hdr.ipv6->saddr.s6_addr32[2] ^
8348 hdr.ipv6->saddr.s6_addr32[3] ^
8349 hdr.ipv6->daddr.s6_addr32[0] ^
8350 hdr.ipv6->daddr.s6_addr32[1] ^
8351 hdr.ipv6->daddr.s6_addr32[2] ^
8352 hdr.ipv6->daddr.s6_addr32[3];
8358 if (hdr.network != skb_network_header(skb))
8359 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8361 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8362 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8363 input, common, ring->queue_index);
8367 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8368 struct net_device *sb_dev,
8369 select_queue_fallback_t fallback)
8371 struct ixgbe_adapter *adapter;
8372 struct ixgbe_ring_feature *f;
8376 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8377 struct net_device *vdev = sb_dev;
8379 txq = vdev->tc_to_txq[tc].offset;
8380 txq += reciprocal_scale(skb_get_hash(skb),
8381 vdev->tc_to_txq[tc].count);
8387 * only execute the code below if protocol is FCoE
8388 * or FIP and we have FCoE enabled on the adapter
8390 switch (vlan_get_protocol(skb)) {
8391 case htons(ETH_P_FCOE):
8392 case htons(ETH_P_FIP):
8393 adapter = netdev_priv(dev);
8395 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8399 return fallback(dev, skb, sb_dev);
8402 f = &adapter->ring_feature[RING_F_FCOE];
8404 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8407 while (txq >= f->indices)
8410 return txq + f->offset;
8414 static int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8415 struct xdp_frame *xdpf)
8417 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8418 struct ixgbe_tx_buffer *tx_buffer;
8419 union ixgbe_adv_tx_desc *tx_desc;
8426 if (unlikely(!ixgbe_desc_unused(ring)))
8427 return IXGBE_XDP_CONSUMED;
8429 dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8430 if (dma_mapping_error(ring->dev, dma))
8431 return IXGBE_XDP_CONSUMED;
8433 /* record the location of the first descriptor for this packet */
8434 tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8435 tx_buffer->bytecount = len;
8436 tx_buffer->gso_segs = 1;
8437 tx_buffer->protocol = 0;
8439 i = ring->next_to_use;
8440 tx_desc = IXGBE_TX_DESC(ring, i);
8442 dma_unmap_len_set(tx_buffer, len, len);
8443 dma_unmap_addr_set(tx_buffer, dma, dma);
8444 tx_buffer->xdpf = xdpf;
8446 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8448 /* put descriptor type bits */
8449 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8450 IXGBE_ADVTXD_DCMD_DEXT |
8451 IXGBE_ADVTXD_DCMD_IFCS;
8452 cmd_type |= len | IXGBE_TXD_CMD;
8453 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8454 tx_desc->read.olinfo_status =
8455 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8457 /* Avoid any potential race with xdp_xmit and cleanup */
8460 /* set next_to_watch value indicating a packet is present */
8462 if (i == ring->count)
8465 tx_buffer->next_to_watch = tx_desc;
8466 ring->next_to_use = i;
8468 return IXGBE_XDP_TX;
8471 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8472 struct ixgbe_adapter *adapter,
8473 struct ixgbe_ring *tx_ring)
8475 struct ixgbe_tx_buffer *first;
8479 u16 count = TXD_USE_COUNT(skb_headlen(skb));
8480 struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8481 __be16 protocol = skb->protocol;
8485 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8486 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8487 * + 2 desc gap to keep tail from touching head,
8488 * + 1 desc for context descriptor,
8489 * otherwise try next time
8491 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8492 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8494 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8495 tx_ring->tx_stats.tx_busy++;
8496 return NETDEV_TX_BUSY;
8499 /* record the location of the first descriptor for this packet */
8500 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8502 first->bytecount = skb->len;
8503 first->gso_segs = 1;
8505 /* if we have a HW VLAN tag being added default to the HW one */
8506 if (skb_vlan_tag_present(skb)) {
8507 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8508 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8509 /* else if it is a SW VLAN check the next protocol and store the tag */
8510 } else if (protocol == htons(ETH_P_8021Q)) {
8511 struct vlan_hdr *vhdr, _vhdr;
8512 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8516 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8517 IXGBE_TX_FLAGS_VLAN_SHIFT;
8518 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8520 protocol = vlan_get_protocol(skb);
8522 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8523 adapter->ptp_clock) {
8524 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8526 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8527 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8529 /* schedule check for Tx timestamp */
8530 adapter->ptp_tx_skb = skb_get(skb);
8531 adapter->ptp_tx_start = jiffies;
8532 schedule_work(&adapter->ptp_tx_work);
8534 adapter->tx_hwtstamp_skipped++;
8538 skb_tx_timestamp(skb);
8540 #ifdef CONFIG_PCI_IOV
8542 * Use the l2switch_enable flag - would be false if the DMA
8543 * Tx switch had been disabled.
8545 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8546 tx_flags |= IXGBE_TX_FLAGS_CC;
8549 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8550 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8551 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8552 (skb->priority != TC_PRIO_CONTROL))) {
8553 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8554 tx_flags |= (skb->priority & 0x7) <<
8555 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8556 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8557 struct vlan_ethhdr *vhdr;
8559 if (skb_cow_head(skb, 0))
8561 vhdr = (struct vlan_ethhdr *)skb->data;
8562 vhdr->h_vlan_TCI = htons(tx_flags >>
8563 IXGBE_TX_FLAGS_VLAN_SHIFT);
8565 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8569 /* record initial flags and protocol */
8570 first->tx_flags = tx_flags;
8571 first->protocol = protocol;
8574 /* setup tx offload for FCoE */
8575 if ((protocol == htons(ETH_P_FCOE)) &&
8576 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8577 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8584 #endif /* IXGBE_FCOE */
8586 #ifdef CONFIG_XFRM_OFFLOAD
8587 if (skb->sp && !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8590 tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8594 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8596 /* add the ATR filter if ATR is on */
8597 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8598 ixgbe_atr(tx_ring, first);
8602 #endif /* IXGBE_FCOE */
8603 if (ixgbe_tx_map(tx_ring, first, hdr_len))
8604 goto cleanup_tx_timestamp;
8606 return NETDEV_TX_OK;
8609 dev_kfree_skb_any(first->skb);
8611 cleanup_tx_timestamp:
8612 if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8613 dev_kfree_skb_any(adapter->ptp_tx_skb);
8614 adapter->ptp_tx_skb = NULL;
8615 cancel_work_sync(&adapter->ptp_tx_work);
8616 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8619 return NETDEV_TX_OK;
8622 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8623 struct net_device *netdev,
8624 struct ixgbe_ring *ring)
8626 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8627 struct ixgbe_ring *tx_ring;
8630 * The minimum packet size for olinfo paylen is 17 so pad the skb
8631 * in order to meet this minimum size requirement.
8633 if (skb_put_padto(skb, 17))
8634 return NETDEV_TX_OK;
8636 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8638 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8641 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8642 struct net_device *netdev)
8644 return __ixgbe_xmit_frame(skb, netdev, NULL);
8648 * ixgbe_set_mac - Change the Ethernet Address of the NIC
8649 * @netdev: network interface device structure
8650 * @p: pointer to an address structure
8652 * Returns 0 on success, negative on failure
8654 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8656 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8657 struct ixgbe_hw *hw = &adapter->hw;
8658 struct sockaddr *addr = p;
8660 if (!is_valid_ether_addr(addr->sa_data))
8661 return -EADDRNOTAVAIL;
8663 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8664 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8666 ixgbe_mac_set_default_filter(adapter);
8672 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8674 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8675 struct ixgbe_hw *hw = &adapter->hw;
8679 if (prtad != hw->phy.mdio.prtad)
8681 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8687 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8688 u16 addr, u16 value)
8690 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8691 struct ixgbe_hw *hw = &adapter->hw;
8693 if (prtad != hw->phy.mdio.prtad)
8695 return hw->phy.ops.write_reg(hw, addr, devad, value);
8698 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8700 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8704 return ixgbe_ptp_set_ts_config(adapter, req);
8706 return ixgbe_ptp_get_ts_config(adapter, req);
8708 if (!adapter->hw.phy.ops.read_reg)
8712 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8717 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8719 * @dev: network interface device structure
8721 * Returns non-zero on failure
8723 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8726 struct ixgbe_adapter *adapter = netdev_priv(dev);
8727 struct ixgbe_hw *hw = &adapter->hw;
8729 if (is_valid_ether_addr(hw->mac.san_addr)) {
8731 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8734 /* update SAN MAC vmdq pool selection */
8735 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8741 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8743 * @dev: network interface device structure
8745 * Returns non-zero on failure
8747 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8750 struct ixgbe_adapter *adapter = netdev_priv(dev);
8751 struct ixgbe_mac_info *mac = &adapter->hw.mac;
8753 if (is_valid_ether_addr(mac->san_addr)) {
8755 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8761 #ifdef CONFIG_NET_POLL_CONTROLLER
8763 * Polling 'interrupt' - used by things like netconsole to send skbs
8764 * without having to re-enable interrupts. It's not called while
8765 * the interrupt routine is executing.
8767 static void ixgbe_netpoll(struct net_device *netdev)
8769 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8772 /* if interface is down do nothing */
8773 if (test_bit(__IXGBE_DOWN, &adapter->state))
8776 /* loop through and schedule all active queues */
8777 for (i = 0; i < adapter->num_q_vectors; i++)
8778 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8783 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8784 struct ixgbe_ring *ring)
8791 start = u64_stats_fetch_begin_irq(&ring->syncp);
8792 packets = ring->stats.packets;
8793 bytes = ring->stats.bytes;
8794 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8795 stats->tx_packets += packets;
8796 stats->tx_bytes += bytes;
8800 static void ixgbe_get_stats64(struct net_device *netdev,
8801 struct rtnl_link_stats64 *stats)
8803 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8807 for (i = 0; i < adapter->num_rx_queues; i++) {
8808 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8814 start = u64_stats_fetch_begin_irq(&ring->syncp);
8815 packets = ring->stats.packets;
8816 bytes = ring->stats.bytes;
8817 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8818 stats->rx_packets += packets;
8819 stats->rx_bytes += bytes;
8823 for (i = 0; i < adapter->num_tx_queues; i++) {
8824 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8826 ixgbe_get_ring_stats64(stats, ring);
8828 for (i = 0; i < adapter->num_xdp_queues; i++) {
8829 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8831 ixgbe_get_ring_stats64(stats, ring);
8835 /* following stats updated by ixgbe_watchdog_task() */
8836 stats->multicast = netdev->stats.multicast;
8837 stats->rx_errors = netdev->stats.rx_errors;
8838 stats->rx_length_errors = netdev->stats.rx_length_errors;
8839 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8840 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8843 #ifdef CONFIG_IXGBE_DCB
8845 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8846 * @adapter: pointer to ixgbe_adapter
8847 * @tc: number of traffic classes currently enabled
8849 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8850 * 802.1Q priority maps to a packet buffer that exists.
8852 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8854 struct ixgbe_hw *hw = &adapter->hw;
8858 /* 82598 have a static priority to TC mapping that can not
8859 * be changed so no validation is needed.
8861 if (hw->mac.type == ixgbe_mac_82598EB)
8864 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8867 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8868 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8870 /* If up2tc is out of bounds default to zero */
8872 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8876 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8882 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8883 * @adapter: Pointer to adapter struct
8885 * Populate the netdev user priority to tc map
8887 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
8889 struct net_device *dev = adapter->netdev;
8890 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
8891 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
8894 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
8897 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
8898 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
8900 tc = ets->prio_tc[prio];
8902 netdev_set_prio_tc_map(dev, prio, tc);
8906 #endif /* CONFIG_IXGBE_DCB */
8907 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
8909 struct ixgbe_adapter *adapter = data;
8910 struct ixgbe_fwd_adapter *accel;
8913 /* we only care about macvlans... */
8914 if (!netif_is_macvlan(vdev))
8917 /* that have hardware offload enabled... */
8918 accel = macvlan_accel_priv(vdev);
8922 /* If we can relocate to a different bit do so */
8923 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
8924 if (pool < adapter->num_rx_pools) {
8925 set_bit(pool, adapter->fwd_bitmask);
8930 /* if we cannot find a free pool then disable the offload */
8931 netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
8932 macvlan_release_l2fw_offload(vdev);
8934 /* unbind the queues and drop the subordinate channel config */
8935 netdev_unbind_sb_channel(adapter->netdev, vdev);
8936 netdev_set_sb_channel(vdev, 0);
8943 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
8945 struct ixgbe_adapter *adapter = netdev_priv(dev);
8947 /* flush any stale bits out of the fwd bitmask */
8948 bitmap_clear(adapter->fwd_bitmask, 1, 63);
8950 /* walk through upper devices reassigning pools */
8951 netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
8956 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8958 * @dev: net device to configure
8959 * @tc: number of traffic classes to enable
8961 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
8963 struct ixgbe_adapter *adapter = netdev_priv(dev);
8964 struct ixgbe_hw *hw = &adapter->hw;
8966 /* Hardware supports up to 8 traffic classes */
8967 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
8970 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
8973 /* Hardware has to reinitialize queues and interrupts to
8974 * match packet buffer alignment. Unfortunately, the
8975 * hardware is not flexible enough to do this dynamically.
8977 if (netif_running(dev))
8980 ixgbe_reset(adapter);
8982 ixgbe_clear_interrupt_scheme(adapter);
8984 #ifdef CONFIG_IXGBE_DCB
8986 netdev_set_num_tc(dev, tc);
8987 ixgbe_set_prio_tc_map(adapter);
8989 adapter->hw_tcs = tc;
8990 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
8992 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
8993 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
8994 adapter->hw.fc.requested_mode = ixgbe_fc_none;
8997 netdev_reset_tc(dev);
8999 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9000 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9002 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9003 adapter->hw_tcs = tc;
9005 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9006 adapter->dcb_cfg.pfc_mode_enable = false;
9009 ixgbe_validate_rtr(adapter, tc);
9011 #endif /* CONFIG_IXGBE_DCB */
9012 ixgbe_init_interrupt_scheme(adapter);
9014 ixgbe_defrag_macvlan_pools(dev);
9016 if (netif_running(dev))
9017 return ixgbe_open(dev);
9022 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9023 struct tc_cls_u32_offload *cls)
9025 u32 hdl = cls->knode.handle;
9026 u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9027 u32 loc = cls->knode.handle & 0xfffff;
9029 struct ixgbe_jump_table *jump = NULL;
9031 if (loc > IXGBE_MAX_HW_ENTRIES)
9034 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9037 /* Clear this filter in the link data it is associated with */
9038 if (uhtid != 0x800) {
9039 jump = adapter->jump_tables[uhtid];
9042 if (!test_bit(loc - 1, jump->child_loc_map))
9044 clear_bit(loc - 1, jump->child_loc_map);
9047 /* Check if the filter being deleted is a link */
9048 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9049 jump = adapter->jump_tables[i];
9050 if (jump && jump->link_hdl == hdl) {
9051 /* Delete filters in the hardware in the child hash
9052 * table associated with this link
9054 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9055 if (!test_bit(j, jump->child_loc_map))
9057 spin_lock(&adapter->fdir_perfect_lock);
9058 err = ixgbe_update_ethtool_fdir_entry(adapter,
9061 spin_unlock(&adapter->fdir_perfect_lock);
9062 clear_bit(j, jump->child_loc_map);
9064 /* Remove resources for this link */
9068 adapter->jump_tables[i] = NULL;
9073 spin_lock(&adapter->fdir_perfect_lock);
9074 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9075 spin_unlock(&adapter->fdir_perfect_lock);
9079 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9080 struct tc_cls_u32_offload *cls)
9082 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9084 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9087 /* This ixgbe devices do not support hash tables at the moment
9088 * so abort when given hash tables.
9090 if (cls->hnode.divisor > 0)
9093 set_bit(uhtid - 1, &adapter->tables);
9097 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9098 struct tc_cls_u32_offload *cls)
9100 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9102 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9105 clear_bit(uhtid - 1, &adapter->tables);
9109 #ifdef CONFIG_NET_CLS_ACT
9110 struct upper_walk_data {
9111 struct ixgbe_adapter *adapter;
9117 static int get_macvlan_queue(struct net_device *upper, void *_data)
9119 if (netif_is_macvlan(upper)) {
9120 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9121 struct upper_walk_data *data = _data;
9122 struct ixgbe_adapter *adapter = data->adapter;
9123 int ifindex = data->ifindex;
9125 if (vadapter && upper->ifindex == ifindex) {
9126 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9127 data->action = data->queue;
9135 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9136 u8 *queue, u64 *action)
9138 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9139 unsigned int num_vfs = adapter->num_vfs, vf;
9140 struct upper_walk_data data;
9141 struct net_device *upper;
9143 /* redirect to a SRIOV VF */
9144 for (vf = 0; vf < num_vfs; ++vf) {
9145 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9146 if (upper->ifindex == ifindex) {
9147 *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9149 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9154 /* redirect to a offloaded macvlan netdev */
9155 data.adapter = adapter;
9156 data.ifindex = ifindex;
9159 if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9160 get_macvlan_queue, &data)) {
9161 *action = data.action;
9162 *queue = data.queue;
9170 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9171 struct tcf_exts *exts, u64 *action, u8 *queue)
9173 const struct tc_action *a;
9176 if (!tcf_exts_has_actions(exts))
9179 tcf_exts_to_list(exts, &actions);
9180 list_for_each_entry(a, &actions, list) {
9183 if (is_tcf_gact_shot(a)) {
9184 *action = IXGBE_FDIR_DROP_QUEUE;
9185 *queue = IXGBE_FDIR_DROP_QUEUE;
9189 /* Redirect to a VF or a offloaded macvlan */
9190 if (is_tcf_mirred_egress_redirect(a)) {
9191 struct net_device *dev = tcf_mirred_dev(a);
9195 return handle_redirect_action(adapter, dev->ifindex,
9205 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9206 struct tcf_exts *exts, u64 *action, u8 *queue)
9210 #endif /* CONFIG_NET_CLS_ACT */
9212 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9213 union ixgbe_atr_input *mask,
9214 struct tc_cls_u32_offload *cls,
9215 struct ixgbe_mat_field *field_ptr,
9216 struct ixgbe_nexthdr *nexthdr)
9220 bool found_entry = false, found_jump_field = false;
9222 for (i = 0; i < cls->knode.sel->nkeys; i++) {
9223 off = cls->knode.sel->keys[i].off;
9224 val = cls->knode.sel->keys[i].val;
9225 m = cls->knode.sel->keys[i].mask;
9227 for (j = 0; field_ptr[j].val; j++) {
9228 if (field_ptr[j].off == off) {
9229 field_ptr[j].val(input, mask, (__force u32)val,
9231 input->filter.formatted.flow_type |=
9238 if (nexthdr->off == cls->knode.sel->keys[i].off &&
9240 (__force u32)cls->knode.sel->keys[i].val &&
9242 (__force u32)cls->knode.sel->keys[i].mask)
9243 found_jump_field = true;
9249 if (nexthdr && !found_jump_field)
9255 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9256 IXGBE_ATR_L4TYPE_MASK;
9258 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9259 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9264 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9265 struct tc_cls_u32_offload *cls)
9267 __be16 protocol = cls->common.protocol;
9268 u32 loc = cls->knode.handle & 0xfffff;
9269 struct ixgbe_hw *hw = &adapter->hw;
9270 struct ixgbe_mat_field *field_ptr;
9271 struct ixgbe_fdir_filter *input = NULL;
9272 union ixgbe_atr_input *mask = NULL;
9273 struct ixgbe_jump_table *jump = NULL;
9274 int i, err = -EINVAL;
9276 u32 uhtid, link_uhtid;
9278 uhtid = TC_U32_USERHTID(cls->knode.handle);
9279 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9281 /* At the moment cls_u32 jumps to network layer and skips past
9282 * L2 headers. The canonical method to match L2 frames is to use
9283 * negative values. However this is error prone at best but really
9284 * just broken because there is no way to "know" what sort of hdr
9285 * is in front of the network layer. Fix cls_u32 to support L2
9286 * headers when needed.
9288 if (protocol != htons(ETH_P_IP))
9291 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9292 e_err(drv, "Location out of range\n");
9296 /* cls u32 is a graph starting at root node 0x800. The driver tracks
9297 * links and also the fields used to advance the parser across each
9298 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9299 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9300 * To add support for new nodes update ixgbe_model.h parse structures
9301 * this function _should_ be generic try not to hardcode values here.
9303 if (uhtid == 0x800) {
9304 field_ptr = (adapter->jump_tables[0])->mat;
9306 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9308 if (!adapter->jump_tables[uhtid])
9310 field_ptr = (adapter->jump_tables[uhtid])->mat;
9316 /* At this point we know the field_ptr is valid and need to either
9317 * build cls_u32 link or attach filter. Because adding a link to
9318 * a handle that does not exist is invalid and the same for adding
9319 * rules to handles that don't exist.
9323 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9325 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9328 if (!test_bit(link_uhtid - 1, &adapter->tables))
9331 /* Multiple filters as links to the same hash table are not
9332 * supported. To add a new filter with the same next header
9333 * but different match/jump conditions, create a new hash table
9336 if (adapter->jump_tables[link_uhtid] &&
9337 (adapter->jump_tables[link_uhtid])->link_hdl) {
9338 e_err(drv, "Link filter exists for link: %x\n",
9343 for (i = 0; nexthdr[i].jump; i++) {
9344 if (nexthdr[i].o != cls->knode.sel->offoff ||
9345 nexthdr[i].s != cls->knode.sel->offshift ||
9347 (__force u32)cls->knode.sel->offmask)
9350 jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9353 input = kzalloc(sizeof(*input), GFP_KERNEL);
9358 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9363 jump->input = input;
9365 jump->link_hdl = cls->knode.handle;
9367 err = ixgbe_clsu32_build_input(input, mask, cls,
9368 field_ptr, &nexthdr[i]);
9370 jump->mat = nexthdr[i].jump;
9371 adapter->jump_tables[link_uhtid] = jump;
9378 input = kzalloc(sizeof(*input), GFP_KERNEL);
9381 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9387 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9388 if ((adapter->jump_tables[uhtid])->input)
9389 memcpy(input, (adapter->jump_tables[uhtid])->input,
9391 if ((adapter->jump_tables[uhtid])->mask)
9392 memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9395 /* Lookup in all child hash tables if this location is already
9396 * filled with a filter
9398 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9399 struct ixgbe_jump_table *link = adapter->jump_tables[i];
9401 if (link && (test_bit(loc - 1, link->child_loc_map))) {
9402 e_err(drv, "Filter exists in location: %x\n",
9409 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9413 err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9418 input->sw_idx = loc;
9420 spin_lock(&adapter->fdir_perfect_lock);
9422 if (hlist_empty(&adapter->fdir_filter_list)) {
9423 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9424 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9426 goto err_out_w_lock;
9427 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9429 goto err_out_w_lock;
9432 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9433 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9434 input->sw_idx, queue);
9436 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9437 spin_unlock(&adapter->fdir_perfect_lock);
9439 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9440 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9445 spin_unlock(&adapter->fdir_perfect_lock);
9455 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9456 struct tc_cls_u32_offload *cls_u32)
9458 switch (cls_u32->command) {
9459 case TC_CLSU32_NEW_KNODE:
9460 case TC_CLSU32_REPLACE_KNODE:
9461 return ixgbe_configure_clsu32(adapter, cls_u32);
9462 case TC_CLSU32_DELETE_KNODE:
9463 return ixgbe_delete_clsu32(adapter, cls_u32);
9464 case TC_CLSU32_NEW_HNODE:
9465 case TC_CLSU32_REPLACE_HNODE:
9466 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9467 case TC_CLSU32_DELETE_HNODE:
9468 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9474 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9477 struct ixgbe_adapter *adapter = cb_priv;
9479 if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9483 case TC_SETUP_CLSU32:
9484 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9490 static int ixgbe_setup_tc_block(struct net_device *dev,
9491 struct tc_block_offload *f)
9493 struct ixgbe_adapter *adapter = netdev_priv(dev);
9495 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9498 switch (f->command) {
9500 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9501 adapter, adapter, f->extack);
9502 case TC_BLOCK_UNBIND:
9503 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9511 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9512 struct tc_mqprio_qopt *mqprio)
9514 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9515 return ixgbe_setup_tc(dev, mqprio->num_tc);
9518 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9522 case TC_SETUP_BLOCK:
9523 return ixgbe_setup_tc_block(dev, type_data);
9524 case TC_SETUP_QDISC_MQPRIO:
9525 return ixgbe_setup_tc_mqprio(dev, type_data);
9531 #ifdef CONFIG_PCI_IOV
9532 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9534 struct net_device *netdev = adapter->netdev;
9537 ixgbe_setup_tc(netdev, adapter->hw_tcs);
9542 void ixgbe_do_reset(struct net_device *netdev)
9544 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9546 if (netif_running(netdev))
9547 ixgbe_reinit_locked(adapter);
9549 ixgbe_reset(adapter);
9552 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9553 netdev_features_t features)
9555 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9557 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9558 if (!(features & NETIF_F_RXCSUM))
9559 features &= ~NETIF_F_LRO;
9561 /* Turn off LRO if not RSC capable */
9562 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9563 features &= ~NETIF_F_LRO;
9565 if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9566 e_dev_err("LRO is not supported with XDP\n");
9567 features &= ~NETIF_F_LRO;
9573 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9575 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9578 /* go back to full RSS if we're not running SR-IOV */
9579 if (!adapter->ring_feature[RING_F_VMDQ].offset)
9580 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9581 IXGBE_FLAG_SRIOV_ENABLED);
9583 adapter->ring_feature[RING_F_RSS].limit = rss;
9584 adapter->ring_feature[RING_F_VMDQ].limit = 1;
9586 ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9589 static int ixgbe_set_features(struct net_device *netdev,
9590 netdev_features_t features)
9592 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9593 netdev_features_t changed = netdev->features ^ features;
9594 bool need_reset = false;
9596 /* Make sure RSC matches LRO, reset if change */
9597 if (!(features & NETIF_F_LRO)) {
9598 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9600 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9601 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9602 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9603 if (adapter->rx_itr_setting == 1 ||
9604 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9605 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9607 } else if ((changed ^ features) & NETIF_F_LRO) {
9608 e_info(probe, "rx-usecs set too low, "
9614 * Check if Flow Director n-tuple support or hw_tc support was
9615 * enabled or disabled. If the state changed, we need to reset.
9617 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9618 /* turn off ATR, enable perfect filters and reset */
9619 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9622 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9623 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9625 /* turn off perfect filters, enable ATR and reset */
9626 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9629 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9631 /* We cannot enable ATR if SR-IOV is enabled */
9632 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9633 /* We cannot enable ATR if we have 2 or more tcs */
9634 (adapter->hw_tcs > 1) ||
9635 /* We cannot enable ATR if RSS is disabled */
9636 (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9637 /* A sample rate of 0 indicates ATR disabled */
9638 (!adapter->atr_sample_rate))
9639 ; /* do nothing not supported */
9640 else /* otherwise supported and set the flag */
9641 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9644 if (changed & NETIF_F_RXALL)
9647 netdev->features = features;
9649 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9650 if (features & NETIF_F_RXCSUM) {
9651 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9653 u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9655 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9659 if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9660 if (features & NETIF_F_RXCSUM) {
9661 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9663 u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9665 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9669 if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9670 ixgbe_reset_l2fw_offload(adapter);
9671 else if (need_reset)
9672 ixgbe_do_reset(netdev);
9673 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9674 NETIF_F_HW_VLAN_CTAG_FILTER))
9675 ixgbe_set_rx_mode(netdev);
9681 * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9682 * @dev: The port's netdev
9683 * @ti: Tunnel endpoint information
9685 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9686 struct udp_tunnel_info *ti)
9688 struct ixgbe_adapter *adapter = netdev_priv(dev);
9689 struct ixgbe_hw *hw = &adapter->hw;
9690 __be16 port = ti->port;
9694 if (ti->sa_family != AF_INET)
9698 case UDP_TUNNEL_TYPE_VXLAN:
9699 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9702 if (adapter->vxlan_port == port)
9705 if (adapter->vxlan_port) {
9707 "VXLAN port %d set, not adding port %d\n",
9708 ntohs(adapter->vxlan_port),
9713 adapter->vxlan_port = port;
9715 case UDP_TUNNEL_TYPE_GENEVE:
9716 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9719 if (adapter->geneve_port == port)
9722 if (adapter->geneve_port) {
9724 "GENEVE port %d set, not adding port %d\n",
9725 ntohs(adapter->geneve_port),
9730 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9731 adapter->geneve_port = port;
9737 reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9738 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9742 * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9743 * @dev: The port's netdev
9744 * @ti: Tunnel endpoint information
9746 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9747 struct udp_tunnel_info *ti)
9749 struct ixgbe_adapter *adapter = netdev_priv(dev);
9752 if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9753 ti->type != UDP_TUNNEL_TYPE_GENEVE)
9756 if (ti->sa_family != AF_INET)
9760 case UDP_TUNNEL_TYPE_VXLAN:
9761 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9764 if (adapter->vxlan_port != ti->port) {
9765 netdev_info(dev, "VXLAN port %d not found\n",
9770 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9772 case UDP_TUNNEL_TYPE_GENEVE:
9773 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9776 if (adapter->geneve_port != ti->port) {
9777 netdev_info(dev, "GENEVE port %d not found\n",
9782 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9788 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9789 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9792 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9793 struct net_device *dev,
9794 const unsigned char *addr, u16 vid,
9797 /* guarantee we can provide a unique filter for the unicast address */
9798 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9799 struct ixgbe_adapter *adapter = netdev_priv(dev);
9800 u16 pool = VMDQ_P(0);
9802 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9806 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9810 * ixgbe_configure_bridge_mode - set various bridge modes
9811 * @adapter: the private structure
9812 * @mode: requested bridge mode
9814 * Configure some settings require for various bridge modes.
9816 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9819 struct ixgbe_hw *hw = &adapter->hw;
9820 unsigned int p, num_pools;
9824 case BRIDGE_MODE_VEPA:
9825 /* disable Tx loopback, rely on switch hairpin mode */
9826 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9828 /* must enable Rx switching replication to allow multicast
9829 * packet reception on all VFs, and to enable source address
9832 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9833 vmdctl |= IXGBE_VT_CTL_REPLEN;
9834 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9836 /* enable Rx source address pruning. Note, this requires
9837 * replication to be enabled or else it does nothing.
9839 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9840 for (p = 0; p < num_pools; p++) {
9841 if (hw->mac.ops.set_source_address_pruning)
9842 hw->mac.ops.set_source_address_pruning(hw,
9847 case BRIDGE_MODE_VEB:
9848 /* enable Tx loopback for internal VF/PF communication */
9849 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9850 IXGBE_PFDTXGSWC_VT_LBEN);
9852 /* disable Rx switching replication unless we have SR-IOV
9855 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9856 if (!adapter->num_vfs)
9857 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9858 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9860 /* disable Rx source address pruning, since we don't expect to
9861 * be receiving external loopback of our transmitted frames.
9863 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9864 for (p = 0; p < num_pools; p++) {
9865 if (hw->mac.ops.set_source_address_pruning)
9866 hw->mac.ops.set_source_address_pruning(hw,
9875 adapter->bridge_mode = mode;
9877 e_info(drv, "enabling bridge mode: %s\n",
9878 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9883 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9884 struct nlmsghdr *nlh, u16 flags)
9886 struct ixgbe_adapter *adapter = netdev_priv(dev);
9887 struct nlattr *attr, *br_spec;
9890 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9893 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9897 nla_for_each_nested(attr, br_spec, rem) {
9901 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9904 if (nla_len(attr) < sizeof(mode))
9907 mode = nla_get_u16(attr);
9908 status = ixgbe_configure_bridge_mode(adapter, mode);
9918 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9919 struct net_device *dev,
9920 u32 filter_mask, int nlflags)
9922 struct ixgbe_adapter *adapter = netdev_priv(dev);
9924 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9927 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9928 adapter->bridge_mode, 0, 0, nlflags,
9932 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9934 struct ixgbe_adapter *adapter = netdev_priv(pdev);
9935 struct ixgbe_fwd_adapter *accel;
9936 int tcs = adapter->hw_tcs ? : 1;
9939 /* The hardware supported by ixgbe only filters on the destination MAC
9940 * address. In order to avoid issues we only support offloading modes
9941 * where the hardware can actually provide the functionality.
9943 if (!macvlan_supports_dest_filter(vdev))
9944 return ERR_PTR(-EMEDIUMTYPE);
9946 /* We need to lock down the macvlan to be a single queue device so that
9947 * we can reuse the tc_to_txq field in the macvlan netdev to represent
9948 * the queue mapping to our netdev.
9950 if (netif_is_multiqueue(vdev))
9951 return ERR_PTR(-ERANGE);
9953 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9954 if (pool == adapter->num_rx_pools) {
9955 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
9958 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9959 adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9960 adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
9961 return ERR_PTR(-EBUSY);
9963 /* Hardware has a limited number of available pools. Each VF,
9964 * and the PF require a pool. Check to ensure we don't
9965 * attempt to use more then the available number of pools.
9967 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9968 return ERR_PTR(-EBUSY);
9970 /* Enable VMDq flag so device will be set in VM mode */
9971 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
9972 IXGBE_FLAG_SRIOV_ENABLED;
9974 /* Try to reserve as many queues per pool as possible,
9975 * we start with the configurations that support 4 queues
9976 * per pools, followed by 2, and then by just 1 per pool.
9978 if (used_pools < 32 && adapter->num_rx_pools < 16)
9979 reserved_pools = min_t(u16,
9981 16 - adapter->num_rx_pools);
9982 else if (adapter->num_rx_pools < 32)
9983 reserved_pools = min_t(u16,
9985 32 - adapter->num_rx_pools);
9987 reserved_pools = 64 - used_pools;
9990 if (!reserved_pools)
9991 return ERR_PTR(-EBUSY);
9993 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
9995 /* Force reinit of ring allocation with VMDQ enabled */
9996 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
9998 return ERR_PTR(err);
10000 if (pool >= adapter->num_rx_pools)
10001 return ERR_PTR(-ENOMEM);
10004 accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10006 return ERR_PTR(-ENOMEM);
10008 set_bit(pool, adapter->fwd_bitmask);
10009 netdev_set_sb_channel(vdev, pool);
10010 accel->pool = pool;
10011 accel->netdev = vdev;
10013 if (!netif_running(pdev))
10016 err = ixgbe_fwd_ring_up(adapter, accel);
10018 return ERR_PTR(err);
10023 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10025 struct ixgbe_fwd_adapter *accel = priv;
10026 struct ixgbe_adapter *adapter = netdev_priv(pdev);
10027 unsigned int rxbase = accel->rx_base_queue;
10030 /* delete unicast filter associated with offloaded interface */
10031 ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10032 VMDQ_P(accel->pool));
10034 /* Allow remaining Rx packets to get flushed out of the
10035 * Rx FIFO before we drop the netdev for the ring.
10037 usleep_range(10000, 20000);
10039 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10040 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10041 struct ixgbe_q_vector *qv = ring->q_vector;
10043 /* Make sure we aren't processing any packets and clear
10044 * netdev to shut down the ring.
10046 if (netif_running(adapter->netdev))
10047 napi_synchronize(&qv->napi);
10048 ring->netdev = NULL;
10051 /* unbind the queues and drop the subordinate channel config */
10052 netdev_unbind_sb_channel(pdev, accel->netdev);
10053 netdev_set_sb_channel(accel->netdev, 0);
10055 clear_bit(accel->pool, adapter->fwd_bitmask);
10059 #define IXGBE_MAX_MAC_HDR_LEN 127
10060 #define IXGBE_MAX_NETWORK_HDR_LEN 511
10062 static netdev_features_t
10063 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10064 netdev_features_t features)
10066 unsigned int network_hdr_len, mac_hdr_len;
10068 /* Make certain the headers can be described by a context descriptor */
10069 mac_hdr_len = skb_network_header(skb) - skb->data;
10070 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10071 return features & ~(NETIF_F_HW_CSUM |
10073 NETIF_F_HW_VLAN_CTAG_TX |
10077 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10078 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN))
10079 return features & ~(NETIF_F_HW_CSUM |
10084 /* We can only support IPV4 TSO in tunnels if we can mangle the
10085 * inner IP ID field, so strip TSO if MANGLEID is not supported.
10086 * IPsec offoad sets skb->encapsulation but still can handle
10087 * the TSO, so it's the exception.
10089 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10090 #ifdef CONFIG_XFRM_OFFLOAD
10093 features &= ~NETIF_F_TSO;
10099 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10101 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10102 struct ixgbe_adapter *adapter = netdev_priv(dev);
10103 struct bpf_prog *old_prog;
10105 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10108 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10111 /* verify ixgbe ring attributes are sufficient for XDP */
10112 for (i = 0; i < adapter->num_rx_queues; i++) {
10113 struct ixgbe_ring *ring = adapter->rx_ring[i];
10115 if (ring_is_rsc_enabled(ring))
10118 if (frame_size > ixgbe_rx_bufsz(ring))
10122 if (nr_cpu_ids > MAX_XDP_QUEUES)
10125 old_prog = xchg(&adapter->xdp_prog, prog);
10127 /* If transitioning XDP modes reconfigure rings */
10128 if (!!prog != !!old_prog) {
10129 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10132 rcu_assign_pointer(adapter->xdp_prog, old_prog);
10136 for (i = 0; i < adapter->num_rx_queues; i++)
10137 (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10138 adapter->xdp_prog);
10142 bpf_prog_put(old_prog);
10147 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10149 struct ixgbe_adapter *adapter = netdev_priv(dev);
10151 switch (xdp->command) {
10152 case XDP_SETUP_PROG:
10153 return ixgbe_xdp_setup(dev, xdp->prog);
10154 case XDP_QUERY_PROG:
10155 xdp->prog_id = adapter->xdp_prog ?
10156 adapter->xdp_prog->aux->id : 0;
10163 static void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10165 /* Force memory writes to complete before letting h/w know there
10166 * are new descriptors to fetch.
10169 writel(ring->next_to_use, ring->tail);
10172 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10173 struct xdp_frame **frames, u32 flags)
10175 struct ixgbe_adapter *adapter = netdev_priv(dev);
10176 struct ixgbe_ring *ring;
10180 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10183 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10186 /* During program transitions its possible adapter->xdp_prog is assigned
10187 * but ring has not been configured yet. In this case simply abort xmit.
10189 ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10190 if (unlikely(!ring))
10193 for (i = 0; i < n; i++) {
10194 struct xdp_frame *xdpf = frames[i];
10197 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10198 if (err != IXGBE_XDP_TX) {
10199 xdp_return_frame_rx_napi(xdpf);
10204 if (unlikely(flags & XDP_XMIT_FLUSH))
10205 ixgbe_xdp_ring_update_tail(ring);
10210 static const struct net_device_ops ixgbe_netdev_ops = {
10211 .ndo_open = ixgbe_open,
10212 .ndo_stop = ixgbe_close,
10213 .ndo_start_xmit = ixgbe_xmit_frame,
10214 .ndo_set_rx_mode = ixgbe_set_rx_mode,
10215 .ndo_validate_addr = eth_validate_addr,
10216 .ndo_set_mac_address = ixgbe_set_mac,
10217 .ndo_change_mtu = ixgbe_change_mtu,
10218 .ndo_tx_timeout = ixgbe_tx_timeout,
10219 .ndo_set_tx_maxrate = ixgbe_tx_maxrate,
10220 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
10221 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
10222 .ndo_do_ioctl = ixgbe_ioctl,
10223 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
10224 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
10225 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
10226 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
10227 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10228 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
10229 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
10230 .ndo_get_stats64 = ixgbe_get_stats64,
10231 .ndo_setup_tc = __ixgbe_setup_tc,
10232 #ifdef CONFIG_NET_POLL_CONTROLLER
10233 .ndo_poll_controller = ixgbe_netpoll,
10236 .ndo_select_queue = ixgbe_select_queue,
10237 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10238 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10239 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10240 .ndo_fcoe_enable = ixgbe_fcoe_enable,
10241 .ndo_fcoe_disable = ixgbe_fcoe_disable,
10242 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10243 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10244 #endif /* IXGBE_FCOE */
10245 .ndo_set_features = ixgbe_set_features,
10246 .ndo_fix_features = ixgbe_fix_features,
10247 .ndo_fdb_add = ixgbe_ndo_fdb_add,
10248 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
10249 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
10250 .ndo_dfwd_add_station = ixgbe_fwd_add,
10251 .ndo_dfwd_del_station = ixgbe_fwd_del,
10252 .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port,
10253 .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port,
10254 .ndo_features_check = ixgbe_features_check,
10255 .ndo_bpf = ixgbe_xdp,
10256 .ndo_xdp_xmit = ixgbe_xdp_xmit,
10260 * ixgbe_enumerate_functions - Get the number of ports this device has
10261 * @adapter: adapter structure
10263 * This function enumerates the phsyical functions co-located on a single slot,
10264 * in order to determine how many ports a device has. This is most useful in
10265 * determining the required GT/s of PCIe bandwidth necessary for optimal
10268 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10270 struct pci_dev *entry, *pdev = adapter->pdev;
10273 /* Some cards can not use the generic count PCIe functions method,
10274 * because they are behind a parent switch, so we hardcode these with
10275 * the correct number of functions.
10277 if (ixgbe_pcie_from_parent(&adapter->hw))
10280 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10281 /* don't count virtual functions */
10282 if (entry->is_virtfn)
10285 /* When the devices on the bus don't all match our device ID,
10286 * we can't reliably determine the correct number of
10287 * functions. This can occur if a function has been direct
10288 * attached to a virtual machine using VT-d, for example. In
10289 * this case, simply return -1 to indicate this.
10291 if ((entry->vendor != pdev->vendor) ||
10292 (entry->device != pdev->device))
10302 * ixgbe_wol_supported - Check whether device supports WoL
10303 * @adapter: the adapter private structure
10304 * @device_id: the device ID
10305 * @subdevice_id: the subsystem device ID
10307 * This function is used by probe and ethtool to determine
10308 * which devices have WoL support
10311 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10314 struct ixgbe_hw *hw = &adapter->hw;
10315 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10317 /* WOL not supported on 82598 */
10318 if (hw->mac.type == ixgbe_mac_82598EB)
10321 /* check eeprom to see if WOL is enabled for X540 and newer */
10322 if (hw->mac.type >= ixgbe_mac_X540) {
10323 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10324 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10325 (hw->bus.func == 0)))
10329 /* WOL is determined based on device IDs for 82599 MACs */
10330 switch (device_id) {
10331 case IXGBE_DEV_ID_82599_SFP:
10332 /* Only these subdevices could supports WOL */
10333 switch (subdevice_id) {
10334 case IXGBE_SUBDEV_ID_82599_560FLR:
10335 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10336 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10337 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10338 /* only support first port */
10339 if (hw->bus.func != 0)
10342 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10343 case IXGBE_SUBDEV_ID_82599_SFP:
10344 case IXGBE_SUBDEV_ID_82599_RNDC:
10345 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10346 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10347 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10348 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10352 case IXGBE_DEV_ID_82599EN_SFP:
10353 /* Only these subdevices support WOL */
10354 switch (subdevice_id) {
10355 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10359 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10360 /* All except this subdevice support WOL */
10361 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10364 case IXGBE_DEV_ID_82599_KX4:
10374 * ixgbe_set_fw_version - Set FW version
10375 * @adapter: the adapter private structure
10377 * This function is used by probe and ethtool to determine the FW version to
10378 * format to display. The FW version is taken from the EEPROM/NVM.
10380 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10382 struct ixgbe_hw *hw = &adapter->hw;
10383 struct ixgbe_nvm_version nvm_ver;
10385 ixgbe_get_oem_prod_version(hw, &nvm_ver);
10386 if (nvm_ver.oem_valid) {
10387 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10388 "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10389 nvm_ver.oem_release);
10393 ixgbe_get_etk_id(hw, &nvm_ver);
10394 ixgbe_get_orom_version(hw, &nvm_ver);
10396 if (nvm_ver.or_valid) {
10397 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10398 "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10399 nvm_ver.or_build, nvm_ver.or_patch);
10403 /* Set ETrack ID format */
10404 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10405 "0x%08x", nvm_ver.etk_id);
10409 * ixgbe_probe - Device Initialization Routine
10410 * @pdev: PCI device information struct
10411 * @ent: entry in ixgbe_pci_tbl
10413 * Returns 0 on success, negative on failure
10415 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10416 * The OS initialization, configuring of the adapter private structure,
10417 * and a hardware reset occur.
10419 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10421 struct net_device *netdev;
10422 struct ixgbe_adapter *adapter = NULL;
10423 struct ixgbe_hw *hw;
10424 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10425 int i, err, pci_using_dac, expected_gts;
10426 unsigned int indices = MAX_TX_QUEUES;
10427 u8 part_str[IXGBE_PBANUM_LENGTH];
10428 bool disable_dev = false;
10434 /* Catch broken hardware that put the wrong VF device ID in
10435 * the PCIe SR-IOV capability.
10437 if (pdev->is_virtfn) {
10438 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10439 pci_name(pdev), pdev->vendor, pdev->device);
10443 err = pci_enable_device_mem(pdev);
10447 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10450 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10452 dev_err(&pdev->dev,
10453 "No usable DMA configuration, aborting\n");
10459 err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10461 dev_err(&pdev->dev,
10462 "pci_request_selected_regions failed 0x%x\n", err);
10466 pci_enable_pcie_error_reporting(pdev);
10468 pci_set_master(pdev);
10469 pci_save_state(pdev);
10471 if (ii->mac == ixgbe_mac_82598EB) {
10472 #ifdef CONFIG_IXGBE_DCB
10473 /* 8 TC w/ 4 queues per TC */
10474 indices = 4 * MAX_TRAFFIC_CLASS;
10476 indices = IXGBE_MAX_RSS_INDICES;
10480 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10483 goto err_alloc_etherdev;
10486 SET_NETDEV_DEV(netdev, &pdev->dev);
10488 adapter = netdev_priv(netdev);
10490 adapter->netdev = netdev;
10491 adapter->pdev = pdev;
10493 hw->back = adapter;
10494 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10496 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10497 pci_resource_len(pdev, 0));
10498 adapter->io_addr = hw->hw_addr;
10499 if (!hw->hw_addr) {
10504 netdev->netdev_ops = &ixgbe_netdev_ops;
10505 ixgbe_set_ethtool_ops(netdev);
10506 netdev->watchdog_timeo = 5 * HZ;
10507 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10510 hw->mac.ops = *ii->mac_ops;
10511 hw->mac.type = ii->mac;
10512 hw->mvals = ii->mvals;
10514 hw->link.ops = *ii->link_ops;
10517 hw->eeprom.ops = *ii->eeprom_ops;
10518 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10519 if (ixgbe_removed(hw->hw_addr)) {
10523 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10524 if (!(eec & BIT(8)))
10525 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10528 hw->phy.ops = *ii->phy_ops;
10529 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10530 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10531 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10532 hw->phy.mdio.mmds = 0;
10533 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10534 hw->phy.mdio.dev = netdev;
10535 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10536 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10538 /* setup the private structure */
10539 err = ixgbe_sw_init(adapter, ii);
10543 /* Make sure the SWFW semaphore is in a valid state */
10544 if (hw->mac.ops.init_swfw_sync)
10545 hw->mac.ops.init_swfw_sync(hw);
10547 /* Make it possible the adapter to be woken up via WOL */
10548 switch (adapter->hw.mac.type) {
10549 case ixgbe_mac_82599EB:
10550 case ixgbe_mac_X540:
10551 case ixgbe_mac_X550:
10552 case ixgbe_mac_X550EM_x:
10553 case ixgbe_mac_x550em_a:
10554 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10561 * If there is a fan on this device and it has failed log the
10564 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10565 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10566 if (esdp & IXGBE_ESDP_SDP1)
10567 e_crit(probe, "Fan has stopped, replace the adapter\n");
10570 if (allow_unsupported_sfp)
10571 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10573 /* reset_hw fills in the perm_addr as well */
10574 hw->phy.reset_if_overtemp = true;
10575 err = hw->mac.ops.reset_hw(hw);
10576 hw->phy.reset_if_overtemp = false;
10577 ixgbe_set_eee_capable(adapter);
10578 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10580 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10581 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10582 e_dev_err("Reload the driver after installing a supported module.\n");
10585 e_dev_err("HW Init failed: %d\n", err);
10589 #ifdef CONFIG_PCI_IOV
10590 /* SR-IOV not supported on the 82598 */
10591 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10594 ixgbe_init_mbx_params_pf(hw);
10595 hw->mbx.ops = ii->mbx_ops;
10596 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10597 ixgbe_enable_sriov(adapter, max_vfs);
10601 netdev->features = NETIF_F_SG |
10608 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10609 NETIF_F_GSO_GRE_CSUM | \
10610 NETIF_F_GSO_IPXIP4 | \
10611 NETIF_F_GSO_IPXIP6 | \
10612 NETIF_F_GSO_UDP_TUNNEL | \
10613 NETIF_F_GSO_UDP_TUNNEL_CSUM)
10615 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10616 netdev->features |= NETIF_F_GSO_PARTIAL |
10617 IXGBE_GSO_PARTIAL_FEATURES;
10619 if (hw->mac.type >= ixgbe_mac_82599EB)
10620 netdev->features |= NETIF_F_SCTP_CRC;
10622 #ifdef CONFIG_XFRM_OFFLOAD
10623 #define IXGBE_ESP_FEATURES (NETIF_F_HW_ESP | \
10624 NETIF_F_HW_ESP_TX_CSUM | \
10627 if (adapter->ipsec)
10628 netdev->features |= IXGBE_ESP_FEATURES;
10630 /* copy netdev features into list of user selectable features */
10631 netdev->hw_features |= netdev->features |
10632 NETIF_F_HW_VLAN_CTAG_FILTER |
10633 NETIF_F_HW_VLAN_CTAG_RX |
10634 NETIF_F_HW_VLAN_CTAG_TX |
10636 NETIF_F_HW_L2FW_DOFFLOAD;
10638 if (hw->mac.type >= ixgbe_mac_82599EB)
10639 netdev->hw_features |= NETIF_F_NTUPLE |
10643 netdev->features |= NETIF_F_HIGHDMA;
10645 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10646 netdev->hw_enc_features |= netdev->vlan_features;
10647 netdev->mpls_features |= NETIF_F_SG |
10651 netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10653 /* set this bit last since it cannot be part of vlan_features */
10654 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10655 NETIF_F_HW_VLAN_CTAG_RX |
10656 NETIF_F_HW_VLAN_CTAG_TX;
10658 netdev->priv_flags |= IFF_UNICAST_FLT;
10659 netdev->priv_flags |= IFF_SUPP_NOFCS;
10661 /* MTU range: 68 - 9710 */
10662 netdev->min_mtu = ETH_MIN_MTU;
10663 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10665 #ifdef CONFIG_IXGBE_DCB
10666 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10667 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10671 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10672 unsigned int fcoe_l;
10674 if (hw->mac.ops.get_device_caps) {
10675 hw->mac.ops.get_device_caps(hw, &device_caps);
10676 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10677 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10681 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10682 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10684 netdev->features |= NETIF_F_FSO |
10687 netdev->vlan_features |= NETIF_F_FSO |
10691 #endif /* IXGBE_FCOE */
10692 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10693 netdev->hw_features |= NETIF_F_LRO;
10694 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10695 netdev->features |= NETIF_F_LRO;
10697 /* make sure the EEPROM is good */
10698 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10699 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10704 eth_platform_get_mac_address(&adapter->pdev->dev,
10705 adapter->hw.mac.perm_addr);
10707 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10709 if (!is_valid_ether_addr(netdev->dev_addr)) {
10710 e_dev_err("invalid MAC address\n");
10715 /* Set hw->mac.addr to permanent MAC address */
10716 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10717 ixgbe_mac_set_default_filter(adapter);
10719 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10721 if (ixgbe_removed(hw->hw_addr)) {
10725 INIT_WORK(&adapter->service_task, ixgbe_service_task);
10726 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10727 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10729 err = ixgbe_init_interrupt_scheme(adapter);
10733 for (i = 0; i < adapter->num_rx_queues; i++)
10734 u64_stats_init(&adapter->rx_ring[i]->syncp);
10735 for (i = 0; i < adapter->num_tx_queues; i++)
10736 u64_stats_init(&adapter->tx_ring[i]->syncp);
10737 for (i = 0; i < adapter->num_xdp_queues; i++)
10738 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10740 /* WOL not supported for all devices */
10742 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10743 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10744 pdev->subsystem_device);
10745 if (hw->wol_enabled)
10746 adapter->wol = IXGBE_WUFC_MAG;
10748 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10750 /* save off EEPROM version number */
10751 ixgbe_set_fw_version(adapter);
10753 /* pick up the PCI bus settings for reporting later */
10754 if (ixgbe_pcie_from_parent(hw))
10755 ixgbe_get_parent_bus_info(adapter);
10757 hw->mac.ops.get_bus_info(hw);
10759 /* calculate the expected PCIe bandwidth required for optimal
10760 * performance. Note that some older parts will never have enough
10761 * bandwidth due to being older generation PCIe parts. We clamp these
10762 * parts to ensure no warning is displayed if it can't be fixed.
10764 switch (hw->mac.type) {
10765 case ixgbe_mac_82598EB:
10766 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10769 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10773 /* don't check link if we failed to enumerate functions */
10774 if (expected_gts > 0)
10775 ixgbe_check_minimum_link(adapter, expected_gts);
10777 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10779 strlcpy(part_str, "Unknown", sizeof(part_str));
10780 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10781 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10782 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10785 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10786 hw->mac.type, hw->phy.type, part_str);
10788 e_dev_info("%pM\n", netdev->dev_addr);
10790 /* reset the hardware with the new settings */
10791 err = hw->mac.ops.start_hw(hw);
10792 if (err == IXGBE_ERR_EEPROM_VERSION) {
10793 /* We are running on a pre-production device, log a warning */
10794 e_dev_warn("This device is a pre-production adapter/LOM. "
10795 "Please be aware there may be issues associated "
10796 "with your hardware. If you are experiencing "
10797 "problems please contact your Intel or hardware "
10798 "representative who provided you with this "
10801 strcpy(netdev->name, "eth%d");
10802 pci_set_drvdata(pdev, adapter);
10803 err = register_netdev(netdev);
10808 /* power down the optics for 82599 SFP+ fiber */
10809 if (hw->mac.ops.disable_tx_laser)
10810 hw->mac.ops.disable_tx_laser(hw);
10812 /* carrier off reporting is important to ethtool even BEFORE open */
10813 netif_carrier_off(netdev);
10815 #ifdef CONFIG_IXGBE_DCA
10816 if (dca_add_requester(&pdev->dev) == 0) {
10817 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10818 ixgbe_setup_dca(adapter);
10821 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10822 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10823 for (i = 0; i < adapter->num_vfs; i++)
10824 ixgbe_vf_configuration(pdev, (i | 0x10000000));
10827 /* firmware requires driver version to be 0xFFFFFFFF
10828 * since os does not support feature
10830 if (hw->mac.ops.set_fw_drv_ver)
10831 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
10832 sizeof(ixgbe_driver_version) - 1,
10833 ixgbe_driver_version);
10835 /* add san mac addr to netdev */
10836 ixgbe_add_sanmac_netdev(netdev);
10838 e_dev_info("%s\n", ixgbe_default_device_descr);
10840 #ifdef CONFIG_IXGBE_HWMON
10841 if (ixgbe_sysfs_init(adapter))
10842 e_err(probe, "failed to allocate sysfs resources\n");
10843 #endif /* CONFIG_IXGBE_HWMON */
10845 ixgbe_dbg_adapter_init(adapter);
10847 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
10848 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
10849 hw->mac.ops.setup_link(hw,
10850 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
10856 ixgbe_release_hw_control(adapter);
10857 ixgbe_clear_interrupt_scheme(adapter);
10859 ixgbe_disable_sriov(adapter);
10860 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
10861 iounmap(adapter->io_addr);
10862 kfree(adapter->jump_tables[0]);
10863 kfree(adapter->mac_table);
10864 kfree(adapter->rss_key);
10866 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10867 free_netdev(netdev);
10868 err_alloc_etherdev:
10869 pci_release_mem_regions(pdev);
10872 if (!adapter || disable_dev)
10873 pci_disable_device(pdev);
10878 * ixgbe_remove - Device Removal Routine
10879 * @pdev: PCI device information struct
10881 * ixgbe_remove is called by the PCI subsystem to alert the driver
10882 * that it should release a PCI device. The could be caused by a
10883 * Hot-Plug event, or because the driver is going to be removed from
10886 static void ixgbe_remove(struct pci_dev *pdev)
10888 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10889 struct net_device *netdev;
10893 /* if !adapter then we already cleaned up in probe */
10897 netdev = adapter->netdev;
10898 ixgbe_dbg_adapter_exit(adapter);
10900 set_bit(__IXGBE_REMOVING, &adapter->state);
10901 cancel_work_sync(&adapter->service_task);
10904 #ifdef CONFIG_IXGBE_DCA
10905 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
10906 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
10907 dca_remove_requester(&pdev->dev);
10908 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
10909 IXGBE_DCA_CTRL_DCA_DISABLE);
10913 #ifdef CONFIG_IXGBE_HWMON
10914 ixgbe_sysfs_exit(adapter);
10915 #endif /* CONFIG_IXGBE_HWMON */
10917 /* remove the added san mac */
10918 ixgbe_del_sanmac_netdev(netdev);
10920 #ifdef CONFIG_PCI_IOV
10921 ixgbe_disable_sriov(adapter);
10923 if (netdev->reg_state == NETREG_REGISTERED)
10924 unregister_netdev(netdev);
10926 ixgbe_stop_ipsec_offload(adapter);
10927 ixgbe_clear_interrupt_scheme(adapter);
10929 ixgbe_release_hw_control(adapter);
10932 kfree(adapter->ixgbe_ieee_pfc);
10933 kfree(adapter->ixgbe_ieee_ets);
10936 iounmap(adapter->io_addr);
10937 pci_release_mem_regions(pdev);
10939 e_dev_info("complete\n");
10941 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
10942 if (adapter->jump_tables[i]) {
10943 kfree(adapter->jump_tables[i]->input);
10944 kfree(adapter->jump_tables[i]->mask);
10946 kfree(adapter->jump_tables[i]);
10949 kfree(adapter->mac_table);
10950 kfree(adapter->rss_key);
10951 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
10952 free_netdev(netdev);
10954 pci_disable_pcie_error_reporting(pdev);
10957 pci_disable_device(pdev);
10961 * ixgbe_io_error_detected - called when PCI error is detected
10962 * @pdev: Pointer to PCI device
10963 * @state: The current pci connection state
10965 * This function is called after a PCI bus error affecting
10966 * this device has been detected.
10968 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
10969 pci_channel_state_t state)
10971 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
10972 struct net_device *netdev = adapter->netdev;
10974 #ifdef CONFIG_PCI_IOV
10975 struct ixgbe_hw *hw = &adapter->hw;
10976 struct pci_dev *bdev, *vfdev;
10977 u32 dw0, dw1, dw2, dw3;
10979 u16 req_id, pf_func;
10981 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
10982 adapter->num_vfs == 0)
10983 goto skip_bad_vf_detection;
10985 bdev = pdev->bus->self;
10986 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
10987 bdev = bdev->bus->self;
10990 goto skip_bad_vf_detection;
10992 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
10994 goto skip_bad_vf_detection;
10996 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
10997 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
10998 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
10999 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11000 if (ixgbe_removed(hw->hw_addr))
11001 goto skip_bad_vf_detection;
11003 req_id = dw1 >> 16;
11004 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11005 if (!(req_id & 0x0080))
11006 goto skip_bad_vf_detection;
11008 pf_func = req_id & 0x01;
11009 if ((pf_func & 1) == (pdev->devfn & 1)) {
11010 unsigned int device_id;
11012 vf = (req_id & 0x7F) >> 1;
11013 e_dev_err("VF %d has caused a PCIe error\n", vf);
11014 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11015 "%8.8x\tdw3: %8.8x\n",
11016 dw0, dw1, dw2, dw3);
11017 switch (adapter->hw.mac.type) {
11018 case ixgbe_mac_82599EB:
11019 device_id = IXGBE_82599_VF_DEVICE_ID;
11021 case ixgbe_mac_X540:
11022 device_id = IXGBE_X540_VF_DEVICE_ID;
11024 case ixgbe_mac_X550:
11025 device_id = IXGBE_DEV_ID_X550_VF;
11027 case ixgbe_mac_X550EM_x:
11028 device_id = IXGBE_DEV_ID_X550EM_X_VF;
11030 case ixgbe_mac_x550em_a:
11031 device_id = IXGBE_DEV_ID_X550EM_A_VF;
11038 /* Find the pci device of the offending VF */
11039 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11041 if (vfdev->devfn == (req_id & 0xFF))
11043 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11047 * There's a slim chance the VF could have been hot plugged,
11048 * so if it is no longer present we don't need to issue the
11049 * VFLR. Just clean up the AER in that case.
11053 /* Free device reference count */
11054 pci_dev_put(vfdev);
11057 pci_cleanup_aer_uncorrect_error_status(pdev);
11061 * Even though the error may have occurred on the other port
11062 * we still need to increment the vf error reference count for
11063 * both ports because the I/O resume function will be called
11064 * for both of them.
11066 adapter->vferr_refcount++;
11068 return PCI_ERS_RESULT_RECOVERED;
11070 skip_bad_vf_detection:
11071 #endif /* CONFIG_PCI_IOV */
11072 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11073 return PCI_ERS_RESULT_DISCONNECT;
11075 if (!netif_device_present(netdev))
11076 return PCI_ERS_RESULT_DISCONNECT;
11079 netif_device_detach(netdev);
11081 if (netif_running(netdev))
11082 ixgbe_close_suspend(adapter);
11084 if (state == pci_channel_io_perm_failure) {
11086 return PCI_ERS_RESULT_DISCONNECT;
11089 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11090 pci_disable_device(pdev);
11093 /* Request a slot reset. */
11094 return PCI_ERS_RESULT_NEED_RESET;
11098 * ixgbe_io_slot_reset - called after the pci bus has been reset.
11099 * @pdev: Pointer to PCI device
11101 * Restart the card from scratch, as if from a cold-boot.
11103 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11105 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11106 pci_ers_result_t result;
11109 if (pci_enable_device_mem(pdev)) {
11110 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11111 result = PCI_ERS_RESULT_DISCONNECT;
11113 smp_mb__before_atomic();
11114 clear_bit(__IXGBE_DISABLED, &adapter->state);
11115 adapter->hw.hw_addr = adapter->io_addr;
11116 pci_set_master(pdev);
11117 pci_restore_state(pdev);
11118 pci_save_state(pdev);
11120 pci_wake_from_d3(pdev, false);
11122 ixgbe_reset(adapter);
11123 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11124 result = PCI_ERS_RESULT_RECOVERED;
11127 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11129 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
11130 "failed 0x%0x\n", err);
11131 /* non-fatal, continue */
11138 * ixgbe_io_resume - called when traffic can start flowing again.
11139 * @pdev: Pointer to PCI device
11141 * This callback is called when the error recovery driver tells us that
11142 * its OK to resume normal operation.
11144 static void ixgbe_io_resume(struct pci_dev *pdev)
11146 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11147 struct net_device *netdev = adapter->netdev;
11149 #ifdef CONFIG_PCI_IOV
11150 if (adapter->vferr_refcount) {
11151 e_info(drv, "Resuming after VF err\n");
11152 adapter->vferr_refcount--;
11158 if (netif_running(netdev))
11159 ixgbe_open(netdev);
11161 netif_device_attach(netdev);
11165 static const struct pci_error_handlers ixgbe_err_handler = {
11166 .error_detected = ixgbe_io_error_detected,
11167 .slot_reset = ixgbe_io_slot_reset,
11168 .resume = ixgbe_io_resume,
11171 static struct pci_driver ixgbe_driver = {
11172 .name = ixgbe_driver_name,
11173 .id_table = ixgbe_pci_tbl,
11174 .probe = ixgbe_probe,
11175 .remove = ixgbe_remove,
11177 .suspend = ixgbe_suspend,
11178 .resume = ixgbe_resume,
11180 .shutdown = ixgbe_shutdown,
11181 .sriov_configure = ixgbe_pci_sriov_configure,
11182 .err_handler = &ixgbe_err_handler
11186 * ixgbe_init_module - Driver Registration Routine
11188 * ixgbe_init_module is the first routine called when the driver is
11189 * loaded. All it does is register with the PCI subsystem.
11191 static int __init ixgbe_init_module(void)
11194 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11195 pr_info("%s\n", ixgbe_copyright);
11197 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11199 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11205 ret = pci_register_driver(&ixgbe_driver);
11207 destroy_workqueue(ixgbe_wq);
11212 #ifdef CONFIG_IXGBE_DCA
11213 dca_register_notify(&dca_notifier);
11219 module_init(ixgbe_init_module);
11222 * ixgbe_exit_module - Driver Exit Cleanup Routine
11224 * ixgbe_exit_module is called just before the driver is removed
11227 static void __exit ixgbe_exit_module(void)
11229 #ifdef CONFIG_IXGBE_DCA
11230 dca_unregister_notify(&dca_notifier);
11232 pci_unregister_driver(&ixgbe_driver);
11236 destroy_workqueue(ixgbe_wq);
11241 #ifdef CONFIG_IXGBE_DCA
11242 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11247 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11248 __ixgbe_notify_dca);
11250 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11253 #endif /* CONFIG_IXGBE_DCA */
11255 module_exit(ixgbe_exit_module);