drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #include <linux/types.h>
   5 #include <linux/module.h>
   6 #include <linux/pci.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/vmalloc.h>
   9 #include <linux/string.h>
  10 #include <linux/in.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/ip.h>
  13 #include <linux/tcp.h>
  14 #include <linux/sctp.h>
  15 #include <linux/pkt_sched.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/if_macvlan.h>
  25 #include <linux/if_bridge.h>
  26 #include <linux/prefetch.h>
  27 #include <linux/bpf.h>
  28 #include <linux/bpf_trace.h>
  29 #include <linux/atomic.h>
  30 #include <linux/numa.h>
  31 #include <generated/utsrelease.h>
  32 #include <scsi/fc/fc_fcoe.h>
  33 #include <net/udp_tunnel.h>
  34 #include <net/pkt_cls.h>
  35 #include <net/tc_act/tc_gact.h>
  36 #include <net/tc_act/tc_mirred.h>
  37 #include <net/vxlan.h>
  38 #include <net/mpls.h>
  39 #include <net/xdp_sock_drv.h>
  40 #include <net/xfrm.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_common.h"
  44 #include "ixgbe_dcb_82599.h"
  45 #include "ixgbe_phy.h"
  46 #include "ixgbe_sriov.h"
  47 #include "ixgbe_model.h"
  48 #include "ixgbe_txrx_common.h"
  49
  50 char ixgbe_driver_name[] = "ixgbe";
  51 static const char ixgbe_driver_string[] =
  52                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  53 #ifdef IXGBE_FCOE
  54 char ixgbe_default_device_descr[] =
  55                               "Intel(R) 10 Gigabit Network Connection";
  56 #else
  57 static char ixgbe_default_device_descr[] =
  58                               "Intel(R) 10 Gigabit Network Connection";
  59 #endif
  60 static const char ixgbe_copyright[] =
  61                                 "Copyright (c) 1999-2016 Intel Corporation.";
  62
  63 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  64
  65 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  66         [board_82598]           = &ixgbe_82598_info,
  67         [board_82599]           = &ixgbe_82599_info,
  68         [board_X540]            = &ixgbe_X540_info,
  69         [board_X550]            = &ixgbe_X550_info,
  70         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  71         [board_x550em_x_fw]     = &ixgbe_x550em_x_fw_info,
  72         [board_x550em_a]        = &ixgbe_x550em_a_info,
  73         [board_x550em_a_fw]     = &ixgbe_x550em_a_fw_info,
  74 };
  75
  76 /* ixgbe_pci_tbl - PCI Device ID Table
  77  *
  78  * Wildcard entries (PCI_ANY_ID) should come last
  79  * Last entry must be all 0s
  80  *
  81  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  82  *   Class, Class Mask, private data (not used) }
  83  */
  84 static const struct pci_device_id ixgbe_pci_tbl[] = {
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 103         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 104         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 105         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
 132         /* required last entry */
 133         {0, }
 134 };
 135 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 136
 137 #ifdef CONFIG_IXGBE_DCA
 138 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 139                             void *p);
 140 static struct notifier_block dca_notifier = {
 141         .notifier_call = ixgbe_notify_dca,
 142         .next          = NULL,
 143         .priority      = 0
 144 };
 145 #endif
 146
 147 #ifdef CONFIG_PCI_IOV
 148 static unsigned int max_vfs;
 149 module_param(max_vfs, uint, 0);
 150 MODULE_PARM_DESC(max_vfs,
 151                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 152 #endif /* CONFIG_PCI_IOV */
 153
 154 static unsigned int allow_unsupported_sfp;
 155 module_param(allow_unsupported_sfp, uint, 0);
 156 MODULE_PARM_DESC(allow_unsupported_sfp,
 157                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 158
 159 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 160 static int debug = -1;
 161 module_param(debug, int, 0);
 162 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 163
 164 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 165 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 166 MODULE_LICENSE("GPL v2");
 167
 168 static struct workqueue_struct *ixgbe_wq;
 169
 170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 171 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
 172
 173 static const struct net_device_ops ixgbe_netdev_ops;
 174
 175 static bool netif_is_ixgbe(struct net_device *dev)
 176 {
 177         return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
 178 }
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         struct pci_dev *pdev;
 252
 253         /* Some devices are not connected over PCIe and thus do not negotiate
 254          * speed. These devices do not have valid bus info, and thus any report
 255          * we generate may not be correct.
 256          */
 257         if (hw->bus.type == ixgbe_bus_type_internal)
 258                 return;
 259
 260         /* determine whether to use the parent device */
 261         if (ixgbe_pcie_from_parent(&adapter->hw))
 262                 pdev = adapter->pdev->bus->parent->self;
 263         else
 264                 pdev = adapter->pdev;
 265
 266         pcie_print_link_status(pdev);
 267 }
 268
 269 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 270 {
 271         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 272             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 273             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 274                 queue_work(ixgbe_wq, &adapter->service_task);
 275 }
 276
 277 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 278 {
 279         struct ixgbe_adapter *adapter = hw->back;
 280
 281         if (!hw->hw_addr)
 282                 return;
 283         hw->hw_addr = NULL;
 284         e_dev_err("Adapter removed\n");
 285         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 286                 ixgbe_service_event_schedule(adapter);
 287 }
 288
 289 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 290 {
 291         u8 __iomem *reg_addr;
 292         u32 value;
 293         int i;
 294
 295         reg_addr = READ_ONCE(hw->hw_addr);
 296         if (ixgbe_removed(reg_addr))
 297                 return IXGBE_FAILED_READ_REG;
 298
 299         /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
 300          * so perform several status register reads to determine if the adapter
 301          * has been removed.
 302          */
 303         for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
 304                 value = readl(reg_addr + IXGBE_STATUS);
 305                 if (value != IXGBE_FAILED_READ_REG)
 306                         break;
 307                 mdelay(3);
 308         }
 309
 310         if (value == IXGBE_FAILED_READ_REG)
 311                 ixgbe_remove_adapter(hw);
 312         else
 313                 value = readl(reg_addr + reg);
 314         return value;
 315 }
 316
 317 /**
 318  * ixgbe_read_reg - Read from device register
 319  * @hw: hw specific details
 320  * @reg: offset of register to read
 321  *
 322  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 323  *
 324  * This function is used to read device registers. It checks for device
 325  * removal by confirming any read that returns all ones by checking the
 326  * status register value for all ones. This function avoids reading from
 327  * the hardware if a removal was previously detected in which case it
 328  * returns IXGBE_FAILED_READ_REG (all ones).
 329  */
 330 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 331 {
 332         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 333         u32 value;
 334
 335         if (ixgbe_removed(reg_addr))
 336                 return IXGBE_FAILED_READ_REG;
 337         if (unlikely(hw->phy.nw_mng_if_sel &
 338                      IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
 339                 struct ixgbe_adapter *adapter;
 340                 int i;
 341
 342                 for (i = 0; i < 200; ++i) {
 343                         value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
 344                         if (likely(!value))
 345                                 goto writes_completed;
 346                         if (value == IXGBE_FAILED_READ_REG) {
 347                                 ixgbe_remove_adapter(hw);
 348                                 return IXGBE_FAILED_READ_REG;
 349                         }
 350                         udelay(5);
 351                 }
 352
 353                 adapter = hw->back;
 354                 e_warn(hw, "register writes incomplete %08x\n", value);
 355         }
 356
 357 writes_completed:
 358         value = readl(reg_addr + reg);
 359         if (unlikely(value == IXGBE_FAILED_READ_REG))
 360                 value = ixgbe_check_remove(hw, reg);
 361         return value;
 362 }
 363
 364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 365 {
 366         u16 value;
 367
 368         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 369         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 370                 ixgbe_remove_adapter(hw);
 371                 return true;
 372         }
 373         return false;
 374 }
 375
 376 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 377 {
 378         struct ixgbe_adapter *adapter = hw->back;
 379         u16 value;
 380
 381         if (ixgbe_removed(hw->hw_addr))
 382                 return IXGBE_FAILED_READ_CFG_WORD;
 383         pci_read_config_word(adapter->pdev, reg, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 385             ixgbe_check_cfg_remove(hw, adapter->pdev))
 386                 return IXGBE_FAILED_READ_CFG_WORD;
 387         return value;
 388 }
 389
 390 #ifdef CONFIG_PCI_IOV
 391 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u32 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_DWORD;
 398         pci_read_config_dword(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_DWORD;
 402         return value;
 403 }
 404 #endif /* CONFIG_PCI_IOV */
 405
 406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409
 410         if (ixgbe_removed(hw->hw_addr))
 411                 return;
 412         pci_write_config_word(adapter->pdev, reg, value);
 413 }
 414
 415 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 416 {
 417         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 418
 419         /* flush memory to make sure state is correct before next watchdog */
 420         smp_mb__before_atomic();
 421         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 422 }
 423
 424 struct ixgbe_reg_info {
 425         u32 ofs;
 426         char *name;
 427 };
 428
 429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 430
 431         /* General Registers */
 432         {IXGBE_CTRL, "CTRL"},
 433         {IXGBE_STATUS, "STATUS"},
 434         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 435
 436         /* Interrupt Registers */
 437         {IXGBE_EICR, "EICR"},
 438
 439         /* RX Registers */
 440         {IXGBE_SRRCTL(0), "SRRCTL"},
 441         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 442         {IXGBE_RDLEN(0), "RDLEN"},
 443         {IXGBE_RDH(0), "RDH"},
 444         {IXGBE_RDT(0), "RDT"},
 445         {IXGBE_RXDCTL(0), "RXDCTL"},
 446         {IXGBE_RDBAL(0), "RDBAL"},
 447         {IXGBE_RDBAH(0), "RDBAH"},
 448
 449         /* TX Registers */
 450         {IXGBE_TDBAL(0), "TDBAL"},
 451         {IXGBE_TDBAH(0), "TDBAH"},
 452         {IXGBE_TDLEN(0), "TDLEN"},
 453         {IXGBE_TDH(0), "TDH"},
 454         {IXGBE_TDT(0), "TDT"},
 455         {IXGBE_TXDCTL(0), "TXDCTL"},
 456
 457         /* List Terminator */
 458         { .name = NULL }
 459 };
 460
 461
 462 /*
 463  * ixgbe_regdump - register printout routine
 464  */
 465 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 466 {
 467         int i;
 468         char rname[16];
 469         u32 regs[64];
 470
 471         switch (reginfo->ofs) {
 472         case IXGBE_SRRCTL(0):
 473                 for (i = 0; i < 64; i++)
 474                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 475                 break;
 476         case IXGBE_DCA_RXCTRL(0):
 477                 for (i = 0; i < 64; i++)
 478                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 479                 break;
 480         case IXGBE_RDLEN(0):
 481                 for (i = 0; i < 64; i++)
 482                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 483                 break;
 484         case IXGBE_RDH(0):
 485                 for (i = 0; i < 64; i++)
 486                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 487                 break;
 488         case IXGBE_RDT(0):
 489                 for (i = 0; i < 64; i++)
 490                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 491                 break;
 492         case IXGBE_RXDCTL(0):
 493                 for (i = 0; i < 64; i++)
 494                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 495                 break;
 496         case IXGBE_RDBAL(0):
 497                 for (i = 0; i < 64; i++)
 498                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 499                 break;
 500         case IXGBE_RDBAH(0):
 501                 for (i = 0; i < 64; i++)
 502                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 503                 break;
 504         case IXGBE_TDBAL(0):
 505                 for (i = 0; i < 64; i++)
 506                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 507                 break;
 508         case IXGBE_TDBAH(0):
 509                 for (i = 0; i < 64; i++)
 510                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 511                 break;
 512         case IXGBE_TDLEN(0):
 513                 for (i = 0; i < 64; i++)
 514                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 515                 break;
 516         case IXGBE_TDH(0):
 517                 for (i = 0; i < 64; i++)
 518                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 519                 break;
 520         case IXGBE_TDT(0):
 521                 for (i = 0; i < 64; i++)
 522                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 523                 break;
 524         case IXGBE_TXDCTL(0):
 525                 for (i = 0; i < 64; i++)
 526                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 527                 break;
 528         default:
 529                 pr_info("%-15s %08x\n",
 530                         reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
 531                 return;
 532         }
 533
 534         i = 0;
 535         while (i < 64) {
 536                 int j;
 537                 char buf[9 * 8 + 1];
 538                 char *p = buf;
 539
 540                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
 541                 for (j = 0; j < 8; j++)
 542                         p += sprintf(p, " %08x", regs[i++]);
 543                 pr_err("%-15s%s\n", rname, buf);
 544         }
 545
 546 }
 547
 548 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
 549 {
 550         struct ixgbe_tx_buffer *tx_buffer;
 551
 552         tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
 553         pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 554                 n, ring->next_to_use, ring->next_to_clean,
 555                 (u64)dma_unmap_addr(tx_buffer, dma),
 556                 dma_unmap_len(tx_buffer, len),
 557                 tx_buffer->next_to_watch,
 558                 (u64)tx_buffer->time_stamp);
 559 }
 560
 561 /*
 562  * ixgbe_dump - Print registers, tx-rings and rx-rings
 563  */
 564 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 565 {
 566         struct net_device *netdev = adapter->netdev;
 567         struct ixgbe_hw *hw = &adapter->hw;
 568         struct ixgbe_reg_info *reginfo;
 569         int n = 0;
 570         struct ixgbe_ring *ring;
 571         struct ixgbe_tx_buffer *tx_buffer;
 572         union ixgbe_adv_tx_desc *tx_desc;
 573         struct my_u0 { u64 a; u64 b; } *u0;
 574         struct ixgbe_ring *rx_ring;
 575         union ixgbe_adv_rx_desc *rx_desc;
 576         struct ixgbe_rx_buffer *rx_buffer_info;
 577         int i = 0;
 578
 579         if (!netif_msg_hw(adapter))
 580                 return;
 581
 582         /* Print netdevice Info */
 583         if (netdev) {
 584                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 585                 pr_info("Device Name     state            "
 586                         "trans_start\n");
 587                 pr_info("%-15s %016lX %016lX\n",
 588                         netdev->name,
 589                         netdev->state,
 590                         dev_trans_start(netdev));
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 ring = adapter->tx_ring[n];
 611                 ixgbe_print_buffer(ring, n);
 612         }
 613
 614         for (n = 0; n < adapter->num_xdp_queues; n++) {
 615                 ring = adapter->xdp_ring[n];
 616                 ixgbe_print_buffer(ring, n);
 617         }
 618
 619         /* Print TX Rings */
 620         if (!netif_msg_tx_done(adapter))
 621                 goto rx_ring_summary;
 622
 623         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 624
 625         /* Transmit Descriptor Formats
 626          *
 627          * 82598 Advanced Transmit Descriptor
 628          *   +--------------------------------------------------------------+
 629          * 0 |         Buffer Address [63:0]                                |
 630          *   +--------------------------------------------------------------+
 631          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 632          *   +--------------------------------------------------------------+
 633          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 634          *
 635          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 636          *   +--------------------------------------------------------------+
 637          * 0 |                          RSV [63:0]                          |
 638          *   +--------------------------------------------------------------+
 639          * 8 |            RSV           |  STA  |          NXTSEQ           |
 640          *   +--------------------------------------------------------------+
 641          *   63                       36 35   32 31                         0
 642          *
 643          * 82599+ Advanced Transmit Descriptor
 644          *   +--------------------------------------------------------------+
 645          * 0 |         Buffer Address [63:0]                                |
 646          *   +--------------------------------------------------------------+
 647          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 648          *   +--------------------------------------------------------------+
 649          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 650          *
 651          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 652          *   +--------------------------------------------------------------+
 653          * 0 |                          RSV [63:0]                          |
 654          *   +--------------------------------------------------------------+
 655          * 8 |            RSV           |  STA  |           RSV             |
 656          *   +--------------------------------------------------------------+
 657          *   63                       36 35   32 31                         0
 658          */
 659
 660         for (n = 0; n < adapter->num_tx_queues; n++) {
 661                 ring = adapter->tx_ring[n];
 662                 pr_info("------------------------------------\n");
 663                 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
 664                 pr_info("------------------------------------\n");
 665                 pr_info("%s%s    %s              %s        %s          %s\n",
 666                         "T [desc]     [address 63:0  ] ",
 667                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 668                         "leng", "ntw", "timestamp", "bi->skb");
 669
 670                 for (i = 0; ring->desc && (i < ring->count); i++) {
 671                         tx_desc = IXGBE_TX_DESC(ring, i);
 672                         tx_buffer = &ring->tx_buffer_info[i];
 673                         u0 = (struct my_u0 *)tx_desc;
 674                         if (dma_unmap_len(tx_buffer, len) > 0) {
 675                                 const char *ring_desc;
 676
 677                                 if (i == ring->next_to_use &&
 678                                     i == ring->next_to_clean)
 679                                         ring_desc = " NTC/U";
 680                                 else if (i == ring->next_to_use)
 681                                         ring_desc = " NTU";
 682                                 else if (i == ring->next_to_clean)
 683                                         ring_desc = " NTC";
 684                                 else
 685                                         ring_desc = "";
 686                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p%s",
 687                                         i,
 688                                         le64_to_cpu((__force __le64)u0->a),
 689                                         le64_to_cpu((__force __le64)u0->b),
 690                                         (u64)dma_unmap_addr(tx_buffer, dma),
 691                                         dma_unmap_len(tx_buffer, len),
 692                                         tx_buffer->next_to_watch,
 693                                         (u64)tx_buffer->time_stamp,
 694                                         tx_buffer->skb,
 695                                         ring_desc);
 696
 697                                 if (netif_msg_pktdata(adapter) &&
 698                                     tx_buffer->skb)
 699                                         print_hex_dump(KERN_INFO, "",
 700                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 701                                                 tx_buffer->skb->data,
 702                                                 dma_unmap_len(tx_buffer, len),
 703                                                 true);
 704                         }
 705                 }
 706         }
 707
 708         /* Print RX Rings Summary */
 709 rx_ring_summary:
 710         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 711         pr_info("Queue [NTU] [NTC]\n");
 712         for (n = 0; n < adapter->num_rx_queues; n++) {
 713                 rx_ring = adapter->rx_ring[n];
 714                 pr_info("%5d %5X %5X\n",
 715                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 716         }
 717
 718         /* Print RX Rings */
 719         if (!netif_msg_rx_status(adapter))
 720                 return;
 721
 722         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 723
 724         /* Receive Descriptor Formats
 725          *
 726          * 82598 Advanced Receive Descriptor (Read) Format
 727          *    63                                           1        0
 728          *    +-----------------------------------------------------+
 729          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 730          *    +----------------------------------------------+------+
 731          *  8 |       Header Buffer Address [63:1]           |  DD  |
 732          *    +-----------------------------------------------------+
 733          *
 734          *
 735          * 82598 Advanced Receive Descriptor (Write-Back) Format
 736          *
 737          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 738          *   +------------------------------------------------------+
 739          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 740          *   | Packet   | IP     |   |          |     | Type | Type |
 741          *   | Checksum | Ident  |   |          |     |      |      |
 742          *   +------------------------------------------------------+
 743          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 744          *   +------------------------------------------------------+
 745          *   63       48 47    32 31            20 19               0
 746          *
 747          * 82599+ Advanced Receive Descriptor (Read) Format
 748          *    63                                           1        0
 749          *    +-----------------------------------------------------+
 750          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 751          *    +----------------------------------------------+------+
 752          *  8 |       Header Buffer Address [63:1]           |  DD  |
 753          *    +-----------------------------------------------------+
 754          *
 755          *
 756          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 757          *
 758          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 759          *   +------------------------------------------------------+
 760          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 761          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 762          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 763          *   +------------------------------------------------------+
 764          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 765          *   +------------------------------------------------------+
 766          *   63       48 47    32 31          20 19                 0
 767          */
 768
 769         for (n = 0; n < adapter->num_rx_queues; n++) {
 770                 rx_ring = adapter->rx_ring[n];
 771                 pr_info("------------------------------------\n");
 772                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 773                 pr_info("------------------------------------\n");
 774                 pr_info("%s%s%s\n",
 775                         "R  [desc]      [ PktBuf     A0] ",
 776                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 777                         "<-- Adv Rx Read format");
 778                 pr_info("%s%s%s\n",
 779                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 780                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 781                         "<-- Adv Rx Write-Back format");
 782
 783                 for (i = 0; i < rx_ring->count; i++) {
 784                         const char *ring_desc;
 785
 786                         if (i == rx_ring->next_to_use)
 787                                 ring_desc = " NTU";
 788                         else if (i == rx_ring->next_to_clean)
 789                                 ring_desc = " NTC";
 790                         else
 791                                 ring_desc = "";
 792
 793                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 794                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 795                         u0 = (struct my_u0 *)rx_desc;
 796                         if (rx_desc->wb.upper.length) {
 797                                 /* Descriptor Done */
 798                                 pr_info("RWB[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 799                                         i,
 800                                         le64_to_cpu((__force __le64)u0->a),
 801                                         le64_to_cpu((__force __le64)u0->b),
 802                                         rx_buffer_info->skb,
 803                                         ring_desc);
 804                         } else {
 805                                 pr_info("R  [0x%03X]     %016llX %016llX %016llX %p%s\n",
 806                                         i,
 807                                         le64_to_cpu((__force __le64)u0->a),
 808                                         le64_to_cpu((__force __le64)u0->b),
 809                                         (u64)rx_buffer_info->dma,
 810                                         rx_buffer_info->skb,
 811                                         ring_desc);
 812
 813                                 if (netif_msg_pktdata(adapter) &&
 814                                     rx_buffer_info->dma) {
 815                                         print_hex_dump(KERN_INFO, "",
 816                                            DUMP_PREFIX_ADDRESS, 16, 1,
 817                                            page_address(rx_buffer_info->page) +
 818                                                     rx_buffer_info->page_offset,
 819                                            ixgbe_rx_bufsz(rx_ring), true);
 820                                 }
 821                         }
 822                 }
 823         }
 824 }
 825
 826 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 827 {
 828         u32 ctrl_ext;
 829
 830         /* Let firmware take over control of h/w */
 831         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 832         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 833                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 834 }
 835
 836 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 837 {
 838         u32 ctrl_ext;
 839
 840         /* Let firmware know the driver has taken over */
 841         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 842         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 843                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 844 }
 845
 846 /**
 847  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 848  * @adapter: pointer to adapter struct
 849  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 850  * @queue: queue to map the corresponding interrupt to
 851  * @msix_vector: the vector to map to the corresponding queue
 852  *
 853  */
 854 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 855                            u8 queue, u8 msix_vector)
 856 {
 857         u32 ivar, index;
 858         struct ixgbe_hw *hw = &adapter->hw;
 859         switch (hw->mac.type) {
 860         case ixgbe_mac_82598EB:
 861                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 862                 if (direction == -1)
 863                         direction = 0;
 864                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 865                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 866                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 867                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 868                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 869                 break;
 870         case ixgbe_mac_82599EB:
 871         case ixgbe_mac_X540:
 872         case ixgbe_mac_X550:
 873         case ixgbe_mac_X550EM_x:
 874         case ixgbe_mac_x550em_a:
 875                 if (direction == -1) {
 876                         /* other causes */
 877                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 878                         index = ((queue & 1) * 8);
 879                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 880                         ivar &= ~(0xFF << index);
 881                         ivar |= (msix_vector << index);
 882                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 883                         break;
 884                 } else {
 885                         /* tx or rx causes */
 886                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 887                         index = ((16 * (queue & 1)) + (8 * direction));
 888                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 889                         ivar &= ~(0xFF << index);
 890                         ivar |= (msix_vector << index);
 891                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 892                         break;
 893                 }
 894         default:
 895                 break;
 896         }
 897 }
 898
 899 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 900                             u64 qmask)
 901 {
 902         u32 mask;
 903
 904         switch (adapter->hw.mac.type) {
 905         case ixgbe_mac_82598EB:
 906                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 907                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 908                 break;
 909         case ixgbe_mac_82599EB:
 910         case ixgbe_mac_X540:
 911         case ixgbe_mac_X550:
 912         case ixgbe_mac_X550EM_x:
 913         case ixgbe_mac_x550em_a:
 914                 mask = (qmask & 0xFFFFFFFF);
 915                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 916                 mask = (qmask >> 32);
 917                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 918                 break;
 919         default:
 920                 break;
 921         }
 922 }
 923
 924 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 925 {
 926         struct ixgbe_hw *hw = &adapter->hw;
 927         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 928         int i;
 929         u32 data;
 930
 931         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 932             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 933                 return;
 934
 935         switch (hw->mac.type) {
 936         case ixgbe_mac_82598EB:
 937                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 938                 break;
 939         default:
 940                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 941         }
 942         hwstats->lxoffrxc += data;
 943
 944         /* refill credits (no tx hang) if we received xoff */
 945         if (!data)
 946                 return;
 947
 948         for (i = 0; i < adapter->num_tx_queues; i++)
 949                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 950                           &adapter->tx_ring[i]->state);
 951
 952         for (i = 0; i < adapter->num_xdp_queues; i++)
 953                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 954                           &adapter->xdp_ring[i]->state);
 955 }
 956
 957 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 958 {
 959         struct ixgbe_hw *hw = &adapter->hw;
 960         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 961         u32 xoff[8] = {0};
 962         u8 tc;
 963         int i;
 964         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 965
 966         if (adapter->ixgbe_ieee_pfc)
 967                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 968
 969         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 970                 ixgbe_update_xoff_rx_lfc(adapter);
 971                 return;
 972         }
 973
 974         /* update stats for each tc, only valid with PFC enabled */
 975         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 976                 u32 pxoffrxc;
 977
 978                 switch (hw->mac.type) {
 979                 case ixgbe_mac_82598EB:
 980                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 981                         break;
 982                 default:
 983                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 984                 }
 985                 hwstats->pxoffrxc[i] += pxoffrxc;
 986                 /* Get the TC for given UP */
 987                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
 988                 xoff[tc] += pxoffrxc;
 989         }
 990
 991         /* disarm tx queues that have received xoff frames */
 992         for (i = 0; i < adapter->num_tx_queues; i++) {
 993                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 994
 995                 tc = tx_ring->dcb_tc;
 996                 if (xoff[tc])
 997                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 998         }
 999
1000         for (i = 0; i < adapter->num_xdp_queues; i++) {
1001                 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1002
1003                 tc = xdp_ring->dcb_tc;
1004                 if (xoff[tc])
1005                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1006         }
1007 }
1008
1009 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1010 {
1011         return ring->stats.packets;
1012 }
1013
1014 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1015 {
1016         unsigned int head, tail;
1017
1018         head = ring->next_to_clean;
1019         tail = ring->next_to_use;
1020
1021         return ((head <= tail) ? tail : tail + ring->count) - head;
1022 }
1023
1024 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1025 {
1026         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1027         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1028         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1029
1030         clear_check_for_tx_hang(tx_ring);
1031
1032         /*
1033          * Check for a hung queue, but be thorough. This verifies
1034          * that a transmit has been completed since the previous
1035          * check AND there is at least one packet pending. The
1036          * ARMED bit is set to indicate a potential hang. The
1037          * bit is cleared if a pause frame is received to remove
1038          * false hang detection due to PFC or 802.3x frames. By
1039          * requiring this to fail twice we avoid races with
1040          * pfc clearing the ARMED bit and conditions where we
1041          * run the check_tx_hang logic with a transmit completion
1042          * pending but without time to complete it yet.
1043          */
1044         if (tx_done_old == tx_done && tx_pending)
1045                 /* make sure it is true for two checks in a row */
1046                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1047                                         &tx_ring->state);
1048         /* update completed stats and continue */
1049         tx_ring->tx_stats.tx_done_old = tx_done;
1050         /* reset the countdown */
1051         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1052
1053         return false;
1054 }
1055
1056 /**
1057  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1058  * @adapter: driver private struct
1059  **/
1060 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1061 {
1062
1063         /* Do the reset outside of interrupt context */
1064         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1065                 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1066                 e_warn(drv, "initiating reset due to tx timeout\n");
1067                 ixgbe_service_event_schedule(adapter);
1068         }
1069 }
1070
1071 /**
1072  * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1073  * @netdev: network interface device structure
1074  * @queue_index: Tx queue to set
1075  * @maxrate: desired maximum transmit bitrate
1076  **/
1077 static int ixgbe_tx_maxrate(struct net_device *netdev,
1078                             int queue_index, u32 maxrate)
1079 {
1080         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1081         struct ixgbe_hw *hw = &adapter->hw;
1082         u32 bcnrc_val = ixgbe_link_mbps(adapter);
1083
1084         if (!maxrate)
1085                 return 0;
1086
1087         /* Calculate the rate factor values to set */
1088         bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1089         bcnrc_val /= maxrate;
1090
1091         /* clear everything but the rate factor */
1092         bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1093         IXGBE_RTTBCNRC_RF_DEC_MASK;
1094
1095         /* enable the rate scheduler */
1096         bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1097
1098         IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1099         IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1100
1101         return 0;
1102 }
1103
1104 /**
1105  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1106  * @q_vector: structure containing interrupt and ring information
1107  * @tx_ring: tx ring to clean
1108  * @napi_budget: Used to determine if we are in netpoll
1109  **/
1110 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1111                                struct ixgbe_ring *tx_ring, int napi_budget)
1112 {
1113         struct ixgbe_adapter *adapter = q_vector->adapter;
1114         struct ixgbe_tx_buffer *tx_buffer;
1115         union ixgbe_adv_tx_desc *tx_desc;
1116         unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1117         unsigned int budget = q_vector->tx.work_limit;
1118         unsigned int i = tx_ring->next_to_clean;
1119
1120         if (test_bit(__IXGBE_DOWN, &adapter->state))
1121                 return true;
1122
1123         tx_buffer = &tx_ring->tx_buffer_info[i];
1124         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1125         i -= tx_ring->count;
1126
1127         do {
1128                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1129
1130                 /* if next_to_watch is not set then there is no work pending */
1131                 if (!eop_desc)
1132                         break;
1133
1134                 /* prevent any other reads prior to eop_desc */
1135                 smp_rmb();
1136
1137                 /* if DD is not set pending work has not been completed */
1138                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1139                         break;
1140
1141                 /* clear next_to_watch to prevent false hangs */
1142                 tx_buffer->next_to_watch = NULL;
1143
1144                 /* update the statistics for this packet */
1145                 total_bytes += tx_buffer->bytecount;
1146                 total_packets += tx_buffer->gso_segs;
1147                 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1148                         total_ipsec++;
1149
1150                 /* free the skb */
1151                 if (ring_is_xdp(tx_ring))
1152                         xdp_return_frame(tx_buffer->xdpf);
1153                 else
1154                         napi_consume_skb(tx_buffer->skb, napi_budget);
1155
1156                 /* unmap skb header data */
1157                 dma_unmap_single(tx_ring->dev,
1158                                  dma_unmap_addr(tx_buffer, dma),
1159                                  dma_unmap_len(tx_buffer, len),
1160                                  DMA_TO_DEVICE);
1161
1162                 /* clear tx_buffer data */
1163                 dma_unmap_len_set(tx_buffer, len, 0);
1164
1165                 /* unmap remaining buffers */
1166                 while (tx_desc != eop_desc) {
1167                         tx_buffer++;
1168                         tx_desc++;
1169                         i++;
1170                         if (unlikely(!i)) {
1171                                 i -= tx_ring->count;
1172                                 tx_buffer = tx_ring->tx_buffer_info;
1173                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1174                         }
1175
1176                         /* unmap any remaining paged data */
1177                         if (dma_unmap_len(tx_buffer, len)) {
1178                                 dma_unmap_page(tx_ring->dev,
1179                                                dma_unmap_addr(tx_buffer, dma),
1180                                                dma_unmap_len(tx_buffer, len),
1181                                                DMA_TO_DEVICE);
1182                                 dma_unmap_len_set(tx_buffer, len, 0);
1183                         }
1184                 }
1185
1186                 /* move us one more past the eop_desc for start of next pkt */
1187                 tx_buffer++;
1188                 tx_desc++;
1189                 i++;
1190                 if (unlikely(!i)) {
1191                         i -= tx_ring->count;
1192                         tx_buffer = tx_ring->tx_buffer_info;
1193                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1194                 }
1195
1196                 /* issue prefetch for next Tx descriptor */
1197                 prefetch(tx_desc);
1198
1199                 /* update budget accounting */
1200                 budget--;
1201         } while (likely(budget));
1202
1203         i += tx_ring->count;
1204         tx_ring->next_to_clean = i;
1205         u64_stats_update_begin(&tx_ring->syncp);
1206         tx_ring->stats.bytes += total_bytes;
1207         tx_ring->stats.packets += total_packets;
1208         u64_stats_update_end(&tx_ring->syncp);
1209         q_vector->tx.total_bytes += total_bytes;
1210         q_vector->tx.total_packets += total_packets;
1211         adapter->tx_ipsec += total_ipsec;
1212
1213         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1214                 /* schedule immediate reset if we believe we hung */
1215                 struct ixgbe_hw *hw = &adapter->hw;
1216                 e_err(drv, "Detected Tx Unit Hang %s\n"
1217                         "  Tx Queue             <%d>\n"
1218                         "  TDH, TDT             <%x>, <%x>\n"
1219                         "  next_to_use          <%x>\n"
1220                         "  next_to_clean        <%x>\n"
1221                         "tx_buffer_info[next_to_clean]\n"
1222                         "  time_stamp           <%lx>\n"
1223                         "  jiffies              <%lx>\n",
1224                         ring_is_xdp(tx_ring) ? "(XDP)" : "",
1225                         tx_ring->queue_index,
1226                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1227                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1228                         tx_ring->next_to_use, i,
1229                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1230
1231                 if (!ring_is_xdp(tx_ring))
1232                         netif_stop_subqueue(tx_ring->netdev,
1233                                             tx_ring->queue_index);
1234
1235                 e_info(probe,
1236                        "tx hang %d detected on queue %d, resetting adapter\n",
1237                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1238
1239                 /* schedule immediate reset if we believe we hung */
1240                 ixgbe_tx_timeout_reset(adapter);
1241
1242                 /* the adapter is about to reset, no point in enabling stuff */
1243                 return true;
1244         }
1245
1246         if (ring_is_xdp(tx_ring))
1247                 return !!budget;
1248
1249         netdev_tx_completed_queue(txring_txq(tx_ring),
1250                                   total_packets, total_bytes);
1251
1252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1253         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1254                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1255                 /* Make sure that anybody stopping the queue after this
1256                  * sees the new next_to_clean.
1257                  */
1258                 smp_mb();
1259                 if (__netif_subqueue_stopped(tx_ring->netdev,
1260                                              tx_ring->queue_index)
1261                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1262                         netif_wake_subqueue(tx_ring->netdev,
1263                                             tx_ring->queue_index);
1264                         ++tx_ring->tx_stats.restart_queue;
1265                 }
1266         }
1267
1268         return !!budget;
1269 }
1270
1271 #ifdef CONFIG_IXGBE_DCA
1272 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1273                                 struct ixgbe_ring *tx_ring,
1274                                 int cpu)
1275 {
1276         struct ixgbe_hw *hw = &adapter->hw;
1277         u32 txctrl = 0;
1278         u16 reg_offset;
1279
1280         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1281                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1282
1283         switch (hw->mac.type) {
1284         case ixgbe_mac_82598EB:
1285                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1286                 break;
1287         case ixgbe_mac_82599EB:
1288         case ixgbe_mac_X540:
1289                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1290                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1291                 break;
1292         default:
1293                 /* for unknown hardware do not write register */
1294                 return;
1295         }
1296
1297         /*
1298          * We can enable relaxed ordering for reads, but not writes when
1299          * DCA is enabled.  This is due to a known issue in some chipsets
1300          * which will cause the DCA tag to be cleared.
1301          */
1302         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1303                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1304                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1305
1306         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1307 }
1308
1309 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1310                                 struct ixgbe_ring *rx_ring,
1311                                 int cpu)
1312 {
1313         struct ixgbe_hw *hw = &adapter->hw;
1314         u32 rxctrl = 0;
1315         u8 reg_idx = rx_ring->reg_idx;
1316
1317         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1318                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1319
1320         switch (hw->mac.type) {
1321         case ixgbe_mac_82599EB:
1322         case ixgbe_mac_X540:
1323                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1324                 break;
1325         default:
1326                 break;
1327         }
1328
1329         /*
1330          * We can enable relaxed ordering for reads, but not writes when
1331          * DCA is enabled.  This is due to a known issue in some chipsets
1332          * which will cause the DCA tag to be cleared.
1333          */
1334         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1335                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1336                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1337
1338         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1339 }
1340
1341 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1342 {
1343         struct ixgbe_adapter *adapter = q_vector->adapter;
1344         struct ixgbe_ring *ring;
1345         int cpu = get_cpu();
1346
1347         if (q_vector->cpu == cpu)
1348                 goto out_no_update;
1349
1350         ixgbe_for_each_ring(ring, q_vector->tx)
1351                 ixgbe_update_tx_dca(adapter, ring, cpu);
1352
1353         ixgbe_for_each_ring(ring, q_vector->rx)
1354                 ixgbe_update_rx_dca(adapter, ring, cpu);
1355
1356         q_vector->cpu = cpu;
1357 out_no_update:
1358         put_cpu();
1359 }
1360
1361 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1362 {
1363         int i;
1364
1365         /* always use CB2 mode, difference is masked in the CB driver */
1366         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1367                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1369         else
1370                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1371                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1372
1373         for (i = 0; i < adapter->num_q_vectors; i++) {
1374                 adapter->q_vector[i]->cpu = -1;
1375                 ixgbe_update_dca(adapter->q_vector[i]);
1376         }
1377 }
1378
1379 static int __ixgbe_notify_dca(struct device *dev, void *data)
1380 {
1381         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1382         unsigned long event = *(unsigned long *)data;
1383
1384         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1385                 return 0;
1386
1387         switch (event) {
1388         case DCA_PROVIDER_ADD:
1389                 /* if we're already enabled, don't do it again */
1390                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1391                         break;
1392                 if (dca_add_requester(dev) == 0) {
1393                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1394                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1395                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1396                         break;
1397                 }
1398                 fallthrough; /* DCA is disabled. */
1399         case DCA_PROVIDER_REMOVE:
1400                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1401                         dca_remove_requester(dev);
1402                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1403                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1405                 }
1406                 break;
1407         }
1408
1409         return 0;
1410 }
1411
1412 #endif /* CONFIG_IXGBE_DCA */
1413
1414 #define IXGBE_RSS_L4_TYPES_MASK \
1415         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1416          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1417          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1418          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1419
1420 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1421                                  union ixgbe_adv_rx_desc *rx_desc,
1422                                  struct sk_buff *skb)
1423 {
1424         u16 rss_type;
1425
1426         if (!(ring->netdev->features & NETIF_F_RXHASH))
1427                 return;
1428
1429         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1430                    IXGBE_RXDADV_RSSTYPE_MASK;
1431
1432         if (!rss_type)
1433                 return;
1434
1435         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1436                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1437                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1438 }
1439
1440 #ifdef IXGBE_FCOE
1441 /**
1442  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1443  * @ring: structure containing ring specific data
1444  * @rx_desc: advanced rx descriptor
1445  *
1446  * Returns : true if it is FCoE pkt
1447  */
1448 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1449                                     union ixgbe_adv_rx_desc *rx_desc)
1450 {
1451         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1452
1453         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1454                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1455                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1456                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1457 }
1458
1459 #endif /* IXGBE_FCOE */
1460 /**
1461  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1462  * @ring: structure containing ring specific data
1463  * @rx_desc: current Rx descriptor being processed
1464  * @skb: skb currently being received and modified
1465  **/
1466 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1467                                      union ixgbe_adv_rx_desc *rx_desc,
1468                                      struct sk_buff *skb)
1469 {
1470         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1471         bool encap_pkt = false;
1472
1473         skb_checksum_none_assert(skb);
1474
1475         /* Rx csum disabled */
1476         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1477                 return;
1478
1479         /* check for VXLAN and Geneve packets */
1480         if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1481                 encap_pkt = true;
1482                 skb->encapsulation = 1;
1483         }
1484
1485         /* if IP and error */
1486         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1487             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1488                 ring->rx_stats.csum_err++;
1489                 return;
1490         }
1491
1492         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1493                 return;
1494
1495         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1496                 /*
1497                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1498                  * checksum errors.
1499                  */
1500                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1501                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1502                         return;
1503
1504                 ring->rx_stats.csum_err++;
1505                 return;
1506         }
1507
1508         /* It must be a TCP or UDP packet with a valid checksum */
1509         skb->ip_summed = CHECKSUM_UNNECESSARY;
1510         if (encap_pkt) {
1511                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1512                         return;
1513
1514                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1515                         skb->ip_summed = CHECKSUM_NONE;
1516                         return;
1517                 }
1518                 /* If we checked the outer header let the stack know */
1519                 skb->csum_level = 1;
1520         }
1521 }
1522
1523 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1524 {
1525         return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1526 }
1527
1528 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1529                                     struct ixgbe_rx_buffer *bi)
1530 {
1531         struct page *page = bi->page;
1532         dma_addr_t dma;
1533
1534         /* since we are recycling buffers we should seldom need to alloc */
1535         if (likely(page))
1536                 return true;
1537
1538         /* alloc new page for storage */
1539         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1540         if (unlikely(!page)) {
1541                 rx_ring->rx_stats.alloc_rx_page_failed++;
1542                 return false;
1543         }
1544
1545         /* map page for use */
1546         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1547                                  ixgbe_rx_pg_size(rx_ring),
1548                                  DMA_FROM_DEVICE,
1549                                  IXGBE_RX_DMA_ATTR);
1550
1551         /*
1552          * if mapping failed free memory back to system since
1553          * there isn't much point in holding memory we can't use
1554          */
1555         if (dma_mapping_error(rx_ring->dev, dma)) {
1556                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1557
1558                 rx_ring->rx_stats.alloc_rx_page_failed++;
1559                 return false;
1560         }
1561
1562         bi->dma = dma;
1563         bi->page = page;
1564         bi->page_offset = ixgbe_rx_offset(rx_ring);
1565         page_ref_add(page, USHRT_MAX - 1);
1566         bi->pagecnt_bias = USHRT_MAX;
1567         rx_ring->rx_stats.alloc_rx_page++;
1568
1569         return true;
1570 }
1571
1572 /**
1573  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1574  * @rx_ring: ring to place buffers on
1575  * @cleaned_count: number of buffers to replace
1576  **/
1577 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1578 {
1579         union ixgbe_adv_rx_desc *rx_desc;
1580         struct ixgbe_rx_buffer *bi;
1581         u16 i = rx_ring->next_to_use;
1582         u16 bufsz;
1583
1584         /* nothing to do */
1585         if (!cleaned_count)
1586                 return;
1587
1588         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1589         bi = &rx_ring->rx_buffer_info[i];
1590         i -= rx_ring->count;
1591
1592         bufsz = ixgbe_rx_bufsz(rx_ring);
1593
1594         do {
1595                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1596                         break;
1597
1598                 /* sync the buffer for use by the device */
1599                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1600                                                  bi->page_offset, bufsz,
1601                                                  DMA_FROM_DEVICE);
1602
1603                 /*
1604                  * Refresh the desc even if buffer_addrs didn't change
1605                  * because each write-back erases this info.
1606                  */
1607                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1608
1609                 rx_desc++;
1610                 bi++;
1611                 i++;
1612                 if (unlikely(!i)) {
1613                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1614                         bi = rx_ring->rx_buffer_info;
1615                         i -= rx_ring->count;
1616                 }
1617
1618                 /* clear the length for the next_to_use descriptor */
1619                 rx_desc->wb.upper.length = 0;
1620
1621                 cleaned_count--;
1622         } while (cleaned_count);
1623
1624         i += rx_ring->count;
1625
1626         if (rx_ring->next_to_use != i) {
1627                 rx_ring->next_to_use = i;
1628
1629                 /* update next to alloc since we have filled the ring */
1630                 rx_ring->next_to_alloc = i;
1631
1632                 /* Force memory writes to complete before letting h/w
1633                  * know there are new descriptors to fetch.  (Only
1634                  * applicable for weak-ordered memory model archs,
1635                  * such as IA-64).
1636                  */
1637                 wmb();
1638                 writel(i, rx_ring->tail);
1639         }
1640 }
1641
1642 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1643                                    struct sk_buff *skb)
1644 {
1645         u16 hdr_len = skb_headlen(skb);
1646
1647         /* set gso_size to avoid messing up TCP MSS */
1648         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1649                                                  IXGBE_CB(skb)->append_cnt);
1650         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1651 }
1652
1653 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1654                                    struct sk_buff *skb)
1655 {
1656         /* if append_cnt is 0 then frame is not RSC */
1657         if (!IXGBE_CB(skb)->append_cnt)
1658                 return;
1659
1660         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1661         rx_ring->rx_stats.rsc_flush++;
1662
1663         ixgbe_set_rsc_gso_size(rx_ring, skb);
1664
1665         /* gso_size is computed using append_cnt so always clear it last */
1666         IXGBE_CB(skb)->append_cnt = 0;
1667 }
1668
1669 /**
1670  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1671  * @rx_ring: rx descriptor ring packet is being transacted on
1672  * @rx_desc: pointer to the EOP Rx descriptor
1673  * @skb: pointer to current skb being populated
1674  *
1675  * This function checks the ring, descriptor, and packet information in
1676  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1677  * other fields within the skb.
1678  **/
1679 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1680                               union ixgbe_adv_rx_desc *rx_desc,
1681                               struct sk_buff *skb)
1682 {
1683         struct net_device *dev = rx_ring->netdev;
1684         u32 flags = rx_ring->q_vector->adapter->flags;
1685
1686         ixgbe_update_rsc_stats(rx_ring, skb);
1687
1688         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1689
1690         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1691
1692         if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1693                 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1694
1695         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1696             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1697                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1698                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1699         }
1700
1701         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1702                 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1703
1704         /* record Rx queue, or update MACVLAN statistics */
1705         if (netif_is_ixgbe(dev))
1706                 skb_record_rx_queue(skb, rx_ring->queue_index);
1707         else
1708                 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1709                                  false);
1710
1711         skb->protocol = eth_type_trans(skb, dev);
1712 }
1713
1714 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1715                   struct sk_buff *skb)
1716 {
1717         napi_gro_receive(&q_vector->napi, skb);
1718 }
1719
1720 /**
1721  * ixgbe_is_non_eop - process handling of non-EOP buffers
1722  * @rx_ring: Rx ring being processed
1723  * @rx_desc: Rx descriptor for current buffer
1724  * @skb: Current socket buffer containing buffer in progress
1725  *
1726  * This function updates next to clean.  If the buffer is an EOP buffer
1727  * this function exits returning false, otherwise it will place the
1728  * sk_buff in the next buffer to be chained and return true indicating
1729  * that this is in fact a non-EOP buffer.
1730  **/
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1732                              union ixgbe_adv_rx_desc *rx_desc,
1733                              struct sk_buff *skb)
1734 {
1735         u32 ntc = rx_ring->next_to_clean + 1;
1736
1737         /* fetch, update, and store next to clean */
1738         ntc = (ntc < rx_ring->count) ? ntc : 0;
1739         rx_ring->next_to_clean = ntc;
1740
1741         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1742
1743         /* update RSC append count if present */
1744         if (ring_is_rsc_enabled(rx_ring)) {
1745                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1746                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1747
1748                 if (unlikely(rsc_enabled)) {
1749                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1750
1751                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1752                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1753
1754                         /* update ntc based on RSC value */
1755                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1756                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1757                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1758                 }
1759         }
1760
1761         /* if we are the last buffer then there is nothing else to do */
1762         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1763                 return false;
1764
1765         /* place skb in next buffer to be received */
1766         rx_ring->rx_buffer_info[ntc].skb = skb;
1767         rx_ring->rx_stats.non_eop_descs++;
1768
1769         return true;
1770 }
1771
1772 /**
1773  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774  * @rx_ring: rx descriptor ring packet is being transacted on
1775  * @skb: pointer to current skb being adjusted
1776  *
1777  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1778  * main difference between this version and the original function is that
1779  * this function can make several assumptions about the state of things
1780  * that allow for significant optimizations versus the standard function.
1781  * As a result we can do things like drop a frag and maintain an accurate
1782  * truesize for the skb.
1783  */
1784 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1785                             struct sk_buff *skb)
1786 {
1787         skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1788         unsigned char *va;
1789         unsigned int pull_len;
1790
1791         /*
1792          * it is valid to use page_address instead of kmap since we are
1793          * working with pages allocated out of the lomem pool per
1794          * alloc_page(GFP_ATOMIC)
1795          */
1796         va = skb_frag_address(frag);
1797
1798         /*
1799          * we need the header to contain the greater of either ETH_HLEN or
1800          * 60 bytes if the skb->len is less than 60 for skb_pad.
1801          */
1802         pull_len = eth_get_headlen(skb->dev, va, IXGBE_RX_HDR_SIZE);
1803
1804         /* align pull length to size of long to optimize memcpy performance */
1805         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1806
1807         /* update all of the pointers */
1808         skb_frag_size_sub(frag, pull_len);
1809         skb_frag_off_add(frag, pull_len);
1810         skb->data_len -= pull_len;
1811         skb->tail += pull_len;
1812 }
1813
1814 /**
1815  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816  * @rx_ring: rx descriptor ring packet is being transacted on
1817  * @skb: pointer to current skb being updated
1818  *
1819  * This function provides a basic DMA sync up for the first fragment of an
1820  * skb.  The reason for doing this is that the first fragment cannot be
1821  * unmapped until we have reached the end of packet descriptor for a buffer
1822  * chain.
1823  */
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1825                                 struct sk_buff *skb)
1826 {
1827         if (ring_uses_build_skb(rx_ring)) {
1828                 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1829
1830                 dma_sync_single_range_for_cpu(rx_ring->dev,
1831                                               IXGBE_CB(skb)->dma,
1832                                               offset,
1833                                               skb_headlen(skb),
1834                                               DMA_FROM_DEVICE);
1835         } else {
1836                 skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
1837
1838                 dma_sync_single_range_for_cpu(rx_ring->dev,
1839                                               IXGBE_CB(skb)->dma,
1840                                               skb_frag_off(frag),
1841                                               skb_frag_size(frag),
1842                                               DMA_FROM_DEVICE);
1843         }
1844
1845         /* If the page was released, just unmap it. */
1846         if (unlikely(IXGBE_CB(skb)->page_released)) {
1847                 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1848                                      ixgbe_rx_pg_size(rx_ring),
1849                                      DMA_FROM_DEVICE,
1850                                      IXGBE_RX_DMA_ATTR);
1851         }
1852 }
1853
1854 /**
1855  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1856  * @rx_ring: rx descriptor ring packet is being transacted on
1857  * @rx_desc: pointer to the EOP Rx descriptor
1858  * @skb: pointer to current skb being fixed
1859  *
1860  * Check if the skb is valid in the XDP case it will be an error pointer.
1861  * Return true in this case to abort processing and advance to next
1862  * descriptor.
1863  *
1864  * Check for corrupted packet headers caused by senders on the local L2
1865  * embedded NIC switch not setting up their Tx Descriptors right.  These
1866  * should be very rare.
1867  *
1868  * Also address the case where we are pulling data in on pages only
1869  * and as such no data is present in the skb header.
1870  *
1871  * In addition if skb is not at least 60 bytes we need to pad it so that
1872  * it is large enough to qualify as a valid Ethernet frame.
1873  *
1874  * Returns true if an error was encountered and skb was freed.
1875  **/
1876 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1877                            union ixgbe_adv_rx_desc *rx_desc,
1878                            struct sk_buff *skb)
1879 {
1880         struct net_device *netdev = rx_ring->netdev;
1881
1882         /* XDP packets use error pointer so abort at this point */
1883         if (IS_ERR(skb))
1884                 return true;
1885
1886         /* Verify netdev is present, and that packet does not have any
1887          * errors that would be unacceptable to the netdev.
1888          */
1889         if (!netdev ||
1890             (unlikely(ixgbe_test_staterr(rx_desc,
1891                                          IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1892              !(netdev->features & NETIF_F_RXALL)))) {
1893                 dev_kfree_skb_any(skb);
1894                 return true;
1895         }
1896
1897         /* place header in linear portion of buffer */
1898         if (!skb_headlen(skb))
1899                 ixgbe_pull_tail(rx_ring, skb);
1900
1901 #ifdef IXGBE_FCOE
1902         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1903         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1904                 return false;
1905
1906 #endif
1907         /* if eth_skb_pad returns an error the skb was freed */
1908         if (eth_skb_pad(skb))
1909                 return true;
1910
1911         return false;
1912 }
1913
1914 /**
1915  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1916  * @rx_ring: rx descriptor ring to store buffers on
1917  * @old_buff: donor buffer to have page reused
1918  *
1919  * Synchronizes page for reuse by the adapter
1920  **/
1921 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1922                                 struct ixgbe_rx_buffer *old_buff)
1923 {
1924         struct ixgbe_rx_buffer *new_buff;
1925         u16 nta = rx_ring->next_to_alloc;
1926
1927         new_buff = &rx_ring->rx_buffer_info[nta];
1928
1929         /* update, and store next to alloc */
1930         nta++;
1931         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1932
1933         /* Transfer page from old buffer to new buffer.
1934          * Move each member individually to avoid possible store
1935          * forwarding stalls and unnecessary copy of skb.
1936          */
1937         new_buff->dma           = old_buff->dma;
1938         new_buff->page          = old_buff->page;
1939         new_buff->page_offset   = old_buff->page_offset;
1940         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
1941 }
1942
1943 static inline bool ixgbe_page_is_reserved(struct page *page)
1944 {
1945         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1946 }
1947
1948 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1949 {
1950         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1951         struct page *page = rx_buffer->page;
1952
1953         /* avoid re-using remote pages */
1954         if (unlikely(ixgbe_page_is_reserved(page)))
1955                 return false;
1956
1957 #if (PAGE_SIZE < 8192)
1958         /* if we are only owner of page we can reuse it */
1959         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1960                 return false;
1961 #else
1962         /* The last offset is a bit aggressive in that we assume the
1963          * worst case of FCoE being enabled and using a 3K buffer.
1964          * However this should have minimal impact as the 1K extra is
1965          * still less than one buffer in size.
1966          */
1967 #define IXGBE_LAST_OFFSET \
1968         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1969         if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1970                 return false;
1971 #endif
1972
1973         /* If we have drained the page fragment pool we need to update
1974          * the pagecnt_bias and page count so that we fully restock the
1975          * number of references the driver holds.
1976          */
1977         if (unlikely(pagecnt_bias == 1)) {
1978                 page_ref_add(page, USHRT_MAX - 1);
1979                 rx_buffer->pagecnt_bias = USHRT_MAX;
1980         }
1981
1982         return true;
1983 }
1984
1985 /**
1986  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1987  * @rx_ring: rx descriptor ring to transact packets on
1988  * @rx_buffer: buffer containing page to add
1989  * @skb: sk_buff to place the data into
1990  * @size: size of data in rx_buffer
1991  *
1992  * This function will add the data contained in rx_buffer->page to the skb.
1993  * This is done either through a direct copy if the data in the buffer is
1994  * less than the skb header size, otherwise it will just attach the page as
1995  * a frag to the skb.
1996  *
1997  * The function will then update the page offset if necessary and return
1998  * true if the buffer can be reused by the adapter.
1999  **/
2000 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
2001                               struct ixgbe_rx_buffer *rx_buffer,
2002                               struct sk_buff *skb,
2003                               unsigned int size)
2004 {
2005 #if (PAGE_SIZE < 8192)
2006         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2007 #else
2008         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2009                                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2010                                 SKB_DATA_ALIGN(size);
2011 #endif
2012         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2013                         rx_buffer->page_offset, size, truesize);
2014 #if (PAGE_SIZE < 8192)
2015         rx_buffer->page_offset ^= truesize;
2016 #else
2017         rx_buffer->page_offset += truesize;
2018 #endif
2019 }
2020
2021 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2022                                                    union ixgbe_adv_rx_desc *rx_desc,
2023                                                    struct sk_buff **skb,
2024                                                    const unsigned int size)
2025 {
2026         struct ixgbe_rx_buffer *rx_buffer;
2027
2028         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2029         prefetchw(rx_buffer->page);
2030         *skb = rx_buffer->skb;
2031
2032         /* Delay unmapping of the first packet. It carries the header
2033          * information, HW may still access the header after the writeback.
2034          * Only unmap it when EOP is reached
2035          */
2036         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2037                 if (!*skb)
2038                         goto skip_sync;
2039         } else {
2040                 if (*skb)
2041                         ixgbe_dma_sync_frag(rx_ring, *skb);
2042         }
2043
2044         /* we are reusing so sync this buffer for CPU use */
2045         dma_sync_single_range_for_cpu(rx_ring->dev,
2046                                       rx_buffer->dma,
2047                                       rx_buffer->page_offset,
2048                                       size,
2049                                       DMA_FROM_DEVICE);
2050 skip_sync:
2051         rx_buffer->pagecnt_bias--;
2052
2053         return rx_buffer;
2054 }
2055
2056 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2057                                 struct ixgbe_rx_buffer *rx_buffer,
2058                                 struct sk_buff *skb)
2059 {
2060         if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2061                 /* hand second half of page back to the ring */
2062                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2063         } else {
2064                 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2065                         /* the page has been released from the ring */
2066                         IXGBE_CB(skb)->page_released = true;
2067                 } else {
2068                         /* we are not reusing the buffer so unmap it */
2069                         dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2070                                              ixgbe_rx_pg_size(rx_ring),
2071                                              DMA_FROM_DEVICE,
2072                                              IXGBE_RX_DMA_ATTR);
2073                 }
2074                 __page_frag_cache_drain(rx_buffer->page,
2075                                         rx_buffer->pagecnt_bias);
2076         }
2077
2078         /* clear contents of rx_buffer */
2079         rx_buffer->page = NULL;
2080         rx_buffer->skb = NULL;
2081 }
2082
2083 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2084                                            struct ixgbe_rx_buffer *rx_buffer,
2085                                            struct xdp_buff *xdp,
2086                                            union ixgbe_adv_rx_desc *rx_desc)
2087 {
2088         unsigned int size = xdp->data_end - xdp->data;
2089 #if (PAGE_SIZE < 8192)
2090         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2091 #else
2092         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2093                                                xdp->data_hard_start);
2094 #endif
2095         struct sk_buff *skb;
2096
2097         /* prefetch first cache line of first page */
2098         net_prefetch(xdp->data);
2099
2100         /* Note, we get here by enabling legacy-rx via:
2101          *
2102          *    ethtool --set-priv-flags <dev> legacy-rx on
2103          *
2104          * In this mode, we currently get 0 extra XDP headroom as
2105          * opposed to having legacy-rx off, where we process XDP
2106          * packets going to stack via ixgbe_build_skb(). The latter
2107          * provides us currently with 192 bytes of headroom.
2108          *
2109          * For ixgbe_construct_skb() mode it means that the
2110          * xdp->data_meta will always point to xdp->data, since
2111          * the helper cannot expand the head. Should this ever
2112          * change in future for legacy-rx mode on, then lets also
2113          * add xdp->data_meta handling here.
2114          */
2115
2116         /* allocate a skb to store the frags */
2117         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2118         if (unlikely(!skb))
2119                 return NULL;
2120
2121         if (size > IXGBE_RX_HDR_SIZE) {
2122                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2123                         IXGBE_CB(skb)->dma = rx_buffer->dma;
2124
2125                 skb_add_rx_frag(skb, 0, rx_buffer->page,
2126                                 xdp->data - page_address(rx_buffer->page),
2127                                 size, truesize);
2128 #if (PAGE_SIZE < 8192)
2129                 rx_buffer->page_offset ^= truesize;
2130 #else
2131                 rx_buffer->page_offset += truesize;
2132 #endif
2133         } else {
2134                 memcpy(__skb_put(skb, size),
2135                        xdp->data, ALIGN(size, sizeof(long)));
2136                 rx_buffer->pagecnt_bias++;
2137         }
2138
2139         return skb;
2140 }
2141
2142 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2143                                        struct ixgbe_rx_buffer *rx_buffer,
2144                                        struct xdp_buff *xdp,
2145                                        union ixgbe_adv_rx_desc *rx_desc)
2146 {
2147         unsigned int metasize = xdp->data - xdp->data_meta;
2148 #if (PAGE_SIZE < 8192)
2149         unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2150 #else
2151         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2152                                 SKB_DATA_ALIGN(xdp->data_end -
2153                                                xdp->data_hard_start);
2154 #endif
2155         struct sk_buff *skb;
2156
2157         /* Prefetch first cache line of first page. If xdp->data_meta
2158          * is unused, this points extactly as xdp->data, otherwise we
2159          * likely have a consumer accessing first few bytes of meta
2160          * data, and then actual data.
2161          */
2162         net_prefetch(xdp->data_meta);
2163
2164         /* build an skb to around the page buffer */
2165         skb = build_skb(xdp->data_hard_start, truesize);
2166         if (unlikely(!skb))
2167                 return NULL;
2168
2169         /* update pointers within the skb to store the data */
2170         skb_reserve(skb, xdp->data - xdp->data_hard_start);
2171         __skb_put(skb, xdp->data_end - xdp->data);
2172         if (metasize)
2173                 skb_metadata_set(skb, metasize);
2174
2175         /* record DMA address if this is the start of a chain of buffers */
2176         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2177                 IXGBE_CB(skb)->dma = rx_buffer->dma;
2178
2179         /* update buffer offset */
2180 #if (PAGE_SIZE < 8192)
2181         rx_buffer->page_offset ^= truesize;
2182 #else
2183         rx_buffer->page_offset += truesize;
2184 #endif
2185
2186         return skb;
2187 }
2188
2189 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2190                                      struct ixgbe_ring *rx_ring,
2191                                      struct xdp_buff *xdp)
2192 {
2193         int err, result = IXGBE_XDP_PASS;
2194         struct bpf_prog *xdp_prog;
2195         struct xdp_frame *xdpf;
2196         u32 act;
2197
2198         rcu_read_lock();
2199         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2200
2201         if (!xdp_prog)
2202                 goto xdp_out;
2203
2204         prefetchw(xdp->data_hard_start); /* xdp_frame write */
2205
2206         act = bpf_prog_run_xdp(xdp_prog, xdp);
2207         switch (act) {
2208         case XDP_PASS:
2209                 break;
2210         case XDP_TX:
2211                 xdpf = xdp_convert_buff_to_frame(xdp);
2212                 if (unlikely(!xdpf)) {
2213                         result = IXGBE_XDP_CONSUMED;
2214                         break;
2215                 }
2216                 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2217                 break;
2218         case XDP_REDIRECT:
2219                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2220                 if (!err)
2221                         result = IXGBE_XDP_REDIR;
2222                 else
2223                         result = IXGBE_XDP_CONSUMED;
2224                 break;
2225         default:
2226                 bpf_warn_invalid_xdp_action(act);
2227                 fallthrough;
2228         case XDP_ABORTED:
2229                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2230                 fallthrough; /* handle aborts by dropping packet */
2231         case XDP_DROP:
2232                 result = IXGBE_XDP_CONSUMED;
2233                 break;
2234         }
2235 xdp_out:
2236         rcu_read_unlock();
2237         return ERR_PTR(-result);
2238 }
2239
2240 static unsigned int ixgbe_rx_frame_truesize(struct ixgbe_ring *rx_ring,
2241                                             unsigned int size)
2242 {
2243         unsigned int truesize;
2244
2245 #if (PAGE_SIZE < 8192)
2246         truesize = ixgbe_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
2247 #else
2248         truesize = ring_uses_build_skb(rx_ring) ?
2249                 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) +
2250                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
2251                 SKB_DATA_ALIGN(size);
2252 #endif
2253         return truesize;
2254 }
2255
2256 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2257                                  struct ixgbe_rx_buffer *rx_buffer,
2258                                  unsigned int size)
2259 {
2260         unsigned int truesize = ixgbe_rx_frame_truesize(rx_ring, size);
2261 #if (PAGE_SIZE < 8192)
2262         rx_buffer->page_offset ^= truesize;
2263 #else
2264         rx_buffer->page_offset += truesize;
2265 #endif
2266 }
2267
2268 /**
2269  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2270  * @q_vector: structure containing interrupt and ring information
2271  * @rx_ring: rx descriptor ring to transact packets on
2272  * @budget: Total limit on number of packets to process
2273  *
2274  * This function provides a "bounce buffer" approach to Rx interrupt
2275  * processing.  The advantage to this is that on systems that have
2276  * expensive overhead for IOMMU access this provides a means of avoiding
2277  * it by maintaining the mapping of the page to the syste.
2278  *
2279  * Returns amount of work completed
2280  **/
2281 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2282                                struct ixgbe_ring *rx_ring,
2283                                const int budget)
2284 {
2285         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2286         struct ixgbe_adapter *adapter = q_vector->adapter;
2287 #ifdef IXGBE_FCOE
2288         int ddp_bytes;
2289         unsigned int mss = 0;
2290 #endif /* IXGBE_FCOE */
2291         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2292         unsigned int xdp_xmit = 0;
2293         struct xdp_buff xdp;
2294
2295         xdp.rxq = &rx_ring->xdp_rxq;
2296
2297         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
2298 #if (PAGE_SIZE < 8192)
2299         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, 0);
2300 #endif
2301
2302         while (likely(total_rx_packets < budget)) {
2303                 union ixgbe_adv_rx_desc *rx_desc;
2304                 struct ixgbe_rx_buffer *rx_buffer;
2305                 struct sk_buff *skb;
2306                 unsigned int size;
2307
2308                 /* return some buffers to hardware, one at a time is too slow */
2309                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2310                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2311                         cleaned_count = 0;
2312                 }
2313
2314                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2315                 size = le16_to_cpu(rx_desc->wb.upper.length);
2316                 if (!size)
2317                         break;
2318
2319                 /* This memory barrier is needed to keep us from reading
2320                  * any other fields out of the rx_desc until we know the
2321                  * descriptor has been written back
2322                  */
2323                 dma_rmb();
2324
2325                 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2326
2327                 /* retrieve a buffer from the ring */
2328                 if (!skb) {
2329                         xdp.data = page_address(rx_buffer->page) +
2330                                    rx_buffer->page_offset;
2331                         xdp.data_meta = xdp.data;
2332                         xdp.data_hard_start = xdp.data -
2333                                               ixgbe_rx_offset(rx_ring);
2334                         xdp.data_end = xdp.data + size;
2335 #if (PAGE_SIZE > 4096)
2336                         /* At larger PAGE_SIZE, frame_sz depend on len size */
2337                         xdp.frame_sz = ixgbe_rx_frame_truesize(rx_ring, size);
2338 #endif
2339                         skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2340                 }
2341
2342                 if (IS_ERR(skb)) {
2343                         unsigned int xdp_res = -PTR_ERR(skb);
2344
2345                         if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2346                                 xdp_xmit |= xdp_res;
2347                                 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2348                         } else {
2349                                 rx_buffer->pagecnt_bias++;
2350                         }
2351                         total_rx_packets++;
2352                         total_rx_bytes += size;
2353                 } else if (skb) {
2354                         ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2355                 } else if (ring_uses_build_skb(rx_ring)) {
2356                         skb = ixgbe_build_skb(rx_ring, rx_buffer,
2357                                               &xdp, rx_desc);
2358                 } else {
2359                         skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2360                                                   &xdp, rx_desc);
2361                 }
2362
2363                 /* exit if we failed to retrieve a buffer */
2364                 if (!skb) {
2365                         rx_ring->rx_stats.alloc_rx_buff_failed++;
2366                         rx_buffer->pagecnt_bias++;
2367                         break;
2368                 }
2369
2370                 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2371                 cleaned_count++;
2372
2373                 /* place incomplete frames back on ring for completion */
2374                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2375                         continue;
2376
2377                 /* verify the packet layout is correct */
2378                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2379                         continue;
2380
2381                 /* probably a little skewed due to removing CRC */
2382                 total_rx_bytes += skb->len;
2383
2384                 /* populate checksum, timestamp, VLAN, and protocol */
2385                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2386
2387 #ifdef IXGBE_FCOE
2388                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2389                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2390                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2391                         /* include DDPed FCoE data */
2392                         if (ddp_bytes > 0) {
2393                                 if (!mss) {
2394                                         mss = rx_ring->netdev->mtu -
2395                                                 sizeof(struct fcoe_hdr) -
2396                                                 sizeof(struct fc_frame_header) -
2397                                                 sizeof(struct fcoe_crc_eof);
2398                                         if (mss > 512)
2399                                                 mss &= ~511;
2400                                 }
2401                                 total_rx_bytes += ddp_bytes;
2402                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2403                                                                  mss);
2404                         }
2405                         if (!ddp_bytes) {
2406                                 dev_kfree_skb_any(skb);
2407                                 continue;
2408                         }
2409                 }
2410
2411 #endif /* IXGBE_FCOE */
2412                 ixgbe_rx_skb(q_vector, skb);
2413
2414                 /* update budget accounting */
2415                 total_rx_packets++;
2416         }
2417
2418         if (xdp_xmit & IXGBE_XDP_REDIR)
2419                 xdp_do_flush_map();
2420
2421         if (xdp_xmit & IXGBE_XDP_TX) {
2422                 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2423
2424                 /* Force memory writes to complete before letting h/w
2425                  * know there are new descriptors to fetch.
2426                  */
2427                 wmb();
2428                 writel(ring->next_to_use, ring->tail);
2429         }
2430
2431         u64_stats_update_begin(&rx_ring->syncp);
2432         rx_ring->stats.packets += total_rx_packets;
2433         rx_ring->stats.bytes += total_rx_bytes;
2434         u64_stats_update_end(&rx_ring->syncp);
2435         q_vector->rx.total_packets += total_rx_packets;
2436         q_vector->rx.total_bytes += total_rx_bytes;
2437
2438         return total_rx_packets;
2439 }
2440
2441 /**
2442  * ixgbe_configure_msix - Configure MSI-X hardware
2443  * @adapter: board private structure
2444  *
2445  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2446  * interrupts.
2447  **/
2448 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2449 {
2450         struct ixgbe_q_vector *q_vector;
2451         int v_idx;
2452         u32 mask;
2453
2454         /* Populate MSIX to EITR Select */
2455         if (adapter->num_vfs > 32) {
2456                 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2457                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2458         }
2459
2460         /*
2461          * Populate the IVAR table and set the ITR values to the
2462          * corresponding register.
2463          */
2464         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2465                 struct ixgbe_ring *ring;
2466                 q_vector = adapter->q_vector[v_idx];
2467
2468                 ixgbe_for_each_ring(ring, q_vector->rx)
2469                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2470
2471                 ixgbe_for_each_ring(ring, q_vector->tx)
2472                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2473
2474                 ixgbe_write_eitr(q_vector);
2475         }
2476
2477         switch (adapter->hw.mac.type) {
2478         case ixgbe_mac_82598EB:
2479                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2480                                v_idx);
2481                 break;
2482         case ixgbe_mac_82599EB:
2483         case ixgbe_mac_X540:
2484         case ixgbe_mac_X550:
2485         case ixgbe_mac_X550EM_x:
2486         case ixgbe_mac_x550em_a:
2487                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2488                 break;
2489         default:
2490                 break;
2491         }
2492         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2493
2494         /* set up to autoclear timer, and the vectors */
2495         mask = IXGBE_EIMS_ENABLE_MASK;
2496         mask &= ~(IXGBE_EIMS_OTHER |
2497                   IXGBE_EIMS_MAILBOX |
2498                   IXGBE_EIMS_LSC);
2499
2500         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2501 }
2502
2503 /**
2504  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2505  * @q_vector: structure containing interrupt and ring information
2506  * @ring_container: structure containing ring performance data
2507  *
2508  *      Stores a new ITR value based on packets and byte
2509  *      counts during the last interrupt.  The advantage of per interrupt
2510  *      computation is faster updates and more accurate ITR for the current
2511  *      traffic pattern.  Constants in this function were computed
2512  *      based on theoretical maximum wire speed and thresholds were set based
2513  *      on testing data as well as attempting to minimize response time
2514  *      while increasing bulk throughput.
2515  **/
2516 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2517                              struct ixgbe_ring_container *ring_container)
2518 {
2519         unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2520                            IXGBE_ITR_ADAPTIVE_LATENCY;
2521         unsigned int avg_wire_size, packets, bytes;
2522         unsigned long next_update = jiffies;
2523
2524         /* If we don't have any rings just leave ourselves set for maximum
2525          * possible latency so we take ourselves out of the equation.
2526          */
2527         if (!ring_container->ring)
2528                 return;
2529
2530         /* If we didn't update within up to 1 - 2 jiffies we can assume
2531          * that either packets are coming in so slow there hasn't been
2532          * any work, or that there is so much work that NAPI is dealing
2533          * with interrupt moderation and we don't need to do anything.
2534          */
2535         if (time_after(next_update, ring_container->next_update))
2536                 goto clear_counts;
2537
2538         packets = ring_container->total_packets;
2539
2540         /* We have no packets to actually measure against. This means
2541          * either one of the other queues on this vector is active or
2542          * we are a Tx queue doing TSO with too high of an interrupt rate.
2543          *
2544          * When this occurs just tick up our delay by the minimum value
2545          * and hope that this extra delay will prevent us from being called
2546          * without any work on our queue.
2547          */
2548         if (!packets) {
2549                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2550                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2551                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2552                 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2553                 goto clear_counts;
2554         }
2555
2556         bytes = ring_container->total_bytes;
2557
2558         /* If packets are less than 4 or bytes are less than 9000 assume
2559          * insufficient data to use bulk rate limiting approach. We are
2560          * likely latency driven.
2561          */
2562         if (packets < 4 && bytes < 9000) {
2563                 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2564                 goto adjust_by_size;
2565         }
2566
2567         /* Between 4 and 48 we can assume that our current interrupt delay
2568          * is only slightly too low. As such we should increase it by a small
2569          * fixed amount.
2570          */
2571         if (packets < 48) {
2572                 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2573                 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2574                         itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2575                 goto clear_counts;
2576         }
2577
2578         /* Between 48 and 96 is our "goldilocks" zone where we are working
2579          * out "just right". Just report that our current ITR is good for us.
2580          */
2581         if (packets < 96) {
2582                 itr = q_vector->itr >> 2;
2583                 goto clear_counts;
2584         }
2585
2586         /* If packet count is 96 or greater we are likely looking at a slight
2587          * overrun of the delay we want. Try halving our delay to see if that
2588          * will cut the number of packets in half per interrupt.
2589          */
2590         if (packets < 256) {
2591                 itr = q_vector->itr >> 3;
2592                 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2593                         itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2594                 goto clear_counts;
2595         }
2596
2597         /* The paths below assume we are dealing with a bulk ITR since number
2598          * of packets is 256 or greater. We are just going to have to compute
2599          * a value and try to bring the count under control, though for smaller
2600          * packet sizes there isn't much we can do as NAPI polling will likely
2601          * be kicking in sooner rather than later.
2602          */
2603         itr = IXGBE_ITR_ADAPTIVE_BULK;
2604
2605 adjust_by_size:
2606         /* If packet counts are 256 or greater we can assume we have a gross
2607          * overestimation of what the rate should be. Instead of trying to fine
2608          * tune it just use the formula below to try and dial in an exact value
2609          * give the current packet size of the frame.
2610          */
2611         avg_wire_size = bytes / packets;
2612
2613         /* The following is a crude approximation of:
2614          *  wmem_default / (size + overhead) = desired_pkts_per_int
2615          *  rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2616          *  (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2617          *
2618          * Assuming wmem_default is 212992 and overhead is 640 bytes per
2619          * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2620          * formula down to
2621          *
2622          *  (170 * (size + 24)) / (size + 640) = ITR
2623          *
2624          * We first do some math on the packet size and then finally bitshift
2625          * by 8 after rounding up. We also have to account for PCIe link speed
2626          * difference as ITR scales based on this.
2627          */
2628         if (avg_wire_size <= 60) {
2629                 /* Start at 50k ints/sec */
2630                 avg_wire_size = 5120;
2631         } else if (avg_wire_size <= 316) {
2632                 /* 50K ints/sec to 16K ints/sec */
2633                 avg_wire_size *= 40;
2634                 avg_wire_size += 2720;
2635         } else if (avg_wire_size <= 1084) {
2636                 /* 16K ints/sec to 9.2K ints/sec */
2637                 avg_wire_size *= 15;
2638                 avg_wire_size += 11452;
2639         } else if (avg_wire_size < 1968) {
2640                 /* 9.2K ints/sec to 8K ints/sec */
2641                 avg_wire_size *= 5;
2642                 avg_wire_size += 22420;
2643         } else {
2644                 /* plateau at a limit of 8K ints/sec */
2645                 avg_wire_size = 32256;
2646         }
2647
2648         /* If we are in low latency mode half our delay which doubles the rate
2649          * to somewhere between 100K to 16K ints/sec
2650          */
2651         if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2652                 avg_wire_size >>= 1;
2653
2654         /* Resultant value is 256 times larger than it needs to be. This
2655          * gives us room to adjust the value as needed to either increase
2656          * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2657          *
2658          * Use addition as we have already recorded the new latency flag
2659          * for the ITR value.
2660          */
2661         switch (q_vector->adapter->link_speed) {
2662         case IXGBE_LINK_SPEED_10GB_FULL:
2663         case IXGBE_LINK_SPEED_100_FULL:
2664         default:
2665                 itr += DIV_ROUND_UP(avg_wire_size,
2666                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2667                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2668                 break;
2669         case IXGBE_LINK_SPEED_2_5GB_FULL:
2670         case IXGBE_LINK_SPEED_1GB_FULL:
2671         case IXGBE_LINK_SPEED_10_FULL:
2672                 if (avg_wire_size > 8064)
2673                         avg_wire_size = 8064;
2674                 itr += DIV_ROUND_UP(avg_wire_size,
2675                                     IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2676                        IXGBE_ITR_ADAPTIVE_MIN_INC;
2677                 break;
2678         }
2679
2680 clear_counts:
2681         /* write back value */
2682         ring_container->itr = itr;
2683
2684         /* next update should occur within next jiffy */
2685         ring_container->next_update = next_update + 1;
2686
2687         ring_container->total_bytes = 0;
2688         ring_container->total_packets = 0;
2689 }
2690
2691 /**
2692  * ixgbe_write_eitr - write EITR register in hardware specific way
2693  * @q_vector: structure containing interrupt and ring information
2694  *
2695  * This function is made to be called by ethtool and by the driver
2696  * when it needs to update EITR registers at runtime.  Hardware
2697  * specific quirks/differences are taken care of here.
2698  */
2699 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2700 {
2701         struct ixgbe_adapter *adapter = q_vector->adapter;
2702         struct ixgbe_hw *hw = &adapter->hw;
2703         int v_idx = q_vector->v_idx;
2704         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2705
2706         switch (adapter->hw.mac.type) {
2707         case ixgbe_mac_82598EB:
2708                 /* must write high and low 16 bits to reset counter */
2709                 itr_reg |= (itr_reg << 16);
2710                 break;
2711         case ixgbe_mac_82599EB:
2712         case ixgbe_mac_X540:
2713         case ixgbe_mac_X550:
2714         case ixgbe_mac_X550EM_x:
2715         case ixgbe_mac_x550em_a:
2716                 /*
2717                  * set the WDIS bit to not clear the timer bits and cause an
2718                  * immediate assertion of the interrupt
2719                  */
2720                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2721                 break;
2722         default:
2723                 break;
2724         }
2725         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2726 }
2727
2728 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2729 {
2730         u32 new_itr;
2731
2732         ixgbe_update_itr(q_vector, &q_vector->tx);
2733         ixgbe_update_itr(q_vector, &q_vector->rx);
2734
2735         /* use the smallest value of new ITR delay calculations */
2736         new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2737
2738         /* Clear latency flag if set, shift into correct position */
2739         new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2740         new_itr <<= 2;
2741
2742         if (new_itr != q_vector->itr) {
2743                 /* save the algorithm value here */
2744                 q_vector->itr = new_itr;
2745
2746                 ixgbe_write_eitr(q_vector);
2747         }
2748 }
2749
2750 /**
2751  * ixgbe_check_overtemp_subtask - check for over temperature
2752  * @adapter: pointer to adapter
2753  **/
2754 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2755 {
2756         struct ixgbe_hw *hw = &adapter->hw;
2757         u32 eicr = adapter->interrupt_event;
2758         s32 rc;
2759
2760         if (test_bit(__IXGBE_DOWN, &adapter->state))
2761                 return;
2762
2763         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2764                 return;
2765
2766         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2767
2768         switch (hw->device_id) {
2769         case IXGBE_DEV_ID_82599_T3_LOM:
2770                 /*
2771                  * Since the warning interrupt is for both ports
2772                  * we don't have to check if:
2773                  *  - This interrupt wasn't for our port.
2774                  *  - We may have missed the interrupt so always have to
2775                  *    check if we  got a LSC
2776                  */
2777                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2778                     !(eicr & IXGBE_EICR_LSC))
2779                         return;
2780
2781                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2782                         u32 speed;
2783                         bool link_up = false;
2784
2785                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2786
2787                         if (link_up)
2788                                 return;
2789                 }
2790
2791                 /* Check if this is not due to overtemp */
2792                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2793                         return;
2794
2795                 break;
2796         case IXGBE_DEV_ID_X550EM_A_1G_T:
2797         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2798                 rc = hw->phy.ops.check_overtemp(hw);
2799                 if (rc != IXGBE_ERR_OVERTEMP)
2800                         return;
2801                 break;
2802         default:
2803                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2804                         return;
2805                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2806                         return;
2807                 break;
2808         }
2809         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2810
2811         adapter->interrupt_event = 0;
2812 }
2813
2814 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2815 {
2816         struct ixgbe_hw *hw = &adapter->hw;
2817
2818         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2819             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2820                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2821                 /* write to clear the interrupt */
2822                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2823         }
2824 }
2825
2826 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2827 {
2828         struct ixgbe_hw *hw = &adapter->hw;
2829
2830         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2831                 return;
2832
2833         switch (adapter->hw.mac.type) {
2834         case ixgbe_mac_82599EB:
2835                 /*
2836                  * Need to check link state so complete overtemp check
2837                  * on service task
2838                  */
2839                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2840                      (eicr & IXGBE_EICR_LSC)) &&
2841                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2842                         adapter->interrupt_event = eicr;
2843                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2844                         ixgbe_service_event_schedule(adapter);
2845                         return;
2846                 }
2847                 return;
2848         case ixgbe_mac_x550em_a:
2849                 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2850                         adapter->interrupt_event = eicr;
2851                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2852                         ixgbe_service_event_schedule(adapter);
2853                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2854                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2855                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2856                                         IXGBE_EICR_GPI_SDP0_X550EM_a);
2857                 }
2858                 return;
2859         case ixgbe_mac_X550:
2860         case ixgbe_mac_X540:
2861                 if (!(eicr & IXGBE_EICR_TS))
2862                         return;
2863                 break;
2864         default:
2865                 return;
2866         }
2867
2868         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2869 }
2870
2871 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2872 {
2873         switch (hw->mac.type) {
2874         case ixgbe_mac_82598EB:
2875                 if (hw->phy.type == ixgbe_phy_nl)
2876                         return true;
2877                 return false;
2878         case ixgbe_mac_82599EB:
2879         case ixgbe_mac_X550EM_x:
2880         case ixgbe_mac_x550em_a:
2881                 switch (hw->mac.ops.get_media_type(hw)) {
2882                 case ixgbe_media_type_fiber:
2883                 case ixgbe_media_type_fiber_qsfp:
2884                         return true;
2885                 default:
2886                         return false;
2887                 }
2888         default:
2889                 return false;
2890         }
2891 }
2892
2893 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2894 {
2895         struct ixgbe_hw *hw = &adapter->hw;
2896         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2897
2898         if (!ixgbe_is_sfp(hw))
2899                 return;
2900
2901         /* Later MAC's use different SDP */
2902         if (hw->mac.type >= ixgbe_mac_X540)
2903                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2904
2905         if (eicr & eicr_mask) {
2906                 /* Clear the interrupt */
2907                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2908                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2909                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2910                         adapter->sfp_poll_time = 0;
2911                         ixgbe_service_event_schedule(adapter);
2912                 }
2913         }
2914
2915         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2916             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2917                 /* Clear the interrupt */
2918                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2919                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2920                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2921                         ixgbe_service_event_schedule(adapter);
2922                 }
2923         }
2924 }
2925
2926 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2927 {
2928         struct ixgbe_hw *hw = &adapter->hw;
2929
2930         adapter->lsc_int++;
2931         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2932         adapter->link_check_timeout = jiffies;
2933         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2934                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2935                 IXGBE_WRITE_FLUSH(hw);
2936                 ixgbe_service_event_schedule(adapter);
2937         }
2938 }
2939
2940 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2941                                            u64 qmask)
2942 {
2943         u32 mask;
2944         struct ixgbe_hw *hw = &adapter->hw;
2945
2946         switch (hw->mac.type) {
2947         case ixgbe_mac_82598EB:
2948                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2949                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2950                 break;
2951         case ixgbe_mac_82599EB:
2952         case ixgbe_mac_X540:
2953         case ixgbe_mac_X550:
2954         case ixgbe_mac_X550EM_x:
2955         case ixgbe_mac_x550em_a:
2956                 mask = (qmask & 0xFFFFFFFF);
2957                 if (mask)
2958                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2959                 mask = (qmask >> 32);
2960                 if (mask)
2961                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2962                 break;
2963         default:
2964                 break;
2965         }
2966         /* skip the flush */
2967 }
2968
2969 /**
2970  * ixgbe_irq_enable - Enable default interrupt generation settings
2971  * @adapter: board private structure
2972  * @queues: enable irqs for queues
2973  * @flush: flush register write
2974  **/
2975 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2976                                     bool flush)
2977 {
2978         struct ixgbe_hw *hw = &adapter->hw;
2979         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2980
2981         /* don't reenable LSC while waiting for link */
2982         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2983                 mask &= ~IXGBE_EIMS_LSC;
2984
2985         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2986                 switch (adapter->hw.mac.type) {
2987                 case ixgbe_mac_82599EB:
2988                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2989                         break;
2990                 case ixgbe_mac_X540:
2991                 case ixgbe_mac_X550:
2992                 case ixgbe_mac_X550EM_x:
2993                 case ixgbe_mac_x550em_a:
2994                         mask |= IXGBE_EIMS_TS;
2995                         break;
2996                 default:
2997                         break;
2998                 }
2999         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3000                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3001         switch (adapter->hw.mac.type) {
3002         case ixgbe_mac_82599EB:
3003                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3004                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3005                 fallthrough;
3006         case ixgbe_mac_X540:
3007         case ixgbe_mac_X550:
3008         case ixgbe_mac_X550EM_x:
3009         case ixgbe_mac_x550em_a:
3010                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3011                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3012                     adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3013                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3014                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3015                         mask |= IXGBE_EICR_GPI_SDP0_X540;
3016                 mask |= IXGBE_EIMS_ECC;
3017                 mask |= IXGBE_EIMS_MAILBOX;
3018                 break;
3019         default:
3020                 break;
3021         }
3022
3023         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3024             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3025                 mask |= IXGBE_EIMS_FLOW_DIR;
3026
3027         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3028         if (queues)
3029                 ixgbe_irq_enable_queues(adapter, ~0);
3030         if (flush)
3031                 IXGBE_WRITE_FLUSH(&adapter->hw);
3032 }
3033
3034 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3035 {
3036         struct ixgbe_adapter *adapter = data;
3037         struct ixgbe_hw *hw = &adapter->hw;
3038         u32 eicr;
3039
3040         /*
3041          * Workaround for Silicon errata.  Use clear-by-write instead
3042          * of clear-by-read.  Reading with EICS will return the
3043          * interrupt causes without clearing, which later be done
3044          * with the write to EICR.
3045          */
3046         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3047
3048         /* The lower 16bits of the EICR register are for the queue interrupts
3049          * which should be masked here in order to not accidentally clear them if
3050          * the bits are high when ixgbe_msix_other is called. There is a race
3051          * condition otherwise which results in possible performance loss
3052          * especially if the ixgbe_msix_other interrupt is triggering
3053          * consistently (as it would when PPS is turned on for the X540 device)
3054          */
3055         eicr &= 0xFFFF0000;
3056
3057         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3058
3059         if (eicr & IXGBE_EICR_LSC)
3060                 ixgbe_check_lsc(adapter);
3061
3062         if (eicr & IXGBE_EICR_MAILBOX)
3063                 ixgbe_msg_task(adapter);
3064
3065         switch (hw->mac.type) {
3066         case ixgbe_mac_82599EB:
3067         case ixgbe_mac_X540:
3068         case ixgbe_mac_X550:
3069         case ixgbe_mac_X550EM_x:
3070         case ixgbe_mac_x550em_a:
3071                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3072                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3073                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3074                         ixgbe_service_event_schedule(adapter);
3075                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
3076                                         IXGBE_EICR_GPI_SDP0_X540);
3077                 }
3078                 if (eicr & IXGBE_EICR_ECC) {
3079                         e_info(link, "Received ECC Err, initiating reset\n");
3080                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3081                         ixgbe_service_event_schedule(adapter);
3082                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3083                 }
3084                 /* Handle Flow Director Full threshold interrupt */
3085                 if (eicr & IXGBE_EICR_FLOW_DIR) {
3086                         int reinit_count = 0;
3087                         int i;
3088                         for (i = 0; i < adapter->num_tx_queues; i++) {
3089                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
3090                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3091                                                        &ring->state))
3092                                         reinit_count++;
3093                         }
3094                         if (reinit_count) {
3095                                 /* no more flow director interrupts until after init */
3096                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3097                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3098                                 ixgbe_service_event_schedule(adapter);
3099                         }
3100                 }
3101                 ixgbe_check_sfp_event(adapter, eicr);
3102                 ixgbe_check_overtemp_event(adapter, eicr);
3103                 break;
3104         default:
3105                 break;
3106         }
3107
3108         ixgbe_check_fan_failure(adapter, eicr);
3109
3110         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3111                 ixgbe_ptp_check_pps_event(adapter);
3112
3113         /* re-enable the original interrupt state, no lsc, no queues */
3114         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3115                 ixgbe_irq_enable(adapter, false, false);
3116
3117         return IRQ_HANDLED;
3118 }
3119
3120 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3121 {
3122         struct ixgbe_q_vector *q_vector = data;
3123
3124         /* EIAM disabled interrupts (on this vector) for us */
3125
3126         if (q_vector->rx.ring || q_vector->tx.ring)
3127                 napi_schedule_irqoff(&q_vector->napi);
3128
3129         return IRQ_HANDLED;
3130 }
3131
3132 /**
3133  * ixgbe_poll - NAPI Rx polling callback
3134  * @napi: structure for representing this polling device
3135  * @budget: how many packets driver is allowed to clean
3136  *
3137  * This function is used for legacy and MSI, NAPI mode
3138  **/
3139 int ixgbe_poll(struct napi_struct *napi, int budget)
3140 {
3141         struct ixgbe_q_vector *q_vector =
3142                                 container_of(napi, struct ixgbe_q_vector, napi);
3143         struct ixgbe_adapter *adapter = q_vector->adapter;
3144         struct ixgbe_ring *ring;
3145         int per_ring_budget, work_done = 0;
3146         bool clean_complete = true;
3147
3148 #ifdef CONFIG_IXGBE_DCA
3149         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3150                 ixgbe_update_dca(q_vector);
3151 #endif
3152
3153         ixgbe_for_each_ring(ring, q_vector->tx) {
3154                 bool wd = ring->xsk_pool ?
3155                           ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3156                           ixgbe_clean_tx_irq(q_vector, ring, budget);
3157
3158                 if (!wd)
3159                         clean_complete = false;
3160         }
3161
3162         /* Exit if we are called by netpoll */
3163         if (budget <= 0)
3164                 return budget;
3165
3166         /* attempt to distribute budget to each queue fairly, but don't allow
3167          * the budget to go below 1 because we'll exit polling */
3168         if (q_vector->rx.count > 1)
3169                 per_ring_budget = max(budget/q_vector->rx.count, 1);
3170         else
3171                 per_ring_budget = budget;
3172
3173         ixgbe_for_each_ring(ring, q_vector->rx) {
3174                 int cleaned = ring->xsk_pool ?
3175                               ixgbe_clean_rx_irq_zc(q_vector, ring,
3176                                                     per_ring_budget) :
3177                               ixgbe_clean_rx_irq(q_vector, ring,
3178                                                  per_ring_budget);
3179
3180                 work_done += cleaned;
3181                 if (cleaned >= per_ring_budget)
3182                         clean_complete = false;
3183         }
3184
3185         /* If all work not completed, return budget and keep polling */
3186         if (!clean_complete)
3187                 return budget;
3188
3189         /* all work done, exit the polling mode */
3190         if (likely(napi_complete_done(napi, work_done))) {
3191                 if (adapter->rx_itr_setting & 1)
3192                         ixgbe_set_itr(q_vector);
3193                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3194                         ixgbe_irq_enable_queues(adapter,
3195                                                 BIT_ULL(q_vector->v_idx));
3196         }
3197
3198         return min(work_done, budget - 1);
3199 }
3200
3201 /**
3202  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3203  * @adapter: board private structure
3204  *
3205  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3206  * interrupts from the kernel.
3207  **/
3208 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3209 {
3210         struct net_device *netdev = adapter->netdev;
3211         unsigned int ri = 0, ti = 0;
3212         int vector, err;
3213
3214         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3215                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3216                 struct msix_entry *entry = &adapter->msix_entries[vector];
3217
3218                 if (q_vector->tx.ring && q_vector->rx.ring) {
3219                         snprintf(q_vector->name, sizeof(q_vector->name),
3220                                  "%s-TxRx-%u", netdev->name, ri++);
3221                         ti++;
3222                 } else if (q_vector->rx.ring) {
3223                         snprintf(q_vector->name, sizeof(q_vector->name),
3224                                  "%s-rx-%u", netdev->name, ri++);
3225                 } else if (q_vector->tx.ring) {
3226                         snprintf(q_vector->name, sizeof(q_vector->name),
3227                                  "%s-tx-%u", netdev->name, ti++);
3228                 } else {
3229                         /* skip this unused q_vector */
3230                         continue;
3231                 }
3232                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3233                                   q_vector->name, q_vector);
3234                 if (err) {
3235                         e_err(probe, "request_irq failed for MSIX interrupt "
3236                               "Error: %d\n", err);
3237                         goto free_queue_irqs;
3238                 }
3239                 /* If Flow Director is enabled, set interrupt affinity */
3240                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3241                         /* assign the mask for this irq */
3242                         irq_set_affinity_hint(entry->vector,
3243                                               &q_vector->affinity_mask);
3244                 }
3245         }
3246
3247         err = request_irq(adapter->msix_entries[vector].vector,
3248                           ixgbe_msix_other, 0, netdev->name, adapter);
3249         if (err) {
3250                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3251                 goto free_queue_irqs;
3252         }
3253
3254         return 0;
3255
3256 free_queue_irqs:
3257         while (vector) {
3258                 vector--;
3259                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3260                                       NULL);
3261                 free_irq(adapter->msix_entries[vector].vector,
3262                          adapter->q_vector[vector]);
3263         }
3264         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3265         pci_disable_msix(adapter->pdev);
3266         kfree(adapter->msix_entries);
3267         adapter->msix_entries = NULL;
3268         return err;
3269 }
3270
3271 /**
3272  * ixgbe_intr - legacy mode Interrupt Handler
3273  * @irq: interrupt number
3274  * @data: pointer to a network interface device structure
3275  **/
3276 static irqreturn_t ixgbe_intr(int irq, void *data)
3277 {
3278         struct ixgbe_adapter *adapter = data;
3279         struct ixgbe_hw *hw = &adapter->hw;
3280         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3281         u32 eicr;
3282
3283         /*
3284          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
3285          * before the read of EICR.
3286          */
3287         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3288
3289         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3290          * therefore no explicit interrupt disable is necessary */
3291         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3292         if (!eicr) {
3293                 /*
3294                  * shared interrupt alert!
3295                  * make sure interrupts are enabled because the read will
3296                  * have disabled interrupts due to EIAM
3297                  * finish the workaround of silicon errata on 82598.  Unmask
3298                  * the interrupt that we masked before the EICR read.
3299                  */
3300                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3301                         ixgbe_irq_enable(adapter, true, true);
3302                 return IRQ_NONE;        /* Not our interrupt */
3303         }
3304
3305         if (eicr & IXGBE_EICR_LSC)
3306                 ixgbe_check_lsc(adapter);
3307
3308         switch (hw->mac.type) {
3309         case ixgbe_mac_82599EB:
3310                 ixgbe_check_sfp_event(adapter, eicr);
3311                 fallthrough;
3312         case ixgbe_mac_X540:
3313         case ixgbe_mac_X550:
3314         case ixgbe_mac_X550EM_x:
3315         case ixgbe_mac_x550em_a:
3316                 if (eicr & IXGBE_EICR_ECC) {
3317                         e_info(link, "Received ECC Err, initiating reset\n");
3318                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3319                         ixgbe_service_event_schedule(adapter);
3320                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3321                 }
3322                 ixgbe_check_overtemp_event(adapter, eicr);
3323                 break;
3324         default:
3325                 break;
3326         }
3327
3328         ixgbe_check_fan_failure(adapter, eicr);
3329         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3330                 ixgbe_ptp_check_pps_event(adapter);
3331
3332         /* would disable interrupts here but EIAM disabled it */
3333         napi_schedule_irqoff(&q_vector->napi);
3334
3335         /*
3336          * re-enable link(maybe) and non-queue interrupts, no flush.
3337          * ixgbe_poll will re-enable the queue interrupts
3338          */
3339         if (!test_bit(__IXGBE_DOWN, &adapter->state))
3340                 ixgbe_irq_enable(adapter, false, false);
3341
3342         return IRQ_HANDLED;
3343 }
3344
3345 /**
3346  * ixgbe_request_irq - initialize interrupts
3347  * @adapter: board private structure
3348  *
3349  * Attempts to configure interrupts using the best available
3350  * capabilities of the hardware and kernel.
3351  **/
3352 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3353 {
3354         struct net_device *netdev = adapter->netdev;
3355         int err;
3356
3357         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3358                 err = ixgbe_request_msix_irqs(adapter);
3359         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3360                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3361                                   netdev->name, adapter);
3362         else
3363                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3364                                   netdev->name, adapter);
3365
3366         if (err)
3367                 e_err(probe, "request_irq failed, Error %d\n", err);
3368
3369         return err;
3370 }
3371
3372 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3373 {
3374         int vector;
3375
3376         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3377                 free_irq(adapter->pdev->irq, adapter);
3378                 return;
3379         }
3380
3381         if (!adapter->msix_entries)
3382                 return;
3383
3384         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3385                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3386                 struct msix_entry *entry = &adapter->msix_entries[vector];
3387
3388                 /* free only the irqs that were actually requested */
3389                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3390                         continue;
3391
3392                 /* clear the affinity_mask in the IRQ descriptor */
3393                 irq_set_affinity_hint(entry->vector, NULL);
3394
3395                 free_irq(entry->vector, q_vector);
3396         }
3397
3398         free_irq(adapter->msix_entries[vector].vector, adapter);
3399 }
3400
3401 /**
3402  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3403  * @adapter: board private structure
3404  **/
3405 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3406 {
3407         switch (adapter->hw.mac.type) {
3408         case ixgbe_mac_82598EB:
3409                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3410                 break;
3411         case ixgbe_mac_82599EB:
3412         case ixgbe_mac_X540:
3413         case ixgbe_mac_X550:
3414         case ixgbe_mac_X550EM_x:
3415         case ixgbe_mac_x550em_a:
3416                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3417                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3418                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3419                 break;
3420         default:
3421                 break;
3422         }
3423         IXGBE_WRITE_FLUSH(&adapter->hw);
3424         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3425                 int vector;
3426
3427                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3428                         synchronize_irq(adapter->msix_entries[vector].vector);
3429
3430                 synchronize_irq(adapter->msix_entries[vector++].vector);
3431         } else {
3432                 synchronize_irq(adapter->pdev->irq);
3433         }
3434 }
3435
3436 /**
3437  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3438  * @adapter: board private structure
3439  *
3440  **/
3441 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3442 {
3443         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3444
3445         ixgbe_write_eitr(q_vector);
3446
3447         ixgbe_set_ivar(adapter, 0, 0, 0);
3448         ixgbe_set_ivar(adapter, 1, 0, 0);
3449
3450         e_info(hw, "Legacy interrupt IVAR setup done\n");
3451 }
3452
3453 /**
3454  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3455  * @adapter: board private structure
3456  * @ring: structure containing ring specific data
3457  *
3458  * Configure the Tx descriptor ring after a reset.
3459  **/
3460 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3461                              struct ixgbe_ring *ring)
3462 {
3463         struct ixgbe_hw *hw = &adapter->hw;
3464         u64 tdba = ring->dma;
3465         int wait_loop = 10;
3466         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3467         u8 reg_idx = ring->reg_idx;
3468
3469         ring->xsk_pool = NULL;
3470         if (ring_is_xdp(ring))
3471                 ring->xsk_pool = ixgbe_xsk_pool(adapter, ring);
3472
3473         /* disable queue to avoid issues while updating state */
3474         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3475         IXGBE_WRITE_FLUSH(hw);
3476
3477         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3478                         (tdba & DMA_BIT_MASK(32)));
3479         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3480         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3481                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3482         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3483         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3484         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3485
3486         /*
3487          * set WTHRESH to encourage burst writeback, it should not be set
3488          * higher than 1 when:
3489          * - ITR is 0 as it could cause false TX hangs
3490          * - ITR is set to > 100k int/sec and BQL is enabled
3491          *
3492          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3493          * to or less than the number of on chip descriptors, which is
3494          * currently 40.
3495          */
3496         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3497                 txdctl |= 1u << 16;     /* WTHRESH = 1 */
3498         else
3499                 txdctl |= 8u << 16;     /* WTHRESH = 8 */
3500
3501         /*
3502          * Setting PTHRESH to 32 both improves performance
3503          * and avoids a TX hang with DFP enabled
3504          */
3505         txdctl |= (1u << 8) |   /* HTHRESH = 1 */
3506                    32;          /* PTHRESH = 32 */
3507
3508         /* reinitialize flowdirector state */
3509         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3510                 ring->atr_sample_rate = adapter->atr_sample_rate;
3511                 ring->atr_count = 0;
3512                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3513         } else {
3514                 ring->atr_sample_rate = 0;
3515         }
3516
3517         /* initialize XPS */
3518         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3519                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3520
3521                 if (q_vector)
3522                         netif_set_xps_queue(ring->netdev,
3523                                             &q_vector->affinity_mask,
3524                                             ring->queue_index);
3525         }
3526
3527         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3528
3529         /* reinitialize tx_buffer_info */
3530         memset(ring->tx_buffer_info, 0,
3531                sizeof(struct ixgbe_tx_buffer) * ring->count);
3532
3533         /* enable queue */
3534         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3535
3536         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3537         if (hw->mac.type == ixgbe_mac_82598EB &&
3538             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3539                 return;
3540
3541         /* poll to verify queue is enabled */
3542         do {
3543                 usleep_range(1000, 2000);
3544                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3545         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3546         if (!wait_loop)
3547                 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3548 }
3549
3550 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3551 {
3552         struct ixgbe_hw *hw = &adapter->hw;
3553         u32 rttdcs, mtqc;
3554         u8 tcs = adapter->hw_tcs;
3555
3556         if (hw->mac.type == ixgbe_mac_82598EB)
3557                 return;
3558
3559         /* disable the arbiter while setting MTQC */
3560         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3561         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3562         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3563
3564         /* set transmit pool layout */
3565         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3566                 mtqc = IXGBE_MTQC_VT_ENA;
3567                 if (tcs > 4)
3568                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3569                 else if (tcs > 1)
3570                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3571                 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3572                          IXGBE_82599_VMDQ_4Q_MASK)
3573                         mtqc |= IXGBE_MTQC_32VF;
3574                 else
3575                         mtqc |= IXGBE_MTQC_64VF;
3576         } else {
3577                 if (tcs > 4) {
3578                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3579                 } else if (tcs > 1) {
3580                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3581                 } else {
3582                         u8 max_txq = adapter->num_tx_queues +
3583                                 adapter->num_xdp_queues;
3584                         if (max_txq > 63)
3585                                 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3586                         else
3587                                 mtqc = IXGBE_MTQC_64Q_1PB;
3588                 }
3589         }
3590
3591         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3592
3593         /* Enable Security TX Buffer IFG for multiple pb */
3594         if (tcs) {
3595                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3596                 sectx |= IXGBE_SECTX_DCB;
3597                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3598         }
3599
3600         /* re-enable the arbiter */
3601         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3602         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3603 }
3604
3605 /**
3606  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3607  * @adapter: board private structure
3608  *
3609  * Configure the Tx unit of the MAC after a reset.
3610  **/
3611 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3612 {
3613         struct ixgbe_hw *hw = &adapter->hw;
3614         u32 dmatxctl;
3615         u32 i;
3616
3617         ixgbe_setup_mtqc(adapter);
3618
3619         if (hw->mac.type != ixgbe_mac_82598EB) {
3620                 /* DMATXCTL.EN must be before Tx queues are enabled */
3621                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3622                 dmatxctl |= IXGBE_DMATXCTL_TE;
3623                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3624         }
3625
3626         /* Setup the HW Tx Head and Tail descriptor pointers */
3627         for (i = 0; i < adapter->num_tx_queues; i++)
3628                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3629         for (i = 0; i < adapter->num_xdp_queues; i++)
3630                 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3631 }
3632
3633 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3634                                  struct ixgbe_ring *ring)
3635 {
3636         struct ixgbe_hw *hw = &adapter->hw;
3637         u8 reg_idx = ring->reg_idx;
3638         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3639
3640         srrctl |= IXGBE_SRRCTL_DROP_EN;
3641
3642         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3643 }
3644
3645 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3646                                   struct ixgbe_ring *ring)
3647 {
3648         struct ixgbe_hw *hw = &adapter->hw;
3649         u8 reg_idx = ring->reg_idx;
3650         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3651
3652         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3653
3654         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3655 }
3656
3657 #ifdef CONFIG_IXGBE_DCB
3658 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3659 #else
3660 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3661 #endif
3662 {
3663         int i;
3664         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3665
3666         if (adapter->ixgbe_ieee_pfc)
3667                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3668
3669         /*
3670          * We should set the drop enable bit if:
3671          *  SR-IOV is enabled
3672          *   or
3673          *  Number of Rx queues > 1 and flow control is disabled
3674          *
3675          *  This allows us to avoid head of line blocking for security
3676          *  and performance reasons.
3677          */
3678         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3679             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3680                 for (i = 0; i < adapter->num_rx_queues; i++)
3681                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3682         } else {
3683                 for (i = 0; i < adapter->num_rx_queues; i++)
3684                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3685         }
3686 }
3687
3688 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3689
3690 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3691                                    struct ixgbe_ring *rx_ring)
3692 {
3693         struct ixgbe_hw *hw = &adapter->hw;
3694         u32 srrctl;
3695         u8 reg_idx = rx_ring->reg_idx;
3696
3697         if (hw->mac.type == ixgbe_mac_82598EB) {
3698                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3699
3700                 /*
3701                  * if VMDq is not active we must program one srrctl register
3702                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3703                  */
3704                 reg_idx &= mask;
3705         }
3706
3707         /* configure header buffer length, needed for RSC */
3708         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3709
3710         /* configure the packet buffer length */
3711         if (rx_ring->xsk_pool) {
3712                 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(rx_ring->xsk_pool);
3713
3714                 /* If the MAC support setting RXDCTL.RLPML, the
3715                  * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3716                  * RXDCTL.RLPML is set to the actual UMEM buffer
3717                  * size. If not, then we are stuck with a 1k buffer
3718                  * size resolution. In this case frames larger than
3719                  * the UMEM buffer size viewed in a 1k resolution will
3720                  * be dropped.
3721                  */
3722                 if (hw->mac.type != ixgbe_mac_82599EB)
3723                         srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3724                 else
3725                         srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3726         } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3727                 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3728         } else {
3729                 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3730         }
3731
3732         /* configure descriptor type */
3733         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3734
3735         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3736 }
3737
3738 /**
3739  * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3740  * @adapter: device handle
3741  *
3742  *  - 82598/82599/X540:     128
3743  *  - X550(non-SRIOV mode): 512
3744  *  - X550(SRIOV mode):     64
3745  */
3746 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3747 {
3748         if (adapter->hw.mac.type < ixgbe_mac_X550)
3749                 return 128;
3750         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3751                 return 64;
3752         else
3753                 return 512;
3754 }
3755
3756 /**
3757  * ixgbe_store_key - Write the RSS key to HW
3758  * @adapter: device handle
3759  *
3760  * Write the RSS key stored in adapter.rss_key to HW.
3761  */
3762 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3763 {
3764         struct ixgbe_hw *hw = &adapter->hw;
3765         int i;
3766
3767         for (i = 0; i < 10; i++)
3768                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3769 }
3770
3771 /**
3772  * ixgbe_init_rss_key - Initialize adapter RSS key
3773  * @adapter: device handle
3774  *
3775  * Allocates and initializes the RSS key if it is not allocated.
3776  **/
3777 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3778 {
3779         u32 *rss_key;
3780
3781         if (!adapter->rss_key) {
3782                 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3783                 if (unlikely(!rss_key))
3784                         return -ENOMEM;
3785
3786                 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3787                 adapter->rss_key = rss_key;
3788         }
3789
3790         return 0;
3791 }
3792
3793 /**
3794  * ixgbe_store_reta - Write the RETA table to HW
3795  * @adapter: device handle
3796  *
3797  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3798  */
3799 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3800 {
3801         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3802         struct ixgbe_hw *hw = &adapter->hw;
3803         u32 reta = 0;
3804         u32 indices_multi;
3805         u8 *indir_tbl = adapter->rss_indir_tbl;
3806
3807         /* Fill out the redirection table as follows:
3808          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3809          *    indices.
3810          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3811          *  - X550:       8 bit wide entries containing 6 bit RSS index
3812          */
3813         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3814                 indices_multi = 0x11;
3815         else
3816                 indices_multi = 0x1;
3817
3818         /* Write redirection table to HW */
3819         for (i = 0; i < reta_entries; i++) {
3820                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3821                 if ((i & 3) == 3) {
3822                         if (i < 128)
3823                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3824                         else
3825                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3826                                                 reta);
3827                         reta = 0;
3828                 }
3829         }
3830 }
3831
3832 /**
3833  * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3834  * @adapter: device handle
3835  *
3836  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3837  */
3838 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3839 {
3840         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3841         struct ixgbe_hw *hw = &adapter->hw;
3842         u32 vfreta = 0;
3843
3844         /* Write redirection table to HW */
3845         for (i = 0; i < reta_entries; i++) {
3846                 u16 pool = adapter->num_rx_pools;
3847
3848                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3849                 if ((i & 3) != 3)
3850                         continue;
3851
3852                 while (pool--)
3853                         IXGBE_WRITE_REG(hw,
3854                                         IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3855                                         vfreta);
3856                 vfreta = 0;
3857         }
3858 }
3859
3860 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3861 {
3862         u32 i, j;
3863         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3864         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3865
3866         /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3867          * make full use of any rings they may have.  We will use the
3868          * PSRTYPE register to control how many rings we use within the PF.
3869          */
3870         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3871                 rss_i = 4;
3872
3873         /* Fill out hash function seeds */
3874         ixgbe_store_key(adapter);
3875
3876         /* Fill out redirection table */
3877         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3878
3879         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3880                 if (j == rss_i)
3881                         j = 0;
3882
3883                 adapter->rss_indir_tbl[i] = j;
3884         }
3885
3886         ixgbe_store_reta(adapter);
3887 }
3888
3889 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3890 {
3891         struct ixgbe_hw *hw = &adapter->hw;
3892         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3893         int i, j;
3894
3895         /* Fill out hash function seeds */
3896         for (i = 0; i < 10; i++) {
3897                 u16 pool = adapter->num_rx_pools;
3898
3899                 while (pool--)
3900                         IXGBE_WRITE_REG(hw,
3901                                         IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3902                                         *(adapter->rss_key + i));
3903         }
3904
3905         /* Fill out the redirection table */
3906         for (i = 0, j = 0; i < 64; i++, j++) {
3907                 if (j == rss_i)
3908                         j = 0;
3909
3910                 adapter->rss_indir_tbl[i] = j;
3911         }
3912
3913         ixgbe_store_vfreta(adapter);
3914 }
3915
3916 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3917 {
3918         struct ixgbe_hw *hw = &adapter->hw;
3919         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3920         u32 rxcsum;
3921
3922         /* Disable indicating checksum in descriptor, enables RSS hash */
3923         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3924         rxcsum |= IXGBE_RXCSUM_PCSD;
3925         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3926
3927         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3928                 if (adapter->ring_feature[RING_F_RSS].mask)
3929                         mrqc = IXGBE_MRQC_RSSEN;
3930         } else {
3931                 u8 tcs = adapter->hw_tcs;
3932
3933                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3934                         if (tcs > 4)
3935                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3936                         else if (tcs > 1)
3937                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3938                         else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3939                                  IXGBE_82599_VMDQ_4Q_MASK)
3940                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3941                         else
3942                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3943
3944                         /* Enable L3/L4 for Tx Switched packets only for X550,
3945                          * older devices do not support this feature
3946                          */
3947                         if (hw->mac.type >= ixgbe_mac_X550)
3948                                 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3949                 } else {
3950                         if (tcs > 4)
3951                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3952                         else if (tcs > 1)
3953                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3954                         else
3955                                 mrqc = IXGBE_MRQC_RSSEN;
3956                 }
3957         }
3958
3959         /* Perform hash on these packet types */
3960         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3961                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3962                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3963                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3964
3965         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3966                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3967         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3968                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3969
3970         if ((hw->mac.type >= ixgbe_mac_X550) &&
3971             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3972                 u16 pool = adapter->num_rx_pools;
3973
3974                 /* Enable VF RSS mode */
3975                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3976                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3977
3978                 /* Setup RSS through the VF registers */
3979                 ixgbe_setup_vfreta(adapter);
3980                 vfmrqc = IXGBE_MRQC_RSSEN;
3981                 vfmrqc |= rss_field;
3982
3983                 while (pool--)
3984                         IXGBE_WRITE_REG(hw,
3985                                         IXGBE_PFVFMRQC(VMDQ_P(pool)),
3986                                         vfmrqc);
3987         } else {
3988                 ixgbe_setup_reta(adapter);
3989                 mrqc |= rss_field;
3990                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3991         }
3992 }
3993
3994 /**
3995  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3996  * @adapter: address of board private structure
3997  * @ring: structure containing ring specific data
3998  **/
3999 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4000                                    struct ixgbe_ring *ring)
4001 {
4002         struct ixgbe_hw *hw = &adapter->hw;
4003         u32 rscctrl;
4004         u8 reg_idx = ring->reg_idx;
4005
4006         if (!ring_is_rsc_enabled(ring))
4007                 return;
4008
4009         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4010         rscctrl |= IXGBE_RSCCTL_RSCEN;
4011         /*
4012          * we must limit the number of descriptors so that the
4013          * total size of max desc * buf_len is not greater
4014          * than 65536
4015          */
4016         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4017         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4018 }
4019
4020 #define IXGBE_MAX_RX_DESC_POLL 10
4021 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4022                                        struct ixgbe_ring *ring)
4023 {
4024         struct ixgbe_hw *hw = &adapter->hw;
4025         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4026         u32 rxdctl;
4027         u8 reg_idx = ring->reg_idx;
4028
4029         if (ixgbe_removed(hw->hw_addr))
4030                 return;
4031         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4032         if (hw->mac.type == ixgbe_mac_82598EB &&
4033             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4034                 return;
4035
4036         do {
4037                 usleep_range(1000, 2000);
4038                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4039         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4040
4041         if (!wait_loop) {
4042                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4043                       "the polling period\n", reg_idx);
4044         }
4045 }
4046
4047 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4048                              struct ixgbe_ring *ring)
4049 {
4050         struct ixgbe_hw *hw = &adapter->hw;
4051         union ixgbe_adv_rx_desc *rx_desc;
4052         u64 rdba = ring->dma;
4053         u32 rxdctl;
4054         u8 reg_idx = ring->reg_idx;
4055
4056         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4057         ring->xsk_pool = ixgbe_xsk_pool(adapter, ring);
4058         if (ring->xsk_pool) {
4059                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4060                                                    MEM_TYPE_XSK_BUFF_POOL,
4061                                                    NULL));
4062                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
4063         } else {
4064                 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4065                                                    MEM_TYPE_PAGE_SHARED, NULL));
4066         }
4067
4068         /* disable queue to avoid use of these values while updating state */
4069         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4070         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4071
4072         /* write value back with RXDCTL.ENABLE bit cleared */
4073         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4074         IXGBE_WRITE_FLUSH(hw);
4075
4076         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4077         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4078         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4079                         ring->count * sizeof(union ixgbe_adv_rx_desc));
4080         /* Force flushing of IXGBE_RDLEN to prevent MDD */
4081         IXGBE_WRITE_FLUSH(hw);
4082
4083         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4084         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4085         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4086
4087         ixgbe_configure_srrctl(adapter, ring);
4088         ixgbe_configure_rscctl(adapter, ring);
4089
4090         if (hw->mac.type == ixgbe_mac_82598EB) {
4091                 /*
4092                  * enable cache line friendly hardware writes:
4093                  * PTHRESH=32 descriptors (half the internal cache),
4094                  * this also removes ugly rx_no_buffer_count increment
4095                  * HTHRESH=4 descriptors (to minimize latency on fetch)
4096                  * WTHRESH=8 burst writeback up to two cache lines
4097                  */
4098                 rxdctl &= ~0x3FFFFF;
4099                 rxdctl |=  0x080420;
4100 #if (PAGE_SIZE < 8192)
4101         /* RXDCTL.RLPML does not work on 82599 */
4102         } else if (hw->mac.type != ixgbe_mac_82599EB) {
4103                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4104                             IXGBE_RXDCTL_RLPML_EN);
4105
4106                 /* Limit the maximum frame size so we don't overrun the skb.
4107                  * This can happen in SRIOV mode when the MTU of the VF is
4108                  * higher than the MTU of the PF.
4109                  */
4110                 if (ring_uses_build_skb(ring) &&
4111                     !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4112                         rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4113                                   IXGBE_RXDCTL_RLPML_EN;
4114 #endif
4115         }
4116
4117         if (ring->xsk_pool && hw->mac.type != ixgbe_mac_82599EB) {
4118                 u32 xsk_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
4119
4120                 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4121                             IXGBE_RXDCTL_RLPML_EN);
4122                 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4123
4124                 ring->rx_buf_len = xsk_buf_len;
4125         }
4126
4127         /* initialize rx_buffer_info */
4128         memset(ring->rx_buffer_info, 0,
4129                sizeof(struct ixgbe_rx_buffer) * ring->count);
4130
4131         /* initialize Rx descriptor 0 */
4132         rx_desc = IXGBE_RX_DESC(ring, 0);
4133         rx_desc->wb.upper.length = 0;
4134
4135         /* enable receive descriptor ring */
4136         rxdctl |= IXGBE_RXDCTL_ENABLE;
4137         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4138
4139         ixgbe_rx_desc_queue_enable(adapter, ring);
4140         if (ring->xsk_pool)
4141                 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4142         else
4143                 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4144 }
4145
4146 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4147 {
4148         struct ixgbe_hw *hw = &adapter->hw;
4149         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4150         u16 pool = adapter->num_rx_pools;
4151
4152         /* PSRTYPE must be initialized in non 82598 adapters */
4153         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4154                       IXGBE_PSRTYPE_UDPHDR |
4155                       IXGBE_PSRTYPE_IPV4HDR |
4156                       IXGBE_PSRTYPE_L2HDR |
4157                       IXGBE_PSRTYPE_IPV6HDR;
4158
4159         if (hw->mac.type == ixgbe_mac_82598EB)
4160                 return;
4161
4162         if (rss_i > 3)
4163                 psrtype |= 2u << 29;
4164         else if (rss_i > 1)
4165                 psrtype |= 1u << 29;
4166
4167         while (pool--)
4168                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4169 }
4170
4171 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4172 {
4173         struct ixgbe_hw *hw = &adapter->hw;
4174         u16 pool = adapter->num_rx_pools;
4175         u32 reg_offset, vf_shift, vmolr;
4176         u32 gcr_ext, vmdctl;
4177         int i;
4178
4179         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4180                 return;
4181
4182         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4183         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4184         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4185         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4186         vmdctl |= IXGBE_VT_CTL_REPLEN;
4187         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4188
4189         /* accept untagged packets until a vlan tag is
4190          * specifically set for the VMDQ queue/pool
4191          */
4192         vmolr = IXGBE_VMOLR_AUPE;
4193         while (pool--)
4194                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4195
4196         vf_shift = VMDQ_P(0) % 32;
4197         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4198
4199         /* Enable only the PF's pool for Tx/Rx */
4200         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4201         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4202         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4203         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4204         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4205                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4206
4207         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4208         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4209
4210         /* clear VLAN promisc flag so VFTA will be updated if necessary */
4211         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4212
4213         /*
4214          * Set up VF register offsets for selected VT Mode,
4215          * i.e. 32 or 64 VFs for SR-IOV
4216          */
4217         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4218         case IXGBE_82599_VMDQ_8Q_MASK:
4219                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4220                 break;
4221         case IXGBE_82599_VMDQ_4Q_MASK:
4222                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4223                 break;
4224         default:
4225                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4226                 break;
4227         }
4228
4229         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4230
4231         for (i = 0; i < adapter->num_vfs; i++) {
4232                 /* configure spoof checking */
4233                 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4234                                           adapter->vfinfo[i].spoofchk_enabled);
4235
4236                 /* Enable/Disable RSS query feature  */
4237                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4238                                           adapter->vfinfo[i].rss_query_enabled);
4239         }
4240 }
4241
4242 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4243 {
4244         struct ixgbe_hw *hw = &adapter->hw;
4245         struct net_device *netdev = adapter->netdev;
4246         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4247         struct ixgbe_ring *rx_ring;
4248         int i;
4249         u32 mhadd, hlreg0;
4250
4251 #ifdef IXGBE_FCOE
4252         /* adjust max frame to be able to do baby jumbo for FCoE */
4253         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4254             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4255                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4256
4257 #endif /* IXGBE_FCOE */
4258
4259         /* adjust max frame to be at least the size of a standard frame */
4260         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4261                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4262
4263         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4264         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4265                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4266                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4267
4268                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4269         }
4270
4271         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4272         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4273         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4274         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4275
4276         /*
4277          * Setup the HW Rx Head and Tail Descriptor Pointers and
4278          * the Base and Length of the Rx Descriptor Ring
4279          */
4280         for (i = 0; i < adapter->num_rx_queues; i++) {
4281                 rx_ring = adapter->rx_ring[i];
4282
4283                 clear_ring_rsc_enabled(rx_ring);
4284                 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4285                 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4286
4287                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4288                         set_ring_rsc_enabled(rx_ring);
4289
4290                 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4291                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4292
4293                 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4294                         continue;
4295
4296                 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4297
4298 #if (PAGE_SIZE < 8192)
4299                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4300                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4301
4302                 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4303                     (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4304                         set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4305 #endif
4306         }
4307 }
4308
4309 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4310 {
4311         struct ixgbe_hw *hw = &adapter->hw;
4312         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4313
4314         switch (hw->mac.type) {
4315         case ixgbe_mac_82598EB:
4316                 /*
4317                  * For VMDq support of different descriptor types or
4318                  * buffer sizes through the use of multiple SRRCTL
4319                  * registers, RDRXCTL.MVMEN must be set to 1
4320                  *
4321                  * also, the manual doesn't mention it clearly but DCA hints
4322                  * will only use queue 0's tags unless this bit is set.  Side
4323                  * effects of setting this bit are only that SRRCTL must be
4324                  * fully programmed [0..15]
4325                  */
4326                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4327                 break;
4328         case ixgbe_mac_X550:
4329         case ixgbe_mac_X550EM_x:
4330         case ixgbe_mac_x550em_a:
4331                 if (adapter->num_vfs)
4332                         rdrxctl |= IXGBE_RDRXCTL_PSP;
4333                 fallthrough;
4334         case ixgbe_mac_82599EB:
4335         case ixgbe_mac_X540:
4336                 /* Disable RSC for ACK packets */
4337                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4338                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4339                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4340                 /* hardware requires some bits to be set by default */
4341                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4342                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4343                 break;
4344         default:
4345                 /* We should do nothing since we don't know this hardware */
4346                 return;
4347         }
4348
4349         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4350 }
4351
4352 /**
4353  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4354  * @adapter: board private structure
4355  *
4356  * Configure the Rx unit of the MAC after a reset.
4357  **/
4358 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4359 {
4360         struct ixgbe_hw *hw = &adapter->hw;
4361         int i;
4362         u32 rxctrl, rfctl;
4363
4364         /* disable receives while setting up the descriptors */
4365         hw->mac.ops.disable_rx(hw);
4366
4367         ixgbe_setup_psrtype(adapter);
4368         ixgbe_setup_rdrxctl(adapter);
4369
4370         /* RSC Setup */
4371         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4372         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4373         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4374                 rfctl |= IXGBE_RFCTL_RSC_DIS;
4375
4376         /* disable NFS filtering */
4377         rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4378         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4379
4380         /* Program registers for the distribution of queues */
4381         ixgbe_setup_mrqc(adapter);
4382
4383         /* set_rx_buffer_len must be called before ring initialization */
4384         ixgbe_set_rx_buffer_len(adapter);
4385
4386         /*
4387          * Setup the HW Rx Head and Tail Descriptor Pointers and
4388          * the Base and Length of the Rx Descriptor Ring
4389          */
4390         for (i = 0; i < adapter->num_rx_queues; i++)
4391                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4392
4393         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4394         /* disable drop enable for 82598 parts */
4395         if (hw->mac.type == ixgbe_mac_82598EB)
4396                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4397
4398         /* enable all receives */
4399         rxctrl |= IXGBE_RXCTRL_RXEN;
4400         hw->mac.ops.enable_rx_dma(hw, rxctrl);
4401 }
4402
4403 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4404                                  __be16 proto, u16 vid)
4405 {
4406         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4407         struct ixgbe_hw *hw = &adapter->hw;
4408
4409         /* add VID to filter table */
4410         if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4411                 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4412
4413         set_bit(vid, adapter->active_vlans);
4414
4415         return 0;
4416 }
4417
4418 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4419 {
4420         u32 vlvf;
4421         int idx;
4422
4423         /* short cut the special case */
4424         if (vlan == 0)
4425                 return 0;
4426
4427         /* Search for the vlan id in the VLVF entries */
4428         for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4429                 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4430                 if ((vlvf & VLAN_VID_MASK) == vlan)
4431                         break;
4432         }
4433
4434         return idx;
4435 }
4436
4437 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4438 {
4439         struct ixgbe_hw *hw = &adapter->hw;
4440         u32 bits, word;
4441         int idx;
4442
4443         idx = ixgbe_find_vlvf_entry(hw, vid);
4444         if (!idx)
4445                 return;
4446
4447         /* See if any other pools are set for this VLAN filter
4448          * entry other than the PF.
4449          */
4450         word = idx * 2 + (VMDQ_P(0) / 32);
4451         bits = ~BIT(VMDQ_P(0) % 32);
4452         bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4453
4454         /* Disable the filter so this falls into the default pool. */
4455         if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4456                 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4457                         IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4458                 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4459         }
4460 }
4461
4462 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4463                                   __be16 proto, u16 vid)
4464 {
4465         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4466         struct ixgbe_hw *hw = &adapter->hw;
4467
4468         /* remove VID from filter table */
4469         if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4470                 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4471
4472         clear_bit(vid, adapter->active_vlans);
4473
4474         return 0;
4475 }
4476
4477 /**
4478  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4479  * @adapter: driver data
4480  */
4481 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4482 {
4483         struct ixgbe_hw *hw = &adapter->hw;
4484         u32 vlnctrl;
4485         int i, j;
4486
4487         switch (hw->mac.type) {
4488         case ixgbe_mac_82598EB:
4489                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4490                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4491                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4492                 break;
4493         case ixgbe_mac_82599EB:
4494         case ixgbe_mac_X540:
4495         case ixgbe_mac_X550:
4496         case ixgbe_mac_X550EM_x:
4497         case ixgbe_mac_x550em_a:
4498                 for (i = 0; i < adapter->num_rx_queues; i++) {
4499                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4500
4501                         if (!netif_is_ixgbe(ring->netdev))
4502                                 continue;
4503
4504                         j = ring->reg_idx;
4505                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4506                         vlnctrl &= ~IXGBE_RXDCTL_VME;
4507                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4508                 }
4509                 break;
4510         default:
4511                 break;
4512         }
4513 }
4514
4515 /**
4516  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4517  * @adapter: driver data
4518  */
4519 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4520 {
4521         struct ixgbe_hw *hw = &adapter->hw;
4522         u32 vlnctrl;
4523         int i, j;
4524
4525         switch (hw->mac.type) {
4526         case ixgbe_mac_82598EB:
4527                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4528                 vlnctrl |= IXGBE_VLNCTRL_VME;
4529                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4530                 break;
4531         case ixgbe_mac_82599EB:
4532         case ixgbe_mac_X540:
4533         case ixgbe_mac_X550:
4534         case ixgbe_mac_X550EM_x:
4535         case ixgbe_mac_x550em_a:
4536                 for (i = 0; i < adapter->num_rx_queues; i++) {
4537                         struct ixgbe_ring *ring = adapter->rx_ring[i];
4538
4539                         if (!netif_is_ixgbe(ring->netdev))
4540                                 continue;
4541
4542                         j = ring->reg_idx;
4543                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4544                         vlnctrl |= IXGBE_RXDCTL_VME;
4545                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4546                 }
4547                 break;
4548         default:
4549                 break;
4550         }
4551 }
4552
4553 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4554 {
4555         struct ixgbe_hw *hw = &adapter->hw;
4556         u32 vlnctrl, i;
4557
4558         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4559
4560         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4561         /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4562                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4563                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4564         } else {
4565                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4566                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4567                 return;
4568         }
4569
4570         /* Nothing to do for 82598 */
4571         if (hw->mac.type == ixgbe_mac_82598EB)
4572                 return;
4573
4574         /* We are already in VLAN promisc, nothing to do */
4575         if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4576                 return;
4577
4578         /* Set flag so we don't redo unnecessary work */
4579         adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4580
4581         /* Add PF to all active pools */
4582         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4583                 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4584                 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4585
4586                 vlvfb |= BIT(VMDQ_P(0) % 32);
4587                 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4588         }
4589
4590         /* Set all bits in the VLAN filter table array */
4591         for (i = hw->mac.vft_size; i--;)
4592                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4593 }
4594
4595 #define VFTA_BLOCK_SIZE 8
4596 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4597 {
4598         struct ixgbe_hw *hw = &adapter->hw;
4599         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4600         u32 vid_start = vfta_offset * 32;
4601         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4602         u32 i, vid, word, bits;
4603
4604         for (i = IXGBE_VLVF_ENTRIES; --i;) {
4605                 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4606
4607                 /* pull VLAN ID from VLVF */
4608                 vid = vlvf & VLAN_VID_MASK;
4609
4610                 /* only concern outselves with a certain range */
4611                 if (vid < vid_start || vid >= vid_end)
4612                         continue;
4613
4614                 if (vlvf) {
4615                         /* record VLAN ID in VFTA */
4616                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4617
4618                         /* if PF is part of this then continue */
4619                         if (test_bit(vid, adapter->active_vlans))
4620                                 continue;
4621                 }
4622
4623                 /* remove PF from the pool */
4624                 word = i * 2 + VMDQ_P(0) / 32;
4625                 bits = ~BIT(VMDQ_P(0) % 32);
4626                 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4627                 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4628         }
4629
4630         /* extract values from active_vlans and write back to VFTA */
4631         for (i = VFTA_BLOCK_SIZE; i--;) {
4632                 vid = (vfta_offset + i) * 32;
4633                 word = vid / BITS_PER_LONG;
4634                 bits = vid % BITS_PER_LONG;
4635
4636                 vfta[i] |= adapter->active_vlans[word] >> bits;
4637
4638                 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4639         }
4640 }
4641
4642 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4643 {
4644         struct ixgbe_hw *hw = &adapter->hw;
4645         u32 vlnctrl, i;
4646
4647         /* Set VLAN filtering to enabled */
4648         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4649         vlnctrl |= IXGBE_VLNCTRL_VFE;
4650         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4651
4652         if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4653             hw->mac.type == ixgbe_mac_82598EB)
4654                 return;
4655
4656         /* We are not in VLAN promisc, nothing to do */
4657         if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4658                 return;
4659
4660         /* Set flag so we don't redo unnecessary work */
4661         adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4662
4663         for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4664                 ixgbe_scrub_vfta(adapter, i);
4665 }
4666
4667 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4668 {
4669         u16 vid = 1;
4670
4671         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4672
4673         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4674                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4675 }
4676
4677 /**
4678  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4679  * @netdev: network interface device structure
4680  *
4681  * Writes multicast address list to the MTA hash table.
4682  * Returns: -ENOMEM on failure
4683  *                0 on no addresses written
4684  *                X on writing X addresses to MTA
4685  **/
4686 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4687 {
4688         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4689         struct ixgbe_hw *hw = &adapter->hw;
4690
4691         if (!netif_running(netdev))
4692                 return 0;
4693
4694         if (hw->mac.ops.update_mc_addr_list)
4695                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4696         else
4697                 return -ENOMEM;
4698
4699 #ifdef CONFIG_PCI_IOV
4700         ixgbe_restore_vf_multicasts(adapter);
4701 #endif
4702
4703         return netdev_mc_count(netdev);
4704 }
4705
4706 #ifdef CONFIG_PCI_IOV
4707 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4708 {
4709         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4710         struct ixgbe_hw *hw = &adapter->hw;
4711         int i;
4712
4713         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4714                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4715
4716                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4717                         hw->mac.ops.set_rar(hw, i,
4718                                             mac_table->addr,
4719                                             mac_table->pool,
4720                                             IXGBE_RAH_AV);
4721                 else
4722                         hw->mac.ops.clear_rar(hw, i);
4723         }
4724 }
4725
4726 #endif
4727 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4728 {
4729         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4730         struct ixgbe_hw *hw = &adapter->hw;
4731         int i;
4732
4733         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4734                 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4735                         continue;
4736
4737                 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4738
4739                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4740                         hw->mac.ops.set_rar(hw, i,
4741                                             mac_table->addr,
4742                                             mac_table->pool,
4743                                             IXGBE_RAH_AV);
4744                 else
4745                         hw->mac.ops.clear_rar(hw, i);
4746         }
4747 }
4748
4749 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4750 {
4751         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4752         struct ixgbe_hw *hw = &adapter->hw;
4753         int i;
4754
4755         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4756                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4757                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4758         }
4759
4760         ixgbe_sync_mac_table(adapter);
4761 }
4762
4763 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4764 {
4765         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4766         struct ixgbe_hw *hw = &adapter->hw;
4767         int i, count = 0;
4768
4769         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4770                 /* do not count default RAR as available */
4771                 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4772                         continue;
4773
4774                 /* only count unused and addresses that belong to us */
4775                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4776                         if (mac_table->pool != pool)
4777                                 continue;
4778                 }
4779
4780                 count++;
4781         }
4782
4783         return count;
4784 }
4785
4786 /* this function destroys the first RAR entry */
4787 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4788 {
4789         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4790         struct ixgbe_hw *hw = &adapter->hw;
4791
4792         memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4793         mac_table->pool = VMDQ_P(0);
4794
4795         mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4796
4797         hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4798                             IXGBE_RAH_AV);
4799 }
4800
4801 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4802                          const u8 *addr, u16 pool)
4803 {
4804         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4805         struct ixgbe_hw *hw = &adapter->hw;
4806         int i;
4807
4808         if (is_zero_ether_addr(addr))
4809                 return -EINVAL;
4810
4811         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4812                 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4813                         continue;
4814
4815                 ether_addr_copy(mac_table->addr, addr);
4816                 mac_table->pool = pool;
4817
4818                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4819                                     IXGBE_MAC_STATE_IN_USE;
4820
4821                 ixgbe_sync_mac_table(adapter);
4822
4823                 return i;
4824         }
4825
4826         return -ENOMEM;
4827 }
4828
4829 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4830                          const u8 *addr, u16 pool)
4831 {
4832         struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4833         struct ixgbe_hw *hw = &adapter->hw;
4834         int i;
4835
4836         if (is_zero_ether_addr(addr))
4837                 return -EINVAL;
4838
4839         /* search table for addr, if found clear IN_USE flag and sync */
4840         for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4841                 /* we can only delete an entry if it is in use */
4842                 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4843                         continue;
4844                 /* we only care about entries that belong to the given pool */
4845                 if (mac_table->pool != pool)
4846                         continue;
4847                 /* we only care about a specific MAC address */
4848                 if (!ether_addr_equal(addr, mac_table->addr))
4849                         continue;
4850
4851                 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4852                 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4853
4854                 ixgbe_sync_mac_table(adapter);
4855
4856                 return 0;
4857         }
4858
4859         return -ENOMEM;
4860 }
4861
4862 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4863 {
4864         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4865         int ret;
4866
4867         ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4868
4869         return min_t(int, ret, 0);
4870 }
4871
4872 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4873 {
4874         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4875
4876         ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4877
4878         return 0;
4879 }
4880
4881 /**
4882  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4883  * @netdev: network interface device structure
4884  *
4885  * The set_rx_method entry point is called whenever the unicast/multicast
4886  * address list or the network interface flags are updated.  This routine is
4887  * responsible for configuring the hardware for proper unicast, multicast and
4888  * promiscuous mode.
4889  **/
4890 void ixgbe_set_rx_mode(struct net_device *netdev)
4891 {
4892         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4893         struct ixgbe_hw *hw = &adapter->hw;
4894         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4895         netdev_features_t features = netdev->features;
4896         int count;
4897
4898         /* Check for Promiscuous and All Multicast modes */
4899         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4900
4901         /* set all bits that we expect to always be set */
4902         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4903         fctrl |= IXGBE_FCTRL_BAM;
4904         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4905         fctrl |= IXGBE_FCTRL_PMCF;
4906
4907         /* clear the bits we are changing the status of */
4908         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4909         if (netdev->flags & IFF_PROMISC) {
4910                 hw->addr_ctrl.user_set_promisc = true;
4911                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4912                 vmolr |= IXGBE_VMOLR_MPE;
4913                 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4914         } else {
4915                 if (netdev->flags & IFF_ALLMULTI) {
4916                         fctrl |= IXGBE_FCTRL_MPE;
4917                         vmolr |= IXGBE_VMOLR_MPE;
4918                 }
4919                 hw->addr_ctrl.user_set_promisc = false;
4920         }
4921
4922         /*
4923          * Write addresses to available RAR registers, if there is not
4924          * sufficient space to store all the addresses then enable
4925          * unicast promiscuous mode
4926          */
4927         if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4928                 fctrl |= IXGBE_FCTRL_UPE;
4929                 vmolr |= IXGBE_VMOLR_ROPE;
4930         }
4931
4932         /* Write addresses to the MTA, if the attempt fails
4933          * then we should just turn on promiscuous mode so
4934          * that we can at least receive multicast traffic
4935          */
4936         count = ixgbe_write_mc_addr_list(netdev);
4937         if (count < 0) {
4938                 fctrl |= IXGBE_FCTRL_MPE;
4939                 vmolr |= IXGBE_VMOLR_MPE;
4940         } else if (count) {
4941                 vmolr |= IXGBE_VMOLR_ROMPE;
4942         }
4943
4944         if (hw->mac.type != ixgbe_mac_82598EB) {
4945                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4946                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4947                            IXGBE_VMOLR_ROPE);
4948                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4949         }
4950
4951         /* This is useful for sniffing bad packets. */
4952         if (features & NETIF_F_RXALL) {
4953                 /* UPE and MPE will be handled by normal PROMISC logic
4954                  * in e1000e_set_rx_mode */
4955                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4956                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4957                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4958
4959                 fctrl &= ~(IXGBE_FCTRL_DPF);
4960                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4961         }
4962
4963         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4964
4965         if (features & NETIF_F_HW_VLAN_CTAG_RX)
4966                 ixgbe_vlan_strip_enable(adapter);
4967         else
4968                 ixgbe_vlan_strip_disable(adapter);
4969
4970         if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4971                 ixgbe_vlan_promisc_disable(adapter);
4972         else
4973                 ixgbe_vlan_promisc_enable(adapter);
4974 }
4975
4976 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4977 {
4978         int q_idx;
4979
4980         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4981                 napi_enable(&adapter->q_vector[q_idx]->napi);
4982 }
4983
4984 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4985 {
4986         int q_idx;
4987
4988         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4989                 napi_disable(&adapter->q_vector[q_idx]->napi);
4990 }
4991
4992 static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)
4993 {
4994         struct ixgbe_adapter *adapter = netdev_priv(dev);
4995         struct ixgbe_hw *hw = &adapter->hw;
4996         struct udp_tunnel_info ti;
4997
4998         udp_tunnel_nic_get_port(dev, table, 0, &ti);
4999         if (ti.type == UDP_TUNNEL_TYPE_VXLAN)
5000                 adapter->vxlan_port = ti.port;
5001         else
5002                 adapter->geneve_port = ti.port;
5003
5004         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL,
5005                         ntohs(adapter->vxlan_port) |
5006                         ntohs(adapter->geneve_port) <<
5007                                 IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT);
5008         return 0;
5009 }
5010
5011 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550 = {
5012         .sync_table     = ixgbe_udp_tunnel_sync,
5013         .flags          = UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
5014         .tables         = {
5015                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },
5016         },
5017 };
5018
5019 static const struct udp_tunnel_nic_info ixgbe_udp_tunnels_x550em_a = {
5020         .sync_table     = ixgbe_udp_tunnel_sync,
5021         .flags          = UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
5022         .tables         = {
5023                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN,  },
5024                 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },
5025         },
5026 };
5027
5028 #ifdef CONFIG_IXGBE_DCB
5029 /**
5030  * ixgbe_configure_dcb - Configure DCB hardware
5031  * @adapter: ixgbe adapter struct
5032  *
5033  * This is called by the driver on open to configure the DCB hardware.
5034  * This is also called by the gennetlink interface when reconfiguring
5035  * the DCB state.
5036  */
5037 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5038 {
5039         struct ixgbe_hw *hw = &adapter->hw;
5040         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5041
5042         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5043                 if (hw->mac.type == ixgbe_mac_82598EB)
5044                         netif_set_gso_max_size(adapter->netdev, 65536);
5045                 return;
5046         }
5047
5048         if (hw->mac.type == ixgbe_mac_82598EB)
5049                 netif_set_gso_max_size(adapter->netdev, 32768);
5050
5051 #ifdef IXGBE_FCOE
5052         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5053                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5054 #endif
5055
5056         /* reconfigure the hardware */
5057         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5058                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5059                                                 DCB_TX_CONFIG);
5060                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5061                                                 DCB_RX_CONFIG);
5062                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5063         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5064                 ixgbe_dcb_hw_ets(&adapter->hw,
5065                                  adapter->ixgbe_ieee_ets,
5066                                  max_frame);
5067                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5068                                         adapter->ixgbe_ieee_pfc->pfc_en,
5069                                         adapter->ixgbe_ieee_ets->prio_tc);
5070         }
5071
5072         /* Enable RSS Hash per TC */
5073         if (hw->mac.type != ixgbe_mac_82598EB) {
5074                 u32 msb = 0;
5075                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5076
5077                 while (rss_i) {
5078                         msb++;
5079                         rss_i >>= 1;
5080                 }
5081
5082                 /* write msb to all 8 TCs in one write */
5083                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5084         }
5085 }
5086 #endif
5087
5088 /* Additional bittime to account for IXGBE framing */
5089 #define IXGBE_ETH_FRAMING 20
5090
5091 /**
5092  * ixgbe_hpbthresh - calculate high water mark for flow control
5093  *
5094  * @adapter: board private structure to calculate for
5095  * @pb: packet buffer to calculate
5096  */
5097 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5098 {
5099         struct ixgbe_hw *hw = &adapter->hw;
5100         struct net_device *dev = adapter->netdev;
5101         int link, tc, kb, marker;
5102         u32 dv_id, rx_pba;
5103
5104         /* Calculate max LAN frame size */
5105         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5106
5107 #ifdef IXGBE_FCOE
5108         /* FCoE traffic class uses FCOE jumbo frames */
5109         if ((dev->features & NETIF_F_FCOE_MTU) &&
5110             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5111             (pb == ixgbe_fcoe_get_tc(adapter)))
5112                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5113 #endif
5114
5115         /* Calculate delay value for device */
5116         switch (hw->mac.type) {
5117         case ixgbe_mac_X540:
5118         case ixgbe_mac_X550:
5119         case ixgbe_mac_X550EM_x:
5120         case ixgbe_mac_x550em_a:
5121                 dv_id = IXGBE_DV_X540(link, tc);
5122                 break;
5123         default:
5124                 dv_id = IXGBE_DV(link, tc);
5125                 break;
5126         }
5127
5128         /* Loopback switch introduces additional latency */
5129         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5130                 dv_id += IXGBE_B2BT(tc);
5131
5132         /* Delay value is calculated in bit times convert to KB */
5133         kb = IXGBE_BT2KB(dv_id);
5134         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5135
5136         marker = rx_pba - kb;
5137
5138         /* It is possible that the packet buffer is not large enough
5139          * to provide required headroom. In this case throw an error
5140          * to user and a do the best we can.
5141          */
5142         if (marker < 0) {
5143                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5144                             "headroom to support flow control."
5145                             "Decrease MTU or number of traffic classes\n", pb);
5146                 marker = tc + 1;
5147         }
5148
5149         return marker;
5150 }
5151
5152 /**
5153  * ixgbe_lpbthresh - calculate low water mark for for flow control
5154  *
5155  * @adapter: board private structure to calculate for
5156  * @pb: packet buffer to calculate
5157  */
5158 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5159 {
5160         struct ixgbe_hw *hw = &adapter->hw;
5161         struct net_device *dev = adapter->netdev;
5162         int tc;
5163         u32 dv_id;
5164
5165         /* Calculate max LAN frame size */
5166         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5167
5168 #ifdef IXGBE_FCOE
5169         /* FCoE traffic class uses FCOE jumbo frames */
5170         if ((dev->features & NETIF_F_FCOE_MTU) &&
5171             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5172             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5173                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5174 #endif
5175
5176         /* Calculate delay value for device */
5177         switch (hw->mac.type) {
5178         case ixgbe_mac_X540:
5179         case ixgbe_mac_X550:
5180         case ixgbe_mac_X550EM_x:
5181         case ixgbe_mac_x550em_a:
5182                 dv_id = IXGBE_LOW_DV_X540(tc);
5183                 break;
5184         default:
5185                 dv_id = IXGBE_LOW_DV(tc);
5186                 break;
5187         }
5188
5189         /* Delay value is calculated in bit times convert to KB */
5190         return IXGBE_BT2KB(dv_id);
5191 }
5192
5193 /*
5194  * ixgbe_pbthresh_setup - calculate and setup high low water marks
5195  */
5196 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5197 {
5198         struct ixgbe_hw *hw = &adapter->hw;
5199         int num_tc = adapter->hw_tcs;
5200         int i;
5201
5202         if (!num_tc)
5203                 num_tc = 1;
5204
5205         for (i = 0; i < num_tc; i++) {
5206                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5207                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5208
5209                 /* Low water marks must not be larger than high water marks */
5210                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5211                         hw->fc.low_water[i] = 0;
5212         }
5213
5214         for (; i < MAX_TRAFFIC_CLASS; i++)
5215                 hw->fc.high_water[i] = 0;
5216 }
5217
5218 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5219 {
5220         struct ixgbe_hw *hw = &adapter->hw;
5221         int hdrm;
5222         u8 tc = adapter->hw_tcs;
5223
5224         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5225             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5226                 hdrm = 32 << adapter->fdir_pballoc;
5227         else
5228                 hdrm = 0;
5229
5230         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5231         ixgbe_pbthresh_setup(adapter);
5232 }
5233
5234 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5235 {
5236         struct ixgbe_hw *hw = &adapter->hw;
5237         struct hlist_node *node2;
5238         struct ixgbe_fdir_filter *filter;
5239         u8 queue;
5240
5241         spin_lock(&adapter->fdir_perfect_lock);
5242
5243         if (!hlist_empty(&adapter->fdir_filter_list))
5244                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5245
5246         hlist_for_each_entry_safe(filter, node2,
5247                                   &adapter->fdir_filter_list, fdir_node) {
5248                 if (filter->action == IXGBE_FDIR_DROP_QUEUE) {
5249                         queue = IXGBE_FDIR_DROP_QUEUE;
5250                 } else {
5251                         u32 ring = ethtool_get_flow_spec_ring(filter->action);
5252                         u8 vf = ethtool_get_flow_spec_ring_vf(filter->action);
5253
5254                         if (!vf && (ring >= adapter->num_rx_queues)) {
5255                                 e_err(drv, "FDIR restore failed without VF, ring: %u\n",
5256                                       ring);
5257                                 continue;
5258                         } else if (vf &&
5259                                    ((vf > adapter->num_vfs) ||
5260                                      ring >= adapter->num_rx_queues_per_pool)) {
5261                                 e_err(drv, "FDIR restore failed with VF, vf: %hhu, ring: %u\n",
5262                                       vf, ring);
5263                                 continue;
5264                         }
5265
5266                         /* Map the ring onto the absolute queue index */
5267                         if (!vf)
5268                                 queue = adapter->rx_ring[ring]->reg_idx;
5269                         else
5270                                 queue = ((vf - 1) *
5271                                         adapter->num_rx_queues_per_pool) + ring;
5272                 }
5273
5274                 ixgbe_fdir_write_perfect_filter_82599(hw,
5275                                 &filter->filter, filter->sw_idx, queue);
5276         }
5277
5278         spin_unlock(&adapter->fdir_perfect_lock);
5279 }
5280
5281 /**
5282  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5283  * @rx_ring: ring to free buffers from
5284  **/
5285 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5286 {
5287         u16 i = rx_ring->next_to_clean;
5288         struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5289
5290         if (rx_ring->xsk_pool) {
5291                 ixgbe_xsk_clean_rx_ring(rx_ring);
5292                 goto skip_free;
5293         }
5294
5295         /* Free all the Rx ring sk_buffs */
5296         while (i != rx_ring->next_to_alloc) {
5297                 if (rx_buffer->skb) {
5298                         struct sk_buff *skb = rx_buffer->skb;
5299                         if (IXGBE_CB(skb)->page_released)
5300                                 dma_unmap_page_attrs(rx_ring->dev,
5301                                                      IXGBE_CB(skb)->dma,
5302                                                      ixgbe_rx_pg_size(rx_ring),
5303                                                      DMA_FROM_DEVICE,
5304                                                      IXGBE_RX_DMA_ATTR);
5305                         dev_kfree_skb(skb);
5306                 }
5307
5308                 /* Invalidate cache lines that may have been written to by
5309                  * device so that we avoid corrupting memory.
5310                  */
5311                 dma_sync_single_range_for_cpu(rx_ring->dev,
5312                                               rx_buffer->dma,
5313                                               rx_buffer->page_offset,
5314                                               ixgbe_rx_bufsz(rx_ring),
5315                                               DMA_FROM_DEVICE);
5316
5317                 /* free resources associated with mapping */
5318                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5319                                      ixgbe_rx_pg_size(rx_ring),
5320                                      DMA_FROM_DEVICE,
5321                                      IXGBE_RX_DMA_ATTR);
5322                 __page_frag_cache_drain(rx_buffer->page,
5323                                         rx_buffer->pagecnt_bias);
5324
5325                 i++;
5326                 rx_buffer++;
5327                 if (i == rx_ring->count) {
5328                         i = 0;
5329                         rx_buffer = rx_ring->rx_buffer_info;
5330                 }
5331         }
5332
5333 skip_free:
5334         rx_ring->next_to_alloc = 0;
5335         rx_ring->next_to_clean = 0;
5336         rx_ring->next_to_use = 0;
5337 }
5338
5339 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5340                              struct ixgbe_fwd_adapter *accel)
5341 {
5342         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5343         int num_tc = netdev_get_num_tc(adapter->netdev);
5344         struct net_device *vdev = accel->netdev;
5345         int i, baseq, err;
5346
5347         baseq = accel->pool * adapter->num_rx_queues_per_pool;
5348         netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5349                    accel->pool, adapter->num_rx_pools,
5350                    baseq, baseq + adapter->num_rx_queues_per_pool);
5351
5352         accel->rx_base_queue = baseq;
5353         accel->tx_base_queue = baseq;
5354
5355         /* record configuration for macvlan interface in vdev */
5356         for (i = 0; i < num_tc; i++)
5357                 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5358                                              i, rss_i, baseq + (rss_i * i));
5359
5360         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5361                 adapter->rx_ring[baseq + i]->netdev = vdev;
5362
5363         /* Guarantee all rings are updated before we update the
5364          * MAC address filter.
5365          */
5366         wmb();
5367
5368         /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5369          * need to only treat it as an error value if it is negative.
5370          */
5371         err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5372                                    VMDQ_P(accel->pool));
5373         if (err >= 0)
5374                 return 0;
5375
5376         /* if we cannot add the MAC rule then disable the offload */
5377         macvlan_release_l2fw_offload(vdev);
5378
5379         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5380                 adapter->rx_ring[baseq + i]->netdev = NULL;
5381
5382         netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5383
5384         /* unbind the queues and drop the subordinate channel config */
5385         netdev_unbind_sb_channel(adapter->netdev, vdev);
5386         netdev_set_sb_channel(vdev, 0);
5387
5388         clear_bit(accel->pool, adapter->fwd_bitmask);
5389         kfree(accel);
5390
5391         return err;
5392 }
5393
5394 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5395 {
5396         struct ixgbe_adapter *adapter = data;
5397         struct ixgbe_fwd_adapter *accel;
5398
5399         if (!netif_is_macvlan(vdev))
5400                 return 0;
5401
5402         accel = macvlan_accel_priv(vdev);
5403         if (!accel)
5404                 return 0;
5405
5406         ixgbe_fwd_ring_up(adapter, accel);
5407
5408         return 0;
5409 }
5410
5411 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5412 {
5413         netdev_walk_all_upper_dev_rcu(adapter->netdev,
5414                                       ixgbe_macvlan_up, adapter);
5415 }
5416
5417 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5418 {
5419         struct ixgbe_hw *hw = &adapter->hw;
5420
5421         ixgbe_configure_pb(adapter);
5422 #ifdef CONFIG_IXGBE_DCB
5423         ixgbe_configure_dcb(adapter);
5424 #endif
5425         /*
5426          * We must restore virtualization before VLANs or else
5427          * the VLVF registers will not be populated
5428          */
5429         ixgbe_configure_virtualization(adapter);
5430
5431         ixgbe_set_rx_mode(adapter->netdev);
5432         ixgbe_restore_vlan(adapter);
5433         ixgbe_ipsec_restore(adapter);
5434
5435         switch (hw->mac.type) {
5436         case ixgbe_mac_82599EB:
5437         case ixgbe_mac_X540:
5438                 hw->mac.ops.disable_rx_buff(hw);
5439                 break;
5440         default:
5441                 break;
5442         }
5443
5444         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5445                 ixgbe_init_fdir_signature_82599(&adapter->hw,
5446                                                 adapter->fdir_pballoc);
5447         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5448                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5449                                               adapter->fdir_pballoc);
5450                 ixgbe_fdir_filter_restore(adapter);
5451         }
5452
5453         switch (hw->mac.type) {
5454         case ixgbe_mac_82599EB:
5455         case ixgbe_mac_X540:
5456                 hw->mac.ops.enable_rx_buff(hw);
5457                 break;
5458         default:
5459                 break;
5460         }
5461
5462 #ifdef CONFIG_IXGBE_DCA
5463         /* configure DCA */
5464         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5465                 ixgbe_setup_dca(adapter);
5466 #endif /* CONFIG_IXGBE_DCA */
5467
5468 #ifdef IXGBE_FCOE
5469         /* configure FCoE L2 filters, redirection table, and Rx control */
5470         ixgbe_configure_fcoe(adapter);
5471
5472 #endif /* IXGBE_FCOE */
5473         ixgbe_configure_tx(adapter);
5474         ixgbe_configure_rx(adapter);
5475         ixgbe_configure_dfwd(adapter);
5476 }
5477
5478 /**
5479  * ixgbe_sfp_link_config - set up SFP+ link
5480  * @adapter: pointer to private adapter struct
5481  **/
5482 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5483 {
5484         /*
5485          * We are assuming the worst case scenario here, and that
5486          * is that an SFP was inserted/removed after the reset
5487          * but before SFP detection was enabled.  As such the best
5488          * solution is to just start searching as soon as we start
5489          */
5490         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5491                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5492
5493         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5494         adapter->sfp_poll_time = 0;
5495 }
5496
5497 /**
5498  * ixgbe_non_sfp_link_config - set up non-SFP+ link
5499  * @hw: pointer to private hardware struct
5500  *
5501  * Returns 0 on success, negative on failure
5502  **/
5503 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5504 {
5505         u32 speed;
5506         bool autoneg, link_up = false;
5507         int ret = IXGBE_ERR_LINK_SETUP;
5508
5509         if (hw->mac.ops.check_link)
5510                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5511
5512         if (ret)
5513                 return ret;
5514
5515         speed = hw->phy.autoneg_advertised;
5516         if (!speed && hw->mac.ops.get_link_capabilities) {
5517                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5518                                                         &autoneg);
5519                 speed &= ~(IXGBE_LINK_SPEED_5GB_FULL |
5520                            IXGBE_LINK_SPEED_2_5GB_FULL);
5521         }
5522
5523         if (ret)
5524                 return ret;
5525
5526         if (hw->mac.ops.setup_link)
5527                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5528
5529         return ret;
5530 }
5531
5532 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5533 {
5534         struct ixgbe_hw *hw = &adapter->hw;
5535         u32 gpie = 0;
5536
5537         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5538                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5539                        IXGBE_GPIE_OCD;
5540                 gpie |= IXGBE_GPIE_EIAME;
5541                 /*
5542                  * use EIAM to auto-mask when MSI-X interrupt is asserted
5543                  * this saves a register write for every interrupt
5544                  */
5545                 switch (hw->mac.type) {
5546                 case ixgbe_mac_82598EB:
5547                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5548                         break;
5549                 case ixgbe_mac_82599EB:
5550                 case ixgbe_mac_X540:
5551                 case ixgbe_mac_X550:
5552                 case ixgbe_mac_X550EM_x:
5553                 case ixgbe_mac_x550em_a:
5554                 default:
5555                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5556                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5557                         break;
5558                 }
5559         } else {
5560                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5561                  * specifically only auto mask tx and rx interrupts */
5562                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5563         }
5564
5565         /* XXX: to interrupt immediately for EICS writes, enable this */
5566         /* gpie |= IXGBE_GPIE_EIMEN; */
5567
5568         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5569                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5570
5571                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5572                 case IXGBE_82599_VMDQ_8Q_MASK:
5573                         gpie |= IXGBE_GPIE_VTMODE_16;
5574                         break;
5575                 case IXGBE_82599_VMDQ_4Q_MASK:
5576                         gpie |= IXGBE_GPIE_VTMODE_32;
5577                         break;
5578                 default:
5579                         gpie |= IXGBE_GPIE_VTMODE_64;
5580                         break;
5581                 }
5582         }
5583
5584         /* Enable Thermal over heat sensor interrupt */
5585         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5586                 switch (adapter->hw.mac.type) {
5587                 case ixgbe_mac_82599EB:
5588                         gpie |= IXGBE_SDP0_GPIEN_8259X;
5589                         break;
5590                 default:
5591                         break;
5592                 }
5593         }
5594
5595         /* Enable fan failure interrupt */
5596         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5597                 gpie |= IXGBE_SDP1_GPIEN(hw);
5598
5599         switch (hw->mac.type) {
5600         case ixgbe_mac_82599EB:
5601                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5602                 break;
5603         case ixgbe_mac_X550EM_x:
5604         case ixgbe_mac_x550em_a:
5605                 gpie |= IXGBE_SDP0_GPIEN_X540;
5606                 break;
5607         default:
5608                 break;
5609         }
5610
5611         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5612 }
5613
5614 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5615 {
5616         struct ixgbe_hw *hw = &adapter->hw;
5617         int err;
5618         u32 ctrl_ext;
5619
5620         ixgbe_get_hw_control(adapter);
5621         ixgbe_setup_gpie(adapter);
5622
5623         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5624                 ixgbe_configure_msix(adapter);
5625         else
5626                 ixgbe_configure_msi_and_legacy(adapter);
5627
5628         /* enable the optics for 82599 SFP+ fiber */
5629         if (hw->mac.ops.enable_tx_laser)
5630                 hw->mac.ops.enable_tx_laser(hw);
5631
5632         if (hw->phy.ops.set_phy_power)
5633                 hw->phy.ops.set_phy_power(hw, true);
5634
5635         smp_mb__before_atomic();
5636         clear_bit(__IXGBE_DOWN, &adapter->state);
5637         ixgbe_napi_enable_all(adapter);
5638
5639         if (ixgbe_is_sfp(hw)) {
5640                 ixgbe_sfp_link_config(adapter);
5641         } else {
5642                 err = ixgbe_non_sfp_link_config(hw);
5643                 if (err)
5644                         e_err(probe, "link_config FAILED %d\n", err);
5645         }
5646
5647         /* clear any pending interrupts, may auto mask */
5648         IXGBE_READ_REG(hw, IXGBE_EICR);
5649         ixgbe_irq_enable(adapter, true, true);
5650
5651         /*
5652          * If this adapter has a fan, check to see if we had a failure
5653          * before we enabled the interrupt.
5654          */
5655         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5656                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5657                 if (esdp & IXGBE_ESDP_SDP1)
5658                         e_crit(drv, "Fan has stopped, replace the adapter\n");
5659         }
5660
5661         /* bring the link up in the watchdog, this could race with our first
5662          * link up interrupt but shouldn't be a problem */
5663         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5664         adapter->link_check_timeout = jiffies;
5665         mod_timer(&adapter->service_timer, jiffies);
5666
5667         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5668         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5669         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5670         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5671 }
5672
5673 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5674 {
5675         WARN_ON(in_interrupt());
5676         /* put off any impending NetWatchDogTimeout */
5677         netif_trans_update(adapter->netdev);
5678
5679         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5680                 usleep_range(1000, 2000);
5681         if (adapter->hw.phy.type == ixgbe_phy_fw)
5682                 ixgbe_watchdog_link_is_down(adapter);
5683         ixgbe_down(adapter);
5684         /*
5685          * If SR-IOV enabled then wait a bit before bringing the adapter
5686          * back up to give the VFs time to respond to the reset.  The
5687          * two second wait is based upon the watchdog timer cycle in
5688          * the VF driver.
5689          */
5690         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5691                 msleep(2000);
5692         ixgbe_up(adapter);
5693         clear_bit(__IXGBE_RESETTING, &adapter->state);
5694 }
5695
5696 void ixgbe_up(struct ixgbe_adapter *adapter)
5697 {
5698         /* hardware has been reset, we need to reload some things */
5699         ixgbe_configure(adapter);
5700
5701         ixgbe_up_complete(adapter);
5702 }
5703
5704 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5705 {
5706         u16 devctl2;
5707
5708         pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5709
5710         switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5711         case IXGBE_PCIDEVCTRL2_17_34s:
5712         case IXGBE_PCIDEVCTRL2_4_8s:
5713                 /* For now we cap the upper limit on delay to 2 seconds
5714                  * as we end up going up to 34 seconds of delay in worst
5715                  * case timeout value.
5716                  */
5717         case IXGBE_PCIDEVCTRL2_1_2s:
5718                 return 2000000ul;       /* 2.0 s */
5719         case IXGBE_PCIDEVCTRL2_260_520ms:
5720                 return 520000ul;        /* 520 ms */
5721         case IXGBE_PCIDEVCTRL2_65_130ms:
5722                 return 130000ul;        /* 130 ms */
5723         case IXGBE_PCIDEVCTRL2_16_32ms:
5724                 return 32000ul;         /* 32 ms */
5725         case IXGBE_PCIDEVCTRL2_1_2ms:
5726                 return 2000ul;          /* 2 ms */
5727         case IXGBE_PCIDEVCTRL2_50_100us:
5728                 return 100ul;           /* 100 us */
5729         case IXGBE_PCIDEVCTRL2_16_32ms_def:
5730                 return 32000ul;         /* 32 ms */
5731         default:
5732                 break;
5733         }
5734
5735         /* We shouldn't need to hit this path, but just in case default as
5736          * though completion timeout is not supported and support 32ms.
5737          */
5738         return 32000ul;
5739 }
5740
5741 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5742 {
5743         unsigned long wait_delay, delay_interval;
5744         struct ixgbe_hw *hw = &adapter->hw;
5745         int i, wait_loop;
5746         u32 rxdctl;
5747
5748         /* disable receives */
5749         hw->mac.ops.disable_rx(hw);
5750
5751         if (ixgbe_removed(hw->hw_addr))
5752                 return;
5753
5754         /* disable all enabled Rx queues */
5755         for (i = 0; i < adapter->num_rx_queues; i++) {
5756                 struct ixgbe_ring *ring = adapter->rx_ring[i];
5757                 u8 reg_idx = ring->reg_idx;
5758
5759                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5760                 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5761                 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5762
5763                 /* write value back with RXDCTL.ENABLE bit cleared */
5764                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5765         }
5766
5767         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5768         if (hw->mac.type == ixgbe_mac_82598EB &&
5769             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5770                 return;
5771
5772         /* Determine our minimum delay interval. We will increase this value
5773          * with each subsequent test. This way if the device returns quickly
5774          * we should spend as little time as possible waiting, however as
5775          * the time increases we will wait for larger periods of time.
5776          *
5777          * The trick here is that we increase the interval using the
5778          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5779          * of that wait is that it totals up to 100x whatever interval we
5780          * choose. Since our minimum wait is 100us we can just divide the
5781          * total timeout by 100 to get our minimum delay interval.
5782          */
5783         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5784
5785         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5786         wait_delay = delay_interval;
5787
5788         while (wait_loop--) {
5789                 usleep_range(wait_delay, wait_delay + 10);
5790                 wait_delay += delay_interval * 2;
5791                 rxdctl = 0;
5792
5793                 /* OR together the reading of all the active RXDCTL registers,
5794                  * and then test the result. We need the disable to complete
5795                  * before we start freeing the memory and invalidating the
5796                  * DMA mappings.
5797                  */
5798                 for (i = 0; i < adapter->num_rx_queues; i++) {
5799                         struct ixgbe_ring *ring = adapter->rx_ring[i];
5800                         u8 reg_idx = ring->reg_idx;
5801
5802                         rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5803                 }
5804
5805                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5806                         return;
5807         }
5808
5809         e_err(drv,
5810               "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5811 }
5812
5813 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5814 {
5815         unsigned long wait_delay, delay_interval;
5816         struct ixgbe_hw *hw = &adapter->hw;
5817         int i, wait_loop;
5818         u32 txdctl;
5819
5820         if (ixgbe_removed(hw->hw_addr))
5821                 return;
5822
5823         /* disable all enabled Tx queues */
5824         for (i = 0; i < adapter->num_tx_queues; i++) {
5825                 struct ixgbe_ring *ring = adapter->tx_ring[i];
5826                 u8 reg_idx = ring->reg_idx;
5827
5828                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5829         }
5830
5831         /* disable all enabled XDP Tx queues */
5832         for (i = 0; i < adapter->num_xdp_queues; i++) {
5833                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5834                 u8 reg_idx = ring->reg_idx;
5835
5836                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5837         }
5838
5839         /* If the link is not up there shouldn't be much in the way of
5840          * pending transactions. Those that are left will be flushed out
5841          * when the reset logic goes through the flush sequence to clean out
5842          * the pending Tx transactions.
5843          */
5844         if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5845                 goto dma_engine_disable;
5846
5847         /* Determine our minimum delay interval. We will increase this value
5848          * with each subsequent test. This way if the device returns quickly
5849          * we should spend as little time as possible waiting, however as
5850          * the time increases we will wait for larger periods of time.
5851          *
5852          * The trick here is that we increase the interval using the
5853          * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5854          * of that wait is that it totals up to 100x whatever interval we
5855          * choose. Since our minimum wait is 100us we can just divide the
5856          * total timeout by 100 to get our minimum delay interval.
5857          */
5858         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5859
5860         wait_loop = IXGBE_MAX_RX_DESC_POLL;
5861         wait_delay = delay_interval;
5862
5863         while (wait_loop--) {
5864                 usleep_range(wait_delay, wait_delay + 10);
5865                 wait_delay += delay_interval * 2;
5866                 txdctl = 0;
5867
5868                 /* OR together the reading of all the active TXDCTL registers,
5869                  * and then test the result. We need the disable to complete
5870                  * before we start freeing the memory and invalidating the
5871                  * DMA mappings.
5872                  */
5873                 for (i = 0; i < adapter->num_tx_queues; i++) {
5874                         struct ixgbe_ring *ring = adapter->tx_ring[i];
5875                         u8 reg_idx = ring->reg_idx;
5876
5877                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5878                 }
5879                 for (i = 0; i < adapter->num_xdp_queues; i++) {
5880                         struct ixgbe_ring *ring = adapter->xdp_ring[i];
5881                         u8 reg_idx = ring->reg_idx;
5882
5883                         txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5884                 }
5885
5886                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5887                         goto dma_engine_disable;
5888         }
5889
5890         e_err(drv,
5891               "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5892
5893 dma_engine_disable:
5894         /* Disable the Tx DMA engine on 82599 and later MAC */
5895         switch (hw->mac.type) {
5896         case ixgbe_mac_82599EB:
5897         case ixgbe_mac_X540:
5898         case ixgbe_mac_X550:
5899         case ixgbe_mac_X550EM_x:
5900         case ixgbe_mac_x550em_a:
5901                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5902                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5903                                  ~IXGBE_DMATXCTL_TE));
5904                 fallthrough;
5905         default:
5906                 break;
5907         }
5908 }
5909
5910 void ixgbe_reset(struct ixgbe_adapter *adapter)
5911 {
5912         struct ixgbe_hw *hw = &adapter->hw;
5913         struct net_device *netdev = adapter->netdev;
5914         int err;
5915
5916         if (ixgbe_removed(hw->hw_addr))
5917                 return;
5918         /* lock SFP init bit to prevent race conditions with the watchdog */
5919         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5920                 usleep_range(1000, 2000);
5921
5922         /* clear all SFP and link config related flags while holding SFP_INIT */
5923         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5924                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5925         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5926
5927         err = hw->mac.ops.init_hw(hw);
5928         switch (err) {
5929         case 0:
5930         case IXGBE_ERR_SFP_NOT_PRESENT:
5931         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5932                 break;
5933         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5934                 e_dev_err("master disable timed out\n");
5935                 break;
5936         case IXGBE_ERR_EEPROM_VERSION:
5937                 /* We are running on a pre-production device, log a warning */
5938                 e_dev_warn("This device is a pre-production adapter/LOM. "
5939                            "Please be aware there may be issues associated with "
5940                            "your hardware.  If you are experiencing problems "
5941                            "please contact your Intel or hardware "
5942                            "representative who provided you with this "
5943                            "hardware.\n");
5944                 break;
5945         default:
5946                 e_dev_err("Hardware Error: %d\n", err);
5947         }
5948
5949         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5950
5951         /* flush entries out of MAC table */
5952         ixgbe_flush_sw_mac_table(adapter);
5953         __dev_uc_unsync(netdev, NULL);
5954
5955         /* do not flush user set addresses */
5956         ixgbe_mac_set_default_filter(adapter);
5957
5958         /* update SAN MAC vmdq pool selection */
5959         if (hw->mac.san_mac_rar_index)
5960                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5961
5962         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5963                 ixgbe_ptp_reset(adapter);
5964
5965         if (hw->phy.ops.set_phy_power) {
5966                 if (!netif_running(adapter->netdev) && !adapter->wol)
5967                         hw->phy.ops.set_phy_power(hw, false);
5968                 else
5969                         hw->phy.ops.set_phy_power(hw, true);
5970         }
5971 }
5972
5973 /**
5974  * ixgbe_clean_tx_ring - Free Tx Buffers
5975  * @tx_ring: ring to be cleaned
5976  **/
5977 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5978 {
5979         u16 i = tx_ring->next_to_clean;
5980         struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5981
5982         if (tx_ring->xsk_pool) {
5983                 ixgbe_xsk_clean_tx_ring(tx_ring);
5984                 goto out;
5985         }
5986
5987         while (i != tx_ring->next_to_use) {
5988                 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5989
5990                 /* Free all the Tx ring sk_buffs */
5991                 if (ring_is_xdp(tx_ring))
5992                         xdp_return_frame(tx_buffer->xdpf);
5993                 else
5994                         dev_kfree_skb_any(tx_buffer->skb);
5995
5996                 /* unmap skb header data */
5997                 dma_unmap_single(tx_ring->dev,
5998                                  dma_unmap_addr(tx_buffer, dma),
5999                                  dma_unmap_len(tx_buffer, len),
6000                                  DMA_TO_DEVICE);
6001
6002                 /* check for eop_desc to determine the end of the packet */
6003                 eop_desc = tx_buffer->next_to_watch;
6004                 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6005
6006                 /* unmap remaining buffers */
6007                 while (tx_desc != eop_desc) {
6008                         tx_buffer++;
6009                         tx_desc++;
6010                         i++;
6011                         if (unlikely(i == tx_ring->count)) {
6012                                 i = 0;
6013                                 tx_buffer = tx_ring->tx_buffer_info;
6014                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6015                         }
6016
6017                         /* unmap any remaining paged data */
6018                         if (dma_unmap_len(tx_buffer, len))
6019                                 dma_unmap_page(tx_ring->dev,
6020                                                dma_unmap_addr(tx_buffer, dma),
6021                                                dma_unmap_len(tx_buffer, len),
6022                                                DMA_TO_DEVICE);
6023                 }
6024
6025                 /* move us one more past the eop_desc for start of next pkt */
6026                 tx_buffer++;
6027                 i++;
6028                 if (unlikely(i == tx_ring->count)) {
6029                         i = 0;
6030                         tx_buffer = tx_ring->tx_buffer_info;
6031                 }
6032         }
6033
6034         /* reset BQL for queue */
6035         if (!ring_is_xdp(tx_ring))
6036                 netdev_tx_reset_queue(txring_txq(tx_ring));
6037
6038 out:
6039         /* reset next_to_use and next_to_clean */
6040         tx_ring->next_to_use = 0;
6041         tx_ring->next_to_clean = 0;
6042 }
6043
6044 /**
6045  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6046  * @adapter: board private structure
6047  **/
6048 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6049 {
6050         int i;
6051
6052         for (i = 0; i < adapter->num_rx_queues; i++)
6053                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6054 }
6055
6056 /**
6057  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6058  * @adapter: board private structure
6059  **/
6060 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6061 {
6062         int i;
6063
6064         for (i = 0; i < adapter->num_tx_queues; i++)
6065                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6066         for (i = 0; i < adapter->num_xdp_queues; i++)
6067                 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6068 }
6069
6070 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6071 {
6072         struct hlist_node *node2;
6073         struct ixgbe_fdir_filter *filter;
6074
6075         spin_lock(&adapter->fdir_perfect_lock);
6076
6077         hlist_for_each_entry_safe(filter, node2,
6078                                   &adapter->fdir_filter_list, fdir_node) {
6079                 hlist_del(&filter->fdir_node);
6080                 kfree(filter);
6081         }
6082         adapter->fdir_filter_count = 0;
6083
6084         spin_unlock(&adapter->fdir_perfect_lock);
6085 }
6086
6087 void ixgbe_down(struct ixgbe_adapter *adapter)
6088 {
6089         struct net_device *netdev = adapter->netdev;
6090         struct ixgbe_hw *hw = &adapter->hw;
6091         int i;
6092
6093         /* signal that we are down to the interrupt handler */
6094         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6095                 return; /* do nothing if already down */
6096
6097         /* Shut off incoming Tx traffic */
6098         netif_tx_stop_all_queues(netdev);
6099
6100         /* call carrier off first to avoid false dev_watchdog timeouts */
6101         netif_carrier_off(netdev);
6102         netif_tx_disable(netdev);
6103
6104         /* Disable Rx */
6105         ixgbe_disable_rx(adapter);
6106
6107         /* synchronize_rcu() needed for pending XDP buffers to drain */
6108         if (adapter->xdp_ring[0])
6109                 synchronize_rcu();
6110
6111         ixgbe_irq_disable(adapter);
6112
6113         ixgbe_napi_disable_all(adapter);
6114
6115         clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6116         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6117         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6118
6119         del_timer_sync(&adapter->service_timer);
6120
6121         if (adapter->num_vfs) {
6122                 /* Clear EITR Select mapping */
6123                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6124
6125                 /* Mark all the VFs as inactive */
6126                 for (i = 0 ; i < adapter->num_vfs; i++)
6127                         adapter->vfinfo[i].clear_to_send = false;
6128
6129                 /* ping all the active vfs to let them know we are going down */
6130                 ixgbe_ping_all_vfs(adapter);
6131
6132                 /* Disable all VFTE/VFRE TX/RX */
6133                 ixgbe_disable_tx_rx(adapter);
6134         }
6135
6136         /* disable transmits in the hardware now that interrupts are off */
6137         ixgbe_disable_tx(adapter);
6138
6139         if (!pci_channel_offline(adapter->pdev))
6140                 ixgbe_reset(adapter);
6141
6142         /* power down the optics for 82599 SFP+ fiber */
6143         if (hw->mac.ops.disable_tx_laser)
6144                 hw->mac.ops.disable_tx_laser(hw);
6145
6146         ixgbe_clean_all_tx_rings(adapter);
6147         ixgbe_clean_all_rx_rings(adapter);
6148 }
6149
6150 /**
6151  * ixgbe_eee_capable - helper function to determine EEE support on X550
6152  * @adapter: board private structure
6153  */
6154 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6155 {
6156         struct ixgbe_hw *hw = &adapter->hw;
6157
6158         switch (hw->device_id) {
6159         case IXGBE_DEV_ID_X550EM_A_1G_T:
6160         case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6161                 if (!hw->phy.eee_speeds_supported)
6162                         break;
6163                 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6164                 if (!hw->phy.eee_speeds_advertised)
6165                         break;
6166                 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6167                 break;
6168         default:
6169                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6170                 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6171                 break;
6172         }
6173 }
6174
6175 /**
6176  * ixgbe_tx_timeout - Respond to a Tx Hang
6177  * @netdev: network interface device structure
6178  **/
6179 static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int txqueue)
6180 {
6181         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6182
6183         /* Do the reset outside of interrupt context */
6184         ixgbe_tx_timeout_reset(adapter);
6185 }
6186
6187 #ifdef CONFIG_IXGBE_DCB
6188 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6189 {
6190         struct ixgbe_hw *hw = &adapter->hw;
6191         struct tc_configuration *tc;
6192         int j;
6193
6194         switch (hw->mac.type) {
6195         case ixgbe_mac_82598EB:
6196         case ixgbe_mac_82599EB:
6197                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6198                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6199                 break;
6200         case ixgbe_mac_X540:
6201         case ixgbe_mac_X550:
6202                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6203                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6204                 break;
6205         case ixgbe_mac_X550EM_x:
6206         case ixgbe_mac_x550em_a:
6207         default:
6208                 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6209                 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6210                 break;
6211         }
6212
6213         /* Configure DCB traffic classes */
6214         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6215                 tc = &adapter->dcb_cfg.tc_config[j];
6216                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6217                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6218                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6219                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6220                 tc->dcb_pfc = pfc_disabled;
6221         }
6222
6223         /* Initialize default user to priority mapping, UPx->TC0 */
6224         tc = &adapter->dcb_cfg.tc_config[0];
6225         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6226         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6227
6228         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6229         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6230         adapter->dcb_cfg.pfc_mode_enable = false;
6231         adapter->dcb_set_bitmap = 0x00;
6232         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6233                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6234         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6235                sizeof(adapter->temp_dcb_cfg));
6236 }
6237 #endif
6238
6239 /**
6240  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6241  * @adapter: board private structure to initialize
6242  * @ii: pointer to ixgbe_info for device
6243  *
6244  * ixgbe_sw_init initializes the Adapter private data structure.
6245  * Fields are initialized based on PCI device information and
6246  * OS network device settings (MTU size).
6247  **/
6248 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6249                          const struct ixgbe_info *ii)
6250 {
6251         struct ixgbe_hw *hw = &adapter->hw;
6252         struct pci_dev *pdev = adapter->pdev;
6253         unsigned int rss, fdir;
6254         u32 fwsm;
6255         int i;
6256
6257         /* PCI config space info */
6258
6259         hw->vendor_id = pdev->vendor;
6260         hw->device_id = pdev->device;
6261         hw->revision_id = pdev->revision;
6262         hw->subsystem_vendor_id = pdev->subsystem_vendor;
6263         hw->subsystem_device_id = pdev->subsystem_device;
6264
6265         /* get_invariants needs the device IDs */
6266         ii->get_invariants(hw);
6267
6268         /* Set common capability flags and settings */
6269         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6270         adapter->ring_feature[RING_F_RSS].limit = rss;
6271         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6272         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6273         adapter->atr_sample_rate = 20;
6274         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6275         adapter->ring_feature[RING_F_FDIR].limit = fdir;
6276         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6277         adapter->ring_feature[RING_F_VMDQ].limit = 1;
6278 #ifdef CONFIG_IXGBE_DCA
6279         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6280 #endif
6281 #ifdef CONFIG_IXGBE_DCB
6282         adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6283         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6284 #endif
6285 #ifdef IXGBE_FCOE
6286         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6287         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6288 #ifdef CONFIG_IXGBE_DCB
6289         /* Default traffic class to use for FCoE */
6290         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6291 #endif /* CONFIG_IXGBE_DCB */
6292 #endif /* IXGBE_FCOE */
6293
6294         /* initialize static ixgbe jump table entries */
6295         adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6296                                           GFP_KERNEL);
6297         if (!adapter->jump_tables[0])
6298                 return -ENOMEM;
6299         adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6300
6301         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6302                 adapter->jump_tables[i] = NULL;
6303
6304         adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6305                                      sizeof(struct ixgbe_mac_addr),
6306                                      GFP_KERNEL);
6307         if (!adapter->mac_table)
6308                 return -ENOMEM;
6309
6310         if (ixgbe_init_rss_key(adapter))
6311                 return -ENOMEM;
6312
6313         adapter->af_xdp_zc_qps = bitmap_zalloc(MAX_XDP_QUEUES, GFP_KERNEL);
6314         if (!adapter->af_xdp_zc_qps)
6315                 return -ENOMEM;
6316
6317         /* Set MAC specific capability flags and exceptions */
6318         switch (hw->mac.type) {
6319         case ixgbe_mac_82598EB:
6320                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6321
6322                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6323                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6324
6325                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6326                 adapter->ring_feature[RING_F_FDIR].limit = 0;
6327                 adapter->atr_sample_rate = 0;
6328                 adapter->fdir_pballoc = 0;
6329 #ifdef IXGBE_FCOE
6330                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6331                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6332 #ifdef CONFIG_IXGBE_DCB
6333                 adapter->fcoe.up = 0;
6334 #endif /* IXGBE_DCB */
6335 #endif /* IXGBE_FCOE */
6336                 break;
6337         case ixgbe_mac_82599EB:
6338                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6339                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6340                 break;
6341         case ixgbe_mac_X540:
6342                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6343                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6344                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6345                 break;
6346         case ixgbe_mac_x550em_a:
6347                 switch (hw->device_id) {
6348                 case IXGBE_DEV_ID_X550EM_A_1G_T:
6349                 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6350                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6351                         break;
6352                 default:
6353                         break;
6354                 }
6355                 fallthrough;
6356         case ixgbe_mac_X550EM_x:
6357 #ifdef CONFIG_IXGBE_DCB
6358                 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6359 #endif
6360 #ifdef IXGBE_FCOE
6361                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6362 #ifdef CONFIG_IXGBE_DCB
6363                 adapter->fcoe.up = 0;
6364 #endif /* IXGBE_DCB */
6365 #endif /* IXGBE_FCOE */
6366                 fallthrough;
6367         case ixgbe_mac_X550:
6368                 if (hw->mac.type == ixgbe_mac_X550)
6369                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6370 #ifdef CONFIG_IXGBE_DCA
6371                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6372 #endif
6373                 break;
6374         default:
6375                 break;
6376         }
6377
6378 #ifdef IXGBE_FCOE
6379         /* FCoE support exists, always init the FCoE lock */
6380         spin_lock_init(&adapter->fcoe.lock);
6381
6382 #endif
6383         /* n-tuple support exists, always init our spinlock */
6384         spin_lock_init(&adapter->fdir_perfect_lock);
6385
6386 #ifdef CONFIG_IXGBE_DCB
6387         ixgbe_init_dcb(adapter);
6388 #endif
6389         ixgbe_init_ipsec_offload(adapter);
6390
6391         /* default flow control settings */
6392         hw->fc.requested_mode = ixgbe_fc_full;
6393         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
6394         ixgbe_pbthresh_setup(adapter);
6395         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6396         hw->fc.send_xon = true;
6397         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6398
6399 #ifdef CONFIG_PCI_IOV
6400         if (max_vfs > 0)
6401                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6402
6403         /* assign number of SR-IOV VFs */
6404         if (hw->mac.type != ixgbe_mac_82598EB) {
6405                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6406                         max_vfs = 0;
6407                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6408                 }
6409         }
6410 #endif /* CONFIG_PCI_IOV */
6411
6412         /* enable itr by default in dynamic mode */
6413         adapter->rx_itr_setting = 1;
6414         adapter->tx_itr_setting = 1;
6415
6416         /* set default ring sizes */
6417         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6418         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6419
6420         /* set default work limits */
6421         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6422
6423         /* initialize eeprom parameters */
6424         if (ixgbe_init_eeprom_params_generic(hw)) {
6425                 e_dev_err("EEPROM initialization failed\n");
6426                 return -EIO;
6427         }
6428
6429         /* PF holds first pool slot */
6430         set_bit(0, adapter->fwd_bitmask);
6431         set_bit(__IXGBE_DOWN, &adapter->state);
6432
6433         return 0;
6434 }
6435
6436 /**
6437  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6438  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
6439  *
6440  * Return 0 on success, negative on failure
6441  **/
6442 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6443 {
6444         struct device *dev = tx_ring->dev;
6445         int orig_node = dev_to_node(dev);
6446         int ring_node = NUMA_NO_NODE;
6447         int size;
6448
6449         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6450
6451         if (tx_ring->q_vector)
6452                 ring_node = tx_ring->q_vector->numa_node;
6453
6454         tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6455         if (!tx_ring->tx_buffer_info)
6456                 tx_ring->tx_buffer_info = vmalloc(size);
6457         if (!tx_ring->tx_buffer_info)
6458                 goto err;
6459
6460         /* round up to nearest 4K */
6461         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6462         tx_ring->size = ALIGN(tx_ring->size, 4096);
6463
6464         set_dev_node(dev, ring_node);
6465         tx_ring->desc = dma_alloc_coherent(dev,
6466                                            tx_ring->size,
6467                                            &tx_ring->dma,
6468                                            GFP_KERNEL);
6469         set_dev_node(dev, orig_node);
6470         if (!tx_ring->desc)
6471                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6472                                                    &tx_ring->dma, GFP_KERNEL);
6473         if (!tx_ring->desc)
6474                 goto err;
6475
6476         tx_ring->next_to_use = 0;
6477         tx_ring->next_to_clean = 0;
6478         return 0;
6479
6480 err:
6481         vfree(tx_ring->tx_buffer_info);
6482         tx_ring->tx_buffer_info = NULL;
6483         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6484         return -ENOMEM;
6485 }
6486
6487 /**
6488  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6489  * @adapter: board private structure
6490  *
6491  * If this function returns with an error, then it's possible one or
6492  * more of the rings is populated (while the rest are not).  It is the
6493  * callers duty to clean those orphaned rings.
6494  *
6495  * Return 0 on success, negative on failure
6496  **/
6497 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6498 {
6499         int i, j = 0, err = 0;
6500
6501         for (i = 0; i < adapter->num_tx_queues; i++) {
6502                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6503                 if (!err)
6504                         continue;
6505
6506                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6507                 goto err_setup_tx;
6508         }
6509         for (j = 0; j < adapter->num_xdp_queues; j++) {
6510                 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6511                 if (!err)
6512                         continue;
6513
6514                 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6515                 goto err_setup_tx;
6516         }
6517
6518         return 0;
6519 err_setup_tx:
6520         /* rewind the index freeing the rings as we go */
6521         while (j--)
6522                 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6523         while (i--)
6524                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6525         return err;
6526 }
6527
6528 /**
6529  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6530  * @adapter: pointer to ixgbe_adapter
6531  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
6532  *
6533  * Returns 0 on success, negative on failure
6534  **/
6535 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6536                              struct ixgbe_ring *rx_ring)
6537 {
6538         struct device *dev = rx_ring->dev;
6539         int orig_node = dev_to_node(dev);
6540         int ring_node = NUMA_NO_NODE;
6541         int size;
6542
6543         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6544
6545         if (rx_ring->q_vector)
6546                 ring_node = rx_ring->q_vector->numa_node;
6547
6548         rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6549         if (!rx_ring->rx_buffer_info)
6550                 rx_ring->rx_buffer_info = vmalloc(size);
6551         if (!rx_ring->rx_buffer_info)
6552                 goto err;
6553
6554         /* Round up to nearest 4K */
6555         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6556         rx_ring->size = ALIGN(rx_ring->size, 4096);
6557
6558         set_dev_node(dev, ring_node);
6559         rx_ring->desc = dma_alloc_coherent(dev,
6560                                            rx_ring->size,
6561                                            &rx_ring->dma,
6562                                            GFP_KERNEL);
6563         set_dev_node(dev, orig_node);
6564         if (!rx_ring->desc)
6565                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6566                                                    &rx_ring->dma, GFP_KERNEL);
6567         if (!rx_ring->desc)
6568                 goto err;
6569
6570         rx_ring->next_to_clean = 0;
6571         rx_ring->next_to_use = 0;
6572
6573         /* XDP RX-queue info */
6574         if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6575                              rx_ring->queue_index) < 0)
6576                 goto err;
6577
6578         rx_ring->xdp_prog = adapter->xdp_prog;
6579
6580         return 0;
6581 err:
6582         vfree(rx_ring->rx_buffer_info);
6583         rx_ring->rx_buffer_info = NULL;
6584         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6585         return -ENOMEM;
6586 }
6587
6588 /**
6589  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6590  * @adapter: board private structure
6591  *
6592  * If this function returns with an error, then it's possible one or
6593  * more of the rings is populated (while the rest are not).  It is the
6594  * callers duty to clean those orphaned rings.
6595  *
6596  * Return 0 on success, negative on failure
6597  **/
6598 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6599 {
6600         int i, err = 0;
6601
6602         for (i = 0; i < adapter->num_rx_queues; i++) {
6603                 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6604                 if (!err)
6605                         continue;
6606
6607                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6608                 goto err_setup_rx;
6609         }
6610
6611 #ifdef IXGBE_FCOE
6612         err = ixgbe_setup_fcoe_ddp_resources(adapter);
6613         if (!err)
6614 #endif
6615                 return 0;
6616 err_setup_rx:
6617         /* rewind the index freeing the rings as we go */
6618         while (i--)
6619                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6620         return err;
6621 }
6622
6623 /**
6624  * ixgbe_free_tx_resources - Free Tx Resources per Queue
6625  * @tx_ring: Tx descriptor ring for a specific queue
6626  *
6627  * Free all transmit software resources
6628  **/
6629 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6630 {
6631         ixgbe_clean_tx_ring(tx_ring);
6632
6633         vfree(tx_ring->tx_buffer_info);
6634         tx_ring->tx_buffer_info = NULL;
6635
6636         /* if not set, then don't free */
6637         if (!tx_ring->desc)
6638                 return;
6639
6640         dma_free_coherent(tx_ring->dev, tx_ring->size,
6641                           tx_ring->desc, tx_ring->dma);
6642
6643         tx_ring->desc = NULL;
6644 }
6645
6646 /**
6647  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6648  * @adapter: board private structure
6649  *
6650  * Free all transmit software resources
6651  **/
6652 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6653 {
6654         int i;
6655
6656         for (i = 0; i < adapter->num_tx_queues; i++)
6657                 if (adapter->tx_ring[i]->desc)
6658                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
6659         for (i = 0; i < adapter->num_xdp_queues; i++)
6660                 if (adapter->xdp_ring[i]->desc)
6661                         ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6662 }
6663
6664 /**
6665  * ixgbe_free_rx_resources - Free Rx Resources
6666  * @rx_ring: ring to clean the resources from
6667  *
6668  * Free all receive software resources
6669  **/
6670 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6671 {
6672         ixgbe_clean_rx_ring(rx_ring);
6673
6674         rx_ring->xdp_prog = NULL;
6675         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6676         vfree(rx_ring->rx_buffer_info);
6677         rx_ring->rx_buffer_info = NULL;
6678
6679         /* if not set, then don't free */
6680         if (!rx_ring->desc)
6681                 return;
6682
6683         dma_free_coherent(rx_ring->dev, rx_ring->size,
6684                           rx_ring->desc, rx_ring->dma);
6685
6686         rx_ring->desc = NULL;
6687 }
6688
6689 /**
6690  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6691  * @adapter: board private structure
6692  *
6693  * Free all receive software resources
6694  **/
6695 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6696 {
6697         int i;
6698
6699 #ifdef IXGBE_FCOE
6700         ixgbe_free_fcoe_ddp_resources(adapter);
6701
6702 #endif
6703         for (i = 0; i < adapter->num_rx_queues; i++)
6704                 if (adapter->rx_ring[i]->desc)
6705                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
6706 }
6707
6708 /**
6709  * ixgbe_change_mtu - Change the Maximum Transfer Unit
6710  * @netdev: network interface device structure
6711  * @new_mtu: new value for maximum frame size
6712  *
6713  * Returns 0 on success, negative on failure
6714  **/
6715 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6716 {
6717         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6718
6719         if (adapter->xdp_prog) {
6720                 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6721                                      VLAN_HLEN;
6722                 int i;
6723
6724                 for (i = 0; i < adapter->num_rx_queues; i++) {
6725                         struct ixgbe_ring *ring = adapter->rx_ring[i];
6726
6727                         if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6728                                 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6729                                 return -EINVAL;
6730                         }
6731                 }
6732         }
6733
6734         /*
6735          * For 82599EB we cannot allow legacy VFs to enable their receive
6736          * paths when MTU greater than 1500 is configured.  So display a
6737          * warning that legacy VFs will be disabled.
6738          */
6739         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6740             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6741             (new_mtu > ETH_DATA_LEN))
6742                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6743
6744         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6745                    netdev->mtu, new_mtu);
6746
6747         /* must set new MTU before calling down or up */
6748         netdev->mtu = new_mtu;
6749
6750         if (netif_running(netdev))
6751                 ixgbe_reinit_locked(adapter);
6752
6753         return 0;
6754 }
6755
6756 /**
6757  * ixgbe_open - Called when a network interface is made active
6758  * @netdev: network interface device structure
6759  *
6760  * Returns 0 on success, negative value on failure
6761  *
6762  * The open entry point is called when a network interface is made
6763  * active by the system (IFF_UP).  At this point all resources needed
6764  * for transmit and receive operations are allocated, the interrupt
6765  * handler is registered with the OS, the watchdog timer is started,
6766  * and the stack is notified that the interface is ready.
6767  **/
6768 int ixgbe_open(struct net_device *netdev)
6769 {
6770         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6771         struct ixgbe_hw *hw = &adapter->hw;
6772         int err, queues;
6773
6774         /* disallow open during test */
6775         if (test_bit(__IXGBE_TESTING, &adapter->state))
6776                 return -EBUSY;
6777
6778         netif_carrier_off(netdev);
6779
6780         /* allocate transmit descriptors */
6781         err = ixgbe_setup_all_tx_resources(adapter);
6782         if (err)
6783                 goto err_setup_tx;
6784
6785         /* allocate receive descriptors */
6786         err = ixgbe_setup_all_rx_resources(adapter);
6787         if (err)
6788                 goto err_setup_rx;
6789
6790         ixgbe_configure(adapter);
6791
6792         err = ixgbe_request_irq(adapter);
6793         if (err)
6794                 goto err_req_irq;
6795
6796         /* Notify the stack of the actual queue counts. */
6797         queues = adapter->num_tx_queues;
6798         err = netif_set_real_num_tx_queues(netdev, queues);
6799         if (err)
6800                 goto err_set_queues;
6801
6802         queues = adapter->num_rx_queues;
6803         err = netif_set_real_num_rx_queues(netdev, queues);
6804         if (err)
6805                 goto err_set_queues;
6806
6807         ixgbe_ptp_init(adapter);
6808
6809         ixgbe_up_complete(adapter);
6810
6811         udp_tunnel_nic_reset_ntf(netdev);
6812
6813         return 0;
6814
6815 err_set_queues:
6816         ixgbe_free_irq(adapter);
6817 err_req_irq:
6818         ixgbe_free_all_rx_resources(adapter);
6819         if (hw->phy.ops.set_phy_power && !adapter->wol)
6820                 hw->phy.ops.set_phy_power(&adapter->hw, false);
6821 err_setup_rx:
6822         ixgbe_free_all_tx_resources(adapter);
6823 err_setup_tx:
6824         ixgbe_reset(adapter);
6825
6826         return err;
6827 }
6828
6829 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6830 {
6831         ixgbe_ptp_suspend(adapter);
6832
6833         if (adapter->hw.phy.ops.enter_lplu) {
6834                 adapter->hw.phy.reset_disable = true;
6835                 ixgbe_down(adapter);
6836                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6837                 adapter->hw.phy.reset_disable = false;
6838         } else {
6839                 ixgbe_down(adapter);
6840         }
6841
6842         ixgbe_free_irq(adapter);
6843
6844         ixgbe_free_all_tx_resources(adapter);
6845         ixgbe_free_all_rx_resources(adapter);
6846 }
6847
6848 /**
6849  * ixgbe_close - Disables a network interface
6850  * @netdev: network interface device structure
6851  *
6852  * Returns 0, this is not allowed to fail
6853  *
6854  * The close entry point is called when an interface is de-activated
6855  * by the OS.  The hardware is still under the drivers control, but
6856  * needs to be disabled.  A global MAC reset is issued to stop the
6857  * hardware, and all transmit and receive resources are freed.
6858  **/
6859 int ixgbe_close(struct net_device *netdev)
6860 {
6861         struct ixgbe_adapter *adapter = netdev_priv(netdev);
6862
6863         ixgbe_ptp_stop(adapter);
6864
6865         if (netif_device_present(netdev))
6866                 ixgbe_close_suspend(adapter);
6867
6868         ixgbe_fdir_filter_exit(adapter);
6869
6870         ixgbe_release_hw_control(adapter);
6871
6872         return 0;
6873 }
6874
6875 static int __maybe_unused ixgbe_resume(struct device *dev_d)
6876 {
6877         struct pci_dev *pdev = to_pci_dev(dev_d);
6878         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6879         struct net_device *netdev = adapter->netdev;
6880         u32 err;
6881
6882         adapter->hw.hw_addr = adapter->io_addr;
6883
6884         smp_mb__before_atomic();
6885         clear_bit(__IXGBE_DISABLED, &adapter->state);
6886         pci_set_master(pdev);
6887
6888         device_wakeup_disable(dev_d);
6889
6890         ixgbe_reset(adapter);
6891
6892         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6893
6894         rtnl_lock();
6895         err = ixgbe_init_interrupt_scheme(adapter);
6896         if (!err && netif_running(netdev))
6897                 err = ixgbe_open(netdev);
6898
6899
6900         if (!err)
6901                 netif_device_attach(netdev);
6902         rtnl_unlock();
6903
6904         return err;
6905 }
6906
6907 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6908 {
6909         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6910         struct net_device *netdev = adapter->netdev;
6911         struct ixgbe_hw *hw = &adapter->hw;
6912         u32 ctrl;
6913         u32 wufc = adapter->wol;
6914
6915         rtnl_lock();
6916         netif_device_detach(netdev);
6917
6918         if (netif_running(netdev))
6919                 ixgbe_close_suspend(adapter);
6920
6921         ixgbe_clear_interrupt_scheme(adapter);
6922         rtnl_unlock();
6923
6924         if (hw->mac.ops.stop_link_on_d3)
6925                 hw->mac.ops.stop_link_on_d3(hw);
6926
6927         if (wufc) {
6928                 u32 fctrl;
6929
6930                 ixgbe_set_rx_mode(netdev);
6931
6932                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6933                 if (hw->mac.ops.enable_tx_laser)
6934                         hw->mac.ops.enable_tx_laser(hw);
6935
6936                 /* enable the reception of multicast packets */
6937                 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6938                 fctrl |= IXGBE_FCTRL_MPE;
6939                 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6940
6941                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6942                 ctrl |= IXGBE_CTRL_GIO_DIS;
6943                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6944
6945                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6946         } else {
6947                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6948                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6949         }
6950
6951         switch (hw->mac.type) {
6952         case ixgbe_mac_82598EB:
6953                 pci_wake_from_d3(pdev, false);
6954                 break;
6955         case ixgbe_mac_82599EB:
6956         case ixgbe_mac_X540:
6957         case ixgbe_mac_X550:
6958         case ixgbe_mac_X550EM_x:
6959         case ixgbe_mac_x550em_a:
6960                 pci_wake_from_d3(pdev, !!wufc);
6961                 break;
6962         default:
6963                 break;
6964         }
6965
6966         *enable_wake = !!wufc;
6967         if (hw->phy.ops.set_phy_power && !*enable_wake)
6968                 hw->phy.ops.set_phy_power(hw, false);
6969
6970         ixgbe_release_hw_control(adapter);
6971
6972         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6973                 pci_disable_device(pdev);
6974
6975         return 0;
6976 }
6977
6978 static int __maybe_unused ixgbe_suspend(struct device *dev_d)
6979 {
6980         struct pci_dev *pdev = to_pci_dev(dev_d);
6981         int retval;
6982         bool wake;
6983
6984         retval = __ixgbe_shutdown(pdev, &wake);
6985
6986         device_set_wakeup_enable(dev_d, wake);
6987
6988         return retval;
6989 }
6990
6991 static void ixgbe_shutdown(struct pci_dev *pdev)
6992 {
6993         bool wake;
6994
6995         __ixgbe_shutdown(pdev, &wake);
6996
6997         if (system_state == SYSTEM_POWER_OFF) {
6998                 pci_wake_from_d3(pdev, wake);
6999                 pci_set_power_state(pdev, PCI_D3hot);
7000         }
7001 }
7002
7003 /**
7004  * ixgbe_update_stats - Update the board statistics counters.
7005  * @adapter: board private structure
7006  **/
7007 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7008 {
7009         struct net_device *netdev = adapter->netdev;
7010         struct ixgbe_hw *hw = &adapter->hw;
7011         struct ixgbe_hw_stats *hwstats = &adapter->stats;
7012         u64 total_mpc = 0;
7013         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7014         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7015         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7016         u64 alloc_rx_page = 0;
7017         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7018
7019         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7020             test_bit(__IXGBE_RESETTING, &adapter->state))
7021                 return;
7022
7023         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7024                 u64 rsc_count = 0;
7025                 u64 rsc_flush = 0;
7026                 for (i = 0; i < adapter->num_rx_queues; i++) {
7027                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7028                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7029                 }
7030                 adapter->rsc_total_count = rsc_count;
7031                 adapter->rsc_total_flush = rsc_flush;
7032         }
7033
7034         for (i = 0; i < adapter->num_rx_queues; i++) {
7035                 struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]);
7036
7037                 if (!rx_ring)
7038                         continue;
7039                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7040                 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7041                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7042                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7043                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7044                 bytes += rx_ring->stats.bytes;
7045                 packets += rx_ring->stats.packets;
7046         }
7047         adapter->non_eop_descs = non_eop_descs;
7048         adapter->alloc_rx_page = alloc_rx_page;
7049         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7050         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7051         adapter->hw_csum_rx_error = hw_csum_rx_error;
7052         netdev->stats.rx_bytes = bytes;
7053         netdev->stats.rx_packets = packets;
7054
7055         bytes = 0;
7056         packets = 0;
7057         /* gather some stats to the adapter struct that are per queue */
7058         for (i = 0; i < adapter->num_tx_queues; i++) {
7059                 struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]);
7060
7061                 if (!tx_ring)
7062                         continue;
7063                 restart_queue += tx_ring->tx_stats.restart_queue;
7064                 tx_busy += tx_ring->tx_stats.tx_busy;
7065                 bytes += tx_ring->stats.bytes;
7066                 packets += tx_ring->stats.packets;
7067         }
7068         for (i = 0; i < adapter->num_xdp_queues; i++) {
7069                 struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]);
7070
7071                 if (!xdp_ring)
7072                         continue;
7073                 restart_queue += xdp_ring->tx_stats.restart_queue;
7074                 tx_busy += xdp_ring->tx_stats.tx_busy;
7075                 bytes += xdp_ring->stats.bytes;
7076                 packets += xdp_ring->stats.packets;
7077         }
7078         adapter->restart_queue = restart_queue;
7079         adapter->tx_busy = tx_busy;
7080         netdev->stats.tx_bytes = bytes;
7081         netdev->stats.tx_packets = packets;
7082
7083         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7084
7085         /* 8 register reads */
7086         for (i = 0; i < 8; i++) {
7087                 /* for packet buffers not used, the register should read 0 */
7088                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7089                 missed_rx += mpc;
7090                 hwstats->mpc[i] += mpc;
7091                 total_mpc += hwstats->mpc[i];
7092                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7093                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7094                 switch (hw->mac.type) {
7095                 case ixgbe_mac_82598EB:
7096                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7097                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7098                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7099                         hwstats->pxonrxc[i] +=
7100                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7101                         break;
7102                 case ixgbe_mac_82599EB:
7103                 case ixgbe_mac_X540:
7104                 case ixgbe_mac_X550:
7105                 case ixgbe_mac_X550EM_x:
7106                 case ixgbe_mac_x550em_a:
7107                         hwstats->pxonrxc[i] +=
7108                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7109                         break;
7110                 default:
7111                         break;
7112                 }
7113         }
7114
7115         /*16 register reads */
7116         for (i = 0; i < 16; i++) {
7117                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7118                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7119                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7120                     (hw->mac.type == ixgbe_mac_X540) ||
7121                     (hw->mac.type == ixgbe_mac_X550) ||
7122                     (hw->mac.type == ixgbe_mac_X550EM_x) ||
7123                     (hw->mac.type == ixgbe_mac_x550em_a)) {
7124                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7125                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7126                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7127                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7128                 }
7129         }
7130
7131         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7132         /* work around hardware counting issue */
7133         hwstats->gprc -= missed_rx;
7134
7135         ixgbe_update_xoff_received(adapter);
7136
7137         /* 82598 hardware only has a 32 bit counter in the high register */
7138         switch (hw->mac.type) {
7139         case ixgbe_mac_82598EB:
7140                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7141                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7142                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7143                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7144                 break;
7145         case ixgbe_mac_X540:
7146         case ixgbe_mac_X550:
7147         case ixgbe_mac_X550EM_x:
7148         case ixgbe_mac_x550em_a:
7149                 /* OS2BMC stats are X540 and later */
7150                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7151                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7152                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7153                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7154                 fallthrough;
7155         case ixgbe_mac_82599EB:
7156                 for (i = 0; i < 16; i++)
7157                         adapter->hw_rx_no_dma_resources +=
7158                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7159                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7160                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7161                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7162                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7163                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7164                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7165                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7166                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7167                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7168 #ifdef IXGBE_FCOE
7169                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7170                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7171                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7172                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7173                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7174                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7175                 /* Add up per cpu counters for total ddp aloc fail */
7176                 if (adapter->fcoe.ddp_pool) {
7177                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7178                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
7179                         unsigned int cpu;
7180                         u64 noddp = 0, noddp_ext_buff = 0;
7181                         for_each_possible_cpu(cpu) {
7182                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7183                                 noddp += ddp_pool->noddp;
7184                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7185                         }
7186                         hwstats->fcoe_noddp = noddp;
7187                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7188                 }
7189 #endif /* IXGBE_FCOE */
7190                 break;
7191         default:
7192                 break;
7193         }
7194         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7195         hwstats->bprc += bprc;
7196         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7197         if (hw->mac.type == ixgbe_mac_82598EB)
7198                 hwstats->mprc -= bprc;
7199         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7200         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7201         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7202         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7203         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7204         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7205         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7206         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7207         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7208         hwstats->lxontxc += lxon;
7209         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7210         hwstats->lxofftxc += lxoff;
7211         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7212         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7213         /*
7214          * 82598 errata - tx of flow control packets is included in tx counters
7215          */
7216         xon_off_tot = lxon + lxoff;
7217         hwstats->gptc -= xon_off_tot;
7218         hwstats->mptc -= xon_off_tot;
7219         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7220         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7221         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7222         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7223         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7224         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7225         hwstats->ptc64 -= xon_off_tot;
7226         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7227         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7228         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7229         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7230         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7231         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7232
7233         /* Fill out the OS statistics structure */
7234         netdev->stats.multicast = hwstats->mprc;
7235
7236         /* Rx Errors */
7237         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7238         netdev->stats.rx_dropped = 0;
7239         netdev->stats.rx_length_errors = hwstats->rlec;
7240         netdev->stats.rx_crc_errors = hwstats->crcerrs;
7241         netdev->stats.rx_missed_errors = total_mpc;
7242 }
7243
7244 /**
7245  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7246  * @adapter: pointer to the device adapter structure
7247  **/
7248 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7249 {
7250         struct ixgbe_hw *hw = &adapter->hw;
7251         int i;
7252
7253         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7254                 return;
7255
7256         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7257
7258         /* if interface is down do nothing */
7259         if (test_bit(__IXGBE_DOWN, &adapter->state))
7260                 return;
7261
7262         /* do nothing if we are not using signature filters */
7263         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7264                 return;
7265
7266         adapter->fdir_overflow++;
7267
7268         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7269                 for (i = 0; i < adapter->num_tx_queues; i++)
7270                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7271                                 &(adapter->tx_ring[i]->state));
7272                 for (i = 0; i < adapter->num_xdp_queues; i++)
7273                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7274                                 &adapter->xdp_ring[i]->state);
7275                 /* re-enable flow director interrupts */
7276                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7277         } else {
7278                 e_err(probe, "failed to finish FDIR re-initialization, "
7279                       "ignored adding FDIR ATR filters\n");
7280         }
7281 }
7282
7283 /**
7284  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7285  * @adapter: pointer to the device adapter structure
7286  *
7287  * This function serves two purposes.  First it strobes the interrupt lines
7288  * in order to make certain interrupts are occurring.  Secondly it sets the
7289  * bits needed to check for TX hangs.  As a result we should immediately
7290  * determine if a hang has occurred.
7291  */
7292 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7293 {
7294         struct ixgbe_hw *hw = &adapter->hw;
7295         u64 eics = 0;
7296         int i;
7297
7298         /* If we're down, removing or resetting, just bail */
7299         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7300             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7301             test_bit(__IXGBE_RESETTING, &adapter->state))
7302                 return;
7303
7304         /* Force detection of hung controller */
7305         if (netif_carrier_ok(adapter->netdev)) {
7306                 for (i = 0; i < adapter->num_tx_queues; i++)
7307                         set_check_for_tx_hang(adapter->tx_ring[i]);
7308                 for (i = 0; i < adapter->num_xdp_queues; i++)
7309                         set_check_for_tx_hang(adapter->xdp_ring[i]);
7310         }
7311
7312         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7313                 /*
7314                  * for legacy and MSI interrupts don't set any bits
7315                  * that are enabled for EIAM, because this operation
7316                  * would set *both* EIMS and EICS for any bit in EIAM
7317                  */
7318                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7319                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7320         } else {
7321                 /* get one bit for every active tx/rx interrupt vector */
7322                 for (i = 0; i < adapter->num_q_vectors; i++) {
7323                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
7324                         if (qv->rx.ring || qv->tx.ring)
7325                                 eics |= BIT_ULL(i);
7326                 }
7327         }
7328
7329         /* Cause software interrupt to ensure rings are cleaned */
7330         ixgbe_irq_rearm_queues(adapter, eics);
7331 }
7332
7333 /**
7334  * ixgbe_watchdog_update_link - update the link status
7335  * @adapter: pointer to the device adapter structure
7336  **/
7337 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7338 {
7339         struct ixgbe_hw *hw = &adapter->hw;
7340         u32 link_speed = adapter->link_speed;
7341         bool link_up = adapter->link_up;
7342         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7343
7344         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7345                 return;
7346
7347         if (hw->mac.ops.check_link) {
7348                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7349         } else {
7350                 /* always assume link is up, if no check link function */
7351                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7352                 link_up = true;
7353         }
7354
7355         if (adapter->ixgbe_ieee_pfc)
7356                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7357
7358         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7359                 hw->mac.ops.fc_enable(hw);
7360                 ixgbe_set_rx_drop_en(adapter);
7361         }
7362
7363         if (link_up ||
7364             time_after(jiffies, (adapter->link_check_timeout +
7365                                  IXGBE_TRY_LINK_TIMEOUT))) {
7366                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7367                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7368                 IXGBE_WRITE_FLUSH(hw);
7369         }
7370
7371         adapter->link_up = link_up;
7372         adapter->link_speed = link_speed;
7373 }
7374
7375 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7376 {
7377 #ifdef CONFIG_IXGBE_DCB
7378         struct net_device *netdev = adapter->netdev;
7379         struct dcb_app app = {
7380                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7381                               .protocol = 0,
7382                              };
7383         u8 up = 0;
7384
7385         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7386                 up = dcb_ieee_getapp_mask(netdev, &app);
7387
7388         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7389 #endif
7390 }
7391
7392 /**
7393  * ixgbe_watchdog_link_is_up - update netif_carrier status and
7394  *                             print link up message
7395  * @adapter: pointer to the device adapter structure
7396  **/
7397 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7398 {
7399         struct net_device *netdev = adapter->netdev;
7400         struct ixgbe_hw *hw = &adapter->hw;
7401         u32 link_speed = adapter->link_speed;
7402         const char *speed_str;
7403         bool flow_rx, flow_tx;
7404
7405         /* only continue if link was previously down */
7406         if (netif_carrier_ok(netdev))
7407                 return;
7408
7409         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7410
7411         switch (hw->mac.type) {
7412         case ixgbe_mac_82598EB: {
7413                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7414                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7415                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7416                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7417         }
7418                 break;
7419         case ixgbe_mac_X540:
7420         case ixgbe_mac_X550:
7421         case ixgbe_mac_X550EM_x:
7422         case ixgbe_mac_x550em_a:
7423         case ixgbe_mac_82599EB: {
7424                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7425                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7426                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7427                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7428         }
7429                 break;
7430         default:
7431                 flow_tx = false;
7432                 flow_rx = false;
7433                 break;
7434         }
7435
7436         adapter->last_rx_ptp_check = jiffies;
7437
7438         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7439                 ixgbe_ptp_start_cyclecounter(adapter);
7440
7441         switch (link_speed) {
7442         case IXGBE_LINK_SPEED_10GB_FULL:
7443                 speed_str = "10 Gbps";
7444                 break;
7445         case IXGBE_LINK_SPEED_5GB_FULL:
7446                 speed_str = "5 Gbps";
7447                 break;
7448         case IXGBE_LINK_SPEED_2_5GB_FULL:
7449                 speed_str = "2.5 Gbps";
7450                 break;
7451         case IXGBE_LINK_SPEED_1GB_FULL:
7452                 speed_str = "1 Gbps";
7453                 break;
7454         case IXGBE_LINK_SPEED_100_FULL:
7455                 speed_str = "100 Mbps";
7456                 break;
7457         case IXGBE_LINK_SPEED_10_FULL:
7458                 speed_str = "10 Mbps";
7459                 break;
7460         default:
7461                 speed_str = "unknown speed";
7462                 break;
7463         }
7464         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7465                ((flow_rx && flow_tx) ? "RX/TX" :
7466                (flow_rx ? "RX" :
7467                (flow_tx ? "TX" : "None"))));
7468
7469         netif_carrier_on(netdev);
7470         ixgbe_check_vf_rate_limit(adapter);
7471
7472         /* enable transmits */
7473         netif_tx_wake_all_queues(adapter->netdev);
7474
7475         /* update the default user priority for VFs */
7476         ixgbe_update_default_up(adapter);
7477
7478         /* ping all the active vfs to let them know link has changed */
7479         ixgbe_ping_all_vfs(adapter);
7480 }
7481
7482 /**
7483  * ixgbe_watchdog_link_is_down - update netif_carrier status and
7484  *                               print link down message
7485  * @adapter: pointer to the adapter structure
7486  **/
7487 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7488 {
7489         struct net_device *netdev = adapter->netdev;
7490         struct ixgbe_hw *hw = &adapter->hw;
7491
7492         adapter->link_up = false;
7493         adapter->link_speed = 0;
7494
7495         /* only continue if link was up previously */
7496         if (!netif_carrier_ok(netdev))
7497                 return;
7498
7499         /* poll for SFP+ cable when link is down */
7500         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7501                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7502
7503         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7504                 ixgbe_ptp_start_cyclecounter(adapter);
7505
7506         e_info(drv, "NIC Link is Down\n");
7507         netif_carrier_off(netdev);
7508
7509         /* ping all the active vfs to let them know link has changed */
7510         ixgbe_ping_all_vfs(adapter);
7511 }
7512
7513 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7514 {
7515         int i;
7516
7517         for (i = 0; i < adapter->num_tx_queues; i++) {
7518                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7519
7520                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7521                         return true;
7522         }
7523
7524         for (i = 0; i < adapter->num_xdp_queues; i++) {
7525                 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7526
7527                 if (ring->next_to_use != ring->next_to_clean)
7528                         return true;
7529         }
7530
7531         return false;
7532 }
7533
7534 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7535 {
7536         struct ixgbe_hw *hw = &adapter->hw;
7537         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7538         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7539
7540         int i, j;
7541
7542         if (!adapter->num_vfs)
7543                 return false;
7544
7545         /* resetting the PF is only needed for MAC before X550 */
7546         if (hw->mac.type >= ixgbe_mac_X550)
7547                 return false;
7548
7549         for (i = 0; i < adapter->num_vfs; i++) {
7550                 for (j = 0; j < q_per_pool; j++) {
7551                         u32 h, t;
7552
7553                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7554                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7555
7556                         if (h != t)
7557                                 return true;
7558                 }
7559         }
7560
7561         return false;
7562 }
7563
7564 /**
7565  * ixgbe_watchdog_flush_tx - flush queues on link down
7566  * @adapter: pointer to the device adapter structure
7567  **/
7568 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7569 {
7570         if (!netif_carrier_ok(adapter->netdev)) {
7571                 if (ixgbe_ring_tx_pending(adapter) ||
7572                     ixgbe_vf_tx_pending(adapter)) {
7573                         /* We've lost link, so the controller stops DMA,
7574                          * but we've got queued Tx work that's never going
7575                          * to get done, so reset controller to flush Tx.
7576                          * (Do the reset outside of interrupt context).
7577                          */
7578                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7579                         set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7580                 }
7581         }
7582 }
7583
7584 #ifdef CONFIG_PCI_IOV
7585 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7586 {
7587         struct ixgbe_hw *hw = &adapter->hw;
7588         struct pci_dev *pdev = adapter->pdev;
7589         unsigned int vf;
7590         u32 gpc;
7591
7592         if (!(netif_carrier_ok(adapter->netdev)))
7593                 return;
7594
7595         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7596         if (gpc) /* If incrementing then no need for the check below */
7597                 return;
7598         /* Check to see if a bad DMA write target from an errant or
7599          * malicious VF has caused a PCIe error.  If so then we can
7600          * issue a VFLR to the offending VF(s) and then resume without
7601          * requesting a full slot reset.
7602          */
7603
7604         if (!pdev)
7605                 return;
7606
7607         /* check status reg for all VFs owned by this PF */
7608         for (vf = 0; vf < adapter->num_vfs; ++vf) {
7609                 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7610                 u16 status_reg;
7611
7612                 if (!vfdev)
7613                         continue;
7614                 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7615                 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7616                     status_reg & PCI_STATUS_REC_MASTER_ABORT)
7617                         pcie_flr(vfdev);
7618         }
7619 }
7620
7621 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7622 {
7623         u32 ssvpc;
7624
7625         /* Do not perform spoof check for 82598 or if not in IOV mode */
7626         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7627             adapter->num_vfs == 0)
7628                 return;
7629
7630         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7631
7632         /*
7633          * ssvpc register is cleared on read, if zero then no
7634          * spoofed packets in the last interval.
7635          */
7636         if (!ssvpc)
7637                 return;
7638
7639         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7640 }
7641 #else
7642 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7643 {
7644 }
7645
7646 static void
7647 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7648 {
7649 }
7650 #endif /* CONFIG_PCI_IOV */
7651
7652
7653 /**
7654  * ixgbe_watchdog_subtask - check and bring link up
7655  * @adapter: pointer to the device adapter structure
7656  **/
7657 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7658 {
7659         /* if interface is down, removing or resetting, do nothing */
7660         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7661             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7662             test_bit(__IXGBE_RESETTING, &adapter->state))
7663                 return;
7664
7665         ixgbe_watchdog_update_link(adapter);
7666
7667         if (adapter->link_up)
7668                 ixgbe_watchdog_link_is_up(adapter);
7669         else
7670                 ixgbe_watchdog_link_is_down(adapter);
7671
7672         ixgbe_check_for_bad_vf(adapter);
7673         ixgbe_spoof_check(adapter);
7674         ixgbe_update_stats(adapter);
7675
7676         ixgbe_watchdog_flush_tx(adapter);
7677 }
7678
7679 /**
7680  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7681  * @adapter: the ixgbe adapter structure
7682  **/
7683 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7684 {
7685         struct ixgbe_hw *hw = &adapter->hw;
7686         s32 err;
7687
7688         /* not searching for SFP so there is nothing to do here */
7689         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7690             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7691                 return;
7692
7693         if (adapter->sfp_poll_time &&
7694             time_after(adapter->sfp_poll_time, jiffies))
7695                 return; /* If not yet time to poll for SFP */
7696
7697         /* someone else is in init, wait until next service event */
7698         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7699                 return;
7700
7701         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7702
7703         err = hw->phy.ops.identify_sfp(hw);
7704         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7705                 goto sfp_out;
7706
7707         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7708                 /* If no cable is present, then we need to reset
7709                  * the next time we find a good cable. */
7710                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7711         }
7712
7713         /* exit on error */
7714         if (err)
7715                 goto sfp_out;
7716
7717         /* exit if reset not needed */
7718         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7719                 goto sfp_out;
7720
7721         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7722
7723         /*
7724          * A module may be identified correctly, but the EEPROM may not have
7725          * support for that module.  setup_sfp() will fail in that case, so
7726          * we should not allow that module to load.
7727          */
7728         if (hw->mac.type == ixgbe_mac_82598EB)
7729                 err = hw->phy.ops.reset(hw);
7730         else
7731                 err = hw->mac.ops.setup_sfp(hw);
7732
7733         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7734                 goto sfp_out;
7735
7736         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7737         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7738
7739 sfp_out:
7740         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7741
7742         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7743             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7744                 e_dev_err("failed to initialize because an unsupported "
7745                           "SFP+ module type was detected.\n");
7746                 e_dev_err("Reload the driver after installing a "
7747                           "supported module.\n");
7748                 unregister_netdev(adapter->netdev);
7749         }
7750 }
7751
7752 /**
7753  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7754  * @adapter: the ixgbe adapter structure
7755  **/
7756 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7757 {
7758         struct ixgbe_hw *hw = &adapter->hw;
7759         u32 cap_speed;
7760         u32 speed;
7761         bool autoneg = false;
7762
7763         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7764                 return;
7765
7766         /* someone else is in init, wait until next service event */
7767         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7768                 return;
7769
7770         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7771
7772         hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7773
7774         /* advertise highest capable link speed */
7775         if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7776                 speed = IXGBE_LINK_SPEED_10GB_FULL;
7777         else
7778                 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7779                                      IXGBE_LINK_SPEED_1GB_FULL);
7780
7781         if (hw->mac.ops.setup_link)
7782                 hw->mac.ops.setup_link(hw, speed, true);
7783
7784         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7785         adapter->link_check_timeout = jiffies;
7786         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7787 }
7788
7789 /**
7790  * ixgbe_service_timer - Timer Call-back
7791  * @t: pointer to timer_list structure
7792  **/
7793 static void ixgbe_service_timer(struct timer_list *t)
7794 {
7795         struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7796         unsigned long next_event_offset;
7797
7798         /* poll faster when waiting for link */
7799         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7800                 next_event_offset = HZ / 10;
7801         else
7802                 next_event_offset = HZ * 2;
7803
7804         /* Reset the timer */
7805         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7806
7807         ixgbe_service_event_schedule(adapter);
7808 }
7809
7810 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7811 {
7812         struct ixgbe_hw *hw = &adapter->hw;
7813         u32 status;
7814
7815         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7816                 return;
7817
7818         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7819
7820         if (!hw->phy.ops.handle_lasi)
7821                 return;
7822
7823         status = hw->phy.ops.handle_lasi(&adapter->hw);
7824         if (status != IXGBE_ERR_OVERTEMP)
7825                 return;
7826
7827         e_crit(drv, "%s\n", ixgbe_overheat_msg);
7828 }
7829
7830 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7831 {
7832         if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7833                 return;
7834
7835         rtnl_lock();
7836         /* If we're already down, removing or resetting, just bail */
7837         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7838             test_bit(__IXGBE_REMOVING, &adapter->state) ||
7839             test_bit(__IXGBE_RESETTING, &adapter->state)) {
7840                 rtnl_unlock();
7841                 return;
7842         }
7843
7844         ixgbe_dump(adapter);
7845         netdev_err(adapter->netdev, "Reset adapter\n");
7846         adapter->tx_timeout_count++;
7847
7848         ixgbe_reinit_locked(adapter);
7849         rtnl_unlock();
7850 }
7851
7852 /**
7853  * ixgbe_check_fw_error - Check firmware for errors
7854  * @adapter: the adapter private structure
7855  *
7856  * Check firmware errors in register FWSM
7857  */
7858 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7859 {
7860         struct ixgbe_hw *hw = &adapter->hw;
7861         u32 fwsm;
7862
7863         /* read fwsm.ext_err_ind register and log errors */
7864         fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7865
7866         if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7867             !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7868                 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7869                            fwsm);
7870
7871         if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7872                 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7873                 return true;
7874         }
7875
7876         return false;
7877 }
7878
7879 /**
7880  * ixgbe_service_task - manages and runs subtasks
7881  * @work: pointer to work_struct containing our data
7882  **/
7883 static void ixgbe_service_task(struct work_struct *work)
7884 {
7885         struct ixgbe_adapter *adapter = container_of(work,
7886                                                      struct ixgbe_adapter,
7887                                                      service_task);
7888         if (ixgbe_removed(adapter->hw.hw_addr)) {
7889                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7890                         rtnl_lock();
7891                         ixgbe_down(adapter);
7892                         rtnl_unlock();
7893                 }
7894                 ixgbe_service_event_complete(adapter);
7895                 return;
7896         }
7897         if (ixgbe_check_fw_error(adapter)) {
7898                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
7899                         unregister_netdev(adapter->netdev);
7900                 ixgbe_service_event_complete(adapter);
7901                 return;
7902         }
7903         ixgbe_reset_subtask(adapter);
7904         ixgbe_phy_interrupt_subtask(adapter);
7905         ixgbe_sfp_detection_subtask(adapter);
7906         ixgbe_sfp_link_config_subtask(adapter);
7907         ixgbe_check_overtemp_subtask(adapter);
7908         ixgbe_watchdog_subtask(adapter);
7909         ixgbe_fdir_reinit_subtask(adapter);
7910         ixgbe_check_hang_subtask(adapter);
7911
7912         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7913                 ixgbe_ptp_overflow_check(adapter);
7914                 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7915                         ixgbe_ptp_rx_hang(adapter);
7916                 ixgbe_ptp_tx_hang(adapter);
7917         }
7918
7919         ixgbe_service_event_complete(adapter);
7920 }
7921
7922 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7923                      struct ixgbe_tx_buffer *first,
7924                      u8 *hdr_len,
7925                      struct ixgbe_ipsec_tx_data *itd)
7926 {
7927         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7928         struct sk_buff *skb = first->skb;
7929         union {
7930                 struct iphdr *v4;
7931                 struct ipv6hdr *v6;
7932                 unsigned char *hdr;
7933         } ip;
7934         union {
7935                 struct tcphdr *tcp;
7936                 struct udphdr *udp;
7937                 unsigned char *hdr;
7938         } l4;
7939         u32 paylen, l4_offset;
7940         u32 fceof_saidx = 0;
7941         int err;
7942
7943         if (skb->ip_summed != CHECKSUM_PARTIAL)
7944                 return 0;
7945
7946         if (!skb_is_gso(skb))
7947                 return 0;
7948
7949         err = skb_cow_head(skb, 0);
7950         if (err < 0)
7951                 return err;
7952
7953         if (eth_p_mpls(first->protocol))
7954                 ip.hdr = skb_inner_network_header(skb);
7955         else
7956                 ip.hdr = skb_network_header(skb);
7957         l4.hdr = skb_checksum_start(skb);
7958
7959         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7960         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
7961                       IXGBE_ADVTXD_TUCMD_L4T_UDP : IXGBE_ADVTXD_TUCMD_L4T_TCP;
7962
7963         /* initialize outer IP header fields */
7964         if (ip.v4->version == 4) {
7965                 unsigned char *csum_start = skb_checksum_start(skb);
7966                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7967                 int len = csum_start - trans_start;
7968
7969                 /* IP header will have to cancel out any data that
7970                  * is not a part of the outer IP header, so set to
7971                  * a reverse csum if needed, else init check to 0.
7972                  */
7973                 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7974                                            csum_fold(csum_partial(trans_start,
7975                                                                   len, 0)) : 0;
7976                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7977
7978                 ip.v4->tot_len = 0;
7979                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7980                                    IXGBE_TX_FLAGS_CSUM |
7981                                    IXGBE_TX_FLAGS_IPV4;
7982         } else {
7983                 ip.v6->payload_len = 0;
7984                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7985                                    IXGBE_TX_FLAGS_CSUM;
7986         }
7987
7988         /* determine offset of inner transport header */
7989         l4_offset = l4.hdr - skb->data;
7990
7991         /* remove payload length from inner checksum */
7992         paylen = skb->len - l4_offset;
7993
7994         if (type_tucmd & IXGBE_ADVTXD_TUCMD_L4T_TCP) {
7995                 /* compute length of segmentation header */
7996                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7997                 csum_replace_by_diff(&l4.tcp->check,
7998                                      (__force __wsum)htonl(paylen));
7999         } else {
8000                 /* compute length of segmentation header */
8001                 *hdr_len = sizeof(*l4.udp) + l4_offset;
8002                 csum_replace_by_diff(&l4.udp->check,
8003                                      (__force __wsum)htonl(paylen));
8004         }
8005
8006         /* update gso size and bytecount with header size */
8007         first->gso_segs = skb_shinfo(skb)->gso_segs;
8008         first->bytecount += (first->gso_segs - 1) * *hdr_len;
8009
8010         /* mss_l4len_id: use 0 as index for TSO */
8011         mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8012         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8013
8014         fceof_saidx |= itd->sa_idx;
8015         type_tucmd |= itd->flags | itd->trailer_len;
8016
8017         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8018         vlan_macip_lens = l4.hdr - ip.hdr;
8019         vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8020         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8021
8022         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8023                           mss_l4len_idx);
8024
8025         return 1;
8026 }
8027
8028 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8029 {
8030         unsigned int offset = 0;
8031
8032         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8033
8034         return offset == skb_checksum_start_offset(skb);
8035 }
8036
8037 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8038                           struct ixgbe_tx_buffer *first,
8039                           struct ixgbe_ipsec_tx_data *itd)
8040 {
8041         struct sk_buff *skb = first->skb;
8042         u32 vlan_macip_lens = 0;
8043         u32 fceof_saidx = 0;
8044         u32 type_tucmd = 0;
8045
8046         if (skb->ip_summed != CHECKSUM_PARTIAL) {
8047 csum_failed:
8048                 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8049                                          IXGBE_TX_FLAGS_CC)))
8050                         return;
8051                 goto no_csum;
8052         }
8053
8054         switch (skb->csum_offset) {
8055         case offsetof(struct tcphdr, check):
8056                 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8057                 fallthrough;
8058         case offsetof(struct udphdr, check):
8059                 break;
8060         case offsetof(struct sctphdr, checksum):
8061                 /* validate that this is actually an SCTP request */
8062                 if (((first->protocol == htons(ETH_P_IP)) &&
8063                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8064                     ((first->protocol == htons(ETH_P_IPV6)) &&
8065                      ixgbe_ipv6_csum_is_sctp(skb))) {
8066                         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8067                         break;
8068                 }
8069                 fallthrough;
8070         default:
8071                 skb_checksum_help(skb);
8072                 goto csum_failed;
8073         }
8074
8075         /* update TX checksum flag */
8076         first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8077         vlan_macip_lens = skb_checksum_start_offset(skb) -
8078                           skb_network_offset(skb);
8079 no_csum:
8080         /* vlan_macip_lens: MACLEN, VLAN tag */
8081         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8082         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8083
8084         fceof_saidx |= itd->sa_idx;
8085         type_tucmd |= itd->flags | itd->trailer_len;
8086
8087         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8088 }
8089
8090 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8091         ((_flag <= _result) ? \
8092          ((u32)(_input & _flag) * (_result / _flag)) : \
8093          ((u32)(_input & _flag) / (_flag / _result)))
8094
8095 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8096 {
8097         /* set type for advanced descriptor with frame checksum insertion */
8098         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8099                        IXGBE_ADVTXD_DCMD_DEXT |
8100                        IXGBE_ADVTXD_DCMD_IFCS;
8101
8102         /* set HW vlan bit if vlan is present */
8103         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8104                                    IXGBE_ADVTXD_DCMD_VLE);
8105
8106         /* set segmentation enable bits for TSO/FSO */
8107         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8108                                    IXGBE_ADVTXD_DCMD_TSE);
8109
8110         /* set timestamp bit if present */
8111         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8112                                    IXGBE_ADVTXD_MAC_TSTAMP);
8113
8114         /* insert frame checksum */
8115         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8116
8117         return cmd_type;
8118 }
8119
8120 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8121                                    u32 tx_flags, unsigned int paylen)
8122 {
8123         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8124
8125         /* enable L4 checksum for TSO and TX checksum offload */
8126         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8127                                         IXGBE_TX_FLAGS_CSUM,
8128                                         IXGBE_ADVTXD_POPTS_TXSM);
8129
8130         /* enable IPv4 checksum for TSO */
8131         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8132                                         IXGBE_TX_FLAGS_IPV4,
8133                                         IXGBE_ADVTXD_POPTS_IXSM);
8134
8135         /* enable IPsec */
8136         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8137                                         IXGBE_TX_FLAGS_IPSEC,
8138                                         IXGBE_ADVTXD_POPTS_IPSEC);
8139
8140         /*
8141          * Check Context must be set if Tx switch is enabled, which it
8142          * always is for case where virtual functions are running
8143          */
8144         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8145                                         IXGBE_TX_FLAGS_CC,
8146                                         IXGBE_ADVTXD_CC);
8147
8148         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8149 }
8150
8151 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8152 {
8153         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8154
8155         /* Herbert's original patch had:
8156          *  smp_mb__after_netif_stop_queue();
8157          * but since that doesn't exist yet, just open code it.
8158          */
8159         smp_mb();
8160
8161         /* We need to check again in a case another CPU has just
8162          * made room available.
8163          */
8164         if (likely(ixgbe_desc_unused(tx_ring) < size))
8165                 return -EBUSY;
8166
8167         /* A reprieve! - use start_queue because it doesn't call schedule */
8168         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8169         ++tx_ring->tx_stats.restart_queue;
8170         return 0;
8171 }
8172
8173 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8174 {
8175         if (likely(ixgbe_desc_unused(tx_ring) >= size))
8176                 return 0;
8177
8178         return __ixgbe_maybe_stop_tx(tx_ring, size);
8179 }
8180
8181 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8182                         struct ixgbe_tx_buffer *first,
8183                         const u8 hdr_len)
8184 {
8185         struct sk_buff *skb = first->skb;
8186         struct ixgbe_tx_buffer *tx_buffer;
8187         union ixgbe_adv_tx_desc *tx_desc;
8188         skb_frag_t *frag;
8189         dma_addr_t dma;
8190         unsigned int data_len, size;
8191         u32 tx_flags = first->tx_flags;
8192         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8193         u16 i = tx_ring->next_to_use;
8194
8195         tx_desc = IXGBE_TX_DESC(tx_ring, i);
8196
8197         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8198
8199         size = skb_headlen(skb);
8200         data_len = skb->data_len;
8201
8202 #ifdef IXGBE_FCOE
8203         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8204                 if (data_len < sizeof(struct fcoe_crc_eof)) {
8205                         size -= sizeof(struct fcoe_crc_eof) - data_len;
8206                         data_len = 0;
8207                 } else {
8208                         data_len -= sizeof(struct fcoe_crc_eof);
8209                 }
8210         }
8211
8212 #endif
8213         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8214
8215         tx_buffer = first;
8216
8217         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8218                 if (dma_mapping_error(tx_ring->dev, dma))
8219                         goto dma_error;
8220
8221                 /* record length, and DMA address */
8222                 dma_unmap_len_set(tx_buffer, len, size);
8223                 dma_unmap_addr_set(tx_buffer, dma, dma);
8224
8225                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8226
8227                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8228                         tx_desc->read.cmd_type_len =
8229                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8230
8231                         i++;
8232                         tx_desc++;
8233                         if (i == tx_ring->count) {
8234                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8235                                 i = 0;
8236                         }
8237                         tx_desc->read.olinfo_status = 0;
8238
8239                         dma += IXGBE_MAX_DATA_PER_TXD;
8240                         size -= IXGBE_MAX_DATA_PER_TXD;
8241
8242                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8243                 }
8244
8245                 if (likely(!data_len))
8246                         break;
8247
8248                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8249
8250                 i++;
8251                 tx_desc++;
8252                 if (i == tx_ring->count) {
8253                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8254                         i = 0;
8255                 }
8256                 tx_desc->read.olinfo_status = 0;
8257
8258 #ifdef IXGBE_FCOE
8259                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8260 #else
8261                 size = skb_frag_size(frag);
8262 #endif
8263                 data_len -= size;
8264
8265                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8266                                        DMA_TO_DEVICE);
8267
8268                 tx_buffer = &tx_ring->tx_buffer_info[i];
8269         }
8270
8271         /* write last descriptor with RS and EOP bits */
8272         cmd_type |= size | IXGBE_TXD_CMD;
8273         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8274
8275         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8276
8277         /* set the timestamp */
8278         first->time_stamp = jiffies;
8279
8280         skb_tx_timestamp(skb);
8281
8282         /*
8283          * Force memory writes to complete before letting h/w know there
8284          * are new descriptors to fetch.  (Only applicable for weak-ordered
8285          * memory model archs, such as IA-64).
8286          *
8287          * We also need this memory barrier to make certain all of the
8288          * status bits have been updated before next_to_watch is written.
8289          */
8290         wmb();
8291
8292         /* set next_to_watch value indicating a packet is present */
8293         first->next_to_watch = tx_desc;
8294
8295         i++;
8296         if (i == tx_ring->count)
8297                 i = 0;
8298
8299         tx_ring->next_to_use = i;
8300
8301         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8302
8303         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
8304                 writel(i, tx_ring->tail);
8305         }
8306
8307         return 0;
8308 dma_error:
8309         dev_err(tx_ring->dev, "TX DMA map failed\n");
8310
8311         /* clear dma mappings for failed tx_buffer_info map */
8312         for (;;) {
8313                 tx_buffer = &tx_ring->tx_buffer_info[i];
8314                 if (dma_unmap_len(tx_buffer, len))
8315                         dma_unmap_page(tx_ring->dev,
8316                                        dma_unmap_addr(tx_buffer, dma),
8317                                        dma_unmap_len(tx_buffer, len),
8318                                        DMA_TO_DEVICE);
8319                 dma_unmap_len_set(tx_buffer, len, 0);
8320                 if (tx_buffer == first)
8321                         break;
8322                 if (i == 0)
8323                         i += tx_ring->count;
8324                 i--;
8325         }
8326
8327         dev_kfree_skb_any(first->skb);
8328         first->skb = NULL;
8329
8330         tx_ring->next_to_use = i;
8331
8332         return -1;
8333 }
8334
8335 static void ixgbe_atr(struct ixgbe_ring *ring,
8336                       struct ixgbe_tx_buffer *first)
8337 {
8338         struct ixgbe_q_vector *q_vector = ring->q_vector;
8339         union ixgbe_atr_hash_dword input = { .dword = 0 };
8340         union ixgbe_atr_hash_dword common = { .dword = 0 };
8341         union {
8342                 unsigned char *network;
8343                 struct iphdr *ipv4;
8344                 struct ipv6hdr *ipv6;
8345         } hdr;
8346         struct tcphdr *th;
8347         unsigned int hlen;
8348         struct sk_buff *skb;
8349         __be16 vlan_id;
8350         int l4_proto;
8351
8352         /* if ring doesn't have a interrupt vector, cannot perform ATR */
8353         if (!q_vector)
8354                 return;
8355
8356         /* do nothing if sampling is disabled */
8357         if (!ring->atr_sample_rate)
8358                 return;
8359
8360         ring->atr_count++;
8361
8362         /* currently only IPv4/IPv6 with TCP is supported */
8363         if ((first->protocol != htons(ETH_P_IP)) &&
8364             (first->protocol != htons(ETH_P_IPV6)))
8365                 return;
8366
8367         /* snag network header to get L4 type and address */
8368         skb = first->skb;
8369         hdr.network = skb_network_header(skb);
8370         if (unlikely(hdr.network <= skb->data))
8371                 return;
8372         if (skb->encapsulation &&
8373             first->protocol == htons(ETH_P_IP) &&
8374             hdr.ipv4->protocol == IPPROTO_UDP) {
8375                 struct ixgbe_adapter *adapter = q_vector->adapter;
8376
8377                 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8378                              VXLAN_HEADROOM))
8379                         return;
8380
8381                 /* verify the port is recognized as VXLAN */
8382                 if (adapter->vxlan_port &&
8383                     udp_hdr(skb)->dest == adapter->vxlan_port)
8384                         hdr.network = skb_inner_network_header(skb);
8385
8386                 if (adapter->geneve_port &&
8387                     udp_hdr(skb)->dest == adapter->geneve_port)
8388                         hdr.network = skb_inner_network_header(skb);
8389         }
8390
8391         /* Make sure we have at least [minimum IPv4 header + TCP]
8392          * or [IPv6 header] bytes
8393          */
8394         if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8395                 return;
8396
8397         /* Currently only IPv4/IPv6 with TCP is supported */
8398         switch (hdr.ipv4->version) {
8399         case IPVERSION:
8400                 /* access ihl as u8 to avoid unaligned access on ia64 */
8401                 hlen = (hdr.network[0] & 0x0F) << 2;
8402                 l4_proto = hdr.ipv4->protocol;
8403                 break;
8404         case 6:
8405                 hlen = hdr.network - skb->data;
8406                 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8407                 hlen -= hdr.network - skb->data;
8408                 break;
8409         default:
8410                 return;
8411         }
8412
8413         if (l4_proto != IPPROTO_TCP)
8414                 return;
8415
8416         if (unlikely(skb_tail_pointer(skb) < hdr.network +
8417                      hlen + sizeof(struct tcphdr)))
8418                 return;
8419
8420         th = (struct tcphdr *)(hdr.network + hlen);
8421
8422         /* skip this packet since the socket is closing */
8423         if (th->fin)
8424                 return;
8425
8426         /* sample on all syn packets or once every atr sample count */
8427         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8428                 return;
8429
8430         /* reset sample count */
8431         ring->atr_count = 0;
8432
8433         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8434
8435         /*
8436          * src and dst are inverted, think how the receiver sees them
8437          *
8438          * The input is broken into two sections, a non-compressed section
8439          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
8440          * is XORed together and stored in the compressed dword.
8441          */
8442         input.formatted.vlan_id = vlan_id;
8443
8444         /*
8445          * since src port and flex bytes occupy the same word XOR them together
8446          * and write the value to source port portion of compressed dword
8447          */
8448         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8449                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8450         else
8451                 common.port.src ^= th->dest ^ first->protocol;
8452         common.port.dst ^= th->source;
8453
8454         switch (hdr.ipv4->version) {
8455         case IPVERSION:
8456                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8457                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8458                 break;
8459         case 6:
8460                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8461                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8462                              hdr.ipv6->saddr.s6_addr32[1] ^
8463                              hdr.ipv6->saddr.s6_addr32[2] ^
8464                              hdr.ipv6->saddr.s6_addr32[3] ^
8465                              hdr.ipv6->daddr.s6_addr32[0] ^
8466                              hdr.ipv6->daddr.s6_addr32[1] ^
8467                              hdr.ipv6->daddr.s6_addr32[2] ^
8468                              hdr.ipv6->daddr.s6_addr32[3];
8469                 break;
8470         default:
8471                 break;
8472         }
8473
8474         if (hdr.network != skb_network_header(skb))
8475                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8476
8477         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8478         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8479                                               input, common, ring->queue_index);
8480 }
8481
8482 #ifdef IXGBE_FCOE
8483 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8484                               struct net_device *sb_dev)
8485 {
8486         struct ixgbe_adapter *adapter;
8487         struct ixgbe_ring_feature *f;
8488         int txq;
8489
8490         if (sb_dev) {
8491                 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8492                 struct net_device *vdev = sb_dev;
8493
8494                 txq = vdev->tc_to_txq[tc].offset;
8495                 txq += reciprocal_scale(skb_get_hash(skb),
8496                                         vdev->tc_to_txq[tc].count);
8497
8498                 return txq;
8499         }
8500
8501         /*
8502          * only execute the code below if protocol is FCoE
8503          * or FIP and we have FCoE enabled on the adapter
8504          */
8505         switch (vlan_get_protocol(skb)) {
8506         case htons(ETH_P_FCOE):
8507         case htons(ETH_P_FIP):
8508                 adapter = netdev_priv(dev);
8509
8510                 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8511                         break;
8512                 fallthrough;
8513         default:
8514                 return netdev_pick_tx(dev, skb, sb_dev);
8515         }
8516
8517         f = &adapter->ring_feature[RING_F_FCOE];
8518
8519         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8520                                            smp_processor_id();
8521
8522         while (txq >= f->indices)
8523                 txq -= f->indices;
8524
8525         return txq + f->offset;
8526 }
8527
8528 #endif
8529 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8530                         struct xdp_frame *xdpf)
8531 {
8532         struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8533         struct ixgbe_tx_buffer *tx_buffer;
8534         union ixgbe_adv_tx_desc *tx_desc;
8535         u32 len, cmd_type;
8536         dma_addr_t dma;
8537         u16 i;
8538
8539         len = xdpf->len;
8540
8541         if (unlikely(!ixgbe_desc_unused(ring)))
8542                 return IXGBE_XDP_CONSUMED;
8543
8544         dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8545         if (dma_mapping_error(ring->dev, dma))
8546                 return IXGBE_XDP_CONSUMED;
8547
8548         /* record the location of the first descriptor for this packet */
8549         tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8550         tx_buffer->bytecount = len;
8551         tx_buffer->gso_segs = 1;
8552         tx_buffer->protocol = 0;
8553
8554         i = ring->next_to_use;
8555         tx_desc = IXGBE_TX_DESC(ring, i);
8556
8557         dma_unmap_len_set(tx_buffer, len, len);
8558         dma_unmap_addr_set(tx_buffer, dma, dma);
8559         tx_buffer->xdpf = xdpf;
8560
8561         tx_desc->read.buffer_addr = cpu_to_le64(dma);
8562
8563         /* put descriptor type bits */
8564         cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8565                    IXGBE_ADVTXD_DCMD_DEXT |
8566                    IXGBE_ADVTXD_DCMD_IFCS;
8567         cmd_type |= len | IXGBE_TXD_CMD;
8568         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8569         tx_desc->read.olinfo_status =
8570                 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8571
8572         /* Avoid any potential race with xdp_xmit and cleanup */
8573         smp_wmb();
8574
8575         /* set next_to_watch value indicating a packet is present */
8576         i++;
8577         if (i == ring->count)
8578                 i = 0;
8579
8580         tx_buffer->next_to_watch = tx_desc;
8581         ring->next_to_use = i;
8582
8583         return IXGBE_XDP_TX;
8584 }
8585
8586 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8587                           struct ixgbe_adapter *adapter,
8588                           struct ixgbe_ring *tx_ring)
8589 {
8590         struct ixgbe_tx_buffer *first;
8591         int tso;
8592         u32 tx_flags = 0;
8593         unsigned short f;
8594         u16 count = TXD_USE_COUNT(skb_headlen(skb));
8595         struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8596         __be16 protocol = skb->protocol;
8597         u8 hdr_len = 0;
8598
8599         /*
8600          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8601          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8602          *       + 2 desc gap to keep tail from touching head,
8603          *       + 1 desc for context descriptor,
8604          * otherwise try next time
8605          */
8606         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8607                 count += TXD_USE_COUNT(skb_frag_size(
8608                                                 &skb_shinfo(skb)->frags[f]));
8609
8610         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8611                 tx_ring->tx_stats.tx_busy++;
8612                 return NETDEV_TX_BUSY;
8613         }
8614
8615         /* record the location of the first descriptor for this packet */
8616         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8617         first->skb = skb;
8618         first->bytecount = skb->len;
8619         first->gso_segs = 1;
8620
8621         /* if we have a HW VLAN tag being added default to the HW one */
8622         if (skb_vlan_tag_present(skb)) {
8623                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8624                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8625         /* else if it is a SW VLAN check the next protocol and store the tag */
8626         } else if (protocol == htons(ETH_P_8021Q)) {
8627                 struct vlan_hdr *vhdr, _vhdr;
8628                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8629                 if (!vhdr)
8630                         goto out_drop;
8631
8632                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8633                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
8634                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8635         }
8636         protocol = vlan_get_protocol(skb);
8637
8638         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8639             adapter->ptp_clock) {
8640                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
8641                     !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8642                                            &adapter->state)) {
8643                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8644                         tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8645
8646                         /* schedule check for Tx timestamp */
8647                         adapter->ptp_tx_skb = skb_get(skb);
8648                         adapter->ptp_tx_start = jiffies;
8649                         schedule_work(&adapter->ptp_tx_work);
8650                 } else {
8651                         adapter->tx_hwtstamp_skipped++;
8652                 }
8653         }
8654
8655 #ifdef CONFIG_PCI_IOV
8656         /*
8657          * Use the l2switch_enable flag - would be false if the DMA
8658          * Tx switch had been disabled.
8659          */
8660         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8661                 tx_flags |= IXGBE_TX_FLAGS_CC;
8662
8663 #endif
8664         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8665         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8666             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8667              (skb->priority != TC_PRIO_CONTROL))) {
8668                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8669                 tx_flags |= (skb->priority & 0x7) <<
8670                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8671                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8672                         struct vlan_ethhdr *vhdr;
8673
8674                         if (skb_cow_head(skb, 0))
8675                                 goto out_drop;
8676                         vhdr = (struct vlan_ethhdr *)skb->data;
8677                         vhdr->h_vlan_TCI = htons(tx_flags >>
8678                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
8679                 } else {
8680                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8681                 }
8682         }
8683
8684         /* record initial flags and protocol */
8685         first->tx_flags = tx_flags;
8686         first->protocol = protocol;
8687
8688 #ifdef IXGBE_FCOE
8689         /* setup tx offload for FCoE */
8690         if ((protocol == htons(ETH_P_FCOE)) &&
8691             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8692                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8693                 if (tso < 0)
8694                         goto out_drop;
8695
8696                 goto xmit_fcoe;
8697         }
8698
8699 #endif /* IXGBE_FCOE */
8700
8701 #ifdef CONFIG_IXGBE_IPSEC
8702         if (xfrm_offload(skb) &&
8703             !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8704                 goto out_drop;
8705 #endif
8706         tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8707         if (tso < 0)
8708                 goto out_drop;
8709         else if (!tso)
8710                 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8711
8712         /* add the ATR filter if ATR is on */
8713         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8714                 ixgbe_atr(tx_ring, first);
8715
8716 #ifdef IXGBE_FCOE
8717 xmit_fcoe:
8718 #endif /* IXGBE_FCOE */
8719         if (ixgbe_tx_map(tx_ring, first, hdr_len))
8720                 goto cleanup_tx_timestamp;
8721
8722         return NETDEV_TX_OK;
8723
8724 out_drop:
8725         dev_kfree_skb_any(first->skb);
8726         first->skb = NULL;
8727 cleanup_tx_timestamp:
8728         if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8729                 dev_kfree_skb_any(adapter->ptp_tx_skb);
8730                 adapter->ptp_tx_skb = NULL;
8731                 cancel_work_sync(&adapter->ptp_tx_work);
8732                 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8733         }
8734
8735         return NETDEV_TX_OK;
8736 }
8737
8738 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8739                                       struct net_device *netdev,
8740                                       struct ixgbe_ring *ring)
8741 {
8742         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8743         struct ixgbe_ring *tx_ring;
8744
8745         /*
8746          * The minimum packet size for olinfo paylen is 17 so pad the skb
8747          * in order to meet this minimum size requirement.
8748          */
8749         if (skb_put_padto(skb, 17))
8750                 return NETDEV_TX_OK;
8751
8752         tx_ring = ring ? ring : adapter->tx_ring[skb_get_queue_mapping(skb)];
8753         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8754                 return NETDEV_TX_BUSY;
8755
8756         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8757 }
8758
8759 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8760                                     struct net_device *netdev)
8761 {
8762         return __ixgbe_xmit_frame(skb, netdev, NULL);
8763 }
8764
8765 /**
8766  * ixgbe_set_mac - Change the Ethernet Address of the NIC
8767  * @netdev: network interface device structure
8768  * @p: pointer to an address structure
8769  *
8770  * Returns 0 on success, negative on failure
8771  **/
8772 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8773 {
8774         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8775         struct ixgbe_hw *hw = &adapter->hw;
8776         struct sockaddr *addr = p;
8777
8778         if (!is_valid_ether_addr(addr->sa_data))
8779                 return -EADDRNOTAVAIL;
8780
8781         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8782         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8783
8784         ixgbe_mac_set_default_filter(adapter);
8785
8786         return 0;
8787 }
8788
8789 static int
8790 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8791 {
8792         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8793         struct ixgbe_hw *hw = &adapter->hw;
8794         u16 value;
8795         int rc;
8796
8797         if (adapter->mii_bus) {
8798                 int regnum = addr;
8799
8800                 if (devad != MDIO_DEVAD_NONE)
8801                         regnum |= (devad << 16) | MII_ADDR_C45;
8802
8803                 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8804         }
8805
8806         if (prtad != hw->phy.mdio.prtad)
8807                 return -EINVAL;
8808         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8809         if (!rc)
8810                 rc = value;
8811         return rc;
8812 }
8813
8814 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8815                             u16 addr, u16 value)
8816 {
8817         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8818         struct ixgbe_hw *hw = &adapter->hw;
8819
8820         if (adapter->mii_bus) {
8821                 int regnum = addr;
8822
8823                 if (devad != MDIO_DEVAD_NONE)
8824                         regnum |= (devad << 16) | MII_ADDR_C45;
8825
8826                 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8827         }
8828
8829         if (prtad != hw->phy.mdio.prtad)
8830                 return -EINVAL;
8831         return hw->phy.ops.write_reg(hw, addr, devad, value);
8832 }
8833
8834 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8835 {
8836         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8837
8838         switch (cmd) {
8839         case SIOCSHWTSTAMP:
8840                 return ixgbe_ptp_set_ts_config(adapter, req);
8841         case SIOCGHWTSTAMP:
8842                 return ixgbe_ptp_get_ts_config(adapter, req);
8843         case SIOCGMIIPHY:
8844                 if (!adapter->hw.phy.ops.read_reg)
8845                         return -EOPNOTSUPP;
8846                 fallthrough;
8847         default:
8848                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8849         }
8850 }
8851
8852 /**
8853  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8854  * netdev->dev_addrs
8855  * @dev: network interface device structure
8856  *
8857  * Returns non-zero on failure
8858  **/
8859 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8860 {
8861         int err = 0;
8862         struct ixgbe_adapter *adapter = netdev_priv(dev);
8863         struct ixgbe_hw *hw = &adapter->hw;
8864
8865         if (is_valid_ether_addr(hw->mac.san_addr)) {
8866                 rtnl_lock();
8867                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8868                 rtnl_unlock();
8869
8870                 /* update SAN MAC vmdq pool selection */
8871                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8872         }
8873         return err;
8874 }
8875
8876 /**
8877  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8878  * netdev->dev_addrs
8879  * @dev: network interface device structure
8880  *
8881  * Returns non-zero on failure
8882  **/
8883 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8884 {
8885         int err = 0;
8886         struct ixgbe_adapter *adapter = netdev_priv(dev);
8887         struct ixgbe_mac_info *mac = &adapter->hw.mac;
8888
8889         if (is_valid_ether_addr(mac->san_addr)) {
8890                 rtnl_lock();
8891                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8892                 rtnl_unlock();
8893         }
8894         return err;
8895 }
8896
8897 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8898                                    struct ixgbe_ring *ring)
8899 {
8900         u64 bytes, packets;
8901         unsigned int start;
8902
8903         if (ring) {
8904                 do {
8905                         start = u64_stats_fetch_begin_irq(&ring->syncp);
8906                         packets = ring->stats.packets;
8907                         bytes   = ring->stats.bytes;
8908                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8909                 stats->tx_packets += packets;
8910                 stats->tx_bytes   += bytes;
8911         }
8912 }
8913
8914 static void ixgbe_get_stats64(struct net_device *netdev,
8915                               struct rtnl_link_stats64 *stats)
8916 {
8917         struct ixgbe_adapter *adapter = netdev_priv(netdev);
8918         int i;
8919
8920         rcu_read_lock();
8921         for (i = 0; i < adapter->num_rx_queues; i++) {
8922                 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8923                 u64 bytes, packets;
8924                 unsigned int start;
8925
8926                 if (ring) {
8927                         do {
8928                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
8929                                 packets = ring->stats.packets;
8930                                 bytes   = ring->stats.bytes;
8931                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8932                         stats->rx_packets += packets;
8933                         stats->rx_bytes   += bytes;
8934                 }
8935         }
8936
8937         for (i = 0; i < adapter->num_tx_queues; i++) {
8938                 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8939
8940                 ixgbe_get_ring_stats64(stats, ring);
8941         }
8942         for (i = 0; i < adapter->num_xdp_queues; i++) {
8943                 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8944
8945                 ixgbe_get_ring_stats64(stats, ring);
8946         }
8947         rcu_read_unlock();
8948
8949         /* following stats updated by ixgbe_watchdog_task() */
8950         stats->multicast        = netdev->stats.multicast;
8951         stats->rx_errors        = netdev->stats.rx_errors;
8952         stats->rx_length_errors = netdev->stats.rx_length_errors;
8953         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
8954         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8955 }
8956
8957 #ifdef CONFIG_IXGBE_DCB
8958 /**
8959  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8960  * @adapter: pointer to ixgbe_adapter
8961  * @tc: number of traffic classes currently enabled
8962  *
8963  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8964  * 802.1Q priority maps to a packet buffer that exists.
8965  */
8966 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8967 {
8968         struct ixgbe_hw *hw = &adapter->hw;
8969         u32 reg, rsave;
8970         int i;
8971
8972         /* 82598 have a static priority to TC mapping that can not
8973          * be changed so no validation is needed.
8974          */
8975         if (hw->mac.type == ixgbe_mac_82598EB)
8976                 return;
8977
8978         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8979         rsave = reg;
8980
8981         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8982                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8983
8984                 /* If up2tc is out of bounds default to zero */
8985                 if (up2tc > tc)
8986                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8987         }
8988
8989         if (reg != rsave)
8990                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8991
8992         return;
8993 }
8994
8995 /**
8996  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8997  * @adapter: Pointer to adapter struct
8998  *
8999  * Populate the netdev user priority to tc map
9000  */
9001 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9002 {
9003         struct net_device *dev = adapter->netdev;
9004         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9005         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9006         u8 prio;
9007
9008         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9009                 u8 tc = 0;
9010
9011                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9012                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9013                 else if (ets)
9014                         tc = ets->prio_tc[prio];
9015
9016                 netdev_set_prio_tc_map(dev, prio, tc);
9017         }
9018 }
9019
9020 #endif /* CONFIG_IXGBE_DCB */
9021 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9022 {
9023         struct ixgbe_adapter *adapter = data;
9024         struct ixgbe_fwd_adapter *accel;
9025         int pool;
9026
9027         /* we only care about macvlans... */
9028         if (!netif_is_macvlan(vdev))
9029                 return 0;
9030
9031         /* that have hardware offload enabled... */
9032         accel = macvlan_accel_priv(vdev);
9033         if (!accel)
9034                 return 0;
9035
9036         /* If we can relocate to a different bit do so */
9037         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9038         if (pool < adapter->num_rx_pools) {
9039                 set_bit(pool, adapter->fwd_bitmask);
9040                 accel->pool = pool;
9041                 return 0;
9042         }
9043
9044         /* if we cannot find a free pool then disable the offload */
9045         netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9046         macvlan_release_l2fw_offload(vdev);
9047
9048         /* unbind the queues and drop the subordinate channel config */
9049         netdev_unbind_sb_channel(adapter->netdev, vdev);
9050         netdev_set_sb_channel(vdev, 0);
9051
9052         kfree(accel);
9053
9054         return 0;
9055 }
9056
9057 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9058 {
9059         struct ixgbe_adapter *adapter = netdev_priv(dev);
9060
9061         /* flush any stale bits out of the fwd bitmask */
9062         bitmap_clear(adapter->fwd_bitmask, 1, 63);
9063
9064         /* walk through upper devices reassigning pools */
9065         netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9066                                       adapter);
9067 }
9068
9069 /**
9070  * ixgbe_setup_tc - configure net_device for multiple traffic classes
9071  *
9072  * @dev: net device to configure
9073  * @tc: number of traffic classes to enable
9074  */
9075 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9076 {
9077         struct ixgbe_adapter *adapter = netdev_priv(dev);
9078         struct ixgbe_hw *hw = &adapter->hw;
9079
9080         /* Hardware supports up to 8 traffic classes */
9081         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9082                 return -EINVAL;
9083
9084         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9085                 return -EINVAL;
9086
9087         /* Hardware has to reinitialize queues and interrupts to
9088          * match packet buffer alignment. Unfortunately, the
9089          * hardware is not flexible enough to do this dynamically.
9090          */
9091         if (netif_running(dev))
9092                 ixgbe_close(dev);
9093         else
9094                 ixgbe_reset(adapter);
9095
9096         ixgbe_clear_interrupt_scheme(adapter);
9097
9098 #ifdef CONFIG_IXGBE_DCB
9099         if (tc) {
9100                 if (adapter->xdp_prog) {
9101                         e_warn(probe, "DCB is not supported with XDP\n");
9102
9103                         ixgbe_init_interrupt_scheme(adapter);
9104                         if (netif_running(dev))
9105                                 ixgbe_open(dev);
9106                         return -EINVAL;
9107                 }
9108
9109                 netdev_set_num_tc(dev, tc);
9110                 ixgbe_set_prio_tc_map(adapter);
9111
9112                 adapter->hw_tcs = tc;
9113                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9114
9115                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9116                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9117                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
9118                 }
9119         } else {
9120                 netdev_reset_tc(dev);
9121
9122                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9123                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9124
9125                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9126                 adapter->hw_tcs = tc;
9127
9128                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9129                 adapter->dcb_cfg.pfc_mode_enable = false;
9130         }
9131
9132         ixgbe_validate_rtr(adapter, tc);
9133
9134 #endif /* CONFIG_IXGBE_DCB */
9135         ixgbe_init_interrupt_scheme(adapter);
9136
9137         ixgbe_defrag_macvlan_pools(dev);
9138
9139         if (netif_running(dev))
9140                 return ixgbe_open(dev);
9141
9142         return 0;
9143 }
9144
9145 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9146                                struct tc_cls_u32_offload *cls)
9147 {
9148         u32 hdl = cls->knode.handle;
9149         u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9150         u32 loc = cls->knode.handle & 0xfffff;
9151         int err = 0, i, j;
9152         struct ixgbe_jump_table *jump = NULL;
9153
9154         if (loc > IXGBE_MAX_HW_ENTRIES)
9155                 return -EINVAL;
9156
9157         if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9158                 return -EINVAL;
9159
9160         /* Clear this filter in the link data it is associated with */
9161         if (uhtid != 0x800) {
9162                 jump = adapter->jump_tables[uhtid];
9163                 if (!jump)
9164                         return -EINVAL;
9165                 if (!test_bit(loc - 1, jump->child_loc_map))
9166                         return -EINVAL;
9167                 clear_bit(loc - 1, jump->child_loc_map);
9168         }
9169
9170         /* Check if the filter being deleted is a link */
9171         for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9172                 jump = adapter->jump_tables[i];
9173                 if (jump && jump->link_hdl == hdl) {
9174                         /* Delete filters in the hardware in the child hash
9175                          * table associated with this link
9176                          */
9177                         for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9178                                 if (!test_bit(j, jump->child_loc_map))
9179                                         continue;
9180                                 spin_lock(&adapter->fdir_perfect_lock);
9181                                 err = ixgbe_update_ethtool_fdir_entry(adapter,
9182                                                                       NULL,
9183                                                                       j + 1);
9184                                 spin_unlock(&adapter->fdir_perfect_lock);
9185                                 clear_bit(j, jump->child_loc_map);
9186                         }
9187                         /* Remove resources for this link */
9188                         kfree(jump->input);
9189                         kfree(jump->mask);
9190                         kfree(jump);
9191                         adapter->jump_tables[i] = NULL;
9192                         return err;
9193                 }
9194         }
9195
9196         spin_lock(&adapter->fdir_perfect_lock);
9197         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9198         spin_unlock(&adapter->fdir_perfect_lock);
9199         return err;
9200 }
9201
9202 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9203                                             struct tc_cls_u32_offload *cls)
9204 {
9205         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9206
9207         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9208                 return -EINVAL;
9209
9210         /* This ixgbe devices do not support hash tables at the moment
9211          * so abort when given hash tables.
9212          */
9213         if (cls->hnode.divisor > 0)
9214                 return -EINVAL;
9215
9216         set_bit(uhtid - 1, &adapter->tables);
9217         return 0;
9218 }
9219
9220 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9221                                             struct tc_cls_u32_offload *cls)
9222 {
9223         u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9224
9225         if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9226                 return -EINVAL;
9227
9228         clear_bit(uhtid - 1, &adapter->tables);
9229         return 0;
9230 }
9231
9232 #ifdef CONFIG_NET_CLS_ACT
9233 struct upper_walk_data {
9234         struct ixgbe_adapter *adapter;
9235         u64 action;
9236         int ifindex;
9237         u8 queue;
9238 };
9239
9240 static int get_macvlan_queue(struct net_device *upper, void *_data)
9241 {
9242         if (netif_is_macvlan(upper)) {
9243                 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9244                 struct upper_walk_data *data = _data;
9245                 struct ixgbe_adapter *adapter = data->adapter;
9246                 int ifindex = data->ifindex;
9247
9248                 if (vadapter && upper->ifindex == ifindex) {
9249                         data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9250                         data->action = data->queue;
9251                         return 1;
9252                 }
9253         }
9254
9255         return 0;
9256 }
9257
9258 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9259                                   u8 *queue, u64 *action)
9260 {
9261         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9262         unsigned int num_vfs = adapter->num_vfs, vf;
9263         struct upper_walk_data data;
9264         struct net_device *upper;
9265
9266         /* redirect to a SRIOV VF */
9267         for (vf = 0; vf < num_vfs; ++vf) {
9268                 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9269                 if (upper->ifindex == ifindex) {
9270                         *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9271                         *action = vf + 1;
9272                         *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9273                         return 0;
9274                 }
9275         }
9276
9277         /* redirect to a offloaded macvlan netdev */
9278         data.adapter = adapter;
9279         data.ifindex = ifindex;
9280         data.action = 0;
9281         data.queue = 0;
9282         if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9283                                           get_macvlan_queue, &data)) {
9284                 *action = data.action;
9285                 *queue = data.queue;
9286
9287                 return 0;
9288         }
9289
9290         return -EINVAL;
9291 }
9292
9293 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9294                             struct tcf_exts *exts, u64 *action, u8 *queue)
9295 {
9296         const struct tc_action *a;
9297         int i;
9298
9299         if (!tcf_exts_has_actions(exts))
9300                 return -EINVAL;
9301
9302         tcf_exts_for_each_action(i, a, exts) {
9303                 /* Drop action */
9304                 if (is_tcf_gact_shot(a)) {
9305                         *action = IXGBE_FDIR_DROP_QUEUE;
9306                         *queue = IXGBE_FDIR_DROP_QUEUE;
9307                         return 0;
9308                 }
9309
9310                 /* Redirect to a VF or a offloaded macvlan */
9311                 if (is_tcf_mirred_egress_redirect(a)) {
9312                         struct net_device *dev = tcf_mirred_dev(a);
9313
9314                         if (!dev)
9315                                 return -EINVAL;
9316                         return handle_redirect_action(adapter, dev->ifindex,
9317                                                       queue, action);
9318                 }
9319
9320                 return -EINVAL;
9321         }
9322
9323         return -EINVAL;
9324 }
9325 #else
9326 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9327                             struct tcf_exts *exts, u64 *action, u8 *queue)
9328 {
9329         return -EINVAL;
9330 }
9331 #endif /* CONFIG_NET_CLS_ACT */
9332
9333 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9334                                     union ixgbe_atr_input *mask,
9335                                     struct tc_cls_u32_offload *cls,
9336                                     struct ixgbe_mat_field *field_ptr,
9337                                     struct ixgbe_nexthdr *nexthdr)
9338 {
9339         int i, j, off;
9340         __be32 val, m;
9341         bool found_entry = false, found_jump_field = false;
9342
9343         for (i = 0; i < cls->knode.sel->nkeys; i++) {
9344                 off = cls->knode.sel->keys[i].off;
9345                 val = cls->knode.sel->keys[i].val;
9346                 m = cls->knode.sel->keys[i].mask;
9347
9348                 for (j = 0; field_ptr[j].val; j++) {
9349                         if (field_ptr[j].off == off) {
9350                                 field_ptr[j].val(input, mask, (__force u32)val,
9351                                                  (__force u32)m);
9352                                 input->filter.formatted.flow_type |=
9353                                         field_ptr[j].type;
9354                                 found_entry = true;
9355                                 break;
9356                         }
9357                 }
9358                 if (nexthdr) {
9359                         if (nexthdr->off == cls->knode.sel->keys[i].off &&
9360                             nexthdr->val ==
9361                             (__force u32)cls->knode.sel->keys[i].val &&
9362                             nexthdr->mask ==
9363                             (__force u32)cls->knode.sel->keys[i].mask)
9364                                 found_jump_field = true;
9365                         else
9366                                 continue;
9367                 }
9368         }
9369
9370         if (nexthdr && !found_jump_field)
9371                 return -EINVAL;
9372
9373         if (!found_entry)
9374                 return 0;
9375
9376         mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9377                                     IXGBE_ATR_L4TYPE_MASK;
9378
9379         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9380                 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9381
9382         return 0;
9383 }
9384
9385 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9386                                   struct tc_cls_u32_offload *cls)
9387 {
9388         __be16 protocol = cls->common.protocol;
9389         u32 loc = cls->knode.handle & 0xfffff;
9390         struct ixgbe_hw *hw = &adapter->hw;
9391         struct ixgbe_mat_field *field_ptr;
9392         struct ixgbe_fdir_filter *input = NULL;
9393         union ixgbe_atr_input *mask = NULL;
9394         struct ixgbe_jump_table *jump = NULL;
9395         int i, err = -EINVAL;
9396         u8 queue;
9397         u32 uhtid, link_uhtid;
9398
9399         uhtid = TC_U32_USERHTID(cls->knode.handle);
9400         link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9401
9402         /* At the moment cls_u32 jumps to network layer and skips past
9403          * L2 headers. The canonical method to match L2 frames is to use
9404          * negative values. However this is error prone at best but really
9405          * just broken because there is no way to "know" what sort of hdr
9406          * is in front of the network layer. Fix cls_u32 to support L2
9407          * headers when needed.
9408          */
9409         if (protocol != htons(ETH_P_IP))
9410                 return err;
9411
9412         if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9413                 e_err(drv, "Location out of range\n");
9414                 return err;
9415         }
9416
9417         /* cls u32 is a graph starting at root node 0x800. The driver tracks
9418          * links and also the fields used to advance the parser across each
9419          * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9420          * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9421          * To add support for new nodes update ixgbe_model.h parse structures
9422          * this function _should_ be generic try not to hardcode values here.
9423          */
9424         if (uhtid == 0x800) {
9425                 field_ptr = (adapter->jump_tables[0])->mat;
9426         } else {
9427                 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9428                         return err;
9429                 if (!adapter->jump_tables[uhtid])
9430                         return err;
9431                 field_ptr = (adapter->jump_tables[uhtid])->mat;
9432         }
9433
9434         if (!field_ptr)
9435                 return err;
9436
9437         /* At this point we know the field_ptr is valid and need to either
9438          * build cls_u32 link or attach filter. Because adding a link to
9439          * a handle that does not exist is invalid and the same for adding
9440          * rules to handles that don't exist.
9441          */
9442
9443         if (link_uhtid) {
9444                 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9445
9446                 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9447                         return err;
9448
9449                 if (!test_bit(link_uhtid - 1, &adapter->tables))
9450                         return err;
9451
9452                 /* Multiple filters as links to the same hash table are not
9453                  * supported. To add a new filter with the same next header
9454                  * but different match/jump conditions, create a new hash table
9455                  * and link to it.
9456                  */
9457                 if (adapter->jump_tables[link_uhtid] &&
9458                     (adapter->jump_tables[link_uhtid])->link_hdl) {
9459                         e_err(drv, "Link filter exists for link: %x\n",
9460                               link_uhtid);
9461                         return err;
9462                 }
9463
9464                 for (i = 0; nexthdr[i].jump; i++) {
9465                         if (nexthdr[i].o != cls->knode.sel->offoff ||
9466                             nexthdr[i].s != cls->knode.sel->offshift ||
9467                             nexthdr[i].m !=
9468                             (__force u32)cls->knode.sel->offmask)
9469                                 return err;
9470
9471                         jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9472                         if (!jump)
9473                                 return -ENOMEM;
9474                         input = kzalloc(sizeof(*input), GFP_KERNEL);
9475                         if (!input) {
9476                                 err = -ENOMEM;
9477                                 goto free_jump;
9478                         }
9479                         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9480                         if (!mask) {
9481                                 err = -ENOMEM;
9482                                 goto free_input;
9483                         }
9484                         jump->input = input;
9485                         jump->mask = mask;
9486                         jump->link_hdl = cls->knode.handle;
9487
9488                         err = ixgbe_clsu32_build_input(input, mask, cls,
9489                                                        field_ptr, &nexthdr[i]);
9490                         if (!err) {
9491                                 jump->mat = nexthdr[i].jump;
9492                                 adapter->jump_tables[link_uhtid] = jump;
9493                                 break;
9494                         } else {
9495                                 kfree(mask);
9496                                 kfree(input);
9497                                 kfree(jump);
9498                         }
9499                 }
9500                 return 0;
9501         }
9502
9503         input = kzalloc(sizeof(*input), GFP_KERNEL);
9504         if (!input)
9505                 return -ENOMEM;
9506         mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9507         if (!mask) {
9508                 err = -ENOMEM;
9509                 goto free_input;
9510         }
9511
9512         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9513                 if ((adapter->jump_tables[uhtid])->input)
9514                         memcpy(input, (adapter->jump_tables[uhtid])->input,
9515                                sizeof(*input));
9516                 if ((adapter->jump_tables[uhtid])->mask)
9517                         memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9518                                sizeof(*mask));
9519
9520                 /* Lookup in all child hash tables if this location is already
9521                  * filled with a filter
9522                  */
9523                 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9524                         struct ixgbe_jump_table *link = adapter->jump_tables[i];
9525
9526                         if (link && (test_bit(loc - 1, link->child_loc_map))) {
9527                                 e_err(drv, "Filter exists in location: %x\n",
9528                                       loc);
9529                                 err = -EINVAL;
9530                                 goto err_out;
9531                         }
9532                 }
9533         }
9534         err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9535         if (err)
9536                 goto err_out;
9537
9538         err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9539                                &queue);
9540         if (err < 0)
9541                 goto err_out;
9542
9543         input->sw_idx = loc;
9544
9545         spin_lock(&adapter->fdir_perfect_lock);
9546
9547         if (hlist_empty(&adapter->fdir_filter_list)) {
9548                 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9549                 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9550                 if (err)
9551                         goto err_out_w_lock;
9552         } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9553                 err = -EINVAL;
9554                 goto err_out_w_lock;
9555         }
9556
9557         ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9558         err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9559                                                     input->sw_idx, queue);
9560         if (!err)
9561                 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9562         spin_unlock(&adapter->fdir_perfect_lock);
9563
9564         if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9565                 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9566
9567         kfree(mask);
9568         return err;
9569 err_out_w_lock:
9570         spin_unlock(&adapter->fdir_perfect_lock);
9571 err_out:
9572         kfree(mask);
9573 free_input:
9574         kfree(input);
9575 free_jump:
9576         kfree(jump);
9577         return err;
9578 }
9579
9580 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9581                                   struct tc_cls_u32_offload *cls_u32)
9582 {
9583         switch (cls_u32->command) {
9584         case TC_CLSU32_NEW_KNODE:
9585         case TC_CLSU32_REPLACE_KNODE:
9586                 return ixgbe_configure_clsu32(adapter, cls_u32);
9587         case TC_CLSU32_DELETE_KNODE:
9588                 return ixgbe_delete_clsu32(adapter, cls_u32);
9589         case TC_CLSU32_NEW_HNODE:
9590         case TC_CLSU32_REPLACE_HNODE:
9591                 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9592         case TC_CLSU32_DELETE_HNODE:
9593                 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9594         default:
9595                 return -EOPNOTSUPP;
9596         }
9597 }
9598
9599 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9600                                    void *cb_priv)
9601 {
9602         struct ixgbe_adapter *adapter = cb_priv;
9603
9604         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9605                 return -EOPNOTSUPP;
9606
9607         switch (type) {
9608         case TC_SETUP_CLSU32:
9609                 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9610         default:
9611                 return -EOPNOTSUPP;
9612         }
9613 }
9614
9615 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9616                                  struct tc_mqprio_qopt *mqprio)
9617 {
9618         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9619         return ixgbe_setup_tc(dev, mqprio->num_tc);
9620 }
9621
9622 static LIST_HEAD(ixgbe_block_cb_list);
9623
9624 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9625                             void *type_data)
9626 {
9627         struct ixgbe_adapter *adapter = netdev_priv(dev);
9628
9629         switch (type) {
9630         case TC_SETUP_BLOCK:
9631                 return flow_block_cb_setup_simple(type_data,
9632                                                   &ixgbe_block_cb_list,
9633                                                   ixgbe_setup_tc_block_cb,
9634                                                   adapter, adapter, true);
9635         case TC_SETUP_QDISC_MQPRIO:
9636                 return ixgbe_setup_tc_mqprio(dev, type_data);
9637         default:
9638                 return -EOPNOTSUPP;
9639         }
9640 }
9641
9642 #ifdef CONFIG_PCI_IOV
9643 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9644 {
9645         struct net_device *netdev = adapter->netdev;
9646
9647         rtnl_lock();
9648         ixgbe_setup_tc(netdev, adapter->hw_tcs);
9649         rtnl_unlock();
9650 }
9651
9652 #endif
9653 void ixgbe_do_reset(struct net_device *netdev)
9654 {
9655         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9656
9657         if (netif_running(netdev))
9658                 ixgbe_reinit_locked(adapter);
9659         else
9660                 ixgbe_reset(adapter);
9661 }
9662
9663 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9664                                             netdev_features_t features)
9665 {
9666         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9667
9668         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9669         if (!(features & NETIF_F_RXCSUM))
9670                 features &= ~NETIF_F_LRO;
9671
9672         /* Turn off LRO if not RSC capable */
9673         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9674                 features &= ~NETIF_F_LRO;
9675
9676         if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9677                 e_dev_err("LRO is not supported with XDP\n");
9678                 features &= ~NETIF_F_LRO;
9679         }
9680
9681         return features;
9682 }
9683
9684 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9685 {
9686         int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9687                         num_online_cpus());
9688
9689         /* go back to full RSS if we're not running SR-IOV */
9690         if (!adapter->ring_feature[RING_F_VMDQ].offset)
9691                 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9692                                     IXGBE_FLAG_SRIOV_ENABLED);
9693
9694         adapter->ring_feature[RING_F_RSS].limit = rss;
9695         adapter->ring_feature[RING_F_VMDQ].limit = 1;
9696
9697         ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9698 }
9699
9700 static int ixgbe_set_features(struct net_device *netdev,
9701                               netdev_features_t features)
9702 {
9703         struct ixgbe_adapter *adapter = netdev_priv(netdev);
9704         netdev_features_t changed = netdev->features ^ features;
9705         bool need_reset = false;
9706
9707         /* Make sure RSC matches LRO, reset if change */
9708         if (!(features & NETIF_F_LRO)) {
9709                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9710                         need_reset = true;
9711                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9712         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9713                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9714                 if (adapter->rx_itr_setting == 1 ||
9715                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9716                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9717                         need_reset = true;
9718                 } else if ((changed ^ features) & NETIF_F_LRO) {
9719                         e_info(probe, "rx-usecs set too low, "
9720                                "disabling RSC\n");
9721                 }
9722         }
9723
9724         /*
9725          * Check if Flow Director n-tuple support or hw_tc support was
9726          * enabled or disabled.  If the state changed, we need to reset.
9727          */
9728         if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9729                 /* turn off ATR, enable perfect filters and reset */
9730                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9731                         need_reset = true;
9732
9733                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9734                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9735         } else {
9736                 /* turn off perfect filters, enable ATR and reset */
9737                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9738                         need_reset = true;
9739
9740                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9741
9742                 /* We cannot enable ATR if SR-IOV is enabled */
9743                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9744                     /* We cannot enable ATR if we have 2 or more tcs */
9745                     (adapter->hw_tcs > 1) ||
9746                     /* We cannot enable ATR if RSS is disabled */
9747                     (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9748                     /* A sample rate of 0 indicates ATR disabled */
9749                     (!adapter->atr_sample_rate))
9750                         ; /* do nothing not supported */
9751                 else /* otherwise supported and set the flag */
9752                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9753         }
9754
9755         if (changed & NETIF_F_RXALL)
9756                 need_reset = true;
9757
9758         netdev->features = features;
9759
9760         if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9761                 ixgbe_reset_l2fw_offload(adapter);
9762         else if (need_reset)
9763                 ixgbe_do_reset(netdev);
9764         else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9765                             NETIF_F_HW_VLAN_CTAG_FILTER))
9766                 ixgbe_set_rx_mode(netdev);
9767
9768         return 1;
9769 }
9770
9771 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9772                              struct net_device *dev,
9773                              const unsigned char *addr, u16 vid,
9774                              u16 flags,
9775                              struct netlink_ext_ack *extack)
9776 {
9777         /* guarantee we can provide a unique filter for the unicast address */
9778         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9779                 struct ixgbe_adapter *adapter = netdev_priv(dev);
9780                 u16 pool = VMDQ_P(0);
9781
9782                 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9783                         return -ENOMEM;
9784         }
9785
9786         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9787 }
9788
9789 /**
9790  * ixgbe_configure_bridge_mode - set various bridge modes
9791  * @adapter: the private structure
9792  * @mode: requested bridge mode
9793  *
9794  * Configure some settings require for various bridge modes.
9795  **/
9796 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9797                                        __u16 mode)
9798 {
9799         struct ixgbe_hw *hw = &adapter->hw;
9800         unsigned int p, num_pools;
9801         u32 vmdctl;
9802
9803         switch (mode) {
9804         case BRIDGE_MODE_VEPA:
9805                 /* disable Tx loopback, rely on switch hairpin mode */
9806                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9807
9808                 /* must enable Rx switching replication to allow multicast
9809                  * packet reception on all VFs, and to enable source address
9810                  * pruning.
9811                  */
9812                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9813                 vmdctl |= IXGBE_VT_CTL_REPLEN;
9814                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9815
9816                 /* enable Rx source address pruning. Note, this requires
9817                  * replication to be enabled or else it does nothing.
9818                  */
9819                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9820                 for (p = 0; p < num_pools; p++) {
9821                         if (hw->mac.ops.set_source_address_pruning)
9822                                 hw->mac.ops.set_source_address_pruning(hw,
9823                                                                        true,
9824                                                                        p);
9825                 }
9826                 break;
9827         case BRIDGE_MODE_VEB:
9828                 /* enable Tx loopback for internal VF/PF communication */
9829                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9830                                 IXGBE_PFDTXGSWC_VT_LBEN);
9831
9832                 /* disable Rx switching replication unless we have SR-IOV
9833                  * virtual functions
9834                  */
9835                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9836                 if (!adapter->num_vfs)
9837                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9838                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9839
9840                 /* disable Rx source address pruning, since we don't expect to
9841                  * be receiving external loopback of our transmitted frames.
9842                  */
9843                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9844                 for (p = 0; p < num_pools; p++) {
9845                         if (hw->mac.ops.set_source_address_pruning)
9846                                 hw->mac.ops.set_source_address_pruning(hw,
9847                                                                        false,
9848                                                                        p);
9849                 }
9850                 break;
9851         default:
9852                 return -EINVAL;
9853         }
9854
9855         adapter->bridge_mode = mode;
9856
9857         e_info(drv, "enabling bridge mode: %s\n",
9858                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9859
9860         return 0;
9861 }
9862
9863 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
9864                                     struct nlmsghdr *nlh, u16 flags,
9865                                     struct netlink_ext_ack *extack)
9866 {
9867         struct ixgbe_adapter *adapter = netdev_priv(dev);
9868         struct nlattr *attr, *br_spec;
9869         int rem;
9870
9871         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9872                 return -EOPNOTSUPP;
9873
9874         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
9875         if (!br_spec)
9876                 return -EINVAL;
9877
9878         nla_for_each_nested(attr, br_spec, rem) {
9879                 int status;
9880                 __u16 mode;
9881
9882                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
9883                         continue;
9884
9885                 if (nla_len(attr) < sizeof(mode))
9886                         return -EINVAL;
9887
9888                 mode = nla_get_u16(attr);
9889                 status = ixgbe_configure_bridge_mode(adapter, mode);
9890                 if (status)
9891                         return status;
9892
9893                 break;
9894         }
9895
9896         return 0;
9897 }
9898
9899 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9900                                     struct net_device *dev,
9901                                     u32 filter_mask, int nlflags)
9902 {
9903         struct ixgbe_adapter *adapter = netdev_priv(dev);
9904
9905         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
9906                 return 0;
9907
9908         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
9909                                        adapter->bridge_mode, 0, 0, nlflags,
9910                                        filter_mask, NULL);
9911 }
9912
9913 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
9914 {
9915         struct ixgbe_adapter *adapter = netdev_priv(pdev);
9916         struct ixgbe_fwd_adapter *accel;
9917         int tcs = adapter->hw_tcs ? : 1;
9918         int pool, err;
9919
9920         if (adapter->xdp_prog) {
9921                 e_warn(probe, "L2FW offload is not supported with XDP\n");
9922                 return ERR_PTR(-EINVAL);
9923         }
9924
9925         /* The hardware supported by ixgbe only filters on the destination MAC
9926          * address. In order to avoid issues we only support offloading modes
9927          * where the hardware can actually provide the functionality.
9928          */
9929         if (!macvlan_supports_dest_filter(vdev))
9930                 return ERR_PTR(-EMEDIUMTYPE);
9931
9932         /* We need to lock down the macvlan to be a single queue device so that
9933          * we can reuse the tc_to_txq field in the macvlan netdev to represent
9934          * the queue mapping to our netdev.
9935          */
9936         if (netif_is_multiqueue(vdev))
9937                 return ERR_PTR(-ERANGE);
9938
9939         pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9940         if (pool == adapter->num_rx_pools) {
9941                 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
9942                 u16 reserved_pools;
9943
9944                 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
9945                      adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
9946                     adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
9947                         return ERR_PTR(-EBUSY);
9948
9949                 /* Hardware has a limited number of available pools. Each VF,
9950                  * and the PF require a pool. Check to ensure we don't
9951                  * attempt to use more then the available number of pools.
9952                  */
9953                 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
9954                         return ERR_PTR(-EBUSY);
9955
9956                 /* Enable VMDq flag so device will be set in VM mode */
9957                 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
9958                                   IXGBE_FLAG_SRIOV_ENABLED;
9959
9960                 /* Try to reserve as many queues per pool as possible,
9961                  * we start with the configurations that support 4 queues
9962                  * per pools, followed by 2, and then by just 1 per pool.
9963                  */
9964                 if (used_pools < 32 && adapter->num_rx_pools < 16)
9965                         reserved_pools = min_t(u16,
9966                                                32 - used_pools,
9967                                                16 - adapter->num_rx_pools);
9968                 else if (adapter->num_rx_pools < 32)
9969                         reserved_pools = min_t(u16,
9970                                                64 - used_pools,
9971                                                32 - adapter->num_rx_pools);
9972                 else
9973                         reserved_pools = 64 - used_pools;
9974
9975
9976                 if (!reserved_pools)
9977                         return ERR_PTR(-EBUSY);
9978
9979                 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
9980
9981                 /* Force reinit of ring allocation with VMDQ enabled */
9982                 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
9983                 if (err)
9984                         return ERR_PTR(err);
9985
9986                 if (pool >= adapter->num_rx_pools)
9987                         return ERR_PTR(-ENOMEM);
9988         }
9989
9990         accel = kzalloc(sizeof(*accel), GFP_KERNEL);
9991         if (!accel)
9992                 return ERR_PTR(-ENOMEM);
9993
9994         set_bit(pool, adapter->fwd_bitmask);
9995         netdev_set_sb_channel(vdev, pool);
9996         accel->pool = pool;
9997         accel->netdev = vdev;
9998
9999         if (!netif_running(pdev))
10000                 return accel;
10001
10002         err = ixgbe_fwd_ring_up(adapter, accel);
10003         if (err)
10004                 return ERR_PTR(err);
10005
10006         return accel;
10007 }
10008
10009 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10010 {
10011         struct ixgbe_fwd_adapter *accel = priv;
10012         struct ixgbe_adapter *adapter = netdev_priv(pdev);
10013         unsigned int rxbase = accel->rx_base_queue;
10014         unsigned int i;
10015
10016         /* delete unicast filter associated with offloaded interface */
10017         ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10018                              VMDQ_P(accel->pool));
10019
10020         /* Allow remaining Rx packets to get flushed out of the
10021          * Rx FIFO before we drop the netdev for the ring.
10022          */
10023         usleep_range(10000, 20000);
10024
10025         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10026                 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10027                 struct ixgbe_q_vector *qv = ring->q_vector;
10028
10029                 /* Make sure we aren't processing any packets and clear
10030                  * netdev to shut down the ring.
10031                  */
10032                 if (netif_running(adapter->netdev))
10033                         napi_synchronize(&qv->napi);
10034                 ring->netdev = NULL;
10035         }
10036
10037         /* unbind the queues and drop the subordinate channel config */
10038         netdev_unbind_sb_channel(pdev, accel->netdev);
10039         netdev_set_sb_channel(accel->netdev, 0);
10040
10041         clear_bit(accel->pool, adapter->fwd_bitmask);
10042         kfree(accel);
10043 }
10044
10045 #define IXGBE_MAX_MAC_HDR_LEN           127
10046 #define IXGBE_MAX_NETWORK_HDR_LEN       511
10047
10048 static netdev_features_t
10049 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10050                      netdev_features_t features)
10051 {
10052         unsigned int network_hdr_len, mac_hdr_len;
10053
10054         /* Make certain the headers can be described by a context descriptor */
10055         mac_hdr_len = skb_network_header(skb) - skb->data;
10056         if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10057                 return features & ~(NETIF_F_HW_CSUM |
10058                                     NETIF_F_SCTP_CRC |
10059                                     NETIF_F_GSO_UDP_L4 |
10060                                     NETIF_F_HW_VLAN_CTAG_TX |
10061                                     NETIF_F_TSO |
10062                                     NETIF_F_TSO6);
10063
10064         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10065         if (unlikely(network_hdr_len >  IXGBE_MAX_NETWORK_HDR_LEN))
10066                 return features & ~(NETIF_F_HW_CSUM |
10067                                     NETIF_F_SCTP_CRC |
10068                                     NETIF_F_GSO_UDP_L4 |
10069                                     NETIF_F_TSO |
10070                                     NETIF_F_TSO6);
10071
10072         /* We can only support IPV4 TSO in tunnels if we can mangle the
10073          * inner IP ID field, so strip TSO if MANGLEID is not supported.
10074          * IPsec offoad sets skb->encapsulation but still can handle
10075          * the TSO, so it's the exception.
10076          */
10077         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10078 #ifdef CONFIG_IXGBE_IPSEC
10079                 if (!secpath_exists(skb))
10080 #endif
10081                         features &= ~NETIF_F_TSO;
10082         }
10083
10084         return features;
10085 }
10086
10087 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10088 {
10089         int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10090         struct ixgbe_adapter *adapter = netdev_priv(dev);
10091         struct bpf_prog *old_prog;
10092         bool need_reset;
10093
10094         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10095                 return -EINVAL;
10096
10097         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10098                 return -EINVAL;
10099
10100         /* verify ixgbe ring attributes are sufficient for XDP */
10101         for (i = 0; i < adapter->num_rx_queues; i++) {
10102                 struct ixgbe_ring *ring = adapter->rx_ring[i];
10103
10104                 if (ring_is_rsc_enabled(ring))
10105                         return -EINVAL;
10106
10107                 if (frame_size > ixgbe_rx_bufsz(ring))
10108                         return -EINVAL;
10109         }
10110
10111         if (nr_cpu_ids > MAX_XDP_QUEUES)
10112                 return -ENOMEM;
10113
10114         old_prog = xchg(&adapter->xdp_prog, prog);
10115         need_reset = (!!prog != !!old_prog);
10116
10117         /* If transitioning XDP modes reconfigure rings */
10118         if (need_reset) {
10119                 int err;
10120
10121                 if (!prog)
10122                         /* Wait until ndo_xsk_wakeup completes. */
10123                         synchronize_rcu();
10124                 err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10125
10126                 if (err) {
10127                         rcu_assign_pointer(adapter->xdp_prog, old_prog);
10128                         return -EINVAL;
10129                 }
10130         } else {
10131                 for (i = 0; i < adapter->num_rx_queues; i++)
10132                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10133                             adapter->xdp_prog);
10134         }
10135
10136         if (old_prog)
10137                 bpf_prog_put(old_prog);
10138
10139         /* Kick start the NAPI context if there is an AF_XDP socket open
10140          * on that queue id. This so that receiving will start.
10141          */
10142         if (need_reset && prog)
10143                 for (i = 0; i < adapter->num_rx_queues; i++)
10144                         if (adapter->xdp_ring[i]->xsk_pool)
10145                                 (void)ixgbe_xsk_wakeup(adapter->netdev, i,
10146                                                        XDP_WAKEUP_RX);
10147
10148         return 0;
10149 }
10150
10151 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10152 {
10153         struct ixgbe_adapter *adapter = netdev_priv(dev);
10154
10155         switch (xdp->command) {
10156         case XDP_SETUP_PROG:
10157                 return ixgbe_xdp_setup(dev, xdp->prog);
10158         case XDP_SETUP_XSK_POOL:
10159                 return ixgbe_xsk_pool_setup(adapter, xdp->xsk.pool,
10160                                             xdp->xsk.queue_id);
10161
10162         default:
10163                 return -EINVAL;
10164         }
10165 }
10166
10167 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10168 {
10169         /* Force memory writes to complete before letting h/w know there
10170          * are new descriptors to fetch.
10171          */
10172         wmb();
10173         writel(ring->next_to_use, ring->tail);
10174 }
10175
10176 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10177                           struct xdp_frame **frames, u32 flags)
10178 {
10179         struct ixgbe_adapter *adapter = netdev_priv(dev);
10180         struct ixgbe_ring *ring;
10181         int drops = 0;
10182         int i;
10183
10184         if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10185                 return -ENETDOWN;
10186
10187         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10188                 return -EINVAL;
10189
10190         /* During program transitions its possible adapter->xdp_prog is assigned
10191          * but ring has not been configured yet. In this case simply abort xmit.
10192          */
10193         ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10194         if (unlikely(!ring))
10195                 return -ENXIO;
10196
10197         if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10198                 return -ENXIO;
10199
10200         for (i = 0; i < n; i++) {
10201                 struct xdp_frame *xdpf = frames[i];
10202                 int err;
10203
10204                 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10205                 if (err != IXGBE_XDP_TX) {
10206                         xdp_return_frame_rx_napi(xdpf);
10207                         drops++;
10208                 }
10209         }
10210
10211         if (unlikely(flags & XDP_XMIT_FLUSH))
10212                 ixgbe_xdp_ring_update_tail(ring);
10213
10214         return n - drops;
10215 }
10216
10217 static const struct net_device_ops ixgbe_netdev_ops = {
10218         .ndo_open               = ixgbe_open,
10219         .ndo_stop               = ixgbe_close,
10220         .ndo_start_xmit         = ixgbe_xmit_frame,
10221         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
10222         .ndo_validate_addr      = eth_validate_addr,
10223         .ndo_set_mac_address    = ixgbe_set_mac,
10224         .ndo_change_mtu         = ixgbe_change_mtu,
10225         .ndo_tx_timeout         = ixgbe_tx_timeout,
10226         .ndo_set_tx_maxrate     = ixgbe_tx_maxrate,
10227         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
10228         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
10229         .ndo_do_ioctl           = ixgbe_ioctl,
10230         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
10231         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
10232         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
10233         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
10234         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10235         .ndo_set_vf_trust       = ixgbe_ndo_set_vf_trust,
10236         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
10237         .ndo_get_stats64        = ixgbe_get_stats64,
10238         .ndo_setup_tc           = __ixgbe_setup_tc,
10239 #ifdef IXGBE_FCOE
10240         .ndo_select_queue       = ixgbe_select_queue,
10241         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10242         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10243         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10244         .ndo_fcoe_enable = ixgbe_fcoe_enable,
10245         .ndo_fcoe_disable = ixgbe_fcoe_disable,
10246         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10247         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10248 #endif /* IXGBE_FCOE */
10249         .ndo_set_features = ixgbe_set_features,
10250         .ndo_fix_features = ixgbe_fix_features,
10251         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
10252         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
10253         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
10254         .ndo_dfwd_add_station   = ixgbe_fwd_add,
10255         .ndo_dfwd_del_station   = ixgbe_fwd_del,
10256         .ndo_udp_tunnel_add     = udp_tunnel_nic_add_port,
10257         .ndo_udp_tunnel_del     = udp_tunnel_nic_del_port,
10258         .ndo_features_check     = ixgbe_features_check,
10259         .ndo_bpf                = ixgbe_xdp,
10260         .ndo_xdp_xmit           = ixgbe_xdp_xmit,
10261         .ndo_xsk_wakeup         = ixgbe_xsk_wakeup,
10262 };
10263
10264 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10265                                  struct ixgbe_ring *tx_ring)
10266 {
10267         unsigned long wait_delay, delay_interval;
10268         struct ixgbe_hw *hw = &adapter->hw;
10269         u8 reg_idx = tx_ring->reg_idx;
10270         int wait_loop;
10271         u32 txdctl;
10272
10273         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10274
10275         /* delay mechanism from ixgbe_disable_tx */
10276         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10277
10278         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10279         wait_delay = delay_interval;
10280
10281         while (wait_loop--) {
10282                 usleep_range(wait_delay, wait_delay + 10);
10283                 wait_delay += delay_interval * 2;
10284                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10285
10286                 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10287                         return;
10288         }
10289
10290         e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10291 }
10292
10293 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10294                               struct ixgbe_ring *tx_ring)
10295 {
10296         set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10297         ixgbe_disable_txr_hw(adapter, tx_ring);
10298 }
10299
10300 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10301                                  struct ixgbe_ring *rx_ring)
10302 {
10303         unsigned long wait_delay, delay_interval;
10304         struct ixgbe_hw *hw = &adapter->hw;
10305         u8 reg_idx = rx_ring->reg_idx;
10306         int wait_loop;
10307         u32 rxdctl;
10308
10309         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10310         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10311         rxdctl |= IXGBE_RXDCTL_SWFLSH;
10312
10313         /* write value back with RXDCTL.ENABLE bit cleared */
10314         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10315
10316         /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10317         if (hw->mac.type == ixgbe_mac_82598EB &&
10318             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10319                 return;
10320
10321         /* delay mechanism from ixgbe_disable_rx */
10322         delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10323
10324         wait_loop = IXGBE_MAX_RX_DESC_POLL;
10325         wait_delay = delay_interval;
10326
10327         while (wait_loop--) {
10328                 usleep_range(wait_delay, wait_delay + 10);
10329                 wait_delay += delay_interval * 2;
10330                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10331
10332                 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10333                         return;
10334         }
10335
10336         e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10337 }
10338
10339 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10340 {
10341         memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10342         memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10343 }
10344
10345 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10346 {
10347         memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10348         memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10349 }
10350
10351 /**
10352  * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10353  * @adapter: adapter structure
10354  * @ring: ring index
10355  *
10356  * This function disables a certain Rx/Tx/XDP Tx ring. The function
10357  * assumes that the netdev is running.
10358  **/
10359 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10360 {
10361         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10362
10363         rx_ring = adapter->rx_ring[ring];
10364         tx_ring = adapter->tx_ring[ring];
10365         xdp_ring = adapter->xdp_ring[ring];
10366
10367         ixgbe_disable_txr(adapter, tx_ring);
10368         if (xdp_ring)
10369                 ixgbe_disable_txr(adapter, xdp_ring);
10370         ixgbe_disable_rxr_hw(adapter, rx_ring);
10371
10372         if (xdp_ring)
10373                 synchronize_rcu();
10374
10375         /* Rx/Tx/XDP Tx share the same napi context. */
10376         napi_disable(&rx_ring->q_vector->napi);
10377
10378         ixgbe_clean_tx_ring(tx_ring);
10379         if (xdp_ring)
10380                 ixgbe_clean_tx_ring(xdp_ring);
10381         ixgbe_clean_rx_ring(rx_ring);
10382
10383         ixgbe_reset_txr_stats(tx_ring);
10384         if (xdp_ring)
10385                 ixgbe_reset_txr_stats(xdp_ring);
10386         ixgbe_reset_rxr_stats(rx_ring);
10387 }
10388
10389 /**
10390  * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10391  * @adapter: adapter structure
10392  * @ring: ring index
10393  *
10394  * This function enables a certain Rx/Tx/XDP Tx ring. The function
10395  * assumes that the netdev is running.
10396  **/
10397 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10398 {
10399         struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10400
10401         rx_ring = adapter->rx_ring[ring];
10402         tx_ring = adapter->tx_ring[ring];
10403         xdp_ring = adapter->xdp_ring[ring];
10404
10405         /* Rx/Tx/XDP Tx share the same napi context. */
10406         napi_enable(&rx_ring->q_vector->napi);
10407
10408         ixgbe_configure_tx_ring(adapter, tx_ring);
10409         if (xdp_ring)
10410                 ixgbe_configure_tx_ring(adapter, xdp_ring);
10411         ixgbe_configure_rx_ring(adapter, rx_ring);
10412
10413         clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10414         if (xdp_ring)
10415                 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10416 }
10417
10418 /**
10419  * ixgbe_enumerate_functions - Get the number of ports this device has
10420  * @adapter: adapter structure
10421  *
10422  * This function enumerates the phsyical functions co-located on a single slot,
10423  * in order to determine how many ports a device has. This is most useful in
10424  * determining the required GT/s of PCIe bandwidth necessary for optimal
10425  * performance.
10426  **/
10427 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10428 {
10429         struct pci_dev *entry, *pdev = adapter->pdev;
10430         int physfns = 0;
10431
10432         /* Some cards can not use the generic count PCIe functions method,
10433          * because they are behind a parent switch, so we hardcode these with
10434          * the correct number of functions.
10435          */
10436         if (ixgbe_pcie_from_parent(&adapter->hw))
10437                 physfns = 4;
10438
10439         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10440                 /* don't count virtual functions */
10441                 if (entry->is_virtfn)
10442                         continue;
10443
10444                 /* When the devices on the bus don't all match our device ID,
10445                  * we can't reliably determine the correct number of
10446                  * functions. This can occur if a function has been direct
10447                  * attached to a virtual machine using VT-d, for example. In
10448                  * this case, simply return -1 to indicate this.
10449                  */
10450                 if ((entry->vendor != pdev->vendor) ||
10451                     (entry->device != pdev->device))
10452                         return -1;
10453
10454                 physfns++;
10455         }
10456
10457         return physfns;
10458 }
10459
10460 /**
10461  * ixgbe_wol_supported - Check whether device supports WoL
10462  * @adapter: the adapter private structure
10463  * @device_id: the device ID
10464  * @subdevice_id: the subsystem device ID
10465  *
10466  * This function is used by probe and ethtool to determine
10467  * which devices have WoL support
10468  *
10469  **/
10470 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10471                          u16 subdevice_id)
10472 {
10473         struct ixgbe_hw *hw = &adapter->hw;
10474         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10475
10476         /* WOL not supported on 82598 */
10477         if (hw->mac.type == ixgbe_mac_82598EB)
10478                 return false;
10479
10480         /* check eeprom to see if WOL is enabled for X540 and newer */
10481         if (hw->mac.type >= ixgbe_mac_X540) {
10482                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10483                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10484                      (hw->bus.func == 0)))
10485                         return true;
10486         }
10487
10488         /* WOL is determined based on device IDs for 82599 MACs */
10489         switch (device_id) {
10490         case IXGBE_DEV_ID_82599_SFP:
10491                 /* Only these subdevices could supports WOL */
10492                 switch (subdevice_id) {
10493                 case IXGBE_SUBDEV_ID_82599_560FLR:
10494                 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10495                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10496                 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10497                         /* only support first port */
10498                         if (hw->bus.func != 0)
10499                                 break;
10500                         fallthrough;
10501                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10502                 case IXGBE_SUBDEV_ID_82599_SFP:
10503                 case IXGBE_SUBDEV_ID_82599_RNDC:
10504                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10505                 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10506                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10507                 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10508                         return true;
10509                 }
10510                 break;
10511         case IXGBE_DEV_ID_82599EN_SFP:
10512                 /* Only these subdevices support WOL */
10513                 switch (subdevice_id) {
10514                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10515                         return true;
10516                 }
10517                 break;
10518         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10519                 /* All except this subdevice support WOL */
10520                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10521                         return true;
10522                 break;
10523         case IXGBE_DEV_ID_82599_KX4:
10524                 return  true;
10525         default:
10526                 break;
10527         }
10528
10529         return false;
10530 }
10531
10532 /**
10533  * ixgbe_set_fw_version - Set FW version
10534  * @adapter: the adapter private structure
10535  *
10536  * This function is used by probe and ethtool to determine the FW version to
10537  * format to display. The FW version is taken from the EEPROM/NVM.
10538  */
10539 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10540 {
10541         struct ixgbe_hw *hw = &adapter->hw;
10542         struct ixgbe_nvm_version nvm_ver;
10543
10544         ixgbe_get_oem_prod_version(hw, &nvm_ver);
10545         if (nvm_ver.oem_valid) {
10546                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10547                          "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10548                          nvm_ver.oem_release);
10549                 return;
10550         }
10551
10552         ixgbe_get_etk_id(hw, &nvm_ver);
10553         ixgbe_get_orom_version(hw, &nvm_ver);
10554
10555         if (nvm_ver.or_valid) {
10556                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10557                          "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10558                          nvm_ver.or_build, nvm_ver.or_patch);
10559                 return;
10560         }
10561
10562         /* Set ETrack ID format */
10563         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10564                  "0x%08x", nvm_ver.etk_id);
10565 }
10566
10567 /**
10568  * ixgbe_probe - Device Initialization Routine
10569  * @pdev: PCI device information struct
10570  * @ent: entry in ixgbe_pci_tbl
10571  *
10572  * Returns 0 on success, negative on failure
10573  *
10574  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10575  * The OS initialization, configuring of the adapter private structure,
10576  * and a hardware reset occur.
10577  **/
10578 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10579 {
10580         struct net_device *netdev;
10581         struct ixgbe_adapter *adapter = NULL;
10582         struct ixgbe_hw *hw;
10583         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10584         int i, err, pci_using_dac, expected_gts;
10585         unsigned int indices = MAX_TX_QUEUES;
10586         u8 part_str[IXGBE_PBANUM_LENGTH];
10587         bool disable_dev = false;
10588 #ifdef IXGBE_FCOE
10589         u16 device_caps;
10590 #endif
10591         u32 eec;
10592
10593         /* Catch broken hardware that put the wrong VF device ID in
10594          * the PCIe SR-IOV capability.
10595          */
10596         if (pdev->is_virtfn) {
10597                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10598                      pci_name(pdev), pdev->vendor, pdev->device);
10599                 return -EINVAL;
10600         }
10601
10602         err = pci_enable_device_mem(pdev);
10603         if (err)
10604                 return err;
10605
10606         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10607                 pci_using_dac = 1;
10608         } else {
10609                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10610                 if (err) {
10611                         dev_err(&pdev->dev,
10612                                 "No usable DMA configuration, aborting\n");
10613                         goto err_dma;
10614                 }
10615                 pci_using_dac = 0;
10616         }
10617
10618         err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10619         if (err) {
10620                 dev_err(&pdev->dev,
10621                         "pci_request_selected_regions failed 0x%x\n", err);
10622                 goto err_pci_reg;
10623         }
10624
10625         pci_enable_pcie_error_reporting(pdev);
10626
10627         pci_set_master(pdev);
10628         pci_save_state(pdev);
10629
10630         if (ii->mac == ixgbe_mac_82598EB) {
10631 #ifdef CONFIG_IXGBE_DCB
10632                 /* 8 TC w/ 4 queues per TC */
10633                 indices = 4 * MAX_TRAFFIC_CLASS;
10634 #else
10635                 indices = IXGBE_MAX_RSS_INDICES;
10636 #endif
10637         }
10638
10639         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10640         if (!netdev) {
10641                 err = -ENOMEM;
10642                 goto err_alloc_etherdev;
10643         }
10644
10645         SET_NETDEV_DEV(netdev, &pdev->dev);
10646
10647         adapter = netdev_priv(netdev);
10648
10649         adapter->netdev = netdev;
10650         adapter->pdev = pdev;
10651         hw = &adapter->hw;
10652         hw->back = adapter;
10653         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10654
10655         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10656                               pci_resource_len(pdev, 0));
10657         adapter->io_addr = hw->hw_addr;
10658         if (!hw->hw_addr) {
10659                 err = -EIO;
10660                 goto err_ioremap;
10661         }
10662
10663         netdev->netdev_ops = &ixgbe_netdev_ops;
10664         ixgbe_set_ethtool_ops(netdev);
10665         netdev->watchdog_timeo = 5 * HZ;
10666         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10667
10668         /* Setup hw api */
10669         hw->mac.ops   = *ii->mac_ops;
10670         hw->mac.type  = ii->mac;
10671         hw->mvals     = ii->mvals;
10672         if (ii->link_ops)
10673                 hw->link.ops  = *ii->link_ops;
10674
10675         /* EEPROM */
10676         hw->eeprom.ops = *ii->eeprom_ops;
10677         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10678         if (ixgbe_removed(hw->hw_addr)) {
10679                 err = -EIO;
10680                 goto err_ioremap;
10681         }
10682         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10683         if (!(eec & BIT(8)))
10684                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10685
10686         /* PHY */
10687         hw->phy.ops = *ii->phy_ops;
10688         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10689         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10690         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10691         hw->phy.mdio.mmds = 0;
10692         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10693         hw->phy.mdio.dev = netdev;
10694         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10695         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10696
10697         /* setup the private structure */
10698         err = ixgbe_sw_init(adapter, ii);
10699         if (err)
10700                 goto err_sw_init;
10701
10702         switch (adapter->hw.mac.type) {
10703         case ixgbe_mac_X550:
10704         case ixgbe_mac_X550EM_x:
10705                 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550;
10706                 break;
10707         case ixgbe_mac_x550em_a:
10708                 netdev->udp_tunnel_nic_info = &ixgbe_udp_tunnels_x550em_a;
10709                 break;
10710         default:
10711                 break;
10712         }
10713
10714         /* Make sure the SWFW semaphore is in a valid state */
10715         if (hw->mac.ops.init_swfw_sync)
10716                 hw->mac.ops.init_swfw_sync(hw);
10717
10718         /* Make it possible the adapter to be woken up via WOL */
10719         switch (adapter->hw.mac.type) {
10720         case ixgbe_mac_82599EB:
10721         case ixgbe_mac_X540:
10722         case ixgbe_mac_X550:
10723         case ixgbe_mac_X550EM_x:
10724         case ixgbe_mac_x550em_a:
10725                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10726                 break;
10727         default:
10728                 break;
10729         }
10730
10731         /*
10732          * If there is a fan on this device and it has failed log the
10733          * failure.
10734          */
10735         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10736                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10737                 if (esdp & IXGBE_ESDP_SDP1)
10738                         e_crit(probe, "Fan has stopped, replace the adapter\n");
10739         }
10740
10741         if (allow_unsupported_sfp)
10742                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10743
10744         /* reset_hw fills in the perm_addr as well */
10745         hw->phy.reset_if_overtemp = true;
10746         err = hw->mac.ops.reset_hw(hw);
10747         hw->phy.reset_if_overtemp = false;
10748         ixgbe_set_eee_capable(adapter);
10749         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10750                 err = 0;
10751         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10752                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10753                 e_dev_err("Reload the driver after installing a supported module.\n");
10754                 goto err_sw_init;
10755         } else if (err) {
10756                 e_dev_err("HW Init failed: %d\n", err);
10757                 goto err_sw_init;
10758         }
10759
10760 #ifdef CONFIG_PCI_IOV
10761         /* SR-IOV not supported on the 82598 */
10762         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10763                 goto skip_sriov;
10764         /* Mailbox */
10765         ixgbe_init_mbx_params_pf(hw);
10766         hw->mbx.ops = ii->mbx_ops;
10767         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10768         ixgbe_enable_sriov(adapter, max_vfs);
10769 skip_sriov:
10770
10771 #endif
10772         netdev->features = NETIF_F_SG |
10773                            NETIF_F_TSO |
10774                            NETIF_F_TSO6 |
10775                            NETIF_F_RXHASH |
10776                            NETIF_F_RXCSUM |
10777                            NETIF_F_HW_CSUM;
10778
10779 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10780                                     NETIF_F_GSO_GRE_CSUM | \
10781                                     NETIF_F_GSO_IPXIP4 | \
10782                                     NETIF_F_GSO_IPXIP6 | \
10783                                     NETIF_F_GSO_UDP_TUNNEL | \
10784                                     NETIF_F_GSO_UDP_TUNNEL_CSUM)
10785
10786         netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10787         netdev->features |= NETIF_F_GSO_PARTIAL |
10788                             IXGBE_GSO_PARTIAL_FEATURES;
10789
10790         if (hw->mac.type >= ixgbe_mac_82599EB)
10791                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
10792
10793 #ifdef CONFIG_IXGBE_IPSEC
10794 #define IXGBE_ESP_FEATURES      (NETIF_F_HW_ESP | \
10795                                  NETIF_F_HW_ESP_TX_CSUM | \
10796                                  NETIF_F_GSO_ESP)
10797
10798         if (adapter->ipsec)
10799                 netdev->features |= IXGBE_ESP_FEATURES;
10800 #endif
10801         /* copy netdev features into list of user selectable features */
10802         netdev->hw_features |= netdev->features |
10803                                NETIF_F_HW_VLAN_CTAG_FILTER |
10804                                NETIF_F_HW_VLAN_CTAG_RX |
10805                                NETIF_F_HW_VLAN_CTAG_TX |
10806                                NETIF_F_RXALL |
10807                                NETIF_F_HW_L2FW_DOFFLOAD;
10808
10809         if (hw->mac.type >= ixgbe_mac_82599EB)
10810                 netdev->hw_features |= NETIF_F_NTUPLE |
10811                                        NETIF_F_HW_TC;
10812
10813         if (pci_using_dac)
10814                 netdev->features |= NETIF_F_HIGHDMA;
10815
10816         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10817         netdev->hw_enc_features |= netdev->vlan_features;
10818         netdev->mpls_features |= NETIF_F_SG |
10819                                  NETIF_F_TSO |
10820                                  NETIF_F_TSO6 |
10821                                  NETIF_F_HW_CSUM;
10822         netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10823
10824         /* set this bit last since it cannot be part of vlan_features */
10825         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10826                             NETIF_F_HW_VLAN_CTAG_RX |
10827                             NETIF_F_HW_VLAN_CTAG_TX;
10828
10829         netdev->priv_flags |= IFF_UNICAST_FLT;
10830         netdev->priv_flags |= IFF_SUPP_NOFCS;
10831
10832         /* MTU range: 68 - 9710 */
10833         netdev->min_mtu = ETH_MIN_MTU;
10834         netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10835
10836 #ifdef CONFIG_IXGBE_DCB
10837         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10838                 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10839 #endif
10840
10841 #ifdef IXGBE_FCOE
10842         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10843                 unsigned int fcoe_l;
10844
10845                 if (hw->mac.ops.get_device_caps) {
10846                         hw->mac.ops.get_device_caps(hw, &device_caps);
10847                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10848                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10849                 }
10850
10851
10852                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10853                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10854
10855                 netdev->features |= NETIF_F_FSO |
10856                                     NETIF_F_FCOE_CRC;
10857
10858                 netdev->vlan_features |= NETIF_F_FSO |
10859                                          NETIF_F_FCOE_CRC |
10860                                          NETIF_F_FCOE_MTU;
10861         }
10862 #endif /* IXGBE_FCOE */
10863         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10864                 netdev->hw_features |= NETIF_F_LRO;
10865         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10866                 netdev->features |= NETIF_F_LRO;
10867
10868         if (ixgbe_check_fw_error(adapter)) {
10869                 err = -EIO;
10870                 goto err_sw_init;
10871         }
10872
10873         /* make sure the EEPROM is good */
10874         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10875                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10876                 err = -EIO;
10877                 goto err_sw_init;
10878         }
10879
10880         eth_platform_get_mac_address(&adapter->pdev->dev,
10881                                      adapter->hw.mac.perm_addr);
10882
10883         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
10884
10885         if (!is_valid_ether_addr(netdev->dev_addr)) {
10886                 e_dev_err("invalid MAC address\n");
10887                 err = -EIO;
10888                 goto err_sw_init;
10889         }
10890
10891         /* Set hw->mac.addr to permanent MAC address */
10892         ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
10893         ixgbe_mac_set_default_filter(adapter);
10894
10895         timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
10896
10897         if (ixgbe_removed(hw->hw_addr)) {
10898                 err = -EIO;
10899                 goto err_sw_init;
10900         }
10901         INIT_WORK(&adapter->service_task, ixgbe_service_task);
10902         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
10903         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
10904
10905         err = ixgbe_init_interrupt_scheme(adapter);
10906         if (err)
10907                 goto err_sw_init;
10908
10909         for (i = 0; i < adapter->num_rx_queues; i++)
10910                 u64_stats_init(&adapter->rx_ring[i]->syncp);
10911         for (i = 0; i < adapter->num_tx_queues; i++)
10912                 u64_stats_init(&adapter->tx_ring[i]->syncp);
10913         for (i = 0; i < adapter->num_xdp_queues; i++)
10914                 u64_stats_init(&adapter->xdp_ring[i]->syncp);
10915
10916         /* WOL not supported for all devices */
10917         adapter->wol = 0;
10918         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
10919         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
10920                                                 pdev->subsystem_device);
10921         if (hw->wol_enabled)
10922                 adapter->wol = IXGBE_WUFC_MAG;
10923
10924         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
10925
10926         /* save off EEPROM version number */
10927         ixgbe_set_fw_version(adapter);
10928
10929         /* pick up the PCI bus settings for reporting later */
10930         if (ixgbe_pcie_from_parent(hw))
10931                 ixgbe_get_parent_bus_info(adapter);
10932         else
10933                  hw->mac.ops.get_bus_info(hw);
10934
10935         /* calculate the expected PCIe bandwidth required for optimal
10936          * performance. Note that some older parts will never have enough
10937          * bandwidth due to being older generation PCIe parts. We clamp these
10938          * parts to ensure no warning is displayed if it can't be fixed.
10939          */
10940         switch (hw->mac.type) {
10941         case ixgbe_mac_82598EB:
10942                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
10943                 break;
10944         default:
10945                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
10946                 break;
10947         }
10948
10949         /* don't check link if we failed to enumerate functions */
10950         if (expected_gts > 0)
10951                 ixgbe_check_minimum_link(adapter, expected_gts);
10952
10953         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
10954         if (err)
10955                 strlcpy(part_str, "Unknown", sizeof(part_str));
10956         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
10957                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
10958                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
10959                            part_str);
10960         else
10961                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
10962                            hw->mac.type, hw->phy.type, part_str);
10963
10964         e_dev_info("%pM\n", netdev->dev_addr);
10965
10966         /* reset the hardware with the new settings */
10967         err = hw->mac.ops.start_hw(hw);
10968         if (err == IXGBE_ERR_EEPROM_VERSION) {
10969                 /* We are running on a pre-production device, log a warning */
10970                 e_dev_warn("This device is a pre-production adapter/LOM. "
10971                            "Please be aware there may be issues associated "
10972                            "with your hardware.  If you are experiencing "
10973                            "problems please contact your Intel or hardware "
10974                            "representative who provided you with this "
10975                            "hardware.\n");
10976         }
10977         strcpy(netdev->name, "eth%d");
10978         pci_set_drvdata(pdev, adapter);
10979         err = register_netdev(netdev);
10980         if (err)
10981                 goto err_register;
10982
10983
10984         /* power down the optics for 82599 SFP+ fiber */
10985         if (hw->mac.ops.disable_tx_laser)
10986                 hw->mac.ops.disable_tx_laser(hw);
10987
10988         /* carrier off reporting is important to ethtool even BEFORE open */
10989         netif_carrier_off(netdev);
10990
10991 #ifdef CONFIG_IXGBE_DCA
10992         if (dca_add_requester(&pdev->dev) == 0) {
10993                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
10994                 ixgbe_setup_dca(adapter);
10995         }
10996 #endif
10997         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
10998                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
10999                 for (i = 0; i < adapter->num_vfs; i++)
11000                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
11001         }
11002
11003         /* firmware requires driver version to be 0xFFFFFFFF
11004          * since os does not support feature
11005          */
11006         if (hw->mac.ops.set_fw_drv_ver)
11007                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11008                                            sizeof(UTS_RELEASE) - 1,
11009                                            UTS_RELEASE);
11010
11011         /* add san mac addr to netdev */
11012         ixgbe_add_sanmac_netdev(netdev);
11013
11014         e_dev_info("%s\n", ixgbe_default_device_descr);
11015
11016 #ifdef CONFIG_IXGBE_HWMON
11017         if (ixgbe_sysfs_init(adapter))
11018                 e_err(probe, "failed to allocate sysfs resources\n");
11019 #endif /* CONFIG_IXGBE_HWMON */
11020
11021         ixgbe_dbg_adapter_init(adapter);
11022
11023         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11024         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11025                 hw->mac.ops.setup_link(hw,
11026                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11027                         true);
11028
11029         err = ixgbe_mii_bus_init(hw);
11030         if (err)
11031                 goto err_netdev;
11032
11033         return 0;
11034
11035 err_netdev:
11036         unregister_netdev(netdev);
11037 err_register:
11038         ixgbe_release_hw_control(adapter);
11039         ixgbe_clear_interrupt_scheme(adapter);
11040 err_sw_init:
11041         ixgbe_disable_sriov(adapter);
11042         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11043         iounmap(adapter->io_addr);
11044         kfree(adapter->jump_tables[0]);
11045         kfree(adapter->mac_table);
11046         kfree(adapter->rss_key);
11047         bitmap_free(adapter->af_xdp_zc_qps);
11048 err_ioremap:
11049         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11050         free_netdev(netdev);
11051 err_alloc_etherdev:
11052         pci_release_mem_regions(pdev);
11053 err_pci_reg:
11054 err_dma:
11055         if (!adapter || disable_dev)
11056                 pci_disable_device(pdev);
11057         return err;
11058 }
11059
11060 /**
11061  * ixgbe_remove - Device Removal Routine
11062  * @pdev: PCI device information struct
11063  *
11064  * ixgbe_remove is called by the PCI subsystem to alert the driver
11065  * that it should release a PCI device.  The could be caused by a
11066  * Hot-Plug event, or because the driver is going to be removed from
11067  * memory.
11068  **/
11069 static void ixgbe_remove(struct pci_dev *pdev)
11070 {
11071         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11072         struct net_device *netdev;
11073         bool disable_dev;
11074         int i;
11075
11076         /* if !adapter then we already cleaned up in probe */
11077         if (!adapter)
11078                 return;
11079
11080         netdev  = adapter->netdev;
11081         ixgbe_dbg_adapter_exit(adapter);
11082
11083         set_bit(__IXGBE_REMOVING, &adapter->state);
11084         cancel_work_sync(&adapter->service_task);
11085
11086         if (adapter->mii_bus)
11087                 mdiobus_unregister(adapter->mii_bus);
11088
11089 #ifdef CONFIG_IXGBE_DCA
11090         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11091                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11092                 dca_remove_requester(&pdev->dev);
11093                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11094                                 IXGBE_DCA_CTRL_DCA_DISABLE);
11095         }
11096
11097 #endif
11098 #ifdef CONFIG_IXGBE_HWMON
11099         ixgbe_sysfs_exit(adapter);
11100 #endif /* CONFIG_IXGBE_HWMON */
11101
11102         /* remove the added san mac */
11103         ixgbe_del_sanmac_netdev(netdev);
11104
11105 #ifdef CONFIG_PCI_IOV
11106         ixgbe_disable_sriov(adapter);
11107 #endif
11108         if (netdev->reg_state == NETREG_REGISTERED)
11109                 unregister_netdev(netdev);
11110
11111         ixgbe_stop_ipsec_offload(adapter);
11112         ixgbe_clear_interrupt_scheme(adapter);
11113
11114         ixgbe_release_hw_control(adapter);
11115
11116 #ifdef CONFIG_DCB
11117         kfree(adapter->ixgbe_ieee_pfc);
11118         kfree(adapter->ixgbe_ieee_ets);
11119
11120 #endif
11121         iounmap(adapter->io_addr);
11122         pci_release_mem_regions(pdev);
11123
11124         e_dev_info("complete\n");
11125
11126         for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11127                 if (adapter->jump_tables[i]) {
11128                         kfree(adapter->jump_tables[i]->input);
11129                         kfree(adapter->jump_tables[i]->mask);
11130                 }
11131                 kfree(adapter->jump_tables[i]);
11132         }
11133
11134         kfree(adapter->mac_table);
11135         kfree(adapter->rss_key);
11136         bitmap_free(adapter->af_xdp_zc_qps);
11137         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11138         free_netdev(netdev);
11139
11140         pci_disable_pcie_error_reporting(pdev);
11141
11142         if (disable_dev)
11143                 pci_disable_device(pdev);
11144 }
11145
11146 /**
11147  * ixgbe_io_error_detected - called when PCI error is detected
11148  * @pdev: Pointer to PCI device
11149  * @state: The current pci connection state
11150  *
11151  * This function is called after a PCI bus error affecting
11152  * this device has been detected.
11153  */
11154 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11155                                                 pci_channel_state_t state)
11156 {
11157         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11158         struct net_device *netdev = adapter->netdev;
11159
11160 #ifdef CONFIG_PCI_IOV
11161         struct ixgbe_hw *hw = &adapter->hw;
11162         struct pci_dev *bdev, *vfdev;
11163         u32 dw0, dw1, dw2, dw3;
11164         int vf, pos;
11165         u16 req_id, pf_func;
11166
11167         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11168             adapter->num_vfs == 0)
11169                 goto skip_bad_vf_detection;
11170
11171         bdev = pdev->bus->self;
11172         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11173                 bdev = bdev->bus->self;
11174
11175         if (!bdev)
11176                 goto skip_bad_vf_detection;
11177
11178         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11179         if (!pos)
11180                 goto skip_bad_vf_detection;
11181
11182         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11183         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11184         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11185         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11186         if (ixgbe_removed(hw->hw_addr))
11187                 goto skip_bad_vf_detection;
11188
11189         req_id = dw1 >> 16;
11190         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11191         if (!(req_id & 0x0080))
11192                 goto skip_bad_vf_detection;
11193
11194         pf_func = req_id & 0x01;
11195         if ((pf_func & 1) == (pdev->devfn & 1)) {
11196                 unsigned int device_id;
11197
11198                 vf = (req_id & 0x7F) >> 1;
11199                 e_dev_err("VF %d has caused a PCIe error\n", vf);
11200                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11201                                 "%8.8x\tdw3: %8.8x\n",
11202                 dw0, dw1, dw2, dw3);
11203                 switch (adapter->hw.mac.type) {
11204                 case ixgbe_mac_82599EB:
11205                         device_id = IXGBE_82599_VF_DEVICE_ID;
11206                         break;
11207                 case ixgbe_mac_X540:
11208                         device_id = IXGBE_X540_VF_DEVICE_ID;
11209                         break;
11210                 case ixgbe_mac_X550:
11211                         device_id = IXGBE_DEV_ID_X550_VF;
11212                         break;
11213                 case ixgbe_mac_X550EM_x:
11214                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
11215                         break;
11216                 case ixgbe_mac_x550em_a:
11217                         device_id = IXGBE_DEV_ID_X550EM_A_VF;
11218                         break;
11219                 default:
11220                         device_id = 0;
11221                         break;
11222                 }
11223
11224                 /* Find the pci device of the offending VF */
11225                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11226                 while (vfdev) {
11227                         if (vfdev->devfn == (req_id & 0xFF))
11228                                 break;
11229                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11230                                                device_id, vfdev);
11231                 }
11232                 /*
11233                  * There's a slim chance the VF could have been hot plugged,
11234                  * so if it is no longer present we don't need to issue the
11235                  * VFLR.  Just clean up the AER in that case.
11236                  */
11237                 if (vfdev) {
11238                         pcie_flr(vfdev);
11239                         /* Free device reference count */
11240                         pci_dev_put(vfdev);
11241                 }
11242         }
11243
11244         /*
11245          * Even though the error may have occurred on the other port
11246          * we still need to increment the vf error reference count for
11247          * both ports because the I/O resume function will be called
11248          * for both of them.
11249          */
11250         adapter->vferr_refcount++;
11251
11252         return PCI_ERS_RESULT_RECOVERED;
11253
11254 skip_bad_vf_detection:
11255 #endif /* CONFIG_PCI_IOV */
11256         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11257                 return PCI_ERS_RESULT_DISCONNECT;
11258
11259         if (!netif_device_present(netdev))
11260                 return PCI_ERS_RESULT_DISCONNECT;
11261
11262         rtnl_lock();
11263         netif_device_detach(netdev);
11264
11265         if (netif_running(netdev))
11266                 ixgbe_close_suspend(adapter);
11267
11268         if (state == pci_channel_io_perm_failure) {
11269                 rtnl_unlock();
11270                 return PCI_ERS_RESULT_DISCONNECT;
11271         }
11272
11273         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11274                 pci_disable_device(pdev);
11275         rtnl_unlock();
11276
11277         /* Request a slot reset. */
11278         return PCI_ERS_RESULT_NEED_RESET;
11279 }
11280
11281 /**
11282  * ixgbe_io_slot_reset - called after the pci bus has been reset.
11283  * @pdev: Pointer to PCI device
11284  *
11285  * Restart the card from scratch, as if from a cold-boot.
11286  */
11287 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11288 {
11289         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11290         pci_ers_result_t result;
11291
11292         if (pci_enable_device_mem(pdev)) {
11293                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11294                 result = PCI_ERS_RESULT_DISCONNECT;
11295         } else {
11296                 smp_mb__before_atomic();
11297                 clear_bit(__IXGBE_DISABLED, &adapter->state);
11298                 adapter->hw.hw_addr = adapter->io_addr;
11299                 pci_set_master(pdev);
11300                 pci_restore_state(pdev);
11301                 pci_save_state(pdev);
11302
11303                 pci_wake_from_d3(pdev, false);
11304
11305                 ixgbe_reset(adapter);
11306                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11307                 result = PCI_ERS_RESULT_RECOVERED;
11308         }
11309
11310         return result;
11311 }
11312
11313 /**
11314  * ixgbe_io_resume - called when traffic can start flowing again.
11315  * @pdev: Pointer to PCI device
11316  *
11317  * This callback is called when the error recovery driver tells us that
11318  * its OK to resume normal operation.
11319  */
11320 static void ixgbe_io_resume(struct pci_dev *pdev)
11321 {
11322         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11323         struct net_device *netdev = adapter->netdev;
11324
11325 #ifdef CONFIG_PCI_IOV
11326         if (adapter->vferr_refcount) {
11327                 e_info(drv, "Resuming after VF err\n");
11328                 adapter->vferr_refcount--;
11329                 return;
11330         }
11331
11332 #endif
11333         rtnl_lock();
11334         if (netif_running(netdev))
11335                 ixgbe_open(netdev);
11336
11337         netif_device_attach(netdev);
11338         rtnl_unlock();
11339 }
11340
11341 static const struct pci_error_handlers ixgbe_err_handler = {
11342         .error_detected = ixgbe_io_error_detected,
11343         .slot_reset = ixgbe_io_slot_reset,
11344         .resume = ixgbe_io_resume,
11345 };
11346
11347 static SIMPLE_DEV_PM_OPS(ixgbe_pm_ops, ixgbe_suspend, ixgbe_resume);
11348
11349 static struct pci_driver ixgbe_driver = {
11350         .name      = ixgbe_driver_name,
11351         .id_table  = ixgbe_pci_tbl,
11352         .probe     = ixgbe_probe,
11353         .remove    = ixgbe_remove,
11354         .driver.pm = &ixgbe_pm_ops,
11355         .shutdown  = ixgbe_shutdown,
11356         .sriov_configure = ixgbe_pci_sriov_configure,
11357         .err_handler = &ixgbe_err_handler
11358 };
11359
11360 /**
11361  * ixgbe_init_module - Driver Registration Routine
11362  *
11363  * ixgbe_init_module is the first routine called when the driver is
11364  * loaded. All it does is register with the PCI subsystem.
11365  **/
11366 static int __init ixgbe_init_module(void)
11367 {
11368         int ret;
11369         pr_info("%s\n", ixgbe_driver_string);
11370         pr_info("%s\n", ixgbe_copyright);
11371
11372         ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11373         if (!ixgbe_wq) {
11374                 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11375                 return -ENOMEM;
11376         }
11377
11378         ixgbe_dbg_init();
11379
11380         ret = pci_register_driver(&ixgbe_driver);
11381         if (ret) {
11382                 destroy_workqueue(ixgbe_wq);
11383                 ixgbe_dbg_exit();
11384                 return ret;
11385         }
11386
11387 #ifdef CONFIG_IXGBE_DCA
11388         dca_register_notify(&dca_notifier);
11389 #endif
11390
11391         return 0;
11392 }
11393
11394 module_init(ixgbe_init_module);
11395
11396 /**
11397  * ixgbe_exit_module - Driver Exit Cleanup Routine
11398  *
11399  * ixgbe_exit_module is called just before the driver is removed
11400  * from memory.
11401  **/
11402 static void __exit ixgbe_exit_module(void)
11403 {
11404 #ifdef CONFIG_IXGBE_DCA
11405         dca_unregister_notify(&dca_notifier);
11406 #endif
11407         pci_unregister_driver(&ixgbe_driver);
11408
11409         ixgbe_dbg_exit();
11410         if (ixgbe_wq) {
11411                 destroy_workqueue(ixgbe_wq);
11412                 ixgbe_wq = NULL;
11413         }
11414 }
11415
11416 #ifdef CONFIG_IXGBE_DCA
11417 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11418                             void *p)
11419 {
11420         int ret_val;
11421
11422         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11423                                          __ixgbe_notify_dca);
11424
11425         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11426 }
11427
11428 #endif /* CONFIG_IXGBE_DCA */
11429
11430 module_exit(ixgbe_exit_module);
11431
11432 /* ixgbe_main.c */