1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 Intel Corporation */
6 #include <linux/module.h>
7 #include <linux/device.h>
9 #include <linux/ptp_classify.h>
10 #include <linux/clocksource.h>
12 #define INCVALUE_MASK 0x7fffffff
13 #define ISGN 0x80000000
15 #define IGC_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9)
16 #define IGC_PTP_TX_TIMEOUT (HZ * 15)
18 /* SYSTIM read access for I225 */
19 static void igc_ptp_read_i225(struct igc_adapter *adapter,
20 struct timespec64 *ts)
22 struct igc_hw *hw = &adapter->hw;
25 /* The timestamp latches on lowest register read. For I210/I211, the
26 * lowest register is SYSTIMR. Since we only need to provide nanosecond
27 * resolution, we can ignore it.
30 nsec = rd32(IGC_SYSTIML);
31 sec = rd32(IGC_SYSTIMH);
37 static void igc_ptp_write_i225(struct igc_adapter *adapter,
38 const struct timespec64 *ts)
40 struct igc_hw *hw = &adapter->hw;
42 /* Writing the SYSTIMR register is not necessary as it only
43 * provides sub-nanosecond resolution.
45 wr32(IGC_SYSTIML, ts->tv_nsec);
46 wr32(IGC_SYSTIMH, ts->tv_sec);
49 static int igc_ptp_adjfine_i225(struct ptp_clock_info *ptp, long scaled_ppm)
51 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
53 struct igc_hw *hw = &igc->hw;
60 scaled_ppm = -scaled_ppm;
64 rate = div_u64(rate, 78125);
66 inca = rate & INCVALUE_MASK;
70 wr32(IGC_TIMINCA, inca);
75 static int igc_ptp_adjtime_i225(struct ptp_clock_info *ptp, s64 delta)
77 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
79 struct timespec64 now, then = ns_to_timespec64(delta);
82 spin_lock_irqsave(&igc->tmreg_lock, flags);
84 igc_ptp_read_i225(igc, &now);
85 now = timespec64_add(now, then);
86 igc_ptp_write_i225(igc, (const struct timespec64 *)&now);
88 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
93 static int igc_ptp_gettimex64_i225(struct ptp_clock_info *ptp,
94 struct timespec64 *ts,
95 struct ptp_system_timestamp *sts)
97 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
99 struct igc_hw *hw = &igc->hw;
102 spin_lock_irqsave(&igc->tmreg_lock, flags);
104 ptp_read_system_prets(sts);
106 ptp_read_system_postts(sts);
107 ts->tv_nsec = rd32(IGC_SYSTIML);
108 ts->tv_sec = rd32(IGC_SYSTIMH);
110 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
115 static int igc_ptp_settime_i225(struct ptp_clock_info *ptp,
116 const struct timespec64 *ts)
118 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
122 spin_lock_irqsave(&igc->tmreg_lock, flags);
124 igc_ptp_write_i225(igc, ts);
126 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
131 static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
132 struct ptp_clock_request *rq, int on)
138 * igc_ptp_systim_to_hwtstamp - convert system time value to HW timestamp
139 * @adapter: board private structure
140 * @hwtstamps: timestamp structure to update
141 * @systim: unsigned 64bit system time value
143 * We need to convert the system time value stored in the RX/TXSTMP registers
144 * into a hwtstamp which can be used by the upper level timestamping functions.
146 static void igc_ptp_systim_to_hwtstamp(struct igc_adapter *adapter,
147 struct skb_shared_hwtstamps *hwtstamps,
150 switch (adapter->hw.mac.type) {
152 memset(hwtstamps, 0, sizeof(*hwtstamps));
153 /* Upper 32 bits contain s, lower 32 bits contain ns. */
154 hwtstamps->hwtstamp = ktime_set(systim >> 32,
155 systim & 0xFFFFFFFF);
163 * igc_ptp_rx_pktstamp - retrieve Rx per packet timestamp
164 * @q_vector: Pointer to interrupt specific structure
165 * @va: Pointer to address containing Rx buffer
166 * @skb: Buffer containing timestamp and packet
168 * This function is meant to retrieve the first timestamp from the
169 * first buffer of an incoming frame. The value is stored in little
170 * endian format starting on byte 0. There's a second timestamp
171 * starting on byte 8.
173 void igc_ptp_rx_pktstamp(struct igc_q_vector *q_vector, void *va,
176 struct igc_adapter *adapter = q_vector->adapter;
177 __le64 *regval = (__le64 *)va;
180 /* The timestamp is recorded in little endian format.
181 * DWORD: | 0 | 1 | 2 | 3
182 * Field: | Timer0 Low | Timer0 High | Timer1 Low | Timer1 High
184 igc_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb),
185 le64_to_cpu(regval[0]));
187 /* adjust timestamp for the RX latency based on link speed */
188 if (adapter->hw.mac.type == igc_i225) {
189 switch (adapter->link_speed) {
191 adjust = IGC_I225_RX_LATENCY_10;
194 adjust = IGC_I225_RX_LATENCY_100;
197 adjust = IGC_I225_RX_LATENCY_1000;
200 adjust = IGC_I225_RX_LATENCY_2500;
204 skb_hwtstamps(skb)->hwtstamp =
205 ktime_sub_ns(skb_hwtstamps(skb)->hwtstamp, adjust);
208 static void igc_ptp_disable_rx_timestamp(struct igc_adapter *adapter)
210 struct igc_hw *hw = &adapter->hw;
214 wr32(IGC_TSYNCRXCTL, 0);
216 for (i = 0; i < adapter->num_rx_queues; i++) {
217 val = rd32(IGC_SRRCTL(i));
218 val &= ~IGC_SRRCTL_TIMESTAMP;
219 wr32(IGC_SRRCTL(i), val);
222 val = rd32(IGC_RXPBS);
223 val &= ~IGC_RXPBS_CFG_TS_EN;
224 wr32(IGC_RXPBS, val);
227 static void igc_ptp_enable_rx_timestamp(struct igc_adapter *adapter)
229 struct igc_hw *hw = &adapter->hw;
233 val = rd32(IGC_RXPBS);
234 val |= IGC_RXPBS_CFG_TS_EN;
235 wr32(IGC_RXPBS, val);
237 for (i = 0; i < adapter->num_rx_queues; i++) {
238 val = rd32(IGC_SRRCTL(i));
239 /* FIXME: For now, only support retrieving RX timestamps from
242 val |= IGC_SRRCTL_TIMER1SEL(0) | IGC_SRRCTL_TIMER0SEL(0) |
243 IGC_SRRCTL_TIMESTAMP;
244 wr32(IGC_SRRCTL(i), val);
247 val = IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_ALL |
248 IGC_TSYNCRXCTL_RXSYNSIG;
249 wr32(IGC_TSYNCRXCTL, val);
252 static void igc_ptp_disable_tx_timestamp(struct igc_adapter *adapter)
254 struct igc_hw *hw = &adapter->hw;
256 wr32(IGC_TSYNCTXCTL, 0);
259 static void igc_ptp_enable_tx_timestamp(struct igc_adapter *adapter)
261 struct igc_hw *hw = &adapter->hw;
263 wr32(IGC_TSYNCTXCTL, IGC_TSYNCTXCTL_ENABLED | IGC_TSYNCTXCTL_TXSYNSIG);
265 /* Read TXSTMP registers to discard any timestamp previously stored. */
271 * igc_ptp_set_timestamp_mode - setup hardware for timestamping
272 * @adapter: networking device structure
273 * @config: hwtstamp configuration
275 * Return: 0 in case of success, negative errno code otherwise.
277 static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
278 struct hwtstamp_config *config)
280 /* reserved for future extensions */
284 switch (config->tx_type) {
285 case HWTSTAMP_TX_OFF:
286 igc_ptp_disable_tx_timestamp(adapter);
289 igc_ptp_enable_tx_timestamp(adapter);
295 switch (config->rx_filter) {
296 case HWTSTAMP_FILTER_NONE:
297 igc_ptp_disable_rx_timestamp(adapter);
299 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
300 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
301 case HWTSTAMP_FILTER_PTP_V2_EVENT:
302 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
303 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
304 case HWTSTAMP_FILTER_PTP_V2_SYNC:
305 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
306 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
307 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
308 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
309 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
310 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
311 case HWTSTAMP_FILTER_NTP_ALL:
312 case HWTSTAMP_FILTER_ALL:
313 igc_ptp_enable_rx_timestamp(adapter);
314 config->rx_filter = HWTSTAMP_FILTER_ALL;
323 static void igc_ptp_tx_timeout(struct igc_adapter *adapter)
325 struct igc_hw *hw = &adapter->hw;
327 dev_kfree_skb_any(adapter->ptp_tx_skb);
328 adapter->ptp_tx_skb = NULL;
329 adapter->tx_hwtstamp_timeouts++;
330 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
331 /* Clear the tx valid bit in TSYNCTXCTL register to enable interrupt. */
333 netdev_warn(adapter->netdev, "Tx timestamp timeout\n");
336 void igc_ptp_tx_hang(struct igc_adapter *adapter)
338 bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +
341 if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
344 /* If we haven't received a timestamp within the timeout, it is
345 * reasonable to assume that it will never occur, so we can unlock the
346 * timestamp bit when this occurs.
349 cancel_work_sync(&adapter->ptp_tx_work);
350 igc_ptp_tx_timeout(adapter);
355 * igc_ptp_tx_hwtstamp - utility function which checks for TX time stamp
356 * @adapter: Board private structure
358 * If we were asked to do hardware stamping and such a time stamp is
359 * available, then it must have been for this skb here because we only
360 * allow only one such packet into the queue.
362 static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)
364 struct sk_buff *skb = adapter->ptp_tx_skb;
365 struct skb_shared_hwtstamps shhwtstamps;
366 struct igc_hw *hw = &adapter->hw;
370 if (WARN_ON_ONCE(!skb))
373 regval = rd32(IGC_TXSTMPL);
374 regval |= (u64)rd32(IGC_TXSTMPH) << 32;
375 igc_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
377 switch (adapter->link_speed) {
379 adjust = IGC_I225_TX_LATENCY_10;
382 adjust = IGC_I225_TX_LATENCY_100;
385 adjust = IGC_I225_TX_LATENCY_1000;
388 adjust = IGC_I225_TX_LATENCY_2500;
392 shhwtstamps.hwtstamp =
393 ktime_add_ns(shhwtstamps.hwtstamp, adjust);
395 /* Clear the lock early before calling skb_tstamp_tx so that
396 * applications are not woken up before the lock bit is clear. We use
397 * a copy of the skb pointer to ensure other threads can't change it
398 * while we're notifying the stack.
400 adapter->ptp_tx_skb = NULL;
401 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
403 /* Notify the stack and free the skb after we've unlocked */
404 skb_tstamp_tx(skb, &shhwtstamps);
405 dev_kfree_skb_any(skb);
410 * @work: pointer to work struct
412 * This work function polls the TSYNCTXCTL valid bit to determine when a
413 * timestamp has been taken for the current stored skb.
415 static void igc_ptp_tx_work(struct work_struct *work)
417 struct igc_adapter *adapter = container_of(work, struct igc_adapter,
419 struct igc_hw *hw = &adapter->hw;
422 if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
425 if (time_is_before_jiffies(adapter->ptp_tx_start +
426 IGC_PTP_TX_TIMEOUT)) {
427 igc_ptp_tx_timeout(adapter);
431 tsynctxctl = rd32(IGC_TSYNCTXCTL);
432 if (tsynctxctl & IGC_TSYNCTXCTL_VALID)
433 igc_ptp_tx_hwtstamp(adapter);
435 /* reschedule to check later */
436 schedule_work(&adapter->ptp_tx_work);
440 * igc_ptp_set_ts_config - set hardware time stamping config
441 * @netdev: network interface device structure
442 * @ifreq: interface request data
445 int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
447 struct igc_adapter *adapter = netdev_priv(netdev);
448 struct hwtstamp_config config;
451 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
454 err = igc_ptp_set_timestamp_mode(adapter, &config);
458 /* save these settings for future reference */
459 memcpy(&adapter->tstamp_config, &config,
460 sizeof(adapter->tstamp_config));
462 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
467 * igc_ptp_get_ts_config - get hardware time stamping config
468 * @netdev: network interface device structure
469 * @ifreq: interface request data
471 * Get the hwtstamp_config settings to return to the user. Rather than attempt
472 * to deconstruct the settings from the registers, just return a shadow copy
473 * of the last known settings.
475 int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
477 struct igc_adapter *adapter = netdev_priv(netdev);
478 struct hwtstamp_config *config = &adapter->tstamp_config;
480 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
485 * igc_ptp_init - Initialize PTP functionality
486 * @adapter: Board private structure
488 * This function is called at device probe to initialize the PTP
491 void igc_ptp_init(struct igc_adapter *adapter)
493 struct net_device *netdev = adapter->netdev;
494 struct igc_hw *hw = &adapter->hw;
496 switch (hw->mac.type) {
498 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
499 adapter->ptp_caps.owner = THIS_MODULE;
500 adapter->ptp_caps.max_adj = 62499999;
501 adapter->ptp_caps.adjfine = igc_ptp_adjfine_i225;
502 adapter->ptp_caps.adjtime = igc_ptp_adjtime_i225;
503 adapter->ptp_caps.gettimex64 = igc_ptp_gettimex64_i225;
504 adapter->ptp_caps.settime64 = igc_ptp_settime_i225;
505 adapter->ptp_caps.enable = igc_ptp_feature_enable_i225;
508 adapter->ptp_clock = NULL;
512 spin_lock_init(&adapter->tmreg_lock);
513 INIT_WORK(&adapter->ptp_tx_work, igc_ptp_tx_work);
515 adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
516 adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
518 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
519 &adapter->pdev->dev);
520 if (IS_ERR(adapter->ptp_clock)) {
521 adapter->ptp_clock = NULL;
522 netdev_err(netdev, "ptp_clock_register failed\n");
523 } else if (adapter->ptp_clock) {
524 netdev_info(netdev, "PHC added\n");
525 adapter->ptp_flags |= IGC_PTP_ENABLED;
530 * igc_ptp_suspend - Disable PTP work items and prepare for suspend
531 * @adapter: Board private structure
533 * This function stops the overflow check work and PTP Tx timestamp work, and
534 * will prepare the device for OS suspend.
536 void igc_ptp_suspend(struct igc_adapter *adapter)
538 if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
541 cancel_work_sync(&adapter->ptp_tx_work);
542 dev_kfree_skb_any(adapter->ptp_tx_skb);
543 adapter->ptp_tx_skb = NULL;
544 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
548 * igc_ptp_stop - Disable PTP device and stop the overflow check.
549 * @adapter: Board private structure.
551 * This function stops the PTP support and cancels the delayed work.
553 void igc_ptp_stop(struct igc_adapter *adapter)
555 igc_ptp_suspend(adapter);
557 if (adapter->ptp_clock) {
558 ptp_clock_unregister(adapter->ptp_clock);
559 netdev_info(adapter->netdev, "PHC removed\n");
560 adapter->ptp_flags &= ~IGC_PTP_ENABLED;
565 * igc_ptp_reset - Re-enable the adapter for PTP following a reset.
566 * @adapter: Board private structure.
568 * This function handles the reset work required to re-enable the PTP device.
570 void igc_ptp_reset(struct igc_adapter *adapter)
572 struct igc_hw *hw = &adapter->hw;
575 /* reset the tstamp_config */
576 igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
578 spin_lock_irqsave(&adapter->tmreg_lock, flags);
580 switch (adapter->hw.mac.type) {
582 wr32(IGC_TSAUXC, 0x0);
583 wr32(IGC_TSSDP, 0x0);
584 wr32(IGC_TSIM, IGC_TSICR_INTERRUPTS);
585 wr32(IGC_IMS, IGC_IMS_TS);
592 /* Re-initialize the timer. */
593 if (hw->mac.type == igc_i225) {
594 struct timespec64 ts64 = ktime_to_timespec64(ktime_get_real());
596 igc_ptp_write_i225(adapter, &ts64);
598 timecounter_init(&adapter->tc, &adapter->cc,
599 ktime_to_ns(ktime_get_real()));
602 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);