1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 Intel Corporation */
6 #include <linux/module.h>
7 #include <linux/device.h>
9 #include <linux/ptp_classify.h>
10 #include <linux/clocksource.h>
11 #include <linux/ktime.h>
13 #define INCVALUE_MASK 0x7fffffff
14 #define ISGN 0x80000000
16 #define IGC_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9)
17 #define IGC_PTP_TX_TIMEOUT (HZ * 15)
19 /* SYSTIM read access for I225 */
20 void igc_ptp_read(struct igc_adapter *adapter, struct timespec64 *ts)
22 struct igc_hw *hw = &adapter->hw;
25 /* The timestamp is latched when SYSTIML is read. */
26 nsec = rd32(IGC_SYSTIML);
27 sec = rd32(IGC_SYSTIMH);
33 static void igc_ptp_write_i225(struct igc_adapter *adapter,
34 const struct timespec64 *ts)
36 struct igc_hw *hw = &adapter->hw;
38 wr32(IGC_SYSTIML, ts->tv_nsec);
39 wr32(IGC_SYSTIMH, ts->tv_sec);
42 static int igc_ptp_adjfine_i225(struct ptp_clock_info *ptp, long scaled_ppm)
44 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
46 struct igc_hw *hw = &igc->hw;
53 scaled_ppm = -scaled_ppm;
57 rate = div_u64(rate, 78125);
59 inca = rate & INCVALUE_MASK;
63 wr32(IGC_TIMINCA, inca);
68 static int igc_ptp_adjtime_i225(struct ptp_clock_info *ptp, s64 delta)
70 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
72 struct timespec64 now, then = ns_to_timespec64(delta);
75 spin_lock_irqsave(&igc->tmreg_lock, flags);
77 igc_ptp_read(igc, &now);
78 now = timespec64_add(now, then);
79 igc_ptp_write_i225(igc, (const struct timespec64 *)&now);
81 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
86 static int igc_ptp_gettimex64_i225(struct ptp_clock_info *ptp,
87 struct timespec64 *ts,
88 struct ptp_system_timestamp *sts)
90 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
92 struct igc_hw *hw = &igc->hw;
95 spin_lock_irqsave(&igc->tmreg_lock, flags);
97 ptp_read_system_prets(sts);
98 ts->tv_nsec = rd32(IGC_SYSTIML);
99 ts->tv_sec = rd32(IGC_SYSTIMH);
100 ptp_read_system_postts(sts);
102 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
107 static int igc_ptp_settime_i225(struct ptp_clock_info *ptp,
108 const struct timespec64 *ts)
110 struct igc_adapter *igc = container_of(ptp, struct igc_adapter,
114 spin_lock_irqsave(&igc->tmreg_lock, flags);
116 igc_ptp_write_i225(igc, ts);
118 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
123 static void igc_pin_direction(int pin, int input, u32 *ctrl, u32 *ctrl_ext)
125 u32 *ptr = pin < 2 ? ctrl : ctrl_ext;
126 static const u32 mask[IGC_N_SDP] = {
129 IGC_CTRL_EXT_SDP2_DIR,
130 IGC_CTRL_EXT_SDP3_DIR,
139 static void igc_pin_perout(struct igc_adapter *igc, int chan, int pin, int freq)
141 static const u32 igc_aux0_sel_sdp[IGC_N_SDP] = {
142 IGC_AUX0_SEL_SDP0, IGC_AUX0_SEL_SDP1, IGC_AUX0_SEL_SDP2, IGC_AUX0_SEL_SDP3,
144 static const u32 igc_aux1_sel_sdp[IGC_N_SDP] = {
145 IGC_AUX1_SEL_SDP0, IGC_AUX1_SEL_SDP1, IGC_AUX1_SEL_SDP2, IGC_AUX1_SEL_SDP3,
147 static const u32 igc_ts_sdp_en[IGC_N_SDP] = {
148 IGC_TS_SDP0_EN, IGC_TS_SDP1_EN, IGC_TS_SDP2_EN, IGC_TS_SDP3_EN,
150 static const u32 igc_ts_sdp_sel_tt0[IGC_N_SDP] = {
151 IGC_TS_SDP0_SEL_TT0, IGC_TS_SDP1_SEL_TT0,
152 IGC_TS_SDP2_SEL_TT0, IGC_TS_SDP3_SEL_TT0,
154 static const u32 igc_ts_sdp_sel_tt1[IGC_N_SDP] = {
155 IGC_TS_SDP0_SEL_TT1, IGC_TS_SDP1_SEL_TT1,
156 IGC_TS_SDP2_SEL_TT1, IGC_TS_SDP3_SEL_TT1,
158 static const u32 igc_ts_sdp_sel_fc0[IGC_N_SDP] = {
159 IGC_TS_SDP0_SEL_FC0, IGC_TS_SDP1_SEL_FC0,
160 IGC_TS_SDP2_SEL_FC0, IGC_TS_SDP3_SEL_FC0,
162 static const u32 igc_ts_sdp_sel_fc1[IGC_N_SDP] = {
163 IGC_TS_SDP0_SEL_FC1, IGC_TS_SDP1_SEL_FC1,
164 IGC_TS_SDP2_SEL_FC1, IGC_TS_SDP3_SEL_FC1,
166 static const u32 igc_ts_sdp_sel_clr[IGC_N_SDP] = {
167 IGC_TS_SDP0_SEL_FC1, IGC_TS_SDP1_SEL_FC1,
168 IGC_TS_SDP2_SEL_FC1, IGC_TS_SDP3_SEL_FC1,
170 struct igc_hw *hw = &igc->hw;
171 u32 ctrl, ctrl_ext, tssdp = 0;
173 ctrl = rd32(IGC_CTRL);
174 ctrl_ext = rd32(IGC_CTRL_EXT);
175 tssdp = rd32(IGC_TSSDP);
177 igc_pin_direction(pin, 0, &ctrl, &ctrl_ext);
179 /* Make sure this pin is not enabled as an input. */
180 if ((tssdp & IGC_AUX0_SEL_SDP3) == igc_aux0_sel_sdp[pin])
181 tssdp &= ~IGC_AUX0_TS_SDP_EN;
183 if ((tssdp & IGC_AUX1_SEL_SDP3) == igc_aux1_sel_sdp[pin])
184 tssdp &= ~IGC_AUX1_TS_SDP_EN;
186 tssdp &= ~igc_ts_sdp_sel_clr[pin];
189 tssdp |= igc_ts_sdp_sel_fc1[pin];
191 tssdp |= igc_ts_sdp_sel_fc0[pin];
194 tssdp |= igc_ts_sdp_sel_tt1[pin];
196 tssdp |= igc_ts_sdp_sel_tt0[pin];
198 tssdp |= igc_ts_sdp_en[pin];
200 wr32(IGC_TSSDP, tssdp);
201 wr32(IGC_CTRL, ctrl);
202 wr32(IGC_CTRL_EXT, ctrl_ext);
205 static void igc_pin_extts(struct igc_adapter *igc, int chan, int pin)
207 static const u32 igc_aux0_sel_sdp[IGC_N_SDP] = {
208 IGC_AUX0_SEL_SDP0, IGC_AUX0_SEL_SDP1, IGC_AUX0_SEL_SDP2, IGC_AUX0_SEL_SDP3,
210 static const u32 igc_aux1_sel_sdp[IGC_N_SDP] = {
211 IGC_AUX1_SEL_SDP0, IGC_AUX1_SEL_SDP1, IGC_AUX1_SEL_SDP2, IGC_AUX1_SEL_SDP3,
213 static const u32 igc_ts_sdp_en[IGC_N_SDP] = {
214 IGC_TS_SDP0_EN, IGC_TS_SDP1_EN, IGC_TS_SDP2_EN, IGC_TS_SDP3_EN,
216 struct igc_hw *hw = &igc->hw;
217 u32 ctrl, ctrl_ext, tssdp = 0;
219 ctrl = rd32(IGC_CTRL);
220 ctrl_ext = rd32(IGC_CTRL_EXT);
221 tssdp = rd32(IGC_TSSDP);
223 igc_pin_direction(pin, 1, &ctrl, &ctrl_ext);
225 /* Make sure this pin is not enabled as an output. */
226 tssdp &= ~igc_ts_sdp_en[pin];
229 tssdp &= ~IGC_AUX1_SEL_SDP3;
230 tssdp |= igc_aux1_sel_sdp[pin] | IGC_AUX1_TS_SDP_EN;
232 tssdp &= ~IGC_AUX0_SEL_SDP3;
233 tssdp |= igc_aux0_sel_sdp[pin] | IGC_AUX0_TS_SDP_EN;
236 wr32(IGC_TSSDP, tssdp);
237 wr32(IGC_CTRL, ctrl);
238 wr32(IGC_CTRL_EXT, ctrl_ext);
241 static int igc_ptp_feature_enable_i225(struct ptp_clock_info *ptp,
242 struct ptp_clock_request *rq, int on)
244 struct igc_adapter *igc =
245 container_of(ptp, struct igc_adapter, ptp_caps);
246 struct igc_hw *hw = &igc->hw;
248 struct timespec64 ts;
249 int use_freq = 0, pin = -1;
250 u32 tsim, tsauxc, tsauxc_mask, tsim_mask, trgttiml, trgttimh, freqout;
254 case PTP_CLK_REQ_EXTTS:
255 /* Reject requests with unsupported flags */
256 if (rq->extts.flags & ~(PTP_ENABLE_FEATURE |
262 /* Reject requests failing to enable both edges. */
263 if ((rq->extts.flags & PTP_STRICT_FLAGS) &&
264 (rq->extts.flags & PTP_ENABLE_FEATURE) &&
265 (rq->extts.flags & PTP_EXTTS_EDGES) != PTP_EXTTS_EDGES)
269 pin = ptp_find_pin(igc->ptp_clock, PTP_PF_EXTTS,
274 if (rq->extts.index == 1) {
275 tsauxc_mask = IGC_TSAUXC_EN_TS1;
276 tsim_mask = IGC_TSICR_AUTT1;
278 tsauxc_mask = IGC_TSAUXC_EN_TS0;
279 tsim_mask = IGC_TSICR_AUTT0;
281 spin_lock_irqsave(&igc->tmreg_lock, flags);
282 tsauxc = rd32(IGC_TSAUXC);
283 tsim = rd32(IGC_TSIM);
285 igc_pin_extts(igc, rq->extts.index, pin);
286 tsauxc |= tsauxc_mask;
289 tsauxc &= ~tsauxc_mask;
292 wr32(IGC_TSAUXC, tsauxc);
293 wr32(IGC_TSIM, tsim);
294 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
297 case PTP_CLK_REQ_PEROUT:
298 /* Reject requests with unsupported flags */
299 if (rq->perout.flags)
303 pin = ptp_find_pin(igc->ptp_clock, PTP_PF_PEROUT,
308 ts.tv_sec = rq->perout.period.sec;
309 ts.tv_nsec = rq->perout.period.nsec;
310 ns = timespec64_to_ns(&ts);
312 if (on && (ns <= 70000000LL || ns == 125000000LL ||
313 ns == 250000000LL || ns == 500000000LL)) {
318 ts = ns_to_timespec64(ns);
319 if (rq->perout.index == 1) {
321 tsauxc_mask = IGC_TSAUXC_EN_CLK1;
324 tsauxc_mask = IGC_TSAUXC_EN_TT1;
325 tsim_mask = IGC_TSICR_TT1;
327 trgttiml = IGC_TRGTTIML1;
328 trgttimh = IGC_TRGTTIMH1;
329 freqout = IGC_FREQOUT1;
332 tsauxc_mask = IGC_TSAUXC_EN_CLK0;
335 tsauxc_mask = IGC_TSAUXC_EN_TT0;
336 tsim_mask = IGC_TSICR_TT0;
338 trgttiml = IGC_TRGTTIML0;
339 trgttimh = IGC_TRGTTIMH0;
340 freqout = IGC_FREQOUT0;
342 spin_lock_irqsave(&igc->tmreg_lock, flags);
343 tsauxc = rd32(IGC_TSAUXC);
344 tsim = rd32(IGC_TSIM);
345 if (rq->perout.index == 1) {
346 tsauxc &= ~(IGC_TSAUXC_EN_TT1 | IGC_TSAUXC_EN_CLK1);
347 tsim &= ~IGC_TSICR_TT1;
349 tsauxc &= ~(IGC_TSAUXC_EN_TT0 | IGC_TSAUXC_EN_CLK0);
350 tsim &= ~IGC_TSICR_TT0;
353 int i = rq->perout.index;
355 igc_pin_perout(igc, i, pin, use_freq);
356 igc->perout[i].start.tv_sec = rq->perout.start.sec;
357 igc->perout[i].start.tv_nsec = rq->perout.start.nsec;
358 igc->perout[i].period.tv_sec = ts.tv_sec;
359 igc->perout[i].period.tv_nsec = ts.tv_nsec;
360 wr32(trgttimh, rq->perout.start.sec);
361 /* For now, always select timer 0 as source. */
362 wr32(trgttiml, rq->perout.start.nsec | IGC_TT_IO_TIMER_SEL_SYSTIM0);
365 tsauxc |= tsauxc_mask;
368 wr32(IGC_TSAUXC, tsauxc);
369 wr32(IGC_TSIM, tsim);
370 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
373 case PTP_CLK_REQ_PPS:
374 spin_lock_irqsave(&igc->tmreg_lock, flags);
375 tsim = rd32(IGC_TSIM);
377 tsim |= IGC_TSICR_SYS_WRAP;
379 tsim &= ~IGC_TSICR_SYS_WRAP;
380 igc->pps_sys_wrap_on = on;
381 wr32(IGC_TSIM, tsim);
382 spin_unlock_irqrestore(&igc->tmreg_lock, flags);
392 static int igc_ptp_verify_pin(struct ptp_clock_info *ptp, unsigned int pin,
393 enum ptp_pin_function func, unsigned int chan)
407 * igc_ptp_systim_to_hwtstamp - convert system time value to HW timestamp
408 * @adapter: board private structure
409 * @hwtstamps: timestamp structure to update
410 * @systim: unsigned 64bit system time value
412 * We need to convert the system time value stored in the RX/TXSTMP registers
413 * into a hwtstamp which can be used by the upper level timestamping functions.
415 static void igc_ptp_systim_to_hwtstamp(struct igc_adapter *adapter,
416 struct skb_shared_hwtstamps *hwtstamps,
419 switch (adapter->hw.mac.type) {
421 memset(hwtstamps, 0, sizeof(*hwtstamps));
422 /* Upper 32 bits contain s, lower 32 bits contain ns. */
423 hwtstamps->hwtstamp = ktime_set(systim >> 32,
424 systim & 0xFFFFFFFF);
432 * igc_ptp_rx_pktstamp - Retrieve timestamp from Rx packet buffer
433 * @adapter: Pointer to adapter the packet buffer belongs to
434 * @buf: Pointer to packet buffer
436 * This function retrieves the timestamp saved in the beginning of packet
437 * buffer. While two timestamps are available, one in timer0 reference and the
438 * other in timer1 reference, this function considers only the timestamp in
441 * Returns timestamp value.
443 ktime_t igc_ptp_rx_pktstamp(struct igc_adapter *adapter, __le32 *buf)
449 /* Timestamps are saved in little endian at the beginning of the packet
450 * buffer following the layout:
452 * DWORD: | 0 | 1 | 2 | 3 |
453 * Field: | Timer1 SYSTIML | Timer1 SYSTIMH | Timer0 SYSTIML | Timer0 SYSTIMH |
455 * SYSTIML holds the nanoseconds part while SYSTIMH holds the seconds
456 * part of the timestamp.
458 nsecs = le32_to_cpu(buf[2]);
459 secs = le32_to_cpu(buf[3]);
461 timestamp = ktime_set(secs, nsecs);
463 /* Adjust timestamp for the RX latency based on link speed */
464 switch (adapter->link_speed) {
466 adjust = IGC_I225_RX_LATENCY_10;
469 adjust = IGC_I225_RX_LATENCY_100;
472 adjust = IGC_I225_RX_LATENCY_1000;
475 adjust = IGC_I225_RX_LATENCY_2500;
479 netdev_warn_once(adapter->netdev, "Imprecise timestamp\n");
483 return ktime_sub_ns(timestamp, adjust);
486 static void igc_ptp_disable_rx_timestamp(struct igc_adapter *adapter)
488 struct igc_hw *hw = &adapter->hw;
492 wr32(IGC_TSYNCRXCTL, 0);
494 for (i = 0; i < adapter->num_rx_queues; i++) {
495 val = rd32(IGC_SRRCTL(i));
496 val &= ~IGC_SRRCTL_TIMESTAMP;
497 wr32(IGC_SRRCTL(i), val);
500 val = rd32(IGC_RXPBS);
501 val &= ~IGC_RXPBS_CFG_TS_EN;
502 wr32(IGC_RXPBS, val);
505 static void igc_ptp_enable_rx_timestamp(struct igc_adapter *adapter)
507 struct igc_hw *hw = &adapter->hw;
511 val = rd32(IGC_RXPBS);
512 val |= IGC_RXPBS_CFG_TS_EN;
513 wr32(IGC_RXPBS, val);
515 for (i = 0; i < adapter->num_rx_queues; i++) {
516 val = rd32(IGC_SRRCTL(i));
517 /* FIXME: For now, only support retrieving RX timestamps from
520 val |= IGC_SRRCTL_TIMER1SEL(0) | IGC_SRRCTL_TIMER0SEL(0) |
521 IGC_SRRCTL_TIMESTAMP;
522 wr32(IGC_SRRCTL(i), val);
525 val = IGC_TSYNCRXCTL_ENABLED | IGC_TSYNCRXCTL_TYPE_ALL |
526 IGC_TSYNCRXCTL_RXSYNSIG;
527 wr32(IGC_TSYNCRXCTL, val);
530 static void igc_ptp_disable_tx_timestamp(struct igc_adapter *adapter)
532 struct igc_hw *hw = &adapter->hw;
534 wr32(IGC_TSYNCTXCTL, 0);
537 static void igc_ptp_enable_tx_timestamp(struct igc_adapter *adapter)
539 struct igc_hw *hw = &adapter->hw;
541 wr32(IGC_TSYNCTXCTL, IGC_TSYNCTXCTL_ENABLED | IGC_TSYNCTXCTL_TXSYNSIG);
543 /* Read TXSTMP registers to discard any timestamp previously stored. */
549 * igc_ptp_set_timestamp_mode - setup hardware for timestamping
550 * @adapter: networking device structure
551 * @config: hwtstamp configuration
553 * Return: 0 in case of success, negative errno code otherwise.
555 static int igc_ptp_set_timestamp_mode(struct igc_adapter *adapter,
556 struct hwtstamp_config *config)
558 /* reserved for future extensions */
562 switch (config->tx_type) {
563 case HWTSTAMP_TX_OFF:
564 igc_ptp_disable_tx_timestamp(adapter);
567 igc_ptp_enable_tx_timestamp(adapter);
573 switch (config->rx_filter) {
574 case HWTSTAMP_FILTER_NONE:
575 igc_ptp_disable_rx_timestamp(adapter);
577 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
578 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
579 case HWTSTAMP_FILTER_PTP_V2_EVENT:
580 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
581 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
582 case HWTSTAMP_FILTER_PTP_V2_SYNC:
583 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
584 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
585 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
586 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
587 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
588 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
589 case HWTSTAMP_FILTER_NTP_ALL:
590 case HWTSTAMP_FILTER_ALL:
591 igc_ptp_enable_rx_timestamp(adapter);
592 config->rx_filter = HWTSTAMP_FILTER_ALL;
601 static void igc_ptp_tx_timeout(struct igc_adapter *adapter)
603 struct igc_hw *hw = &adapter->hw;
605 dev_kfree_skb_any(adapter->ptp_tx_skb);
606 adapter->ptp_tx_skb = NULL;
607 adapter->tx_hwtstamp_timeouts++;
608 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
609 /* Clear the tx valid bit in TSYNCTXCTL register to enable interrupt. */
611 netdev_warn(adapter->netdev, "Tx timestamp timeout\n");
614 void igc_ptp_tx_hang(struct igc_adapter *adapter)
616 bool timeout = time_is_before_jiffies(adapter->ptp_tx_start +
619 if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
622 /* If we haven't received a timestamp within the timeout, it is
623 * reasonable to assume that it will never occur, so we can unlock the
624 * timestamp bit when this occurs.
627 cancel_work_sync(&adapter->ptp_tx_work);
628 igc_ptp_tx_timeout(adapter);
633 * igc_ptp_tx_hwtstamp - utility function which checks for TX time stamp
634 * @adapter: Board private structure
636 * If we were asked to do hardware stamping and such a time stamp is
637 * available, then it must have been for this skb here because we only
638 * allow only one such packet into the queue.
640 static void igc_ptp_tx_hwtstamp(struct igc_adapter *adapter)
642 struct sk_buff *skb = adapter->ptp_tx_skb;
643 struct skb_shared_hwtstamps shhwtstamps;
644 struct igc_hw *hw = &adapter->hw;
648 if (WARN_ON_ONCE(!skb))
651 regval = rd32(IGC_TXSTMPL);
652 regval |= (u64)rd32(IGC_TXSTMPH) << 32;
653 igc_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
655 switch (adapter->link_speed) {
657 adjust = IGC_I225_TX_LATENCY_10;
660 adjust = IGC_I225_TX_LATENCY_100;
663 adjust = IGC_I225_TX_LATENCY_1000;
666 adjust = IGC_I225_TX_LATENCY_2500;
670 shhwtstamps.hwtstamp =
671 ktime_add_ns(shhwtstamps.hwtstamp, adjust);
673 /* Clear the lock early before calling skb_tstamp_tx so that
674 * applications are not woken up before the lock bit is clear. We use
675 * a copy of the skb pointer to ensure other threads can't change it
676 * while we're notifying the stack.
678 adapter->ptp_tx_skb = NULL;
679 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
681 /* Notify the stack and free the skb after we've unlocked */
682 skb_tstamp_tx(skb, &shhwtstamps);
683 dev_kfree_skb_any(skb);
688 * @work: pointer to work struct
690 * This work function polls the TSYNCTXCTL valid bit to determine when a
691 * timestamp has been taken for the current stored skb.
693 static void igc_ptp_tx_work(struct work_struct *work)
695 struct igc_adapter *adapter = container_of(work, struct igc_adapter,
697 struct igc_hw *hw = &adapter->hw;
700 if (!test_bit(__IGC_PTP_TX_IN_PROGRESS, &adapter->state))
703 tsynctxctl = rd32(IGC_TSYNCTXCTL);
704 if (WARN_ON_ONCE(!(tsynctxctl & IGC_TSYNCTXCTL_TXTT_0)))
707 igc_ptp_tx_hwtstamp(adapter);
711 * igc_ptp_set_ts_config - set hardware time stamping config
712 * @netdev: network interface device structure
713 * @ifr: interface request data
716 int igc_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
718 struct igc_adapter *adapter = netdev_priv(netdev);
719 struct hwtstamp_config config;
722 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
725 err = igc_ptp_set_timestamp_mode(adapter, &config);
729 /* save these settings for future reference */
730 memcpy(&adapter->tstamp_config, &config,
731 sizeof(adapter->tstamp_config));
733 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
738 * igc_ptp_get_ts_config - get hardware time stamping config
739 * @netdev: network interface device structure
740 * @ifr: interface request data
742 * Get the hwtstamp_config settings to return to the user. Rather than attempt
743 * to deconstruct the settings from the registers, just return a shadow copy
744 * of the last known settings.
746 int igc_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
748 struct igc_adapter *adapter = netdev_priv(netdev);
749 struct hwtstamp_config *config = &adapter->tstamp_config;
751 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
756 * igc_ptp_init - Initialize PTP functionality
757 * @adapter: Board private structure
759 * This function is called at device probe to initialize the PTP
762 void igc_ptp_init(struct igc_adapter *adapter)
764 struct net_device *netdev = adapter->netdev;
765 struct igc_hw *hw = &adapter->hw;
768 switch (hw->mac.type) {
770 for (i = 0; i < IGC_N_SDP; i++) {
771 struct ptp_pin_desc *ppd = &adapter->sdp_config[i];
773 snprintf(ppd->name, sizeof(ppd->name), "SDP%d", i);
775 ppd->func = PTP_PF_NONE;
777 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
778 adapter->ptp_caps.owner = THIS_MODULE;
779 adapter->ptp_caps.max_adj = 62499999;
780 adapter->ptp_caps.adjfine = igc_ptp_adjfine_i225;
781 adapter->ptp_caps.adjtime = igc_ptp_adjtime_i225;
782 adapter->ptp_caps.gettimex64 = igc_ptp_gettimex64_i225;
783 adapter->ptp_caps.settime64 = igc_ptp_settime_i225;
784 adapter->ptp_caps.enable = igc_ptp_feature_enable_i225;
785 adapter->ptp_caps.pps = 1;
786 adapter->ptp_caps.pin_config = adapter->sdp_config;
787 adapter->ptp_caps.n_ext_ts = IGC_N_EXTTS;
788 adapter->ptp_caps.n_per_out = IGC_N_PEROUT;
789 adapter->ptp_caps.n_pins = IGC_N_SDP;
790 adapter->ptp_caps.verify = igc_ptp_verify_pin;
793 adapter->ptp_clock = NULL;
797 spin_lock_init(&adapter->tmreg_lock);
798 INIT_WORK(&adapter->ptp_tx_work, igc_ptp_tx_work);
800 adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
801 adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
803 adapter->prev_ptp_time = ktime_to_timespec64(ktime_get_real());
804 adapter->ptp_reset_start = ktime_get();
806 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
807 &adapter->pdev->dev);
808 if (IS_ERR(adapter->ptp_clock)) {
809 adapter->ptp_clock = NULL;
810 netdev_err(netdev, "ptp_clock_register failed\n");
811 } else if (adapter->ptp_clock) {
812 netdev_info(netdev, "PHC added\n");
813 adapter->ptp_flags |= IGC_PTP_ENABLED;
817 static void igc_ptp_time_save(struct igc_adapter *adapter)
819 igc_ptp_read(adapter, &adapter->prev_ptp_time);
820 adapter->ptp_reset_start = ktime_get();
823 static void igc_ptp_time_restore(struct igc_adapter *adapter)
825 struct timespec64 ts = adapter->prev_ptp_time;
828 delta = ktime_sub(ktime_get(), adapter->ptp_reset_start);
830 timespec64_add_ns(&ts, ktime_to_ns(delta));
832 igc_ptp_write_i225(adapter, &ts);
836 * igc_ptp_suspend - Disable PTP work items and prepare for suspend
837 * @adapter: Board private structure
839 * This function stops the overflow check work and PTP Tx timestamp work, and
840 * will prepare the device for OS suspend.
842 void igc_ptp_suspend(struct igc_adapter *adapter)
844 if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
847 cancel_work_sync(&adapter->ptp_tx_work);
848 dev_kfree_skb_any(adapter->ptp_tx_skb);
849 adapter->ptp_tx_skb = NULL;
850 clear_bit_unlock(__IGC_PTP_TX_IN_PROGRESS, &adapter->state);
852 if (pci_device_is_present(adapter->pdev))
853 igc_ptp_time_save(adapter);
857 * igc_ptp_stop - Disable PTP device and stop the overflow check.
858 * @adapter: Board private structure.
860 * This function stops the PTP support and cancels the delayed work.
862 void igc_ptp_stop(struct igc_adapter *adapter)
864 igc_ptp_suspend(adapter);
866 if (adapter->ptp_clock) {
867 ptp_clock_unregister(adapter->ptp_clock);
868 netdev_info(adapter->netdev, "PHC removed\n");
869 adapter->ptp_flags &= ~IGC_PTP_ENABLED;
874 * igc_ptp_reset - Re-enable the adapter for PTP following a reset.
875 * @adapter: Board private structure.
877 * This function handles the reset work required to re-enable the PTP device.
879 void igc_ptp_reset(struct igc_adapter *adapter)
881 struct igc_hw *hw = &adapter->hw;
884 /* reset the tstamp_config */
885 igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
887 spin_lock_irqsave(&adapter->tmreg_lock, flags);
889 switch (adapter->hw.mac.type) {
891 wr32(IGC_TSAUXC, 0x0);
892 wr32(IGC_TSSDP, 0x0);
894 IGC_TSICR_INTERRUPTS |
895 (adapter->pps_sys_wrap_on ? IGC_TSICR_SYS_WRAP : 0));
896 wr32(IGC_IMS, IGC_IMS_TS);
903 /* Re-initialize the timer. */
904 if (hw->mac.type == igc_i225) {
905 igc_ptp_time_restore(adapter);
907 timecounter_init(&adapter->tc, &adapter->cc,
908 ktime_to_ns(ktime_get_real()));
911 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);