drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/pm_runtime.h>
  34 #include <linux/etherdevice.h>
  35 #ifdef CONFIG_IGB_DCA
  36 #include <linux/dca.h>
  37 #endif
  38 #include <linux/i2c.h>
  39 #include "igb.h"
  40
  41 #define MAJ 5
  42 #define MIN 4
  43 #define BUILD 0
  44 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  45 __stringify(BUILD) "-k"
  46
  47 enum queue_mode {
  48         QUEUE_MODE_STRICT_PRIORITY,
  49         QUEUE_MODE_STREAM_RESERVATION,
  50 };
  51
  52 enum tx_queue_prio {
  53         TX_QUEUE_PRIO_HIGH,
  54         TX_QUEUE_PRIO_LOW,
  55 };
  56
  57 char igb_driver_name[] = "igb";
  58 char igb_driver_version[] = DRV_VERSION;
  59 static const char igb_driver_string[] =
  60                                 "Intel(R) Gigabit Ethernet Network Driver";
  61 static const char igb_copyright[] =
  62                                 "Copyright (c) 2007-2014 Intel Corporation.";
  63
  64 static const struct e1000_info *igb_info_tbl[] = {
  65         [board_82575] = &e1000_82575_info,
  66 };
  67
  68 static const struct pci_device_id igb_pci_tbl[] = {
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 104         /* required last entry */
 105         {0, }
 106 };
 107
 108 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 109
 110 static int igb_setup_all_tx_resources(struct igb_adapter *);
 111 static int igb_setup_all_rx_resources(struct igb_adapter *);
 112 static void igb_free_all_tx_resources(struct igb_adapter *);
 113 static void igb_free_all_rx_resources(struct igb_adapter *);
 114 static void igb_setup_mrqc(struct igb_adapter *);
 115 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 116 static void igb_remove(struct pci_dev *pdev);
 117 static int igb_sw_init(struct igb_adapter *);
 118 int igb_open(struct net_device *);
 119 int igb_close(struct net_device *);
 120 static void igb_configure(struct igb_adapter *);
 121 static void igb_configure_tx(struct igb_adapter *);
 122 static void igb_configure_rx(struct igb_adapter *);
 123 static void igb_clean_all_tx_rings(struct igb_adapter *);
 124 static void igb_clean_all_rx_rings(struct igb_adapter *);
 125 static void igb_clean_tx_ring(struct igb_ring *);
 126 static void igb_clean_rx_ring(struct igb_ring *);
 127 static void igb_set_rx_mode(struct net_device *);
 128 static void igb_update_phy_info(struct timer_list *);
 129 static void igb_watchdog(struct timer_list *);
 130 static void igb_watchdog_task(struct work_struct *);
 131 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 132 static void igb_get_stats64(struct net_device *dev,
 133                             struct rtnl_link_stats64 *stats);
 134 static int igb_change_mtu(struct net_device *, int);
 135 static int igb_set_mac(struct net_device *, void *);
 136 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 137 static irqreturn_t igb_intr(int irq, void *);
 138 static irqreturn_t igb_intr_msi(int irq, void *);
 139 static irqreturn_t igb_msix_other(int irq, void *);
 140 static irqreturn_t igb_msix_ring(int irq, void *);
 141 #ifdef CONFIG_IGB_DCA
 142 static void igb_update_dca(struct igb_q_vector *);
 143 static void igb_setup_dca(struct igb_adapter *);
 144 #endif /* CONFIG_IGB_DCA */
 145 static int igb_poll(struct napi_struct *, int);
 146 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 147 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 148 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 149 static void igb_tx_timeout(struct net_device *);
 150 static void igb_reset_task(struct work_struct *);
 151 static void igb_vlan_mode(struct net_device *netdev,
 152                           netdev_features_t features);
 153 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 154 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 155 static void igb_restore_vlan(struct igb_adapter *);
 156 static void igb_rar_set_index(struct igb_adapter *, u32);
 157 static void igb_ping_all_vfs(struct igb_adapter *);
 158 static void igb_msg_task(struct igb_adapter *);
 159 static void igb_vmm_control(struct igb_adapter *);
 160 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 161 static void igb_flush_mac_table(struct igb_adapter *);
 162 static int igb_available_rars(struct igb_adapter *, u8);
 163 static void igb_set_default_mac_filter(struct igb_adapter *);
 164 static int igb_uc_sync(struct net_device *, const unsigned char *);
 165 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 166 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 167 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 168 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 169                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 170 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 171 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 172                                    bool setting);
 173 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 174                                 bool setting);
 175 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 176                                  struct ifla_vf_info *ivi);
 177 static void igb_check_vf_rate_limit(struct igb_adapter *);
 178 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 179 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 180
 181 #ifdef CONFIG_PCI_IOV
 182 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 183 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 184 static int igb_disable_sriov(struct pci_dev *dev);
 185 static int igb_pci_disable_sriov(struct pci_dev *dev);
 186 #endif
 187
 188 static int igb_suspend(struct device *);
 189 static int igb_resume(struct device *);
 190 static int igb_runtime_suspend(struct device *dev);
 191 static int igb_runtime_resume(struct device *dev);
 192 static int igb_runtime_idle(struct device *dev);
 193 static const struct dev_pm_ops igb_pm_ops = {
 194         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 195         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 196                         igb_runtime_idle)
 197 };
 198 static void igb_shutdown(struct pci_dev *);
 199 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 200 #ifdef CONFIG_IGB_DCA
 201 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 202 static struct notifier_block dca_notifier = {
 203         .notifier_call  = igb_notify_dca,
 204         .next           = NULL,
 205         .priority       = 0
 206 };
 207 #endif
 208 #ifdef CONFIG_PCI_IOV
 209 static unsigned int max_vfs;
 210 module_param(max_vfs, uint, 0);
 211 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 212 #endif /* CONFIG_PCI_IOV */
 213
 214 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 215                      pci_channel_state_t);
 216 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 217 static void igb_io_resume(struct pci_dev *);
 218
 219 static const struct pci_error_handlers igb_err_handler = {
 220         .error_detected = igb_io_error_detected,
 221         .slot_reset = igb_io_slot_reset,
 222         .resume = igb_io_resume,
 223 };
 224
 225 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 226
 227 static struct pci_driver igb_driver = {
 228         .name     = igb_driver_name,
 229         .id_table = igb_pci_tbl,
 230         .probe    = igb_probe,
 231         .remove   = igb_remove,
 232 #ifdef CONFIG_PM
 233         .driver.pm = &igb_pm_ops,
 234 #endif
 235         .shutdown = igb_shutdown,
 236         .sriov_configure = igb_pci_sriov_configure,
 237         .err_handler = &igb_err_handler
 238 };
 239
 240 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 241 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 242 MODULE_LICENSE("GPL v2");
 243 MODULE_VERSION(DRV_VERSION);
 244
 245 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 246 static int debug = -1;
 247 module_param(debug, int, 0);
 248 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 249
 250 struct igb_reg_info {
 251         u32 ofs;
 252         char *name;
 253 };
 254
 255 static const struct igb_reg_info igb_reg_info_tbl[] = {
 256
 257         /* General Registers */
 258         {E1000_CTRL, "CTRL"},
 259         {E1000_STATUS, "STATUS"},
 260         {E1000_CTRL_EXT, "CTRL_EXT"},
 261
 262         /* Interrupt Registers */
 263         {E1000_ICR, "ICR"},
 264
 265         /* RX Registers */
 266         {E1000_RCTL, "RCTL"},
 267         {E1000_RDLEN(0), "RDLEN"},
 268         {E1000_RDH(0), "RDH"},
 269         {E1000_RDT(0), "RDT"},
 270         {E1000_RXDCTL(0), "RXDCTL"},
 271         {E1000_RDBAL(0), "RDBAL"},
 272         {E1000_RDBAH(0), "RDBAH"},
 273
 274         /* TX Registers */
 275         {E1000_TCTL, "TCTL"},
 276         {E1000_TDBAL(0), "TDBAL"},
 277         {E1000_TDBAH(0), "TDBAH"},
 278         {E1000_TDLEN(0), "TDLEN"},
 279         {E1000_TDH(0), "TDH"},
 280         {E1000_TDT(0), "TDT"},
 281         {E1000_TXDCTL(0), "TXDCTL"},
 282         {E1000_TDFH, "TDFH"},
 283         {E1000_TDFT, "TDFT"},
 284         {E1000_TDFHS, "TDFHS"},
 285         {E1000_TDFPC, "TDFPC"},
 286
 287         /* List Terminator */
 288         {}
 289 };
 290
 291 /* igb_regdump - register printout routine */
 292 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 293 {
 294         int n = 0;
 295         char rname[16];
 296         u32 regs[8];
 297
 298         switch (reginfo->ofs) {
 299         case E1000_RDLEN(0):
 300                 for (n = 0; n < 4; n++)
 301                         regs[n] = rd32(E1000_RDLEN(n));
 302                 break;
 303         case E1000_RDH(0):
 304                 for (n = 0; n < 4; n++)
 305                         regs[n] = rd32(E1000_RDH(n));
 306                 break;
 307         case E1000_RDT(0):
 308                 for (n = 0; n < 4; n++)
 309                         regs[n] = rd32(E1000_RDT(n));
 310                 break;
 311         case E1000_RXDCTL(0):
 312                 for (n = 0; n < 4; n++)
 313                         regs[n] = rd32(E1000_RXDCTL(n));
 314                 break;
 315         case E1000_RDBAL(0):
 316                 for (n = 0; n < 4; n++)
 317                         regs[n] = rd32(E1000_RDBAL(n));
 318                 break;
 319         case E1000_RDBAH(0):
 320                 for (n = 0; n < 4; n++)
 321                         regs[n] = rd32(E1000_RDBAH(n));
 322                 break;
 323         case E1000_TDBAL(0):
 324                 for (n = 0; n < 4; n++)
 325                         regs[n] = rd32(E1000_RDBAL(n));
 326                 break;
 327         case E1000_TDBAH(0):
 328                 for (n = 0; n < 4; n++)
 329                         regs[n] = rd32(E1000_TDBAH(n));
 330                 break;
 331         case E1000_TDLEN(0):
 332                 for (n = 0; n < 4; n++)
 333                         regs[n] = rd32(E1000_TDLEN(n));
 334                 break;
 335         case E1000_TDH(0):
 336                 for (n = 0; n < 4; n++)
 337                         regs[n] = rd32(E1000_TDH(n));
 338                 break;
 339         case E1000_TDT(0):
 340                 for (n = 0; n < 4; n++)
 341                         regs[n] = rd32(E1000_TDT(n));
 342                 break;
 343         case E1000_TXDCTL(0):
 344                 for (n = 0; n < 4; n++)
 345                         regs[n] = rd32(E1000_TXDCTL(n));
 346                 break;
 347         default:
 348                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 349                 return;
 350         }
 351
 352         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 353         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 354                 regs[2], regs[3]);
 355 }
 356
 357 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 358 static void igb_dump(struct igb_adapter *adapter)
 359 {
 360         struct net_device *netdev = adapter->netdev;
 361         struct e1000_hw *hw = &adapter->hw;
 362         struct igb_reg_info *reginfo;
 363         struct igb_ring *tx_ring;
 364         union e1000_adv_tx_desc *tx_desc;
 365         struct my_u0 { u64 a; u64 b; } *u0;
 366         struct igb_ring *rx_ring;
 367         union e1000_adv_rx_desc *rx_desc;
 368         u32 staterr;
 369         u16 i, n;
 370
 371         if (!netif_msg_hw(adapter))
 372                 return;
 373
 374         /* Print netdevice Info */
 375         if (netdev) {
 376                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 377                 pr_info("Device Name     state            trans_start\n");
 378                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 379                         netdev->state, dev_trans_start(netdev));
 380         }
 381
 382         /* Print Registers */
 383         dev_info(&adapter->pdev->dev, "Register Dump\n");
 384         pr_info(" Register Name   Value\n");
 385         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 386              reginfo->name; reginfo++) {
 387                 igb_regdump(hw, reginfo);
 388         }
 389
 390         /* Print TX Ring Summary */
 391         if (!netdev || !netif_running(netdev))
 392                 goto exit;
 393
 394         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 395         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 396         for (n = 0; n < adapter->num_tx_queues; n++) {
 397                 struct igb_tx_buffer *buffer_info;
 398                 tx_ring = adapter->tx_ring[n];
 399                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 400                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 401                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 402                         (u64)dma_unmap_addr(buffer_info, dma),
 403                         dma_unmap_len(buffer_info, len),
 404                         buffer_info->next_to_watch,
 405                         (u64)buffer_info->time_stamp);
 406         }
 407
 408         /* Print TX Rings */
 409         if (!netif_msg_tx_done(adapter))
 410                 goto rx_ring_summary;
 411
 412         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 413
 414         /* Transmit Descriptor Formats
 415          *
 416          * Advanced Transmit Descriptor
 417          *   +--------------------------------------------------------------+
 418          * 0 |         Buffer Address [63:0]                                |
 419          *   +--------------------------------------------------------------+
 420          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 421          *   +--------------------------------------------------------------+
 422          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 423          */
 424
 425         for (n = 0; n < adapter->num_tx_queues; n++) {
 426                 tx_ring = adapter->tx_ring[n];
 427                 pr_info("------------------------------------\n");
 428                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 429                 pr_info("------------------------------------\n");
 430                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 431
 432                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 433                         const char *next_desc;
 434                         struct igb_tx_buffer *buffer_info;
 435                         tx_desc = IGB_TX_DESC(tx_ring, i);
 436                         buffer_info = &tx_ring->tx_buffer_info[i];
 437                         u0 = (struct my_u0 *)tx_desc;
 438                         if (i == tx_ring->next_to_use &&
 439                             i == tx_ring->next_to_clean)
 440                                 next_desc = " NTC/U";
 441                         else if (i == tx_ring->next_to_use)
 442                                 next_desc = " NTU";
 443                         else if (i == tx_ring->next_to_clean)
 444                                 next_desc = " NTC";
 445                         else
 446                                 next_desc = "";
 447
 448                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 449                                 i, le64_to_cpu(u0->a),
 450                                 le64_to_cpu(u0->b),
 451                                 (u64)dma_unmap_addr(buffer_info, dma),
 452                                 dma_unmap_len(buffer_info, len),
 453                                 buffer_info->next_to_watch,
 454                                 (u64)buffer_info->time_stamp,
 455                                 buffer_info->skb, next_desc);
 456
 457                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 458                                 print_hex_dump(KERN_INFO, "",
 459                                         DUMP_PREFIX_ADDRESS,
 460                                         16, 1, buffer_info->skb->data,
 461                                         dma_unmap_len(buffer_info, len),
 462                                         true);
 463                 }
 464         }
 465
 466         /* Print RX Rings Summary */
 467 rx_ring_summary:
 468         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 469         pr_info("Queue [NTU] [NTC]\n");
 470         for (n = 0; n < adapter->num_rx_queues; n++) {
 471                 rx_ring = adapter->rx_ring[n];
 472                 pr_info(" %5d %5X %5X\n",
 473                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 474         }
 475
 476         /* Print RX Rings */
 477         if (!netif_msg_rx_status(adapter))
 478                 goto exit;
 479
 480         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 481
 482         /* Advanced Receive Descriptor (Read) Format
 483          *    63                                           1        0
 484          *    +-----------------------------------------------------+
 485          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 486          *    +----------------------------------------------+------+
 487          *  8 |       Header Buffer Address [63:1]           |  DD  |
 488          *    +-----------------------------------------------------+
 489          *
 490          *
 491          * Advanced Receive Descriptor (Write-Back) Format
 492          *
 493          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 494          *   +------------------------------------------------------+
 495          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 496          *   | Checksum   Ident  |   |           |    | Type | Type |
 497          *   +------------------------------------------------------+
 498          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 499          *   +------------------------------------------------------+
 500          *   63       48 47    32 31            20 19               0
 501          */
 502
 503         for (n = 0; n < adapter->num_rx_queues; n++) {
 504                 rx_ring = adapter->rx_ring[n];
 505                 pr_info("------------------------------------\n");
 506                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 507                 pr_info("------------------------------------\n");
 508                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 509                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 510
 511                 for (i = 0; i < rx_ring->count; i++) {
 512                         const char *next_desc;
 513                         struct igb_rx_buffer *buffer_info;
 514                         buffer_info = &rx_ring->rx_buffer_info[i];
 515                         rx_desc = IGB_RX_DESC(rx_ring, i);
 516                         u0 = (struct my_u0 *)rx_desc;
 517                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 518
 519                         if (i == rx_ring->next_to_use)
 520                                 next_desc = " NTU";
 521                         else if (i == rx_ring->next_to_clean)
 522                                 next_desc = " NTC";
 523                         else
 524                                 next_desc = "";
 525
 526                         if (staterr & E1000_RXD_STAT_DD) {
 527                                 /* Descriptor Done */
 528                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 529                                         "RWB", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         next_desc);
 533                         } else {
 534                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 535                                         "R  ", i,
 536                                         le64_to_cpu(u0->a),
 537                                         le64_to_cpu(u0->b),
 538                                         (u64)buffer_info->dma,
 539                                         next_desc);
 540
 541                                 if (netif_msg_pktdata(adapter) &&
 542                                     buffer_info->dma && buffer_info->page) {
 543                                         print_hex_dump(KERN_INFO, "",
 544                                           DUMP_PREFIX_ADDRESS,
 545                                           16, 1,
 546                                           page_address(buffer_info->page) +
 547                                                       buffer_info->page_offset,
 548                                           igb_rx_bufsz(rx_ring), true);
 549                                 }
 550                         }
 551                 }
 552         }
 553
 554 exit:
 555         return;
 556 }
 557
 558 /**
 559  *  igb_get_i2c_data - Reads the I2C SDA data bit
 560  *  @hw: pointer to hardware structure
 561  *  @i2cctl: Current value of I2CCTL register
 562  *
 563  *  Returns the I2C data bit value
 564  **/
 565 static int igb_get_i2c_data(void *data)
 566 {
 567         struct igb_adapter *adapter = (struct igb_adapter *)data;
 568         struct e1000_hw *hw = &adapter->hw;
 569         s32 i2cctl = rd32(E1000_I2CPARAMS);
 570
 571         return !!(i2cctl & E1000_I2C_DATA_IN);
 572 }
 573
 574 /**
 575  *  igb_set_i2c_data - Sets the I2C data bit
 576  *  @data: pointer to hardware structure
 577  *  @state: I2C data value (0 or 1) to set
 578  *
 579  *  Sets the I2C data bit
 580  **/
 581 static void igb_set_i2c_data(void *data, int state)
 582 {
 583         struct igb_adapter *adapter = (struct igb_adapter *)data;
 584         struct e1000_hw *hw = &adapter->hw;
 585         s32 i2cctl = rd32(E1000_I2CPARAMS);
 586
 587         if (state)
 588                 i2cctl |= E1000_I2C_DATA_OUT;
 589         else
 590                 i2cctl &= ~E1000_I2C_DATA_OUT;
 591
 592         i2cctl &= ~E1000_I2C_DATA_OE_N;
 593         i2cctl |= E1000_I2C_CLK_OE_N;
 594         wr32(E1000_I2CPARAMS, i2cctl);
 595         wrfl();
 596
 597 }
 598
 599 /**
 600  *  igb_set_i2c_clk - Sets the I2C SCL clock
 601  *  @data: pointer to hardware structure
 602  *  @state: state to set clock
 603  *
 604  *  Sets the I2C clock line to state
 605  **/
 606 static void igb_set_i2c_clk(void *data, int state)
 607 {
 608         struct igb_adapter *adapter = (struct igb_adapter *)data;
 609         struct e1000_hw *hw = &adapter->hw;
 610         s32 i2cctl = rd32(E1000_I2CPARAMS);
 611
 612         if (state) {
 613                 i2cctl |= E1000_I2C_CLK_OUT;
 614                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 615         } else {
 616                 i2cctl &= ~E1000_I2C_CLK_OUT;
 617                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 618         }
 619         wr32(E1000_I2CPARAMS, i2cctl);
 620         wrfl();
 621 }
 622
 623 /**
 624  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 625  *  @data: pointer to hardware structure
 626  *
 627  *  Gets the I2C clock state
 628  **/
 629 static int igb_get_i2c_clk(void *data)
 630 {
 631         struct igb_adapter *adapter = (struct igb_adapter *)data;
 632         struct e1000_hw *hw = &adapter->hw;
 633         s32 i2cctl = rd32(E1000_I2CPARAMS);
 634
 635         return !!(i2cctl & E1000_I2C_CLK_IN);
 636 }
 637
 638 static const struct i2c_algo_bit_data igb_i2c_algo = {
 639         .setsda         = igb_set_i2c_data,
 640         .setscl         = igb_set_i2c_clk,
 641         .getsda         = igb_get_i2c_data,
 642         .getscl         = igb_get_i2c_clk,
 643         .udelay         = 5,
 644         .timeout        = 20,
 645 };
 646
 647 /**
 648  *  igb_get_hw_dev - return device
 649  *  @hw: pointer to hardware structure
 650  *
 651  *  used by hardware layer to print debugging information
 652  **/
 653 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 654 {
 655         struct igb_adapter *adapter = hw->back;
 656         return adapter->netdev;
 657 }
 658
 659 /**
 660  *  igb_init_module - Driver Registration Routine
 661  *
 662  *  igb_init_module is the first routine called when the driver is
 663  *  loaded. All it does is register with the PCI subsystem.
 664  **/
 665 static int __init igb_init_module(void)
 666 {
 667         int ret;
 668
 669         pr_info("%s - version %s\n",
 670                igb_driver_string, igb_driver_version);
 671         pr_info("%s\n", igb_copyright);
 672
 673 #ifdef CONFIG_IGB_DCA
 674         dca_register_notify(&dca_notifier);
 675 #endif
 676         ret = pci_register_driver(&igb_driver);
 677         return ret;
 678 }
 679
 680 module_init(igb_init_module);
 681
 682 /**
 683  *  igb_exit_module - Driver Exit Cleanup Routine
 684  *
 685  *  igb_exit_module is called just before the driver is removed
 686  *  from memory.
 687  **/
 688 static void __exit igb_exit_module(void)
 689 {
 690 #ifdef CONFIG_IGB_DCA
 691         dca_unregister_notify(&dca_notifier);
 692 #endif
 693         pci_unregister_driver(&igb_driver);
 694 }
 695
 696 module_exit(igb_exit_module);
 697
 698 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 699 /**
 700  *  igb_cache_ring_register - Descriptor ring to register mapping
 701  *  @adapter: board private structure to initialize
 702  *
 703  *  Once we know the feature-set enabled for the device, we'll cache
 704  *  the register offset the descriptor ring is assigned to.
 705  **/
 706 static void igb_cache_ring_register(struct igb_adapter *adapter)
 707 {
 708         int i = 0, j = 0;
 709         u32 rbase_offset = adapter->vfs_allocated_count;
 710
 711         switch (adapter->hw.mac.type) {
 712         case e1000_82576:
 713                 /* The queues are allocated for virtualization such that VF 0
 714                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 715                  * In order to avoid collision we start at the first free queue
 716                  * and continue consuming queues in the same sequence
 717                  */
 718                 if (adapter->vfs_allocated_count) {
 719                         for (; i < adapter->rss_queues; i++)
 720                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 721                                                                Q_IDX_82576(i);
 722                 }
 723                 /* Fall through */
 724         case e1000_82575:
 725         case e1000_82580:
 726         case e1000_i350:
 727         case e1000_i354:
 728         case e1000_i210:
 729         case e1000_i211:
 730                 /* Fall through */
 731         default:
 732                 for (; i < adapter->num_rx_queues; i++)
 733                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 734                 for (; j < adapter->num_tx_queues; j++)
 735                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 736                 break;
 737         }
 738 }
 739
 740 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 741 {
 742         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 743         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 744         u32 value = 0;
 745
 746         if (E1000_REMOVED(hw_addr))
 747                 return ~value;
 748
 749         value = readl(&hw_addr[reg]);
 750
 751         /* reads should not return all F's */
 752         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 753                 struct net_device *netdev = igb->netdev;
 754                 hw->hw_addr = NULL;
 755                 netdev_err(netdev, "PCIe link lost\n");
 756         }
 757
 758         return value;
 759 }
 760
 761 /**
 762  *  igb_write_ivar - configure ivar for given MSI-X vector
 763  *  @hw: pointer to the HW structure
 764  *  @msix_vector: vector number we are allocating to a given ring
 765  *  @index: row index of IVAR register to write within IVAR table
 766  *  @offset: column offset of in IVAR, should be multiple of 8
 767  *
 768  *  This function is intended to handle the writing of the IVAR register
 769  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 770  *  each containing an cause allocation for an Rx and Tx ring, and a
 771  *  variable number of rows depending on the number of queues supported.
 772  **/
 773 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 774                            int index, int offset)
 775 {
 776         u32 ivar = array_rd32(E1000_IVAR0, index);
 777
 778         /* clear any bits that are currently set */
 779         ivar &= ~((u32)0xFF << offset);
 780
 781         /* write vector and valid bit */
 782         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 783
 784         array_wr32(E1000_IVAR0, index, ivar);
 785 }
 786
 787 #define IGB_N0_QUEUE -1
 788 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 789 {
 790         struct igb_adapter *adapter = q_vector->adapter;
 791         struct e1000_hw *hw = &adapter->hw;
 792         int rx_queue = IGB_N0_QUEUE;
 793         int tx_queue = IGB_N0_QUEUE;
 794         u32 msixbm = 0;
 795
 796         if (q_vector->rx.ring)
 797                 rx_queue = q_vector->rx.ring->reg_idx;
 798         if (q_vector->tx.ring)
 799                 tx_queue = q_vector->tx.ring->reg_idx;
 800
 801         switch (hw->mac.type) {
 802         case e1000_82575:
 803                 /* The 82575 assigns vectors using a bitmask, which matches the
 804                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 805                  * or more queues to a vector, we write the appropriate bits
 806                  * into the MSIXBM register for that vector.
 807                  */
 808                 if (rx_queue > IGB_N0_QUEUE)
 809                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 810                 if (tx_queue > IGB_N0_QUEUE)
 811                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 812                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 813                         msixbm |= E1000_EIMS_OTHER;
 814                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 815                 q_vector->eims_value = msixbm;
 816                 break;
 817         case e1000_82576:
 818                 /* 82576 uses a table that essentially consists of 2 columns
 819                  * with 8 rows.  The ordering is column-major so we use the
 820                  * lower 3 bits as the row index, and the 4th bit as the
 821                  * column offset.
 822                  */
 823                 if (rx_queue > IGB_N0_QUEUE)
 824                         igb_write_ivar(hw, msix_vector,
 825                                        rx_queue & 0x7,
 826                                        (rx_queue & 0x8) << 1);
 827                 if (tx_queue > IGB_N0_QUEUE)
 828                         igb_write_ivar(hw, msix_vector,
 829                                        tx_queue & 0x7,
 830                                        ((tx_queue & 0x8) << 1) + 8);
 831                 q_vector->eims_value = BIT(msix_vector);
 832                 break;
 833         case e1000_82580:
 834         case e1000_i350:
 835         case e1000_i354:
 836         case e1000_i210:
 837         case e1000_i211:
 838                 /* On 82580 and newer adapters the scheme is similar to 82576
 839                  * however instead of ordering column-major we have things
 840                  * ordered row-major.  So we traverse the table by using
 841                  * bit 0 as the column offset, and the remaining bits as the
 842                  * row index.
 843                  */
 844                 if (rx_queue > IGB_N0_QUEUE)
 845                         igb_write_ivar(hw, msix_vector,
 846                                        rx_queue >> 1,
 847                                        (rx_queue & 0x1) << 4);
 848                 if (tx_queue > IGB_N0_QUEUE)
 849                         igb_write_ivar(hw, msix_vector,
 850                                        tx_queue >> 1,
 851                                        ((tx_queue & 0x1) << 4) + 8);
 852                 q_vector->eims_value = BIT(msix_vector);
 853                 break;
 854         default:
 855                 BUG();
 856                 break;
 857         }
 858
 859         /* add q_vector eims value to global eims_enable_mask */
 860         adapter->eims_enable_mask |= q_vector->eims_value;
 861
 862         /* configure q_vector to set itr on first interrupt */
 863         q_vector->set_itr = 1;
 864 }
 865
 866 /**
 867  *  igb_configure_msix - Configure MSI-X hardware
 868  *  @adapter: board private structure to initialize
 869  *
 870  *  igb_configure_msix sets up the hardware to properly
 871  *  generate MSI-X interrupts.
 872  **/
 873 static void igb_configure_msix(struct igb_adapter *adapter)
 874 {
 875         u32 tmp;
 876         int i, vector = 0;
 877         struct e1000_hw *hw = &adapter->hw;
 878
 879         adapter->eims_enable_mask = 0;
 880
 881         /* set vector for other causes, i.e. link changes */
 882         switch (hw->mac.type) {
 883         case e1000_82575:
 884                 tmp = rd32(E1000_CTRL_EXT);
 885                 /* enable MSI-X PBA support*/
 886                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 887
 888                 /* Auto-Mask interrupts upon ICR read. */
 889                 tmp |= E1000_CTRL_EXT_EIAME;
 890                 tmp |= E1000_CTRL_EXT_IRCA;
 891
 892                 wr32(E1000_CTRL_EXT, tmp);
 893
 894                 /* enable msix_other interrupt */
 895                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 896                 adapter->eims_other = E1000_EIMS_OTHER;
 897
 898                 break;
 899
 900         case e1000_82576:
 901         case e1000_82580:
 902         case e1000_i350:
 903         case e1000_i354:
 904         case e1000_i210:
 905         case e1000_i211:
 906                 /* Turn on MSI-X capability first, or our settings
 907                  * won't stick.  And it will take days to debug.
 908                  */
 909                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 910                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 911                      E1000_GPIE_NSICR);
 912
 913                 /* enable msix_other interrupt */
 914                 adapter->eims_other = BIT(vector);
 915                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 916
 917                 wr32(E1000_IVAR_MISC, tmp);
 918                 break;
 919         default:
 920                 /* do nothing, since nothing else supports MSI-X */
 921                 break;
 922         } /* switch (hw->mac.type) */
 923
 924         adapter->eims_enable_mask |= adapter->eims_other;
 925
 926         for (i = 0; i < adapter->num_q_vectors; i++)
 927                 igb_assign_vector(adapter->q_vector[i], vector++);
 928
 929         wrfl();
 930 }
 931
 932 /**
 933  *  igb_request_msix - Initialize MSI-X interrupts
 934  *  @adapter: board private structure to initialize
 935  *
 936  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 937  *  kernel.
 938  **/
 939 static int igb_request_msix(struct igb_adapter *adapter)
 940 {
 941         struct net_device *netdev = adapter->netdev;
 942         int i, err = 0, vector = 0, free_vector = 0;
 943
 944         err = request_irq(adapter->msix_entries[vector].vector,
 945                           igb_msix_other, 0, netdev->name, adapter);
 946         if (err)
 947                 goto err_out;
 948
 949         for (i = 0; i < adapter->num_q_vectors; i++) {
 950                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 951
 952                 vector++;
 953
 954                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 955
 956                 if (q_vector->rx.ring && q_vector->tx.ring)
 957                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 958                                 q_vector->rx.ring->queue_index);
 959                 else if (q_vector->tx.ring)
 960                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 961                                 q_vector->tx.ring->queue_index);
 962                 else if (q_vector->rx.ring)
 963                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 964                                 q_vector->rx.ring->queue_index);
 965                 else
 966                         sprintf(q_vector->name, "%s-unused", netdev->name);
 967
 968                 err = request_irq(adapter->msix_entries[vector].vector,
 969                                   igb_msix_ring, 0, q_vector->name,
 970                                   q_vector);
 971                 if (err)
 972                         goto err_free;
 973         }
 974
 975         igb_configure_msix(adapter);
 976         return 0;
 977
 978 err_free:
 979         /* free already assigned IRQs */
 980         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 981
 982         vector--;
 983         for (i = 0; i < vector; i++) {
 984                 free_irq(adapter->msix_entries[free_vector++].vector,
 985                          adapter->q_vector[i]);
 986         }
 987 err_out:
 988         return err;
 989 }
 990
 991 /**
 992  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 993  *  @adapter: board private structure to initialize
 994  *  @v_idx: Index of vector to be freed
 995  *
 996  *  This function frees the memory allocated to the q_vector.
 997  **/
 998 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 999 {
1000         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1001
1002         adapter->q_vector[v_idx] = NULL;
1003
1004         /* igb_get_stats64() might access the rings on this vector,
1005          * we must wait a grace period before freeing it.
1006          */
1007         if (q_vector)
1008                 kfree_rcu(q_vector, rcu);
1009 }
1010
1011 /**
1012  *  igb_reset_q_vector - Reset config for interrupt vector
1013  *  @adapter: board private structure to initialize
1014  *  @v_idx: Index of vector to be reset
1015  *
1016  *  If NAPI is enabled it will delete any references to the
1017  *  NAPI struct. This is preparation for igb_free_q_vector.
1018  **/
1019 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1020 {
1021         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1022
1023         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1024          * allocated. So, q_vector is NULL so we should stop here.
1025          */
1026         if (!q_vector)
1027                 return;
1028
1029         if (q_vector->tx.ring)
1030                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1031
1032         if (q_vector->rx.ring)
1033                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1034
1035         netif_napi_del(&q_vector->napi);
1036
1037 }
1038
1039 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1040 {
1041         int v_idx = adapter->num_q_vectors;
1042
1043         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1044                 pci_disable_msix(adapter->pdev);
1045         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1046                 pci_disable_msi(adapter->pdev);
1047
1048         while (v_idx--)
1049                 igb_reset_q_vector(adapter, v_idx);
1050 }
1051
1052 /**
1053  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1054  *  @adapter: board private structure to initialize
1055  *
1056  *  This function frees the memory allocated to the q_vectors.  In addition if
1057  *  NAPI is enabled it will delete any references to the NAPI struct prior
1058  *  to freeing the q_vector.
1059  **/
1060 static void igb_free_q_vectors(struct igb_adapter *adapter)
1061 {
1062         int v_idx = adapter->num_q_vectors;
1063
1064         adapter->num_tx_queues = 0;
1065         adapter->num_rx_queues = 0;
1066         adapter->num_q_vectors = 0;
1067
1068         while (v_idx--) {
1069                 igb_reset_q_vector(adapter, v_idx);
1070                 igb_free_q_vector(adapter, v_idx);
1071         }
1072 }
1073
1074 /**
1075  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1076  *  @adapter: board private structure to initialize
1077  *
1078  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1079  *  MSI-X interrupts allocated.
1080  */
1081 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1082 {
1083         igb_free_q_vectors(adapter);
1084         igb_reset_interrupt_capability(adapter);
1085 }
1086
1087 /**
1088  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1089  *  @adapter: board private structure to initialize
1090  *  @msix: boolean value of MSIX capability
1091  *
1092  *  Attempt to configure interrupts using the best available
1093  *  capabilities of the hardware and kernel.
1094  **/
1095 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1096 {
1097         int err;
1098         int numvecs, i;
1099
1100         if (!msix)
1101                 goto msi_only;
1102         adapter->flags |= IGB_FLAG_HAS_MSIX;
1103
1104         /* Number of supported queues. */
1105         adapter->num_rx_queues = adapter->rss_queues;
1106         if (adapter->vfs_allocated_count)
1107                 adapter->num_tx_queues = 1;
1108         else
1109                 adapter->num_tx_queues = adapter->rss_queues;
1110
1111         /* start with one vector for every Rx queue */
1112         numvecs = adapter->num_rx_queues;
1113
1114         /* if Tx handler is separate add 1 for every Tx queue */
1115         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1116                 numvecs += adapter->num_tx_queues;
1117
1118         /* store the number of vectors reserved for queues */
1119         adapter->num_q_vectors = numvecs;
1120
1121         /* add 1 vector for link status interrupts */
1122         numvecs++;
1123         for (i = 0; i < numvecs; i++)
1124                 adapter->msix_entries[i].entry = i;
1125
1126         err = pci_enable_msix_range(adapter->pdev,
1127                                     adapter->msix_entries,
1128                                     numvecs,
1129                                     numvecs);
1130         if (err > 0)
1131                 return;
1132
1133         igb_reset_interrupt_capability(adapter);
1134
1135         /* If we can't do MSI-X, try MSI */
1136 msi_only:
1137         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1138 #ifdef CONFIG_PCI_IOV
1139         /* disable SR-IOV for non MSI-X configurations */
1140         if (adapter->vf_data) {
1141                 struct e1000_hw *hw = &adapter->hw;
1142                 /* disable iov and allow time for transactions to clear */
1143                 pci_disable_sriov(adapter->pdev);
1144                 msleep(500);
1145
1146                 kfree(adapter->vf_mac_list);
1147                 adapter->vf_mac_list = NULL;
1148                 kfree(adapter->vf_data);
1149                 adapter->vf_data = NULL;
1150                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1151                 wrfl();
1152                 msleep(100);
1153                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1154         }
1155 #endif
1156         adapter->vfs_allocated_count = 0;
1157         adapter->rss_queues = 1;
1158         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1159         adapter->num_rx_queues = 1;
1160         adapter->num_tx_queues = 1;
1161         adapter->num_q_vectors = 1;
1162         if (!pci_enable_msi(adapter->pdev))
1163                 adapter->flags |= IGB_FLAG_HAS_MSI;
1164 }
1165
1166 static void igb_add_ring(struct igb_ring *ring,
1167                          struct igb_ring_container *head)
1168 {
1169         head->ring = ring;
1170         head->count++;
1171 }
1172
1173 /**
1174  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1175  *  @adapter: board private structure to initialize
1176  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1177  *  @v_idx: index of vector in adapter struct
1178  *  @txr_count: total number of Tx rings to allocate
1179  *  @txr_idx: index of first Tx ring to allocate
1180  *  @rxr_count: total number of Rx rings to allocate
1181  *  @rxr_idx: index of first Rx ring to allocate
1182  *
1183  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1184  **/
1185 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1186                               int v_count, int v_idx,
1187                               int txr_count, int txr_idx,
1188                               int rxr_count, int rxr_idx)
1189 {
1190         struct igb_q_vector *q_vector;
1191         struct igb_ring *ring;
1192         int ring_count, size;
1193
1194         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1195         if (txr_count > 1 || rxr_count > 1)
1196                 return -ENOMEM;
1197
1198         ring_count = txr_count + rxr_count;
1199         size = sizeof(struct igb_q_vector) +
1200                (sizeof(struct igb_ring) * ring_count);
1201
1202         /* allocate q_vector and rings */
1203         q_vector = adapter->q_vector[v_idx];
1204         if (!q_vector) {
1205                 q_vector = kzalloc(size, GFP_KERNEL);
1206         } else if (size > ksize(q_vector)) {
1207                 kfree_rcu(q_vector, rcu);
1208                 q_vector = kzalloc(size, GFP_KERNEL);
1209         } else {
1210                 memset(q_vector, 0, size);
1211         }
1212         if (!q_vector)
1213                 return -ENOMEM;
1214
1215         /* initialize NAPI */
1216         netif_napi_add(adapter->netdev, &q_vector->napi,
1217                        igb_poll, 64);
1218
1219         /* tie q_vector and adapter together */
1220         adapter->q_vector[v_idx] = q_vector;
1221         q_vector->adapter = adapter;
1222
1223         /* initialize work limits */
1224         q_vector->tx.work_limit = adapter->tx_work_limit;
1225
1226         /* initialize ITR configuration */
1227         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1228         q_vector->itr_val = IGB_START_ITR;
1229
1230         /* initialize pointer to rings */
1231         ring = q_vector->ring;
1232
1233         /* intialize ITR */
1234         if (rxr_count) {
1235                 /* rx or rx/tx vector */
1236                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1237                         q_vector->itr_val = adapter->rx_itr_setting;
1238         } else {
1239                 /* tx only vector */
1240                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1241                         q_vector->itr_val = adapter->tx_itr_setting;
1242         }
1243
1244         if (txr_count) {
1245                 /* assign generic ring traits */
1246                 ring->dev = &adapter->pdev->dev;
1247                 ring->netdev = adapter->netdev;
1248
1249                 /* configure backlink on ring */
1250                 ring->q_vector = q_vector;
1251
1252                 /* update q_vector Tx values */
1253                 igb_add_ring(ring, &q_vector->tx);
1254
1255                 /* For 82575, context index must be unique per ring. */
1256                 if (adapter->hw.mac.type == e1000_82575)
1257                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1258
1259                 /* apply Tx specific ring traits */
1260                 ring->count = adapter->tx_ring_count;
1261                 ring->queue_index = txr_idx;
1262
1263                 ring->cbs_enable = false;
1264                 ring->idleslope = 0;
1265                 ring->sendslope = 0;
1266                 ring->hicredit = 0;
1267                 ring->locredit = 0;
1268
1269                 u64_stats_init(&ring->tx_syncp);
1270                 u64_stats_init(&ring->tx_syncp2);
1271
1272                 /* assign ring to adapter */
1273                 adapter->tx_ring[txr_idx] = ring;
1274
1275                 /* push pointer to next ring */
1276                 ring++;
1277         }
1278
1279         if (rxr_count) {
1280                 /* assign generic ring traits */
1281                 ring->dev = &adapter->pdev->dev;
1282                 ring->netdev = adapter->netdev;
1283
1284                 /* configure backlink on ring */
1285                 ring->q_vector = q_vector;
1286
1287                 /* update q_vector Rx values */
1288                 igb_add_ring(ring, &q_vector->rx);
1289
1290                 /* set flag indicating ring supports SCTP checksum offload */
1291                 if (adapter->hw.mac.type >= e1000_82576)
1292                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1293
1294                 /* On i350, i354, i210, and i211, loopback VLAN packets
1295                  * have the tag byte-swapped.
1296                  */
1297                 if (adapter->hw.mac.type >= e1000_i350)
1298                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1299
1300                 /* apply Rx specific ring traits */
1301                 ring->count = adapter->rx_ring_count;
1302                 ring->queue_index = rxr_idx;
1303
1304                 u64_stats_init(&ring->rx_syncp);
1305
1306                 /* assign ring to adapter */
1307                 adapter->rx_ring[rxr_idx] = ring;
1308         }
1309
1310         return 0;
1311 }
1312
1313
1314 /**
1315  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1316  *  @adapter: board private structure to initialize
1317  *
1318  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1319  *  return -ENOMEM.
1320  **/
1321 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1322 {
1323         int q_vectors = adapter->num_q_vectors;
1324         int rxr_remaining = adapter->num_rx_queues;
1325         int txr_remaining = adapter->num_tx_queues;
1326         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1327         int err;
1328
1329         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1330                 for (; rxr_remaining; v_idx++) {
1331                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1332                                                  0, 0, 1, rxr_idx);
1333
1334                         if (err)
1335                                 goto err_out;
1336
1337                         /* update counts and index */
1338                         rxr_remaining--;
1339                         rxr_idx++;
1340                 }
1341         }
1342
1343         for (; v_idx < q_vectors; v_idx++) {
1344                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1345                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1346
1347                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1348                                          tqpv, txr_idx, rqpv, rxr_idx);
1349
1350                 if (err)
1351                         goto err_out;
1352
1353                 /* update counts and index */
1354                 rxr_remaining -= rqpv;
1355                 txr_remaining -= tqpv;
1356                 rxr_idx++;
1357                 txr_idx++;
1358         }
1359
1360         return 0;
1361
1362 err_out:
1363         adapter->num_tx_queues = 0;
1364         adapter->num_rx_queues = 0;
1365         adapter->num_q_vectors = 0;
1366
1367         while (v_idx--)
1368                 igb_free_q_vector(adapter, v_idx);
1369
1370         return -ENOMEM;
1371 }
1372
1373 /**
1374  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1375  *  @adapter: board private structure to initialize
1376  *  @msix: boolean value of MSIX capability
1377  *
1378  *  This function initializes the interrupts and allocates all of the queues.
1379  **/
1380 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1381 {
1382         struct pci_dev *pdev = adapter->pdev;
1383         int err;
1384
1385         igb_set_interrupt_capability(adapter, msix);
1386
1387         err = igb_alloc_q_vectors(adapter);
1388         if (err) {
1389                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1390                 goto err_alloc_q_vectors;
1391         }
1392
1393         igb_cache_ring_register(adapter);
1394
1395         return 0;
1396
1397 err_alloc_q_vectors:
1398         igb_reset_interrupt_capability(adapter);
1399         return err;
1400 }
1401
1402 /**
1403  *  igb_request_irq - initialize interrupts
1404  *  @adapter: board private structure to initialize
1405  *
1406  *  Attempts to configure interrupts using the best available
1407  *  capabilities of the hardware and kernel.
1408  **/
1409 static int igb_request_irq(struct igb_adapter *adapter)
1410 {
1411         struct net_device *netdev = adapter->netdev;
1412         struct pci_dev *pdev = adapter->pdev;
1413         int err = 0;
1414
1415         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1416                 err = igb_request_msix(adapter);
1417                 if (!err)
1418                         goto request_done;
1419                 /* fall back to MSI */
1420                 igb_free_all_tx_resources(adapter);
1421                 igb_free_all_rx_resources(adapter);
1422
1423                 igb_clear_interrupt_scheme(adapter);
1424                 err = igb_init_interrupt_scheme(adapter, false);
1425                 if (err)
1426                         goto request_done;
1427
1428                 igb_setup_all_tx_resources(adapter);
1429                 igb_setup_all_rx_resources(adapter);
1430                 igb_configure(adapter);
1431         }
1432
1433         igb_assign_vector(adapter->q_vector[0], 0);
1434
1435         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1436                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1437                                   netdev->name, adapter);
1438                 if (!err)
1439                         goto request_done;
1440
1441                 /* fall back to legacy interrupts */
1442                 igb_reset_interrupt_capability(adapter);
1443                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1444         }
1445
1446         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1447                           netdev->name, adapter);
1448
1449         if (err)
1450                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1451                         err);
1452
1453 request_done:
1454         return err;
1455 }
1456
1457 static void igb_free_irq(struct igb_adapter *adapter)
1458 {
1459         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1460                 int vector = 0, i;
1461
1462                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1463
1464                 for (i = 0; i < adapter->num_q_vectors; i++)
1465                         free_irq(adapter->msix_entries[vector++].vector,
1466                                  adapter->q_vector[i]);
1467         } else {
1468                 free_irq(adapter->pdev->irq, adapter);
1469         }
1470 }
1471
1472 /**
1473  *  igb_irq_disable - Mask off interrupt generation on the NIC
1474  *  @adapter: board private structure
1475  **/
1476 static void igb_irq_disable(struct igb_adapter *adapter)
1477 {
1478         struct e1000_hw *hw = &adapter->hw;
1479
1480         /* we need to be careful when disabling interrupts.  The VFs are also
1481          * mapped into these registers and so clearing the bits can cause
1482          * issues on the VF drivers so we only need to clear what we set
1483          */
1484         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1485                 u32 regval = rd32(E1000_EIAM);
1486
1487                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1488                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1489                 regval = rd32(E1000_EIAC);
1490                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1491         }
1492
1493         wr32(E1000_IAM, 0);
1494         wr32(E1000_IMC, ~0);
1495         wrfl();
1496         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1497                 int i;
1498
1499                 for (i = 0; i < adapter->num_q_vectors; i++)
1500                         synchronize_irq(adapter->msix_entries[i].vector);
1501         } else {
1502                 synchronize_irq(adapter->pdev->irq);
1503         }
1504 }
1505
1506 /**
1507  *  igb_irq_enable - Enable default interrupt generation settings
1508  *  @adapter: board private structure
1509  **/
1510 static void igb_irq_enable(struct igb_adapter *adapter)
1511 {
1512         struct e1000_hw *hw = &adapter->hw;
1513
1514         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1515                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1516                 u32 regval = rd32(E1000_EIAC);
1517
1518                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1519                 regval = rd32(E1000_EIAM);
1520                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1521                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1522                 if (adapter->vfs_allocated_count) {
1523                         wr32(E1000_MBVFIMR, 0xFF);
1524                         ims |= E1000_IMS_VMMB;
1525                 }
1526                 wr32(E1000_IMS, ims);
1527         } else {
1528                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1529                                 E1000_IMS_DRSTA);
1530                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1531                                 E1000_IMS_DRSTA);
1532         }
1533 }
1534
1535 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1536 {
1537         struct e1000_hw *hw = &adapter->hw;
1538         u16 pf_id = adapter->vfs_allocated_count;
1539         u16 vid = adapter->hw.mng_cookie.vlan_id;
1540         u16 old_vid = adapter->mng_vlan_id;
1541
1542         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1543                 /* add VID to filter table */
1544                 igb_vfta_set(hw, vid, pf_id, true, true);
1545                 adapter->mng_vlan_id = vid;
1546         } else {
1547                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1548         }
1549
1550         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1551             (vid != old_vid) &&
1552             !test_bit(old_vid, adapter->active_vlans)) {
1553                 /* remove VID from filter table */
1554                 igb_vfta_set(hw, vid, pf_id, false, true);
1555         }
1556 }
1557
1558 /**
1559  *  igb_release_hw_control - release control of the h/w to f/w
1560  *  @adapter: address of board private structure
1561  *
1562  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1563  *  For ASF and Pass Through versions of f/w this means that the
1564  *  driver is no longer loaded.
1565  **/
1566 static void igb_release_hw_control(struct igb_adapter *adapter)
1567 {
1568         struct e1000_hw *hw = &adapter->hw;
1569         u32 ctrl_ext;
1570
1571         /* Let firmware take over control of h/w */
1572         ctrl_ext = rd32(E1000_CTRL_EXT);
1573         wr32(E1000_CTRL_EXT,
1574                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1575 }
1576
1577 /**
1578  *  igb_get_hw_control - get control of the h/w from f/w
1579  *  @adapter: address of board private structure
1580  *
1581  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1582  *  For ASF and Pass Through versions of f/w this means that
1583  *  the driver is loaded.
1584  **/
1585 static void igb_get_hw_control(struct igb_adapter *adapter)
1586 {
1587         struct e1000_hw *hw = &adapter->hw;
1588         u32 ctrl_ext;
1589
1590         /* Let firmware know the driver has taken over */
1591         ctrl_ext = rd32(E1000_CTRL_EXT);
1592         wr32(E1000_CTRL_EXT,
1593                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1594 }
1595
1596 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1597 {
1598         struct net_device *netdev = adapter->netdev;
1599         struct e1000_hw *hw = &adapter->hw;
1600
1601         WARN_ON(hw->mac.type != e1000_i210);
1602
1603         if (enable)
1604                 adapter->flags |= IGB_FLAG_FQTSS;
1605         else
1606                 adapter->flags &= ~IGB_FLAG_FQTSS;
1607
1608         if (netif_running(netdev))
1609                 schedule_work(&adapter->reset_task);
1610 }
1611
1612 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1613 {
1614         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1615 }
1616
1617 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1618                                    enum tx_queue_prio prio)
1619 {
1620         u32 val;
1621
1622         WARN_ON(hw->mac.type != e1000_i210);
1623         WARN_ON(queue < 0 || queue > 4);
1624
1625         val = rd32(E1000_I210_TXDCTL(queue));
1626
1627         if (prio == TX_QUEUE_PRIO_HIGH)
1628                 val |= E1000_TXDCTL_PRIORITY;
1629         else
1630                 val &= ~E1000_TXDCTL_PRIORITY;
1631
1632         wr32(E1000_I210_TXDCTL(queue), val);
1633 }
1634
1635 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1636 {
1637         u32 val;
1638
1639         WARN_ON(hw->mac.type != e1000_i210);
1640         WARN_ON(queue < 0 || queue > 1);
1641
1642         val = rd32(E1000_I210_TQAVCC(queue));
1643
1644         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1645                 val |= E1000_TQAVCC_QUEUEMODE;
1646         else
1647                 val &= ~E1000_TQAVCC_QUEUEMODE;
1648
1649         wr32(E1000_I210_TQAVCC(queue), val);
1650 }
1651
1652 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1653 {
1654         int i;
1655
1656         for (i = 0; i < adapter->num_tx_queues; i++) {
1657                 if (adapter->tx_ring[i]->cbs_enable)
1658                         return true;
1659         }
1660
1661         return false;
1662 }
1663
1664 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1665 {
1666         int i;
1667
1668         for (i = 0; i < adapter->num_tx_queues; i++) {
1669                 if (adapter->tx_ring[i]->launchtime_enable)
1670                         return true;
1671         }
1672
1673         return false;
1674 }
1675
1676 /**
1677  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1678  *  @adapter: pointer to adapter struct
1679  *  @queue: queue number
1680  *
1681  *  Configure CBS and Launchtime for a given hardware queue.
1682  *  Parameters are retrieved from the correct Tx ring, so
1683  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1684  *  for setting those correctly prior to this function being called.
1685  **/
1686 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1687 {
1688         struct igb_ring *ring = adapter->tx_ring[queue];
1689         struct net_device *netdev = adapter->netdev;
1690         struct e1000_hw *hw = &adapter->hw;
1691         u32 tqavcc, tqavctrl;
1692         u16 value;
1693
1694         WARN_ON(hw->mac.type != e1000_i210);
1695         WARN_ON(queue < 0 || queue > 1);
1696
1697         /* If any of the Qav features is enabled, configure queues as SR and
1698          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1699          * as SP.
1700          */
1701         if (ring->cbs_enable || ring->launchtime_enable) {
1702                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1703                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1704         } else {
1705                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1706                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1707         }
1708
1709         /* If CBS is enabled, set DataTranARB and config its parameters. */
1710         if (ring->cbs_enable || queue == 0) {
1711                 /* i210 does not allow the queue 0 to be in the Strict
1712                  * Priority mode while the Qav mode is enabled, so,
1713                  * instead of disabling strict priority mode, we give
1714                  * queue 0 the maximum of credits possible.
1715                  *
1716                  * See section 8.12.19 of the i210 datasheet, "Note:
1717                  * Queue0 QueueMode must be set to 1b when
1718                  * TransmitMode is set to Qav."
1719                  */
1720                 if (queue == 0 && !ring->cbs_enable) {
1721                         /* max "linkspeed" idleslope in kbps */
1722                         ring->idleslope = 1000000;
1723                         ring->hicredit = ETH_FRAME_LEN;
1724                 }
1725
1726                 /* Always set data transfer arbitration to credit-based
1727                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1728                  * the queues.
1729                  */
1730                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1731                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1732                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1733
1734                 /* According to i210 datasheet section 7.2.7.7, we should set
1735                  * the 'idleSlope' field from TQAVCC register following the
1736                  * equation:
1737                  *
1738                  * For 100 Mbps link speed:
1739                  *
1740                  *     value = BW * 0x7735 * 0.2                          (E1)
1741                  *
1742                  * For 1000Mbps link speed:
1743                  *
1744                  *     value = BW * 0x7735 * 2                            (E2)
1745                  *
1746                  * E1 and E2 can be merged into one equation as shown below.
1747                  * Note that 'link-speed' is in Mbps.
1748                  *
1749                  *     value = BW * 0x7735 * 2 * link-speed
1750                  *                           --------------               (E3)
1751                  *                                1000
1752                  *
1753                  * 'BW' is the percentage bandwidth out of full link speed
1754                  * which can be found with the following equation. Note that
1755                  * idleSlope here is the parameter from this function which
1756                  * is in kbps.
1757                  *
1758                  *     BW =     idleSlope
1759                  *          -----------------                             (E4)
1760                  *          link-speed * 1000
1761                  *
1762                  * That said, we can come up with a generic equation to
1763                  * calculate the value we should set it TQAVCC register by
1764                  * replacing 'BW' in E3 by E4. The resulting equation is:
1765                  *
1766                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1767                  *         -----------------            --------------    (E5)
1768                  *         link-speed * 1000                 1000
1769                  *
1770                  * 'link-speed' is present in both sides of the fraction so
1771                  * it is canceled out. The final equation is the following:
1772                  *
1773                  *     value = idleSlope * 61034
1774                  *             -----------------                          (E6)
1775                  *                  1000000
1776                  *
1777                  * NOTE: For i210, given the above, we can see that idleslope
1778                  *       is represented in 16.38431 kbps units by the value at
1779                  *       the TQAVCC register (1Gbps / 61034), which reduces
1780                  *       the granularity for idleslope increments.
1781                  *       For instance, if you want to configure a 2576kbps
1782                  *       idleslope, the value to be written on the register
1783                  *       would have to be 157.23. If rounded down, you end
1784                  *       up with less bandwidth available than originally
1785                  *       required (~2572 kbps). If rounded up, you end up
1786                  *       with a higher bandwidth (~2589 kbps). Below the
1787                  *       approach we take is to always round up the
1788                  *       calculated value, so the resulting bandwidth might
1789                  *       be slightly higher for some configurations.
1790                  */
1791                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1792
1793                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1794                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1795                 tqavcc |= value;
1796                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1797
1798                 wr32(E1000_I210_TQAVHC(queue),
1799                      0x80000000 + ring->hicredit * 0x7735);
1800         } else {
1801
1802                 /* Set idleSlope to zero. */
1803                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1804                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1805                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1806
1807                 /* Set hiCredit to zero. */
1808                 wr32(E1000_I210_TQAVHC(queue), 0);
1809
1810                 /* If CBS is not enabled for any queues anymore, then return to
1811                  * the default state of Data Transmission Arbitration on
1812                  * TQAVCTRL.
1813                  */
1814                 if (!is_any_cbs_enabled(adapter)) {
1815                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1816                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1817                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1818                 }
1819         }
1820
1821         /* If LaunchTime is enabled, set DataTranTIM. */
1822         if (ring->launchtime_enable) {
1823                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1824                  * for any of the SR queues, and configure fetchtime delta.
1825                  * XXX NOTE:
1826                  *     - LaunchTime will be enabled for all SR queues.
1827                  *     - A fixed offset can be added relative to the launch
1828                  *       time of all packets if configured at reg LAUNCH_OS0.
1829                  *       We are keeping it as 0 for now (default value).
1830                  */
1831                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1832                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1833                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1834                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1835         } else {
1836                 /* If Launchtime is not enabled for any SR queues anymore,
1837                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1838                  * effectively disabling Launchtime.
1839                  */
1840                 if (!is_any_txtime_enabled(adapter)) {
1841                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1842                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1843                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1844                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1845                 }
1846         }
1847
1848         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1849          * CBS are not configurable by software so we don't do any 'controller
1850          * configuration' in respect to these parameters.
1851          */
1852
1853         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d \
1854                             idleslope %d sendslope %d hiCredit %d \
1855                             locredit %d\n",
1856                    (ring->cbs_enable) ? "enabled" : "disabled",
1857                    (ring->launchtime_enable) ? "enabled" : "disabled", queue,
1858                    ring->idleslope, ring->sendslope, ring->hicredit,
1859                    ring->locredit);
1860 }
1861
1862 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1863                                   bool enable)
1864 {
1865         struct igb_ring *ring;
1866
1867         if (queue < 0 || queue > adapter->num_tx_queues)
1868                 return -EINVAL;
1869
1870         ring = adapter->tx_ring[queue];
1871         ring->launchtime_enable = enable;
1872
1873         return 0;
1874 }
1875
1876 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1877                                bool enable, int idleslope, int sendslope,
1878                                int hicredit, int locredit)
1879 {
1880         struct igb_ring *ring;
1881
1882         if (queue < 0 || queue > adapter->num_tx_queues)
1883                 return -EINVAL;
1884
1885         ring = adapter->tx_ring[queue];
1886
1887         ring->cbs_enable = enable;
1888         ring->idleslope = idleslope;
1889         ring->sendslope = sendslope;
1890         ring->hicredit = hicredit;
1891         ring->locredit = locredit;
1892
1893         return 0;
1894 }
1895
1896 /**
1897  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1898  *  @adapter: pointer to adapter struct
1899  *
1900  *  Configure TQAVCTRL register switching the controller's Tx mode
1901  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1902  *  a call to igb_config_tx_modes() per queue so any previously saved
1903  *  Tx parameters are applied.
1904  **/
1905 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1906 {
1907         struct net_device *netdev = adapter->netdev;
1908         struct e1000_hw *hw = &adapter->hw;
1909         u32 val;
1910
1911         /* Only i210 controller supports changing the transmission mode. */
1912         if (hw->mac.type != e1000_i210)
1913                 return;
1914
1915         if (is_fqtss_enabled(adapter)) {
1916                 int i, max_queue;
1917
1918                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1919                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1920                  * so SP queues wait for SR ones.
1921                  */
1922                 val = rd32(E1000_I210_TQAVCTRL);
1923                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1924                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1925                 wr32(E1000_I210_TQAVCTRL, val);
1926
1927                 /* Configure Tx and Rx packet buffers sizes as described in
1928                  * i210 datasheet section 7.2.7.7.
1929                  */
1930                 val = rd32(E1000_TXPBS);
1931                 val &= ~I210_TXPBSIZE_MASK;
1932                 val |= I210_TXPBSIZE_PB0_8KB | I210_TXPBSIZE_PB1_8KB |
1933                         I210_TXPBSIZE_PB2_4KB | I210_TXPBSIZE_PB3_4KB;
1934                 wr32(E1000_TXPBS, val);
1935
1936                 val = rd32(E1000_RXPBS);
1937                 val &= ~I210_RXPBSIZE_MASK;
1938                 val |= I210_RXPBSIZE_PB_32KB;
1939                 wr32(E1000_RXPBS, val);
1940
1941                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1942                  * register should not exceed the buffer size programmed in
1943                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1944                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1945                  * 4kB / 64.
1946                  *
1947                  * However, when we do so, no frame from queue 2 and 3 are
1948                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1949                  * or _equal_ to the buffer size programmed in TXPBS. For this
1950                  * reason, we set set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1951                  */
1952                 val = (4096 - 1) / 64;
1953                 wr32(E1000_I210_DTXMXPKTSZ, val);
1954
1955                 /* Since FQTSS mode is enabled, apply any CBS configuration
1956                  * previously set. If no previous CBS configuration has been
1957                  * done, then the initial configuration is applied, which means
1958                  * CBS is disabled.
1959                  */
1960                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1961                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1962
1963                 for (i = 0; i < max_queue; i++) {
1964                         igb_config_tx_modes(adapter, i);
1965                 }
1966         } else {
1967                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1968                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1969                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1970
1971                 val = rd32(E1000_I210_TQAVCTRL);
1972                 /* According to Section 8.12.21, the other flags we've set when
1973                  * enabling FQTSS are not relevant when disabling FQTSS so we
1974                  * don't set they here.
1975                  */
1976                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1977                 wr32(E1000_I210_TQAVCTRL, val);
1978         }
1979
1980         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1981                    "enabled" : "disabled");
1982 }
1983
1984 /**
1985  *  igb_configure - configure the hardware for RX and TX
1986  *  @adapter: private board structure
1987  **/
1988 static void igb_configure(struct igb_adapter *adapter)
1989 {
1990         struct net_device *netdev = adapter->netdev;
1991         int i;
1992
1993         igb_get_hw_control(adapter);
1994         igb_set_rx_mode(netdev);
1995         igb_setup_tx_mode(adapter);
1996
1997         igb_restore_vlan(adapter);
1998
1999         igb_setup_tctl(adapter);
2000         igb_setup_mrqc(adapter);
2001         igb_setup_rctl(adapter);
2002
2003         igb_nfc_filter_restore(adapter);
2004         igb_configure_tx(adapter);
2005         igb_configure_rx(adapter);
2006
2007         igb_rx_fifo_flush_82575(&adapter->hw);
2008
2009         /* call igb_desc_unused which always leaves
2010          * at least 1 descriptor unused to make sure
2011          * next_to_use != next_to_clean
2012          */
2013         for (i = 0; i < adapter->num_rx_queues; i++) {
2014                 struct igb_ring *ring = adapter->rx_ring[i];
2015                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2016         }
2017 }
2018
2019 /**
2020  *  igb_power_up_link - Power up the phy/serdes link
2021  *  @adapter: address of board private structure
2022  **/
2023 void igb_power_up_link(struct igb_adapter *adapter)
2024 {
2025         igb_reset_phy(&adapter->hw);
2026
2027         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2028                 igb_power_up_phy_copper(&adapter->hw);
2029         else
2030                 igb_power_up_serdes_link_82575(&adapter->hw);
2031
2032         igb_setup_link(&adapter->hw);
2033 }
2034
2035 /**
2036  *  igb_power_down_link - Power down the phy/serdes link
2037  *  @adapter: address of board private structure
2038  */
2039 static void igb_power_down_link(struct igb_adapter *adapter)
2040 {
2041         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2042                 igb_power_down_phy_copper_82575(&adapter->hw);
2043         else
2044                 igb_shutdown_serdes_link_82575(&adapter->hw);
2045 }
2046
2047 /**
2048  * Detect and switch function for Media Auto Sense
2049  * @adapter: address of the board private structure
2050  **/
2051 static void igb_check_swap_media(struct igb_adapter *adapter)
2052 {
2053         struct e1000_hw *hw = &adapter->hw;
2054         u32 ctrl_ext, connsw;
2055         bool swap_now = false;
2056
2057         ctrl_ext = rd32(E1000_CTRL_EXT);
2058         connsw = rd32(E1000_CONNSW);
2059
2060         /* need to live swap if current media is copper and we have fiber/serdes
2061          * to go to.
2062          */
2063
2064         if ((hw->phy.media_type == e1000_media_type_copper) &&
2065             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2066                 swap_now = true;
2067         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
2068                 /* copper signal takes time to appear */
2069                 if (adapter->copper_tries < 4) {
2070                         adapter->copper_tries++;
2071                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2072                         wr32(E1000_CONNSW, connsw);
2073                         return;
2074                 } else {
2075                         adapter->copper_tries = 0;
2076                         if ((connsw & E1000_CONNSW_PHYSD) &&
2077                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2078                                 swap_now = true;
2079                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2080                                 wr32(E1000_CONNSW, connsw);
2081                         }
2082                 }
2083         }
2084
2085         if (!swap_now)
2086                 return;
2087
2088         switch (hw->phy.media_type) {
2089         case e1000_media_type_copper:
2090                 netdev_info(adapter->netdev,
2091                         "MAS: changing media to fiber/serdes\n");
2092                 ctrl_ext |=
2093                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2094                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2095                 adapter->copper_tries = 0;
2096                 break;
2097         case e1000_media_type_internal_serdes:
2098         case e1000_media_type_fiber:
2099                 netdev_info(adapter->netdev,
2100                         "MAS: changing media to copper\n");
2101                 ctrl_ext &=
2102                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2103                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2104                 break;
2105         default:
2106                 /* shouldn't get here during regular operation */
2107                 netdev_err(adapter->netdev,
2108                         "AMS: Invalid media type found, returning\n");
2109                 break;
2110         }
2111         wr32(E1000_CTRL_EXT, ctrl_ext);
2112 }
2113
2114 /**
2115  *  igb_up - Open the interface and prepare it to handle traffic
2116  *  @adapter: board private structure
2117  **/
2118 int igb_up(struct igb_adapter *adapter)
2119 {
2120         struct e1000_hw *hw = &adapter->hw;
2121         int i;
2122
2123         /* hardware has been reset, we need to reload some things */
2124         igb_configure(adapter);
2125
2126         clear_bit(__IGB_DOWN, &adapter->state);
2127
2128         for (i = 0; i < adapter->num_q_vectors; i++)
2129                 napi_enable(&(adapter->q_vector[i]->napi));
2130
2131         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2132                 igb_configure_msix(adapter);
2133         else
2134                 igb_assign_vector(adapter->q_vector[0], 0);
2135
2136         /* Clear any pending interrupts. */
2137         rd32(E1000_TSICR);
2138         rd32(E1000_ICR);
2139         igb_irq_enable(adapter);
2140
2141         /* notify VFs that reset has been completed */
2142         if (adapter->vfs_allocated_count) {
2143                 u32 reg_data = rd32(E1000_CTRL_EXT);
2144
2145                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2146                 wr32(E1000_CTRL_EXT, reg_data);
2147         }
2148
2149         netif_tx_start_all_queues(adapter->netdev);
2150
2151         /* start the watchdog. */
2152         hw->mac.get_link_status = 1;
2153         schedule_work(&adapter->watchdog_task);
2154
2155         if ((adapter->flags & IGB_FLAG_EEE) &&
2156             (!hw->dev_spec._82575.eee_disable))
2157                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2158
2159         return 0;
2160 }
2161
2162 void igb_down(struct igb_adapter *adapter)
2163 {
2164         struct net_device *netdev = adapter->netdev;
2165         struct e1000_hw *hw = &adapter->hw;
2166         u32 tctl, rctl;
2167         int i;
2168
2169         /* signal that we're down so the interrupt handler does not
2170          * reschedule our watchdog timer
2171          */
2172         set_bit(__IGB_DOWN, &adapter->state);
2173
2174         /* disable receives in the hardware */
2175         rctl = rd32(E1000_RCTL);
2176         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2177         /* flush and sleep below */
2178
2179         igb_nfc_filter_exit(adapter);
2180
2181         netif_carrier_off(netdev);
2182         netif_tx_stop_all_queues(netdev);
2183
2184         /* disable transmits in the hardware */
2185         tctl = rd32(E1000_TCTL);
2186         tctl &= ~E1000_TCTL_EN;
2187         wr32(E1000_TCTL, tctl);
2188         /* flush both disables and wait for them to finish */
2189         wrfl();
2190         usleep_range(10000, 11000);
2191
2192         igb_irq_disable(adapter);
2193
2194         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2195
2196         for (i = 0; i < adapter->num_q_vectors; i++) {
2197                 if (adapter->q_vector[i]) {
2198                         napi_synchronize(&adapter->q_vector[i]->napi);
2199                         napi_disable(&adapter->q_vector[i]->napi);
2200                 }
2201         }
2202
2203         del_timer_sync(&adapter->watchdog_timer);
2204         del_timer_sync(&adapter->phy_info_timer);
2205
2206         /* record the stats before reset*/
2207         spin_lock(&adapter->stats64_lock);
2208         igb_update_stats(adapter);
2209         spin_unlock(&adapter->stats64_lock);
2210
2211         adapter->link_speed = 0;
2212         adapter->link_duplex = 0;
2213
2214         if (!pci_channel_offline(adapter->pdev))
2215                 igb_reset(adapter);
2216
2217         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2218         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2219
2220         igb_clean_all_tx_rings(adapter);
2221         igb_clean_all_rx_rings(adapter);
2222 #ifdef CONFIG_IGB_DCA
2223
2224         /* since we reset the hardware DCA settings were cleared */
2225         igb_setup_dca(adapter);
2226 #endif
2227 }
2228
2229 void igb_reinit_locked(struct igb_adapter *adapter)
2230 {
2231         WARN_ON(in_interrupt());
2232         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2233                 usleep_range(1000, 2000);
2234         igb_down(adapter);
2235         igb_up(adapter);
2236         clear_bit(__IGB_RESETTING, &adapter->state);
2237 }
2238
2239 /** igb_enable_mas - Media Autosense re-enable after swap
2240  *
2241  * @adapter: adapter struct
2242  **/
2243 static void igb_enable_mas(struct igb_adapter *adapter)
2244 {
2245         struct e1000_hw *hw = &adapter->hw;
2246         u32 connsw = rd32(E1000_CONNSW);
2247
2248         /* configure for SerDes media detect */
2249         if ((hw->phy.media_type == e1000_media_type_copper) &&
2250             (!(connsw & E1000_CONNSW_SERDESD))) {
2251                 connsw |= E1000_CONNSW_ENRGSRC;
2252                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2253                 wr32(E1000_CONNSW, connsw);
2254                 wrfl();
2255         }
2256 }
2257
2258 void igb_reset(struct igb_adapter *adapter)
2259 {
2260         struct pci_dev *pdev = adapter->pdev;
2261         struct e1000_hw *hw = &adapter->hw;
2262         struct e1000_mac_info *mac = &hw->mac;
2263         struct e1000_fc_info *fc = &hw->fc;
2264         u32 pba, hwm;
2265
2266         /* Repartition Pba for greater than 9k mtu
2267          * To take effect CTRL.RST is required.
2268          */
2269         switch (mac->type) {
2270         case e1000_i350:
2271         case e1000_i354:
2272         case e1000_82580:
2273                 pba = rd32(E1000_RXPBS);
2274                 pba = igb_rxpbs_adjust_82580(pba);
2275                 break;
2276         case e1000_82576:
2277                 pba = rd32(E1000_RXPBS);
2278                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2279                 break;
2280         case e1000_82575:
2281         case e1000_i210:
2282         case e1000_i211:
2283         default:
2284                 pba = E1000_PBA_34K;
2285                 break;
2286         }
2287
2288         if (mac->type == e1000_82575) {
2289                 u32 min_rx_space, min_tx_space, needed_tx_space;
2290
2291                 /* write Rx PBA so that hardware can report correct Tx PBA */
2292                 wr32(E1000_PBA, pba);
2293
2294                 /* To maintain wire speed transmits, the Tx FIFO should be
2295                  * large enough to accommodate two full transmit packets,
2296                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2297                  * the Rx FIFO should be large enough to accommodate at least
2298                  * one full receive packet and is similarly rounded up and
2299                  * expressed in KB.
2300                  */
2301                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2302
2303                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2304                  * but don't include Ethernet FCS because hardware appends it.
2305                  * We only need to round down to the nearest 512 byte block
2306                  * count since the value we care about is 2 frames, not 1.
2307                  */
2308                 min_tx_space = adapter->max_frame_size;
2309                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2310                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2311
2312                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2313                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2314
2315                 /* If current Tx allocation is less than the min Tx FIFO size,
2316                  * and the min Tx FIFO size is less than the current Rx FIFO
2317                  * allocation, take space away from current Rx allocation.
2318                  */
2319                 if (needed_tx_space < pba) {
2320                         pba -= needed_tx_space;
2321
2322                         /* if short on Rx space, Rx wins and must trump Tx
2323                          * adjustment
2324                          */
2325                         if (pba < min_rx_space)
2326                                 pba = min_rx_space;
2327                 }
2328
2329                 /* adjust PBA for jumbo frames */
2330                 wr32(E1000_PBA, pba);
2331         }
2332
2333         /* flow control settings
2334          * The high water mark must be low enough to fit one full frame
2335          * after transmitting the pause frame.  As such we must have enough
2336          * space to allow for us to complete our current transmit and then
2337          * receive the frame that is in progress from the link partner.
2338          * Set it to:
2339          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2340          */
2341         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2342
2343         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2344         fc->low_water = fc->high_water - 16;
2345         fc->pause_time = 0xFFFF;
2346         fc->send_xon = 1;
2347         fc->current_mode = fc->requested_mode;
2348
2349         /* disable receive for all VFs and wait one second */
2350         if (adapter->vfs_allocated_count) {
2351                 int i;
2352
2353                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2354                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2355
2356                 /* ping all the active vfs to let them know we are going down */
2357                 igb_ping_all_vfs(adapter);
2358
2359                 /* disable transmits and receives */
2360                 wr32(E1000_VFRE, 0);
2361                 wr32(E1000_VFTE, 0);
2362         }
2363
2364         /* Allow time for pending master requests to run */
2365         hw->mac.ops.reset_hw(hw);
2366         wr32(E1000_WUC, 0);
2367
2368         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2369                 /* need to resetup here after media swap */
2370                 adapter->ei.get_invariants(hw);
2371                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2372         }
2373         if ((mac->type == e1000_82575) &&
2374             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2375                 igb_enable_mas(adapter);
2376         }
2377         if (hw->mac.ops.init_hw(hw))
2378                 dev_err(&pdev->dev, "Hardware Error\n");
2379
2380         /* RAR registers were cleared during init_hw, clear mac table */
2381         igb_flush_mac_table(adapter);
2382         __dev_uc_unsync(adapter->netdev, NULL);
2383
2384         /* Recover default RAR entry */
2385         igb_set_default_mac_filter(adapter);
2386
2387         /* Flow control settings reset on hardware reset, so guarantee flow
2388          * control is off when forcing speed.
2389          */
2390         if (!hw->mac.autoneg)
2391                 igb_force_mac_fc(hw);
2392
2393         igb_init_dmac(adapter, pba);
2394 #ifdef CONFIG_IGB_HWMON
2395         /* Re-initialize the thermal sensor on i350 devices. */
2396         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2397                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2398                         /* If present, re-initialize the external thermal sensor
2399                          * interface.
2400                          */
2401                         if (adapter->ets)
2402                                 mac->ops.init_thermal_sensor_thresh(hw);
2403                 }
2404         }
2405 #endif
2406         /* Re-establish EEE setting */
2407         if (hw->phy.media_type == e1000_media_type_copper) {
2408                 switch (mac->type) {
2409                 case e1000_i350:
2410                 case e1000_i210:
2411                 case e1000_i211:
2412                         igb_set_eee_i350(hw, true, true);
2413                         break;
2414                 case e1000_i354:
2415                         igb_set_eee_i354(hw, true, true);
2416                         break;
2417                 default:
2418                         break;
2419                 }
2420         }
2421         if (!netif_running(adapter->netdev))
2422                 igb_power_down_link(adapter);
2423
2424         igb_update_mng_vlan(adapter);
2425
2426         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2427         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2428
2429         /* Re-enable PTP, where applicable. */
2430         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2431                 igb_ptp_reset(adapter);
2432
2433         igb_get_phy_info(hw);
2434 }
2435
2436 static netdev_features_t igb_fix_features(struct net_device *netdev,
2437         netdev_features_t features)
2438 {
2439         /* Since there is no support for separate Rx/Tx vlan accel
2440          * enable/disable make sure Tx flag is always in same state as Rx.
2441          */
2442         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2443                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2444         else
2445                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2446
2447         return features;
2448 }
2449
2450 static int igb_set_features(struct net_device *netdev,
2451         netdev_features_t features)
2452 {
2453         netdev_features_t changed = netdev->features ^ features;
2454         struct igb_adapter *adapter = netdev_priv(netdev);
2455
2456         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2457                 igb_vlan_mode(netdev, features);
2458
2459         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2460                 return 0;
2461
2462         if (!(features & NETIF_F_NTUPLE)) {
2463                 struct hlist_node *node2;
2464                 struct igb_nfc_filter *rule;
2465
2466                 spin_lock(&adapter->nfc_lock);
2467                 hlist_for_each_entry_safe(rule, node2,
2468                                           &adapter->nfc_filter_list, nfc_node) {
2469                         igb_erase_filter(adapter, rule);
2470                         hlist_del(&rule->nfc_node);
2471                         kfree(rule);
2472                 }
2473                 spin_unlock(&adapter->nfc_lock);
2474                 adapter->nfc_filter_count = 0;
2475         }
2476
2477         netdev->features = features;
2478
2479         if (netif_running(netdev))
2480                 igb_reinit_locked(adapter);
2481         else
2482                 igb_reset(adapter);
2483
2484         return 0;
2485 }
2486
2487 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2488                            struct net_device *dev,
2489                            const unsigned char *addr, u16 vid,
2490                            u16 flags)
2491 {
2492         /* guarantee we can provide a unique filter for the unicast address */
2493         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2494                 struct igb_adapter *adapter = netdev_priv(dev);
2495                 int vfn = adapter->vfs_allocated_count;
2496
2497                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2498                         return -ENOMEM;
2499         }
2500
2501         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2502 }
2503
2504 #define IGB_MAX_MAC_HDR_LEN     127
2505 #define IGB_MAX_NETWORK_HDR_LEN 511
2506
2507 static netdev_features_t
2508 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2509                    netdev_features_t features)
2510 {
2511         unsigned int network_hdr_len, mac_hdr_len;
2512
2513         /* Make certain the headers can be described by a context descriptor */
2514         mac_hdr_len = skb_network_header(skb) - skb->data;
2515         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2516                 return features & ~(NETIF_F_HW_CSUM |
2517                                     NETIF_F_SCTP_CRC |
2518                                     NETIF_F_HW_VLAN_CTAG_TX |
2519                                     NETIF_F_TSO |
2520                                     NETIF_F_TSO6);
2521
2522         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2523         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2524                 return features & ~(NETIF_F_HW_CSUM |
2525                                     NETIF_F_SCTP_CRC |
2526                                     NETIF_F_TSO |
2527                                     NETIF_F_TSO6);
2528
2529         /* We can only support IPV4 TSO in tunnels if we can mangle the
2530          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2531          */
2532         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2533                 features &= ~NETIF_F_TSO;
2534
2535         return features;
2536 }
2537
2538 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2539 {
2540         if (!is_fqtss_enabled(adapter)) {
2541                 enable_fqtss(adapter, true);
2542                 return;
2543         }
2544
2545         igb_config_tx_modes(adapter, queue);
2546
2547         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2548                 enable_fqtss(adapter, false);
2549 }
2550
2551 static int igb_offload_cbs(struct igb_adapter *adapter,
2552                            struct tc_cbs_qopt_offload *qopt)
2553 {
2554         struct e1000_hw *hw = &adapter->hw;
2555         int err;
2556
2557         /* CBS offloading is only supported by i210 controller. */
2558         if (hw->mac.type != e1000_i210)
2559                 return -EOPNOTSUPP;
2560
2561         /* CBS offloading is only supported by queue 0 and queue 1. */
2562         if (qopt->queue < 0 || qopt->queue > 1)
2563                 return -EINVAL;
2564
2565         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2566                                   qopt->idleslope, qopt->sendslope,
2567                                   qopt->hicredit, qopt->locredit);
2568         if (err)
2569                 return err;
2570
2571         igb_offload_apply(adapter, qopt->queue);
2572
2573         return 0;
2574 }
2575
2576 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2577 #define VLAN_PRIO_FULL_MASK (0x07)
2578
2579 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2580                                 struct tc_cls_flower_offload *f,
2581                                 int traffic_class,
2582                                 struct igb_nfc_filter *input)
2583 {
2584         struct netlink_ext_ack *extack = f->common.extack;
2585
2586         if (f->dissector->used_keys &
2587             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2588               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2589               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2590               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2591                 NL_SET_ERR_MSG_MOD(extack,
2592                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2593                 return -EOPNOTSUPP;
2594         }
2595
2596         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2597                 struct flow_dissector_key_eth_addrs *key, *mask;
2598
2599                 key = skb_flow_dissector_target(f->dissector,
2600                                                 FLOW_DISSECTOR_KEY_ETH_ADDRS,
2601                                                 f->key);
2602                 mask = skb_flow_dissector_target(f->dissector,
2603                                                  FLOW_DISSECTOR_KEY_ETH_ADDRS,
2604                                                  f->mask);
2605
2606                 if (!is_zero_ether_addr(mask->dst)) {
2607                         if (!is_broadcast_ether_addr(mask->dst)) {
2608                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2609                                 return -EINVAL;
2610                         }
2611
2612                         input->filter.match_flags |=
2613                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2614                         ether_addr_copy(input->filter.dst_addr, key->dst);
2615                 }
2616
2617                 if (!is_zero_ether_addr(mask->src)) {
2618                         if (!is_broadcast_ether_addr(mask->src)) {
2619                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2620                                 return -EINVAL;
2621                         }
2622
2623                         input->filter.match_flags |=
2624                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2625                         ether_addr_copy(input->filter.src_addr, key->src);
2626                 }
2627         }
2628
2629         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) {
2630                 struct flow_dissector_key_basic *key, *mask;
2631
2632                 key = skb_flow_dissector_target(f->dissector,
2633                                                 FLOW_DISSECTOR_KEY_BASIC,
2634                                                 f->key);
2635                 mask = skb_flow_dissector_target(f->dissector,
2636                                                  FLOW_DISSECTOR_KEY_BASIC,
2637                                                  f->mask);
2638
2639                 if (mask->n_proto) {
2640                         if (mask->n_proto != ETHER_TYPE_FULL_MASK) {
2641                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2642                                 return -EINVAL;
2643                         }
2644
2645                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2646                         input->filter.etype = key->n_proto;
2647                 }
2648         }
2649
2650         if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
2651                 struct flow_dissector_key_vlan *key, *mask;
2652
2653                 key = skb_flow_dissector_target(f->dissector,
2654                                                 FLOW_DISSECTOR_KEY_VLAN,
2655                                                 f->key);
2656                 mask = skb_flow_dissector_target(f->dissector,
2657                                                  FLOW_DISSECTOR_KEY_VLAN,
2658                                                  f->mask);
2659
2660                 if (mask->vlan_priority) {
2661                         if (mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2662                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2663                                 return -EINVAL;
2664                         }
2665
2666                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2667                         input->filter.vlan_tci = key->vlan_priority;
2668                 }
2669         }
2670
2671         input->action = traffic_class;
2672         input->cookie = f->cookie;
2673
2674         return 0;
2675 }
2676
2677 static int igb_configure_clsflower(struct igb_adapter *adapter,
2678                                    struct tc_cls_flower_offload *cls_flower)
2679 {
2680         struct netlink_ext_ack *extack = cls_flower->common.extack;
2681         struct igb_nfc_filter *filter, *f;
2682         int err, tc;
2683
2684         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2685         if (tc < 0) {
2686                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2687                 return -EINVAL;
2688         }
2689
2690         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2691         if (!filter)
2692                 return -ENOMEM;
2693
2694         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2695         if (err < 0)
2696                 goto err_parse;
2697
2698         spin_lock(&adapter->nfc_lock);
2699
2700         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2701                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2702                         err = -EEXIST;
2703                         NL_SET_ERR_MSG_MOD(extack,
2704                                            "This filter is already set in ethtool");
2705                         goto err_locked;
2706                 }
2707         }
2708
2709         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2710                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2711                         err = -EEXIST;
2712                         NL_SET_ERR_MSG_MOD(extack,
2713                                            "This filter is already set in cls_flower");
2714                         goto err_locked;
2715                 }
2716         }
2717
2718         err = igb_add_filter(adapter, filter);
2719         if (err < 0) {
2720                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2721                 goto err_locked;
2722         }
2723
2724         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2725
2726         spin_unlock(&adapter->nfc_lock);
2727
2728         return 0;
2729
2730 err_locked:
2731         spin_unlock(&adapter->nfc_lock);
2732
2733 err_parse:
2734         kfree(filter);
2735
2736         return err;
2737 }
2738
2739 static int igb_delete_clsflower(struct igb_adapter *adapter,
2740                                 struct tc_cls_flower_offload *cls_flower)
2741 {
2742         struct igb_nfc_filter *filter;
2743         int err;
2744
2745         spin_lock(&adapter->nfc_lock);
2746
2747         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2748                 if (filter->cookie == cls_flower->cookie)
2749                         break;
2750
2751         if (!filter) {
2752                 err = -ENOENT;
2753                 goto out;
2754         }
2755
2756         err = igb_erase_filter(adapter, filter);
2757         if (err < 0)
2758                 goto out;
2759
2760         hlist_del(&filter->nfc_node);
2761         kfree(filter);
2762
2763 out:
2764         spin_unlock(&adapter->nfc_lock);
2765
2766         return err;
2767 }
2768
2769 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2770                                    struct tc_cls_flower_offload *cls_flower)
2771 {
2772         switch (cls_flower->command) {
2773         case TC_CLSFLOWER_REPLACE:
2774                 return igb_configure_clsflower(adapter, cls_flower);
2775         case TC_CLSFLOWER_DESTROY:
2776                 return igb_delete_clsflower(adapter, cls_flower);
2777         case TC_CLSFLOWER_STATS:
2778                 return -EOPNOTSUPP;
2779         default:
2780                 return -EOPNOTSUPP;
2781         }
2782 }
2783
2784 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2785                                  void *cb_priv)
2786 {
2787         struct igb_adapter *adapter = cb_priv;
2788
2789         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2790                 return -EOPNOTSUPP;
2791
2792         switch (type) {
2793         case TC_SETUP_CLSFLOWER:
2794                 return igb_setup_tc_cls_flower(adapter, type_data);
2795
2796         default:
2797                 return -EOPNOTSUPP;
2798         }
2799 }
2800
2801 static int igb_setup_tc_block(struct igb_adapter *adapter,
2802                               struct tc_block_offload *f)
2803 {
2804         if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
2805                 return -EOPNOTSUPP;
2806
2807         switch (f->command) {
2808         case TC_BLOCK_BIND:
2809                 return tcf_block_cb_register(f->block, igb_setup_tc_block_cb,
2810                                              adapter, adapter, f->extack);
2811         case TC_BLOCK_UNBIND:
2812                 tcf_block_cb_unregister(f->block, igb_setup_tc_block_cb,
2813                                         adapter);
2814                 return 0;
2815         default:
2816                 return -EOPNOTSUPP;
2817         }
2818 }
2819
2820 static int igb_offload_txtime(struct igb_adapter *adapter,
2821                               struct tc_etf_qopt_offload *qopt)
2822 {
2823         struct e1000_hw *hw = &adapter->hw;
2824         int err;
2825
2826         /* Launchtime offloading is only supported by i210 controller. */
2827         if (hw->mac.type != e1000_i210)
2828                 return -EOPNOTSUPP;
2829
2830         /* Launchtime offloading is only supported by queues 0 and 1. */
2831         if (qopt->queue < 0 || qopt->queue > 1)
2832                 return -EINVAL;
2833
2834         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2835         if (err)
2836                 return err;
2837
2838         igb_offload_apply(adapter, qopt->queue);
2839
2840         return 0;
2841 }
2842
2843 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2844                         void *type_data)
2845 {
2846         struct igb_adapter *adapter = netdev_priv(dev);
2847
2848         switch (type) {
2849         case TC_SETUP_QDISC_CBS:
2850                 return igb_offload_cbs(adapter, type_data);
2851         case TC_SETUP_BLOCK:
2852                 return igb_setup_tc_block(adapter, type_data);
2853         case TC_SETUP_QDISC_ETF:
2854                 return igb_offload_txtime(adapter, type_data);
2855
2856         default:
2857                 return -EOPNOTSUPP;
2858         }
2859 }
2860
2861 static const struct net_device_ops igb_netdev_ops = {
2862         .ndo_open               = igb_open,
2863         .ndo_stop               = igb_close,
2864         .ndo_start_xmit         = igb_xmit_frame,
2865         .ndo_get_stats64        = igb_get_stats64,
2866         .ndo_set_rx_mode        = igb_set_rx_mode,
2867         .ndo_set_mac_address    = igb_set_mac,
2868         .ndo_change_mtu         = igb_change_mtu,
2869         .ndo_do_ioctl           = igb_ioctl,
2870         .ndo_tx_timeout         = igb_tx_timeout,
2871         .ndo_validate_addr      = eth_validate_addr,
2872         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2873         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2874         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2875         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2876         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2877         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2878         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
2879         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2880         .ndo_fix_features       = igb_fix_features,
2881         .ndo_set_features       = igb_set_features,
2882         .ndo_fdb_add            = igb_ndo_fdb_add,
2883         .ndo_features_check     = igb_features_check,
2884         .ndo_setup_tc           = igb_setup_tc,
2885 };
2886
2887 /**
2888  * igb_set_fw_version - Configure version string for ethtool
2889  * @adapter: adapter struct
2890  **/
2891 void igb_set_fw_version(struct igb_adapter *adapter)
2892 {
2893         struct e1000_hw *hw = &adapter->hw;
2894         struct e1000_fw_version fw;
2895
2896         igb_get_fw_version(hw, &fw);
2897
2898         switch (hw->mac.type) {
2899         case e1000_i210:
2900         case e1000_i211:
2901                 if (!(igb_get_flash_presence_i210(hw))) {
2902                         snprintf(adapter->fw_version,
2903                                  sizeof(adapter->fw_version),
2904                                  "%2d.%2d-%d",
2905                                  fw.invm_major, fw.invm_minor,
2906                                  fw.invm_img_type);
2907                         break;
2908                 }
2909                 /* fall through */
2910         default:
2911                 /* if option is rom valid, display its version too */
2912                 if (fw.or_valid) {
2913                         snprintf(adapter->fw_version,
2914                                  sizeof(adapter->fw_version),
2915                                  "%d.%d, 0x%08x, %d.%d.%d",
2916                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2917                                  fw.or_major, fw.or_build, fw.or_patch);
2918                 /* no option rom */
2919                 } else if (fw.etrack_id != 0X0000) {
2920                         snprintf(adapter->fw_version,
2921                             sizeof(adapter->fw_version),
2922                             "%d.%d, 0x%08x",
2923                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2924                 } else {
2925                 snprintf(adapter->fw_version,
2926                     sizeof(adapter->fw_version),
2927                     "%d.%d.%d",
2928                     fw.eep_major, fw.eep_minor, fw.eep_build);
2929                 }
2930                 break;
2931         }
2932 }
2933
2934 /**
2935  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2936  *
2937  * @adapter: adapter struct
2938  **/
2939 static void igb_init_mas(struct igb_adapter *adapter)
2940 {
2941         struct e1000_hw *hw = &adapter->hw;
2942         u16 eeprom_data;
2943
2944         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2945         switch (hw->bus.func) {
2946         case E1000_FUNC_0:
2947                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2948                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2949                         netdev_info(adapter->netdev,
2950                                 "MAS: Enabling Media Autosense for port %d\n",
2951                                 hw->bus.func);
2952                 }
2953                 break;
2954         case E1000_FUNC_1:
2955                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2956                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2957                         netdev_info(adapter->netdev,
2958                                 "MAS: Enabling Media Autosense for port %d\n",
2959                                 hw->bus.func);
2960                 }
2961                 break;
2962         case E1000_FUNC_2:
2963                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2964                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2965                         netdev_info(adapter->netdev,
2966                                 "MAS: Enabling Media Autosense for port %d\n",
2967                                 hw->bus.func);
2968                 }
2969                 break;
2970         case E1000_FUNC_3:
2971                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2972                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2973                         netdev_info(adapter->netdev,
2974                                 "MAS: Enabling Media Autosense for port %d\n",
2975                                 hw->bus.func);
2976                 }
2977                 break;
2978         default:
2979                 /* Shouldn't get here */
2980                 netdev_err(adapter->netdev,
2981                         "MAS: Invalid port configuration, returning\n");
2982                 break;
2983         }
2984 }
2985
2986 /**
2987  *  igb_init_i2c - Init I2C interface
2988  *  @adapter: pointer to adapter structure
2989  **/
2990 static s32 igb_init_i2c(struct igb_adapter *adapter)
2991 {
2992         s32 status = 0;
2993
2994         /* I2C interface supported on i350 devices */
2995         if (adapter->hw.mac.type != e1000_i350)
2996                 return 0;
2997
2998         /* Initialize the i2c bus which is controlled by the registers.
2999          * This bus will use the i2c_algo_bit structue that implements
3000          * the protocol through toggling of the 4 bits in the register.
3001          */
3002         adapter->i2c_adap.owner = THIS_MODULE;
3003         adapter->i2c_algo = igb_i2c_algo;
3004         adapter->i2c_algo.data = adapter;
3005         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3006         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3007         strlcpy(adapter->i2c_adap.name, "igb BB",
3008                 sizeof(adapter->i2c_adap.name));
3009         status = i2c_bit_add_bus(&adapter->i2c_adap);
3010         return status;
3011 }
3012
3013 /**
3014  *  igb_probe - Device Initialization Routine
3015  *  @pdev: PCI device information struct
3016  *  @ent: entry in igb_pci_tbl
3017  *
3018  *  Returns 0 on success, negative on failure
3019  *
3020  *  igb_probe initializes an adapter identified by a pci_dev structure.
3021  *  The OS initialization, configuring of the adapter private structure,
3022  *  and a hardware reset occur.
3023  **/
3024 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3025 {
3026         struct net_device *netdev;
3027         struct igb_adapter *adapter;
3028         struct e1000_hw *hw;
3029         u16 eeprom_data = 0;
3030         s32 ret_val;
3031         static int global_quad_port_a; /* global quad port a indication */
3032         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3033         int err, pci_using_dac;
3034         u8 part_str[E1000_PBANUM_LENGTH];
3035
3036         /* Catch broken hardware that put the wrong VF device ID in
3037          * the PCIe SR-IOV capability.
3038          */
3039         if (pdev->is_virtfn) {
3040                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
3041                         pci_name(pdev), pdev->vendor, pdev->device);
3042                 return -EINVAL;
3043         }
3044
3045         err = pci_enable_device_mem(pdev);
3046         if (err)
3047                 return err;
3048
3049         pci_using_dac = 0;
3050         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3051         if (!err) {
3052                 pci_using_dac = 1;
3053         } else {
3054                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
3055                 if (err) {
3056                         dev_err(&pdev->dev,
3057                                 "No usable DMA configuration, aborting\n");
3058                         goto err_dma;
3059                 }
3060         }
3061
3062         err = pci_request_mem_regions(pdev, igb_driver_name);
3063         if (err)
3064                 goto err_pci_reg;
3065
3066         pci_enable_pcie_error_reporting(pdev);
3067
3068         pci_set_master(pdev);
3069         pci_save_state(pdev);
3070
3071         err = -ENOMEM;
3072         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3073                                    IGB_MAX_TX_QUEUES);
3074         if (!netdev)
3075                 goto err_alloc_etherdev;
3076
3077         SET_NETDEV_DEV(netdev, &pdev->dev);
3078
3079         pci_set_drvdata(pdev, netdev);
3080         adapter = netdev_priv(netdev);
3081         adapter->netdev = netdev;
3082         adapter->pdev = pdev;
3083         hw = &adapter->hw;
3084         hw->back = adapter;
3085         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3086
3087         err = -EIO;
3088         adapter->io_addr = pci_iomap(pdev, 0, 0);
3089         if (!adapter->io_addr)
3090                 goto err_ioremap;
3091         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3092         hw->hw_addr = adapter->io_addr;
3093
3094         netdev->netdev_ops = &igb_netdev_ops;
3095         igb_set_ethtool_ops(netdev);
3096         netdev->watchdog_timeo = 5 * HZ;
3097
3098         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3099
3100         netdev->mem_start = pci_resource_start(pdev, 0);
3101         netdev->mem_end = pci_resource_end(pdev, 0);
3102
3103         /* PCI config space info */
3104         hw->vendor_id = pdev->vendor;
3105         hw->device_id = pdev->device;
3106         hw->revision_id = pdev->revision;
3107         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3108         hw->subsystem_device_id = pdev->subsystem_device;
3109
3110         /* Copy the default MAC, PHY and NVM function pointers */
3111         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3112         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3113         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3114         /* Initialize skew-specific constants */
3115         err = ei->get_invariants(hw);
3116         if (err)
3117                 goto err_sw_init;
3118
3119         /* setup the private structure */
3120         err = igb_sw_init(adapter);
3121         if (err)
3122                 goto err_sw_init;
3123
3124         igb_get_bus_info_pcie(hw);
3125
3126         hw->phy.autoneg_wait_to_complete = false;
3127
3128         /* Copper options */
3129         if (hw->phy.media_type == e1000_media_type_copper) {
3130                 hw->phy.mdix = AUTO_ALL_MODES;
3131                 hw->phy.disable_polarity_correction = false;
3132                 hw->phy.ms_type = e1000_ms_hw_default;
3133         }
3134
3135         if (igb_check_reset_block(hw))
3136                 dev_info(&pdev->dev,
3137                         "PHY reset is blocked due to SOL/IDER session.\n");
3138
3139         /* features is initialized to 0 in allocation, it might have bits
3140          * set by igb_sw_init so we should use an or instead of an
3141          * assignment.
3142          */
3143         netdev->features |= NETIF_F_SG |
3144                             NETIF_F_TSO |
3145                             NETIF_F_TSO6 |
3146                             NETIF_F_RXHASH |
3147                             NETIF_F_RXCSUM |
3148                             NETIF_F_HW_CSUM;
3149
3150         if (hw->mac.type >= e1000_82576)
3151                 netdev->features |= NETIF_F_SCTP_CRC;
3152
3153         if (hw->mac.type >= e1000_i350)
3154                 netdev->features |= NETIF_F_HW_TC;
3155
3156 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3157                                   NETIF_F_GSO_GRE_CSUM | \
3158                                   NETIF_F_GSO_IPXIP4 | \
3159                                   NETIF_F_GSO_IPXIP6 | \
3160                                   NETIF_F_GSO_UDP_TUNNEL | \
3161                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3162
3163         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3164         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3165
3166         /* copy netdev features into list of user selectable features */
3167         netdev->hw_features |= netdev->features |
3168                                NETIF_F_HW_VLAN_CTAG_RX |
3169                                NETIF_F_HW_VLAN_CTAG_TX |
3170                                NETIF_F_RXALL;
3171
3172         if (hw->mac.type >= e1000_i350)
3173                 netdev->hw_features |= NETIF_F_NTUPLE;
3174
3175         if (pci_using_dac)
3176                 netdev->features |= NETIF_F_HIGHDMA;
3177
3178         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3179         netdev->mpls_features |= NETIF_F_HW_CSUM;
3180         netdev->hw_enc_features |= netdev->vlan_features;
3181
3182         /* set this bit last since it cannot be part of vlan_features */
3183         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3184                             NETIF_F_HW_VLAN_CTAG_RX |
3185                             NETIF_F_HW_VLAN_CTAG_TX;
3186
3187         netdev->priv_flags |= IFF_SUPP_NOFCS;
3188
3189         netdev->priv_flags |= IFF_UNICAST_FLT;
3190
3191         /* MTU range: 68 - 9216 */
3192         netdev->min_mtu = ETH_MIN_MTU;
3193         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3194
3195         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3196
3197         /* before reading the NVM, reset the controller to put the device in a
3198          * known good starting state
3199          */
3200         hw->mac.ops.reset_hw(hw);
3201
3202         /* make sure the NVM is good , i211/i210 parts can have special NVM
3203          * that doesn't contain a checksum
3204          */
3205         switch (hw->mac.type) {
3206         case e1000_i210:
3207         case e1000_i211:
3208                 if (igb_get_flash_presence_i210(hw)) {
3209                         if (hw->nvm.ops.validate(hw) < 0) {
3210                                 dev_err(&pdev->dev,
3211                                         "The NVM Checksum Is Not Valid\n");
3212                                 err = -EIO;
3213                                 goto err_eeprom;
3214                         }
3215                 }
3216                 break;
3217         default:
3218                 if (hw->nvm.ops.validate(hw) < 0) {
3219                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3220                         err = -EIO;
3221                         goto err_eeprom;
3222                 }
3223                 break;
3224         }
3225
3226         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3227                 /* copy the MAC address out of the NVM */
3228                 if (hw->mac.ops.read_mac_addr(hw))
3229                         dev_err(&pdev->dev, "NVM Read Error\n");
3230         }
3231
3232         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
3233
3234         if (!is_valid_ether_addr(netdev->dev_addr)) {
3235                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3236                 err = -EIO;
3237                 goto err_eeprom;
3238         }
3239
3240         igb_set_default_mac_filter(adapter);
3241
3242         /* get firmware version for ethtool -i */
3243         igb_set_fw_version(adapter);
3244
3245         /* configure RXPBSIZE and TXPBSIZE */
3246         if (hw->mac.type == e1000_i210) {
3247                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3248                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3249         }
3250
3251         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3252         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3253
3254         INIT_WORK(&adapter->reset_task, igb_reset_task);
3255         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3256
3257         /* Initialize link properties that are user-changeable */
3258         adapter->fc_autoneg = true;
3259         hw->mac.autoneg = true;
3260         hw->phy.autoneg_advertised = 0x2f;
3261
3262         hw->fc.requested_mode = e1000_fc_default;
3263         hw->fc.current_mode = e1000_fc_default;
3264
3265         igb_validate_mdi_setting(hw);
3266
3267         /* By default, support wake on port A */
3268         if (hw->bus.func == 0)
3269                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3270
3271         /* Check the NVM for wake support on non-port A ports */
3272         if (hw->mac.type >= e1000_82580)
3273                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3274                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3275                                  &eeprom_data);
3276         else if (hw->bus.func == 1)
3277                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3278
3279         if (eeprom_data & IGB_EEPROM_APME)
3280                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3281
3282         /* now that we have the eeprom settings, apply the special cases where
3283          * the eeprom may be wrong or the board simply won't support wake on
3284          * lan on a particular port
3285          */
3286         switch (pdev->device) {
3287         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3288                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3289                 break;
3290         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3291         case E1000_DEV_ID_82576_FIBER:
3292         case E1000_DEV_ID_82576_SERDES:
3293                 /* Wake events only supported on port A for dual fiber
3294                  * regardless of eeprom setting
3295                  */
3296                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3297                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3298                 break;
3299         case E1000_DEV_ID_82576_QUAD_COPPER:
3300         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3301                 /* if quad port adapter, disable WoL on all but port A */
3302                 if (global_quad_port_a != 0)
3303                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3304                 else
3305                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3306                 /* Reset for multiple quad port adapters */
3307                 if (++global_quad_port_a == 4)
3308                         global_quad_port_a = 0;
3309                 break;
3310         default:
3311                 /* If the device can't wake, don't set software support */
3312                 if (!device_can_wakeup(&adapter->pdev->dev))
3313                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3314         }
3315
3316         /* initialize the wol settings based on the eeprom settings */
3317         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3318                 adapter->wol |= E1000_WUFC_MAG;
3319
3320         /* Some vendors want WoL disabled by default, but still supported */
3321         if ((hw->mac.type == e1000_i350) &&
3322             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3323                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3324                 adapter->wol = 0;
3325         }
3326
3327         /* Some vendors want the ability to Use the EEPROM setting as
3328          * enable/disable only, and not for capability
3329          */
3330         if (((hw->mac.type == e1000_i350) ||
3331              (hw->mac.type == e1000_i354)) &&
3332             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3333                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3334                 adapter->wol = 0;
3335         }
3336         if (hw->mac.type == e1000_i350) {
3337                 if (((pdev->subsystem_device == 0x5001) ||
3338                      (pdev->subsystem_device == 0x5002)) &&
3339                                 (hw->bus.func == 0)) {
3340                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3341                         adapter->wol = 0;
3342                 }
3343                 if (pdev->subsystem_device == 0x1F52)
3344                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3345         }
3346
3347         device_set_wakeup_enable(&adapter->pdev->dev,
3348                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3349
3350         /* reset the hardware with the new settings */
3351         igb_reset(adapter);
3352
3353         /* Init the I2C interface */
3354         err = igb_init_i2c(adapter);
3355         if (err) {
3356                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3357                 goto err_eeprom;
3358         }
3359
3360         /* let the f/w know that the h/w is now under the control of the
3361          * driver.
3362          */
3363         igb_get_hw_control(adapter);
3364
3365         strcpy(netdev->name, "eth%d");
3366         err = register_netdev(netdev);
3367         if (err)
3368                 goto err_register;
3369
3370         /* carrier off reporting is important to ethtool even BEFORE open */
3371         netif_carrier_off(netdev);
3372
3373 #ifdef CONFIG_IGB_DCA
3374         if (dca_add_requester(&pdev->dev) == 0) {
3375                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3376                 dev_info(&pdev->dev, "DCA enabled\n");
3377                 igb_setup_dca(adapter);
3378         }
3379
3380 #endif
3381 #ifdef CONFIG_IGB_HWMON
3382         /* Initialize the thermal sensor on i350 devices. */
3383         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3384                 u16 ets_word;
3385
3386                 /* Read the NVM to determine if this i350 device supports an
3387                  * external thermal sensor.
3388                  */
3389                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3390                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3391                         adapter->ets = true;
3392                 else
3393                         adapter->ets = false;
3394                 if (igb_sysfs_init(adapter))
3395                         dev_err(&pdev->dev,
3396                                 "failed to allocate sysfs resources\n");
3397         } else {
3398                 adapter->ets = false;
3399         }
3400 #endif
3401         /* Check if Media Autosense is enabled */
3402         adapter->ei = *ei;
3403         if (hw->dev_spec._82575.mas_capable)
3404                 igb_init_mas(adapter);
3405
3406         /* do hw tstamp init after resetting */
3407         igb_ptp_init(adapter);
3408
3409         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3410         /* print bus type/speed/width info, not applicable to i354 */
3411         if (hw->mac.type != e1000_i354) {
3412                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3413                          netdev->name,
3414                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3415                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3416                            "unknown"),
3417                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3418                           "Width x4" :
3419                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3420                           "Width x2" :
3421                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3422                           "Width x1" : "unknown"), netdev->dev_addr);
3423         }
3424
3425         if ((hw->mac.type >= e1000_i210 ||
3426              igb_get_flash_presence_i210(hw))) {
3427                 ret_val = igb_read_part_string(hw, part_str,
3428                                                E1000_PBANUM_LENGTH);
3429         } else {
3430                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3431         }
3432
3433         if (ret_val)
3434                 strcpy(part_str, "Unknown");
3435         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3436         dev_info(&pdev->dev,
3437                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3438                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3439                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3440                 adapter->num_rx_queues, adapter->num_tx_queues);
3441         if (hw->phy.media_type == e1000_media_type_copper) {
3442                 switch (hw->mac.type) {
3443                 case e1000_i350:
3444                 case e1000_i210:
3445                 case e1000_i211:
3446                         /* Enable EEE for internal copper PHY devices */
3447                         err = igb_set_eee_i350(hw, true, true);
3448                         if ((!err) &&
3449                             (!hw->dev_spec._82575.eee_disable)) {
3450                                 adapter->eee_advert =
3451                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3452                                 adapter->flags |= IGB_FLAG_EEE;
3453                         }
3454                         break;
3455                 case e1000_i354:
3456                         if ((rd32(E1000_CTRL_EXT) &
3457                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3458                                 err = igb_set_eee_i354(hw, true, true);
3459                                 if ((!err) &&
3460                                         (!hw->dev_spec._82575.eee_disable)) {
3461                                         adapter->eee_advert =
3462                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3463                                         adapter->flags |= IGB_FLAG_EEE;
3464                                 }
3465                         }
3466                         break;
3467                 default:
3468                         break;
3469                 }
3470         }
3471         pm_runtime_put_noidle(&pdev->dev);
3472         return 0;
3473
3474 err_register:
3475         igb_release_hw_control(adapter);
3476         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3477 err_eeprom:
3478         if (!igb_check_reset_block(hw))
3479                 igb_reset_phy(hw);
3480
3481         if (hw->flash_address)
3482                 iounmap(hw->flash_address);
3483 err_sw_init:
3484         kfree(adapter->mac_table);
3485         kfree(adapter->shadow_vfta);
3486         igb_clear_interrupt_scheme(adapter);
3487 #ifdef CONFIG_PCI_IOV
3488         igb_disable_sriov(pdev);
3489 #endif
3490         pci_iounmap(pdev, adapter->io_addr);
3491 err_ioremap:
3492         free_netdev(netdev);
3493 err_alloc_etherdev:
3494         pci_release_mem_regions(pdev);
3495 err_pci_reg:
3496 err_dma:
3497         pci_disable_device(pdev);
3498         return err;
3499 }
3500
3501 #ifdef CONFIG_PCI_IOV
3502 static int igb_disable_sriov(struct pci_dev *pdev)
3503 {
3504         struct net_device *netdev = pci_get_drvdata(pdev);
3505         struct igb_adapter *adapter = netdev_priv(netdev);
3506         struct e1000_hw *hw = &adapter->hw;
3507
3508         /* reclaim resources allocated to VFs */
3509         if (adapter->vf_data) {
3510                 /* disable iov and allow time for transactions to clear */
3511                 if (pci_vfs_assigned(pdev)) {
3512                         dev_warn(&pdev->dev,
3513                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3514                         return -EPERM;
3515                 } else {
3516                         pci_disable_sriov(pdev);
3517                         msleep(500);
3518                 }
3519
3520                 kfree(adapter->vf_mac_list);
3521                 adapter->vf_mac_list = NULL;
3522                 kfree(adapter->vf_data);
3523                 adapter->vf_data = NULL;
3524                 adapter->vfs_allocated_count = 0;
3525                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3526                 wrfl();
3527                 msleep(100);
3528                 dev_info(&pdev->dev, "IOV Disabled\n");
3529
3530                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3531                 adapter->flags |= IGB_FLAG_DMAC;
3532         }
3533
3534         return 0;
3535 }
3536
3537 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3538 {
3539         struct net_device *netdev = pci_get_drvdata(pdev);
3540         struct igb_adapter *adapter = netdev_priv(netdev);
3541         int old_vfs = pci_num_vf(pdev);
3542         struct vf_mac_filter *mac_list;
3543         int err = 0;
3544         int num_vf_mac_filters, i;
3545
3546         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3547                 err = -EPERM;
3548                 goto out;
3549         }
3550         if (!num_vfs)
3551                 goto out;
3552
3553         if (old_vfs) {
3554                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3555                          old_vfs, max_vfs);
3556                 adapter->vfs_allocated_count = old_vfs;
3557         } else
3558                 adapter->vfs_allocated_count = num_vfs;
3559
3560         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3561                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3562
3563         /* if allocation failed then we do not support SR-IOV */
3564         if (!adapter->vf_data) {
3565                 adapter->vfs_allocated_count = 0;
3566                 err = -ENOMEM;
3567                 goto out;
3568         }
3569
3570         /* Due to the limited number of RAR entries calculate potential
3571          * number of MAC filters available for the VFs. Reserve entries
3572          * for PF default MAC, PF MAC filters and at least one RAR entry
3573          * for each VF for VF MAC.
3574          */
3575         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3576                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3577                               adapter->vfs_allocated_count);
3578
3579         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3580                                        sizeof(struct vf_mac_filter),
3581                                        GFP_KERNEL);
3582
3583         mac_list = adapter->vf_mac_list;
3584         INIT_LIST_HEAD(&adapter->vf_macs.l);
3585
3586         if (adapter->vf_mac_list) {
3587                 /* Initialize list of VF MAC filters */
3588                 for (i = 0; i < num_vf_mac_filters; i++) {
3589                         mac_list->vf = -1;
3590                         mac_list->free = true;
3591                         list_add(&mac_list->l, &adapter->vf_macs.l);
3592                         mac_list++;
3593                 }
3594         } else {
3595                 /* If we could not allocate memory for the VF MAC filters
3596                  * we can continue without this feature but warn user.
3597                  */
3598                 dev_err(&pdev->dev,
3599                         "Unable to allocate memory for VF MAC filter list\n");
3600         }
3601
3602         /* only call pci_enable_sriov() if no VFs are allocated already */
3603         if (!old_vfs) {
3604                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3605                 if (err)
3606                         goto err_out;
3607         }
3608         dev_info(&pdev->dev, "%d VFs allocated\n",
3609                  adapter->vfs_allocated_count);
3610         for (i = 0; i < adapter->vfs_allocated_count; i++)
3611                 igb_vf_configure(adapter, i);
3612
3613         /* DMA Coalescing is not supported in IOV mode. */
3614         adapter->flags &= ~IGB_FLAG_DMAC;
3615         goto out;
3616
3617 err_out:
3618         kfree(adapter->vf_mac_list);
3619         adapter->vf_mac_list = NULL;
3620         kfree(adapter->vf_data);
3621         adapter->vf_data = NULL;
3622         adapter->vfs_allocated_count = 0;
3623 out:
3624         return err;
3625 }
3626
3627 #endif
3628 /**
3629  *  igb_remove_i2c - Cleanup  I2C interface
3630  *  @adapter: pointer to adapter structure
3631  **/
3632 static void igb_remove_i2c(struct igb_adapter *adapter)
3633 {
3634         /* free the adapter bus structure */
3635         i2c_del_adapter(&adapter->i2c_adap);
3636 }
3637
3638 /**
3639  *  igb_remove - Device Removal Routine
3640  *  @pdev: PCI device information struct
3641  *
3642  *  igb_remove is called by the PCI subsystem to alert the driver
3643  *  that it should release a PCI device.  The could be caused by a
3644  *  Hot-Plug event, or because the driver is going to be removed from
3645  *  memory.
3646  **/
3647 static void igb_remove(struct pci_dev *pdev)
3648 {
3649         struct net_device *netdev = pci_get_drvdata(pdev);
3650         struct igb_adapter *adapter = netdev_priv(netdev);
3651         struct e1000_hw *hw = &adapter->hw;
3652
3653         pm_runtime_get_noresume(&pdev->dev);
3654 #ifdef CONFIG_IGB_HWMON
3655         igb_sysfs_exit(adapter);
3656 #endif
3657         igb_remove_i2c(adapter);
3658         igb_ptp_stop(adapter);
3659         /* The watchdog timer may be rescheduled, so explicitly
3660          * disable watchdog from being rescheduled.
3661          */
3662         set_bit(__IGB_DOWN, &adapter->state);
3663         del_timer_sync(&adapter->watchdog_timer);
3664         del_timer_sync(&adapter->phy_info_timer);
3665
3666         cancel_work_sync(&adapter->reset_task);
3667         cancel_work_sync(&adapter->watchdog_task);
3668
3669 #ifdef CONFIG_IGB_DCA
3670         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3671                 dev_info(&pdev->dev, "DCA disabled\n");
3672                 dca_remove_requester(&pdev->dev);
3673                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3674                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3675         }
3676 #endif
3677
3678         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3679          * would have already happened in close and is redundant.
3680          */
3681         igb_release_hw_control(adapter);
3682
3683 #ifdef CONFIG_PCI_IOV
3684         igb_disable_sriov(pdev);
3685 #endif
3686
3687         unregister_netdev(netdev);
3688
3689         igb_clear_interrupt_scheme(adapter);
3690
3691         pci_iounmap(pdev, adapter->io_addr);
3692         if (hw->flash_address)
3693                 iounmap(hw->flash_address);
3694         pci_release_mem_regions(pdev);
3695
3696         kfree(adapter->mac_table);
3697         kfree(adapter->shadow_vfta);
3698         free_netdev(netdev);
3699
3700         pci_disable_pcie_error_reporting(pdev);
3701
3702         pci_disable_device(pdev);
3703 }
3704
3705 /**
3706  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3707  *  @adapter: board private structure to initialize
3708  *
3709  *  This function initializes the vf specific data storage and then attempts to
3710  *  allocate the VFs.  The reason for ordering it this way is because it is much
3711  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3712  *  the memory for the VFs.
3713  **/
3714 static void igb_probe_vfs(struct igb_adapter *adapter)
3715 {
3716 #ifdef CONFIG_PCI_IOV
3717         struct pci_dev *pdev = adapter->pdev;
3718         struct e1000_hw *hw = &adapter->hw;
3719
3720         /* Virtualization features not supported on i210 family. */
3721         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3722                 return;
3723
3724         /* Of the below we really only want the effect of getting
3725          * IGB_FLAG_HAS_MSIX set (if available), without which
3726          * igb_enable_sriov() has no effect.
3727          */
3728         igb_set_interrupt_capability(adapter, true);
3729         igb_reset_interrupt_capability(adapter);
3730
3731         pci_sriov_set_totalvfs(pdev, 7);
3732         igb_enable_sriov(pdev, max_vfs);
3733
3734 #endif /* CONFIG_PCI_IOV */
3735 }
3736
3737 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3738 {
3739         struct e1000_hw *hw = &adapter->hw;
3740         unsigned int max_rss_queues;
3741
3742         /* Determine the maximum number of RSS queues supported. */
3743         switch (hw->mac.type) {
3744         case e1000_i211:
3745                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3746                 break;
3747         case e1000_82575:
3748         case e1000_i210:
3749                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3750                 break;
3751         case e1000_i350:
3752                 /* I350 cannot do RSS and SR-IOV at the same time */
3753                 if (!!adapter->vfs_allocated_count) {
3754                         max_rss_queues = 1;
3755                         break;
3756                 }
3757                 /* fall through */
3758         case e1000_82576:
3759                 if (!!adapter->vfs_allocated_count) {
3760                         max_rss_queues = 2;
3761                         break;
3762                 }
3763                 /* fall through */
3764         case e1000_82580:
3765         case e1000_i354:
3766         default:
3767                 max_rss_queues = IGB_MAX_RX_QUEUES;
3768                 break;
3769         }
3770
3771         return max_rss_queues;
3772 }
3773
3774 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3775 {
3776         u32 max_rss_queues;
3777
3778         max_rss_queues = igb_get_max_rss_queues(adapter);
3779         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3780
3781         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3782 }
3783
3784 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3785                               const u32 max_rss_queues)
3786 {
3787         struct e1000_hw *hw = &adapter->hw;
3788
3789         /* Determine if we need to pair queues. */
3790         switch (hw->mac.type) {
3791         case e1000_82575:
3792         case e1000_i211:
3793                 /* Device supports enough interrupts without queue pairing. */
3794                 break;
3795         case e1000_82576:
3796         case e1000_82580:
3797         case e1000_i350:
3798         case e1000_i354:
3799         case e1000_i210:
3800         default:
3801                 /* If rss_queues > half of max_rss_queues, pair the queues in
3802                  * order to conserve interrupts due to limited supply.
3803                  */
3804                 if (adapter->rss_queues > (max_rss_queues / 2))
3805                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3806                 else
3807                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3808                 break;
3809         }
3810 }
3811
3812 /**
3813  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3814  *  @adapter: board private structure to initialize
3815  *
3816  *  igb_sw_init initializes the Adapter private data structure.
3817  *  Fields are initialized based on PCI device information and
3818  *  OS network device settings (MTU size).
3819  **/
3820 static int igb_sw_init(struct igb_adapter *adapter)
3821 {
3822         struct e1000_hw *hw = &adapter->hw;
3823         struct net_device *netdev = adapter->netdev;
3824         struct pci_dev *pdev = adapter->pdev;
3825
3826         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3827
3828         /* set default ring sizes */
3829         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3830         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3831
3832         /* set default ITR values */
3833         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
3834         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
3835
3836         /* set default work limits */
3837         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3838
3839         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3840                                   VLAN_HLEN;
3841         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3842
3843         spin_lock_init(&adapter->nfc_lock);
3844         spin_lock_init(&adapter->stats64_lock);
3845 #ifdef CONFIG_PCI_IOV
3846         switch (hw->mac.type) {
3847         case e1000_82576:
3848         case e1000_i350:
3849                 if (max_vfs > 7) {
3850                         dev_warn(&pdev->dev,
3851                                  "Maximum of 7 VFs per PF, using max\n");
3852                         max_vfs = adapter->vfs_allocated_count = 7;
3853                 } else
3854                         adapter->vfs_allocated_count = max_vfs;
3855                 if (adapter->vfs_allocated_count)
3856                         dev_warn(&pdev->dev,
3857                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3858                 break;
3859         default:
3860                 break;
3861         }
3862 #endif /* CONFIG_PCI_IOV */
3863
3864         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3865         adapter->flags |= IGB_FLAG_HAS_MSIX;
3866
3867         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
3868                                      sizeof(struct igb_mac_addr),
3869                                      GFP_KERNEL);
3870         if (!adapter->mac_table)
3871                 return -ENOMEM;
3872
3873         igb_probe_vfs(adapter);
3874
3875         igb_init_queue_configuration(adapter);
3876
3877         /* Setup and initialize a copy of the hw vlan table array */
3878         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
3879                                        GFP_KERNEL);
3880         if (!adapter->shadow_vfta)
3881                 return -ENOMEM;
3882
3883         /* This call may decrease the number of queues */
3884         if (igb_init_interrupt_scheme(adapter, true)) {
3885                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
3886                 return -ENOMEM;
3887         }
3888
3889         /* Explicitly disable IRQ since the NIC can be in any state. */
3890         igb_irq_disable(adapter);
3891
3892         if (hw->mac.type >= e1000_i350)
3893                 adapter->flags &= ~IGB_FLAG_DMAC;
3894
3895         set_bit(__IGB_DOWN, &adapter->state);
3896         return 0;
3897 }
3898
3899 /**
3900  *  igb_open - Called when a network interface is made active
3901  *  @netdev: network interface device structure
3902  *
3903  *  Returns 0 on success, negative value on failure
3904  *
3905  *  The open entry point is called when a network interface is made
3906  *  active by the system (IFF_UP).  At this point all resources needed
3907  *  for transmit and receive operations are allocated, the interrupt
3908  *  handler is registered with the OS, the watchdog timer is started,
3909  *  and the stack is notified that the interface is ready.
3910  **/
3911 static int __igb_open(struct net_device *netdev, bool resuming)
3912 {
3913         struct igb_adapter *adapter = netdev_priv(netdev);
3914         struct e1000_hw *hw = &adapter->hw;
3915         struct pci_dev *pdev = adapter->pdev;
3916         int err;
3917         int i;
3918
3919         /* disallow open during test */
3920         if (test_bit(__IGB_TESTING, &adapter->state)) {
3921                 WARN_ON(resuming);
3922                 return -EBUSY;
3923         }
3924
3925         if (!resuming)
3926                 pm_runtime_get_sync(&pdev->dev);
3927
3928         netif_carrier_off(netdev);
3929
3930         /* allocate transmit descriptors */
3931         err = igb_setup_all_tx_resources(adapter);
3932         if (err)
3933                 goto err_setup_tx;
3934
3935         /* allocate receive descriptors */
3936         err = igb_setup_all_rx_resources(adapter);
3937         if (err)
3938                 goto err_setup_rx;
3939
3940         igb_power_up_link(adapter);
3941
3942         /* before we allocate an interrupt, we must be ready to handle it.
3943          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3944          * as soon as we call pci_request_irq, so we have to setup our
3945          * clean_rx handler before we do so.
3946          */
3947         igb_configure(adapter);
3948
3949         err = igb_request_irq(adapter);
3950         if (err)
3951                 goto err_req_irq;
3952
3953         /* Notify the stack of the actual queue counts. */
3954         err = netif_set_real_num_tx_queues(adapter->netdev,
3955                                            adapter->num_tx_queues);
3956         if (err)
3957                 goto err_set_queues;
3958
3959         err = netif_set_real_num_rx_queues(adapter->netdev,
3960                                            adapter->num_rx_queues);
3961         if (err)
3962                 goto err_set_queues;
3963
3964         /* From here on the code is the same as igb_up() */
3965         clear_bit(__IGB_DOWN, &adapter->state);
3966
3967         for (i = 0; i < adapter->num_q_vectors; i++)
3968                 napi_enable(&(adapter->q_vector[i]->napi));
3969
3970         /* Clear any pending interrupts. */
3971         rd32(E1000_TSICR);
3972         rd32(E1000_ICR);
3973
3974         igb_irq_enable(adapter);
3975
3976         /* notify VFs that reset has been completed */
3977         if (adapter->vfs_allocated_count) {
3978                 u32 reg_data = rd32(E1000_CTRL_EXT);
3979
3980                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3981                 wr32(E1000_CTRL_EXT, reg_data);
3982         }
3983
3984         netif_tx_start_all_queues(netdev);
3985
3986         if (!resuming)
3987                 pm_runtime_put(&pdev->dev);
3988
3989         /* start the watchdog. */
3990         hw->mac.get_link_status = 1;
3991         schedule_work(&adapter->watchdog_task);
3992
3993         return 0;
3994
3995 err_set_queues:
3996         igb_free_irq(adapter);
3997 err_req_irq:
3998         igb_release_hw_control(adapter);
3999         igb_power_down_link(adapter);
4000         igb_free_all_rx_resources(adapter);
4001 err_setup_rx:
4002         igb_free_all_tx_resources(adapter);
4003 err_setup_tx:
4004         igb_reset(adapter);
4005         if (!resuming)
4006                 pm_runtime_put(&pdev->dev);
4007
4008         return err;
4009 }
4010
4011 int igb_open(struct net_device *netdev)
4012 {
4013         return __igb_open(netdev, false);
4014 }
4015
4016 /**
4017  *  igb_close - Disables a network interface
4018  *  @netdev: network interface device structure
4019  *
4020  *  Returns 0, this is not allowed to fail
4021  *
4022  *  The close entry point is called when an interface is de-activated
4023  *  by the OS.  The hardware is still under the driver's control, but
4024  *  needs to be disabled.  A global MAC reset is issued to stop the
4025  *  hardware, and all transmit and receive resources are freed.
4026  **/
4027 static int __igb_close(struct net_device *netdev, bool suspending)
4028 {
4029         struct igb_adapter *adapter = netdev_priv(netdev);
4030         struct pci_dev *pdev = adapter->pdev;
4031
4032         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4033
4034         if (!suspending)
4035                 pm_runtime_get_sync(&pdev->dev);
4036
4037         igb_down(adapter);
4038         igb_free_irq(adapter);
4039
4040         igb_free_all_tx_resources(adapter);
4041         igb_free_all_rx_resources(adapter);
4042
4043         if (!suspending)
4044                 pm_runtime_put_sync(&pdev->dev);
4045         return 0;
4046 }
4047
4048 int igb_close(struct net_device *netdev)
4049 {
4050         if (netif_device_present(netdev) || netdev->dismantle)
4051                 return __igb_close(netdev, false);
4052         return 0;
4053 }
4054
4055 /**
4056  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4057  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4058  *
4059  *  Return 0 on success, negative on failure
4060  **/
4061 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4062 {
4063         struct device *dev = tx_ring->dev;
4064         int size;
4065
4066         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4067
4068         tx_ring->tx_buffer_info = vmalloc(size);
4069         if (!tx_ring->tx_buffer_info)
4070                 goto err;
4071
4072         /* round up to nearest 4K */
4073         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4074         tx_ring->size = ALIGN(tx_ring->size, 4096);
4075
4076         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4077                                            &tx_ring->dma, GFP_KERNEL);
4078         if (!tx_ring->desc)
4079                 goto err;
4080
4081         tx_ring->next_to_use = 0;
4082         tx_ring->next_to_clean = 0;
4083
4084         return 0;
4085
4086 err:
4087         vfree(tx_ring->tx_buffer_info);
4088         tx_ring->tx_buffer_info = NULL;
4089         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4090         return -ENOMEM;
4091 }
4092
4093 /**
4094  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4095  *                               (Descriptors) for all queues
4096  *  @adapter: board private structure
4097  *
4098  *  Return 0 on success, negative on failure
4099  **/
4100 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4101 {
4102         struct pci_dev *pdev = adapter->pdev;
4103         int i, err = 0;
4104
4105         for (i = 0; i < adapter->num_tx_queues; i++) {
4106                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4107                 if (err) {
4108                         dev_err(&pdev->dev,
4109                                 "Allocation for Tx Queue %u failed\n", i);
4110                         for (i--; i >= 0; i--)
4111                                 igb_free_tx_resources(adapter->tx_ring[i]);
4112                         break;
4113                 }
4114         }
4115
4116         return err;
4117 }
4118
4119 /**
4120  *  igb_setup_tctl - configure the transmit control registers
4121  *  @adapter: Board private structure
4122  **/
4123 void igb_setup_tctl(struct igb_adapter *adapter)
4124 {
4125         struct e1000_hw *hw = &adapter->hw;
4126         u32 tctl;
4127
4128         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4129         wr32(E1000_TXDCTL(0), 0);
4130
4131         /* Program the Transmit Control Register */
4132         tctl = rd32(E1000_TCTL);
4133         tctl &= ~E1000_TCTL_CT;
4134         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4135                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4136
4137         igb_config_collision_dist(hw);
4138
4139         /* Enable transmits */
4140         tctl |= E1000_TCTL_EN;
4141
4142         wr32(E1000_TCTL, tctl);
4143 }
4144
4145 /**
4146  *  igb_configure_tx_ring - Configure transmit ring after Reset
4147  *  @adapter: board private structure
4148  *  @ring: tx ring to configure
4149  *
4150  *  Configure a transmit ring after a reset.
4151  **/
4152 void igb_configure_tx_ring(struct igb_adapter *adapter,
4153                            struct igb_ring *ring)
4154 {
4155         struct e1000_hw *hw = &adapter->hw;
4156         u32 txdctl = 0;
4157         u64 tdba = ring->dma;
4158         int reg_idx = ring->reg_idx;
4159
4160         wr32(E1000_TDLEN(reg_idx),
4161              ring->count * sizeof(union e1000_adv_tx_desc));
4162         wr32(E1000_TDBAL(reg_idx),
4163              tdba & 0x00000000ffffffffULL);
4164         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4165
4166         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4167         wr32(E1000_TDH(reg_idx), 0);
4168         writel(0, ring->tail);
4169
4170         txdctl |= IGB_TX_PTHRESH;
4171         txdctl |= IGB_TX_HTHRESH << 8;
4172         txdctl |= IGB_TX_WTHRESH << 16;
4173
4174         /* reinitialize tx_buffer_info */
4175         memset(ring->tx_buffer_info, 0,
4176                sizeof(struct igb_tx_buffer) * ring->count);
4177
4178         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4179         wr32(E1000_TXDCTL(reg_idx), txdctl);
4180 }
4181
4182 /**
4183  *  igb_configure_tx - Configure transmit Unit after Reset
4184  *  @adapter: board private structure
4185  *
4186  *  Configure the Tx unit of the MAC after a reset.
4187  **/
4188 static void igb_configure_tx(struct igb_adapter *adapter)
4189 {
4190         struct e1000_hw *hw = &adapter->hw;
4191         int i;
4192
4193         /* disable the queues */
4194         for (i = 0; i < adapter->num_tx_queues; i++)
4195                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4196
4197         wrfl();
4198         usleep_range(10000, 20000);
4199
4200         for (i = 0; i < adapter->num_tx_queues; i++)
4201                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4202 }
4203
4204 /**
4205  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4206  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4207  *
4208  *  Returns 0 on success, negative on failure
4209  **/
4210 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4211 {
4212         struct device *dev = rx_ring->dev;
4213         int size;
4214
4215         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4216
4217         rx_ring->rx_buffer_info = vmalloc(size);
4218         if (!rx_ring->rx_buffer_info)
4219                 goto err;
4220
4221         /* Round up to nearest 4K */
4222         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4223         rx_ring->size = ALIGN(rx_ring->size, 4096);
4224
4225         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4226                                            &rx_ring->dma, GFP_KERNEL);
4227         if (!rx_ring->desc)
4228                 goto err;
4229
4230         rx_ring->next_to_alloc = 0;
4231         rx_ring->next_to_clean = 0;
4232         rx_ring->next_to_use = 0;
4233
4234         return 0;
4235
4236 err:
4237         vfree(rx_ring->rx_buffer_info);
4238         rx_ring->rx_buffer_info = NULL;
4239         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4240         return -ENOMEM;
4241 }
4242
4243 /**
4244  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4245  *                               (Descriptors) for all queues
4246  *  @adapter: board private structure
4247  *
4248  *  Return 0 on success, negative on failure
4249  **/
4250 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4251 {
4252         struct pci_dev *pdev = adapter->pdev;
4253         int i, err = 0;
4254
4255         for (i = 0; i < adapter->num_rx_queues; i++) {
4256                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4257                 if (err) {
4258                         dev_err(&pdev->dev,
4259                                 "Allocation for Rx Queue %u failed\n", i);
4260                         for (i--; i >= 0; i--)
4261                                 igb_free_rx_resources(adapter->rx_ring[i]);
4262                         break;
4263                 }
4264         }
4265
4266         return err;
4267 }
4268
4269 /**
4270  *  igb_setup_mrqc - configure the multiple receive queue control registers
4271  *  @adapter: Board private structure
4272  **/
4273 static void igb_setup_mrqc(struct igb_adapter *adapter)
4274 {
4275         struct e1000_hw *hw = &adapter->hw;
4276         u32 mrqc, rxcsum;
4277         u32 j, num_rx_queues;
4278         u32 rss_key[10];
4279
4280         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4281         for (j = 0; j < 10; j++)
4282                 wr32(E1000_RSSRK(j), rss_key[j]);
4283
4284         num_rx_queues = adapter->rss_queues;
4285
4286         switch (hw->mac.type) {
4287         case e1000_82576:
4288                 /* 82576 supports 2 RSS queues for SR-IOV */
4289                 if (adapter->vfs_allocated_count)
4290                         num_rx_queues = 2;
4291                 break;
4292         default:
4293                 break;
4294         }
4295
4296         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4297                 for (j = 0; j < IGB_RETA_SIZE; j++)
4298                         adapter->rss_indir_tbl[j] =
4299                         (j * num_rx_queues) / IGB_RETA_SIZE;
4300                 adapter->rss_indir_tbl_init = num_rx_queues;
4301         }
4302         igb_write_rss_indir_tbl(adapter);
4303
4304         /* Disable raw packet checksumming so that RSS hash is placed in
4305          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4306          * offloads as they are enabled by default
4307          */
4308         rxcsum = rd32(E1000_RXCSUM);
4309         rxcsum |= E1000_RXCSUM_PCSD;
4310
4311         if (adapter->hw.mac.type >= e1000_82576)
4312                 /* Enable Receive Checksum Offload for SCTP */
4313                 rxcsum |= E1000_RXCSUM_CRCOFL;
4314
4315         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4316         wr32(E1000_RXCSUM, rxcsum);
4317
4318         /* Generate RSS hash based on packet types, TCP/UDP
4319          * port numbers and/or IPv4/v6 src and dst addresses
4320          */
4321         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4322                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4323                E1000_MRQC_RSS_FIELD_IPV6 |
4324                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4325                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4326
4327         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4328                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4329         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4330                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4331
4332         /* If VMDq is enabled then we set the appropriate mode for that, else
4333          * we default to RSS so that an RSS hash is calculated per packet even
4334          * if we are only using one queue
4335          */
4336         if (adapter->vfs_allocated_count) {
4337                 if (hw->mac.type > e1000_82575) {
4338                         /* Set the default pool for the PF's first queue */
4339                         u32 vtctl = rd32(E1000_VT_CTL);
4340
4341                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4342                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4343                         vtctl |= adapter->vfs_allocated_count <<
4344                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4345                         wr32(E1000_VT_CTL, vtctl);
4346                 }
4347                 if (adapter->rss_queues > 1)
4348                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4349                 else
4350                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4351         } else {
4352                 if (hw->mac.type != e1000_i211)
4353                         mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4354         }
4355         igb_vmm_control(adapter);
4356
4357         wr32(E1000_MRQC, mrqc);
4358 }
4359
4360 /**
4361  *  igb_setup_rctl - configure the receive control registers
4362  *  @adapter: Board private structure
4363  **/
4364 void igb_setup_rctl(struct igb_adapter *adapter)
4365 {
4366         struct e1000_hw *hw = &adapter->hw;
4367         u32 rctl;
4368
4369         rctl = rd32(E1000_RCTL);
4370
4371         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4372         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4373
4374         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4375                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4376
4377         /* enable stripping of CRC. It's unlikely this will break BMC
4378          * redirection as it did with e1000. Newer features require
4379          * that the HW strips the CRC.
4380          */
4381         rctl |= E1000_RCTL_SECRC;
4382
4383         /* disable store bad packets and clear size bits. */
4384         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4385
4386         /* enable LPE to allow for reception of jumbo frames */
4387         rctl |= E1000_RCTL_LPE;
4388
4389         /* disable queue 0 to prevent tail write w/o re-config */
4390         wr32(E1000_RXDCTL(0), 0);
4391
4392         /* Attention!!!  For SR-IOV PF driver operations you must enable
4393          * queue drop for all VF and PF queues to prevent head of line blocking
4394          * if an un-trusted VF does not provide descriptors to hardware.
4395          */
4396         if (adapter->vfs_allocated_count) {
4397                 /* set all queue drop enable bits */
4398                 wr32(E1000_QDE, ALL_QUEUES);
4399         }
4400
4401         /* This is useful for sniffing bad packets. */
4402         if (adapter->netdev->features & NETIF_F_RXALL) {
4403                 /* UPE and MPE will be handled by normal PROMISC logic
4404                  * in e1000e_set_rx_mode
4405                  */
4406                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4407                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4408                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4409
4410                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4411                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4412                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4413                  * and that breaks VLANs.
4414                  */
4415         }
4416
4417         wr32(E1000_RCTL, rctl);
4418 }
4419
4420 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4421                                    int vfn)
4422 {
4423         struct e1000_hw *hw = &adapter->hw;
4424         u32 vmolr;
4425
4426         if (size > MAX_JUMBO_FRAME_SIZE)
4427                 size = MAX_JUMBO_FRAME_SIZE;
4428
4429         vmolr = rd32(E1000_VMOLR(vfn));
4430         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4431         vmolr |= size | E1000_VMOLR_LPE;
4432         wr32(E1000_VMOLR(vfn), vmolr);
4433
4434         return 0;
4435 }
4436
4437 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4438                                          int vfn, bool enable)
4439 {
4440         struct e1000_hw *hw = &adapter->hw;
4441         u32 val, reg;
4442
4443         if (hw->mac.type < e1000_82576)
4444                 return;
4445
4446         if (hw->mac.type == e1000_i350)
4447                 reg = E1000_DVMOLR(vfn);
4448         else
4449                 reg = E1000_VMOLR(vfn);
4450
4451         val = rd32(reg);
4452         if (enable)
4453                 val |= E1000_VMOLR_STRVLAN;
4454         else
4455                 val &= ~(E1000_VMOLR_STRVLAN);
4456         wr32(reg, val);
4457 }
4458
4459 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4460                                  int vfn, bool aupe)
4461 {
4462         struct e1000_hw *hw = &adapter->hw;
4463         u32 vmolr;
4464
4465         /* This register exists only on 82576 and newer so if we are older then
4466          * we should exit and do nothing
4467          */
4468         if (hw->mac.type < e1000_82576)
4469                 return;
4470
4471         vmolr = rd32(E1000_VMOLR(vfn));
4472         if (aupe)
4473                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4474         else
4475                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4476
4477         /* clear all bits that might not be set */
4478         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4479
4480         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4481                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4482         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4483          * multicast packets
4484          */
4485         if (vfn <= adapter->vfs_allocated_count)
4486                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4487
4488         wr32(E1000_VMOLR(vfn), vmolr);
4489 }
4490
4491 /**
4492  *  igb_configure_rx_ring - Configure a receive ring after Reset
4493  *  @adapter: board private structure
4494  *  @ring: receive ring to be configured
4495  *
4496  *  Configure the Rx unit of the MAC after a reset.
4497  **/
4498 void igb_configure_rx_ring(struct igb_adapter *adapter,
4499                            struct igb_ring *ring)
4500 {
4501         struct e1000_hw *hw = &adapter->hw;
4502         union e1000_adv_rx_desc *rx_desc;
4503         u64 rdba = ring->dma;
4504         int reg_idx = ring->reg_idx;
4505         u32 srrctl = 0, rxdctl = 0;
4506
4507         /* disable the queue */
4508         wr32(E1000_RXDCTL(reg_idx), 0);
4509
4510         /* Set DMA base address registers */
4511         wr32(E1000_RDBAL(reg_idx),
4512              rdba & 0x00000000ffffffffULL);
4513         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4514         wr32(E1000_RDLEN(reg_idx),
4515              ring->count * sizeof(union e1000_adv_rx_desc));
4516
4517         /* initialize head and tail */
4518         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4519         wr32(E1000_RDH(reg_idx), 0);
4520         writel(0, ring->tail);
4521
4522         /* set descriptor configuration */
4523         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4524         if (ring_uses_large_buffer(ring))
4525                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4526         else
4527                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4528         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4529         if (hw->mac.type >= e1000_82580)
4530                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4531         /* Only set Drop Enable if we are supporting multiple queues */
4532         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
4533                 srrctl |= E1000_SRRCTL_DROP_EN;
4534
4535         wr32(E1000_SRRCTL(reg_idx), srrctl);
4536
4537         /* set filtering for VMDQ pools */
4538         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4539
4540         rxdctl |= IGB_RX_PTHRESH;
4541         rxdctl |= IGB_RX_HTHRESH << 8;
4542         rxdctl |= IGB_RX_WTHRESH << 16;
4543
4544         /* initialize rx_buffer_info */
4545         memset(ring->rx_buffer_info, 0,
4546                sizeof(struct igb_rx_buffer) * ring->count);
4547
4548         /* initialize Rx descriptor 0 */
4549         rx_desc = IGB_RX_DESC(ring, 0);
4550         rx_desc->wb.upper.length = 0;
4551
4552         /* enable receive descriptor fetching */
4553         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4554         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4555 }
4556
4557 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4558                                   struct igb_ring *rx_ring)
4559 {
4560         /* set build_skb and buffer size flags */
4561         clear_ring_build_skb_enabled(rx_ring);
4562         clear_ring_uses_large_buffer(rx_ring);
4563
4564         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4565                 return;
4566
4567         set_ring_build_skb_enabled(rx_ring);
4568
4569 #if (PAGE_SIZE < 8192)
4570         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4571                 return;
4572
4573         set_ring_uses_large_buffer(rx_ring);
4574 #endif
4575 }
4576
4577 /**
4578  *  igb_configure_rx - Configure receive Unit after Reset
4579  *  @adapter: board private structure
4580  *
4581  *  Configure the Rx unit of the MAC after a reset.
4582  **/
4583 static void igb_configure_rx(struct igb_adapter *adapter)
4584 {
4585         int i;
4586
4587         /* set the correct pool for the PF default MAC address in entry 0 */
4588         igb_set_default_mac_filter(adapter);
4589
4590         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4591          * the Base and Length of the Rx Descriptor Ring
4592          */
4593         for (i = 0; i < adapter->num_rx_queues; i++) {
4594                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4595
4596                 igb_set_rx_buffer_len(adapter, rx_ring);
4597                 igb_configure_rx_ring(adapter, rx_ring);
4598         }
4599 }
4600
4601 /**
4602  *  igb_free_tx_resources - Free Tx Resources per Queue
4603  *  @tx_ring: Tx descriptor ring for a specific queue
4604  *
4605  *  Free all transmit software resources
4606  **/
4607 void igb_free_tx_resources(struct igb_ring *tx_ring)
4608 {
4609         igb_clean_tx_ring(tx_ring);
4610
4611         vfree(tx_ring->tx_buffer_info);
4612         tx_ring->tx_buffer_info = NULL;
4613
4614         /* if not set, then don't free */
4615         if (!tx_ring->desc)
4616                 return;
4617
4618         dma_free_coherent(tx_ring->dev, tx_ring->size,
4619                           tx_ring->desc, tx_ring->dma);
4620
4621         tx_ring->desc = NULL;
4622 }
4623
4624 /**
4625  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4626  *  @adapter: board private structure
4627  *
4628  *  Free all transmit software resources
4629  **/
4630 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4631 {
4632         int i;
4633
4634         for (i = 0; i < adapter->num_tx_queues; i++)
4635                 if (adapter->tx_ring[i])
4636                         igb_free_tx_resources(adapter->tx_ring[i]);
4637 }
4638
4639 /**
4640  *  igb_clean_tx_ring - Free Tx Buffers
4641  *  @tx_ring: ring to be cleaned
4642  **/
4643 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4644 {
4645         u16 i = tx_ring->next_to_clean;
4646         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4647
4648         while (i != tx_ring->next_to_use) {
4649                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4650
4651                 /* Free all the Tx ring sk_buffs */
4652                 dev_kfree_skb_any(tx_buffer->skb);
4653
4654                 /* unmap skb header data */
4655                 dma_unmap_single(tx_ring->dev,
4656                                  dma_unmap_addr(tx_buffer, dma),
4657                                  dma_unmap_len(tx_buffer, len),
4658                                  DMA_TO_DEVICE);
4659
4660                 /* check for eop_desc to determine the end of the packet */
4661                 eop_desc = tx_buffer->next_to_watch;
4662                 tx_desc = IGB_TX_DESC(tx_ring, i);
4663
4664                 /* unmap remaining buffers */
4665                 while (tx_desc != eop_desc) {
4666                         tx_buffer++;
4667                         tx_desc++;
4668                         i++;
4669                         if (unlikely(i == tx_ring->count)) {
4670                                 i = 0;
4671                                 tx_buffer = tx_ring->tx_buffer_info;
4672                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4673                         }
4674
4675                         /* unmap any remaining paged data */
4676                         if (dma_unmap_len(tx_buffer, len))
4677                                 dma_unmap_page(tx_ring->dev,
4678                                                dma_unmap_addr(tx_buffer, dma),
4679                                                dma_unmap_len(tx_buffer, len),
4680                                                DMA_TO_DEVICE);
4681                 }
4682
4683                 /* move us one more past the eop_desc for start of next pkt */
4684                 tx_buffer++;
4685                 i++;
4686                 if (unlikely(i == tx_ring->count)) {
4687                         i = 0;
4688                         tx_buffer = tx_ring->tx_buffer_info;
4689                 }
4690         }
4691
4692         /* reset BQL for queue */
4693         netdev_tx_reset_queue(txring_txq(tx_ring));
4694
4695         /* reset next_to_use and next_to_clean */
4696         tx_ring->next_to_use = 0;
4697         tx_ring->next_to_clean = 0;
4698 }
4699
4700 /**
4701  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4702  *  @adapter: board private structure
4703  **/
4704 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4705 {
4706         int i;
4707
4708         for (i = 0; i < adapter->num_tx_queues; i++)
4709                 if (adapter->tx_ring[i])
4710                         igb_clean_tx_ring(adapter->tx_ring[i]);
4711 }
4712
4713 /**
4714  *  igb_free_rx_resources - Free Rx Resources
4715  *  @rx_ring: ring to clean the resources from
4716  *
4717  *  Free all receive software resources
4718  **/
4719 void igb_free_rx_resources(struct igb_ring *rx_ring)
4720 {
4721         igb_clean_rx_ring(rx_ring);
4722
4723         vfree(rx_ring->rx_buffer_info);
4724         rx_ring->rx_buffer_info = NULL;
4725
4726         /* if not set, then don't free */
4727         if (!rx_ring->desc)
4728                 return;
4729
4730         dma_free_coherent(rx_ring->dev, rx_ring->size,
4731                           rx_ring->desc, rx_ring->dma);
4732
4733         rx_ring->desc = NULL;
4734 }
4735
4736 /**
4737  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4738  *  @adapter: board private structure
4739  *
4740  *  Free all receive software resources
4741  **/
4742 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4743 {
4744         int i;
4745
4746         for (i = 0; i < adapter->num_rx_queues; i++)
4747                 if (adapter->rx_ring[i])
4748                         igb_free_rx_resources(adapter->rx_ring[i]);
4749 }
4750
4751 /**
4752  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4753  *  @rx_ring: ring to free buffers from
4754  **/
4755 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4756 {
4757         u16 i = rx_ring->next_to_clean;
4758
4759         if (rx_ring->skb)
4760                 dev_kfree_skb(rx_ring->skb);
4761         rx_ring->skb = NULL;
4762
4763         /* Free all the Rx ring sk_buffs */
4764         while (i != rx_ring->next_to_alloc) {
4765                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4766
4767                 /* Invalidate cache lines that may have been written to by
4768                  * device so that we avoid corrupting memory.
4769                  */
4770                 dma_sync_single_range_for_cpu(rx_ring->dev,
4771                                               buffer_info->dma,
4772                                               buffer_info->page_offset,
4773                                               igb_rx_bufsz(rx_ring),
4774                                               DMA_FROM_DEVICE);
4775
4776                 /* free resources associated with mapping */
4777                 dma_unmap_page_attrs(rx_ring->dev,
4778                                      buffer_info->dma,
4779                                      igb_rx_pg_size(rx_ring),
4780                                      DMA_FROM_DEVICE,
4781                                      IGB_RX_DMA_ATTR);
4782                 __page_frag_cache_drain(buffer_info->page,
4783                                         buffer_info->pagecnt_bias);
4784
4785                 i++;
4786                 if (i == rx_ring->count)
4787                         i = 0;
4788         }
4789
4790         rx_ring->next_to_alloc = 0;
4791         rx_ring->next_to_clean = 0;
4792         rx_ring->next_to_use = 0;
4793 }
4794
4795 /**
4796  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
4797  *  @adapter: board private structure
4798  **/
4799 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4800 {
4801         int i;
4802
4803         for (i = 0; i < adapter->num_rx_queues; i++)
4804                 if (adapter->rx_ring[i])
4805                         igb_clean_rx_ring(adapter->rx_ring[i]);
4806 }
4807
4808 /**
4809  *  igb_set_mac - Change the Ethernet Address of the NIC
4810  *  @netdev: network interface device structure
4811  *  @p: pointer to an address structure
4812  *
4813  *  Returns 0 on success, negative on failure
4814  **/
4815 static int igb_set_mac(struct net_device *netdev, void *p)
4816 {
4817         struct igb_adapter *adapter = netdev_priv(netdev);
4818         struct e1000_hw *hw = &adapter->hw;
4819         struct sockaddr *addr = p;
4820
4821         if (!is_valid_ether_addr(addr->sa_data))
4822                 return -EADDRNOTAVAIL;
4823
4824         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4825         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4826
4827         /* set the correct pool for the new PF MAC address in entry 0 */
4828         igb_set_default_mac_filter(adapter);
4829
4830         return 0;
4831 }
4832
4833 /**
4834  *  igb_write_mc_addr_list - write multicast addresses to MTA
4835  *  @netdev: network interface device structure
4836  *
4837  *  Writes multicast address list to the MTA hash table.
4838  *  Returns: -ENOMEM on failure
4839  *           0 on no addresses written
4840  *           X on writing X addresses to MTA
4841  **/
4842 static int igb_write_mc_addr_list(struct net_device *netdev)
4843 {
4844         struct igb_adapter *adapter = netdev_priv(netdev);
4845         struct e1000_hw *hw = &adapter->hw;
4846         struct netdev_hw_addr *ha;
4847         u8  *mta_list;
4848         int i;
4849
4850         if (netdev_mc_empty(netdev)) {
4851                 /* nothing to program, so clear mc list */
4852                 igb_update_mc_addr_list(hw, NULL, 0);
4853                 igb_restore_vf_multicasts(adapter);
4854                 return 0;
4855         }
4856
4857         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
4858         if (!mta_list)
4859                 return -ENOMEM;
4860
4861         /* The shared function expects a packed array of only addresses. */
4862         i = 0;
4863         netdev_for_each_mc_addr(ha, netdev)
4864                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4865
4866         igb_update_mc_addr_list(hw, mta_list, i);
4867         kfree(mta_list);
4868
4869         return netdev_mc_count(netdev);
4870 }
4871
4872 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
4873 {
4874         struct e1000_hw *hw = &adapter->hw;
4875         u32 i, pf_id;
4876
4877         switch (hw->mac.type) {
4878         case e1000_i210:
4879         case e1000_i211:
4880         case e1000_i350:
4881                 /* VLAN filtering needed for VLAN prio filter */
4882                 if (adapter->netdev->features & NETIF_F_NTUPLE)
4883                         break;
4884                 /* fall through */
4885         case e1000_82576:
4886         case e1000_82580:
4887         case e1000_i354:
4888                 /* VLAN filtering needed for pool filtering */
4889                 if (adapter->vfs_allocated_count)
4890                         break;
4891                 /* fall through */
4892         default:
4893                 return 1;
4894         }
4895
4896         /* We are already in VLAN promisc, nothing to do */
4897         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
4898                 return 0;
4899
4900         if (!adapter->vfs_allocated_count)
4901                 goto set_vfta;
4902
4903         /* Add PF to all active pools */
4904         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4905
4906         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4907                 u32 vlvf = rd32(E1000_VLVF(i));
4908
4909                 vlvf |= BIT(pf_id);
4910                 wr32(E1000_VLVF(i), vlvf);
4911         }
4912
4913 set_vfta:
4914         /* Set all bits in the VLAN filter table array */
4915         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
4916                 hw->mac.ops.write_vfta(hw, i, ~0U);
4917
4918         /* Set flag so we don't redo unnecessary work */
4919         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
4920
4921         return 0;
4922 }
4923
4924 #define VFTA_BLOCK_SIZE 8
4925 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
4926 {
4927         struct e1000_hw *hw = &adapter->hw;
4928         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4929         u32 vid_start = vfta_offset * 32;
4930         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4931         u32 i, vid, word, bits, pf_id;
4932
4933         /* guarantee that we don't scrub out management VLAN */
4934         vid = adapter->mng_vlan_id;
4935         if (vid >= vid_start && vid < vid_end)
4936                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4937
4938         if (!adapter->vfs_allocated_count)
4939                 goto set_vfta;
4940
4941         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
4942
4943         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
4944                 u32 vlvf = rd32(E1000_VLVF(i));
4945
4946                 /* pull VLAN ID from VLVF */
4947                 vid = vlvf & VLAN_VID_MASK;
4948
4949                 /* only concern ourselves with a certain range */
4950                 if (vid < vid_start || vid >= vid_end)
4951                         continue;
4952
4953                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
4954                         /* record VLAN ID in VFTA */
4955                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4956
4957                         /* if PF is part of this then continue */
4958                         if (test_bit(vid, adapter->active_vlans))
4959                                 continue;
4960                 }
4961
4962                 /* remove PF from the pool */
4963                 bits = ~BIT(pf_id);
4964                 bits &= rd32(E1000_VLVF(i));
4965                 wr32(E1000_VLVF(i), bits);
4966         }
4967
4968 set_vfta:
4969         /* extract values from active_vlans and write back to VFTA */
4970         for (i = VFTA_BLOCK_SIZE; i--;) {
4971                 vid = (vfta_offset + i) * 32;
4972                 word = vid / BITS_PER_LONG;
4973                 bits = vid % BITS_PER_LONG;
4974
4975                 vfta[i] |= adapter->active_vlans[word] >> bits;
4976
4977                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
4978         }
4979 }
4980
4981 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
4982 {
4983         u32 i;
4984
4985         /* We are not in VLAN promisc, nothing to do */
4986         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
4987                 return;
4988
4989         /* Set flag so we don't redo unnecessary work */
4990         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
4991
4992         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
4993                 igb_scrub_vfta(adapter, i);
4994 }
4995
4996 /**
4997  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4998  *  @netdev: network interface device structure
4999  *
5000  *  The set_rx_mode entry point is called whenever the unicast or multicast
5001  *  address lists or the network interface flags are updated.  This routine is
5002  *  responsible for configuring the hardware for proper unicast, multicast,
5003  *  promiscuous mode, and all-multi behavior.
5004  **/
5005 static void igb_set_rx_mode(struct net_device *netdev)
5006 {
5007         struct igb_adapter *adapter = netdev_priv(netdev);
5008         struct e1000_hw *hw = &adapter->hw;
5009         unsigned int vfn = adapter->vfs_allocated_count;
5010         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5011         int count;
5012
5013         /* Check for Promiscuous and All Multicast modes */
5014         if (netdev->flags & IFF_PROMISC) {
5015                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5016                 vmolr |= E1000_VMOLR_MPME;
5017
5018                 /* enable use of UTA filter to force packets to default pool */
5019                 if (hw->mac.type == e1000_82576)
5020                         vmolr |= E1000_VMOLR_ROPE;
5021         } else {
5022                 if (netdev->flags & IFF_ALLMULTI) {
5023                         rctl |= E1000_RCTL_MPE;
5024                         vmolr |= E1000_VMOLR_MPME;
5025                 } else {
5026                         /* Write addresses to the MTA, if the attempt fails
5027                          * then we should just turn on promiscuous mode so
5028                          * that we can at least receive multicast traffic
5029                          */
5030                         count = igb_write_mc_addr_list(netdev);
5031                         if (count < 0) {
5032                                 rctl |= E1000_RCTL_MPE;
5033                                 vmolr |= E1000_VMOLR_MPME;
5034                         } else if (count) {
5035                                 vmolr |= E1000_VMOLR_ROMPE;
5036                         }
5037                 }
5038         }
5039
5040         /* Write addresses to available RAR registers, if there is not
5041          * sufficient space to store all the addresses then enable
5042          * unicast promiscuous mode
5043          */
5044         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5045                 rctl |= E1000_RCTL_UPE;
5046                 vmolr |= E1000_VMOLR_ROPE;
5047         }
5048
5049         /* enable VLAN filtering by default */
5050         rctl |= E1000_RCTL_VFE;
5051
5052         /* disable VLAN filtering for modes that require it */
5053         if ((netdev->flags & IFF_PROMISC) ||
5054             (netdev->features & NETIF_F_RXALL)) {
5055                 /* if we fail to set all rules then just clear VFE */
5056                 if (igb_vlan_promisc_enable(adapter))
5057                         rctl &= ~E1000_RCTL_VFE;
5058         } else {
5059                 igb_vlan_promisc_disable(adapter);
5060         }
5061
5062         /* update state of unicast, multicast, and VLAN filtering modes */
5063         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5064                                      E1000_RCTL_VFE);
5065         wr32(E1000_RCTL, rctl);
5066
5067 #if (PAGE_SIZE < 8192)
5068         if (!adapter->vfs_allocated_count) {
5069                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5070                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5071         }
5072 #endif
5073         wr32(E1000_RLPML, rlpml);
5074
5075         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5076          * the VMOLR to enable the appropriate modes.  Without this workaround
5077          * we will have issues with VLAN tag stripping not being done for frames
5078          * that are only arriving because we are the default pool
5079          */
5080         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5081                 return;
5082
5083         /* set UTA to appropriate mode */
5084         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5085
5086         vmolr |= rd32(E1000_VMOLR(vfn)) &
5087                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5088
5089         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5090         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5091 #if (PAGE_SIZE < 8192)
5092         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5093                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5094         else
5095 #endif
5096                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5097         vmolr |= E1000_VMOLR_LPE;
5098
5099         wr32(E1000_VMOLR(vfn), vmolr);
5100
5101         igb_restore_vf_multicasts(adapter);
5102 }
5103
5104 static void igb_check_wvbr(struct igb_adapter *adapter)
5105 {
5106         struct e1000_hw *hw = &adapter->hw;
5107         u32 wvbr = 0;
5108
5109         switch (hw->mac.type) {
5110         case e1000_82576:
5111         case e1000_i350:
5112                 wvbr = rd32(E1000_WVBR);
5113                 if (!wvbr)
5114                         return;
5115                 break;
5116         default:
5117                 break;
5118         }
5119
5120         adapter->wvbr |= wvbr;
5121 }
5122
5123 #define IGB_STAGGERED_QUEUE_OFFSET 8
5124
5125 static void igb_spoof_check(struct igb_adapter *adapter)
5126 {
5127         int j;
5128
5129         if (!adapter->wvbr)
5130                 return;
5131
5132         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5133                 if (adapter->wvbr & BIT(j) ||
5134                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5135                         dev_warn(&adapter->pdev->dev,
5136                                 "Spoof event(s) detected on VF %d\n", j);
5137                         adapter->wvbr &=
5138                                 ~(BIT(j) |
5139                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5140                 }
5141         }
5142 }
5143
5144 /* Need to wait a few seconds after link up to get diagnostic information from
5145  * the phy
5146  */
5147 static void igb_update_phy_info(struct timer_list *t)
5148 {
5149         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5150         igb_get_phy_info(&adapter->hw);
5151 }
5152
5153 /**
5154  *  igb_has_link - check shared code for link and determine up/down
5155  *  @adapter: pointer to driver private info
5156  **/
5157 bool igb_has_link(struct igb_adapter *adapter)
5158 {
5159         struct e1000_hw *hw = &adapter->hw;
5160         bool link_active = false;
5161
5162         /* get_link_status is set on LSC (link status) interrupt or
5163          * rx sequence error interrupt.  get_link_status will stay
5164          * false until the e1000_check_for_link establishes link
5165          * for copper adapters ONLY
5166          */
5167         switch (hw->phy.media_type) {
5168         case e1000_media_type_copper:
5169                 if (!hw->mac.get_link_status)
5170                         return true;
5171                 /* fall through */
5172         case e1000_media_type_internal_serdes:
5173                 hw->mac.ops.check_for_link(hw);
5174                 link_active = !hw->mac.get_link_status;
5175                 break;
5176         default:
5177         case e1000_media_type_unknown:
5178                 break;
5179         }
5180
5181         if (((hw->mac.type == e1000_i210) ||
5182              (hw->mac.type == e1000_i211)) &&
5183              (hw->phy.id == I210_I_PHY_ID)) {
5184                 if (!netif_carrier_ok(adapter->netdev)) {
5185                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5186                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5187                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5188                         adapter->link_check_timeout = jiffies;
5189                 }
5190         }
5191
5192         return link_active;
5193 }
5194
5195 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5196 {
5197         bool ret = false;
5198         u32 ctrl_ext, thstat;
5199
5200         /* check for thermal sensor event on i350 copper only */
5201         if (hw->mac.type == e1000_i350) {
5202                 thstat = rd32(E1000_THSTAT);
5203                 ctrl_ext = rd32(E1000_CTRL_EXT);
5204
5205                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5206                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5207                         ret = !!(thstat & event);
5208         }
5209
5210         return ret;
5211 }
5212
5213 /**
5214  *  igb_check_lvmmc - check for malformed packets received
5215  *  and indicated in LVMMC register
5216  *  @adapter: pointer to adapter
5217  **/
5218 static void igb_check_lvmmc(struct igb_adapter *adapter)
5219 {
5220         struct e1000_hw *hw = &adapter->hw;
5221         u32 lvmmc;
5222
5223         lvmmc = rd32(E1000_LVMMC);
5224         if (lvmmc) {
5225                 if (unlikely(net_ratelimit())) {
5226                         netdev_warn(adapter->netdev,
5227                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5228                                     lvmmc);
5229                 }
5230         }
5231 }
5232
5233 /**
5234  *  igb_watchdog - Timer Call-back
5235  *  @data: pointer to adapter cast into an unsigned long
5236  **/
5237 static void igb_watchdog(struct timer_list *t)
5238 {
5239         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5240         /* Do the rest outside of interrupt context */
5241         schedule_work(&adapter->watchdog_task);
5242 }
5243
5244 static void igb_watchdog_task(struct work_struct *work)
5245 {
5246         struct igb_adapter *adapter = container_of(work,
5247                                                    struct igb_adapter,
5248                                                    watchdog_task);
5249         struct e1000_hw *hw = &adapter->hw;
5250         struct e1000_phy_info *phy = &hw->phy;
5251         struct net_device *netdev = adapter->netdev;
5252         u32 link;
5253         int i;
5254         u32 connsw;
5255         u16 phy_data, retry_count = 20;
5256
5257         link = igb_has_link(adapter);
5258
5259         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5260                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5261                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5262                 else
5263                         link = false;
5264         }
5265
5266         /* Force link down if we have fiber to swap to */
5267         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5268                 if (hw->phy.media_type == e1000_media_type_copper) {
5269                         connsw = rd32(E1000_CONNSW);
5270                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5271                                 link = 0;
5272                 }
5273         }
5274         if (link) {
5275                 /* Perform a reset if the media type changed. */
5276                 if (hw->dev_spec._82575.media_changed) {
5277                         hw->dev_spec._82575.media_changed = false;
5278                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5279                         igb_reset(adapter);
5280                 }
5281                 /* Cancel scheduled suspend requests. */
5282                 pm_runtime_resume(netdev->dev.parent);
5283
5284                 if (!netif_carrier_ok(netdev)) {
5285                         u32 ctrl;
5286
5287                         hw->mac.ops.get_speed_and_duplex(hw,
5288                                                          &adapter->link_speed,
5289                                                          &adapter->link_duplex);
5290
5291                         ctrl = rd32(E1000_CTRL);
5292                         /* Links status message must follow this format */
5293                         netdev_info(netdev,
5294                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5295                                netdev->name,
5296                                adapter->link_speed,
5297                                adapter->link_duplex == FULL_DUPLEX ?
5298                                "Full" : "Half",
5299                                (ctrl & E1000_CTRL_TFCE) &&
5300                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5301                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5302                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5303
5304                         /* disable EEE if enabled */
5305                         if ((adapter->flags & IGB_FLAG_EEE) &&
5306                                 (adapter->link_duplex == HALF_DUPLEX)) {
5307                                 dev_info(&adapter->pdev->dev,
5308                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5309                                 adapter->hw.dev_spec._82575.eee_disable = true;
5310                                 adapter->flags &= ~IGB_FLAG_EEE;
5311                         }
5312
5313                         /* check if SmartSpeed worked */
5314                         igb_check_downshift(hw);
5315                         if (phy->speed_downgraded)
5316                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5317
5318                         /* check for thermal sensor event */
5319                         if (igb_thermal_sensor_event(hw,
5320                             E1000_THSTAT_LINK_THROTTLE))
5321                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5322
5323                         /* adjust timeout factor according to speed/duplex */
5324                         adapter->tx_timeout_factor = 1;
5325                         switch (adapter->link_speed) {
5326                         case SPEED_10:
5327                                 adapter->tx_timeout_factor = 14;
5328                                 break;
5329                         case SPEED_100:
5330                                 /* maybe add some timeout factor ? */
5331                                 break;
5332                         }
5333
5334                         if (adapter->link_speed != SPEED_1000)
5335                                 goto no_wait;
5336
5337                         /* wait for Remote receiver status OK */
5338 retry_read_status:
5339                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5340                                               &phy_data)) {
5341                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5342                                     retry_count) {
5343                                         msleep(100);
5344                                         retry_count--;
5345                                         goto retry_read_status;
5346                                 } else if (!retry_count) {
5347                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5348                                 }
5349                         } else {
5350                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5351                         }
5352 no_wait:
5353                         netif_carrier_on(netdev);
5354
5355                         igb_ping_all_vfs(adapter);
5356                         igb_check_vf_rate_limit(adapter);
5357
5358                         /* link state has changed, schedule phy info update */
5359                         if (!test_bit(__IGB_DOWN, &adapter->state))
5360                                 mod_timer(&adapter->phy_info_timer,
5361                                           round_jiffies(jiffies + 2 * HZ));
5362                 }
5363         } else {
5364                 if (netif_carrier_ok(netdev)) {
5365                         adapter->link_speed = 0;
5366                         adapter->link_duplex = 0;
5367
5368                         /* check for thermal sensor event */
5369                         if (igb_thermal_sensor_event(hw,
5370                             E1000_THSTAT_PWR_DOWN)) {
5371                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5372                         }
5373
5374                         /* Links status message must follow this format */
5375                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5376                                netdev->name);
5377                         netif_carrier_off(netdev);
5378
5379                         igb_ping_all_vfs(adapter);
5380
5381                         /* link state has changed, schedule phy info update */
5382                         if (!test_bit(__IGB_DOWN, &adapter->state))
5383                                 mod_timer(&adapter->phy_info_timer,
5384                                           round_jiffies(jiffies + 2 * HZ));
5385
5386                         /* link is down, time to check for alternate media */
5387                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5388                                 igb_check_swap_media(adapter);
5389                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5390                                         schedule_work(&adapter->reset_task);
5391                                         /* return immediately */
5392                                         return;
5393                                 }
5394                         }
5395                         pm_schedule_suspend(netdev->dev.parent,
5396                                             MSEC_PER_SEC * 5);
5397
5398                 /* also check for alternate media here */
5399                 } else if (!netif_carrier_ok(netdev) &&
5400                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5401                         igb_check_swap_media(adapter);
5402                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5403                                 schedule_work(&adapter->reset_task);
5404                                 /* return immediately */
5405                                 return;
5406                         }
5407                 }
5408         }
5409
5410         spin_lock(&adapter->stats64_lock);
5411         igb_update_stats(adapter);
5412         spin_unlock(&adapter->stats64_lock);
5413
5414         for (i = 0; i < adapter->num_tx_queues; i++) {
5415                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5416                 if (!netif_carrier_ok(netdev)) {
5417                         /* We've lost link, so the controller stops DMA,
5418                          * but we've got queued Tx work that's never going
5419                          * to get done, so reset controller to flush Tx.
5420                          * (Do the reset outside of interrupt context).
5421                          */
5422                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5423                                 adapter->tx_timeout_count++;
5424                                 schedule_work(&adapter->reset_task);
5425                                 /* return immediately since reset is imminent */
5426                                 return;
5427                         }
5428                 }
5429
5430                 /* Force detection of hung controller every watchdog period */
5431                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5432         }
5433
5434         /* Cause software interrupt to ensure Rx ring is cleaned */
5435         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5436                 u32 eics = 0;
5437
5438                 for (i = 0; i < adapter->num_q_vectors; i++)
5439                         eics |= adapter->q_vector[i]->eims_value;
5440                 wr32(E1000_EICS, eics);
5441         } else {
5442                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5443         }
5444
5445         igb_spoof_check(adapter);
5446         igb_ptp_rx_hang(adapter);
5447         igb_ptp_tx_hang(adapter);
5448
5449         /* Check LVMMC register on i350/i354 only */
5450         if ((adapter->hw.mac.type == e1000_i350) ||
5451             (adapter->hw.mac.type == e1000_i354))
5452                 igb_check_lvmmc(adapter);
5453
5454         /* Reset the timer */
5455         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5456                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5457                         mod_timer(&adapter->watchdog_timer,
5458                                   round_jiffies(jiffies +  HZ));
5459                 else
5460                         mod_timer(&adapter->watchdog_timer,
5461                                   round_jiffies(jiffies + 2 * HZ));
5462         }
5463 }
5464
5465 enum latency_range {
5466         lowest_latency = 0,
5467         low_latency = 1,
5468         bulk_latency = 2,
5469         latency_invalid = 255
5470 };
5471
5472 /**
5473  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5474  *  @q_vector: pointer to q_vector
5475  *
5476  *  Stores a new ITR value based on strictly on packet size.  This
5477  *  algorithm is less sophisticated than that used in igb_update_itr,
5478  *  due to the difficulty of synchronizing statistics across multiple
5479  *  receive rings.  The divisors and thresholds used by this function
5480  *  were determined based on theoretical maximum wire speed and testing
5481  *  data, in order to minimize response time while increasing bulk
5482  *  throughput.
5483  *  This functionality is controlled by ethtool's coalescing settings.
5484  *  NOTE:  This function is called only when operating in a multiqueue
5485  *         receive environment.
5486  **/
5487 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5488 {
5489         int new_val = q_vector->itr_val;
5490         int avg_wire_size = 0;
5491         struct igb_adapter *adapter = q_vector->adapter;
5492         unsigned int packets;
5493
5494         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5495          * ints/sec - ITR timer value of 120 ticks.
5496          */
5497         if (adapter->link_speed != SPEED_1000) {
5498                 new_val = IGB_4K_ITR;
5499                 goto set_itr_val;
5500         }
5501
5502         packets = q_vector->rx.total_packets;
5503         if (packets)
5504                 avg_wire_size = q_vector->rx.total_bytes / packets;
5505
5506         packets = q_vector->tx.total_packets;
5507         if (packets)
5508                 avg_wire_size = max_t(u32, avg_wire_size,
5509                                       q_vector->tx.total_bytes / packets);
5510
5511         /* if avg_wire_size isn't set no work was done */
5512         if (!avg_wire_size)
5513                 goto clear_counts;
5514
5515         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5516         avg_wire_size += 24;
5517
5518         /* Don't starve jumbo frames */
5519         avg_wire_size = min(avg_wire_size, 3000);
5520
5521         /* Give a little boost to mid-size frames */
5522         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5523                 new_val = avg_wire_size / 3;
5524         else
5525                 new_val = avg_wire_size / 2;
5526
5527         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5528         if (new_val < IGB_20K_ITR &&
5529             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5530              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5531                 new_val = IGB_20K_ITR;
5532
5533 set_itr_val:
5534         if (new_val != q_vector->itr_val) {
5535                 q_vector->itr_val = new_val;
5536                 q_vector->set_itr = 1;
5537         }
5538 clear_counts:
5539         q_vector->rx.total_bytes = 0;
5540         q_vector->rx.total_packets = 0;
5541         q_vector->tx.total_bytes = 0;
5542         q_vector->tx.total_packets = 0;
5543 }
5544
5545 /**
5546  *  igb_update_itr - update the dynamic ITR value based on statistics
5547  *  @q_vector: pointer to q_vector
5548  *  @ring_container: ring info to update the itr for
5549  *
5550  *  Stores a new ITR value based on packets and byte
5551  *  counts during the last interrupt.  The advantage of per interrupt
5552  *  computation is faster updates and more accurate ITR for the current
5553  *  traffic pattern.  Constants in this function were computed
5554  *  based on theoretical maximum wire speed and thresholds were set based
5555  *  on testing data as well as attempting to minimize response time
5556  *  while increasing bulk throughput.
5557  *  This functionality is controlled by ethtool's coalescing settings.
5558  *  NOTE:  These calculations are only valid when operating in a single-
5559  *         queue environment.
5560  **/
5561 static void igb_update_itr(struct igb_q_vector *q_vector,
5562                            struct igb_ring_container *ring_container)
5563 {
5564         unsigned int packets = ring_container->total_packets;
5565         unsigned int bytes = ring_container->total_bytes;
5566         u8 itrval = ring_container->itr;
5567
5568         /* no packets, exit with status unchanged */
5569         if (packets == 0)
5570                 return;
5571
5572         switch (itrval) {
5573         case lowest_latency:
5574                 /* handle TSO and jumbo frames */
5575                 if (bytes/packets > 8000)
5576                         itrval = bulk_latency;
5577                 else if ((packets < 5) && (bytes > 512))
5578                         itrval = low_latency;
5579                 break;
5580         case low_latency:  /* 50 usec aka 20000 ints/s */
5581                 if (bytes > 10000) {
5582                         /* this if handles the TSO accounting */
5583                         if (bytes/packets > 8000)
5584                                 itrval = bulk_latency;
5585                         else if ((packets < 10) || ((bytes/packets) > 1200))
5586                                 itrval = bulk_latency;
5587                         else if ((packets > 35))
5588                                 itrval = lowest_latency;
5589                 } else if (bytes/packets > 2000) {
5590                         itrval = bulk_latency;
5591                 } else if (packets <= 2 && bytes < 512) {
5592                         itrval = lowest_latency;
5593                 }
5594                 break;
5595         case bulk_latency: /* 250 usec aka 4000 ints/s */
5596                 if (bytes > 25000) {
5597                         if (packets > 35)
5598                                 itrval = low_latency;
5599                 } else if (bytes < 1500) {
5600                         itrval = low_latency;
5601                 }
5602                 break;
5603         }
5604
5605         /* clear work counters since we have the values we need */
5606         ring_container->total_bytes = 0;
5607         ring_container->total_packets = 0;
5608
5609         /* write updated itr to ring container */
5610         ring_container->itr = itrval;
5611 }
5612
5613 static void igb_set_itr(struct igb_q_vector *q_vector)
5614 {
5615         struct igb_adapter *adapter = q_vector->adapter;
5616         u32 new_itr = q_vector->itr_val;
5617         u8 current_itr = 0;
5618
5619         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5620         if (adapter->link_speed != SPEED_1000) {
5621                 current_itr = 0;
5622                 new_itr = IGB_4K_ITR;
5623                 goto set_itr_now;
5624         }
5625
5626         igb_update_itr(q_vector, &q_vector->tx);
5627         igb_update_itr(q_vector, &q_vector->rx);
5628
5629         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5630
5631         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5632         if (current_itr == lowest_latency &&
5633             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5634              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5635                 current_itr = low_latency;
5636
5637         switch (current_itr) {
5638         /* counts and packets in update_itr are dependent on these numbers */
5639         case lowest_latency:
5640                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5641                 break;
5642         case low_latency:
5643                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5644                 break;
5645         case bulk_latency:
5646                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5647                 break;
5648         default:
5649                 break;
5650         }
5651
5652 set_itr_now:
5653         if (new_itr != q_vector->itr_val) {
5654                 /* this attempts to bias the interrupt rate towards Bulk
5655                  * by adding intermediate steps when interrupt rate is
5656                  * increasing
5657                  */
5658                 new_itr = new_itr > q_vector->itr_val ?
5659                           max((new_itr * q_vector->itr_val) /
5660                           (new_itr + (q_vector->itr_val >> 2)),
5661                           new_itr) : new_itr;
5662                 /* Don't write the value here; it resets the adapter's
5663                  * internal timer, and causes us to delay far longer than
5664                  * we should between interrupts.  Instead, we write the ITR
5665                  * value at the beginning of the next interrupt so the timing
5666                  * ends up being correct.
5667                  */
5668                 q_vector->itr_val = new_itr;
5669                 q_vector->set_itr = 1;
5670         }
5671 }
5672
5673 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5674                             struct igb_tx_buffer *first,
5675                             u32 vlan_macip_lens, u32 type_tucmd,
5676                             u32 mss_l4len_idx)
5677 {
5678         struct e1000_adv_tx_context_desc *context_desc;
5679         u16 i = tx_ring->next_to_use;
5680         struct timespec64 ts;
5681
5682         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5683
5684         i++;
5685         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5686
5687         /* set bits to identify this as an advanced context descriptor */
5688         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5689
5690         /* For 82575, context index must be unique per ring. */
5691         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5692                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5693
5694         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5695         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5696         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5697
5698         /* We assume there is always a valid tx time available. Invalid times
5699          * should have been handled by the upper layers.
5700          */
5701         if (tx_ring->launchtime_enable) {
5702                 ts = ns_to_timespec64(first->skb->tstamp);
5703                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5704         } else {
5705                 context_desc->seqnum_seed = 0;
5706         }
5707 }
5708
5709 static int igb_tso(struct igb_ring *tx_ring,
5710                    struct igb_tx_buffer *first,
5711                    u8 *hdr_len)
5712 {
5713         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5714         struct sk_buff *skb = first->skb;
5715         union {
5716                 struct iphdr *v4;
5717                 struct ipv6hdr *v6;
5718                 unsigned char *hdr;
5719         } ip;
5720         union {
5721                 struct tcphdr *tcp;
5722                 unsigned char *hdr;
5723         } l4;
5724         u32 paylen, l4_offset;
5725         int err;
5726
5727         if (skb->ip_summed != CHECKSUM_PARTIAL)
5728                 return 0;
5729
5730         if (!skb_is_gso(skb))
5731                 return 0;
5732
5733         err = skb_cow_head(skb, 0);
5734         if (err < 0)
5735                 return err;
5736
5737         ip.hdr = skb_network_header(skb);
5738         l4.hdr = skb_checksum_start(skb);
5739
5740         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5741         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5742
5743         /* initialize outer IP header fields */
5744         if (ip.v4->version == 4) {
5745                 unsigned char *csum_start = skb_checksum_start(skb);
5746                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5747
5748                 /* IP header will have to cancel out any data that
5749                  * is not a part of the outer IP header
5750                  */
5751                 ip.v4->check = csum_fold(csum_partial(trans_start,
5752                                                       csum_start - trans_start,
5753                                                       0));
5754                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5755
5756                 ip.v4->tot_len = 0;
5757                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5758                                    IGB_TX_FLAGS_CSUM |
5759                                    IGB_TX_FLAGS_IPV4;
5760         } else {
5761                 ip.v6->payload_len = 0;
5762                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5763                                    IGB_TX_FLAGS_CSUM;
5764         }
5765
5766         /* determine offset of inner transport header */
5767         l4_offset = l4.hdr - skb->data;
5768
5769         /* compute length of segmentation header */
5770         *hdr_len = (l4.tcp->doff * 4) + l4_offset;
5771
5772         /* remove payload length from inner checksum */
5773         paylen = skb->len - l4_offset;
5774         csum_replace_by_diff(&l4.tcp->check, htonl(paylen));
5775
5776         /* update gso size and bytecount with header size */
5777         first->gso_segs = skb_shinfo(skb)->gso_segs;
5778         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5779
5780         /* MSS L4LEN IDX */
5781         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
5782         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5783
5784         /* VLAN MACLEN IPLEN */
5785         vlan_macip_lens = l4.hdr - ip.hdr;
5786         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
5787         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5788
5789         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
5790                         type_tucmd, mss_l4len_idx);
5791
5792         return 1;
5793 }
5794
5795 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff *skb)
5796 {
5797         unsigned int offset = 0;
5798
5799         ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
5800
5801         return offset == skb_checksum_start_offset(skb);
5802 }
5803
5804 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5805 {
5806         struct sk_buff *skb = first->skb;
5807         u32 vlan_macip_lens = 0;
5808         u32 type_tucmd = 0;
5809
5810         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5811 csum_failed:
5812                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
5813                     !tx_ring->launchtime_enable)
5814                         return;
5815                 goto no_csum;
5816         }
5817
5818         switch (skb->csum_offset) {
5819         case offsetof(struct tcphdr, check):
5820                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5821                 /* fall through */
5822         case offsetof(struct udphdr, check):
5823                 break;
5824         case offsetof(struct sctphdr, checksum):
5825                 /* validate that this is actually an SCTP request */
5826                 if (((first->protocol == htons(ETH_P_IP)) &&
5827                      (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
5828                     ((first->protocol == htons(ETH_P_IPV6)) &&
5829                      igb_ipv6_csum_is_sctp(skb))) {
5830                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
5831                         break;
5832                 }
5833                 /* fall through */
5834         default:
5835                 skb_checksum_help(skb);
5836                 goto csum_failed;
5837         }
5838
5839         /* update TX checksum flag */
5840         first->tx_flags |= IGB_TX_FLAGS_CSUM;
5841         vlan_macip_lens = skb_checksum_start_offset(skb) -
5842                           skb_network_offset(skb);
5843 no_csum:
5844         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5845         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5846
5847         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
5848 }
5849
5850 #define IGB_SET_FLAG(_input, _flag, _result) \
5851         ((_flag <= _result) ? \
5852          ((u32)(_input & _flag) * (_result / _flag)) : \
5853          ((u32)(_input & _flag) / (_flag / _result)))
5854
5855 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5856 {
5857         /* set type for advanced descriptor with frame checksum insertion */
5858         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5859                        E1000_ADVTXD_DCMD_DEXT |
5860                        E1000_ADVTXD_DCMD_IFCS;
5861
5862         /* set HW vlan bit if vlan is present */
5863         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5864                                  (E1000_ADVTXD_DCMD_VLE));
5865
5866         /* set segmentation bits for TSO */
5867         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5868                                  (E1000_ADVTXD_DCMD_TSE));
5869
5870         /* set timestamp bit if present */
5871         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5872                                  (E1000_ADVTXD_MAC_TSTAMP));
5873
5874         /* insert frame checksum */
5875         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
5876
5877         return cmd_type;
5878 }
5879
5880 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5881                                  union e1000_adv_tx_desc *tx_desc,
5882                                  u32 tx_flags, unsigned int paylen)
5883 {
5884         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5885
5886         /* 82575 requires a unique index per ring */
5887         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5888                 olinfo_status |= tx_ring->reg_idx << 4;
5889
5890         /* insert L4 checksum */
5891         olinfo_status |= IGB_SET_FLAG(tx_flags,
5892                                       IGB_TX_FLAGS_CSUM,
5893                                       (E1000_TXD_POPTS_TXSM << 8));
5894
5895         /* insert IPv4 checksum */
5896         olinfo_status |= IGB_SET_FLAG(tx_flags,
5897                                       IGB_TX_FLAGS_IPV4,
5898                                       (E1000_TXD_POPTS_IXSM << 8));
5899
5900         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5901 }
5902
5903 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5904 {
5905         struct net_device *netdev = tx_ring->netdev;
5906
5907         netif_stop_subqueue(netdev, tx_ring->queue_index);
5908
5909         /* Herbert's original patch had:
5910          *  smp_mb__after_netif_stop_queue();
5911          * but since that doesn't exist yet, just open code it.
5912          */
5913         smp_mb();
5914
5915         /* We need to check again in a case another CPU has just
5916          * made room available.
5917          */
5918         if (igb_desc_unused(tx_ring) < size)
5919                 return -EBUSY;
5920
5921         /* A reprieve! */
5922         netif_wake_subqueue(netdev, tx_ring->queue_index);
5923
5924         u64_stats_update_begin(&tx_ring->tx_syncp2);
5925         tx_ring->tx_stats.restart_queue2++;
5926         u64_stats_update_end(&tx_ring->tx_syncp2);
5927
5928         return 0;
5929 }
5930
5931 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5932 {
5933         if (igb_desc_unused(tx_ring) >= size)
5934                 return 0;
5935         return __igb_maybe_stop_tx(tx_ring, size);
5936 }
5937
5938 static int igb_tx_map(struct igb_ring *tx_ring,
5939                       struct igb_tx_buffer *first,
5940                       const u8 hdr_len)
5941 {
5942         struct sk_buff *skb = first->skb;
5943         struct igb_tx_buffer *tx_buffer;
5944         union e1000_adv_tx_desc *tx_desc;
5945         struct skb_frag_struct *frag;
5946         dma_addr_t dma;
5947         unsigned int data_len, size;
5948         u32 tx_flags = first->tx_flags;
5949         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5950         u16 i = tx_ring->next_to_use;
5951
5952         tx_desc = IGB_TX_DESC(tx_ring, i);
5953
5954         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5955
5956         size = skb_headlen(skb);
5957         data_len = skb->data_len;
5958
5959         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5960
5961         tx_buffer = first;
5962
5963         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5964                 if (dma_mapping_error(tx_ring->dev, dma))
5965                         goto dma_error;
5966
5967                 /* record length, and DMA address */
5968                 dma_unmap_len_set(tx_buffer, len, size);
5969                 dma_unmap_addr_set(tx_buffer, dma, dma);
5970
5971                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5972
5973                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5974                         tx_desc->read.cmd_type_len =
5975                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5976
5977                         i++;
5978                         tx_desc++;
5979                         if (i == tx_ring->count) {
5980                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5981                                 i = 0;
5982                         }
5983                         tx_desc->read.olinfo_status = 0;
5984
5985                         dma += IGB_MAX_DATA_PER_TXD;
5986                         size -= IGB_MAX_DATA_PER_TXD;
5987
5988                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5989                 }
5990
5991                 if (likely(!data_len))
5992                         break;
5993
5994                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5995
5996                 i++;
5997                 tx_desc++;
5998                 if (i == tx_ring->count) {
5999                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6000                         i = 0;
6001                 }
6002                 tx_desc->read.olinfo_status = 0;
6003
6004                 size = skb_frag_size(frag);
6005                 data_len -= size;
6006
6007                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6008                                        size, DMA_TO_DEVICE);
6009
6010                 tx_buffer = &tx_ring->tx_buffer_info[i];
6011         }
6012
6013         /* write last descriptor with RS and EOP bits */
6014         cmd_type |= size | IGB_TXD_DCMD;
6015         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6016
6017         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6018
6019         /* set the timestamp */
6020         first->time_stamp = jiffies;
6021
6022         /* Force memory writes to complete before letting h/w know there
6023          * are new descriptors to fetch.  (Only applicable for weak-ordered
6024          * memory model archs, such as IA-64).
6025          *
6026          * We also need this memory barrier to make certain all of the
6027          * status bits have been updated before next_to_watch is written.
6028          */
6029         dma_wmb();
6030
6031         /* set next_to_watch value indicating a packet is present */
6032         first->next_to_watch = tx_desc;
6033
6034         i++;
6035         if (i == tx_ring->count)
6036                 i = 0;
6037
6038         tx_ring->next_to_use = i;
6039
6040         /* Make sure there is space in the ring for the next send. */
6041         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6042
6043         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
6044                 writel(i, tx_ring->tail);
6045
6046                 /* we need this if more than one processor can write to our tail
6047                  * at a time, it synchronizes IO on IA64/Altix systems
6048                  */
6049                 mmiowb();
6050         }
6051         return 0;
6052
6053 dma_error:
6054         dev_err(tx_ring->dev, "TX DMA map failed\n");
6055         tx_buffer = &tx_ring->tx_buffer_info[i];
6056
6057         /* clear dma mappings for failed tx_buffer_info map */
6058         while (tx_buffer != first) {
6059                 if (dma_unmap_len(tx_buffer, len))
6060                         dma_unmap_page(tx_ring->dev,
6061                                        dma_unmap_addr(tx_buffer, dma),
6062                                        dma_unmap_len(tx_buffer, len),
6063                                        DMA_TO_DEVICE);
6064                 dma_unmap_len_set(tx_buffer, len, 0);
6065
6066                 if (i-- == 0)
6067                         i += tx_ring->count;
6068                 tx_buffer = &tx_ring->tx_buffer_info[i];
6069         }
6070
6071         if (dma_unmap_len(tx_buffer, len))
6072                 dma_unmap_single(tx_ring->dev,
6073                                  dma_unmap_addr(tx_buffer, dma),
6074                                  dma_unmap_len(tx_buffer, len),
6075                                  DMA_TO_DEVICE);
6076         dma_unmap_len_set(tx_buffer, len, 0);
6077
6078         dev_kfree_skb_any(tx_buffer->skb);
6079         tx_buffer->skb = NULL;
6080
6081         tx_ring->next_to_use = i;
6082
6083         return -1;
6084 }
6085
6086 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6087                                 struct igb_ring *tx_ring)
6088 {
6089         struct igb_tx_buffer *first;
6090         int tso;
6091         u32 tx_flags = 0;
6092         unsigned short f;
6093         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6094         __be16 protocol = vlan_get_protocol(skb);
6095         u8 hdr_len = 0;
6096
6097         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6098          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6099          *       + 2 desc gap to keep tail from touching head,
6100          *       + 1 desc for context descriptor,
6101          * otherwise try next time
6102          */
6103         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6104                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6105
6106         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6107                 /* this is a hard error */
6108                 return NETDEV_TX_BUSY;
6109         }
6110
6111         /* record the location of the first descriptor for this packet */
6112         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6113         first->skb = skb;
6114         first->bytecount = skb->len;
6115         first->gso_segs = 1;
6116
6117         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6118                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6119
6120                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6121                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6122                                            &adapter->state)) {
6123                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6124                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6125
6126                         adapter->ptp_tx_skb = skb_get(skb);
6127                         adapter->ptp_tx_start = jiffies;
6128                         if (adapter->hw.mac.type == e1000_82576)
6129                                 schedule_work(&adapter->ptp_tx_work);
6130                 } else {
6131                         adapter->tx_hwtstamp_skipped++;
6132                 }
6133         }
6134
6135         if (skb_vlan_tag_present(skb)) {
6136                 tx_flags |= IGB_TX_FLAGS_VLAN;
6137                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6138         }
6139
6140         /* record initial flags and protocol */
6141         first->tx_flags = tx_flags;
6142         first->protocol = protocol;
6143
6144         tso = igb_tso(tx_ring, first, &hdr_len);
6145         if (tso < 0)
6146                 goto out_drop;
6147         else if (!tso)
6148                 igb_tx_csum(tx_ring, first);
6149
6150         skb_tx_timestamp(skb);
6151
6152         if (igb_tx_map(tx_ring, first, hdr_len))
6153                 goto cleanup_tx_tstamp;
6154
6155         return NETDEV_TX_OK;
6156
6157 out_drop:
6158         dev_kfree_skb_any(first->skb);
6159         first->skb = NULL;
6160 cleanup_tx_tstamp:
6161         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6162                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6163
6164                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6165                 adapter->ptp_tx_skb = NULL;
6166                 if (adapter->hw.mac.type == e1000_82576)
6167                         cancel_work_sync(&adapter->ptp_tx_work);
6168                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6169         }
6170
6171         return NETDEV_TX_OK;
6172 }
6173
6174 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6175                                                     struct sk_buff *skb)
6176 {
6177         unsigned int r_idx = skb->queue_mapping;
6178
6179         if (r_idx >= adapter->num_tx_queues)
6180                 r_idx = r_idx % adapter->num_tx_queues;
6181
6182         return adapter->tx_ring[r_idx];
6183 }
6184
6185 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6186                                   struct net_device *netdev)
6187 {
6188         struct igb_adapter *adapter = netdev_priv(netdev);
6189
6190         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6191          * in order to meet this minimum size requirement.
6192          */
6193         if (skb_put_padto(skb, 17))
6194                 return NETDEV_TX_OK;
6195
6196         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6197 }
6198
6199 /**
6200  *  igb_tx_timeout - Respond to a Tx Hang
6201  *  @netdev: network interface device structure
6202  **/
6203 static void igb_tx_timeout(struct net_device *netdev)
6204 {
6205         struct igb_adapter *adapter = netdev_priv(netdev);
6206         struct e1000_hw *hw = &adapter->hw;
6207
6208         /* Do the reset outside of interrupt context */
6209         adapter->tx_timeout_count++;
6210
6211         if (hw->mac.type >= e1000_82580)
6212                 hw->dev_spec._82575.global_device_reset = true;
6213
6214         schedule_work(&adapter->reset_task);
6215         wr32(E1000_EICS,
6216              (adapter->eims_enable_mask & ~adapter->eims_other));
6217 }
6218
6219 static void igb_reset_task(struct work_struct *work)
6220 {
6221         struct igb_adapter *adapter;
6222         adapter = container_of(work, struct igb_adapter, reset_task);
6223
6224         igb_dump(adapter);
6225         netdev_err(adapter->netdev, "Reset adapter\n");
6226         igb_reinit_locked(adapter);
6227 }
6228
6229 /**
6230  *  igb_get_stats64 - Get System Network Statistics
6231  *  @netdev: network interface device structure
6232  *  @stats: rtnl_link_stats64 pointer
6233  **/
6234 static void igb_get_stats64(struct net_device *netdev,
6235                             struct rtnl_link_stats64 *stats)
6236 {
6237         struct igb_adapter *adapter = netdev_priv(netdev);
6238
6239         spin_lock(&adapter->stats64_lock);
6240         igb_update_stats(adapter);
6241         memcpy(stats, &adapter->stats64, sizeof(*stats));
6242         spin_unlock(&adapter->stats64_lock);
6243 }
6244
6245 /**
6246  *  igb_change_mtu - Change the Maximum Transfer Unit
6247  *  @netdev: network interface device structure
6248  *  @new_mtu: new value for maximum frame size
6249  *
6250  *  Returns 0 on success, negative on failure
6251  **/
6252 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6253 {
6254         struct igb_adapter *adapter = netdev_priv(netdev);
6255         struct pci_dev *pdev = adapter->pdev;
6256         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
6257
6258         /* adjust max frame to be at least the size of a standard frame */
6259         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6260                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6261
6262         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6263                 usleep_range(1000, 2000);
6264
6265         /* igb_down has a dependency on max_frame_size */
6266         adapter->max_frame_size = max_frame;
6267
6268         if (netif_running(netdev))
6269                 igb_down(adapter);
6270
6271         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
6272                  netdev->mtu, new_mtu);
6273         netdev->mtu = new_mtu;
6274
6275         if (netif_running(netdev))
6276                 igb_up(adapter);
6277         else
6278                 igb_reset(adapter);
6279
6280         clear_bit(__IGB_RESETTING, &adapter->state);
6281
6282         return 0;
6283 }
6284
6285 /**
6286  *  igb_update_stats - Update the board statistics counters
6287  *  @adapter: board private structure
6288  **/
6289 void igb_update_stats(struct igb_adapter *adapter)
6290 {
6291         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6292         struct e1000_hw *hw = &adapter->hw;
6293         struct pci_dev *pdev = adapter->pdev;
6294         u32 reg, mpc;
6295         int i;
6296         u64 bytes, packets;
6297         unsigned int start;
6298         u64 _bytes, _packets;
6299
6300         /* Prevent stats update while adapter is being reset, or if the pci
6301          * connection is down.
6302          */
6303         if (adapter->link_speed == 0)
6304                 return;
6305         if (pci_channel_offline(pdev))
6306                 return;
6307
6308         bytes = 0;
6309         packets = 0;
6310
6311         rcu_read_lock();
6312         for (i = 0; i < adapter->num_rx_queues; i++) {
6313                 struct igb_ring *ring = adapter->rx_ring[i];
6314                 u32 rqdpc = rd32(E1000_RQDPC(i));
6315                 if (hw->mac.type >= e1000_i210)
6316                         wr32(E1000_RQDPC(i), 0);
6317
6318                 if (rqdpc) {
6319                         ring->rx_stats.drops += rqdpc;
6320                         net_stats->rx_fifo_errors += rqdpc;
6321                 }
6322
6323                 do {
6324                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
6325                         _bytes = ring->rx_stats.bytes;
6326                         _packets = ring->rx_stats.packets;
6327                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
6328                 bytes += _bytes;
6329                 packets += _packets;
6330         }
6331
6332         net_stats->rx_bytes = bytes;
6333         net_stats->rx_packets = packets;
6334
6335         bytes = 0;
6336         packets = 0;
6337         for (i = 0; i < adapter->num_tx_queues; i++) {
6338                 struct igb_ring *ring = adapter->tx_ring[i];
6339                 do {
6340                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
6341                         _bytes = ring->tx_stats.bytes;
6342                         _packets = ring->tx_stats.packets;
6343                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
6344                 bytes += _bytes;
6345                 packets += _packets;
6346         }
6347         net_stats->tx_bytes = bytes;
6348         net_stats->tx_packets = packets;
6349         rcu_read_unlock();
6350
6351         /* read stats registers */
6352         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6353         adapter->stats.gprc += rd32(E1000_GPRC);
6354         adapter->stats.gorc += rd32(E1000_GORCL);
6355         rd32(E1000_GORCH); /* clear GORCL */
6356         adapter->stats.bprc += rd32(E1000_BPRC);
6357         adapter->stats.mprc += rd32(E1000_MPRC);
6358         adapter->stats.roc += rd32(E1000_ROC);
6359
6360         adapter->stats.prc64 += rd32(E1000_PRC64);
6361         adapter->stats.prc127 += rd32(E1000_PRC127);
6362         adapter->stats.prc255 += rd32(E1000_PRC255);
6363         adapter->stats.prc511 += rd32(E1000_PRC511);
6364         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6365         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6366         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6367         adapter->stats.sec += rd32(E1000_SEC);
6368
6369         mpc = rd32(E1000_MPC);
6370         adapter->stats.mpc += mpc;
6371         net_stats->rx_fifo_errors += mpc;
6372         adapter->stats.scc += rd32(E1000_SCC);
6373         adapter->stats.ecol += rd32(E1000_ECOL);
6374         adapter->stats.mcc += rd32(E1000_MCC);
6375         adapter->stats.latecol += rd32(E1000_LATECOL);
6376         adapter->stats.dc += rd32(E1000_DC);
6377         adapter->stats.rlec += rd32(E1000_RLEC);
6378         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6379         adapter->stats.xontxc += rd32(E1000_XONTXC);
6380         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6381         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6382         adapter->stats.fcruc += rd32(E1000_FCRUC);
6383         adapter->stats.gptc += rd32(E1000_GPTC);
6384         adapter->stats.gotc += rd32(E1000_GOTCL);
6385         rd32(E1000_GOTCH); /* clear GOTCL */
6386         adapter->stats.rnbc += rd32(E1000_RNBC);
6387         adapter->stats.ruc += rd32(E1000_RUC);
6388         adapter->stats.rfc += rd32(E1000_RFC);
6389         adapter->stats.rjc += rd32(E1000_RJC);
6390         adapter->stats.tor += rd32(E1000_TORH);
6391         adapter->stats.tot += rd32(E1000_TOTH);
6392         adapter->stats.tpr += rd32(E1000_TPR);
6393
6394         adapter->stats.ptc64 += rd32(E1000_PTC64);
6395         adapter->stats.ptc127 += rd32(E1000_PTC127);
6396         adapter->stats.ptc255 += rd32(E1000_PTC255);
6397         adapter->stats.ptc511 += rd32(E1000_PTC511);
6398         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6399         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6400
6401         adapter->stats.mptc += rd32(E1000_MPTC);
6402         adapter->stats.bptc += rd32(E1000_BPTC);
6403
6404         adapter->stats.tpt += rd32(E1000_TPT);
6405         adapter->stats.colc += rd32(E1000_COLC);
6406
6407         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6408         /* read internal phy specific stats */
6409         reg = rd32(E1000_CTRL_EXT);
6410         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6411                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6412
6413                 /* this stat has invalid values on i210/i211 */
6414                 if ((hw->mac.type != e1000_i210) &&
6415                     (hw->mac.type != e1000_i211))
6416                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6417         }
6418
6419         adapter->stats.tsctc += rd32(E1000_TSCTC);
6420         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6421
6422         adapter->stats.iac += rd32(E1000_IAC);
6423         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6424         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6425         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6426         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6427         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6428         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6429         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6430         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6431
6432         /* Fill out the OS statistics structure */
6433         net_stats->multicast = adapter->stats.mprc;
6434         net_stats->collisions = adapter->stats.colc;
6435
6436         /* Rx Errors */
6437
6438         /* RLEC on some newer hardware can be incorrect so build
6439          * our own version based on RUC and ROC
6440          */
6441         net_stats->rx_errors = adapter->stats.rxerrc +
6442                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6443                 adapter->stats.ruc + adapter->stats.roc +
6444                 adapter->stats.cexterr;
6445         net_stats->rx_length_errors = adapter->stats.ruc +
6446                                       adapter->stats.roc;
6447         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6448         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6449         net_stats->rx_missed_errors = adapter->stats.mpc;
6450
6451         /* Tx Errors */
6452         net_stats->tx_errors = adapter->stats.ecol +
6453                                adapter->stats.latecol;
6454         net_stats->tx_aborted_errors = adapter->stats.ecol;
6455         net_stats->tx_window_errors = adapter->stats.latecol;
6456         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6457
6458         /* Tx Dropped needs to be maintained elsewhere */
6459
6460         /* Management Stats */
6461         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6462         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6463         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6464
6465         /* OS2BMC Stats */
6466         reg = rd32(E1000_MANC);
6467         if (reg & E1000_MANC_EN_BMC2OS) {
6468                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6469                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6470                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6471                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6472         }
6473 }
6474
6475 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6476 {
6477         struct e1000_hw *hw = &adapter->hw;
6478         struct ptp_clock_event event;
6479         struct timespec64 ts;
6480         u32 ack = 0, tsauxc, sec, nsec, tsicr = rd32(E1000_TSICR);
6481
6482         if (tsicr & TSINTR_SYS_WRAP) {
6483                 event.type = PTP_CLOCK_PPS;
6484                 if (adapter->ptp_caps.pps)
6485                         ptp_clock_event(adapter->ptp_clock, &event);
6486                 ack |= TSINTR_SYS_WRAP;
6487         }
6488
6489         if (tsicr & E1000_TSICR_TXTS) {
6490                 /* retrieve hardware timestamp */
6491                 schedule_work(&adapter->ptp_tx_work);
6492                 ack |= E1000_TSICR_TXTS;
6493         }
6494
6495         if (tsicr & TSINTR_TT0) {
6496                 spin_lock(&adapter->tmreg_lock);
6497                 ts = timespec64_add(adapter->perout[0].start,
6498                                     adapter->perout[0].period);
6499                 /* u32 conversion of tv_sec is safe until y2106 */
6500                 wr32(E1000_TRGTTIML0, ts.tv_nsec);
6501                 wr32(E1000_TRGTTIMH0, (u32)ts.tv_sec);
6502                 tsauxc = rd32(E1000_TSAUXC);
6503                 tsauxc |= TSAUXC_EN_TT0;
6504                 wr32(E1000_TSAUXC, tsauxc);
6505                 adapter->perout[0].start = ts;
6506                 spin_unlock(&adapter->tmreg_lock);
6507                 ack |= TSINTR_TT0;
6508         }
6509
6510         if (tsicr & TSINTR_TT1) {
6511                 spin_lock(&adapter->tmreg_lock);
6512                 ts = timespec64_add(adapter->perout[1].start,
6513                                     adapter->perout[1].period);
6514                 wr32(E1000_TRGTTIML1, ts.tv_nsec);
6515                 wr32(E1000_TRGTTIMH1, (u32)ts.tv_sec);
6516                 tsauxc = rd32(E1000_TSAUXC);
6517                 tsauxc |= TSAUXC_EN_TT1;
6518                 wr32(E1000_TSAUXC, tsauxc);
6519                 adapter->perout[1].start = ts;
6520                 spin_unlock(&adapter->tmreg_lock);
6521                 ack |= TSINTR_TT1;
6522         }
6523
6524         if (tsicr & TSINTR_AUTT0) {
6525                 nsec = rd32(E1000_AUXSTMPL0);
6526                 sec  = rd32(E1000_AUXSTMPH0);
6527                 event.type = PTP_CLOCK_EXTTS;
6528                 event.index = 0;
6529                 event.timestamp = sec * 1000000000ULL + nsec;
6530                 ptp_clock_event(adapter->ptp_clock, &event);
6531                 ack |= TSINTR_AUTT0;
6532         }
6533
6534         if (tsicr & TSINTR_AUTT1) {
6535                 nsec = rd32(E1000_AUXSTMPL1);
6536                 sec  = rd32(E1000_AUXSTMPH1);
6537                 event.type = PTP_CLOCK_EXTTS;
6538                 event.index = 1;
6539                 event.timestamp = sec * 1000000000ULL + nsec;
6540                 ptp_clock_event(adapter->ptp_clock, &event);
6541                 ack |= TSINTR_AUTT1;
6542         }
6543
6544         /* acknowledge the interrupts */
6545         wr32(E1000_TSICR, ack);
6546 }
6547
6548 static irqreturn_t igb_msix_other(int irq, void *data)
6549 {
6550         struct igb_adapter *adapter = data;
6551         struct e1000_hw *hw = &adapter->hw;
6552         u32 icr = rd32(E1000_ICR);
6553         /* reading ICR causes bit 31 of EICR to be cleared */
6554
6555         if (icr & E1000_ICR_DRSTA)
6556                 schedule_work(&adapter->reset_task);
6557
6558         if (icr & E1000_ICR_DOUTSYNC) {
6559                 /* HW is reporting DMA is out of sync */
6560                 adapter->stats.doosync++;
6561                 /* The DMA Out of Sync is also indication of a spoof event
6562                  * in IOV mode. Check the Wrong VM Behavior register to
6563                  * see if it is really a spoof event.
6564                  */
6565                 igb_check_wvbr(adapter);
6566         }
6567
6568         /* Check for a mailbox event */
6569         if (icr & E1000_ICR_VMMB)
6570                 igb_msg_task(adapter);
6571
6572         if (icr & E1000_ICR_LSC) {
6573                 hw->mac.get_link_status = 1;
6574                 /* guard against interrupt when we're going down */
6575                 if (!test_bit(__IGB_DOWN, &adapter->state))
6576                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6577         }
6578
6579         if (icr & E1000_ICR_TS)
6580                 igb_tsync_interrupt(adapter);
6581
6582         wr32(E1000_EIMS, adapter->eims_other);
6583
6584         return IRQ_HANDLED;
6585 }
6586
6587 static void igb_write_itr(struct igb_q_vector *q_vector)
6588 {
6589         struct igb_adapter *adapter = q_vector->adapter;
6590         u32 itr_val = q_vector->itr_val & 0x7FFC;
6591
6592         if (!q_vector->set_itr)
6593                 return;
6594
6595         if (!itr_val)
6596                 itr_val = 0x4;
6597
6598         if (adapter->hw.mac.type == e1000_82575)
6599                 itr_val |= itr_val << 16;
6600         else
6601                 itr_val |= E1000_EITR_CNT_IGNR;
6602
6603         writel(itr_val, q_vector->itr_register);
6604         q_vector->set_itr = 0;
6605 }
6606
6607 static irqreturn_t igb_msix_ring(int irq, void *data)
6608 {
6609         struct igb_q_vector *q_vector = data;
6610
6611         /* Write the ITR value calculated from the previous interrupt. */
6612         igb_write_itr(q_vector);
6613
6614         napi_schedule(&q_vector->napi);
6615
6616         return IRQ_HANDLED;
6617 }
6618
6619 #ifdef CONFIG_IGB_DCA
6620 static void igb_update_tx_dca(struct igb_adapter *adapter,
6621                               struct igb_ring *tx_ring,
6622                               int cpu)
6623 {
6624         struct e1000_hw *hw = &adapter->hw;
6625         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6626
6627         if (hw->mac.type != e1000_82575)
6628                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
6629
6630         /* We can enable relaxed ordering for reads, but not writes when
6631          * DCA is enabled.  This is due to a known issue in some chipsets
6632          * which will cause the DCA tag to be cleared.
6633          */
6634         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6635                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6636                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6637
6638         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6639 }
6640
6641 static void igb_update_rx_dca(struct igb_adapter *adapter,
6642                               struct igb_ring *rx_ring,
6643                               int cpu)
6644 {
6645         struct e1000_hw *hw = &adapter->hw;
6646         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6647
6648         if (hw->mac.type != e1000_82575)
6649                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
6650
6651         /* We can enable relaxed ordering for reads, but not writes when
6652          * DCA is enabled.  This is due to a known issue in some chipsets
6653          * which will cause the DCA tag to be cleared.
6654          */
6655         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6656                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6657
6658         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6659 }
6660
6661 static void igb_update_dca(struct igb_q_vector *q_vector)
6662 {
6663         struct igb_adapter *adapter = q_vector->adapter;
6664         int cpu = get_cpu();
6665
6666         if (q_vector->cpu == cpu)
6667                 goto out_no_update;
6668
6669         if (q_vector->tx.ring)
6670                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6671
6672         if (q_vector->rx.ring)
6673                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6674
6675         q_vector->cpu = cpu;
6676 out_no_update:
6677         put_cpu();
6678 }
6679
6680 static void igb_setup_dca(struct igb_adapter *adapter)
6681 {
6682         struct e1000_hw *hw = &adapter->hw;
6683         int i;
6684
6685         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6686                 return;
6687
6688         /* Always use CB2 mode, difference is masked in the CB driver. */
6689         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6690
6691         for (i = 0; i < adapter->num_q_vectors; i++) {
6692                 adapter->q_vector[i]->cpu = -1;
6693                 igb_update_dca(adapter->q_vector[i]);
6694         }
6695 }
6696
6697 static int __igb_notify_dca(struct device *dev, void *data)
6698 {
6699         struct net_device *netdev = dev_get_drvdata(dev);
6700         struct igb_adapter *adapter = netdev_priv(netdev);
6701         struct pci_dev *pdev = adapter->pdev;
6702         struct e1000_hw *hw = &adapter->hw;
6703         unsigned long event = *(unsigned long *)data;
6704
6705         switch (event) {
6706         case DCA_PROVIDER_ADD:
6707                 /* if already enabled, don't do it again */
6708                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6709                         break;
6710                 if (dca_add_requester(dev) == 0) {
6711                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6712                         dev_info(&pdev->dev, "DCA enabled\n");
6713                         igb_setup_dca(adapter);
6714                         break;
6715                 }
6716                 /* Fall Through since DCA is disabled. */
6717         case DCA_PROVIDER_REMOVE:
6718                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6719                         /* without this a class_device is left
6720                          * hanging around in the sysfs model
6721                          */
6722                         dca_remove_requester(dev);
6723                         dev_info(&pdev->dev, "DCA disabled\n");
6724                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6725                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
6726                 }
6727                 break;
6728         }
6729
6730         return 0;
6731 }
6732
6733 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6734                           void *p)
6735 {
6736         int ret_val;
6737
6738         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6739                                          __igb_notify_dca);
6740
6741         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6742 }
6743 #endif /* CONFIG_IGB_DCA */
6744
6745 #ifdef CONFIG_PCI_IOV
6746 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6747 {
6748         unsigned char mac_addr[ETH_ALEN];
6749
6750         eth_zero_addr(mac_addr);
6751         igb_set_vf_mac(adapter, vf, mac_addr);
6752
6753         /* By default spoof check is enabled for all VFs */
6754         adapter->vf_data[vf].spoofchk_enabled = true;
6755
6756         /* By default VFs are not trusted */
6757         adapter->vf_data[vf].trusted = false;
6758
6759         return 0;
6760 }
6761
6762 #endif
6763 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6764 {
6765         struct e1000_hw *hw = &adapter->hw;
6766         u32 ping;
6767         int i;
6768
6769         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6770                 ping = E1000_PF_CONTROL_MSG;
6771                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6772                         ping |= E1000_VT_MSGTYPE_CTS;
6773                 igb_write_mbx(hw, &ping, 1, i);
6774         }
6775 }
6776
6777 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6778 {
6779         struct e1000_hw *hw = &adapter->hw;
6780         u32 vmolr = rd32(E1000_VMOLR(vf));
6781         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6782
6783         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6784                             IGB_VF_FLAG_MULTI_PROMISC);
6785         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6786
6787         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6788                 vmolr |= E1000_VMOLR_MPME;
6789                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6790                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6791         } else {
6792                 /* if we have hashes and we are clearing a multicast promisc
6793                  * flag we need to write the hashes to the MTA as this step
6794                  * was previously skipped
6795                  */
6796                 if (vf_data->num_vf_mc_hashes > 30) {
6797                         vmolr |= E1000_VMOLR_MPME;
6798                 } else if (vf_data->num_vf_mc_hashes) {
6799                         int j;
6800
6801                         vmolr |= E1000_VMOLR_ROMPE;
6802                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6803                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6804                 }
6805         }
6806
6807         wr32(E1000_VMOLR(vf), vmolr);
6808
6809         /* there are flags left unprocessed, likely not supported */
6810         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6811                 return -EINVAL;
6812
6813         return 0;
6814 }
6815
6816 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6817                                   u32 *msgbuf, u32 vf)
6818 {
6819         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6820         u16 *hash_list = (u16 *)&msgbuf[1];
6821         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6822         int i;
6823
6824         /* salt away the number of multicast addresses assigned
6825          * to this VF for later use to restore when the PF multi cast
6826          * list changes
6827          */
6828         vf_data->num_vf_mc_hashes = n;
6829
6830         /* only up to 30 hash values supported */
6831         if (n > 30)
6832                 n = 30;
6833
6834         /* store the hashes for later use */
6835         for (i = 0; i < n; i++)
6836                 vf_data->vf_mc_hashes[i] = hash_list[i];
6837
6838         /* Flush and reset the mta with the new values */
6839         igb_set_rx_mode(adapter->netdev);
6840
6841         return 0;
6842 }
6843
6844 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6845 {
6846         struct e1000_hw *hw = &adapter->hw;
6847         struct vf_data_storage *vf_data;
6848         int i, j;
6849
6850         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6851                 u32 vmolr = rd32(E1000_VMOLR(i));
6852
6853                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6854
6855                 vf_data = &adapter->vf_data[i];
6856
6857                 if ((vf_data->num_vf_mc_hashes > 30) ||
6858                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6859                         vmolr |= E1000_VMOLR_MPME;
6860                 } else if (vf_data->num_vf_mc_hashes) {
6861                         vmolr |= E1000_VMOLR_ROMPE;
6862                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6863                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
6864                 }
6865                 wr32(E1000_VMOLR(i), vmolr);
6866         }
6867 }
6868
6869 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6870 {
6871         struct e1000_hw *hw = &adapter->hw;
6872         u32 pool_mask, vlvf_mask, i;
6873
6874         /* create mask for VF and other pools */
6875         pool_mask = E1000_VLVF_POOLSEL_MASK;
6876         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
6877
6878         /* drop PF from pool bits */
6879         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
6880                              adapter->vfs_allocated_count);
6881
6882         /* Find the vlan filter for this id */
6883         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
6884                 u32 vlvf = rd32(E1000_VLVF(i));
6885                 u32 vfta_mask, vid, vfta;
6886
6887                 /* remove the vf from the pool */
6888                 if (!(vlvf & vlvf_mask))
6889                         continue;
6890
6891                 /* clear out bit from VLVF */
6892                 vlvf ^= vlvf_mask;
6893
6894                 /* if other pools are present, just remove ourselves */
6895                 if (vlvf & pool_mask)
6896                         goto update_vlvfb;
6897
6898                 /* if PF is present, leave VFTA */
6899                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
6900                         goto update_vlvf;
6901
6902                 vid = vlvf & E1000_VLVF_VLANID_MASK;
6903                 vfta_mask = BIT(vid % 32);
6904
6905                 /* clear bit from VFTA */
6906                 vfta = adapter->shadow_vfta[vid / 32];
6907                 if (vfta & vfta_mask)
6908                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
6909 update_vlvf:
6910                 /* clear pool selection enable */
6911                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6912                         vlvf &= E1000_VLVF_POOLSEL_MASK;
6913                 else
6914                         vlvf = 0;
6915 update_vlvfb:
6916                 /* clear pool bits */
6917                 wr32(E1000_VLVF(i), vlvf);
6918         }
6919 }
6920
6921 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
6922 {
6923         u32 vlvf;
6924         int idx;
6925
6926         /* short cut the special case */
6927         if (vlan == 0)
6928                 return 0;
6929
6930         /* Search for the VLAN id in the VLVF entries */
6931         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
6932                 vlvf = rd32(E1000_VLVF(idx));
6933                 if ((vlvf & VLAN_VID_MASK) == vlan)
6934                         break;
6935         }
6936
6937         return idx;
6938 }
6939
6940 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
6941 {
6942         struct e1000_hw *hw = &adapter->hw;
6943         u32 bits, pf_id;
6944         int idx;
6945
6946         idx = igb_find_vlvf_entry(hw, vid);
6947         if (!idx)
6948                 return;
6949
6950         /* See if any other pools are set for this VLAN filter
6951          * entry other than the PF.
6952          */
6953         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
6954         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
6955         bits &= rd32(E1000_VLVF(idx));
6956
6957         /* Disable the filter so this falls into the default pool. */
6958         if (!bits) {
6959                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
6960                         wr32(E1000_VLVF(idx), BIT(pf_id));
6961                 else
6962                         wr32(E1000_VLVF(idx), 0);
6963         }
6964 }
6965
6966 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
6967                            bool add, u32 vf)
6968 {
6969         int pf_id = adapter->vfs_allocated_count;
6970         struct e1000_hw *hw = &adapter->hw;
6971         int err;
6972
6973         /* If VLAN overlaps with one the PF is currently monitoring make
6974          * sure that we are able to allocate a VLVF entry.  This may be
6975          * redundant but it guarantees PF will maintain visibility to
6976          * the VLAN.
6977          */
6978         if (add && test_bit(vid, adapter->active_vlans)) {
6979                 err = igb_vfta_set(hw, vid, pf_id, true, false);
6980                 if (err)
6981                         return err;
6982         }
6983
6984         err = igb_vfta_set(hw, vid, vf, add, false);
6985
6986         if (add && !err)
6987                 return err;
6988
6989         /* If we failed to add the VF VLAN or we are removing the VF VLAN
6990          * we may need to drop the PF pool bit in order to allow us to free
6991          * up the VLVF resources.
6992          */
6993         if (test_bit(vid, adapter->active_vlans) ||
6994             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
6995                 igb_update_pf_vlvf(adapter, vid);
6996
6997         return err;
6998 }
6999
7000 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7001 {
7002         struct e1000_hw *hw = &adapter->hw;
7003
7004         if (vid)
7005                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7006         else
7007                 wr32(E1000_VMVIR(vf), 0);
7008 }
7009
7010 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7011                                 u16 vlan, u8 qos)
7012 {
7013         int err;
7014
7015         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7016         if (err)
7017                 return err;
7018
7019         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7020         igb_set_vmolr(adapter, vf, !vlan);
7021
7022         /* revoke access to previous VLAN */
7023         if (vlan != adapter->vf_data[vf].pf_vlan)
7024                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7025                                 false, vf);
7026
7027         adapter->vf_data[vf].pf_vlan = vlan;
7028         adapter->vf_data[vf].pf_qos = qos;
7029         igb_set_vf_vlan_strip(adapter, vf, true);
7030         dev_info(&adapter->pdev->dev,
7031                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7032         if (test_bit(__IGB_DOWN, &adapter->state)) {
7033                 dev_warn(&adapter->pdev->dev,
7034                          "The VF VLAN has been set, but the PF device is not up.\n");
7035                 dev_warn(&adapter->pdev->dev,
7036                          "Bring the PF device up before attempting to use the VF device.\n");
7037         }
7038
7039         return err;
7040 }
7041
7042 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7043 {
7044         /* Restore tagless access via VLAN 0 */
7045         igb_set_vf_vlan(adapter, 0, true, vf);
7046
7047         igb_set_vmvir(adapter, 0, vf);
7048         igb_set_vmolr(adapter, vf, true);
7049
7050         /* Remove any PF assigned VLAN */
7051         if (adapter->vf_data[vf].pf_vlan)
7052                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7053                                 false, vf);
7054
7055         adapter->vf_data[vf].pf_vlan = 0;
7056         adapter->vf_data[vf].pf_qos = 0;
7057         igb_set_vf_vlan_strip(adapter, vf, false);
7058
7059         return 0;
7060 }
7061
7062 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7063                                u16 vlan, u8 qos, __be16 vlan_proto)
7064 {
7065         struct igb_adapter *adapter = netdev_priv(netdev);
7066
7067         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7068                 return -EINVAL;
7069
7070         if (vlan_proto != htons(ETH_P_8021Q))
7071                 return -EPROTONOSUPPORT;
7072
7073         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7074                                igb_disable_port_vlan(adapter, vf);
7075 }
7076
7077 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7078 {
7079         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7080         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7081         int ret;
7082
7083         if (adapter->vf_data[vf].pf_vlan)
7084                 return -1;
7085
7086         /* VLAN 0 is a special case, don't allow it to be removed */
7087         if (!vid && !add)
7088                 return 0;
7089
7090         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7091         if (!ret)
7092                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7093         return ret;
7094 }
7095
7096 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7097 {
7098         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7099
7100         /* clear flags - except flag that indicates PF has set the MAC */
7101         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7102         vf_data->last_nack = jiffies;
7103
7104         /* reset vlans for device */
7105         igb_clear_vf_vfta(adapter, vf);
7106         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7107         igb_set_vmvir(adapter, vf_data->pf_vlan |
7108                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7109         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7110         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7111
7112         /* reset multicast table array for vf */
7113         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7114
7115         /* Flush and reset the mta with the new values */
7116         igb_set_rx_mode(adapter->netdev);
7117 }
7118
7119 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7120 {
7121         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7122
7123         /* clear mac address as we were hotplug removed/added */
7124         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7125                 eth_zero_addr(vf_mac);
7126
7127         /* process remaining reset events */
7128         igb_vf_reset(adapter, vf);
7129 }
7130
7131 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7132 {
7133         struct e1000_hw *hw = &adapter->hw;
7134         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7135         u32 reg, msgbuf[3];
7136         u8 *addr = (u8 *)(&msgbuf[1]);
7137
7138         /* process all the same items cleared in a function level reset */
7139         igb_vf_reset(adapter, vf);
7140
7141         /* set vf mac address */
7142         igb_set_vf_mac(adapter, vf, vf_mac);
7143
7144         /* enable transmit and receive for vf */
7145         reg = rd32(E1000_VFTE);
7146         wr32(E1000_VFTE, reg | BIT(vf));
7147         reg = rd32(E1000_VFRE);
7148         wr32(E1000_VFRE, reg | BIT(vf));
7149
7150         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7151
7152         /* reply to reset with ack and vf mac address */
7153         if (!is_zero_ether_addr(vf_mac)) {
7154                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7155                 memcpy(addr, vf_mac, ETH_ALEN);
7156         } else {
7157                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7158         }
7159         igb_write_mbx(hw, msgbuf, 3, vf);
7160 }
7161
7162 static void igb_flush_mac_table(struct igb_adapter *adapter)
7163 {
7164         struct e1000_hw *hw = &adapter->hw;
7165         int i;
7166
7167         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7168                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7169                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
7170                 adapter->mac_table[i].queue = 0;
7171                 igb_rar_set_index(adapter, i);
7172         }
7173 }
7174
7175 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7176 {
7177         struct e1000_hw *hw = &adapter->hw;
7178         /* do not count rar entries reserved for VFs MAC addresses */
7179         int rar_entries = hw->mac.rar_entry_count -
7180                           adapter->vfs_allocated_count;
7181         int i, count = 0;
7182
7183         for (i = 0; i < rar_entries; i++) {
7184                 /* do not count default entries */
7185                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7186                         continue;
7187
7188                 /* do not count "in use" entries for different queues */
7189                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7190                     (adapter->mac_table[i].queue != queue))
7191                         continue;
7192
7193                 count++;
7194         }
7195
7196         return count;
7197 }
7198
7199 /* Set default MAC address for the PF in the first RAR entry */
7200 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7201 {
7202         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7203
7204         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7205         mac_table->queue = adapter->vfs_allocated_count;
7206         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7207
7208         igb_rar_set_index(adapter, 0);
7209 }
7210
7211 /* If the filter to be added and an already existing filter express
7212  * the same address and address type, it should be possible to only
7213  * override the other configurations, for example the queue to steer
7214  * traffic.
7215  */
7216 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7217                                       const u8 *addr, const u8 flags)
7218 {
7219         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7220                 return true;
7221
7222         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7223             (flags & IGB_MAC_STATE_SRC_ADDR))
7224                 return false;
7225
7226         if (!ether_addr_equal(addr, entry->addr))
7227                 return false;
7228
7229         return true;
7230 }
7231
7232 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7233  * 'flags' is used to indicate what kind of match is made, match is by
7234  * default for the destination address, if matching by source address
7235  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7236  */
7237 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7238                                     const u8 *addr, const u8 queue,
7239                                     const u8 flags)
7240 {
7241         struct e1000_hw *hw = &adapter->hw;
7242         int rar_entries = hw->mac.rar_entry_count -
7243                           adapter->vfs_allocated_count;
7244         int i;
7245
7246         if (is_zero_ether_addr(addr))
7247                 return -EINVAL;
7248
7249         /* Search for the first empty entry in the MAC table.
7250          * Do not touch entries at the end of the table reserved for the VF MAC
7251          * addresses.
7252          */
7253         for (i = 0; i < rar_entries; i++) {
7254                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7255                                                addr, flags))
7256                         continue;
7257
7258                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7259                 adapter->mac_table[i].queue = queue;
7260                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7261
7262                 igb_rar_set_index(adapter, i);
7263                 return i;
7264         }
7265
7266         return -ENOSPC;
7267 }
7268
7269 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7270                               const u8 queue)
7271 {
7272         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7273 }
7274
7275 /* Remove a MAC filter for 'addr' directing matching traffic to
7276  * 'queue', 'flags' is used to indicate what kind of match need to be
7277  * removed, match is by default for the destination address, if
7278  * matching by source address is to be removed the flag
7279  * IGB_MAC_STATE_SRC_ADDR can be used.
7280  */
7281 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7282                                     const u8 *addr, const u8 queue,
7283                                     const u8 flags)
7284 {
7285         struct e1000_hw *hw = &adapter->hw;
7286         int rar_entries = hw->mac.rar_entry_count -
7287                           adapter->vfs_allocated_count;
7288         int i;
7289
7290         if (is_zero_ether_addr(addr))
7291                 return -EINVAL;
7292
7293         /* Search for matching entry in the MAC table based on given address
7294          * and queue. Do not touch entries at the end of the table reserved
7295          * for the VF MAC addresses.
7296          */
7297         for (i = 0; i < rar_entries; i++) {
7298                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7299                         continue;
7300                 if ((adapter->mac_table[i].state & flags) != flags)
7301                         continue;
7302                 if (adapter->mac_table[i].queue != queue)
7303                         continue;
7304                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7305                         continue;
7306
7307                 /* When a filter for the default address is "deleted",
7308                  * we return it to its initial configuration
7309                  */
7310                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7311                         adapter->mac_table[i].state =
7312                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7313                         adapter->mac_table[i].queue =
7314                                 adapter->vfs_allocated_count;
7315                 } else {
7316                         adapter->mac_table[i].state = 0;
7317                         adapter->mac_table[i].queue = 0;
7318                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
7319                 }
7320
7321                 igb_rar_set_index(adapter, i);
7322                 return 0;
7323         }
7324
7325         return -ENOENT;
7326 }
7327
7328 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7329                               const u8 queue)
7330 {
7331         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7332 }
7333
7334 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7335                                 const u8 *addr, u8 queue, u8 flags)
7336 {
7337         struct e1000_hw *hw = &adapter->hw;
7338
7339         /* In theory, this should be supported on 82575 as well, but
7340          * that part wasn't easily accessible during development.
7341          */
7342         if (hw->mac.type != e1000_i210)
7343                 return -EOPNOTSUPP;
7344
7345         return igb_add_mac_filter_flags(adapter, addr, queue,
7346                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7347 }
7348
7349 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7350                                 const u8 *addr, u8 queue, u8 flags)
7351 {
7352         return igb_del_mac_filter_flags(adapter, addr, queue,
7353                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7354 }
7355
7356 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7357 {
7358         struct igb_adapter *adapter = netdev_priv(netdev);
7359         int ret;
7360
7361         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7362
7363         return min_t(int, ret, 0);
7364 }
7365
7366 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7367 {
7368         struct igb_adapter *adapter = netdev_priv(netdev);
7369
7370         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7371
7372         return 0;
7373 }
7374
7375 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7376                                  const u32 info, const u8 *addr)
7377 {
7378         struct pci_dev *pdev = adapter->pdev;
7379         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7380         struct list_head *pos;
7381         struct vf_mac_filter *entry = NULL;
7382         int ret = 0;
7383
7384         switch (info) {
7385         case E1000_VF_MAC_FILTER_CLR:
7386                 /* remove all unicast MAC filters related to the current VF */
7387                 list_for_each(pos, &adapter->vf_macs.l) {
7388                         entry = list_entry(pos, struct vf_mac_filter, l);
7389                         if (entry->vf == vf) {
7390                                 entry->vf = -1;
7391                                 entry->free = true;
7392                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7393                         }
7394                 }
7395                 break;
7396         case E1000_VF_MAC_FILTER_ADD:
7397                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7398                     !vf_data->trusted) {
7399                         dev_warn(&pdev->dev,
7400                                  "VF %d requested MAC filter but is administratively denied\n",
7401                                  vf);
7402                         return -EINVAL;
7403                 }
7404                 if (!is_valid_ether_addr(addr)) {
7405                         dev_warn(&pdev->dev,
7406                                  "VF %d attempted to set invalid MAC filter\n",
7407                                  vf);
7408                         return -EINVAL;
7409                 }
7410
7411                 /* try to find empty slot in the list */
7412                 list_for_each(pos, &adapter->vf_macs.l) {
7413                         entry = list_entry(pos, struct vf_mac_filter, l);
7414                         if (entry->free)
7415                                 break;
7416                 }
7417
7418                 if (entry && entry->free) {
7419                         entry->free = false;
7420                         entry->vf = vf;
7421                         ether_addr_copy(entry->vf_mac, addr);
7422
7423                         ret = igb_add_mac_filter(adapter, addr, vf);
7424                         ret = min_t(int, ret, 0);
7425                 } else {
7426                         ret = -ENOSPC;
7427                 }
7428
7429                 if (ret == -ENOSPC)
7430                         dev_warn(&pdev->dev,
7431                                  "VF %d has requested MAC filter but there is no space for it\n",
7432                                  vf);
7433                 break;
7434         default:
7435                 ret = -EINVAL;
7436                 break;
7437         }
7438
7439         return ret;
7440 }
7441
7442 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7443 {
7444         struct pci_dev *pdev = adapter->pdev;
7445         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7446         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7447
7448         /* The VF MAC Address is stored in a packed array of bytes
7449          * starting at the second 32 bit word of the msg array
7450          */
7451         unsigned char *addr = (unsigned char *)&msg[1];
7452         int ret = 0;
7453
7454         if (!info) {
7455                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7456                     !vf_data->trusted) {
7457                         dev_warn(&pdev->dev,
7458                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7459                                  vf);
7460                         return -EINVAL;
7461                 }
7462
7463                 if (!is_valid_ether_addr(addr)) {
7464                         dev_warn(&pdev->dev,
7465                                  "VF %d attempted to set invalid MAC\n",
7466                                  vf);
7467                         return -EINVAL;
7468                 }
7469
7470                 ret = igb_set_vf_mac(adapter, vf, addr);
7471         } else {
7472                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7473         }
7474
7475         return ret;
7476 }
7477
7478 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7479 {
7480         struct e1000_hw *hw = &adapter->hw;
7481         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7482         u32 msg = E1000_VT_MSGTYPE_NACK;
7483
7484         /* if device isn't clear to send it shouldn't be reading either */
7485         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7486             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7487                 igb_write_mbx(hw, &msg, 1, vf);
7488                 vf_data->last_nack = jiffies;
7489         }
7490 }
7491
7492 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7493 {
7494         struct pci_dev *pdev = adapter->pdev;
7495         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7496         struct e1000_hw *hw = &adapter->hw;
7497         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7498         s32 retval;
7499
7500         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7501
7502         if (retval) {
7503                 /* if receive failed revoke VF CTS stats and restart init */
7504                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7505                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7506                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7507                         goto unlock;
7508                 goto out;
7509         }
7510
7511         /* this is a message we already processed, do nothing */
7512         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7513                 goto unlock;
7514
7515         /* until the vf completes a reset it should not be
7516          * allowed to start any configuration.
7517          */
7518         if (msgbuf[0] == E1000_VF_RESET) {
7519                 /* unlocks mailbox */
7520                 igb_vf_reset_msg(adapter, vf);
7521                 return;
7522         }
7523
7524         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7525                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7526                         goto unlock;
7527                 retval = -1;
7528                 goto out;
7529         }
7530
7531         switch ((msgbuf[0] & 0xFFFF)) {
7532         case E1000_VF_SET_MAC_ADDR:
7533                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7534                 break;
7535         case E1000_VF_SET_PROMISC:
7536                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7537                 break;
7538         case E1000_VF_SET_MULTICAST:
7539                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7540                 break;
7541         case E1000_VF_SET_LPE:
7542                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7543                 break;
7544         case E1000_VF_SET_VLAN:
7545                 retval = -1;
7546                 if (vf_data->pf_vlan)
7547                         dev_warn(&pdev->dev,
7548                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7549                                  vf);
7550                 else
7551                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7552                 break;
7553         default:
7554                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7555                 retval = -1;
7556                 break;
7557         }
7558
7559         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7560 out:
7561         /* notify the VF of the results of what it sent us */
7562         if (retval)
7563                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7564         else
7565                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7566
7567         /* unlocks mailbox */
7568         igb_write_mbx(hw, msgbuf, 1, vf);
7569         return;
7570
7571 unlock:
7572         igb_unlock_mbx(hw, vf);
7573 }
7574
7575 static void igb_msg_task(struct igb_adapter *adapter)
7576 {
7577         struct e1000_hw *hw = &adapter->hw;
7578         u32 vf;
7579
7580         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
7581                 /* process any reset requests */
7582                 if (!igb_check_for_rst(hw, vf))
7583                         igb_vf_reset_event(adapter, vf);
7584
7585                 /* process any messages pending */
7586                 if (!igb_check_for_msg(hw, vf))
7587                         igb_rcv_msg_from_vf(adapter, vf);
7588
7589                 /* process any acks */
7590                 if (!igb_check_for_ack(hw, vf))
7591                         igb_rcv_ack_from_vf(adapter, vf);
7592         }
7593 }
7594
7595 /**
7596  *  igb_set_uta - Set unicast filter table address
7597  *  @adapter: board private structure
7598  *  @set: boolean indicating if we are setting or clearing bits
7599  *
7600  *  The unicast table address is a register array of 32-bit registers.
7601  *  The table is meant to be used in a way similar to how the MTA is used
7602  *  however due to certain limitations in the hardware it is necessary to
7603  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
7604  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
7605  **/
7606 static void igb_set_uta(struct igb_adapter *adapter, bool set)
7607 {
7608         struct e1000_hw *hw = &adapter->hw;
7609         u32 uta = set ? ~0 : 0;
7610         int i;
7611
7612         /* we only need to do this if VMDq is enabled */
7613         if (!adapter->vfs_allocated_count)
7614                 return;
7615
7616         for (i = hw->mac.uta_reg_count; i--;)
7617                 array_wr32(E1000_UTA, i, uta);
7618 }
7619
7620 /**
7621  *  igb_intr_msi - Interrupt Handler
7622  *  @irq: interrupt number
7623  *  @data: pointer to a network interface device structure
7624  **/
7625 static irqreturn_t igb_intr_msi(int irq, void *data)
7626 {
7627         struct igb_adapter *adapter = data;
7628         struct igb_q_vector *q_vector = adapter->q_vector[0];
7629         struct e1000_hw *hw = &adapter->hw;
7630         /* read ICR disables interrupts using IAM */
7631         u32 icr = rd32(E1000_ICR);
7632
7633         igb_write_itr(q_vector);
7634
7635         if (icr & E1000_ICR_DRSTA)
7636                 schedule_work(&adapter->reset_task);
7637
7638         if (icr & E1000_ICR_DOUTSYNC) {
7639                 /* HW is reporting DMA is out of sync */
7640                 adapter->stats.doosync++;
7641         }
7642
7643         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7644                 hw->mac.get_link_status = 1;
7645                 if (!test_bit(__IGB_DOWN, &adapter->state))
7646                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7647         }
7648
7649         if (icr & E1000_ICR_TS)
7650                 igb_tsync_interrupt(adapter);
7651
7652         napi_schedule(&q_vector->napi);
7653
7654         return IRQ_HANDLED;
7655 }
7656
7657 /**
7658  *  igb_intr - Legacy Interrupt Handler
7659  *  @irq: interrupt number
7660  *  @data: pointer to a network interface device structure
7661  **/
7662 static irqreturn_t igb_intr(int irq, void *data)
7663 {
7664         struct igb_adapter *adapter = data;
7665         struct igb_q_vector *q_vector = adapter->q_vector[0];
7666         struct e1000_hw *hw = &adapter->hw;
7667         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
7668          * need for the IMC write
7669          */
7670         u32 icr = rd32(E1000_ICR);
7671
7672         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
7673          * not set, then the adapter didn't send an interrupt
7674          */
7675         if (!(icr & E1000_ICR_INT_ASSERTED))
7676                 return IRQ_NONE;
7677
7678         igb_write_itr(q_vector);
7679
7680         if (icr & E1000_ICR_DRSTA)
7681                 schedule_work(&adapter->reset_task);
7682
7683         if (icr & E1000_ICR_DOUTSYNC) {
7684                 /* HW is reporting DMA is out of sync */
7685                 adapter->stats.doosync++;
7686         }
7687
7688         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
7689                 hw->mac.get_link_status = 1;
7690                 /* guard against interrupt when we're going down */
7691                 if (!test_bit(__IGB_DOWN, &adapter->state))
7692                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7693         }
7694
7695         if (icr & E1000_ICR_TS)
7696                 igb_tsync_interrupt(adapter);
7697
7698         napi_schedule(&q_vector->napi);
7699
7700         return IRQ_HANDLED;
7701 }
7702
7703 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
7704 {
7705         struct igb_adapter *adapter = q_vector->adapter;
7706         struct e1000_hw *hw = &adapter->hw;
7707
7708         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
7709             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
7710                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
7711                         igb_set_itr(q_vector);
7712                 else
7713                         igb_update_ring_itr(q_vector);
7714         }
7715
7716         if (!test_bit(__IGB_DOWN, &adapter->state)) {
7717                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
7718                         wr32(E1000_EIMS, q_vector->eims_value);
7719                 else
7720                         igb_irq_enable(adapter);
7721         }
7722 }
7723
7724 /**
7725  *  igb_poll - NAPI Rx polling callback
7726  *  @napi: napi polling structure
7727  *  @budget: count of how many packets we should handle
7728  **/
7729 static int igb_poll(struct napi_struct *napi, int budget)
7730 {
7731         struct igb_q_vector *q_vector = container_of(napi,
7732                                                      struct igb_q_vector,
7733                                                      napi);
7734         bool clean_complete = true;
7735         int work_done = 0;
7736
7737 #ifdef CONFIG_IGB_DCA
7738         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
7739                 igb_update_dca(q_vector);
7740 #endif
7741         if (q_vector->tx.ring)
7742                 clean_complete = igb_clean_tx_irq(q_vector, budget);
7743
7744         if (q_vector->rx.ring) {
7745                 int cleaned = igb_clean_rx_irq(q_vector, budget);
7746
7747                 work_done += cleaned;
7748                 if (cleaned >= budget)
7749                         clean_complete = false;
7750         }
7751
7752         /* If all work not completed, return budget and keep polling */
7753         if (!clean_complete)
7754                 return budget;
7755
7756         /* If not enough Rx work done, exit the polling mode */
7757         napi_complete_done(napi, work_done);
7758         igb_ring_irq_enable(q_vector);
7759
7760         return 0;
7761 }
7762
7763 /**
7764  *  igb_clean_tx_irq - Reclaim resources after transmit completes
7765  *  @q_vector: pointer to q_vector containing needed info
7766  *  @napi_budget: Used to determine if we are in netpoll
7767  *
7768  *  returns true if ring is completely cleaned
7769  **/
7770 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
7771 {
7772         struct igb_adapter *adapter = q_vector->adapter;
7773         struct igb_ring *tx_ring = q_vector->tx.ring;
7774         struct igb_tx_buffer *tx_buffer;
7775         union e1000_adv_tx_desc *tx_desc;
7776         unsigned int total_bytes = 0, total_packets = 0;
7777         unsigned int budget = q_vector->tx.work_limit;
7778         unsigned int i = tx_ring->next_to_clean;
7779
7780         if (test_bit(__IGB_DOWN, &adapter->state))
7781                 return true;
7782
7783         tx_buffer = &tx_ring->tx_buffer_info[i];
7784         tx_desc = IGB_TX_DESC(tx_ring, i);
7785         i -= tx_ring->count;
7786
7787         do {
7788                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7789
7790                 /* if next_to_watch is not set then there is no work pending */
7791                 if (!eop_desc)
7792                         break;
7793
7794                 /* prevent any other reads prior to eop_desc */
7795                 smp_rmb();
7796
7797                 /* if DD is not set pending work has not been completed */
7798                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7799                         break;
7800
7801                 /* clear next_to_watch to prevent false hangs */
7802                 tx_buffer->next_to_watch = NULL;
7803
7804                 /* update the statistics for this packet */
7805                 total_bytes += tx_buffer->bytecount;
7806                 total_packets += tx_buffer->gso_segs;
7807
7808                 /* free the skb */
7809                 napi_consume_skb(tx_buffer->skb, napi_budget);
7810
7811                 /* unmap skb header data */
7812                 dma_unmap_single(tx_ring->dev,
7813                                  dma_unmap_addr(tx_buffer, dma),
7814                                  dma_unmap_len(tx_buffer, len),
7815                                  DMA_TO_DEVICE);
7816
7817                 /* clear tx_buffer data */
7818                 dma_unmap_len_set(tx_buffer, len, 0);
7819
7820                 /* clear last DMA location and unmap remaining buffers */
7821                 while (tx_desc != eop_desc) {
7822                         tx_buffer++;
7823                         tx_desc++;
7824                         i++;
7825                         if (unlikely(!i)) {
7826                                 i -= tx_ring->count;
7827                                 tx_buffer = tx_ring->tx_buffer_info;
7828                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7829                         }
7830
7831                         /* unmap any remaining paged data */
7832                         if (dma_unmap_len(tx_buffer, len)) {
7833                                 dma_unmap_page(tx_ring->dev,
7834                                                dma_unmap_addr(tx_buffer, dma),
7835                                                dma_unmap_len(tx_buffer, len),
7836                                                DMA_TO_DEVICE);
7837                                 dma_unmap_len_set(tx_buffer, len, 0);
7838                         }
7839                 }
7840
7841                 /* move us one more past the eop_desc for start of next pkt */
7842                 tx_buffer++;
7843                 tx_desc++;
7844                 i++;
7845                 if (unlikely(!i)) {
7846                         i -= tx_ring->count;
7847                         tx_buffer = tx_ring->tx_buffer_info;
7848                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7849                 }
7850
7851                 /* issue prefetch for next Tx descriptor */
7852                 prefetch(tx_desc);
7853
7854                 /* update budget accounting */
7855                 budget--;
7856         } while (likely(budget));
7857
7858         netdev_tx_completed_queue(txring_txq(tx_ring),
7859                                   total_packets, total_bytes);
7860         i += tx_ring->count;
7861         tx_ring->next_to_clean = i;
7862         u64_stats_update_begin(&tx_ring->tx_syncp);
7863         tx_ring->tx_stats.bytes += total_bytes;
7864         tx_ring->tx_stats.packets += total_packets;
7865         u64_stats_update_end(&tx_ring->tx_syncp);
7866         q_vector->tx.total_bytes += total_bytes;
7867         q_vector->tx.total_packets += total_packets;
7868
7869         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7870                 struct e1000_hw *hw = &adapter->hw;
7871
7872                 /* Detect a transmit hang in hardware, this serializes the
7873                  * check with the clearing of time_stamp and movement of i
7874                  */
7875                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7876                 if (tx_buffer->next_to_watch &&
7877                     time_after(jiffies, tx_buffer->time_stamp +
7878                                (adapter->tx_timeout_factor * HZ)) &&
7879                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
7880
7881                         /* detected Tx unit hang */
7882                         dev_err(tx_ring->dev,
7883                                 "Detected Tx Unit Hang\n"
7884                                 "  Tx Queue             <%d>\n"
7885                                 "  TDH                  <%x>\n"
7886                                 "  TDT                  <%x>\n"
7887                                 "  next_to_use          <%x>\n"
7888                                 "  next_to_clean        <%x>\n"
7889                                 "buffer_info[next_to_clean]\n"
7890                                 "  time_stamp           <%lx>\n"
7891                                 "  next_to_watch        <%p>\n"
7892                                 "  jiffies              <%lx>\n"
7893                                 "  desc.status          <%x>\n",
7894                                 tx_ring->queue_index,
7895                                 rd32(E1000_TDH(tx_ring->reg_idx)),
7896                                 readl(tx_ring->tail),
7897                                 tx_ring->next_to_use,
7898                                 tx_ring->next_to_clean,
7899                                 tx_buffer->time_stamp,
7900                                 tx_buffer->next_to_watch,
7901                                 jiffies,
7902                                 tx_buffer->next_to_watch->wb.status);
7903                         netif_stop_subqueue(tx_ring->netdev,
7904                                             tx_ring->queue_index);
7905
7906                         /* we are about to reset, no point in enabling stuff */
7907                         return true;
7908                 }
7909         }
7910
7911 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7912         if (unlikely(total_packets &&
7913             netif_carrier_ok(tx_ring->netdev) &&
7914             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7915                 /* Make sure that anybody stopping the queue after this
7916                  * sees the new next_to_clean.
7917                  */
7918                 smp_mb();
7919                 if (__netif_subqueue_stopped(tx_ring->netdev,
7920                                              tx_ring->queue_index) &&
7921                     !(test_bit(__IGB_DOWN, &adapter->state))) {
7922                         netif_wake_subqueue(tx_ring->netdev,
7923                                             tx_ring->queue_index);
7924
7925                         u64_stats_update_begin(&tx_ring->tx_syncp);
7926                         tx_ring->tx_stats.restart_queue++;
7927                         u64_stats_update_end(&tx_ring->tx_syncp);
7928                 }
7929         }
7930
7931         return !!budget;
7932 }
7933
7934 /**
7935  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
7936  *  @rx_ring: rx descriptor ring to store buffers on
7937  *  @old_buff: donor buffer to have page reused
7938  *
7939  *  Synchronizes page for reuse by the adapter
7940  **/
7941 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7942                               struct igb_rx_buffer *old_buff)
7943 {
7944         struct igb_rx_buffer *new_buff;
7945         u16 nta = rx_ring->next_to_alloc;
7946
7947         new_buff = &rx_ring->rx_buffer_info[nta];
7948
7949         /* update, and store next to alloc */
7950         nta++;
7951         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7952
7953         /* Transfer page from old buffer to new buffer.
7954          * Move each member individually to avoid possible store
7955          * forwarding stalls.
7956          */
7957         new_buff->dma           = old_buff->dma;
7958         new_buff->page          = old_buff->page;
7959         new_buff->page_offset   = old_buff->page_offset;
7960         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
7961 }
7962
7963 static inline bool igb_page_is_reserved(struct page *page)
7964 {
7965         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
7966 }
7967
7968 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer)
7969 {
7970         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
7971         struct page *page = rx_buffer->page;
7972
7973         /* avoid re-using remote pages */
7974         if (unlikely(igb_page_is_reserved(page)))
7975                 return false;
7976
7977 #if (PAGE_SIZE < 8192)
7978         /* if we are only owner of page we can reuse it */
7979         if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
7980                 return false;
7981 #else
7982 #define IGB_LAST_OFFSET \
7983         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
7984
7985         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
7986                 return false;
7987 #endif
7988
7989         /* If we have drained the page fragment pool we need to update
7990          * the pagecnt_bias and page count so that we fully restock the
7991          * number of references the driver holds.
7992          */
7993         if (unlikely(!pagecnt_bias)) {
7994                 page_ref_add(page, USHRT_MAX);
7995                 rx_buffer->pagecnt_bias = USHRT_MAX;
7996         }
7997
7998         return true;
7999 }
8000
8001 /**
8002  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8003  *  @rx_ring: rx descriptor ring to transact packets on
8004  *  @rx_buffer: buffer containing page to add
8005  *  @skb: sk_buff to place the data into
8006  *  @size: size of buffer to be added
8007  *
8008  *  This function will add the data contained in rx_buffer->page to the skb.
8009  **/
8010 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8011                             struct igb_rx_buffer *rx_buffer,
8012                             struct sk_buff *skb,
8013                             unsigned int size)
8014 {
8015 #if (PAGE_SIZE < 8192)
8016         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8017 #else
8018         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8019                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8020                                 SKB_DATA_ALIGN(size);
8021 #endif
8022         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8023                         rx_buffer->page_offset, size, truesize);
8024 #if (PAGE_SIZE < 8192)
8025         rx_buffer->page_offset ^= truesize;
8026 #else
8027         rx_buffer->page_offset += truesize;
8028 #endif
8029 }
8030
8031 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8032                                          struct igb_rx_buffer *rx_buffer,
8033                                          union e1000_adv_rx_desc *rx_desc,
8034                                          unsigned int size)
8035 {
8036         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
8037 #if (PAGE_SIZE < 8192)
8038         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8039 #else
8040         unsigned int truesize = SKB_DATA_ALIGN(size);
8041 #endif
8042         unsigned int headlen;
8043         struct sk_buff *skb;
8044
8045         /* prefetch first cache line of first page */
8046         prefetch(va);
8047 #if L1_CACHE_BYTES < 128
8048         prefetch(va + L1_CACHE_BYTES);
8049 #endif
8050
8051         /* allocate a skb to store the frags */
8052         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8053         if (unlikely(!skb))
8054                 return NULL;
8055
8056         if (unlikely(igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))) {
8057                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8058                 va += IGB_TS_HDR_LEN;
8059                 size -= IGB_TS_HDR_LEN;
8060         }
8061
8062         /* Determine available headroom for copy */
8063         headlen = size;
8064         if (headlen > IGB_RX_HDR_LEN)
8065                 headlen = eth_get_headlen(va, IGB_RX_HDR_LEN);
8066
8067         /* align pull length to size of long to optimize memcpy performance */
8068         memcpy(__skb_put(skb, headlen), va, ALIGN(headlen, sizeof(long)));
8069
8070         /* update all of the pointers */
8071         size -= headlen;
8072         if (size) {
8073                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8074                                 (va + headlen) - page_address(rx_buffer->page),
8075                                 size, truesize);
8076 #if (PAGE_SIZE < 8192)
8077                 rx_buffer->page_offset ^= truesize;
8078 #else
8079                 rx_buffer->page_offset += truesize;
8080 #endif
8081         } else {
8082                 rx_buffer->pagecnt_bias++;
8083         }
8084
8085         return skb;
8086 }
8087
8088 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8089                                      struct igb_rx_buffer *rx_buffer,
8090                                      union e1000_adv_rx_desc *rx_desc,
8091                                      unsigned int size)
8092 {
8093         void *va = page_address(rx_buffer->page) + rx_buffer->page_offset;
8094 #if (PAGE_SIZE < 8192)
8095         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8096 #else
8097         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8098                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size);
8099 #endif
8100         struct sk_buff *skb;
8101
8102         /* prefetch first cache line of first page */
8103         prefetch(va);
8104 #if L1_CACHE_BYTES < 128
8105         prefetch(va + L1_CACHE_BYTES);
8106 #endif
8107
8108         /* build an skb around the page buffer */
8109         skb = build_skb(va - IGB_SKB_PAD, truesize);
8110         if (unlikely(!skb))
8111                 return NULL;
8112
8113         /* update pointers within the skb to store the data */
8114         skb_reserve(skb, IGB_SKB_PAD);
8115         __skb_put(skb, size);
8116
8117         /* pull timestamp out of packet data */
8118         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8119                 igb_ptp_rx_pktstamp(rx_ring->q_vector, skb->data, skb);
8120                 __skb_pull(skb, IGB_TS_HDR_LEN);
8121         }
8122
8123         /* update buffer offset */
8124 #if (PAGE_SIZE < 8192)
8125         rx_buffer->page_offset ^= truesize;
8126 #else
8127         rx_buffer->page_offset += truesize;
8128 #endif
8129
8130         return skb;
8131 }
8132
8133 static inline void igb_rx_checksum(struct igb_ring *ring,
8134                                    union e1000_adv_rx_desc *rx_desc,
8135                                    struct sk_buff *skb)
8136 {
8137         skb_checksum_none_assert(skb);
8138
8139         /* Ignore Checksum bit is set */
8140         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8141                 return;
8142
8143         /* Rx checksum disabled via ethtool */
8144         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8145                 return;
8146
8147         /* TCP/UDP checksum error bit is set */
8148         if (igb_test_staterr(rx_desc,
8149                              E1000_RXDEXT_STATERR_TCPE |
8150                              E1000_RXDEXT_STATERR_IPE)) {
8151                 /* work around errata with sctp packets where the TCPE aka
8152                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8153                  * packets, (aka let the stack check the crc32c)
8154                  */
8155                 if (!((skb->len == 60) &&
8156                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8157                         u64_stats_update_begin(&ring->rx_syncp);
8158                         ring->rx_stats.csum_err++;
8159                         u64_stats_update_end(&ring->rx_syncp);
8160                 }
8161                 /* let the stack verify checksum errors */
8162                 return;
8163         }
8164         /* It must be a TCP or UDP packet with a valid checksum */
8165         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8166                                       E1000_RXD_STAT_UDPCS))
8167                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8168
8169         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8170                 le32_to_cpu(rx_desc->wb.upper.status_error));
8171 }
8172
8173 static inline void igb_rx_hash(struct igb_ring *ring,
8174                                union e1000_adv_rx_desc *rx_desc,
8175                                struct sk_buff *skb)
8176 {
8177         if (ring->netdev->features & NETIF_F_RXHASH)
8178                 skb_set_hash(skb,
8179                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8180                              PKT_HASH_TYPE_L3);
8181 }
8182
8183 /**
8184  *  igb_is_non_eop - process handling of non-EOP buffers
8185  *  @rx_ring: Rx ring being processed
8186  *  @rx_desc: Rx descriptor for current buffer
8187  *  @skb: current socket buffer containing buffer in progress
8188  *
8189  *  This function updates next to clean.  If the buffer is an EOP buffer
8190  *  this function exits returning false, otherwise it will place the
8191  *  sk_buff in the next buffer to be chained and return true indicating
8192  *  that this is in fact a non-EOP buffer.
8193  **/
8194 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8195                            union e1000_adv_rx_desc *rx_desc)
8196 {
8197         u32 ntc = rx_ring->next_to_clean + 1;
8198
8199         /* fetch, update, and store next to clean */
8200         ntc = (ntc < rx_ring->count) ? ntc : 0;
8201         rx_ring->next_to_clean = ntc;
8202
8203         prefetch(IGB_RX_DESC(rx_ring, ntc));
8204
8205         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8206                 return false;
8207
8208         return true;
8209 }
8210
8211 /**
8212  *  igb_cleanup_headers - Correct corrupted or empty headers
8213  *  @rx_ring: rx descriptor ring packet is being transacted on
8214  *  @rx_desc: pointer to the EOP Rx descriptor
8215  *  @skb: pointer to current skb being fixed
8216  *
8217  *  Address the case where we are pulling data in on pages only
8218  *  and as such no data is present in the skb header.
8219  *
8220  *  In addition if skb is not at least 60 bytes we need to pad it so that
8221  *  it is large enough to qualify as a valid Ethernet frame.
8222  *
8223  *  Returns true if an error was encountered and skb was freed.
8224  **/
8225 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8226                                 union e1000_adv_rx_desc *rx_desc,
8227                                 struct sk_buff *skb)
8228 {
8229         if (unlikely((igb_test_staterr(rx_desc,
8230                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8231                 struct net_device *netdev = rx_ring->netdev;
8232                 if (!(netdev->features & NETIF_F_RXALL)) {
8233                         dev_kfree_skb_any(skb);
8234                         return true;
8235                 }
8236         }
8237
8238         /* if eth_skb_pad returns an error the skb was freed */
8239         if (eth_skb_pad(skb))
8240                 return true;
8241
8242         return false;
8243 }
8244
8245 /**
8246  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8247  *  @rx_ring: rx descriptor ring packet is being transacted on
8248  *  @rx_desc: pointer to the EOP Rx descriptor
8249  *  @skb: pointer to current skb being populated
8250  *
8251  *  This function checks the ring, descriptor, and packet information in
8252  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8253  *  other fields within the skb.
8254  **/
8255 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8256                                    union e1000_adv_rx_desc *rx_desc,
8257                                    struct sk_buff *skb)
8258 {
8259         struct net_device *dev = rx_ring->netdev;
8260
8261         igb_rx_hash(rx_ring, rx_desc, skb);
8262
8263         igb_rx_checksum(rx_ring, rx_desc, skb);
8264
8265         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8266             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8267                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8268
8269         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8270             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8271                 u16 vid;
8272
8273                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8274                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8275                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
8276                 else
8277                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8278
8279                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8280         }
8281
8282         skb_record_rx_queue(skb, rx_ring->queue_index);
8283
8284         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8285 }
8286
8287 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8288                                                const unsigned int size)
8289 {
8290         struct igb_rx_buffer *rx_buffer;
8291
8292         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8293         prefetchw(rx_buffer->page);
8294
8295         /* we are reusing so sync this buffer for CPU use */
8296         dma_sync_single_range_for_cpu(rx_ring->dev,
8297                                       rx_buffer->dma,
8298                                       rx_buffer->page_offset,
8299                                       size,
8300                                       DMA_FROM_DEVICE);
8301
8302         rx_buffer->pagecnt_bias--;
8303
8304         return rx_buffer;
8305 }
8306
8307 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8308                               struct igb_rx_buffer *rx_buffer)
8309 {
8310         if (igb_can_reuse_rx_page(rx_buffer)) {
8311                 /* hand second half of page back to the ring */
8312                 igb_reuse_rx_page(rx_ring, rx_buffer);
8313         } else {
8314                 /* We are not reusing the buffer so unmap it and free
8315                  * any references we are holding to it
8316                  */
8317                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8318                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8319                                      IGB_RX_DMA_ATTR);
8320                 __page_frag_cache_drain(rx_buffer->page,
8321                                         rx_buffer->pagecnt_bias);
8322         }
8323
8324         /* clear contents of rx_buffer */
8325         rx_buffer->page = NULL;
8326 }
8327
8328 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8329 {
8330         struct igb_ring *rx_ring = q_vector->rx.ring;
8331         struct sk_buff *skb = rx_ring->skb;
8332         unsigned int total_bytes = 0, total_packets = 0;
8333         u16 cleaned_count = igb_desc_unused(rx_ring);
8334
8335         while (likely(total_packets < budget)) {
8336                 union e1000_adv_rx_desc *rx_desc;
8337                 struct igb_rx_buffer *rx_buffer;
8338                 unsigned int size;
8339
8340                 /* return some buffers to hardware, one at a time is too slow */
8341                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8342                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8343                         cleaned_count = 0;
8344                 }
8345
8346                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8347                 size = le16_to_cpu(rx_desc->wb.upper.length);
8348                 if (!size)
8349                         break;
8350
8351                 /* This memory barrier is needed to keep us from reading
8352                  * any other fields out of the rx_desc until we know the
8353                  * descriptor has been written back
8354                  */
8355                 dma_rmb();
8356
8357                 rx_buffer = igb_get_rx_buffer(rx_ring, size);
8358
8359                 /* retrieve a buffer from the ring */
8360                 if (skb)
8361                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8362                 else if (ring_uses_build_skb(rx_ring))
8363                         skb = igb_build_skb(rx_ring, rx_buffer, rx_desc, size);
8364                 else
8365                         skb = igb_construct_skb(rx_ring, rx_buffer,
8366                                                 rx_desc, size);
8367
8368                 /* exit if we failed to retrieve a buffer */
8369                 if (!skb) {
8370                         rx_ring->rx_stats.alloc_failed++;
8371                         rx_buffer->pagecnt_bias++;
8372                         break;
8373                 }
8374
8375                 igb_put_rx_buffer(rx_ring, rx_buffer);
8376                 cleaned_count++;
8377
8378                 /* fetch next buffer in frame if non-eop */
8379                 if (igb_is_non_eop(rx_ring, rx_desc))
8380                         continue;
8381
8382                 /* verify the packet layout is correct */
8383                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8384                         skb = NULL;
8385                         continue;
8386                 }
8387
8388                 /* probably a little skewed due to removing CRC */
8389                 total_bytes += skb->len;
8390
8391                 /* populate checksum, timestamp, VLAN, and protocol */
8392                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8393
8394                 napi_gro_receive(&q_vector->napi, skb);
8395
8396                 /* reset skb pointer */
8397                 skb = NULL;
8398
8399                 /* update budget accounting */
8400                 total_packets++;
8401         }
8402
8403         /* place incomplete frames back on ring for completion */
8404         rx_ring->skb = skb;
8405
8406         u64_stats_update_begin(&rx_ring->rx_syncp);
8407         rx_ring->rx_stats.packets += total_packets;
8408         rx_ring->rx_stats.bytes += total_bytes;
8409         u64_stats_update_end(&rx_ring->rx_syncp);
8410         q_vector->rx.total_packets += total_packets;
8411         q_vector->rx.total_bytes += total_bytes;
8412
8413         if (cleaned_count)
8414                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8415
8416         return total_packets;
8417 }
8418
8419 static inline unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8420 {
8421         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8422 }
8423
8424 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8425                                   struct igb_rx_buffer *bi)
8426 {
8427         struct page *page = bi->page;
8428         dma_addr_t dma;
8429
8430         /* since we are recycling buffers we should seldom need to alloc */
8431         if (likely(page))
8432                 return true;
8433
8434         /* alloc new page for storage */
8435         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
8436         if (unlikely(!page)) {
8437                 rx_ring->rx_stats.alloc_failed++;
8438                 return false;
8439         }
8440
8441         /* map page for use */
8442         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
8443                                  igb_rx_pg_size(rx_ring),
8444                                  DMA_FROM_DEVICE,
8445                                  IGB_RX_DMA_ATTR);
8446
8447         /* if mapping failed free memory back to system since
8448          * there isn't much point in holding memory we can't use
8449          */
8450         if (dma_mapping_error(rx_ring->dev, dma)) {
8451                 __free_pages(page, igb_rx_pg_order(rx_ring));
8452
8453                 rx_ring->rx_stats.alloc_failed++;
8454                 return false;
8455         }
8456
8457         bi->dma = dma;
8458         bi->page = page;
8459         bi->page_offset = igb_rx_offset(rx_ring);
8460         bi->pagecnt_bias = 1;
8461
8462         return true;
8463 }
8464
8465 /**
8466  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
8467  *  @adapter: address of board private structure
8468  **/
8469 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8470 {
8471         union e1000_adv_rx_desc *rx_desc;
8472         struct igb_rx_buffer *bi;
8473         u16 i = rx_ring->next_to_use;
8474         u16 bufsz;
8475
8476         /* nothing to do */
8477         if (!cleaned_count)
8478                 return;
8479
8480         rx_desc = IGB_RX_DESC(rx_ring, i);
8481         bi = &rx_ring->rx_buffer_info[i];
8482         i -= rx_ring->count;
8483
8484         bufsz = igb_rx_bufsz(rx_ring);
8485
8486         do {
8487                 if (!igb_alloc_mapped_page(rx_ring, bi))
8488                         break;
8489
8490                 /* sync the buffer for use by the device */
8491                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
8492                                                  bi->page_offset, bufsz,
8493                                                  DMA_FROM_DEVICE);
8494
8495                 /* Refresh the desc even if buffer_addrs didn't change
8496                  * because each write-back erases this info.
8497                  */
8498                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8499
8500                 rx_desc++;
8501                 bi++;
8502                 i++;
8503                 if (unlikely(!i)) {
8504                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8505                         bi = rx_ring->rx_buffer_info;
8506                         i -= rx_ring->count;
8507                 }
8508
8509                 /* clear the length for the next_to_use descriptor */
8510                 rx_desc->wb.upper.length = 0;
8511
8512                 cleaned_count--;
8513         } while (cleaned_count);
8514
8515         i += rx_ring->count;
8516
8517         if (rx_ring->next_to_use != i) {
8518                 /* record the next descriptor to use */
8519                 rx_ring->next_to_use = i;
8520
8521                 /* update next to alloc since we have filled the ring */
8522                 rx_ring->next_to_alloc = i;
8523
8524                 /* Force memory writes to complete before letting h/w
8525                  * know there are new descriptors to fetch.  (Only
8526                  * applicable for weak-ordered memory model archs,
8527                  * such as IA-64).
8528                  */
8529                 dma_wmb();
8530                 writel(i, rx_ring->tail);
8531         }
8532 }
8533
8534 /**
8535  * igb_mii_ioctl -
8536  * @netdev:
8537  * @ifreq:
8538  * @cmd:
8539  **/
8540 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8541 {
8542         struct igb_adapter *adapter = netdev_priv(netdev);
8543         struct mii_ioctl_data *data = if_mii(ifr);
8544
8545         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8546                 return -EOPNOTSUPP;
8547
8548         switch (cmd) {
8549         case SIOCGMIIPHY:
8550                 data->phy_id = adapter->hw.phy.addr;
8551                 break;
8552         case SIOCGMIIREG:
8553                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8554                                      &data->val_out))
8555                         return -EIO;
8556                 break;
8557         case SIOCSMIIREG:
8558         default:
8559                 return -EOPNOTSUPP;
8560         }
8561         return 0;
8562 }
8563
8564 /**
8565  * igb_ioctl -
8566  * @netdev:
8567  * @ifreq:
8568  * @cmd:
8569  **/
8570 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8571 {
8572         switch (cmd) {
8573         case SIOCGMIIPHY:
8574         case SIOCGMIIREG:
8575         case SIOCSMIIREG:
8576                 return igb_mii_ioctl(netdev, ifr, cmd);
8577         case SIOCGHWTSTAMP:
8578                 return igb_ptp_get_ts_config(netdev, ifr);
8579         case SIOCSHWTSTAMP:
8580                 return igb_ptp_set_ts_config(netdev, ifr);
8581         default:
8582                 return -EOPNOTSUPP;
8583         }
8584 }
8585
8586 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8587 {
8588         struct igb_adapter *adapter = hw->back;
8589
8590         pci_read_config_word(adapter->pdev, reg, value);
8591 }
8592
8593 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
8594 {
8595         struct igb_adapter *adapter = hw->back;
8596
8597         pci_write_config_word(adapter->pdev, reg, *value);
8598 }
8599
8600 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8601 {
8602         struct igb_adapter *adapter = hw->back;
8603
8604         if (pcie_capability_read_word(adapter->pdev, reg, value))
8605                 return -E1000_ERR_CONFIG;
8606
8607         return 0;
8608 }
8609
8610 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8611 {
8612         struct igb_adapter *adapter = hw->back;
8613
8614         if (pcie_capability_write_word(adapter->pdev, reg, *value))
8615                 return -E1000_ERR_CONFIG;
8616
8617         return 0;
8618 }
8619
8620 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
8621 {
8622         struct igb_adapter *adapter = netdev_priv(netdev);
8623         struct e1000_hw *hw = &adapter->hw;
8624         u32 ctrl, rctl;
8625         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8626
8627         if (enable) {
8628                 /* enable VLAN tag insert/strip */
8629                 ctrl = rd32(E1000_CTRL);
8630                 ctrl |= E1000_CTRL_VME;
8631                 wr32(E1000_CTRL, ctrl);
8632
8633                 /* Disable CFI check */
8634                 rctl = rd32(E1000_RCTL);
8635                 rctl &= ~E1000_RCTL_CFIEN;
8636                 wr32(E1000_RCTL, rctl);
8637         } else {
8638                 /* disable VLAN tag insert/strip */
8639                 ctrl = rd32(E1000_CTRL);
8640                 ctrl &= ~E1000_CTRL_VME;
8641                 wr32(E1000_CTRL, ctrl);
8642         }
8643
8644         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
8645 }
8646
8647 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8648                                __be16 proto, u16 vid)
8649 {
8650         struct igb_adapter *adapter = netdev_priv(netdev);
8651         struct e1000_hw *hw = &adapter->hw;
8652         int pf_id = adapter->vfs_allocated_count;
8653
8654         /* add the filter since PF can receive vlans w/o entry in vlvf */
8655         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8656                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
8657
8658         set_bit(vid, adapter->active_vlans);
8659
8660         return 0;
8661 }
8662
8663 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8664                                 __be16 proto, u16 vid)
8665 {
8666         struct igb_adapter *adapter = netdev_priv(netdev);
8667         int pf_id = adapter->vfs_allocated_count;
8668         struct e1000_hw *hw = &adapter->hw;
8669
8670         /* remove VID from filter table */
8671         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
8672                 igb_vfta_set(hw, vid, pf_id, false, true);
8673
8674         clear_bit(vid, adapter->active_vlans);
8675
8676         return 0;
8677 }
8678
8679 static void igb_restore_vlan(struct igb_adapter *adapter)
8680 {
8681         u16 vid = 1;
8682
8683         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8684         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
8685
8686         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
8687                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
8688 }
8689
8690 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
8691 {
8692         struct pci_dev *pdev = adapter->pdev;
8693         struct e1000_mac_info *mac = &adapter->hw.mac;
8694
8695         mac->autoneg = 0;
8696
8697         /* Make sure dplx is at most 1 bit and lsb of speed is not set
8698          * for the switch() below to work
8699          */
8700         if ((spd & 1) || (dplx & ~1))
8701                 goto err_inval;
8702
8703         /* Fiber NIC's only allow 1000 gbps Full duplex
8704          * and 100Mbps Full duplex for 100baseFx sfp
8705          */
8706         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8707                 switch (spd + dplx) {
8708                 case SPEED_10 + DUPLEX_HALF:
8709                 case SPEED_10 + DUPLEX_FULL:
8710                 case SPEED_100 + DUPLEX_HALF:
8711                         goto err_inval;
8712                 default:
8713                         break;
8714                 }
8715         }
8716
8717         switch (spd + dplx) {
8718         case SPEED_10 + DUPLEX_HALF:
8719                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8720                 break;
8721         case SPEED_10 + DUPLEX_FULL:
8722                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8723                 break;
8724         case SPEED_100 + DUPLEX_HALF:
8725                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8726                 break;
8727         case SPEED_100 + DUPLEX_FULL:
8728                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8729                 break;
8730         case SPEED_1000 + DUPLEX_FULL:
8731                 mac->autoneg = 1;
8732                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8733                 break;
8734         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8735         default:
8736                 goto err_inval;
8737         }
8738
8739         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8740         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8741
8742         return 0;
8743
8744 err_inval:
8745         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
8746         return -EINVAL;
8747 }
8748
8749 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8750                           bool runtime)
8751 {
8752         struct net_device *netdev = pci_get_drvdata(pdev);
8753         struct igb_adapter *adapter = netdev_priv(netdev);
8754         struct e1000_hw *hw = &adapter->hw;
8755         u32 ctrl, rctl, status;
8756         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8757 #ifdef CONFIG_PM
8758         int retval = 0;
8759 #endif
8760
8761         rtnl_lock();
8762         netif_device_detach(netdev);
8763
8764         if (netif_running(netdev))
8765                 __igb_close(netdev, true);
8766
8767         igb_ptp_suspend(adapter);
8768
8769         igb_clear_interrupt_scheme(adapter);
8770         rtnl_unlock();
8771
8772 #ifdef CONFIG_PM
8773         retval = pci_save_state(pdev);
8774         if (retval)
8775                 return retval;
8776 #endif
8777
8778         status = rd32(E1000_STATUS);
8779         if (status & E1000_STATUS_LU)
8780                 wufc &= ~E1000_WUFC_LNKC;
8781
8782         if (wufc) {
8783                 igb_setup_rctl(adapter);
8784                 igb_set_rx_mode(netdev);
8785
8786                 /* turn on all-multi mode if wake on multicast is enabled */
8787                 if (wufc & E1000_WUFC_MC) {
8788                         rctl = rd32(E1000_RCTL);
8789                         rctl |= E1000_RCTL_MPE;
8790                         wr32(E1000_RCTL, rctl);
8791                 }
8792
8793                 ctrl = rd32(E1000_CTRL);
8794                 /* advertise wake from D3Cold */
8795                 #define E1000_CTRL_ADVD3WUC 0x00100000
8796                 /* phy power management enable */
8797                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8798                 ctrl |= E1000_CTRL_ADVD3WUC;
8799                 wr32(E1000_CTRL, ctrl);
8800
8801                 /* Allow time for pending master requests to run */
8802                 igb_disable_pcie_master(hw);
8803
8804                 wr32(E1000_WUC, E1000_WUC_PME_EN);
8805                 wr32(E1000_WUFC, wufc);
8806         } else {
8807                 wr32(E1000_WUC, 0);
8808                 wr32(E1000_WUFC, 0);
8809         }
8810
8811         *enable_wake = wufc || adapter->en_mng_pt;
8812         if (!*enable_wake)
8813                 igb_power_down_link(adapter);
8814         else
8815                 igb_power_up_link(adapter);
8816
8817         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8818          * would have already happened in close and is redundant.
8819          */
8820         igb_release_hw_control(adapter);
8821
8822         pci_disable_device(pdev);
8823
8824         return 0;
8825 }
8826
8827 static void igb_deliver_wake_packet(struct net_device *netdev)
8828 {
8829         struct igb_adapter *adapter = netdev_priv(netdev);
8830         struct e1000_hw *hw = &adapter->hw;
8831         struct sk_buff *skb;
8832         u32 wupl;
8833
8834         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
8835
8836         /* WUPM stores only the first 128 bytes of the wake packet.
8837          * Read the packet only if we have the whole thing.
8838          */
8839         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
8840                 return;
8841
8842         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
8843         if (!skb)
8844                 return;
8845
8846         skb_put(skb, wupl);
8847
8848         /* Ensure reads are 32-bit aligned */
8849         wupl = roundup(wupl, 4);
8850
8851         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
8852
8853         skb->protocol = eth_type_trans(skb, netdev);
8854         netif_rx(skb);
8855 }
8856
8857 static int __maybe_unused igb_suspend(struct device *dev)
8858 {
8859         int retval;
8860         bool wake;
8861         struct pci_dev *pdev = to_pci_dev(dev);
8862
8863         retval = __igb_shutdown(pdev, &wake, 0);
8864         if (retval)
8865                 return retval;
8866
8867         if (wake) {
8868                 pci_prepare_to_sleep(pdev);
8869         } else {
8870                 pci_wake_from_d3(pdev, false);
8871                 pci_set_power_state(pdev, PCI_D3hot);
8872         }
8873
8874         return 0;
8875 }
8876
8877 static int __maybe_unused igb_resume(struct device *dev)
8878 {
8879         struct pci_dev *pdev = to_pci_dev(dev);
8880         struct net_device *netdev = pci_get_drvdata(pdev);
8881         struct igb_adapter *adapter = netdev_priv(netdev);
8882         struct e1000_hw *hw = &adapter->hw;
8883         u32 err, val;
8884
8885         pci_set_power_state(pdev, PCI_D0);
8886         pci_restore_state(pdev);
8887         pci_save_state(pdev);
8888
8889         if (!pci_device_is_present(pdev))
8890                 return -ENODEV;
8891         err = pci_enable_device_mem(pdev);
8892         if (err) {
8893                 dev_err(&pdev->dev,
8894                         "igb: Cannot enable PCI device from suspend\n");
8895                 return err;
8896         }
8897         pci_set_master(pdev);
8898
8899         pci_enable_wake(pdev, PCI_D3hot, 0);
8900         pci_enable_wake(pdev, PCI_D3cold, 0);
8901
8902         if (igb_init_interrupt_scheme(adapter, true)) {
8903                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8904                 return -ENOMEM;
8905         }
8906
8907         igb_reset(adapter);
8908
8909         /* let the f/w know that the h/w is now under the control of the
8910          * driver.
8911          */
8912         igb_get_hw_control(adapter);
8913
8914         val = rd32(E1000_WUS);
8915         if (val & WAKE_PKT_WUS)
8916                 igb_deliver_wake_packet(netdev);
8917
8918         wr32(E1000_WUS, ~0);
8919
8920         rtnl_lock();
8921         if (!err && netif_running(netdev))
8922                 err = __igb_open(netdev, true);
8923
8924         if (!err)
8925                 netif_device_attach(netdev);
8926         rtnl_unlock();
8927
8928         return err;
8929 }
8930
8931 static int __maybe_unused igb_runtime_idle(struct device *dev)
8932 {
8933         struct pci_dev *pdev = to_pci_dev(dev);
8934         struct net_device *netdev = pci_get_drvdata(pdev);
8935         struct igb_adapter *adapter = netdev_priv(netdev);
8936
8937         if (!igb_has_link(adapter))
8938                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
8939
8940         return -EBUSY;
8941 }
8942
8943 static int __maybe_unused igb_runtime_suspend(struct device *dev)
8944 {
8945         struct pci_dev *pdev = to_pci_dev(dev);
8946         int retval;
8947         bool wake;
8948
8949         retval = __igb_shutdown(pdev, &wake, 1);
8950         if (retval)
8951                 return retval;
8952
8953         if (wake) {
8954                 pci_prepare_to_sleep(pdev);
8955         } else {
8956                 pci_wake_from_d3(pdev, false);
8957                 pci_set_power_state(pdev, PCI_D3hot);
8958         }
8959
8960         return 0;
8961 }
8962
8963 static int __maybe_unused igb_runtime_resume(struct device *dev)
8964 {
8965         return igb_resume(dev);
8966 }
8967
8968 static void igb_shutdown(struct pci_dev *pdev)
8969 {
8970         bool wake;
8971
8972         __igb_shutdown(pdev, &wake, 0);
8973
8974         if (system_state == SYSTEM_POWER_OFF) {
8975                 pci_wake_from_d3(pdev, wake);
8976                 pci_set_power_state(pdev, PCI_D3hot);
8977         }
8978 }
8979
8980 #ifdef CONFIG_PCI_IOV
8981 static int igb_sriov_reinit(struct pci_dev *dev)
8982 {
8983         struct net_device *netdev = pci_get_drvdata(dev);
8984         struct igb_adapter *adapter = netdev_priv(netdev);
8985         struct pci_dev *pdev = adapter->pdev;
8986
8987         rtnl_lock();
8988
8989         if (netif_running(netdev))
8990                 igb_close(netdev);
8991         else
8992                 igb_reset(adapter);
8993
8994         igb_clear_interrupt_scheme(adapter);
8995
8996         igb_init_queue_configuration(adapter);
8997
8998         if (igb_init_interrupt_scheme(adapter, true)) {
8999                 rtnl_unlock();
9000                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9001                 return -ENOMEM;
9002         }
9003
9004         if (netif_running(netdev))
9005                 igb_open(netdev);
9006
9007         rtnl_unlock();
9008
9009         return 0;
9010 }
9011
9012 static int igb_pci_disable_sriov(struct pci_dev *dev)
9013 {
9014         int err = igb_disable_sriov(dev);
9015
9016         if (!err)
9017                 err = igb_sriov_reinit(dev);
9018
9019         return err;
9020 }
9021
9022 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9023 {
9024         int err = igb_enable_sriov(dev, num_vfs);
9025
9026         if (err)
9027                 goto out;
9028
9029         err = igb_sriov_reinit(dev);
9030         if (!err)
9031                 return num_vfs;
9032
9033 out:
9034         return err;
9035 }
9036
9037 #endif
9038 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9039 {
9040 #ifdef CONFIG_PCI_IOV
9041         if (num_vfs == 0)
9042                 return igb_pci_disable_sriov(dev);
9043         else
9044                 return igb_pci_enable_sriov(dev, num_vfs);
9045 #endif
9046         return 0;
9047 }
9048
9049 /**
9050  *  igb_io_error_detected - called when PCI error is detected
9051  *  @pdev: Pointer to PCI device
9052  *  @state: The current pci connection state
9053  *
9054  *  This function is called after a PCI bus error affecting
9055  *  this device has been detected.
9056  **/
9057 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9058                                               pci_channel_state_t state)
9059 {
9060         struct net_device *netdev = pci_get_drvdata(pdev);
9061         struct igb_adapter *adapter = netdev_priv(netdev);
9062
9063         netif_device_detach(netdev);
9064
9065         if (state == pci_channel_io_perm_failure)
9066                 return PCI_ERS_RESULT_DISCONNECT;
9067
9068         if (netif_running(netdev))
9069                 igb_down(adapter);
9070         pci_disable_device(pdev);
9071
9072         /* Request a slot slot reset. */
9073         return PCI_ERS_RESULT_NEED_RESET;
9074 }
9075
9076 /**
9077  *  igb_io_slot_reset - called after the pci bus has been reset.
9078  *  @pdev: Pointer to PCI device
9079  *
9080  *  Restart the card from scratch, as if from a cold-boot. Implementation
9081  *  resembles the first-half of the igb_resume routine.
9082  **/
9083 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9084 {
9085         struct net_device *netdev = pci_get_drvdata(pdev);
9086         struct igb_adapter *adapter = netdev_priv(netdev);
9087         struct e1000_hw *hw = &adapter->hw;
9088         pci_ers_result_t result;
9089
9090         if (pci_enable_device_mem(pdev)) {
9091                 dev_err(&pdev->dev,
9092                         "Cannot re-enable PCI device after reset.\n");
9093                 result = PCI_ERS_RESULT_DISCONNECT;
9094         } else {
9095                 pci_set_master(pdev);
9096                 pci_restore_state(pdev);
9097                 pci_save_state(pdev);
9098
9099                 pci_enable_wake(pdev, PCI_D3hot, 0);
9100                 pci_enable_wake(pdev, PCI_D3cold, 0);
9101
9102                 /* In case of PCI error, adapter lose its HW address
9103                  * so we should re-assign it here.
9104                  */
9105                 hw->hw_addr = adapter->io_addr;
9106
9107                 igb_reset(adapter);
9108                 wr32(E1000_WUS, ~0);
9109                 result = PCI_ERS_RESULT_RECOVERED;
9110         }
9111
9112         return result;
9113 }
9114
9115 /**
9116  *  igb_io_resume - called when traffic can start flowing again.
9117  *  @pdev: Pointer to PCI device
9118  *
9119  *  This callback is called when the error recovery driver tells us that
9120  *  its OK to resume normal operation. Implementation resembles the
9121  *  second-half of the igb_resume routine.
9122  */
9123 static void igb_io_resume(struct pci_dev *pdev)
9124 {
9125         struct net_device *netdev = pci_get_drvdata(pdev);
9126         struct igb_adapter *adapter = netdev_priv(netdev);
9127
9128         if (netif_running(netdev)) {
9129                 if (igb_up(adapter)) {
9130                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9131                         return;
9132                 }
9133         }
9134
9135         netif_device_attach(netdev);
9136
9137         /* let the f/w know that the h/w is now under the control of the
9138          * driver.
9139          */
9140         igb_get_hw_control(adapter);
9141 }
9142
9143 /**
9144  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9145  *  @adapter: Pointer to adapter structure
9146  *  @index: Index of the RAR entry which need to be synced with MAC table
9147  **/
9148 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9149 {
9150         struct e1000_hw *hw = &adapter->hw;
9151         u32 rar_low, rar_high;
9152         u8 *addr = adapter->mac_table[index].addr;
9153
9154         /* HW expects these to be in network order when they are plugged
9155          * into the registers which are little endian.  In order to guarantee
9156          * that ordering we need to do an leXX_to_cpup here in order to be
9157          * ready for the byteswap that occurs with writel
9158          */
9159         rar_low = le32_to_cpup((__le32 *)(addr));
9160         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9161
9162         /* Indicate to hardware the Address is Valid. */
9163         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9164                 if (is_valid_ether_addr(addr))
9165                         rar_high |= E1000_RAH_AV;
9166
9167                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9168                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9169
9170                 switch (hw->mac.type) {
9171                 case e1000_82575:
9172                 case e1000_i210:
9173                         if (adapter->mac_table[index].state &
9174                             IGB_MAC_STATE_QUEUE_STEERING)
9175                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9176
9177                         rar_high |= E1000_RAH_POOL_1 *
9178                                     adapter->mac_table[index].queue;
9179                         break;
9180                 default:
9181                         rar_high |= E1000_RAH_POOL_1 <<
9182                                     adapter->mac_table[index].queue;
9183                         break;
9184                 }
9185         }
9186
9187         wr32(E1000_RAL(index), rar_low);
9188         wrfl();
9189         wr32(E1000_RAH(index), rar_high);
9190         wrfl();
9191 }
9192
9193 static int igb_set_vf_mac(struct igb_adapter *adapter,
9194                           int vf, unsigned char *mac_addr)
9195 {
9196         struct e1000_hw *hw = &adapter->hw;
9197         /* VF MAC addresses start at end of receive addresses and moves
9198          * towards the first, as a result a collision should not be possible
9199          */
9200         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9201         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9202
9203         ether_addr_copy(vf_mac_addr, mac_addr);
9204         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9205         adapter->mac_table[rar_entry].queue = vf;
9206         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9207         igb_rar_set_index(adapter, rar_entry);
9208
9209         return 0;
9210 }
9211
9212 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9213 {
9214         struct igb_adapter *adapter = netdev_priv(netdev);
9215
9216         if (vf >= adapter->vfs_allocated_count)
9217                 return -EINVAL;
9218
9219         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9220          * flag and allows to overwrite the MAC via VF netdev.  This
9221          * is necessary to allow libvirt a way to restore the original
9222          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9223          * down a VM.
9224          */
9225         if (is_zero_ether_addr(mac)) {
9226                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9227                 dev_info(&adapter->pdev->dev,
9228                          "remove administratively set MAC on VF %d\n",
9229                          vf);
9230         } else if (is_valid_ether_addr(mac)) {
9231                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9232                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9233                          mac, vf);
9234                 dev_info(&adapter->pdev->dev,
9235                          "Reload the VF driver to make this change effective.");
9236                 /* Generate additional warning if PF is down */
9237                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9238                         dev_warn(&adapter->pdev->dev,
9239                                  "The VF MAC address has been set, but the PF device is not up.\n");
9240                         dev_warn(&adapter->pdev->dev,
9241                                  "Bring the PF device up before attempting to use the VF device.\n");
9242                 }
9243         } else {
9244                 return -EINVAL;
9245         }
9246         return igb_set_vf_mac(adapter, vf, mac);
9247 }
9248
9249 static int igb_link_mbps(int internal_link_speed)
9250 {
9251         switch (internal_link_speed) {
9252         case SPEED_100:
9253                 return 100;
9254         case SPEED_1000:
9255                 return 1000;
9256         default:
9257                 return 0;
9258         }
9259 }
9260
9261 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9262                                   int link_speed)
9263 {
9264         int rf_dec, rf_int;
9265         u32 bcnrc_val;
9266
9267         if (tx_rate != 0) {
9268                 /* Calculate the rate factor values to set */
9269                 rf_int = link_speed / tx_rate;
9270                 rf_dec = (link_speed - (rf_int * tx_rate));
9271                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9272                          tx_rate;
9273
9274                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9275                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9276                               E1000_RTTBCNRC_RF_INT_MASK);
9277                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9278         } else {
9279                 bcnrc_val = 0;
9280         }
9281
9282         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9283         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9284          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9285          */
9286         wr32(E1000_RTTBCNRM, 0x14);
9287         wr32(E1000_RTTBCNRC, bcnrc_val);
9288 }
9289
9290 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9291 {
9292         int actual_link_speed, i;
9293         bool reset_rate = false;
9294
9295         /* VF TX rate limit was not set or not supported */
9296         if ((adapter->vf_rate_link_speed == 0) ||
9297             (adapter->hw.mac.type != e1000_82576))
9298                 return;
9299
9300         actual_link_speed = igb_link_mbps(adapter->link_speed);
9301         if (actual_link_speed != adapter->vf_rate_link_speed) {
9302                 reset_rate = true;
9303                 adapter->vf_rate_link_speed = 0;
9304                 dev_info(&adapter->pdev->dev,
9305                          "Link speed has been changed. VF Transmit rate is disabled\n");
9306         }
9307
9308         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9309                 if (reset_rate)
9310                         adapter->vf_data[i].tx_rate = 0;
9311
9312                 igb_set_vf_rate_limit(&adapter->hw, i,
9313                                       adapter->vf_data[i].tx_rate,
9314                                       actual_link_speed);
9315         }
9316 }
9317
9318 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9319                              int min_tx_rate, int max_tx_rate)
9320 {
9321         struct igb_adapter *adapter = netdev_priv(netdev);
9322         struct e1000_hw *hw = &adapter->hw;
9323         int actual_link_speed;
9324
9325         if (hw->mac.type != e1000_82576)
9326                 return -EOPNOTSUPP;
9327
9328         if (min_tx_rate)
9329                 return -EINVAL;
9330
9331         actual_link_speed = igb_link_mbps(adapter->link_speed);
9332         if ((vf >= adapter->vfs_allocated_count) ||
9333             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9334             (max_tx_rate < 0) ||
9335             (max_tx_rate > actual_link_speed))
9336                 return -EINVAL;
9337
9338         adapter->vf_rate_link_speed = actual_link_speed;
9339         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9340         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9341
9342         return 0;
9343 }
9344
9345 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9346                                    bool setting)
9347 {
9348         struct igb_adapter *adapter = netdev_priv(netdev);
9349         struct e1000_hw *hw = &adapter->hw;
9350         u32 reg_val, reg_offset;
9351
9352         if (!adapter->vfs_allocated_count)
9353                 return -EOPNOTSUPP;
9354
9355         if (vf >= adapter->vfs_allocated_count)
9356                 return -EINVAL;
9357
9358         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9359         reg_val = rd32(reg_offset);
9360         if (setting)
9361                 reg_val |= (BIT(vf) |
9362                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9363         else
9364                 reg_val &= ~(BIT(vf) |
9365                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9366         wr32(reg_offset, reg_val);
9367
9368         adapter->vf_data[vf].spoofchk_enabled = setting;
9369         return 0;
9370 }
9371
9372 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9373 {
9374         struct igb_adapter *adapter = netdev_priv(netdev);
9375
9376         if (vf >= adapter->vfs_allocated_count)
9377                 return -EINVAL;
9378         if (adapter->vf_data[vf].trusted == setting)
9379                 return 0;
9380
9381         adapter->vf_data[vf].trusted = setting;
9382
9383         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9384                  vf, setting ? "" : "not ");
9385         return 0;
9386 }
9387
9388 static int igb_ndo_get_vf_config(struct net_device *netdev,
9389                                  int vf, struct ifla_vf_info *ivi)
9390 {
9391         struct igb_adapter *adapter = netdev_priv(netdev);
9392         if (vf >= adapter->vfs_allocated_count)
9393                 return -EINVAL;
9394         ivi->vf = vf;
9395         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9396         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9397         ivi->min_tx_rate = 0;
9398         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9399         ivi->qos = adapter->vf_data[vf].pf_qos;
9400         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9401         ivi->trusted = adapter->vf_data[vf].trusted;
9402         return 0;
9403 }
9404
9405 static void igb_vmm_control(struct igb_adapter *adapter)
9406 {
9407         struct e1000_hw *hw = &adapter->hw;
9408         u32 reg;
9409
9410         switch (hw->mac.type) {
9411         case e1000_82575:
9412         case e1000_i210:
9413         case e1000_i211:
9414         case e1000_i354:
9415         default:
9416                 /* replication is not supported for 82575 */
9417                 return;
9418         case e1000_82576:
9419                 /* notify HW that the MAC is adding vlan tags */
9420                 reg = rd32(E1000_DTXCTL);
9421                 reg |= E1000_DTXCTL_VLAN_ADDED;
9422                 wr32(E1000_DTXCTL, reg);
9423                 /* Fall through */
9424         case e1000_82580:
9425                 /* enable replication vlan tag stripping */
9426                 reg = rd32(E1000_RPLOLR);
9427                 reg |= E1000_RPLOLR_STRVLAN;
9428                 wr32(E1000_RPLOLR, reg);
9429                 /* Fall through */
9430         case e1000_i350:
9431                 /* none of the above registers are supported by i350 */
9432                 break;
9433         }
9434
9435         if (adapter->vfs_allocated_count) {
9436                 igb_vmdq_set_loopback_pf(hw, true);
9437                 igb_vmdq_set_replication_pf(hw, true);
9438                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9439                                               adapter->vfs_allocated_count);
9440         } else {
9441                 igb_vmdq_set_loopback_pf(hw, false);
9442                 igb_vmdq_set_replication_pf(hw, false);
9443         }
9444 }
9445
9446 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9447 {
9448         struct e1000_hw *hw = &adapter->hw;
9449         u32 dmac_thr;
9450         u16 hwm;
9451
9452         if (hw->mac.type > e1000_82580) {
9453                 if (adapter->flags & IGB_FLAG_DMAC) {
9454                         u32 reg;
9455
9456                         /* force threshold to 0. */
9457                         wr32(E1000_DMCTXTH, 0);
9458
9459                         /* DMA Coalescing high water mark needs to be greater
9460                          * than the Rx threshold. Set hwm to PBA - max frame
9461                          * size in 16B units, capping it at PBA - 6KB.
9462                          */
9463                         hwm = 64 * (pba - 6);
9464                         reg = rd32(E1000_FCRTC);
9465                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9466                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9467                                 & E1000_FCRTC_RTH_COAL_MASK);
9468                         wr32(E1000_FCRTC, reg);
9469
9470                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
9471                          * frame size, capping it at PBA - 10KB.
9472                          */
9473                         dmac_thr = pba - 10;
9474                         reg = rd32(E1000_DMACR);
9475                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9476                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9477                                 & E1000_DMACR_DMACTHR_MASK);
9478
9479                         /* transition to L0x or L1 if available..*/
9480                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9481
9482                         /* watchdog timer= +-1000 usec in 32usec intervals */
9483                         reg |= (1000 >> 5);
9484
9485                         /* Disable BMC-to-OS Watchdog Enable */
9486                         if (hw->mac.type != e1000_i354)
9487                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9488
9489                         wr32(E1000_DMACR, reg);
9490
9491                         /* no lower threshold to disable
9492                          * coalescing(smart fifb)-UTRESH=0
9493                          */
9494                         wr32(E1000_DMCRTRH, 0);
9495
9496                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
9497
9498                         wr32(E1000_DMCTLX, reg);
9499
9500                         /* free space in tx packet buffer to wake from
9501                          * DMA coal
9502                          */
9503                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9504                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9505
9506                         /* make low power state decision controlled
9507                          * by DMA coal
9508                          */
9509                         reg = rd32(E1000_PCIEMISC);
9510                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9511                         wr32(E1000_PCIEMISC, reg);
9512                 } /* endif adapter->dmac is not disabled */
9513         } else if (hw->mac.type == e1000_82580) {
9514                 u32 reg = rd32(E1000_PCIEMISC);
9515
9516                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
9517                 wr32(E1000_DMACR, 0);
9518         }
9519 }
9520
9521 /**
9522  *  igb_read_i2c_byte - Reads 8 bit word over I2C
9523  *  @hw: pointer to hardware structure
9524  *  @byte_offset: byte offset to read
9525  *  @dev_addr: device address
9526  *  @data: value read
9527  *
9528  *  Performs byte read operation over I2C interface at
9529  *  a specified device address.
9530  **/
9531 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9532                       u8 dev_addr, u8 *data)
9533 {
9534         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9535         struct i2c_client *this_client = adapter->i2c_client;
9536         s32 status;
9537         u16 swfw_mask = 0;
9538
9539         if (!this_client)
9540                 return E1000_ERR_I2C;
9541
9542         swfw_mask = E1000_SWFW_PHY0_SM;
9543
9544         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9545                 return E1000_ERR_SWFW_SYNC;
9546
9547         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9548         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9549
9550         if (status < 0)
9551                 return E1000_ERR_I2C;
9552         else {
9553                 *data = status;
9554                 return 0;
9555         }
9556 }
9557
9558 /**
9559  *  igb_write_i2c_byte - Writes 8 bit word over I2C
9560  *  @hw: pointer to hardware structure
9561  *  @byte_offset: byte offset to write
9562  *  @dev_addr: device address
9563  *  @data: value to write
9564  *
9565  *  Performs byte write operation over I2C interface at
9566  *  a specified device address.
9567  **/
9568 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9569                        u8 dev_addr, u8 data)
9570 {
9571         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9572         struct i2c_client *this_client = adapter->i2c_client;
9573         s32 status;
9574         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9575
9576         if (!this_client)
9577                 return E1000_ERR_I2C;
9578
9579         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
9580                 return E1000_ERR_SWFW_SYNC;
9581         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9582         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9583
9584         if (status)
9585                 return E1000_ERR_I2C;
9586         else
9587                 return 0;
9588
9589 }
9590
9591 int igb_reinit_queues(struct igb_adapter *adapter)
9592 {
9593         struct net_device *netdev = adapter->netdev;
9594         struct pci_dev *pdev = adapter->pdev;
9595         int err = 0;
9596
9597         if (netif_running(netdev))
9598                 igb_close(netdev);
9599
9600         igb_reset_interrupt_capability(adapter);
9601
9602         if (igb_init_interrupt_scheme(adapter, true)) {
9603                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9604                 return -ENOMEM;
9605         }
9606
9607         if (netif_running(netdev))
9608                 err = igb_open(netdev);
9609
9610         return err;
9611 }
9612
9613 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
9614 {
9615         struct igb_nfc_filter *rule;
9616
9617         spin_lock(&adapter->nfc_lock);
9618
9619         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9620                 igb_erase_filter(adapter, rule);
9621
9622         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
9623                 igb_erase_filter(adapter, rule);
9624
9625         spin_unlock(&adapter->nfc_lock);
9626 }
9627
9628 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
9629 {
9630         struct igb_nfc_filter *rule;
9631
9632         spin_lock(&adapter->nfc_lock);
9633
9634         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
9635                 igb_add_filter(adapter, rule);
9636
9637         spin_unlock(&adapter->nfc_lock);
9638 }
9639 /* igb_main.c */