drivers/net/ethernet/intel/igb/igb_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/bitops.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/slab.h>
  15 #include <net/checksum.h>
  16 #include <net/ip6_checksum.h>
  17 #include <net/pkt_sched.h>
  18 #include <net/pkt_cls.h>
  19 #include <linux/net_tstamp.h>
  20 #include <linux/mii.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/if.h>
  23 #include <linux/if_vlan.h>
  24 #include <linux/pci.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/ip.h>
  28 #include <linux/tcp.h>
  29 #include <linux/sctp.h>
  30 #include <linux/if_ether.h>
  31 #include <linux/aer.h>
  32 #include <linux/prefetch.h>
  33 #include <linux/bpf.h>
  34 #include <linux/bpf_trace.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/etherdevice.h>
  37 #ifdef CONFIG_IGB_DCA
  38 #include <linux/dca.h>
  39 #endif
  40 #include <linux/i2c.h>
  41 #include "igb.h"
  42
  43 enum queue_mode {
  44         QUEUE_MODE_STRICT_PRIORITY,
  45         QUEUE_MODE_STREAM_RESERVATION,
  46 };
  47
  48 enum tx_queue_prio {
  49         TX_QUEUE_PRIO_HIGH,
  50         TX_QUEUE_PRIO_LOW,
  51 };
  52
  53 char igb_driver_name[] = "igb";
  54 static const char igb_driver_string[] =
  55                                 "Intel(R) Gigabit Ethernet Network Driver";
  56 static const char igb_copyright[] =
  57                                 "Copyright (c) 2007-2014 Intel Corporation.";
  58
  59 static const struct e1000_info *igb_info_tbl[] = {
  60         [board_82575] = &e1000_82575_info,
  61 };
  62
  63 static const struct pci_device_id igb_pci_tbl[] = {
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  68         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  69         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  70         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  71         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  72         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  73         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  74         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  75         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  76         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  77         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  78         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  79         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  99         /* required last entry */
 100         {0, }
 101 };
 102
 103 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 104
 105 static int igb_setup_all_tx_resources(struct igb_adapter *);
 106 static int igb_setup_all_rx_resources(struct igb_adapter *);
 107 static void igb_free_all_tx_resources(struct igb_adapter *);
 108 static void igb_free_all_rx_resources(struct igb_adapter *);
 109 static void igb_setup_mrqc(struct igb_adapter *);
 110 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 111 static void igb_remove(struct pci_dev *pdev);
 112 static int igb_sw_init(struct igb_adapter *);
 113 int igb_open(struct net_device *);
 114 int igb_close(struct net_device *);
 115 static void igb_configure(struct igb_adapter *);
 116 static void igb_configure_tx(struct igb_adapter *);
 117 static void igb_configure_rx(struct igb_adapter *);
 118 static void igb_clean_all_tx_rings(struct igb_adapter *);
 119 static void igb_clean_all_rx_rings(struct igb_adapter *);
 120 static void igb_clean_tx_ring(struct igb_ring *);
 121 static void igb_clean_rx_ring(struct igb_ring *);
 122 static void igb_set_rx_mode(struct net_device *);
 123 static void igb_update_phy_info(struct timer_list *);
 124 static void igb_watchdog(struct timer_list *);
 125 static void igb_watchdog_task(struct work_struct *);
 126 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 127 static void igb_get_stats64(struct net_device *dev,
 128                             struct rtnl_link_stats64 *stats);
 129 static int igb_change_mtu(struct net_device *, int);
 130 static int igb_set_mac(struct net_device *, void *);
 131 static void igb_set_uta(struct igb_adapter *adapter, bool set);
 132 static irqreturn_t igb_intr(int irq, void *);
 133 static irqreturn_t igb_intr_msi(int irq, void *);
 134 static irqreturn_t igb_msix_other(int irq, void *);
 135 static irqreturn_t igb_msix_ring(int irq, void *);
 136 #ifdef CONFIG_IGB_DCA
 137 static void igb_update_dca(struct igb_q_vector *);
 138 static void igb_setup_dca(struct igb_adapter *);
 139 #endif /* CONFIG_IGB_DCA */
 140 static int igb_poll(struct napi_struct *, int);
 141 static bool igb_clean_tx_irq(struct igb_q_vector *, int);
 142 static int igb_clean_rx_irq(struct igb_q_vector *, int);
 143 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 144 static void igb_tx_timeout(struct net_device *, unsigned int txqueue);
 145 static void igb_reset_task(struct work_struct *);
 146 static void igb_vlan_mode(struct net_device *netdev,
 147                           netdev_features_t features);
 148 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 149 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 150 static void igb_restore_vlan(struct igb_adapter *);
 151 static void igb_rar_set_index(struct igb_adapter *, u32);
 152 static void igb_ping_all_vfs(struct igb_adapter *);
 153 static void igb_msg_task(struct igb_adapter *);
 154 static void igb_vmm_control(struct igb_adapter *);
 155 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 156 static void igb_flush_mac_table(struct igb_adapter *);
 157 static int igb_available_rars(struct igb_adapter *, u8);
 158 static void igb_set_default_mac_filter(struct igb_adapter *);
 159 static int igb_uc_sync(struct net_device *, const unsigned char *);
 160 static int igb_uc_unsync(struct net_device *, const unsigned char *);
 161 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 162 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 163 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 164                                int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 165 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 166 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 167                                    bool setting);
 168 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf,
 169                                 bool setting);
 170 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 171                                  struct ifla_vf_info *ivi);
 172 static void igb_check_vf_rate_limit(struct igb_adapter *);
 173 static void igb_nfc_filter_exit(struct igb_adapter *adapter);
 174 static void igb_nfc_filter_restore(struct igb_adapter *adapter);
 175
 176 #ifdef CONFIG_PCI_IOV
 177 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 178 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 179 static int igb_disable_sriov(struct pci_dev *dev);
 180 static int igb_pci_disable_sriov(struct pci_dev *dev);
 181 #endif
 182
 183 static int igb_suspend(struct device *);
 184 static int igb_resume(struct device *);
 185 static int igb_runtime_suspend(struct device *dev);
 186 static int igb_runtime_resume(struct device *dev);
 187 static int igb_runtime_idle(struct device *dev);
 188 static const struct dev_pm_ops igb_pm_ops = {
 189         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 190         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 191                         igb_runtime_idle)
 192 };
 193 static void igb_shutdown(struct pci_dev *);
 194 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 195 #ifdef CONFIG_IGB_DCA
 196 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 197 static struct notifier_block dca_notifier = {
 198         .notifier_call  = igb_notify_dca,
 199         .next           = NULL,
 200         .priority       = 0
 201 };
 202 #endif
 203 #ifdef CONFIG_PCI_IOV
 204 static unsigned int max_vfs;
 205 module_param(max_vfs, uint, 0);
 206 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
 207 #endif /* CONFIG_PCI_IOV */
 208
 209 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 210                      pci_channel_state_t);
 211 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 212 static void igb_io_resume(struct pci_dev *);
 213
 214 static const struct pci_error_handlers igb_err_handler = {
 215         .error_detected = igb_io_error_detected,
 216         .slot_reset = igb_io_slot_reset,
 217         .resume = igb_io_resume,
 218 };
 219
 220 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 221
 222 static struct pci_driver igb_driver = {
 223         .name     = igb_driver_name,
 224         .id_table = igb_pci_tbl,
 225         .probe    = igb_probe,
 226         .remove   = igb_remove,
 227 #ifdef CONFIG_PM
 228         .driver.pm = &igb_pm_ops,
 229 #endif
 230         .shutdown = igb_shutdown,
 231         .sriov_configure = igb_pci_sriov_configure,
 232         .err_handler = &igb_err_handler
 233 };
 234
 235 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 236 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 237 MODULE_LICENSE("GPL v2");
 238
 239 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 240 static int debug = -1;
 241 module_param(debug, int, 0);
 242 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 243
 244 struct igb_reg_info {
 245         u32 ofs;
 246         char *name;
 247 };
 248
 249 static const struct igb_reg_info igb_reg_info_tbl[] = {
 250
 251         /* General Registers */
 252         {E1000_CTRL, "CTRL"},
 253         {E1000_STATUS, "STATUS"},
 254         {E1000_CTRL_EXT, "CTRL_EXT"},
 255
 256         /* Interrupt Registers */
 257         {E1000_ICR, "ICR"},
 258
 259         /* RX Registers */
 260         {E1000_RCTL, "RCTL"},
 261         {E1000_RDLEN(0), "RDLEN"},
 262         {E1000_RDH(0), "RDH"},
 263         {E1000_RDT(0), "RDT"},
 264         {E1000_RXDCTL(0), "RXDCTL"},
 265         {E1000_RDBAL(0), "RDBAL"},
 266         {E1000_RDBAH(0), "RDBAH"},
 267
 268         /* TX Registers */
 269         {E1000_TCTL, "TCTL"},
 270         {E1000_TDBAL(0), "TDBAL"},
 271         {E1000_TDBAH(0), "TDBAH"},
 272         {E1000_TDLEN(0), "TDLEN"},
 273         {E1000_TDH(0), "TDH"},
 274         {E1000_TDT(0), "TDT"},
 275         {E1000_TXDCTL(0), "TXDCTL"},
 276         {E1000_TDFH, "TDFH"},
 277         {E1000_TDFT, "TDFT"},
 278         {E1000_TDFHS, "TDFHS"},
 279         {E1000_TDFPC, "TDFPC"},
 280
 281         /* List Terminator */
 282         {}
 283 };
 284
 285 /* igb_regdump - register printout routine */
 286 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 287 {
 288         int n = 0;
 289         char rname[16];
 290         u32 regs[8];
 291
 292         switch (reginfo->ofs) {
 293         case E1000_RDLEN(0):
 294                 for (n = 0; n < 4; n++)
 295                         regs[n] = rd32(E1000_RDLEN(n));
 296                 break;
 297         case E1000_RDH(0):
 298                 for (n = 0; n < 4; n++)
 299                         regs[n] = rd32(E1000_RDH(n));
 300                 break;
 301         case E1000_RDT(0):
 302                 for (n = 0; n < 4; n++)
 303                         regs[n] = rd32(E1000_RDT(n));
 304                 break;
 305         case E1000_RXDCTL(0):
 306                 for (n = 0; n < 4; n++)
 307                         regs[n] = rd32(E1000_RXDCTL(n));
 308                 break;
 309         case E1000_RDBAL(0):
 310                 for (n = 0; n < 4; n++)
 311                         regs[n] = rd32(E1000_RDBAL(n));
 312                 break;
 313         case E1000_RDBAH(0):
 314                 for (n = 0; n < 4; n++)
 315                         regs[n] = rd32(E1000_RDBAH(n));
 316                 break;
 317         case E1000_TDBAL(0):
 318                 for (n = 0; n < 4; n++)
 319                         regs[n] = rd32(E1000_TDBAL(n));
 320                 break;
 321         case E1000_TDBAH(0):
 322                 for (n = 0; n < 4; n++)
 323                         regs[n] = rd32(E1000_TDBAH(n));
 324                 break;
 325         case E1000_TDLEN(0):
 326                 for (n = 0; n < 4; n++)
 327                         regs[n] = rd32(E1000_TDLEN(n));
 328                 break;
 329         case E1000_TDH(0):
 330                 for (n = 0; n < 4; n++)
 331                         regs[n] = rd32(E1000_TDH(n));
 332                 break;
 333         case E1000_TDT(0):
 334                 for (n = 0; n < 4; n++)
 335                         regs[n] = rd32(E1000_TDT(n));
 336                 break;
 337         case E1000_TXDCTL(0):
 338                 for (n = 0; n < 4; n++)
 339                         regs[n] = rd32(E1000_TXDCTL(n));
 340                 break;
 341         default:
 342                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 343                 return;
 344         }
 345
 346         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 347         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 348                 regs[2], regs[3]);
 349 }
 350
 351 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 352 static void igb_dump(struct igb_adapter *adapter)
 353 {
 354         struct net_device *netdev = adapter->netdev;
 355         struct e1000_hw *hw = &adapter->hw;
 356         struct igb_reg_info *reginfo;
 357         struct igb_ring *tx_ring;
 358         union e1000_adv_tx_desc *tx_desc;
 359         struct my_u0 { __le64 a; __le64 b; } *u0;
 360         struct igb_ring *rx_ring;
 361         union e1000_adv_rx_desc *rx_desc;
 362         u32 staterr;
 363         u16 i, n;
 364
 365         if (!netif_msg_hw(adapter))
 366                 return;
 367
 368         /* Print netdevice Info */
 369         if (netdev) {
 370                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 371                 pr_info("Device Name     state            trans_start\n");
 372                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 373                         netdev->state, dev_trans_start(netdev));
 374         }
 375
 376         /* Print Registers */
 377         dev_info(&adapter->pdev->dev, "Register Dump\n");
 378         pr_info(" Register Name   Value\n");
 379         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 380              reginfo->name; reginfo++) {
 381                 igb_regdump(hw, reginfo);
 382         }
 383
 384         /* Print TX Ring Summary */
 385         if (!netdev || !netif_running(netdev))
 386                 goto exit;
 387
 388         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 389         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 390         for (n = 0; n < adapter->num_tx_queues; n++) {
 391                 struct igb_tx_buffer *buffer_info;
 392                 tx_ring = adapter->tx_ring[n];
 393                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 394                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 395                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 396                         (u64)dma_unmap_addr(buffer_info, dma),
 397                         dma_unmap_len(buffer_info, len),
 398                         buffer_info->next_to_watch,
 399                         (u64)buffer_info->time_stamp);
 400         }
 401
 402         /* Print TX Rings */
 403         if (!netif_msg_tx_done(adapter))
 404                 goto rx_ring_summary;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 407
 408         /* Transmit Descriptor Formats
 409          *
 410          * Advanced Transmit Descriptor
 411          *   +--------------------------------------------------------------+
 412          * 0 |         Buffer Address [63:0]                                |
 413          *   +--------------------------------------------------------------+
 414          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 415          *   +--------------------------------------------------------------+
 416          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 417          */
 418
 419         for (n = 0; n < adapter->num_tx_queues; n++) {
 420                 tx_ring = adapter->tx_ring[n];
 421                 pr_info("------------------------------------\n");
 422                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 423                 pr_info("------------------------------------\n");
 424                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] [bi->dma       ] leng  ntw timestamp        bi->skb\n");
 425
 426                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 427                         const char *next_desc;
 428                         struct igb_tx_buffer *buffer_info;
 429                         tx_desc = IGB_TX_DESC(tx_ring, i);
 430                         buffer_info = &tx_ring->tx_buffer_info[i];
 431                         u0 = (struct my_u0 *)tx_desc;
 432                         if (i == tx_ring->next_to_use &&
 433                             i == tx_ring->next_to_clean)
 434                                 next_desc = " NTC/U";
 435                         else if (i == tx_ring->next_to_use)
 436                                 next_desc = " NTU";
 437                         else if (i == tx_ring->next_to_clean)
 438                                 next_desc = " NTC";
 439                         else
 440                                 next_desc = "";
 441
 442                         pr_info("T [0x%03X]    %016llX %016llX %016llX %04X  %p %016llX %p%s\n",
 443                                 i, le64_to_cpu(u0->a),
 444                                 le64_to_cpu(u0->b),
 445                                 (u64)dma_unmap_addr(buffer_info, dma),
 446                                 dma_unmap_len(buffer_info, len),
 447                                 buffer_info->next_to_watch,
 448                                 (u64)buffer_info->time_stamp,
 449                                 buffer_info->skb, next_desc);
 450
 451                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 452                                 print_hex_dump(KERN_INFO, "",
 453                                         DUMP_PREFIX_ADDRESS,
 454                                         16, 1, buffer_info->skb->data,
 455                                         dma_unmap_len(buffer_info, len),
 456                                         true);
 457                 }
 458         }
 459
 460         /* Print RX Rings Summary */
 461 rx_ring_summary:
 462         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 463         pr_info("Queue [NTU] [NTC]\n");
 464         for (n = 0; n < adapter->num_rx_queues; n++) {
 465                 rx_ring = adapter->rx_ring[n];
 466                 pr_info(" %5d %5X %5X\n",
 467                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 468         }
 469
 470         /* Print RX Rings */
 471         if (!netif_msg_rx_status(adapter))
 472                 goto exit;
 473
 474         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 475
 476         /* Advanced Receive Descriptor (Read) Format
 477          *    63                                           1        0
 478          *    +-----------------------------------------------------+
 479          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 480          *    +----------------------------------------------+------+
 481          *  8 |       Header Buffer Address [63:1]           |  DD  |
 482          *    +-----------------------------------------------------+
 483          *
 484          *
 485          * Advanced Receive Descriptor (Write-Back) Format
 486          *
 487          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 488          *   +------------------------------------------------------+
 489          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 490          *   | Checksum   Ident  |   |           |    | Type | Type |
 491          *   +------------------------------------------------------+
 492          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 493          *   +------------------------------------------------------+
 494          *   63       48 47    32 31            20 19               0
 495          */
 496
 497         for (n = 0; n < adapter->num_rx_queues; n++) {
 498                 rx_ring = adapter->rx_ring[n];
 499                 pr_info("------------------------------------\n");
 500                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 501                 pr_info("------------------------------------\n");
 502                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] [bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 503                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
 504
 505                 for (i = 0; i < rx_ring->count; i++) {
 506                         const char *next_desc;
 507                         struct igb_rx_buffer *buffer_info;
 508                         buffer_info = &rx_ring->rx_buffer_info[i];
 509                         rx_desc = IGB_RX_DESC(rx_ring, i);
 510                         u0 = (struct my_u0 *)rx_desc;
 511                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 512
 513                         if (i == rx_ring->next_to_use)
 514                                 next_desc = " NTU";
 515                         else if (i == rx_ring->next_to_clean)
 516                                 next_desc = " NTC";
 517                         else
 518                                 next_desc = "";
 519
 520                         if (staterr & E1000_RXD_STAT_DD) {
 521                                 /* Descriptor Done */
 522                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 523                                         "RWB", i,
 524                                         le64_to_cpu(u0->a),
 525                                         le64_to_cpu(u0->b),
 526                                         next_desc);
 527                         } else {
 528                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 529                                         "R  ", i,
 530                                         le64_to_cpu(u0->a),
 531                                         le64_to_cpu(u0->b),
 532                                         (u64)buffer_info->dma,
 533                                         next_desc);
 534
 535                                 if (netif_msg_pktdata(adapter) &&
 536                                     buffer_info->dma && buffer_info->page) {
 537                                         print_hex_dump(KERN_INFO, "",
 538                                           DUMP_PREFIX_ADDRESS,
 539                                           16, 1,
 540                                           page_address(buffer_info->page) +
 541                                                       buffer_info->page_offset,
 542                                           igb_rx_bufsz(rx_ring), true);
 543                                 }
 544                         }
 545                 }
 546         }
 547
 548 exit:
 549         return;
 550 }
 551
 552 /**
 553  *  igb_get_i2c_data - Reads the I2C SDA data bit
 554  *  @data: opaque pointer to adapter struct
 555  *
 556  *  Returns the I2C data bit value
 557  **/
 558 static int igb_get_i2c_data(void *data)
 559 {
 560         struct igb_adapter *adapter = (struct igb_adapter *)data;
 561         struct e1000_hw *hw = &adapter->hw;
 562         s32 i2cctl = rd32(E1000_I2CPARAMS);
 563
 564         return !!(i2cctl & E1000_I2C_DATA_IN);
 565 }
 566
 567 /**
 568  *  igb_set_i2c_data - Sets the I2C data bit
 569  *  @data: pointer to hardware structure
 570  *  @state: I2C data value (0 or 1) to set
 571  *
 572  *  Sets the I2C data bit
 573  **/
 574 static void igb_set_i2c_data(void *data, int state)
 575 {
 576         struct igb_adapter *adapter = (struct igb_adapter *)data;
 577         struct e1000_hw *hw = &adapter->hw;
 578         s32 i2cctl = rd32(E1000_I2CPARAMS);
 579
 580         if (state) {
 581                 i2cctl |= E1000_I2C_DATA_OUT | E1000_I2C_DATA_OE_N;
 582         } else {
 583                 i2cctl &= ~E1000_I2C_DATA_OE_N;
 584                 i2cctl &= ~E1000_I2C_DATA_OUT;
 585         }
 586
 587         wr32(E1000_I2CPARAMS, i2cctl);
 588         wrfl();
 589 }
 590
 591 /**
 592  *  igb_set_i2c_clk - Sets the I2C SCL clock
 593  *  @data: pointer to hardware structure
 594  *  @state: state to set clock
 595  *
 596  *  Sets the I2C clock line to state
 597  **/
 598 static void igb_set_i2c_clk(void *data, int state)
 599 {
 600         struct igb_adapter *adapter = (struct igb_adapter *)data;
 601         struct e1000_hw *hw = &adapter->hw;
 602         s32 i2cctl = rd32(E1000_I2CPARAMS);
 603
 604         if (state) {
 605                 i2cctl |= E1000_I2C_CLK_OUT | E1000_I2C_CLK_OE_N;
 606         } else {
 607                 i2cctl &= ~E1000_I2C_CLK_OUT;
 608                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 609         }
 610         wr32(E1000_I2CPARAMS, i2cctl);
 611         wrfl();
 612 }
 613
 614 /**
 615  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 616  *  @data: pointer to hardware structure
 617  *
 618  *  Gets the I2C clock state
 619  **/
 620 static int igb_get_i2c_clk(void *data)
 621 {
 622         struct igb_adapter *adapter = (struct igb_adapter *)data;
 623         struct e1000_hw *hw = &adapter->hw;
 624         s32 i2cctl = rd32(E1000_I2CPARAMS);
 625
 626         return !!(i2cctl & E1000_I2C_CLK_IN);
 627 }
 628
 629 static const struct i2c_algo_bit_data igb_i2c_algo = {
 630         .setsda         = igb_set_i2c_data,
 631         .setscl         = igb_set_i2c_clk,
 632         .getsda         = igb_get_i2c_data,
 633         .getscl         = igb_get_i2c_clk,
 634         .udelay         = 5,
 635         .timeout        = 20,
 636 };
 637
 638 /**
 639  *  igb_get_hw_dev - return device
 640  *  @hw: pointer to hardware structure
 641  *
 642  *  used by hardware layer to print debugging information
 643  **/
 644 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 645 {
 646         struct igb_adapter *adapter = hw->back;
 647         return adapter->netdev;
 648 }
 649
 650 /**
 651  *  igb_init_module - Driver Registration Routine
 652  *
 653  *  igb_init_module is the first routine called when the driver is
 654  *  loaded. All it does is register with the PCI subsystem.
 655  **/
 656 static int __init igb_init_module(void)
 657 {
 658         int ret;
 659
 660         pr_info("%s\n", igb_driver_string);
 661         pr_info("%s\n", igb_copyright);
 662
 663 #ifdef CONFIG_IGB_DCA
 664         dca_register_notify(&dca_notifier);
 665 #endif
 666         ret = pci_register_driver(&igb_driver);
 667         return ret;
 668 }
 669
 670 module_init(igb_init_module);
 671
 672 /**
 673  *  igb_exit_module - Driver Exit Cleanup Routine
 674  *
 675  *  igb_exit_module is called just before the driver is removed
 676  *  from memory.
 677  **/
 678 static void __exit igb_exit_module(void)
 679 {
 680 #ifdef CONFIG_IGB_DCA
 681         dca_unregister_notify(&dca_notifier);
 682 #endif
 683         pci_unregister_driver(&igb_driver);
 684 }
 685
 686 module_exit(igb_exit_module);
 687
 688 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 689 /**
 690  *  igb_cache_ring_register - Descriptor ring to register mapping
 691  *  @adapter: board private structure to initialize
 692  *
 693  *  Once we know the feature-set enabled for the device, we'll cache
 694  *  the register offset the descriptor ring is assigned to.
 695  **/
 696 static void igb_cache_ring_register(struct igb_adapter *adapter)
 697 {
 698         int i = 0, j = 0;
 699         u32 rbase_offset = adapter->vfs_allocated_count;
 700
 701         switch (adapter->hw.mac.type) {
 702         case e1000_82576:
 703                 /* The queues are allocated for virtualization such that VF 0
 704                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 705                  * In order to avoid collision we start at the first free queue
 706                  * and continue consuming queues in the same sequence
 707                  */
 708                 if (adapter->vfs_allocated_count) {
 709                         for (; i < adapter->rss_queues; i++)
 710                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 711                                                                Q_IDX_82576(i);
 712                 }
 713                 fallthrough;
 714         case e1000_82575:
 715         case e1000_82580:
 716         case e1000_i350:
 717         case e1000_i354:
 718         case e1000_i210:
 719         case e1000_i211:
 720         default:
 721                 for (; i < adapter->num_rx_queues; i++)
 722                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 723                 for (; j < adapter->num_tx_queues; j++)
 724                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 725                 break;
 726         }
 727 }
 728
 729 u32 igb_rd32(struct e1000_hw *hw, u32 reg)
 730 {
 731         struct igb_adapter *igb = container_of(hw, struct igb_adapter, hw);
 732         u8 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
 733         u32 value = 0;
 734
 735         if (E1000_REMOVED(hw_addr))
 736                 return ~value;
 737
 738         value = readl(&hw_addr[reg]);
 739
 740         /* reads should not return all F's */
 741         if (!(~value) && (!reg || !(~readl(hw_addr)))) {
 742                 struct net_device *netdev = igb->netdev;
 743                 hw->hw_addr = NULL;
 744                 netdev_err(netdev, "PCIe link lost\n");
 745                 WARN(pci_device_is_present(igb->pdev),
 746                      "igb: Failed to read reg 0x%x!\n", reg);
 747         }
 748
 749         return value;
 750 }
 751
 752 /**
 753  *  igb_write_ivar - configure ivar for given MSI-X vector
 754  *  @hw: pointer to the HW structure
 755  *  @msix_vector: vector number we are allocating to a given ring
 756  *  @index: row index of IVAR register to write within IVAR table
 757  *  @offset: column offset of in IVAR, should be multiple of 8
 758  *
 759  *  This function is intended to handle the writing of the IVAR register
 760  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 761  *  each containing an cause allocation for an Rx and Tx ring, and a
 762  *  variable number of rows depending on the number of queues supported.
 763  **/
 764 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 765                            int index, int offset)
 766 {
 767         u32 ivar = array_rd32(E1000_IVAR0, index);
 768
 769         /* clear any bits that are currently set */
 770         ivar &= ~((u32)0xFF << offset);
 771
 772         /* write vector and valid bit */
 773         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 774
 775         array_wr32(E1000_IVAR0, index, ivar);
 776 }
 777
 778 #define IGB_N0_QUEUE -1
 779 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 780 {
 781         struct igb_adapter *adapter = q_vector->adapter;
 782         struct e1000_hw *hw = &adapter->hw;
 783         int rx_queue = IGB_N0_QUEUE;
 784         int tx_queue = IGB_N0_QUEUE;
 785         u32 msixbm = 0;
 786
 787         if (q_vector->rx.ring)
 788                 rx_queue = q_vector->rx.ring->reg_idx;
 789         if (q_vector->tx.ring)
 790                 tx_queue = q_vector->tx.ring->reg_idx;
 791
 792         switch (hw->mac.type) {
 793         case e1000_82575:
 794                 /* The 82575 assigns vectors using a bitmask, which matches the
 795                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 796                  * or more queues to a vector, we write the appropriate bits
 797                  * into the MSIXBM register for that vector.
 798                  */
 799                 if (rx_queue > IGB_N0_QUEUE)
 800                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 801                 if (tx_queue > IGB_N0_QUEUE)
 802                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 803                 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0)
 804                         msixbm |= E1000_EIMS_OTHER;
 805                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 806                 q_vector->eims_value = msixbm;
 807                 break;
 808         case e1000_82576:
 809                 /* 82576 uses a table that essentially consists of 2 columns
 810                  * with 8 rows.  The ordering is column-major so we use the
 811                  * lower 3 bits as the row index, and the 4th bit as the
 812                  * column offset.
 813                  */
 814                 if (rx_queue > IGB_N0_QUEUE)
 815                         igb_write_ivar(hw, msix_vector,
 816                                        rx_queue & 0x7,
 817                                        (rx_queue & 0x8) << 1);
 818                 if (tx_queue > IGB_N0_QUEUE)
 819                         igb_write_ivar(hw, msix_vector,
 820                                        tx_queue & 0x7,
 821                                        ((tx_queue & 0x8) << 1) + 8);
 822                 q_vector->eims_value = BIT(msix_vector);
 823                 break;
 824         case e1000_82580:
 825         case e1000_i350:
 826         case e1000_i354:
 827         case e1000_i210:
 828         case e1000_i211:
 829                 /* On 82580 and newer adapters the scheme is similar to 82576
 830                  * however instead of ordering column-major we have things
 831                  * ordered row-major.  So we traverse the table by using
 832                  * bit 0 as the column offset, and the remaining bits as the
 833                  * row index.
 834                  */
 835                 if (rx_queue > IGB_N0_QUEUE)
 836                         igb_write_ivar(hw, msix_vector,
 837                                        rx_queue >> 1,
 838                                        (rx_queue & 0x1) << 4);
 839                 if (tx_queue > IGB_N0_QUEUE)
 840                         igb_write_ivar(hw, msix_vector,
 841                                        tx_queue >> 1,
 842                                        ((tx_queue & 0x1) << 4) + 8);
 843                 q_vector->eims_value = BIT(msix_vector);
 844                 break;
 845         default:
 846                 BUG();
 847                 break;
 848         }
 849
 850         /* add q_vector eims value to global eims_enable_mask */
 851         adapter->eims_enable_mask |= q_vector->eims_value;
 852
 853         /* configure q_vector to set itr on first interrupt */
 854         q_vector->set_itr = 1;
 855 }
 856
 857 /**
 858  *  igb_configure_msix - Configure MSI-X hardware
 859  *  @adapter: board private structure to initialize
 860  *
 861  *  igb_configure_msix sets up the hardware to properly
 862  *  generate MSI-X interrupts.
 863  **/
 864 static void igb_configure_msix(struct igb_adapter *adapter)
 865 {
 866         u32 tmp;
 867         int i, vector = 0;
 868         struct e1000_hw *hw = &adapter->hw;
 869
 870         adapter->eims_enable_mask = 0;
 871
 872         /* set vector for other causes, i.e. link changes */
 873         switch (hw->mac.type) {
 874         case e1000_82575:
 875                 tmp = rd32(E1000_CTRL_EXT);
 876                 /* enable MSI-X PBA support*/
 877                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 878
 879                 /* Auto-Mask interrupts upon ICR read. */
 880                 tmp |= E1000_CTRL_EXT_EIAME;
 881                 tmp |= E1000_CTRL_EXT_IRCA;
 882
 883                 wr32(E1000_CTRL_EXT, tmp);
 884
 885                 /* enable msix_other interrupt */
 886                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 887                 adapter->eims_other = E1000_EIMS_OTHER;
 888
 889                 break;
 890
 891         case e1000_82576:
 892         case e1000_82580:
 893         case e1000_i350:
 894         case e1000_i354:
 895         case e1000_i210:
 896         case e1000_i211:
 897                 /* Turn on MSI-X capability first, or our settings
 898                  * won't stick.  And it will take days to debug.
 899                  */
 900                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 901                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 902                      E1000_GPIE_NSICR);
 903
 904                 /* enable msix_other interrupt */
 905                 adapter->eims_other = BIT(vector);
 906                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 907
 908                 wr32(E1000_IVAR_MISC, tmp);
 909                 break;
 910         default:
 911                 /* do nothing, since nothing else supports MSI-X */
 912                 break;
 913         } /* switch (hw->mac.type) */
 914
 915         adapter->eims_enable_mask |= adapter->eims_other;
 916
 917         for (i = 0; i < adapter->num_q_vectors; i++)
 918                 igb_assign_vector(adapter->q_vector[i], vector++);
 919
 920         wrfl();
 921 }
 922
 923 /**
 924  *  igb_request_msix - Initialize MSI-X interrupts
 925  *  @adapter: board private structure to initialize
 926  *
 927  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 928  *  kernel.
 929  **/
 930 static int igb_request_msix(struct igb_adapter *adapter)
 931 {
 932         unsigned int num_q_vectors = adapter->num_q_vectors;
 933         struct net_device *netdev = adapter->netdev;
 934         int i, err = 0, vector = 0, free_vector = 0;
 935
 936         err = request_irq(adapter->msix_entries[vector].vector,
 937                           igb_msix_other, 0, netdev->name, adapter);
 938         if (err)
 939                 goto err_out;
 940
 941         if (num_q_vectors > MAX_Q_VECTORS) {
 942                 num_q_vectors = MAX_Q_VECTORS;
 943                 dev_warn(&adapter->pdev->dev,
 944                          "The number of queue vectors (%d) is higher than max allowed (%d)\n",
 945                          adapter->num_q_vectors, MAX_Q_VECTORS);
 946         }
 947         for (i = 0; i < num_q_vectors; i++) {
 948                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 949
 950                 vector++;
 951
 952                 q_vector->itr_register = adapter->io_addr + E1000_EITR(vector);
 953
 954                 if (q_vector->rx.ring && q_vector->tx.ring)
 955                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 956                                 q_vector->rx.ring->queue_index);
 957                 else if (q_vector->tx.ring)
 958                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 959                                 q_vector->tx.ring->queue_index);
 960                 else if (q_vector->rx.ring)
 961                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 962                                 q_vector->rx.ring->queue_index);
 963                 else
 964                         sprintf(q_vector->name, "%s-unused", netdev->name);
 965
 966                 err = request_irq(adapter->msix_entries[vector].vector,
 967                                   igb_msix_ring, 0, q_vector->name,
 968                                   q_vector);
 969                 if (err)
 970                         goto err_free;
 971         }
 972
 973         igb_configure_msix(adapter);
 974         return 0;
 975
 976 err_free:
 977         /* free already assigned IRQs */
 978         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 979
 980         vector--;
 981         for (i = 0; i < vector; i++) {
 982                 free_irq(adapter->msix_entries[free_vector++].vector,
 983                          adapter->q_vector[i]);
 984         }
 985 err_out:
 986         return err;
 987 }
 988
 989 /**
 990  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 991  *  @adapter: board private structure to initialize
 992  *  @v_idx: Index of vector to be freed
 993  *
 994  *  This function frees the memory allocated to the q_vector.
 995  **/
 996 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 997 {
 998         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 999
1000         adapter->q_vector[v_idx] = NULL;
1001
1002         /* igb_get_stats64() might access the rings on this vector,
1003          * we must wait a grace period before freeing it.
1004          */
1005         if (q_vector)
1006                 kfree_rcu(q_vector, rcu);
1007 }
1008
1009 /**
1010  *  igb_reset_q_vector - Reset config for interrupt vector
1011  *  @adapter: board private structure to initialize
1012  *  @v_idx: Index of vector to be reset
1013  *
1014  *  If NAPI is enabled it will delete any references to the
1015  *  NAPI struct. This is preparation for igb_free_q_vector.
1016  **/
1017 static void igb_reset_q_vector(struct igb_adapter *adapter, int v_idx)
1018 {
1019         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1020
1021         /* Coming from igb_set_interrupt_capability, the vectors are not yet
1022          * allocated. So, q_vector is NULL so we should stop here.
1023          */
1024         if (!q_vector)
1025                 return;
1026
1027         if (q_vector->tx.ring)
1028                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1029
1030         if (q_vector->rx.ring)
1031                 adapter->rx_ring[q_vector->rx.ring->queue_index] = NULL;
1032
1033         netif_napi_del(&q_vector->napi);
1034
1035 }
1036
1037 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
1038 {
1039         int v_idx = adapter->num_q_vectors;
1040
1041         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1042                 pci_disable_msix(adapter->pdev);
1043         else if (adapter->flags & IGB_FLAG_HAS_MSI)
1044                 pci_disable_msi(adapter->pdev);
1045
1046         while (v_idx--)
1047                 igb_reset_q_vector(adapter, v_idx);
1048 }
1049
1050 /**
1051  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1052  *  @adapter: board private structure to initialize
1053  *
1054  *  This function frees the memory allocated to the q_vectors.  In addition if
1055  *  NAPI is enabled it will delete any references to the NAPI struct prior
1056  *  to freeing the q_vector.
1057  **/
1058 static void igb_free_q_vectors(struct igb_adapter *adapter)
1059 {
1060         int v_idx = adapter->num_q_vectors;
1061
1062         adapter->num_tx_queues = 0;
1063         adapter->num_rx_queues = 0;
1064         adapter->num_q_vectors = 0;
1065
1066         while (v_idx--) {
1067                 igb_reset_q_vector(adapter, v_idx);
1068                 igb_free_q_vector(adapter, v_idx);
1069         }
1070 }
1071
1072 /**
1073  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1074  *  @adapter: board private structure to initialize
1075  *
1076  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1077  *  MSI-X interrupts allocated.
1078  */
1079 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1080 {
1081         igb_free_q_vectors(adapter);
1082         igb_reset_interrupt_capability(adapter);
1083 }
1084
1085 /**
1086  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1087  *  @adapter: board private structure to initialize
1088  *  @msix: boolean value of MSIX capability
1089  *
1090  *  Attempt to configure interrupts using the best available
1091  *  capabilities of the hardware and kernel.
1092  **/
1093 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1094 {
1095         int err;
1096         int numvecs, i;
1097
1098         if (!msix)
1099                 goto msi_only;
1100         adapter->flags |= IGB_FLAG_HAS_MSIX;
1101
1102         /* Number of supported queues. */
1103         adapter->num_rx_queues = adapter->rss_queues;
1104         if (adapter->vfs_allocated_count)
1105                 adapter->num_tx_queues = 1;
1106         else
1107                 adapter->num_tx_queues = adapter->rss_queues;
1108
1109         /* start with one vector for every Rx queue */
1110         numvecs = adapter->num_rx_queues;
1111
1112         /* if Tx handler is separate add 1 for every Tx queue */
1113         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1114                 numvecs += adapter->num_tx_queues;
1115
1116         /* store the number of vectors reserved for queues */
1117         adapter->num_q_vectors = numvecs;
1118
1119         /* add 1 vector for link status interrupts */
1120         numvecs++;
1121         for (i = 0; i < numvecs; i++)
1122                 adapter->msix_entries[i].entry = i;
1123
1124         err = pci_enable_msix_range(adapter->pdev,
1125                                     adapter->msix_entries,
1126                                     numvecs,
1127                                     numvecs);
1128         if (err > 0)
1129                 return;
1130
1131         igb_reset_interrupt_capability(adapter);
1132
1133         /* If we can't do MSI-X, try MSI */
1134 msi_only:
1135         adapter->flags &= ~IGB_FLAG_HAS_MSIX;
1136 #ifdef CONFIG_PCI_IOV
1137         /* disable SR-IOV for non MSI-X configurations */
1138         if (adapter->vf_data) {
1139                 struct e1000_hw *hw = &adapter->hw;
1140                 /* disable iov and allow time for transactions to clear */
1141                 pci_disable_sriov(adapter->pdev);
1142                 msleep(500);
1143
1144                 kfree(adapter->vf_mac_list);
1145                 adapter->vf_mac_list = NULL;
1146                 kfree(adapter->vf_data);
1147                 adapter->vf_data = NULL;
1148                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1149                 wrfl();
1150                 msleep(100);
1151                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1152         }
1153 #endif
1154         adapter->vfs_allocated_count = 0;
1155         adapter->rss_queues = 1;
1156         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1157         adapter->num_rx_queues = 1;
1158         adapter->num_tx_queues = 1;
1159         adapter->num_q_vectors = 1;
1160         if (!pci_enable_msi(adapter->pdev))
1161                 adapter->flags |= IGB_FLAG_HAS_MSI;
1162 }
1163
1164 static void igb_add_ring(struct igb_ring *ring,
1165                          struct igb_ring_container *head)
1166 {
1167         head->ring = ring;
1168         head->count++;
1169 }
1170
1171 /**
1172  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1173  *  @adapter: board private structure to initialize
1174  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1175  *  @v_idx: index of vector in adapter struct
1176  *  @txr_count: total number of Tx rings to allocate
1177  *  @txr_idx: index of first Tx ring to allocate
1178  *  @rxr_count: total number of Rx rings to allocate
1179  *  @rxr_idx: index of first Rx ring to allocate
1180  *
1181  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1182  **/
1183 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1184                               int v_count, int v_idx,
1185                               int txr_count, int txr_idx,
1186                               int rxr_count, int rxr_idx)
1187 {
1188         struct igb_q_vector *q_vector;
1189         struct igb_ring *ring;
1190         int ring_count;
1191         size_t size;
1192
1193         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1194         if (txr_count > 1 || rxr_count > 1)
1195                 return -ENOMEM;
1196
1197         ring_count = txr_count + rxr_count;
1198         size = kmalloc_size_roundup(struct_size(q_vector, ring, ring_count));
1199
1200         /* allocate q_vector and rings */
1201         q_vector = adapter->q_vector[v_idx];
1202         if (!q_vector) {
1203                 q_vector = kzalloc(size, GFP_KERNEL);
1204         } else if (size > ksize(q_vector)) {
1205                 struct igb_q_vector *new_q_vector;
1206
1207                 new_q_vector = kzalloc(size, GFP_KERNEL);
1208                 if (new_q_vector)
1209                         kfree_rcu(q_vector, rcu);
1210                 q_vector = new_q_vector;
1211         } else {
1212                 memset(q_vector, 0, size);
1213         }
1214         if (!q_vector)
1215                 return -ENOMEM;
1216
1217         /* initialize NAPI */
1218         netif_napi_add(adapter->netdev, &q_vector->napi, igb_poll);
1219
1220         /* tie q_vector and adapter together */
1221         adapter->q_vector[v_idx] = q_vector;
1222         q_vector->adapter = adapter;
1223
1224         /* initialize work limits */
1225         q_vector->tx.work_limit = adapter->tx_work_limit;
1226
1227         /* initialize ITR configuration */
1228         q_vector->itr_register = adapter->io_addr + E1000_EITR(0);
1229         q_vector->itr_val = IGB_START_ITR;
1230
1231         /* initialize pointer to rings */
1232         ring = q_vector->ring;
1233
1234         /* intialize ITR */
1235         if (rxr_count) {
1236                 /* rx or rx/tx vector */
1237                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1238                         q_vector->itr_val = adapter->rx_itr_setting;
1239         } else {
1240                 /* tx only vector */
1241                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1242                         q_vector->itr_val = adapter->tx_itr_setting;
1243         }
1244
1245         if (txr_count) {
1246                 /* assign generic ring traits */
1247                 ring->dev = &adapter->pdev->dev;
1248                 ring->netdev = adapter->netdev;
1249
1250                 /* configure backlink on ring */
1251                 ring->q_vector = q_vector;
1252
1253                 /* update q_vector Tx values */
1254                 igb_add_ring(ring, &q_vector->tx);
1255
1256                 /* For 82575, context index must be unique per ring. */
1257                 if (adapter->hw.mac.type == e1000_82575)
1258                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1259
1260                 /* apply Tx specific ring traits */
1261                 ring->count = adapter->tx_ring_count;
1262                 ring->queue_index = txr_idx;
1263
1264                 ring->cbs_enable = false;
1265                 ring->idleslope = 0;
1266                 ring->sendslope = 0;
1267                 ring->hicredit = 0;
1268                 ring->locredit = 0;
1269
1270                 u64_stats_init(&ring->tx_syncp);
1271                 u64_stats_init(&ring->tx_syncp2);
1272
1273                 /* assign ring to adapter */
1274                 adapter->tx_ring[txr_idx] = ring;
1275
1276                 /* push pointer to next ring */
1277                 ring++;
1278         }
1279
1280         if (rxr_count) {
1281                 /* assign generic ring traits */
1282                 ring->dev = &adapter->pdev->dev;
1283                 ring->netdev = adapter->netdev;
1284
1285                 /* configure backlink on ring */
1286                 ring->q_vector = q_vector;
1287
1288                 /* update q_vector Rx values */
1289                 igb_add_ring(ring, &q_vector->rx);
1290
1291                 /* set flag indicating ring supports SCTP checksum offload */
1292                 if (adapter->hw.mac.type >= e1000_82576)
1293                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1294
1295                 /* On i350, i354, i210, and i211, loopback VLAN packets
1296                  * have the tag byte-swapped.
1297                  */
1298                 if (adapter->hw.mac.type >= e1000_i350)
1299                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1300
1301                 /* apply Rx specific ring traits */
1302                 ring->count = adapter->rx_ring_count;
1303                 ring->queue_index = rxr_idx;
1304
1305                 u64_stats_init(&ring->rx_syncp);
1306
1307                 /* assign ring to adapter */
1308                 adapter->rx_ring[rxr_idx] = ring;
1309         }
1310
1311         return 0;
1312 }
1313
1314
1315 /**
1316  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1317  *  @adapter: board private structure to initialize
1318  *
1319  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1320  *  return -ENOMEM.
1321  **/
1322 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1323 {
1324         int q_vectors = adapter->num_q_vectors;
1325         int rxr_remaining = adapter->num_rx_queues;
1326         int txr_remaining = adapter->num_tx_queues;
1327         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1328         int err;
1329
1330         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1331                 for (; rxr_remaining; v_idx++) {
1332                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1333                                                  0, 0, 1, rxr_idx);
1334
1335                         if (err)
1336                                 goto err_out;
1337
1338                         /* update counts and index */
1339                         rxr_remaining--;
1340                         rxr_idx++;
1341                 }
1342         }
1343
1344         for (; v_idx < q_vectors; v_idx++) {
1345                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1346                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1347
1348                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1349                                          tqpv, txr_idx, rqpv, rxr_idx);
1350
1351                 if (err)
1352                         goto err_out;
1353
1354                 /* update counts and index */
1355                 rxr_remaining -= rqpv;
1356                 txr_remaining -= tqpv;
1357                 rxr_idx++;
1358                 txr_idx++;
1359         }
1360
1361         return 0;
1362
1363 err_out:
1364         adapter->num_tx_queues = 0;
1365         adapter->num_rx_queues = 0;
1366         adapter->num_q_vectors = 0;
1367
1368         while (v_idx--)
1369                 igb_free_q_vector(adapter, v_idx);
1370
1371         return -ENOMEM;
1372 }
1373
1374 /**
1375  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1376  *  @adapter: board private structure to initialize
1377  *  @msix: boolean value of MSIX capability
1378  *
1379  *  This function initializes the interrupts and allocates all of the queues.
1380  **/
1381 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1382 {
1383         struct pci_dev *pdev = adapter->pdev;
1384         int err;
1385
1386         igb_set_interrupt_capability(adapter, msix);
1387
1388         err = igb_alloc_q_vectors(adapter);
1389         if (err) {
1390                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1391                 goto err_alloc_q_vectors;
1392         }
1393
1394         igb_cache_ring_register(adapter);
1395
1396         return 0;
1397
1398 err_alloc_q_vectors:
1399         igb_reset_interrupt_capability(adapter);
1400         return err;
1401 }
1402
1403 /**
1404  *  igb_request_irq - initialize interrupts
1405  *  @adapter: board private structure to initialize
1406  *
1407  *  Attempts to configure interrupts using the best available
1408  *  capabilities of the hardware and kernel.
1409  **/
1410 static int igb_request_irq(struct igb_adapter *adapter)
1411 {
1412         struct net_device *netdev = adapter->netdev;
1413         struct pci_dev *pdev = adapter->pdev;
1414         int err = 0;
1415
1416         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1417                 err = igb_request_msix(adapter);
1418                 if (!err)
1419                         goto request_done;
1420                 /* fall back to MSI */
1421                 igb_free_all_tx_resources(adapter);
1422                 igb_free_all_rx_resources(adapter);
1423
1424                 igb_clear_interrupt_scheme(adapter);
1425                 err = igb_init_interrupt_scheme(adapter, false);
1426                 if (err)
1427                         goto request_done;
1428
1429                 igb_setup_all_tx_resources(adapter);
1430                 igb_setup_all_rx_resources(adapter);
1431                 igb_configure(adapter);
1432         }
1433
1434         igb_assign_vector(adapter->q_vector[0], 0);
1435
1436         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1437                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1438                                   netdev->name, adapter);
1439                 if (!err)
1440                         goto request_done;
1441
1442                 /* fall back to legacy interrupts */
1443                 igb_reset_interrupt_capability(adapter);
1444                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1445         }
1446
1447         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1448                           netdev->name, adapter);
1449
1450         if (err)
1451                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1452                         err);
1453
1454 request_done:
1455         return err;
1456 }
1457
1458 static void igb_free_irq(struct igb_adapter *adapter)
1459 {
1460         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1461                 int vector = 0, i;
1462
1463                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1464
1465                 for (i = 0; i < adapter->num_q_vectors; i++)
1466                         free_irq(adapter->msix_entries[vector++].vector,
1467                                  adapter->q_vector[i]);
1468         } else {
1469                 free_irq(adapter->pdev->irq, adapter);
1470         }
1471 }
1472
1473 /**
1474  *  igb_irq_disable - Mask off interrupt generation on the NIC
1475  *  @adapter: board private structure
1476  **/
1477 static void igb_irq_disable(struct igb_adapter *adapter)
1478 {
1479         struct e1000_hw *hw = &adapter->hw;
1480
1481         /* we need to be careful when disabling interrupts.  The VFs are also
1482          * mapped into these registers and so clearing the bits can cause
1483          * issues on the VF drivers so we only need to clear what we set
1484          */
1485         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1486                 u32 regval = rd32(E1000_EIAM);
1487
1488                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1489                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1490                 regval = rd32(E1000_EIAC);
1491                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1492         }
1493
1494         wr32(E1000_IAM, 0);
1495         wr32(E1000_IMC, ~0);
1496         wrfl();
1497         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1498                 int i;
1499
1500                 for (i = 0; i < adapter->num_q_vectors; i++)
1501                         synchronize_irq(adapter->msix_entries[i].vector);
1502         } else {
1503                 synchronize_irq(adapter->pdev->irq);
1504         }
1505 }
1506
1507 /**
1508  *  igb_irq_enable - Enable default interrupt generation settings
1509  *  @adapter: board private structure
1510  **/
1511 static void igb_irq_enable(struct igb_adapter *adapter)
1512 {
1513         struct e1000_hw *hw = &adapter->hw;
1514
1515         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1516                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1517                 u32 regval = rd32(E1000_EIAC);
1518
1519                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1520                 regval = rd32(E1000_EIAM);
1521                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1522                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1523                 if (adapter->vfs_allocated_count) {
1524                         wr32(E1000_MBVFIMR, 0xFF);
1525                         ims |= E1000_IMS_VMMB;
1526                 }
1527                 wr32(E1000_IMS, ims);
1528         } else {
1529                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1530                                 E1000_IMS_DRSTA);
1531                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1532                                 E1000_IMS_DRSTA);
1533         }
1534 }
1535
1536 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1537 {
1538         struct e1000_hw *hw = &adapter->hw;
1539         u16 pf_id = adapter->vfs_allocated_count;
1540         u16 vid = adapter->hw.mng_cookie.vlan_id;
1541         u16 old_vid = adapter->mng_vlan_id;
1542
1543         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1544                 /* add VID to filter table */
1545                 igb_vfta_set(hw, vid, pf_id, true, true);
1546                 adapter->mng_vlan_id = vid;
1547         } else {
1548                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1549         }
1550
1551         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1552             (vid != old_vid) &&
1553             !test_bit(old_vid, adapter->active_vlans)) {
1554                 /* remove VID from filter table */
1555                 igb_vfta_set(hw, vid, pf_id, false, true);
1556         }
1557 }
1558
1559 /**
1560  *  igb_release_hw_control - release control of the h/w to f/w
1561  *  @adapter: address of board private structure
1562  *
1563  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1564  *  For ASF and Pass Through versions of f/w this means that the
1565  *  driver is no longer loaded.
1566  **/
1567 static void igb_release_hw_control(struct igb_adapter *adapter)
1568 {
1569         struct e1000_hw *hw = &adapter->hw;
1570         u32 ctrl_ext;
1571
1572         /* Let firmware take over control of h/w */
1573         ctrl_ext = rd32(E1000_CTRL_EXT);
1574         wr32(E1000_CTRL_EXT,
1575                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1576 }
1577
1578 /**
1579  *  igb_get_hw_control - get control of the h/w from f/w
1580  *  @adapter: address of board private structure
1581  *
1582  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1583  *  For ASF and Pass Through versions of f/w this means that
1584  *  the driver is loaded.
1585  **/
1586 static void igb_get_hw_control(struct igb_adapter *adapter)
1587 {
1588         struct e1000_hw *hw = &adapter->hw;
1589         u32 ctrl_ext;
1590
1591         /* Let firmware know the driver has taken over */
1592         ctrl_ext = rd32(E1000_CTRL_EXT);
1593         wr32(E1000_CTRL_EXT,
1594                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1595 }
1596
1597 static void enable_fqtss(struct igb_adapter *adapter, bool enable)
1598 {
1599         struct net_device *netdev = adapter->netdev;
1600         struct e1000_hw *hw = &adapter->hw;
1601
1602         WARN_ON(hw->mac.type != e1000_i210);
1603
1604         if (enable)
1605                 adapter->flags |= IGB_FLAG_FQTSS;
1606         else
1607                 adapter->flags &= ~IGB_FLAG_FQTSS;
1608
1609         if (netif_running(netdev))
1610                 schedule_work(&adapter->reset_task);
1611 }
1612
1613 static bool is_fqtss_enabled(struct igb_adapter *adapter)
1614 {
1615         return (adapter->flags & IGB_FLAG_FQTSS) ? true : false;
1616 }
1617
1618 static void set_tx_desc_fetch_prio(struct e1000_hw *hw, int queue,
1619                                    enum tx_queue_prio prio)
1620 {
1621         u32 val;
1622
1623         WARN_ON(hw->mac.type != e1000_i210);
1624         WARN_ON(queue < 0 || queue > 4);
1625
1626         val = rd32(E1000_I210_TXDCTL(queue));
1627
1628         if (prio == TX_QUEUE_PRIO_HIGH)
1629                 val |= E1000_TXDCTL_PRIORITY;
1630         else
1631                 val &= ~E1000_TXDCTL_PRIORITY;
1632
1633         wr32(E1000_I210_TXDCTL(queue), val);
1634 }
1635
1636 static void set_queue_mode(struct e1000_hw *hw, int queue, enum queue_mode mode)
1637 {
1638         u32 val;
1639
1640         WARN_ON(hw->mac.type != e1000_i210);
1641         WARN_ON(queue < 0 || queue > 1);
1642
1643         val = rd32(E1000_I210_TQAVCC(queue));
1644
1645         if (mode == QUEUE_MODE_STREAM_RESERVATION)
1646                 val |= E1000_TQAVCC_QUEUEMODE;
1647         else
1648                 val &= ~E1000_TQAVCC_QUEUEMODE;
1649
1650         wr32(E1000_I210_TQAVCC(queue), val);
1651 }
1652
1653 static bool is_any_cbs_enabled(struct igb_adapter *adapter)
1654 {
1655         int i;
1656
1657         for (i = 0; i < adapter->num_tx_queues; i++) {
1658                 if (adapter->tx_ring[i]->cbs_enable)
1659                         return true;
1660         }
1661
1662         return false;
1663 }
1664
1665 static bool is_any_txtime_enabled(struct igb_adapter *adapter)
1666 {
1667         int i;
1668
1669         for (i = 0; i < adapter->num_tx_queues; i++) {
1670                 if (adapter->tx_ring[i]->launchtime_enable)
1671                         return true;
1672         }
1673
1674         return false;
1675 }
1676
1677 /**
1678  *  igb_config_tx_modes - Configure "Qav Tx mode" features on igb
1679  *  @adapter: pointer to adapter struct
1680  *  @queue: queue number
1681  *
1682  *  Configure CBS and Launchtime for a given hardware queue.
1683  *  Parameters are retrieved from the correct Tx ring, so
1684  *  igb_save_cbs_params() and igb_save_txtime_params() should be used
1685  *  for setting those correctly prior to this function being called.
1686  **/
1687 static void igb_config_tx_modes(struct igb_adapter *adapter, int queue)
1688 {
1689         struct net_device *netdev = adapter->netdev;
1690         struct e1000_hw *hw = &adapter->hw;
1691         struct igb_ring *ring;
1692         u32 tqavcc, tqavctrl;
1693         u16 value;
1694
1695         WARN_ON(hw->mac.type != e1000_i210);
1696         WARN_ON(queue < 0 || queue > 1);
1697         ring = adapter->tx_ring[queue];
1698
1699         /* If any of the Qav features is enabled, configure queues as SR and
1700          * with HIGH PRIO. If none is, then configure them with LOW PRIO and
1701          * as SP.
1702          */
1703         if (ring->cbs_enable || ring->launchtime_enable) {
1704                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_HIGH);
1705                 set_queue_mode(hw, queue, QUEUE_MODE_STREAM_RESERVATION);
1706         } else {
1707                 set_tx_desc_fetch_prio(hw, queue, TX_QUEUE_PRIO_LOW);
1708                 set_queue_mode(hw, queue, QUEUE_MODE_STRICT_PRIORITY);
1709         }
1710
1711         /* If CBS is enabled, set DataTranARB and config its parameters. */
1712         if (ring->cbs_enable || queue == 0) {
1713                 /* i210 does not allow the queue 0 to be in the Strict
1714                  * Priority mode while the Qav mode is enabled, so,
1715                  * instead of disabling strict priority mode, we give
1716                  * queue 0 the maximum of credits possible.
1717                  *
1718                  * See section 8.12.19 of the i210 datasheet, "Note:
1719                  * Queue0 QueueMode must be set to 1b when
1720                  * TransmitMode is set to Qav."
1721                  */
1722                 if (queue == 0 && !ring->cbs_enable) {
1723                         /* max "linkspeed" idleslope in kbps */
1724                         ring->idleslope = 1000000;
1725                         ring->hicredit = ETH_FRAME_LEN;
1726                 }
1727
1728                 /* Always set data transfer arbitration to credit-based
1729                  * shaper algorithm on TQAVCTRL if CBS is enabled for any of
1730                  * the queues.
1731                  */
1732                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1733                 tqavctrl |= E1000_TQAVCTRL_DATATRANARB;
1734                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1735
1736                 /* According to i210 datasheet section 7.2.7.7, we should set
1737                  * the 'idleSlope' field from TQAVCC register following the
1738                  * equation:
1739                  *
1740                  * For 100 Mbps link speed:
1741                  *
1742                  *     value = BW * 0x7735 * 0.2                          (E1)
1743                  *
1744                  * For 1000Mbps link speed:
1745                  *
1746                  *     value = BW * 0x7735 * 2                            (E2)
1747                  *
1748                  * E1 and E2 can be merged into one equation as shown below.
1749                  * Note that 'link-speed' is in Mbps.
1750                  *
1751                  *     value = BW * 0x7735 * 2 * link-speed
1752                  *                           --------------               (E3)
1753                  *                                1000
1754                  *
1755                  * 'BW' is the percentage bandwidth out of full link speed
1756                  * which can be found with the following equation. Note that
1757                  * idleSlope here is the parameter from this function which
1758                  * is in kbps.
1759                  *
1760                  *     BW =     idleSlope
1761                  *          -----------------                             (E4)
1762                  *          link-speed * 1000
1763                  *
1764                  * That said, we can come up with a generic equation to
1765                  * calculate the value we should set it TQAVCC register by
1766                  * replacing 'BW' in E3 by E4. The resulting equation is:
1767                  *
1768                  * value =     idleSlope     * 0x7735 * 2 * link-speed
1769                  *         -----------------            --------------    (E5)
1770                  *         link-speed * 1000                 1000
1771                  *
1772                  * 'link-speed' is present in both sides of the fraction so
1773                  * it is canceled out. The final equation is the following:
1774                  *
1775                  *     value = idleSlope * 61034
1776                  *             -----------------                          (E6)
1777                  *                  1000000
1778                  *
1779                  * NOTE: For i210, given the above, we can see that idleslope
1780                  *       is represented in 16.38431 kbps units by the value at
1781                  *       the TQAVCC register (1Gbps / 61034), which reduces
1782                  *       the granularity for idleslope increments.
1783                  *       For instance, if you want to configure a 2576kbps
1784                  *       idleslope, the value to be written on the register
1785                  *       would have to be 157.23. If rounded down, you end
1786                  *       up with less bandwidth available than originally
1787                  *       required (~2572 kbps). If rounded up, you end up
1788                  *       with a higher bandwidth (~2589 kbps). Below the
1789                  *       approach we take is to always round up the
1790                  *       calculated value, so the resulting bandwidth might
1791                  *       be slightly higher for some configurations.
1792                  */
1793                 value = DIV_ROUND_UP_ULL(ring->idleslope * 61034ULL, 1000000);
1794
1795                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1796                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1797                 tqavcc |= value;
1798                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1799
1800                 wr32(E1000_I210_TQAVHC(queue),
1801                      0x80000000 + ring->hicredit * 0x7735);
1802         } else {
1803
1804                 /* Set idleSlope to zero. */
1805                 tqavcc = rd32(E1000_I210_TQAVCC(queue));
1806                 tqavcc &= ~E1000_TQAVCC_IDLESLOPE_MASK;
1807                 wr32(E1000_I210_TQAVCC(queue), tqavcc);
1808
1809                 /* Set hiCredit to zero. */
1810                 wr32(E1000_I210_TQAVHC(queue), 0);
1811
1812                 /* If CBS is not enabled for any queues anymore, then return to
1813                  * the default state of Data Transmission Arbitration on
1814                  * TQAVCTRL.
1815                  */
1816                 if (!is_any_cbs_enabled(adapter)) {
1817                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1818                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANARB;
1819                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1820                 }
1821         }
1822
1823         /* If LaunchTime is enabled, set DataTranTIM. */
1824         if (ring->launchtime_enable) {
1825                 /* Always set DataTranTIM on TQAVCTRL if LaunchTime is enabled
1826                  * for any of the SR queues, and configure fetchtime delta.
1827                  * XXX NOTE:
1828                  *     - LaunchTime will be enabled for all SR queues.
1829                  *     - A fixed offset can be added relative to the launch
1830                  *       time of all packets if configured at reg LAUNCH_OS0.
1831                  *       We are keeping it as 0 for now (default value).
1832                  */
1833                 tqavctrl = rd32(E1000_I210_TQAVCTRL);
1834                 tqavctrl |= E1000_TQAVCTRL_DATATRANTIM |
1835                        E1000_TQAVCTRL_FETCHTIME_DELTA;
1836                 wr32(E1000_I210_TQAVCTRL, tqavctrl);
1837         } else {
1838                 /* If Launchtime is not enabled for any SR queues anymore,
1839                  * then clear DataTranTIM on TQAVCTRL and clear fetchtime delta,
1840                  * effectively disabling Launchtime.
1841                  */
1842                 if (!is_any_txtime_enabled(adapter)) {
1843                         tqavctrl = rd32(E1000_I210_TQAVCTRL);
1844                         tqavctrl &= ~E1000_TQAVCTRL_DATATRANTIM;
1845                         tqavctrl &= ~E1000_TQAVCTRL_FETCHTIME_DELTA;
1846                         wr32(E1000_I210_TQAVCTRL, tqavctrl);
1847                 }
1848         }
1849
1850         /* XXX: In i210 controller the sendSlope and loCredit parameters from
1851          * CBS are not configurable by software so we don't do any 'controller
1852          * configuration' in respect to these parameters.
1853          */
1854
1855         netdev_dbg(netdev, "Qav Tx mode: cbs %s, launchtime %s, queue %d idleslope %d sendslope %d hiCredit %d locredit %d\n",
1856                    ring->cbs_enable ? "enabled" : "disabled",
1857                    ring->launchtime_enable ? "enabled" : "disabled",
1858                    queue,
1859                    ring->idleslope, ring->sendslope,
1860                    ring->hicredit, ring->locredit);
1861 }
1862
1863 static int igb_save_txtime_params(struct igb_adapter *adapter, int queue,
1864                                   bool enable)
1865 {
1866         struct igb_ring *ring;
1867
1868         if (queue < 0 || queue > adapter->num_tx_queues)
1869                 return -EINVAL;
1870
1871         ring = adapter->tx_ring[queue];
1872         ring->launchtime_enable = enable;
1873
1874         return 0;
1875 }
1876
1877 static int igb_save_cbs_params(struct igb_adapter *adapter, int queue,
1878                                bool enable, int idleslope, int sendslope,
1879                                int hicredit, int locredit)
1880 {
1881         struct igb_ring *ring;
1882
1883         if (queue < 0 || queue > adapter->num_tx_queues)
1884                 return -EINVAL;
1885
1886         ring = adapter->tx_ring[queue];
1887
1888         ring->cbs_enable = enable;
1889         ring->idleslope = idleslope;
1890         ring->sendslope = sendslope;
1891         ring->hicredit = hicredit;
1892         ring->locredit = locredit;
1893
1894         return 0;
1895 }
1896
1897 /**
1898  *  igb_setup_tx_mode - Switch to/from Qav Tx mode when applicable
1899  *  @adapter: pointer to adapter struct
1900  *
1901  *  Configure TQAVCTRL register switching the controller's Tx mode
1902  *  if FQTSS mode is enabled or disabled. Additionally, will issue
1903  *  a call to igb_config_tx_modes() per queue so any previously saved
1904  *  Tx parameters are applied.
1905  **/
1906 static void igb_setup_tx_mode(struct igb_adapter *adapter)
1907 {
1908         struct net_device *netdev = adapter->netdev;
1909         struct e1000_hw *hw = &adapter->hw;
1910         u32 val;
1911
1912         /* Only i210 controller supports changing the transmission mode. */
1913         if (hw->mac.type != e1000_i210)
1914                 return;
1915
1916         if (is_fqtss_enabled(adapter)) {
1917                 int i, max_queue;
1918
1919                 /* Configure TQAVCTRL register: set transmit mode to 'Qav',
1920                  * set data fetch arbitration to 'round robin', set SP_WAIT_SR
1921                  * so SP queues wait for SR ones.
1922                  */
1923                 val = rd32(E1000_I210_TQAVCTRL);
1924                 val |= E1000_TQAVCTRL_XMIT_MODE | E1000_TQAVCTRL_SP_WAIT_SR;
1925                 val &= ~E1000_TQAVCTRL_DATAFETCHARB;
1926                 wr32(E1000_I210_TQAVCTRL, val);
1927
1928                 /* Configure Tx and Rx packet buffers sizes as described in
1929                  * i210 datasheet section 7.2.7.7.
1930                  */
1931                 val = rd32(E1000_TXPBS);
1932                 val &= ~I210_TXPBSIZE_MASK;
1933                 val |= I210_TXPBSIZE_PB0_6KB | I210_TXPBSIZE_PB1_6KB |
1934                         I210_TXPBSIZE_PB2_6KB | I210_TXPBSIZE_PB3_6KB;
1935                 wr32(E1000_TXPBS, val);
1936
1937                 val = rd32(E1000_RXPBS);
1938                 val &= ~I210_RXPBSIZE_MASK;
1939                 val |= I210_RXPBSIZE_PB_30KB;
1940                 wr32(E1000_RXPBS, val);
1941
1942                 /* Section 8.12.9 states that MAX_TPKT_SIZE from DTXMXPKTSZ
1943                  * register should not exceed the buffer size programmed in
1944                  * TXPBS. The smallest buffer size programmed in TXPBS is 4kB
1945                  * so according to the datasheet we should set MAX_TPKT_SIZE to
1946                  * 4kB / 64.
1947                  *
1948                  * However, when we do so, no frame from queue 2 and 3 are
1949                  * transmitted.  It seems the MAX_TPKT_SIZE should not be great
1950                  * or _equal_ to the buffer size programmed in TXPBS. For this
1951                  * reason, we set MAX_ TPKT_SIZE to (4kB - 1) / 64.
1952                  */
1953                 val = (4096 - 1) / 64;
1954                 wr32(E1000_I210_DTXMXPKTSZ, val);
1955
1956                 /* Since FQTSS mode is enabled, apply any CBS configuration
1957                  * previously set. If no previous CBS configuration has been
1958                  * done, then the initial configuration is applied, which means
1959                  * CBS is disabled.
1960                  */
1961                 max_queue = (adapter->num_tx_queues < I210_SR_QUEUES_NUM) ?
1962                             adapter->num_tx_queues : I210_SR_QUEUES_NUM;
1963
1964                 for (i = 0; i < max_queue; i++) {
1965                         igb_config_tx_modes(adapter, i);
1966                 }
1967         } else {
1968                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
1969                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
1970                 wr32(E1000_I210_DTXMXPKTSZ, I210_DTXMXPKTSZ_DEFAULT);
1971
1972                 val = rd32(E1000_I210_TQAVCTRL);
1973                 /* According to Section 8.12.21, the other flags we've set when
1974                  * enabling FQTSS are not relevant when disabling FQTSS so we
1975                  * don't set they here.
1976                  */
1977                 val &= ~E1000_TQAVCTRL_XMIT_MODE;
1978                 wr32(E1000_I210_TQAVCTRL, val);
1979         }
1980
1981         netdev_dbg(netdev, "FQTSS %s\n", (is_fqtss_enabled(adapter)) ?
1982                    "enabled" : "disabled");
1983 }
1984
1985 /**
1986  *  igb_configure - configure the hardware for RX and TX
1987  *  @adapter: private board structure
1988  **/
1989 static void igb_configure(struct igb_adapter *adapter)
1990 {
1991         struct net_device *netdev = adapter->netdev;
1992         int i;
1993
1994         igb_get_hw_control(adapter);
1995         igb_set_rx_mode(netdev);
1996         igb_setup_tx_mode(adapter);
1997
1998         igb_restore_vlan(adapter);
1999
2000         igb_setup_tctl(adapter);
2001         igb_setup_mrqc(adapter);
2002         igb_setup_rctl(adapter);
2003
2004         igb_nfc_filter_restore(adapter);
2005         igb_configure_tx(adapter);
2006         igb_configure_rx(adapter);
2007
2008         igb_rx_fifo_flush_82575(&adapter->hw);
2009
2010         /* call igb_desc_unused which always leaves
2011          * at least 1 descriptor unused to make sure
2012          * next_to_use != next_to_clean
2013          */
2014         for (i = 0; i < adapter->num_rx_queues; i++) {
2015                 struct igb_ring *ring = adapter->rx_ring[i];
2016                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
2017         }
2018 }
2019
2020 /**
2021  *  igb_power_up_link - Power up the phy/serdes link
2022  *  @adapter: address of board private structure
2023  **/
2024 void igb_power_up_link(struct igb_adapter *adapter)
2025 {
2026         igb_reset_phy(&adapter->hw);
2027
2028         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2029                 igb_power_up_phy_copper(&adapter->hw);
2030         else
2031                 igb_power_up_serdes_link_82575(&adapter->hw);
2032
2033         igb_setup_link(&adapter->hw);
2034 }
2035
2036 /**
2037  *  igb_power_down_link - Power down the phy/serdes link
2038  *  @adapter: address of board private structure
2039  */
2040 static void igb_power_down_link(struct igb_adapter *adapter)
2041 {
2042         if (adapter->hw.phy.media_type == e1000_media_type_copper)
2043                 igb_power_down_phy_copper_82575(&adapter->hw);
2044         else
2045                 igb_shutdown_serdes_link_82575(&adapter->hw);
2046 }
2047
2048 /**
2049  * igb_check_swap_media -  Detect and switch function for Media Auto Sense
2050  * @adapter: address of the board private structure
2051  **/
2052 static void igb_check_swap_media(struct igb_adapter *adapter)
2053 {
2054         struct e1000_hw *hw = &adapter->hw;
2055         u32 ctrl_ext, connsw;
2056         bool swap_now = false;
2057
2058         ctrl_ext = rd32(E1000_CTRL_EXT);
2059         connsw = rd32(E1000_CONNSW);
2060
2061         /* need to live swap if current media is copper and we have fiber/serdes
2062          * to go to.
2063          */
2064
2065         if ((hw->phy.media_type == e1000_media_type_copper) &&
2066             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
2067                 swap_now = true;
2068         } else if ((hw->phy.media_type != e1000_media_type_copper) &&
2069                    !(connsw & E1000_CONNSW_SERDESD)) {
2070                 /* copper signal takes time to appear */
2071                 if (adapter->copper_tries < 4) {
2072                         adapter->copper_tries++;
2073                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
2074                         wr32(E1000_CONNSW, connsw);
2075                         return;
2076                 } else {
2077                         adapter->copper_tries = 0;
2078                         if ((connsw & E1000_CONNSW_PHYSD) &&
2079                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
2080                                 swap_now = true;
2081                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
2082                                 wr32(E1000_CONNSW, connsw);
2083                         }
2084                 }
2085         }
2086
2087         if (!swap_now)
2088                 return;
2089
2090         switch (hw->phy.media_type) {
2091         case e1000_media_type_copper:
2092                 netdev_info(adapter->netdev,
2093                         "MAS: changing media to fiber/serdes\n");
2094                 ctrl_ext |=
2095                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2096                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2097                 adapter->copper_tries = 0;
2098                 break;
2099         case e1000_media_type_internal_serdes:
2100         case e1000_media_type_fiber:
2101                 netdev_info(adapter->netdev,
2102                         "MAS: changing media to copper\n");
2103                 ctrl_ext &=
2104                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
2105                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
2106                 break;
2107         default:
2108                 /* shouldn't get here during regular operation */
2109                 netdev_err(adapter->netdev,
2110                         "AMS: Invalid media type found, returning\n");
2111                 break;
2112         }
2113         wr32(E1000_CTRL_EXT, ctrl_ext);
2114 }
2115
2116 /**
2117  *  igb_up - Open the interface and prepare it to handle traffic
2118  *  @adapter: board private structure
2119  **/
2120 int igb_up(struct igb_adapter *adapter)
2121 {
2122         struct e1000_hw *hw = &adapter->hw;
2123         int i;
2124
2125         /* hardware has been reset, we need to reload some things */
2126         igb_configure(adapter);
2127
2128         clear_bit(__IGB_DOWN, &adapter->state);
2129
2130         for (i = 0; i < adapter->num_q_vectors; i++)
2131                 napi_enable(&(adapter->q_vector[i]->napi));
2132
2133         if (adapter->flags & IGB_FLAG_HAS_MSIX)
2134                 igb_configure_msix(adapter);
2135         else
2136                 igb_assign_vector(adapter->q_vector[0], 0);
2137
2138         /* Clear any pending interrupts. */
2139         rd32(E1000_TSICR);
2140         rd32(E1000_ICR);
2141         igb_irq_enable(adapter);
2142
2143         /* notify VFs that reset has been completed */
2144         if (adapter->vfs_allocated_count) {
2145                 u32 reg_data = rd32(E1000_CTRL_EXT);
2146
2147                 reg_data |= E1000_CTRL_EXT_PFRSTD;
2148                 wr32(E1000_CTRL_EXT, reg_data);
2149         }
2150
2151         netif_tx_start_all_queues(adapter->netdev);
2152
2153         /* start the watchdog. */
2154         hw->mac.get_link_status = 1;
2155         schedule_work(&adapter->watchdog_task);
2156
2157         if ((adapter->flags & IGB_FLAG_EEE) &&
2158             (!hw->dev_spec._82575.eee_disable))
2159                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
2160
2161         return 0;
2162 }
2163
2164 void igb_down(struct igb_adapter *adapter)
2165 {
2166         struct net_device *netdev = adapter->netdev;
2167         struct e1000_hw *hw = &adapter->hw;
2168         u32 tctl, rctl;
2169         int i;
2170
2171         /* signal that we're down so the interrupt handler does not
2172          * reschedule our watchdog timer
2173          */
2174         set_bit(__IGB_DOWN, &adapter->state);
2175
2176         /* disable receives in the hardware */
2177         rctl = rd32(E1000_RCTL);
2178         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
2179         /* flush and sleep below */
2180
2181         igb_nfc_filter_exit(adapter);
2182
2183         netif_carrier_off(netdev);
2184         netif_tx_stop_all_queues(netdev);
2185
2186         /* disable transmits in the hardware */
2187         tctl = rd32(E1000_TCTL);
2188         tctl &= ~E1000_TCTL_EN;
2189         wr32(E1000_TCTL, tctl);
2190         /* flush both disables and wait for them to finish */
2191         wrfl();
2192         usleep_range(10000, 11000);
2193
2194         igb_irq_disable(adapter);
2195
2196         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
2197
2198         for (i = 0; i < adapter->num_q_vectors; i++) {
2199                 if (adapter->q_vector[i]) {
2200                         napi_synchronize(&adapter->q_vector[i]->napi);
2201                         napi_disable(&adapter->q_vector[i]->napi);
2202                 }
2203         }
2204
2205         del_timer_sync(&adapter->watchdog_timer);
2206         del_timer_sync(&adapter->phy_info_timer);
2207
2208         /* record the stats before reset*/
2209         spin_lock(&adapter->stats64_lock);
2210         igb_update_stats(adapter);
2211         spin_unlock(&adapter->stats64_lock);
2212
2213         adapter->link_speed = 0;
2214         adapter->link_duplex = 0;
2215
2216         if (!pci_channel_offline(adapter->pdev))
2217                 igb_reset(adapter);
2218
2219         /* clear VLAN promisc flag so VFTA will be updated if necessary */
2220         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
2221
2222         igb_clean_all_tx_rings(adapter);
2223         igb_clean_all_rx_rings(adapter);
2224 #ifdef CONFIG_IGB_DCA
2225
2226         /* since we reset the hardware DCA settings were cleared */
2227         igb_setup_dca(adapter);
2228 #endif
2229 }
2230
2231 void igb_reinit_locked(struct igb_adapter *adapter)
2232 {
2233         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
2234                 usleep_range(1000, 2000);
2235         igb_down(adapter);
2236         igb_up(adapter);
2237         clear_bit(__IGB_RESETTING, &adapter->state);
2238 }
2239
2240 /** igb_enable_mas - Media Autosense re-enable after swap
2241  *
2242  * @adapter: adapter struct
2243  **/
2244 static void igb_enable_mas(struct igb_adapter *adapter)
2245 {
2246         struct e1000_hw *hw = &adapter->hw;
2247         u32 connsw = rd32(E1000_CONNSW);
2248
2249         /* configure for SerDes media detect */
2250         if ((hw->phy.media_type == e1000_media_type_copper) &&
2251             (!(connsw & E1000_CONNSW_SERDESD))) {
2252                 connsw |= E1000_CONNSW_ENRGSRC;
2253                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
2254                 wr32(E1000_CONNSW, connsw);
2255                 wrfl();
2256         }
2257 }
2258
2259 #ifdef CONFIG_IGB_HWMON
2260 /**
2261  *  igb_set_i2c_bb - Init I2C interface
2262  *  @hw: pointer to hardware structure
2263  **/
2264 static void igb_set_i2c_bb(struct e1000_hw *hw)
2265 {
2266         u32 ctrl_ext;
2267         s32 i2cctl;
2268
2269         ctrl_ext = rd32(E1000_CTRL_EXT);
2270         ctrl_ext |= E1000_CTRL_I2C_ENA;
2271         wr32(E1000_CTRL_EXT, ctrl_ext);
2272         wrfl();
2273
2274         i2cctl = rd32(E1000_I2CPARAMS);
2275         i2cctl |= E1000_I2CBB_EN
2276                 | E1000_I2C_CLK_OE_N
2277                 | E1000_I2C_DATA_OE_N;
2278         wr32(E1000_I2CPARAMS, i2cctl);
2279         wrfl();
2280 }
2281 #endif
2282
2283 void igb_reset(struct igb_adapter *adapter)
2284 {
2285         struct pci_dev *pdev = adapter->pdev;
2286         struct e1000_hw *hw = &adapter->hw;
2287         struct e1000_mac_info *mac = &hw->mac;
2288         struct e1000_fc_info *fc = &hw->fc;
2289         u32 pba, hwm;
2290
2291         /* Repartition Pba for greater than 9k mtu
2292          * To take effect CTRL.RST is required.
2293          */
2294         switch (mac->type) {
2295         case e1000_i350:
2296         case e1000_i354:
2297         case e1000_82580:
2298                 pba = rd32(E1000_RXPBS);
2299                 pba = igb_rxpbs_adjust_82580(pba);
2300                 break;
2301         case e1000_82576:
2302                 pba = rd32(E1000_RXPBS);
2303                 pba &= E1000_RXPBS_SIZE_MASK_82576;
2304                 break;
2305         case e1000_82575:
2306         case e1000_i210:
2307         case e1000_i211:
2308         default:
2309                 pba = E1000_PBA_34K;
2310                 break;
2311         }
2312
2313         if (mac->type == e1000_82575) {
2314                 u32 min_rx_space, min_tx_space, needed_tx_space;
2315
2316                 /* write Rx PBA so that hardware can report correct Tx PBA */
2317                 wr32(E1000_PBA, pba);
2318
2319                 /* To maintain wire speed transmits, the Tx FIFO should be
2320                  * large enough to accommodate two full transmit packets,
2321                  * rounded up to the next 1KB and expressed in KB.  Likewise,
2322                  * the Rx FIFO should be large enough to accommodate at least
2323                  * one full receive packet and is similarly rounded up and
2324                  * expressed in KB.
2325                  */
2326                 min_rx_space = DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE, 1024);
2327
2328                 /* The Tx FIFO also stores 16 bytes of information about the Tx
2329                  * but don't include Ethernet FCS because hardware appends it.
2330                  * We only need to round down to the nearest 512 byte block
2331                  * count since the value we care about is 2 frames, not 1.
2332                  */
2333                 min_tx_space = adapter->max_frame_size;
2334                 min_tx_space += sizeof(union e1000_adv_tx_desc) - ETH_FCS_LEN;
2335                 min_tx_space = DIV_ROUND_UP(min_tx_space, 512);
2336
2337                 /* upper 16 bits has Tx packet buffer allocation size in KB */
2338                 needed_tx_space = min_tx_space - (rd32(E1000_PBA) >> 16);
2339
2340                 /* If current Tx allocation is less than the min Tx FIFO size,
2341                  * and the min Tx FIFO size is less than the current Rx FIFO
2342                  * allocation, take space away from current Rx allocation.
2343                  */
2344                 if (needed_tx_space < pba) {
2345                         pba -= needed_tx_space;
2346
2347                         /* if short on Rx space, Rx wins and must trump Tx
2348                          * adjustment
2349                          */
2350                         if (pba < min_rx_space)
2351                                 pba = min_rx_space;
2352                 }
2353
2354                 /* adjust PBA for jumbo frames */
2355                 wr32(E1000_PBA, pba);
2356         }
2357
2358         /* flow control settings
2359          * The high water mark must be low enough to fit one full frame
2360          * after transmitting the pause frame.  As such we must have enough
2361          * space to allow for us to complete our current transmit and then
2362          * receive the frame that is in progress from the link partner.
2363          * Set it to:
2364          * - the full Rx FIFO size minus one full Tx plus one full Rx frame
2365          */
2366         hwm = (pba << 10) - (adapter->max_frame_size + MAX_JUMBO_FRAME_SIZE);
2367
2368         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
2369         fc->low_water = fc->high_water - 16;
2370         fc->pause_time = 0xFFFF;
2371         fc->send_xon = 1;
2372         fc->current_mode = fc->requested_mode;
2373
2374         /* disable receive for all VFs and wait one second */
2375         if (adapter->vfs_allocated_count) {
2376                 int i;
2377
2378                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
2379                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
2380
2381                 /* ping all the active vfs to let them know we are going down */
2382                 igb_ping_all_vfs(adapter);
2383
2384                 /* disable transmits and receives */
2385                 wr32(E1000_VFRE, 0);
2386                 wr32(E1000_VFTE, 0);
2387         }
2388
2389         /* Allow time for pending master requests to run */
2390         hw->mac.ops.reset_hw(hw);
2391         wr32(E1000_WUC, 0);
2392
2393         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2394                 /* need to resetup here after media swap */
2395                 adapter->ei.get_invariants(hw);
2396                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2397         }
2398         if ((mac->type == e1000_82575 || mac->type == e1000_i350) &&
2399             (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
2400                 igb_enable_mas(adapter);
2401         }
2402         if (hw->mac.ops.init_hw(hw))
2403                 dev_err(&pdev->dev, "Hardware Error\n");
2404
2405         /* RAR registers were cleared during init_hw, clear mac table */
2406         igb_flush_mac_table(adapter);
2407         __dev_uc_unsync(adapter->netdev, NULL);
2408
2409         /* Recover default RAR entry */
2410         igb_set_default_mac_filter(adapter);
2411
2412         /* Flow control settings reset on hardware reset, so guarantee flow
2413          * control is off when forcing speed.
2414          */
2415         if (!hw->mac.autoneg)
2416                 igb_force_mac_fc(hw);
2417
2418         igb_init_dmac(adapter, pba);
2419 #ifdef CONFIG_IGB_HWMON
2420         /* Re-initialize the thermal sensor on i350 devices. */
2421         if (!test_bit(__IGB_DOWN, &adapter->state)) {
2422                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2423                         /* If present, re-initialize the external thermal sensor
2424                          * interface.
2425                          */
2426                         if (adapter->ets)
2427                                 igb_set_i2c_bb(hw);
2428                         mac->ops.init_thermal_sensor_thresh(hw);
2429                 }
2430         }
2431 #endif
2432         /* Re-establish EEE setting */
2433         if (hw->phy.media_type == e1000_media_type_copper) {
2434                 switch (mac->type) {
2435                 case e1000_i350:
2436                 case e1000_i210:
2437                 case e1000_i211:
2438                         igb_set_eee_i350(hw, true, true);
2439                         break;
2440                 case e1000_i354:
2441                         igb_set_eee_i354(hw, true, true);
2442                         break;
2443                 default:
2444                         break;
2445                 }
2446         }
2447         if (!netif_running(adapter->netdev))
2448                 igb_power_down_link(adapter);
2449
2450         igb_update_mng_vlan(adapter);
2451
2452         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2453         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2454
2455         /* Re-enable PTP, where applicable. */
2456         if (adapter->ptp_flags & IGB_PTP_ENABLED)
2457                 igb_ptp_reset(adapter);
2458
2459         igb_get_phy_info(hw);
2460 }
2461
2462 static netdev_features_t igb_fix_features(struct net_device *netdev,
2463         netdev_features_t features)
2464 {
2465         /* Since there is no support for separate Rx/Tx vlan accel
2466          * enable/disable make sure Tx flag is always in same state as Rx.
2467          */
2468         if (features & NETIF_F_HW_VLAN_CTAG_RX)
2469                 features |= NETIF_F_HW_VLAN_CTAG_TX;
2470         else
2471                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2472
2473         return features;
2474 }
2475
2476 static int igb_set_features(struct net_device *netdev,
2477         netdev_features_t features)
2478 {
2479         netdev_features_t changed = netdev->features ^ features;
2480         struct igb_adapter *adapter = netdev_priv(netdev);
2481
2482         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2483                 igb_vlan_mode(netdev, features);
2484
2485         if (!(changed & (NETIF_F_RXALL | NETIF_F_NTUPLE)))
2486                 return 0;
2487
2488         if (!(features & NETIF_F_NTUPLE)) {
2489                 struct hlist_node *node2;
2490                 struct igb_nfc_filter *rule;
2491
2492                 spin_lock(&adapter->nfc_lock);
2493                 hlist_for_each_entry_safe(rule, node2,
2494                                           &adapter->nfc_filter_list, nfc_node) {
2495                         igb_erase_filter(adapter, rule);
2496                         hlist_del(&rule->nfc_node);
2497                         kfree(rule);
2498                 }
2499                 spin_unlock(&adapter->nfc_lock);
2500                 adapter->nfc_filter_count = 0;
2501         }
2502
2503         netdev->features = features;
2504
2505         if (netif_running(netdev))
2506                 igb_reinit_locked(adapter);
2507         else
2508                 igb_reset(adapter);
2509
2510         return 1;
2511 }
2512
2513 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2514                            struct net_device *dev,
2515                            const unsigned char *addr, u16 vid,
2516                            u16 flags,
2517                            struct netlink_ext_ack *extack)
2518 {
2519         /* guarantee we can provide a unique filter for the unicast address */
2520         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2521                 struct igb_adapter *adapter = netdev_priv(dev);
2522                 int vfn = adapter->vfs_allocated_count;
2523
2524                 if (netdev_uc_count(dev) >= igb_available_rars(adapter, vfn))
2525                         return -ENOMEM;
2526         }
2527
2528         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
2529 }
2530
2531 #define IGB_MAX_MAC_HDR_LEN     127
2532 #define IGB_MAX_NETWORK_HDR_LEN 511
2533
2534 static netdev_features_t
2535 igb_features_check(struct sk_buff *skb, struct net_device *dev,
2536                    netdev_features_t features)
2537 {
2538         unsigned int network_hdr_len, mac_hdr_len;
2539
2540         /* Make certain the headers can be described by a context descriptor */
2541         mac_hdr_len = skb_network_header(skb) - skb->data;
2542         if (unlikely(mac_hdr_len > IGB_MAX_MAC_HDR_LEN))
2543                 return features & ~(NETIF_F_HW_CSUM |
2544                                     NETIF_F_SCTP_CRC |
2545                                     NETIF_F_GSO_UDP_L4 |
2546                                     NETIF_F_HW_VLAN_CTAG_TX |
2547                                     NETIF_F_TSO |
2548                                     NETIF_F_TSO6);
2549
2550         network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
2551         if (unlikely(network_hdr_len >  IGB_MAX_NETWORK_HDR_LEN))
2552                 return features & ~(NETIF_F_HW_CSUM |
2553                                     NETIF_F_SCTP_CRC |
2554                                     NETIF_F_GSO_UDP_L4 |
2555                                     NETIF_F_TSO |
2556                                     NETIF_F_TSO6);
2557
2558         /* We can only support IPV4 TSO in tunnels if we can mangle the
2559          * inner IP ID field, so strip TSO if MANGLEID is not supported.
2560          */
2561         if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
2562                 features &= ~NETIF_F_TSO;
2563
2564         return features;
2565 }
2566
2567 static void igb_offload_apply(struct igb_adapter *adapter, s32 queue)
2568 {
2569         if (!is_fqtss_enabled(adapter)) {
2570                 enable_fqtss(adapter, true);
2571                 return;
2572         }
2573
2574         igb_config_tx_modes(adapter, queue);
2575
2576         if (!is_any_cbs_enabled(adapter) && !is_any_txtime_enabled(adapter))
2577                 enable_fqtss(adapter, false);
2578 }
2579
2580 static int igb_offload_cbs(struct igb_adapter *adapter,
2581                            struct tc_cbs_qopt_offload *qopt)
2582 {
2583         struct e1000_hw *hw = &adapter->hw;
2584         int err;
2585
2586         /* CBS offloading is only supported by i210 controller. */
2587         if (hw->mac.type != e1000_i210)
2588                 return -EOPNOTSUPP;
2589
2590         /* CBS offloading is only supported by queue 0 and queue 1. */
2591         if (qopt->queue < 0 || qopt->queue > 1)
2592                 return -EINVAL;
2593
2594         err = igb_save_cbs_params(adapter, qopt->queue, qopt->enable,
2595                                   qopt->idleslope, qopt->sendslope,
2596                                   qopt->hicredit, qopt->locredit);
2597         if (err)
2598                 return err;
2599
2600         igb_offload_apply(adapter, qopt->queue);
2601
2602         return 0;
2603 }
2604
2605 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2606 #define VLAN_PRIO_FULL_MASK (0x07)
2607
2608 static int igb_parse_cls_flower(struct igb_adapter *adapter,
2609                                 struct flow_cls_offload *f,
2610                                 int traffic_class,
2611                                 struct igb_nfc_filter *input)
2612 {
2613         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
2614         struct flow_dissector *dissector = rule->match.dissector;
2615         struct netlink_ext_ack *extack = f->common.extack;
2616
2617         if (dissector->used_keys &
2618             ~(BIT(FLOW_DISSECTOR_KEY_BASIC) |
2619               BIT(FLOW_DISSECTOR_KEY_CONTROL) |
2620               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
2621               BIT(FLOW_DISSECTOR_KEY_VLAN))) {
2622                 NL_SET_ERR_MSG_MOD(extack,
2623                                    "Unsupported key used, only BASIC, CONTROL, ETH_ADDRS and VLAN are supported");
2624                 return -EOPNOTSUPP;
2625         }
2626
2627         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
2628                 struct flow_match_eth_addrs match;
2629
2630                 flow_rule_match_eth_addrs(rule, &match);
2631                 if (!is_zero_ether_addr(match.mask->dst)) {
2632                         if (!is_broadcast_ether_addr(match.mask->dst)) {
2633                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for destination MAC address");
2634                                 return -EINVAL;
2635                         }
2636
2637                         input->filter.match_flags |=
2638                                 IGB_FILTER_FLAG_DST_MAC_ADDR;
2639                         ether_addr_copy(input->filter.dst_addr, match.key->dst);
2640                 }
2641
2642                 if (!is_zero_ether_addr(match.mask->src)) {
2643                         if (!is_broadcast_ether_addr(match.mask->src)) {
2644                                 NL_SET_ERR_MSG_MOD(extack, "Only full masks are supported for source MAC address");
2645                                 return -EINVAL;
2646                         }
2647
2648                         input->filter.match_flags |=
2649                                 IGB_FILTER_FLAG_SRC_MAC_ADDR;
2650                         ether_addr_copy(input->filter.src_addr, match.key->src);
2651                 }
2652         }
2653
2654         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
2655                 struct flow_match_basic match;
2656
2657                 flow_rule_match_basic(rule, &match);
2658                 if (match.mask->n_proto) {
2659                         if (match.mask->n_proto != ETHER_TYPE_FULL_MASK) {
2660                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for EtherType filter");
2661                                 return -EINVAL;
2662                         }
2663
2664                         input->filter.match_flags |= IGB_FILTER_FLAG_ETHER_TYPE;
2665                         input->filter.etype = match.key->n_proto;
2666                 }
2667         }
2668
2669         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
2670                 struct flow_match_vlan match;
2671
2672                 flow_rule_match_vlan(rule, &match);
2673                 if (match.mask->vlan_priority) {
2674                         if (match.mask->vlan_priority != VLAN_PRIO_FULL_MASK) {
2675                                 NL_SET_ERR_MSG_MOD(extack, "Only full mask is supported for VLAN priority");
2676                                 return -EINVAL;
2677                         }
2678
2679                         input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2680                         input->filter.vlan_tci =
2681                                 (__force __be16)match.key->vlan_priority;
2682                 }
2683         }
2684
2685         input->action = traffic_class;
2686         input->cookie = f->cookie;
2687
2688         return 0;
2689 }
2690
2691 static int igb_configure_clsflower(struct igb_adapter *adapter,
2692                                    struct flow_cls_offload *cls_flower)
2693 {
2694         struct netlink_ext_ack *extack = cls_flower->common.extack;
2695         struct igb_nfc_filter *filter, *f;
2696         int err, tc;
2697
2698         tc = tc_classid_to_hwtc(adapter->netdev, cls_flower->classid);
2699         if (tc < 0) {
2700                 NL_SET_ERR_MSG_MOD(extack, "Invalid traffic class");
2701                 return -EINVAL;
2702         }
2703
2704         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
2705         if (!filter)
2706                 return -ENOMEM;
2707
2708         err = igb_parse_cls_flower(adapter, cls_flower, tc, filter);
2709         if (err < 0)
2710                 goto err_parse;
2711
2712         spin_lock(&adapter->nfc_lock);
2713
2714         hlist_for_each_entry(f, &adapter->nfc_filter_list, nfc_node) {
2715                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2716                         err = -EEXIST;
2717                         NL_SET_ERR_MSG_MOD(extack,
2718                                            "This filter is already set in ethtool");
2719                         goto err_locked;
2720                 }
2721         }
2722
2723         hlist_for_each_entry(f, &adapter->cls_flower_list, nfc_node) {
2724                 if (!memcmp(&f->filter, &filter->filter, sizeof(f->filter))) {
2725                         err = -EEXIST;
2726                         NL_SET_ERR_MSG_MOD(extack,
2727                                            "This filter is already set in cls_flower");
2728                         goto err_locked;
2729                 }
2730         }
2731
2732         err = igb_add_filter(adapter, filter);
2733         if (err < 0) {
2734                 NL_SET_ERR_MSG_MOD(extack, "Could not add filter to the adapter");
2735                 goto err_locked;
2736         }
2737
2738         hlist_add_head(&filter->nfc_node, &adapter->cls_flower_list);
2739
2740         spin_unlock(&adapter->nfc_lock);
2741
2742         return 0;
2743
2744 err_locked:
2745         spin_unlock(&adapter->nfc_lock);
2746
2747 err_parse:
2748         kfree(filter);
2749
2750         return err;
2751 }
2752
2753 static int igb_delete_clsflower(struct igb_adapter *adapter,
2754                                 struct flow_cls_offload *cls_flower)
2755 {
2756         struct igb_nfc_filter *filter;
2757         int err;
2758
2759         spin_lock(&adapter->nfc_lock);
2760
2761         hlist_for_each_entry(filter, &adapter->cls_flower_list, nfc_node)
2762                 if (filter->cookie == cls_flower->cookie)
2763                         break;
2764
2765         if (!filter) {
2766                 err = -ENOENT;
2767                 goto out;
2768         }
2769
2770         err = igb_erase_filter(adapter, filter);
2771         if (err < 0)
2772                 goto out;
2773
2774         hlist_del(&filter->nfc_node);
2775         kfree(filter);
2776
2777 out:
2778         spin_unlock(&adapter->nfc_lock);
2779
2780         return err;
2781 }
2782
2783 static int igb_setup_tc_cls_flower(struct igb_adapter *adapter,
2784                                    struct flow_cls_offload *cls_flower)
2785 {
2786         switch (cls_flower->command) {
2787         case FLOW_CLS_REPLACE:
2788                 return igb_configure_clsflower(adapter, cls_flower);
2789         case FLOW_CLS_DESTROY:
2790                 return igb_delete_clsflower(adapter, cls_flower);
2791         case FLOW_CLS_STATS:
2792                 return -EOPNOTSUPP;
2793         default:
2794                 return -EOPNOTSUPP;
2795         }
2796 }
2797
2798 static int igb_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
2799                                  void *cb_priv)
2800 {
2801         struct igb_adapter *adapter = cb_priv;
2802
2803         if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
2804                 return -EOPNOTSUPP;
2805
2806         switch (type) {
2807         case TC_SETUP_CLSFLOWER:
2808                 return igb_setup_tc_cls_flower(adapter, type_data);
2809
2810         default:
2811                 return -EOPNOTSUPP;
2812         }
2813 }
2814
2815 static int igb_offload_txtime(struct igb_adapter *adapter,
2816                               struct tc_etf_qopt_offload *qopt)
2817 {
2818         struct e1000_hw *hw = &adapter->hw;
2819         int err;
2820
2821         /* Launchtime offloading is only supported by i210 controller. */
2822         if (hw->mac.type != e1000_i210)
2823                 return -EOPNOTSUPP;
2824
2825         /* Launchtime offloading is only supported by queues 0 and 1. */
2826         if (qopt->queue < 0 || qopt->queue > 1)
2827                 return -EINVAL;
2828
2829         err = igb_save_txtime_params(adapter, qopt->queue, qopt->enable);
2830         if (err)
2831                 return err;
2832
2833         igb_offload_apply(adapter, qopt->queue);
2834
2835         return 0;
2836 }
2837
2838 static int igb_tc_query_caps(struct igb_adapter *adapter,
2839                              struct tc_query_caps_base *base)
2840 {
2841         switch (base->type) {
2842         case TC_SETUP_QDISC_TAPRIO: {
2843                 struct tc_taprio_caps *caps = base->caps;
2844
2845                 caps->broken_mqprio = true;
2846
2847                 return 0;
2848         }
2849         default:
2850                 return -EOPNOTSUPP;
2851         }
2852 }
2853
2854 static LIST_HEAD(igb_block_cb_list);
2855
2856 static int igb_setup_tc(struct net_device *dev, enum tc_setup_type type,
2857                         void *type_data)
2858 {
2859         struct igb_adapter *adapter = netdev_priv(dev);
2860
2861         switch (type) {
2862         case TC_QUERY_CAPS:
2863                 return igb_tc_query_caps(adapter, type_data);
2864         case TC_SETUP_QDISC_CBS:
2865                 return igb_offload_cbs(adapter, type_data);
2866         case TC_SETUP_BLOCK:
2867                 return flow_block_cb_setup_simple(type_data,
2868                                                   &igb_block_cb_list,
2869                                                   igb_setup_tc_block_cb,
2870                                                   adapter, adapter, true);
2871
2872         case TC_SETUP_QDISC_ETF:
2873                 return igb_offload_txtime(adapter, type_data);
2874
2875         default:
2876                 return -EOPNOTSUPP;
2877         }
2878 }
2879
2880 static int igb_xdp_setup(struct net_device *dev, struct netdev_bpf *bpf)
2881 {
2882         int i, frame_size = dev->mtu + IGB_ETH_PKT_HDR_PAD;
2883         struct igb_adapter *adapter = netdev_priv(dev);
2884         struct bpf_prog *prog = bpf->prog, *old_prog;
2885         bool running = netif_running(dev);
2886         bool need_reset;
2887
2888         /* verify igb ring attributes are sufficient for XDP */
2889         for (i = 0; i < adapter->num_rx_queues; i++) {
2890                 struct igb_ring *ring = adapter->rx_ring[i];
2891
2892                 if (frame_size > igb_rx_bufsz(ring)) {
2893                         NL_SET_ERR_MSG_MOD(bpf->extack,
2894                                            "The RX buffer size is too small for the frame size");
2895                         netdev_warn(dev, "XDP RX buffer size %d is too small for the frame size %d\n",
2896                                     igb_rx_bufsz(ring), frame_size);
2897                         return -EINVAL;
2898                 }
2899         }
2900
2901         old_prog = xchg(&adapter->xdp_prog, prog);
2902         need_reset = (!!prog != !!old_prog);
2903
2904         /* device is up and bpf is added/removed, must setup the RX queues */
2905         if (need_reset && running) {
2906                 igb_close(dev);
2907         } else {
2908                 for (i = 0; i < adapter->num_rx_queues; i++)
2909                         (void)xchg(&adapter->rx_ring[i]->xdp_prog,
2910                             adapter->xdp_prog);
2911         }
2912
2913         if (old_prog)
2914                 bpf_prog_put(old_prog);
2915
2916         /* bpf is just replaced, RXQ and MTU are already setup */
2917         if (!need_reset) {
2918                 return 0;
2919         } else {
2920                 if (prog)
2921                         xdp_features_set_redirect_target(dev, true);
2922                 else
2923                         xdp_features_clear_redirect_target(dev);
2924         }
2925
2926         if (running)
2927                 igb_open(dev);
2928
2929         return 0;
2930 }
2931
2932 static int igb_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2933 {
2934         switch (xdp->command) {
2935         case XDP_SETUP_PROG:
2936                 return igb_xdp_setup(dev, xdp);
2937         default:
2938                 return -EINVAL;
2939         }
2940 }
2941
2942 static void igb_xdp_ring_update_tail(struct igb_ring *ring)
2943 {
2944         /* Force memory writes to complete before letting h/w know there
2945          * are new descriptors to fetch.
2946          */
2947         wmb();
2948         writel(ring->next_to_use, ring->tail);
2949 }
2950
2951 static struct igb_ring *igb_xdp_tx_queue_mapping(struct igb_adapter *adapter)
2952 {
2953         unsigned int r_idx = smp_processor_id();
2954
2955         if (r_idx >= adapter->num_tx_queues)
2956                 r_idx = r_idx % adapter->num_tx_queues;
2957
2958         return adapter->tx_ring[r_idx];
2959 }
2960
2961 static int igb_xdp_xmit_back(struct igb_adapter *adapter, struct xdp_buff *xdp)
2962 {
2963         struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
2964         int cpu = smp_processor_id();
2965         struct igb_ring *tx_ring;
2966         struct netdev_queue *nq;
2967         u32 ret;
2968
2969         if (unlikely(!xdpf))
2970                 return IGB_XDP_CONSUMED;
2971
2972         /* During program transitions its possible adapter->xdp_prog is assigned
2973          * but ring has not been configured yet. In this case simply abort xmit.
2974          */
2975         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
2976         if (unlikely(!tx_ring))
2977                 return IGB_XDP_CONSUMED;
2978
2979         nq = txring_txq(tx_ring);
2980         __netif_tx_lock(nq, cpu);
2981         /* Avoid transmit queue timeout since we share it with the slow path */
2982         txq_trans_cond_update(nq);
2983         ret = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
2984         __netif_tx_unlock(nq);
2985
2986         return ret;
2987 }
2988
2989 static int igb_xdp_xmit(struct net_device *dev, int n,
2990                         struct xdp_frame **frames, u32 flags)
2991 {
2992         struct igb_adapter *adapter = netdev_priv(dev);
2993         int cpu = smp_processor_id();
2994         struct igb_ring *tx_ring;
2995         struct netdev_queue *nq;
2996         int nxmit = 0;
2997         int i;
2998
2999         if (unlikely(test_bit(__IGB_DOWN, &adapter->state)))
3000                 return -ENETDOWN;
3001
3002         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
3003                 return -EINVAL;
3004
3005         /* During program transitions its possible adapter->xdp_prog is assigned
3006          * but ring has not been configured yet. In this case simply abort xmit.
3007          */
3008         tx_ring = adapter->xdp_prog ? igb_xdp_tx_queue_mapping(adapter) : NULL;
3009         if (unlikely(!tx_ring))
3010                 return -ENXIO;
3011
3012         nq = txring_txq(tx_ring);
3013         __netif_tx_lock(nq, cpu);
3014
3015         /* Avoid transmit queue timeout since we share it with the slow path */
3016         txq_trans_cond_update(nq);
3017
3018         for (i = 0; i < n; i++) {
3019                 struct xdp_frame *xdpf = frames[i];
3020                 int err;
3021
3022                 err = igb_xmit_xdp_ring(adapter, tx_ring, xdpf);
3023                 if (err != IGB_XDP_TX)
3024                         break;
3025                 nxmit++;
3026         }
3027
3028         __netif_tx_unlock(nq);
3029
3030         if (unlikely(flags & XDP_XMIT_FLUSH))
3031                 igb_xdp_ring_update_tail(tx_ring);
3032
3033         return nxmit;
3034 }
3035
3036 static const struct net_device_ops igb_netdev_ops = {
3037         .ndo_open               = igb_open,
3038         .ndo_stop               = igb_close,
3039         .ndo_start_xmit         = igb_xmit_frame,
3040         .ndo_get_stats64        = igb_get_stats64,
3041         .ndo_set_rx_mode        = igb_set_rx_mode,
3042         .ndo_set_mac_address    = igb_set_mac,
3043         .ndo_change_mtu         = igb_change_mtu,
3044         .ndo_eth_ioctl          = igb_ioctl,
3045         .ndo_tx_timeout         = igb_tx_timeout,
3046         .ndo_validate_addr      = eth_validate_addr,
3047         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
3048         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
3049         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
3050         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
3051         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
3052         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
3053         .ndo_set_vf_trust       = igb_ndo_set_vf_trust,
3054         .ndo_get_vf_config      = igb_ndo_get_vf_config,
3055         .ndo_fix_features       = igb_fix_features,
3056         .ndo_set_features       = igb_set_features,
3057         .ndo_fdb_add            = igb_ndo_fdb_add,
3058         .ndo_features_check     = igb_features_check,
3059         .ndo_setup_tc           = igb_setup_tc,
3060         .ndo_bpf                = igb_xdp,
3061         .ndo_xdp_xmit           = igb_xdp_xmit,
3062 };
3063
3064 /**
3065  * igb_set_fw_version - Configure version string for ethtool
3066  * @adapter: adapter struct
3067  **/
3068 void igb_set_fw_version(struct igb_adapter *adapter)
3069 {
3070         struct e1000_hw *hw = &adapter->hw;
3071         struct e1000_fw_version fw;
3072
3073         igb_get_fw_version(hw, &fw);
3074
3075         switch (hw->mac.type) {
3076         case e1000_i210:
3077         case e1000_i211:
3078                 if (!(igb_get_flash_presence_i210(hw))) {
3079                         snprintf(adapter->fw_version,
3080                                  sizeof(adapter->fw_version),
3081                                  "%2d.%2d-%d",
3082                                  fw.invm_major, fw.invm_minor,
3083                                  fw.invm_img_type);
3084                         break;
3085                 }
3086                 fallthrough;
3087         default:
3088                 /* if option is rom valid, display its version too */
3089                 if (fw.or_valid) {
3090                         snprintf(adapter->fw_version,
3091                                  sizeof(adapter->fw_version),
3092                                  "%d.%d, 0x%08x, %d.%d.%d",
3093                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
3094                                  fw.or_major, fw.or_build, fw.or_patch);
3095                 /* no option rom */
3096                 } else if (fw.etrack_id != 0X0000) {
3097                         snprintf(adapter->fw_version,
3098                             sizeof(adapter->fw_version),
3099                             "%d.%d, 0x%08x",
3100                             fw.eep_major, fw.eep_minor, fw.etrack_id);
3101                 } else {
3102                 snprintf(adapter->fw_version,
3103                     sizeof(adapter->fw_version),
3104                     "%d.%d.%d",
3105                     fw.eep_major, fw.eep_minor, fw.eep_build);
3106                 }
3107                 break;
3108         }
3109 }
3110
3111 /**
3112  * igb_init_mas - init Media Autosense feature if enabled in the NVM
3113  *
3114  * @adapter: adapter struct
3115  **/
3116 static void igb_init_mas(struct igb_adapter *adapter)
3117 {
3118         struct e1000_hw *hw = &adapter->hw;
3119         u16 eeprom_data;
3120
3121         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
3122         switch (hw->bus.func) {
3123         case E1000_FUNC_0:
3124                 if (eeprom_data & IGB_MAS_ENABLE_0) {
3125                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3126                         netdev_info(adapter->netdev,
3127                                 "MAS: Enabling Media Autosense for port %d\n",
3128                                 hw->bus.func);
3129                 }
3130                 break;
3131         case E1000_FUNC_1:
3132                 if (eeprom_data & IGB_MAS_ENABLE_1) {
3133                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3134                         netdev_info(adapter->netdev,
3135                                 "MAS: Enabling Media Autosense for port %d\n",
3136                                 hw->bus.func);
3137                 }
3138                 break;
3139         case E1000_FUNC_2:
3140                 if (eeprom_data & IGB_MAS_ENABLE_2) {
3141                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3142                         netdev_info(adapter->netdev,
3143                                 "MAS: Enabling Media Autosense for port %d\n",
3144                                 hw->bus.func);
3145                 }
3146                 break;
3147         case E1000_FUNC_3:
3148                 if (eeprom_data & IGB_MAS_ENABLE_3) {
3149                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
3150                         netdev_info(adapter->netdev,
3151                                 "MAS: Enabling Media Autosense for port %d\n",
3152                                 hw->bus.func);
3153                 }
3154                 break;
3155         default:
3156                 /* Shouldn't get here */
3157                 netdev_err(adapter->netdev,
3158                         "MAS: Invalid port configuration, returning\n");
3159                 break;
3160         }
3161 }
3162
3163 /**
3164  *  igb_init_i2c - Init I2C interface
3165  *  @adapter: pointer to adapter structure
3166  **/
3167 static s32 igb_init_i2c(struct igb_adapter *adapter)
3168 {
3169         s32 status = 0;
3170
3171         /* I2C interface supported on i350 devices */
3172         if (adapter->hw.mac.type != e1000_i350)
3173                 return 0;
3174
3175         /* Initialize the i2c bus which is controlled by the registers.
3176          * This bus will use the i2c_algo_bit structure that implements
3177          * the protocol through toggling of the 4 bits in the register.
3178          */
3179         adapter->i2c_adap.owner = THIS_MODULE;
3180         adapter->i2c_algo = igb_i2c_algo;
3181         adapter->i2c_algo.data = adapter;
3182         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
3183         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
3184         strscpy(adapter->i2c_adap.name, "igb BB",
3185                 sizeof(adapter->i2c_adap.name));
3186         status = i2c_bit_add_bus(&adapter->i2c_adap);
3187         return status;
3188 }
3189
3190 /**
3191  *  igb_probe - Device Initialization Routine
3192  *  @pdev: PCI device information struct
3193  *  @ent: entry in igb_pci_tbl
3194  *
3195  *  Returns 0 on success, negative on failure
3196  *
3197  *  igb_probe initializes an adapter identified by a pci_dev structure.
3198  *  The OS initialization, configuring of the adapter private structure,
3199  *  and a hardware reset occur.
3200  **/
3201 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3202 {
3203         struct net_device *netdev;
3204         struct igb_adapter *adapter;
3205         struct e1000_hw *hw;
3206         u16 eeprom_data = 0;
3207         s32 ret_val;
3208         static int global_quad_port_a; /* global quad port a indication */
3209         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
3210         u8 part_str[E1000_PBANUM_LENGTH];
3211         int err;
3212
3213         /* Catch broken hardware that put the wrong VF device ID in
3214          * the PCIe SR-IOV capability.
3215          */
3216         if (pdev->is_virtfn) {
3217                 WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
3218                         pci_name(pdev), pdev->vendor, pdev->device);
3219                 return -EINVAL;
3220         }
3221
3222         err = pci_enable_device_mem(pdev);
3223         if (err)
3224                 return err;
3225
3226         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3227         if (err) {
3228                 dev_err(&pdev->dev,
3229                         "No usable DMA configuration, aborting\n");
3230                 goto err_dma;
3231         }
3232
3233         err = pci_request_mem_regions(pdev, igb_driver_name);
3234         if (err)
3235                 goto err_pci_reg;
3236
3237         pci_set_master(pdev);
3238         pci_save_state(pdev);
3239
3240         err = -ENOMEM;
3241         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
3242                                    IGB_MAX_TX_QUEUES);
3243         if (!netdev)
3244                 goto err_alloc_etherdev;
3245
3246         SET_NETDEV_DEV(netdev, &pdev->dev);
3247
3248         pci_set_drvdata(pdev, netdev);
3249         adapter = netdev_priv(netdev);
3250         adapter->netdev = netdev;
3251         adapter->pdev = pdev;
3252         hw = &adapter->hw;
3253         hw->back = adapter;
3254         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3255
3256         err = -EIO;
3257         adapter->io_addr = pci_iomap(pdev, 0, 0);
3258         if (!adapter->io_addr)
3259                 goto err_ioremap;
3260         /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
3261         hw->hw_addr = adapter->io_addr;
3262
3263         netdev->netdev_ops = &igb_netdev_ops;
3264         igb_set_ethtool_ops(netdev);
3265         netdev->watchdog_timeo = 5 * HZ;
3266
3267         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
3268
3269         netdev->mem_start = pci_resource_start(pdev, 0);
3270         netdev->mem_end = pci_resource_end(pdev, 0);
3271
3272         /* PCI config space info */
3273         hw->vendor_id = pdev->vendor;
3274         hw->device_id = pdev->device;
3275         hw->revision_id = pdev->revision;
3276         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3277         hw->subsystem_device_id = pdev->subsystem_device;
3278
3279         /* Copy the default MAC, PHY and NVM function pointers */
3280         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
3281         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
3282         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
3283         /* Initialize skew-specific constants */
3284         err = ei->get_invariants(hw);
3285         if (err)
3286                 goto err_sw_init;
3287
3288         /* setup the private structure */
3289         err = igb_sw_init(adapter);
3290         if (err)
3291                 goto err_sw_init;
3292
3293         igb_get_bus_info_pcie(hw);
3294
3295         hw->phy.autoneg_wait_to_complete = false;
3296
3297         /* Copper options */
3298         if (hw->phy.media_type == e1000_media_type_copper) {
3299                 hw->phy.mdix = AUTO_ALL_MODES;
3300                 hw->phy.disable_polarity_correction = false;
3301                 hw->phy.ms_type = e1000_ms_hw_default;
3302         }
3303
3304         if (igb_check_reset_block(hw))
3305                 dev_info(&pdev->dev,
3306                         "PHY reset is blocked due to SOL/IDER session.\n");
3307
3308         /* features is initialized to 0 in allocation, it might have bits
3309          * set by igb_sw_init so we should use an or instead of an
3310          * assignment.
3311          */
3312         netdev->features |= NETIF_F_SG |
3313                             NETIF_F_TSO |
3314                             NETIF_F_TSO6 |
3315                             NETIF_F_RXHASH |
3316                             NETIF_F_RXCSUM |
3317                             NETIF_F_HW_CSUM;
3318
3319         if (hw->mac.type >= e1000_82576)
3320                 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_GSO_UDP_L4;
3321
3322         if (hw->mac.type >= e1000_i350)
3323                 netdev->features |= NETIF_F_HW_TC;
3324
3325 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
3326                                   NETIF_F_GSO_GRE_CSUM | \
3327                                   NETIF_F_GSO_IPXIP4 | \
3328                                   NETIF_F_GSO_IPXIP6 | \
3329                                   NETIF_F_GSO_UDP_TUNNEL | \
3330                                   NETIF_F_GSO_UDP_TUNNEL_CSUM)
3331
3332         netdev->gso_partial_features = IGB_GSO_PARTIAL_FEATURES;
3333         netdev->features |= NETIF_F_GSO_PARTIAL | IGB_GSO_PARTIAL_FEATURES;
3334
3335         /* copy netdev features into list of user selectable features */
3336         netdev->hw_features |= netdev->features |
3337                                NETIF_F_HW_VLAN_CTAG_RX |
3338                                NETIF_F_HW_VLAN_CTAG_TX |
3339                                NETIF_F_RXALL;
3340
3341         if (hw->mac.type >= e1000_i350)
3342                 netdev->hw_features |= NETIF_F_NTUPLE;
3343
3344         netdev->features |= NETIF_F_HIGHDMA;
3345
3346         netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
3347         netdev->mpls_features |= NETIF_F_HW_CSUM;
3348         netdev->hw_enc_features |= netdev->vlan_features;
3349
3350         /* set this bit last since it cannot be part of vlan_features */
3351         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
3352                             NETIF_F_HW_VLAN_CTAG_RX |
3353                             NETIF_F_HW_VLAN_CTAG_TX;
3354
3355         netdev->priv_flags |= IFF_SUPP_NOFCS;
3356
3357         netdev->priv_flags |= IFF_UNICAST_FLT;
3358         netdev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT;
3359
3360         /* MTU range: 68 - 9216 */
3361         netdev->min_mtu = ETH_MIN_MTU;
3362         netdev->max_mtu = MAX_STD_JUMBO_FRAME_SIZE;
3363
3364         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
3365
3366         /* before reading the NVM, reset the controller to put the device in a
3367          * known good starting state
3368          */
3369         hw->mac.ops.reset_hw(hw);
3370
3371         /* make sure the NVM is good , i211/i210 parts can have special NVM
3372          * that doesn't contain a checksum
3373          */
3374         switch (hw->mac.type) {
3375         case e1000_i210:
3376         case e1000_i211:
3377                 if (igb_get_flash_presence_i210(hw)) {
3378                         if (hw->nvm.ops.validate(hw) < 0) {
3379                                 dev_err(&pdev->dev,
3380                                         "The NVM Checksum Is Not Valid\n");
3381                                 err = -EIO;
3382                                 goto err_eeprom;
3383                         }
3384                 }
3385                 break;
3386         default:
3387                 if (hw->nvm.ops.validate(hw) < 0) {
3388                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
3389                         err = -EIO;
3390                         goto err_eeprom;
3391                 }
3392                 break;
3393         }
3394
3395         if (eth_platform_get_mac_address(&pdev->dev, hw->mac.addr)) {
3396                 /* copy the MAC address out of the NVM */
3397                 if (hw->mac.ops.read_mac_addr(hw))
3398                         dev_err(&pdev->dev, "NVM Read Error\n");
3399         }
3400
3401         eth_hw_addr_set(netdev, hw->mac.addr);
3402
3403         if (!is_valid_ether_addr(netdev->dev_addr)) {
3404                 dev_err(&pdev->dev, "Invalid MAC Address\n");
3405                 err = -EIO;
3406                 goto err_eeprom;
3407         }
3408
3409         igb_set_default_mac_filter(adapter);
3410
3411         /* get firmware version for ethtool -i */
3412         igb_set_fw_version(adapter);
3413
3414         /* configure RXPBSIZE and TXPBSIZE */
3415         if (hw->mac.type == e1000_i210) {
3416                 wr32(E1000_RXPBS, I210_RXPBSIZE_DEFAULT);
3417                 wr32(E1000_TXPBS, I210_TXPBSIZE_DEFAULT);
3418         }
3419
3420         timer_setup(&adapter->watchdog_timer, igb_watchdog, 0);
3421         timer_setup(&adapter->phy_info_timer, igb_update_phy_info, 0);
3422
3423         INIT_WORK(&adapter->reset_task, igb_reset_task);
3424         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
3425
3426         /* Initialize link properties that are user-changeable */
3427         adapter->fc_autoneg = true;
3428         hw->mac.autoneg = true;
3429         hw->phy.autoneg_advertised = 0x2f;
3430
3431         hw->fc.requested_mode = e1000_fc_default;
3432         hw->fc.current_mode = e1000_fc_default;
3433
3434         igb_validate_mdi_setting(hw);
3435
3436         /* By default, support wake on port A */
3437         if (hw->bus.func == 0)
3438                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3439
3440         /* Check the NVM for wake support on non-port A ports */
3441         if (hw->mac.type >= e1000_82580)
3442                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
3443                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
3444                                  &eeprom_data);
3445         else if (hw->bus.func == 1)
3446                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
3447
3448         if (eeprom_data & IGB_EEPROM_APME)
3449                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3450
3451         /* now that we have the eeprom settings, apply the special cases where
3452          * the eeprom may be wrong or the board simply won't support wake on
3453          * lan on a particular port
3454          */
3455         switch (pdev->device) {
3456         case E1000_DEV_ID_82575GB_QUAD_COPPER:
3457                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3458                 break;
3459         case E1000_DEV_ID_82575EB_FIBER_SERDES:
3460         case E1000_DEV_ID_82576_FIBER:
3461         case E1000_DEV_ID_82576_SERDES:
3462                 /* Wake events only supported on port A for dual fiber
3463                  * regardless of eeprom setting
3464                  */
3465                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
3466                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3467                 break;
3468         case E1000_DEV_ID_82576_QUAD_COPPER:
3469         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
3470                 /* if quad port adapter, disable WoL on all but port A */
3471                 if (global_quad_port_a != 0)
3472                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3473                 else
3474                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
3475                 /* Reset for multiple quad port adapters */
3476                 if (++global_quad_port_a == 4)
3477                         global_quad_port_a = 0;
3478                 break;
3479         default:
3480                 /* If the device can't wake, don't set software support */
3481                 if (!device_can_wakeup(&adapter->pdev->dev))
3482                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
3483         }
3484
3485         /* initialize the wol settings based on the eeprom settings */
3486         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
3487                 adapter->wol |= E1000_WUFC_MAG;
3488
3489         /* Some vendors want WoL disabled by default, but still supported */
3490         if ((hw->mac.type == e1000_i350) &&
3491             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
3492                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3493                 adapter->wol = 0;
3494         }
3495
3496         /* Some vendors want the ability to Use the EEPROM setting as
3497          * enable/disable only, and not for capability
3498          */
3499         if (((hw->mac.type == e1000_i350) ||
3500              (hw->mac.type == e1000_i354)) &&
3501             (pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)) {
3502                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3503                 adapter->wol = 0;
3504         }
3505         if (hw->mac.type == e1000_i350) {
3506                 if (((pdev->subsystem_device == 0x5001) ||
3507                      (pdev->subsystem_device == 0x5002)) &&
3508                                 (hw->bus.func == 0)) {
3509                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3510                         adapter->wol = 0;
3511                 }
3512                 if (pdev->subsystem_device == 0x1F52)
3513                         adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
3514         }
3515
3516         device_set_wakeup_enable(&adapter->pdev->dev,
3517                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
3518
3519         /* reset the hardware with the new settings */
3520         igb_reset(adapter);
3521
3522         /* Init the I2C interface */
3523         err = igb_init_i2c(adapter);
3524         if (err) {
3525                 dev_err(&pdev->dev, "failed to init i2c interface\n");
3526                 goto err_eeprom;
3527         }
3528
3529         /* let the f/w know that the h/w is now under the control of the
3530          * driver.
3531          */
3532         igb_get_hw_control(adapter);
3533
3534         strcpy(netdev->name, "eth%d");
3535         err = register_netdev(netdev);
3536         if (err)
3537                 goto err_register;
3538
3539         /* carrier off reporting is important to ethtool even BEFORE open */
3540         netif_carrier_off(netdev);
3541
3542 #ifdef CONFIG_IGB_DCA
3543         if (dca_add_requester(&pdev->dev) == 0) {
3544                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3545                 dev_info(&pdev->dev, "DCA enabled\n");
3546                 igb_setup_dca(adapter);
3547         }
3548
3549 #endif
3550 #ifdef CONFIG_IGB_HWMON
3551         /* Initialize the thermal sensor on i350 devices. */
3552         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
3553                 u16 ets_word;
3554
3555                 /* Read the NVM to determine if this i350 device supports an
3556                  * external thermal sensor.
3557                  */
3558                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
3559                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
3560                         adapter->ets = true;
3561                 else
3562                         adapter->ets = false;
3563                 /* Only enable I2C bit banging if an external thermal
3564                  * sensor is supported.
3565                  */
3566                 if (adapter->ets)
3567                         igb_set_i2c_bb(hw);
3568                 hw->mac.ops.init_thermal_sensor_thresh(hw);
3569                 if (igb_sysfs_init(adapter))
3570                         dev_err(&pdev->dev,
3571                                 "failed to allocate sysfs resources\n");
3572         } else {
3573                 adapter->ets = false;
3574         }
3575 #endif
3576         /* Check if Media Autosense is enabled */
3577         adapter->ei = *ei;
3578         if (hw->dev_spec._82575.mas_capable)
3579                 igb_init_mas(adapter);
3580
3581         /* do hw tstamp init after resetting */
3582         igb_ptp_init(adapter);
3583
3584         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
3585         /* print bus type/speed/width info, not applicable to i354 */
3586         if (hw->mac.type != e1000_i354) {
3587                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
3588                          netdev->name,
3589                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
3590                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
3591                            "unknown"),
3592                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
3593                           "Width x4" :
3594                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
3595                           "Width x2" :
3596                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
3597                           "Width x1" : "unknown"), netdev->dev_addr);
3598         }
3599
3600         if ((hw->mac.type == e1000_82576 &&
3601              rd32(E1000_EECD) & E1000_EECD_PRES) ||
3602             (hw->mac.type >= e1000_i210 ||
3603              igb_get_flash_presence_i210(hw))) {
3604                 ret_val = igb_read_part_string(hw, part_str,
3605                                                E1000_PBANUM_LENGTH);
3606         } else {
3607                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
3608         }
3609
3610         if (ret_val)
3611                 strcpy(part_str, "Unknown");
3612         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
3613         dev_info(&pdev->dev,
3614                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3615                 (adapter->flags & IGB_FLAG_HAS_MSIX) ? "MSI-X" :
3616                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3617                 adapter->num_rx_queues, adapter->num_tx_queues);
3618         if (hw->phy.media_type == e1000_media_type_copper) {
3619                 switch (hw->mac.type) {
3620                 case e1000_i350:
3621                 case e1000_i210:
3622                 case e1000_i211:
3623                         /* Enable EEE for internal copper PHY devices */
3624                         err = igb_set_eee_i350(hw, true, true);
3625                         if ((!err) &&
3626                             (!hw->dev_spec._82575.eee_disable)) {
3627                                 adapter->eee_advert =
3628                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3629                                 adapter->flags |= IGB_FLAG_EEE;
3630                         }
3631                         break;
3632                 case e1000_i354:
3633                         if ((rd32(E1000_CTRL_EXT) &
3634                             E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3635                                 err = igb_set_eee_i354(hw, true, true);
3636                                 if ((!err) &&
3637                                         (!hw->dev_spec._82575.eee_disable)) {
3638                                         adapter->eee_advert =
3639                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3640                                         adapter->flags |= IGB_FLAG_EEE;
3641                                 }
3642                         }
3643                         break;
3644                 default:
3645                         break;
3646                 }
3647         }
3648
3649         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
3650
3651         pm_runtime_put_noidle(&pdev->dev);
3652         return 0;
3653
3654 err_register:
3655         igb_release_hw_control(adapter);
3656         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3657 err_eeprom:
3658         if (!igb_check_reset_block(hw))
3659                 igb_reset_phy(hw);
3660
3661         if (hw->flash_address)
3662                 iounmap(hw->flash_address);
3663 err_sw_init:
3664         kfree(adapter->mac_table);
3665         kfree(adapter->shadow_vfta);
3666         igb_clear_interrupt_scheme(adapter);
3667 #ifdef CONFIG_PCI_IOV
3668         igb_disable_sriov(pdev);
3669 #endif
3670         pci_iounmap(pdev, adapter->io_addr);
3671 err_ioremap:
3672         free_netdev(netdev);
3673 err_alloc_etherdev:
3674         pci_release_mem_regions(pdev);
3675 err_pci_reg:
3676 err_dma:
3677         pci_disable_device(pdev);
3678         return err;
3679 }
3680
3681 #ifdef CONFIG_PCI_IOV
3682 static int igb_disable_sriov(struct pci_dev *pdev)
3683 {
3684         struct net_device *netdev = pci_get_drvdata(pdev);
3685         struct igb_adapter *adapter = netdev_priv(netdev);
3686         struct e1000_hw *hw = &adapter->hw;
3687         unsigned long flags;
3688
3689         /* reclaim resources allocated to VFs */
3690         if (adapter->vf_data) {
3691                 /* disable iov and allow time for transactions to clear */
3692                 if (pci_vfs_assigned(pdev)) {
3693                         dev_warn(&pdev->dev,
3694                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
3695                         return -EPERM;
3696                 } else {
3697                         pci_disable_sriov(pdev);
3698                         msleep(500);
3699                 }
3700                 spin_lock_irqsave(&adapter->vfs_lock, flags);
3701                 kfree(adapter->vf_mac_list);
3702                 adapter->vf_mac_list = NULL;
3703                 kfree(adapter->vf_data);
3704                 adapter->vf_data = NULL;
3705                 adapter->vfs_allocated_count = 0;
3706                 spin_unlock_irqrestore(&adapter->vfs_lock, flags);
3707                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
3708                 wrfl();
3709                 msleep(100);
3710                 dev_info(&pdev->dev, "IOV Disabled\n");
3711
3712                 /* Re-enable DMA Coalescing flag since IOV is turned off */
3713                 adapter->flags |= IGB_FLAG_DMAC;
3714         }
3715
3716         return 0;
3717 }
3718
3719 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
3720 {
3721         struct net_device *netdev = pci_get_drvdata(pdev);
3722         struct igb_adapter *adapter = netdev_priv(netdev);
3723         int old_vfs = pci_num_vf(pdev);
3724         struct vf_mac_filter *mac_list;
3725         int err = 0;
3726         int num_vf_mac_filters, i;
3727
3728         if (!(adapter->flags & IGB_FLAG_HAS_MSIX) || num_vfs > 7) {
3729                 err = -EPERM;
3730                 goto out;
3731         }
3732         if (!num_vfs)
3733                 goto out;
3734
3735         if (old_vfs) {
3736                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
3737                          old_vfs, max_vfs);
3738                 adapter->vfs_allocated_count = old_vfs;
3739         } else
3740                 adapter->vfs_allocated_count = num_vfs;
3741
3742         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
3743                                 sizeof(struct vf_data_storage), GFP_KERNEL);
3744
3745         /* if allocation failed then we do not support SR-IOV */
3746         if (!adapter->vf_data) {
3747                 adapter->vfs_allocated_count = 0;
3748                 err = -ENOMEM;
3749                 goto out;
3750         }
3751
3752         /* Due to the limited number of RAR entries calculate potential
3753          * number of MAC filters available for the VFs. Reserve entries
3754          * for PF default MAC, PF MAC filters and at least one RAR entry
3755          * for each VF for VF MAC.
3756          */
3757         num_vf_mac_filters = adapter->hw.mac.rar_entry_count -
3758                              (1 + IGB_PF_MAC_FILTERS_RESERVED +
3759                               adapter->vfs_allocated_count);
3760
3761         adapter->vf_mac_list = kcalloc(num_vf_mac_filters,
3762                                        sizeof(struct vf_mac_filter),
3763                                        GFP_KERNEL);
3764
3765         mac_list = adapter->vf_mac_list;
3766         INIT_LIST_HEAD(&adapter->vf_macs.l);
3767
3768         if (adapter->vf_mac_list) {
3769                 /* Initialize list of VF MAC filters */
3770                 for (i = 0; i < num_vf_mac_filters; i++) {
3771                         mac_list->vf = -1;
3772                         mac_list->free = true;
3773                         list_add(&mac_list->l, &adapter->vf_macs.l);
3774                         mac_list++;
3775                 }
3776         } else {
3777                 /* If we could not allocate memory for the VF MAC filters
3778                  * we can continue without this feature but warn user.
3779                  */
3780                 dev_err(&pdev->dev,
3781                         "Unable to allocate memory for VF MAC filter list\n");
3782         }
3783
3784         /* only call pci_enable_sriov() if no VFs are allocated already */
3785         if (!old_vfs) {
3786                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
3787                 if (err)
3788                         goto err_out;
3789         }
3790         dev_info(&pdev->dev, "%d VFs allocated\n",
3791                  adapter->vfs_allocated_count);
3792         for (i = 0; i < adapter->vfs_allocated_count; i++)
3793                 igb_vf_configure(adapter, i);
3794
3795         /* DMA Coalescing is not supported in IOV mode. */
3796         adapter->flags &= ~IGB_FLAG_DMAC;
3797         goto out;
3798
3799 err_out:
3800         kfree(adapter->vf_mac_list);
3801         adapter->vf_mac_list = NULL;
3802         kfree(adapter->vf_data);
3803         adapter->vf_data = NULL;
3804         adapter->vfs_allocated_count = 0;
3805 out:
3806         return err;
3807 }
3808
3809 #endif
3810 /**
3811  *  igb_remove_i2c - Cleanup  I2C interface
3812  *  @adapter: pointer to adapter structure
3813  **/
3814 static void igb_remove_i2c(struct igb_adapter *adapter)
3815 {
3816         /* free the adapter bus structure */
3817         i2c_del_adapter(&adapter->i2c_adap);
3818 }
3819
3820 /**
3821  *  igb_remove - Device Removal Routine
3822  *  @pdev: PCI device information struct
3823  *
3824  *  igb_remove is called by the PCI subsystem to alert the driver
3825  *  that it should release a PCI device.  The could be caused by a
3826  *  Hot-Plug event, or because the driver is going to be removed from
3827  *  memory.
3828  **/
3829 static void igb_remove(struct pci_dev *pdev)
3830 {
3831         struct net_device *netdev = pci_get_drvdata(pdev);
3832         struct igb_adapter *adapter = netdev_priv(netdev);
3833         struct e1000_hw *hw = &adapter->hw;
3834
3835         pm_runtime_get_noresume(&pdev->dev);
3836 #ifdef CONFIG_IGB_HWMON
3837         igb_sysfs_exit(adapter);
3838 #endif
3839         igb_remove_i2c(adapter);
3840         igb_ptp_stop(adapter);
3841         /* The watchdog timer may be rescheduled, so explicitly
3842          * disable watchdog from being rescheduled.
3843          */
3844         set_bit(__IGB_DOWN, &adapter->state);
3845         del_timer_sync(&adapter->watchdog_timer);
3846         del_timer_sync(&adapter->phy_info_timer);
3847
3848         cancel_work_sync(&adapter->reset_task);
3849         cancel_work_sync(&adapter->watchdog_task);
3850
3851 #ifdef CONFIG_IGB_DCA
3852         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3853                 dev_info(&pdev->dev, "DCA disabled\n");
3854                 dca_remove_requester(&pdev->dev);
3855                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3856                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
3857         }
3858 #endif
3859
3860         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3861          * would have already happened in close and is redundant.
3862          */
3863         igb_release_hw_control(adapter);
3864
3865 #ifdef CONFIG_PCI_IOV
3866         igb_disable_sriov(pdev);
3867 #endif
3868
3869         unregister_netdev(netdev);
3870
3871         igb_clear_interrupt_scheme(adapter);
3872
3873         pci_iounmap(pdev, adapter->io_addr);
3874         if (hw->flash_address)
3875                 iounmap(hw->flash_address);
3876         pci_release_mem_regions(pdev);
3877
3878         kfree(adapter->mac_table);
3879         kfree(adapter->shadow_vfta);
3880         free_netdev(netdev);
3881
3882         pci_disable_device(pdev);
3883 }
3884
3885 /**
3886  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3887  *  @adapter: board private structure to initialize
3888  *
3889  *  This function initializes the vf specific data storage and then attempts to
3890  *  allocate the VFs.  The reason for ordering it this way is because it is much
3891  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
3892  *  the memory for the VFs.
3893  **/
3894 static void igb_probe_vfs(struct igb_adapter *adapter)
3895 {
3896 #ifdef CONFIG_PCI_IOV
3897         struct pci_dev *pdev = adapter->pdev;
3898         struct e1000_hw *hw = &adapter->hw;
3899
3900         /* Virtualization features not supported on i210 family. */
3901         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
3902                 return;
3903
3904         /* Of the below we really only want the effect of getting
3905          * IGB_FLAG_HAS_MSIX set (if available), without which
3906          * igb_enable_sriov() has no effect.
3907          */
3908         igb_set_interrupt_capability(adapter, true);
3909         igb_reset_interrupt_capability(adapter);
3910
3911         pci_sriov_set_totalvfs(pdev, 7);
3912         igb_enable_sriov(pdev, max_vfs);
3913
3914 #endif /* CONFIG_PCI_IOV */
3915 }
3916
3917 unsigned int igb_get_max_rss_queues(struct igb_adapter *adapter)
3918 {
3919         struct e1000_hw *hw = &adapter->hw;
3920         unsigned int max_rss_queues;
3921
3922         /* Determine the maximum number of RSS queues supported. */
3923         switch (hw->mac.type) {
3924         case e1000_i211:
3925                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
3926                 break;
3927         case e1000_82575:
3928         case e1000_i210:
3929                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
3930                 break;
3931         case e1000_i350:
3932                 /* I350 cannot do RSS and SR-IOV at the same time */
3933                 if (!!adapter->vfs_allocated_count) {
3934                         max_rss_queues = 1;
3935                         break;
3936                 }
3937                 fallthrough;
3938         case e1000_82576:
3939                 if (!!adapter->vfs_allocated_count) {
3940                         max_rss_queues = 2;
3941                         break;
3942                 }
3943                 fallthrough;
3944         case e1000_82580:
3945         case e1000_i354:
3946         default:
3947                 max_rss_queues = IGB_MAX_RX_QUEUES;
3948                 break;
3949         }
3950
3951         return max_rss_queues;
3952 }
3953
3954 static void igb_init_queue_configuration(struct igb_adapter *adapter)
3955 {
3956         u32 max_rss_queues;
3957
3958         max_rss_queues = igb_get_max_rss_queues(adapter);
3959         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
3960
3961         igb_set_flag_queue_pairs(adapter, max_rss_queues);
3962 }
3963
3964 void igb_set_flag_queue_pairs(struct igb_adapter *adapter,
3965                               const u32 max_rss_queues)
3966 {
3967         struct e1000_hw *hw = &adapter->hw;
3968
3969         /* Determine if we need to pair queues. */
3970         switch (hw->mac.type) {
3971         case e1000_82575:
3972         case e1000_i211:
3973                 /* Device supports enough interrupts without queue pairing. */
3974                 break;
3975         case e1000_82576:
3976         case e1000_82580:
3977         case e1000_i350:
3978         case e1000_i354:
3979         case e1000_i210:
3980         default:
3981                 /* If rss_queues > half of max_rss_queues, pair the queues in
3982                  * order to conserve interrupts due to limited supply.
3983                  */
3984                 if (adapter->rss_queues > (max_rss_queues / 2))
3985                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
3986                 else
3987                         adapter->flags &= ~IGB_FLAG_QUEUE_PAIRS;
3988                 break;
3989         }
3990 }
3991
3992 /**
3993  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
3994  *  @adapter: board private structure to initialize
3995  *
3996  *  igb_sw_init initializes the Adapter private data structure.
3997  *  Fields are initialized based on PCI device information and
3998  *  OS network device settings (MTU size).
3999  **/
4000 static int igb_sw_init(struct igb_adapter *adapter)
4001 {
4002         struct e1000_hw *hw = &adapter->hw;
4003         struct net_device *netdev = adapter->netdev;
4004         struct pci_dev *pdev = adapter->pdev;
4005
4006         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
4007
4008         /* set default ring sizes */
4009         adapter->tx_ring_count = IGB_DEFAULT_TXD;
4010         adapter->rx_ring_count = IGB_DEFAULT_RXD;
4011
4012         /* set default ITR values */
4013         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
4014         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
4015
4016         /* set default work limits */
4017         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
4018
4019         adapter->max_frame_size = netdev->mtu + IGB_ETH_PKT_HDR_PAD;
4020         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4021
4022         spin_lock_init(&adapter->nfc_lock);
4023         spin_lock_init(&adapter->stats64_lock);
4024
4025         /* init spinlock to avoid concurrency of VF resources */
4026         spin_lock_init(&adapter->vfs_lock);
4027 #ifdef CONFIG_PCI_IOV
4028         switch (hw->mac.type) {
4029         case e1000_82576:
4030         case e1000_i350:
4031                 if (max_vfs > 7) {
4032                         dev_warn(&pdev->dev,
4033                                  "Maximum of 7 VFs per PF, using max\n");
4034                         max_vfs = adapter->vfs_allocated_count = 7;
4035                 } else
4036                         adapter->vfs_allocated_count = max_vfs;
4037                 if (adapter->vfs_allocated_count)
4038                         dev_warn(&pdev->dev,
4039                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
4040                 break;
4041         default:
4042                 break;
4043         }
4044 #endif /* CONFIG_PCI_IOV */
4045
4046         /* Assume MSI-X interrupts, will be checked during IRQ allocation */
4047         adapter->flags |= IGB_FLAG_HAS_MSIX;
4048
4049         adapter->mac_table = kcalloc(hw->mac.rar_entry_count,
4050                                      sizeof(struct igb_mac_addr),
4051                                      GFP_KERNEL);
4052         if (!adapter->mac_table)
4053                 return -ENOMEM;
4054
4055         igb_probe_vfs(adapter);
4056
4057         igb_init_queue_configuration(adapter);
4058
4059         /* Setup and initialize a copy of the hw vlan table array */
4060         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
4061                                        GFP_KERNEL);
4062         if (!adapter->shadow_vfta)
4063                 return -ENOMEM;
4064
4065         /* This call may decrease the number of queues */
4066         if (igb_init_interrupt_scheme(adapter, true)) {
4067                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4068                 return -ENOMEM;
4069         }
4070
4071         /* Explicitly disable IRQ since the NIC can be in any state. */
4072         igb_irq_disable(adapter);
4073
4074         if (hw->mac.type >= e1000_i350)
4075                 adapter->flags &= ~IGB_FLAG_DMAC;
4076
4077         set_bit(__IGB_DOWN, &adapter->state);
4078         return 0;
4079 }
4080
4081 /**
4082  *  __igb_open - Called when a network interface is made active
4083  *  @netdev: network interface device structure
4084  *  @resuming: indicates whether we are in a resume call
4085  *
4086  *  Returns 0 on success, negative value on failure
4087  *
4088  *  The open entry point is called when a network interface is made
4089  *  active by the system (IFF_UP).  At this point all resources needed
4090  *  for transmit and receive operations are allocated, the interrupt
4091  *  handler is registered with the OS, the watchdog timer is started,
4092  *  and the stack is notified that the interface is ready.
4093  **/
4094 static int __igb_open(struct net_device *netdev, bool resuming)
4095 {
4096         struct igb_adapter *adapter = netdev_priv(netdev);
4097         struct e1000_hw *hw = &adapter->hw;
4098         struct pci_dev *pdev = adapter->pdev;
4099         int err;
4100         int i;
4101
4102         /* disallow open during test */
4103         if (test_bit(__IGB_TESTING, &adapter->state)) {
4104                 WARN_ON(resuming);
4105                 return -EBUSY;
4106         }
4107
4108         if (!resuming)
4109                 pm_runtime_get_sync(&pdev->dev);
4110
4111         netif_carrier_off(netdev);
4112
4113         /* allocate transmit descriptors */
4114         err = igb_setup_all_tx_resources(adapter);
4115         if (err)
4116                 goto err_setup_tx;
4117
4118         /* allocate receive descriptors */
4119         err = igb_setup_all_rx_resources(adapter);
4120         if (err)
4121                 goto err_setup_rx;
4122
4123         igb_power_up_link(adapter);
4124
4125         /* before we allocate an interrupt, we must be ready to handle it.
4126          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4127          * as soon as we call pci_request_irq, so we have to setup our
4128          * clean_rx handler before we do so.
4129          */
4130         igb_configure(adapter);
4131
4132         err = igb_request_irq(adapter);
4133         if (err)
4134                 goto err_req_irq;
4135
4136         /* Notify the stack of the actual queue counts. */
4137         err = netif_set_real_num_tx_queues(adapter->netdev,
4138                                            adapter->num_tx_queues);
4139         if (err)
4140                 goto err_set_queues;
4141
4142         err = netif_set_real_num_rx_queues(adapter->netdev,
4143                                            adapter->num_rx_queues);
4144         if (err)
4145                 goto err_set_queues;
4146
4147         /* From here on the code is the same as igb_up() */
4148         clear_bit(__IGB_DOWN, &adapter->state);
4149
4150         for (i = 0; i < adapter->num_q_vectors; i++)
4151                 napi_enable(&(adapter->q_vector[i]->napi));
4152
4153         /* Clear any pending interrupts. */
4154         rd32(E1000_TSICR);
4155         rd32(E1000_ICR);
4156
4157         igb_irq_enable(adapter);
4158
4159         /* notify VFs that reset has been completed */
4160         if (adapter->vfs_allocated_count) {
4161                 u32 reg_data = rd32(E1000_CTRL_EXT);
4162
4163                 reg_data |= E1000_CTRL_EXT_PFRSTD;
4164                 wr32(E1000_CTRL_EXT, reg_data);
4165         }
4166
4167         netif_tx_start_all_queues(netdev);
4168
4169         if (!resuming)
4170                 pm_runtime_put(&pdev->dev);
4171
4172         /* start the watchdog. */
4173         hw->mac.get_link_status = 1;
4174         schedule_work(&adapter->watchdog_task);
4175
4176         return 0;
4177
4178 err_set_queues:
4179         igb_free_irq(adapter);
4180 err_req_irq:
4181         igb_release_hw_control(adapter);
4182         igb_power_down_link(adapter);
4183         igb_free_all_rx_resources(adapter);
4184 err_setup_rx:
4185         igb_free_all_tx_resources(adapter);
4186 err_setup_tx:
4187         igb_reset(adapter);
4188         if (!resuming)
4189                 pm_runtime_put(&pdev->dev);
4190
4191         return err;
4192 }
4193
4194 int igb_open(struct net_device *netdev)
4195 {
4196         return __igb_open(netdev, false);
4197 }
4198
4199 /**
4200  *  __igb_close - Disables a network interface
4201  *  @netdev: network interface device structure
4202  *  @suspending: indicates we are in a suspend call
4203  *
4204  *  Returns 0, this is not allowed to fail
4205  *
4206  *  The close entry point is called when an interface is de-activated
4207  *  by the OS.  The hardware is still under the driver's control, but
4208  *  needs to be disabled.  A global MAC reset is issued to stop the
4209  *  hardware, and all transmit and receive resources are freed.
4210  **/
4211 static int __igb_close(struct net_device *netdev, bool suspending)
4212 {
4213         struct igb_adapter *adapter = netdev_priv(netdev);
4214         struct pci_dev *pdev = adapter->pdev;
4215
4216         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4217
4218         if (!suspending)
4219                 pm_runtime_get_sync(&pdev->dev);
4220
4221         igb_down(adapter);
4222         igb_free_irq(adapter);
4223
4224         igb_free_all_tx_resources(adapter);
4225         igb_free_all_rx_resources(adapter);
4226
4227         if (!suspending)
4228                 pm_runtime_put_sync(&pdev->dev);
4229         return 0;
4230 }
4231
4232 int igb_close(struct net_device *netdev)
4233 {
4234         if (netif_device_present(netdev) || netdev->dismantle)
4235                 return __igb_close(netdev, false);
4236         return 0;
4237 }
4238
4239 /**
4240  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
4241  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
4242  *
4243  *  Return 0 on success, negative on failure
4244  **/
4245 int igb_setup_tx_resources(struct igb_ring *tx_ring)
4246 {
4247         struct device *dev = tx_ring->dev;
4248         int size;
4249
4250         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4251
4252         tx_ring->tx_buffer_info = vmalloc(size);
4253         if (!tx_ring->tx_buffer_info)
4254                 goto err;
4255
4256         /* round up to nearest 4K */
4257         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
4258         tx_ring->size = ALIGN(tx_ring->size, 4096);
4259
4260         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
4261                                            &tx_ring->dma, GFP_KERNEL);
4262         if (!tx_ring->desc)
4263                 goto err;
4264
4265         tx_ring->next_to_use = 0;
4266         tx_ring->next_to_clean = 0;
4267
4268         return 0;
4269
4270 err:
4271         vfree(tx_ring->tx_buffer_info);
4272         tx_ring->tx_buffer_info = NULL;
4273         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
4274         return -ENOMEM;
4275 }
4276
4277 /**
4278  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
4279  *                               (Descriptors) for all queues
4280  *  @adapter: board private structure
4281  *
4282  *  Return 0 on success, negative on failure
4283  **/
4284 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
4285 {
4286         struct pci_dev *pdev = adapter->pdev;
4287         int i, err = 0;
4288
4289         for (i = 0; i < adapter->num_tx_queues; i++) {
4290                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
4291                 if (err) {
4292                         dev_err(&pdev->dev,
4293                                 "Allocation for Tx Queue %u failed\n", i);
4294                         for (i--; i >= 0; i--)
4295                                 igb_free_tx_resources(adapter->tx_ring[i]);
4296                         break;
4297                 }
4298         }
4299
4300         return err;
4301 }
4302
4303 /**
4304  *  igb_setup_tctl - configure the transmit control registers
4305  *  @adapter: Board private structure
4306  **/
4307 void igb_setup_tctl(struct igb_adapter *adapter)
4308 {
4309         struct e1000_hw *hw = &adapter->hw;
4310         u32 tctl;
4311
4312         /* disable queue 0 which is enabled by default on 82575 and 82576 */
4313         wr32(E1000_TXDCTL(0), 0);
4314
4315         /* Program the Transmit Control Register */
4316         tctl = rd32(E1000_TCTL);
4317         tctl &= ~E1000_TCTL_CT;
4318         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
4319                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
4320
4321         igb_config_collision_dist(hw);
4322
4323         /* Enable transmits */
4324         tctl |= E1000_TCTL_EN;
4325
4326         wr32(E1000_TCTL, tctl);
4327 }
4328
4329 /**
4330  *  igb_configure_tx_ring - Configure transmit ring after Reset
4331  *  @adapter: board private structure
4332  *  @ring: tx ring to configure
4333  *
4334  *  Configure a transmit ring after a reset.
4335  **/
4336 void igb_configure_tx_ring(struct igb_adapter *adapter,
4337                            struct igb_ring *ring)
4338 {
4339         struct e1000_hw *hw = &adapter->hw;
4340         u32 txdctl = 0;
4341         u64 tdba = ring->dma;
4342         int reg_idx = ring->reg_idx;
4343
4344         wr32(E1000_TDLEN(reg_idx),
4345              ring->count * sizeof(union e1000_adv_tx_desc));
4346         wr32(E1000_TDBAL(reg_idx),
4347              tdba & 0x00000000ffffffffULL);
4348         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
4349
4350         ring->tail = adapter->io_addr + E1000_TDT(reg_idx);
4351         wr32(E1000_TDH(reg_idx), 0);
4352         writel(0, ring->tail);
4353
4354         txdctl |= IGB_TX_PTHRESH;
4355         txdctl |= IGB_TX_HTHRESH << 8;
4356         txdctl |= IGB_TX_WTHRESH << 16;
4357
4358         /* reinitialize tx_buffer_info */
4359         memset(ring->tx_buffer_info, 0,
4360                sizeof(struct igb_tx_buffer) * ring->count);
4361
4362         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
4363         wr32(E1000_TXDCTL(reg_idx), txdctl);
4364 }
4365
4366 /**
4367  *  igb_configure_tx - Configure transmit Unit after Reset
4368  *  @adapter: board private structure
4369  *
4370  *  Configure the Tx unit of the MAC after a reset.
4371  **/
4372 static void igb_configure_tx(struct igb_adapter *adapter)
4373 {
4374         struct e1000_hw *hw = &adapter->hw;
4375         int i;
4376
4377         /* disable the queues */
4378         for (i = 0; i < adapter->num_tx_queues; i++)
4379                 wr32(E1000_TXDCTL(adapter->tx_ring[i]->reg_idx), 0);
4380
4381         wrfl();
4382         usleep_range(10000, 20000);
4383
4384         for (i = 0; i < adapter->num_tx_queues; i++)
4385                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
4386 }
4387
4388 /**
4389  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
4390  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
4391  *
4392  *  Returns 0 on success, negative on failure
4393  **/
4394 int igb_setup_rx_resources(struct igb_ring *rx_ring)
4395 {
4396         struct igb_adapter *adapter = netdev_priv(rx_ring->netdev);
4397         struct device *dev = rx_ring->dev;
4398         int size, res;
4399
4400         /* XDP RX-queue info */
4401         if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
4402                 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4403         res = xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
4404                                rx_ring->queue_index, 0);
4405         if (res < 0) {
4406                 dev_err(dev, "Failed to register xdp_rxq index %u\n",
4407                         rx_ring->queue_index);
4408                 return res;
4409         }
4410
4411         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4412
4413         rx_ring->rx_buffer_info = vmalloc(size);
4414         if (!rx_ring->rx_buffer_info)
4415                 goto err;
4416
4417         /* Round up to nearest 4K */
4418         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
4419         rx_ring->size = ALIGN(rx_ring->size, 4096);
4420
4421         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
4422                                            &rx_ring->dma, GFP_KERNEL);
4423         if (!rx_ring->desc)
4424                 goto err;
4425
4426         rx_ring->next_to_alloc = 0;
4427         rx_ring->next_to_clean = 0;
4428         rx_ring->next_to_use = 0;
4429
4430         rx_ring->xdp_prog = adapter->xdp_prog;
4431
4432         return 0;
4433
4434 err:
4435         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4436         vfree(rx_ring->rx_buffer_info);
4437         rx_ring->rx_buffer_info = NULL;
4438         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
4439         return -ENOMEM;
4440 }
4441
4442 /**
4443  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
4444  *                               (Descriptors) for all queues
4445  *  @adapter: board private structure
4446  *
4447  *  Return 0 on success, negative on failure
4448  **/
4449 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
4450 {
4451         struct pci_dev *pdev = adapter->pdev;
4452         int i, err = 0;
4453
4454         for (i = 0; i < adapter->num_rx_queues; i++) {
4455                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
4456                 if (err) {
4457                         dev_err(&pdev->dev,
4458                                 "Allocation for Rx Queue %u failed\n", i);
4459                         for (i--; i >= 0; i--)
4460                                 igb_free_rx_resources(adapter->rx_ring[i]);
4461                         break;
4462                 }
4463         }
4464
4465         return err;
4466 }
4467
4468 /**
4469  *  igb_setup_mrqc - configure the multiple receive queue control registers
4470  *  @adapter: Board private structure
4471  **/
4472 static void igb_setup_mrqc(struct igb_adapter *adapter)
4473 {
4474         struct e1000_hw *hw = &adapter->hw;
4475         u32 mrqc, rxcsum;
4476         u32 j, num_rx_queues;
4477         u32 rss_key[10];
4478
4479         netdev_rss_key_fill(rss_key, sizeof(rss_key));
4480         for (j = 0; j < 10; j++)
4481                 wr32(E1000_RSSRK(j), rss_key[j]);
4482
4483         num_rx_queues = adapter->rss_queues;
4484
4485         switch (hw->mac.type) {
4486         case e1000_82576:
4487                 /* 82576 supports 2 RSS queues for SR-IOV */
4488                 if (adapter->vfs_allocated_count)
4489                         num_rx_queues = 2;
4490                 break;
4491         default:
4492                 break;
4493         }
4494
4495         if (adapter->rss_indir_tbl_init != num_rx_queues) {
4496                 for (j = 0; j < IGB_RETA_SIZE; j++)
4497                         adapter->rss_indir_tbl[j] =
4498                         (j * num_rx_queues) / IGB_RETA_SIZE;
4499                 adapter->rss_indir_tbl_init = num_rx_queues;
4500         }
4501         igb_write_rss_indir_tbl(adapter);
4502
4503         /* Disable raw packet checksumming so that RSS hash is placed in
4504          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
4505          * offloads as they are enabled by default
4506          */
4507         rxcsum = rd32(E1000_RXCSUM);
4508         rxcsum |= E1000_RXCSUM_PCSD;
4509
4510         if (adapter->hw.mac.type >= e1000_82576)
4511                 /* Enable Receive Checksum Offload for SCTP */
4512                 rxcsum |= E1000_RXCSUM_CRCOFL;
4513
4514         /* Don't need to set TUOFL or IPOFL, they default to 1 */
4515         wr32(E1000_RXCSUM, rxcsum);
4516
4517         /* Generate RSS hash based on packet types, TCP/UDP
4518          * port numbers and/or IPv4/v6 src and dst addresses
4519          */
4520         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
4521                E1000_MRQC_RSS_FIELD_IPV4_TCP |
4522                E1000_MRQC_RSS_FIELD_IPV6 |
4523                E1000_MRQC_RSS_FIELD_IPV6_TCP |
4524                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
4525
4526         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
4527                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
4528         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
4529                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
4530
4531         /* If VMDq is enabled then we set the appropriate mode for that, else
4532          * we default to RSS so that an RSS hash is calculated per packet even
4533          * if we are only using one queue
4534          */
4535         if (adapter->vfs_allocated_count) {
4536                 if (hw->mac.type > e1000_82575) {
4537                         /* Set the default pool for the PF's first queue */
4538                         u32 vtctl = rd32(E1000_VT_CTL);
4539
4540                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
4541                                    E1000_VT_CTL_DISABLE_DEF_POOL);
4542                         vtctl |= adapter->vfs_allocated_count <<
4543                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
4544                         wr32(E1000_VT_CTL, vtctl);
4545                 }
4546                 if (adapter->rss_queues > 1)
4547                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_MQ;
4548                 else
4549                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
4550         } else {
4551                 mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
4552         }
4553         igb_vmm_control(adapter);
4554
4555         wr32(E1000_MRQC, mrqc);
4556 }
4557
4558 /**
4559  *  igb_setup_rctl - configure the receive control registers
4560  *  @adapter: Board private structure
4561  **/
4562 void igb_setup_rctl(struct igb_adapter *adapter)
4563 {
4564         struct e1000_hw *hw = &adapter->hw;
4565         u32 rctl;
4566
4567         rctl = rd32(E1000_RCTL);
4568
4569         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
4570         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
4571
4572         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
4573                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4574
4575         /* enable stripping of CRC. It's unlikely this will break BMC
4576          * redirection as it did with e1000. Newer features require
4577          * that the HW strips the CRC.
4578          */
4579         rctl |= E1000_RCTL_SECRC;
4580
4581         /* disable store bad packets and clear size bits. */
4582         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
4583
4584         /* enable LPE to allow for reception of jumbo frames */
4585         rctl |= E1000_RCTL_LPE;
4586
4587         /* disable queue 0 to prevent tail write w/o re-config */
4588         wr32(E1000_RXDCTL(0), 0);
4589
4590         /* Attention!!!  For SR-IOV PF driver operations you must enable
4591          * queue drop for all VF and PF queues to prevent head of line blocking
4592          * if an un-trusted VF does not provide descriptors to hardware.
4593          */
4594         if (adapter->vfs_allocated_count) {
4595                 /* set all queue drop enable bits */
4596                 wr32(E1000_QDE, ALL_QUEUES);
4597         }
4598
4599         /* This is useful for sniffing bad packets. */
4600         if (adapter->netdev->features & NETIF_F_RXALL) {
4601                 /* UPE and MPE will be handled by normal PROMISC logic
4602                  * in e1000e_set_rx_mode
4603                  */
4604                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
4605                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
4606                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
4607
4608                 rctl &= ~(E1000_RCTL_DPF | /* Allow filtered pause */
4609                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
4610                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
4611                  * and that breaks VLANs.
4612                  */
4613         }
4614
4615         wr32(E1000_RCTL, rctl);
4616 }
4617
4618 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
4619                                    int vfn)
4620 {
4621         struct e1000_hw *hw = &adapter->hw;
4622         u32 vmolr;
4623
4624         if (size > MAX_JUMBO_FRAME_SIZE)
4625                 size = MAX_JUMBO_FRAME_SIZE;
4626
4627         vmolr = rd32(E1000_VMOLR(vfn));
4628         vmolr &= ~E1000_VMOLR_RLPML_MASK;
4629         vmolr |= size | E1000_VMOLR_LPE;
4630         wr32(E1000_VMOLR(vfn), vmolr);
4631
4632         return 0;
4633 }
4634
4635 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
4636                                          int vfn, bool enable)
4637 {
4638         struct e1000_hw *hw = &adapter->hw;
4639         u32 val, reg;
4640
4641         if (hw->mac.type < e1000_82576)
4642                 return;
4643
4644         if (hw->mac.type == e1000_i350)
4645                 reg = E1000_DVMOLR(vfn);
4646         else
4647                 reg = E1000_VMOLR(vfn);
4648
4649         val = rd32(reg);
4650         if (enable)
4651                 val |= E1000_VMOLR_STRVLAN;
4652         else
4653                 val &= ~(E1000_VMOLR_STRVLAN);
4654         wr32(reg, val);
4655 }
4656
4657 static inline void igb_set_vmolr(struct igb_adapter *adapter,
4658                                  int vfn, bool aupe)
4659 {
4660         struct e1000_hw *hw = &adapter->hw;
4661         u32 vmolr;
4662
4663         /* This register exists only on 82576 and newer so if we are older then
4664          * we should exit and do nothing
4665          */
4666         if (hw->mac.type < e1000_82576)
4667                 return;
4668
4669         vmolr = rd32(E1000_VMOLR(vfn));
4670         if (aupe)
4671                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
4672         else
4673                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
4674
4675         /* clear all bits that might not be set */
4676         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
4677
4678         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
4679                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
4680         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
4681          * multicast packets
4682          */
4683         if (vfn <= adapter->vfs_allocated_count)
4684                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
4685
4686         wr32(E1000_VMOLR(vfn), vmolr);
4687 }
4688
4689 /**
4690  *  igb_setup_srrctl - configure the split and replication receive control
4691  *                     registers
4692  *  @adapter: Board private structure
4693  *  @ring: receive ring to be configured
4694  **/
4695 void igb_setup_srrctl(struct igb_adapter *adapter, struct igb_ring *ring)
4696 {
4697         struct e1000_hw *hw = &adapter->hw;
4698         int reg_idx = ring->reg_idx;
4699         u32 srrctl = 0;
4700
4701         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
4702         if (ring_uses_large_buffer(ring))
4703                 srrctl |= IGB_RXBUFFER_3072 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4704         else
4705                 srrctl |= IGB_RXBUFFER_2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
4706         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
4707         if (hw->mac.type >= e1000_82580)
4708                 srrctl |= E1000_SRRCTL_TIMESTAMP;
4709         /* Only set Drop Enable if VFs allocated, or we are supporting multiple
4710          * queues and rx flow control is disabled
4711          */
4712         if (adapter->vfs_allocated_count ||
4713             (!(hw->fc.current_mode & e1000_fc_rx_pause) &&
4714              adapter->num_rx_queues > 1))
4715                 srrctl |= E1000_SRRCTL_DROP_EN;
4716
4717         wr32(E1000_SRRCTL(reg_idx), srrctl);
4718 }
4719
4720 /**
4721  *  igb_configure_rx_ring - Configure a receive ring after Reset
4722  *  @adapter: board private structure
4723  *  @ring: receive ring to be configured
4724  *
4725  *  Configure the Rx unit of the MAC after a reset.
4726  **/
4727 void igb_configure_rx_ring(struct igb_adapter *adapter,
4728                            struct igb_ring *ring)
4729 {
4730         struct e1000_hw *hw = &adapter->hw;
4731         union e1000_adv_rx_desc *rx_desc;
4732         u64 rdba = ring->dma;
4733         int reg_idx = ring->reg_idx;
4734         u32 rxdctl = 0;
4735
4736         xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4737         WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4738                                            MEM_TYPE_PAGE_SHARED, NULL));
4739
4740         /* disable the queue */
4741         wr32(E1000_RXDCTL(reg_idx), 0);
4742
4743         /* Set DMA base address registers */
4744         wr32(E1000_RDBAL(reg_idx),
4745              rdba & 0x00000000ffffffffULL);
4746         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
4747         wr32(E1000_RDLEN(reg_idx),
4748              ring->count * sizeof(union e1000_adv_rx_desc));
4749
4750         /* initialize head and tail */
4751         ring->tail = adapter->io_addr + E1000_RDT(reg_idx);
4752         wr32(E1000_RDH(reg_idx), 0);
4753         writel(0, ring->tail);
4754
4755         /* set descriptor configuration */
4756         igb_setup_srrctl(adapter, ring);
4757
4758         /* set filtering for VMDQ pools */
4759         igb_set_vmolr(adapter, reg_idx & 0x7, true);
4760
4761         rxdctl |= IGB_RX_PTHRESH;
4762         rxdctl |= IGB_RX_HTHRESH << 8;
4763         rxdctl |= IGB_RX_WTHRESH << 16;
4764
4765         /* initialize rx_buffer_info */
4766         memset(ring->rx_buffer_info, 0,
4767                sizeof(struct igb_rx_buffer) * ring->count);
4768
4769         /* initialize Rx descriptor 0 */
4770         rx_desc = IGB_RX_DESC(ring, 0);
4771         rx_desc->wb.upper.length = 0;
4772
4773         /* enable receive descriptor fetching */
4774         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
4775         wr32(E1000_RXDCTL(reg_idx), rxdctl);
4776 }
4777
4778 static void igb_set_rx_buffer_len(struct igb_adapter *adapter,
4779                                   struct igb_ring *rx_ring)
4780 {
4781         /* set build_skb and buffer size flags */
4782         clear_ring_build_skb_enabled(rx_ring);
4783         clear_ring_uses_large_buffer(rx_ring);
4784
4785         if (adapter->flags & IGB_FLAG_RX_LEGACY)
4786                 return;
4787
4788         set_ring_build_skb_enabled(rx_ring);
4789
4790 #if (PAGE_SIZE < 8192)
4791         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
4792                 return;
4793
4794         set_ring_uses_large_buffer(rx_ring);
4795 #endif
4796 }
4797
4798 /**
4799  *  igb_configure_rx - Configure receive Unit after Reset
4800  *  @adapter: board private structure
4801  *
4802  *  Configure the Rx unit of the MAC after a reset.
4803  **/
4804 static void igb_configure_rx(struct igb_adapter *adapter)
4805 {
4806         int i;
4807
4808         /* set the correct pool for the PF default MAC address in entry 0 */
4809         igb_set_default_mac_filter(adapter);
4810
4811         /* Setup the HW Rx Head and Tail Descriptor Pointers and
4812          * the Base and Length of the Rx Descriptor Ring
4813          */
4814         for (i = 0; i < adapter->num_rx_queues; i++) {
4815                 struct igb_ring *rx_ring = adapter->rx_ring[i];
4816
4817                 igb_set_rx_buffer_len(adapter, rx_ring);
4818                 igb_configure_rx_ring(adapter, rx_ring);
4819         }
4820 }
4821
4822 /**
4823  *  igb_free_tx_resources - Free Tx Resources per Queue
4824  *  @tx_ring: Tx descriptor ring for a specific queue
4825  *
4826  *  Free all transmit software resources
4827  **/
4828 void igb_free_tx_resources(struct igb_ring *tx_ring)
4829 {
4830         igb_clean_tx_ring(tx_ring);
4831
4832         vfree(tx_ring->tx_buffer_info);
4833         tx_ring->tx_buffer_info = NULL;
4834
4835         /* if not set, then don't free */
4836         if (!tx_ring->desc)
4837                 return;
4838
4839         dma_free_coherent(tx_ring->dev, tx_ring->size,
4840                           tx_ring->desc, tx_ring->dma);
4841
4842         tx_ring->desc = NULL;
4843 }
4844
4845 /**
4846  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
4847  *  @adapter: board private structure
4848  *
4849  *  Free all transmit software resources
4850  **/
4851 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4852 {
4853         int i;
4854
4855         for (i = 0; i < adapter->num_tx_queues; i++)
4856                 if (adapter->tx_ring[i])
4857                         igb_free_tx_resources(adapter->tx_ring[i]);
4858 }
4859
4860 /**
4861  *  igb_clean_tx_ring - Free Tx Buffers
4862  *  @tx_ring: ring to be cleaned
4863  **/
4864 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4865 {
4866         u16 i = tx_ring->next_to_clean;
4867         struct igb_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
4868
4869         while (i != tx_ring->next_to_use) {
4870                 union e1000_adv_tx_desc *eop_desc, *tx_desc;
4871
4872                 /* Free all the Tx ring sk_buffs or xdp frames */
4873                 if (tx_buffer->type == IGB_TYPE_SKB)
4874                         dev_kfree_skb_any(tx_buffer->skb);
4875                 else
4876                         xdp_return_frame(tx_buffer->xdpf);
4877
4878                 /* unmap skb header data */
4879                 dma_unmap_single(tx_ring->dev,
4880                                  dma_unmap_addr(tx_buffer, dma),
4881                                  dma_unmap_len(tx_buffer, len),
4882                                  DMA_TO_DEVICE);
4883
4884                 /* check for eop_desc to determine the end of the packet */
4885                 eop_desc = tx_buffer->next_to_watch;
4886                 tx_desc = IGB_TX_DESC(tx_ring, i);
4887
4888                 /* unmap remaining buffers */
4889                 while (tx_desc != eop_desc) {
4890                         tx_buffer++;
4891                         tx_desc++;
4892                         i++;
4893                         if (unlikely(i == tx_ring->count)) {
4894                                 i = 0;
4895                                 tx_buffer = tx_ring->tx_buffer_info;
4896                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4897                         }
4898
4899                         /* unmap any remaining paged data */
4900                         if (dma_unmap_len(tx_buffer, len))
4901                                 dma_unmap_page(tx_ring->dev,
4902                                                dma_unmap_addr(tx_buffer, dma),
4903                                                dma_unmap_len(tx_buffer, len),
4904                                                DMA_TO_DEVICE);
4905                 }
4906
4907                 tx_buffer->next_to_watch = NULL;
4908
4909                 /* move us one more past the eop_desc for start of next pkt */
4910                 tx_buffer++;
4911                 i++;
4912                 if (unlikely(i == tx_ring->count)) {
4913                         i = 0;
4914                         tx_buffer = tx_ring->tx_buffer_info;
4915                 }
4916         }
4917
4918         /* reset BQL for queue */
4919         netdev_tx_reset_queue(txring_txq(tx_ring));
4920
4921         /* reset next_to_use and next_to_clean */
4922         tx_ring->next_to_use = 0;
4923         tx_ring->next_to_clean = 0;
4924 }
4925
4926 /**
4927  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
4928  *  @adapter: board private structure
4929  **/
4930 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4931 {
4932         int i;
4933
4934         for (i = 0; i < adapter->num_tx_queues; i++)
4935                 if (adapter->tx_ring[i])
4936                         igb_clean_tx_ring(adapter->tx_ring[i]);
4937 }
4938
4939 /**
4940  *  igb_free_rx_resources - Free Rx Resources
4941  *  @rx_ring: ring to clean the resources from
4942  *
4943  *  Free all receive software resources
4944  **/
4945 void igb_free_rx_resources(struct igb_ring *rx_ring)
4946 {
4947         igb_clean_rx_ring(rx_ring);
4948
4949         rx_ring->xdp_prog = NULL;
4950         xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
4951         vfree(rx_ring->rx_buffer_info);
4952         rx_ring->rx_buffer_info = NULL;
4953
4954         /* if not set, then don't free */
4955         if (!rx_ring->desc)
4956                 return;
4957
4958         dma_free_coherent(rx_ring->dev, rx_ring->size,
4959                           rx_ring->desc, rx_ring->dma);
4960
4961         rx_ring->desc = NULL;
4962 }
4963
4964 /**
4965  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
4966  *  @adapter: board private structure
4967  *
4968  *  Free all receive software resources
4969  **/
4970 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4971 {
4972         int i;
4973
4974         for (i = 0; i < adapter->num_rx_queues; i++)
4975                 if (adapter->rx_ring[i])
4976                         igb_free_rx_resources(adapter->rx_ring[i]);
4977 }
4978
4979 /**
4980  *  igb_clean_rx_ring - Free Rx Buffers per Queue
4981  *  @rx_ring: ring to free buffers from
4982  **/
4983 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
4984 {
4985         u16 i = rx_ring->next_to_clean;
4986
4987         dev_kfree_skb(rx_ring->skb);
4988         rx_ring->skb = NULL;
4989
4990         /* Free all the Rx ring sk_buffs */
4991         while (i != rx_ring->next_to_alloc) {
4992                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4993
4994                 /* Invalidate cache lines that may have been written to by
4995                  * device so that we avoid corrupting memory.
4996                  */
4997                 dma_sync_single_range_for_cpu(rx_ring->dev,
4998                                               buffer_info->dma,
4999                                               buffer_info->page_offset,
5000                                               igb_rx_bufsz(rx_ring),
5001                                               DMA_FROM_DEVICE);
5002
5003                 /* free resources associated with mapping */
5004                 dma_unmap_page_attrs(rx_ring->dev,
5005                                      buffer_info->dma,
5006                                      igb_rx_pg_size(rx_ring),
5007                                      DMA_FROM_DEVICE,
5008                                      IGB_RX_DMA_ATTR);
5009                 __page_frag_cache_drain(buffer_info->page,
5010                                         buffer_info->pagecnt_bias);
5011
5012                 i++;
5013                 if (i == rx_ring->count)
5014                         i = 0;
5015         }
5016
5017         rx_ring->next_to_alloc = 0;
5018         rx_ring->next_to_clean = 0;
5019         rx_ring->next_to_use = 0;
5020 }
5021
5022 /**
5023  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
5024  *  @adapter: board private structure
5025  **/
5026 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
5027 {
5028         int i;
5029
5030         for (i = 0; i < adapter->num_rx_queues; i++)
5031                 if (adapter->rx_ring[i])
5032                         igb_clean_rx_ring(adapter->rx_ring[i]);
5033 }
5034
5035 /**
5036  *  igb_set_mac - Change the Ethernet Address of the NIC
5037  *  @netdev: network interface device structure
5038  *  @p: pointer to an address structure
5039  *
5040  *  Returns 0 on success, negative on failure
5041  **/
5042 static int igb_set_mac(struct net_device *netdev, void *p)
5043 {
5044         struct igb_adapter *adapter = netdev_priv(netdev);
5045         struct e1000_hw *hw = &adapter->hw;
5046         struct sockaddr *addr = p;
5047
5048         if (!is_valid_ether_addr(addr->sa_data))
5049                 return -EADDRNOTAVAIL;
5050
5051         eth_hw_addr_set(netdev, addr->sa_data);
5052         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
5053
5054         /* set the correct pool for the new PF MAC address in entry 0 */
5055         igb_set_default_mac_filter(adapter);
5056
5057         return 0;
5058 }
5059
5060 /**
5061  *  igb_write_mc_addr_list - write multicast addresses to MTA
5062  *  @netdev: network interface device structure
5063  *
5064  *  Writes multicast address list to the MTA hash table.
5065  *  Returns: -ENOMEM on failure
5066  *           0 on no addresses written
5067  *           X on writing X addresses to MTA
5068  **/
5069 static int igb_write_mc_addr_list(struct net_device *netdev)
5070 {
5071         struct igb_adapter *adapter = netdev_priv(netdev);
5072         struct e1000_hw *hw = &adapter->hw;
5073         struct netdev_hw_addr *ha;
5074         u8  *mta_list;
5075         int i;
5076
5077         if (netdev_mc_empty(netdev)) {
5078                 /* nothing to program, so clear mc list */
5079                 igb_update_mc_addr_list(hw, NULL, 0);
5080                 igb_restore_vf_multicasts(adapter);
5081                 return 0;
5082         }
5083
5084         mta_list = kcalloc(netdev_mc_count(netdev), 6, GFP_ATOMIC);
5085         if (!mta_list)
5086                 return -ENOMEM;
5087
5088         /* The shared function expects a packed array of only addresses. */
5089         i = 0;
5090         netdev_for_each_mc_addr(ha, netdev)
5091                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
5092
5093         igb_update_mc_addr_list(hw, mta_list, i);
5094         kfree(mta_list);
5095
5096         return netdev_mc_count(netdev);
5097 }
5098
5099 static int igb_vlan_promisc_enable(struct igb_adapter *adapter)
5100 {
5101         struct e1000_hw *hw = &adapter->hw;
5102         u32 i, pf_id;
5103
5104         switch (hw->mac.type) {
5105         case e1000_i210:
5106         case e1000_i211:
5107         case e1000_i350:
5108                 /* VLAN filtering needed for VLAN prio filter */
5109                 if (adapter->netdev->features & NETIF_F_NTUPLE)
5110                         break;
5111                 fallthrough;
5112         case e1000_82576:
5113         case e1000_82580:
5114         case e1000_i354:
5115                 /* VLAN filtering needed for pool filtering */
5116                 if (adapter->vfs_allocated_count)
5117                         break;
5118                 fallthrough;
5119         default:
5120                 return 1;
5121         }
5122
5123         /* We are already in VLAN promisc, nothing to do */
5124         if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
5125                 return 0;
5126
5127         if (!adapter->vfs_allocated_count)
5128                 goto set_vfta;
5129
5130         /* Add PF to all active pools */
5131         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5132
5133         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5134                 u32 vlvf = rd32(E1000_VLVF(i));
5135
5136                 vlvf |= BIT(pf_id);
5137                 wr32(E1000_VLVF(i), vlvf);
5138         }
5139
5140 set_vfta:
5141         /* Set all bits in the VLAN filter table array */
5142         for (i = E1000_VLAN_FILTER_TBL_SIZE; i--;)
5143                 hw->mac.ops.write_vfta(hw, i, ~0U);
5144
5145         /* Set flag so we don't redo unnecessary work */
5146         adapter->flags |= IGB_FLAG_VLAN_PROMISC;
5147
5148         return 0;
5149 }
5150
5151 #define VFTA_BLOCK_SIZE 8
5152 static void igb_scrub_vfta(struct igb_adapter *adapter, u32 vfta_offset)
5153 {
5154         struct e1000_hw *hw = &adapter->hw;
5155         u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
5156         u32 vid_start = vfta_offset * 32;
5157         u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
5158         u32 i, vid, word, bits, pf_id;
5159
5160         /* guarantee that we don't scrub out management VLAN */
5161         vid = adapter->mng_vlan_id;
5162         if (vid >= vid_start && vid < vid_end)
5163                 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5164
5165         if (!adapter->vfs_allocated_count)
5166                 goto set_vfta;
5167
5168         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
5169
5170         for (i = E1000_VLVF_ARRAY_SIZE; --i;) {
5171                 u32 vlvf = rd32(E1000_VLVF(i));
5172
5173                 /* pull VLAN ID from VLVF */
5174                 vid = vlvf & VLAN_VID_MASK;
5175
5176                 /* only concern ourselves with a certain range */
5177                 if (vid < vid_start || vid >= vid_end)
5178                         continue;
5179
5180                 if (vlvf & E1000_VLVF_VLANID_ENABLE) {
5181                         /* record VLAN ID in VFTA */
5182                         vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
5183
5184                         /* if PF is part of this then continue */
5185                         if (test_bit(vid, adapter->active_vlans))
5186                                 continue;
5187                 }
5188
5189                 /* remove PF from the pool */
5190                 bits = ~BIT(pf_id);
5191                 bits &= rd32(E1000_VLVF(i));
5192                 wr32(E1000_VLVF(i), bits);
5193         }
5194
5195 set_vfta:
5196         /* extract values from active_vlans and write back to VFTA */
5197         for (i = VFTA_BLOCK_SIZE; i--;) {
5198                 vid = (vfta_offset + i) * 32;
5199                 word = vid / BITS_PER_LONG;
5200                 bits = vid % BITS_PER_LONG;
5201
5202                 vfta[i] |= adapter->active_vlans[word] >> bits;
5203
5204                 hw->mac.ops.write_vfta(hw, vfta_offset + i, vfta[i]);
5205         }
5206 }
5207
5208 static void igb_vlan_promisc_disable(struct igb_adapter *adapter)
5209 {
5210         u32 i;
5211
5212         /* We are not in VLAN promisc, nothing to do */
5213         if (!(adapter->flags & IGB_FLAG_VLAN_PROMISC))
5214                 return;
5215
5216         /* Set flag so we don't redo unnecessary work */
5217         adapter->flags &= ~IGB_FLAG_VLAN_PROMISC;
5218
5219         for (i = 0; i < E1000_VLAN_FILTER_TBL_SIZE; i += VFTA_BLOCK_SIZE)
5220                 igb_scrub_vfta(adapter, i);
5221 }
5222
5223 /**
5224  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
5225  *  @netdev: network interface device structure
5226  *
5227  *  The set_rx_mode entry point is called whenever the unicast or multicast
5228  *  address lists or the network interface flags are updated.  This routine is
5229  *  responsible for configuring the hardware for proper unicast, multicast,
5230  *  promiscuous mode, and all-multi behavior.
5231  **/
5232 static void igb_set_rx_mode(struct net_device *netdev)
5233 {
5234         struct igb_adapter *adapter = netdev_priv(netdev);
5235         struct e1000_hw *hw = &adapter->hw;
5236         unsigned int vfn = adapter->vfs_allocated_count;
5237         u32 rctl = 0, vmolr = 0, rlpml = MAX_JUMBO_FRAME_SIZE;
5238         int count;
5239
5240         /* Check for Promiscuous and All Multicast modes */
5241         if (netdev->flags & IFF_PROMISC) {
5242                 rctl |= E1000_RCTL_UPE | E1000_RCTL_MPE;
5243                 vmolr |= E1000_VMOLR_MPME;
5244
5245                 /* enable use of UTA filter to force packets to default pool */
5246                 if (hw->mac.type == e1000_82576)
5247                         vmolr |= E1000_VMOLR_ROPE;
5248         } else {
5249                 if (netdev->flags & IFF_ALLMULTI) {
5250                         rctl |= E1000_RCTL_MPE;
5251                         vmolr |= E1000_VMOLR_MPME;
5252                 } else {
5253                         /* Write addresses to the MTA, if the attempt fails
5254                          * then we should just turn on promiscuous mode so
5255                          * that we can at least receive multicast traffic
5256                          */
5257                         count = igb_write_mc_addr_list(netdev);
5258                         if (count < 0) {
5259                                 rctl |= E1000_RCTL_MPE;
5260                                 vmolr |= E1000_VMOLR_MPME;
5261                         } else if (count) {
5262                                 vmolr |= E1000_VMOLR_ROMPE;
5263                         }
5264                 }
5265         }
5266
5267         /* Write addresses to available RAR registers, if there is not
5268          * sufficient space to store all the addresses then enable
5269          * unicast promiscuous mode
5270          */
5271         if (__dev_uc_sync(netdev, igb_uc_sync, igb_uc_unsync)) {
5272                 rctl |= E1000_RCTL_UPE;
5273                 vmolr |= E1000_VMOLR_ROPE;
5274         }
5275
5276         /* enable VLAN filtering by default */
5277         rctl |= E1000_RCTL_VFE;
5278
5279         /* disable VLAN filtering for modes that require it */
5280         if ((netdev->flags & IFF_PROMISC) ||
5281             (netdev->features & NETIF_F_RXALL)) {
5282                 /* if we fail to set all rules then just clear VFE */
5283                 if (igb_vlan_promisc_enable(adapter))
5284                         rctl &= ~E1000_RCTL_VFE;
5285         } else {
5286                 igb_vlan_promisc_disable(adapter);
5287         }
5288
5289         /* update state of unicast, multicast, and VLAN filtering modes */
5290         rctl |= rd32(E1000_RCTL) & ~(E1000_RCTL_UPE | E1000_RCTL_MPE |
5291                                      E1000_RCTL_VFE);
5292         wr32(E1000_RCTL, rctl);
5293
5294 #if (PAGE_SIZE < 8192)
5295         if (!adapter->vfs_allocated_count) {
5296                 if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5297                         rlpml = IGB_MAX_FRAME_BUILD_SKB;
5298         }
5299 #endif
5300         wr32(E1000_RLPML, rlpml);
5301
5302         /* In order to support SR-IOV and eventually VMDq it is necessary to set
5303          * the VMOLR to enable the appropriate modes.  Without this workaround
5304          * we will have issues with VLAN tag stripping not being done for frames
5305          * that are only arriving because we are the default pool
5306          */
5307         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
5308                 return;
5309
5310         /* set UTA to appropriate mode */
5311         igb_set_uta(adapter, !!(vmolr & E1000_VMOLR_ROPE));
5312
5313         vmolr |= rd32(E1000_VMOLR(vfn)) &
5314                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
5315
5316         /* enable Rx jumbo frames, restrict as needed to support build_skb */
5317         vmolr &= ~E1000_VMOLR_RLPML_MASK;
5318 #if (PAGE_SIZE < 8192)
5319         if (adapter->max_frame_size <= IGB_MAX_FRAME_BUILD_SKB)
5320                 vmolr |= IGB_MAX_FRAME_BUILD_SKB;
5321         else
5322 #endif
5323                 vmolr |= MAX_JUMBO_FRAME_SIZE;
5324         vmolr |= E1000_VMOLR_LPE;
5325
5326         wr32(E1000_VMOLR(vfn), vmolr);
5327
5328         igb_restore_vf_multicasts(adapter);
5329 }
5330
5331 static void igb_check_wvbr(struct igb_adapter *adapter)
5332 {
5333         struct e1000_hw *hw = &adapter->hw;
5334         u32 wvbr = 0;
5335
5336         switch (hw->mac.type) {
5337         case e1000_82576:
5338         case e1000_i350:
5339                 wvbr = rd32(E1000_WVBR);
5340                 if (!wvbr)
5341                         return;
5342                 break;
5343         default:
5344                 break;
5345         }
5346
5347         adapter->wvbr |= wvbr;
5348 }
5349
5350 #define IGB_STAGGERED_QUEUE_OFFSET 8
5351
5352 static void igb_spoof_check(struct igb_adapter *adapter)
5353 {
5354         int j;
5355
5356         if (!adapter->wvbr)
5357                 return;
5358
5359         for (j = 0; j < adapter->vfs_allocated_count; j++) {
5360                 if (adapter->wvbr & BIT(j) ||
5361                     adapter->wvbr & BIT(j + IGB_STAGGERED_QUEUE_OFFSET)) {
5362                         dev_warn(&adapter->pdev->dev,
5363                                 "Spoof event(s) detected on VF %d\n", j);
5364                         adapter->wvbr &=
5365                                 ~(BIT(j) |
5366                                   BIT(j + IGB_STAGGERED_QUEUE_OFFSET));
5367                 }
5368         }
5369 }
5370
5371 /* Need to wait a few seconds after link up to get diagnostic information from
5372  * the phy
5373  */
5374 static void igb_update_phy_info(struct timer_list *t)
5375 {
5376         struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
5377         igb_get_phy_info(&adapter->hw);
5378 }
5379
5380 /**
5381  *  igb_has_link - check shared code for link and determine up/down
5382  *  @adapter: pointer to driver private info
5383  **/
5384 bool igb_has_link(struct igb_adapter *adapter)
5385 {
5386         struct e1000_hw *hw = &adapter->hw;
5387         bool link_active = false;
5388
5389         /* get_link_status is set on LSC (link status) interrupt or
5390          * rx sequence error interrupt.  get_link_status will stay
5391          * false until the e1000_check_for_link establishes link
5392          * for copper adapters ONLY
5393          */
5394         switch (hw->phy.media_type) {
5395         case e1000_media_type_copper:
5396                 if (!hw->mac.get_link_status)
5397                         return true;
5398                 fallthrough;
5399         case e1000_media_type_internal_serdes:
5400                 hw->mac.ops.check_for_link(hw);
5401                 link_active = !hw->mac.get_link_status;
5402                 break;
5403         default:
5404         case e1000_media_type_unknown:
5405                 break;
5406         }
5407
5408         if (((hw->mac.type == e1000_i210) ||
5409              (hw->mac.type == e1000_i211)) &&
5410              (hw->phy.id == I210_I_PHY_ID)) {
5411                 if (!netif_carrier_ok(adapter->netdev)) {
5412                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5413                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
5414                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
5415                         adapter->link_check_timeout = jiffies;
5416                 }
5417         }
5418
5419         return link_active;
5420 }
5421
5422 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
5423 {
5424         bool ret = false;
5425         u32 ctrl_ext, thstat;
5426
5427         /* check for thermal sensor event on i350 copper only */
5428         if (hw->mac.type == e1000_i350) {
5429                 thstat = rd32(E1000_THSTAT);
5430                 ctrl_ext = rd32(E1000_CTRL_EXT);
5431
5432                 if ((hw->phy.media_type == e1000_media_type_copper) &&
5433                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
5434                         ret = !!(thstat & event);
5435         }
5436
5437         return ret;
5438 }
5439
5440 /**
5441  *  igb_check_lvmmc - check for malformed packets received
5442  *  and indicated in LVMMC register
5443  *  @adapter: pointer to adapter
5444  **/
5445 static void igb_check_lvmmc(struct igb_adapter *adapter)
5446 {
5447         struct e1000_hw *hw = &adapter->hw;
5448         u32 lvmmc;
5449
5450         lvmmc = rd32(E1000_LVMMC);
5451         if (lvmmc) {
5452                 if (unlikely(net_ratelimit())) {
5453                         netdev_warn(adapter->netdev,
5454                                     "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
5455                                     lvmmc);
5456                 }
5457         }
5458 }
5459
5460 /**
5461  *  igb_watchdog - Timer Call-back
5462  *  @t: pointer to timer_list containing our private info pointer
5463  **/
5464 static void igb_watchdog(struct timer_list *t)
5465 {
5466         struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5467         /* Do the rest outside of interrupt context */
5468         schedule_work(&adapter->watchdog_task);
5469 }
5470
5471 static void igb_watchdog_task(struct work_struct *work)
5472 {
5473         struct igb_adapter *adapter = container_of(work,
5474                                                    struct igb_adapter,
5475                                                    watchdog_task);
5476         struct e1000_hw *hw = &adapter->hw;
5477         struct e1000_phy_info *phy = &hw->phy;
5478         struct net_device *netdev = adapter->netdev;
5479         u32 link;
5480         int i;
5481         u32 connsw;
5482         u16 phy_data, retry_count = 20;
5483
5484         link = igb_has_link(adapter);
5485
5486         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
5487                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
5488                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
5489                 else
5490                         link = false;
5491         }
5492
5493         /* Force link down if we have fiber to swap to */
5494         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5495                 if (hw->phy.media_type == e1000_media_type_copper) {
5496                         connsw = rd32(E1000_CONNSW);
5497                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
5498                                 link = 0;
5499                 }
5500         }
5501         if (link) {
5502                 /* Perform a reset if the media type changed. */
5503                 if (hw->dev_spec._82575.media_changed) {
5504                         hw->dev_spec._82575.media_changed = false;
5505                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
5506                         igb_reset(adapter);
5507                 }
5508                 /* Cancel scheduled suspend requests. */
5509                 pm_runtime_resume(netdev->dev.parent);
5510
5511                 if (!netif_carrier_ok(netdev)) {
5512                         u32 ctrl;
5513
5514                         hw->mac.ops.get_speed_and_duplex(hw,
5515                                                          &adapter->link_speed,
5516                                                          &adapter->link_duplex);
5517
5518                         ctrl = rd32(E1000_CTRL);
5519                         /* Links status message must follow this format */
5520                         netdev_info(netdev,
5521                                "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5522                                netdev->name,
5523                                adapter->link_speed,
5524                                adapter->link_duplex == FULL_DUPLEX ?
5525                                "Full" : "Half",
5526                                (ctrl & E1000_CTRL_TFCE) &&
5527                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
5528                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
5529                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
5530
5531                         /* disable EEE if enabled */
5532                         if ((adapter->flags & IGB_FLAG_EEE) &&
5533                                 (adapter->link_duplex == HALF_DUPLEX)) {
5534                                 dev_info(&adapter->pdev->dev,
5535                                 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
5536                                 adapter->hw.dev_spec._82575.eee_disable = true;
5537                                 adapter->flags &= ~IGB_FLAG_EEE;
5538                         }
5539
5540                         /* check if SmartSpeed worked */
5541                         igb_check_downshift(hw);
5542                         if (phy->speed_downgraded)
5543                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
5544
5545                         /* check for thermal sensor event */
5546                         if (igb_thermal_sensor_event(hw,
5547                             E1000_THSTAT_LINK_THROTTLE))
5548                                 netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
5549
5550                         /* adjust timeout factor according to speed/duplex */
5551                         adapter->tx_timeout_factor = 1;
5552                         switch (adapter->link_speed) {
5553                         case SPEED_10:
5554                                 adapter->tx_timeout_factor = 14;
5555                                 break;
5556                         case SPEED_100:
5557                                 /* maybe add some timeout factor ? */
5558                                 break;
5559                         }
5560
5561                         if (adapter->link_speed != SPEED_1000 ||
5562                             !hw->phy.ops.read_reg)
5563                                 goto no_wait;
5564
5565                         /* wait for Remote receiver status OK */
5566 retry_read_status:
5567                         if (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
5568                                               &phy_data)) {
5569                                 if (!(phy_data & SR_1000T_REMOTE_RX_STATUS) &&
5570                                     retry_count) {
5571                                         msleep(100);
5572                                         retry_count--;
5573                                         goto retry_read_status;
5574                                 } else if (!retry_count) {
5575                                         dev_err(&adapter->pdev->dev, "exceed max 2 second\n");
5576                                 }
5577                         } else {
5578                                 dev_err(&adapter->pdev->dev, "read 1000Base-T Status Reg\n");
5579                         }
5580 no_wait:
5581                         netif_carrier_on(netdev);
5582
5583                         igb_ping_all_vfs(adapter);
5584                         igb_check_vf_rate_limit(adapter);
5585
5586                         /* link state has changed, schedule phy info update */
5587                         if (!test_bit(__IGB_DOWN, &adapter->state))
5588                                 mod_timer(&adapter->phy_info_timer,
5589                                           round_jiffies(jiffies + 2 * HZ));
5590                 }
5591         } else {
5592                 if (netif_carrier_ok(netdev)) {
5593                         adapter->link_speed = 0;
5594                         adapter->link_duplex = 0;
5595
5596                         /* check for thermal sensor event */
5597                         if (igb_thermal_sensor_event(hw,
5598                             E1000_THSTAT_PWR_DOWN)) {
5599                                 netdev_err(netdev, "The network adapter was stopped because it overheated\n");
5600                         }
5601
5602                         /* Links status message must follow this format */
5603                         netdev_info(netdev, "igb: %s NIC Link is Down\n",
5604                                netdev->name);
5605                         netif_carrier_off(netdev);
5606
5607                         igb_ping_all_vfs(adapter);
5608
5609                         /* link state has changed, schedule phy info update */
5610                         if (!test_bit(__IGB_DOWN, &adapter->state))
5611                                 mod_timer(&adapter->phy_info_timer,
5612                                           round_jiffies(jiffies + 2 * HZ));
5613
5614                         /* link is down, time to check for alternate media */
5615                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
5616                                 igb_check_swap_media(adapter);
5617                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5618                                         schedule_work(&adapter->reset_task);
5619                                         /* return immediately */
5620                                         return;
5621                                 }
5622                         }
5623                         pm_schedule_suspend(netdev->dev.parent,
5624                                             MSEC_PER_SEC * 5);
5625
5626                 /* also check for alternate media here */
5627                 } else if (!netif_carrier_ok(netdev) &&
5628                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
5629                         igb_check_swap_media(adapter);
5630                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
5631                                 schedule_work(&adapter->reset_task);
5632                                 /* return immediately */
5633                                 return;
5634                         }
5635                 }
5636         }
5637
5638         spin_lock(&adapter->stats64_lock);
5639         igb_update_stats(adapter);
5640         spin_unlock(&adapter->stats64_lock);
5641
5642         for (i = 0; i < adapter->num_tx_queues; i++) {
5643                 struct igb_ring *tx_ring = adapter->tx_ring[i];
5644                 if (!netif_carrier_ok(netdev)) {
5645                         /* We've lost link, so the controller stops DMA,
5646                          * but we've got queued Tx work that's never going
5647                          * to get done, so reset controller to flush Tx.
5648                          * (Do the reset outside of interrupt context).
5649                          */
5650                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
5651                                 adapter->tx_timeout_count++;
5652                                 schedule_work(&adapter->reset_task);
5653                                 /* return immediately since reset is imminent */
5654                                 return;
5655                         }
5656                 }
5657
5658                 /* Force detection of hung controller every watchdog period */
5659                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
5660         }
5661
5662         /* Cause software interrupt to ensure Rx ring is cleaned */
5663         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
5664                 u32 eics = 0;
5665
5666                 for (i = 0; i < adapter->num_q_vectors; i++)
5667                         eics |= adapter->q_vector[i]->eims_value;
5668                 wr32(E1000_EICS, eics);
5669         } else {
5670                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
5671         }
5672
5673         igb_spoof_check(adapter);
5674         igb_ptp_rx_hang(adapter);
5675         igb_ptp_tx_hang(adapter);
5676
5677         /* Check LVMMC register on i350/i354 only */
5678         if ((adapter->hw.mac.type == e1000_i350) ||
5679             (adapter->hw.mac.type == e1000_i354))
5680                 igb_check_lvmmc(adapter);
5681
5682         /* Reset the timer */
5683         if (!test_bit(__IGB_DOWN, &adapter->state)) {
5684                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
5685                         mod_timer(&adapter->watchdog_timer,
5686                                   round_jiffies(jiffies +  HZ));
5687                 else
5688                         mod_timer(&adapter->watchdog_timer,
5689                                   round_jiffies(jiffies + 2 * HZ));
5690         }
5691 }
5692
5693 enum latency_range {
5694         lowest_latency = 0,
5695         low_latency = 1,
5696         bulk_latency = 2,
5697         latency_invalid = 255
5698 };
5699
5700 /**
5701  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
5702  *  @q_vector: pointer to q_vector
5703  *
5704  *  Stores a new ITR value based on strictly on packet size.  This
5705  *  algorithm is less sophisticated than that used in igb_update_itr,
5706  *  due to the difficulty of synchronizing statistics across multiple
5707  *  receive rings.  The divisors and thresholds used by this function
5708  *  were determined based on theoretical maximum wire speed and testing
5709  *  data, in order to minimize response time while increasing bulk
5710  *  throughput.
5711  *  This functionality is controlled by ethtool's coalescing settings.
5712  *  NOTE:  This function is called only when operating in a multiqueue
5713  *         receive environment.
5714  **/
5715 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
5716 {
5717         int new_val = q_vector->itr_val;
5718         int avg_wire_size = 0;
5719         struct igb_adapter *adapter = q_vector->adapter;
5720         unsigned int packets;
5721
5722         /* For non-gigabit speeds, just fix the interrupt rate at 4000
5723          * ints/sec - ITR timer value of 120 ticks.
5724          */
5725         if (adapter->link_speed != SPEED_1000) {
5726                 new_val = IGB_4K_ITR;
5727                 goto set_itr_val;
5728         }
5729
5730         packets = q_vector->rx.total_packets;
5731         if (packets)
5732                 avg_wire_size = q_vector->rx.total_bytes / packets;
5733
5734         packets = q_vector->tx.total_packets;
5735         if (packets)
5736                 avg_wire_size = max_t(u32, avg_wire_size,
5737                                       q_vector->tx.total_bytes / packets);
5738
5739         /* if avg_wire_size isn't set no work was done */
5740         if (!avg_wire_size)
5741                 goto clear_counts;
5742
5743         /* Add 24 bytes to size to account for CRC, preamble, and gap */
5744         avg_wire_size += 24;
5745
5746         /* Don't starve jumbo frames */
5747         avg_wire_size = min(avg_wire_size, 3000);
5748
5749         /* Give a little boost to mid-size frames */
5750         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
5751                 new_val = avg_wire_size / 3;
5752         else
5753                 new_val = avg_wire_size / 2;
5754
5755         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5756         if (new_val < IGB_20K_ITR &&
5757             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5758              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5759                 new_val = IGB_20K_ITR;
5760
5761 set_itr_val:
5762         if (new_val != q_vector->itr_val) {
5763                 q_vector->itr_val = new_val;
5764                 q_vector->set_itr = 1;
5765         }
5766 clear_counts:
5767         q_vector->rx.total_bytes = 0;
5768         q_vector->rx.total_packets = 0;
5769         q_vector->tx.total_bytes = 0;
5770         q_vector->tx.total_packets = 0;
5771 }
5772
5773 /**
5774  *  igb_update_itr - update the dynamic ITR value based on statistics
5775  *  @q_vector: pointer to q_vector
5776  *  @ring_container: ring info to update the itr for
5777  *
5778  *  Stores a new ITR value based on packets and byte
5779  *  counts during the last interrupt.  The advantage of per interrupt
5780  *  computation is faster updates and more accurate ITR for the current
5781  *  traffic pattern.  Constants in this function were computed
5782  *  based on theoretical maximum wire speed and thresholds were set based
5783  *  on testing data as well as attempting to minimize response time
5784  *  while increasing bulk throughput.
5785  *  This functionality is controlled by ethtool's coalescing settings.
5786  *  NOTE:  These calculations are only valid when operating in a single-
5787  *         queue environment.
5788  **/
5789 static void igb_update_itr(struct igb_q_vector *q_vector,
5790                            struct igb_ring_container *ring_container)
5791 {
5792         unsigned int packets = ring_container->total_packets;
5793         unsigned int bytes = ring_container->total_bytes;
5794         u8 itrval = ring_container->itr;
5795
5796         /* no packets, exit with status unchanged */
5797         if (packets == 0)
5798                 return;
5799
5800         switch (itrval) {
5801         case lowest_latency:
5802                 /* handle TSO and jumbo frames */
5803                 if (bytes/packets > 8000)
5804                         itrval = bulk_latency;
5805                 else if ((packets < 5) && (bytes > 512))
5806                         itrval = low_latency;
5807                 break;
5808         case low_latency:  /* 50 usec aka 20000 ints/s */
5809                 if (bytes > 10000) {
5810                         /* this if handles the TSO accounting */
5811                         if (bytes/packets > 8000)
5812                                 itrval = bulk_latency;
5813                         else if ((packets < 10) || ((bytes/packets) > 1200))
5814                                 itrval = bulk_latency;
5815                         else if ((packets > 35))
5816                                 itrval = lowest_latency;
5817                 } else if (bytes/packets > 2000) {
5818                         itrval = bulk_latency;
5819                 } else if (packets <= 2 && bytes < 512) {
5820                         itrval = lowest_latency;
5821                 }
5822                 break;
5823         case bulk_latency: /* 250 usec aka 4000 ints/s */
5824                 if (bytes > 25000) {
5825                         if (packets > 35)
5826                                 itrval = low_latency;
5827                 } else if (bytes < 1500) {
5828                         itrval = low_latency;
5829                 }
5830                 break;
5831         }
5832
5833         /* clear work counters since we have the values we need */
5834         ring_container->total_bytes = 0;
5835         ring_container->total_packets = 0;
5836
5837         /* write updated itr to ring container */
5838         ring_container->itr = itrval;
5839 }
5840
5841 static void igb_set_itr(struct igb_q_vector *q_vector)
5842 {
5843         struct igb_adapter *adapter = q_vector->adapter;
5844         u32 new_itr = q_vector->itr_val;
5845         u8 current_itr = 0;
5846
5847         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5848         if (adapter->link_speed != SPEED_1000) {
5849                 current_itr = 0;
5850                 new_itr = IGB_4K_ITR;
5851                 goto set_itr_now;
5852         }
5853
5854         igb_update_itr(q_vector, &q_vector->tx);
5855         igb_update_itr(q_vector, &q_vector->rx);
5856
5857         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5858
5859         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5860         if (current_itr == lowest_latency &&
5861             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5862              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5863                 current_itr = low_latency;
5864
5865         switch (current_itr) {
5866         /* counts and packets in update_itr are dependent on these numbers */
5867         case lowest_latency:
5868                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5869                 break;
5870         case low_latency:
5871                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5872                 break;
5873         case bulk_latency:
5874                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5875                 break;
5876         default:
5877                 break;
5878         }
5879
5880 set_itr_now:
5881         if (new_itr != q_vector->itr_val) {
5882                 /* this attempts to bias the interrupt rate towards Bulk
5883                  * by adding intermediate steps when interrupt rate is
5884                  * increasing
5885                  */
5886                 new_itr = new_itr > q_vector->itr_val ?
5887                           max((new_itr * q_vector->itr_val) /
5888                           (new_itr + (q_vector->itr_val >> 2)),
5889                           new_itr) : new_itr;
5890                 /* Don't write the value here; it resets the adapter's
5891                  * internal timer, and causes us to delay far longer than
5892                  * we should between interrupts.  Instead, we write the ITR
5893                  * value at the beginning of the next interrupt so the timing
5894                  * ends up being correct.
5895                  */
5896                 q_vector->itr_val = new_itr;
5897                 q_vector->set_itr = 1;
5898         }
5899 }
5900
5901 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring,
5902                             struct igb_tx_buffer *first,
5903                             u32 vlan_macip_lens, u32 type_tucmd,
5904                             u32 mss_l4len_idx)
5905 {
5906         struct e1000_adv_tx_context_desc *context_desc;
5907         u16 i = tx_ring->next_to_use;
5908         struct timespec64 ts;
5909
5910         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5911
5912         i++;
5913         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5914
5915         /* set bits to identify this as an advanced context descriptor */
5916         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5917
5918         /* For 82575, context index must be unique per ring. */
5919         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5920                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5921
5922         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5923         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5924         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5925
5926         /* We assume there is always a valid tx time available. Invalid times
5927          * should have been handled by the upper layers.
5928          */
5929         if (tx_ring->launchtime_enable) {
5930                 ts = ktime_to_timespec64(first->skb->tstamp);
5931                 skb_txtime_consumed(first->skb);
5932                 context_desc->seqnum_seed = cpu_to_le32(ts.tv_nsec / 32);
5933         } else {
5934                 context_desc->seqnum_seed = 0;
5935         }
5936 }
5937
5938 static int igb_tso(struct igb_ring *tx_ring,
5939                    struct igb_tx_buffer *first,
5940                    u8 *hdr_len)
5941 {
5942         u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
5943         struct sk_buff *skb = first->skb;
5944         union {
5945                 struct iphdr *v4;
5946                 struct ipv6hdr *v6;
5947                 unsigned char *hdr;
5948         } ip;
5949         union {
5950                 struct tcphdr *tcp;
5951                 struct udphdr *udp;
5952                 unsigned char *hdr;
5953         } l4;
5954         u32 paylen, l4_offset;
5955         int err;
5956
5957         if (skb->ip_summed != CHECKSUM_PARTIAL)
5958                 return 0;
5959
5960         if (!skb_is_gso(skb))
5961                 return 0;
5962
5963         err = skb_cow_head(skb, 0);
5964         if (err < 0)
5965                 return err;
5966
5967         ip.hdr = skb_network_header(skb);
5968         l4.hdr = skb_checksum_start(skb);
5969
5970         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5971         type_tucmd = (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) ?
5972                       E1000_ADVTXD_TUCMD_L4T_UDP : E1000_ADVTXD_TUCMD_L4T_TCP;
5973
5974         /* initialize outer IP header fields */
5975         if (ip.v4->version == 4) {
5976                 unsigned char *csum_start = skb_checksum_start(skb);
5977                 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
5978
5979                 /* IP header will have to cancel out any data that
5980                  * is not a part of the outer IP header
5981                  */
5982                 ip.v4->check = csum_fold(csum_partial(trans_start,
5983                                                       csum_start - trans_start,
5984                                                       0));
5985                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5986
5987                 ip.v4->tot_len = 0;
5988                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5989                                    IGB_TX_FLAGS_CSUM |
5990                                    IGB_TX_FLAGS_IPV4;
5991         } else {
5992                 ip.v6->payload_len = 0;
5993                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5994                                    IGB_TX_FLAGS_CSUM;
5995         }
5996
5997         /* determine offset of inner transport header */
5998         l4_offset = l4.hdr - skb->data;
5999
6000         /* remove payload length from inner checksum */
6001         paylen = skb->len - l4_offset;
6002         if (type_tucmd & E1000_ADVTXD_TUCMD_L4T_TCP) {
6003                 /* compute length of segmentation header */
6004                 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
6005                 csum_replace_by_diff(&l4.tcp->check,
6006                         (__force __wsum)htonl(paylen));
6007         } else {
6008                 /* compute length of segmentation header */
6009                 *hdr_len = sizeof(*l4.udp) + l4_offset;
6010                 csum_replace_by_diff(&l4.udp->check,
6011                                      (__force __wsum)htonl(paylen));
6012         }
6013
6014         /* update gso size and bytecount with header size */
6015         first->gso_segs = skb_shinfo(skb)->gso_segs;
6016         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6017
6018         /* MSS L4LEN IDX */
6019         mss_l4len_idx = (*hdr_len - l4_offset) << E1000_ADVTXD_L4LEN_SHIFT;
6020         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
6021
6022         /* VLAN MACLEN IPLEN */
6023         vlan_macip_lens = l4.hdr - ip.hdr;
6024         vlan_macip_lens |= (ip.hdr - skb->data) << E1000_ADVTXD_MACLEN_SHIFT;
6025         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6026
6027         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens,
6028                         type_tucmd, mss_l4len_idx);
6029
6030         return 1;
6031 }
6032
6033 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
6034 {
6035         struct sk_buff *skb = first->skb;
6036         u32 vlan_macip_lens = 0;
6037         u32 type_tucmd = 0;
6038
6039         if (skb->ip_summed != CHECKSUM_PARTIAL) {
6040 csum_failed:
6041                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN) &&
6042                     !tx_ring->launchtime_enable)
6043                         return;
6044                 goto no_csum;
6045         }
6046
6047         switch (skb->csum_offset) {
6048         case offsetof(struct tcphdr, check):
6049                 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
6050                 fallthrough;
6051         case offsetof(struct udphdr, check):
6052                 break;
6053         case offsetof(struct sctphdr, checksum):
6054                 /* validate that this is actually an SCTP request */
6055                 if (skb_csum_is_sctp(skb)) {
6056                         type_tucmd = E1000_ADVTXD_TUCMD_L4T_SCTP;
6057                         break;
6058                 }
6059                 fallthrough;
6060         default:
6061                 skb_checksum_help(skb);
6062                 goto csum_failed;
6063         }
6064
6065         /* update TX checksum flag */
6066         first->tx_flags |= IGB_TX_FLAGS_CSUM;
6067         vlan_macip_lens = skb_checksum_start_offset(skb) -
6068                           skb_network_offset(skb);
6069 no_csum:
6070         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
6071         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
6072
6073         igb_tx_ctxtdesc(tx_ring, first, vlan_macip_lens, type_tucmd, 0);
6074 }
6075
6076 #define IGB_SET_FLAG(_input, _flag, _result) \
6077         ((_flag <= _result) ? \
6078          ((u32)(_input & _flag) * (_result / _flag)) : \
6079          ((u32)(_input & _flag) / (_flag / _result)))
6080
6081 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6082 {
6083         /* set type for advanced descriptor with frame checksum insertion */
6084         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
6085                        E1000_ADVTXD_DCMD_DEXT |
6086                        E1000_ADVTXD_DCMD_IFCS;
6087
6088         /* set HW vlan bit if vlan is present */
6089         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
6090                                  (E1000_ADVTXD_DCMD_VLE));
6091
6092         /* set segmentation bits for TSO */
6093         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
6094                                  (E1000_ADVTXD_DCMD_TSE));
6095
6096         /* set timestamp bit if present */
6097         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
6098                                  (E1000_ADVTXD_MAC_TSTAMP));
6099
6100         /* insert frame checksum */
6101         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
6102
6103         return cmd_type;
6104 }
6105
6106 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
6107                                  union e1000_adv_tx_desc *tx_desc,
6108                                  u32 tx_flags, unsigned int paylen)
6109 {
6110         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
6111
6112         /* 82575 requires a unique index per ring */
6113         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6114                 olinfo_status |= tx_ring->reg_idx << 4;
6115
6116         /* insert L4 checksum */
6117         olinfo_status |= IGB_SET_FLAG(tx_flags,
6118                                       IGB_TX_FLAGS_CSUM,
6119                                       (E1000_TXD_POPTS_TXSM << 8));
6120
6121         /* insert IPv4 checksum */
6122         olinfo_status |= IGB_SET_FLAG(tx_flags,
6123                                       IGB_TX_FLAGS_IPV4,
6124                                       (E1000_TXD_POPTS_IXSM << 8));
6125
6126         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6127 }
6128
6129 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6130 {
6131         struct net_device *netdev = tx_ring->netdev;
6132
6133         netif_stop_subqueue(netdev, tx_ring->queue_index);
6134
6135         /* Herbert's original patch had:
6136          *  smp_mb__after_netif_stop_queue();
6137          * but since that doesn't exist yet, just open code it.
6138          */
6139         smp_mb();
6140
6141         /* We need to check again in a case another CPU has just
6142          * made room available.
6143          */
6144         if (igb_desc_unused(tx_ring) < size)
6145                 return -EBUSY;
6146
6147         /* A reprieve! */
6148         netif_wake_subqueue(netdev, tx_ring->queue_index);
6149
6150         u64_stats_update_begin(&tx_ring->tx_syncp2);
6151         tx_ring->tx_stats.restart_queue2++;
6152         u64_stats_update_end(&tx_ring->tx_syncp2);
6153
6154         return 0;
6155 }
6156
6157 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
6158 {
6159         if (igb_desc_unused(tx_ring) >= size)
6160                 return 0;
6161         return __igb_maybe_stop_tx(tx_ring, size);
6162 }
6163
6164 static int igb_tx_map(struct igb_ring *tx_ring,
6165                       struct igb_tx_buffer *first,
6166                       const u8 hdr_len)
6167 {
6168         struct sk_buff *skb = first->skb;
6169         struct igb_tx_buffer *tx_buffer;
6170         union e1000_adv_tx_desc *tx_desc;
6171         skb_frag_t *frag;
6172         dma_addr_t dma;
6173         unsigned int data_len, size;
6174         u32 tx_flags = first->tx_flags;
6175         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
6176         u16 i = tx_ring->next_to_use;
6177
6178         tx_desc = IGB_TX_DESC(tx_ring, i);
6179
6180         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
6181
6182         size = skb_headlen(skb);
6183         data_len = skb->data_len;
6184
6185         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6186
6187         tx_buffer = first;
6188
6189         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6190                 if (dma_mapping_error(tx_ring->dev, dma))
6191                         goto dma_error;
6192
6193                 /* record length, and DMA address */
6194                 dma_unmap_len_set(tx_buffer, len, size);
6195                 dma_unmap_addr_set(tx_buffer, dma, dma);
6196
6197                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6198
6199                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
6200                         tx_desc->read.cmd_type_len =
6201                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
6202
6203                         i++;
6204                         tx_desc++;
6205                         if (i == tx_ring->count) {
6206                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6207                                 i = 0;
6208                         }
6209                         tx_desc->read.olinfo_status = 0;
6210
6211                         dma += IGB_MAX_DATA_PER_TXD;
6212                         size -= IGB_MAX_DATA_PER_TXD;
6213
6214                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
6215                 }
6216
6217                 if (likely(!data_len))
6218                         break;
6219
6220                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6221
6222                 i++;
6223                 tx_desc++;
6224                 if (i == tx_ring->count) {
6225                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6226                         i = 0;
6227                 }
6228                 tx_desc->read.olinfo_status = 0;
6229
6230                 size = skb_frag_size(frag);
6231                 data_len -= size;
6232
6233                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
6234                                        size, DMA_TO_DEVICE);
6235
6236                 tx_buffer = &tx_ring->tx_buffer_info[i];
6237         }
6238
6239         /* write last descriptor with RS and EOP bits */
6240         cmd_type |= size | IGB_TXD_DCMD;
6241         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6242
6243         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6244
6245         /* set the timestamp */
6246         first->time_stamp = jiffies;
6247
6248         skb_tx_timestamp(skb);
6249
6250         /* Force memory writes to complete before letting h/w know there
6251          * are new descriptors to fetch.  (Only applicable for weak-ordered
6252          * memory model archs, such as IA-64).
6253          *
6254          * We also need this memory barrier to make certain all of the
6255          * status bits have been updated before next_to_watch is written.
6256          */
6257         dma_wmb();
6258
6259         /* set next_to_watch value indicating a packet is present */
6260         first->next_to_watch = tx_desc;
6261
6262         i++;
6263         if (i == tx_ring->count)
6264                 i = 0;
6265
6266         tx_ring->next_to_use = i;
6267
6268         /* Make sure there is space in the ring for the next send. */
6269         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6270
6271         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more()) {
6272                 writel(i, tx_ring->tail);
6273         }
6274         return 0;
6275
6276 dma_error:
6277         dev_err(tx_ring->dev, "TX DMA map failed\n");
6278         tx_buffer = &tx_ring->tx_buffer_info[i];
6279
6280         /* clear dma mappings for failed tx_buffer_info map */
6281         while (tx_buffer != first) {
6282                 if (dma_unmap_len(tx_buffer, len))
6283                         dma_unmap_page(tx_ring->dev,
6284                                        dma_unmap_addr(tx_buffer, dma),
6285                                        dma_unmap_len(tx_buffer, len),
6286                                        DMA_TO_DEVICE);
6287                 dma_unmap_len_set(tx_buffer, len, 0);
6288
6289                 if (i-- == 0)
6290                         i += tx_ring->count;
6291                 tx_buffer = &tx_ring->tx_buffer_info[i];
6292         }
6293
6294         if (dma_unmap_len(tx_buffer, len))
6295                 dma_unmap_single(tx_ring->dev,
6296                                  dma_unmap_addr(tx_buffer, dma),
6297                                  dma_unmap_len(tx_buffer, len),
6298                                  DMA_TO_DEVICE);
6299         dma_unmap_len_set(tx_buffer, len, 0);
6300
6301         dev_kfree_skb_any(tx_buffer->skb);
6302         tx_buffer->skb = NULL;
6303
6304         tx_ring->next_to_use = i;
6305
6306         return -1;
6307 }
6308
6309 int igb_xmit_xdp_ring(struct igb_adapter *adapter,
6310                       struct igb_ring *tx_ring,
6311                       struct xdp_frame *xdpf)
6312 {
6313         struct skb_shared_info *sinfo = xdp_get_shared_info_from_frame(xdpf);
6314         u8 nr_frags = unlikely(xdp_frame_has_frags(xdpf)) ? sinfo->nr_frags : 0;
6315         u16 count, i, index = tx_ring->next_to_use;
6316         struct igb_tx_buffer *tx_head = &tx_ring->tx_buffer_info[index];
6317         struct igb_tx_buffer *tx_buffer = tx_head;
6318         union e1000_adv_tx_desc *tx_desc = IGB_TX_DESC(tx_ring, index);
6319         u32 len = xdpf->len, cmd_type, olinfo_status;
6320         void *data = xdpf->data;
6321
6322         count = TXD_USE_COUNT(len);
6323         for (i = 0; i < nr_frags; i++)
6324                 count += TXD_USE_COUNT(skb_frag_size(&sinfo->frags[i]));
6325
6326         if (igb_maybe_stop_tx(tx_ring, count + 3))
6327                 return IGB_XDP_CONSUMED;
6328
6329         i = 0;
6330         /* record the location of the first descriptor for this packet */
6331         tx_head->bytecount = xdp_get_frame_len(xdpf);
6332         tx_head->type = IGB_TYPE_XDP;
6333         tx_head->gso_segs = 1;
6334         tx_head->xdpf = xdpf;
6335
6336         olinfo_status = tx_head->bytecount << E1000_ADVTXD_PAYLEN_SHIFT;
6337         /* 82575 requires a unique index per ring */
6338         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
6339                 olinfo_status |= tx_ring->reg_idx << 4;
6340         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6341
6342         for (;;) {
6343                 dma_addr_t dma;
6344
6345                 dma = dma_map_single(tx_ring->dev, data, len, DMA_TO_DEVICE);
6346                 if (dma_mapping_error(tx_ring->dev, dma))
6347                         goto unmap;
6348
6349                 /* record length, and DMA address */
6350                 dma_unmap_len_set(tx_buffer, len, len);
6351                 dma_unmap_addr_set(tx_buffer, dma, dma);
6352
6353                 /* put descriptor type bits */
6354                 cmd_type = E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_DEXT |
6355                            E1000_ADVTXD_DCMD_IFCS | len;
6356
6357                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6358                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6359
6360                 tx_buffer->protocol = 0;
6361
6362                 if (++index == tx_ring->count)
6363                         index = 0;
6364
6365                 if (i == nr_frags)
6366                         break;
6367
6368                 tx_buffer = &tx_ring->tx_buffer_info[index];
6369                 tx_desc = IGB_TX_DESC(tx_ring, index);
6370                 tx_desc->read.olinfo_status = 0;
6371
6372                 data = skb_frag_address(&sinfo->frags[i]);
6373                 len = skb_frag_size(&sinfo->frags[i]);
6374                 i++;
6375         }
6376         tx_desc->read.cmd_type_len |= cpu_to_le32(IGB_TXD_DCMD);
6377
6378         netdev_tx_sent_queue(txring_txq(tx_ring), tx_head->bytecount);
6379         /* set the timestamp */
6380         tx_head->time_stamp = jiffies;
6381
6382         /* Avoid any potential race with xdp_xmit and cleanup */
6383         smp_wmb();
6384
6385         /* set next_to_watch value indicating a packet is present */
6386         tx_head->next_to_watch = tx_desc;
6387         tx_ring->next_to_use = index;
6388
6389         /* Make sure there is space in the ring for the next send. */
6390         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
6391
6392         if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
6393                 writel(index, tx_ring->tail);
6394
6395         return IGB_XDP_TX;
6396
6397 unmap:
6398         for (;;) {
6399                 tx_buffer = &tx_ring->tx_buffer_info[index];
6400                 if (dma_unmap_len(tx_buffer, len))
6401                         dma_unmap_page(tx_ring->dev,
6402                                        dma_unmap_addr(tx_buffer, dma),
6403                                        dma_unmap_len(tx_buffer, len),
6404                                        DMA_TO_DEVICE);
6405                 dma_unmap_len_set(tx_buffer, len, 0);
6406                 if (tx_buffer == tx_head)
6407                         break;
6408
6409                 if (!index)
6410                         index += tx_ring->count;
6411                 index--;
6412         }
6413
6414         return IGB_XDP_CONSUMED;
6415 }
6416
6417 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
6418                                 struct igb_ring *tx_ring)
6419 {
6420         struct igb_tx_buffer *first;
6421         int tso;
6422         u32 tx_flags = 0;
6423         unsigned short f;
6424         u16 count = TXD_USE_COUNT(skb_headlen(skb));
6425         __be16 protocol = vlan_get_protocol(skb);
6426         u8 hdr_len = 0;
6427
6428         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
6429          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
6430          *       + 2 desc gap to keep tail from touching head,
6431          *       + 1 desc for context descriptor,
6432          * otherwise try next time
6433          */
6434         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
6435                 count += TXD_USE_COUNT(skb_frag_size(
6436                                                 &skb_shinfo(skb)->frags[f]));
6437
6438         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
6439                 /* this is a hard error */
6440                 return NETDEV_TX_BUSY;
6441         }
6442
6443         /* record the location of the first descriptor for this packet */
6444         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
6445         first->type = IGB_TYPE_SKB;
6446         first->skb = skb;
6447         first->bytecount = skb->len;
6448         first->gso_segs = 1;
6449
6450         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
6451                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6452
6453                 if (adapter->tstamp_config.tx_type == HWTSTAMP_TX_ON &&
6454                     !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS,
6455                                            &adapter->state)) {
6456                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
6457                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
6458
6459                         adapter->ptp_tx_skb = skb_get(skb);
6460                         adapter->ptp_tx_start = jiffies;
6461                         if (adapter->hw.mac.type == e1000_82576)
6462                                 schedule_work(&adapter->ptp_tx_work);
6463                 } else {
6464                         adapter->tx_hwtstamp_skipped++;
6465                 }
6466         }
6467
6468         if (skb_vlan_tag_present(skb)) {
6469                 tx_flags |= IGB_TX_FLAGS_VLAN;
6470                 tx_flags |= (skb_vlan_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
6471         }
6472
6473         /* record initial flags and protocol */
6474         first->tx_flags = tx_flags;
6475         first->protocol = protocol;
6476
6477         tso = igb_tso(tx_ring, first, &hdr_len);
6478         if (tso < 0)
6479                 goto out_drop;
6480         else if (!tso)
6481                 igb_tx_csum(tx_ring, first);
6482
6483         if (igb_tx_map(tx_ring, first, hdr_len))
6484                 goto cleanup_tx_tstamp;
6485
6486         return NETDEV_TX_OK;
6487
6488 out_drop:
6489         dev_kfree_skb_any(first->skb);
6490         first->skb = NULL;
6491 cleanup_tx_tstamp:
6492         if (unlikely(tx_flags & IGB_TX_FLAGS_TSTAMP)) {
6493                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
6494
6495                 dev_kfree_skb_any(adapter->ptp_tx_skb);
6496                 adapter->ptp_tx_skb = NULL;
6497                 if (adapter->hw.mac.type == e1000_82576)
6498                         cancel_work_sync(&adapter->ptp_tx_work);
6499                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
6500         }
6501
6502         return NETDEV_TX_OK;
6503 }
6504
6505 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
6506                                                     struct sk_buff *skb)
6507 {
6508         unsigned int r_idx = skb->queue_mapping;
6509
6510         if (r_idx >= adapter->num_tx_queues)
6511                 r_idx = r_idx % adapter->num_tx_queues;
6512
6513         return adapter->tx_ring[r_idx];
6514 }
6515
6516 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
6517                                   struct net_device *netdev)
6518 {
6519         struct igb_adapter *adapter = netdev_priv(netdev);
6520
6521         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
6522          * in order to meet this minimum size requirement.
6523          */
6524         if (skb_put_padto(skb, 17))
6525                 return NETDEV_TX_OK;
6526
6527         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
6528 }
6529
6530 /**
6531  *  igb_tx_timeout - Respond to a Tx Hang
6532  *  @netdev: network interface device structure
6533  *  @txqueue: number of the Tx queue that hung (unused)
6534  **/
6535 static void igb_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6536 {
6537         struct igb_adapter *adapter = netdev_priv(netdev);
6538         struct e1000_hw *hw = &adapter->hw;
6539
6540         /* Do the reset outside of interrupt context */
6541         adapter->tx_timeout_count++;
6542
6543         if (hw->mac.type >= e1000_82580)
6544                 hw->dev_spec._82575.global_device_reset = true;
6545
6546         schedule_work(&adapter->reset_task);
6547         wr32(E1000_EICS,
6548              (adapter->eims_enable_mask & ~adapter->eims_other));
6549 }
6550
6551 static void igb_reset_task(struct work_struct *work)
6552 {
6553         struct igb_adapter *adapter;
6554         adapter = container_of(work, struct igb_adapter, reset_task);
6555
6556         rtnl_lock();
6557         /* If we're already down or resetting, just bail */
6558         if (test_bit(__IGB_DOWN, &adapter->state) ||
6559             test_bit(__IGB_RESETTING, &adapter->state)) {
6560                 rtnl_unlock();
6561                 return;
6562         }
6563
6564         igb_dump(adapter);
6565         netdev_err(adapter->netdev, "Reset adapter\n");
6566         igb_reinit_locked(adapter);
6567         rtnl_unlock();
6568 }
6569
6570 /**
6571  *  igb_get_stats64 - Get System Network Statistics
6572  *  @netdev: network interface device structure
6573  *  @stats: rtnl_link_stats64 pointer
6574  **/
6575 static void igb_get_stats64(struct net_device *netdev,
6576                             struct rtnl_link_stats64 *stats)
6577 {
6578         struct igb_adapter *adapter = netdev_priv(netdev);
6579
6580         spin_lock(&adapter->stats64_lock);
6581         igb_update_stats(adapter);
6582         memcpy(stats, &adapter->stats64, sizeof(*stats));
6583         spin_unlock(&adapter->stats64_lock);
6584 }
6585
6586 /**
6587  *  igb_change_mtu - Change the Maximum Transfer Unit
6588  *  @netdev: network interface device structure
6589  *  @new_mtu: new value for maximum frame size
6590  *
6591  *  Returns 0 on success, negative on failure
6592  **/
6593 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
6594 {
6595         struct igb_adapter *adapter = netdev_priv(netdev);
6596         int max_frame = new_mtu + IGB_ETH_PKT_HDR_PAD;
6597
6598         if (adapter->xdp_prog) {
6599                 int i;
6600
6601                 for (i = 0; i < adapter->num_rx_queues; i++) {
6602                         struct igb_ring *ring = adapter->rx_ring[i];
6603
6604                         if (max_frame > igb_rx_bufsz(ring)) {
6605                                 netdev_warn(adapter->netdev,
6606                                             "Requested MTU size is not supported with XDP. Max frame size is %d\n",
6607                                             max_frame);
6608                                 return -EINVAL;
6609                         }
6610                 }
6611         }
6612
6613         /* adjust max frame to be at least the size of a standard frame */
6614         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
6615                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
6616
6617         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
6618                 usleep_range(1000, 2000);
6619
6620         /* igb_down has a dependency on max_frame_size */
6621         adapter->max_frame_size = max_frame;
6622
6623         if (netif_running(netdev))
6624                 igb_down(adapter);
6625
6626         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6627                    netdev->mtu, new_mtu);
6628         netdev->mtu = new_mtu;
6629
6630         if (netif_running(netdev))
6631                 igb_up(adapter);
6632         else
6633                 igb_reset(adapter);
6634
6635         clear_bit(__IGB_RESETTING, &adapter->state);
6636
6637         return 0;
6638 }
6639
6640 /**
6641  *  igb_update_stats - Update the board statistics counters
6642  *  @adapter: board private structure
6643  **/
6644 void igb_update_stats(struct igb_adapter *adapter)
6645 {
6646         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
6647         struct e1000_hw *hw = &adapter->hw;
6648         struct pci_dev *pdev = adapter->pdev;
6649         u32 reg, mpc;
6650         int i;
6651         u64 bytes, packets;
6652         unsigned int start;
6653         u64 _bytes, _packets;
6654
6655         /* Prevent stats update while adapter is being reset, or if the pci
6656          * connection is down.
6657          */
6658         if (adapter->link_speed == 0)
6659                 return;
6660         if (pci_channel_offline(pdev))
6661                 return;
6662
6663         bytes = 0;
6664         packets = 0;
6665
6666         rcu_read_lock();
6667         for (i = 0; i < adapter->num_rx_queues; i++) {
6668                 struct igb_ring *ring = adapter->rx_ring[i];
6669                 u32 rqdpc = rd32(E1000_RQDPC(i));
6670                 if (hw->mac.type >= e1000_i210)
6671                         wr32(E1000_RQDPC(i), 0);
6672
6673                 if (rqdpc) {
6674                         ring->rx_stats.drops += rqdpc;
6675                         net_stats->rx_fifo_errors += rqdpc;
6676                 }
6677
6678                 do {
6679                         start = u64_stats_fetch_begin(&ring->rx_syncp);
6680                         _bytes = ring->rx_stats.bytes;
6681                         _packets = ring->rx_stats.packets;
6682                 } while (u64_stats_fetch_retry(&ring->rx_syncp, start));
6683                 bytes += _bytes;
6684                 packets += _packets;
6685         }
6686
6687         net_stats->rx_bytes = bytes;
6688         net_stats->rx_packets = packets;
6689
6690         bytes = 0;
6691         packets = 0;
6692         for (i = 0; i < adapter->num_tx_queues; i++) {
6693                 struct igb_ring *ring = adapter->tx_ring[i];
6694                 do {
6695                         start = u64_stats_fetch_begin(&ring->tx_syncp);
6696                         _bytes = ring->tx_stats.bytes;
6697                         _packets = ring->tx_stats.packets;
6698                 } while (u64_stats_fetch_retry(&ring->tx_syncp, start));
6699                 bytes += _bytes;
6700                 packets += _packets;
6701         }
6702         net_stats->tx_bytes = bytes;
6703         net_stats->tx_packets = packets;
6704         rcu_read_unlock();
6705
6706         /* read stats registers */
6707         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
6708         adapter->stats.gprc += rd32(E1000_GPRC);
6709         adapter->stats.gorc += rd32(E1000_GORCL);
6710         rd32(E1000_GORCH); /* clear GORCL */
6711         adapter->stats.bprc += rd32(E1000_BPRC);
6712         adapter->stats.mprc += rd32(E1000_MPRC);
6713         adapter->stats.roc += rd32(E1000_ROC);
6714
6715         adapter->stats.prc64 += rd32(E1000_PRC64);
6716         adapter->stats.prc127 += rd32(E1000_PRC127);
6717         adapter->stats.prc255 += rd32(E1000_PRC255);
6718         adapter->stats.prc511 += rd32(E1000_PRC511);
6719         adapter->stats.prc1023 += rd32(E1000_PRC1023);
6720         adapter->stats.prc1522 += rd32(E1000_PRC1522);
6721         adapter->stats.symerrs += rd32(E1000_SYMERRS);
6722         adapter->stats.sec += rd32(E1000_SEC);
6723
6724         mpc = rd32(E1000_MPC);
6725         adapter->stats.mpc += mpc;
6726         net_stats->rx_fifo_errors += mpc;
6727         adapter->stats.scc += rd32(E1000_SCC);
6728         adapter->stats.ecol += rd32(E1000_ECOL);
6729         adapter->stats.mcc += rd32(E1000_MCC);
6730         adapter->stats.latecol += rd32(E1000_LATECOL);
6731         adapter->stats.dc += rd32(E1000_DC);
6732         adapter->stats.rlec += rd32(E1000_RLEC);
6733         adapter->stats.xonrxc += rd32(E1000_XONRXC);
6734         adapter->stats.xontxc += rd32(E1000_XONTXC);
6735         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
6736         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
6737         adapter->stats.fcruc += rd32(E1000_FCRUC);
6738         adapter->stats.gptc += rd32(E1000_GPTC);
6739         adapter->stats.gotc += rd32(E1000_GOTCL);
6740         rd32(E1000_GOTCH); /* clear GOTCL */
6741         adapter->stats.rnbc += rd32(E1000_RNBC);
6742         adapter->stats.ruc += rd32(E1000_RUC);
6743         adapter->stats.rfc += rd32(E1000_RFC);
6744         adapter->stats.rjc += rd32(E1000_RJC);
6745         adapter->stats.tor += rd32(E1000_TORH);
6746         adapter->stats.tot += rd32(E1000_TOTH);
6747         adapter->stats.tpr += rd32(E1000_TPR);
6748
6749         adapter->stats.ptc64 += rd32(E1000_PTC64);
6750         adapter->stats.ptc127 += rd32(E1000_PTC127);
6751         adapter->stats.ptc255 += rd32(E1000_PTC255);
6752         adapter->stats.ptc511 += rd32(E1000_PTC511);
6753         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
6754         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
6755
6756         adapter->stats.mptc += rd32(E1000_MPTC);
6757         adapter->stats.bptc += rd32(E1000_BPTC);
6758
6759         adapter->stats.tpt += rd32(E1000_TPT);
6760         adapter->stats.colc += rd32(E1000_COLC);
6761
6762         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
6763         /* read internal phy specific stats */
6764         reg = rd32(E1000_CTRL_EXT);
6765         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
6766                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
6767
6768                 /* this stat has invalid values on i210/i211 */
6769                 if ((hw->mac.type != e1000_i210) &&
6770                     (hw->mac.type != e1000_i211))
6771                         adapter->stats.tncrs += rd32(E1000_TNCRS);
6772         }
6773
6774         adapter->stats.tsctc += rd32(E1000_TSCTC);
6775         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
6776
6777         adapter->stats.iac += rd32(E1000_IAC);
6778         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
6779         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
6780         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
6781         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
6782         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
6783         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
6784         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
6785         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
6786
6787         /* Fill out the OS statistics structure */
6788         net_stats->multicast = adapter->stats.mprc;
6789         net_stats->collisions = adapter->stats.colc;
6790
6791         /* Rx Errors */
6792
6793         /* RLEC on some newer hardware can be incorrect so build
6794          * our own version based on RUC and ROC
6795          */
6796         net_stats->rx_errors = adapter->stats.rxerrc +
6797                 adapter->stats.crcerrs + adapter->stats.algnerrc +
6798                 adapter->stats.ruc + adapter->stats.roc +
6799                 adapter->stats.cexterr;
6800         net_stats->rx_length_errors = adapter->stats.ruc +
6801                                       adapter->stats.roc;
6802         net_stats->rx_crc_errors = adapter->stats.crcerrs;
6803         net_stats->rx_frame_errors = adapter->stats.algnerrc;
6804         net_stats->rx_missed_errors = adapter->stats.mpc;
6805
6806         /* Tx Errors */
6807         net_stats->tx_errors = adapter->stats.ecol +
6808                                adapter->stats.latecol;
6809         net_stats->tx_aborted_errors = adapter->stats.ecol;
6810         net_stats->tx_window_errors = adapter->stats.latecol;
6811         net_stats->tx_carrier_errors = adapter->stats.tncrs;
6812
6813         /* Tx Dropped needs to be maintained elsewhere */
6814
6815         /* Management Stats */
6816         adapter->stats.mgptc += rd32(E1000_MGTPTC);
6817         adapter->stats.mgprc += rd32(E1000_MGTPRC);
6818         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
6819
6820         /* OS2BMC Stats */
6821         reg = rd32(E1000_MANC);
6822         if (reg & E1000_MANC_EN_BMC2OS) {
6823                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
6824                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
6825                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
6826                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
6827         }
6828 }
6829
6830 static void igb_perout(struct igb_adapter *adapter, int tsintr_tt)
6831 {
6832         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_PEROUT, tsintr_tt);
6833         struct e1000_hw *hw = &adapter->hw;
6834         struct timespec64 ts;
6835         u32 tsauxc;
6836
6837         if (pin < 0 || pin >= IGB_N_SDP)
6838                 return;
6839
6840         spin_lock(&adapter->tmreg_lock);
6841
6842         if (hw->mac.type == e1000_82580 ||
6843             hw->mac.type == e1000_i354 ||
6844             hw->mac.type == e1000_i350) {
6845                 s64 ns = timespec64_to_ns(&adapter->perout[tsintr_tt].period);
6846                 u32 systiml, systimh, level_mask, level, rem;
6847                 u64 systim, now;
6848
6849                 /* read systim registers in sequence */
6850                 rd32(E1000_SYSTIMR);
6851                 systiml = rd32(E1000_SYSTIML);
6852                 systimh = rd32(E1000_SYSTIMH);
6853                 systim = (((u64)(systimh & 0xFF)) << 32) | ((u64)systiml);
6854                 now = timecounter_cyc2time(&adapter->tc, systim);
6855
6856                 if (pin < 2) {
6857                         level_mask = (tsintr_tt == 1) ? 0x80000 : 0x40000;
6858                         level = (rd32(E1000_CTRL) & level_mask) ? 1 : 0;
6859                 } else {
6860                         level_mask = (tsintr_tt == 1) ? 0x80 : 0x40;
6861                         level = (rd32(E1000_CTRL_EXT) & level_mask) ? 1 : 0;
6862                 }
6863
6864                 div_u64_rem(now, ns, &rem);
6865                 systim = systim + (ns - rem);
6866
6867                 /* synchronize pin level with rising/falling edges */
6868                 div_u64_rem(now, ns << 1, &rem);
6869                 if (rem < ns) {
6870                         /* first half of period */
6871                         if (level == 0) {
6872                                 /* output is already low, skip this period */
6873                                 systim += ns;
6874                                 pr_notice("igb: periodic output on %s missed falling edge\n",
6875                                           adapter->sdp_config[pin].name);
6876                         }
6877                 } else {
6878                         /* second half of period */
6879                         if (level == 1) {
6880                                 /* output is already high, skip this period */
6881                                 systim += ns;
6882                                 pr_notice("igb: periodic output on %s missed rising edge\n",
6883                                           adapter->sdp_config[pin].name);
6884                         }
6885                 }
6886
6887                 /* for this chip family tv_sec is the upper part of the binary value,
6888                  * so not seconds
6889                  */
6890                 ts.tv_nsec = (u32)systim;
6891                 ts.tv_sec  = ((u32)(systim >> 32)) & 0xFF;
6892         } else {
6893                 ts = timespec64_add(adapter->perout[tsintr_tt].start,
6894                                     adapter->perout[tsintr_tt].period);
6895         }
6896
6897         /* u32 conversion of tv_sec is safe until y2106 */
6898         wr32((tsintr_tt == 1) ? E1000_TRGTTIML1 : E1000_TRGTTIML0, ts.tv_nsec);
6899         wr32((tsintr_tt == 1) ? E1000_TRGTTIMH1 : E1000_TRGTTIMH0, (u32)ts.tv_sec);
6900         tsauxc = rd32(E1000_TSAUXC);
6901         tsauxc |= TSAUXC_EN_TT0;
6902         wr32(E1000_TSAUXC, tsauxc);
6903         adapter->perout[tsintr_tt].start = ts;
6904
6905         spin_unlock(&adapter->tmreg_lock);
6906 }
6907
6908 static void igb_extts(struct igb_adapter *adapter, int tsintr_tt)
6909 {
6910         int pin = ptp_find_pin(adapter->ptp_clock, PTP_PF_EXTTS, tsintr_tt);
6911         int auxstmpl = (tsintr_tt == 1) ? E1000_AUXSTMPL1 : E1000_AUXSTMPL0;
6912         int auxstmph = (tsintr_tt == 1) ? E1000_AUXSTMPH1 : E1000_AUXSTMPH0;
6913         struct e1000_hw *hw = &adapter->hw;
6914         struct ptp_clock_event event;
6915         struct timespec64 ts;
6916
6917         if (pin < 0 || pin >= IGB_N_SDP)
6918                 return;
6919
6920         if (hw->mac.type == e1000_82580 ||
6921             hw->mac.type == e1000_i354 ||
6922             hw->mac.type == e1000_i350) {
6923                 s64 ns = rd32(auxstmpl);
6924
6925                 ns += ((s64)(rd32(auxstmph) & 0xFF)) << 32;
6926                 ts = ns_to_timespec64(ns);
6927         } else {
6928                 ts.tv_nsec = rd32(auxstmpl);
6929                 ts.tv_sec  = rd32(auxstmph);
6930         }
6931
6932         event.type = PTP_CLOCK_EXTTS;
6933         event.index = tsintr_tt;
6934         event.timestamp = ts.tv_sec * 1000000000ULL + ts.tv_nsec;
6935         ptp_clock_event(adapter->ptp_clock, &event);
6936 }
6937
6938 static void igb_tsync_interrupt(struct igb_adapter *adapter)
6939 {
6940         struct e1000_hw *hw = &adapter->hw;
6941         u32 ack = 0, tsicr = rd32(E1000_TSICR);
6942         struct ptp_clock_event event;
6943
6944         if (tsicr & TSINTR_SYS_WRAP) {
6945                 event.type = PTP_CLOCK_PPS;
6946                 if (adapter->ptp_caps.pps)
6947                         ptp_clock_event(adapter->ptp_clock, &event);
6948                 ack |= TSINTR_SYS_WRAP;
6949         }
6950
6951         if (tsicr & E1000_TSICR_TXTS) {
6952                 /* retrieve hardware timestamp */
6953                 schedule_work(&adapter->ptp_tx_work);
6954                 ack |= E1000_TSICR_TXTS;
6955         }
6956
6957         if (tsicr & TSINTR_TT0) {
6958                 igb_perout(adapter, 0);
6959                 ack |= TSINTR_TT0;
6960         }
6961
6962         if (tsicr & TSINTR_TT1) {
6963                 igb_perout(adapter, 1);
6964                 ack |= TSINTR_TT1;
6965         }
6966
6967         if (tsicr & TSINTR_AUTT0) {
6968                 igb_extts(adapter, 0);
6969                 ack |= TSINTR_AUTT0;
6970         }
6971
6972         if (tsicr & TSINTR_AUTT1) {
6973                 igb_extts(adapter, 1);
6974                 ack |= TSINTR_AUTT1;
6975         }
6976
6977         /* acknowledge the interrupts */
6978         wr32(E1000_TSICR, ack);
6979 }
6980
6981 static irqreturn_t igb_msix_other(int irq, void *data)
6982 {
6983         struct igb_adapter *adapter = data;
6984         struct e1000_hw *hw = &adapter->hw;
6985         u32 icr = rd32(E1000_ICR);
6986         /* reading ICR causes bit 31 of EICR to be cleared */
6987
6988         if (icr & E1000_ICR_DRSTA)
6989                 schedule_work(&adapter->reset_task);
6990
6991         if (icr & E1000_ICR_DOUTSYNC) {
6992                 /* HW is reporting DMA is out of sync */
6993                 adapter->stats.doosync++;
6994                 /* The DMA Out of Sync is also indication of a spoof event
6995                  * in IOV mode. Check the Wrong VM Behavior register to
6996                  * see if it is really a spoof event.
6997                  */
6998                 igb_check_wvbr(adapter);
6999         }
7000
7001         /* Check for a mailbox event */
7002         if (icr & E1000_ICR_VMMB)
7003                 igb_msg_task(adapter);
7004
7005         if (icr & E1000_ICR_LSC) {
7006                 hw->mac.get_link_status = 1;
7007                 /* guard against interrupt when we're going down */
7008                 if (!test_bit(__IGB_DOWN, &adapter->state))
7009                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
7010         }
7011
7012         if (icr & E1000_ICR_TS)
7013                 igb_tsync_interrupt(adapter);
7014
7015         wr32(E1000_EIMS, adapter->eims_other);
7016
7017         return IRQ_HANDLED;
7018 }
7019
7020 static void igb_write_itr(struct igb_q_vector *q_vector)
7021 {
7022         struct igb_adapter *adapter = q_vector->adapter;
7023         u32 itr_val = q_vector->itr_val & 0x7FFC;
7024
7025         if (!q_vector->set_itr)
7026                 return;
7027
7028         if (!itr_val)
7029                 itr_val = 0x4;
7030
7031         if (adapter->hw.mac.type == e1000_82575)
7032                 itr_val |= itr_val << 16;
7033         else
7034                 itr_val |= E1000_EITR_CNT_IGNR;
7035
7036         writel(itr_val, q_vector->itr_register);
7037         q_vector->set_itr = 0;
7038 }
7039
7040 static irqreturn_t igb_msix_ring(int irq, void *data)
7041 {
7042         struct igb_q_vector *q_vector = data;
7043
7044         /* Write the ITR value calculated from the previous interrupt. */
7045         igb_write_itr(q_vector);
7046
7047         napi_schedule(&q_vector->napi);
7048
7049         return IRQ_HANDLED;
7050 }
7051
7052 #ifdef CONFIG_IGB_DCA
7053 static void igb_update_tx_dca(struct igb_adapter *adapter,
7054                               struct igb_ring *tx_ring,
7055                               int cpu)
7056 {
7057         struct e1000_hw *hw = &adapter->hw;
7058         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
7059
7060         if (hw->mac.type != e1000_82575)
7061                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
7062
7063         /* We can enable relaxed ordering for reads, but not writes when
7064          * DCA is enabled.  This is due to a known issue in some chipsets
7065          * which will cause the DCA tag to be cleared.
7066          */
7067         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
7068                   E1000_DCA_TXCTRL_DATA_RRO_EN |
7069                   E1000_DCA_TXCTRL_DESC_DCA_EN;
7070
7071         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
7072 }
7073
7074 static void igb_update_rx_dca(struct igb_adapter *adapter,
7075                               struct igb_ring *rx_ring,
7076                               int cpu)
7077 {
7078         struct e1000_hw *hw = &adapter->hw;
7079         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
7080
7081         if (hw->mac.type != e1000_82575)
7082                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
7083
7084         /* We can enable relaxed ordering for reads, but not writes when
7085          * DCA is enabled.  This is due to a known issue in some chipsets
7086          * which will cause the DCA tag to be cleared.
7087          */
7088         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
7089                   E1000_DCA_RXCTRL_DESC_DCA_EN;
7090
7091         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
7092 }
7093
7094 static void igb_update_dca(struct igb_q_vector *q_vector)
7095 {
7096         struct igb_adapter *adapter = q_vector->adapter;
7097         int cpu = get_cpu();
7098
7099         if (q_vector->cpu == cpu)
7100                 goto out_no_update;
7101
7102         if (q_vector->tx.ring)
7103                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
7104
7105         if (q_vector->rx.ring)
7106                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
7107
7108         q_vector->cpu = cpu;
7109 out_no_update:
7110         put_cpu();
7111 }
7112
7113 static void igb_setup_dca(struct igb_adapter *adapter)
7114 {
7115         struct e1000_hw *hw = &adapter->hw;
7116         int i;
7117
7118         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
7119                 return;
7120
7121         /* Always use CB2 mode, difference is masked in the CB driver. */
7122         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
7123
7124         for (i = 0; i < adapter->num_q_vectors; i++) {
7125                 adapter->q_vector[i]->cpu = -1;
7126                 igb_update_dca(adapter->q_vector[i]);
7127         }
7128 }
7129
7130 static int __igb_notify_dca(struct device *dev, void *data)
7131 {
7132         struct net_device *netdev = dev_get_drvdata(dev);
7133         struct igb_adapter *adapter = netdev_priv(netdev);
7134         struct pci_dev *pdev = adapter->pdev;
7135         struct e1000_hw *hw = &adapter->hw;
7136         unsigned long event = *(unsigned long *)data;
7137
7138         switch (event) {
7139         case DCA_PROVIDER_ADD:
7140                 /* if already enabled, don't do it again */
7141                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
7142                         break;
7143                 if (dca_add_requester(dev) == 0) {
7144                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
7145                         dev_info(&pdev->dev, "DCA enabled\n");
7146                         igb_setup_dca(adapter);
7147                         break;
7148                 }
7149                 fallthrough; /* since DCA is disabled. */
7150         case DCA_PROVIDER_REMOVE:
7151                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
7152                         /* without this a class_device is left
7153                          * hanging around in the sysfs model
7154                          */
7155                         dca_remove_requester(dev);
7156                         dev_info(&pdev->dev, "DCA disabled\n");
7157                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
7158                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
7159                 }
7160                 break;
7161         }
7162
7163         return 0;
7164 }
7165
7166 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
7167                           void *p)
7168 {
7169         int ret_val;
7170
7171         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
7172                                          __igb_notify_dca);
7173
7174         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7175 }
7176 #endif /* CONFIG_IGB_DCA */
7177
7178 #ifdef CONFIG_PCI_IOV
7179 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
7180 {
7181         unsigned char mac_addr[ETH_ALEN];
7182
7183         eth_zero_addr(mac_addr);
7184         igb_set_vf_mac(adapter, vf, mac_addr);
7185
7186         /* By default spoof check is enabled for all VFs */
7187         adapter->vf_data[vf].spoofchk_enabled = true;
7188
7189         /* By default VFs are not trusted */
7190         adapter->vf_data[vf].trusted = false;
7191
7192         return 0;
7193 }
7194
7195 #endif
7196 static void igb_ping_all_vfs(struct igb_adapter *adapter)
7197 {
7198         struct e1000_hw *hw = &adapter->hw;
7199         u32 ping;
7200         int i;
7201
7202         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
7203                 ping = E1000_PF_CONTROL_MSG;
7204                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
7205                         ping |= E1000_VT_MSGTYPE_CTS;
7206                 igb_write_mbx(hw, &ping, 1, i);
7207         }
7208 }
7209
7210 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7211 {
7212         struct e1000_hw *hw = &adapter->hw;
7213         u32 vmolr = rd32(E1000_VMOLR(vf));
7214         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7215
7216         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
7217                             IGB_VF_FLAG_MULTI_PROMISC);
7218         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7219
7220         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
7221                 vmolr |= E1000_VMOLR_MPME;
7222                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
7223                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
7224         } else {
7225                 /* if we have hashes and we are clearing a multicast promisc
7226                  * flag we need to write the hashes to the MTA as this step
7227                  * was previously skipped
7228                  */
7229                 if (vf_data->num_vf_mc_hashes > 30) {
7230                         vmolr |= E1000_VMOLR_MPME;
7231                 } else if (vf_data->num_vf_mc_hashes) {
7232                         int j;
7233
7234                         vmolr |= E1000_VMOLR_ROMPE;
7235                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7236                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7237                 }
7238         }
7239
7240         wr32(E1000_VMOLR(vf), vmolr);
7241
7242         /* there are flags left unprocessed, likely not supported */
7243         if (*msgbuf & E1000_VT_MSGINFO_MASK)
7244                 return -EINVAL;
7245
7246         return 0;
7247 }
7248
7249 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
7250                                   u32 *msgbuf, u32 vf)
7251 {
7252         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7253         u16 *hash_list = (u16 *)&msgbuf[1];
7254         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7255         int i;
7256
7257         /* salt away the number of multicast addresses assigned
7258          * to this VF for later use to restore when the PF multi cast
7259          * list changes
7260          */
7261         vf_data->num_vf_mc_hashes = n;
7262
7263         /* only up to 30 hash values supported */
7264         if (n > 30)
7265                 n = 30;
7266
7267         /* store the hashes for later use */
7268         for (i = 0; i < n; i++)
7269                 vf_data->vf_mc_hashes[i] = hash_list[i];
7270
7271         /* Flush and reset the mta with the new values */
7272         igb_set_rx_mode(adapter->netdev);
7273
7274         return 0;
7275 }
7276
7277 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
7278 {
7279         struct e1000_hw *hw = &adapter->hw;
7280         struct vf_data_storage *vf_data;
7281         int i, j;
7282
7283         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7284                 u32 vmolr = rd32(E1000_VMOLR(i));
7285
7286                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
7287
7288                 vf_data = &adapter->vf_data[i];
7289
7290                 if ((vf_data->num_vf_mc_hashes > 30) ||
7291                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
7292                         vmolr |= E1000_VMOLR_MPME;
7293                 } else if (vf_data->num_vf_mc_hashes) {
7294                         vmolr |= E1000_VMOLR_ROMPE;
7295                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
7296                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
7297                 }
7298                 wr32(E1000_VMOLR(i), vmolr);
7299         }
7300 }
7301
7302 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
7303 {
7304         struct e1000_hw *hw = &adapter->hw;
7305         u32 pool_mask, vlvf_mask, i;
7306
7307         /* create mask for VF and other pools */
7308         pool_mask = E1000_VLVF_POOLSEL_MASK;
7309         vlvf_mask = BIT(E1000_VLVF_POOLSEL_SHIFT + vf);
7310
7311         /* drop PF from pool bits */
7312         pool_mask &= ~BIT(E1000_VLVF_POOLSEL_SHIFT +
7313                              adapter->vfs_allocated_count);
7314
7315         /* Find the vlan filter for this id */
7316         for (i = E1000_VLVF_ARRAY_SIZE; i--;) {
7317                 u32 vlvf = rd32(E1000_VLVF(i));
7318                 u32 vfta_mask, vid, vfta;
7319
7320                 /* remove the vf from the pool */
7321                 if (!(vlvf & vlvf_mask))
7322                         continue;
7323
7324                 /* clear out bit from VLVF */
7325                 vlvf ^= vlvf_mask;
7326
7327                 /* if other pools are present, just remove ourselves */
7328                 if (vlvf & pool_mask)
7329                         goto update_vlvfb;
7330
7331                 /* if PF is present, leave VFTA */
7332                 if (vlvf & E1000_VLVF_POOLSEL_MASK)
7333                         goto update_vlvf;
7334
7335                 vid = vlvf & E1000_VLVF_VLANID_MASK;
7336                 vfta_mask = BIT(vid % 32);
7337
7338                 /* clear bit from VFTA */
7339                 vfta = adapter->shadow_vfta[vid / 32];
7340                 if (vfta & vfta_mask)
7341                         hw->mac.ops.write_vfta(hw, vid / 32, vfta ^ vfta_mask);
7342 update_vlvf:
7343                 /* clear pool selection enable */
7344                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7345                         vlvf &= E1000_VLVF_POOLSEL_MASK;
7346                 else
7347                         vlvf = 0;
7348 update_vlvfb:
7349                 /* clear pool bits */
7350                 wr32(E1000_VLVF(i), vlvf);
7351         }
7352 }
7353
7354 static int igb_find_vlvf_entry(struct e1000_hw *hw, u32 vlan)
7355 {
7356         u32 vlvf;
7357         int idx;
7358
7359         /* short cut the special case */
7360         if (vlan == 0)
7361                 return 0;
7362
7363         /* Search for the VLAN id in the VLVF entries */
7364         for (idx = E1000_VLVF_ARRAY_SIZE; --idx;) {
7365                 vlvf = rd32(E1000_VLVF(idx));
7366                 if ((vlvf & VLAN_VID_MASK) == vlan)
7367                         break;
7368         }
7369
7370         return idx;
7371 }
7372
7373 static void igb_update_pf_vlvf(struct igb_adapter *adapter, u32 vid)
7374 {
7375         struct e1000_hw *hw = &adapter->hw;
7376         u32 bits, pf_id;
7377         int idx;
7378
7379         idx = igb_find_vlvf_entry(hw, vid);
7380         if (!idx)
7381                 return;
7382
7383         /* See if any other pools are set for this VLAN filter
7384          * entry other than the PF.
7385          */
7386         pf_id = adapter->vfs_allocated_count + E1000_VLVF_POOLSEL_SHIFT;
7387         bits = ~BIT(pf_id) & E1000_VLVF_POOLSEL_MASK;
7388         bits &= rd32(E1000_VLVF(idx));
7389
7390         /* Disable the filter so this falls into the default pool. */
7391         if (!bits) {
7392                 if (adapter->flags & IGB_FLAG_VLAN_PROMISC)
7393                         wr32(E1000_VLVF(idx), BIT(pf_id));
7394                 else
7395                         wr32(E1000_VLVF(idx), 0);
7396         }
7397 }
7398
7399 static s32 igb_set_vf_vlan(struct igb_adapter *adapter, u32 vid,
7400                            bool add, u32 vf)
7401 {
7402         int pf_id = adapter->vfs_allocated_count;
7403         struct e1000_hw *hw = &adapter->hw;
7404         int err;
7405
7406         /* If VLAN overlaps with one the PF is currently monitoring make
7407          * sure that we are able to allocate a VLVF entry.  This may be
7408          * redundant but it guarantees PF will maintain visibility to
7409          * the VLAN.
7410          */
7411         if (add && test_bit(vid, adapter->active_vlans)) {
7412                 err = igb_vfta_set(hw, vid, pf_id, true, false);
7413                 if (err)
7414                         return err;
7415         }
7416
7417         err = igb_vfta_set(hw, vid, vf, add, false);
7418
7419         if (add && !err)
7420                 return err;
7421
7422         /* If we failed to add the VF VLAN or we are removing the VF VLAN
7423          * we may need to drop the PF pool bit in order to allow us to free
7424          * up the VLVF resources.
7425          */
7426         if (test_bit(vid, adapter->active_vlans) ||
7427             (adapter->flags & IGB_FLAG_VLAN_PROMISC))
7428                 igb_update_pf_vlvf(adapter, vid);
7429
7430         return err;
7431 }
7432
7433 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
7434 {
7435         struct e1000_hw *hw = &adapter->hw;
7436
7437         if (vid)
7438                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
7439         else
7440                 wr32(E1000_VMVIR(vf), 0);
7441 }
7442
7443 static int igb_enable_port_vlan(struct igb_adapter *adapter, int vf,
7444                                 u16 vlan, u8 qos)
7445 {
7446         int err;
7447
7448         err = igb_set_vf_vlan(adapter, vlan, true, vf);
7449         if (err)
7450                 return err;
7451
7452         igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
7453         igb_set_vmolr(adapter, vf, !vlan);
7454
7455         /* revoke access to previous VLAN */
7456         if (vlan != adapter->vf_data[vf].pf_vlan)
7457                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7458                                 false, vf);
7459
7460         adapter->vf_data[vf].pf_vlan = vlan;
7461         adapter->vf_data[vf].pf_qos = qos;
7462         igb_set_vf_vlan_strip(adapter, vf, true);
7463         dev_info(&adapter->pdev->dev,
7464                  "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
7465         if (test_bit(__IGB_DOWN, &adapter->state)) {
7466                 dev_warn(&adapter->pdev->dev,
7467                          "The VF VLAN has been set, but the PF device is not up.\n");
7468                 dev_warn(&adapter->pdev->dev,
7469                          "Bring the PF device up before attempting to use the VF device.\n");
7470         }
7471
7472         return err;
7473 }
7474
7475 static int igb_disable_port_vlan(struct igb_adapter *adapter, int vf)
7476 {
7477         /* Restore tagless access via VLAN 0 */
7478         igb_set_vf_vlan(adapter, 0, true, vf);
7479
7480         igb_set_vmvir(adapter, 0, vf);
7481         igb_set_vmolr(adapter, vf, true);
7482
7483         /* Remove any PF assigned VLAN */
7484         if (adapter->vf_data[vf].pf_vlan)
7485                 igb_set_vf_vlan(adapter, adapter->vf_data[vf].pf_vlan,
7486                                 false, vf);
7487
7488         adapter->vf_data[vf].pf_vlan = 0;
7489         adapter->vf_data[vf].pf_qos = 0;
7490         igb_set_vf_vlan_strip(adapter, vf, false);
7491
7492         return 0;
7493 }
7494
7495 static int igb_ndo_set_vf_vlan(struct net_device *netdev, int vf,
7496                                u16 vlan, u8 qos, __be16 vlan_proto)
7497 {
7498         struct igb_adapter *adapter = netdev_priv(netdev);
7499
7500         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
7501                 return -EINVAL;
7502
7503         if (vlan_proto != htons(ETH_P_8021Q))
7504                 return -EPROTONOSUPPORT;
7505
7506         return (vlan || qos) ? igb_enable_port_vlan(adapter, vf, vlan, qos) :
7507                                igb_disable_port_vlan(adapter, vf);
7508 }
7509
7510 static int igb_set_vf_vlan_msg(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
7511 {
7512         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
7513         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
7514         int ret;
7515
7516         if (adapter->vf_data[vf].pf_vlan)
7517                 return -1;
7518
7519         /* VLAN 0 is a special case, don't allow it to be removed */
7520         if (!vid && !add)
7521                 return 0;
7522
7523         ret = igb_set_vf_vlan(adapter, vid, !!add, vf);
7524         if (!ret)
7525                 igb_set_vf_vlan_strip(adapter, vf, !!vid);
7526         return ret;
7527 }
7528
7529 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
7530 {
7531         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7532
7533         /* clear flags - except flag that indicates PF has set the MAC */
7534         vf_data->flags &= IGB_VF_FLAG_PF_SET_MAC;
7535         vf_data->last_nack = jiffies;
7536
7537         /* reset vlans for device */
7538         igb_clear_vf_vfta(adapter, vf);
7539         igb_set_vf_vlan(adapter, vf_data->pf_vlan, true, vf);
7540         igb_set_vmvir(adapter, vf_data->pf_vlan |
7541                                (vf_data->pf_qos << VLAN_PRIO_SHIFT), vf);
7542         igb_set_vmolr(adapter, vf, !vf_data->pf_vlan);
7543         igb_set_vf_vlan_strip(adapter, vf, !!(vf_data->pf_vlan));
7544
7545         /* reset multicast table array for vf */
7546         adapter->vf_data[vf].num_vf_mc_hashes = 0;
7547
7548         /* Flush and reset the mta with the new values */
7549         igb_set_rx_mode(adapter->netdev);
7550 }
7551
7552 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
7553 {
7554         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7555
7556         /* clear mac address as we were hotplug removed/added */
7557         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
7558                 eth_zero_addr(vf_mac);
7559
7560         /* process remaining reset events */
7561         igb_vf_reset(adapter, vf);
7562 }
7563
7564 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
7565 {
7566         struct e1000_hw *hw = &adapter->hw;
7567         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
7568         u32 reg, msgbuf[3] = {};
7569         u8 *addr = (u8 *)(&msgbuf[1]);
7570
7571         /* process all the same items cleared in a function level reset */
7572         igb_vf_reset(adapter, vf);
7573
7574         /* set vf mac address */
7575         igb_set_vf_mac(adapter, vf, vf_mac);
7576
7577         /* enable transmit and receive for vf */
7578         reg = rd32(E1000_VFTE);
7579         wr32(E1000_VFTE, reg | BIT(vf));
7580         reg = rd32(E1000_VFRE);
7581         wr32(E1000_VFRE, reg | BIT(vf));
7582
7583         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
7584
7585         /* reply to reset with ack and vf mac address */
7586         if (!is_zero_ether_addr(vf_mac)) {
7587                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
7588                 memcpy(addr, vf_mac, ETH_ALEN);
7589         } else {
7590                 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_NACK;
7591         }
7592         igb_write_mbx(hw, msgbuf, 3, vf);
7593 }
7594
7595 static void igb_flush_mac_table(struct igb_adapter *adapter)
7596 {
7597         struct e1000_hw *hw = &adapter->hw;
7598         int i;
7599
7600         for (i = 0; i < hw->mac.rar_entry_count; i++) {
7601                 adapter->mac_table[i].state &= ~IGB_MAC_STATE_IN_USE;
7602                 eth_zero_addr(adapter->mac_table[i].addr);
7603                 adapter->mac_table[i].queue = 0;
7604                 igb_rar_set_index(adapter, i);
7605         }
7606 }
7607
7608 static int igb_available_rars(struct igb_adapter *adapter, u8 queue)
7609 {
7610         struct e1000_hw *hw = &adapter->hw;
7611         /* do not count rar entries reserved for VFs MAC addresses */
7612         int rar_entries = hw->mac.rar_entry_count -
7613                           adapter->vfs_allocated_count;
7614         int i, count = 0;
7615
7616         for (i = 0; i < rar_entries; i++) {
7617                 /* do not count default entries */
7618                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT)
7619                         continue;
7620
7621                 /* do not count "in use" entries for different queues */
7622                 if ((adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE) &&
7623                     (adapter->mac_table[i].queue != queue))
7624                         continue;
7625
7626                 count++;
7627         }
7628
7629         return count;
7630 }
7631
7632 /* Set default MAC address for the PF in the first RAR entry */
7633 static void igb_set_default_mac_filter(struct igb_adapter *adapter)
7634 {
7635         struct igb_mac_addr *mac_table = &adapter->mac_table[0];
7636
7637         ether_addr_copy(mac_table->addr, adapter->hw.mac.addr);
7638         mac_table->queue = adapter->vfs_allocated_count;
7639         mac_table->state = IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7640
7641         igb_rar_set_index(adapter, 0);
7642 }
7643
7644 /* If the filter to be added and an already existing filter express
7645  * the same address and address type, it should be possible to only
7646  * override the other configurations, for example the queue to steer
7647  * traffic.
7648  */
7649 static bool igb_mac_entry_can_be_used(const struct igb_mac_addr *entry,
7650                                       const u8 *addr, const u8 flags)
7651 {
7652         if (!(entry->state & IGB_MAC_STATE_IN_USE))
7653                 return true;
7654
7655         if ((entry->state & IGB_MAC_STATE_SRC_ADDR) !=
7656             (flags & IGB_MAC_STATE_SRC_ADDR))
7657                 return false;
7658
7659         if (!ether_addr_equal(addr, entry->addr))
7660                 return false;
7661
7662         return true;
7663 }
7664
7665 /* Add a MAC filter for 'addr' directing matching traffic to 'queue',
7666  * 'flags' is used to indicate what kind of match is made, match is by
7667  * default for the destination address, if matching by source address
7668  * is desired the flag IGB_MAC_STATE_SRC_ADDR can be used.
7669  */
7670 static int igb_add_mac_filter_flags(struct igb_adapter *adapter,
7671                                     const u8 *addr, const u8 queue,
7672                                     const u8 flags)
7673 {
7674         struct e1000_hw *hw = &adapter->hw;
7675         int rar_entries = hw->mac.rar_entry_count -
7676                           adapter->vfs_allocated_count;
7677         int i;
7678
7679         if (is_zero_ether_addr(addr))
7680                 return -EINVAL;
7681
7682         /* Search for the first empty entry in the MAC table.
7683          * Do not touch entries at the end of the table reserved for the VF MAC
7684          * addresses.
7685          */
7686         for (i = 0; i < rar_entries; i++) {
7687                 if (!igb_mac_entry_can_be_used(&adapter->mac_table[i],
7688                                                addr, flags))
7689                         continue;
7690
7691                 ether_addr_copy(adapter->mac_table[i].addr, addr);
7692                 adapter->mac_table[i].queue = queue;
7693                 adapter->mac_table[i].state |= IGB_MAC_STATE_IN_USE | flags;
7694
7695                 igb_rar_set_index(adapter, i);
7696                 return i;
7697         }
7698
7699         return -ENOSPC;
7700 }
7701
7702 static int igb_add_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7703                               const u8 queue)
7704 {
7705         return igb_add_mac_filter_flags(adapter, addr, queue, 0);
7706 }
7707
7708 /* Remove a MAC filter for 'addr' directing matching traffic to
7709  * 'queue', 'flags' is used to indicate what kind of match need to be
7710  * removed, match is by default for the destination address, if
7711  * matching by source address is to be removed the flag
7712  * IGB_MAC_STATE_SRC_ADDR can be used.
7713  */
7714 static int igb_del_mac_filter_flags(struct igb_adapter *adapter,
7715                                     const u8 *addr, const u8 queue,
7716                                     const u8 flags)
7717 {
7718         struct e1000_hw *hw = &adapter->hw;
7719         int rar_entries = hw->mac.rar_entry_count -
7720                           adapter->vfs_allocated_count;
7721         int i;
7722
7723         if (is_zero_ether_addr(addr))
7724                 return -EINVAL;
7725
7726         /* Search for matching entry in the MAC table based on given address
7727          * and queue. Do not touch entries at the end of the table reserved
7728          * for the VF MAC addresses.
7729          */
7730         for (i = 0; i < rar_entries; i++) {
7731                 if (!(adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE))
7732                         continue;
7733                 if ((adapter->mac_table[i].state & flags) != flags)
7734                         continue;
7735                 if (adapter->mac_table[i].queue != queue)
7736                         continue;
7737                 if (!ether_addr_equal(adapter->mac_table[i].addr, addr))
7738                         continue;
7739
7740                 /* When a filter for the default address is "deleted",
7741                  * we return it to its initial configuration
7742                  */
7743                 if (adapter->mac_table[i].state & IGB_MAC_STATE_DEFAULT) {
7744                         adapter->mac_table[i].state =
7745                                 IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE;
7746                         adapter->mac_table[i].queue =
7747                                 adapter->vfs_allocated_count;
7748                 } else {
7749                         adapter->mac_table[i].state = 0;
7750                         adapter->mac_table[i].queue = 0;
7751                         eth_zero_addr(adapter->mac_table[i].addr);
7752                 }
7753
7754                 igb_rar_set_index(adapter, i);
7755                 return 0;
7756         }
7757
7758         return -ENOENT;
7759 }
7760
7761 static int igb_del_mac_filter(struct igb_adapter *adapter, const u8 *addr,
7762                               const u8 queue)
7763 {
7764         return igb_del_mac_filter_flags(adapter, addr, queue, 0);
7765 }
7766
7767 int igb_add_mac_steering_filter(struct igb_adapter *adapter,
7768                                 const u8 *addr, u8 queue, u8 flags)
7769 {
7770         struct e1000_hw *hw = &adapter->hw;
7771
7772         /* In theory, this should be supported on 82575 as well, but
7773          * that part wasn't easily accessible during development.
7774          */
7775         if (hw->mac.type != e1000_i210)
7776                 return -EOPNOTSUPP;
7777
7778         return igb_add_mac_filter_flags(adapter, addr, queue,
7779                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7780 }
7781
7782 int igb_del_mac_steering_filter(struct igb_adapter *adapter,
7783                                 const u8 *addr, u8 queue, u8 flags)
7784 {
7785         return igb_del_mac_filter_flags(adapter, addr, queue,
7786                                         IGB_MAC_STATE_QUEUE_STEERING | flags);
7787 }
7788
7789 static int igb_uc_sync(struct net_device *netdev, const unsigned char *addr)
7790 {
7791         struct igb_adapter *adapter = netdev_priv(netdev);
7792         int ret;
7793
7794         ret = igb_add_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7795
7796         return min_t(int, ret, 0);
7797 }
7798
7799 static int igb_uc_unsync(struct net_device *netdev, const unsigned char *addr)
7800 {
7801         struct igb_adapter *adapter = netdev_priv(netdev);
7802
7803         igb_del_mac_filter(adapter, addr, adapter->vfs_allocated_count);
7804
7805         return 0;
7806 }
7807
7808 static int igb_set_vf_mac_filter(struct igb_adapter *adapter, const int vf,
7809                                  const u32 info, const u8 *addr)
7810 {
7811         struct pci_dev *pdev = adapter->pdev;
7812         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7813         struct list_head *pos;
7814         struct vf_mac_filter *entry = NULL;
7815         int ret = 0;
7816
7817         if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7818             !vf_data->trusted) {
7819                 dev_warn(&pdev->dev,
7820                          "VF %d requested MAC filter but is administratively denied\n",
7821                           vf);
7822                 return -EINVAL;
7823         }
7824         if (!is_valid_ether_addr(addr)) {
7825                 dev_warn(&pdev->dev,
7826                          "VF %d attempted to set invalid MAC filter\n",
7827                           vf);
7828                 return -EINVAL;
7829         }
7830
7831         switch (info) {
7832         case E1000_VF_MAC_FILTER_CLR:
7833                 /* remove all unicast MAC filters related to the current VF */
7834                 list_for_each(pos, &adapter->vf_macs.l) {
7835                         entry = list_entry(pos, struct vf_mac_filter, l);
7836                         if (entry->vf == vf) {
7837                                 entry->vf = -1;
7838                                 entry->free = true;
7839                                 igb_del_mac_filter(adapter, entry->vf_mac, vf);
7840                         }
7841                 }
7842                 break;
7843         case E1000_VF_MAC_FILTER_ADD:
7844                 /* try to find empty slot in the list */
7845                 list_for_each(pos, &adapter->vf_macs.l) {
7846                         entry = list_entry(pos, struct vf_mac_filter, l);
7847                         if (entry->free)
7848                                 break;
7849                 }
7850
7851                 if (entry && entry->free) {
7852                         entry->free = false;
7853                         entry->vf = vf;
7854                         ether_addr_copy(entry->vf_mac, addr);
7855
7856                         ret = igb_add_mac_filter(adapter, addr, vf);
7857                         ret = min_t(int, ret, 0);
7858                 } else {
7859                         ret = -ENOSPC;
7860                 }
7861
7862                 if (ret == -ENOSPC)
7863                         dev_warn(&pdev->dev,
7864                                  "VF %d has requested MAC filter but there is no space for it\n",
7865                                  vf);
7866                 break;
7867         default:
7868                 ret = -EINVAL;
7869                 break;
7870         }
7871
7872         return ret;
7873 }
7874
7875 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
7876 {
7877         struct pci_dev *pdev = adapter->pdev;
7878         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7879         u32 info = msg[0] & E1000_VT_MSGINFO_MASK;
7880
7881         /* The VF MAC Address is stored in a packed array of bytes
7882          * starting at the second 32 bit word of the msg array
7883          */
7884         unsigned char *addr = (unsigned char *)&msg[1];
7885         int ret = 0;
7886
7887         if (!info) {
7888                 if ((vf_data->flags & IGB_VF_FLAG_PF_SET_MAC) &&
7889                     !vf_data->trusted) {
7890                         dev_warn(&pdev->dev,
7891                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
7892                                  vf);
7893                         return -EINVAL;
7894                 }
7895
7896                 if (!is_valid_ether_addr(addr)) {
7897                         dev_warn(&pdev->dev,
7898                                  "VF %d attempted to set invalid MAC\n",
7899                                  vf);
7900                         return -EINVAL;
7901                 }
7902
7903                 ret = igb_set_vf_mac(adapter, vf, addr);
7904         } else {
7905                 ret = igb_set_vf_mac_filter(adapter, vf, info, addr);
7906         }
7907
7908         return ret;
7909 }
7910
7911 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
7912 {
7913         struct e1000_hw *hw = &adapter->hw;
7914         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7915         u32 msg = E1000_VT_MSGTYPE_NACK;
7916
7917         /* if device isn't clear to send it shouldn't be reading either */
7918         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
7919             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
7920                 igb_write_mbx(hw, &msg, 1, vf);
7921                 vf_data->last_nack = jiffies;
7922         }
7923 }
7924
7925 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
7926 {
7927         struct pci_dev *pdev = adapter->pdev;
7928         u32 msgbuf[E1000_VFMAILBOX_SIZE];
7929         struct e1000_hw *hw = &adapter->hw;
7930         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
7931         s32 retval;
7932
7933         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf, false);
7934
7935         if (retval) {
7936                 /* if receive failed revoke VF CTS stats and restart init */
7937                 dev_err(&pdev->dev, "Error receiving message from VF\n");
7938                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
7939                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7940                         goto unlock;
7941                 goto out;
7942         }
7943
7944         /* this is a message we already processed, do nothing */
7945         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
7946                 goto unlock;
7947
7948         /* until the vf completes a reset it should not be
7949          * allowed to start any configuration.
7950          */
7951         if (msgbuf[0] == E1000_VF_RESET) {
7952                 /* unlocks mailbox */
7953                 igb_vf_reset_msg(adapter, vf);
7954                 return;
7955         }
7956
7957         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
7958                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
7959                         goto unlock;
7960                 retval = -1;
7961                 goto out;
7962         }
7963
7964         switch ((msgbuf[0] & 0xFFFF)) {
7965         case E1000_VF_SET_MAC_ADDR:
7966                 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
7967                 break;
7968         case E1000_VF_SET_PROMISC:
7969                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
7970                 break;
7971         case E1000_VF_SET_MULTICAST:
7972                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
7973                 break;
7974         case E1000_VF_SET_LPE:
7975                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
7976                 break;
7977         case E1000_VF_SET_VLAN:
7978                 retval = -1;
7979                 if (vf_data->pf_vlan)
7980                         dev_warn(&pdev->dev,
7981                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
7982                                  vf);
7983                 else
7984                         retval = igb_set_vf_vlan_msg(adapter, msgbuf, vf);
7985                 break;
7986         default:
7987                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
7988                 retval = -1;
7989                 break;
7990         }
7991
7992         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
7993 out:
7994         /* notify the VF of the results of what it sent us */
7995         if (retval)
7996                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
7997         else
7998                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
7999
8000         /* unlocks mailbox */
8001         igb_write_mbx(hw, msgbuf, 1, vf);
8002         return;
8003
8004 unlock:
8005         igb_unlock_mbx(hw, vf);
8006 }
8007
8008 static void igb_msg_task(struct igb_adapter *adapter)
8009 {
8010         struct e1000_hw *hw = &adapter->hw;
8011         unsigned long flags;
8012         u32 vf;
8013
8014         spin_lock_irqsave(&adapter->vfs_lock, flags);
8015         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
8016                 /* process any reset requests */
8017                 if (!igb_check_for_rst(hw, vf))
8018                         igb_vf_reset_event(adapter, vf);
8019
8020                 /* process any messages pending */
8021                 if (!igb_check_for_msg(hw, vf))
8022                         igb_rcv_msg_from_vf(adapter, vf);
8023
8024                 /* process any acks */
8025                 if (!igb_check_for_ack(hw, vf))
8026                         igb_rcv_ack_from_vf(adapter, vf);
8027         }
8028         spin_unlock_irqrestore(&adapter->vfs_lock, flags);
8029 }
8030
8031 /**
8032  *  igb_set_uta - Set unicast filter table address
8033  *  @adapter: board private structure
8034  *  @set: boolean indicating if we are setting or clearing bits
8035  *
8036  *  The unicast table address is a register array of 32-bit registers.
8037  *  The table is meant to be used in a way similar to how the MTA is used
8038  *  however due to certain limitations in the hardware it is necessary to
8039  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
8040  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
8041  **/
8042 static void igb_set_uta(struct igb_adapter *adapter, bool set)
8043 {
8044         struct e1000_hw *hw = &adapter->hw;
8045         u32 uta = set ? ~0 : 0;
8046         int i;
8047
8048         /* we only need to do this if VMDq is enabled */
8049         if (!adapter->vfs_allocated_count)
8050                 return;
8051
8052         for (i = hw->mac.uta_reg_count; i--;)
8053                 array_wr32(E1000_UTA, i, uta);
8054 }
8055
8056 /**
8057  *  igb_intr_msi - Interrupt Handler
8058  *  @irq: interrupt number
8059  *  @data: pointer to a network interface device structure
8060  **/
8061 static irqreturn_t igb_intr_msi(int irq, void *data)
8062 {
8063         struct igb_adapter *adapter = data;
8064         struct igb_q_vector *q_vector = adapter->q_vector[0];
8065         struct e1000_hw *hw = &adapter->hw;
8066         /* read ICR disables interrupts using IAM */
8067         u32 icr = rd32(E1000_ICR);
8068
8069         igb_write_itr(q_vector);
8070
8071         if (icr & E1000_ICR_DRSTA)
8072                 schedule_work(&adapter->reset_task);
8073
8074         if (icr & E1000_ICR_DOUTSYNC) {
8075                 /* HW is reporting DMA is out of sync */
8076                 adapter->stats.doosync++;
8077         }
8078
8079         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8080                 hw->mac.get_link_status = 1;
8081                 if (!test_bit(__IGB_DOWN, &adapter->state))
8082                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8083         }
8084
8085         if (icr & E1000_ICR_TS)
8086                 igb_tsync_interrupt(adapter);
8087
8088         napi_schedule(&q_vector->napi);
8089
8090         return IRQ_HANDLED;
8091 }
8092
8093 /**
8094  *  igb_intr - Legacy Interrupt Handler
8095  *  @irq: interrupt number
8096  *  @data: pointer to a network interface device structure
8097  **/
8098 static irqreturn_t igb_intr(int irq, void *data)
8099 {
8100         struct igb_adapter *adapter = data;
8101         struct igb_q_vector *q_vector = adapter->q_vector[0];
8102         struct e1000_hw *hw = &adapter->hw;
8103         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
8104          * need for the IMC write
8105          */
8106         u32 icr = rd32(E1000_ICR);
8107
8108         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
8109          * not set, then the adapter didn't send an interrupt
8110          */
8111         if (!(icr & E1000_ICR_INT_ASSERTED))
8112                 return IRQ_NONE;
8113
8114         igb_write_itr(q_vector);
8115
8116         if (icr & E1000_ICR_DRSTA)
8117                 schedule_work(&adapter->reset_task);
8118
8119         if (icr & E1000_ICR_DOUTSYNC) {
8120                 /* HW is reporting DMA is out of sync */
8121                 adapter->stats.doosync++;
8122         }
8123
8124         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
8125                 hw->mac.get_link_status = 1;
8126                 /* guard against interrupt when we're going down */
8127                 if (!test_bit(__IGB_DOWN, &adapter->state))
8128                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
8129         }
8130
8131         if (icr & E1000_ICR_TS)
8132                 igb_tsync_interrupt(adapter);
8133
8134         napi_schedule(&q_vector->napi);
8135
8136         return IRQ_HANDLED;
8137 }
8138
8139 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
8140 {
8141         struct igb_adapter *adapter = q_vector->adapter;
8142         struct e1000_hw *hw = &adapter->hw;
8143
8144         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
8145             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
8146                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
8147                         igb_set_itr(q_vector);
8148                 else
8149                         igb_update_ring_itr(q_vector);
8150         }
8151
8152         if (!test_bit(__IGB_DOWN, &adapter->state)) {
8153                 if (adapter->flags & IGB_FLAG_HAS_MSIX)
8154                         wr32(E1000_EIMS, q_vector->eims_value);
8155                 else
8156                         igb_irq_enable(adapter);
8157         }
8158 }
8159
8160 /**
8161  *  igb_poll - NAPI Rx polling callback
8162  *  @napi: napi polling structure
8163  *  @budget: count of how many packets we should handle
8164  **/
8165 static int igb_poll(struct napi_struct *napi, int budget)
8166 {
8167         struct igb_q_vector *q_vector = container_of(napi,
8168                                                      struct igb_q_vector,
8169                                                      napi);
8170         bool clean_complete = true;
8171         int work_done = 0;
8172
8173 #ifdef CONFIG_IGB_DCA
8174         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
8175                 igb_update_dca(q_vector);
8176 #endif
8177         if (q_vector->tx.ring)
8178                 clean_complete = igb_clean_tx_irq(q_vector, budget);
8179
8180         if (q_vector->rx.ring) {
8181                 int cleaned = igb_clean_rx_irq(q_vector, budget);
8182
8183                 work_done += cleaned;
8184                 if (cleaned >= budget)
8185                         clean_complete = false;
8186         }
8187
8188         /* If all work not completed, return budget and keep polling */
8189         if (!clean_complete)
8190                 return budget;
8191
8192         /* Exit the polling mode, but don't re-enable interrupts if stack might
8193          * poll us due to busy-polling
8194          */
8195         if (likely(napi_complete_done(napi, work_done)))
8196                 igb_ring_irq_enable(q_vector);
8197
8198         return work_done;
8199 }
8200
8201 /**
8202  *  igb_clean_tx_irq - Reclaim resources after transmit completes
8203  *  @q_vector: pointer to q_vector containing needed info
8204  *  @napi_budget: Used to determine if we are in netpoll
8205  *
8206  *  returns true if ring is completely cleaned
8207  **/
8208 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector, int napi_budget)
8209 {
8210         struct igb_adapter *adapter = q_vector->adapter;
8211         struct igb_ring *tx_ring = q_vector->tx.ring;
8212         struct igb_tx_buffer *tx_buffer;
8213         union e1000_adv_tx_desc *tx_desc;
8214         unsigned int total_bytes = 0, total_packets = 0;
8215         unsigned int budget = q_vector->tx.work_limit;
8216         unsigned int i = tx_ring->next_to_clean;
8217
8218         if (test_bit(__IGB_DOWN, &adapter->state))
8219                 return true;
8220
8221         tx_buffer = &tx_ring->tx_buffer_info[i];
8222         tx_desc = IGB_TX_DESC(tx_ring, i);
8223         i -= tx_ring->count;
8224
8225         do {
8226                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
8227
8228                 /* if next_to_watch is not set then there is no work pending */
8229                 if (!eop_desc)
8230                         break;
8231
8232                 /* prevent any other reads prior to eop_desc */
8233                 smp_rmb();
8234
8235                 /* if DD is not set pending work has not been completed */
8236                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
8237                         break;
8238
8239                 /* clear next_to_watch to prevent false hangs */
8240                 tx_buffer->next_to_watch = NULL;
8241
8242                 /* update the statistics for this packet */
8243                 total_bytes += tx_buffer->bytecount;
8244                 total_packets += tx_buffer->gso_segs;
8245
8246                 /* free the skb */
8247                 if (tx_buffer->type == IGB_TYPE_SKB)
8248                         napi_consume_skb(tx_buffer->skb, napi_budget);
8249                 else
8250                         xdp_return_frame(tx_buffer->xdpf);
8251
8252                 /* unmap skb header data */
8253                 dma_unmap_single(tx_ring->dev,
8254                                  dma_unmap_addr(tx_buffer, dma),
8255                                  dma_unmap_len(tx_buffer, len),
8256                                  DMA_TO_DEVICE);
8257
8258                 /* clear tx_buffer data */
8259                 dma_unmap_len_set(tx_buffer, len, 0);
8260
8261                 /* clear last DMA location and unmap remaining buffers */
8262                 while (tx_desc != eop_desc) {
8263                         tx_buffer++;
8264                         tx_desc++;
8265                         i++;
8266                         if (unlikely(!i)) {
8267                                 i -= tx_ring->count;
8268                                 tx_buffer = tx_ring->tx_buffer_info;
8269                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
8270                         }
8271
8272                         /* unmap any remaining paged data */
8273                         if (dma_unmap_len(tx_buffer, len)) {
8274                                 dma_unmap_page(tx_ring->dev,
8275                                                dma_unmap_addr(tx_buffer, dma),
8276                                                dma_unmap_len(tx_buffer, len),
8277                                                DMA_TO_DEVICE);
8278                                 dma_unmap_len_set(tx_buffer, len, 0);
8279                         }
8280                 }
8281
8282                 /* move us one more past the eop_desc for start of next pkt */
8283                 tx_buffer++;
8284                 tx_desc++;
8285                 i++;
8286                 if (unlikely(!i)) {
8287                         i -= tx_ring->count;
8288                         tx_buffer = tx_ring->tx_buffer_info;
8289                         tx_desc = IGB_TX_DESC(tx_ring, 0);
8290                 }
8291
8292                 /* issue prefetch for next Tx descriptor */
8293                 prefetch(tx_desc);
8294
8295                 /* update budget accounting */
8296                 budget--;
8297         } while (likely(budget));
8298
8299         netdev_tx_completed_queue(txring_txq(tx_ring),
8300                                   total_packets, total_bytes);
8301         i += tx_ring->count;
8302         tx_ring->next_to_clean = i;
8303         u64_stats_update_begin(&tx_ring->tx_syncp);
8304         tx_ring->tx_stats.bytes += total_bytes;
8305         tx_ring->tx_stats.packets += total_packets;
8306         u64_stats_update_end(&tx_ring->tx_syncp);
8307         q_vector->tx.total_bytes += total_bytes;
8308         q_vector->tx.total_packets += total_packets;
8309
8310         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
8311                 struct e1000_hw *hw = &adapter->hw;
8312
8313                 /* Detect a transmit hang in hardware, this serializes the
8314                  * check with the clearing of time_stamp and movement of i
8315                  */
8316                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
8317                 if (tx_buffer->next_to_watch &&
8318                     time_after(jiffies, tx_buffer->time_stamp +
8319                                (adapter->tx_timeout_factor * HZ)) &&
8320                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
8321
8322                         /* detected Tx unit hang */
8323                         dev_err(tx_ring->dev,
8324                                 "Detected Tx Unit Hang\n"
8325                                 "  Tx Queue             <%d>\n"
8326                                 "  TDH                  <%x>\n"
8327                                 "  TDT                  <%x>\n"
8328                                 "  next_to_use          <%x>\n"
8329                                 "  next_to_clean        <%x>\n"
8330                                 "buffer_info[next_to_clean]\n"
8331                                 "  time_stamp           <%lx>\n"
8332                                 "  next_to_watch        <%p>\n"
8333                                 "  jiffies              <%lx>\n"
8334                                 "  desc.status          <%x>\n",
8335                                 tx_ring->queue_index,
8336                                 rd32(E1000_TDH(tx_ring->reg_idx)),
8337                                 readl(tx_ring->tail),
8338                                 tx_ring->next_to_use,
8339                                 tx_ring->next_to_clean,
8340                                 tx_buffer->time_stamp,
8341                                 tx_buffer->next_to_watch,
8342                                 jiffies,
8343                                 tx_buffer->next_to_watch->wb.status);
8344                         netif_stop_subqueue(tx_ring->netdev,
8345                                             tx_ring->queue_index);
8346
8347                         /* we are about to reset, no point in enabling stuff */
8348                         return true;
8349                 }
8350         }
8351
8352 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
8353         if (unlikely(total_packets &&
8354             netif_carrier_ok(tx_ring->netdev) &&
8355             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
8356                 /* Make sure that anybody stopping the queue after this
8357                  * sees the new next_to_clean.
8358                  */
8359                 smp_mb();
8360                 if (__netif_subqueue_stopped(tx_ring->netdev,
8361                                              tx_ring->queue_index) &&
8362                     !(test_bit(__IGB_DOWN, &adapter->state))) {
8363                         netif_wake_subqueue(tx_ring->netdev,
8364                                             tx_ring->queue_index);
8365
8366                         u64_stats_update_begin(&tx_ring->tx_syncp);
8367                         tx_ring->tx_stats.restart_queue++;
8368                         u64_stats_update_end(&tx_ring->tx_syncp);
8369                 }
8370         }
8371
8372         return !!budget;
8373 }
8374
8375 /**
8376  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
8377  *  @rx_ring: rx descriptor ring to store buffers on
8378  *  @old_buff: donor buffer to have page reused
8379  *
8380  *  Synchronizes page for reuse by the adapter
8381  **/
8382 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
8383                               struct igb_rx_buffer *old_buff)
8384 {
8385         struct igb_rx_buffer *new_buff;
8386         u16 nta = rx_ring->next_to_alloc;
8387
8388         new_buff = &rx_ring->rx_buffer_info[nta];
8389
8390         /* update, and store next to alloc */
8391         nta++;
8392         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
8393
8394         /* Transfer page from old buffer to new buffer.
8395          * Move each member individually to avoid possible store
8396          * forwarding stalls.
8397          */
8398         new_buff->dma           = old_buff->dma;
8399         new_buff->page          = old_buff->page;
8400         new_buff->page_offset   = old_buff->page_offset;
8401         new_buff->pagecnt_bias  = old_buff->pagecnt_bias;
8402 }
8403
8404 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
8405                                   int rx_buf_pgcnt)
8406 {
8407         unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
8408         struct page *page = rx_buffer->page;
8409
8410         /* avoid re-using remote and pfmemalloc pages */
8411         if (!dev_page_is_reusable(page))
8412                 return false;
8413
8414 #if (PAGE_SIZE < 8192)
8415         /* if we are only owner of page we can reuse it */
8416         if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
8417                 return false;
8418 #else
8419 #define IGB_LAST_OFFSET \
8420         (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
8421
8422         if (rx_buffer->page_offset > IGB_LAST_OFFSET)
8423                 return false;
8424 #endif
8425
8426         /* If we have drained the page fragment pool we need to update
8427          * the pagecnt_bias and page count so that we fully restock the
8428          * number of references the driver holds.
8429          */
8430         if (unlikely(pagecnt_bias == 1)) {
8431                 page_ref_add(page, USHRT_MAX - 1);
8432                 rx_buffer->pagecnt_bias = USHRT_MAX;
8433         }
8434
8435         return true;
8436 }
8437
8438 /**
8439  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
8440  *  @rx_ring: rx descriptor ring to transact packets on
8441  *  @rx_buffer: buffer containing page to add
8442  *  @skb: sk_buff to place the data into
8443  *  @size: size of buffer to be added
8444  *
8445  *  This function will add the data contained in rx_buffer->page to the skb.
8446  **/
8447 static void igb_add_rx_frag(struct igb_ring *rx_ring,
8448                             struct igb_rx_buffer *rx_buffer,
8449                             struct sk_buff *skb,
8450                             unsigned int size)
8451 {
8452 #if (PAGE_SIZE < 8192)
8453         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8454 #else
8455         unsigned int truesize = ring_uses_build_skb(rx_ring) ?
8456                                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) :
8457                                 SKB_DATA_ALIGN(size);
8458 #endif
8459         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
8460                         rx_buffer->page_offset, size, truesize);
8461 #if (PAGE_SIZE < 8192)
8462         rx_buffer->page_offset ^= truesize;
8463 #else
8464         rx_buffer->page_offset += truesize;
8465 #endif
8466 }
8467
8468 static struct sk_buff *igb_construct_skb(struct igb_ring *rx_ring,
8469                                          struct igb_rx_buffer *rx_buffer,
8470                                          struct xdp_buff *xdp,
8471                                          ktime_t timestamp)
8472 {
8473 #if (PAGE_SIZE < 8192)
8474         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8475 #else
8476         unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
8477                                                xdp->data_hard_start);
8478 #endif
8479         unsigned int size = xdp->data_end - xdp->data;
8480         unsigned int headlen;
8481         struct sk_buff *skb;
8482
8483         /* prefetch first cache line of first page */
8484         net_prefetch(xdp->data);
8485
8486         /* allocate a skb to store the frags */
8487         skb = napi_alloc_skb(&rx_ring->q_vector->napi, IGB_RX_HDR_LEN);
8488         if (unlikely(!skb))
8489                 return NULL;
8490
8491         if (timestamp)
8492                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8493
8494         /* Determine available headroom for copy */
8495         headlen = size;
8496         if (headlen > IGB_RX_HDR_LEN)
8497                 headlen = eth_get_headlen(skb->dev, xdp->data, IGB_RX_HDR_LEN);
8498
8499         /* align pull length to size of long to optimize memcpy performance */
8500         memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen, sizeof(long)));
8501
8502         /* update all of the pointers */
8503         size -= headlen;
8504         if (size) {
8505                 skb_add_rx_frag(skb, 0, rx_buffer->page,
8506                                 (xdp->data + headlen) - page_address(rx_buffer->page),
8507                                 size, truesize);
8508 #if (PAGE_SIZE < 8192)
8509                 rx_buffer->page_offset ^= truesize;
8510 #else
8511                 rx_buffer->page_offset += truesize;
8512 #endif
8513         } else {
8514                 rx_buffer->pagecnt_bias++;
8515         }
8516
8517         return skb;
8518 }
8519
8520 static struct sk_buff *igb_build_skb(struct igb_ring *rx_ring,
8521                                      struct igb_rx_buffer *rx_buffer,
8522                                      struct xdp_buff *xdp,
8523                                      ktime_t timestamp)
8524 {
8525 #if (PAGE_SIZE < 8192)
8526         unsigned int truesize = igb_rx_pg_size(rx_ring) / 2;
8527 #else
8528         unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
8529                                 SKB_DATA_ALIGN(xdp->data_end -
8530                                                xdp->data_hard_start);
8531 #endif
8532         unsigned int metasize = xdp->data - xdp->data_meta;
8533         struct sk_buff *skb;
8534
8535         /* prefetch first cache line of first page */
8536         net_prefetch(xdp->data_meta);
8537
8538         /* build an skb around the page buffer */
8539         skb = napi_build_skb(xdp->data_hard_start, truesize);
8540         if (unlikely(!skb))
8541                 return NULL;
8542
8543         /* update pointers within the skb to store the data */
8544         skb_reserve(skb, xdp->data - xdp->data_hard_start);
8545         __skb_put(skb, xdp->data_end - xdp->data);
8546
8547         if (metasize)
8548                 skb_metadata_set(skb, metasize);
8549
8550         if (timestamp)
8551                 skb_hwtstamps(skb)->hwtstamp = timestamp;
8552
8553         /* update buffer offset */
8554 #if (PAGE_SIZE < 8192)
8555         rx_buffer->page_offset ^= truesize;
8556 #else
8557         rx_buffer->page_offset += truesize;
8558 #endif
8559
8560         return skb;
8561 }
8562
8563 static struct sk_buff *igb_run_xdp(struct igb_adapter *adapter,
8564                                    struct igb_ring *rx_ring,
8565                                    struct xdp_buff *xdp)
8566 {
8567         int err, result = IGB_XDP_PASS;
8568         struct bpf_prog *xdp_prog;
8569         u32 act;
8570
8571         xdp_prog = READ_ONCE(rx_ring->xdp_prog);
8572
8573         if (!xdp_prog)
8574                 goto xdp_out;
8575
8576         prefetchw(xdp->data_hard_start); /* xdp_frame write */
8577
8578         act = bpf_prog_run_xdp(xdp_prog, xdp);
8579         switch (act) {
8580         case XDP_PASS:
8581                 break;
8582         case XDP_TX:
8583                 result = igb_xdp_xmit_back(adapter, xdp);
8584                 if (result == IGB_XDP_CONSUMED)
8585                         goto out_failure;
8586                 break;
8587         case XDP_REDIRECT:
8588                 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
8589                 if (err)
8590                         goto out_failure;
8591                 result = IGB_XDP_REDIR;
8592                 break;
8593         default:
8594                 bpf_warn_invalid_xdp_action(adapter->netdev, xdp_prog, act);
8595                 fallthrough;
8596         case XDP_ABORTED:
8597 out_failure:
8598                 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
8599                 fallthrough;
8600         case XDP_DROP:
8601                 result = IGB_XDP_CONSUMED;
8602                 break;
8603         }
8604 xdp_out:
8605         return ERR_PTR(-result);
8606 }
8607
8608 static unsigned int igb_rx_frame_truesize(struct igb_ring *rx_ring,
8609                                           unsigned int size)
8610 {
8611         unsigned int truesize;
8612
8613 #if (PAGE_SIZE < 8192)
8614         truesize = igb_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
8615 #else
8616         truesize = ring_uses_build_skb(rx_ring) ?
8617                 SKB_DATA_ALIGN(IGB_SKB_PAD + size) +
8618                 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
8619                 SKB_DATA_ALIGN(size);
8620 #endif
8621         return truesize;
8622 }
8623
8624 static void igb_rx_buffer_flip(struct igb_ring *rx_ring,
8625                                struct igb_rx_buffer *rx_buffer,
8626                                unsigned int size)
8627 {
8628         unsigned int truesize = igb_rx_frame_truesize(rx_ring, size);
8629 #if (PAGE_SIZE < 8192)
8630         rx_buffer->page_offset ^= truesize;
8631 #else
8632         rx_buffer->page_offset += truesize;
8633 #endif
8634 }
8635
8636 static inline void igb_rx_checksum(struct igb_ring *ring,
8637                                    union e1000_adv_rx_desc *rx_desc,
8638                                    struct sk_buff *skb)
8639 {
8640         skb_checksum_none_assert(skb);
8641
8642         /* Ignore Checksum bit is set */
8643         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
8644                 return;
8645
8646         /* Rx checksum disabled via ethtool */
8647         if (!(ring->netdev->features & NETIF_F_RXCSUM))
8648                 return;
8649
8650         /* TCP/UDP checksum error bit is set */
8651         if (igb_test_staterr(rx_desc,
8652                              E1000_RXDEXT_STATERR_TCPE |
8653                              E1000_RXDEXT_STATERR_IPE)) {
8654                 /* work around errata with sctp packets where the TCPE aka
8655                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
8656                  * packets, (aka let the stack check the crc32c)
8657                  */
8658                 if (!((skb->len == 60) &&
8659                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
8660                         u64_stats_update_begin(&ring->rx_syncp);
8661                         ring->rx_stats.csum_err++;
8662                         u64_stats_update_end(&ring->rx_syncp);
8663                 }
8664                 /* let the stack verify checksum errors */
8665                 return;
8666         }
8667         /* It must be a TCP or UDP packet with a valid checksum */
8668         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
8669                                       E1000_RXD_STAT_UDPCS))
8670                 skb->ip_summed = CHECKSUM_UNNECESSARY;
8671
8672         dev_dbg(ring->dev, "cksum success: bits %08X\n",
8673                 le32_to_cpu(rx_desc->wb.upper.status_error));
8674 }
8675
8676 static inline void igb_rx_hash(struct igb_ring *ring,
8677                                union e1000_adv_rx_desc *rx_desc,
8678                                struct sk_buff *skb)
8679 {
8680         if (ring->netdev->features & NETIF_F_RXHASH)
8681                 skb_set_hash(skb,
8682                              le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
8683                              PKT_HASH_TYPE_L3);
8684 }
8685
8686 /**
8687  *  igb_is_non_eop - process handling of non-EOP buffers
8688  *  @rx_ring: Rx ring being processed
8689  *  @rx_desc: Rx descriptor for current buffer
8690  *
8691  *  This function updates next to clean.  If the buffer is an EOP buffer
8692  *  this function exits returning false, otherwise it will place the
8693  *  sk_buff in the next buffer to be chained and return true indicating
8694  *  that this is in fact a non-EOP buffer.
8695  **/
8696 static bool igb_is_non_eop(struct igb_ring *rx_ring,
8697                            union e1000_adv_rx_desc *rx_desc)
8698 {
8699         u32 ntc = rx_ring->next_to_clean + 1;
8700
8701         /* fetch, update, and store next to clean */
8702         ntc = (ntc < rx_ring->count) ? ntc : 0;
8703         rx_ring->next_to_clean = ntc;
8704
8705         prefetch(IGB_RX_DESC(rx_ring, ntc));
8706
8707         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
8708                 return false;
8709
8710         return true;
8711 }
8712
8713 /**
8714  *  igb_cleanup_headers - Correct corrupted or empty headers
8715  *  @rx_ring: rx descriptor ring packet is being transacted on
8716  *  @rx_desc: pointer to the EOP Rx descriptor
8717  *  @skb: pointer to current skb being fixed
8718  *
8719  *  Address the case where we are pulling data in on pages only
8720  *  and as such no data is present in the skb header.
8721  *
8722  *  In addition if skb is not at least 60 bytes we need to pad it so that
8723  *  it is large enough to qualify as a valid Ethernet frame.
8724  *
8725  *  Returns true if an error was encountered and skb was freed.
8726  **/
8727 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8728                                 union e1000_adv_rx_desc *rx_desc,
8729                                 struct sk_buff *skb)
8730 {
8731         /* XDP packets use error pointer so abort at this point */
8732         if (IS_ERR(skb))
8733                 return true;
8734
8735         if (unlikely((igb_test_staterr(rx_desc,
8736                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8737                 struct net_device *netdev = rx_ring->netdev;
8738                 if (!(netdev->features & NETIF_F_RXALL)) {
8739                         dev_kfree_skb_any(skb);
8740                         return true;
8741                 }
8742         }
8743
8744         /* if eth_skb_pad returns an error the skb was freed */
8745         if (eth_skb_pad(skb))
8746                 return true;
8747
8748         return false;
8749 }
8750
8751 /**
8752  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
8753  *  @rx_ring: rx descriptor ring packet is being transacted on
8754  *  @rx_desc: pointer to the EOP Rx descriptor
8755  *  @skb: pointer to current skb being populated
8756  *
8757  *  This function checks the ring, descriptor, and packet information in
8758  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
8759  *  other fields within the skb.
8760  **/
8761 static void igb_process_skb_fields(struct igb_ring *rx_ring,
8762                                    union e1000_adv_rx_desc *rx_desc,
8763                                    struct sk_buff *skb)
8764 {
8765         struct net_device *dev = rx_ring->netdev;
8766
8767         igb_rx_hash(rx_ring, rx_desc, skb);
8768
8769         igb_rx_checksum(rx_ring, rx_desc, skb);
8770
8771         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TS) &&
8772             !igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP))
8773                 igb_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
8774
8775         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
8776             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
8777                 u16 vid;
8778
8779                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
8780                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
8781                         vid = be16_to_cpu((__force __be16)rx_desc->wb.upper.vlan);
8782                 else
8783                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
8784
8785                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
8786         }
8787
8788         skb_record_rx_queue(skb, rx_ring->queue_index);
8789
8790         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
8791 }
8792
8793 static unsigned int igb_rx_offset(struct igb_ring *rx_ring)
8794 {
8795         return ring_uses_build_skb(rx_ring) ? IGB_SKB_PAD : 0;
8796 }
8797
8798 static struct igb_rx_buffer *igb_get_rx_buffer(struct igb_ring *rx_ring,
8799                                                const unsigned int size, int *rx_buf_pgcnt)
8800 {
8801         struct igb_rx_buffer *rx_buffer;
8802
8803         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
8804         *rx_buf_pgcnt =
8805 #if (PAGE_SIZE < 8192)
8806                 page_count(rx_buffer->page);
8807 #else
8808                 0;
8809 #endif
8810         prefetchw(rx_buffer->page);
8811
8812         /* we are reusing so sync this buffer for CPU use */
8813         dma_sync_single_range_for_cpu(rx_ring->dev,
8814                                       rx_buffer->dma,
8815                                       rx_buffer->page_offset,
8816                                       size,
8817                                       DMA_FROM_DEVICE);
8818
8819         rx_buffer->pagecnt_bias--;
8820
8821         return rx_buffer;
8822 }
8823
8824 static void igb_put_rx_buffer(struct igb_ring *rx_ring,
8825                               struct igb_rx_buffer *rx_buffer, int rx_buf_pgcnt)
8826 {
8827         if (igb_can_reuse_rx_page(rx_buffer, rx_buf_pgcnt)) {
8828                 /* hand second half of page back to the ring */
8829                 igb_reuse_rx_page(rx_ring, rx_buffer);
8830         } else {
8831                 /* We are not reusing the buffer so unmap it and free
8832                  * any references we are holding to it
8833                  */
8834                 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
8835                                      igb_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
8836                                      IGB_RX_DMA_ATTR);
8837                 __page_frag_cache_drain(rx_buffer->page,
8838                                         rx_buffer->pagecnt_bias);
8839         }
8840
8841         /* clear contents of rx_buffer */
8842         rx_buffer->page = NULL;
8843 }
8844
8845 static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
8846 {
8847         struct igb_adapter *adapter = q_vector->adapter;
8848         struct igb_ring *rx_ring = q_vector->rx.ring;
8849         struct sk_buff *skb = rx_ring->skb;
8850         unsigned int total_bytes = 0, total_packets = 0;
8851         u16 cleaned_count = igb_desc_unused(rx_ring);
8852         unsigned int xdp_xmit = 0;
8853         struct xdp_buff xdp;
8854         u32 frame_sz = 0;
8855         int rx_buf_pgcnt;
8856
8857         /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
8858 #if (PAGE_SIZE < 8192)
8859         frame_sz = igb_rx_frame_truesize(rx_ring, 0);
8860 #endif
8861         xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
8862
8863         while (likely(total_packets < budget)) {
8864                 union e1000_adv_rx_desc *rx_desc;
8865                 struct igb_rx_buffer *rx_buffer;
8866                 ktime_t timestamp = 0;
8867                 int pkt_offset = 0;
8868                 unsigned int size;
8869                 void *pktbuf;
8870
8871                 /* return some buffers to hardware, one at a time is too slow */
8872                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8873                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8874                         cleaned_count = 0;
8875                 }
8876
8877                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8878                 size = le16_to_cpu(rx_desc->wb.upper.length);
8879                 if (!size)
8880                         break;
8881
8882                 /* This memory barrier is needed to keep us from reading
8883                  * any other fields out of the rx_desc until we know the
8884                  * descriptor has been written back
8885                  */
8886                 dma_rmb();
8887
8888                 rx_buffer = igb_get_rx_buffer(rx_ring, size, &rx_buf_pgcnt);
8889                 pktbuf = page_address(rx_buffer->page) + rx_buffer->page_offset;
8890
8891                 /* pull rx packet timestamp if available and valid */
8892                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8893                         int ts_hdr_len;
8894
8895                         ts_hdr_len = igb_ptp_rx_pktstamp(rx_ring->q_vector,
8896                                                          pktbuf, &timestamp);
8897
8898                         pkt_offset += ts_hdr_len;
8899                         size -= ts_hdr_len;
8900                 }
8901
8902                 /* retrieve a buffer from the ring */
8903                 if (!skb) {
8904                         unsigned char *hard_start = pktbuf - igb_rx_offset(rx_ring);
8905                         unsigned int offset = pkt_offset + igb_rx_offset(rx_ring);
8906
8907                         xdp_prepare_buff(&xdp, hard_start, offset, size, true);
8908                         xdp_buff_clear_frags_flag(&xdp);
8909 #if (PAGE_SIZE > 4096)
8910                         /* At larger PAGE_SIZE, frame_sz depend on len size */
8911                         xdp.frame_sz = igb_rx_frame_truesize(rx_ring, size);
8912 #endif
8913                         skb = igb_run_xdp(adapter, rx_ring, &xdp);
8914                 }
8915
8916                 if (IS_ERR(skb)) {
8917                         unsigned int xdp_res = -PTR_ERR(skb);
8918
8919                         if (xdp_res & (IGB_XDP_TX | IGB_XDP_REDIR)) {
8920                                 xdp_xmit |= xdp_res;
8921                                 igb_rx_buffer_flip(rx_ring, rx_buffer, size);
8922                         } else {
8923                                 rx_buffer->pagecnt_bias++;
8924                         }
8925                         total_packets++;
8926                         total_bytes += size;
8927                 } else if (skb)
8928                         igb_add_rx_frag(rx_ring, rx_buffer, skb, size);
8929                 else if (ring_uses_build_skb(rx_ring))
8930                         skb = igb_build_skb(rx_ring, rx_buffer, &xdp,
8931                                             timestamp);
8932                 else
8933                         skb = igb_construct_skb(rx_ring, rx_buffer,
8934                                                 &xdp, timestamp);
8935
8936                 /* exit if we failed to retrieve a buffer */
8937                 if (!skb) {
8938                         rx_ring->rx_stats.alloc_failed++;
8939                         rx_buffer->pagecnt_bias++;
8940                         break;
8941                 }
8942
8943                 igb_put_rx_buffer(rx_ring, rx_buffer, rx_buf_pgcnt);
8944                 cleaned_count++;
8945
8946                 /* fetch next buffer in frame if non-eop */
8947                 if (igb_is_non_eop(rx_ring, rx_desc))
8948                         continue;
8949
8950                 /* verify the packet layout is correct */
8951                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8952                         skb = NULL;
8953                         continue;
8954                 }
8955
8956                 /* probably a little skewed due to removing CRC */
8957                 total_bytes += skb->len;
8958
8959                 /* populate checksum, timestamp, VLAN, and protocol */
8960                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8961
8962                 napi_gro_receive(&q_vector->napi, skb);
8963
8964                 /* reset skb pointer */
8965                 skb = NULL;
8966
8967                 /* update budget accounting */
8968                 total_packets++;
8969         }
8970
8971         /* place incomplete frames back on ring for completion */
8972         rx_ring->skb = skb;
8973
8974         if (xdp_xmit & IGB_XDP_REDIR)
8975                 xdp_do_flush();
8976
8977         if (xdp_xmit & IGB_XDP_TX) {
8978                 struct igb_ring *tx_ring = igb_xdp_tx_queue_mapping(adapter);
8979
8980                 igb_xdp_ring_update_tail(tx_ring);
8981         }
8982
8983         u64_stats_update_begin(&rx_ring->rx_syncp);
8984         rx_ring->rx_stats.packets += total_packets;
8985         rx_ring->rx_stats.bytes += total_bytes;
8986         u64_stats_update_end(&rx_ring->rx_syncp);
8987         q_vector->rx.total_packets += total_packets;
8988         q_vector->rx.total_bytes += total_bytes;
8989
8990         if (cleaned_count)
8991                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8992
8993         return total_packets;
8994 }
8995
8996 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8997                                   struct igb_rx_buffer *bi)
8998 {
8999         struct page *page = bi->page;
9000         dma_addr_t dma;
9001
9002         /* since we are recycling buffers we should seldom need to alloc */
9003         if (likely(page))
9004                 return true;
9005
9006         /* alloc new page for storage */
9007         page = dev_alloc_pages(igb_rx_pg_order(rx_ring));
9008         if (unlikely(!page)) {
9009                 rx_ring->rx_stats.alloc_failed++;
9010                 return false;
9011         }
9012
9013         /* map page for use */
9014         dma = dma_map_page_attrs(rx_ring->dev, page, 0,
9015                                  igb_rx_pg_size(rx_ring),
9016                                  DMA_FROM_DEVICE,
9017                                  IGB_RX_DMA_ATTR);
9018
9019         /* if mapping failed free memory back to system since
9020          * there isn't much point in holding memory we can't use
9021          */
9022         if (dma_mapping_error(rx_ring->dev, dma)) {
9023                 __free_pages(page, igb_rx_pg_order(rx_ring));
9024
9025                 rx_ring->rx_stats.alloc_failed++;
9026                 return false;
9027         }
9028
9029         bi->dma = dma;
9030         bi->page = page;
9031         bi->page_offset = igb_rx_offset(rx_ring);
9032         page_ref_add(page, USHRT_MAX - 1);
9033         bi->pagecnt_bias = USHRT_MAX;
9034
9035         return true;
9036 }
9037
9038 /**
9039  *  igb_alloc_rx_buffers - Replace used receive buffers
9040  *  @rx_ring: rx descriptor ring to allocate new receive buffers
9041  *  @cleaned_count: count of buffers to allocate
9042  **/
9043 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
9044 {
9045         union e1000_adv_rx_desc *rx_desc;
9046         struct igb_rx_buffer *bi;
9047         u16 i = rx_ring->next_to_use;
9048         u16 bufsz;
9049
9050         /* nothing to do */
9051         if (!cleaned_count)
9052                 return;
9053
9054         rx_desc = IGB_RX_DESC(rx_ring, i);
9055         bi = &rx_ring->rx_buffer_info[i];
9056         i -= rx_ring->count;
9057
9058         bufsz = igb_rx_bufsz(rx_ring);
9059
9060         do {
9061                 if (!igb_alloc_mapped_page(rx_ring, bi))
9062                         break;
9063
9064                 /* sync the buffer for use by the device */
9065                 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
9066                                                  bi->page_offset, bufsz,
9067                                                  DMA_FROM_DEVICE);
9068
9069                 /* Refresh the desc even if buffer_addrs didn't change
9070                  * because each write-back erases this info.
9071                  */
9072                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
9073
9074                 rx_desc++;
9075                 bi++;
9076                 i++;
9077                 if (unlikely(!i)) {
9078                         rx_desc = IGB_RX_DESC(rx_ring, 0);
9079                         bi = rx_ring->rx_buffer_info;
9080                         i -= rx_ring->count;
9081                 }
9082
9083                 /* clear the length for the next_to_use descriptor */
9084                 rx_desc->wb.upper.length = 0;
9085
9086                 cleaned_count--;
9087         } while (cleaned_count);
9088
9089         i += rx_ring->count;
9090
9091         if (rx_ring->next_to_use != i) {
9092                 /* record the next descriptor to use */
9093                 rx_ring->next_to_use = i;
9094
9095                 /* update next to alloc since we have filled the ring */
9096                 rx_ring->next_to_alloc = i;
9097
9098                 /* Force memory writes to complete before letting h/w
9099                  * know there are new descriptors to fetch.  (Only
9100                  * applicable for weak-ordered memory model archs,
9101                  * such as IA-64).
9102                  */
9103                 dma_wmb();
9104                 writel(i, rx_ring->tail);
9105         }
9106 }
9107
9108 /**
9109  * igb_mii_ioctl -
9110  * @netdev: pointer to netdev struct
9111  * @ifr: interface structure
9112  * @cmd: ioctl command to execute
9113  **/
9114 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9115 {
9116         struct igb_adapter *adapter = netdev_priv(netdev);
9117         struct mii_ioctl_data *data = if_mii(ifr);
9118
9119         if (adapter->hw.phy.media_type != e1000_media_type_copper)
9120                 return -EOPNOTSUPP;
9121
9122         switch (cmd) {
9123         case SIOCGMIIPHY:
9124                 data->phy_id = adapter->hw.phy.addr;
9125                 break;
9126         case SIOCGMIIREG:
9127                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
9128                                      &data->val_out))
9129                         return -EIO;
9130                 break;
9131         case SIOCSMIIREG:
9132         default:
9133                 return -EOPNOTSUPP;
9134         }
9135         return 0;
9136 }
9137
9138 /**
9139  * igb_ioctl -
9140  * @netdev: pointer to netdev struct
9141  * @ifr: interface structure
9142  * @cmd: ioctl command to execute
9143  **/
9144 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
9145 {
9146         switch (cmd) {
9147         case SIOCGMIIPHY:
9148         case SIOCGMIIREG:
9149         case SIOCSMIIREG:
9150                 return igb_mii_ioctl(netdev, ifr, cmd);
9151         case SIOCGHWTSTAMP:
9152                 return igb_ptp_get_ts_config(netdev, ifr);
9153         case SIOCSHWTSTAMP:
9154                 return igb_ptp_set_ts_config(netdev, ifr);
9155         default:
9156                 return -EOPNOTSUPP;
9157         }
9158 }
9159
9160 void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9161 {
9162         struct igb_adapter *adapter = hw->back;
9163
9164         pci_read_config_word(adapter->pdev, reg, value);
9165 }
9166
9167 void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
9168 {
9169         struct igb_adapter *adapter = hw->back;
9170
9171         pci_write_config_word(adapter->pdev, reg, *value);
9172 }
9173
9174 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9175 {
9176         struct igb_adapter *adapter = hw->back;
9177
9178         if (pcie_capability_read_word(adapter->pdev, reg, value))
9179                 return -E1000_ERR_CONFIG;
9180
9181         return 0;
9182 }
9183
9184 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
9185 {
9186         struct igb_adapter *adapter = hw->back;
9187
9188         if (pcie_capability_write_word(adapter->pdev, reg, *value))
9189                 return -E1000_ERR_CONFIG;
9190
9191         return 0;
9192 }
9193
9194 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
9195 {
9196         struct igb_adapter *adapter = netdev_priv(netdev);
9197         struct e1000_hw *hw = &adapter->hw;
9198         u32 ctrl, rctl;
9199         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
9200
9201         if (enable) {
9202                 /* enable VLAN tag insert/strip */
9203                 ctrl = rd32(E1000_CTRL);
9204                 ctrl |= E1000_CTRL_VME;
9205                 wr32(E1000_CTRL, ctrl);
9206
9207                 /* Disable CFI check */
9208                 rctl = rd32(E1000_RCTL);
9209                 rctl &= ~E1000_RCTL_CFIEN;
9210                 wr32(E1000_RCTL, rctl);
9211         } else {
9212                 /* disable VLAN tag insert/strip */
9213                 ctrl = rd32(E1000_CTRL);
9214                 ctrl &= ~E1000_CTRL_VME;
9215                 wr32(E1000_CTRL, ctrl);
9216         }
9217
9218         igb_set_vf_vlan_strip(adapter, adapter->vfs_allocated_count, enable);
9219 }
9220
9221 static int igb_vlan_rx_add_vid(struct net_device *netdev,
9222                                __be16 proto, u16 vid)
9223 {
9224         struct igb_adapter *adapter = netdev_priv(netdev);
9225         struct e1000_hw *hw = &adapter->hw;
9226         int pf_id = adapter->vfs_allocated_count;
9227
9228         /* add the filter since PF can receive vlans w/o entry in vlvf */
9229         if (!vid || !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9230                 igb_vfta_set(hw, vid, pf_id, true, !!vid);
9231
9232         set_bit(vid, adapter->active_vlans);
9233
9234         return 0;
9235 }
9236
9237 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
9238                                 __be16 proto, u16 vid)
9239 {
9240         struct igb_adapter *adapter = netdev_priv(netdev);
9241         int pf_id = adapter->vfs_allocated_count;
9242         struct e1000_hw *hw = &adapter->hw;
9243
9244         /* remove VID from filter table */
9245         if (vid && !(adapter->flags & IGB_FLAG_VLAN_PROMISC))
9246                 igb_vfta_set(hw, vid, pf_id, false, true);
9247
9248         clear_bit(vid, adapter->active_vlans);
9249
9250         return 0;
9251 }
9252
9253 static void igb_restore_vlan(struct igb_adapter *adapter)
9254 {
9255         u16 vid = 1;
9256
9257         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
9258         igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
9259
9260         for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
9261                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
9262 }
9263
9264 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
9265 {
9266         struct pci_dev *pdev = adapter->pdev;
9267         struct e1000_mac_info *mac = &adapter->hw.mac;
9268
9269         mac->autoneg = 0;
9270
9271         /* Make sure dplx is at most 1 bit and lsb of speed is not set
9272          * for the switch() below to work
9273          */
9274         if ((spd & 1) || (dplx & ~1))
9275                 goto err_inval;
9276
9277         /* Fiber NIC's only allow 1000 gbps Full duplex
9278          * and 100Mbps Full duplex for 100baseFx sfp
9279          */
9280         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
9281                 switch (spd + dplx) {
9282                 case SPEED_10 + DUPLEX_HALF:
9283                 case SPEED_10 + DUPLEX_FULL:
9284                 case SPEED_100 + DUPLEX_HALF:
9285                         goto err_inval;
9286                 default:
9287                         break;
9288                 }
9289         }
9290
9291         switch (spd + dplx) {
9292         case SPEED_10 + DUPLEX_HALF:
9293                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
9294                 break;
9295         case SPEED_10 + DUPLEX_FULL:
9296                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
9297                 break;
9298         case SPEED_100 + DUPLEX_HALF:
9299                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
9300                 break;
9301         case SPEED_100 + DUPLEX_FULL:
9302                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
9303                 break;
9304         case SPEED_1000 + DUPLEX_FULL:
9305                 mac->autoneg = 1;
9306                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
9307                 break;
9308         case SPEED_1000 + DUPLEX_HALF: /* not supported */
9309         default:
9310                 goto err_inval;
9311         }
9312
9313         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
9314         adapter->hw.phy.mdix = AUTO_ALL_MODES;
9315
9316         return 0;
9317
9318 err_inval:
9319         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
9320         return -EINVAL;
9321 }
9322
9323 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
9324                           bool runtime)
9325 {
9326         struct net_device *netdev = pci_get_drvdata(pdev);
9327         struct igb_adapter *adapter = netdev_priv(netdev);
9328         struct e1000_hw *hw = &adapter->hw;
9329         u32 ctrl, rctl, status;
9330         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
9331         bool wake;
9332
9333         rtnl_lock();
9334         netif_device_detach(netdev);
9335
9336         if (netif_running(netdev))
9337                 __igb_close(netdev, true);
9338
9339         igb_ptp_suspend(adapter);
9340
9341         igb_clear_interrupt_scheme(adapter);
9342         rtnl_unlock();
9343
9344         status = rd32(E1000_STATUS);
9345         if (status & E1000_STATUS_LU)
9346                 wufc &= ~E1000_WUFC_LNKC;
9347
9348         if (wufc) {
9349                 igb_setup_rctl(adapter);
9350                 igb_set_rx_mode(netdev);
9351
9352                 /* turn on all-multi mode if wake on multicast is enabled */
9353                 if (wufc & E1000_WUFC_MC) {
9354                         rctl = rd32(E1000_RCTL);
9355                         rctl |= E1000_RCTL_MPE;
9356                         wr32(E1000_RCTL, rctl);
9357                 }
9358
9359                 ctrl = rd32(E1000_CTRL);
9360                 ctrl |= E1000_CTRL_ADVD3WUC;
9361                 wr32(E1000_CTRL, ctrl);
9362
9363                 /* Allow time for pending master requests to run */
9364                 igb_disable_pcie_master(hw);
9365
9366                 wr32(E1000_WUC, E1000_WUC_PME_EN);
9367                 wr32(E1000_WUFC, wufc);
9368         } else {
9369                 wr32(E1000_WUC, 0);
9370                 wr32(E1000_WUFC, 0);
9371         }
9372
9373         wake = wufc || adapter->en_mng_pt;
9374         if (!wake)
9375                 igb_power_down_link(adapter);
9376         else
9377                 igb_power_up_link(adapter);
9378
9379         if (enable_wake)
9380                 *enable_wake = wake;
9381
9382         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
9383          * would have already happened in close and is redundant.
9384          */
9385         igb_release_hw_control(adapter);
9386
9387         pci_disable_device(pdev);
9388
9389         return 0;
9390 }
9391
9392 static void igb_deliver_wake_packet(struct net_device *netdev)
9393 {
9394         struct igb_adapter *adapter = netdev_priv(netdev);
9395         struct e1000_hw *hw = &adapter->hw;
9396         struct sk_buff *skb;
9397         u32 wupl;
9398
9399         wupl = rd32(E1000_WUPL) & E1000_WUPL_MASK;
9400
9401         /* WUPM stores only the first 128 bytes of the wake packet.
9402          * Read the packet only if we have the whole thing.
9403          */
9404         if ((wupl == 0) || (wupl > E1000_WUPM_BYTES))
9405                 return;
9406
9407         skb = netdev_alloc_skb_ip_align(netdev, E1000_WUPM_BYTES);
9408         if (!skb)
9409                 return;
9410
9411         skb_put(skb, wupl);
9412
9413         /* Ensure reads are 32-bit aligned */
9414         wupl = roundup(wupl, 4);
9415
9416         memcpy_fromio(skb->data, hw->hw_addr + E1000_WUPM_REG(0), wupl);
9417
9418         skb->protocol = eth_type_trans(skb, netdev);
9419         netif_rx(skb);
9420 }
9421
9422 static int __maybe_unused igb_suspend(struct device *dev)
9423 {
9424         return __igb_shutdown(to_pci_dev(dev), NULL, 0);
9425 }
9426
9427 static int __maybe_unused __igb_resume(struct device *dev, bool rpm)
9428 {
9429         struct pci_dev *pdev = to_pci_dev(dev);
9430         struct net_device *netdev = pci_get_drvdata(pdev);
9431         struct igb_adapter *adapter = netdev_priv(netdev);
9432         struct e1000_hw *hw = &adapter->hw;
9433         u32 err, val;
9434
9435         pci_set_power_state(pdev, PCI_D0);
9436         pci_restore_state(pdev);
9437         pci_save_state(pdev);
9438
9439         if (!pci_device_is_present(pdev))
9440                 return -ENODEV;
9441         err = pci_enable_device_mem(pdev);
9442         if (err) {
9443                 dev_err(&pdev->dev,
9444                         "igb: Cannot enable PCI device from suspend\n");
9445                 return err;
9446         }
9447         pci_set_master(pdev);
9448
9449         pci_enable_wake(pdev, PCI_D3hot, 0);
9450         pci_enable_wake(pdev, PCI_D3cold, 0);
9451
9452         if (igb_init_interrupt_scheme(adapter, true)) {
9453                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9454                 return -ENOMEM;
9455         }
9456
9457         igb_reset(adapter);
9458
9459         /* let the f/w know that the h/w is now under the control of the
9460          * driver.
9461          */
9462         igb_get_hw_control(adapter);
9463
9464         val = rd32(E1000_WUS);
9465         if (val & WAKE_PKT_WUS)
9466                 igb_deliver_wake_packet(netdev);
9467
9468         wr32(E1000_WUS, ~0);
9469
9470         if (!rpm)
9471                 rtnl_lock();
9472         if (!err && netif_running(netdev))
9473                 err = __igb_open(netdev, true);
9474
9475         if (!err)
9476                 netif_device_attach(netdev);
9477         if (!rpm)
9478                 rtnl_unlock();
9479
9480         return err;
9481 }
9482
9483 static int __maybe_unused igb_resume(struct device *dev)
9484 {
9485         return __igb_resume(dev, false);
9486 }
9487
9488 static int __maybe_unused igb_runtime_idle(struct device *dev)
9489 {
9490         struct net_device *netdev = dev_get_drvdata(dev);
9491         struct igb_adapter *adapter = netdev_priv(netdev);
9492
9493         if (!igb_has_link(adapter))
9494                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9495
9496         return -EBUSY;
9497 }
9498
9499 static int __maybe_unused igb_runtime_suspend(struct device *dev)
9500 {
9501         return __igb_shutdown(to_pci_dev(dev), NULL, 1);
9502 }
9503
9504 static int __maybe_unused igb_runtime_resume(struct device *dev)
9505 {
9506         return __igb_resume(dev, true);
9507 }
9508
9509 static void igb_shutdown(struct pci_dev *pdev)
9510 {
9511         bool wake;
9512
9513         __igb_shutdown(pdev, &wake, 0);
9514
9515         if (system_state == SYSTEM_POWER_OFF) {
9516                 pci_wake_from_d3(pdev, wake);
9517                 pci_set_power_state(pdev, PCI_D3hot);
9518         }
9519 }
9520
9521 #ifdef CONFIG_PCI_IOV
9522 static int igb_sriov_reinit(struct pci_dev *dev)
9523 {
9524         struct net_device *netdev = pci_get_drvdata(dev);
9525         struct igb_adapter *adapter = netdev_priv(netdev);
9526         struct pci_dev *pdev = adapter->pdev;
9527
9528         rtnl_lock();
9529
9530         if (netif_running(netdev))
9531                 igb_close(netdev);
9532         else
9533                 igb_reset(adapter);
9534
9535         igb_clear_interrupt_scheme(adapter);
9536
9537         igb_init_queue_configuration(adapter);
9538
9539         if (igb_init_interrupt_scheme(adapter, true)) {
9540                 rtnl_unlock();
9541                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
9542                 return -ENOMEM;
9543         }
9544
9545         if (netif_running(netdev))
9546                 igb_open(netdev);
9547
9548         rtnl_unlock();
9549
9550         return 0;
9551 }
9552
9553 static int igb_pci_disable_sriov(struct pci_dev *dev)
9554 {
9555         int err = igb_disable_sriov(dev);
9556
9557         if (!err)
9558                 err = igb_sriov_reinit(dev);
9559
9560         return err;
9561 }
9562
9563 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
9564 {
9565         int err = igb_enable_sriov(dev, num_vfs);
9566
9567         if (err)
9568                 goto out;
9569
9570         err = igb_sriov_reinit(dev);
9571         if (!err)
9572                 return num_vfs;
9573
9574 out:
9575         return err;
9576 }
9577
9578 #endif
9579 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
9580 {
9581 #ifdef CONFIG_PCI_IOV
9582         if (num_vfs == 0)
9583                 return igb_pci_disable_sriov(dev);
9584         else
9585                 return igb_pci_enable_sriov(dev, num_vfs);
9586 #endif
9587         return 0;
9588 }
9589
9590 /**
9591  *  igb_io_error_detected - called when PCI error is detected
9592  *  @pdev: Pointer to PCI device
9593  *  @state: The current pci connection state
9594  *
9595  *  This function is called after a PCI bus error affecting
9596  *  this device has been detected.
9597  **/
9598 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9599                                               pci_channel_state_t state)
9600 {
9601         struct net_device *netdev = pci_get_drvdata(pdev);
9602         struct igb_adapter *adapter = netdev_priv(netdev);
9603
9604         netif_device_detach(netdev);
9605
9606         if (state == pci_channel_io_perm_failure)
9607                 return PCI_ERS_RESULT_DISCONNECT;
9608
9609         if (netif_running(netdev))
9610                 igb_down(adapter);
9611         pci_disable_device(pdev);
9612
9613         /* Request a slot reset. */
9614         return PCI_ERS_RESULT_NEED_RESET;
9615 }
9616
9617 /**
9618  *  igb_io_slot_reset - called after the pci bus has been reset.
9619  *  @pdev: Pointer to PCI device
9620  *
9621  *  Restart the card from scratch, as if from a cold-boot. Implementation
9622  *  resembles the first-half of the __igb_resume routine.
9623  **/
9624 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9625 {
9626         struct net_device *netdev = pci_get_drvdata(pdev);
9627         struct igb_adapter *adapter = netdev_priv(netdev);
9628         struct e1000_hw *hw = &adapter->hw;
9629         pci_ers_result_t result;
9630
9631         if (pci_enable_device_mem(pdev)) {
9632                 dev_err(&pdev->dev,
9633                         "Cannot re-enable PCI device after reset.\n");
9634                 result = PCI_ERS_RESULT_DISCONNECT;
9635         } else {
9636                 pci_set_master(pdev);
9637                 pci_restore_state(pdev);
9638                 pci_save_state(pdev);
9639
9640                 pci_enable_wake(pdev, PCI_D3hot, 0);
9641                 pci_enable_wake(pdev, PCI_D3cold, 0);
9642
9643                 /* In case of PCI error, adapter lose its HW address
9644                  * so we should re-assign it here.
9645                  */
9646                 hw->hw_addr = adapter->io_addr;
9647
9648                 igb_reset(adapter);
9649                 wr32(E1000_WUS, ~0);
9650                 result = PCI_ERS_RESULT_RECOVERED;
9651         }
9652
9653         return result;
9654 }
9655
9656 /**
9657  *  igb_io_resume - called when traffic can start flowing again.
9658  *  @pdev: Pointer to PCI device
9659  *
9660  *  This callback is called when the error recovery driver tells us that
9661  *  its OK to resume normal operation. Implementation resembles the
9662  *  second-half of the __igb_resume routine.
9663  */
9664 static void igb_io_resume(struct pci_dev *pdev)
9665 {
9666         struct net_device *netdev = pci_get_drvdata(pdev);
9667         struct igb_adapter *adapter = netdev_priv(netdev);
9668
9669         if (netif_running(netdev)) {
9670                 if (igb_up(adapter)) {
9671                         dev_err(&pdev->dev, "igb_up failed after reset\n");
9672                         return;
9673                 }
9674         }
9675
9676         netif_device_attach(netdev);
9677
9678         /* let the f/w know that the h/w is now under the control of the
9679          * driver.
9680          */
9681         igb_get_hw_control(adapter);
9682 }
9683
9684 /**
9685  *  igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
9686  *  @adapter: Pointer to adapter structure
9687  *  @index: Index of the RAR entry which need to be synced with MAC table
9688  **/
9689 static void igb_rar_set_index(struct igb_adapter *adapter, u32 index)
9690 {
9691         struct e1000_hw *hw = &adapter->hw;
9692         u32 rar_low, rar_high;
9693         u8 *addr = adapter->mac_table[index].addr;
9694
9695         /* HW expects these to be in network order when they are plugged
9696          * into the registers which are little endian.  In order to guarantee
9697          * that ordering we need to do an leXX_to_cpup here in order to be
9698          * ready for the byteswap that occurs with writel
9699          */
9700         rar_low = le32_to_cpup((__le32 *)(addr));
9701         rar_high = le16_to_cpup((__le16 *)(addr + 4));
9702
9703         /* Indicate to hardware the Address is Valid. */
9704         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE) {
9705                 if (is_valid_ether_addr(addr))
9706                         rar_high |= E1000_RAH_AV;
9707
9708                 if (adapter->mac_table[index].state & IGB_MAC_STATE_SRC_ADDR)
9709                         rar_high |= E1000_RAH_ASEL_SRC_ADDR;
9710
9711                 switch (hw->mac.type) {
9712                 case e1000_82575:
9713                 case e1000_i210:
9714                         if (adapter->mac_table[index].state &
9715                             IGB_MAC_STATE_QUEUE_STEERING)
9716                                 rar_high |= E1000_RAH_QSEL_ENABLE;
9717
9718                         rar_high |= E1000_RAH_POOL_1 *
9719                                     adapter->mac_table[index].queue;
9720                         break;
9721                 default:
9722                         rar_high |= E1000_RAH_POOL_1 <<
9723                                     adapter->mac_table[index].queue;
9724                         break;
9725                 }
9726         }
9727
9728         wr32(E1000_RAL(index), rar_low);
9729         wrfl();
9730         wr32(E1000_RAH(index), rar_high);
9731         wrfl();
9732 }
9733
9734 static int igb_set_vf_mac(struct igb_adapter *adapter,
9735                           int vf, unsigned char *mac_addr)
9736 {
9737         struct e1000_hw *hw = &adapter->hw;
9738         /* VF MAC addresses start at end of receive addresses and moves
9739          * towards the first, as a result a collision should not be possible
9740          */
9741         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
9742         unsigned char *vf_mac_addr = adapter->vf_data[vf].vf_mac_addresses;
9743
9744         ether_addr_copy(vf_mac_addr, mac_addr);
9745         ether_addr_copy(adapter->mac_table[rar_entry].addr, mac_addr);
9746         adapter->mac_table[rar_entry].queue = vf;
9747         adapter->mac_table[rar_entry].state |= IGB_MAC_STATE_IN_USE;
9748         igb_rar_set_index(adapter, rar_entry);
9749
9750         return 0;
9751 }
9752
9753 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9754 {
9755         struct igb_adapter *adapter = netdev_priv(netdev);
9756
9757         if (vf >= adapter->vfs_allocated_count)
9758                 return -EINVAL;
9759
9760         /* Setting the VF MAC to 0 reverts the IGB_VF_FLAG_PF_SET_MAC
9761          * flag and allows to overwrite the MAC via VF netdev.  This
9762          * is necessary to allow libvirt a way to restore the original
9763          * MAC after unbinding vfio-pci and reloading igbvf after shutting
9764          * down a VM.
9765          */
9766         if (is_zero_ether_addr(mac)) {
9767                 adapter->vf_data[vf].flags &= ~IGB_VF_FLAG_PF_SET_MAC;
9768                 dev_info(&adapter->pdev->dev,
9769                          "remove administratively set MAC on VF %d\n",
9770                          vf);
9771         } else if (is_valid_ether_addr(mac)) {
9772                 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9773                 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n",
9774                          mac, vf);
9775                 dev_info(&adapter->pdev->dev,
9776                          "Reload the VF driver to make this change effective.");
9777                 /* Generate additional warning if PF is down */
9778                 if (test_bit(__IGB_DOWN, &adapter->state)) {
9779                         dev_warn(&adapter->pdev->dev,
9780                                  "The VF MAC address has been set, but the PF device is not up.\n");
9781                         dev_warn(&adapter->pdev->dev,
9782                                  "Bring the PF device up before attempting to use the VF device.\n");
9783                 }
9784         } else {
9785                 return -EINVAL;
9786         }
9787         return igb_set_vf_mac(adapter, vf, mac);
9788 }
9789
9790 static int igb_link_mbps(int internal_link_speed)
9791 {
9792         switch (internal_link_speed) {
9793         case SPEED_100:
9794                 return 100;
9795         case SPEED_1000:
9796                 return 1000;
9797         default:
9798                 return 0;
9799         }
9800 }
9801
9802 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9803                                   int link_speed)
9804 {
9805         int rf_dec, rf_int;
9806         u32 bcnrc_val;
9807
9808         if (tx_rate != 0) {
9809                 /* Calculate the rate factor values to set */
9810                 rf_int = link_speed / tx_rate;
9811                 rf_dec = (link_speed - (rf_int * tx_rate));
9812                 rf_dec = (rf_dec * BIT(E1000_RTTBCNRC_RF_INT_SHIFT)) /
9813                          tx_rate;
9814
9815                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9816                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
9817                               E1000_RTTBCNRC_RF_INT_MASK);
9818                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9819         } else {
9820                 bcnrc_val = 0;
9821         }
9822
9823         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
9824         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9825          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9826          */
9827         wr32(E1000_RTTBCNRM, 0x14);
9828         wr32(E1000_RTTBCNRC, bcnrc_val);
9829 }
9830
9831 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9832 {
9833         int actual_link_speed, i;
9834         bool reset_rate = false;
9835
9836         /* VF TX rate limit was not set or not supported */
9837         if ((adapter->vf_rate_link_speed == 0) ||
9838             (adapter->hw.mac.type != e1000_82576))
9839                 return;
9840
9841         actual_link_speed = igb_link_mbps(adapter->link_speed);
9842         if (actual_link_speed != adapter->vf_rate_link_speed) {
9843                 reset_rate = true;
9844                 adapter->vf_rate_link_speed = 0;
9845                 dev_info(&adapter->pdev->dev,
9846                          "Link speed has been changed. VF Transmit rate is disabled\n");
9847         }
9848
9849         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9850                 if (reset_rate)
9851                         adapter->vf_data[i].tx_rate = 0;
9852
9853                 igb_set_vf_rate_limit(&adapter->hw, i,
9854                                       adapter->vf_data[i].tx_rate,
9855                                       actual_link_speed);
9856         }
9857 }
9858
9859 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf,
9860                              int min_tx_rate, int max_tx_rate)
9861 {
9862         struct igb_adapter *adapter = netdev_priv(netdev);
9863         struct e1000_hw *hw = &adapter->hw;
9864         int actual_link_speed;
9865
9866         if (hw->mac.type != e1000_82576)
9867                 return -EOPNOTSUPP;
9868
9869         if (min_tx_rate)
9870                 return -EINVAL;
9871
9872         actual_link_speed = igb_link_mbps(adapter->link_speed);
9873         if ((vf >= adapter->vfs_allocated_count) ||
9874             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
9875             (max_tx_rate < 0) ||
9876             (max_tx_rate > actual_link_speed))
9877                 return -EINVAL;
9878
9879         adapter->vf_rate_link_speed = actual_link_speed;
9880         adapter->vf_data[vf].tx_rate = (u16)max_tx_rate;
9881         igb_set_vf_rate_limit(hw, vf, max_tx_rate, actual_link_speed);
9882
9883         return 0;
9884 }
9885
9886 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
9887                                    bool setting)
9888 {
9889         struct igb_adapter *adapter = netdev_priv(netdev);
9890         struct e1000_hw *hw = &adapter->hw;
9891         u32 reg_val, reg_offset;
9892
9893         if (!adapter->vfs_allocated_count)
9894                 return -EOPNOTSUPP;
9895
9896         if (vf >= adapter->vfs_allocated_count)
9897                 return -EINVAL;
9898
9899         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
9900         reg_val = rd32(reg_offset);
9901         if (setting)
9902                 reg_val |= (BIT(vf) |
9903                             BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9904         else
9905                 reg_val &= ~(BIT(vf) |
9906                              BIT(vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT));
9907         wr32(reg_offset, reg_val);
9908
9909         adapter->vf_data[vf].spoofchk_enabled = setting;
9910         return 0;
9911 }
9912
9913 static int igb_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
9914 {
9915         struct igb_adapter *adapter = netdev_priv(netdev);
9916
9917         if (vf >= adapter->vfs_allocated_count)
9918                 return -EINVAL;
9919         if (adapter->vf_data[vf].trusted == setting)
9920                 return 0;
9921
9922         adapter->vf_data[vf].trusted = setting;
9923
9924         dev_info(&adapter->pdev->dev, "VF %u is %strusted\n",
9925                  vf, setting ? "" : "not ");
9926         return 0;
9927 }
9928
9929 static int igb_ndo_get_vf_config(struct net_device *netdev,
9930                                  int vf, struct ifla_vf_info *ivi)
9931 {
9932         struct igb_adapter *adapter = netdev_priv(netdev);
9933         if (vf >= adapter->vfs_allocated_count)
9934                 return -EINVAL;
9935         ivi->vf = vf;
9936         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9937         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9938         ivi->min_tx_rate = 0;
9939         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9940         ivi->qos = adapter->vf_data[vf].pf_qos;
9941         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9942         ivi->trusted = adapter->vf_data[vf].trusted;
9943         return 0;
9944 }
9945
9946 static void igb_vmm_control(struct igb_adapter *adapter)
9947 {
9948         struct e1000_hw *hw = &adapter->hw;
9949         u32 reg;
9950
9951         switch (hw->mac.type) {
9952         case e1000_82575:
9953         case e1000_i210:
9954         case e1000_i211:
9955         case e1000_i354:
9956         default:
9957                 /* replication is not supported for 82575 */
9958                 return;
9959         case e1000_82576:
9960                 /* notify HW that the MAC is adding vlan tags */
9961                 reg = rd32(E1000_DTXCTL);
9962                 reg |= E1000_DTXCTL_VLAN_ADDED;
9963                 wr32(E1000_DTXCTL, reg);
9964                 fallthrough;
9965         case e1000_82580:
9966                 /* enable replication vlan tag stripping */
9967                 reg = rd32(E1000_RPLOLR);
9968                 reg |= E1000_RPLOLR_STRVLAN;
9969                 wr32(E1000_RPLOLR, reg);
9970                 fallthrough;
9971         case e1000_i350:
9972                 /* none of the above registers are supported by i350 */
9973                 break;
9974         }
9975
9976         if (adapter->vfs_allocated_count) {
9977                 igb_vmdq_set_loopback_pf(hw, true);
9978                 igb_vmdq_set_replication_pf(hw, true);
9979                 igb_vmdq_set_anti_spoofing_pf(hw, true,
9980                                               adapter->vfs_allocated_count);
9981         } else {
9982                 igb_vmdq_set_loopback_pf(hw, false);
9983                 igb_vmdq_set_replication_pf(hw, false);
9984         }
9985 }
9986
9987 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9988 {
9989         struct e1000_hw *hw = &adapter->hw;
9990         u32 dmac_thr;
9991         u16 hwm;
9992         u32 reg;
9993
9994         if (hw->mac.type > e1000_82580) {
9995                 if (adapter->flags & IGB_FLAG_DMAC) {
9996                         /* force threshold to 0. */
9997                         wr32(E1000_DMCTXTH, 0);
9998
9999                         /* DMA Coalescing high water mark needs to be greater
10000                          * than the Rx threshold. Set hwm to PBA - max frame
10001                          * size in 16B units, capping it at PBA - 6KB.
10002                          */
10003                         hwm = 64 * (pba - 6);
10004                         reg = rd32(E1000_FCRTC);
10005                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
10006                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
10007                                 & E1000_FCRTC_RTH_COAL_MASK);
10008                         wr32(E1000_FCRTC, reg);
10009
10010                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
10011                          * frame size, capping it at PBA - 10KB.
10012                          */
10013                         dmac_thr = pba - 10;
10014                         reg = rd32(E1000_DMACR);
10015                         reg &= ~E1000_DMACR_DMACTHR_MASK;
10016                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
10017                                 & E1000_DMACR_DMACTHR_MASK);
10018
10019                         /* transition to L0x or L1 if available..*/
10020                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
10021
10022                         /* watchdog timer= +-1000 usec in 32usec intervals */
10023                         reg |= (1000 >> 5);
10024
10025                         /* Disable BMC-to-OS Watchdog Enable */
10026                         if (hw->mac.type != e1000_i354)
10027                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
10028                         wr32(E1000_DMACR, reg);
10029
10030                         /* no lower threshold to disable
10031                          * coalescing(smart fifb)-UTRESH=0
10032                          */
10033                         wr32(E1000_DMCRTRH, 0);
10034
10035                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
10036
10037                         wr32(E1000_DMCTLX, reg);
10038
10039                         /* free space in tx packet buffer to wake from
10040                          * DMA coal
10041                          */
10042                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
10043                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
10044                 }
10045
10046                 if (hw->mac.type >= e1000_i210 ||
10047                     (adapter->flags & IGB_FLAG_DMAC)) {
10048                         reg = rd32(E1000_PCIEMISC);
10049                         reg |= E1000_PCIEMISC_LX_DECISION;
10050                         wr32(E1000_PCIEMISC, reg);
10051                 } /* endif adapter->dmac is not disabled */
10052         } else if (hw->mac.type == e1000_82580) {
10053                 u32 reg = rd32(E1000_PCIEMISC);
10054
10055                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
10056                 wr32(E1000_DMACR, 0);
10057         }
10058 }
10059
10060 /**
10061  *  igb_read_i2c_byte - Reads 8 bit word over I2C
10062  *  @hw: pointer to hardware structure
10063  *  @byte_offset: byte offset to read
10064  *  @dev_addr: device address
10065  *  @data: value read
10066  *
10067  *  Performs byte read operation over I2C interface at
10068  *  a specified device address.
10069  **/
10070 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10071                       u8 dev_addr, u8 *data)
10072 {
10073         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10074         struct i2c_client *this_client = adapter->i2c_client;
10075         s32 status;
10076         u16 swfw_mask = 0;
10077
10078         if (!this_client)
10079                 return E1000_ERR_I2C;
10080
10081         swfw_mask = E1000_SWFW_PHY0_SM;
10082
10083         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10084                 return E1000_ERR_SWFW_SYNC;
10085
10086         status = i2c_smbus_read_byte_data(this_client, byte_offset);
10087         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10088
10089         if (status < 0)
10090                 return E1000_ERR_I2C;
10091         else {
10092                 *data = status;
10093                 return 0;
10094         }
10095 }
10096
10097 /**
10098  *  igb_write_i2c_byte - Writes 8 bit word over I2C
10099  *  @hw: pointer to hardware structure
10100  *  @byte_offset: byte offset to write
10101  *  @dev_addr: device address
10102  *  @data: value to write
10103  *
10104  *  Performs byte write operation over I2C interface at
10105  *  a specified device address.
10106  **/
10107 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
10108                        u8 dev_addr, u8 data)
10109 {
10110         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
10111         struct i2c_client *this_client = adapter->i2c_client;
10112         s32 status;
10113         u16 swfw_mask = E1000_SWFW_PHY0_SM;
10114
10115         if (!this_client)
10116                 return E1000_ERR_I2C;
10117
10118         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))
10119                 return E1000_ERR_SWFW_SYNC;
10120         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
10121         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
10122
10123         if (status)
10124                 return E1000_ERR_I2C;
10125         else
10126                 return 0;
10127
10128 }
10129
10130 int igb_reinit_queues(struct igb_adapter *adapter)
10131 {
10132         struct net_device *netdev = adapter->netdev;
10133         struct pci_dev *pdev = adapter->pdev;
10134         int err = 0;
10135
10136         if (netif_running(netdev))
10137                 igb_close(netdev);
10138
10139         igb_reset_interrupt_capability(adapter);
10140
10141         if (igb_init_interrupt_scheme(adapter, true)) {
10142                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
10143                 return -ENOMEM;
10144         }
10145
10146         if (netif_running(netdev))
10147                 err = igb_open(netdev);
10148
10149         return err;
10150 }
10151
10152 static void igb_nfc_filter_exit(struct igb_adapter *adapter)
10153 {
10154         struct igb_nfc_filter *rule;
10155
10156         spin_lock(&adapter->nfc_lock);
10157
10158         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10159                 igb_erase_filter(adapter, rule);
10160
10161         hlist_for_each_entry(rule, &adapter->cls_flower_list, nfc_node)
10162                 igb_erase_filter(adapter, rule);
10163
10164         spin_unlock(&adapter->nfc_lock);
10165 }
10166
10167 static void igb_nfc_filter_restore(struct igb_adapter *adapter)
10168 {
10169         struct igb_nfc_filter *rule;
10170
10171         spin_lock(&adapter->nfc_lock);
10172
10173         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node)
10174                 igb_add_filter(adapter, rule);
10175
10176         spin_unlock(&adapter->nfc_lock);
10177 }
10178 /* igb_main.c */