drivers/net/ethernet/intel/igb/igb_ethtool.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
   3
   4 /* ethtool support for igb */
   5
   6 #include <linux/vmalloc.h>
   7 #include <linux/netdevice.h>
   8 #include <linux/pci.h>
   9 #include <linux/delay.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/if_ether.h>
  12 #include <linux/ethtool.h>
  13 #include <linux/sched.h>
  14 #include <linux/slab.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/highmem.h>
  17 #include <linux/mdio.h>
  18
  19 #include "igb.h"
  20
  21 struct igb_stats {
  22         char stat_string[ETH_GSTRING_LEN];
  23         int sizeof_stat;
  24         int stat_offset;
  25 };
  26
  27 #define IGB_STAT(_name, _stat) { \
  28         .stat_string = _name, \
  29         .sizeof_stat = sizeof_field(struct igb_adapter, _stat), \
  30         .stat_offset = offsetof(struct igb_adapter, _stat) \
  31 }
  32 static const struct igb_stats igb_gstrings_stats[] = {
  33         IGB_STAT("rx_packets", stats.gprc),
  34         IGB_STAT("tx_packets", stats.gptc),
  35         IGB_STAT("rx_bytes", stats.gorc),
  36         IGB_STAT("tx_bytes", stats.gotc),
  37         IGB_STAT("rx_broadcast", stats.bprc),
  38         IGB_STAT("tx_broadcast", stats.bptc),
  39         IGB_STAT("rx_multicast", stats.mprc),
  40         IGB_STAT("tx_multicast", stats.mptc),
  41         IGB_STAT("multicast", stats.mprc),
  42         IGB_STAT("collisions", stats.colc),
  43         IGB_STAT("rx_crc_errors", stats.crcerrs),
  44         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  45         IGB_STAT("rx_missed_errors", stats.mpc),
  46         IGB_STAT("tx_aborted_errors", stats.ecol),
  47         IGB_STAT("tx_carrier_errors", stats.tncrs),
  48         IGB_STAT("tx_window_errors", stats.latecol),
  49         IGB_STAT("tx_abort_late_coll", stats.latecol),
  50         IGB_STAT("tx_deferred_ok", stats.dc),
  51         IGB_STAT("tx_single_coll_ok", stats.scc),
  52         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  53         IGB_STAT("tx_timeout_count", tx_timeout_count),
  54         IGB_STAT("rx_long_length_errors", stats.roc),
  55         IGB_STAT("rx_short_length_errors", stats.ruc),
  56         IGB_STAT("rx_align_errors", stats.algnerrc),
  57         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  58         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  59         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  60         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  61         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  62         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  63         IGB_STAT("rx_long_byte_count", stats.gorc),
  64         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  65         IGB_STAT("tx_smbus", stats.mgptc),
  66         IGB_STAT("rx_smbus", stats.mgprc),
  67         IGB_STAT("dropped_smbus", stats.mgpdc),
  68         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  69         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  70         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  71         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  72         IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
  73         IGB_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
  74         IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
  75 };
  76
  77 #define IGB_NETDEV_STAT(_net_stat) { \
  78         .stat_string = __stringify(_net_stat), \
  79         .sizeof_stat = sizeof_field(struct rtnl_link_stats64, _net_stat), \
  80         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
  81 }
  82 static const struct igb_stats igb_gstrings_net_stats[] = {
  83         IGB_NETDEV_STAT(rx_errors),
  84         IGB_NETDEV_STAT(tx_errors),
  85         IGB_NETDEV_STAT(tx_dropped),
  86         IGB_NETDEV_STAT(rx_length_errors),
  87         IGB_NETDEV_STAT(rx_over_errors),
  88         IGB_NETDEV_STAT(rx_frame_errors),
  89         IGB_NETDEV_STAT(rx_fifo_errors),
  90         IGB_NETDEV_STAT(tx_fifo_errors),
  91         IGB_NETDEV_STAT(tx_heartbeat_errors)
  92 };
  93
  94 #define IGB_GLOBAL_STATS_LEN    \
  95         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
  96 #define IGB_NETDEV_STATS_LEN    \
  97         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
  98 #define IGB_RX_QUEUE_STATS_LEN \
  99         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 100
 101 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 102
 103 #define IGB_QUEUE_STATS_LEN \
 104         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 105           IGB_RX_QUEUE_STATS_LEN) + \
 106          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 107           IGB_TX_QUEUE_STATS_LEN))
 108 #define IGB_STATS_LEN \
 109         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 110
 111 enum igb_diagnostics_results {
 112         TEST_REG = 0,
 113         TEST_EEP,
 114         TEST_IRQ,
 115         TEST_LOOP,
 116         TEST_LINK
 117 };
 118
 119 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 120         [TEST_REG]  = "Register test  (offline)",
 121         [TEST_EEP]  = "Eeprom test    (offline)",
 122         [TEST_IRQ]  = "Interrupt test (offline)",
 123         [TEST_LOOP] = "Loopback test  (offline)",
 124         [TEST_LINK] = "Link test   (on/offline)"
 125 };
 126 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 127
 128 static const char igb_priv_flags_strings[][ETH_GSTRING_LEN] = {
 129 #define IGB_PRIV_FLAGS_LEGACY_RX        BIT(0)
 130         "legacy-rx",
 131 };
 132
 133 #define IGB_PRIV_FLAGS_STR_LEN ARRAY_SIZE(igb_priv_flags_strings)
 134
 135 static int igb_get_link_ksettings(struct net_device *netdev,
 136                                   struct ethtool_link_ksettings *cmd)
 137 {
 138         struct igb_adapter *adapter = netdev_priv(netdev);
 139         struct e1000_hw *hw = &adapter->hw;
 140         struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
 141         struct e1000_sfp_flags *eth_flags = &dev_spec->eth_flags;
 142         u32 status;
 143         u32 speed;
 144         u32 supported, advertising;
 145
 146         status = pm_runtime_suspended(&adapter->pdev->dev) ?
 147                  0 : rd32(E1000_STATUS);
 148         if (hw->phy.media_type == e1000_media_type_copper) {
 149
 150                 supported = (SUPPORTED_10baseT_Half |
 151                              SUPPORTED_10baseT_Full |
 152                              SUPPORTED_100baseT_Half |
 153                              SUPPORTED_100baseT_Full |
 154                              SUPPORTED_1000baseT_Full|
 155                              SUPPORTED_Autoneg |
 156                              SUPPORTED_TP |
 157                              SUPPORTED_Pause);
 158                 advertising = ADVERTISED_TP;
 159
 160                 if (hw->mac.autoneg == 1) {
 161                         advertising |= ADVERTISED_Autoneg;
 162                         /* the e1000 autoneg seems to match ethtool nicely */
 163                         advertising |= hw->phy.autoneg_advertised;
 164                 }
 165
 166                 cmd->base.port = PORT_TP;
 167                 cmd->base.phy_address = hw->phy.addr;
 168         } else {
 169                 supported = (SUPPORTED_FIBRE |
 170                              SUPPORTED_1000baseKX_Full |
 171                              SUPPORTED_Autoneg |
 172                              SUPPORTED_Pause);
 173                 advertising = (ADVERTISED_FIBRE |
 174                                ADVERTISED_1000baseKX_Full);
 175                 if (hw->mac.type == e1000_i354) {
 176                         if ((hw->device_id ==
 177                              E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) &&
 178                             !(status & E1000_STATUS_2P5_SKU_OVER)) {
 179                                 supported |= SUPPORTED_2500baseX_Full;
 180                                 supported &= ~SUPPORTED_1000baseKX_Full;
 181                                 advertising |= ADVERTISED_2500baseX_Full;
 182                                 advertising &= ~ADVERTISED_1000baseKX_Full;
 183                         }
 184                 }
 185                 if (eth_flags->e100_base_fx || eth_flags->e100_base_lx) {
 186                         supported |= SUPPORTED_100baseT_Full;
 187                         advertising |= ADVERTISED_100baseT_Full;
 188                 }
 189                 if (hw->mac.autoneg == 1)
 190                         advertising |= ADVERTISED_Autoneg;
 191
 192                 cmd->base.port = PORT_FIBRE;
 193         }
 194         if (hw->mac.autoneg != 1)
 195                 advertising &= ~(ADVERTISED_Pause |
 196                                  ADVERTISED_Asym_Pause);
 197
 198         switch (hw->fc.requested_mode) {
 199         case e1000_fc_full:
 200                 advertising |= ADVERTISED_Pause;
 201                 break;
 202         case e1000_fc_rx_pause:
 203                 advertising |= (ADVERTISED_Pause |
 204                                 ADVERTISED_Asym_Pause);
 205                 break;
 206         case e1000_fc_tx_pause:
 207                 advertising |=  ADVERTISED_Asym_Pause;
 208                 break;
 209         default:
 210                 advertising &= ~(ADVERTISED_Pause |
 211                                  ADVERTISED_Asym_Pause);
 212         }
 213         if (status & E1000_STATUS_LU) {
 214                 if ((status & E1000_STATUS_2P5_SKU) &&
 215                     !(status & E1000_STATUS_2P5_SKU_OVER)) {
 216                         speed = SPEED_2500;
 217                 } else if (status & E1000_STATUS_SPEED_1000) {
 218                         speed = SPEED_1000;
 219                 } else if (status & E1000_STATUS_SPEED_100) {
 220                         speed = SPEED_100;
 221                 } else {
 222                         speed = SPEED_10;
 223                 }
 224                 if ((status & E1000_STATUS_FD) ||
 225                     hw->phy.media_type != e1000_media_type_copper)
 226                         cmd->base.duplex = DUPLEX_FULL;
 227                 else
 228                         cmd->base.duplex = DUPLEX_HALF;
 229         } else {
 230                 speed = SPEED_UNKNOWN;
 231                 cmd->base.duplex = DUPLEX_UNKNOWN;
 232         }
 233         cmd->base.speed = speed;
 234         if ((hw->phy.media_type == e1000_media_type_fiber) ||
 235             hw->mac.autoneg)
 236                 cmd->base.autoneg = AUTONEG_ENABLE;
 237         else
 238                 cmd->base.autoneg = AUTONEG_DISABLE;
 239
 240         /* MDI-X => 2; MDI =>1; Invalid =>0 */
 241         if (hw->phy.media_type == e1000_media_type_copper)
 242                 cmd->base.eth_tp_mdix = hw->phy.is_mdix ? ETH_TP_MDI_X :
 243                                                       ETH_TP_MDI;
 244         else
 245                 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
 246
 247         if (hw->phy.mdix == AUTO_ALL_MODES)
 248                 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
 249         else
 250                 cmd->base.eth_tp_mdix_ctrl = hw->phy.mdix;
 251
 252         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
 253                                                 supported);
 254         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
 255                                                 advertising);
 256
 257         return 0;
 258 }
 259
 260 static int igb_set_link_ksettings(struct net_device *netdev,
 261                                   const struct ethtool_link_ksettings *cmd)
 262 {
 263         struct igb_adapter *adapter = netdev_priv(netdev);
 264         struct e1000_hw *hw = &adapter->hw;
 265         u32 advertising;
 266
 267         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 268          * cannot be changed
 269          */
 270         if (igb_check_reset_block(hw)) {
 271                 dev_err(&adapter->pdev->dev,
 272                         "Cannot change link characteristics when SoL/IDER is active.\n");
 273                 return -EINVAL;
 274         }
 275
 276         /* MDI setting is only allowed when autoneg enabled because
 277          * some hardware doesn't allow MDI setting when speed or
 278          * duplex is forced.
 279          */
 280         if (cmd->base.eth_tp_mdix_ctrl) {
 281                 if (hw->phy.media_type != e1000_media_type_copper)
 282                         return -EOPNOTSUPP;
 283
 284                 if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
 285                     (cmd->base.autoneg != AUTONEG_ENABLE)) {
 286                         dev_err(&adapter->pdev->dev, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
 287                         return -EINVAL;
 288                 }
 289         }
 290
 291         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 292                 usleep_range(1000, 2000);
 293
 294         ethtool_convert_link_mode_to_legacy_u32(&advertising,
 295                                                 cmd->link_modes.advertising);
 296
 297         if (cmd->base.autoneg == AUTONEG_ENABLE) {
 298                 hw->mac.autoneg = 1;
 299                 if (hw->phy.media_type == e1000_media_type_fiber) {
 300                         hw->phy.autoneg_advertised = advertising |
 301                                                      ADVERTISED_FIBRE |
 302                                                      ADVERTISED_Autoneg;
 303                         switch (adapter->link_speed) {
 304                         case SPEED_2500:
 305                                 hw->phy.autoneg_advertised =
 306                                         ADVERTISED_2500baseX_Full;
 307                                 break;
 308                         case SPEED_1000:
 309                                 hw->phy.autoneg_advertised =
 310                                         ADVERTISED_1000baseT_Full;
 311                                 break;
 312                         case SPEED_100:
 313                                 hw->phy.autoneg_advertised =
 314                                         ADVERTISED_100baseT_Full;
 315                                 break;
 316                         default:
 317                                 break;
 318                         }
 319                 } else {
 320                         hw->phy.autoneg_advertised = advertising |
 321                                                      ADVERTISED_TP |
 322                                                      ADVERTISED_Autoneg;
 323                 }
 324                 advertising = hw->phy.autoneg_advertised;
 325                 if (adapter->fc_autoneg)
 326                         hw->fc.requested_mode = e1000_fc_default;
 327         } else {
 328                 u32 speed = cmd->base.speed;
 329                 /* calling this overrides forced MDI setting */
 330                 if (igb_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
 331                         clear_bit(__IGB_RESETTING, &adapter->state);
 332                         return -EINVAL;
 333                 }
 334         }
 335
 336         /* MDI-X => 2; MDI => 1; Auto => 3 */
 337         if (cmd->base.eth_tp_mdix_ctrl) {
 338                 /* fix up the value for auto (3 => 0) as zero is mapped
 339                  * internally to auto
 340                  */
 341                 if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
 342                         hw->phy.mdix = AUTO_ALL_MODES;
 343                 else
 344                         hw->phy.mdix = cmd->base.eth_tp_mdix_ctrl;
 345         }
 346
 347         /* reset the link */
 348         if (netif_running(adapter->netdev)) {
 349                 igb_down(adapter);
 350                 igb_up(adapter);
 351         } else
 352                 igb_reset(adapter);
 353
 354         clear_bit(__IGB_RESETTING, &adapter->state);
 355         return 0;
 356 }
 357
 358 static u32 igb_get_link(struct net_device *netdev)
 359 {
 360         struct igb_adapter *adapter = netdev_priv(netdev);
 361         struct e1000_mac_info *mac = &adapter->hw.mac;
 362
 363         /* If the link is not reported up to netdev, interrupts are disabled,
 364          * and so the physical link state may have changed since we last
 365          * looked. Set get_link_status to make sure that the true link
 366          * state is interrogated, rather than pulling a cached and possibly
 367          * stale link state from the driver.
 368          */
 369         if (!netif_carrier_ok(netdev))
 370                 mac->get_link_status = 1;
 371
 372         return igb_has_link(adapter);
 373 }
 374
 375 static void igb_get_pauseparam(struct net_device *netdev,
 376                                struct ethtool_pauseparam *pause)
 377 {
 378         struct igb_adapter *adapter = netdev_priv(netdev);
 379         struct e1000_hw *hw = &adapter->hw;
 380
 381         pause->autoneg =
 382                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 383
 384         if (hw->fc.current_mode == e1000_fc_rx_pause)
 385                 pause->rx_pause = 1;
 386         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 387                 pause->tx_pause = 1;
 388         else if (hw->fc.current_mode == e1000_fc_full) {
 389                 pause->rx_pause = 1;
 390                 pause->tx_pause = 1;
 391         }
 392 }
 393
 394 static int igb_set_pauseparam(struct net_device *netdev,
 395                               struct ethtool_pauseparam *pause)
 396 {
 397         struct igb_adapter *adapter = netdev_priv(netdev);
 398         struct e1000_hw *hw = &adapter->hw;
 399         int retval = 0;
 400         int i;
 401
 402         /* 100basefx does not support setting link flow control */
 403         if (hw->dev_spec._82575.eth_flags.e100_base_fx)
 404                 return -EINVAL;
 405
 406         adapter->fc_autoneg = pause->autoneg;
 407
 408         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 409                 usleep_range(1000, 2000);
 410
 411         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 412                 hw->fc.requested_mode = e1000_fc_default;
 413                 if (netif_running(adapter->netdev)) {
 414                         igb_down(adapter);
 415                         igb_up(adapter);
 416                 } else {
 417                         igb_reset(adapter);
 418                 }
 419         } else {
 420                 if (pause->rx_pause && pause->tx_pause)
 421                         hw->fc.requested_mode = e1000_fc_full;
 422                 else if (pause->rx_pause && !pause->tx_pause)
 423                         hw->fc.requested_mode = e1000_fc_rx_pause;
 424                 else if (!pause->rx_pause && pause->tx_pause)
 425                         hw->fc.requested_mode = e1000_fc_tx_pause;
 426                 else if (!pause->rx_pause && !pause->tx_pause)
 427                         hw->fc.requested_mode = e1000_fc_none;
 428
 429                 hw->fc.current_mode = hw->fc.requested_mode;
 430
 431                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 432                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 433
 434                 /* Make sure SRRCTL considers new fc settings for each ring */
 435                 for (i = 0; i < adapter->num_rx_queues; i++) {
 436                         struct igb_ring *ring = adapter->rx_ring[i];
 437
 438                         igb_setup_srrctl(adapter, ring);
 439                 }
 440         }
 441
 442         clear_bit(__IGB_RESETTING, &adapter->state);
 443         return retval;
 444 }
 445
 446 static u32 igb_get_msglevel(struct net_device *netdev)
 447 {
 448         struct igb_adapter *adapter = netdev_priv(netdev);
 449         return adapter->msg_enable;
 450 }
 451
 452 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 453 {
 454         struct igb_adapter *adapter = netdev_priv(netdev);
 455         adapter->msg_enable = data;
 456 }
 457
 458 static int igb_get_regs_len(struct net_device *netdev)
 459 {
 460 #define IGB_REGS_LEN 740
 461         return IGB_REGS_LEN * sizeof(u32);
 462 }
 463
 464 static void igb_get_regs(struct net_device *netdev,
 465                          struct ethtool_regs *regs, void *p)
 466 {
 467         struct igb_adapter *adapter = netdev_priv(netdev);
 468         struct e1000_hw *hw = &adapter->hw;
 469         u32 *regs_buff = p;
 470         u8 i;
 471
 472         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 473
 474         regs->version = (1u << 24) | (hw->revision_id << 16) | hw->device_id;
 475
 476         /* General Registers */
 477         regs_buff[0] = rd32(E1000_CTRL);
 478         regs_buff[1] = rd32(E1000_STATUS);
 479         regs_buff[2] = rd32(E1000_CTRL_EXT);
 480         regs_buff[3] = rd32(E1000_MDIC);
 481         regs_buff[4] = rd32(E1000_SCTL);
 482         regs_buff[5] = rd32(E1000_CONNSW);
 483         regs_buff[6] = rd32(E1000_VET);
 484         regs_buff[7] = rd32(E1000_LEDCTL);
 485         regs_buff[8] = rd32(E1000_PBA);
 486         regs_buff[9] = rd32(E1000_PBS);
 487         regs_buff[10] = rd32(E1000_FRTIMER);
 488         regs_buff[11] = rd32(E1000_TCPTIMER);
 489
 490         /* NVM Register */
 491         regs_buff[12] = rd32(E1000_EECD);
 492
 493         /* Interrupt */
 494         /* Reading EICS for EICR because they read the
 495          * same but EICS does not clear on read
 496          */
 497         regs_buff[13] = rd32(E1000_EICS);
 498         regs_buff[14] = rd32(E1000_EICS);
 499         regs_buff[15] = rd32(E1000_EIMS);
 500         regs_buff[16] = rd32(E1000_EIMC);
 501         regs_buff[17] = rd32(E1000_EIAC);
 502         regs_buff[18] = rd32(E1000_EIAM);
 503         /* Reading ICS for ICR because they read the
 504          * same but ICS does not clear on read
 505          */
 506         regs_buff[19] = rd32(E1000_ICS);
 507         regs_buff[20] = rd32(E1000_ICS);
 508         regs_buff[21] = rd32(E1000_IMS);
 509         regs_buff[22] = rd32(E1000_IMC);
 510         regs_buff[23] = rd32(E1000_IAC);
 511         regs_buff[24] = rd32(E1000_IAM);
 512         regs_buff[25] = rd32(E1000_IMIRVP);
 513
 514         /* Flow Control */
 515         regs_buff[26] = rd32(E1000_FCAL);
 516         regs_buff[27] = rd32(E1000_FCAH);
 517         regs_buff[28] = rd32(E1000_FCTTV);
 518         regs_buff[29] = rd32(E1000_FCRTL);
 519         regs_buff[30] = rd32(E1000_FCRTH);
 520         regs_buff[31] = rd32(E1000_FCRTV);
 521
 522         /* Receive */
 523         regs_buff[32] = rd32(E1000_RCTL);
 524         regs_buff[33] = rd32(E1000_RXCSUM);
 525         regs_buff[34] = rd32(E1000_RLPML);
 526         regs_buff[35] = rd32(E1000_RFCTL);
 527         regs_buff[36] = rd32(E1000_MRQC);
 528         regs_buff[37] = rd32(E1000_VT_CTL);
 529
 530         /* Transmit */
 531         regs_buff[38] = rd32(E1000_TCTL);
 532         regs_buff[39] = rd32(E1000_TCTL_EXT);
 533         regs_buff[40] = rd32(E1000_TIPG);
 534         regs_buff[41] = rd32(E1000_DTXCTL);
 535
 536         /* Wake Up */
 537         regs_buff[42] = rd32(E1000_WUC);
 538         regs_buff[43] = rd32(E1000_WUFC);
 539         regs_buff[44] = rd32(E1000_WUS);
 540         regs_buff[45] = rd32(E1000_IPAV);
 541         regs_buff[46] = rd32(E1000_WUPL);
 542
 543         /* MAC */
 544         regs_buff[47] = rd32(E1000_PCS_CFG0);
 545         regs_buff[48] = rd32(E1000_PCS_LCTL);
 546         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 547         regs_buff[50] = rd32(E1000_PCS_ANADV);
 548         regs_buff[51] = rd32(E1000_PCS_LPAB);
 549         regs_buff[52] = rd32(E1000_PCS_NPTX);
 550         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 551
 552         /* Statistics */
 553         regs_buff[54] = adapter->stats.crcerrs;
 554         regs_buff[55] = adapter->stats.algnerrc;
 555         regs_buff[56] = adapter->stats.symerrs;
 556         regs_buff[57] = adapter->stats.rxerrc;
 557         regs_buff[58] = adapter->stats.mpc;
 558         regs_buff[59] = adapter->stats.scc;
 559         regs_buff[60] = adapter->stats.ecol;
 560         regs_buff[61] = adapter->stats.mcc;
 561         regs_buff[62] = adapter->stats.latecol;
 562         regs_buff[63] = adapter->stats.colc;
 563         regs_buff[64] = adapter->stats.dc;
 564         regs_buff[65] = adapter->stats.tncrs;
 565         regs_buff[66] = adapter->stats.sec;
 566         regs_buff[67] = adapter->stats.htdpmc;
 567         regs_buff[68] = adapter->stats.rlec;
 568         regs_buff[69] = adapter->stats.xonrxc;
 569         regs_buff[70] = adapter->stats.xontxc;
 570         regs_buff[71] = adapter->stats.xoffrxc;
 571         regs_buff[72] = adapter->stats.xofftxc;
 572         regs_buff[73] = adapter->stats.fcruc;
 573         regs_buff[74] = adapter->stats.prc64;
 574         regs_buff[75] = adapter->stats.prc127;
 575         regs_buff[76] = adapter->stats.prc255;
 576         regs_buff[77] = adapter->stats.prc511;
 577         regs_buff[78] = adapter->stats.prc1023;
 578         regs_buff[79] = adapter->stats.prc1522;
 579         regs_buff[80] = adapter->stats.gprc;
 580         regs_buff[81] = adapter->stats.bprc;
 581         regs_buff[82] = adapter->stats.mprc;
 582         regs_buff[83] = adapter->stats.gptc;
 583         regs_buff[84] = adapter->stats.gorc;
 584         regs_buff[86] = adapter->stats.gotc;
 585         regs_buff[88] = adapter->stats.rnbc;
 586         regs_buff[89] = adapter->stats.ruc;
 587         regs_buff[90] = adapter->stats.rfc;
 588         regs_buff[91] = adapter->stats.roc;
 589         regs_buff[92] = adapter->stats.rjc;
 590         regs_buff[93] = adapter->stats.mgprc;
 591         regs_buff[94] = adapter->stats.mgpdc;
 592         regs_buff[95] = adapter->stats.mgptc;
 593         regs_buff[96] = adapter->stats.tor;
 594         regs_buff[98] = adapter->stats.tot;
 595         regs_buff[100] = adapter->stats.tpr;
 596         regs_buff[101] = adapter->stats.tpt;
 597         regs_buff[102] = adapter->stats.ptc64;
 598         regs_buff[103] = adapter->stats.ptc127;
 599         regs_buff[104] = adapter->stats.ptc255;
 600         regs_buff[105] = adapter->stats.ptc511;
 601         regs_buff[106] = adapter->stats.ptc1023;
 602         regs_buff[107] = adapter->stats.ptc1522;
 603         regs_buff[108] = adapter->stats.mptc;
 604         regs_buff[109] = adapter->stats.bptc;
 605         regs_buff[110] = adapter->stats.tsctc;
 606         regs_buff[111] = adapter->stats.iac;
 607         regs_buff[112] = adapter->stats.rpthc;
 608         regs_buff[113] = adapter->stats.hgptc;
 609         regs_buff[114] = adapter->stats.hgorc;
 610         regs_buff[116] = adapter->stats.hgotc;
 611         regs_buff[118] = adapter->stats.lenerrs;
 612         regs_buff[119] = adapter->stats.scvpc;
 613         regs_buff[120] = adapter->stats.hrmpc;
 614
 615         for (i = 0; i < 4; i++)
 616                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 617         for (i = 0; i < 4; i++)
 618                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 619         for (i = 0; i < 4; i++)
 620                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 621         for (i = 0; i < 4; i++)
 622                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 623         for (i = 0; i < 4; i++)
 624                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 625         for (i = 0; i < 4; i++)
 626                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 627         for (i = 0; i < 4; i++)
 628                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 629         for (i = 0; i < 4; i++)
 630                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 631
 632         for (i = 0; i < 10; i++)
 633                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 634         for (i = 0; i < 8; i++)
 635                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 636         for (i = 0; i < 8; i++)
 637                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 638         for (i = 0; i < 16; i++)
 639                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 640         for (i = 0; i < 16; i++)
 641                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 642
 643         for (i = 0; i < 4; i++)
 644                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 645         for (i = 0; i < 4; i++)
 646                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 647         for (i = 0; i < 4; i++)
 648                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 649         for (i = 0; i < 4; i++)
 650                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 651         for (i = 0; i < 4; i++)
 652                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 653         for (i = 0; i < 4; i++)
 654                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 655         for (i = 0; i < 4; i++)
 656                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 657         for (i = 0; i < 4; i++)
 658                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 659         for (i = 0; i < 4; i++)
 660                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 661
 662         for (i = 0; i < 4; i++)
 663                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 664         for (i = 0; i < 4; i++)
 665                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 666         for (i = 0; i < 32; i++)
 667                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 668         for (i = 0; i < 128; i++)
 669                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 670         for (i = 0; i < 128; i++)
 671                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 672         for (i = 0; i < 4; i++)
 673                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 674
 675         regs_buff[547] = rd32(E1000_TDFH);
 676         regs_buff[548] = rd32(E1000_TDFT);
 677         regs_buff[549] = rd32(E1000_TDFHS);
 678         regs_buff[550] = rd32(E1000_TDFPC);
 679
 680         if (hw->mac.type > e1000_82580) {
 681                 regs_buff[551] = adapter->stats.o2bgptc;
 682                 regs_buff[552] = adapter->stats.b2ospc;
 683                 regs_buff[553] = adapter->stats.o2bspc;
 684                 regs_buff[554] = adapter->stats.b2ogprc;
 685         }
 686
 687         if (hw->mac.type == e1000_82576) {
 688                 for (i = 0; i < 12; i++)
 689                         regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4));
 690                 for (i = 0; i < 4; i++)
 691                         regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4));
 692                 for (i = 0; i < 12; i++)
 693                         regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4));
 694                 for (i = 0; i < 12; i++)
 695                         regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4));
 696                 for (i = 0; i < 12; i++)
 697                         regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4));
 698                 for (i = 0; i < 12; i++)
 699                         regs_buff[607 + i] = rd32(E1000_RDH(i + 4));
 700                 for (i = 0; i < 12; i++)
 701                         regs_buff[619 + i] = rd32(E1000_RDT(i + 4));
 702                 for (i = 0; i < 12; i++)
 703                         regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4));
 704
 705                 for (i = 0; i < 12; i++)
 706                         regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4));
 707                 for (i = 0; i < 12; i++)
 708                         regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4));
 709                 for (i = 0; i < 12; i++)
 710                         regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4));
 711                 for (i = 0; i < 12; i++)
 712                         regs_buff[679 + i] = rd32(E1000_TDH(i + 4));
 713                 for (i = 0; i < 12; i++)
 714                         regs_buff[691 + i] = rd32(E1000_TDT(i + 4));
 715                 for (i = 0; i < 12; i++)
 716                         regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4));
 717                 for (i = 0; i < 12; i++)
 718                         regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4));
 719                 for (i = 0; i < 12; i++)
 720                         regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4));
 721         }
 722
 723         if (hw->mac.type == e1000_i210 || hw->mac.type == e1000_i211)
 724                 regs_buff[739] = rd32(E1000_I210_RR2DCDELAY);
 725 }
 726
 727 static int igb_get_eeprom_len(struct net_device *netdev)
 728 {
 729         struct igb_adapter *adapter = netdev_priv(netdev);
 730         return adapter->hw.nvm.word_size * 2;
 731 }
 732
 733 static int igb_get_eeprom(struct net_device *netdev,
 734                           struct ethtool_eeprom *eeprom, u8 *bytes)
 735 {
 736         struct igb_adapter *adapter = netdev_priv(netdev);
 737         struct e1000_hw *hw = &adapter->hw;
 738         u16 *eeprom_buff;
 739         int first_word, last_word;
 740         int ret_val = 0;
 741         u16 i;
 742
 743         if (eeprom->len == 0)
 744                 return -EINVAL;
 745
 746         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 747
 748         first_word = eeprom->offset >> 1;
 749         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 750
 751         eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
 752                                     GFP_KERNEL);
 753         if (!eeprom_buff)
 754                 return -ENOMEM;
 755
 756         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 757                 ret_val = hw->nvm.ops.read(hw, first_word,
 758                                            last_word - first_word + 1,
 759                                            eeprom_buff);
 760         else {
 761                 for (i = 0; i < last_word - first_word + 1; i++) {
 762                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 763                                                    &eeprom_buff[i]);
 764                         if (ret_val)
 765                                 break;
 766                 }
 767         }
 768
 769         /* Device's eeprom is always little-endian, word addressable */
 770         for (i = 0; i < last_word - first_word + 1; i++)
 771                 le16_to_cpus(&eeprom_buff[i]);
 772
 773         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 774                         eeprom->len);
 775         kfree(eeprom_buff);
 776
 777         return ret_val;
 778 }
 779
 780 static int igb_set_eeprom(struct net_device *netdev,
 781                           struct ethtool_eeprom *eeprom, u8 *bytes)
 782 {
 783         struct igb_adapter *adapter = netdev_priv(netdev);
 784         struct e1000_hw *hw = &adapter->hw;
 785         u16 *eeprom_buff;
 786         void *ptr;
 787         int max_len, first_word, last_word, ret_val = 0;
 788         u16 i;
 789
 790         if (eeprom->len == 0)
 791                 return -EOPNOTSUPP;
 792
 793         if ((hw->mac.type >= e1000_i210) &&
 794             !igb_get_flash_presence_i210(hw)) {
 795                 return -EOPNOTSUPP;
 796         }
 797
 798         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 799                 return -EFAULT;
 800
 801         max_len = hw->nvm.word_size * 2;
 802
 803         first_word = eeprom->offset >> 1;
 804         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 805         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 806         if (!eeprom_buff)
 807                 return -ENOMEM;
 808
 809         ptr = (void *)eeprom_buff;
 810
 811         if (eeprom->offset & 1) {
 812                 /* need read/modify/write of first changed EEPROM word
 813                  * only the second byte of the word is being modified
 814                  */
 815                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 816                                             &eeprom_buff[0]);
 817                 ptr++;
 818         }
 819         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 820                 /* need read/modify/write of last changed EEPROM word
 821                  * only the first byte of the word is being modified
 822                  */
 823                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 824                                    &eeprom_buff[last_word - first_word]);
 825         }
 826
 827         /* Device's eeprom is always little-endian, word addressable */
 828         for (i = 0; i < last_word - first_word + 1; i++)
 829                 le16_to_cpus(&eeprom_buff[i]);
 830
 831         memcpy(ptr, bytes, eeprom->len);
 832
 833         for (i = 0; i < last_word - first_word + 1; i++)
 834                 cpu_to_le16s(&eeprom_buff[i]);
 835
 836         ret_val = hw->nvm.ops.write(hw, first_word,
 837                                     last_word - first_word + 1, eeprom_buff);
 838
 839         /* Update the checksum if nvm write succeeded */
 840         if (ret_val == 0)
 841                 hw->nvm.ops.update(hw);
 842
 843         igb_set_fw_version(adapter);
 844         kfree(eeprom_buff);
 845         return ret_val;
 846 }
 847
 848 static void igb_get_drvinfo(struct net_device *netdev,
 849                             struct ethtool_drvinfo *drvinfo)
 850 {
 851         struct igb_adapter *adapter = netdev_priv(netdev);
 852
 853         strlcpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver));
 854
 855         /* EEPROM image version # is reported as firmware version # for
 856          * 82575 controllers
 857          */
 858         strlcpy(drvinfo->fw_version, adapter->fw_version,
 859                 sizeof(drvinfo->fw_version));
 860         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 861                 sizeof(drvinfo->bus_info));
 862
 863         drvinfo->n_priv_flags = IGB_PRIV_FLAGS_STR_LEN;
 864 }
 865
 866 static void igb_get_ringparam(struct net_device *netdev,
 867                               struct ethtool_ringparam *ring)
 868 {
 869         struct igb_adapter *adapter = netdev_priv(netdev);
 870
 871         ring->rx_max_pending = IGB_MAX_RXD;
 872         ring->tx_max_pending = IGB_MAX_TXD;
 873         ring->rx_pending = adapter->rx_ring_count;
 874         ring->tx_pending = adapter->tx_ring_count;
 875 }
 876
 877 static int igb_set_ringparam(struct net_device *netdev,
 878                              struct ethtool_ringparam *ring)
 879 {
 880         struct igb_adapter *adapter = netdev_priv(netdev);
 881         struct igb_ring *temp_ring;
 882         int i, err = 0;
 883         u16 new_rx_count, new_tx_count;
 884
 885         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 886                 return -EINVAL;
 887
 888         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 889         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 890         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 891
 892         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 893         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 894         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 895
 896         if ((new_tx_count == adapter->tx_ring_count) &&
 897             (new_rx_count == adapter->rx_ring_count)) {
 898                 /* nothing to do */
 899                 return 0;
 900         }
 901
 902         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 903                 usleep_range(1000, 2000);
 904
 905         if (!netif_running(adapter->netdev)) {
 906                 for (i = 0; i < adapter->num_tx_queues; i++)
 907                         adapter->tx_ring[i]->count = new_tx_count;
 908                 for (i = 0; i < adapter->num_rx_queues; i++)
 909                         adapter->rx_ring[i]->count = new_rx_count;
 910                 adapter->tx_ring_count = new_tx_count;
 911                 adapter->rx_ring_count = new_rx_count;
 912                 goto clear_reset;
 913         }
 914
 915         if (adapter->num_tx_queues > adapter->num_rx_queues)
 916                 temp_ring = vmalloc(array_size(sizeof(struct igb_ring),
 917                                                adapter->num_tx_queues));
 918         else
 919                 temp_ring = vmalloc(array_size(sizeof(struct igb_ring),
 920                                                adapter->num_rx_queues));
 921
 922         if (!temp_ring) {
 923                 err = -ENOMEM;
 924                 goto clear_reset;
 925         }
 926
 927         igb_down(adapter);
 928
 929         /* We can't just free everything and then setup again,
 930          * because the ISRs in MSI-X mode get passed pointers
 931          * to the Tx and Rx ring structs.
 932          */
 933         if (new_tx_count != adapter->tx_ring_count) {
 934                 for (i = 0; i < adapter->num_tx_queues; i++) {
 935                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 936                                sizeof(struct igb_ring));
 937
 938                         temp_ring[i].count = new_tx_count;
 939                         err = igb_setup_tx_resources(&temp_ring[i]);
 940                         if (err) {
 941                                 while (i) {
 942                                         i--;
 943                                         igb_free_tx_resources(&temp_ring[i]);
 944                                 }
 945                                 goto err_setup;
 946                         }
 947                 }
 948
 949                 for (i = 0; i < adapter->num_tx_queues; i++) {
 950                         igb_free_tx_resources(adapter->tx_ring[i]);
 951
 952                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 953                                sizeof(struct igb_ring));
 954                 }
 955
 956                 adapter->tx_ring_count = new_tx_count;
 957         }
 958
 959         if (new_rx_count != adapter->rx_ring_count) {
 960                 for (i = 0; i < adapter->num_rx_queues; i++) {
 961                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 962                                sizeof(struct igb_ring));
 963
 964                         /* Clear copied XDP RX-queue info */
 965                         memset(&temp_ring[i].xdp_rxq, 0,
 966                                sizeof(temp_ring[i].xdp_rxq));
 967
 968                         temp_ring[i].count = new_rx_count;
 969                         err = igb_setup_rx_resources(&temp_ring[i]);
 970                         if (err) {
 971                                 while (i) {
 972                                         i--;
 973                                         igb_free_rx_resources(&temp_ring[i]);
 974                                 }
 975                                 goto err_setup;
 976                         }
 977
 978                 }
 979
 980                 for (i = 0; i < adapter->num_rx_queues; i++) {
 981                         igb_free_rx_resources(adapter->rx_ring[i]);
 982
 983                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 984                                sizeof(struct igb_ring));
 985                 }
 986
 987                 adapter->rx_ring_count = new_rx_count;
 988         }
 989 err_setup:
 990         igb_up(adapter);
 991         vfree(temp_ring);
 992 clear_reset:
 993         clear_bit(__IGB_RESETTING, &adapter->state);
 994         return err;
 995 }
 996
 997 /* ethtool register test data */
 998 struct igb_reg_test {
 999         u16 reg;
1000         u16 reg_offset;
1001         u16 array_len;
1002         u16 test_type;
1003         u32 mask;
1004         u32 write;
1005 };
1006
1007 /* In the hardware, registers are laid out either singly, in arrays
1008  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
1009  * most tests take place on arrays or single registers (handled
1010  * as a single-element array) and special-case the tables.
1011  * Table tests are always pattern tests.
1012  *
1013  * We also make provision for some required setup steps by specifying
1014  * registers to be written without any read-back testing.
1015  */
1016
1017 #define PATTERN_TEST    1
1018 #define SET_READ_TEST   2
1019 #define WRITE_NO_TEST   3
1020 #define TABLE32_TEST    4
1021 #define TABLE64_TEST_LO 5
1022 #define TABLE64_TEST_HI 6
1023
1024 /* i210 reg test */
1025 static struct igb_reg_test reg_test_i210[] = {
1026         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1027         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1028         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1029         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1030         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1031         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1032         /* RDH is read-only for i210, only test RDT. */
1033         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1034         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1035         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1036         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1037         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1038         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1039         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1040         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1041         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1042         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1043         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1044         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1045         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1046                                                 0xFFFFFFFF, 0xFFFFFFFF },
1047         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1048                                                 0x900FFFFF, 0xFFFFFFFF },
1049         { E1000_MTA,       0, 128, TABLE32_TEST,
1050                                                 0xFFFFFFFF, 0xFFFFFFFF },
1051         { 0, 0, 0, 0, 0 }
1052 };
1053
1054 /* i350 reg test */
1055 static struct igb_reg_test reg_test_i350[] = {
1056         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1057         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1058         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1059         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
1060         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1061         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1062         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1063         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1064         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1065         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1066         /* RDH is read-only for i350, only test RDT. */
1067         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1068         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1069         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1070         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1071         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1072         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1073         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1074         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1075         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1076         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1077         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1078         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1079         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1080         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1081         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1082         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1083         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1084         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1085                                                 0xFFFFFFFF, 0xFFFFFFFF },
1086         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1087                                                 0xC3FFFFFF, 0xFFFFFFFF },
1088         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
1089                                                 0xFFFFFFFF, 0xFFFFFFFF },
1090         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
1091                                                 0xC3FFFFFF, 0xFFFFFFFF },
1092         { E1000_MTA,       0, 128, TABLE32_TEST,
1093                                                 0xFFFFFFFF, 0xFFFFFFFF },
1094         { 0, 0, 0, 0 }
1095 };
1096
1097 /* 82580 reg test */
1098 static struct igb_reg_test reg_test_82580[] = {
1099         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1100         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1101         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1102         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1103         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1104         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1105         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1106         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1107         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1108         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1109         /* RDH is read-only for 82580, only test RDT. */
1110         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1111         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1112         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1113         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1114         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1115         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1116         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1117         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1118         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1119         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1120         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1121         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1122         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1123         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1124         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1125         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1126         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1127         { E1000_RA,        0, 16, TABLE64_TEST_LO,
1128                                                 0xFFFFFFFF, 0xFFFFFFFF },
1129         { E1000_RA,        0, 16, TABLE64_TEST_HI,
1130                                                 0x83FFFFFF, 0xFFFFFFFF },
1131         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
1132                                                 0xFFFFFFFF, 0xFFFFFFFF },
1133         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
1134                                                 0x83FFFFFF, 0xFFFFFFFF },
1135         { E1000_MTA,       0, 128, TABLE32_TEST,
1136                                                 0xFFFFFFFF, 0xFFFFFFFF },
1137         { 0, 0, 0, 0 }
1138 };
1139
1140 /* 82576 reg test */
1141 static struct igb_reg_test reg_test_82576[] = {
1142         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1143         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1144         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1145         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1146         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1147         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1148         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1149         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1150         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1151         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1152         /* Enable all RX queues before testing. */
1153         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1154           E1000_RXDCTL_QUEUE_ENABLE },
1155         { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST, 0,
1156           E1000_RXDCTL_QUEUE_ENABLE },
1157         /* RDH is read-only for 82576, only test RDT. */
1158         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1159         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1160         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1161         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1162         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1163         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1164         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1165         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1166         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1168         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1169         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1170         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1171         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1172         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1173         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1174         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1175         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1176         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1177         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1179         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1180         { 0, 0, 0, 0 }
1181 };
1182
1183 /* 82575 register test */
1184 static struct igb_reg_test reg_test_82575[] = {
1185         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1186         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1187         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1188         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1189         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1190         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1191         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1192         /* Enable all four RX queues before testing. */
1193         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0,
1194           E1000_RXDCTL_QUEUE_ENABLE },
1195         /* RDH is read-only for 82575, only test RDT. */
1196         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1197         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1198         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1199         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1200         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1201         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1202         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1203         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1204         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1205         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1206         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1207         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1208         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1209         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1210         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1211         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1212         { 0, 0, 0, 0 }
1213 };
1214
1215 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1216                              int reg, u32 mask, u32 write)
1217 {
1218         struct e1000_hw *hw = &adapter->hw;
1219         u32 pat, val;
1220         static const u32 _test[] = {
1221                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1222         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1223                 wr32(reg, (_test[pat] & write));
1224                 val = rd32(reg) & mask;
1225                 if (val != (_test[pat] & write & mask)) {
1226                         dev_err(&adapter->pdev->dev,
1227                                 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1228                                 reg, val, (_test[pat] & write & mask));
1229                         *data = reg;
1230                         return true;
1231                 }
1232         }
1233
1234         return false;
1235 }
1236
1237 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1238                               int reg, u32 mask, u32 write)
1239 {
1240         struct e1000_hw *hw = &adapter->hw;
1241         u32 val;
1242
1243         wr32(reg, write & mask);
1244         val = rd32(reg);
1245         if ((write & mask) != (val & mask)) {
1246                 dev_err(&adapter->pdev->dev,
1247                         "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1248                         reg, (val & mask), (write & mask));
1249                 *data = reg;
1250                 return true;
1251         }
1252
1253         return false;
1254 }
1255
1256 #define REG_PATTERN_TEST(reg, mask, write) \
1257         do { \
1258                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1259                         return 1; \
1260         } while (0)
1261
1262 #define REG_SET_AND_CHECK(reg, mask, write) \
1263         do { \
1264                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1265                         return 1; \
1266         } while (0)
1267
1268 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1269 {
1270         struct e1000_hw *hw = &adapter->hw;
1271         struct igb_reg_test *test;
1272         u32 value, before, after;
1273         u32 i, toggle;
1274
1275         switch (adapter->hw.mac.type) {
1276         case e1000_i350:
1277         case e1000_i354:
1278                 test = reg_test_i350;
1279                 toggle = 0x7FEFF3FF;
1280                 break;
1281         case e1000_i210:
1282         case e1000_i211:
1283                 test = reg_test_i210;
1284                 toggle = 0x7FEFF3FF;
1285                 break;
1286         case e1000_82580:
1287                 test = reg_test_82580;
1288                 toggle = 0x7FEFF3FF;
1289                 break;
1290         case e1000_82576:
1291                 test = reg_test_82576;
1292                 toggle = 0x7FFFF3FF;
1293                 break;
1294         default:
1295                 test = reg_test_82575;
1296                 toggle = 0x7FFFF3FF;
1297                 break;
1298         }
1299
1300         /* Because the status register is such a special case,
1301          * we handle it separately from the rest of the register
1302          * tests.  Some bits are read-only, some toggle, and some
1303          * are writable on newer MACs.
1304          */
1305         before = rd32(E1000_STATUS);
1306         value = (rd32(E1000_STATUS) & toggle);
1307         wr32(E1000_STATUS, toggle);
1308         after = rd32(E1000_STATUS) & toggle;
1309         if (value != after) {
1310                 dev_err(&adapter->pdev->dev,
1311                         "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1312                         after, value);
1313                 *data = 1;
1314                 return 1;
1315         }
1316         /* restore previous status */
1317         wr32(E1000_STATUS, before);
1318
1319         /* Perform the remainder of the register test, looping through
1320          * the test table until we either fail or reach the null entry.
1321          */
1322         while (test->reg) {
1323                 for (i = 0; i < test->array_len; i++) {
1324                         switch (test->test_type) {
1325                         case PATTERN_TEST:
1326                                 REG_PATTERN_TEST(test->reg +
1327                                                 (i * test->reg_offset),
1328                                                 test->mask,
1329                                                 test->write);
1330                                 break;
1331                         case SET_READ_TEST:
1332                                 REG_SET_AND_CHECK(test->reg +
1333                                                 (i * test->reg_offset),
1334                                                 test->mask,
1335                                                 test->write);
1336                                 break;
1337                         case WRITE_NO_TEST:
1338                                 writel(test->write,
1339                                     (adapter->hw.hw_addr + test->reg)
1340                                         + (i * test->reg_offset));
1341                                 break;
1342                         case TABLE32_TEST:
1343                                 REG_PATTERN_TEST(test->reg + (i * 4),
1344                                                 test->mask,
1345                                                 test->write);
1346                                 break;
1347                         case TABLE64_TEST_LO:
1348                                 REG_PATTERN_TEST(test->reg + (i * 8),
1349                                                 test->mask,
1350                                                 test->write);
1351                                 break;
1352                         case TABLE64_TEST_HI:
1353                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1354                                                 test->mask,
1355                                                 test->write);
1356                                 break;
1357                         }
1358                 }
1359                 test++;
1360         }
1361
1362         *data = 0;
1363         return 0;
1364 }
1365
1366 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1367 {
1368         struct e1000_hw *hw = &adapter->hw;
1369
1370         *data = 0;
1371
1372         /* Validate eeprom on all parts but flashless */
1373         switch (hw->mac.type) {
1374         case e1000_i210:
1375         case e1000_i211:
1376                 if (igb_get_flash_presence_i210(hw)) {
1377                         if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1378                                 *data = 2;
1379                 }
1380                 break;
1381         default:
1382                 if (adapter->hw.nvm.ops.validate(&adapter->hw) < 0)
1383                         *data = 2;
1384                 break;
1385         }
1386
1387         return *data;
1388 }
1389
1390 static irqreturn_t igb_test_intr(int irq, void *data)
1391 {
1392         struct igb_adapter *adapter = (struct igb_adapter *) data;
1393         struct e1000_hw *hw = &adapter->hw;
1394
1395         adapter->test_icr |= rd32(E1000_ICR);
1396
1397         return IRQ_HANDLED;
1398 }
1399
1400 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1401 {
1402         struct e1000_hw *hw = &adapter->hw;
1403         struct net_device *netdev = adapter->netdev;
1404         u32 mask, ics_mask, i = 0, shared_int = true;
1405         u32 irq = adapter->pdev->irq;
1406
1407         *data = 0;
1408
1409         /* Hook up test interrupt handler just for this test */
1410         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
1411                 if (request_irq(adapter->msix_entries[0].vector,
1412                                 igb_test_intr, 0, netdev->name, adapter)) {
1413                         *data = 1;
1414                         return -1;
1415                 }
1416         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1417                 shared_int = false;
1418                 if (request_irq(irq,
1419                                 igb_test_intr, 0, netdev->name, adapter)) {
1420                         *data = 1;
1421                         return -1;
1422                 }
1423         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1424                                 netdev->name, adapter)) {
1425                 shared_int = false;
1426         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1427                  netdev->name, adapter)) {
1428                 *data = 1;
1429                 return -1;
1430         }
1431         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1432                 (shared_int ? "shared" : "unshared"));
1433
1434         /* Disable all the interrupts */
1435         wr32(E1000_IMC, ~0);
1436         wrfl();
1437         usleep_range(10000, 11000);
1438
1439         /* Define all writable bits for ICS */
1440         switch (hw->mac.type) {
1441         case e1000_82575:
1442                 ics_mask = 0x37F47EDD;
1443                 break;
1444         case e1000_82576:
1445                 ics_mask = 0x77D4FBFD;
1446                 break;
1447         case e1000_82580:
1448                 ics_mask = 0x77DCFED5;
1449                 break;
1450         case e1000_i350:
1451         case e1000_i354:
1452         case e1000_i210:
1453         case e1000_i211:
1454                 ics_mask = 0x77DCFED5;
1455                 break;
1456         default:
1457                 ics_mask = 0x7FFFFFFF;
1458                 break;
1459         }
1460
1461         /* Test each interrupt */
1462         for (; i < 31; i++) {
1463                 /* Interrupt to test */
1464                 mask = BIT(i);
1465
1466                 if (!(mask & ics_mask))
1467                         continue;
1468
1469                 if (!shared_int) {
1470                         /* Disable the interrupt to be reported in
1471                          * the cause register and then force the same
1472                          * interrupt and see if one gets posted.  If
1473                          * an interrupt was posted to the bus, the
1474                          * test failed.
1475                          */
1476                         adapter->test_icr = 0;
1477
1478                         /* Flush any pending interrupts */
1479                         wr32(E1000_ICR, ~0);
1480
1481                         wr32(E1000_IMC, mask);
1482                         wr32(E1000_ICS, mask);
1483                         wrfl();
1484                         usleep_range(10000, 11000);
1485
1486                         if (adapter->test_icr & mask) {
1487                                 *data = 3;
1488                                 break;
1489                         }
1490                 }
1491
1492                 /* Enable the interrupt to be reported in
1493                  * the cause register and then force the same
1494                  * interrupt and see if one gets posted.  If
1495                  * an interrupt was not posted to the bus, the
1496                  * test failed.
1497                  */
1498                 adapter->test_icr = 0;
1499
1500                 /* Flush any pending interrupts */
1501                 wr32(E1000_ICR, ~0);
1502
1503                 wr32(E1000_IMS, mask);
1504                 wr32(E1000_ICS, mask);
1505                 wrfl();
1506                 usleep_range(10000, 11000);
1507
1508                 if (!(adapter->test_icr & mask)) {
1509                         *data = 4;
1510                         break;
1511                 }
1512
1513                 if (!shared_int) {
1514                         /* Disable the other interrupts to be reported in
1515                          * the cause register and then force the other
1516                          * interrupts and see if any get posted.  If
1517                          * an interrupt was posted to the bus, the
1518                          * test failed.
1519                          */
1520                         adapter->test_icr = 0;
1521
1522                         /* Flush any pending interrupts */
1523                         wr32(E1000_ICR, ~0);
1524
1525                         wr32(E1000_IMC, ~mask);
1526                         wr32(E1000_ICS, ~mask);
1527                         wrfl();
1528                         usleep_range(10000, 11000);
1529
1530                         if (adapter->test_icr & mask) {
1531                                 *data = 5;
1532                                 break;
1533                         }
1534                 }
1535         }
1536
1537         /* Disable all the interrupts */
1538         wr32(E1000_IMC, ~0);
1539         wrfl();
1540         usleep_range(10000, 11000);
1541
1542         /* Unhook test interrupt handler */
1543         if (adapter->flags & IGB_FLAG_HAS_MSIX)
1544                 free_irq(adapter->msix_entries[0].vector, adapter);
1545         else
1546                 free_irq(irq, adapter);
1547
1548         return *data;
1549 }
1550
1551 static void igb_free_desc_rings(struct igb_adapter *adapter)
1552 {
1553         igb_free_tx_resources(&adapter->test_tx_ring);
1554         igb_free_rx_resources(&adapter->test_rx_ring);
1555 }
1556
1557 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1558 {
1559         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1560         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1561         struct e1000_hw *hw = &adapter->hw;
1562         int ret_val;
1563
1564         /* Setup Tx descriptor ring and Tx buffers */
1565         tx_ring->count = IGB_DEFAULT_TXD;
1566         tx_ring->dev = &adapter->pdev->dev;
1567         tx_ring->netdev = adapter->netdev;
1568         tx_ring->reg_idx = adapter->vfs_allocated_count;
1569
1570         if (igb_setup_tx_resources(tx_ring)) {
1571                 ret_val = 1;
1572                 goto err_nomem;
1573         }
1574
1575         igb_setup_tctl(adapter);
1576         igb_configure_tx_ring(adapter, tx_ring);
1577
1578         /* Setup Rx descriptor ring and Rx buffers */
1579         rx_ring->count = IGB_DEFAULT_RXD;
1580         rx_ring->dev = &adapter->pdev->dev;
1581         rx_ring->netdev = adapter->netdev;
1582         rx_ring->reg_idx = adapter->vfs_allocated_count;
1583
1584         if (igb_setup_rx_resources(rx_ring)) {
1585                 ret_val = 3;
1586                 goto err_nomem;
1587         }
1588
1589         /* set the default queue to queue 0 of PF */
1590         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1591
1592         /* enable receive ring */
1593         igb_setup_rctl(adapter);
1594         igb_configure_rx_ring(adapter, rx_ring);
1595
1596         igb_alloc_rx_buffers(rx_ring, igb_desc_unused(rx_ring));
1597
1598         return 0;
1599
1600 err_nomem:
1601         igb_free_desc_rings(adapter);
1602         return ret_val;
1603 }
1604
1605 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1606 {
1607         struct e1000_hw *hw = &adapter->hw;
1608
1609         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1610         igb_write_phy_reg(hw, 29, 0x001F);
1611         igb_write_phy_reg(hw, 30, 0x8FFC);
1612         igb_write_phy_reg(hw, 29, 0x001A);
1613         igb_write_phy_reg(hw, 30, 0x8FF0);
1614 }
1615
1616 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1617 {
1618         struct e1000_hw *hw = &adapter->hw;
1619         u32 ctrl_reg = 0;
1620
1621         hw->mac.autoneg = false;
1622
1623         if (hw->phy.type == e1000_phy_m88) {
1624                 if (hw->phy.id != I210_I_PHY_ID) {
1625                         /* Auto-MDI/MDIX Off */
1626                         igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1627                         /* reset to update Auto-MDI/MDIX */
1628                         igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1629                         /* autoneg off */
1630                         igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1631                 } else {
1632                         /* force 1000, set loopback  */
1633                         igb_write_phy_reg(hw, I347AT4_PAGE_SELECT, 0);
1634                         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1635                 }
1636         } else if (hw->phy.type == e1000_phy_82580) {
1637                 /* enable MII loopback */
1638                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1639         }
1640
1641         /* add small delay to avoid loopback test failure */
1642         msleep(50);
1643
1644         /* force 1000, set loopback */
1645         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1646
1647         /* Now set up the MAC to the same speed/duplex as the PHY. */
1648         ctrl_reg = rd32(E1000_CTRL);
1649         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1650         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1651                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1652                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1653                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1654                      E1000_CTRL_SLU);    /* Set link up enable bit */
1655
1656         if (hw->phy.type == e1000_phy_m88)
1657                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1658
1659         wr32(E1000_CTRL, ctrl_reg);
1660
1661         /* Disable the receiver on the PHY so when a cable is plugged in, the
1662          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1663          */
1664         if (hw->phy.type == e1000_phy_m88)
1665                 igb_phy_disable_receiver(adapter);
1666
1667         msleep(500);
1668         return 0;
1669 }
1670
1671 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1672 {
1673         return igb_integrated_phy_loopback(adapter);
1674 }
1675
1676 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1677 {
1678         struct e1000_hw *hw = &adapter->hw;
1679         u32 reg;
1680
1681         reg = rd32(E1000_CTRL_EXT);
1682
1683         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1684         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1685                 if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1686                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1687                 (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1688                 (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1689                 (hw->device_id == E1000_DEV_ID_I354_SGMII) ||
1690                 (hw->device_id == E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)) {
1691                         /* Enable DH89xxCC MPHY for near end loopback */
1692                         reg = rd32(E1000_MPHY_ADDR_CTL);
1693                         reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1694                         E1000_MPHY_PCS_CLK_REG_OFFSET;
1695                         wr32(E1000_MPHY_ADDR_CTL, reg);
1696
1697                         reg = rd32(E1000_MPHY_DATA);
1698                         reg |= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1699                         wr32(E1000_MPHY_DATA, reg);
1700                 }
1701
1702                 reg = rd32(E1000_RCTL);
1703                 reg |= E1000_RCTL_LBM_TCVR;
1704                 wr32(E1000_RCTL, reg);
1705
1706                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1707
1708                 reg = rd32(E1000_CTRL);
1709                 reg &= ~(E1000_CTRL_RFCE |
1710                          E1000_CTRL_TFCE |
1711                          E1000_CTRL_LRST);
1712                 reg |= E1000_CTRL_SLU |
1713                        E1000_CTRL_FD;
1714                 wr32(E1000_CTRL, reg);
1715
1716                 /* Unset switch control to serdes energy detect */
1717                 reg = rd32(E1000_CONNSW);
1718                 reg &= ~E1000_CONNSW_ENRGSRC;
1719                 wr32(E1000_CONNSW, reg);
1720
1721                 /* Unset sigdetect for SERDES loopback on
1722                  * 82580 and newer devices.
1723                  */
1724                 if (hw->mac.type >= e1000_82580) {
1725                         reg = rd32(E1000_PCS_CFG0);
1726                         reg |= E1000_PCS_CFG_IGN_SD;
1727                         wr32(E1000_PCS_CFG0, reg);
1728                 }
1729
1730                 /* Set PCS register for forced speed */
1731                 reg = rd32(E1000_PCS_LCTL);
1732                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1733                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1734                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1735                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1736                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1737                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1738                 wr32(E1000_PCS_LCTL, reg);
1739
1740                 return 0;
1741         }
1742
1743         return igb_set_phy_loopback(adapter);
1744 }
1745
1746 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1747 {
1748         struct e1000_hw *hw = &adapter->hw;
1749         u32 rctl;
1750         u16 phy_reg;
1751
1752         if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) ||
1753         (hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) ||
1754         (hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) ||
1755         (hw->device_id == E1000_DEV_ID_DH89XXCC_SFP) ||
1756         (hw->device_id == E1000_DEV_ID_I354_SGMII)) {
1757                 u32 reg;
1758
1759                 /* Disable near end loopback on DH89xxCC */
1760                 reg = rd32(E1000_MPHY_ADDR_CTL);
1761                 reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) |
1762                 E1000_MPHY_PCS_CLK_REG_OFFSET;
1763                 wr32(E1000_MPHY_ADDR_CTL, reg);
1764
1765                 reg = rd32(E1000_MPHY_DATA);
1766                 reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
1767                 wr32(E1000_MPHY_DATA, reg);
1768         }
1769
1770         rctl = rd32(E1000_RCTL);
1771         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1772         wr32(E1000_RCTL, rctl);
1773
1774         hw->mac.autoneg = true;
1775         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1776         if (phy_reg & MII_CR_LOOPBACK) {
1777                 phy_reg &= ~MII_CR_LOOPBACK;
1778                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1779                 igb_phy_sw_reset(hw);
1780         }
1781 }
1782
1783 static void igb_create_lbtest_frame(struct sk_buff *skb,
1784                                     unsigned int frame_size)
1785 {
1786         memset(skb->data, 0xFF, frame_size);
1787         frame_size /= 2;
1788         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1789         skb->data[frame_size + 10] = 0xBE;
1790         skb->data[frame_size + 12] = 0xAF;
1791 }
1792
1793 static int igb_check_lbtest_frame(struct igb_rx_buffer *rx_buffer,
1794                                   unsigned int frame_size)
1795 {
1796         unsigned char *data;
1797         bool match = true;
1798
1799         frame_size >>= 1;
1800
1801         data = kmap(rx_buffer->page);
1802
1803         if (data[3] != 0xFF ||
1804             data[frame_size + 10] != 0xBE ||
1805             data[frame_size + 12] != 0xAF)
1806                 match = false;
1807
1808         kunmap(rx_buffer->page);
1809
1810         return match;
1811 }
1812
1813 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1814                                 struct igb_ring *tx_ring,
1815                                 unsigned int size)
1816 {
1817         union e1000_adv_rx_desc *rx_desc;
1818         struct igb_rx_buffer *rx_buffer_info;
1819         struct igb_tx_buffer *tx_buffer_info;
1820         u16 rx_ntc, tx_ntc, count = 0;
1821
1822         /* initialize next to clean and descriptor values */
1823         rx_ntc = rx_ring->next_to_clean;
1824         tx_ntc = tx_ring->next_to_clean;
1825         rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1826
1827         while (rx_desc->wb.upper.length) {
1828                 /* check Rx buffer */
1829                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1830
1831                 /* sync Rx buffer for CPU read */
1832                 dma_sync_single_for_cpu(rx_ring->dev,
1833                                         rx_buffer_info->dma,
1834                                         size,
1835                                         DMA_FROM_DEVICE);
1836
1837                 /* verify contents of skb */
1838                 if (igb_check_lbtest_frame(rx_buffer_info, size))
1839                         count++;
1840
1841                 /* sync Rx buffer for device write */
1842                 dma_sync_single_for_device(rx_ring->dev,
1843                                            rx_buffer_info->dma,
1844                                            size,
1845                                            DMA_FROM_DEVICE);
1846
1847                 /* unmap buffer on Tx side */
1848                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1849
1850                 /* Free all the Tx ring sk_buffs */
1851                 dev_kfree_skb_any(tx_buffer_info->skb);
1852
1853                 /* unmap skb header data */
1854                 dma_unmap_single(tx_ring->dev,
1855                                  dma_unmap_addr(tx_buffer_info, dma),
1856                                  dma_unmap_len(tx_buffer_info, len),
1857                                  DMA_TO_DEVICE);
1858                 dma_unmap_len_set(tx_buffer_info, len, 0);
1859
1860                 /* increment Rx/Tx next to clean counters */
1861                 rx_ntc++;
1862                 if (rx_ntc == rx_ring->count)
1863                         rx_ntc = 0;
1864                 tx_ntc++;
1865                 if (tx_ntc == tx_ring->count)
1866                         tx_ntc = 0;
1867
1868                 /* fetch next descriptor */
1869                 rx_desc = IGB_RX_DESC(rx_ring, rx_ntc);
1870         }
1871
1872         netdev_tx_reset_queue(txring_txq(tx_ring));
1873
1874         /* re-map buffers to ring, store next to clean values */
1875         igb_alloc_rx_buffers(rx_ring, count);
1876         rx_ring->next_to_clean = rx_ntc;
1877         tx_ring->next_to_clean = tx_ntc;
1878
1879         return count;
1880 }
1881
1882 static int igb_run_loopback_test(struct igb_adapter *adapter)
1883 {
1884         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1885         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1886         u16 i, j, lc, good_cnt;
1887         int ret_val = 0;
1888         unsigned int size = IGB_RX_HDR_LEN;
1889         netdev_tx_t tx_ret_val;
1890         struct sk_buff *skb;
1891
1892         /* allocate test skb */
1893         skb = alloc_skb(size, GFP_KERNEL);
1894         if (!skb)
1895                 return 11;
1896
1897         /* place data into test skb */
1898         igb_create_lbtest_frame(skb, size);
1899         skb_put(skb, size);
1900
1901         /* Calculate the loop count based on the largest descriptor ring
1902          * The idea is to wrap the largest ring a number of times using 64
1903          * send/receive pairs during each loop
1904          */
1905
1906         if (rx_ring->count <= tx_ring->count)
1907                 lc = ((tx_ring->count / 64) * 2) + 1;
1908         else
1909                 lc = ((rx_ring->count / 64) * 2) + 1;
1910
1911         for (j = 0; j <= lc; j++) { /* loop count loop */
1912                 /* reset count of good packets */
1913                 good_cnt = 0;
1914
1915                 /* place 64 packets on the transmit queue*/
1916                 for (i = 0; i < 64; i++) {
1917                         skb_get(skb);
1918                         tx_ret_val = igb_xmit_frame_ring(skb, tx_ring);
1919                         if (tx_ret_val == NETDEV_TX_OK)
1920                                 good_cnt++;
1921                 }
1922
1923                 if (good_cnt != 64) {
1924                         ret_val = 12;
1925                         break;
1926                 }
1927
1928                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1929                 msleep(200);
1930
1931                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1932                 if (good_cnt != 64) {
1933                         ret_val = 13;
1934                         break;
1935                 }
1936         } /* end loop count loop */
1937
1938         /* free the original skb */
1939         kfree_skb(skb);
1940
1941         return ret_val;
1942 }
1943
1944 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1945 {
1946         /* PHY loopback cannot be performed if SoL/IDER
1947          * sessions are active
1948          */
1949         if (igb_check_reset_block(&adapter->hw)) {
1950                 dev_err(&adapter->pdev->dev,
1951                         "Cannot do PHY loopback test when SoL/IDER is active.\n");
1952                 *data = 0;
1953                 goto out;
1954         }
1955
1956         if (adapter->hw.mac.type == e1000_i354) {
1957                 dev_info(&adapter->pdev->dev,
1958                         "Loopback test not supported on i354.\n");
1959                 *data = 0;
1960                 goto out;
1961         }
1962         *data = igb_setup_desc_rings(adapter);
1963         if (*data)
1964                 goto out;
1965         *data = igb_setup_loopback_test(adapter);
1966         if (*data)
1967                 goto err_loopback;
1968         *data = igb_run_loopback_test(adapter);
1969         igb_loopback_cleanup(adapter);
1970
1971 err_loopback:
1972         igb_free_desc_rings(adapter);
1973 out:
1974         return *data;
1975 }
1976
1977 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1978 {
1979         struct e1000_hw *hw = &adapter->hw;
1980         *data = 0;
1981         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1982                 int i = 0;
1983
1984                 hw->mac.serdes_has_link = false;
1985
1986                 /* On some blade server designs, link establishment
1987                  * could take as long as 2-3 minutes
1988                  */
1989                 do {
1990                         hw->mac.ops.check_for_link(&adapter->hw);
1991                         if (hw->mac.serdes_has_link)
1992                                 return *data;
1993                         msleep(20);
1994                 } while (i++ < 3750);
1995
1996                 *data = 1;
1997         } else {
1998                 hw->mac.ops.check_for_link(&adapter->hw);
1999                 if (hw->mac.autoneg)
2000                         msleep(5000);
2001
2002                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
2003                         *data = 1;
2004         }
2005         return *data;
2006 }
2007
2008 static void igb_diag_test(struct net_device *netdev,
2009                           struct ethtool_test *eth_test, u64 *data)
2010 {
2011         struct igb_adapter *adapter = netdev_priv(netdev);
2012         u16 autoneg_advertised;
2013         u8 forced_speed_duplex, autoneg;
2014         bool if_running = netif_running(netdev);
2015
2016         set_bit(__IGB_TESTING, &adapter->state);
2017
2018         /* can't do offline tests on media switching devices */
2019         if (adapter->hw.dev_spec._82575.mas_capable)
2020                 eth_test->flags &= ~ETH_TEST_FL_OFFLINE;
2021         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2022                 /* Offline tests */
2023
2024                 /* save speed, duplex, autoneg settings */
2025                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
2026                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
2027                 autoneg = adapter->hw.mac.autoneg;
2028
2029                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
2030
2031                 /* power up link for link test */
2032                 igb_power_up_link(adapter);
2033
2034                 /* Link test performed before hardware reset so autoneg doesn't
2035                  * interfere with test result
2036                  */
2037                 if (igb_link_test(adapter, &data[TEST_LINK]))
2038                         eth_test->flags |= ETH_TEST_FL_FAILED;
2039
2040                 if (if_running)
2041                         /* indicate we're in test mode */
2042                         igb_close(netdev);
2043                 else
2044                         igb_reset(adapter);
2045
2046                 if (igb_reg_test(adapter, &data[TEST_REG]))
2047                         eth_test->flags |= ETH_TEST_FL_FAILED;
2048
2049                 igb_reset(adapter);
2050                 if (igb_eeprom_test(adapter, &data[TEST_EEP]))
2051                         eth_test->flags |= ETH_TEST_FL_FAILED;
2052
2053                 igb_reset(adapter);
2054                 if (igb_intr_test(adapter, &data[TEST_IRQ]))
2055                         eth_test->flags |= ETH_TEST_FL_FAILED;
2056
2057                 igb_reset(adapter);
2058                 /* power up link for loopback test */
2059                 igb_power_up_link(adapter);
2060                 if (igb_loopback_test(adapter, &data[TEST_LOOP]))
2061                         eth_test->flags |= ETH_TEST_FL_FAILED;
2062
2063                 /* restore speed, duplex, autoneg settings */
2064                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
2065                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
2066                 adapter->hw.mac.autoneg = autoneg;
2067
2068                 /* force this routine to wait until autoneg complete/timeout */
2069                 adapter->hw.phy.autoneg_wait_to_complete = true;
2070                 igb_reset(adapter);
2071                 adapter->hw.phy.autoneg_wait_to_complete = false;
2072
2073                 clear_bit(__IGB_TESTING, &adapter->state);
2074                 if (if_running)
2075                         igb_open(netdev);
2076         } else {
2077                 dev_info(&adapter->pdev->dev, "online testing starting\n");
2078
2079                 /* PHY is powered down when interface is down */
2080                 if (if_running && igb_link_test(adapter, &data[TEST_LINK]))
2081                         eth_test->flags |= ETH_TEST_FL_FAILED;
2082                 else
2083                         data[TEST_LINK] = 0;
2084
2085                 /* Online tests aren't run; pass by default */
2086                 data[TEST_REG] = 0;
2087                 data[TEST_EEP] = 0;
2088                 data[TEST_IRQ] = 0;
2089                 data[TEST_LOOP] = 0;
2090
2091                 clear_bit(__IGB_TESTING, &adapter->state);
2092         }
2093         msleep_interruptible(4 * 1000);
2094 }
2095
2096 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2097 {
2098         struct igb_adapter *adapter = netdev_priv(netdev);
2099
2100         wol->wolopts = 0;
2101
2102         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2103                 return;
2104
2105         wol->supported = WAKE_UCAST | WAKE_MCAST |
2106                          WAKE_BCAST | WAKE_MAGIC |
2107                          WAKE_PHY;
2108
2109         /* apply any specific unsupported masks here */
2110         switch (adapter->hw.device_id) {
2111         default:
2112                 break;
2113         }
2114
2115         if (adapter->wol & E1000_WUFC_EX)
2116                 wol->wolopts |= WAKE_UCAST;
2117         if (adapter->wol & E1000_WUFC_MC)
2118                 wol->wolopts |= WAKE_MCAST;
2119         if (adapter->wol & E1000_WUFC_BC)
2120                 wol->wolopts |= WAKE_BCAST;
2121         if (adapter->wol & E1000_WUFC_MAG)
2122                 wol->wolopts |= WAKE_MAGIC;
2123         if (adapter->wol & E1000_WUFC_LNKC)
2124                 wol->wolopts |= WAKE_PHY;
2125 }
2126
2127 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2128 {
2129         struct igb_adapter *adapter = netdev_priv(netdev);
2130
2131         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE | WAKE_FILTER))
2132                 return -EOPNOTSUPP;
2133
2134         if (!(adapter->flags & IGB_FLAG_WOL_SUPPORTED))
2135                 return wol->wolopts ? -EOPNOTSUPP : 0;
2136
2137         /* these settings will always override what we currently have */
2138         adapter->wol = 0;
2139
2140         if (wol->wolopts & WAKE_UCAST)
2141                 adapter->wol |= E1000_WUFC_EX;
2142         if (wol->wolopts & WAKE_MCAST)
2143                 adapter->wol |= E1000_WUFC_MC;
2144         if (wol->wolopts & WAKE_BCAST)
2145                 adapter->wol |= E1000_WUFC_BC;
2146         if (wol->wolopts & WAKE_MAGIC)
2147                 adapter->wol |= E1000_WUFC_MAG;
2148         if (wol->wolopts & WAKE_PHY)
2149                 adapter->wol |= E1000_WUFC_LNKC;
2150         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2151
2152         return 0;
2153 }
2154
2155 /* bit defines for adapter->led_status */
2156 #define IGB_LED_ON              0
2157
2158 static int igb_set_phys_id(struct net_device *netdev,
2159                            enum ethtool_phys_id_state state)
2160 {
2161         struct igb_adapter *adapter = netdev_priv(netdev);
2162         struct e1000_hw *hw = &adapter->hw;
2163
2164         switch (state) {
2165         case ETHTOOL_ID_ACTIVE:
2166                 igb_blink_led(hw);
2167                 return 2;
2168         case ETHTOOL_ID_ON:
2169                 igb_blink_led(hw);
2170                 break;
2171         case ETHTOOL_ID_OFF:
2172                 igb_led_off(hw);
2173                 break;
2174         case ETHTOOL_ID_INACTIVE:
2175                 igb_led_off(hw);
2176                 clear_bit(IGB_LED_ON, &adapter->led_status);
2177                 igb_cleanup_led(hw);
2178                 break;
2179         }
2180
2181         return 0;
2182 }
2183
2184 static int igb_set_coalesce(struct net_device *netdev,
2185                             struct ethtool_coalesce *ec,
2186                             struct kernel_ethtool_coalesce *kernel_coal,
2187                             struct netlink_ext_ack *extack)
2188 {
2189         struct igb_adapter *adapter = netdev_priv(netdev);
2190         int i;
2191
2192         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2193             ((ec->rx_coalesce_usecs > 3) &&
2194              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2195             (ec->rx_coalesce_usecs == 2))
2196                 return -EINVAL;
2197
2198         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2199             ((ec->tx_coalesce_usecs > 3) &&
2200              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2201             (ec->tx_coalesce_usecs == 2))
2202                 return -EINVAL;
2203
2204         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2205                 return -EINVAL;
2206
2207         /* If ITR is disabled, disable DMAC */
2208         if (ec->rx_coalesce_usecs == 0) {
2209                 if (adapter->flags & IGB_FLAG_DMAC)
2210                         adapter->flags &= ~IGB_FLAG_DMAC;
2211         }
2212
2213         /* convert to rate of irq's per second */
2214         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2215                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2216         else
2217                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2218
2219         /* convert to rate of irq's per second */
2220         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2221                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2222         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2223                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2224         else
2225                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2226
2227         for (i = 0; i < adapter->num_q_vectors; i++) {
2228                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2229                 q_vector->tx.work_limit = adapter->tx_work_limit;
2230                 if (q_vector->rx.ring)
2231                         q_vector->itr_val = adapter->rx_itr_setting;
2232                 else
2233                         q_vector->itr_val = adapter->tx_itr_setting;
2234                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2235                         q_vector->itr_val = IGB_START_ITR;
2236                 q_vector->set_itr = 1;
2237         }
2238
2239         return 0;
2240 }
2241
2242 static int igb_get_coalesce(struct net_device *netdev,
2243                             struct ethtool_coalesce *ec,
2244                             struct kernel_ethtool_coalesce *kernel_coal,
2245                             struct netlink_ext_ack *extack)
2246 {
2247         struct igb_adapter *adapter = netdev_priv(netdev);
2248
2249         if (adapter->rx_itr_setting <= 3)
2250                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2251         else
2252                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2253
2254         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2255                 if (adapter->tx_itr_setting <= 3)
2256                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2257                 else
2258                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2259         }
2260
2261         return 0;
2262 }
2263
2264 static int igb_nway_reset(struct net_device *netdev)
2265 {
2266         struct igb_adapter *adapter = netdev_priv(netdev);
2267         if (netif_running(netdev))
2268                 igb_reinit_locked(adapter);
2269         return 0;
2270 }
2271
2272 static int igb_get_sset_count(struct net_device *netdev, int sset)
2273 {
2274         switch (sset) {
2275         case ETH_SS_STATS:
2276                 return IGB_STATS_LEN;
2277         case ETH_SS_TEST:
2278                 return IGB_TEST_LEN;
2279         case ETH_SS_PRIV_FLAGS:
2280                 return IGB_PRIV_FLAGS_STR_LEN;
2281         default:
2282                 return -ENOTSUPP;
2283         }
2284 }
2285
2286 static void igb_get_ethtool_stats(struct net_device *netdev,
2287                                   struct ethtool_stats *stats, u64 *data)
2288 {
2289         struct igb_adapter *adapter = netdev_priv(netdev);
2290         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2291         unsigned int start;
2292         struct igb_ring *ring;
2293         int i, j;
2294         char *p;
2295
2296         spin_lock(&adapter->stats64_lock);
2297         igb_update_stats(adapter);
2298
2299         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2300                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2301                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2302                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2303         }
2304         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2305                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2306                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2307                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2308         }
2309         for (j = 0; j < adapter->num_tx_queues; j++) {
2310                 u64     restart2;
2311
2312                 ring = adapter->tx_ring[j];
2313                 do {
2314                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp);
2315                         data[i]   = ring->tx_stats.packets;
2316                         data[i+1] = ring->tx_stats.bytes;
2317                         data[i+2] = ring->tx_stats.restart_queue;
2318                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp, start));
2319                 do {
2320                         start = u64_stats_fetch_begin_irq(&ring->tx_syncp2);
2321                         restart2  = ring->tx_stats.restart_queue2;
2322                 } while (u64_stats_fetch_retry_irq(&ring->tx_syncp2, start));
2323                 data[i+2] += restart2;
2324
2325                 i += IGB_TX_QUEUE_STATS_LEN;
2326         }
2327         for (j = 0; j < adapter->num_rx_queues; j++) {
2328                 ring = adapter->rx_ring[j];
2329                 do {
2330                         start = u64_stats_fetch_begin_irq(&ring->rx_syncp);
2331                         data[i]   = ring->rx_stats.packets;
2332                         data[i+1] = ring->rx_stats.bytes;
2333                         data[i+2] = ring->rx_stats.drops;
2334                         data[i+3] = ring->rx_stats.csum_err;
2335                         data[i+4] = ring->rx_stats.alloc_failed;
2336                 } while (u64_stats_fetch_retry_irq(&ring->rx_syncp, start));
2337                 i += IGB_RX_QUEUE_STATS_LEN;
2338         }
2339         spin_unlock(&adapter->stats64_lock);
2340 }
2341
2342 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2343 {
2344         struct igb_adapter *adapter = netdev_priv(netdev);
2345         u8 *p = data;
2346         int i;
2347
2348         switch (stringset) {
2349         case ETH_SS_TEST:
2350                 memcpy(data, igb_gstrings_test, sizeof(igb_gstrings_test));
2351                 break;
2352         case ETH_SS_STATS:
2353                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++)
2354                         ethtool_sprintf(&p,
2355                                         igb_gstrings_stats[i].stat_string);
2356                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++)
2357                         ethtool_sprintf(&p,
2358                                         igb_gstrings_net_stats[i].stat_string);
2359                 for (i = 0; i < adapter->num_tx_queues; i++) {
2360                         ethtool_sprintf(&p, "tx_queue_%u_packets", i);
2361                         ethtool_sprintf(&p, "tx_queue_%u_bytes", i);
2362                         ethtool_sprintf(&p, "tx_queue_%u_restart", i);
2363                 }
2364                 for (i = 0; i < adapter->num_rx_queues; i++) {
2365                         ethtool_sprintf(&p, "rx_queue_%u_packets", i);
2366                         ethtool_sprintf(&p, "rx_queue_%u_bytes", i);
2367                         ethtool_sprintf(&p, "rx_queue_%u_drops", i);
2368                         ethtool_sprintf(&p, "rx_queue_%u_csum_err", i);
2369                         ethtool_sprintf(&p, "rx_queue_%u_alloc_failed", i);
2370                 }
2371                 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2372                 break;
2373         case ETH_SS_PRIV_FLAGS:
2374                 memcpy(data, igb_priv_flags_strings,
2375                        IGB_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
2376                 break;
2377         }
2378 }
2379
2380 static int igb_get_ts_info(struct net_device *dev,
2381                            struct ethtool_ts_info *info)
2382 {
2383         struct igb_adapter *adapter = netdev_priv(dev);
2384
2385         if (adapter->ptp_clock)
2386                 info->phc_index = ptp_clock_index(adapter->ptp_clock);
2387         else
2388                 info->phc_index = -1;
2389
2390         switch (adapter->hw.mac.type) {
2391         case e1000_82575:
2392                 info->so_timestamping =
2393                         SOF_TIMESTAMPING_TX_SOFTWARE |
2394                         SOF_TIMESTAMPING_RX_SOFTWARE |
2395                         SOF_TIMESTAMPING_SOFTWARE;
2396                 return 0;
2397         case e1000_82576:
2398         case e1000_82580:
2399         case e1000_i350:
2400         case e1000_i354:
2401         case e1000_i210:
2402         case e1000_i211:
2403                 info->so_timestamping =
2404                         SOF_TIMESTAMPING_TX_SOFTWARE |
2405                         SOF_TIMESTAMPING_RX_SOFTWARE |
2406                         SOF_TIMESTAMPING_SOFTWARE |
2407                         SOF_TIMESTAMPING_TX_HARDWARE |
2408                         SOF_TIMESTAMPING_RX_HARDWARE |
2409                         SOF_TIMESTAMPING_RAW_HARDWARE;
2410
2411                 info->tx_types =
2412                         BIT(HWTSTAMP_TX_OFF) |
2413                         BIT(HWTSTAMP_TX_ON);
2414
2415                 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
2416
2417                 /* 82576 does not support timestamping all packets. */
2418                 if (adapter->hw.mac.type >= e1000_82580)
2419                         info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL);
2420                 else
2421                         info->rx_filters |=
2422                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2423                                 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2424                                 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
2425
2426                 return 0;
2427         default:
2428                 return -EOPNOTSUPP;
2429         }
2430 }
2431
2432 #define ETHER_TYPE_FULL_MASK ((__force __be16)~0)
2433 static int igb_get_ethtool_nfc_entry(struct igb_adapter *adapter,
2434                                      struct ethtool_rxnfc *cmd)
2435 {
2436         struct ethtool_rx_flow_spec *fsp = &cmd->fs;
2437         struct igb_nfc_filter *rule = NULL;
2438
2439         /* report total rule count */
2440         cmd->data = IGB_MAX_RXNFC_FILTERS;
2441
2442         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2443                 if (fsp->location <= rule->sw_idx)
2444                         break;
2445         }
2446
2447         if (!rule || fsp->location != rule->sw_idx)
2448                 return -EINVAL;
2449
2450         if (rule->filter.match_flags) {
2451                 fsp->flow_type = ETHER_FLOW;
2452                 fsp->ring_cookie = rule->action;
2453                 if (rule->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2454                         fsp->h_u.ether_spec.h_proto = rule->filter.etype;
2455                         fsp->m_u.ether_spec.h_proto = ETHER_TYPE_FULL_MASK;
2456                 }
2457                 if (rule->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI) {
2458                         fsp->flow_type |= FLOW_EXT;
2459                         fsp->h_ext.vlan_tci = rule->filter.vlan_tci;
2460                         fsp->m_ext.vlan_tci = htons(VLAN_PRIO_MASK);
2461                 }
2462                 if (rule->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR) {
2463                         ether_addr_copy(fsp->h_u.ether_spec.h_dest,
2464                                         rule->filter.dst_addr);
2465                         /* As we only support matching by the full
2466                          * mask, return the mask to userspace
2467                          */
2468                         eth_broadcast_addr(fsp->m_u.ether_spec.h_dest);
2469                 }
2470                 if (rule->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR) {
2471                         ether_addr_copy(fsp->h_u.ether_spec.h_source,
2472                                         rule->filter.src_addr);
2473                         /* As we only support matching by the full
2474                          * mask, return the mask to userspace
2475                          */
2476                         eth_broadcast_addr(fsp->m_u.ether_spec.h_source);
2477                 }
2478
2479                 return 0;
2480         }
2481         return -EINVAL;
2482 }
2483
2484 static int igb_get_ethtool_nfc_all(struct igb_adapter *adapter,
2485                                    struct ethtool_rxnfc *cmd,
2486                                    u32 *rule_locs)
2487 {
2488         struct igb_nfc_filter *rule;
2489         int cnt = 0;
2490
2491         /* report total rule count */
2492         cmd->data = IGB_MAX_RXNFC_FILTERS;
2493
2494         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2495                 if (cnt == cmd->rule_cnt)
2496                         return -EMSGSIZE;
2497                 rule_locs[cnt] = rule->sw_idx;
2498                 cnt++;
2499         }
2500
2501         cmd->rule_cnt = cnt;
2502
2503         return 0;
2504 }
2505
2506 static int igb_get_rss_hash_opts(struct igb_adapter *adapter,
2507                                  struct ethtool_rxnfc *cmd)
2508 {
2509         cmd->data = 0;
2510
2511         /* Report default options for RSS on igb */
2512         switch (cmd->flow_type) {
2513         case TCP_V4_FLOW:
2514                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2515                 fallthrough;
2516         case UDP_V4_FLOW:
2517                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2518                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2519                 fallthrough;
2520         case SCTP_V4_FLOW:
2521         case AH_ESP_V4_FLOW:
2522         case AH_V4_FLOW:
2523         case ESP_V4_FLOW:
2524         case IPV4_FLOW:
2525                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2526                 break;
2527         case TCP_V6_FLOW:
2528                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2529                 fallthrough;
2530         case UDP_V6_FLOW:
2531                 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2532                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2533                 fallthrough;
2534         case SCTP_V6_FLOW:
2535         case AH_ESP_V6_FLOW:
2536         case AH_V6_FLOW:
2537         case ESP_V6_FLOW:
2538         case IPV6_FLOW:
2539                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2540                 break;
2541         default:
2542                 return -EINVAL;
2543         }
2544
2545         return 0;
2546 }
2547
2548 static int igb_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2549                          u32 *rule_locs)
2550 {
2551         struct igb_adapter *adapter = netdev_priv(dev);
2552         int ret = -EOPNOTSUPP;
2553
2554         switch (cmd->cmd) {
2555         case ETHTOOL_GRXRINGS:
2556                 cmd->data = adapter->num_rx_queues;
2557                 ret = 0;
2558                 break;
2559         case ETHTOOL_GRXCLSRLCNT:
2560                 cmd->rule_cnt = adapter->nfc_filter_count;
2561                 ret = 0;
2562                 break;
2563         case ETHTOOL_GRXCLSRULE:
2564                 ret = igb_get_ethtool_nfc_entry(adapter, cmd);
2565                 break;
2566         case ETHTOOL_GRXCLSRLALL:
2567                 ret = igb_get_ethtool_nfc_all(adapter, cmd, rule_locs);
2568                 break;
2569         case ETHTOOL_GRXFH:
2570                 ret = igb_get_rss_hash_opts(adapter, cmd);
2571                 break;
2572         default:
2573                 break;
2574         }
2575
2576         return ret;
2577 }
2578
2579 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2580                        IGB_FLAG_RSS_FIELD_IPV6_UDP)
2581 static int igb_set_rss_hash_opt(struct igb_adapter *adapter,
2582                                 struct ethtool_rxnfc *nfc)
2583 {
2584         u32 flags = adapter->flags;
2585
2586         /* RSS does not support anything other than hashing
2587          * to queues on src and dst IPs and ports
2588          */
2589         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2590                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2591                 return -EINVAL;
2592
2593         switch (nfc->flow_type) {
2594         case TCP_V4_FLOW:
2595         case TCP_V6_FLOW:
2596                 if (!(nfc->data & RXH_IP_SRC) ||
2597                     !(nfc->data & RXH_IP_DST) ||
2598                     !(nfc->data & RXH_L4_B_0_1) ||
2599                     !(nfc->data & RXH_L4_B_2_3))
2600                         return -EINVAL;
2601                 break;
2602         case UDP_V4_FLOW:
2603                 if (!(nfc->data & RXH_IP_SRC) ||
2604                     !(nfc->data & RXH_IP_DST))
2605                         return -EINVAL;
2606                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2607                 case 0:
2608                         flags &= ~IGB_FLAG_RSS_FIELD_IPV4_UDP;
2609                         break;
2610                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2611                         flags |= IGB_FLAG_RSS_FIELD_IPV4_UDP;
2612                         break;
2613                 default:
2614                         return -EINVAL;
2615                 }
2616                 break;
2617         case UDP_V6_FLOW:
2618                 if (!(nfc->data & RXH_IP_SRC) ||
2619                     !(nfc->data & RXH_IP_DST))
2620                         return -EINVAL;
2621                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2622                 case 0:
2623                         flags &= ~IGB_FLAG_RSS_FIELD_IPV6_UDP;
2624                         break;
2625                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2626                         flags |= IGB_FLAG_RSS_FIELD_IPV6_UDP;
2627                         break;
2628                 default:
2629                         return -EINVAL;
2630                 }
2631                 break;
2632         case AH_ESP_V4_FLOW:
2633         case AH_V4_FLOW:
2634         case ESP_V4_FLOW:
2635         case SCTP_V4_FLOW:
2636         case AH_ESP_V6_FLOW:
2637         case AH_V6_FLOW:
2638         case ESP_V6_FLOW:
2639         case SCTP_V6_FLOW:
2640                 if (!(nfc->data & RXH_IP_SRC) ||
2641                     !(nfc->data & RXH_IP_DST) ||
2642                     (nfc->data & RXH_L4_B_0_1) ||
2643                     (nfc->data & RXH_L4_B_2_3))
2644                         return -EINVAL;
2645                 break;
2646         default:
2647                 return -EINVAL;
2648         }
2649
2650         /* if we changed something we need to update flags */
2651         if (flags != adapter->flags) {
2652                 struct e1000_hw *hw = &adapter->hw;
2653                 u32 mrqc = rd32(E1000_MRQC);
2654
2655                 if ((flags & UDP_RSS_FLAGS) &&
2656                     !(adapter->flags & UDP_RSS_FLAGS))
2657                         dev_err(&adapter->pdev->dev,
2658                                 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2659
2660                 adapter->flags = flags;
2661
2662                 /* Perform hash on these packet types */
2663                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4 |
2664                         E1000_MRQC_RSS_FIELD_IPV4_TCP |
2665                         E1000_MRQC_RSS_FIELD_IPV6 |
2666                         E1000_MRQC_RSS_FIELD_IPV6_TCP;
2667
2668                 mrqc &= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP |
2669                           E1000_MRQC_RSS_FIELD_IPV6_UDP);
2670
2671                 if (flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
2672                         mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
2673
2674                 if (flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
2675                         mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
2676
2677                 wr32(E1000_MRQC, mrqc);
2678         }
2679
2680         return 0;
2681 }
2682
2683 static int igb_rxnfc_write_etype_filter(struct igb_adapter *adapter,
2684                                         struct igb_nfc_filter *input)
2685 {
2686         struct e1000_hw *hw = &adapter->hw;
2687         u8 i;
2688         u32 etqf;
2689         u16 etype;
2690
2691         /* find an empty etype filter register */
2692         for (i = 0; i < MAX_ETYPE_FILTER; ++i) {
2693                 if (!adapter->etype_bitmap[i])
2694                         break;
2695         }
2696         if (i == MAX_ETYPE_FILTER) {
2697                 dev_err(&adapter->pdev->dev, "ethtool -N: etype filters are all used.\n");
2698                 return -EINVAL;
2699         }
2700
2701         adapter->etype_bitmap[i] = true;
2702
2703         etqf = rd32(E1000_ETQF(i));
2704         etype = ntohs(input->filter.etype & ETHER_TYPE_FULL_MASK);
2705
2706         etqf |= E1000_ETQF_FILTER_ENABLE;
2707         etqf &= ~E1000_ETQF_ETYPE_MASK;
2708         etqf |= (etype & E1000_ETQF_ETYPE_MASK);
2709
2710         etqf &= ~E1000_ETQF_QUEUE_MASK;
2711         etqf |= ((input->action << E1000_ETQF_QUEUE_SHIFT)
2712                 & E1000_ETQF_QUEUE_MASK);
2713         etqf |= E1000_ETQF_QUEUE_ENABLE;
2714
2715         wr32(E1000_ETQF(i), etqf);
2716
2717         input->etype_reg_index = i;
2718
2719         return 0;
2720 }
2721
2722 static int igb_rxnfc_write_vlan_prio_filter(struct igb_adapter *adapter,
2723                                             struct igb_nfc_filter *input)
2724 {
2725         struct e1000_hw *hw = &adapter->hw;
2726         u8 vlan_priority;
2727         u16 queue_index;
2728         u32 vlapqf;
2729
2730         vlapqf = rd32(E1000_VLAPQF);
2731         vlan_priority = (ntohs(input->filter.vlan_tci) & VLAN_PRIO_MASK)
2732                                 >> VLAN_PRIO_SHIFT;
2733         queue_index = (vlapqf >> (vlan_priority * 4)) & E1000_VLAPQF_QUEUE_MASK;
2734
2735         /* check whether this vlan prio is already set */
2736         if ((vlapqf & E1000_VLAPQF_P_VALID(vlan_priority)) &&
2737             (queue_index != input->action)) {
2738                 dev_err(&adapter->pdev->dev, "ethtool rxnfc set vlan prio filter failed.\n");
2739                 return -EEXIST;
2740         }
2741
2742         vlapqf |= E1000_VLAPQF_P_VALID(vlan_priority);
2743         vlapqf |= E1000_VLAPQF_QUEUE_SEL(vlan_priority, input->action);
2744
2745         wr32(E1000_VLAPQF, vlapqf);
2746
2747         return 0;
2748 }
2749
2750 int igb_add_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2751 {
2752         struct e1000_hw *hw = &adapter->hw;
2753         int err = -EINVAL;
2754
2755         if (hw->mac.type == e1000_i210 &&
2756             !(input->filter.match_flags & ~IGB_FILTER_FLAG_SRC_MAC_ADDR)) {
2757                 dev_err(&adapter->pdev->dev,
2758                         "i210 doesn't support flow classification rules specifying only source addresses.\n");
2759                 return -EOPNOTSUPP;
2760         }
2761
2762         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE) {
2763                 err = igb_rxnfc_write_etype_filter(adapter, input);
2764                 if (err)
2765                         return err;
2766         }
2767
2768         if (input->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR) {
2769                 err = igb_add_mac_steering_filter(adapter,
2770                                                   input->filter.dst_addr,
2771                                                   input->action, 0);
2772                 err = min_t(int, err, 0);
2773                 if (err)
2774                         return err;
2775         }
2776
2777         if (input->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR) {
2778                 err = igb_add_mac_steering_filter(adapter,
2779                                                   input->filter.src_addr,
2780                                                   input->action,
2781                                                   IGB_MAC_STATE_SRC_ADDR);
2782                 err = min_t(int, err, 0);
2783                 if (err)
2784                         return err;
2785         }
2786
2787         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2788                 err = igb_rxnfc_write_vlan_prio_filter(adapter, input);
2789
2790         return err;
2791 }
2792
2793 static void igb_clear_etype_filter_regs(struct igb_adapter *adapter,
2794                                         u16 reg_index)
2795 {
2796         struct e1000_hw *hw = &adapter->hw;
2797         u32 etqf = rd32(E1000_ETQF(reg_index));
2798
2799         etqf &= ~E1000_ETQF_QUEUE_ENABLE;
2800         etqf &= ~E1000_ETQF_QUEUE_MASK;
2801         etqf &= ~E1000_ETQF_FILTER_ENABLE;
2802
2803         wr32(E1000_ETQF(reg_index), etqf);
2804
2805         adapter->etype_bitmap[reg_index] = false;
2806 }
2807
2808 static void igb_clear_vlan_prio_filter(struct igb_adapter *adapter,
2809                                        u16 vlan_tci)
2810 {
2811         struct e1000_hw *hw = &adapter->hw;
2812         u8 vlan_priority;
2813         u32 vlapqf;
2814
2815         vlan_priority = (vlan_tci & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
2816
2817         vlapqf = rd32(E1000_VLAPQF);
2818         vlapqf &= ~E1000_VLAPQF_P_VALID(vlan_priority);
2819         vlapqf &= ~E1000_VLAPQF_QUEUE_SEL(vlan_priority,
2820                                                 E1000_VLAPQF_QUEUE_MASK);
2821
2822         wr32(E1000_VLAPQF, vlapqf);
2823 }
2824
2825 int igb_erase_filter(struct igb_adapter *adapter, struct igb_nfc_filter *input)
2826 {
2827         if (input->filter.match_flags & IGB_FILTER_FLAG_ETHER_TYPE)
2828                 igb_clear_etype_filter_regs(adapter,
2829                                             input->etype_reg_index);
2830
2831         if (input->filter.match_flags & IGB_FILTER_FLAG_VLAN_TCI)
2832                 igb_clear_vlan_prio_filter(adapter,
2833                                            ntohs(input->filter.vlan_tci));
2834
2835         if (input->filter.match_flags & IGB_FILTER_FLAG_SRC_MAC_ADDR)
2836                 igb_del_mac_steering_filter(adapter, input->filter.src_addr,
2837                                             input->action,
2838                                             IGB_MAC_STATE_SRC_ADDR);
2839
2840         if (input->filter.match_flags & IGB_FILTER_FLAG_DST_MAC_ADDR)
2841                 igb_del_mac_steering_filter(adapter, input->filter.dst_addr,
2842                                             input->action, 0);
2843
2844         return 0;
2845 }
2846
2847 static int igb_update_ethtool_nfc_entry(struct igb_adapter *adapter,
2848                                         struct igb_nfc_filter *input,
2849                                         u16 sw_idx)
2850 {
2851         struct igb_nfc_filter *rule, *parent;
2852         int err = -EINVAL;
2853
2854         parent = NULL;
2855         rule = NULL;
2856
2857         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2858                 /* hash found, or no matching entry */
2859                 if (rule->sw_idx >= sw_idx)
2860                         break;
2861                 parent = rule;
2862         }
2863
2864         /* if there is an old rule occupying our place remove it */
2865         if (rule && (rule->sw_idx == sw_idx)) {
2866                 if (!input)
2867                         err = igb_erase_filter(adapter, rule);
2868
2869                 hlist_del(&rule->nfc_node);
2870                 kfree(rule);
2871                 adapter->nfc_filter_count--;
2872         }
2873
2874         /* If no input this was a delete, err should be 0 if a rule was
2875          * successfully found and removed from the list else -EINVAL
2876          */
2877         if (!input)
2878                 return err;
2879
2880         /* initialize node */
2881         INIT_HLIST_NODE(&input->nfc_node);
2882
2883         /* add filter to the list */
2884         if (parent)
2885                 hlist_add_behind(&input->nfc_node, &parent->nfc_node);
2886         else
2887                 hlist_add_head(&input->nfc_node, &adapter->nfc_filter_list);
2888
2889         /* update counts */
2890         adapter->nfc_filter_count++;
2891
2892         return 0;
2893 }
2894
2895 static int igb_add_ethtool_nfc_entry(struct igb_adapter *adapter,
2896                                      struct ethtool_rxnfc *cmd)
2897 {
2898         struct net_device *netdev = adapter->netdev;
2899         struct ethtool_rx_flow_spec *fsp =
2900                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2901         struct igb_nfc_filter *input, *rule;
2902         int err = 0;
2903
2904         if (!(netdev->hw_features & NETIF_F_NTUPLE))
2905                 return -EOPNOTSUPP;
2906
2907         /* Don't allow programming if the action is a queue greater than
2908          * the number of online Rx queues.
2909          */
2910         if ((fsp->ring_cookie == RX_CLS_FLOW_DISC) ||
2911             (fsp->ring_cookie >= adapter->num_rx_queues)) {
2912                 dev_err(&adapter->pdev->dev, "ethtool -N: The specified action is invalid\n");
2913                 return -EINVAL;
2914         }
2915
2916         /* Don't allow indexes to exist outside of available space */
2917         if (fsp->location >= IGB_MAX_RXNFC_FILTERS) {
2918                 dev_err(&adapter->pdev->dev, "Location out of range\n");
2919                 return -EINVAL;
2920         }
2921
2922         if ((fsp->flow_type & ~FLOW_EXT) != ETHER_FLOW)
2923                 return -EINVAL;
2924
2925         input = kzalloc(sizeof(*input), GFP_KERNEL);
2926         if (!input)
2927                 return -ENOMEM;
2928
2929         if (fsp->m_u.ether_spec.h_proto == ETHER_TYPE_FULL_MASK) {
2930                 input->filter.etype = fsp->h_u.ether_spec.h_proto;
2931                 input->filter.match_flags = IGB_FILTER_FLAG_ETHER_TYPE;
2932         }
2933
2934         /* Only support matching addresses by the full mask */
2935         if (is_broadcast_ether_addr(fsp->m_u.ether_spec.h_source)) {
2936                 input->filter.match_flags |= IGB_FILTER_FLAG_SRC_MAC_ADDR;
2937                 ether_addr_copy(input->filter.src_addr,
2938                                 fsp->h_u.ether_spec.h_source);
2939         }
2940
2941         /* Only support matching addresses by the full mask */
2942         if (is_broadcast_ether_addr(fsp->m_u.ether_spec.h_dest)) {
2943                 input->filter.match_flags |= IGB_FILTER_FLAG_DST_MAC_ADDR;
2944                 ether_addr_copy(input->filter.dst_addr,
2945                                 fsp->h_u.ether_spec.h_dest);
2946         }
2947
2948         if ((fsp->flow_type & FLOW_EXT) && fsp->m_ext.vlan_tci) {
2949                 if (fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
2950                         err = -EINVAL;
2951                         goto err_out;
2952                 }
2953                 input->filter.vlan_tci = fsp->h_ext.vlan_tci;
2954                 input->filter.match_flags |= IGB_FILTER_FLAG_VLAN_TCI;
2955         }
2956
2957         input->action = fsp->ring_cookie;
2958         input->sw_idx = fsp->location;
2959
2960         spin_lock(&adapter->nfc_lock);
2961
2962         hlist_for_each_entry(rule, &adapter->nfc_filter_list, nfc_node) {
2963                 if (!memcmp(&input->filter, &rule->filter,
2964                             sizeof(input->filter))) {
2965                         err = -EEXIST;
2966                         dev_err(&adapter->pdev->dev,
2967                                 "ethtool: this filter is already set\n");
2968                         goto err_out_w_lock;
2969                 }
2970         }
2971
2972         err = igb_add_filter(adapter, input);
2973         if (err)
2974                 goto err_out_w_lock;
2975
2976         igb_update_ethtool_nfc_entry(adapter, input, input->sw_idx);
2977
2978         spin_unlock(&adapter->nfc_lock);
2979         return 0;
2980
2981 err_out_w_lock:
2982         spin_unlock(&adapter->nfc_lock);
2983 err_out:
2984         kfree(input);
2985         return err;
2986 }
2987
2988 static int igb_del_ethtool_nfc_entry(struct igb_adapter *adapter,
2989                                      struct ethtool_rxnfc *cmd)
2990 {
2991         struct ethtool_rx_flow_spec *fsp =
2992                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2993         int err;
2994
2995         spin_lock(&adapter->nfc_lock);
2996         err = igb_update_ethtool_nfc_entry(adapter, NULL, fsp->location);
2997         spin_unlock(&adapter->nfc_lock);
2998
2999         return err;
3000 }
3001
3002 static int igb_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3003 {
3004         struct igb_adapter *adapter = netdev_priv(dev);
3005         int ret = -EOPNOTSUPP;
3006
3007         switch (cmd->cmd) {
3008         case ETHTOOL_SRXFH:
3009                 ret = igb_set_rss_hash_opt(adapter, cmd);
3010                 break;
3011         case ETHTOOL_SRXCLSRLINS:
3012                 ret = igb_add_ethtool_nfc_entry(adapter, cmd);
3013                 break;
3014         case ETHTOOL_SRXCLSRLDEL:
3015                 ret = igb_del_ethtool_nfc_entry(adapter, cmd);
3016                 break;
3017         default:
3018                 break;
3019         }
3020
3021         return ret;
3022 }
3023
3024 static int igb_get_eee(struct net_device *netdev, struct ethtool_eee *edata)
3025 {
3026         struct igb_adapter *adapter = netdev_priv(netdev);
3027         struct e1000_hw *hw = &adapter->hw;
3028         u32 ret_val;
3029         u16 phy_data;
3030
3031         if ((hw->mac.type < e1000_i350) ||
3032             (hw->phy.media_type != e1000_media_type_copper))
3033                 return -EOPNOTSUPP;
3034
3035         edata->supported = (SUPPORTED_1000baseT_Full |
3036                             SUPPORTED_100baseT_Full);
3037         if (!hw->dev_spec._82575.eee_disable)
3038                 edata->advertised =
3039                         mmd_eee_adv_to_ethtool_adv_t(adapter->eee_advert);
3040
3041         /* The IPCNFG and EEER registers are not supported on I354. */
3042         if (hw->mac.type == e1000_i354) {
3043                 igb_get_eee_status_i354(hw, (bool *)&edata->eee_active);
3044         } else {
3045                 u32 eeer;
3046
3047                 eeer = rd32(E1000_EEER);
3048
3049                 /* EEE status on negotiated link */
3050                 if (eeer & E1000_EEER_EEE_NEG)
3051                         edata->eee_active = true;
3052
3053                 if (eeer & E1000_EEER_TX_LPI_EN)
3054                         edata->tx_lpi_enabled = true;
3055         }
3056
3057         /* EEE Link Partner Advertised */
3058         switch (hw->mac.type) {
3059         case e1000_i350:
3060                 ret_val = igb_read_emi_reg(hw, E1000_EEE_LP_ADV_ADDR_I350,
3061                                            &phy_data);
3062                 if (ret_val)
3063                         return -ENODATA;
3064
3065                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3066                 break;
3067         case e1000_i354:
3068         case e1000_i210:
3069         case e1000_i211:
3070                 ret_val = igb_read_xmdio_reg(hw, E1000_EEE_LP_ADV_ADDR_I210,
3071                                              E1000_EEE_LP_ADV_DEV_I210,
3072                                              &phy_data);
3073                 if (ret_val)
3074                         return -ENODATA;
3075
3076                 edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);
3077
3078                 break;
3079         default:
3080                 break;
3081         }
3082
3083         edata->eee_enabled = !hw->dev_spec._82575.eee_disable;
3084
3085         if ((hw->mac.type == e1000_i354) &&
3086             (edata->eee_enabled))
3087                 edata->tx_lpi_enabled = true;
3088
3089         /* Report correct negotiated EEE status for devices that
3090          * wrongly report EEE at half-duplex
3091          */
3092         if (adapter->link_duplex == HALF_DUPLEX) {
3093                 edata->eee_enabled = false;
3094                 edata->eee_active = false;
3095                 edata->tx_lpi_enabled = false;
3096                 edata->advertised &= ~edata->advertised;
3097         }
3098
3099         return 0;
3100 }
3101
3102 static int igb_set_eee(struct net_device *netdev,
3103                        struct ethtool_eee *edata)
3104 {
3105         struct igb_adapter *adapter = netdev_priv(netdev);
3106         struct e1000_hw *hw = &adapter->hw;
3107         struct ethtool_eee eee_curr;
3108         bool adv1g_eee = true, adv100m_eee = true;
3109         s32 ret_val;
3110
3111         if ((hw->mac.type < e1000_i350) ||
3112             (hw->phy.media_type != e1000_media_type_copper))
3113                 return -EOPNOTSUPP;
3114
3115         memset(&eee_curr, 0, sizeof(struct ethtool_eee));
3116
3117         ret_val = igb_get_eee(netdev, &eee_curr);
3118         if (ret_val)
3119                 return ret_val;
3120
3121         if (eee_curr.eee_enabled) {
3122                 if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
3123                         dev_err(&adapter->pdev->dev,
3124                                 "Setting EEE tx-lpi is not supported\n");
3125                         return -EINVAL;
3126                 }
3127
3128                 /* Tx LPI timer is not implemented currently */
3129                 if (edata->tx_lpi_timer) {
3130                         dev_err(&adapter->pdev->dev,
3131                                 "Setting EEE Tx LPI timer is not supported\n");
3132                         return -EINVAL;
3133                 }
3134
3135                 if (!edata->advertised || (edata->advertised &
3136                     ~(ADVERTISE_100_FULL | ADVERTISE_1000_FULL))) {
3137                         dev_err(&adapter->pdev->dev,
3138                                 "EEE Advertisement supports only 100Tx and/or 100T full duplex\n");
3139                         return -EINVAL;
3140                 }
3141                 adv100m_eee = !!(edata->advertised & ADVERTISE_100_FULL);
3142                 adv1g_eee = !!(edata->advertised & ADVERTISE_1000_FULL);
3143
3144         } else if (!edata->eee_enabled) {
3145                 dev_err(&adapter->pdev->dev,
3146                         "Setting EEE options are not supported with EEE disabled\n");
3147                 return -EINVAL;
3148         }
3149
3150         adapter->eee_advert = ethtool_adv_to_mmd_eee_adv_t(edata->advertised);
3151         if (hw->dev_spec._82575.eee_disable != !edata->eee_enabled) {
3152                 hw->dev_spec._82575.eee_disable = !edata->eee_enabled;
3153                 adapter->flags |= IGB_FLAG_EEE;
3154
3155                 /* reset link */
3156                 if (netif_running(netdev))
3157                         igb_reinit_locked(adapter);
3158                 else
3159                         igb_reset(adapter);
3160         }
3161
3162         if (hw->mac.type == e1000_i354)
3163                 ret_val = igb_set_eee_i354(hw, adv1g_eee, adv100m_eee);
3164         else
3165                 ret_val = igb_set_eee_i350(hw, adv1g_eee, adv100m_eee);
3166
3167         if (ret_val) {
3168                 dev_err(&adapter->pdev->dev,
3169                         "Problem setting EEE advertisement options\n");
3170                 return -EINVAL;
3171         }
3172
3173         return 0;
3174 }
3175
3176 static int igb_get_module_info(struct net_device *netdev,
3177                                struct ethtool_modinfo *modinfo)
3178 {
3179         struct igb_adapter *adapter = netdev_priv(netdev);
3180         struct e1000_hw *hw = &adapter->hw;
3181         u32 status = 0;
3182         u16 sff8472_rev, addr_mode;
3183         bool page_swap = false;
3184
3185         if ((hw->phy.media_type == e1000_media_type_copper) ||
3186             (hw->phy.media_type == e1000_media_type_unknown))
3187                 return -EOPNOTSUPP;
3188
3189         /* Check whether we support SFF-8472 or not */
3190         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_COMP, &sff8472_rev);
3191         if (status)
3192                 return -EIO;
3193
3194         /* addressing mode is not supported */
3195         status = igb_read_phy_reg_i2c(hw, IGB_SFF_8472_SWAP, &addr_mode);
3196         if (status)
3197                 return -EIO;
3198
3199         /* addressing mode is not supported */
3200         if ((addr_mode & 0xFF) & IGB_SFF_ADDRESSING_MODE) {
3201                 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3202                 page_swap = true;
3203         }
3204
3205         if ((sff8472_rev & 0xFF) == IGB_SFF_8472_UNSUP || page_swap) {
3206                 /* We have an SFP, but it does not support SFF-8472 */
3207                 modinfo->type = ETH_MODULE_SFF_8079;
3208                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3209         } else {
3210                 /* We have an SFP which supports a revision of SFF-8472 */
3211                 modinfo->type = ETH_MODULE_SFF_8472;
3212                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3213         }
3214
3215         return 0;
3216 }
3217
3218 static int igb_get_module_eeprom(struct net_device *netdev,
3219                                  struct ethtool_eeprom *ee, u8 *data)
3220 {
3221         struct igb_adapter *adapter = netdev_priv(netdev);
3222         struct e1000_hw *hw = &adapter->hw;
3223         u32 status = 0;
3224         u16 *dataword;
3225         u16 first_word, last_word;
3226         int i = 0;
3227
3228         if (ee->len == 0)
3229                 return -EINVAL;
3230
3231         first_word = ee->offset >> 1;
3232         last_word = (ee->offset + ee->len - 1) >> 1;
3233
3234         dataword = kmalloc_array(last_word - first_word + 1, sizeof(u16),
3235                                  GFP_KERNEL);
3236         if (!dataword)
3237                 return -ENOMEM;
3238
3239         /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
3240         for (i = 0; i < last_word - first_word + 1; i++) {
3241                 status = igb_read_phy_reg_i2c(hw, (first_word + i) * 2,
3242                                               &dataword[i]);
3243                 if (status) {
3244                         /* Error occurred while reading module */
3245                         kfree(dataword);
3246                         return -EIO;
3247                 }
3248
3249                 be16_to_cpus(&dataword[i]);
3250         }
3251
3252         memcpy(data, (u8 *)dataword + (ee->offset & 1), ee->len);
3253         kfree(dataword);
3254
3255         return 0;
3256 }
3257
3258 static int igb_ethtool_begin(struct net_device *netdev)
3259 {
3260         struct igb_adapter *adapter = netdev_priv(netdev);
3261         pm_runtime_get_sync(&adapter->pdev->dev);
3262         return 0;
3263 }
3264
3265 static void igb_ethtool_complete(struct net_device *netdev)
3266 {
3267         struct igb_adapter *adapter = netdev_priv(netdev);
3268         pm_runtime_put(&adapter->pdev->dev);
3269 }
3270
3271 static u32 igb_get_rxfh_indir_size(struct net_device *netdev)
3272 {
3273         return IGB_RETA_SIZE;
3274 }
3275
3276 static int igb_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3277                         u8 *hfunc)
3278 {
3279         struct igb_adapter *adapter = netdev_priv(netdev);
3280         int i;
3281
3282         if (hfunc)
3283                 *hfunc = ETH_RSS_HASH_TOP;
3284         if (!indir)
3285                 return 0;
3286         for (i = 0; i < IGB_RETA_SIZE; i++)
3287                 indir[i] = adapter->rss_indir_tbl[i];
3288
3289         return 0;
3290 }
3291
3292 void igb_write_rss_indir_tbl(struct igb_adapter *adapter)
3293 {
3294         struct e1000_hw *hw = &adapter->hw;
3295         u32 reg = E1000_RETA(0);
3296         u32 shift = 0;
3297         int i = 0;
3298
3299         switch (hw->mac.type) {
3300         case e1000_82575:
3301                 shift = 6;
3302                 break;
3303         case e1000_82576:
3304                 /* 82576 supports 2 RSS queues for SR-IOV */
3305                 if (adapter->vfs_allocated_count)
3306                         shift = 3;
3307                 break;
3308         default:
3309                 break;
3310         }
3311
3312         while (i < IGB_RETA_SIZE) {
3313                 u32 val = 0;
3314                 int j;
3315
3316                 for (j = 3; j >= 0; j--) {
3317                         val <<= 8;
3318                         val |= adapter->rss_indir_tbl[i + j];
3319                 }
3320
3321                 wr32(reg, val << shift);
3322                 reg += 4;
3323                 i += 4;
3324         }
3325 }
3326
3327 static int igb_set_rxfh(struct net_device *netdev, const u32 *indir,
3328                         const u8 *key, const u8 hfunc)
3329 {
3330         struct igb_adapter *adapter = netdev_priv(netdev);
3331         struct e1000_hw *hw = &adapter->hw;
3332         int i;
3333         u32 num_queues;
3334
3335         /* We do not allow change in unsupported parameters */
3336         if (key ||
3337             (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP))
3338                 return -EOPNOTSUPP;
3339         if (!indir)
3340                 return 0;
3341
3342         num_queues = adapter->rss_queues;
3343
3344         switch (hw->mac.type) {
3345         case e1000_82576:
3346                 /* 82576 supports 2 RSS queues for SR-IOV */
3347                 if (adapter->vfs_allocated_count)
3348                         num_queues = 2;
3349                 break;
3350         default:
3351                 break;
3352         }
3353
3354         /* Verify user input. */
3355         for (i = 0; i < IGB_RETA_SIZE; i++)
3356                 if (indir[i] >= num_queues)
3357                         return -EINVAL;
3358
3359
3360         for (i = 0; i < IGB_RETA_SIZE; i++)
3361                 adapter->rss_indir_tbl[i] = indir[i];
3362
3363         igb_write_rss_indir_tbl(adapter);
3364
3365         return 0;
3366 }
3367
3368 static unsigned int igb_max_channels(struct igb_adapter *adapter)
3369 {
3370         return igb_get_max_rss_queues(adapter);
3371 }
3372
3373 static void igb_get_channels(struct net_device *netdev,
3374                              struct ethtool_channels *ch)
3375 {
3376         struct igb_adapter *adapter = netdev_priv(netdev);
3377
3378         /* Report maximum channels */
3379         ch->max_combined = igb_max_channels(adapter);
3380
3381         /* Report info for other vector */
3382         if (adapter->flags & IGB_FLAG_HAS_MSIX) {
3383                 ch->max_other = NON_Q_VECTORS;
3384                 ch->other_count = NON_Q_VECTORS;
3385         }
3386
3387         ch->combined_count = adapter->rss_queues;
3388 }
3389
3390 static int igb_set_channels(struct net_device *netdev,
3391                             struct ethtool_channels *ch)
3392 {
3393         struct igb_adapter *adapter = netdev_priv(netdev);
3394         unsigned int count = ch->combined_count;
3395         unsigned int max_combined = 0;
3396
3397         /* Verify they are not requesting separate vectors */
3398         if (!count || ch->rx_count || ch->tx_count)
3399                 return -EINVAL;
3400
3401         /* Verify other_count is valid and has not been changed */
3402         if (ch->other_count != NON_Q_VECTORS)
3403                 return -EINVAL;
3404
3405         /* Verify the number of channels doesn't exceed hw limits */
3406         max_combined = igb_max_channels(adapter);
3407         if (count > max_combined)
3408                 return -EINVAL;
3409
3410         if (count != adapter->rss_queues) {
3411                 adapter->rss_queues = count;
3412                 igb_set_flag_queue_pairs(adapter, max_combined);
3413
3414                 /* Hardware has to reinitialize queues and interrupts to
3415                  * match the new configuration.
3416                  */
3417                 return igb_reinit_queues(adapter);
3418         }
3419
3420         return 0;
3421 }
3422
3423 static u32 igb_get_priv_flags(struct net_device *netdev)
3424 {
3425         struct igb_adapter *adapter = netdev_priv(netdev);
3426         u32 priv_flags = 0;
3427
3428         if (adapter->flags & IGB_FLAG_RX_LEGACY)
3429                 priv_flags |= IGB_PRIV_FLAGS_LEGACY_RX;
3430
3431         return priv_flags;
3432 }
3433
3434 static int igb_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3435 {
3436         struct igb_adapter *adapter = netdev_priv(netdev);
3437         unsigned int flags = adapter->flags;
3438
3439         flags &= ~IGB_FLAG_RX_LEGACY;
3440         if (priv_flags & IGB_PRIV_FLAGS_LEGACY_RX)
3441                 flags |= IGB_FLAG_RX_LEGACY;
3442
3443         if (flags != adapter->flags) {
3444                 adapter->flags = flags;
3445
3446                 /* reset interface to repopulate queues */
3447                 if (netif_running(netdev))
3448                         igb_reinit_locked(adapter);
3449         }
3450
3451         return 0;
3452 }
3453
3454 static const struct ethtool_ops igb_ethtool_ops = {
3455         .supported_coalesce_params = ETHTOOL_COALESCE_USECS,
3456         .get_drvinfo            = igb_get_drvinfo,
3457         .get_regs_len           = igb_get_regs_len,
3458         .get_regs               = igb_get_regs,
3459         .get_wol                = igb_get_wol,
3460         .set_wol                = igb_set_wol,
3461         .get_msglevel           = igb_get_msglevel,
3462         .set_msglevel           = igb_set_msglevel,
3463         .nway_reset             = igb_nway_reset,
3464         .get_link               = igb_get_link,
3465         .get_eeprom_len         = igb_get_eeprom_len,
3466         .get_eeprom             = igb_get_eeprom,
3467         .set_eeprom             = igb_set_eeprom,
3468         .get_ringparam          = igb_get_ringparam,
3469         .set_ringparam          = igb_set_ringparam,
3470         .get_pauseparam         = igb_get_pauseparam,
3471         .set_pauseparam         = igb_set_pauseparam,
3472         .self_test              = igb_diag_test,
3473         .get_strings            = igb_get_strings,
3474         .set_phys_id            = igb_set_phys_id,
3475         .get_sset_count         = igb_get_sset_count,
3476         .get_ethtool_stats      = igb_get_ethtool_stats,
3477         .get_coalesce           = igb_get_coalesce,
3478         .set_coalesce           = igb_set_coalesce,
3479         .get_ts_info            = igb_get_ts_info,
3480         .get_rxnfc              = igb_get_rxnfc,
3481         .set_rxnfc              = igb_set_rxnfc,
3482         .get_eee                = igb_get_eee,
3483         .set_eee                = igb_set_eee,
3484         .get_module_info        = igb_get_module_info,
3485         .get_module_eeprom      = igb_get_module_eeprom,
3486         .get_rxfh_indir_size    = igb_get_rxfh_indir_size,
3487         .get_rxfh               = igb_get_rxfh,
3488         .set_rxfh               = igb_set_rxfh,
3489         .get_channels           = igb_get_channels,
3490         .set_channels           = igb_set_channels,
3491         .get_priv_flags         = igb_get_priv_flags,
3492         .set_priv_flags         = igb_set_priv_flags,
3493         .begin                  = igb_ethtool_begin,
3494         .complete               = igb_ethtool_complete,
3495         .get_link_ksettings     = igb_get_link_ksettings,
3496         .set_link_ksettings     = igb_set_link_ksettings,
3497 };
3498
3499 void igb_set_ethtool_ops(struct net_device *netdev)
3500 {
3501         netdev->ethtool_ops = &igb_ethtool_ops;
3502 }