1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
34 #include <linux/netdevice.h>
36 #include "e1000_regs.h"
37 #include "e1000_defines.h"
41 #define E1000_DEV_ID_82576 0x10C9
42 #define E1000_DEV_ID_82576_FIBER 0x10E6
43 #define E1000_DEV_ID_82576_SERDES 0x10E7
44 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
45 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
46 #define E1000_DEV_ID_82576_NS 0x150A
47 #define E1000_DEV_ID_82576_NS_SERDES 0x1518
48 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
49 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
50 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
51 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
52 #define E1000_DEV_ID_82580_COPPER 0x150E
53 #define E1000_DEV_ID_82580_FIBER 0x150F
54 #define E1000_DEV_ID_82580_SERDES 0x1510
55 #define E1000_DEV_ID_82580_SGMII 0x1511
56 #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
57 #define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
58 #define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
59 #define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
60 #define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
61 #define E1000_DEV_ID_DH89XXCC_SFP 0x0440
62 #define E1000_DEV_ID_I350_COPPER 0x1521
63 #define E1000_DEV_ID_I350_FIBER 0x1522
64 #define E1000_DEV_ID_I350_SERDES 0x1523
65 #define E1000_DEV_ID_I350_SGMII 0x1524
66 #define E1000_DEV_ID_I210_COPPER 0x1533
67 #define E1000_DEV_ID_I210_FIBER 0x1536
68 #define E1000_DEV_ID_I210_SERDES 0x1537
69 #define E1000_DEV_ID_I210_SGMII 0x1538
70 #define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B
71 #define E1000_DEV_ID_I210_SERDES_FLASHLESS 0x157C
72 #define E1000_DEV_ID_I211_COPPER 0x1539
73 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40
74 #define E1000_DEV_ID_I354_SGMII 0x1F41
75 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS 0x1F45
77 #define E1000_REVISION_2 2
78 #define E1000_REVISION_4 4
80 #define E1000_FUNC_0 0
81 #define E1000_FUNC_1 1
82 #define E1000_FUNC_2 2
83 #define E1000_FUNC_3 3
85 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0
86 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3
87 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6
88 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9
99 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
102 enum e1000_media_type {
103 e1000_media_type_unknown = 0,
104 e1000_media_type_copper = 1,
105 e1000_media_type_fiber = 2,
106 e1000_media_type_internal_serdes = 3,
107 e1000_num_media_types
110 enum e1000_nvm_type {
111 e1000_nvm_unknown = 0,
113 e1000_nvm_eeprom_spi,
119 enum e1000_nvm_override {
120 e1000_nvm_override_none = 0,
121 e1000_nvm_override_spi_small,
122 e1000_nvm_override_spi_large,
125 enum e1000_phy_type {
126 e1000_phy_unknown = 0,
138 enum e1000_bus_type {
139 e1000_bus_type_unknown = 0,
142 e1000_bus_type_pci_express,
143 e1000_bus_type_reserved
146 enum e1000_bus_speed {
147 e1000_bus_speed_unknown = 0,
153 e1000_bus_speed_2500,
154 e1000_bus_speed_5000,
155 e1000_bus_speed_reserved
158 enum e1000_bus_width {
159 e1000_bus_width_unknown = 0,
160 e1000_bus_width_pcie_x1,
161 e1000_bus_width_pcie_x2,
162 e1000_bus_width_pcie_x4 = 4,
163 e1000_bus_width_pcie_x8 = 8,
166 e1000_bus_width_reserved
169 enum e1000_1000t_rx_status {
170 e1000_1000t_rx_status_not_ok = 0,
171 e1000_1000t_rx_status_ok,
172 e1000_1000t_rx_status_undefined = 0xFF
175 enum e1000_rev_polarity {
176 e1000_rev_polarity_normal = 0,
177 e1000_rev_polarity_reversed,
178 e1000_rev_polarity_undefined = 0xFF
186 e1000_fc_default = 0xFF
189 /* Statistics counters collected by the MAC */
190 struct e1000_hw_stats {
273 struct e1000_phy_stats {
278 struct e1000_host_mng_dhcp_cookie {
289 /* Host Interface "Rev 1" */
290 struct e1000_host_command_header {
297 #define E1000_HI_MAX_DATA_LENGTH 252
298 struct e1000_host_command_info {
299 struct e1000_host_command_header command_header;
300 u8 command_data[E1000_HI_MAX_DATA_LENGTH];
303 /* Host Interface "Rev 2" */
304 struct e1000_host_mng_command_header {
312 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
313 struct e1000_host_mng_command_info {
314 struct e1000_host_mng_command_header command_header;
315 u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
318 #include "e1000_mac.h"
319 #include "e1000_phy.h"
320 #include "e1000_nvm.h"
321 #include "e1000_mbx.h"
323 struct e1000_mac_operations {
324 s32 (*check_for_link)(struct e1000_hw *);
325 s32 (*reset_hw)(struct e1000_hw *);
326 s32 (*init_hw)(struct e1000_hw *);
327 bool (*check_mng_mode)(struct e1000_hw *);
328 s32 (*setup_physical_interface)(struct e1000_hw *);
329 void (*rar_set)(struct e1000_hw *, u8 *, u32);
330 s32 (*read_mac_addr)(struct e1000_hw *);
331 s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
332 s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
333 void (*release_swfw_sync)(struct e1000_hw *, u16);
334 #ifdef CONFIG_IGB_HWMON
335 s32 (*get_thermal_sensor_data)(struct e1000_hw *);
336 s32 (*init_thermal_sensor_thresh)(struct e1000_hw *);
341 struct e1000_phy_operations {
342 s32 (*acquire)(struct e1000_hw *);
343 s32 (*check_polarity)(struct e1000_hw *);
344 s32 (*check_reset_block)(struct e1000_hw *);
345 s32 (*force_speed_duplex)(struct e1000_hw *);
346 s32 (*get_cfg_done)(struct e1000_hw *hw);
347 s32 (*get_cable_length)(struct e1000_hw *);
348 s32 (*get_phy_info)(struct e1000_hw *);
349 s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
350 void (*release)(struct e1000_hw *);
351 s32 (*reset)(struct e1000_hw *);
352 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
353 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
354 s32 (*write_reg)(struct e1000_hw *, u32, u16);
355 s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *);
356 s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8);
359 struct e1000_nvm_operations {
360 s32 (*acquire)(struct e1000_hw *);
361 s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
362 void (*release)(struct e1000_hw *);
363 s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
364 s32 (*update)(struct e1000_hw *);
365 s32 (*validate)(struct e1000_hw *);
366 s32 (*valid_led_default)(struct e1000_hw *, u16 *);
369 #define E1000_MAX_SENSORS 3
371 struct e1000_thermal_diode_data {
378 struct e1000_thermal_sensor_data {
379 struct e1000_thermal_diode_data sensor[E1000_MAX_SENSORS];
383 s32 (*get_invariants)(struct e1000_hw *);
384 struct e1000_mac_operations *mac_ops;
385 struct e1000_phy_operations *phy_ops;
386 struct e1000_nvm_operations *nvm_ops;
389 extern const struct e1000_info e1000_82575_info;
391 struct e1000_mac_info {
392 struct e1000_mac_operations ops;
397 enum e1000_mac_type type;
408 /* Maximum size of the MTA register table in all supported adapters */
409 #define MAX_MTA_REG 128
410 u32 mta_shadow[MAX_MTA_REG];
413 u8 forced_speed_duplex;
416 bool arc_subsystem_valid;
417 bool asf_firmware_present;
420 bool disable_hw_init_bits;
421 bool get_link_status;
422 bool ifs_params_forced;
424 bool report_tx_early;
425 bool serdes_has_link;
426 bool tx_pkt_filtering;
427 struct e1000_thermal_sensor_data thermal_sensor_data;
430 struct e1000_phy_info {
431 struct e1000_phy_operations ops;
433 enum e1000_phy_type type;
435 enum e1000_1000t_rx_status local_rx;
436 enum e1000_1000t_rx_status remote_rx;
437 enum e1000_ms_type ms_type;
438 enum e1000_ms_type original_ms_type;
439 enum e1000_rev_polarity cable_polarity;
440 enum e1000_smart_speed smart_speed;
444 u32 reset_delay_us; /* in usec */
447 enum e1000_media_type media_type;
449 u16 autoneg_advertised;
452 u16 max_cable_length;
453 u16 min_cable_length;
457 bool disable_polarity_correction;
459 bool polarity_correction;
461 bool speed_downgraded;
462 bool autoneg_wait_to_complete;
465 struct e1000_nvm_info {
466 struct e1000_nvm_operations ops;
467 enum e1000_nvm_type type;
468 enum e1000_nvm_override override;
480 struct e1000_bus_info {
481 enum e1000_bus_type type;
482 enum e1000_bus_speed speed;
483 enum e1000_bus_width width;
491 struct e1000_fc_info {
492 u32 high_water; /* Flow control high-water mark */
493 u32 low_water; /* Flow control low-water mark */
494 u16 pause_time; /* Flow control pause timer */
495 bool send_xon; /* Flow control send XON */
496 bool strict_ieee; /* Strict IEEE mode */
497 enum e1000_fc_mode current_mode; /* Type of flow control */
498 enum e1000_fc_mode requested_mode;
501 struct e1000_mbx_operations {
502 s32 (*init_params)(struct e1000_hw *hw);
503 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
504 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
505 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
506 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
507 s32 (*check_for_msg)(struct e1000_hw *, u16);
508 s32 (*check_for_ack)(struct e1000_hw *, u16);
509 s32 (*check_for_rst)(struct e1000_hw *, u16);
512 struct e1000_mbx_stats {
521 struct e1000_mbx_info {
522 struct e1000_mbx_operations ops;
523 struct e1000_mbx_stats stats;
529 struct e1000_dev_spec_82575 {
531 bool global_device_reset;
533 bool clear_semaphore_once;
534 struct e1000_sfp_flags eth_flags;
545 u8 __iomem *flash_address;
546 unsigned long io_base;
548 struct e1000_mac_info mac;
549 struct e1000_fc_info fc;
550 struct e1000_phy_info phy;
551 struct e1000_nvm_info nvm;
552 struct e1000_bus_info bus;
553 struct e1000_mbx_info mbx;
554 struct e1000_host_mng_dhcp_cookie mng_cookie;
557 struct e1000_dev_spec_82575 _82575;
561 u16 subsystem_vendor_id;
562 u16 subsystem_device_id;
568 struct net_device *igb_get_hw_dev(struct e1000_hw *hw);
569 #define hw_dbg(format, arg...) \
570 netdev_dbg(igb_get_hw_dev(hw), format, ##arg)
572 /* These functions must be implemented by drivers */
573 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
574 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
575 #endif /* _E1000_HW_H_ */