1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
4 /* The driver transmit and receive code */
7 #include <linux/netdevice.h>
8 #include <linux/prefetch.h>
9 #include <linux/bpf_trace.h>
10 #include <net/dsfield.h>
13 #include "ice_txrx_lib.h"
16 #include "ice_trace.h"
17 #include "ice_dcb_lib.h"
19 #include "ice_eswitch.h"
21 #define ICE_RX_HDR_SIZE 256
23 #define FDIR_DESC_RXDID 0x40
24 #define ICE_FDIR_CLEAN_DELAY 10
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
33 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
57 msleep_interruptible(1);
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
63 if (dma_mapping_error(dev, dma))
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
88 tx_buf->type = ICE_TX_BUF_DUMMY;
89 tx_buf->raw_buf = raw_packet;
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
102 writel(tx_ring->next_to_use, tx_ring->tail);
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
113 ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
115 if (dma_unmap_len(tx_buf, len))
116 dma_unmap_page(ring->dev,
117 dma_unmap_addr(tx_buf, dma),
118 dma_unmap_len(tx_buf, len),
121 switch (tx_buf->type) {
122 case ICE_TX_BUF_DUMMY:
123 devm_kfree(ring->dev, tx_buf->raw_buf);
126 dev_kfree_skb_any(tx_buf->skb);
128 case ICE_TX_BUF_XDP_TX:
129 page_frag_free(tx_buf->raw_buf);
131 case ICE_TX_BUF_XDP_XMIT:
132 xdp_return_frame(tx_buf->xdpf);
136 tx_buf->next_to_watch = NULL;
137 tx_buf->type = ICE_TX_BUF_EMPTY;
138 dma_unmap_len_set(tx_buf, len, 0);
139 /* tx_buf must be completely set up in the transmit path */
142 static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
144 return netdev_get_tx_queue(ring->netdev, ring->q_index);
148 * ice_clean_tx_ring - Free any empty Tx buffers
149 * @tx_ring: ring to be cleaned
151 void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
156 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157 ice_xsk_clean_xdp_ring(tx_ring);
161 /* ring already cleared, nothing to do */
162 if (!tx_ring->tx_buf)
165 /* Free all the Tx ring sk_buffs */
166 for (i = 0; i < tx_ring->count; i++)
167 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
170 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
172 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
174 /* Zero out the descriptor ring */
175 memset(tx_ring->desc, 0, size);
177 tx_ring->next_to_use = 0;
178 tx_ring->next_to_clean = 0;
180 if (!tx_ring->netdev)
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
191 * Free all transmit software resources
193 void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
215 * Returns true if there's any budget left (e.g. the clean is finished)
217 static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
233 prefetch(&vsi->state);
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
238 /* if next_to_watch is not set then there is no work pending */
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
261 napi_consume_skb(tx_buf->skb, napi_budget);
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
269 /* clear tx_buf data */
270 tx_buf->type = ICE_TX_BUF_EMPTY;
271 dma_unmap_len_set(tx_buf, len, 0);
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
291 dma_unmap_len_set(tx_buf, len, 0);
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
296 /* move us one more past the eop_desc for start of next pkt */
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
308 /* update budget accounting */
310 } while (likely(budget));
313 tx_ring->next_to_clean = i;
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
318 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->ring_stats->tx_stats.restart_q;
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
339 * Return 0 on success, negative on error
341 int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
343 struct device *dev = tx_ring->dev;
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
354 if (!tx_ring->tx_buf)
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->ring_stats->tx_stats.prev_pkt = -1;
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
383 void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
385 struct xdp_buff *xdp = &rx_ring->xdp;
386 struct device *dev = rx_ring->dev;
390 /* ring already cleared, nothing to do */
391 if (!rx_ring->rx_buf)
394 if (rx_ring->xsk_pool) {
395 ice_xsk_clean_rx_ring(rx_ring);
400 xdp_return_buff(xdp);
404 /* Free all the Rx ring sk_buffs */
405 for (i = 0; i < rx_ring->count; i++) {
406 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
411 /* Invalidate cache lines that may have been written to by
412 * device so that we avoid corrupting memory.
414 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
419 /* free resources associated with mapping */
420 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
425 rx_buf->page_offset = 0;
429 if (rx_ring->xsk_pool)
430 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
432 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
434 /* Zero out the descriptor ring */
435 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
437 memset(rx_ring->desc, 0, size);
439 rx_ring->next_to_alloc = 0;
440 rx_ring->next_to_clean = 0;
441 rx_ring->first_desc = 0;
442 rx_ring->next_to_use = 0;
446 * ice_free_rx_ring - Free Rx resources
447 * @rx_ring: ring to clean the resources from
449 * Free all receive software resources
451 void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
455 ice_clean_rx_ring(rx_ring);
456 if (rx_ring->vsi->type == ICE_VSI_PF)
457 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459 rx_ring->xdp_prog = NULL;
460 if (rx_ring->xsk_pool) {
461 kfree(rx_ring->xdp_buf);
462 rx_ring->xdp_buf = NULL;
464 kfree(rx_ring->rx_buf);
465 rx_ring->rx_buf = NULL;
469 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
471 dmam_free_coherent(rx_ring->dev, size,
472 rx_ring->desc, rx_ring->dma);
473 rx_ring->desc = NULL;
478 * ice_setup_rx_ring - Allocate the Rx descriptors
479 * @rx_ring: the Rx ring to set up
481 * Return 0 on success, negative on error
483 int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
485 struct device *dev = rx_ring->dev;
491 /* warn if we are about to overwrite the pointer */
492 WARN_ON(rx_ring->rx_buf);
494 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495 if (!rx_ring->rx_buf)
498 /* round up to nearest page */
499 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
501 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
503 if (!rx_ring->desc) {
504 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
509 rx_ring->next_to_use = 0;
510 rx_ring->next_to_clean = 0;
511 rx_ring->first_desc = 0;
513 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
516 if (rx_ring->vsi->type == ICE_VSI_PF &&
517 !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
518 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
519 rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
524 kfree(rx_ring->rx_buf);
525 rx_ring->rx_buf = NULL;
530 * ice_rx_frame_truesize
531 * @rx_ring: ptr to Rx ring
534 * calculate the truesize with taking into the account PAGE_SIZE of
538 ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
540 unsigned int truesize;
542 #if (PAGE_SIZE < 8192)
543 truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
545 truesize = rx_ring->rx_offset ?
546 SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
547 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
548 SKB_DATA_ALIGN(size);
554 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
556 * @xdp: xdp_buff used as input to the XDP program
557 * @xdp_prog: XDP program to run
558 * @xdp_ring: ring to be used for XDP_TX action
559 * @rx_buf: Rx buffer to store the XDP action
560 * @eop_desc: Last descriptor in packet to read metadata from
562 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
565 ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
566 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
567 struct ice_rx_buf *rx_buf, union ice_32b_rx_flex_desc *eop_desc)
569 unsigned int ret = ICE_XDP_PASS;
575 ice_xdp_meta_set_desc(xdp, eop_desc);
577 act = bpf_prog_run_xdp(xdp_prog, xdp);
582 if (static_branch_unlikely(&ice_xdp_locking_key))
583 spin_lock(&xdp_ring->tx_lock);
584 ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
585 if (static_branch_unlikely(&ice_xdp_locking_key))
586 spin_unlock(&xdp_ring->tx_lock);
587 if (ret == ICE_XDP_CONSUMED)
591 if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
596 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
600 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
603 ret = ICE_XDP_CONSUMED;
607 if (unlikely(xdp_buff_has_frags(xdp)))
608 ice_set_rx_bufs_act(xdp, rx_ring, ret);
612 * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
613 * @xdpf: XDP frame that will be converted to XDP buff
614 * @xdp_ring: XDP ring for transmission
616 static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
617 struct ice_tx_ring *xdp_ring)
621 xdp.data_hard_start = (void *)xdpf;
622 xdp.data = xdpf->data;
623 xdp.data_end = xdp.data + xdpf->len;
624 xdp.frame_sz = xdpf->frame_sz;
625 xdp.flags = xdpf->flags;
627 return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
631 * ice_xdp_xmit - submit packets to XDP ring for transmission
633 * @n: number of XDP frames to be transmitted
634 * @frames: XDP frames to be transmitted
635 * @flags: transmit flags
637 * Returns number of frames successfully sent. Failed frames
638 * will be free'ed by XDP core.
639 * For error cases, a negative errno code is returned and no-frames
640 * are transmitted (caller must handle freeing frames).
643 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
646 struct ice_netdev_priv *np = netdev_priv(dev);
647 unsigned int queue_index = smp_processor_id();
648 struct ice_vsi *vsi = np->vsi;
649 struct ice_tx_ring *xdp_ring;
650 struct ice_tx_buf *tx_buf;
653 if (test_bit(ICE_VSI_DOWN, vsi->state))
656 if (!ice_is_xdp_ena_vsi(vsi))
659 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
662 if (static_branch_unlikely(&ice_xdp_locking_key)) {
663 queue_index %= vsi->num_xdp_txq;
664 xdp_ring = vsi->xdp_rings[queue_index];
665 spin_lock(&xdp_ring->tx_lock);
667 /* Generally, should not happen */
668 if (unlikely(queue_index >= vsi->num_xdp_txq))
670 xdp_ring = vsi->xdp_rings[queue_index];
673 tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
674 for (i = 0; i < n; i++) {
675 const struct xdp_frame *xdpf = frames[i];
678 err = ice_xmit_xdp_ring(xdpf, xdp_ring);
679 if (err != ICE_XDP_TX)
684 tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
685 if (unlikely(flags & XDP_XMIT_FLUSH))
686 ice_xdp_ring_update_tail(xdp_ring);
688 if (static_branch_unlikely(&ice_xdp_locking_key))
689 spin_unlock(&xdp_ring->tx_lock);
695 * ice_alloc_mapped_page - recycle or make a new page
696 * @rx_ring: ring to use
697 * @bi: rx_buf struct to modify
699 * Returns true if the page was successfully allocated or
703 ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
705 struct page *page = bi->page;
708 /* since we are recycling buffers we should seldom need to alloc */
712 /* alloc new page for storage */
713 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
714 if (unlikely(!page)) {
715 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
719 /* map page for use */
720 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
721 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
723 /* if mapping failed free memory back to system since
724 * there isn't much point in holding memory we can't use
726 if (dma_mapping_error(rx_ring->dev, dma)) {
727 __free_pages(page, ice_rx_pg_order(rx_ring));
728 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
734 bi->page_offset = rx_ring->rx_offset;
735 page_ref_add(page, USHRT_MAX - 1);
736 bi->pagecnt_bias = USHRT_MAX;
742 * ice_alloc_rx_bufs - Replace used receive buffers
743 * @rx_ring: ring to place buffers on
744 * @cleaned_count: number of buffers to replace
746 * Returns false if all allocations were successful, true if any fail. Returning
747 * true signals to the caller that we didn't replace cleaned_count buffers and
748 * there is more work to do.
750 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
751 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
752 * multiple tail writes per call.
754 bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
756 union ice_32b_rx_flex_desc *rx_desc;
757 u16 ntu = rx_ring->next_to_use;
758 struct ice_rx_buf *bi;
760 /* do nothing if no valid netdev defined */
761 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
765 /* get the Rx descriptor and buffer based on next_to_use */
766 rx_desc = ICE_RX_DESC(rx_ring, ntu);
767 bi = &rx_ring->rx_buf[ntu];
770 /* if we fail here, we have work remaining */
771 if (!ice_alloc_mapped_page(rx_ring, bi))
774 /* sync the buffer for use by the device */
775 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
780 /* Refresh the desc even if buffer_addrs didn't change
781 * because each write-back erases this info.
783 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
788 if (unlikely(ntu == rx_ring->count)) {
789 rx_desc = ICE_RX_DESC(rx_ring, 0);
790 bi = rx_ring->rx_buf;
794 /* clear the status bits for the next_to_use descriptor */
795 rx_desc->wb.status_error0 = 0;
798 } while (cleaned_count);
800 if (rx_ring->next_to_use != ntu)
801 ice_release_rx_desc(rx_ring, ntu);
803 return !!cleaned_count;
807 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
808 * @rx_buf: Rx buffer to adjust
809 * @size: Size of adjustment
811 * Update the offset within page so that Rx buf will be ready to be reused.
812 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
813 * so the second half of page assigned to Rx buffer will be used, otherwise
814 * the offset is moved by "size" bytes
817 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
819 #if (PAGE_SIZE < 8192)
820 /* flip page offset to other buffer */
821 rx_buf->page_offset ^= size;
823 /* move offset up to the next cache line */
824 rx_buf->page_offset += size;
829 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
830 * @rx_buf: buffer containing the page
832 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
833 * which will assign the current buffer to the buffer that next_to_alloc is
834 * pointing to; otherwise, the DMA mapping needs to be destroyed and
838 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
840 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
841 struct page *page = rx_buf->page;
843 /* avoid re-using remote and pfmemalloc pages */
844 if (!dev_page_is_reusable(page))
847 #if (PAGE_SIZE < 8192)
848 /* if we are only owner of page we can reuse it */
849 if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
852 #define ICE_LAST_OFFSET \
853 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
854 if (rx_buf->page_offset > ICE_LAST_OFFSET)
856 #endif /* PAGE_SIZE < 8192) */
858 /* If we have drained the page fragment pool we need to update
859 * the pagecnt_bias and page count so that we fully restock the
860 * number of references the driver holds.
862 if (unlikely(pagecnt_bias == 1)) {
863 page_ref_add(page, USHRT_MAX - 1);
864 rx_buf->pagecnt_bias = USHRT_MAX;
871 * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
872 * @rx_ring: Rx descriptor ring to transact packets on
873 * @xdp: xdp buff to place the data into
874 * @rx_buf: buffer containing page to add
875 * @size: packet length from rx_desc
877 * This function will add the data contained in rx_buf->page to the xdp buf.
878 * It will just attach the page as a frag.
881 ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
882 struct ice_rx_buf *rx_buf, const unsigned int size)
884 struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
889 if (!xdp_buff_has_frags(xdp)) {
891 sinfo->xdp_frags_size = 0;
892 xdp_buff_set_frags_flag(xdp);
895 if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS)) {
896 if (unlikely(xdp_buff_has_frags(xdp)))
897 ice_set_rx_bufs_act(xdp, rx_ring, ICE_XDP_CONSUMED);
901 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
902 rx_buf->page_offset, size);
903 sinfo->xdp_frags_size += size;
905 if (page_is_pfmemalloc(rx_buf->page))
906 xdp_buff_set_frag_pfmemalloc(xdp);
912 * ice_reuse_rx_page - page flip buffer and store it back on the ring
913 * @rx_ring: Rx descriptor ring to store buffers on
914 * @old_buf: donor buffer to have page reused
916 * Synchronizes page for reuse by the adapter
919 ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
921 u16 nta = rx_ring->next_to_alloc;
922 struct ice_rx_buf *new_buf;
924 new_buf = &rx_ring->rx_buf[nta];
926 /* update, and store next to alloc */
928 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
930 /* Transfer page from old buffer to new buffer.
931 * Move each member individually to avoid possible store
932 * forwarding stalls and unnecessary copy of skb.
934 new_buf->dma = old_buf->dma;
935 new_buf->page = old_buf->page;
936 new_buf->page_offset = old_buf->page_offset;
937 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
941 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
942 * @rx_ring: Rx descriptor ring to transact packets on
943 * @size: size of buffer to add to skb
944 * @ntc: index of next to clean element
946 * This function will pull an Rx buffer from the ring and synchronize it
947 * for use by the CPU.
949 static struct ice_rx_buf *
950 ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
951 const unsigned int ntc)
953 struct ice_rx_buf *rx_buf;
955 rx_buf = &rx_ring->rx_buf[ntc];
957 #if (PAGE_SIZE < 8192)
958 page_count(rx_buf->page);
962 prefetchw(rx_buf->page);
966 /* we are reusing so sync this buffer for CPU use */
967 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
968 rx_buf->page_offset, size,
971 /* We have pulled a buffer for use, so decrement pagecnt_bias */
972 rx_buf->pagecnt_bias--;
978 * ice_build_skb - Build skb around an existing buffer
979 * @rx_ring: Rx descriptor ring to transact packets on
980 * @xdp: xdp_buff pointing to the data
982 * This function builds an skb around an existing XDP buffer, taking care
983 * to set up the skb correctly and avoid any memcpy overhead. Driver has
984 * already combined frags (if any) to skb_shared_info.
986 static struct sk_buff *
987 ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
989 u8 metasize = xdp->data - xdp->data_meta;
990 struct skb_shared_info *sinfo = NULL;
991 unsigned int nr_frags;
994 if (unlikely(xdp_buff_has_frags(xdp))) {
995 sinfo = xdp_get_shared_info_from_buff(xdp);
996 nr_frags = sinfo->nr_frags;
999 /* Prefetch first cache line of first page. If xdp->data_meta
1000 * is unused, this points exactly as xdp->data, otherwise we
1001 * likely have a consumer accessing first few bytes of meta
1002 * data, and then actual data.
1004 net_prefetch(xdp->data_meta);
1005 /* build an skb around the page buffer */
1006 skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
1010 /* must to record Rx queue, otherwise OS features such as
1011 * symmetric queue won't work
1013 skb_record_rx_queue(skb, rx_ring->q_index);
1015 /* update pointers within the skb to store the data */
1016 skb_reserve(skb, xdp->data - xdp->data_hard_start);
1017 __skb_put(skb, xdp->data_end - xdp->data);
1019 skb_metadata_set(skb, metasize);
1021 if (unlikely(xdp_buff_has_frags(xdp)))
1022 xdp_update_skb_shared_info(skb, nr_frags,
1023 sinfo->xdp_frags_size,
1024 nr_frags * xdp->frame_sz,
1025 xdp_buff_is_frag_pfmemalloc(xdp));
1031 * ice_construct_skb - Allocate skb and populate it
1032 * @rx_ring: Rx descriptor ring to transact packets on
1033 * @xdp: xdp_buff pointing to the data
1035 * This function allocates an skb. It then populates it with the page
1036 * data from the current receive descriptor, taking care to set up the
1039 static struct sk_buff *
1040 ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1042 unsigned int size = xdp->data_end - xdp->data;
1043 struct skb_shared_info *sinfo = NULL;
1044 struct ice_rx_buf *rx_buf;
1045 unsigned int nr_frags = 0;
1046 unsigned int headlen;
1047 struct sk_buff *skb;
1049 /* prefetch first cache line of first page */
1050 net_prefetch(xdp->data);
1052 if (unlikely(xdp_buff_has_frags(xdp))) {
1053 sinfo = xdp_get_shared_info_from_buff(xdp);
1054 nr_frags = sinfo->nr_frags;
1057 /* allocate a skb to store the frags */
1058 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
1059 GFP_ATOMIC | __GFP_NOWARN);
1063 rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1064 skb_record_rx_queue(skb, rx_ring->q_index);
1065 /* Determine available headroom for copy */
1067 if (headlen > ICE_RX_HDR_SIZE)
1068 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1070 /* align pull length to size of long to optimize memcpy performance */
1071 memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1074 /* if we exhaust the linear part then add what is left as a frag */
1077 /* besides adding here a partial frag, we are going to add
1078 * frags from xdp_buff, make sure there is enough space for
1081 if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1085 skb_add_rx_frag(skb, 0, rx_buf->page,
1086 rx_buf->page_offset + headlen, size,
1089 /* buffer is unused, change the act that should be taken later
1090 * on; data was copied onto skb's linear part so there's no
1091 * need for adjusting page offset and we can reuse this buffer
1094 rx_buf->act = ICE_SKB_CONSUMED;
1097 if (unlikely(xdp_buff_has_frags(xdp))) {
1098 struct skb_shared_info *skinfo = skb_shinfo(skb);
1100 memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1101 sizeof(skb_frag_t) * nr_frags);
1103 xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1104 sinfo->xdp_frags_size,
1105 nr_frags * xdp->frame_sz,
1106 xdp_buff_is_frag_pfmemalloc(xdp));
1113 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1114 * @rx_ring: Rx descriptor ring to transact packets on
1115 * @rx_buf: Rx buffer to pull data from
1117 * This function will clean up the contents of the rx_buf. It will either
1118 * recycle the buffer or unmap it and free the associated resources.
1121 ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1126 if (ice_can_reuse_rx_page(rx_buf)) {
1127 /* hand second half of page back to the ring */
1128 ice_reuse_rx_page(rx_ring, rx_buf);
1130 /* we are not reusing the buffer so unmap it */
1131 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1132 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1134 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1137 /* clear contents of buffer_info */
1138 rx_buf->page = NULL;
1142 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1143 * @rx_ring: Rx descriptor ring to transact packets on
1144 * @budget: Total limit on number of packets to process
1146 * This function provides a "bounce buffer" approach to Rx interrupt
1147 * processing. The advantage to this is that on systems that have
1148 * expensive overhead for IOMMU access this provides a means of avoiding
1149 * it by maintaining the mapping of the page to the system.
1151 * Returns amount of work completed
1153 int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1155 unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1156 unsigned int offset = rx_ring->rx_offset;
1157 struct xdp_buff *xdp = &rx_ring->xdp;
1158 u32 cached_ntc = rx_ring->first_desc;
1159 struct ice_tx_ring *xdp_ring = NULL;
1160 struct bpf_prog *xdp_prog = NULL;
1161 u32 ntc = rx_ring->next_to_clean;
1162 u32 cnt = rx_ring->count;
1168 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1169 #if (PAGE_SIZE < 8192)
1170 xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1173 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1175 xdp_ring = rx_ring->xdp_ring;
1176 cached_ntu = xdp_ring->next_to_use;
1179 /* start the loop to process Rx packets bounded by 'budget' */
1180 while (likely(total_rx_pkts < (unsigned int)budget)) {
1181 union ice_32b_rx_flex_desc *rx_desc;
1182 struct ice_rx_buf *rx_buf;
1183 struct sk_buff *skb;
1188 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1189 rx_desc = ICE_RX_DESC(rx_ring, ntc);
1191 /* status_error_len will always be zero for unused descriptors
1192 * because it's cleared in cleanup, and overlaps with hdr_addr
1193 * which is always zero because packet split isn't used, if the
1194 * hardware wrote DD then it will be non-zero
1196 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1197 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1200 /* This memory barrier is needed to keep us from reading
1201 * any other fields out of the rx_desc until we know the
1206 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1207 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1208 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1210 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1212 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1215 rx_ring->first_desc = ntc;
1219 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1220 ICE_RX_FLX_DESC_PKT_LEN_M;
1222 /* retrieve a buffer from the ring */
1223 rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1228 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1230 xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1231 #if (PAGE_SIZE > 4096)
1232 /* At larger PAGE_SIZE, frame_sz depend on len size */
1233 xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1235 xdp_buff_clear_frags_flag(xdp);
1236 } else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1242 /* skip if it is NOP desc */
1243 if (ice_is_non_eop(rx_ring, rx_desc))
1246 ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_buf, rx_desc);
1247 if (rx_buf->act == ICE_XDP_PASS)
1249 total_rx_bytes += xdp_get_buff_len(xdp);
1253 rx_ring->first_desc = ntc;
1256 if (likely(ice_ring_uses_build_skb(rx_ring)))
1257 skb = ice_build_skb(rx_ring, xdp);
1259 skb = ice_construct_skb(rx_ring, xdp);
1260 /* exit if we failed to retrieve a buffer */
1262 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1263 rx_buf->act = ICE_XDP_CONSUMED;
1264 if (unlikely(xdp_buff_has_frags(xdp)))
1265 ice_set_rx_bufs_act(xdp, rx_ring,
1268 rx_ring->first_desc = ntc;
1272 rx_ring->first_desc = ntc;
1274 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1275 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1277 dev_kfree_skb_any(skb);
1281 vlan_tci = ice_get_vlan_tci(rx_desc);
1283 /* pad the skb if needed, to make a valid ethernet frame */
1284 if (eth_skb_pad(skb))
1287 /* probably a little skewed due to removing CRC */
1288 total_rx_bytes += skb->len;
1290 /* populate checksum, VLAN, and protocol */
1291 ice_process_skb_fields(rx_ring, rx_desc, skb);
1293 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1294 /* send completed skb up the stack */
1295 ice_receive_skb(rx_ring, skb, vlan_tci);
1297 /* update budget accounting */
1301 first = rx_ring->first_desc;
1302 while (cached_ntc != first) {
1303 struct ice_rx_buf *buf = &rx_ring->rx_buf[cached_ntc];
1305 if (buf->act & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1306 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1307 xdp_xmit |= buf->act;
1308 } else if (buf->act & ICE_XDP_CONSUMED) {
1309 buf->pagecnt_bias++;
1310 } else if (buf->act == ICE_XDP_PASS) {
1311 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1314 ice_put_rx_buf(rx_ring, buf);
1315 if (++cached_ntc >= cnt)
1318 rx_ring->next_to_clean = ntc;
1319 /* return up to cleaned_count buffers to hardware */
1320 failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1323 ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1325 if (rx_ring->ring_stats)
1326 ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1329 /* guarantee a trip back through this routine if there was a failure */
1330 return failure ? budget : (int)total_rx_pkts;
1333 static void __ice_update_sample(struct ice_q_vector *q_vector,
1334 struct ice_ring_container *rc,
1335 struct dim_sample *sample,
1338 u64 packets = 0, bytes = 0;
1341 struct ice_tx_ring *tx_ring;
1343 ice_for_each_tx_ring(tx_ring, *rc) {
1344 struct ice_ring_stats *ring_stats;
1346 ring_stats = tx_ring->ring_stats;
1349 packets += ring_stats->stats.pkts;
1350 bytes += ring_stats->stats.bytes;
1353 struct ice_rx_ring *rx_ring;
1355 ice_for_each_rx_ring(rx_ring, *rc) {
1356 struct ice_ring_stats *ring_stats;
1358 ring_stats = rx_ring->ring_stats;
1361 packets += ring_stats->stats.pkts;
1362 bytes += ring_stats->stats.bytes;
1366 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1367 sample->comp_ctr = 0;
1369 /* if dim settings get stale, like when not updated for 1
1370 * second or longer, force it to start again. This addresses the
1371 * frequent case of an idle queue being switched to by the
1372 * scheduler. The 1,000 here means 1,000 milliseconds.
1374 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1375 rc->dim.state = DIM_START_MEASURE;
1379 * ice_net_dim - Update net DIM algorithm
1380 * @q_vector: the vector associated with the interrupt
1382 * Create a DIM sample and notify net_dim() so that it can possibly decide
1383 * a new ITR value based on incoming packets, bytes, and interrupts.
1385 * This function is a no-op if the ring is not configured to dynamic ITR.
1387 static void ice_net_dim(struct ice_q_vector *q_vector)
1389 struct ice_ring_container *tx = &q_vector->tx;
1390 struct ice_ring_container *rx = &q_vector->rx;
1392 if (ITR_IS_DYNAMIC(tx)) {
1393 struct dim_sample dim_sample;
1395 __ice_update_sample(q_vector, tx, &dim_sample, true);
1396 net_dim(&tx->dim, dim_sample);
1399 if (ITR_IS_DYNAMIC(rx)) {
1400 struct dim_sample dim_sample;
1402 __ice_update_sample(q_vector, rx, &dim_sample, false);
1403 net_dim(&rx->dim, dim_sample);
1408 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1409 * @itr_idx: interrupt throttling index
1410 * @itr: interrupt throttling value in usecs
1412 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1414 /* The ITR value is reported in microseconds, and the register value is
1415 * recorded in 2 microsecond units. For this reason we only need to
1416 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1417 * granularity as a shift instead of division. The mask makes sure the
1418 * ITR value is never odd so we don't accidentally write into the field
1419 * prior to the ITR field.
1421 itr &= ICE_ITR_MASK;
1423 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1424 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1425 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1429 * ice_enable_interrupt - re-enable MSI-X interrupt
1430 * @q_vector: the vector associated with the interrupt to enable
1432 * If the VSI is down, the interrupt will not be re-enabled. Also,
1433 * when enabling the interrupt always reset the wb_on_itr to false
1434 * and trigger a software interrupt to clean out internal state.
1436 static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1438 struct ice_vsi *vsi = q_vector->vsi;
1439 bool wb_en = q_vector->wb_on_itr;
1442 if (test_bit(ICE_DOWN, vsi->state))
1445 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1446 * make sure to catch any pending cleanups that might have been missed
1447 * due to interrupt state transition. If busy poll or poll isn't
1448 * enabled, then don't update ITR, and just enable the interrupt.
1451 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1453 q_vector->wb_on_itr = false;
1455 /* do two things here with a single write. Set up the third ITR
1456 * index to be used for software interrupt moderation, and then
1457 * trigger a software interrupt with a rate limit of 20K on
1458 * software interrupts, this will help avoid high interrupt
1459 * loads due to frequently polling and exiting polling.
1461 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1462 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1463 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1464 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1466 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1470 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1471 * @q_vector: q_vector to set WB_ON_ITR on
1473 * We need to tell hardware to write-back completed descriptors even when
1474 * interrupts are disabled. Descriptors will be written back on cache line
1475 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1476 * descriptors may not be written back if they don't fill a cache line until
1477 * the next interrupt.
1479 * This sets the write-back frequency to whatever was set previously for the
1480 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1481 * aren't meddling with the INTENA_M bit.
1483 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1485 struct ice_vsi *vsi = q_vector->vsi;
1487 /* already in wb_on_itr mode no need to change it */
1488 if (q_vector->wb_on_itr)
1491 /* use previously set ITR values for all of the ITR indices by
1492 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1493 * be static in non-adaptive mode (user configured)
1495 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1496 FIELD_PREP(GLINT_DYN_CTL_ITR_INDX_M, ICE_ITR_NONE) |
1497 FIELD_PREP(GLINT_DYN_CTL_INTENA_MSK_M, 1) |
1498 FIELD_PREP(GLINT_DYN_CTL_WB_ON_ITR_M, 1));
1500 q_vector->wb_on_itr = true;
1504 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1505 * @napi: napi struct with our devices info in it
1506 * @budget: amount of work driver is allowed to do this pass, in packets
1508 * This function will clean all queues associated with a q_vector.
1510 * Returns the amount of work done
1512 int ice_napi_poll(struct napi_struct *napi, int budget)
1514 struct ice_q_vector *q_vector =
1515 container_of(napi, struct ice_q_vector, napi);
1516 struct ice_tx_ring *tx_ring;
1517 struct ice_rx_ring *rx_ring;
1518 bool clean_complete = true;
1519 int budget_per_ring;
1522 /* Since the actual Tx work is minimal, we can give the Tx a larger
1523 * budget and be more aggressive about cleaning up the Tx descriptors.
1525 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1528 if (tx_ring->xsk_pool)
1529 wd = ice_xmit_zc(tx_ring);
1530 else if (ice_ring_is_xdp(tx_ring))
1533 wd = ice_clean_tx_irq(tx_ring, budget);
1536 clean_complete = false;
1539 /* Handle case where we are called by netpoll with a budget of 0 */
1540 if (unlikely(budget <= 0))
1543 /* normally we have 1 Rx ring per q_vector */
1544 if (unlikely(q_vector->num_ring_rx > 1))
1545 /* We attempt to distribute budget to each Rx queue fairly, but
1546 * don't allow the budget to go below 1 because that would exit
1549 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1551 /* Max of 1 Rx ring in this q_vector so give it the budget */
1552 budget_per_ring = budget;
1554 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1557 /* A dedicated path for zero-copy allows making a single
1558 * comparison in the irq context instead of many inside the
1559 * ice_clean_rx_irq function and makes the codebase cleaner.
1561 cleaned = rx_ring->xsk_pool ?
1562 ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1563 ice_clean_rx_irq(rx_ring, budget_per_ring);
1564 work_done += cleaned;
1565 /* if we clean as many as budgeted, we must not be done */
1566 if (cleaned >= budget_per_ring)
1567 clean_complete = false;
1570 /* If work not completed, return budget and polling will return */
1571 if (!clean_complete) {
1572 /* Set the writeback on ITR so partial completions of
1573 * cache-lines will still continue even if we're polling.
1575 ice_set_wb_on_itr(q_vector);
1579 /* Exit the polling mode, but don't re-enable interrupts if stack might
1580 * poll us due to busy-polling
1582 if (napi_complete_done(napi, work_done)) {
1583 ice_net_dim(q_vector);
1584 ice_enable_interrupt(q_vector);
1586 ice_set_wb_on_itr(q_vector);
1589 return min_t(int, work_done, budget - 1);
1593 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1594 * @tx_ring: the ring to be checked
1595 * @size: the size buffer we want to assure is available
1597 * Returns -EBUSY if a stop is needed, else 0
1599 static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1601 netif_tx_stop_queue(txring_txq(tx_ring));
1602 /* Memory barrier before checking head and tail */
1605 /* Check again in a case another CPU has just made room available. */
1606 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1609 /* A reprieve! - use start_queue because it doesn't call schedule */
1610 netif_tx_start_queue(txring_txq(tx_ring));
1611 ++tx_ring->ring_stats->tx_stats.restart_q;
1616 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1617 * @tx_ring: the ring to be checked
1618 * @size: the size buffer we want to assure is available
1620 * Returns 0 if stop is not needed
1622 static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1624 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1627 return __ice_maybe_stop_tx(tx_ring, size);
1631 * ice_tx_map - Build the Tx descriptor
1632 * @tx_ring: ring to send buffer on
1633 * @first: first buffer info buffer to use
1634 * @off: pointer to struct that holds offload parameters
1636 * This function loops over the skb data pointed to by *first
1637 * and gets a physical address for each memory location and programs
1638 * it and the length into the transmit descriptor.
1641 ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1642 struct ice_tx_offload_params *off)
1644 u64 td_offset, td_tag, td_cmd;
1645 u16 i = tx_ring->next_to_use;
1646 unsigned int data_len, size;
1647 struct ice_tx_desc *tx_desc;
1648 struct ice_tx_buf *tx_buf;
1649 struct sk_buff *skb;
1654 td_tag = off->td_l2tag1;
1655 td_cmd = off->td_cmd;
1656 td_offset = off->td_offset;
1659 data_len = skb->data_len;
1660 size = skb_headlen(skb);
1662 tx_desc = ICE_TX_DESC(tx_ring, i);
1664 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1665 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1666 td_tag = first->vid;
1669 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1673 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1674 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1676 if (dma_mapping_error(tx_ring->dev, dma))
1679 /* record length, and DMA address */
1680 dma_unmap_len_set(tx_buf, len, size);
1681 dma_unmap_addr_set(tx_buf, dma, dma);
1683 /* align size to end of page */
1684 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1685 tx_desc->buf_addr = cpu_to_le64(dma);
1687 /* account for data chunks larger than the hardware
1690 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1691 tx_desc->cmd_type_offset_bsz =
1692 ice_build_ctob(td_cmd, td_offset, max_data,
1698 if (i == tx_ring->count) {
1699 tx_desc = ICE_TX_DESC(tx_ring, 0);
1706 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1707 tx_desc->buf_addr = cpu_to_le64(dma);
1710 if (likely(!data_len))
1713 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1719 if (i == tx_ring->count) {
1720 tx_desc = ICE_TX_DESC(tx_ring, 0);
1724 size = skb_frag_size(frag);
1727 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1730 tx_buf = &tx_ring->tx_buf[i];
1731 tx_buf->type = ICE_TX_BUF_FRAG;
1734 /* record SW timestamp if HW timestamp is not available */
1735 skb_tx_timestamp(first->skb);
1738 if (i == tx_ring->count)
1741 /* write last descriptor with RS and EOP bits */
1742 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1743 tx_desc->cmd_type_offset_bsz =
1744 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1746 /* Force memory writes to complete before letting h/w know there
1747 * are new descriptors to fetch.
1749 * We also use this memory barrier to make certain all of the
1750 * status bits have been updated before next_to_watch is written.
1754 /* set next_to_watch value indicating a packet is present */
1755 first->next_to_watch = tx_desc;
1757 tx_ring->next_to_use = i;
1759 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1761 /* notify HW of packet */
1762 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1763 netdev_xmit_more());
1765 /* notify HW of packet */
1766 writel(i, tx_ring->tail);
1771 /* clear DMA mappings for failed tx_buf map */
1773 tx_buf = &tx_ring->tx_buf[i];
1774 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1775 if (tx_buf == first)
1782 tx_ring->next_to_use = i;
1786 * ice_tx_csum - Enable Tx checksum offloads
1787 * @first: pointer to the first descriptor
1788 * @off: pointer to struct that holds offload parameters
1790 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1793 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1795 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1796 struct sk_buff *skb = first->skb;
1806 __be16 frag_off, protocol;
1807 unsigned char *exthdr;
1808 u32 offset, cmd = 0;
1811 if (skb->ip_summed != CHECKSUM_PARTIAL)
1814 protocol = vlan_get_protocol(skb);
1816 if (eth_p_mpls(protocol)) {
1817 ip.hdr = skb_inner_network_header(skb);
1818 l4.hdr = skb_checksum_start(skb);
1820 ip.hdr = skb_network_header(skb);
1821 l4.hdr = skb_transport_header(skb);
1824 /* compute outer L2 header size */
1825 l2_len = ip.hdr - skb->data;
1826 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1828 /* set the tx_flags to indicate the IP protocol type. this is
1829 * required so that checksum header computation below is accurate.
1831 if (ip.v4->version == 4)
1832 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1833 else if (ip.v6->version == 6)
1834 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1836 if (skb->encapsulation) {
1837 bool gso_ena = false;
1840 /* define outer network header type */
1841 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1842 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1843 ICE_TX_CTX_EIPT_IPV4 :
1844 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1845 l4_proto = ip.v4->protocol;
1846 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1849 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1850 exthdr = ip.hdr + sizeof(*ip.v6);
1851 l4_proto = ip.v6->nexthdr;
1852 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1853 &l4_proto, &frag_off);
1858 /* define outer transport */
1861 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1862 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1865 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1866 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1870 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1871 l4.hdr = skb_inner_network_header(skb);
1874 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1877 skb_checksum_help(skb);
1881 /* compute outer L3 header size */
1882 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1883 ICE_TXD_CTX_QW0_EIPLEN_S;
1885 /* switch IP header pointer from outer to inner header */
1886 ip.hdr = skb_inner_network_header(skb);
1888 /* compute tunnel header size */
1889 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1890 ICE_TXD_CTX_QW0_NATLEN_S;
1892 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1893 /* indicate if we need to offload outer UDP header */
1894 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1895 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1896 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1898 /* record tunnel offload values */
1899 off->cd_tunnel_params |= tunnel;
1901 /* set DTYP=1 to indicate that it's an Tx context descriptor
1902 * in IPsec tunnel mode with Tx offloads in Quad word 1
1904 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1906 /* switch L4 header pointer from outer to inner */
1907 l4.hdr = skb_inner_transport_header(skb);
1910 /* reset type as we transition from outer to inner headers */
1911 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1912 if (ip.v4->version == 4)
1913 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1914 if (ip.v6->version == 6)
1915 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1918 /* Enable IP checksum offloads */
1919 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1920 l4_proto = ip.v4->protocol;
1921 /* the stack computes the IP header already, the only time we
1922 * need the hardware to recompute it is in the case of TSO.
1924 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1925 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1927 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1929 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1930 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1931 exthdr = ip.hdr + sizeof(*ip.v6);
1932 l4_proto = ip.v6->nexthdr;
1933 if (l4.hdr != exthdr)
1934 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1940 /* compute inner L3 header size */
1941 l3_len = l4.hdr - ip.hdr;
1942 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1944 /* Enable L4 checksum offloads */
1947 /* enable checksum offloads */
1948 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1949 l4_len = l4.tcp->doff;
1950 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1953 /* enable UDP checksum offload */
1954 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1955 l4_len = (sizeof(struct udphdr) >> 2);
1956 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1959 /* enable SCTP checksum offload */
1960 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1961 l4_len = sizeof(struct sctphdr) >> 2;
1962 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1966 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1968 skb_checksum_help(skb);
1973 off->td_offset |= offset;
1978 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1979 * @tx_ring: ring to send buffer on
1980 * @first: pointer to struct ice_tx_buf
1982 * Checks the skb and set up correspondingly several generic transmit flags
1983 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1986 ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1988 struct sk_buff *skb = first->skb;
1990 /* nothing left to do, software offloaded VLAN */
1991 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1994 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1995 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1996 * VLAN offloads exclusively so we only care about the VLAN ID here
1998 if (skb_vlan_tag_present(skb)) {
1999 first->vid = skb_vlan_tag_get(skb);
2000 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
2001 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
2003 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
2006 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
2010 * ice_tso - computes mss and TSO length to prepare for TSO
2011 * @first: pointer to struct ice_tx_buf
2012 * @off: pointer to struct that holds offload parameters
2014 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
2017 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2019 struct sk_buff *skb = first->skb;
2030 u64 cd_mss, cd_tso_len;
2036 if (skb->ip_summed != CHECKSUM_PARTIAL)
2039 if (!skb_is_gso(skb))
2042 err = skb_cow_head(skb, 0);
2046 protocol = vlan_get_protocol(skb);
2048 if (eth_p_mpls(protocol))
2049 ip.hdr = skb_inner_network_header(skb);
2051 ip.hdr = skb_network_header(skb);
2052 l4.hdr = skb_checksum_start(skb);
2054 /* initialize outer IP header fields */
2055 if (ip.v4->version == 4) {
2059 ip.v6->payload_len = 0;
2062 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2066 SKB_GSO_UDP_TUNNEL |
2067 SKB_GSO_UDP_TUNNEL_CSUM)) {
2068 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2069 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2072 /* determine offset of outer transport header */
2073 l4_start = (u8)(l4.hdr - skb->data);
2075 /* remove payload length from outer checksum */
2076 paylen = skb->len - l4_start;
2077 csum_replace_by_diff(&l4.udp->check,
2078 (__force __wsum)htonl(paylen));
2081 /* reset pointers to inner headers */
2082 ip.hdr = skb_inner_network_header(skb);
2083 l4.hdr = skb_inner_transport_header(skb);
2085 /* initialize inner IP header fields */
2086 if (ip.v4->version == 4) {
2090 ip.v6->payload_len = 0;
2094 /* determine offset of transport header */
2095 l4_start = (u8)(l4.hdr - skb->data);
2097 /* remove payload length from checksum */
2098 paylen = skb->len - l4_start;
2100 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2101 csum_replace_by_diff(&l4.udp->check,
2102 (__force __wsum)htonl(paylen));
2103 /* compute length of UDP segmentation header */
2104 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2106 csum_replace_by_diff(&l4.tcp->check,
2107 (__force __wsum)htonl(paylen));
2108 /* compute length of TCP segmentation header */
2109 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2112 /* update gso_segs and bytecount */
2113 first->gso_segs = skb_shinfo(skb)->gso_segs;
2114 first->bytecount += (first->gso_segs - 1) * off->header_len;
2116 cd_tso_len = skb->len - off->header_len;
2117 cd_mss = skb_shinfo(skb)->gso_size;
2119 /* record cdesc_qw1 with TSO parameters */
2120 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2121 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2122 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2123 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2124 first->tx_flags |= ICE_TX_FLAGS_TSO;
2129 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2130 * @size: transmit request size in bytes
2132 * Due to hardware alignment restrictions (4K alignment), we need to
2133 * assume that we can have no more than 12K of data per descriptor, even
2134 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2135 * Thus, we need to divide by 12K. But division is slow! Instead,
2136 * we decompose the operation into shifts and one relatively cheap
2137 * multiply operation.
2139 * To divide by 12K, we first divide by 4K, then divide by 3:
2140 * To divide by 4K, shift right by 12 bits
2141 * To divide by 3, multiply by 85, then divide by 256
2142 * (Divide by 256 is done by shifting right by 8 bits)
2143 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2144 * 3, we'll underestimate near each multiple of 12K. This is actually more
2145 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2146 * segment. For our purposes this is accurate out to 1M which is orders of
2147 * magnitude greater than our largest possible GSO size.
2149 * This would then be implemented as:
2150 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2152 * Since multiplication and division are commutative, we can reorder
2154 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2156 static unsigned int ice_txd_use_count(unsigned int size)
2158 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2162 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2165 * Returns number of data descriptors needed for this skb.
2167 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2169 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2170 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2171 unsigned int count = 0, size = skb_headlen(skb);
2174 count += ice_txd_use_count(size);
2179 size = skb_frag_size(frag++);
2186 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2189 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2190 * and so we need to figure out the cases where we need to linearize the skb.
2192 * For TSO we need to count the TSO header and segment payload separately.
2193 * As such we need to check cases where we have 7 fragments or more as we
2194 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2195 * the segment payload in the first descriptor, and another 7 for the
2198 static bool __ice_chk_linearize(struct sk_buff *skb)
2200 const skb_frag_t *frag, *stale;
2203 /* no need to check if number of frags is less than 7 */
2204 nr_frags = skb_shinfo(skb)->nr_frags;
2205 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2208 /* We need to walk through the list and validate that each group
2209 * of 6 fragments totals at least gso_size.
2211 nr_frags -= ICE_MAX_BUF_TXD - 2;
2212 frag = &skb_shinfo(skb)->frags[0];
2214 /* Initialize size to the negative value of gso_size minus 1. We
2215 * use this as the worst case scenario in which the frag ahead
2216 * of us only provides one byte which is why we are limited to 6
2217 * descriptors for a single transmit as the header and previous
2218 * fragment are already consuming 2 descriptors.
2220 sum = 1 - skb_shinfo(skb)->gso_size;
2222 /* Add size of frags 0 through 4 to create our initial sum */
2223 sum += skb_frag_size(frag++);
2224 sum += skb_frag_size(frag++);
2225 sum += skb_frag_size(frag++);
2226 sum += skb_frag_size(frag++);
2227 sum += skb_frag_size(frag++);
2229 /* Walk through fragments adding latest fragment, testing it, and
2230 * then removing stale fragments from the sum.
2232 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2233 int stale_size = skb_frag_size(stale);
2235 sum += skb_frag_size(frag++);
2237 /* The stale fragment may present us with a smaller
2238 * descriptor than the actual fragment size. To account
2239 * for that we need to remove all the data on the front and
2240 * figure out what the remainder would be in the last
2241 * descriptor associated with the fragment.
2243 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2244 int align_pad = -(skb_frag_off(stale)) &
2245 (ICE_MAX_READ_REQ_SIZE - 1);
2248 stale_size -= align_pad;
2251 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2252 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2253 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2256 /* if sum is negative we failed to make sufficient progress */
2270 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2272 * @count: number of buffers used
2274 * Note: Our HW can't scatter-gather more than 8 fragments to build
2275 * a packet on the wire and so we need to figure out the cases where we
2276 * need to linearize the skb.
2278 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2280 /* Both TSO and single send will work if count is less than 8 */
2281 if (likely(count < ICE_MAX_BUF_TXD))
2284 if (skb_is_gso(skb))
2285 return __ice_chk_linearize(skb);
2287 /* we can support up to 8 data buffers for a single send */
2288 return count != ICE_MAX_BUF_TXD;
2292 * ice_tstamp - set up context descriptor for hardware timestamp
2293 * @tx_ring: pointer to the Tx ring to send buffer on
2294 * @skb: pointer to the SKB we're sending
2296 * @off: Tx offload parameters
2299 ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2300 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2304 /* only timestamp the outbound packet if the user has requested it */
2305 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2308 /* Tx timestamps cannot be sampled when doing TSO */
2309 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2312 /* Grab an open timestamp slot */
2313 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2315 tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2319 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2320 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2321 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2322 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2326 * ice_xmit_frame_ring - Sends buffer on Tx ring
2328 * @tx_ring: ring to send buffer on
2330 * Returns NETDEV_TX_OK if sent, else an error code
2333 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2335 struct ice_tx_offload_params offload = { 0 };
2336 struct ice_vsi *vsi = tx_ring->vsi;
2337 struct ice_tx_buf *first;
2342 ice_trace(xmit_frame_ring, tx_ring, skb);
2344 if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2347 count = ice_xmit_desc_count(skb);
2348 if (ice_chk_linearize(skb, count)) {
2349 if (__skb_linearize(skb))
2351 count = ice_txd_use_count(skb->len);
2352 tx_ring->ring_stats->tx_stats.tx_linearize++;
2355 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2356 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2357 * + 4 desc gap to avoid the cache line where head is,
2358 * + 1 desc for context descriptor,
2359 * otherwise try next time
2361 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2362 ICE_DESCS_FOR_CTX_DESC)) {
2363 tx_ring->ring_stats->tx_stats.tx_busy++;
2364 return NETDEV_TX_BUSY;
2367 /* prefetch for bql data which is infrequently used */
2368 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2370 offload.tx_ring = tx_ring;
2372 /* record the location of the first descriptor for this packet */
2373 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2375 first->type = ICE_TX_BUF_SKB;
2376 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2377 first->gso_segs = 1;
2378 first->tx_flags = 0;
2380 /* prepare the VLAN tagging flags for Tx */
2381 ice_tx_prepare_vlan_flags(tx_ring, first);
2382 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2383 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2384 (ICE_TX_CTX_DESC_IL2TAG2 <<
2385 ICE_TXD_CTX_QW1_CMD_S));
2386 offload.cd_l2tag2 = first->vid;
2389 /* set up TSO offload */
2390 tso = ice_tso(first, &offload);
2394 /* always set up Tx checksum offload */
2395 csum = ice_tx_csum(first, &offload);
2399 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2400 eth = (struct ethhdr *)skb_mac_header(skb);
2401 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2402 eth->h_proto == htons(ETH_P_LLDP)) &&
2403 vsi->type == ICE_VSI_PF &&
2404 vsi->port_info->qos_cfg.is_sw_lldp))
2405 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2406 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2407 ICE_TXD_CTX_QW1_CMD_S);
2409 ice_tstamp(tx_ring, skb, first, &offload);
2410 if (ice_is_switchdev_running(vsi->back))
2411 ice_eswitch_set_target_vsi(skb, &offload);
2413 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2414 struct ice_tx_ctx_desc *cdesc;
2415 u16 i = tx_ring->next_to_use;
2417 /* grab the next descriptor */
2418 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2420 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2422 /* setup context descriptor */
2423 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2424 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2425 cdesc->rsvd = cpu_to_le16(0);
2426 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2429 ice_tx_map(tx_ring, first, &offload);
2430 return NETDEV_TX_OK;
2433 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2434 dev_kfree_skb_any(skb);
2435 return NETDEV_TX_OK;
2439 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2441 * @netdev: network interface device structure
2443 * Returns NETDEV_TX_OK if sent, else an error code
2445 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2447 struct ice_netdev_priv *np = netdev_priv(netdev);
2448 struct ice_vsi *vsi = np->vsi;
2449 struct ice_tx_ring *tx_ring;
2451 tx_ring = vsi->tx_rings[skb->queue_mapping];
2453 /* hardware can't handle really short frames, hardware padding works
2456 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2457 return NETDEV_TX_OK;
2459 return ice_xmit_frame_ring(skb, tx_ring);
2463 * ice_get_dscp_up - return the UP/TC value for a SKB
2464 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2465 * @skb: SKB to query for info to determine UP/TC
2467 * This function is to only be called when the PF is in L3 DSCP PFC mode
2469 static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2473 if (skb->protocol == htons(ETH_P_IP))
2474 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2475 else if (skb->protocol == htons(ETH_P_IPV6))
2476 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2478 return dcbcfg->dscp_map[dscp];
2482 ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2483 struct net_device *sb_dev)
2485 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2486 struct ice_dcbx_cfg *dcbcfg;
2488 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2489 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2490 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2492 return netdev_pick_tx(netdev, skb, sb_dev);
2496 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2497 * @tx_ring: tx_ring to clean
2499 void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2501 struct ice_vsi *vsi = tx_ring->vsi;
2502 s16 i = tx_ring->next_to_clean;
2503 int budget = ICE_DFLT_IRQ_WORK;
2504 struct ice_tx_desc *tx_desc;
2505 struct ice_tx_buf *tx_buf;
2507 tx_buf = &tx_ring->tx_buf[i];
2508 tx_desc = ICE_TX_DESC(tx_ring, i);
2509 i -= tx_ring->count;
2512 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2514 /* if next_to_watch is not set then there is no pending work */
2518 /* prevent any other reads prior to eop_desc */
2521 /* if the descriptor isn't done, no work to do */
2522 if (!(eop_desc->cmd_type_offset_bsz &
2523 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2526 /* clear next_to_watch to prevent false hangs */
2527 tx_buf->next_to_watch = NULL;
2528 tx_desc->buf_addr = 0;
2529 tx_desc->cmd_type_offset_bsz = 0;
2531 /* move past filter desc */
2536 i -= tx_ring->count;
2537 tx_buf = tx_ring->tx_buf;
2538 tx_desc = ICE_TX_DESC(tx_ring, 0);
2541 /* unmap the data header */
2542 if (dma_unmap_len(tx_buf, len))
2543 dma_unmap_single(tx_ring->dev,
2544 dma_unmap_addr(tx_buf, dma),
2545 dma_unmap_len(tx_buf, len),
2547 if (tx_buf->type == ICE_TX_BUF_DUMMY)
2548 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2550 /* clear next_to_watch to prevent false hangs */
2551 tx_buf->type = ICE_TX_BUF_EMPTY;
2552 tx_buf->tx_flags = 0;
2553 tx_buf->next_to_watch = NULL;
2554 dma_unmap_len_set(tx_buf, len, 0);
2555 tx_desc->buf_addr = 0;
2556 tx_desc->cmd_type_offset_bsz = 0;
2558 /* move past eop_desc for start of next FD desc */
2563 i -= tx_ring->count;
2564 tx_buf = tx_ring->tx_buf;
2565 tx_desc = ICE_TX_DESC(tx_ring, 0);
2569 } while (likely(budget));
2571 i += tx_ring->count;
2572 tx_ring->next_to_clean = i;
2574 /* re-enable interrupt if needed */
2575 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);