1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
7 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
8 * @pi: port information structure
9 * @info: Scheduler element information from firmware
11 * This function inserts the root node of the scheduling tree topology
14 static enum ice_status
15 ice_sched_add_root_node(struct ice_port_info *pi,
16 struct ice_aqc_txsched_elem_data *info)
18 struct ice_sched_node *root;
26 root = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*root), GFP_KERNEL);
28 return ICE_ERR_NO_MEMORY;
30 /* coverity[suspicious_sizeof] */
31 root->children = devm_kcalloc(ice_hw_to_dev(hw), hw->max_children[0],
32 sizeof(*root), GFP_KERNEL);
33 if (!root->children) {
34 devm_kfree(ice_hw_to_dev(hw), root);
35 return ICE_ERR_NO_MEMORY;
38 memcpy(&root->info, info, sizeof(*info));
44 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
45 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
46 * @teid: node TEID to search
48 * This function searches for a node matching the TEID in the scheduling tree
49 * from the SW DB. The search is recursive and is restricted by the number of
50 * layers it has searched through; stopping at the max supported layer.
52 * This function needs to be called when holding the port_info->sched_lock
54 struct ice_sched_node *
55 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
59 /* The TEID is same as that of the start_node */
60 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
63 /* The node has no children or is at the max layer */
64 if (!start_node->num_children ||
65 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
66 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
69 /* Check if TEID matches to any of the children nodes */
70 for (i = 0; i < start_node->num_children; i++)
71 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
72 return start_node->children[i];
74 /* Search within each child's sub-tree */
75 for (i = 0; i < start_node->num_children; i++) {
76 struct ice_sched_node *tmp;
78 tmp = ice_sched_find_node_by_teid(start_node->children[i],
88 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
89 * @hw: pointer to the HW struct
90 * @cmd_opc: cmd opcode
91 * @elems_req: number of elements to request
92 * @buf: pointer to buffer
93 * @buf_size: buffer size in bytes
94 * @elems_resp: returns total number of elements response
95 * @cd: pointer to command details structure or NULL
97 * This function sends a scheduling elements cmd (cmd_opc)
99 static enum ice_status
100 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
101 u16 elems_req, void *buf, u16 buf_size,
102 u16 *elems_resp, struct ice_sq_cd *cd)
104 struct ice_aqc_sched_elem_cmd *cmd;
105 struct ice_aq_desc desc;
106 enum ice_status status;
108 cmd = &desc.params.sched_elem_cmd;
109 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
110 cmd->num_elem_req = cpu_to_le16(elems_req);
111 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
112 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
113 if (!status && elems_resp)
114 *elems_resp = le16_to_cpu(cmd->num_elem_resp);
120 * ice_aq_query_sched_elems - query scheduler elements
121 * @hw: pointer to the HW struct
122 * @elems_req: number of elements to query
123 * @buf: pointer to buffer
124 * @buf_size: buffer size in bytes
125 * @elems_ret: returns total number of elements returned
126 * @cd: pointer to command details structure or NULL
128 * Query scheduling elements (0x0404)
131 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
132 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
133 u16 *elems_ret, struct ice_sq_cd *cd)
135 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
136 elems_req, (void *)buf, buf_size,
141 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
142 * @pi: port information structure
143 * @layer: Scheduler layer of the node
144 * @info: Scheduler element information from firmware
146 * This function inserts a scheduler node to the SW DB.
149 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
150 struct ice_aqc_txsched_elem_data *info)
152 struct ice_aqc_txsched_elem_data elem;
153 struct ice_sched_node *parent;
154 struct ice_sched_node *node;
155 enum ice_status status;
159 return ICE_ERR_PARAM;
163 /* A valid parent node should be there */
164 parent = ice_sched_find_node_by_teid(pi->root,
165 le32_to_cpu(info->parent_teid));
167 ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",
168 le32_to_cpu(info->parent_teid));
169 return ICE_ERR_PARAM;
172 /* query the current node information from FW before adding it
175 status = ice_sched_query_elem(hw, le32_to_cpu(info->node_teid), &elem);
179 node = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*node), GFP_KERNEL);
181 return ICE_ERR_NO_MEMORY;
182 if (hw->max_children[layer]) {
183 /* coverity[suspicious_sizeof] */
184 node->children = devm_kcalloc(ice_hw_to_dev(hw),
185 hw->max_children[layer],
186 sizeof(*node), GFP_KERNEL);
187 if (!node->children) {
188 devm_kfree(ice_hw_to_dev(hw), node);
189 return ICE_ERR_NO_MEMORY;
194 node->parent = parent;
195 node->tx_sched_layer = layer;
196 parent->children[parent->num_children++] = node;
202 * ice_aq_delete_sched_elems - delete scheduler elements
203 * @hw: pointer to the HW struct
204 * @grps_req: number of groups to delete
205 * @buf: pointer to buffer
206 * @buf_size: buffer size in bytes
207 * @grps_del: returns total number of elements deleted
208 * @cd: pointer to command details structure or NULL
210 * Delete scheduling elements (0x040F)
212 static enum ice_status
213 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
214 struct ice_aqc_delete_elem *buf, u16 buf_size,
215 u16 *grps_del, struct ice_sq_cd *cd)
217 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
218 grps_req, (void *)buf, buf_size,
223 * ice_sched_remove_elems - remove nodes from HW
224 * @hw: pointer to the HW struct
225 * @parent: pointer to the parent node
226 * @num_nodes: number of nodes
227 * @node_teids: array of node teids to be deleted
229 * This function remove nodes from HW
231 static enum ice_status
232 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
233 u16 num_nodes, u32 *node_teids)
235 struct ice_aqc_delete_elem *buf;
236 u16 i, num_groups_removed = 0;
237 enum ice_status status;
240 buf_size = struct_size(buf, teid, num_nodes);
241 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL);
243 return ICE_ERR_NO_MEMORY;
245 buf->hdr.parent_teid = parent->info.node_teid;
246 buf->hdr.num_elems = cpu_to_le16(num_nodes);
247 for (i = 0; i < num_nodes; i++)
248 buf->teid[i] = cpu_to_le32(node_teids[i]);
250 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
251 &num_groups_removed, NULL);
252 if (status || num_groups_removed != 1)
253 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
254 hw->adminq.sq_last_status);
256 devm_kfree(ice_hw_to_dev(hw), buf);
261 * ice_sched_get_first_node - get the first node of the given layer
262 * @pi: port information structure
263 * @parent: pointer the base node of the subtree
264 * @layer: layer number
266 * This function retrieves the first node of the given layer from the subtree
268 static struct ice_sched_node *
269 ice_sched_get_first_node(struct ice_port_info *pi,
270 struct ice_sched_node *parent, u8 layer)
272 return pi->sib_head[parent->tc_num][layer];
276 * ice_sched_get_tc_node - get pointer to TC node
277 * @pi: port information structure
280 * This function returns the TC node pointer
282 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
286 if (!pi || !pi->root)
288 for (i = 0; i < pi->root->num_children; i++)
289 if (pi->root->children[i]->tc_num == tc)
290 return pi->root->children[i];
295 * ice_free_sched_node - Free a Tx scheduler node from SW DB
296 * @pi: port information structure
297 * @node: pointer to the ice_sched_node struct
299 * This function frees up a node from SW DB as well as from HW
301 * This function needs to be called with the port_info->sched_lock held
303 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
305 struct ice_sched_node *parent;
306 struct ice_hw *hw = pi->hw;
309 /* Free the children before freeing up the parent node
310 * The parent array is updated below and that shifts the nodes
311 * in the array. So always pick the first child if num children > 0
313 while (node->num_children)
314 ice_free_sched_node(pi, node->children[0]);
316 /* Leaf, TC and root nodes can't be deleted by SW */
317 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
318 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
321 u32 teid = le32_to_cpu(node->info.node_teid);
323 ice_sched_remove_elems(hw, node->parent, 1, &teid);
325 parent = node->parent;
326 /* root has no parent */
328 struct ice_sched_node *p;
330 /* update the parent */
331 for (i = 0; i < parent->num_children; i++)
332 if (parent->children[i] == node) {
333 for (j = i + 1; j < parent->num_children; j++)
334 parent->children[j - 1] =
336 parent->num_children--;
340 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
342 if (p->sibling == node) {
343 p->sibling = node->sibling;
349 /* update the sibling head if head is getting removed */
350 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
351 pi->sib_head[node->tc_num][node->tx_sched_layer] =
355 /* leaf nodes have no children */
357 devm_kfree(ice_hw_to_dev(hw), node->children);
358 devm_kfree(ice_hw_to_dev(hw), node);
362 * ice_aq_get_dflt_topo - gets default scheduler topology
363 * @hw: pointer to the HW struct
364 * @lport: logical port number
365 * @buf: pointer to buffer
366 * @buf_size: buffer size in bytes
367 * @num_branches: returns total number of queue to port branches
368 * @cd: pointer to command details structure or NULL
370 * Get default scheduler topology (0x400)
372 static enum ice_status
373 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
374 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
375 u8 *num_branches, struct ice_sq_cd *cd)
377 struct ice_aqc_get_topo *cmd;
378 struct ice_aq_desc desc;
379 enum ice_status status;
381 cmd = &desc.params.get_topo;
382 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
383 cmd->port_num = lport;
384 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
385 if (!status && num_branches)
386 *num_branches = cmd->num_branches;
392 * ice_aq_add_sched_elems - adds scheduling element
393 * @hw: pointer to the HW struct
394 * @grps_req: the number of groups that are requested to be added
395 * @buf: pointer to buffer
396 * @buf_size: buffer size in bytes
397 * @grps_added: returns total number of groups added
398 * @cd: pointer to command details structure or NULL
400 * Add scheduling elements (0x0401)
402 static enum ice_status
403 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
404 struct ice_aqc_add_elem *buf, u16 buf_size,
405 u16 *grps_added, struct ice_sq_cd *cd)
407 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
408 grps_req, (void *)buf, buf_size,
413 * ice_aq_cfg_sched_elems - configures scheduler elements
414 * @hw: pointer to the HW struct
415 * @elems_req: number of elements to configure
416 * @buf: pointer to buffer
417 * @buf_size: buffer size in bytes
418 * @elems_cfgd: returns total number of elements configured
419 * @cd: pointer to command details structure or NULL
421 * Configure scheduling elements (0x0403)
423 static enum ice_status
424 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
425 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
426 u16 *elems_cfgd, struct ice_sq_cd *cd)
428 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
429 elems_req, (void *)buf, buf_size,
434 * ice_aq_move_sched_elems - move scheduler elements
435 * @hw: pointer to the HW struct
436 * @grps_req: number of groups to move
437 * @buf: pointer to buffer
438 * @buf_size: buffer size in bytes
439 * @grps_movd: returns total number of groups moved
440 * @cd: pointer to command details structure or NULL
442 * Move scheduling elements (0x0408)
444 static enum ice_status
445 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
446 struct ice_aqc_move_elem *buf, u16 buf_size,
447 u16 *grps_movd, struct ice_sq_cd *cd)
449 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
450 grps_req, (void *)buf, buf_size,
455 * ice_aq_suspend_sched_elems - suspend scheduler elements
456 * @hw: pointer to the HW struct
457 * @elems_req: number of elements to suspend
458 * @buf: pointer to buffer
459 * @buf_size: buffer size in bytes
460 * @elems_ret: returns total number of elements suspended
461 * @cd: pointer to command details structure or NULL
463 * Suspend scheduling elements (0x0409)
465 static enum ice_status
466 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
467 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
469 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
470 elems_req, (void *)buf, buf_size,
475 * ice_aq_resume_sched_elems - resume scheduler elements
476 * @hw: pointer to the HW struct
477 * @elems_req: number of elements to resume
478 * @buf: pointer to buffer
479 * @buf_size: buffer size in bytes
480 * @elems_ret: returns total number of elements resumed
481 * @cd: pointer to command details structure or NULL
483 * resume scheduling elements (0x040A)
485 static enum ice_status
486 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
487 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
489 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
490 elems_req, (void *)buf, buf_size,
495 * ice_aq_query_sched_res - query scheduler resource
496 * @hw: pointer to the HW struct
497 * @buf_size: buffer size in bytes
498 * @buf: pointer to buffer
499 * @cd: pointer to command details structure or NULL
501 * Query scheduler resource allocation (0x0412)
503 static enum ice_status
504 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
505 struct ice_aqc_query_txsched_res_resp *buf,
506 struct ice_sq_cd *cd)
508 struct ice_aq_desc desc;
510 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
511 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
515 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
516 * @hw: pointer to the HW struct
517 * @num_nodes: number of nodes
518 * @node_teids: array of node teids to be suspended or resumed
519 * @suspend: true means suspend / false means resume
521 * This function suspends or resumes HW nodes
523 static enum ice_status
524 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
527 u16 i, buf_size, num_elem_ret = 0;
528 enum ice_status status;
531 buf_size = sizeof(*buf) * num_nodes;
532 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL);
534 return ICE_ERR_NO_MEMORY;
536 for (i = 0; i < num_nodes; i++)
537 buf[i] = cpu_to_le32(node_teids[i]);
540 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
541 buf_size, &num_elem_ret,
544 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
545 buf_size, &num_elem_ret,
547 if (status || num_elem_ret != num_nodes)
548 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
550 devm_kfree(ice_hw_to_dev(hw), buf);
555 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
556 * @hw: pointer to the HW struct
557 * @vsi_handle: VSI handle
559 * @new_numqs: number of queues
561 static enum ice_status
562 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
564 struct ice_vsi_ctx *vsi_ctx;
565 struct ice_q_ctx *q_ctx;
567 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
569 return ICE_ERR_PARAM;
570 /* allocate LAN queue contexts */
571 if (!vsi_ctx->lan_q_ctx[tc]) {
572 vsi_ctx->lan_q_ctx[tc] = devm_kcalloc(ice_hw_to_dev(hw),
576 if (!vsi_ctx->lan_q_ctx[tc])
577 return ICE_ERR_NO_MEMORY;
578 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
581 /* num queues are increased, update the queue contexts */
582 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
583 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
585 q_ctx = devm_kcalloc(ice_hw_to_dev(hw), new_numqs,
586 sizeof(*q_ctx), GFP_KERNEL);
588 return ICE_ERR_NO_MEMORY;
589 memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
590 prev_num * sizeof(*q_ctx));
591 devm_kfree(ice_hw_to_dev(hw), vsi_ctx->lan_q_ctx[tc]);
592 vsi_ctx->lan_q_ctx[tc] = q_ctx;
593 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
599 * ice_alloc_rdma_q_ctx - allocate RDMA queue contexts for the given VSI and TC
600 * @hw: pointer to the HW struct
601 * @vsi_handle: VSI handle
603 * @new_numqs: number of queues
605 static enum ice_status
606 ice_alloc_rdma_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
608 struct ice_vsi_ctx *vsi_ctx;
609 struct ice_q_ctx *q_ctx;
611 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
613 return ICE_ERR_PARAM;
614 /* allocate RDMA queue contexts */
615 if (!vsi_ctx->rdma_q_ctx[tc]) {
616 vsi_ctx->rdma_q_ctx[tc] = devm_kcalloc(ice_hw_to_dev(hw),
620 if (!vsi_ctx->rdma_q_ctx[tc])
621 return ICE_ERR_NO_MEMORY;
622 vsi_ctx->num_rdma_q_entries[tc] = new_numqs;
625 /* num queues are increased, update the queue contexts */
626 if (new_numqs > vsi_ctx->num_rdma_q_entries[tc]) {
627 u16 prev_num = vsi_ctx->num_rdma_q_entries[tc];
629 q_ctx = devm_kcalloc(ice_hw_to_dev(hw), new_numqs,
630 sizeof(*q_ctx), GFP_KERNEL);
632 return ICE_ERR_NO_MEMORY;
633 memcpy(q_ctx, vsi_ctx->rdma_q_ctx[tc],
634 prev_num * sizeof(*q_ctx));
635 devm_kfree(ice_hw_to_dev(hw), vsi_ctx->rdma_q_ctx[tc]);
636 vsi_ctx->rdma_q_ctx[tc] = q_ctx;
637 vsi_ctx->num_rdma_q_entries[tc] = new_numqs;
643 * ice_aq_rl_profile - performs a rate limiting task
644 * @hw: pointer to the HW struct
645 * @opcode: opcode for add, query, or remove profile(s)
646 * @num_profiles: the number of profiles
647 * @buf: pointer to buffer
648 * @buf_size: buffer size in bytes
649 * @num_processed: number of processed add or remove profile(s) to return
650 * @cd: pointer to command details structure
652 * RL profile function to add, query, or remove profile(s)
654 static enum ice_status
655 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
656 u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
657 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
659 struct ice_aqc_rl_profile *cmd;
660 struct ice_aq_desc desc;
661 enum ice_status status;
663 cmd = &desc.params.rl_profile;
665 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
666 desc.flags |= cpu_to_le16(ICE_AQ_FLAG_RD);
667 cmd->num_profiles = cpu_to_le16(num_profiles);
668 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
669 if (!status && num_processed)
670 *num_processed = le16_to_cpu(cmd->num_processed);
675 * ice_aq_add_rl_profile - adds rate limiting profile(s)
676 * @hw: pointer to the HW struct
677 * @num_profiles: the number of profile(s) to be add
678 * @buf: pointer to buffer
679 * @buf_size: buffer size in bytes
680 * @num_profiles_added: total number of profiles added to return
681 * @cd: pointer to command details structure
683 * Add RL profile (0x0410)
685 static enum ice_status
686 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
687 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
688 u16 *num_profiles_added, struct ice_sq_cd *cd)
690 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
691 buf, buf_size, num_profiles_added, cd);
695 * ice_aq_remove_rl_profile - removes RL profile(s)
696 * @hw: pointer to the HW struct
697 * @num_profiles: the number of profile(s) to remove
698 * @buf: pointer to buffer
699 * @buf_size: buffer size in bytes
700 * @num_profiles_removed: total number of profiles removed to return
701 * @cd: pointer to command details structure or NULL
703 * Remove RL profile (0x0415)
705 static enum ice_status
706 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
707 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
708 u16 *num_profiles_removed, struct ice_sq_cd *cd)
710 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
711 num_profiles, buf, buf_size,
712 num_profiles_removed, cd);
716 * ice_sched_del_rl_profile - remove RL profile
717 * @hw: pointer to the HW struct
718 * @rl_info: rate limit profile information
720 * If the profile ID is not referenced anymore, it removes profile ID with
721 * its associated parameters from HW DB,and locally. The caller needs to
722 * hold scheduler lock.
724 static enum ice_status
725 ice_sched_del_rl_profile(struct ice_hw *hw,
726 struct ice_aqc_rl_profile_info *rl_info)
728 struct ice_aqc_rl_profile_elem *buf;
729 u16 num_profiles_removed;
730 enum ice_status status;
731 u16 num_profiles = 1;
733 if (rl_info->prof_id_ref != 0)
734 return ICE_ERR_IN_USE;
736 /* Safe to remove profile ID */
737 buf = &rl_info->profile;
738 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
739 &num_profiles_removed, NULL);
740 if (status || num_profiles_removed != num_profiles)
743 /* Delete stale entry now */
744 list_del(&rl_info->list_entry);
745 devm_kfree(ice_hw_to_dev(hw), rl_info);
750 * ice_sched_clear_rl_prof - clears RL prof entries
751 * @pi: port information structure
753 * This function removes all RL profile from HW as well as from SW DB.
755 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
759 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
760 struct ice_aqc_rl_profile_info *rl_prof_elem;
761 struct ice_aqc_rl_profile_info *rl_prof_tmp;
763 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp,
764 &pi->rl_prof_list[ln], list_entry) {
765 struct ice_hw *hw = pi->hw;
766 enum ice_status status;
768 rl_prof_elem->prof_id_ref = 0;
769 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
771 ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
772 /* On error, free mem required */
773 list_del(&rl_prof_elem->list_entry);
774 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem);
781 * ice_sched_clear_agg - clears the aggregator related information
782 * @hw: pointer to the hardware structure
784 * This function removes aggregator list and free up aggregator related memory
785 * previously allocated.
787 void ice_sched_clear_agg(struct ice_hw *hw)
789 struct ice_sched_agg_info *agg_info;
790 struct ice_sched_agg_info *atmp;
792 list_for_each_entry_safe(agg_info, atmp, &hw->agg_list, list_entry) {
793 struct ice_sched_agg_vsi_info *agg_vsi_info;
794 struct ice_sched_agg_vsi_info *vtmp;
796 list_for_each_entry_safe(agg_vsi_info, vtmp,
797 &agg_info->agg_vsi_list, list_entry) {
798 list_del(&agg_vsi_info->list_entry);
799 devm_kfree(ice_hw_to_dev(hw), agg_vsi_info);
801 list_del(&agg_info->list_entry);
802 devm_kfree(ice_hw_to_dev(hw), agg_info);
807 * ice_sched_clear_tx_topo - clears the scheduler tree nodes
808 * @pi: port information structure
810 * This function removes all the nodes from HW as well as from SW DB.
812 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
816 /* remove RL profiles related lists */
817 ice_sched_clear_rl_prof(pi);
819 ice_free_sched_node(pi, pi->root);
825 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
826 * @pi: port information structure
828 * Cleanup scheduling elements from SW DB
830 void ice_sched_clear_port(struct ice_port_info *pi)
832 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
835 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
836 mutex_lock(&pi->sched_lock);
837 ice_sched_clear_tx_topo(pi);
838 mutex_unlock(&pi->sched_lock);
839 mutex_destroy(&pi->sched_lock);
843 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
844 * @hw: pointer to the HW struct
846 * Cleanup scheduling elements from SW DB for all the ports
848 void ice_sched_cleanup_all(struct ice_hw *hw)
853 if (hw->layer_info) {
854 devm_kfree(ice_hw_to_dev(hw), hw->layer_info);
855 hw->layer_info = NULL;
858 ice_sched_clear_port(hw->port_info);
860 hw->num_tx_sched_layers = 0;
861 hw->num_tx_sched_phys_layers = 0;
862 hw->flattened_layers = 0;
867 * ice_sched_add_elems - add nodes to HW and SW DB
868 * @pi: port information structure
869 * @tc_node: pointer to the branch node
870 * @parent: pointer to the parent node
871 * @layer: layer number to add nodes
872 * @num_nodes: number of nodes
873 * @num_nodes_added: pointer to num nodes added
874 * @first_node_teid: if new nodes are added then return the TEID of first node
876 * This function add nodes to HW as well as to SW DB for a given layer
878 static enum ice_status
879 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
880 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
881 u16 *num_nodes_added, u32 *first_node_teid)
883 struct ice_sched_node *prev, *new_node;
884 struct ice_aqc_add_elem *buf;
885 u16 i, num_groups_added = 0;
886 enum ice_status status = 0;
887 struct ice_hw *hw = pi->hw;
891 buf_size = struct_size(buf, generic, num_nodes);
892 buf = devm_kzalloc(ice_hw_to_dev(hw), buf_size, GFP_KERNEL);
894 return ICE_ERR_NO_MEMORY;
896 buf->hdr.parent_teid = parent->info.node_teid;
897 buf->hdr.num_elems = cpu_to_le16(num_nodes);
898 for (i = 0; i < num_nodes; i++) {
899 buf->generic[i].parent_teid = parent->info.node_teid;
900 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
901 buf->generic[i].data.valid_sections =
902 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
903 ICE_AQC_ELEM_VALID_EIR;
904 buf->generic[i].data.generic = 0;
905 buf->generic[i].data.cir_bw.bw_profile_idx =
906 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
907 buf->generic[i].data.cir_bw.bw_alloc =
908 cpu_to_le16(ICE_SCHED_DFLT_BW_WT);
909 buf->generic[i].data.eir_bw.bw_profile_idx =
910 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
911 buf->generic[i].data.eir_bw.bw_alloc =
912 cpu_to_le16(ICE_SCHED_DFLT_BW_WT);
915 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
916 &num_groups_added, NULL);
917 if (status || num_groups_added != 1) {
918 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
919 hw->adminq.sq_last_status);
920 devm_kfree(ice_hw_to_dev(hw), buf);
924 *num_nodes_added = num_nodes;
925 /* add nodes to the SW DB */
926 for (i = 0; i < num_nodes; i++) {
927 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
929 ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",
934 teid = le32_to_cpu(buf->generic[i].node_teid);
935 new_node = ice_sched_find_node_by_teid(parent, teid);
937 ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
941 new_node->sibling = NULL;
942 new_node->tc_num = tc_node->tc_num;
944 /* add it to previous node sibling pointer */
945 /* Note: siblings are not linked across branches */
946 prev = ice_sched_get_first_node(pi, tc_node, layer);
947 if (prev && prev != new_node) {
948 while (prev->sibling)
949 prev = prev->sibling;
950 prev->sibling = new_node;
953 /* initialize the sibling head */
954 if (!pi->sib_head[tc_node->tc_num][layer])
955 pi->sib_head[tc_node->tc_num][layer] = new_node;
958 *first_node_teid = teid;
961 devm_kfree(ice_hw_to_dev(hw), buf);
966 * ice_sched_add_nodes_to_hw_layer - Add nodes to HW layer
967 * @pi: port information structure
968 * @tc_node: pointer to TC node
969 * @parent: pointer to parent node
970 * @layer: layer number to add nodes
971 * @num_nodes: number of nodes to be added
972 * @first_node_teid: pointer to the first node TEID
973 * @num_nodes_added: pointer to number of nodes added
975 * Add nodes into specific HW layer.
977 static enum ice_status
978 ice_sched_add_nodes_to_hw_layer(struct ice_port_info *pi,
979 struct ice_sched_node *tc_node,
980 struct ice_sched_node *parent, u8 layer,
981 u16 num_nodes, u32 *first_node_teid,
982 u16 *num_nodes_added)
986 *num_nodes_added = 0;
991 if (!parent || layer < pi->hw->sw_entry_point_layer)
992 return ICE_ERR_PARAM;
994 /* max children per node per layer */
995 max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];
997 /* current number of children + required nodes exceed max children */
998 if ((parent->num_children + num_nodes) > max_child_nodes) {
999 /* Fail if the parent is a TC node */
1000 if (parent == tc_node)
1002 return ICE_ERR_MAX_LIMIT;
1005 return ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1006 num_nodes_added, first_node_teid);
1010 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
1011 * @pi: port information structure
1012 * @tc_node: pointer to TC node
1013 * @parent: pointer to parent node
1014 * @layer: layer number to add nodes
1015 * @num_nodes: number of nodes to be added
1016 * @first_node_teid: pointer to the first node TEID
1017 * @num_nodes_added: pointer to number of nodes added
1019 * This function add nodes to a given layer.
1021 static enum ice_status
1022 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
1023 struct ice_sched_node *tc_node,
1024 struct ice_sched_node *parent, u8 layer,
1025 u16 num_nodes, u32 *first_node_teid,
1026 u16 *num_nodes_added)
1028 u32 *first_teid_ptr = first_node_teid;
1029 u16 new_num_nodes = num_nodes;
1030 enum ice_status status = 0;
1032 *num_nodes_added = 0;
1033 while (*num_nodes_added < num_nodes) {
1034 u16 max_child_nodes, num_added = 0;
1035 /* cppcheck-suppress unusedVariable */
1038 status = ice_sched_add_nodes_to_hw_layer(pi, tc_node, parent,
1039 layer, new_num_nodes,
1043 *num_nodes_added += num_added;
1044 /* added more nodes than requested ? */
1045 if (*num_nodes_added > num_nodes) {
1046 ice_debug(pi->hw, ICE_DBG_SCHED, "added extra nodes %d %d\n", num_nodes,
1048 status = ICE_ERR_CFG;
1051 /* break if all the nodes are added successfully */
1052 if (!status && (*num_nodes_added == num_nodes))
1054 /* break if the error is not max limit */
1055 if (status && status != ICE_ERR_MAX_LIMIT)
1057 /* Exceeded the max children */
1058 max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];
1059 /* utilize all the spaces if the parent is not full */
1060 if (parent->num_children < max_child_nodes) {
1061 new_num_nodes = max_child_nodes - parent->num_children;
1063 /* This parent is full, try the next sibling */
1064 parent = parent->sibling;
1065 /* Don't modify the first node TEID memory if the
1066 * first node was added already in the above call.
1067 * Instead send some temp memory for all other
1071 first_teid_ptr = &temp;
1073 new_num_nodes = num_nodes - *num_nodes_added;
1080 * ice_sched_get_qgrp_layer - get the current queue group layer number
1081 * @hw: pointer to the HW struct
1083 * This function returns the current queue group layer number
1085 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1087 /* It's always total layers - 1, the array is 0 relative so -2 */
1088 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1092 * ice_sched_get_vsi_layer - get the current VSI layer number
1093 * @hw: pointer to the HW struct
1095 * This function returns the current VSI layer number
1097 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1099 /* Num Layers VSI layer
1102 * 5 or less sw_entry_point_layer
1104 /* calculate the VSI layer based on number of layers. */
1105 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1106 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1108 if (layer > hw->sw_entry_point_layer)
1111 return hw->sw_entry_point_layer;
1115 * ice_sched_get_agg_layer - get the current aggregator layer number
1116 * @hw: pointer to the HW struct
1118 * This function returns the current aggregator layer number
1120 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1122 /* Num Layers aggregator layer
1124 * 7 or less sw_entry_point_layer
1126 /* calculate the aggregator layer based on number of layers. */
1127 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1128 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1130 if (layer > hw->sw_entry_point_layer)
1133 return hw->sw_entry_point_layer;
1137 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1138 * @pi: port information structure
1140 * This function removes the leaf node that was created by the FW
1141 * during initialization
1143 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1145 struct ice_sched_node *node;
1149 if (!node->num_children)
1151 node = node->children[0];
1153 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1154 u32 teid = le32_to_cpu(node->info.node_teid);
1155 enum ice_status status;
1157 /* remove the default leaf node */
1158 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1160 ice_free_sched_node(pi, node);
1165 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1166 * @pi: port information structure
1168 * This function frees all the nodes except root and TC that were created by
1169 * the FW during initialization
1171 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1173 struct ice_sched_node *node;
1175 ice_rm_dflt_leaf_node(pi);
1177 /* remove the default nodes except TC and root nodes */
1180 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1181 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1182 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1183 ice_free_sched_node(pi, node);
1187 if (!node->num_children)
1189 node = node->children[0];
1194 * ice_sched_init_port - Initialize scheduler by querying information from FW
1195 * @pi: port info structure for the tree to cleanup
1197 * This function is the initial call to find the total number of Tx scheduler
1198 * resources, default topology created by firmware and storing the information
1201 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1203 struct ice_aqc_get_topo_elem *buf;
1204 enum ice_status status;
1211 return ICE_ERR_PARAM;
1214 /* Query the Default Topology from FW */
1215 buf = devm_kzalloc(ice_hw_to_dev(hw), ICE_AQ_MAX_BUF_LEN, GFP_KERNEL);
1217 return ICE_ERR_NO_MEMORY;
1219 /* Query default scheduling tree topology */
1220 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1221 &num_branches, NULL);
1225 /* num_branches should be between 1-8 */
1226 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1227 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1229 status = ICE_ERR_PARAM;
1233 /* get the number of elements on the default/first branch */
1234 num_elems = le16_to_cpu(buf[0].hdr.num_elems);
1236 /* num_elems should always be between 1-9 */
1237 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1238 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1240 status = ICE_ERR_PARAM;
1244 /* If the last node is a leaf node then the index of the queue group
1245 * layer is two less than the number of elements.
1247 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1248 ICE_AQC_ELEM_TYPE_LEAF)
1249 pi->last_node_teid =
1250 le32_to_cpu(buf[0].generic[num_elems - 2].node_teid);
1252 pi->last_node_teid =
1253 le32_to_cpu(buf[0].generic[num_elems - 1].node_teid);
1255 /* Insert the Tx Sched root node */
1256 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1260 /* Parse the default tree and cache the information */
1261 for (i = 0; i < num_branches; i++) {
1262 num_elems = le16_to_cpu(buf[i].hdr.num_elems);
1264 /* Skip root element as already inserted */
1265 for (j = 1; j < num_elems; j++) {
1266 /* update the sw entry point */
1267 if (buf[0].generic[j].data.elem_type ==
1268 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1269 hw->sw_entry_point_layer = j;
1271 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1277 /* Remove the default nodes. */
1279 ice_sched_rm_dflt_nodes(pi);
1281 /* initialize the port for handling the scheduler tree */
1282 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1283 mutex_init(&pi->sched_lock);
1284 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1285 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1288 if (status && pi->root) {
1289 ice_free_sched_node(pi, pi->root);
1293 devm_kfree(ice_hw_to_dev(hw), buf);
1298 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1299 * @hw: pointer to the HW struct
1301 * query FW for allocated scheduler resources and store in HW struct
1303 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1305 struct ice_aqc_query_txsched_res_resp *buf;
1306 enum ice_status status = 0;
1313 buf = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*buf), GFP_KERNEL);
1315 return ICE_ERR_NO_MEMORY;
1317 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1319 goto sched_query_out;
1321 hw->num_tx_sched_layers = le16_to_cpu(buf->sched_props.logical_levels);
1322 hw->num_tx_sched_phys_layers =
1323 le16_to_cpu(buf->sched_props.phys_levels);
1324 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1325 hw->max_cgds = buf->sched_props.max_pf_cgds;
1327 /* max sibling group size of current layer refers to the max children
1328 * of the below layer node.
1329 * layer 1 node max children will be layer 2 max sibling group size
1330 * layer 2 node max children will be layer 3 max sibling group size
1331 * and so on. This array will be populated from root (index 0) to
1332 * qgroup layer 7. Leaf node has no children.
1334 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1335 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1336 hw->max_children[i] = le16_to_cpu(max_sibl);
1339 hw->layer_info = devm_kmemdup(ice_hw_to_dev(hw), buf->layer_props,
1340 (hw->num_tx_sched_layers *
1341 sizeof(*hw->layer_info)),
1343 if (!hw->layer_info) {
1344 status = ICE_ERR_NO_MEMORY;
1345 goto sched_query_out;
1349 devm_kfree(ice_hw_to_dev(hw), buf);
1354 * ice_sched_get_psm_clk_freq - determine the PSM clock frequency
1355 * @hw: pointer to the HW struct
1357 * Determine the PSM clock frequency and store in HW struct
1359 void ice_sched_get_psm_clk_freq(struct ice_hw *hw)
1363 val = rd32(hw, GLGEN_CLKSTAT_SRC);
1364 clk_src = (val & GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M) >>
1365 GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_S;
1367 #define PSM_CLK_SRC_367_MHZ 0x0
1368 #define PSM_CLK_SRC_416_MHZ 0x1
1369 #define PSM_CLK_SRC_446_MHZ 0x2
1370 #define PSM_CLK_SRC_390_MHZ 0x3
1373 case PSM_CLK_SRC_367_MHZ:
1374 hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;
1376 case PSM_CLK_SRC_416_MHZ:
1377 hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;
1379 case PSM_CLK_SRC_446_MHZ:
1380 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1382 case PSM_CLK_SRC_390_MHZ:
1383 hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;
1386 ice_debug(hw, ICE_DBG_SCHED, "PSM clk_src unexpected %u\n",
1388 /* fall back to a safe default */
1389 hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;
1394 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1395 * @hw: pointer to the HW struct
1396 * @base: pointer to the base node
1397 * @node: pointer to the node to search
1399 * This function checks whether a given node is part of the base node
1403 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1404 struct ice_sched_node *node)
1408 for (i = 0; i < base->num_children; i++) {
1409 struct ice_sched_node *child = base->children[i];
1414 if (child->tx_sched_layer > node->tx_sched_layer)
1417 /* this recursion is intentional, and wouldn't
1418 * go more than 8 calls
1420 if (ice_sched_find_node_in_subtree(hw, child, node))
1427 * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node
1428 * @pi: port information structure
1429 * @vsi_node: software VSI handle
1430 * @qgrp_node: first queue group node identified for scanning
1431 * @owner: LAN or RDMA
1433 * This function retrieves a free LAN or RDMA queue group node by scanning
1434 * qgrp_node and its siblings for the queue group with the fewest number
1435 * of queues currently assigned.
1437 static struct ice_sched_node *
1438 ice_sched_get_free_qgrp(struct ice_port_info *pi,
1439 struct ice_sched_node *vsi_node,
1440 struct ice_sched_node *qgrp_node, u8 owner)
1442 struct ice_sched_node *min_qgrp;
1447 min_children = qgrp_node->num_children;
1450 min_qgrp = qgrp_node;
1451 /* scan all queue groups until find a node which has less than the
1452 * minimum number of children. This way all queue group nodes get
1453 * equal number of shares and active. The bandwidth will be equally
1454 * distributed across all queues.
1457 /* make sure the qgroup node is part of the VSI subtree */
1458 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1459 if (qgrp_node->num_children < min_children &&
1460 qgrp_node->owner == owner) {
1461 /* replace the new min queue group node */
1462 min_qgrp = qgrp_node;
1463 min_children = min_qgrp->num_children;
1464 /* break if it has no children, */
1468 qgrp_node = qgrp_node->sibling;
1474 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1475 * @pi: port information structure
1476 * @vsi_handle: software VSI handle
1477 * @tc: branch number
1478 * @owner: LAN or RDMA
1480 * This function retrieves a free LAN or RDMA queue group node
1482 struct ice_sched_node *
1483 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1486 struct ice_sched_node *vsi_node, *qgrp_node;
1487 struct ice_vsi_ctx *vsi_ctx;
1491 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1492 max_children = pi->hw->max_children[qgrp_layer];
1494 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1497 vsi_node = vsi_ctx->sched.vsi_node[tc];
1498 /* validate invalid VSI ID */
1502 /* get the first queue group node from VSI sub-tree */
1503 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1505 /* make sure the qgroup node is part of the VSI subtree */
1506 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1507 if (qgrp_node->num_children < max_children &&
1508 qgrp_node->owner == owner)
1510 qgrp_node = qgrp_node->sibling;
1513 /* Select the best queue group */
1514 return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
1518 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1519 * @pi: pointer to the port information structure
1520 * @tc_node: pointer to the TC node
1521 * @vsi_handle: software VSI handle
1523 * This function retrieves a VSI node for a given VSI ID from a given
1526 static struct ice_sched_node *
1527 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1530 struct ice_sched_node *node;
1533 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1534 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1536 /* Check whether it already exists */
1538 if (node->vsi_handle == vsi_handle)
1540 node = node->sibling;
1547 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1548 * @pi: pointer to the port information structure
1549 * @tc_node: pointer to the TC node
1550 * @agg_id: aggregator ID
1552 * This function retrieves an aggregator node for a given aggregator ID from
1555 static struct ice_sched_node *
1556 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1559 struct ice_sched_node *node;
1560 struct ice_hw *hw = pi->hw;
1565 agg_layer = ice_sched_get_agg_layer(hw);
1566 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1568 /* Check whether it already exists */
1570 if (node->agg_id == agg_id)
1572 node = node->sibling;
1579 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1580 * @hw: pointer to the HW struct
1581 * @num_qs: number of queues
1582 * @num_nodes: num nodes array
1584 * This function calculates the number of VSI child nodes based on the
1588 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1593 qgl = ice_sched_get_qgrp_layer(hw);
1594 vsil = ice_sched_get_vsi_layer(hw);
1596 /* calculate num nodes from queue group to VSI layer */
1597 for (i = qgl; i > vsil; i--) {
1598 /* round to the next integer if there is a remainder */
1599 num = DIV_ROUND_UP(num, hw->max_children[i]);
1601 /* need at least one node */
1602 num_nodes[i] = num ? num : 1;
1607 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1608 * @pi: port information structure
1609 * @vsi_handle: software VSI handle
1610 * @tc_node: pointer to the TC node
1611 * @num_nodes: pointer to the num nodes that needs to be added per layer
1612 * @owner: node owner (LAN or RDMA)
1614 * This function adds the VSI child nodes to tree. It gets called for
1615 * LAN and RDMA separately.
1617 static enum ice_status
1618 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1619 struct ice_sched_node *tc_node, u16 *num_nodes,
1622 struct ice_sched_node *parent, *node;
1623 struct ice_hw *hw = pi->hw;
1624 enum ice_status status;
1625 u32 first_node_teid;
1629 qgl = ice_sched_get_qgrp_layer(hw);
1630 vsil = ice_sched_get_vsi_layer(hw);
1631 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1632 for (i = vsil + 1; i <= qgl; i++) {
1636 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1640 if (status || num_nodes[i] != num_added)
1643 /* The newly added node can be a new parent for the next
1647 parent = ice_sched_find_node_by_teid(tc_node,
1651 node->owner = owner;
1652 node = node->sibling;
1655 parent = parent->children[0];
1663 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1664 * @pi: pointer to the port info structure
1665 * @tc_node: pointer to TC node
1666 * @num_nodes: pointer to num nodes array
1668 * This function calculates the number of supported nodes needed to add this
1669 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1673 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1674 struct ice_sched_node *tc_node, u16 *num_nodes)
1676 struct ice_sched_node *node;
1680 vsil = ice_sched_get_vsi_layer(pi->hw);
1681 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1682 /* Add intermediate nodes if TC has no children and
1683 * need at least one node for VSI
1685 if (!tc_node->num_children || i == vsil) {
1688 /* If intermediate nodes are reached max children
1689 * then add a new one.
1691 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1692 /* scan all the siblings */
1694 if (node->num_children < pi->hw->max_children[i])
1696 node = node->sibling;
1699 /* tree has one intermediate node to add this new VSI.
1700 * So no need to calculate supported nodes for below
1705 /* all the nodes are full, allocate a new one */
1711 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1712 * @pi: port information structure
1713 * @vsi_handle: software VSI handle
1714 * @tc_node: pointer to TC node
1715 * @num_nodes: pointer to num nodes array
1717 * This function adds the VSI supported nodes into Tx tree including the
1718 * VSI, its parent and intermediate nodes in below layers
1720 static enum ice_status
1721 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1722 struct ice_sched_node *tc_node, u16 *num_nodes)
1724 struct ice_sched_node *parent = tc_node;
1725 enum ice_status status;
1726 u32 first_node_teid;
1731 return ICE_ERR_PARAM;
1733 vsil = ice_sched_get_vsi_layer(pi->hw);
1734 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1735 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1739 if (status || num_nodes[i] != num_added)
1742 /* The newly added node can be a new parent for the next
1746 parent = ice_sched_find_node_by_teid(tc_node,
1749 parent = parent->children[0];
1755 parent->vsi_handle = vsi_handle;
1762 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1763 * @pi: port information structure
1764 * @vsi_handle: software VSI handle
1767 * This function adds a new VSI into scheduler tree
1769 static enum ice_status
1770 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1772 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1773 struct ice_sched_node *tc_node;
1775 tc_node = ice_sched_get_tc_node(pi, tc);
1777 return ICE_ERR_PARAM;
1779 /* calculate number of supported nodes needed for this VSI */
1780 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1782 /* add VSI supported nodes to TC subtree */
1783 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1788 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1789 * @pi: port information structure
1790 * @vsi_handle: software VSI handle
1792 * @new_numqs: new number of max queues
1793 * @owner: owner of this subtree
1795 * This function updates the VSI child nodes based on the number of queues
1797 static enum ice_status
1798 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1799 u8 tc, u16 new_numqs, u8 owner)
1801 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1802 struct ice_sched_node *vsi_node;
1803 struct ice_sched_node *tc_node;
1804 struct ice_vsi_ctx *vsi_ctx;
1805 enum ice_status status = 0;
1806 struct ice_hw *hw = pi->hw;
1809 tc_node = ice_sched_get_tc_node(pi, tc);
1813 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1817 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1819 return ICE_ERR_PARAM;
1821 if (owner == ICE_SCHED_NODE_OWNER_LAN)
1822 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1824 prev_numqs = vsi_ctx->sched.max_rdmaq[tc];
1825 /* num queues are not changed or less than the previous number */
1826 if (new_numqs <= prev_numqs)
1828 if (owner == ICE_SCHED_NODE_OWNER_LAN) {
1829 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1833 status = ice_alloc_rdma_q_ctx(hw, vsi_handle, tc, new_numqs);
1839 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1840 /* Keep the max number of queue configuration all the time. Update the
1841 * tree only if number of queues > previous number of queues. This may
1842 * leave some extra nodes in the tree if number of queues < previous
1843 * number but that wouldn't harm anything. Removing those extra nodes
1844 * may complicate the code if those nodes are part of SRL or
1845 * individually rate limited.
1847 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1848 new_num_nodes, owner);
1851 if (owner == ICE_SCHED_NODE_OWNER_LAN)
1852 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1854 vsi_ctx->sched.max_rdmaq[tc] = new_numqs;
1860 * ice_sched_cfg_vsi - configure the new/existing VSI
1861 * @pi: port information structure
1862 * @vsi_handle: software VSI handle
1864 * @maxqs: max number of queues
1865 * @owner: LAN or RDMA
1866 * @enable: TC enabled or disabled
1868 * This function adds/updates VSI nodes based on the number of queues. If TC is
1869 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1870 * disabled then suspend the VSI if it is not already.
1873 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1874 u8 owner, bool enable)
1876 struct ice_sched_node *vsi_node, *tc_node;
1877 struct ice_vsi_ctx *vsi_ctx;
1878 enum ice_status status = 0;
1879 struct ice_hw *hw = pi->hw;
1881 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1882 tc_node = ice_sched_get_tc_node(pi, tc);
1884 return ICE_ERR_PARAM;
1885 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1887 return ICE_ERR_PARAM;
1888 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1890 /* suspend the VSI if TC is not enabled */
1892 if (vsi_node && vsi_node->in_use) {
1893 u32 teid = le32_to_cpu(vsi_node->info.node_teid);
1895 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1898 vsi_node->in_use = false;
1903 /* TC is enabled, if it is a new VSI then add it to the tree */
1905 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1909 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1913 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1914 vsi_node->in_use = true;
1915 /* invalidate the max queues whenever VSI gets added first time
1916 * into the scheduler tree (boot or after reset). We need to
1917 * recreate the child nodes all the time in these cases.
1919 vsi_ctx->sched.max_lanq[tc] = 0;
1920 vsi_ctx->sched.max_rdmaq[tc] = 0;
1923 /* update the VSI child nodes */
1924 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1929 /* TC is enabled, resume the VSI if it is in the suspend state */
1930 if (!vsi_node->in_use) {
1931 u32 teid = le32_to_cpu(vsi_node->info.node_teid);
1933 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1935 vsi_node->in_use = true;
1942 * ice_sched_rm_agg_vsi_info - remove aggregator related VSI info entry
1943 * @pi: port information structure
1944 * @vsi_handle: software VSI handle
1946 * This function removes single aggregator VSI info entry from
1949 static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1951 struct ice_sched_agg_info *agg_info;
1952 struct ice_sched_agg_info *atmp;
1954 list_for_each_entry_safe(agg_info, atmp, &pi->hw->agg_list,
1956 struct ice_sched_agg_vsi_info *agg_vsi_info;
1957 struct ice_sched_agg_vsi_info *vtmp;
1959 list_for_each_entry_safe(agg_vsi_info, vtmp,
1960 &agg_info->agg_vsi_list, list_entry)
1961 if (agg_vsi_info->vsi_handle == vsi_handle) {
1962 list_del(&agg_vsi_info->list_entry);
1963 devm_kfree(ice_hw_to_dev(pi->hw),
1971 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1972 * @node: pointer to the sub-tree node
1974 * This function checks for a leaf node presence in a given sub-tree node.
1976 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
1980 for (i = 0; i < node->num_children; i++)
1981 if (ice_sched_is_leaf_node_present(node->children[i]))
1983 /* check for a leaf node */
1984 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
1988 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
1989 * @pi: port information structure
1990 * @vsi_handle: software VSI handle
1991 * @owner: LAN or RDMA
1993 * This function removes the VSI and its LAN or RDMA children nodes from the
1996 static enum ice_status
1997 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
1999 enum ice_status status = ICE_ERR_PARAM;
2000 struct ice_vsi_ctx *vsi_ctx;
2003 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
2004 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2006 mutex_lock(&pi->sched_lock);
2007 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
2009 goto exit_sched_rm_vsi_cfg;
2011 ice_for_each_traffic_class(i) {
2012 struct ice_sched_node *vsi_node, *tc_node;
2015 tc_node = ice_sched_get_tc_node(pi, i);
2019 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2023 if (ice_sched_is_leaf_node_present(vsi_node)) {
2024 ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
2025 status = ICE_ERR_IN_USE;
2026 goto exit_sched_rm_vsi_cfg;
2028 while (j < vsi_node->num_children) {
2029 if (vsi_node->children[j]->owner == owner) {
2030 ice_free_sched_node(pi, vsi_node->children[j]);
2032 /* reset the counter again since the num
2033 * children will be updated after node removal
2040 /* remove the VSI if it has no children */
2041 if (!vsi_node->num_children) {
2042 ice_free_sched_node(pi, vsi_node);
2043 vsi_ctx->sched.vsi_node[i] = NULL;
2045 /* clean up aggregator related VSI info if any */
2046 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2048 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2049 vsi_ctx->sched.max_lanq[i] = 0;
2051 vsi_ctx->sched.max_rdmaq[i] = 0;
2055 exit_sched_rm_vsi_cfg:
2056 mutex_unlock(&pi->sched_lock);
2061 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2062 * @pi: port information structure
2063 * @vsi_handle: software VSI handle
2065 * This function clears the VSI and its LAN children nodes from scheduler tree
2068 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2070 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2074 * ice_get_agg_info - get the aggregator ID
2075 * @hw: pointer to the hardware structure
2076 * @agg_id: aggregator ID
2078 * This function validates aggregator ID. The function returns info if
2079 * aggregator ID is present in list otherwise it returns null.
2081 static struct ice_sched_agg_info *
2082 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2084 struct ice_sched_agg_info *agg_info;
2086 list_for_each_entry(agg_info, &hw->agg_list, list_entry)
2087 if (agg_info->agg_id == agg_id)
2094 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2095 * @hw: pointer to the HW struct
2096 * @node: pointer to a child node
2097 * @num_nodes: num nodes count array
2099 * This function walks through the aggregator subtree to find a free parent
2102 static struct ice_sched_node *
2103 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2106 u8 l = node->tx_sched_layer;
2109 vsil = ice_sched_get_vsi_layer(hw);
2111 /* Is it VSI parent layer ? */
2113 return (node->num_children < hw->max_children[l]) ? node : NULL;
2115 /* We have intermediate nodes. Let's walk through the subtree. If the
2116 * intermediate node has space to add a new node then clear the count
2118 if (node->num_children < hw->max_children[l])
2120 /* The below recursive call is intentional and wouldn't go more than
2121 * 2 or 3 iterations.
2124 for (i = 0; i < node->num_children; i++) {
2125 struct ice_sched_node *parent;
2127 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2137 * ice_sched_update_parent - update the new parent in SW DB
2138 * @new_parent: pointer to a new parent node
2139 * @node: pointer to a child node
2141 * This function removes the child from the old parent and adds it to a new
2145 ice_sched_update_parent(struct ice_sched_node *new_parent,
2146 struct ice_sched_node *node)
2148 struct ice_sched_node *old_parent;
2151 old_parent = node->parent;
2153 /* update the old parent children */
2154 for (i = 0; i < old_parent->num_children; i++)
2155 if (old_parent->children[i] == node) {
2156 for (j = i + 1; j < old_parent->num_children; j++)
2157 old_parent->children[j - 1] =
2158 old_parent->children[j];
2159 old_parent->num_children--;
2163 /* now move the node to a new parent */
2164 new_parent->children[new_parent->num_children++] = node;
2165 node->parent = new_parent;
2166 node->info.parent_teid = new_parent->info.node_teid;
2170 * ice_sched_move_nodes - move child nodes to a given parent
2171 * @pi: port information structure
2172 * @parent: pointer to parent node
2173 * @num_items: number of child nodes to be moved
2174 * @list: pointer to child node teids
2176 * This function move the child nodes to a given parent.
2178 static enum ice_status
2179 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2180 u16 num_items, u32 *list)
2182 struct ice_aqc_move_elem *buf;
2183 struct ice_sched_node *node;
2184 enum ice_status status = 0;
2185 u16 i, grps_movd = 0;
2191 if (!parent || !num_items)
2192 return ICE_ERR_PARAM;
2194 /* Does parent have enough space */
2195 if (parent->num_children + num_items >
2196 hw->max_children[parent->tx_sched_layer])
2197 return ICE_ERR_AQ_FULL;
2199 buf_len = struct_size(buf, teid, 1);
2200 buf = kzalloc(buf_len, GFP_KERNEL);
2202 return ICE_ERR_NO_MEMORY;
2204 for (i = 0; i < num_items; i++) {
2205 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2207 status = ICE_ERR_PARAM;
2211 buf->hdr.src_parent_teid = node->info.parent_teid;
2212 buf->hdr.dest_parent_teid = parent->info.node_teid;
2213 buf->teid[0] = node->info.node_teid;
2214 buf->hdr.num_elems = cpu_to_le16(1);
2215 status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
2217 if (status && grps_movd != 1) {
2218 status = ICE_ERR_CFG;
2222 /* update the SW DB */
2223 ice_sched_update_parent(parent, node);
2232 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2233 * @pi: port information structure
2234 * @vsi_handle: software VSI handle
2235 * @agg_id: aggregator ID
2238 * This function moves a VSI to an aggregator node or its subtree.
2239 * Intermediate nodes may be created if required.
2241 static enum ice_status
2242 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2245 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2246 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2247 u32 first_node_teid, vsi_teid;
2248 enum ice_status status;
2249 u16 num_nodes_added;
2252 tc_node = ice_sched_get_tc_node(pi, tc);
2256 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2258 return ICE_ERR_DOES_NOT_EXIST;
2260 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2262 return ICE_ERR_DOES_NOT_EXIST;
2264 /* Is this VSI already part of given aggregator? */
2265 if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
2268 aggl = ice_sched_get_agg_layer(pi->hw);
2269 vsil = ice_sched_get_vsi_layer(pi->hw);
2271 /* set intermediate node count to 1 between aggregator and VSI layers */
2272 for (i = aggl + 1; i < vsil; i++)
2275 /* Check if the aggregator subtree has any free node to add the VSI */
2276 for (i = 0; i < agg_node->num_children; i++) {
2277 parent = ice_sched_get_free_vsi_parent(pi->hw,
2278 agg_node->children[i],
2286 for (i = aggl + 1; i < vsil; i++) {
2287 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2291 if (status || num_nodes[i] != num_nodes_added)
2294 /* The newly added node can be a new parent for the next
2297 if (num_nodes_added)
2298 parent = ice_sched_find_node_by_teid(tc_node,
2301 parent = parent->children[0];
2308 vsi_teid = le32_to_cpu(vsi_node->info.node_teid);
2309 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2313 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2314 * @pi: port information structure
2315 * @agg_info: aggregator info
2316 * @tc: traffic class number
2317 * @rm_vsi_info: true or false
2319 * This function move all the VSI(s) to the default aggregator and delete
2320 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2321 * caller holds the scheduler lock.
2323 static enum ice_status
2324 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2325 struct ice_sched_agg_info *agg_info, u8 tc,
2328 struct ice_sched_agg_vsi_info *agg_vsi_info;
2329 struct ice_sched_agg_vsi_info *tmp;
2330 enum ice_status status = 0;
2332 list_for_each_entry_safe(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2334 u16 vsi_handle = agg_vsi_info->vsi_handle;
2336 /* Move VSI to default aggregator */
2337 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2340 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2341 ICE_DFLT_AGG_ID, tc);
2345 clear_bit(tc, agg_vsi_info->tc_bitmap);
2346 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2347 list_del(&agg_vsi_info->list_entry);
2348 devm_kfree(ice_hw_to_dev(pi->hw), agg_vsi_info);
2356 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2357 * @pi: port information structure
2358 * @node: node pointer
2360 * This function checks whether the aggregator is attached with any VSI or not.
2363 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2367 vsil = ice_sched_get_vsi_layer(pi->hw);
2368 if (node->tx_sched_layer < vsil - 1) {
2369 for (i = 0; i < node->num_children; i++)
2370 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2374 return node->num_children ? true : false;
2379 * ice_sched_rm_agg_cfg - remove the aggregator node
2380 * @pi: port information structure
2381 * @agg_id: aggregator ID
2384 * This function removes the aggregator node and intermediate nodes if any
2387 static enum ice_status
2388 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2390 struct ice_sched_node *tc_node, *agg_node;
2391 struct ice_hw *hw = pi->hw;
2393 tc_node = ice_sched_get_tc_node(pi, tc);
2397 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2399 return ICE_ERR_DOES_NOT_EXIST;
2401 /* Can't remove the aggregator node if it has children */
2402 if (ice_sched_is_agg_inuse(pi, agg_node))
2403 return ICE_ERR_IN_USE;
2405 /* need to remove the whole subtree if aggregator node is the
2408 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2409 struct ice_sched_node *parent = agg_node->parent;
2414 if (parent->num_children > 1)
2420 ice_free_sched_node(pi, agg_node);
2425 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2426 * @pi: port information structure
2427 * @agg_info: aggregator ID
2429 * @rm_vsi_info: bool value true or false
2431 * This function removes aggregator reference to VSI of given TC. It removes
2432 * the aggregator configuration completely for requested TC. The caller needs
2433 * to hold the scheduler lock.
2435 static enum ice_status
2436 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2437 u8 tc, bool rm_vsi_info)
2439 enum ice_status status = 0;
2441 /* If nothing to remove - return success */
2442 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2443 goto exit_rm_agg_cfg_tc;
2445 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2447 goto exit_rm_agg_cfg_tc;
2449 /* Delete aggregator node(s) */
2450 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2452 goto exit_rm_agg_cfg_tc;
2454 clear_bit(tc, agg_info->tc_bitmap);
2460 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2461 * @pi: port information structure
2462 * @agg_id: aggregator ID
2463 * @tc_bitmap: 8 bits TC bitmap
2465 * Save aggregator TC bitmap. This function needs to be called with scheduler
2468 static enum ice_status
2469 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2470 unsigned long *tc_bitmap)
2472 struct ice_sched_agg_info *agg_info;
2474 agg_info = ice_get_agg_info(pi->hw, agg_id);
2476 return ICE_ERR_PARAM;
2477 bitmap_copy(agg_info->replay_tc_bitmap, tc_bitmap,
2478 ICE_MAX_TRAFFIC_CLASS);
2483 * ice_sched_add_agg_cfg - create an aggregator node
2484 * @pi: port information structure
2485 * @agg_id: aggregator ID
2488 * This function creates an aggregator node and intermediate nodes if required
2491 static enum ice_status
2492 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2494 struct ice_sched_node *parent, *agg_node, *tc_node;
2495 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2496 enum ice_status status = 0;
2497 struct ice_hw *hw = pi->hw;
2498 u32 first_node_teid;
2499 u16 num_nodes_added;
2502 tc_node = ice_sched_get_tc_node(pi, tc);
2506 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2507 /* Does Agg node already exist ? */
2511 aggl = ice_sched_get_agg_layer(hw);
2513 /* need one node in Agg layer */
2514 num_nodes[aggl] = 1;
2516 /* Check whether the intermediate nodes have space to add the
2517 * new aggregator. If they are full, then SW needs to allocate a new
2518 * intermediate node on those layers
2520 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2521 parent = ice_sched_get_first_node(pi, tc_node, i);
2523 /* scan all the siblings */
2525 if (parent->num_children < hw->max_children[i])
2527 parent = parent->sibling;
2530 /* all the nodes are full, reserve one for this layer */
2535 /* add the aggregator node */
2537 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2541 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2545 if (status || num_nodes[i] != num_nodes_added)
2548 /* The newly added node can be a new parent for the next
2551 if (num_nodes_added) {
2552 parent = ice_sched_find_node_by_teid(tc_node,
2554 /* register aggregator ID with the aggregator node */
2555 if (parent && i == aggl)
2556 parent->agg_id = agg_id;
2558 parent = parent->children[0];
2566 * ice_sched_cfg_agg - configure aggregator node
2567 * @pi: port information structure
2568 * @agg_id: aggregator ID
2569 * @agg_type: aggregator type queue, VSI, or aggregator group
2570 * @tc_bitmap: bits TC bitmap
2572 * It registers a unique aggregator node into scheduler services. It
2573 * allows a user to register with a unique ID to track it's resources.
2574 * The aggregator type determines if this is a queue group, VSI group
2575 * or aggregator group. It then creates the aggregator node(s) for requested
2576 * TC(s) or removes an existing aggregator node including its configuration
2577 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2578 * resources and remove aggregator ID.
2579 * This function needs to be called with scheduler lock held.
2581 static enum ice_status
2582 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2583 enum ice_agg_type agg_type, unsigned long *tc_bitmap)
2585 struct ice_sched_agg_info *agg_info;
2586 enum ice_status status = 0;
2587 struct ice_hw *hw = pi->hw;
2590 agg_info = ice_get_agg_info(hw, agg_id);
2592 /* Create new entry for new aggregator ID */
2593 agg_info = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*agg_info),
2596 return ICE_ERR_NO_MEMORY;
2598 agg_info->agg_id = agg_id;
2599 agg_info->agg_type = agg_type;
2600 agg_info->tc_bitmap[0] = 0;
2602 /* Initialize the aggregator VSI list head */
2603 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2605 /* Add new entry in aggregator list */
2606 list_add(&agg_info->list_entry, &hw->agg_list);
2608 /* Create aggregator node(s) for requested TC(s) */
2609 ice_for_each_traffic_class(tc) {
2610 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2611 /* Delete aggregator cfg TC if it exists previously */
2612 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2618 /* Check if aggregator node for TC already exists */
2619 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2622 /* Create new aggregator node for TC */
2623 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2627 /* Save aggregator node's TC information */
2628 set_bit(tc, agg_info->tc_bitmap);
2635 * ice_cfg_agg - config aggregator node
2636 * @pi: port information structure
2637 * @agg_id: aggregator ID
2638 * @agg_type: aggregator type queue, VSI, or aggregator group
2639 * @tc_bitmap: bits TC bitmap
2641 * This function configures aggregator node(s).
2644 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2647 unsigned long bitmap = tc_bitmap;
2648 enum ice_status status;
2650 mutex_lock(&pi->sched_lock);
2651 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2652 (unsigned long *)&bitmap);
2654 status = ice_save_agg_tc_bitmap(pi, agg_id,
2655 (unsigned long *)&bitmap);
2656 mutex_unlock(&pi->sched_lock);
2661 * ice_get_agg_vsi_info - get the aggregator ID
2662 * @agg_info: aggregator info
2663 * @vsi_handle: software VSI handle
2665 * The function returns aggregator VSI info based on VSI handle. This function
2666 * needs to be called with scheduler lock held.
2668 static struct ice_sched_agg_vsi_info *
2669 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2671 struct ice_sched_agg_vsi_info *agg_vsi_info;
2673 list_for_each_entry(agg_vsi_info, &agg_info->agg_vsi_list, list_entry)
2674 if (agg_vsi_info->vsi_handle == vsi_handle)
2675 return agg_vsi_info;
2681 * ice_get_vsi_agg_info - get the aggregator info of VSI
2682 * @hw: pointer to the hardware structure
2683 * @vsi_handle: Sw VSI handle
2685 * The function returns aggregator info of VSI represented via vsi_handle. The
2686 * VSI has in this case a different aggregator than the default one. This
2687 * function needs to be called with scheduler lock held.
2689 static struct ice_sched_agg_info *
2690 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2692 struct ice_sched_agg_info *agg_info;
2694 list_for_each_entry(agg_info, &hw->agg_list, list_entry) {
2695 struct ice_sched_agg_vsi_info *agg_vsi_info;
2697 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2705 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2706 * @pi: port information structure
2707 * @agg_id: aggregator ID
2708 * @vsi_handle: software VSI handle
2709 * @tc_bitmap: TC bitmap of enabled TC(s)
2711 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2714 static enum ice_status
2715 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2716 unsigned long *tc_bitmap)
2718 struct ice_sched_agg_vsi_info *agg_vsi_info;
2719 struct ice_sched_agg_info *agg_info;
2721 agg_info = ice_get_agg_info(pi->hw, agg_id);
2723 return ICE_ERR_PARAM;
2724 /* check if entry already exist */
2725 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2727 return ICE_ERR_PARAM;
2728 bitmap_copy(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2729 ICE_MAX_TRAFFIC_CLASS);
2734 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2735 * @pi: port information structure
2736 * @agg_id: aggregator ID
2737 * @vsi_handle: software VSI handle
2738 * @tc_bitmap: TC bitmap of enabled TC(s)
2740 * This function moves VSI to a new or default aggregator node. If VSI is
2741 * already associated to the aggregator node then no operation is performed on
2742 * the tree. This function needs to be called with scheduler lock held.
2744 static enum ice_status
2745 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2746 u16 vsi_handle, unsigned long *tc_bitmap)
2748 struct ice_sched_agg_vsi_info *agg_vsi_info, *old_agg_vsi_info = NULL;
2749 struct ice_sched_agg_info *agg_info, *old_agg_info;
2750 enum ice_status status = 0;
2751 struct ice_hw *hw = pi->hw;
2754 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2755 return ICE_ERR_PARAM;
2756 agg_info = ice_get_agg_info(hw, agg_id);
2758 return ICE_ERR_PARAM;
2759 /* If the VSI is already part of another aggregator then update
2762 old_agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
2763 if (old_agg_info && old_agg_info != agg_info) {
2764 struct ice_sched_agg_vsi_info *vtmp;
2766 list_for_each_entry_safe(old_agg_vsi_info, vtmp,
2767 &old_agg_info->agg_vsi_list,
2769 if (old_agg_vsi_info->vsi_handle == vsi_handle)
2773 /* check if entry already exist */
2774 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2775 if (!agg_vsi_info) {
2776 /* Create new entry for VSI under aggregator list */
2777 agg_vsi_info = devm_kzalloc(ice_hw_to_dev(hw),
2778 sizeof(*agg_vsi_info), GFP_KERNEL);
2780 return ICE_ERR_PARAM;
2782 /* add VSI ID into the aggregator list */
2783 agg_vsi_info->vsi_handle = vsi_handle;
2784 list_add(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2786 /* Move VSI node to new aggregator node for requested TC(s) */
2787 ice_for_each_traffic_class(tc) {
2788 if (!ice_is_tc_ena(*tc_bitmap, tc))
2791 /* Move VSI to new aggregator */
2792 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2796 set_bit(tc, agg_vsi_info->tc_bitmap);
2797 if (old_agg_vsi_info)
2798 clear_bit(tc, old_agg_vsi_info->tc_bitmap);
2800 if (old_agg_vsi_info && !old_agg_vsi_info->tc_bitmap[0]) {
2801 list_del(&old_agg_vsi_info->list_entry);
2802 devm_kfree(ice_hw_to_dev(pi->hw), old_agg_vsi_info);
2808 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2809 * @pi: port information structure
2811 * This function removes unused rate limit profiles from the HW and
2812 * SW DB. The caller needs to hold scheduler lock.
2814 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2818 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2819 struct ice_aqc_rl_profile_info *rl_prof_elem;
2820 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2822 list_for_each_entry_safe(rl_prof_elem, rl_prof_tmp,
2823 &pi->rl_prof_list[ln], list_entry) {
2824 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2825 ice_debug(pi->hw, ICE_DBG_SCHED, "Removed rl profile\n");
2831 * ice_sched_update_elem - update element
2832 * @hw: pointer to the HW struct
2833 * @node: pointer to node
2834 * @info: node info to update
2836 * Update the HW DB, and local SW DB of node. Update the scheduling
2837 * parameters of node from argument info data buffer (Info->data buf) and
2838 * returns success or error on config sched element failure. The caller
2839 * needs to hold scheduler lock.
2841 static enum ice_status
2842 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2843 struct ice_aqc_txsched_elem_data *info)
2845 struct ice_aqc_txsched_elem_data buf;
2846 enum ice_status status;
2851 /* Parent TEID is reserved field in this aq call */
2852 buf.parent_teid = 0;
2853 /* Element type is reserved field in this aq call */
2854 buf.data.elem_type = 0;
2855 /* Flags is reserved field in this aq call */
2859 /* Configure element node */
2860 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2862 if (status || elem_cfgd != num_elems) {
2863 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2867 /* Config success case */
2868 /* Now update local SW DB */
2869 /* Only copy the data portion of info buffer */
2870 node->info.data = info->data;
2875 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2876 * @hw: pointer to the HW struct
2877 * @node: sched node to configure
2878 * @rl_type: rate limit type CIR, EIR, or shared
2879 * @bw_alloc: BW weight/allocation
2881 * This function configures node element's BW allocation.
2883 static enum ice_status
2884 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2885 enum ice_rl_type rl_type, u16 bw_alloc)
2887 struct ice_aqc_txsched_elem_data buf;
2888 struct ice_aqc_txsched_elem *data;
2892 if (rl_type == ICE_MIN_BW) {
2893 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2894 data->cir_bw.bw_alloc = cpu_to_le16(bw_alloc);
2895 } else if (rl_type == ICE_MAX_BW) {
2896 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2897 data->eir_bw.bw_alloc = cpu_to_le16(bw_alloc);
2899 return ICE_ERR_PARAM;
2902 /* Configure element */
2903 return ice_sched_update_elem(hw, node, &buf);
2907 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2908 * @pi: port information structure
2909 * @agg_id: aggregator ID
2910 * @vsi_handle: software VSI handle
2911 * @tc_bitmap: TC bitmap of enabled TC(s)
2913 * Move or associate VSI to a new or default aggregator node.
2916 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2919 unsigned long bitmap = tc_bitmap;
2920 enum ice_status status;
2922 mutex_lock(&pi->sched_lock);
2923 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2924 (unsigned long *)&bitmap);
2926 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2927 (unsigned long *)&bitmap);
2928 mutex_unlock(&pi->sched_lock);
2933 * ice_set_clear_cir_bw - set or clear CIR BW
2934 * @bw_t_info: bandwidth type information structure
2935 * @bw: bandwidth in Kbps - Kilo bits per sec
2937 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
2939 static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
2941 if (bw == ICE_SCHED_DFLT_BW) {
2942 clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
2943 bw_t_info->cir_bw.bw = 0;
2945 /* Save type of BW information */
2946 set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
2947 bw_t_info->cir_bw.bw = bw;
2952 * ice_set_clear_eir_bw - set or clear EIR BW
2953 * @bw_t_info: bandwidth type information structure
2954 * @bw: bandwidth in Kbps - Kilo bits per sec
2956 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
2958 static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
2960 if (bw == ICE_SCHED_DFLT_BW) {
2961 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
2962 bw_t_info->eir_bw.bw = 0;
2964 /* EIR BW and Shared BW profiles are mutually exclusive and
2965 * hence only one of them may be set for any given element.
2966 * First clear earlier saved shared BW information.
2968 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
2969 bw_t_info->shared_bw = 0;
2970 /* save EIR BW information */
2971 set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
2972 bw_t_info->eir_bw.bw = bw;
2977 * ice_set_clear_shared_bw - set or clear shared BW
2978 * @bw_t_info: bandwidth type information structure
2979 * @bw: bandwidth in Kbps - Kilo bits per sec
2981 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
2983 static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
2985 if (bw == ICE_SCHED_DFLT_BW) {
2986 clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
2987 bw_t_info->shared_bw = 0;
2989 /* EIR BW and Shared BW profiles are mutually exclusive and
2990 * hence only one of them may be set for any given element.
2991 * First clear earlier saved EIR BW information.
2993 clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
2994 bw_t_info->eir_bw.bw = 0;
2995 /* save shared BW information */
2996 set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
2997 bw_t_info->shared_bw = bw;
3002 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3003 * @hw: pointer to the HW struct
3004 * @bw: bandwidth in Kbps
3006 * This function calculates the wakeup parameter of RL profile.
3008 static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)
3010 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3014 /* Get the wakeup integer value */
3015 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE);
3016 wakeup_int = div64_long(hw->psm_clk_freq, bytes_per_sec);
3017 if (wakeup_int > 63) {
3018 wakeup = (u16)((1 << 15) | wakeup_int);
3020 /* Calculate fraction value up to 4 decimals
3021 * Convert Integer value to a constant multiplier
3023 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3024 wakeup_a = div64_long((s64)ICE_RL_PROF_MULTIPLIER *
3025 hw->psm_clk_freq, bytes_per_sec);
3027 /* Get Fraction value */
3028 wakeup_f = wakeup_a - wakeup_b;
3030 /* Round up the Fractional value via Ceil(Fractional value) */
3031 if (wakeup_f > div64_long(ICE_RL_PROF_MULTIPLIER, 2))
3034 wakeup_f_int = (s32)div64_long(wakeup_f * ICE_RL_PROF_FRACTION,
3035 ICE_RL_PROF_MULTIPLIER);
3036 wakeup |= (u16)(wakeup_int << 9);
3037 wakeup |= (u16)(0x1ff & wakeup_f_int);
3044 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3045 * @hw: pointer to the HW struct
3046 * @bw: bandwidth in Kbps
3047 * @profile: profile parameters to return
3049 * This function converts the BW to profile structure format.
3051 static enum ice_status
3052 ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
3053 struct ice_aqc_rl_profile_elem *profile)
3055 enum ice_status status = ICE_ERR_PARAM;
3056 s64 bytes_per_sec, ts_rate, mv_tmp;
3062 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3063 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3066 /* Bytes per second from Kbps */
3067 bytes_per_sec = div64_long(((s64)bw * 1000), BITS_PER_BYTE);
3069 /* encode is 6 bits but really useful are 5 bits */
3070 for (i = 0; i < 64; i++) {
3071 u64 pow_result = BIT_ULL(i);
3073 ts_rate = div64_long((s64)hw->psm_clk_freq,
3074 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3078 /* Multiplier value */
3079 mv_tmp = div64_long(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3082 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3083 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3085 /* First multiplier value greater than the given
3088 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3097 wm = ice_sched_calc_wakeup(hw, bw);
3098 profile->rl_multiply = cpu_to_le16(mv);
3099 profile->wake_up_calc = cpu_to_le16(wm);
3100 profile->rl_encode = cpu_to_le16(encode);
3103 status = ICE_ERR_DOES_NOT_EXIST;
3110 * ice_sched_add_rl_profile - add RL profile
3111 * @pi: port information structure
3112 * @rl_type: type of rate limit BW - min, max, or shared
3113 * @bw: bandwidth in Kbps - Kilo bits per sec
3114 * @layer_num: specifies in which layer to create profile
3116 * This function first checks the existing list for corresponding BW
3117 * parameter. If it exists, it returns the associated profile otherwise
3118 * it creates a new rate limit profile for requested BW, and adds it to
3119 * the HW DB and local list. It returns the new profile or null on error.
3120 * The caller needs to hold the scheduler lock.
3122 static struct ice_aqc_rl_profile_info *
3123 ice_sched_add_rl_profile(struct ice_port_info *pi,
3124 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3126 struct ice_aqc_rl_profile_info *rl_prof_elem;
3127 u16 profiles_added = 0, num_profiles = 1;
3128 struct ice_aqc_rl_profile_elem *buf;
3129 enum ice_status status;
3133 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3137 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3140 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3143 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3152 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num],
3154 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3155 profile_type && rl_prof_elem->bw == bw)
3156 /* Return existing profile ID info */
3157 return rl_prof_elem;
3159 /* Create new profile ID */
3160 rl_prof_elem = devm_kzalloc(ice_hw_to_dev(hw), sizeof(*rl_prof_elem),
3166 status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);
3168 goto exit_add_rl_prof;
3170 rl_prof_elem->bw = bw;
3171 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3172 rl_prof_elem->profile.level = layer_num + 1;
3173 rl_prof_elem->profile.flags = profile_type;
3174 rl_prof_elem->profile.max_burst_size = cpu_to_le16(hw->max_burst_size);
3176 /* Create new entry in HW DB */
3177 buf = &rl_prof_elem->profile;
3178 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3179 &profiles_added, NULL);
3180 if (status || profiles_added != num_profiles)
3181 goto exit_add_rl_prof;
3183 /* Good entry - add in the list */
3184 rl_prof_elem->prof_id_ref = 0;
3185 list_add(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3186 return rl_prof_elem;
3189 devm_kfree(ice_hw_to_dev(hw), rl_prof_elem);
3194 * ice_sched_cfg_node_bw_lmt - configure node sched params
3195 * @hw: pointer to the HW struct
3196 * @node: sched node to configure
3197 * @rl_type: rate limit type CIR, EIR, or shared
3198 * @rl_prof_id: rate limit profile ID
3200 * This function configures node element's BW limit.
3202 static enum ice_status
3203 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3204 enum ice_rl_type rl_type, u16 rl_prof_id)
3206 struct ice_aqc_txsched_elem_data buf;
3207 struct ice_aqc_txsched_elem *data;
3213 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3214 data->cir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id);
3217 /* EIR BW and Shared BW profiles are mutually exclusive and
3218 * hence only one of them may be set for any given element
3220 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3222 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3223 data->eir_bw.bw_profile_idx = cpu_to_le16(rl_prof_id);
3226 /* Check for removing shared BW */
3227 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3228 /* remove shared profile */
3229 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3230 data->srl_id = 0; /* clear SRL field */
3232 /* enable back EIR to default profile */
3233 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3234 data->eir_bw.bw_profile_idx =
3235 cpu_to_le16(ICE_SCHED_DFLT_RL_PROF_ID);
3238 /* EIR BW and Shared BW profiles are mutually exclusive and
3239 * hence only one of them may be set for any given element
3241 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3242 (le16_to_cpu(data->eir_bw.bw_profile_idx) !=
3243 ICE_SCHED_DFLT_RL_PROF_ID))
3245 /* EIR BW is set to default, disable it */
3246 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3247 /* Okay to enable shared BW now */
3248 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3249 data->srl_id = cpu_to_le16(rl_prof_id);
3252 /* Unknown rate limit type */
3253 return ICE_ERR_PARAM;
3256 /* Configure element */
3257 return ice_sched_update_elem(hw, node, &buf);
3261 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
3263 * @rl_type: rate limit type
3265 * If existing profile matches, it returns the corresponding rate
3266 * limit profile ID, otherwise it returns an invalid ID as error.
3269 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
3270 enum ice_rl_type rl_type)
3272 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
3273 struct ice_aqc_txsched_elem *data;
3275 data = &node->info.data;
3278 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
3279 rl_prof_id = le16_to_cpu(data->cir_bw.bw_profile_idx);
3282 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
3283 rl_prof_id = le16_to_cpu(data->eir_bw.bw_profile_idx);
3286 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3287 rl_prof_id = le16_to_cpu(data->srl_id);
3297 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
3298 * @pi: port information structure
3299 * @rl_type: type of rate limit BW - min, max, or shared
3300 * @layer_index: layer index
3302 * This function returns requested profile creation layer.
3305 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
3308 struct ice_hw *hw = pi->hw;
3310 if (layer_index >= hw->num_tx_sched_layers)
3311 return ICE_SCHED_INVAL_LAYER_NUM;
3314 if (hw->layer_info[layer_index].max_cir_rl_profiles)
3318 if (hw->layer_info[layer_index].max_eir_rl_profiles)
3322 /* if current layer doesn't support SRL profile creation
3323 * then try a layer up or down.
3325 if (hw->layer_info[layer_index].max_srl_profiles)
3327 else if (layer_index < hw->num_tx_sched_layers - 1 &&
3328 hw->layer_info[layer_index + 1].max_srl_profiles)
3329 return layer_index + 1;
3330 else if (layer_index > 0 &&
3331 hw->layer_info[layer_index - 1].max_srl_profiles)
3332 return layer_index - 1;
3337 return ICE_SCHED_INVAL_LAYER_NUM;
3341 * ice_sched_get_srl_node - get shared rate limit node
3343 * @srl_layer: shared rate limit layer
3345 * This function returns SRL node to be used for shared rate limit purpose.
3346 * The caller needs to hold scheduler lock.
3348 static struct ice_sched_node *
3349 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
3351 if (srl_layer > node->tx_sched_layer)
3352 return node->children[0];
3353 else if (srl_layer < node->tx_sched_layer)
3354 /* Node can't be created without a parent. It will always
3355 * have a valid parent except root node.
3357 return node->parent;
3363 * ice_sched_rm_rl_profile - remove RL profile ID
3364 * @pi: port information structure
3365 * @layer_num: layer number where profiles are saved
3366 * @profile_type: profile type like EIR, CIR, or SRL
3367 * @profile_id: profile ID to remove
3369 * This function removes rate limit profile from layer 'layer_num' of type
3370 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
3373 static enum ice_status
3374 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
3377 struct ice_aqc_rl_profile_info *rl_prof_elem;
3378 enum ice_status status = 0;
3380 if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
3381 return ICE_ERR_PARAM;
3382 /* Check the existing list for RL profile */
3383 list_for_each_entry(rl_prof_elem, &pi->rl_prof_list[layer_num],
3385 if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
3387 le16_to_cpu(rl_prof_elem->profile.profile_id) ==
3389 if (rl_prof_elem->prof_id_ref)
3390 rl_prof_elem->prof_id_ref--;
3392 /* Remove old profile ID from database */
3393 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
3394 if (status && status != ICE_ERR_IN_USE)
3395 ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
3398 if (status == ICE_ERR_IN_USE)
3404 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
3405 * @pi: port information structure
3406 * @node: pointer to node structure
3407 * @rl_type: rate limit type min, max, or shared
3408 * @layer_num: layer number where RL profiles are saved
3410 * This function configures node element's BW rate limit profile ID of
3411 * type CIR, EIR, or SRL to default. This function needs to be called
3412 * with the scheduler lock held.
3414 static enum ice_status
3415 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
3416 struct ice_sched_node *node,
3417 enum ice_rl_type rl_type, u8 layer_num)
3419 enum ice_status status;
3428 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3429 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
3432 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3433 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
3436 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3437 /* No SRL is configured for default case */
3438 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
3441 return ICE_ERR_PARAM;
3443 /* Save existing RL prof ID for later clean up */
3444 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
3445 /* Configure BW scheduling parameters */
3446 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
3450 /* Remove stale RL profile ID */
3451 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
3452 old_id == ICE_SCHED_INVAL_PROF_ID)
3455 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
3459 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
3460 * @pi: port information structure
3461 * @node: pointer to node structure
3462 * @layer_num: layer number where rate limit profiles are saved
3463 * @rl_type: rate limit type min, max, or shared
3464 * @bw: bandwidth value
3466 * This function prepares node element's bandwidth to SRL or EIR exclusively.
3467 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
3468 * them may be set for any given element. This function needs to be called
3469 * with the scheduler lock held.
3471 static enum ice_status
3472 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
3473 struct ice_sched_node *node,
3474 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
3476 if (rl_type == ICE_SHARED_BW) {
3477 /* SRL node passed in this case, it may be different node */
3478 if (bw == ICE_SCHED_DFLT_BW)
3479 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
3480 * enables EIR to default. EIR is not set in this
3481 * case, so no additional action is required.
3485 /* SRL being configured, set EIR to default here.
3486 * ice_sched_cfg_node_bw_lmt() disables EIR when it
3489 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
3491 } else if (rl_type == ICE_MAX_BW &&
3492 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
3493 /* Remove Shared profile. Set default shared BW call
3494 * removes shared profile for a node.
3496 return ice_sched_set_node_bw_dflt(pi, node,
3504 * ice_sched_set_node_bw - set node's bandwidth
3505 * @pi: port information structure
3507 * @rl_type: rate limit type min, max, or shared
3508 * @bw: bandwidth in Kbps - Kilo bits per sec
3509 * @layer_num: layer number
3511 * This function adds new profile corresponding to requested BW, configures
3512 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
3513 * ID from local database. The caller needs to hold scheduler lock.
3515 static enum ice_status
3516 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
3517 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3519 struct ice_aqc_rl_profile_info *rl_prof_info;
3520 enum ice_status status = ICE_ERR_PARAM;
3521 struct ice_hw *hw = pi->hw;
3522 u16 old_id, rl_prof_id;
3524 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
3528 rl_prof_id = le16_to_cpu(rl_prof_info->profile.profile_id);
3530 /* Save existing RL prof ID for later clean up */
3531 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
3532 /* Configure BW scheduling parameters */
3533 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
3537 /* New changes has been applied */
3538 /* Increment the profile ID reference count */
3539 rl_prof_info->prof_id_ref++;
3541 /* Check for old ID removal */
3542 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
3543 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
3546 return ice_sched_rm_rl_profile(pi, layer_num,
3547 rl_prof_info->profile.flags &
3548 ICE_AQC_RL_PROFILE_TYPE_M, old_id);
3552 * ice_sched_set_node_bw_lmt - set node's BW limit
3553 * @pi: port information structure
3555 * @rl_type: rate limit type min, max, or shared
3556 * @bw: bandwidth in Kbps - Kilo bits per sec
3558 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
3559 * EIR, or SRL. The caller needs to hold scheduler lock.
3561 static enum ice_status
3562 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
3563 enum ice_rl_type rl_type, u32 bw)
3565 struct ice_sched_node *cfg_node = node;
3566 enum ice_status status;
3572 return ICE_ERR_PARAM;
3574 /* Remove unused RL profile IDs from HW and SW DB */
3575 ice_sched_rm_unused_rl_prof(pi);
3576 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
3577 node->tx_sched_layer);
3578 if (layer_num >= hw->num_tx_sched_layers)
3579 return ICE_ERR_PARAM;
3581 if (rl_type == ICE_SHARED_BW) {
3582 /* SRL node may be different */
3583 cfg_node = ice_sched_get_srl_node(node, layer_num);
3587 /* EIR BW and Shared BW profiles are mutually exclusive and
3588 * hence only one of them may be set for any given element
3590 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
3594 if (bw == ICE_SCHED_DFLT_BW)
3595 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
3597 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
3601 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
3602 * @pi: port information structure
3603 * @node: pointer to node structure
3604 * @rl_type: rate limit type min, max, or shared
3606 * This function configures node element's BW rate limit profile ID of
3607 * type CIR, EIR, or SRL to default. This function needs to be called
3608 * with the scheduler lock held.
3610 static enum ice_status
3611 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
3612 struct ice_sched_node *node,
3613 enum ice_rl_type rl_type)
3615 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
3620 * ice_sched_validate_srl_node - Check node for SRL applicability
3621 * @node: sched node to configure
3622 * @sel_layer: selected SRL layer
3624 * This function checks if the SRL can be applied to a selected layer node on
3625 * behalf of the requested node (first argument). This function needs to be
3626 * called with scheduler lock held.
3628 static enum ice_status
3629 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
3631 /* SRL profiles are not available on all layers. Check if the
3632 * SRL profile can be applied to a node above or below the
3633 * requested node. SRL configuration is possible only if the
3634 * selected layer's node has single child.
3636 if (sel_layer == node->tx_sched_layer ||
3637 ((sel_layer == node->tx_sched_layer + 1) &&
3638 node->num_children == 1) ||
3639 ((sel_layer == node->tx_sched_layer - 1) &&
3640 (node->parent && node->parent->num_children == 1)))
3647 * ice_sched_save_q_bw - save queue node's BW information
3648 * @q_ctx: queue context structure
3649 * @rl_type: rate limit type min, max, or shared
3650 * @bw: bandwidth in Kbps - Kilo bits per sec
3652 * Save BW information of queue type node for post replay use.
3654 static enum ice_status
3655 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
3659 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
3662 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
3665 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
3668 return ICE_ERR_PARAM;
3674 * ice_sched_set_q_bw_lmt - sets queue BW limit
3675 * @pi: port information structure
3676 * @vsi_handle: sw VSI handle
3677 * @tc: traffic class
3678 * @q_handle: software queue handle
3679 * @rl_type: min, max, or shared
3680 * @bw: bandwidth in Kbps
3682 * This function sets BW limit of queue scheduling node.
3684 static enum ice_status
3685 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3686 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
3688 enum ice_status status = ICE_ERR_PARAM;
3689 struct ice_sched_node *node;
3690 struct ice_q_ctx *q_ctx;
3692 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3693 return ICE_ERR_PARAM;
3694 mutex_lock(&pi->sched_lock);
3695 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
3698 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
3700 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
3704 /* Return error if it is not a leaf node */
3705 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
3708 /* SRL bandwidth layer selection */
3709 if (rl_type == ICE_SHARED_BW) {
3710 u8 sel_layer; /* selected layer */
3712 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
3713 node->tx_sched_layer);
3714 if (sel_layer >= pi->hw->num_tx_sched_layers) {
3715 status = ICE_ERR_PARAM;
3718 status = ice_sched_validate_srl_node(node, sel_layer);
3723 if (bw == ICE_SCHED_DFLT_BW)
3724 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
3726 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
3729 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
3732 mutex_unlock(&pi->sched_lock);
3737 * ice_cfg_q_bw_lmt - configure queue BW limit
3738 * @pi: port information structure
3739 * @vsi_handle: sw VSI handle
3740 * @tc: traffic class
3741 * @q_handle: software queue handle
3742 * @rl_type: min, max, or shared
3743 * @bw: bandwidth in Kbps
3745 * This function configures BW limit of queue scheduling node.
3748 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3749 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
3751 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
3756 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
3757 * @pi: port information structure
3758 * @vsi_handle: sw VSI handle
3759 * @tc: traffic class
3760 * @q_handle: software queue handle
3761 * @rl_type: min, max, or shared
3763 * This function configures BW default limit of queue scheduling node.
3766 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3767 u16 q_handle, enum ice_rl_type rl_type)
3769 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
3774 * ice_cfg_rl_burst_size - Set burst size value
3775 * @hw: pointer to the HW struct
3776 * @bytes: burst size in bytes
3778 * This function configures/set the burst size to requested new value. The new
3779 * burst size value is used for future rate limit calls. It doesn't change the
3780 * existing or previously created RL profiles.
3782 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
3784 u16 burst_size_to_prog;
3786 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
3787 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
3788 return ICE_ERR_PARAM;
3789 if (ice_round_to_num(bytes, 64) <=
3790 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
3791 /* 64 byte granularity case */
3792 /* Disable MSB granularity bit */
3793 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
3794 /* round number to nearest 64 byte granularity */
3795 bytes = ice_round_to_num(bytes, 64);
3796 /* The value is in 64 byte chunks */
3797 burst_size_to_prog |= (u16)(bytes / 64);
3799 /* k bytes granularity case */
3800 /* Enable MSB granularity bit */
3801 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
3802 /* round number to nearest 1024 granularity */
3803 bytes = ice_round_to_num(bytes, 1024);
3804 /* check rounding doesn't go beyond allowed */
3805 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
3806 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
3807 /* The value is in k bytes */
3808 burst_size_to_prog |= (u16)(bytes / 1024);
3810 hw->max_burst_size = burst_size_to_prog;
3815 * ice_sched_replay_node_prio - re-configure node priority
3816 * @hw: pointer to the HW struct
3817 * @node: sched node to configure
3818 * @priority: priority value
3820 * This function configures node element's priority value. It
3821 * needs to be called with scheduler lock held.
3823 static enum ice_status
3824 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
3827 struct ice_aqc_txsched_elem_data buf;
3828 struct ice_aqc_txsched_elem *data;
3829 enum ice_status status;
3833 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
3834 data->generic = priority;
3836 /* Configure element */
3837 status = ice_sched_update_elem(hw, node, &buf);
3842 * ice_sched_replay_node_bw - replay node(s) BW
3843 * @hw: pointer to the HW struct
3844 * @node: sched node to configure
3845 * @bw_t_info: BW type information
3847 * This function restores node's BW from bw_t_info. The caller needs
3848 * to hold the scheduler lock.
3850 static enum ice_status
3851 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
3852 struct ice_bw_type_info *bw_t_info)
3854 struct ice_port_info *pi = hw->port_info;
3855 enum ice_status status = ICE_ERR_PARAM;
3860 if (bitmap_empty(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
3862 if (test_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap)) {
3863 status = ice_sched_replay_node_prio(hw, node,
3864 bw_t_info->generic);
3868 if (test_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap)) {
3869 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
3870 bw_t_info->cir_bw.bw);
3874 if (test_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap)) {
3875 bw_alloc = bw_t_info->cir_bw.bw_alloc;
3876 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
3881 if (test_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap)) {
3882 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
3883 bw_t_info->eir_bw.bw);
3887 if (test_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap)) {
3888 bw_alloc = bw_t_info->eir_bw.bw_alloc;
3889 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
3894 if (test_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap))
3895 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
3896 bw_t_info->shared_bw);
3901 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
3902 * @pi: port info struct
3903 * @tc_bitmap: 8 bits TC bitmap to check
3904 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
3906 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
3907 * may be missing, it returns enabled TCs. This function needs to be called with
3908 * scheduler lock held.
3911 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi,
3912 unsigned long *tc_bitmap,
3913 unsigned long *ena_tc_bitmap)
3917 /* Some TC(s) may be missing after reset, adjust for replay */
3918 ice_for_each_traffic_class(tc)
3919 if (ice_is_tc_ena(*tc_bitmap, tc) &&
3920 (ice_sched_get_tc_node(pi, tc)))
3921 set_bit(tc, ena_tc_bitmap);
3925 * ice_sched_replay_agg - recreate aggregator node(s)
3926 * @hw: pointer to the HW struct
3928 * This function recreate aggregator type nodes which are not replayed earlier.
3929 * It also replay aggregator BW information. These aggregator nodes are not
3930 * associated with VSI type node yet.
3932 void ice_sched_replay_agg(struct ice_hw *hw)
3934 struct ice_port_info *pi = hw->port_info;
3935 struct ice_sched_agg_info *agg_info;
3937 mutex_lock(&pi->sched_lock);
3938 list_for_each_entry(agg_info, &hw->agg_list, list_entry)
3939 /* replay aggregator (re-create aggregator node) */
3940 if (!bitmap_equal(agg_info->tc_bitmap, agg_info->replay_tc_bitmap,
3941 ICE_MAX_TRAFFIC_CLASS)) {
3942 DECLARE_BITMAP(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
3943 enum ice_status status;
3945 bitmap_zero(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
3946 ice_sched_get_ena_tc_bitmap(pi,
3947 agg_info->replay_tc_bitmap,
3949 status = ice_sched_cfg_agg(hw->port_info,
3954 dev_info(ice_hw_to_dev(hw),
3955 "Replay agg id[%d] failed\n",
3957 /* Move on to next one */
3961 mutex_unlock(&pi->sched_lock);
3965 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
3966 * @hw: pointer to the HW struct
3968 * This function initialize aggregator(s) TC bitmap to zero. A required
3969 * preinit step for replaying aggregators.
3971 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
3973 struct ice_port_info *pi = hw->port_info;
3974 struct ice_sched_agg_info *agg_info;
3976 mutex_lock(&pi->sched_lock);
3977 list_for_each_entry(agg_info, &hw->agg_list, list_entry) {
3978 struct ice_sched_agg_vsi_info *agg_vsi_info;
3980 agg_info->tc_bitmap[0] = 0;
3981 list_for_each_entry(agg_vsi_info, &agg_info->agg_vsi_list,
3983 agg_vsi_info->tc_bitmap[0] = 0;
3985 mutex_unlock(&pi->sched_lock);
3989 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
3990 * @hw: pointer to the HW struct
3991 * @vsi_handle: software VSI handle
3993 * This function replays aggregator node, VSI to aggregator type nodes, and
3994 * their node bandwidth information. This function needs to be called with
3995 * scheduler lock held.
3997 static enum ice_status
3998 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
4000 DECLARE_BITMAP(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
4001 struct ice_sched_agg_vsi_info *agg_vsi_info;
4002 struct ice_port_info *pi = hw->port_info;
4003 struct ice_sched_agg_info *agg_info;
4004 enum ice_status status;
4006 bitmap_zero(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
4007 if (!ice_is_vsi_valid(hw, vsi_handle))
4008 return ICE_ERR_PARAM;
4009 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
4011 return 0; /* Not present in list - default Agg case */
4012 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
4014 return 0; /* Not present in list - default Agg case */
4015 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
4017 /* Replay aggregator node associated to vsi_handle */
4018 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
4019 ICE_AGG_TYPE_AGG, replay_bitmap);
4023 bitmap_zero(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
4024 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
4026 /* Move this VSI (vsi_handle) to above aggregator */
4027 return ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
4032 * ice_replay_vsi_agg - replay VSI to aggregator node
4033 * @hw: pointer to the HW struct
4034 * @vsi_handle: software VSI handle
4036 * This function replays association of VSI to aggregator type nodes, and
4037 * node bandwidth information.
4039 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
4041 struct ice_port_info *pi = hw->port_info;
4042 enum ice_status status;
4044 mutex_lock(&pi->sched_lock);
4045 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
4046 mutex_unlock(&pi->sched_lock);
4051 * ice_sched_replay_q_bw - replay queue type node BW
4052 * @pi: port information structure
4053 * @q_ctx: queue context structure
4055 * This function replays queue type node bandwidth. This function needs to be
4056 * called with scheduler lock held.
4059 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
4061 struct ice_sched_node *q_node;
4063 /* Following also checks the presence of node in tree */
4064 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4066 return ICE_ERR_PARAM;
4067 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);