1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include <linux/ethtool.h>
26 #include <linux/timer.h>
27 #include <linux/delay.h>
28 #include <linux/bitmap.h>
29 #include <linux/log2.h>
31 #include <linux/sctp.h>
32 #include <linux/ipv6.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/if_bridge.h>
35 #include <linux/ctype.h>
36 #include <linux/bpf.h>
37 #include <linux/auxiliary_bus.h>
38 #include <linux/avf/virtchnl.h>
39 #include <linux/cpu_rmap.h>
40 #include <linux/dim.h>
41 #include <net/devlink.h>
43 #include <net/xdp_sock.h>
44 #include <net/xdp_sock_drv.h>
45 #include <net/geneve.h>
47 #include <net/udp_tunnel.h>
48 #include <net/vxlan.h>
49 #if IS_ENABLED(CONFIG_DCB)
50 #include <scsi/iscsi_proto.h>
51 #endif /* CONFIG_DCB */
52 #include "ice_devids.h"
56 #include "ice_switch.h"
57 #include "ice_common.h"
58 #include "ice_sched.h"
59 #include "ice_idc_int.h"
60 #include "ice_virtchnl_pf.h"
61 #include "ice_sriov.h"
69 #define ICE_REQ_DESC_MULTIPLE 32
70 #define ICE_MIN_NUM_DESC 64
71 #define ICE_MAX_NUM_DESC 8160
72 #define ICE_DFLT_MIN_RX_DESC 512
73 #define ICE_DFLT_NUM_TX_DESC 256
74 #define ICE_DFLT_NUM_RX_DESC 2048
76 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
77 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
78 #define ICE_AQ_LEN 192
79 #define ICE_MBXSQ_LEN 64
80 #define ICE_SBQ_LEN 64
81 #define ICE_MIN_LAN_TXRX_MSIX 1
82 #define ICE_MIN_LAN_OICR_MSIX 1
83 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
84 #define ICE_FDIR_MSIX 2
85 #define ICE_RDMA_NUM_AEQ_MSIX 4
86 #define ICE_MIN_RDMA_MSIX 2
87 #define ICE_NO_VSI 0xffff
88 #define ICE_VSI_MAP_CONTIG 0
89 #define ICE_VSI_MAP_SCATTER 1
90 #define ICE_MAX_SCATTER_TXQS 16
91 #define ICE_MAX_SCATTER_RXQS 16
92 #define ICE_Q_WAIT_RETRY_LIMIT 10
93 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
94 #define ICE_MAX_LG_RSS_QS 256
95 #define ICE_RES_VALID_BIT 0x8000
96 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1)
97 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1)
98 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */
99 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1)
100 #define ICE_INVAL_Q_INDEX 0xffff
101 #define ICE_INVAL_VFID 256
103 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
104 #define ICE_MAX_RESET_WAIT 20
106 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
108 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
110 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
112 #define ICE_UP_TABLE_TRANSLATE(val, i) \
113 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
114 ICE_AQ_VSI_UP_TABLE_UP##i##_M)
116 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
117 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
118 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
119 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
121 /* Macro for each VSI in a PF */
122 #define ice_for_each_vsi(pf, i) \
123 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
125 /* Macros for each Tx/Rx ring in a VSI */
126 #define ice_for_each_txq(vsi, i) \
127 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
129 #define ice_for_each_rxq(vsi, i) \
130 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
132 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
133 #define ice_for_each_alloc_txq(vsi, i) \
134 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
136 #define ice_for_each_alloc_rxq(vsi, i) \
137 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
139 #define ice_for_each_q_vector(vsi, i) \
140 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
142 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
143 ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
145 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
146 ICE_PROMISC_MCAST_TX | \
147 ICE_PROMISC_UCAST_RX | \
148 ICE_PROMISC_MCAST_RX | \
149 ICE_PROMISC_VLAN_TX | \
152 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
154 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
155 ICE_PROMISC_MCAST_RX | \
156 ICE_PROMISC_VLAN_TX | \
159 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
161 struct ice_txq_meta {
162 u32 q_teid; /* Tx-scheduler element identifier */
163 u16 q_id; /* Entry in VSI's txq_map bitmap */
164 u16 q_handle; /* Relative index of Tx queue within TC */
165 u16 vsi_idx; /* VSI index that Tx queue belongs to */
166 u8 tc; /* TC number that Tx queue belongs to */
177 u8 numtc; /* Total number of enabled TCs */
178 u8 ena_tc; /* Tx map */
179 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
182 struct ice_res_tracker {
189 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
190 unsigned long *pf_map;
191 unsigned long pf_map_size;
192 unsigned int q_count;
193 unsigned int scatter_count;
201 u16 sw_id; /* switch ID for this switch */
202 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
203 struct ice_vsi *dflt_vsi; /* default VSI for this switch */
204 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */
211 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
212 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
213 ICE_PFR_REQ, /* set by driver */
214 ICE_CORER_REQ, /* set by driver */
215 ICE_GLOBR_REQ, /* set by driver */
216 ICE_CORER_RECV, /* set by OICR handler */
217 ICE_GLOBR_RECV, /* set by OICR handler */
218 ICE_EMPR_RECV, /* set by OICR handler */
219 ICE_SUSPENDED, /* set on module remove path */
220 ICE_RESET_FAILED, /* set by reset/rebuild */
221 /* When checking for the PF to be in a nominal operating state, the
222 * bits that are grouped at the beginning of the list need to be
223 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
224 * be checked. If you need to add a bit into consideration for nominal
225 * operating state, it must be added before
226 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
227 * without appropriate consideration.
229 ICE_STATE_NOMINAL_CHECK_BITS,
230 ICE_ADMINQ_EVENT_PENDING,
231 ICE_MAILBOXQ_EVENT_PENDING,
232 ICE_SIDEBANDQ_EVENT_PENDING,
233 ICE_MDD_EVENT_PENDING,
234 ICE_VFLR_EVENT_PENDING,
235 ICE_FLTR_OVERFLOW_PROMISC,
237 ICE_VF_DEINIT_IN_PROGRESS,
242 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
243 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
244 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
245 ICE_LINK_DEFAULT_OVERRIDE_PENDING,
246 ICE_PHY_INIT_COMPLETE,
247 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */
248 ICE_STATE_NBITS /* must be last */
253 ICE_VSI_NEEDS_RESTART,
254 ICE_VSI_NETDEV_ALLOCD,
255 ICE_VSI_NETDEV_REGISTERED,
256 ICE_VSI_UMAC_FLTR_CHANGED,
257 ICE_VSI_MMAC_FLTR_CHANGED,
258 ICE_VSI_VLAN_FLTR_CHANGED,
259 ICE_VSI_PROMISC_CHANGED,
260 ICE_VSI_STATE_NBITS /* must be last */
263 /* struct that defines a VSI, associated with a dev */
265 struct net_device *netdev;
266 struct ice_sw *vsw; /* switch this VSI is on */
267 struct ice_pf *back; /* back pointer to PF */
268 struct ice_port_info *port_info; /* back pointer to port_info */
269 struct ice_ring **rx_rings; /* Rx ring array */
270 struct ice_ring **tx_rings; /* Tx ring array */
271 struct ice_q_vector **q_vectors; /* q_vector array */
273 irqreturn_t (*irq_handler)(int irq, void *data);
276 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
277 unsigned int current_netdev_flags;
283 u16 base_vector; /* IRQ base for OS reserved vectors */
284 enum ice_vsi_type type;
285 u16 vsi_num; /* HW (absolute) index of this VSI */
286 u16 idx; /* software index in pf->vsi[] */
288 s16 vf_id; /* VF ID for SR-IOV VSIs */
290 u16 ethtype; /* Ethernet protocol for pause frame */
295 u16 rss_table_size; /* HW RSS table size */
296 u16 rss_size; /* Allocated RSS queues */
297 u8 *rss_hkey_user; /* User configured hash keys */
298 u8 *rss_lut_user; /* User configured lookup table entries */
299 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
301 /* aRFS members only allocated for the PF VSI */
302 #define ICE_MAX_ARFS_LIST 1024
303 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
304 struct hlist_head *arfs_fltr_list;
305 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
306 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
307 atomic_t *arfs_last_fltr_id;
309 /* devlink port data */
310 struct devlink_port devlink_port;
311 bool devlink_port_registered;
316 struct ice_aqc_vsi_props info; /* VSI properties */
319 struct rtnl_link_stats64 net_stats;
320 struct ice_eth_stats eth_stats;
321 struct ice_eth_stats eth_stats_prev;
323 struct list_head tmp_sync_list; /* MAC filters to be synced */
324 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
327 u8 current_isup:1; /* Sync 'link up' logging */
328 u8 stat_offsets_loaded:1;
331 /* queue information */
332 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
333 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
334 u16 *txq_map; /* index in pf->avail_txqs */
335 u16 *rxq_map; /* index in pf->avail_rxqs */
336 u16 alloc_txq; /* Allocated Tx queues */
337 u16 num_txq; /* Used Tx queues */
338 u16 alloc_rxq; /* Allocated Rx queues */
339 u16 num_rxq; /* Used Rx queues */
340 u16 req_txq; /* User requested Tx queues */
341 u16 req_rxq; /* User requested Rx queues */
344 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
345 struct ice_tc_cfg tc_cfg;
346 struct bpf_prog *xdp_prog;
347 struct ice_ring **xdp_rings; /* XDP ring array */
348 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */
349 u16 num_xdp_txq; /* Used XDP queues */
350 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
352 /* setup back reference, to which aggregator node this VSI
355 struct ice_agg_node *agg_node;
356 } ____cacheline_internodealigned_in_smp;
358 /* struct that defines an interrupt vector */
359 struct ice_q_vector {
362 u16 v_idx; /* index in the vsi->q_vector array. */
364 u8 num_ring_rx; /* total number of Rx rings in vector */
365 u8 num_ring_tx; /* total number of Tx rings in vector */
366 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */
367 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
368 * value to the device
372 struct napi_struct napi;
374 struct ice_ring_container rx;
375 struct ice_ring_container tx;
377 cpumask_t affinity_mask;
378 struct irq_affinity_notify affinity_notify;
380 char name[ICE_INT_NAME_STR_LEN];
382 u16 total_events; /* net_dim(): number of interrupts processed */
383 } ____cacheline_internodealigned_in_smp;
390 ICE_FLAG_SRIOV_CAPABLE,
391 ICE_FLAG_DCB_CAPABLE,
394 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */
395 ICE_FLAG_PTP, /* PTP is enabled by software */
397 ICE_FLAG_ADV_FEATURES,
398 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
399 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
401 ICE_FLAG_FW_LLDP_AGENT,
402 ICE_FLAG_MOD_POWER_UNSUPPORTED,
403 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
405 ICE_FLAG_VF_TRUE_PROMISC_ENA,
406 ICE_FLAG_MDD_AUTO_RESET_VF,
407 ICE_FLAG_LINK_LENIENT_MODE_ENA,
408 ICE_PF_FLAGS_NBITS /* must be last */
411 struct ice_agg_node {
413 #define ICE_MAX_VSIS_IN_AGG_NODE 64
419 struct pci_dev *pdev;
421 struct devlink_region *nvm_region;
422 struct devlink_region *devcaps_region;
424 /* OS reserved IRQ details */
425 struct msix_entry *msix_entries;
426 struct ice_res_tracker *irq_tracker;
427 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
428 * number of MSIX vectors needed for all SR-IOV VFs from the number of
429 * MSIX vectors allowed on this PF.
431 u16 sriov_base_vector;
433 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
435 struct ice_vsi **vsi; /* VSIs created by the driver */
436 struct ice_sw *first_sw; /* first switch created by firmware */
437 /* Virtchnl/SR-IOV config info */
439 u16 num_alloc_vfs; /* actual number of VFs allocated */
440 u16 num_vfs_supported; /* num VFs supported for this PF */
443 /* used to ratelimit the MDD event logging */
444 unsigned long last_printed_mdd_jiffies;
445 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT);
446 DECLARE_BITMAP(state, ICE_STATE_NBITS);
447 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
448 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
449 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
450 unsigned long serv_tmr_period;
451 unsigned long serv_tmr_prev;
452 struct timer_list serv_tmr;
453 struct work_struct serv_task;
454 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
455 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
456 struct mutex tc_mutex; /* lock to protect TC changes */
459 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */
460 u16 rdma_base_vector;
462 /* spinlock to protect the AdminQ wait list */
463 spinlock_t aq_wait_lock;
464 struct hlist_head aq_wait_list;
465 wait_queue_head_t aq_wait_queue;
467 wait_queue_head_t reset_wait_queue;
469 u32 hw_csum_rx_error;
470 u16 oicr_idx; /* Other interrupt cause MSIX vector index */
471 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */
472 u16 max_pf_txqs; /* Total Tx queues PF wide */
473 u16 max_pf_rxqs; /* Total Rx queues PF wide */
474 u16 num_lan_msix; /* Total MSIX vectors for base driver */
475 u16 num_lan_tx; /* num LAN Tx queues setup */
476 u16 num_lan_rx; /* num LAN Rx queues setup */
477 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
479 u16 corer_count; /* Core reset count */
480 u16 globr_count; /* Global reset count */
481 u16 empr_count; /* EMP reset count */
482 u16 pfr_count; /* PF reset count */
484 u8 wol_ena : 1; /* software state of WoL */
485 u32 wakeup_reason; /* last wakeup reason */
486 struct ice_hw_port_stats stats;
487 struct ice_hw_port_stats stats_prev;
489 u8 stat_prev_loaded:1; /* has previous stats been loaded */
491 u32 tx_timeout_count;
492 unsigned long tx_timeout_last_recovery;
493 u32 tx_timeout_recovery_level;
494 char int_name[ICE_INT_NAME_STR_LEN];
495 struct auxiliary_device *adev;
499 __le64 nvm_phy_type_lo; /* NVM PHY type low */
500 __le64 nvm_phy_type_hi; /* NVM PHY type high */
501 struct ice_link_default_override_tlv link_dflt_override;
502 struct ice_lag *lag; /* Link Aggregation information */
504 #define ICE_INVALID_AGG_NODE_ID 0
505 #define ICE_PF_AGG_NODE_ID_START 1
506 #define ICE_MAX_PF_AGG_NODES 32
507 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
508 #define ICE_VF_AGG_NODE_ID_START 65
509 #define ICE_MAX_VF_AGG_NODES 32
510 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
513 struct ice_netdev_priv {
518 * ice_irq_dynamic_ena - Enable default interrupt generation settings
519 * @hw: pointer to HW struct
520 * @vsi: pointer to VSI struct, can be NULL
521 * @q_vector: pointer to q_vector, can be NULL
524 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
525 struct ice_q_vector *q_vector)
527 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
528 ((struct ice_pf *)hw->back)->oicr_idx;
529 int itr = ICE_ITR_NONE;
532 /* clear the PBA here, as this function is meant to clean out all
533 * previous interrupts and enable the interrupt
535 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
536 (itr << GLINT_DYN_CTL_ITR_INDX_S);
538 if (test_bit(ICE_VSI_DOWN, vsi->state))
540 wr32(hw, GLINT_DYN_CTL(vector), val);
544 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
545 * @netdev: pointer to the netdev struct
547 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
549 struct ice_netdev_priv *np = netdev_priv(netdev);
551 return np->vsi->back;
554 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
556 return !!vsi->xdp_prog;
559 static inline void ice_set_ring_xdp(struct ice_ring *ring)
561 ring->flags |= ICE_TX_FLAGS_RING_XDP;
565 * ice_xsk_pool - get XSK buffer pool bound to a ring
568 * Returns a pointer to xdp_umem structure if there is a buffer pool present,
571 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring)
573 struct ice_vsi *vsi = ring->vsi;
574 u16 qid = ring->q_index;
576 if (ice_ring_is_xdp(ring))
577 qid -= vsi->num_xdp_txq;
579 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
582 return xsk_get_pool_from_qid(vsi->netdev, qid);
586 * ice_get_main_vsi - Get the PF VSI
589 * returns pf->vsi[0], which by definition is the PF VSI
591 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
600 * ice_get_ctrl_vsi - Get the control VSI
603 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
605 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
606 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
609 return pf->vsi[pf->ctrl_vsi_idx];
613 * ice_set_sriov_cap - enable SRIOV in PF flags
616 static inline void ice_set_sriov_cap(struct ice_pf *pf)
618 if (pf->hw.func_caps.common_cap.sr_iov_1_1)
619 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
623 * ice_clear_sriov_cap - disable SRIOV in PF flags
626 static inline void ice_clear_sriov_cap(struct ice_pf *pf)
628 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
631 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256
632 #define ICE_FD_STAT_PF_IDX(base_idx) \
633 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
634 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
636 bool netif_is_ice(struct net_device *dev);
637 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
638 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
639 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
640 void ice_set_ethtool_ops(struct net_device *netdev);
641 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
642 u16 ice_get_avail_txq_count(struct ice_pf *pf);
643 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
644 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
645 void ice_update_vsi_stats(struct ice_vsi *vsi);
646 void ice_update_pf_stats(struct ice_pf *pf);
647 int ice_up(struct ice_vsi *vsi);
648 int ice_down(struct ice_vsi *vsi);
649 int ice_vsi_cfg(struct ice_vsi *vsi);
650 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
651 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
652 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
654 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
656 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
657 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
658 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
659 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
660 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
661 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
662 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
663 int ice_plug_aux_dev(struct ice_pf *pf);
664 void ice_unplug_aux_dev(struct ice_pf *pf);
665 int ice_init_rdma(struct ice_pf *pf);
666 const char *ice_stat_str(enum ice_status stat_err);
667 const char *ice_aq_str(enum ice_aq_err aq_err);
668 bool ice_is_wol_supported(struct ice_hw *hw);
670 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
672 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
673 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
674 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
675 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
677 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
679 void ice_fdir_release_flows(struct ice_hw *hw);
680 void ice_fdir_replay_flows(struct ice_hw *hw);
681 void ice_fdir_replay_fltrs(struct ice_pf *pf);
682 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
683 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
684 struct ice_rq_event_info *event);
685 int ice_open(struct net_device *netdev);
686 int ice_open_internal(struct net_device *netdev);
687 int ice_stop(struct net_device *netdev);
688 void ice_service_task_schedule(struct ice_pf *pf);
691 * ice_set_rdma_cap - enable RDMA support
694 static inline void ice_set_rdma_cap(struct ice_pf *pf)
696 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
697 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
698 ice_plug_aux_dev(pf);
703 * ice_clear_rdma_cap - disable RDMA support
706 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
708 ice_unplug_aux_dev(pf);
709 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);