drivers/net/ethernet/intel/i40e/i40e_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
   3
   4 #include <linux/etherdevice.h>
   5 #include <linux/of_net.h>
   6 #include <linux/pci.h>
   7 #include <linux/bpf.h>
   8 #include <generated/utsrelease.h>
   9
  10 /* Local includes */
  11 #include "i40e.h"
  12 #include "i40e_diag.h"
  13 #include "i40e_xsk.h"
  14 #include <net/udp_tunnel.h>
  15 #include <net/xdp_sock_drv.h>
  16 /* All i40e tracepoints are defined by the include below, which
  17  * must be included exactly once across the whole kernel with
  18  * CREATE_TRACE_POINTS defined
  19  */
  20 #define CREATE_TRACE_POINTS
  21 #include "i40e_trace.h"
  22
  23 const char i40e_driver_name[] = "i40e";
  24 static const char i40e_driver_string[] =
  25                         "Intel(R) Ethernet Connection XL710 Network Driver";
  26
  27 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
  28
  29 /* a bit of forward declarations */
  30 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
  31 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
  32 static int i40e_add_vsi(struct i40e_vsi *vsi);
  33 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
  34 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
  35 static int i40e_setup_misc_vector(struct i40e_pf *pf);
  36 static void i40e_determine_queue_usage(struct i40e_pf *pf);
  37 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
  38 static void i40e_prep_for_reset(struct i40e_pf *pf);
  39 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
  40                                    bool lock_acquired);
  41 static int i40e_reset(struct i40e_pf *pf);
  42 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  43 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
  44 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
  45 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
  46 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
  47 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
  48 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
  49 static int i40e_get_capabilities(struct i40e_pf *pf,
  50                                  enum i40e_admin_queue_opc list_type);
  51 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
  52
  53 /* i40e_pci_tbl - PCI Device ID Table
  54  *
  55  * Last entry must be all 0s
  56  *
  57  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  58  *   Class, Class Mask, private data (not used) }
  59  */
  60 static const struct pci_device_id i40e_pci_tbl[] = {
  61         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
  62         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
  63         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
  64         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
  65         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
  66         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
  67         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
  68         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
  69         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
  70         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
  71         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
  72         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
  73         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
  74         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
  75         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
  76         {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
  77         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
  78         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
  79         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
  80         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
  81         {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
  82         {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
  83         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
  84         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
  85         /* required last entry */
  86         {0, }
  87 };
  88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
  89
  90 #define I40E_MAX_VF_COUNT 128
  91 static int debug = -1;
  92 module_param(debug, uint, 0);
  93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
  94
  95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
  96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
  97 MODULE_LICENSE("GPL v2");
  98
  99 static struct workqueue_struct *i40e_wq;
 100
 101 /**
 102  * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
 103  * @hw:   pointer to the HW structure
 104  * @mem:  ptr to mem struct to fill out
 105  * @size: size of memory requested
 106  * @alignment: what to align the allocation to
 107  **/
 108 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
 109                             u64 size, u32 alignment)
 110 {
 111         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 112
 113         mem->size = ALIGN(size, alignment);
 114         mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
 115                                      GFP_KERNEL);
 116         if (!mem->va)
 117                 return -ENOMEM;
 118
 119         return 0;
 120 }
 121
 122 /**
 123  * i40e_free_dma_mem_d - OS specific memory free for shared code
 124  * @hw:   pointer to the HW structure
 125  * @mem:  ptr to mem struct to free
 126  **/
 127 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
 128 {
 129         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 130
 131         dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
 132         mem->va = NULL;
 133         mem->pa = 0;
 134         mem->size = 0;
 135
 136         return 0;
 137 }
 138
 139 /**
 140  * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
 141  * @hw:   pointer to the HW structure
 142  * @mem:  ptr to mem struct to fill out
 143  * @size: size of memory requested
 144  **/
 145 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
 146                              u32 size)
 147 {
 148         mem->size = size;
 149         mem->va = kzalloc(size, GFP_KERNEL);
 150
 151         if (!mem->va)
 152                 return -ENOMEM;
 153
 154         return 0;
 155 }
 156
 157 /**
 158  * i40e_free_virt_mem_d - OS specific memory free for shared code
 159  * @hw:   pointer to the HW structure
 160  * @mem:  ptr to mem struct to free
 161  **/
 162 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
 163 {
 164         /* it's ok to kfree a NULL pointer */
 165         kfree(mem->va);
 166         mem->va = NULL;
 167         mem->size = 0;
 168
 169         return 0;
 170 }
 171
 172 /**
 173  * i40e_get_lump - find a lump of free generic resource
 174  * @pf: board private structure
 175  * @pile: the pile of resource to search
 176  * @needed: the number of items needed
 177  * @id: an owner id to stick on the items assigned
 178  *
 179  * Returns the base item index of the lump, or negative for error
 180  *
 181  * The search_hint trick and lack of advanced fit-finding only work
 182  * because we're highly likely to have all the same size lump requests.
 183  * Linear search time and any fragmentation should be minimal.
 184  **/
 185 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
 186                          u16 needed, u16 id)
 187 {
 188         int ret = -ENOMEM;
 189         int i, j;
 190
 191         if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
 192                 dev_info(&pf->pdev->dev,
 193                          "param err: pile=%s needed=%d id=0x%04x\n",
 194                          pile ? "<valid>" : "<null>", needed, id);
 195                 return -EINVAL;
 196         }
 197
 198         /* start the linear search with an imperfect hint */
 199         i = pile->search_hint;
 200         while (i < pile->num_entries) {
 201                 /* skip already allocated entries */
 202                 if (pile->list[i] & I40E_PILE_VALID_BIT) {
 203                         i++;
 204                         continue;
 205                 }
 206
 207                 /* do we have enough in this lump? */
 208                 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
 209                         if (pile->list[i+j] & I40E_PILE_VALID_BIT)
 210                                 break;
 211                 }
 212
 213                 if (j == needed) {
 214                         /* there was enough, so assign it to the requestor */
 215                         for (j = 0; j < needed; j++)
 216                                 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
 217                         ret = i;
 218                         pile->search_hint = i + j;
 219                         break;
 220                 }
 221
 222                 /* not enough, so skip over it and continue looking */
 223                 i += j;
 224         }
 225
 226         return ret;
 227 }
 228
 229 /**
 230  * i40e_put_lump - return a lump of generic resource
 231  * @pile: the pile of resource to search
 232  * @index: the base item index
 233  * @id: the owner id of the items assigned
 234  *
 235  * Returns the count of items in the lump
 236  **/
 237 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
 238 {
 239         int valid_id = (id | I40E_PILE_VALID_BIT);
 240         int count = 0;
 241         int i;
 242
 243         if (!pile || index >= pile->num_entries)
 244                 return -EINVAL;
 245
 246         for (i = index;
 247              i < pile->num_entries && pile->list[i] == valid_id;
 248              i++) {
 249                 pile->list[i] = 0;
 250                 count++;
 251         }
 252
 253         if (count && index < pile->search_hint)
 254                 pile->search_hint = index;
 255
 256         return count;
 257 }
 258
 259 /**
 260  * i40e_find_vsi_from_id - searches for the vsi with the given id
 261  * @pf: the pf structure to search for the vsi
 262  * @id: id of the vsi it is searching for
 263  **/
 264 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
 265 {
 266         int i;
 267
 268         for (i = 0; i < pf->num_alloc_vsi; i++)
 269                 if (pf->vsi[i] && (pf->vsi[i]->id == id))
 270                         return pf->vsi[i];
 271
 272         return NULL;
 273 }
 274
 275 /**
 276  * i40e_service_event_schedule - Schedule the service task to wake up
 277  * @pf: board private structure
 278  *
 279  * If not already scheduled, this puts the task into the work queue
 280  **/
 281 void i40e_service_event_schedule(struct i40e_pf *pf)
 282 {
 283         if ((!test_bit(__I40E_DOWN, pf->state) &&
 284              !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
 285               test_bit(__I40E_RECOVERY_MODE, pf->state))
 286                 queue_work(i40e_wq, &pf->service_task);
 287 }
 288
 289 /**
 290  * i40e_tx_timeout - Respond to a Tx Hang
 291  * @netdev: network interface device structure
 292  * @txqueue: queue number timing out
 293  *
 294  * If any port has noticed a Tx timeout, it is likely that the whole
 295  * device is munged, not just the one netdev port, so go for the full
 296  * reset.
 297  **/
 298 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
 299 {
 300         struct i40e_netdev_priv *np = netdev_priv(netdev);
 301         struct i40e_vsi *vsi = np->vsi;
 302         struct i40e_pf *pf = vsi->back;
 303         struct i40e_ring *tx_ring = NULL;
 304         unsigned int i;
 305         u32 head, val;
 306
 307         pf->tx_timeout_count++;
 308
 309         /* with txqueue index, find the tx_ring struct */
 310         for (i = 0; i < vsi->num_queue_pairs; i++) {
 311                 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
 312                         if (txqueue ==
 313                             vsi->tx_rings[i]->queue_index) {
 314                                 tx_ring = vsi->tx_rings[i];
 315                                 break;
 316                         }
 317                 }
 318         }
 319
 320         if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
 321                 pf->tx_timeout_recovery_level = 1;  /* reset after some time */
 322         else if (time_before(jiffies,
 323                       (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
 324                 return;   /* don't do any new action before the next timeout */
 325
 326         /* don't kick off another recovery if one is already pending */
 327         if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
 328                 return;
 329
 330         if (tx_ring) {
 331                 head = i40e_get_head(tx_ring);
 332                 /* Read interrupt register */
 333                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
 334                         val = rd32(&pf->hw,
 335                              I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
 336                                                 tx_ring->vsi->base_vector - 1));
 337                 else
 338                         val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
 339
 340                 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
 341                             vsi->seid, txqueue, tx_ring->next_to_clean,
 342                             head, tx_ring->next_to_use,
 343                             readl(tx_ring->tail), val);
 344         }
 345
 346         pf->tx_timeout_last_recovery = jiffies;
 347         netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
 348                     pf->tx_timeout_recovery_level, txqueue);
 349
 350         switch (pf->tx_timeout_recovery_level) {
 351         case 1:
 352                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
 353                 break;
 354         case 2:
 355                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
 356                 break;
 357         case 3:
 358                 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
 359                 break;
 360         default:
 361                 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
 362                 break;
 363         }
 364
 365         i40e_service_event_schedule(pf);
 366         pf->tx_timeout_recovery_level++;
 367 }
 368
 369 /**
 370  * i40e_get_vsi_stats_struct - Get System Network Statistics
 371  * @vsi: the VSI we care about
 372  *
 373  * Returns the address of the device statistics structure.
 374  * The statistics are actually updated from the service task.
 375  **/
 376 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
 377 {
 378         return &vsi->net_stats;
 379 }
 380
 381 /**
 382  * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
 383  * @ring: Tx ring to get statistics from
 384  * @stats: statistics entry to be updated
 385  **/
 386 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
 387                                             struct rtnl_link_stats64 *stats)
 388 {
 389         u64 bytes, packets;
 390         unsigned int start;
 391
 392         do {
 393                 start = u64_stats_fetch_begin_irq(&ring->syncp);
 394                 packets = ring->stats.packets;
 395                 bytes   = ring->stats.bytes;
 396         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 397
 398         stats->tx_packets += packets;
 399         stats->tx_bytes   += bytes;
 400 }
 401
 402 /**
 403  * i40e_get_netdev_stats_struct - Get statistics for netdev interface
 404  * @netdev: network interface device structure
 405  * @stats: data structure to store statistics
 406  *
 407  * Returns the address of the device statistics structure.
 408  * The statistics are actually updated from the service task.
 409  **/
 410 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
 411                                   struct rtnl_link_stats64 *stats)
 412 {
 413         struct i40e_netdev_priv *np = netdev_priv(netdev);
 414         struct i40e_vsi *vsi = np->vsi;
 415         struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
 416         struct i40e_ring *ring;
 417         int i;
 418
 419         if (test_bit(__I40E_VSI_DOWN, vsi->state))
 420                 return;
 421
 422         if (!vsi->tx_rings)
 423                 return;
 424
 425         rcu_read_lock();
 426         for (i = 0; i < vsi->num_queue_pairs; i++) {
 427                 u64 bytes, packets;
 428                 unsigned int start;
 429
 430                 ring = READ_ONCE(vsi->tx_rings[i]);
 431                 if (!ring)
 432                         continue;
 433                 i40e_get_netdev_stats_struct_tx(ring, stats);
 434
 435                 if (i40e_enabled_xdp_vsi(vsi)) {
 436                         ring = READ_ONCE(vsi->xdp_rings[i]);
 437                         if (!ring)
 438                                 continue;
 439                         i40e_get_netdev_stats_struct_tx(ring, stats);
 440                 }
 441
 442                 ring = READ_ONCE(vsi->rx_rings[i]);
 443                 if (!ring)
 444                         continue;
 445                 do {
 446                         start   = u64_stats_fetch_begin_irq(&ring->syncp);
 447                         packets = ring->stats.packets;
 448                         bytes   = ring->stats.bytes;
 449                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 450
 451                 stats->rx_packets += packets;
 452                 stats->rx_bytes   += bytes;
 453
 454         }
 455         rcu_read_unlock();
 456
 457         /* following stats updated by i40e_watchdog_subtask() */
 458         stats->multicast        = vsi_stats->multicast;
 459         stats->tx_errors        = vsi_stats->tx_errors;
 460         stats->tx_dropped       = vsi_stats->tx_dropped;
 461         stats->rx_errors        = vsi_stats->rx_errors;
 462         stats->rx_dropped       = vsi_stats->rx_dropped;
 463         stats->rx_crc_errors    = vsi_stats->rx_crc_errors;
 464         stats->rx_length_errors = vsi_stats->rx_length_errors;
 465 }
 466
 467 /**
 468  * i40e_vsi_reset_stats - Resets all stats of the given vsi
 469  * @vsi: the VSI to have its stats reset
 470  **/
 471 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
 472 {
 473         struct rtnl_link_stats64 *ns;
 474         int i;
 475
 476         if (!vsi)
 477                 return;
 478
 479         ns = i40e_get_vsi_stats_struct(vsi);
 480         memset(ns, 0, sizeof(*ns));
 481         memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
 482         memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
 483         memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
 484         if (vsi->rx_rings && vsi->rx_rings[0]) {
 485                 for (i = 0; i < vsi->num_queue_pairs; i++) {
 486                         memset(&vsi->rx_rings[i]->stats, 0,
 487                                sizeof(vsi->rx_rings[i]->stats));
 488                         memset(&vsi->rx_rings[i]->rx_stats, 0,
 489                                sizeof(vsi->rx_rings[i]->rx_stats));
 490                         memset(&vsi->tx_rings[i]->stats, 0,
 491                                sizeof(vsi->tx_rings[i]->stats));
 492                         memset(&vsi->tx_rings[i]->tx_stats, 0,
 493                                sizeof(vsi->tx_rings[i]->tx_stats));
 494                 }
 495         }
 496         vsi->stat_offsets_loaded = false;
 497 }
 498
 499 /**
 500  * i40e_pf_reset_stats - Reset all of the stats for the given PF
 501  * @pf: the PF to be reset
 502  **/
 503 void i40e_pf_reset_stats(struct i40e_pf *pf)
 504 {
 505         int i;
 506
 507         memset(&pf->stats, 0, sizeof(pf->stats));
 508         memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
 509         pf->stat_offsets_loaded = false;
 510
 511         for (i = 0; i < I40E_MAX_VEB; i++) {
 512                 if (pf->veb[i]) {
 513                         memset(&pf->veb[i]->stats, 0,
 514                                sizeof(pf->veb[i]->stats));
 515                         memset(&pf->veb[i]->stats_offsets, 0,
 516                                sizeof(pf->veb[i]->stats_offsets));
 517                         memset(&pf->veb[i]->tc_stats, 0,
 518                                sizeof(pf->veb[i]->tc_stats));
 519                         memset(&pf->veb[i]->tc_stats_offsets, 0,
 520                                sizeof(pf->veb[i]->tc_stats_offsets));
 521                         pf->veb[i]->stat_offsets_loaded = false;
 522                 }
 523         }
 524         pf->hw_csum_rx_error = 0;
 525 }
 526
 527 /**
 528  * i40e_stat_update48 - read and update a 48 bit stat from the chip
 529  * @hw: ptr to the hardware info
 530  * @hireg: the high 32 bit reg to read
 531  * @loreg: the low 32 bit reg to read
 532  * @offset_loaded: has the initial offset been loaded yet
 533  * @offset: ptr to current offset value
 534  * @stat: ptr to the stat
 535  *
 536  * Since the device stats are not reset at PFReset, they likely will not
 537  * be zeroed when the driver starts.  We'll save the first values read
 538  * and use them as offsets to be subtracted from the raw values in order
 539  * to report stats that count from zero.  In the process, we also manage
 540  * the potential roll-over.
 541  **/
 542 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
 543                                bool offset_loaded, u64 *offset, u64 *stat)
 544 {
 545         u64 new_data;
 546
 547         if (hw->device_id == I40E_DEV_ID_QEMU) {
 548                 new_data = rd32(hw, loreg);
 549                 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
 550         } else {
 551                 new_data = rd64(hw, loreg);
 552         }
 553         if (!offset_loaded)
 554                 *offset = new_data;
 555         if (likely(new_data >= *offset))
 556                 *stat = new_data - *offset;
 557         else
 558                 *stat = (new_data + BIT_ULL(48)) - *offset;
 559         *stat &= 0xFFFFFFFFFFFFULL;
 560 }
 561
 562 /**
 563  * i40e_stat_update32 - read and update a 32 bit stat from the chip
 564  * @hw: ptr to the hardware info
 565  * @reg: the hw reg to read
 566  * @offset_loaded: has the initial offset been loaded yet
 567  * @offset: ptr to current offset value
 568  * @stat: ptr to the stat
 569  **/
 570 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
 571                                bool offset_loaded, u64 *offset, u64 *stat)
 572 {
 573         u32 new_data;
 574
 575         new_data = rd32(hw, reg);
 576         if (!offset_loaded)
 577                 *offset = new_data;
 578         if (likely(new_data >= *offset))
 579                 *stat = (u32)(new_data - *offset);
 580         else
 581                 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
 582 }
 583
 584 /**
 585  * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
 586  * @hw: ptr to the hardware info
 587  * @reg: the hw reg to read and clear
 588  * @stat: ptr to the stat
 589  **/
 590 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
 591 {
 592         u32 new_data = rd32(hw, reg);
 593
 594         wr32(hw, reg, 1); /* must write a nonzero value to clear register */
 595         *stat += new_data;
 596 }
 597
 598 /**
 599  * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
 600  * @vsi: the VSI to be updated
 601  **/
 602 void i40e_update_eth_stats(struct i40e_vsi *vsi)
 603 {
 604         int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
 605         struct i40e_pf *pf = vsi->back;
 606         struct i40e_hw *hw = &pf->hw;
 607         struct i40e_eth_stats *oes;
 608         struct i40e_eth_stats *es;     /* device's eth stats */
 609
 610         es = &vsi->eth_stats;
 611         oes = &vsi->eth_stats_offsets;
 612
 613         /* Gather up the stats that the hw collects */
 614         i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
 615                            vsi->stat_offsets_loaded,
 616                            &oes->tx_errors, &es->tx_errors);
 617         i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
 618                            vsi->stat_offsets_loaded,
 619                            &oes->rx_discards, &es->rx_discards);
 620         i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
 621                            vsi->stat_offsets_loaded,
 622                            &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
 623
 624         i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
 625                            I40E_GLV_GORCL(stat_idx),
 626                            vsi->stat_offsets_loaded,
 627                            &oes->rx_bytes, &es->rx_bytes);
 628         i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
 629                            I40E_GLV_UPRCL(stat_idx),
 630                            vsi->stat_offsets_loaded,
 631                            &oes->rx_unicast, &es->rx_unicast);
 632         i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
 633                            I40E_GLV_MPRCL(stat_idx),
 634                            vsi->stat_offsets_loaded,
 635                            &oes->rx_multicast, &es->rx_multicast);
 636         i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
 637                            I40E_GLV_BPRCL(stat_idx),
 638                            vsi->stat_offsets_loaded,
 639                            &oes->rx_broadcast, &es->rx_broadcast);
 640
 641         i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
 642                            I40E_GLV_GOTCL(stat_idx),
 643                            vsi->stat_offsets_loaded,
 644                            &oes->tx_bytes, &es->tx_bytes);
 645         i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
 646                            I40E_GLV_UPTCL(stat_idx),
 647                            vsi->stat_offsets_loaded,
 648                            &oes->tx_unicast, &es->tx_unicast);
 649         i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
 650                            I40E_GLV_MPTCL(stat_idx),
 651                            vsi->stat_offsets_loaded,
 652                            &oes->tx_multicast, &es->tx_multicast);
 653         i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
 654                            I40E_GLV_BPTCL(stat_idx),
 655                            vsi->stat_offsets_loaded,
 656                            &oes->tx_broadcast, &es->tx_broadcast);
 657         vsi->stat_offsets_loaded = true;
 658 }
 659
 660 /**
 661  * i40e_update_veb_stats - Update Switch component statistics
 662  * @veb: the VEB being updated
 663  **/
 664 void i40e_update_veb_stats(struct i40e_veb *veb)
 665 {
 666         struct i40e_pf *pf = veb->pf;
 667         struct i40e_hw *hw = &pf->hw;
 668         struct i40e_eth_stats *oes;
 669         struct i40e_eth_stats *es;     /* device's eth stats */
 670         struct i40e_veb_tc_stats *veb_oes;
 671         struct i40e_veb_tc_stats *veb_es;
 672         int i, idx = 0;
 673
 674         idx = veb->stats_idx;
 675         es = &veb->stats;
 676         oes = &veb->stats_offsets;
 677         veb_es = &veb->tc_stats;
 678         veb_oes = &veb->tc_stats_offsets;
 679
 680         /* Gather up the stats that the hw collects */
 681         i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
 682                            veb->stat_offsets_loaded,
 683                            &oes->tx_discards, &es->tx_discards);
 684         if (hw->revision_id > 0)
 685                 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
 686                                    veb->stat_offsets_loaded,
 687                                    &oes->rx_unknown_protocol,
 688                                    &es->rx_unknown_protocol);
 689         i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
 690                            veb->stat_offsets_loaded,
 691                            &oes->rx_bytes, &es->rx_bytes);
 692         i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
 693                            veb->stat_offsets_loaded,
 694                            &oes->rx_unicast, &es->rx_unicast);
 695         i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
 696                            veb->stat_offsets_loaded,
 697                            &oes->rx_multicast, &es->rx_multicast);
 698         i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
 699                            veb->stat_offsets_loaded,
 700                            &oes->rx_broadcast, &es->rx_broadcast);
 701
 702         i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
 703                            veb->stat_offsets_loaded,
 704                            &oes->tx_bytes, &es->tx_bytes);
 705         i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
 706                            veb->stat_offsets_loaded,
 707                            &oes->tx_unicast, &es->tx_unicast);
 708         i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
 709                            veb->stat_offsets_loaded,
 710                            &oes->tx_multicast, &es->tx_multicast);
 711         i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
 712                            veb->stat_offsets_loaded,
 713                            &oes->tx_broadcast, &es->tx_broadcast);
 714         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 715                 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
 716                                    I40E_GLVEBTC_RPCL(i, idx),
 717                                    veb->stat_offsets_loaded,
 718                                    &veb_oes->tc_rx_packets[i],
 719                                    &veb_es->tc_rx_packets[i]);
 720                 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
 721                                    I40E_GLVEBTC_RBCL(i, idx),
 722                                    veb->stat_offsets_loaded,
 723                                    &veb_oes->tc_rx_bytes[i],
 724                                    &veb_es->tc_rx_bytes[i]);
 725                 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
 726                                    I40E_GLVEBTC_TPCL(i, idx),
 727                                    veb->stat_offsets_loaded,
 728                                    &veb_oes->tc_tx_packets[i],
 729                                    &veb_es->tc_tx_packets[i]);
 730                 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
 731                                    I40E_GLVEBTC_TBCL(i, idx),
 732                                    veb->stat_offsets_loaded,
 733                                    &veb_oes->tc_tx_bytes[i],
 734                                    &veb_es->tc_tx_bytes[i]);
 735         }
 736         veb->stat_offsets_loaded = true;
 737 }
 738
 739 /**
 740  * i40e_update_vsi_stats - Update the vsi statistics counters.
 741  * @vsi: the VSI to be updated
 742  *
 743  * There are a few instances where we store the same stat in a
 744  * couple of different structs.  This is partly because we have
 745  * the netdev stats that need to be filled out, which is slightly
 746  * different from the "eth_stats" defined by the chip and used in
 747  * VF communications.  We sort it out here.
 748  **/
 749 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
 750 {
 751         struct i40e_pf *pf = vsi->back;
 752         struct rtnl_link_stats64 *ons;
 753         struct rtnl_link_stats64 *ns;   /* netdev stats */
 754         struct i40e_eth_stats *oes;
 755         struct i40e_eth_stats *es;     /* device's eth stats */
 756         u32 tx_restart, tx_busy;
 757         struct i40e_ring *p;
 758         u32 rx_page, rx_buf;
 759         u64 bytes, packets;
 760         unsigned int start;
 761         u64 tx_linearize;
 762         u64 tx_force_wb;
 763         u64 rx_p, rx_b;
 764         u64 tx_p, tx_b;
 765         u16 q;
 766
 767         if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
 768             test_bit(__I40E_CONFIG_BUSY, pf->state))
 769                 return;
 770
 771         ns = i40e_get_vsi_stats_struct(vsi);
 772         ons = &vsi->net_stats_offsets;
 773         es = &vsi->eth_stats;
 774         oes = &vsi->eth_stats_offsets;
 775
 776         /* Gather up the netdev and vsi stats that the driver collects
 777          * on the fly during packet processing
 778          */
 779         rx_b = rx_p = 0;
 780         tx_b = tx_p = 0;
 781         tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
 782         rx_page = 0;
 783         rx_buf = 0;
 784         rcu_read_lock();
 785         for (q = 0; q < vsi->num_queue_pairs; q++) {
 786                 /* locate Tx ring */
 787                 p = READ_ONCE(vsi->tx_rings[q]);
 788                 if (!p)
 789                         continue;
 790
 791                 do {
 792                         start = u64_stats_fetch_begin_irq(&p->syncp);
 793                         packets = p->stats.packets;
 794                         bytes = p->stats.bytes;
 795                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 796                 tx_b += bytes;
 797                 tx_p += packets;
 798                 tx_restart += p->tx_stats.restart_queue;
 799                 tx_busy += p->tx_stats.tx_busy;
 800                 tx_linearize += p->tx_stats.tx_linearize;
 801                 tx_force_wb += p->tx_stats.tx_force_wb;
 802
 803                 /* locate Rx ring */
 804                 p = READ_ONCE(vsi->rx_rings[q]);
 805                 if (!p)
 806                         continue;
 807
 808                 do {
 809                         start = u64_stats_fetch_begin_irq(&p->syncp);
 810                         packets = p->stats.packets;
 811                         bytes = p->stats.bytes;
 812                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 813                 rx_b += bytes;
 814                 rx_p += packets;
 815                 rx_buf += p->rx_stats.alloc_buff_failed;
 816                 rx_page += p->rx_stats.alloc_page_failed;
 817
 818                 if (i40e_enabled_xdp_vsi(vsi)) {
 819                         /* locate XDP ring */
 820                         p = READ_ONCE(vsi->xdp_rings[q]);
 821                         if (!p)
 822                                 continue;
 823
 824                         do {
 825                                 start = u64_stats_fetch_begin_irq(&p->syncp);
 826                                 packets = p->stats.packets;
 827                                 bytes = p->stats.bytes;
 828                         } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 829                         tx_b += bytes;
 830                         tx_p += packets;
 831                         tx_restart += p->tx_stats.restart_queue;
 832                         tx_busy += p->tx_stats.tx_busy;
 833                         tx_linearize += p->tx_stats.tx_linearize;
 834                         tx_force_wb += p->tx_stats.tx_force_wb;
 835                 }
 836         }
 837         rcu_read_unlock();
 838         vsi->tx_restart = tx_restart;
 839         vsi->tx_busy = tx_busy;
 840         vsi->tx_linearize = tx_linearize;
 841         vsi->tx_force_wb = tx_force_wb;
 842         vsi->rx_page_failed = rx_page;
 843         vsi->rx_buf_failed = rx_buf;
 844
 845         ns->rx_packets = rx_p;
 846         ns->rx_bytes = rx_b;
 847         ns->tx_packets = tx_p;
 848         ns->tx_bytes = tx_b;
 849
 850         /* update netdev stats from eth stats */
 851         i40e_update_eth_stats(vsi);
 852         ons->tx_errors = oes->tx_errors;
 853         ns->tx_errors = es->tx_errors;
 854         ons->multicast = oes->rx_multicast;
 855         ns->multicast = es->rx_multicast;
 856         ons->rx_dropped = oes->rx_discards;
 857         ns->rx_dropped = es->rx_discards;
 858         ons->tx_dropped = oes->tx_discards;
 859         ns->tx_dropped = es->tx_discards;
 860
 861         /* pull in a couple PF stats if this is the main vsi */
 862         if (vsi == pf->vsi[pf->lan_vsi]) {
 863                 ns->rx_crc_errors = pf->stats.crc_errors;
 864                 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
 865                 ns->rx_length_errors = pf->stats.rx_length_errors;
 866         }
 867 }
 868
 869 /**
 870  * i40e_update_pf_stats - Update the PF statistics counters.
 871  * @pf: the PF to be updated
 872  **/
 873 static void i40e_update_pf_stats(struct i40e_pf *pf)
 874 {
 875         struct i40e_hw_port_stats *osd = &pf->stats_offsets;
 876         struct i40e_hw_port_stats *nsd = &pf->stats;
 877         struct i40e_hw *hw = &pf->hw;
 878         u32 val;
 879         int i;
 880
 881         i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
 882                            I40E_GLPRT_GORCL(hw->port),
 883                            pf->stat_offsets_loaded,
 884                            &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
 885         i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
 886                            I40E_GLPRT_GOTCL(hw->port),
 887                            pf->stat_offsets_loaded,
 888                            &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
 889         i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
 890                            pf->stat_offsets_loaded,
 891                            &osd->eth.rx_discards,
 892                            &nsd->eth.rx_discards);
 893         i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
 894                            I40E_GLPRT_UPRCL(hw->port),
 895                            pf->stat_offsets_loaded,
 896                            &osd->eth.rx_unicast,
 897                            &nsd->eth.rx_unicast);
 898         i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
 899                            I40E_GLPRT_MPRCL(hw->port),
 900                            pf->stat_offsets_loaded,
 901                            &osd->eth.rx_multicast,
 902                            &nsd->eth.rx_multicast);
 903         i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
 904                            I40E_GLPRT_BPRCL(hw->port),
 905                            pf->stat_offsets_loaded,
 906                            &osd->eth.rx_broadcast,
 907                            &nsd->eth.rx_broadcast);
 908         i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
 909                            I40E_GLPRT_UPTCL(hw->port),
 910                            pf->stat_offsets_loaded,
 911                            &osd->eth.tx_unicast,
 912                            &nsd->eth.tx_unicast);
 913         i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
 914                            I40E_GLPRT_MPTCL(hw->port),
 915                            pf->stat_offsets_loaded,
 916                            &osd->eth.tx_multicast,
 917                            &nsd->eth.tx_multicast);
 918         i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
 919                            I40E_GLPRT_BPTCL(hw->port),
 920                            pf->stat_offsets_loaded,
 921                            &osd->eth.tx_broadcast,
 922                            &nsd->eth.tx_broadcast);
 923
 924         i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
 925                            pf->stat_offsets_loaded,
 926                            &osd->tx_dropped_link_down,
 927                            &nsd->tx_dropped_link_down);
 928
 929         i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
 930                            pf->stat_offsets_loaded,
 931                            &osd->crc_errors, &nsd->crc_errors);
 932
 933         i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
 934                            pf->stat_offsets_loaded,
 935                            &osd->illegal_bytes, &nsd->illegal_bytes);
 936
 937         i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
 938                            pf->stat_offsets_loaded,
 939                            &osd->mac_local_faults,
 940                            &nsd->mac_local_faults);
 941         i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
 942                            pf->stat_offsets_loaded,
 943                            &osd->mac_remote_faults,
 944                            &nsd->mac_remote_faults);
 945
 946         i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
 947                            pf->stat_offsets_loaded,
 948                            &osd->rx_length_errors,
 949                            &nsd->rx_length_errors);
 950
 951         i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
 952                            pf->stat_offsets_loaded,
 953                            &osd->link_xon_rx, &nsd->link_xon_rx);
 954         i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
 955                            pf->stat_offsets_loaded,
 956                            &osd->link_xon_tx, &nsd->link_xon_tx);
 957         i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
 958                            pf->stat_offsets_loaded,
 959                            &osd->link_xoff_rx, &nsd->link_xoff_rx);
 960         i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
 961                            pf->stat_offsets_loaded,
 962                            &osd->link_xoff_tx, &nsd->link_xoff_tx);
 963
 964         for (i = 0; i < 8; i++) {
 965                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
 966                                    pf->stat_offsets_loaded,
 967                                    &osd->priority_xoff_rx[i],
 968                                    &nsd->priority_xoff_rx[i]);
 969                 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
 970                                    pf->stat_offsets_loaded,
 971                                    &osd->priority_xon_rx[i],
 972                                    &nsd->priority_xon_rx[i]);
 973                 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
 974                                    pf->stat_offsets_loaded,
 975                                    &osd->priority_xon_tx[i],
 976                                    &nsd->priority_xon_tx[i]);
 977                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
 978                                    pf->stat_offsets_loaded,
 979                                    &osd->priority_xoff_tx[i],
 980                                    &nsd->priority_xoff_tx[i]);
 981                 i40e_stat_update32(hw,
 982                                    I40E_GLPRT_RXON2OFFCNT(hw->port, i),
 983                                    pf->stat_offsets_loaded,
 984                                    &osd->priority_xon_2_xoff[i],
 985                                    &nsd->priority_xon_2_xoff[i]);
 986         }
 987
 988         i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
 989                            I40E_GLPRT_PRC64L(hw->port),
 990                            pf->stat_offsets_loaded,
 991                            &osd->rx_size_64, &nsd->rx_size_64);
 992         i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
 993                            I40E_GLPRT_PRC127L(hw->port),
 994                            pf->stat_offsets_loaded,
 995                            &osd->rx_size_127, &nsd->rx_size_127);
 996         i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
 997                            I40E_GLPRT_PRC255L(hw->port),
 998                            pf->stat_offsets_loaded,
 999                            &osd->rx_size_255, &nsd->rx_size_255);
1000         i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1001                            I40E_GLPRT_PRC511L(hw->port),
1002                            pf->stat_offsets_loaded,
1003                            &osd->rx_size_511, &nsd->rx_size_511);
1004         i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1005                            I40E_GLPRT_PRC1023L(hw->port),
1006                            pf->stat_offsets_loaded,
1007                            &osd->rx_size_1023, &nsd->rx_size_1023);
1008         i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1009                            I40E_GLPRT_PRC1522L(hw->port),
1010                            pf->stat_offsets_loaded,
1011                            &osd->rx_size_1522, &nsd->rx_size_1522);
1012         i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1013                            I40E_GLPRT_PRC9522L(hw->port),
1014                            pf->stat_offsets_loaded,
1015                            &osd->rx_size_big, &nsd->rx_size_big);
1016
1017         i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1018                            I40E_GLPRT_PTC64L(hw->port),
1019                            pf->stat_offsets_loaded,
1020                            &osd->tx_size_64, &nsd->tx_size_64);
1021         i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1022                            I40E_GLPRT_PTC127L(hw->port),
1023                            pf->stat_offsets_loaded,
1024                            &osd->tx_size_127, &nsd->tx_size_127);
1025         i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1026                            I40E_GLPRT_PTC255L(hw->port),
1027                            pf->stat_offsets_loaded,
1028                            &osd->tx_size_255, &nsd->tx_size_255);
1029         i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1030                            I40E_GLPRT_PTC511L(hw->port),
1031                            pf->stat_offsets_loaded,
1032                            &osd->tx_size_511, &nsd->tx_size_511);
1033         i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1034                            I40E_GLPRT_PTC1023L(hw->port),
1035                            pf->stat_offsets_loaded,
1036                            &osd->tx_size_1023, &nsd->tx_size_1023);
1037         i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1038                            I40E_GLPRT_PTC1522L(hw->port),
1039                            pf->stat_offsets_loaded,
1040                            &osd->tx_size_1522, &nsd->tx_size_1522);
1041         i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1042                            I40E_GLPRT_PTC9522L(hw->port),
1043                            pf->stat_offsets_loaded,
1044                            &osd->tx_size_big, &nsd->tx_size_big);
1045
1046         i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1047                            pf->stat_offsets_loaded,
1048                            &osd->rx_undersize, &nsd->rx_undersize);
1049         i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1050                            pf->stat_offsets_loaded,
1051                            &osd->rx_fragments, &nsd->rx_fragments);
1052         i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1053                            pf->stat_offsets_loaded,
1054                            &osd->rx_oversize, &nsd->rx_oversize);
1055         i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1056                            pf->stat_offsets_loaded,
1057                            &osd->rx_jabber, &nsd->rx_jabber);
1058
1059         /* FDIR stats */
1060         i40e_stat_update_and_clear32(hw,
1061                         I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1062                         &nsd->fd_atr_match);
1063         i40e_stat_update_and_clear32(hw,
1064                         I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1065                         &nsd->fd_sb_match);
1066         i40e_stat_update_and_clear32(hw,
1067                         I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1068                         &nsd->fd_atr_tunnel_match);
1069
1070         val = rd32(hw, I40E_PRTPM_EEE_STAT);
1071         nsd->tx_lpi_status =
1072                        (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1073                         I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1074         nsd->rx_lpi_status =
1075                        (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1076                         I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1077         i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1078                            pf->stat_offsets_loaded,
1079                            &osd->tx_lpi_count, &nsd->tx_lpi_count);
1080         i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1081                            pf->stat_offsets_loaded,
1082                            &osd->rx_lpi_count, &nsd->rx_lpi_count);
1083
1084         if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1085             !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1086                 nsd->fd_sb_status = true;
1087         else
1088                 nsd->fd_sb_status = false;
1089
1090         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1091             !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1092                 nsd->fd_atr_status = true;
1093         else
1094                 nsd->fd_atr_status = false;
1095
1096         pf->stat_offsets_loaded = true;
1097 }
1098
1099 /**
1100  * i40e_update_stats - Update the various statistics counters.
1101  * @vsi: the VSI to be updated
1102  *
1103  * Update the various stats for this VSI and its related entities.
1104  **/
1105 void i40e_update_stats(struct i40e_vsi *vsi)
1106 {
1107         struct i40e_pf *pf = vsi->back;
1108
1109         if (vsi == pf->vsi[pf->lan_vsi])
1110                 i40e_update_pf_stats(pf);
1111
1112         i40e_update_vsi_stats(vsi);
1113 }
1114
1115 /**
1116  * i40e_count_filters - counts VSI mac filters
1117  * @vsi: the VSI to be searched
1118  *
1119  * Returns count of mac filters
1120  **/
1121 int i40e_count_filters(struct i40e_vsi *vsi)
1122 {
1123         struct i40e_mac_filter *f;
1124         struct hlist_node *h;
1125         int bkt;
1126         int cnt = 0;
1127
1128         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1129                 ++cnt;
1130
1131         return cnt;
1132 }
1133
1134 /**
1135  * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1136  * @vsi: the VSI to be searched
1137  * @macaddr: the MAC address
1138  * @vlan: the vlan
1139  *
1140  * Returns ptr to the filter object or NULL
1141  **/
1142 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1143                                                 const u8 *macaddr, s16 vlan)
1144 {
1145         struct i40e_mac_filter *f;
1146         u64 key;
1147
1148         if (!vsi || !macaddr)
1149                 return NULL;
1150
1151         key = i40e_addr_to_hkey(macaddr);
1152         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1153                 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1154                     (vlan == f->vlan))
1155                         return f;
1156         }
1157         return NULL;
1158 }
1159
1160 /**
1161  * i40e_find_mac - Find a mac addr in the macvlan filters list
1162  * @vsi: the VSI to be searched
1163  * @macaddr: the MAC address we are searching for
1164  *
1165  * Returns the first filter with the provided MAC address or NULL if
1166  * MAC address was not found
1167  **/
1168 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1169 {
1170         struct i40e_mac_filter *f;
1171         u64 key;
1172
1173         if (!vsi || !macaddr)
1174                 return NULL;
1175
1176         key = i40e_addr_to_hkey(macaddr);
1177         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1178                 if ((ether_addr_equal(macaddr, f->macaddr)))
1179                         return f;
1180         }
1181         return NULL;
1182 }
1183
1184 /**
1185  * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1186  * @vsi: the VSI to be searched
1187  *
1188  * Returns true if VSI is in vlan mode or false otherwise
1189  **/
1190 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1191 {
1192         /* If we have a PVID, always operate in VLAN mode */
1193         if (vsi->info.pvid)
1194                 return true;
1195
1196         /* We need to operate in VLAN mode whenever we have any filters with
1197          * a VLAN other than I40E_VLAN_ALL. We could check the table each
1198          * time, incurring search cost repeatedly. However, we can notice two
1199          * things:
1200          *
1201          * 1) the only place where we can gain a VLAN filter is in
1202          *    i40e_add_filter.
1203          *
1204          * 2) the only place where filters are actually removed is in
1205          *    i40e_sync_filters_subtask.
1206          *
1207          * Thus, we can simply use a boolean value, has_vlan_filters which we
1208          * will set to true when we add a VLAN filter in i40e_add_filter. Then
1209          * we have to perform the full search after deleting filters in
1210          * i40e_sync_filters_subtask, but we already have to search
1211          * filters here and can perform the check at the same time. This
1212          * results in avoiding embedding a loop for VLAN mode inside another
1213          * loop over all the filters, and should maintain correctness as noted
1214          * above.
1215          */
1216         return vsi->has_vlan_filter;
1217 }
1218
1219 /**
1220  * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1221  * @vsi: the VSI to configure
1222  * @tmp_add_list: list of filters ready to be added
1223  * @tmp_del_list: list of filters ready to be deleted
1224  * @vlan_filters: the number of active VLAN filters
1225  *
1226  * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1227  * behave as expected. If we have any active VLAN filters remaining or about
1228  * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1229  * so that they only match against untagged traffic. If we no longer have any
1230  * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1231  * so that they match against both tagged and untagged traffic. In this way,
1232  * we ensure that we correctly receive the desired traffic. This ensures that
1233  * when we have an active VLAN we will receive only untagged traffic and
1234  * traffic matching active VLANs. If we have no active VLANs then we will
1235  * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1236  *
1237  * Finally, in a similar fashion, this function also corrects filters when
1238  * there is an active PVID assigned to this VSI.
1239  *
1240  * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1241  *
1242  * This function is only expected to be called from within
1243  * i40e_sync_vsi_filters.
1244  *
1245  * NOTE: This function expects to be called while under the
1246  * mac_filter_hash_lock
1247  */
1248 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1249                                          struct hlist_head *tmp_add_list,
1250                                          struct hlist_head *tmp_del_list,
1251                                          int vlan_filters)
1252 {
1253         s16 pvid = le16_to_cpu(vsi->info.pvid);
1254         struct i40e_mac_filter *f, *add_head;
1255         struct i40e_new_mac_filter *new;
1256         struct hlist_node *h;
1257         int bkt, new_vlan;
1258
1259         /* To determine if a particular filter needs to be replaced we
1260          * have the three following conditions:
1261          *
1262          * a) if we have a PVID assigned, then all filters which are
1263          *    not marked as VLAN=PVID must be replaced with filters that
1264          *    are.
1265          * b) otherwise, if we have any active VLANS, all filters
1266          *    which are marked as VLAN=-1 must be replaced with
1267          *    filters marked as VLAN=0
1268          * c) finally, if we do not have any active VLANS, all filters
1269          *    which are marked as VLAN=0 must be replaced with filters
1270          *    marked as VLAN=-1
1271          */
1272
1273         /* Update the filters about to be added in place */
1274         hlist_for_each_entry(new, tmp_add_list, hlist) {
1275                 if (pvid && new->f->vlan != pvid)
1276                         new->f->vlan = pvid;
1277                 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1278                         new->f->vlan = 0;
1279                 else if (!vlan_filters && new->f->vlan == 0)
1280                         new->f->vlan = I40E_VLAN_ANY;
1281         }
1282
1283         /* Update the remaining active filters */
1284         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1285                 /* Combine the checks for whether a filter needs to be changed
1286                  * and then determine the new VLAN inside the if block, in
1287                  * order to avoid duplicating code for adding the new filter
1288                  * then deleting the old filter.
1289                  */
1290                 if ((pvid && f->vlan != pvid) ||
1291                     (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1292                     (!vlan_filters && f->vlan == 0)) {
1293                         /* Determine the new vlan we will be adding */
1294                         if (pvid)
1295                                 new_vlan = pvid;
1296                         else if (vlan_filters)
1297                                 new_vlan = 0;
1298                         else
1299                                 new_vlan = I40E_VLAN_ANY;
1300
1301                         /* Create the new filter */
1302                         add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1303                         if (!add_head)
1304                                 return -ENOMEM;
1305
1306                         /* Create a temporary i40e_new_mac_filter */
1307                         new = kzalloc(sizeof(*new), GFP_ATOMIC);
1308                         if (!new)
1309                                 return -ENOMEM;
1310
1311                         new->f = add_head;
1312                         new->state = add_head->state;
1313
1314                         /* Add the new filter to the tmp list */
1315                         hlist_add_head(&new->hlist, tmp_add_list);
1316
1317                         /* Put the original filter into the delete list */
1318                         f->state = I40E_FILTER_REMOVE;
1319                         hash_del(&f->hlist);
1320                         hlist_add_head(&f->hlist, tmp_del_list);
1321                 }
1322         }
1323
1324         vsi->has_vlan_filter = !!vlan_filters;
1325
1326         return 0;
1327 }
1328
1329 /**
1330  * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1331  * @vsi: the PF Main VSI - inappropriate for any other VSI
1332  * @macaddr: the MAC address
1333  *
1334  * Remove whatever filter the firmware set up so the driver can manage
1335  * its own filtering intelligently.
1336  **/
1337 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1338 {
1339         struct i40e_aqc_remove_macvlan_element_data element;
1340         struct i40e_pf *pf = vsi->back;
1341
1342         /* Only appropriate for the PF main VSI */
1343         if (vsi->type != I40E_VSI_MAIN)
1344                 return;
1345
1346         memset(&element, 0, sizeof(element));
1347         ether_addr_copy(element.mac_addr, macaddr);
1348         element.vlan_tag = 0;
1349         /* Ignore error returns, some firmware does it this way... */
1350         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1351         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1352
1353         memset(&element, 0, sizeof(element));
1354         ether_addr_copy(element.mac_addr, macaddr);
1355         element.vlan_tag = 0;
1356         /* ...and some firmware does it this way. */
1357         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1358                         I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1359         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1360 }
1361
1362 /**
1363  * i40e_add_filter - Add a mac/vlan filter to the VSI
1364  * @vsi: the VSI to be searched
1365  * @macaddr: the MAC address
1366  * @vlan: the vlan
1367  *
1368  * Returns ptr to the filter object or NULL when no memory available.
1369  *
1370  * NOTE: This function is expected to be called with mac_filter_hash_lock
1371  * being held.
1372  **/
1373 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1374                                         const u8 *macaddr, s16 vlan)
1375 {
1376         struct i40e_mac_filter *f;
1377         u64 key;
1378
1379         if (!vsi || !macaddr)
1380                 return NULL;
1381
1382         f = i40e_find_filter(vsi, macaddr, vlan);
1383         if (!f) {
1384                 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1385                 if (!f)
1386                         return NULL;
1387
1388                 /* Update the boolean indicating if we need to function in
1389                  * VLAN mode.
1390                  */
1391                 if (vlan >= 0)
1392                         vsi->has_vlan_filter = true;
1393
1394                 ether_addr_copy(f->macaddr, macaddr);
1395                 f->vlan = vlan;
1396                 f->state = I40E_FILTER_NEW;
1397                 INIT_HLIST_NODE(&f->hlist);
1398
1399                 key = i40e_addr_to_hkey(macaddr);
1400                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1401
1402                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1403                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1404         }
1405
1406         /* If we're asked to add a filter that has been marked for removal, it
1407          * is safe to simply restore it to active state. __i40e_del_filter
1408          * will have simply deleted any filters which were previously marked
1409          * NEW or FAILED, so if it is currently marked REMOVE it must have
1410          * previously been ACTIVE. Since we haven't yet run the sync filters
1411          * task, just restore this filter to the ACTIVE state so that the
1412          * sync task leaves it in place
1413          */
1414         if (f->state == I40E_FILTER_REMOVE)
1415                 f->state = I40E_FILTER_ACTIVE;
1416
1417         return f;
1418 }
1419
1420 /**
1421  * __i40e_del_filter - Remove a specific filter from the VSI
1422  * @vsi: VSI to remove from
1423  * @f: the filter to remove from the list
1424  *
1425  * This function should be called instead of i40e_del_filter only if you know
1426  * the exact filter you will remove already, such as via i40e_find_filter or
1427  * i40e_find_mac.
1428  *
1429  * NOTE: This function is expected to be called with mac_filter_hash_lock
1430  * being held.
1431  * ANOTHER NOTE: This function MUST be called from within the context of
1432  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1433  * instead of list_for_each_entry().
1434  **/
1435 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1436 {
1437         if (!f)
1438                 return;
1439
1440         /* If the filter was never added to firmware then we can just delete it
1441          * directly and we don't want to set the status to remove or else an
1442          * admin queue command will unnecessarily fire.
1443          */
1444         if ((f->state == I40E_FILTER_FAILED) ||
1445             (f->state == I40E_FILTER_NEW)) {
1446                 hash_del(&f->hlist);
1447                 kfree(f);
1448         } else {
1449                 f->state = I40E_FILTER_REMOVE;
1450         }
1451
1452         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1453         set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1454 }
1455
1456 /**
1457  * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1458  * @vsi: the VSI to be searched
1459  * @macaddr: the MAC address
1460  * @vlan: the VLAN
1461  *
1462  * NOTE: This function is expected to be called with mac_filter_hash_lock
1463  * being held.
1464  * ANOTHER NOTE: This function MUST be called from within the context of
1465  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1466  * instead of list_for_each_entry().
1467  **/
1468 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1469 {
1470         struct i40e_mac_filter *f;
1471
1472         if (!vsi || !macaddr)
1473                 return;
1474
1475         f = i40e_find_filter(vsi, macaddr, vlan);
1476         __i40e_del_filter(vsi, f);
1477 }
1478
1479 /**
1480  * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1481  * @vsi: the VSI to be searched
1482  * @macaddr: the mac address to be filtered
1483  *
1484  * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1485  * go through all the macvlan filters and add a macvlan filter for each
1486  * unique vlan that already exists. If a PVID has been assigned, instead only
1487  * add the macaddr to that VLAN.
1488  *
1489  * Returns last filter added on success, else NULL
1490  **/
1491 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1492                                             const u8 *macaddr)
1493 {
1494         struct i40e_mac_filter *f, *add = NULL;
1495         struct hlist_node *h;
1496         int bkt;
1497
1498         if (vsi->info.pvid)
1499                 return i40e_add_filter(vsi, macaddr,
1500                                        le16_to_cpu(vsi->info.pvid));
1501
1502         if (!i40e_is_vsi_in_vlan(vsi))
1503                 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1504
1505         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1506                 if (f->state == I40E_FILTER_REMOVE)
1507                         continue;
1508                 add = i40e_add_filter(vsi, macaddr, f->vlan);
1509                 if (!add)
1510                         return NULL;
1511         }
1512
1513         return add;
1514 }
1515
1516 /**
1517  * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1518  * @vsi: the VSI to be searched
1519  * @macaddr: the mac address to be removed
1520  *
1521  * Removes a given MAC address from a VSI regardless of what VLAN it has been
1522  * associated with.
1523  *
1524  * Returns 0 for success, or error
1525  **/
1526 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1527 {
1528         struct i40e_mac_filter *f;
1529         struct hlist_node *h;
1530         bool found = false;
1531         int bkt;
1532
1533         lockdep_assert_held(&vsi->mac_filter_hash_lock);
1534         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1535                 if (ether_addr_equal(macaddr, f->macaddr)) {
1536                         __i40e_del_filter(vsi, f);
1537                         found = true;
1538                 }
1539         }
1540
1541         if (found)
1542                 return 0;
1543         else
1544                 return -ENOENT;
1545 }
1546
1547 /**
1548  * i40e_set_mac - NDO callback to set mac address
1549  * @netdev: network interface device structure
1550  * @p: pointer to an address structure
1551  *
1552  * Returns 0 on success, negative on failure
1553  **/
1554 static int i40e_set_mac(struct net_device *netdev, void *p)
1555 {
1556         struct i40e_netdev_priv *np = netdev_priv(netdev);
1557         struct i40e_vsi *vsi = np->vsi;
1558         struct i40e_pf *pf = vsi->back;
1559         struct i40e_hw *hw = &pf->hw;
1560         struct sockaddr *addr = p;
1561
1562         if (!is_valid_ether_addr(addr->sa_data))
1563                 return -EADDRNOTAVAIL;
1564
1565         if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1566                 netdev_info(netdev, "already using mac address %pM\n",
1567                             addr->sa_data);
1568                 return 0;
1569         }
1570
1571         if (test_bit(__I40E_DOWN, pf->state) ||
1572             test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1573                 return -EADDRNOTAVAIL;
1574
1575         if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1576                 netdev_info(netdev, "returning to hw mac address %pM\n",
1577                             hw->mac.addr);
1578         else
1579                 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1580
1581         /* Copy the address first, so that we avoid a possible race with
1582          * .set_rx_mode().
1583          * - Remove old address from MAC filter
1584          * - Copy new address
1585          * - Add new address to MAC filter
1586          */
1587         spin_lock_bh(&vsi->mac_filter_hash_lock);
1588         i40e_del_mac_filter(vsi, netdev->dev_addr);
1589         ether_addr_copy(netdev->dev_addr, addr->sa_data);
1590         i40e_add_mac_filter(vsi, netdev->dev_addr);
1591         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1592
1593         if (vsi->type == I40E_VSI_MAIN) {
1594                 i40e_status ret;
1595
1596                 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1597                                                 addr->sa_data, NULL);
1598                 if (ret)
1599                         netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1600                                     i40e_stat_str(hw, ret),
1601                                     i40e_aq_str(hw, hw->aq.asq_last_status));
1602         }
1603
1604         /* schedule our worker thread which will take care of
1605          * applying the new filter changes
1606          */
1607         i40e_service_event_schedule(pf);
1608         return 0;
1609 }
1610
1611 /**
1612  * i40e_config_rss_aq - Prepare for RSS using AQ commands
1613  * @vsi: vsi structure
1614  * @seed: RSS hash seed
1615  * @lut: pointer to lookup table of lut_size
1616  * @lut_size: size of the lookup table
1617  **/
1618 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1619                               u8 *lut, u16 lut_size)
1620 {
1621         struct i40e_pf *pf = vsi->back;
1622         struct i40e_hw *hw = &pf->hw;
1623         int ret = 0;
1624
1625         if (seed) {
1626                 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1627                         (struct i40e_aqc_get_set_rss_key_data *)seed;
1628                 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1629                 if (ret) {
1630                         dev_info(&pf->pdev->dev,
1631                                  "Cannot set RSS key, err %s aq_err %s\n",
1632                                  i40e_stat_str(hw, ret),
1633                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1634                         return ret;
1635                 }
1636         }
1637         if (lut) {
1638                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1639
1640                 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1641                 if (ret) {
1642                         dev_info(&pf->pdev->dev,
1643                                  "Cannot set RSS lut, err %s aq_err %s\n",
1644                                  i40e_stat_str(hw, ret),
1645                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1646                         return ret;
1647                 }
1648         }
1649         return ret;
1650 }
1651
1652 /**
1653  * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1654  * @vsi: VSI structure
1655  **/
1656 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1657 {
1658         struct i40e_pf *pf = vsi->back;
1659         u8 seed[I40E_HKEY_ARRAY_SIZE];
1660         u8 *lut;
1661         int ret;
1662
1663         if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1664                 return 0;
1665         if (!vsi->rss_size)
1666                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1667                                       vsi->num_queue_pairs);
1668         if (!vsi->rss_size)
1669                 return -EINVAL;
1670         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1671         if (!lut)
1672                 return -ENOMEM;
1673
1674         /* Use the user configured hash keys and lookup table if there is one,
1675          * otherwise use default
1676          */
1677         if (vsi->rss_lut_user)
1678                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1679         else
1680                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1681         if (vsi->rss_hkey_user)
1682                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1683         else
1684                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1685         ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1686         kfree(lut);
1687         return ret;
1688 }
1689
1690 /**
1691  * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1692  * @vsi: the VSI being configured,
1693  * @ctxt: VSI context structure
1694  * @enabled_tc: number of traffic classes to enable
1695  *
1696  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1697  **/
1698 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1699                                            struct i40e_vsi_context *ctxt,
1700                                            u8 enabled_tc)
1701 {
1702         u16 qcount = 0, max_qcount, qmap, sections = 0;
1703         int i, override_q, pow, num_qps, ret;
1704         u8 netdev_tc = 0, offset = 0;
1705
1706         if (vsi->type != I40E_VSI_MAIN)
1707                 return -EINVAL;
1708         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1709         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1710         vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1711         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1712         num_qps = vsi->mqprio_qopt.qopt.count[0];
1713
1714         /* find the next higher power-of-2 of num queue pairs */
1715         pow = ilog2(num_qps);
1716         if (!is_power_of_2(num_qps))
1717                 pow++;
1718         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1719                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1720
1721         /* Setup queue offset/count for all TCs for given VSI */
1722         max_qcount = vsi->mqprio_qopt.qopt.count[0];
1723         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1724                 /* See if the given TC is enabled for the given VSI */
1725                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1726                         offset = vsi->mqprio_qopt.qopt.offset[i];
1727                         qcount = vsi->mqprio_qopt.qopt.count[i];
1728                         if (qcount > max_qcount)
1729                                 max_qcount = qcount;
1730                         vsi->tc_config.tc_info[i].qoffset = offset;
1731                         vsi->tc_config.tc_info[i].qcount = qcount;
1732                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1733                 } else {
1734                         /* TC is not enabled so set the offset to
1735                          * default queue and allocate one queue
1736                          * for the given TC.
1737                          */
1738                         vsi->tc_config.tc_info[i].qoffset = 0;
1739                         vsi->tc_config.tc_info[i].qcount = 1;
1740                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1741                 }
1742         }
1743
1744         /* Set actual Tx/Rx queue pairs */
1745         vsi->num_queue_pairs = offset + qcount;
1746
1747         /* Setup queue TC[0].qmap for given VSI context */
1748         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1749         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1750         ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1751         ctxt->info.valid_sections |= cpu_to_le16(sections);
1752
1753         /* Reconfigure RSS for main VSI with max queue count */
1754         vsi->rss_size = max_qcount;
1755         ret = i40e_vsi_config_rss(vsi);
1756         if (ret) {
1757                 dev_info(&vsi->back->pdev->dev,
1758                          "Failed to reconfig rss for num_queues (%u)\n",
1759                          max_qcount);
1760                 return ret;
1761         }
1762         vsi->reconfig_rss = true;
1763         dev_dbg(&vsi->back->pdev->dev,
1764                 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1765
1766         /* Find queue count available for channel VSIs and starting offset
1767          * for channel VSIs
1768          */
1769         override_q = vsi->mqprio_qopt.qopt.count[0];
1770         if (override_q && override_q < vsi->num_queue_pairs) {
1771                 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1772                 vsi->next_base_queue = override_q;
1773         }
1774         return 0;
1775 }
1776
1777 /**
1778  * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1779  * @vsi: the VSI being setup
1780  * @ctxt: VSI context structure
1781  * @enabled_tc: Enabled TCs bitmap
1782  * @is_add: True if called before Add VSI
1783  *
1784  * Setup VSI queue mapping for enabled traffic classes.
1785  **/
1786 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1787                                      struct i40e_vsi_context *ctxt,
1788                                      u8 enabled_tc,
1789                                      bool is_add)
1790 {
1791         struct i40e_pf *pf = vsi->back;
1792         u16 sections = 0;
1793         u8 netdev_tc = 0;
1794         u16 numtc = 1;
1795         u16 qcount;
1796         u8 offset;
1797         u16 qmap;
1798         int i;
1799         u16 num_tc_qps = 0;
1800
1801         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1802         offset = 0;
1803
1804         /* Number of queues per enabled TC */
1805         num_tc_qps = vsi->alloc_queue_pairs;
1806         if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1807                 /* Find numtc from enabled TC bitmap */
1808                 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1809                         if (enabled_tc & BIT(i)) /* TC is enabled */
1810                                 numtc++;
1811                 }
1812                 if (!numtc) {
1813                         dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1814                         numtc = 1;
1815                 }
1816                 num_tc_qps = num_tc_qps / numtc;
1817                 num_tc_qps = min_t(int, num_tc_qps,
1818                                    i40e_pf_get_max_q_per_tc(pf));
1819         }
1820
1821         vsi->tc_config.numtc = numtc;
1822         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1823
1824         /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1825         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1826                 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1827
1828         /* Setup queue offset/count for all TCs for given VSI */
1829         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1830                 /* See if the given TC is enabled for the given VSI */
1831                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1832                         /* TC is enabled */
1833                         int pow, num_qps;
1834
1835                         switch (vsi->type) {
1836                         case I40E_VSI_MAIN:
1837                                 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1838                                     I40E_FLAG_FD_ATR_ENABLED)) ||
1839                                     vsi->tc_config.enabled_tc != 1) {
1840                                         qcount = min_t(int, pf->alloc_rss_size,
1841                                                        num_tc_qps);
1842                                         break;
1843                                 }
1844                                 fallthrough;
1845                         case I40E_VSI_FDIR:
1846                         case I40E_VSI_SRIOV:
1847                         case I40E_VSI_VMDQ2:
1848                         default:
1849                                 qcount = num_tc_qps;
1850                                 WARN_ON(i != 0);
1851                                 break;
1852                         }
1853                         vsi->tc_config.tc_info[i].qoffset = offset;
1854                         vsi->tc_config.tc_info[i].qcount = qcount;
1855
1856                         /* find the next higher power-of-2 of num queue pairs */
1857                         num_qps = qcount;
1858                         pow = 0;
1859                         while (num_qps && (BIT_ULL(pow) < qcount)) {
1860                                 pow++;
1861                                 num_qps >>= 1;
1862                         }
1863
1864                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1865                         qmap =
1866                             (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1867                             (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1868
1869                         offset += qcount;
1870                 } else {
1871                         /* TC is not enabled so set the offset to
1872                          * default queue and allocate one queue
1873                          * for the given TC.
1874                          */
1875                         vsi->tc_config.tc_info[i].qoffset = 0;
1876                         vsi->tc_config.tc_info[i].qcount = 1;
1877                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1878
1879                         qmap = 0;
1880                 }
1881                 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1882         }
1883
1884         /* Set actual Tx/Rx queue pairs */
1885         vsi->num_queue_pairs = offset;
1886         if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1887                 if (vsi->req_queue_pairs > 0)
1888                         vsi->num_queue_pairs = vsi->req_queue_pairs;
1889                 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1890                         vsi->num_queue_pairs = pf->num_lan_msix;
1891         }
1892
1893         /* Scheduler section valid can only be set for ADD VSI */
1894         if (is_add) {
1895                 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1896
1897                 ctxt->info.up_enable_bits = enabled_tc;
1898         }
1899         if (vsi->type == I40E_VSI_SRIOV) {
1900                 ctxt->info.mapping_flags |=
1901                                      cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1902                 for (i = 0; i < vsi->num_queue_pairs; i++)
1903                         ctxt->info.queue_mapping[i] =
1904                                                cpu_to_le16(vsi->base_queue + i);
1905         } else {
1906                 ctxt->info.mapping_flags |=
1907                                         cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1908                 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1909         }
1910         ctxt->info.valid_sections |= cpu_to_le16(sections);
1911 }
1912
1913 /**
1914  * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1915  * @netdev: the netdevice
1916  * @addr: address to add
1917  *
1918  * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1919  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1920  */
1921 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1922 {
1923         struct i40e_netdev_priv *np = netdev_priv(netdev);
1924         struct i40e_vsi *vsi = np->vsi;
1925
1926         if (i40e_add_mac_filter(vsi, addr))
1927                 return 0;
1928         else
1929                 return -ENOMEM;
1930 }
1931
1932 /**
1933  * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1934  * @netdev: the netdevice
1935  * @addr: address to add
1936  *
1937  * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1938  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1939  */
1940 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1941 {
1942         struct i40e_netdev_priv *np = netdev_priv(netdev);
1943         struct i40e_vsi *vsi = np->vsi;
1944
1945         /* Under some circumstances, we might receive a request to delete
1946          * our own device address from our uc list. Because we store the
1947          * device address in the VSI's MAC/VLAN filter list, we need to ignore
1948          * such requests and not delete our device address from this list.
1949          */
1950         if (ether_addr_equal(addr, netdev->dev_addr))
1951                 return 0;
1952
1953         i40e_del_mac_filter(vsi, addr);
1954
1955         return 0;
1956 }
1957
1958 /**
1959  * i40e_set_rx_mode - NDO callback to set the netdev filters
1960  * @netdev: network interface device structure
1961  **/
1962 static void i40e_set_rx_mode(struct net_device *netdev)
1963 {
1964         struct i40e_netdev_priv *np = netdev_priv(netdev);
1965         struct i40e_vsi *vsi = np->vsi;
1966
1967         spin_lock_bh(&vsi->mac_filter_hash_lock);
1968
1969         __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1970         __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1971
1972         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1973
1974         /* check for other flag changes */
1975         if (vsi->current_netdev_flags != vsi->netdev->flags) {
1976                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1977                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1978         }
1979 }
1980
1981 /**
1982  * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1983  * @vsi: Pointer to VSI struct
1984  * @from: Pointer to list which contains MAC filter entries - changes to
1985  *        those entries needs to be undone.
1986  *
1987  * MAC filter entries from this list were slated for deletion.
1988  **/
1989 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1990                                          struct hlist_head *from)
1991 {
1992         struct i40e_mac_filter *f;
1993         struct hlist_node *h;
1994
1995         hlist_for_each_entry_safe(f, h, from, hlist) {
1996                 u64 key = i40e_addr_to_hkey(f->macaddr);
1997
1998                 /* Move the element back into MAC filter list*/
1999                 hlist_del(&f->hlist);
2000                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2001         }
2002 }
2003
2004 /**
2005  * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2006  * @vsi: Pointer to vsi struct
2007  * @from: Pointer to list which contains MAC filter entries - changes to
2008  *        those entries needs to be undone.
2009  *
2010  * MAC filter entries from this list were slated for addition.
2011  **/
2012 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2013                                          struct hlist_head *from)
2014 {
2015         struct i40e_new_mac_filter *new;
2016         struct hlist_node *h;
2017
2018         hlist_for_each_entry_safe(new, h, from, hlist) {
2019                 /* We can simply free the wrapper structure */
2020                 hlist_del(&new->hlist);
2021                 kfree(new);
2022         }
2023 }
2024
2025 /**
2026  * i40e_next_entry - Get the next non-broadcast filter from a list
2027  * @next: pointer to filter in list
2028  *
2029  * Returns the next non-broadcast filter in the list. Required so that we
2030  * ignore broadcast filters within the list, since these are not handled via
2031  * the normal firmware update path.
2032  */
2033 static
2034 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2035 {
2036         hlist_for_each_entry_continue(next, hlist) {
2037                 if (!is_broadcast_ether_addr(next->f->macaddr))
2038                         return next;
2039         }
2040
2041         return NULL;
2042 }
2043
2044 /**
2045  * i40e_update_filter_state - Update filter state based on return data
2046  * from firmware
2047  * @count: Number of filters added
2048  * @add_list: return data from fw
2049  * @add_head: pointer to first filter in current batch
2050  *
2051  * MAC filter entries from list were slated to be added to device. Returns
2052  * number of successful filters. Note that 0 does NOT mean success!
2053  **/
2054 static int
2055 i40e_update_filter_state(int count,
2056                          struct i40e_aqc_add_macvlan_element_data *add_list,
2057                          struct i40e_new_mac_filter *add_head)
2058 {
2059         int retval = 0;
2060         int i;
2061
2062         for (i = 0; i < count; i++) {
2063                 /* Always check status of each filter. We don't need to check
2064                  * the firmware return status because we pre-set the filter
2065                  * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2066                  * request to the adminq. Thus, if it no longer matches then
2067                  * we know the filter is active.
2068                  */
2069                 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2070                         add_head->state = I40E_FILTER_FAILED;
2071                 } else {
2072                         add_head->state = I40E_FILTER_ACTIVE;
2073                         retval++;
2074                 }
2075
2076                 add_head = i40e_next_filter(add_head);
2077                 if (!add_head)
2078                         break;
2079         }
2080
2081         return retval;
2082 }
2083
2084 /**
2085  * i40e_aqc_del_filters - Request firmware to delete a set of filters
2086  * @vsi: ptr to the VSI
2087  * @vsi_name: name to display in messages
2088  * @list: the list of filters to send to firmware
2089  * @num_del: the number of filters to delete
2090  * @retval: Set to -EIO on failure to delete
2091  *
2092  * Send a request to firmware via AdminQ to delete a set of filters. Uses
2093  * *retval instead of a return value so that success does not force ret_val to
2094  * be set to 0. This ensures that a sequence of calls to this function
2095  * preserve the previous value of *retval on successful delete.
2096  */
2097 static
2098 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2099                           struct i40e_aqc_remove_macvlan_element_data *list,
2100                           int num_del, int *retval)
2101 {
2102         struct i40e_hw *hw = &vsi->back->hw;
2103         i40e_status aq_ret;
2104         int aq_err;
2105
2106         aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2107         aq_err = hw->aq.asq_last_status;
2108
2109         /* Explicitly ignore and do not report when firmware returns ENOENT */
2110         if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2111                 *retval = -EIO;
2112                 dev_info(&vsi->back->pdev->dev,
2113                          "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2114                          vsi_name, i40e_stat_str(hw, aq_ret),
2115                          i40e_aq_str(hw, aq_err));
2116         }
2117 }
2118
2119 /**
2120  * i40e_aqc_add_filters - Request firmware to add a set of filters
2121  * @vsi: ptr to the VSI
2122  * @vsi_name: name to display in messages
2123  * @list: the list of filters to send to firmware
2124  * @add_head: Position in the add hlist
2125  * @num_add: the number of filters to add
2126  *
2127  * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2128  * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2129  * space for more filters.
2130  */
2131 static
2132 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2133                           struct i40e_aqc_add_macvlan_element_data *list,
2134                           struct i40e_new_mac_filter *add_head,
2135                           int num_add)
2136 {
2137         struct i40e_hw *hw = &vsi->back->hw;
2138         int aq_err, fcnt;
2139
2140         i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2141         aq_err = hw->aq.asq_last_status;
2142         fcnt = i40e_update_filter_state(num_add, list, add_head);
2143
2144         if (fcnt != num_add) {
2145                 if (vsi->type == I40E_VSI_MAIN) {
2146                         set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2147                         dev_warn(&vsi->back->pdev->dev,
2148                                  "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2149                                  i40e_aq_str(hw, aq_err), vsi_name);
2150                 } else if (vsi->type == I40E_VSI_SRIOV ||
2151                            vsi->type == I40E_VSI_VMDQ1 ||
2152                            vsi->type == I40E_VSI_VMDQ2) {
2153                         dev_warn(&vsi->back->pdev->dev,
2154                                  "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2155                                  i40e_aq_str(hw, aq_err), vsi_name, vsi_name);
2156                 } else {
2157                         dev_warn(&vsi->back->pdev->dev,
2158                                  "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2159                                  i40e_aq_str(hw, aq_err), vsi_name, vsi->type);
2160                 }
2161         }
2162 }
2163
2164 /**
2165  * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2166  * @vsi: pointer to the VSI
2167  * @vsi_name: the VSI name
2168  * @f: filter data
2169  *
2170  * This function sets or clears the promiscuous broadcast flags for VLAN
2171  * filters in order to properly receive broadcast frames. Assumes that only
2172  * broadcast filters are passed.
2173  *
2174  * Returns status indicating success or failure;
2175  **/
2176 static i40e_status
2177 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2178                           struct i40e_mac_filter *f)
2179 {
2180         bool enable = f->state == I40E_FILTER_NEW;
2181         struct i40e_hw *hw = &vsi->back->hw;
2182         i40e_status aq_ret;
2183
2184         if (f->vlan == I40E_VLAN_ANY) {
2185                 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2186                                                    vsi->seid,
2187                                                    enable,
2188                                                    NULL);
2189         } else {
2190                 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2191                                                             vsi->seid,
2192                                                             enable,
2193                                                             f->vlan,
2194                                                             NULL);
2195         }
2196
2197         if (aq_ret) {
2198                 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2199                 dev_warn(&vsi->back->pdev->dev,
2200                          "Error %s, forcing overflow promiscuous on %s\n",
2201                          i40e_aq_str(hw, hw->aq.asq_last_status),
2202                          vsi_name);
2203         }
2204
2205         return aq_ret;
2206 }
2207
2208 /**
2209  * i40e_set_promiscuous - set promiscuous mode
2210  * @pf: board private structure
2211  * @promisc: promisc on or off
2212  *
2213  * There are different ways of setting promiscuous mode on a PF depending on
2214  * what state/environment we're in.  This identifies and sets it appropriately.
2215  * Returns 0 on success.
2216  **/
2217 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2218 {
2219         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2220         struct i40e_hw *hw = &pf->hw;
2221         i40e_status aq_ret;
2222
2223         if (vsi->type == I40E_VSI_MAIN &&
2224             pf->lan_veb != I40E_NO_VEB &&
2225             !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2226                 /* set defport ON for Main VSI instead of true promisc
2227                  * this way we will get all unicast/multicast and VLAN
2228                  * promisc behavior but will not get VF or VMDq traffic
2229                  * replicated on the Main VSI.
2230                  */
2231                 if (promisc)
2232                         aq_ret = i40e_aq_set_default_vsi(hw,
2233                                                          vsi->seid,
2234                                                          NULL);
2235                 else
2236                         aq_ret = i40e_aq_clear_default_vsi(hw,
2237                                                            vsi->seid,
2238                                                            NULL);
2239                 if (aq_ret) {
2240                         dev_info(&pf->pdev->dev,
2241                                  "Set default VSI failed, err %s, aq_err %s\n",
2242                                  i40e_stat_str(hw, aq_ret),
2243                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2244                 }
2245         } else {
2246                 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2247                                                   hw,
2248                                                   vsi->seid,
2249                                                   promisc, NULL,
2250                                                   true);
2251                 if (aq_ret) {
2252                         dev_info(&pf->pdev->dev,
2253                                  "set unicast promisc failed, err %s, aq_err %s\n",
2254                                  i40e_stat_str(hw, aq_ret),
2255                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2256                 }
2257                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2258                                                   hw,
2259                                                   vsi->seid,
2260                                                   promisc, NULL);
2261                 if (aq_ret) {
2262                         dev_info(&pf->pdev->dev,
2263                                  "set multicast promisc failed, err %s, aq_err %s\n",
2264                                  i40e_stat_str(hw, aq_ret),
2265                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2266                 }
2267         }
2268
2269         if (!aq_ret)
2270                 pf->cur_promisc = promisc;
2271
2272         return aq_ret;
2273 }
2274
2275 /**
2276  * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2277  * @vsi: ptr to the VSI
2278  *
2279  * Push any outstanding VSI filter changes through the AdminQ.
2280  *
2281  * Returns 0 or error value
2282  **/
2283 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2284 {
2285         struct hlist_head tmp_add_list, tmp_del_list;
2286         struct i40e_mac_filter *f;
2287         struct i40e_new_mac_filter *new, *add_head = NULL;
2288         struct i40e_hw *hw = &vsi->back->hw;
2289         bool old_overflow, new_overflow;
2290         unsigned int failed_filters = 0;
2291         unsigned int vlan_filters = 0;
2292         char vsi_name[16] = "PF";
2293         int filter_list_len = 0;
2294         i40e_status aq_ret = 0;
2295         u32 changed_flags = 0;
2296         struct hlist_node *h;
2297         struct i40e_pf *pf;
2298         int num_add = 0;
2299         int num_del = 0;
2300         int retval = 0;
2301         u16 cmd_flags;
2302         int list_size;
2303         int bkt;
2304
2305         /* empty array typed pointers, kcalloc later */
2306         struct i40e_aqc_add_macvlan_element_data *add_list;
2307         struct i40e_aqc_remove_macvlan_element_data *del_list;
2308
2309         while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2310                 usleep_range(1000, 2000);
2311         pf = vsi->back;
2312
2313         old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2314
2315         if (vsi->netdev) {
2316                 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2317                 vsi->current_netdev_flags = vsi->netdev->flags;
2318         }
2319
2320         INIT_HLIST_HEAD(&tmp_add_list);
2321         INIT_HLIST_HEAD(&tmp_del_list);
2322
2323         if (vsi->type == I40E_VSI_SRIOV)
2324                 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2325         else if (vsi->type != I40E_VSI_MAIN)
2326                 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2327
2328         if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2329                 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2330
2331                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2332                 /* Create a list of filters to delete. */
2333                 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2334                         if (f->state == I40E_FILTER_REMOVE) {
2335                                 /* Move the element into temporary del_list */
2336                                 hash_del(&f->hlist);
2337                                 hlist_add_head(&f->hlist, &tmp_del_list);
2338
2339                                 /* Avoid counting removed filters */
2340                                 continue;
2341                         }
2342                         if (f->state == I40E_FILTER_NEW) {
2343                                 /* Create a temporary i40e_new_mac_filter */
2344                                 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2345                                 if (!new)
2346                                         goto err_no_memory_locked;
2347
2348                                 /* Store pointer to the real filter */
2349                                 new->f = f;
2350                                 new->state = f->state;
2351
2352                                 /* Add it to the hash list */
2353                                 hlist_add_head(&new->hlist, &tmp_add_list);
2354                         }
2355
2356                         /* Count the number of active (current and new) VLAN
2357                          * filters we have now. Does not count filters which
2358                          * are marked for deletion.
2359                          */
2360                         if (f->vlan > 0)
2361                                 vlan_filters++;
2362                 }
2363
2364                 retval = i40e_correct_mac_vlan_filters(vsi,
2365                                                        &tmp_add_list,
2366                                                        &tmp_del_list,
2367                                                        vlan_filters);
2368                 if (retval)
2369                         goto err_no_memory_locked;
2370
2371                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2372         }
2373
2374         /* Now process 'del_list' outside the lock */
2375         if (!hlist_empty(&tmp_del_list)) {
2376                 filter_list_len = hw->aq.asq_buf_size /
2377                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2378                 list_size = filter_list_len *
2379                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2380                 del_list = kzalloc(list_size, GFP_ATOMIC);
2381                 if (!del_list)
2382                         goto err_no_memory;
2383
2384                 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2385                         cmd_flags = 0;
2386
2387                         /* handle broadcast filters by updating the broadcast
2388                          * promiscuous flag and release filter list.
2389                          */
2390                         if (is_broadcast_ether_addr(f->macaddr)) {
2391                                 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2392
2393                                 hlist_del(&f->hlist);
2394                                 kfree(f);
2395                                 continue;
2396                         }
2397
2398                         /* add to delete list */
2399                         ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2400                         if (f->vlan == I40E_VLAN_ANY) {
2401                                 del_list[num_del].vlan_tag = 0;
2402                                 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2403                         } else {
2404                                 del_list[num_del].vlan_tag =
2405                                         cpu_to_le16((u16)(f->vlan));
2406                         }
2407
2408                         cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2409                         del_list[num_del].flags = cmd_flags;
2410                         num_del++;
2411
2412                         /* flush a full buffer */
2413                         if (num_del == filter_list_len) {
2414                                 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2415                                                      num_del, &retval);
2416                                 memset(del_list, 0, list_size);
2417                                 num_del = 0;
2418                         }
2419                         /* Release memory for MAC filter entries which were
2420                          * synced up with HW.
2421                          */
2422                         hlist_del(&f->hlist);
2423                         kfree(f);
2424                 }
2425
2426                 if (num_del) {
2427                         i40e_aqc_del_filters(vsi, vsi_name, del_list,
2428                                              num_del, &retval);
2429                 }
2430
2431                 kfree(del_list);
2432                 del_list = NULL;
2433         }
2434
2435         if (!hlist_empty(&tmp_add_list)) {
2436                 /* Do all the adds now. */
2437                 filter_list_len = hw->aq.asq_buf_size /
2438                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2439                 list_size = filter_list_len *
2440                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2441                 add_list = kzalloc(list_size, GFP_ATOMIC);
2442                 if (!add_list)
2443                         goto err_no_memory;
2444
2445                 num_add = 0;
2446                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2447                         /* handle broadcast filters by updating the broadcast
2448                          * promiscuous flag instead of adding a MAC filter.
2449                          */
2450                         if (is_broadcast_ether_addr(new->f->macaddr)) {
2451                                 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2452                                                               new->f))
2453                                         new->state = I40E_FILTER_FAILED;
2454                                 else
2455                                         new->state = I40E_FILTER_ACTIVE;
2456                                 continue;
2457                         }
2458
2459                         /* add to add array */
2460                         if (num_add == 0)
2461                                 add_head = new;
2462                         cmd_flags = 0;
2463                         ether_addr_copy(add_list[num_add].mac_addr,
2464                                         new->f->macaddr);
2465                         if (new->f->vlan == I40E_VLAN_ANY) {
2466                                 add_list[num_add].vlan_tag = 0;
2467                                 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2468                         } else {
2469                                 add_list[num_add].vlan_tag =
2470                                         cpu_to_le16((u16)(new->f->vlan));
2471                         }
2472                         add_list[num_add].queue_number = 0;
2473                         /* set invalid match method for later detection */
2474                         add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2475                         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2476                         add_list[num_add].flags = cpu_to_le16(cmd_flags);
2477                         num_add++;
2478
2479                         /* flush a full buffer */
2480                         if (num_add == filter_list_len) {
2481                                 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2482                                                      add_head, num_add);
2483                                 memset(add_list, 0, list_size);
2484                                 num_add = 0;
2485                         }
2486                 }
2487                 if (num_add) {
2488                         i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2489                                              num_add);
2490                 }
2491                 /* Now move all of the filters from the temp add list back to
2492                  * the VSI's list.
2493                  */
2494                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2495                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2496                         /* Only update the state if we're still NEW */
2497                         if (new->f->state == I40E_FILTER_NEW)
2498                                 new->f->state = new->state;
2499                         hlist_del(&new->hlist);
2500                         kfree(new);
2501                 }
2502                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2503                 kfree(add_list);
2504                 add_list = NULL;
2505         }
2506
2507         /* Determine the number of active and failed filters. */
2508         spin_lock_bh(&vsi->mac_filter_hash_lock);
2509         vsi->active_filters = 0;
2510         hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2511                 if (f->state == I40E_FILTER_ACTIVE)
2512                         vsi->active_filters++;
2513                 else if (f->state == I40E_FILTER_FAILED)
2514                         failed_filters++;
2515         }
2516         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2517
2518         /* Check if we are able to exit overflow promiscuous mode. We can
2519          * safely exit if we didn't just enter, we no longer have any failed
2520          * filters, and we have reduced filters below the threshold value.
2521          */
2522         if (old_overflow && !failed_filters &&
2523             vsi->active_filters < vsi->promisc_threshold) {
2524                 dev_info(&pf->pdev->dev,
2525                          "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2526                          vsi_name);
2527                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2528                 vsi->promisc_threshold = 0;
2529         }
2530
2531         /* if the VF is not trusted do not do promisc */
2532         if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2533                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2534                 goto out;
2535         }
2536
2537         new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2538
2539         /* If we are entering overflow promiscuous, we need to calculate a new
2540          * threshold for when we are safe to exit
2541          */
2542         if (!old_overflow && new_overflow)
2543                 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2544
2545         /* check for changes in promiscuous modes */
2546         if (changed_flags & IFF_ALLMULTI) {
2547                 bool cur_multipromisc;
2548
2549                 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2550                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2551                                                                vsi->seid,
2552                                                                cur_multipromisc,
2553                                                                NULL);
2554                 if (aq_ret) {
2555                         retval = i40e_aq_rc_to_posix(aq_ret,
2556                                                      hw->aq.asq_last_status);
2557                         dev_info(&pf->pdev->dev,
2558                                  "set multi promisc failed on %s, err %s aq_err %s\n",
2559                                  vsi_name,
2560                                  i40e_stat_str(hw, aq_ret),
2561                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2562                 } else {
2563                         dev_info(&pf->pdev->dev, "%s is %s allmulti mode.\n",
2564                                  vsi->netdev->name,
2565                                  cur_multipromisc ? "entering" : "leaving");
2566                 }
2567         }
2568
2569         if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2570                 bool cur_promisc;
2571
2572                 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2573                                new_overflow);
2574                 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2575                 if (aq_ret) {
2576                         retval = i40e_aq_rc_to_posix(aq_ret,
2577                                                      hw->aq.asq_last_status);
2578                         dev_info(&pf->pdev->dev,
2579                                  "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2580                                  cur_promisc ? "on" : "off",
2581                                  vsi_name,
2582                                  i40e_stat_str(hw, aq_ret),
2583                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2584                 }
2585         }
2586 out:
2587         /* if something went wrong then set the changed flag so we try again */
2588         if (retval)
2589                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2590
2591         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2592         return retval;
2593
2594 err_no_memory:
2595         /* Restore elements on the temporary add and delete lists */
2596         spin_lock_bh(&vsi->mac_filter_hash_lock);
2597 err_no_memory_locked:
2598         i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2599         i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2600         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2601
2602         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2603         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2604         return -ENOMEM;
2605 }
2606
2607 /**
2608  * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2609  * @pf: board private structure
2610  **/
2611 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2612 {
2613         int v;
2614
2615         if (!pf)
2616                 return;
2617         if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2618                 return;
2619         if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2620                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2621                 return;
2622         }
2623
2624         for (v = 0; v < pf->num_alloc_vsi; v++) {
2625                 if (pf->vsi[v] &&
2626                     (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2627                         int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2628
2629                         if (ret) {
2630                                 /* come back and try again later */
2631                                 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2632                                         pf->state);
2633                                 break;
2634                         }
2635                 }
2636         }
2637 }
2638
2639 /**
2640  * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2641  * @vsi: the vsi
2642  **/
2643 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2644 {
2645         if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2646                 return I40E_RXBUFFER_2048;
2647         else
2648                 return I40E_RXBUFFER_3072;
2649 }
2650
2651 /**
2652  * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2653  * @netdev: network interface device structure
2654  * @new_mtu: new value for maximum frame size
2655  *
2656  * Returns 0 on success, negative on failure
2657  **/
2658 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2659 {
2660         struct i40e_netdev_priv *np = netdev_priv(netdev);
2661         struct i40e_vsi *vsi = np->vsi;
2662         struct i40e_pf *pf = vsi->back;
2663
2664         if (i40e_enabled_xdp_vsi(vsi)) {
2665                 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2666
2667                 if (frame_size > i40e_max_xdp_frame_size(vsi))
2668                         return -EINVAL;
2669         }
2670
2671         netdev_dbg(netdev, "changing MTU from %d to %d\n",
2672                    netdev->mtu, new_mtu);
2673         netdev->mtu = new_mtu;
2674         if (netif_running(netdev))
2675                 i40e_vsi_reinit_locked(vsi);
2676         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2677         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2678         return 0;
2679 }
2680
2681 /**
2682  * i40e_ioctl - Access the hwtstamp interface
2683  * @netdev: network interface device structure
2684  * @ifr: interface request data
2685  * @cmd: ioctl command
2686  **/
2687 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2688 {
2689         struct i40e_netdev_priv *np = netdev_priv(netdev);
2690         struct i40e_pf *pf = np->vsi->back;
2691
2692         switch (cmd) {
2693         case SIOCGHWTSTAMP:
2694                 return i40e_ptp_get_ts_config(pf, ifr);
2695         case SIOCSHWTSTAMP:
2696                 return i40e_ptp_set_ts_config(pf, ifr);
2697         default:
2698                 return -EOPNOTSUPP;
2699         }
2700 }
2701
2702 /**
2703  * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2704  * @vsi: the vsi being adjusted
2705  **/
2706 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2707 {
2708         struct i40e_vsi_context ctxt;
2709         i40e_status ret;
2710
2711         /* Don't modify stripping options if a port VLAN is active */
2712         if (vsi->info.pvid)
2713                 return;
2714
2715         if ((vsi->info.valid_sections &
2716              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2717             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2718                 return;  /* already enabled */
2719
2720         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2721         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2722                                     I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2723
2724         ctxt.seid = vsi->seid;
2725         ctxt.info = vsi->info;
2726         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2727         if (ret) {
2728                 dev_info(&vsi->back->pdev->dev,
2729                          "update vlan stripping failed, err %s aq_err %s\n",
2730                          i40e_stat_str(&vsi->back->hw, ret),
2731                          i40e_aq_str(&vsi->back->hw,
2732                                      vsi->back->hw.aq.asq_last_status));
2733         }
2734 }
2735
2736 /**
2737  * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2738  * @vsi: the vsi being adjusted
2739  **/
2740 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2741 {
2742         struct i40e_vsi_context ctxt;
2743         i40e_status ret;
2744
2745         /* Don't modify stripping options if a port VLAN is active */
2746         if (vsi->info.pvid)
2747                 return;
2748
2749         if ((vsi->info.valid_sections &
2750              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2751             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2752              I40E_AQ_VSI_PVLAN_EMOD_MASK))
2753                 return;  /* already disabled */
2754
2755         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2756         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2757                                     I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2758
2759         ctxt.seid = vsi->seid;
2760         ctxt.info = vsi->info;
2761         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2762         if (ret) {
2763                 dev_info(&vsi->back->pdev->dev,
2764                          "update vlan stripping failed, err %s aq_err %s\n",
2765                          i40e_stat_str(&vsi->back->hw, ret),
2766                          i40e_aq_str(&vsi->back->hw,
2767                                      vsi->back->hw.aq.asq_last_status));
2768         }
2769 }
2770
2771 /**
2772  * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2773  * @vsi: the vsi being configured
2774  * @vid: vlan id to be added (0 = untagged only , -1 = any)
2775  *
2776  * This is a helper function for adding a new MAC/VLAN filter with the
2777  * specified VLAN for each existing MAC address already in the hash table.
2778  * This function does *not* perform any accounting to update filters based on
2779  * VLAN mode.
2780  *
2781  * NOTE: this function expects to be called while under the
2782  * mac_filter_hash_lock
2783  **/
2784 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2785 {
2786         struct i40e_mac_filter *f, *add_f;
2787         struct hlist_node *h;
2788         int bkt;
2789
2790         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2791                 if (f->state == I40E_FILTER_REMOVE)
2792                         continue;
2793                 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2794                 if (!add_f) {
2795                         dev_info(&vsi->back->pdev->dev,
2796                                  "Could not add vlan filter %d for %pM\n",
2797                                  vid, f->macaddr);
2798                         return -ENOMEM;
2799                 }
2800         }
2801
2802         return 0;
2803 }
2804
2805 /**
2806  * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2807  * @vsi: the VSI being configured
2808  * @vid: VLAN id to be added
2809  **/
2810 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2811 {
2812         int err;
2813
2814         if (vsi->info.pvid)
2815                 return -EINVAL;
2816
2817         /* The network stack will attempt to add VID=0, with the intention to
2818          * receive priority tagged packets with a VLAN of 0. Our HW receives
2819          * these packets by default when configured to receive untagged
2820          * packets, so we don't need to add a filter for this case.
2821          * Additionally, HW interprets adding a VID=0 filter as meaning to
2822          * receive *only* tagged traffic and stops receiving untagged traffic.
2823          * Thus, we do not want to actually add a filter for VID=0
2824          */
2825         if (!vid)
2826                 return 0;
2827
2828         /* Locked once because all functions invoked below iterates list*/
2829         spin_lock_bh(&vsi->mac_filter_hash_lock);
2830         err = i40e_add_vlan_all_mac(vsi, vid);
2831         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2832         if (err)
2833                 return err;
2834
2835         /* schedule our worker thread which will take care of
2836          * applying the new filter changes
2837          */
2838         i40e_service_event_schedule(vsi->back);
2839         return 0;
2840 }
2841
2842 /**
2843  * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2844  * @vsi: the vsi being configured
2845  * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2846  *
2847  * This function should be used to remove all VLAN filters which match the
2848  * given VID. It does not schedule the service event and does not take the
2849  * mac_filter_hash_lock so it may be combined with other operations under
2850  * a single invocation of the mac_filter_hash_lock.
2851  *
2852  * NOTE: this function expects to be called while under the
2853  * mac_filter_hash_lock
2854  */
2855 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2856 {
2857         struct i40e_mac_filter *f;
2858         struct hlist_node *h;
2859         int bkt;
2860
2861         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2862                 if (f->vlan == vid)
2863                         __i40e_del_filter(vsi, f);
2864         }
2865 }
2866
2867 /**
2868  * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2869  * @vsi: the VSI being configured
2870  * @vid: VLAN id to be removed
2871  **/
2872 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2873 {
2874         if (!vid || vsi->info.pvid)
2875                 return;
2876
2877         spin_lock_bh(&vsi->mac_filter_hash_lock);
2878         i40e_rm_vlan_all_mac(vsi, vid);
2879         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2880
2881         /* schedule our worker thread which will take care of
2882          * applying the new filter changes
2883          */
2884         i40e_service_event_schedule(vsi->back);
2885 }
2886
2887 /**
2888  * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2889  * @netdev: network interface to be adjusted
2890  * @proto: unused protocol value
2891  * @vid: vlan id to be added
2892  *
2893  * net_device_ops implementation for adding vlan ids
2894  **/
2895 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2896                                 __always_unused __be16 proto, u16 vid)
2897 {
2898         struct i40e_netdev_priv *np = netdev_priv(netdev);
2899         struct i40e_vsi *vsi = np->vsi;
2900         int ret = 0;
2901
2902         if (vid >= VLAN_N_VID)
2903                 return -EINVAL;
2904
2905         ret = i40e_vsi_add_vlan(vsi, vid);
2906         if (!ret)
2907                 set_bit(vid, vsi->active_vlans);
2908
2909         return ret;
2910 }
2911
2912 /**
2913  * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2914  * @netdev: network interface to be adjusted
2915  * @proto: unused protocol value
2916  * @vid: vlan id to be added
2917  **/
2918 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
2919                                     __always_unused __be16 proto, u16 vid)
2920 {
2921         struct i40e_netdev_priv *np = netdev_priv(netdev);
2922         struct i40e_vsi *vsi = np->vsi;
2923
2924         if (vid >= VLAN_N_VID)
2925                 return;
2926         set_bit(vid, vsi->active_vlans);
2927 }
2928
2929 /**
2930  * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2931  * @netdev: network interface to be adjusted
2932  * @proto: unused protocol value
2933  * @vid: vlan id to be removed
2934  *
2935  * net_device_ops implementation for removing vlan ids
2936  **/
2937 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2938                                  __always_unused __be16 proto, u16 vid)
2939 {
2940         struct i40e_netdev_priv *np = netdev_priv(netdev);
2941         struct i40e_vsi *vsi = np->vsi;
2942
2943         /* return code is ignored as there is nothing a user
2944          * can do about failure to remove and a log message was
2945          * already printed from the other function
2946          */
2947         i40e_vsi_kill_vlan(vsi, vid);
2948
2949         clear_bit(vid, vsi->active_vlans);
2950
2951         return 0;
2952 }
2953
2954 /**
2955  * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2956  * @vsi: the vsi being brought back up
2957  **/
2958 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2959 {
2960         u16 vid;
2961
2962         if (!vsi->netdev)
2963                 return;
2964
2965         if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2966                 i40e_vlan_stripping_enable(vsi);
2967         else
2968                 i40e_vlan_stripping_disable(vsi);
2969
2970         for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2971                 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
2972                                         vid);
2973 }
2974
2975 /**
2976  * i40e_vsi_add_pvid - Add pvid for the VSI
2977  * @vsi: the vsi being adjusted
2978  * @vid: the vlan id to set as a PVID
2979  **/
2980 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2981 {
2982         struct i40e_vsi_context ctxt;
2983         i40e_status ret;
2984
2985         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2986         vsi->info.pvid = cpu_to_le16(vid);
2987         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2988                                     I40E_AQ_VSI_PVLAN_INSERT_PVID |
2989                                     I40E_AQ_VSI_PVLAN_EMOD_STR;
2990
2991         ctxt.seid = vsi->seid;
2992         ctxt.info = vsi->info;
2993         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2994         if (ret) {
2995                 dev_info(&vsi->back->pdev->dev,
2996                          "add pvid failed, err %s aq_err %s\n",
2997                          i40e_stat_str(&vsi->back->hw, ret),
2998                          i40e_aq_str(&vsi->back->hw,
2999                                      vsi->back->hw.aq.asq_last_status));
3000                 return -ENOENT;
3001         }
3002
3003         return 0;
3004 }
3005
3006 /**
3007  * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3008  * @vsi: the vsi being adjusted
3009  *
3010  * Just use the vlan_rx_register() service to put it back to normal
3011  **/
3012 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3013 {
3014         vsi->info.pvid = 0;
3015
3016         i40e_vlan_stripping_disable(vsi);
3017 }
3018
3019 /**
3020  * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3021  * @vsi: ptr to the VSI
3022  *
3023  * If this function returns with an error, then it's possible one or
3024  * more of the rings is populated (while the rest are not).  It is the
3025  * callers duty to clean those orphaned rings.
3026  *
3027  * Return 0 on success, negative on failure
3028  **/
3029 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3030 {
3031         int i, err = 0;
3032
3033         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3034                 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3035
3036         if (!i40e_enabled_xdp_vsi(vsi))
3037                 return err;
3038
3039         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3040                 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3041
3042         return err;
3043 }
3044
3045 /**
3046  * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3047  * @vsi: ptr to the VSI
3048  *
3049  * Free VSI's transmit software resources
3050  **/
3051 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3052 {
3053         int i;
3054
3055         if (vsi->tx_rings) {
3056                 for (i = 0; i < vsi->num_queue_pairs; i++)
3057                         if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3058                                 i40e_free_tx_resources(vsi->tx_rings[i]);
3059         }
3060
3061         if (vsi->xdp_rings) {
3062                 for (i = 0; i < vsi->num_queue_pairs; i++)
3063                         if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3064                                 i40e_free_tx_resources(vsi->xdp_rings[i]);
3065         }
3066 }
3067
3068 /**
3069  * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3070  * @vsi: ptr to the VSI
3071  *
3072  * If this function returns with an error, then it's possible one or
3073  * more of the rings is populated (while the rest are not).  It is the
3074  * callers duty to clean those orphaned rings.
3075  *
3076  * Return 0 on success, negative on failure
3077  **/
3078 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3079 {
3080         int i, err = 0;
3081
3082         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3083                 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3084         return err;
3085 }
3086
3087 /**
3088  * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3089  * @vsi: ptr to the VSI
3090  *
3091  * Free all receive software resources
3092  **/
3093 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3094 {
3095         int i;
3096
3097         if (!vsi->rx_rings)
3098                 return;
3099
3100         for (i = 0; i < vsi->num_queue_pairs; i++)
3101                 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3102                         i40e_free_rx_resources(vsi->rx_rings[i]);
3103 }
3104
3105 /**
3106  * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3107  * @ring: The Tx ring to configure
3108  *
3109  * This enables/disables XPS for a given Tx descriptor ring
3110  * based on the TCs enabled for the VSI that ring belongs to.
3111  **/
3112 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3113 {
3114         int cpu;
3115
3116         if (!ring->q_vector || !ring->netdev || ring->ch)
3117                 return;
3118
3119         /* We only initialize XPS once, so as not to overwrite user settings */
3120         if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3121                 return;
3122
3123         cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3124         netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3125                             ring->queue_index);
3126 }
3127
3128 /**
3129  * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3130  * @ring: The Tx or Rx ring
3131  *
3132  * Returns the AF_XDP buffer pool or NULL.
3133  **/
3134 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3135 {
3136         bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3137         int qid = ring->queue_index;
3138
3139         if (ring_is_xdp(ring))
3140                 qid -= ring->vsi->alloc_queue_pairs;
3141
3142         if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3143                 return NULL;
3144
3145         return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3146 }
3147
3148 /**
3149  * i40e_configure_tx_ring - Configure a transmit ring context and rest
3150  * @ring: The Tx ring to configure
3151  *
3152  * Configure the Tx descriptor ring in the HMC context.
3153  **/
3154 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3155 {
3156         struct i40e_vsi *vsi = ring->vsi;
3157         u16 pf_q = vsi->base_queue + ring->queue_index;
3158         struct i40e_hw *hw = &vsi->back->hw;
3159         struct i40e_hmc_obj_txq tx_ctx;
3160         i40e_status err = 0;
3161         u32 qtx_ctl = 0;
3162
3163         if (ring_is_xdp(ring))
3164                 ring->xsk_pool = i40e_xsk_pool(ring);
3165
3166         /* some ATR related tx ring init */
3167         if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3168                 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3169                 ring->atr_count = 0;
3170         } else {
3171                 ring->atr_sample_rate = 0;
3172         }
3173
3174         /* configure XPS */
3175         i40e_config_xps_tx_ring(ring);
3176
3177         /* clear the context structure first */
3178         memset(&tx_ctx, 0, sizeof(tx_ctx));
3179
3180         tx_ctx.new_context = 1;
3181         tx_ctx.base = (ring->dma / 128);
3182         tx_ctx.qlen = ring->count;
3183         tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3184                                                I40E_FLAG_FD_ATR_ENABLED));
3185         tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3186         /* FDIR VSI tx ring can still use RS bit and writebacks */
3187         if (vsi->type != I40E_VSI_FDIR)
3188                 tx_ctx.head_wb_ena = 1;
3189         tx_ctx.head_wb_addr = ring->dma +
3190                               (ring->count * sizeof(struct i40e_tx_desc));
3191
3192         /* As part of VSI creation/update, FW allocates certain
3193          * Tx arbitration queue sets for each TC enabled for
3194          * the VSI. The FW returns the handles to these queue
3195          * sets as part of the response buffer to Add VSI,
3196          * Update VSI, etc. AQ commands. It is expected that
3197          * these queue set handles be associated with the Tx
3198          * queues by the driver as part of the TX queue context
3199          * initialization. This has to be done regardless of
3200          * DCB as by default everything is mapped to TC0.
3201          */
3202
3203         if (ring->ch)
3204                 tx_ctx.rdylist =
3205                         le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3206
3207         else
3208                 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3209
3210         tx_ctx.rdylist_act = 0;
3211
3212         /* clear the context in the HMC */
3213         err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3214         if (err) {
3215                 dev_info(&vsi->back->pdev->dev,
3216                          "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3217                          ring->queue_index, pf_q, err);
3218                 return -ENOMEM;
3219         }
3220
3221         /* set the context in the HMC */
3222         err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3223         if (err) {
3224                 dev_info(&vsi->back->pdev->dev,
3225                          "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3226                          ring->queue_index, pf_q, err);
3227                 return -ENOMEM;
3228         }
3229
3230         /* Now associate this queue with this PCI function */
3231         if (ring->ch) {
3232                 if (ring->ch->type == I40E_VSI_VMDQ2)
3233                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3234                 else
3235                         return -EINVAL;
3236
3237                 qtx_ctl |= (ring->ch->vsi_number <<
3238                             I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3239                             I40E_QTX_CTL_VFVM_INDX_MASK;
3240         } else {
3241                 if (vsi->type == I40E_VSI_VMDQ2) {
3242                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3243                         qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3244                                     I40E_QTX_CTL_VFVM_INDX_MASK;
3245                 } else {
3246                         qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3247                 }
3248         }
3249
3250         qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3251                     I40E_QTX_CTL_PF_INDX_MASK);
3252         wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3253         i40e_flush(hw);
3254
3255         /* cache tail off for easier writes later */
3256         ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3257
3258         return 0;
3259 }
3260
3261 /**
3262  * i40e_rx_offset - Return expected offset into page to access data
3263  * @rx_ring: Ring we are requesting offset of
3264  *
3265  * Returns the offset value for ring into the data buffer.
3266  */
3267 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3268 {
3269         return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3270 }
3271
3272 /**
3273  * i40e_configure_rx_ring - Configure a receive ring context
3274  * @ring: The Rx ring to configure
3275  *
3276  * Configure the Rx descriptor ring in the HMC context.
3277  **/
3278 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3279 {
3280         struct i40e_vsi *vsi = ring->vsi;
3281         u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3282         u16 pf_q = vsi->base_queue + ring->queue_index;
3283         struct i40e_hw *hw = &vsi->back->hw;
3284         struct i40e_hmc_obj_rxq rx_ctx;
3285         i40e_status err = 0;
3286         bool ok;
3287         int ret;
3288
3289         bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3290
3291         /* clear the context structure first */
3292         memset(&rx_ctx, 0, sizeof(rx_ctx));
3293
3294         if (ring->vsi->type == I40E_VSI_MAIN)
3295                 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3296
3297         kfree(ring->rx_bi);
3298         ring->xsk_pool = i40e_xsk_pool(ring);
3299         if (ring->xsk_pool) {
3300                 ret = i40e_alloc_rx_bi_zc(ring);
3301                 if (ret)
3302                         return ret;
3303                 ring->rx_buf_len =
3304                   xsk_pool_get_rx_frame_size(ring->xsk_pool);
3305                 /* For AF_XDP ZC, we disallow packets to span on
3306                  * multiple buffers, thus letting us skip that
3307                  * handling in the fast-path.
3308                  */
3309                 chain_len = 1;
3310                 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3311                                                  MEM_TYPE_XSK_BUFF_POOL,
3312                                                  NULL);
3313                 if (ret)
3314                         return ret;
3315                 dev_info(&vsi->back->pdev->dev,
3316                          "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3317                          ring->queue_index);
3318
3319         } else {
3320                 ret = i40e_alloc_rx_bi(ring);
3321                 if (ret)
3322                         return ret;
3323                 ring->rx_buf_len = vsi->rx_buf_len;
3324                 if (ring->vsi->type == I40E_VSI_MAIN) {
3325                         ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3326                                                          MEM_TYPE_PAGE_SHARED,
3327                                                          NULL);
3328                         if (ret)
3329                                 return ret;
3330                 }
3331         }
3332
3333         rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3334                                     BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3335
3336         rx_ctx.base = (ring->dma / 128);
3337         rx_ctx.qlen = ring->count;
3338
3339         /* use 16 byte descriptors */
3340         rx_ctx.dsize = 0;
3341
3342         /* descriptor type is always zero
3343          * rx_ctx.dtype = 0;
3344          */
3345         rx_ctx.hsplit_0 = 0;
3346
3347         rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3348         if (hw->revision_id == 0)
3349                 rx_ctx.lrxqthresh = 0;
3350         else
3351                 rx_ctx.lrxqthresh = 1;
3352         rx_ctx.crcstrip = 1;
3353         rx_ctx.l2tsel = 1;
3354         /* this controls whether VLAN is stripped from inner headers */
3355         rx_ctx.showiv = 0;
3356         /* set the prefena field to 1 because the manual says to */
3357         rx_ctx.prefena = 1;
3358
3359         /* clear the context in the HMC */
3360         err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3361         if (err) {
3362                 dev_info(&vsi->back->pdev->dev,
3363                          "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3364                          ring->queue_index, pf_q, err);
3365                 return -ENOMEM;
3366         }
3367
3368         /* set the context in the HMC */
3369         err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3370         if (err) {
3371                 dev_info(&vsi->back->pdev->dev,
3372                          "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3373                          ring->queue_index, pf_q, err);
3374                 return -ENOMEM;
3375         }
3376
3377         /* configure Rx buffer alignment */
3378         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3379                 clear_ring_build_skb_enabled(ring);
3380         else
3381                 set_ring_build_skb_enabled(ring);
3382
3383         ring->rx_offset = i40e_rx_offset(ring);
3384
3385         /* cache tail for quicker writes, and clear the reg before use */
3386         ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3387         writel(0, ring->tail);
3388
3389         if (ring->xsk_pool) {
3390                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3391                 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3392         } else {
3393                 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3394         }
3395         if (!ok) {
3396                 /* Log this in case the user has forgotten to give the kernel
3397                  * any buffers, even later in the application.
3398                  */
3399                 dev_info(&vsi->back->pdev->dev,
3400                          "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3401                          ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3402                          ring->queue_index, pf_q);
3403         }
3404
3405         return 0;
3406 }
3407
3408 /**
3409  * i40e_vsi_configure_tx - Configure the VSI for Tx
3410  * @vsi: VSI structure describing this set of rings and resources
3411  *
3412  * Configure the Tx VSI for operation.
3413  **/
3414 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3415 {
3416         int err = 0;
3417         u16 i;
3418
3419         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3420                 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3421
3422         if (err || !i40e_enabled_xdp_vsi(vsi))
3423                 return err;
3424
3425         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3426                 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3427
3428         return err;
3429 }
3430
3431 /**
3432  * i40e_vsi_configure_rx - Configure the VSI for Rx
3433  * @vsi: the VSI being configured
3434  *
3435  * Configure the Rx VSI for operation.
3436  **/
3437 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3438 {
3439         int err = 0;
3440         u16 i;
3441
3442         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3443                 vsi->max_frame = I40E_MAX_RXBUFFER;
3444                 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3445 #if (PAGE_SIZE < 8192)
3446         } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3447                    (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3448                 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3449                 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3450 #endif
3451         } else {
3452                 vsi->max_frame = I40E_MAX_RXBUFFER;
3453                 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3454                                                        I40E_RXBUFFER_2048;
3455         }
3456
3457         /* set up individual rings */
3458         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3459                 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3460
3461         return err;
3462 }
3463
3464 /**
3465  * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3466  * @vsi: ptr to the VSI
3467  **/
3468 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3469 {
3470         struct i40e_ring *tx_ring, *rx_ring;
3471         u16 qoffset, qcount;
3472         int i, n;
3473
3474         if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3475                 /* Reset the TC information */
3476                 for (i = 0; i < vsi->num_queue_pairs; i++) {
3477                         rx_ring = vsi->rx_rings[i];
3478                         tx_ring = vsi->tx_rings[i];
3479                         rx_ring->dcb_tc = 0;
3480                         tx_ring->dcb_tc = 0;
3481                 }
3482                 return;
3483         }
3484
3485         for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3486                 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3487                         continue;
3488
3489                 qoffset = vsi->tc_config.tc_info[n].qoffset;
3490                 qcount = vsi->tc_config.tc_info[n].qcount;
3491                 for (i = qoffset; i < (qoffset + qcount); i++) {
3492                         rx_ring = vsi->rx_rings[i];
3493                         tx_ring = vsi->tx_rings[i];
3494                         rx_ring->dcb_tc = n;
3495                         tx_ring->dcb_tc = n;
3496                 }
3497         }
3498 }
3499
3500 /**
3501  * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3502  * @vsi: ptr to the VSI
3503  **/
3504 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3505 {
3506         if (vsi->netdev)
3507                 i40e_set_rx_mode(vsi->netdev);
3508 }
3509
3510 /**
3511  * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3512  * @pf: Pointer to the targeted PF
3513  *
3514  * Set all flow director counters to 0.
3515  */
3516 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3517 {
3518         pf->fd_tcp4_filter_cnt = 0;
3519         pf->fd_udp4_filter_cnt = 0;
3520         pf->fd_sctp4_filter_cnt = 0;
3521         pf->fd_ip4_filter_cnt = 0;
3522         pf->fd_tcp6_filter_cnt = 0;
3523         pf->fd_udp6_filter_cnt = 0;
3524         pf->fd_sctp6_filter_cnt = 0;
3525         pf->fd_ip6_filter_cnt = 0;
3526 }
3527
3528 /**
3529  * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3530  * @vsi: Pointer to the targeted VSI
3531  *
3532  * This function replays the hlist on the hw where all the SB Flow Director
3533  * filters were saved.
3534  **/
3535 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3536 {
3537         struct i40e_fdir_filter *filter;
3538         struct i40e_pf *pf = vsi->back;
3539         struct hlist_node *node;
3540
3541         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3542                 return;
3543
3544         /* Reset FDir counters as we're replaying all existing filters */
3545         i40e_reset_fdir_filter_cnt(pf);
3546
3547         hlist_for_each_entry_safe(filter, node,
3548                                   &pf->fdir_filter_list, fdir_node) {
3549                 i40e_add_del_fdir(vsi, filter, true);
3550         }
3551 }
3552
3553 /**
3554  * i40e_vsi_configure - Set up the VSI for action
3555  * @vsi: the VSI being configured
3556  **/
3557 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3558 {
3559         int err;
3560
3561         i40e_set_vsi_rx_mode(vsi);
3562         i40e_restore_vlan(vsi);
3563         i40e_vsi_config_dcb_rings(vsi);
3564         err = i40e_vsi_configure_tx(vsi);
3565         if (!err)
3566                 err = i40e_vsi_configure_rx(vsi);
3567
3568         return err;
3569 }
3570
3571 /**
3572  * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3573  * @vsi: the VSI being configured
3574  **/
3575 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3576 {
3577         bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3578         struct i40e_pf *pf = vsi->back;
3579         struct i40e_hw *hw = &pf->hw;
3580         u16 vector;
3581         int i, q;
3582         u32 qp;
3583
3584         /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3585          * and PFINT_LNKLSTn registers, e.g.:
3586          *   PFINT_ITRn[0..n-1] gets msix-1..msix-n  (qpair interrupts)
3587          */
3588         qp = vsi->base_queue;
3589         vector = vsi->base_vector;
3590         for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3591                 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3592
3593                 q_vector->rx.next_update = jiffies + 1;
3594                 q_vector->rx.target_itr =
3595                         ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3596                 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3597                      q_vector->rx.target_itr >> 1);
3598                 q_vector->rx.current_itr = q_vector->rx.target_itr;
3599
3600                 q_vector->tx.next_update = jiffies + 1;
3601                 q_vector->tx.target_itr =
3602                         ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3603                 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3604                      q_vector->tx.target_itr >> 1);
3605                 q_vector->tx.current_itr = q_vector->tx.target_itr;
3606
3607                 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3608                      i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3609
3610                 /* Linked list for the queuepairs assigned to this vector */
3611                 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3612                 for (q = 0; q < q_vector->num_ringpairs; q++) {
3613                         u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3614                         u32 val;
3615
3616                         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3617                               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3618                               (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3619                               (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3620                               (I40E_QUEUE_TYPE_TX <<
3621                                I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3622
3623                         wr32(hw, I40E_QINT_RQCTL(qp), val);
3624
3625                         if (has_xdp) {
3626                                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3627                                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3628                                       (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3629                                       (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3630                                       (I40E_QUEUE_TYPE_TX <<
3631                                        I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3632
3633                                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3634                         }
3635
3636                         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3637                               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3638                               (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3639                               ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3640                               (I40E_QUEUE_TYPE_RX <<
3641                                I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3642
3643                         /* Terminate the linked list */
3644                         if (q == (q_vector->num_ringpairs - 1))
3645                                 val |= (I40E_QUEUE_END_OF_LIST <<
3646                                         I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3647
3648                         wr32(hw, I40E_QINT_TQCTL(qp), val);
3649                         qp++;
3650                 }
3651         }
3652
3653         i40e_flush(hw);
3654 }
3655
3656 /**
3657  * i40e_enable_misc_int_causes - enable the non-queue interrupts
3658  * @pf: pointer to private device data structure
3659  **/
3660 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3661 {
3662         struct i40e_hw *hw = &pf->hw;
3663         u32 val;
3664
3665         /* clear things first */
3666         wr32(hw, I40E_PFINT_ICR0_ENA, 0);  /* disable all */
3667         rd32(hw, I40E_PFINT_ICR0);         /* read to clear */
3668
3669         val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK       |
3670               I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK    |
3671               I40E_PFINT_ICR0_ENA_GRST_MASK          |
3672               I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3673               I40E_PFINT_ICR0_ENA_GPIO_MASK          |
3674               I40E_PFINT_ICR0_ENA_HMC_ERR_MASK       |
3675               I40E_PFINT_ICR0_ENA_VFLR_MASK          |
3676               I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3677
3678         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3679                 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3680
3681         if (pf->flags & I40E_FLAG_PTP)
3682                 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3683
3684         wr32(hw, I40E_PFINT_ICR0_ENA, val);
3685
3686         /* SW_ITR_IDX = 0, but don't change INTENA */
3687         wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3688                                         I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3689
3690         /* OTHER_ITR_IDX = 0 */
3691         wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3692 }
3693
3694 /**
3695  * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3696  * @vsi: the VSI being configured
3697  **/
3698 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3699 {
3700         u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3701         struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3702         struct i40e_pf *pf = vsi->back;
3703         struct i40e_hw *hw = &pf->hw;
3704         u32 val;
3705
3706         /* set the ITR configuration */
3707         q_vector->rx.next_update = jiffies + 1;
3708         q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3709         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3710         q_vector->rx.current_itr = q_vector->rx.target_itr;
3711         q_vector->tx.next_update = jiffies + 1;
3712         q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3713         wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3714         q_vector->tx.current_itr = q_vector->tx.target_itr;
3715
3716         i40e_enable_misc_int_causes(pf);
3717
3718         /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3719         wr32(hw, I40E_PFINT_LNKLST0, 0);
3720
3721         /* Associate the queue pair to the vector and enable the queue int */
3722         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK                   |
3723               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT)  |
3724               (nextqp      << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3725               (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3726
3727         wr32(hw, I40E_QINT_RQCTL(0), val);
3728
3729         if (i40e_enabled_xdp_vsi(vsi)) {
3730                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                 |
3731                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3732                       (I40E_QUEUE_TYPE_TX
3733                        << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3734
3735                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3736         }
3737
3738         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                  |
3739               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3740               (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3741
3742         wr32(hw, I40E_QINT_TQCTL(0), val);
3743         i40e_flush(hw);
3744 }
3745
3746 /**
3747  * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3748  * @pf: board private structure
3749  **/
3750 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3751 {
3752         struct i40e_hw *hw = &pf->hw;
3753
3754         wr32(hw, I40E_PFINT_DYN_CTL0,
3755              I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3756         i40e_flush(hw);
3757 }
3758
3759 /**
3760  * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3761  * @pf: board private structure
3762  **/
3763 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3764 {
3765         struct i40e_hw *hw = &pf->hw;
3766         u32 val;
3767
3768         val = I40E_PFINT_DYN_CTL0_INTENA_MASK   |
3769               I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3770               (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3771
3772         wr32(hw, I40E_PFINT_DYN_CTL0, val);
3773         i40e_flush(hw);
3774 }
3775
3776 /**
3777  * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3778  * @irq: interrupt number
3779  * @data: pointer to a q_vector
3780  **/
3781 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3782 {
3783         struct i40e_q_vector *q_vector = data;
3784
3785         if (!q_vector->tx.ring && !q_vector->rx.ring)
3786                 return IRQ_HANDLED;
3787
3788         napi_schedule_irqoff(&q_vector->napi);
3789
3790         return IRQ_HANDLED;
3791 }
3792
3793 /**
3794  * i40e_irq_affinity_notify - Callback for affinity changes
3795  * @notify: context as to what irq was changed
3796  * @mask: the new affinity mask
3797  *
3798  * This is a callback function used by the irq_set_affinity_notifier function
3799  * so that we may register to receive changes to the irq affinity masks.
3800  **/
3801 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3802                                      const cpumask_t *mask)
3803 {
3804         struct i40e_q_vector *q_vector =
3805                 container_of(notify, struct i40e_q_vector, affinity_notify);
3806
3807         cpumask_copy(&q_vector->affinity_mask, mask);
3808 }
3809
3810 /**
3811  * i40e_irq_affinity_release - Callback for affinity notifier release
3812  * @ref: internal core kernel usage
3813  *
3814  * This is a callback function used by the irq_set_affinity_notifier function
3815  * to inform the current notification subscriber that they will no longer
3816  * receive notifications.
3817  **/
3818 static void i40e_irq_affinity_release(struct kref *ref) {}
3819
3820 /**
3821  * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3822  * @vsi: the VSI being configured
3823  * @basename: name for the vector
3824  *
3825  * Allocates MSI-X vectors and requests interrupts from the kernel.
3826  **/
3827 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3828 {
3829         int q_vectors = vsi->num_q_vectors;
3830         struct i40e_pf *pf = vsi->back;
3831         int base = vsi->base_vector;
3832         int rx_int_idx = 0;
3833         int tx_int_idx = 0;
3834         int vector, err;
3835         int irq_num;
3836         int cpu;
3837
3838         for (vector = 0; vector < q_vectors; vector++) {
3839                 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3840
3841                 irq_num = pf->msix_entries[base + vector].vector;
3842
3843                 if (q_vector->tx.ring && q_vector->rx.ring) {
3844                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3845                                  "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3846                         tx_int_idx++;
3847                 } else if (q_vector->rx.ring) {
3848                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3849                                  "%s-%s-%d", basename, "rx", rx_int_idx++);
3850                 } else if (q_vector->tx.ring) {
3851                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3852                                  "%s-%s-%d", basename, "tx", tx_int_idx++);
3853                 } else {
3854                         /* skip this unused q_vector */
3855                         continue;
3856                 }
3857                 err = request_irq(irq_num,
3858                                   vsi->irq_handler,
3859                                   0,
3860                                   q_vector->name,
3861                                   q_vector);
3862                 if (err) {
3863                         dev_info(&pf->pdev->dev,
3864                                  "MSIX request_irq failed, error: %d\n", err);
3865                         goto free_queue_irqs;
3866                 }
3867
3868                 /* register for affinity change notifications */
3869                 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3870                 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3871                 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3872                 /* Spread affinity hints out across online CPUs.
3873                  *
3874                  * get_cpu_mask returns a static constant mask with
3875                  * a permanent lifetime so it's ok to pass to
3876                  * irq_set_affinity_hint without making a copy.
3877                  */
3878                 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3879                 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3880         }
3881
3882         vsi->irqs_ready = true;
3883         return 0;
3884
3885 free_queue_irqs:
3886         while (vector) {
3887                 vector--;
3888                 irq_num = pf->msix_entries[base + vector].vector;
3889                 irq_set_affinity_notifier(irq_num, NULL);
3890                 irq_set_affinity_hint(irq_num, NULL);
3891                 free_irq(irq_num, &vsi->q_vectors[vector]);
3892         }
3893         return err;
3894 }
3895
3896 /**
3897  * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3898  * @vsi: the VSI being un-configured
3899  **/
3900 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3901 {
3902         struct i40e_pf *pf = vsi->back;
3903         struct i40e_hw *hw = &pf->hw;
3904         int base = vsi->base_vector;
3905         int i;
3906
3907         /* disable interrupt causation from each queue */
3908         for (i = 0; i < vsi->num_queue_pairs; i++) {
3909                 u32 val;
3910
3911                 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3912                 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3913                 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3914
3915                 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3916                 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3917                 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3918
3919                 if (!i40e_enabled_xdp_vsi(vsi))
3920                         continue;
3921                 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3922         }
3923
3924         /* disable each interrupt */
3925         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3926                 for (i = vsi->base_vector;
3927                      i < (vsi->num_q_vectors + vsi->base_vector); i++)
3928                         wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3929
3930                 i40e_flush(hw);
3931                 for (i = 0; i < vsi->num_q_vectors; i++)
3932                         synchronize_irq(pf->msix_entries[i + base].vector);
3933         } else {
3934                 /* Legacy and MSI mode - this stops all interrupt handling */
3935                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3936                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3937                 i40e_flush(hw);
3938                 synchronize_irq(pf->pdev->irq);
3939         }
3940 }
3941
3942 /**
3943  * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3944  * @vsi: the VSI being configured
3945  **/
3946 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3947 {
3948         struct i40e_pf *pf = vsi->back;
3949         int i;
3950
3951         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3952                 for (i = 0; i < vsi->num_q_vectors; i++)
3953                         i40e_irq_dynamic_enable(vsi, i);
3954         } else {
3955                 i40e_irq_dynamic_enable_icr0(pf);
3956         }
3957
3958         i40e_flush(&pf->hw);
3959         return 0;
3960 }
3961
3962 /**
3963  * i40e_free_misc_vector - Free the vector that handles non-queue events
3964  * @pf: board private structure
3965  **/
3966 static void i40e_free_misc_vector(struct i40e_pf *pf)
3967 {
3968         /* Disable ICR 0 */
3969         wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3970         i40e_flush(&pf->hw);
3971
3972         if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3973                 synchronize_irq(pf->msix_entries[0].vector);
3974                 free_irq(pf->msix_entries[0].vector, pf);
3975                 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3976         }
3977 }
3978
3979 /**
3980  * i40e_intr - MSI/Legacy and non-queue interrupt handler
3981  * @irq: interrupt number
3982  * @data: pointer to a q_vector
3983  *
3984  * This is the handler used for all MSI/Legacy interrupts, and deals
3985  * with both queue and non-queue interrupts.  This is also used in
3986  * MSIX mode to handle the non-queue interrupts.
3987  **/
3988 static irqreturn_t i40e_intr(int irq, void *data)
3989 {
3990         struct i40e_pf *pf = (struct i40e_pf *)data;
3991         struct i40e_hw *hw = &pf->hw;
3992         irqreturn_t ret = IRQ_NONE;
3993         u32 icr0, icr0_remaining;
3994         u32 val, ena_mask;
3995
3996         icr0 = rd32(hw, I40E_PFINT_ICR0);
3997         ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3998
3999         /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4000         if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4001                 goto enable_intr;
4002
4003         /* if interrupt but no bits showing, must be SWINT */
4004         if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4005             (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4006                 pf->sw_int_count++;
4007
4008         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4009             (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4010                 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4011                 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4012                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4013         }
4014
4015         /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4016         if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4017                 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4018                 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4019
4020                 /* We do not have a way to disarm Queue causes while leaving
4021                  * interrupt enabled for all other causes, ideally
4022                  * interrupt should be disabled while we are in NAPI but
4023                  * this is not a performance path and napi_schedule()
4024                  * can deal with rescheduling.
4025                  */
4026                 if (!test_bit(__I40E_DOWN, pf->state))
4027                         napi_schedule_irqoff(&q_vector->napi);
4028         }
4029
4030         if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4031                 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4032                 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4033                 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4034         }
4035
4036         if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4037                 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4038                 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4039         }
4040
4041         if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4042                 /* disable any further VFLR event notifications */
4043                 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4044                         u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4045
4046                         reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4047                         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4048                 } else {
4049                         ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4050                         set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4051                 }
4052         }
4053
4054         if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4055                 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4056                         set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4057                 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4058                 val = rd32(hw, I40E_GLGEN_RSTAT);
4059                 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4060                        >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4061                 if (val == I40E_RESET_CORER) {
4062                         pf->corer_count++;
4063                 } else if (val == I40E_RESET_GLOBR) {
4064                         pf->globr_count++;
4065                 } else if (val == I40E_RESET_EMPR) {
4066                         pf->empr_count++;
4067                         set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4068                 }
4069         }
4070
4071         if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4072                 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4073                 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4074                 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4075                          rd32(hw, I40E_PFHMC_ERRORINFO),
4076                          rd32(hw, I40E_PFHMC_ERRORDATA));
4077         }
4078
4079         if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4080                 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4081
4082                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
4083                         icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4084                         i40e_ptp_tx_hwtstamp(pf);
4085                 }
4086         }
4087
4088         /* If a critical error is pending we have no choice but to reset the
4089          * device.
4090          * Report and mask out any remaining unexpected interrupts.
4091          */
4092         icr0_remaining = icr0 & ena_mask;
4093         if (icr0_remaining) {
4094                 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4095                          icr0_remaining);
4096                 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4097                     (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4098                     (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4099                         dev_info(&pf->pdev->dev, "device will be reset\n");
4100                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4101                         i40e_service_event_schedule(pf);
4102                 }
4103                 ena_mask &= ~icr0_remaining;
4104         }
4105         ret = IRQ_HANDLED;
4106
4107 enable_intr:
4108         /* re-enable interrupt causes */
4109         wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4110         if (!test_bit(__I40E_DOWN, pf->state) ||
4111             test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4112                 i40e_service_event_schedule(pf);
4113                 i40e_irq_dynamic_enable_icr0(pf);
4114         }
4115
4116         return ret;
4117 }
4118
4119 /**
4120  * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4121  * @tx_ring:  tx ring to clean
4122  * @budget:   how many cleans we're allowed
4123  *
4124  * Returns true if there's any budget left (e.g. the clean is finished)
4125  **/
4126 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4127 {
4128         struct i40e_vsi *vsi = tx_ring->vsi;
4129         u16 i = tx_ring->next_to_clean;
4130         struct i40e_tx_buffer *tx_buf;
4131         struct i40e_tx_desc *tx_desc;
4132
4133         tx_buf = &tx_ring->tx_bi[i];
4134         tx_desc = I40E_TX_DESC(tx_ring, i);
4135         i -= tx_ring->count;
4136
4137         do {
4138                 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4139
4140                 /* if next_to_watch is not set then there is no work pending */
4141                 if (!eop_desc)
4142                         break;
4143
4144                 /* prevent any other reads prior to eop_desc */
4145                 smp_rmb();
4146
4147                 /* if the descriptor isn't done, no work yet to do */
4148                 if (!(eop_desc->cmd_type_offset_bsz &
4149                       cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4150                         break;
4151
4152                 /* clear next_to_watch to prevent false hangs */
4153                 tx_buf->next_to_watch = NULL;
4154
4155                 tx_desc->buffer_addr = 0;
4156                 tx_desc->cmd_type_offset_bsz = 0;
4157                 /* move past filter desc */
4158                 tx_buf++;
4159                 tx_desc++;
4160                 i++;
4161                 if (unlikely(!i)) {
4162                         i -= tx_ring->count;
4163                         tx_buf = tx_ring->tx_bi;
4164                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4165                 }
4166                 /* unmap skb header data */
4167                 dma_unmap_single(tx_ring->dev,
4168                                  dma_unmap_addr(tx_buf, dma),
4169                                  dma_unmap_len(tx_buf, len),
4170                                  DMA_TO_DEVICE);
4171                 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4172                         kfree(tx_buf->raw_buf);
4173
4174                 tx_buf->raw_buf = NULL;
4175                 tx_buf->tx_flags = 0;
4176                 tx_buf->next_to_watch = NULL;
4177                 dma_unmap_len_set(tx_buf, len, 0);
4178                 tx_desc->buffer_addr = 0;
4179                 tx_desc->cmd_type_offset_bsz = 0;
4180
4181                 /* move us past the eop_desc for start of next FD desc */
4182                 tx_buf++;
4183                 tx_desc++;
4184                 i++;
4185                 if (unlikely(!i)) {
4186                         i -= tx_ring->count;
4187                         tx_buf = tx_ring->tx_bi;
4188                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4189                 }
4190
4191                 /* update budget accounting */
4192                 budget--;
4193         } while (likely(budget));
4194
4195         i += tx_ring->count;
4196         tx_ring->next_to_clean = i;
4197
4198         if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4199                 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4200
4201         return budget > 0;
4202 }
4203
4204 /**
4205  * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4206  * @irq: interrupt number
4207  * @data: pointer to a q_vector
4208  **/
4209 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4210 {
4211         struct i40e_q_vector *q_vector = data;
4212         struct i40e_vsi *vsi;
4213
4214         if (!q_vector->tx.ring)
4215                 return IRQ_HANDLED;
4216
4217         vsi = q_vector->tx.ring->vsi;
4218         i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4219
4220         return IRQ_HANDLED;
4221 }
4222
4223 /**
4224  * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4225  * @vsi: the VSI being configured
4226  * @v_idx: vector index
4227  * @qp_idx: queue pair index
4228  **/
4229 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4230 {
4231         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4232         struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4233         struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4234
4235         tx_ring->q_vector = q_vector;
4236         tx_ring->next = q_vector->tx.ring;
4237         q_vector->tx.ring = tx_ring;
4238         q_vector->tx.count++;
4239
4240         /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4241         if (i40e_enabled_xdp_vsi(vsi)) {
4242                 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4243
4244                 xdp_ring->q_vector = q_vector;
4245                 xdp_ring->next = q_vector->tx.ring;
4246                 q_vector->tx.ring = xdp_ring;
4247                 q_vector->tx.count++;
4248         }
4249
4250         rx_ring->q_vector = q_vector;
4251         rx_ring->next = q_vector->rx.ring;
4252         q_vector->rx.ring = rx_ring;
4253         q_vector->rx.count++;
4254 }
4255
4256 /**
4257  * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4258  * @vsi: the VSI being configured
4259  *
4260  * This function maps descriptor rings to the queue-specific vectors
4261  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
4262  * one vector per queue pair, but on a constrained vector budget, we
4263  * group the queue pairs as "efficiently" as possible.
4264  **/
4265 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4266 {
4267         int qp_remaining = vsi->num_queue_pairs;
4268         int q_vectors = vsi->num_q_vectors;
4269         int num_ringpairs;
4270         int v_start = 0;
4271         int qp_idx = 0;
4272
4273         /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4274          * group them so there are multiple queues per vector.
4275          * It is also important to go through all the vectors available to be
4276          * sure that if we don't use all the vectors, that the remaining vectors
4277          * are cleared. This is especially important when decreasing the
4278          * number of queues in use.
4279          */
4280         for (; v_start < q_vectors; v_start++) {
4281                 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4282
4283                 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4284
4285                 q_vector->num_ringpairs = num_ringpairs;
4286                 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4287
4288                 q_vector->rx.count = 0;
4289                 q_vector->tx.count = 0;
4290                 q_vector->rx.ring = NULL;
4291                 q_vector->tx.ring = NULL;
4292
4293                 while (num_ringpairs--) {
4294                         i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4295                         qp_idx++;
4296                         qp_remaining--;
4297                 }
4298         }
4299 }
4300
4301 /**
4302  * i40e_vsi_request_irq - Request IRQ from the OS
4303  * @vsi: the VSI being configured
4304  * @basename: name for the vector
4305  **/
4306 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4307 {
4308         struct i40e_pf *pf = vsi->back;
4309         int err;
4310
4311         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4312                 err = i40e_vsi_request_irq_msix(vsi, basename);
4313         else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4314                 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4315                                   pf->int_name, pf);
4316         else
4317                 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4318                                   pf->int_name, pf);
4319
4320         if (err)
4321                 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4322
4323         return err;
4324 }
4325
4326 #ifdef CONFIG_NET_POLL_CONTROLLER
4327 /**
4328  * i40e_netpoll - A Polling 'interrupt' handler
4329  * @netdev: network interface device structure
4330  *
4331  * This is used by netconsole to send skbs without having to re-enable
4332  * interrupts.  It's not called while the normal interrupt routine is executing.
4333  **/
4334 static void i40e_netpoll(struct net_device *netdev)
4335 {
4336         struct i40e_netdev_priv *np = netdev_priv(netdev);
4337         struct i40e_vsi *vsi = np->vsi;
4338         struct i40e_pf *pf = vsi->back;
4339         int i;
4340
4341         /* if interface is down do nothing */
4342         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4343                 return;
4344
4345         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4346                 for (i = 0; i < vsi->num_q_vectors; i++)
4347                         i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4348         } else {
4349                 i40e_intr(pf->pdev->irq, netdev);
4350         }
4351 }
4352 #endif
4353
4354 #define I40E_QTX_ENA_WAIT_COUNT 50
4355
4356 /**
4357  * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4358  * @pf: the PF being configured
4359  * @pf_q: the PF queue
4360  * @enable: enable or disable state of the queue
4361  *
4362  * This routine will wait for the given Tx queue of the PF to reach the
4363  * enabled or disabled state.
4364  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4365  * multiple retries; else will return 0 in case of success.
4366  **/
4367 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4368 {
4369         int i;
4370         u32 tx_reg;
4371
4372         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4373                 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4374                 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4375                         break;
4376
4377                 usleep_range(10, 20);
4378         }
4379         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4380                 return -ETIMEDOUT;
4381
4382         return 0;
4383 }
4384
4385 /**
4386  * i40e_control_tx_q - Start or stop a particular Tx queue
4387  * @pf: the PF structure
4388  * @pf_q: the PF queue to configure
4389  * @enable: start or stop the queue
4390  *
4391  * This function enables or disables a single queue. Note that any delay
4392  * required after the operation is expected to be handled by the caller of
4393  * this function.
4394  **/
4395 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4396 {
4397         struct i40e_hw *hw = &pf->hw;
4398         u32 tx_reg;
4399         int i;
4400
4401         /* warn the TX unit of coming changes */
4402         i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4403         if (!enable)
4404                 usleep_range(10, 20);
4405
4406         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4407                 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4408                 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4409                     ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4410                         break;
4411                 usleep_range(1000, 2000);
4412         }
4413
4414         /* Skip if the queue is already in the requested state */
4415         if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4416                 return;
4417
4418         /* turn on/off the queue */
4419         if (enable) {
4420                 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4421                 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4422         } else {
4423                 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4424         }
4425
4426         wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4427 }
4428
4429 /**
4430  * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4431  * @seid: VSI SEID
4432  * @pf: the PF structure
4433  * @pf_q: the PF queue to configure
4434  * @is_xdp: true if the queue is used for XDP
4435  * @enable: start or stop the queue
4436  **/
4437 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4438                            bool is_xdp, bool enable)
4439 {
4440         int ret;
4441
4442         i40e_control_tx_q(pf, pf_q, enable);
4443
4444         /* wait for the change to finish */
4445         ret = i40e_pf_txq_wait(pf, pf_q, enable);
4446         if (ret) {
4447                 dev_info(&pf->pdev->dev,
4448                          "VSI seid %d %sTx ring %d %sable timeout\n",
4449                          seid, (is_xdp ? "XDP " : ""), pf_q,
4450                          (enable ? "en" : "dis"));
4451         }
4452
4453         return ret;
4454 }
4455
4456 /**
4457  * i40e_vsi_control_tx - Start or stop a VSI's rings
4458  * @vsi: the VSI being configured
4459  * @enable: start or stop the rings
4460  **/
4461 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4462 {
4463         struct i40e_pf *pf = vsi->back;
4464         int i, pf_q, ret = 0;
4465
4466         pf_q = vsi->base_queue;
4467         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4468                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4469                                              pf_q,
4470                                              false /*is xdp*/, enable);
4471                 if (ret)
4472                         break;
4473
4474                 if (!i40e_enabled_xdp_vsi(vsi))
4475                         continue;
4476
4477                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4478                                              pf_q + vsi->alloc_queue_pairs,
4479                                              true /*is xdp*/, enable);
4480                 if (ret)
4481                         break;
4482         }
4483         return ret;
4484 }
4485
4486 /**
4487  * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4488  * @pf: the PF being configured
4489  * @pf_q: the PF queue
4490  * @enable: enable or disable state of the queue
4491  *
4492  * This routine will wait for the given Rx queue of the PF to reach the
4493  * enabled or disabled state.
4494  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4495  * multiple retries; else will return 0 in case of success.
4496  **/
4497 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4498 {
4499         int i;
4500         u32 rx_reg;
4501
4502         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4503                 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4504                 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4505                         break;
4506
4507                 usleep_range(10, 20);
4508         }
4509         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4510                 return -ETIMEDOUT;
4511
4512         return 0;
4513 }
4514
4515 /**
4516  * i40e_control_rx_q - Start or stop a particular Rx queue
4517  * @pf: the PF structure
4518  * @pf_q: the PF queue to configure
4519  * @enable: start or stop the queue
4520  *
4521  * This function enables or disables a single queue. Note that
4522  * any delay required after the operation is expected to be
4523  * handled by the caller of this function.
4524  **/
4525 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4526 {
4527         struct i40e_hw *hw = &pf->hw;
4528         u32 rx_reg;
4529         int i;
4530
4531         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4532                 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4533                 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4534                     ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4535                         break;
4536                 usleep_range(1000, 2000);
4537         }
4538
4539         /* Skip if the queue is already in the requested state */
4540         if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4541                 return;
4542
4543         /* turn on/off the queue */
4544         if (enable)
4545                 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4546         else
4547                 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4548
4549         wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4550 }
4551
4552 /**
4553  * i40e_control_wait_rx_q
4554  * @pf: the PF structure
4555  * @pf_q: queue being configured
4556  * @enable: start or stop the rings
4557  *
4558  * This function enables or disables a single queue along with waiting
4559  * for the change to finish. The caller of this function should handle
4560  * the delays needed in the case of disabling queues.
4561  **/
4562 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4563 {
4564         int ret = 0;
4565
4566         i40e_control_rx_q(pf, pf_q, enable);
4567
4568         /* wait for the change to finish */
4569         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4570         if (ret)
4571                 return ret;
4572
4573         return ret;
4574 }
4575
4576 /**
4577  * i40e_vsi_control_rx - Start or stop a VSI's rings
4578  * @vsi: the VSI being configured
4579  * @enable: start or stop the rings
4580  **/
4581 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4582 {
4583         struct i40e_pf *pf = vsi->back;
4584         int i, pf_q, ret = 0;
4585
4586         pf_q = vsi->base_queue;
4587         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4588                 ret = i40e_control_wait_rx_q(pf, pf_q, enable);
4589                 if (ret) {
4590                         dev_info(&pf->pdev->dev,
4591                                  "VSI seid %d Rx ring %d %sable timeout\n",
4592                                  vsi->seid, pf_q, (enable ? "en" : "dis"));
4593                         break;
4594                 }
4595         }
4596
4597         /* Due to HW errata, on Rx disable only, the register can indicate done
4598          * before it really is. Needs 50ms to be sure
4599          */
4600         if (!enable)
4601                 mdelay(50);
4602
4603         return ret;
4604 }
4605
4606 /**
4607  * i40e_vsi_start_rings - Start a VSI's rings
4608  * @vsi: the VSI being configured
4609  **/
4610 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4611 {
4612         int ret = 0;
4613
4614         /* do rx first for enable and last for disable */
4615         ret = i40e_vsi_control_rx(vsi, true);
4616         if (ret)
4617                 return ret;
4618         ret = i40e_vsi_control_tx(vsi, true);
4619
4620         return ret;
4621 }
4622
4623 /**
4624  * i40e_vsi_stop_rings - Stop a VSI's rings
4625  * @vsi: the VSI being configured
4626  **/
4627 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4628 {
4629         /* When port TX is suspended, don't wait */
4630         if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4631                 return i40e_vsi_stop_rings_no_wait(vsi);
4632
4633         /* do rx first for enable and last for disable
4634          * Ignore return value, we need to shutdown whatever we can
4635          */
4636         i40e_vsi_control_tx(vsi, false);
4637         i40e_vsi_control_rx(vsi, false);
4638 }
4639
4640 /**
4641  * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4642  * @vsi: the VSI being shutdown
4643  *
4644  * This function stops all the rings for a VSI but does not delay to verify
4645  * that rings have been disabled. It is expected that the caller is shutting
4646  * down multiple VSIs at once and will delay together for all the VSIs after
4647  * initiating the shutdown. This is particularly useful for shutting down lots
4648  * of VFs together. Otherwise, a large delay can be incurred while configuring
4649  * each VSI in serial.
4650  **/
4651 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4652 {
4653         struct i40e_pf *pf = vsi->back;
4654         int i, pf_q;
4655
4656         pf_q = vsi->base_queue;
4657         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4658                 i40e_control_tx_q(pf, pf_q, false);
4659                 i40e_control_rx_q(pf, pf_q, false);
4660         }
4661 }
4662
4663 /**
4664  * i40e_vsi_free_irq - Free the irq association with the OS
4665  * @vsi: the VSI being configured
4666  **/
4667 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4668 {
4669         struct i40e_pf *pf = vsi->back;
4670         struct i40e_hw *hw = &pf->hw;
4671         int base = vsi->base_vector;
4672         u32 val, qp;
4673         int i;
4674
4675         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4676                 if (!vsi->q_vectors)
4677                         return;
4678
4679                 if (!vsi->irqs_ready)
4680                         return;
4681
4682                 vsi->irqs_ready = false;
4683                 for (i = 0; i < vsi->num_q_vectors; i++) {
4684                         int irq_num;
4685                         u16 vector;
4686
4687                         vector = i + base;
4688                         irq_num = pf->msix_entries[vector].vector;
4689
4690                         /* free only the irqs that were actually requested */
4691                         if (!vsi->q_vectors[i] ||
4692                             !vsi->q_vectors[i]->num_ringpairs)
4693                                 continue;
4694
4695                         /* clear the affinity notifier in the IRQ descriptor */
4696                         irq_set_affinity_notifier(irq_num, NULL);
4697                         /* remove our suggested affinity mask for this IRQ */
4698                         irq_set_affinity_hint(irq_num, NULL);
4699                         synchronize_irq(irq_num);
4700                         free_irq(irq_num, vsi->q_vectors[i]);
4701
4702                         /* Tear down the interrupt queue link list
4703                          *
4704                          * We know that they come in pairs and always
4705                          * the Rx first, then the Tx.  To clear the
4706                          * link list, stick the EOL value into the
4707                          * next_q field of the registers.
4708                          */
4709                         val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4710                         qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4711                                 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4712                         val |= I40E_QUEUE_END_OF_LIST
4713                                 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4714                         wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4715
4716                         while (qp != I40E_QUEUE_END_OF_LIST) {
4717                                 u32 next;
4718
4719                                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4720
4721                                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4722                                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4723                                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4724                                          I40E_QINT_RQCTL_INTEVENT_MASK);
4725
4726                                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4727                                          I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4728
4729                                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4730
4731                                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4732
4733                                 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4734                                         >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4735
4736                                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4737                                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4738                                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4739                                          I40E_QINT_TQCTL_INTEVENT_MASK);
4740
4741                                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4742                                          I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4743
4744                                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4745                                 qp = next;
4746                         }
4747                 }
4748         } else {
4749                 free_irq(pf->pdev->irq, pf);
4750
4751                 val = rd32(hw, I40E_PFINT_LNKLST0);
4752                 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4753                         >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4754                 val |= I40E_QUEUE_END_OF_LIST
4755                         << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4756                 wr32(hw, I40E_PFINT_LNKLST0, val);
4757
4758                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4759                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4760                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4761                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4762                          I40E_QINT_RQCTL_INTEVENT_MASK);
4763
4764                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4765                         I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4766
4767                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4768
4769                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4770
4771                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4772                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4773                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4774                          I40E_QINT_TQCTL_INTEVENT_MASK);
4775
4776                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4777                         I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4778
4779                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4780         }
4781 }
4782
4783 /**
4784  * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4785  * @vsi: the VSI being configured
4786  * @v_idx: Index of vector to be freed
4787  *
4788  * This function frees the memory allocated to the q_vector.  In addition if
4789  * NAPI is enabled it will delete any references to the NAPI struct prior
4790  * to freeing the q_vector.
4791  **/
4792 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4793 {
4794         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4795         struct i40e_ring *ring;
4796
4797         if (!q_vector)
4798                 return;
4799
4800         /* disassociate q_vector from rings */
4801         i40e_for_each_ring(ring, q_vector->tx)
4802                 ring->q_vector = NULL;
4803
4804         i40e_for_each_ring(ring, q_vector->rx)
4805                 ring->q_vector = NULL;
4806
4807         /* only VSI w/ an associated netdev is set up w/ NAPI */
4808         if (vsi->netdev)
4809                 netif_napi_del(&q_vector->napi);
4810
4811         vsi->q_vectors[v_idx] = NULL;
4812
4813         kfree_rcu(q_vector, rcu);
4814 }
4815
4816 /**
4817  * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4818  * @vsi: the VSI being un-configured
4819  *
4820  * This frees the memory allocated to the q_vectors and
4821  * deletes references to the NAPI struct.
4822  **/
4823 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4824 {
4825         int v_idx;
4826
4827         for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4828                 i40e_free_q_vector(vsi, v_idx);
4829 }
4830
4831 /**
4832  * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4833  * @pf: board private structure
4834  **/
4835 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4836 {
4837         /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4838         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4839                 pci_disable_msix(pf->pdev);
4840                 kfree(pf->msix_entries);
4841                 pf->msix_entries = NULL;
4842                 kfree(pf->irq_pile);
4843                 pf->irq_pile = NULL;
4844         } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4845                 pci_disable_msi(pf->pdev);
4846         }
4847         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4848 }
4849
4850 /**
4851  * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4852  * @pf: board private structure
4853  *
4854  * We go through and clear interrupt specific resources and reset the structure
4855  * to pre-load conditions
4856  **/
4857 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4858 {
4859         int i;
4860
4861         i40e_free_misc_vector(pf);
4862
4863         i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4864                       I40E_IWARP_IRQ_PILE_ID);
4865
4866         i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4867         for (i = 0; i < pf->num_alloc_vsi; i++)
4868                 if (pf->vsi[i])
4869                         i40e_vsi_free_q_vectors(pf->vsi[i]);
4870         i40e_reset_interrupt_capability(pf);
4871 }
4872
4873 /**
4874  * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4875  * @vsi: the VSI being configured
4876  **/
4877 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4878 {
4879         int q_idx;
4880
4881         if (!vsi->netdev)
4882                 return;
4883
4884         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4885                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4886
4887                 if (q_vector->rx.ring || q_vector->tx.ring)
4888                         napi_enable(&q_vector->napi);
4889         }
4890 }
4891
4892 /**
4893  * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4894  * @vsi: the VSI being configured
4895  **/
4896 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4897 {
4898         int q_idx;
4899
4900         if (!vsi->netdev)
4901                 return;
4902
4903         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4904                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4905
4906                 if (q_vector->rx.ring || q_vector->tx.ring)
4907                         napi_disable(&q_vector->napi);
4908         }
4909 }
4910
4911 /**
4912  * i40e_vsi_close - Shut down a VSI
4913  * @vsi: the vsi to be quelled
4914  **/
4915 static void i40e_vsi_close(struct i40e_vsi *vsi)
4916 {
4917         struct i40e_pf *pf = vsi->back;
4918         if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4919                 i40e_down(vsi);
4920         i40e_vsi_free_irq(vsi);
4921         i40e_vsi_free_tx_resources(vsi);
4922         i40e_vsi_free_rx_resources(vsi);
4923         vsi->current_netdev_flags = 0;
4924         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
4925         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4926                 set_bit(__I40E_CLIENT_RESET, pf->state);
4927 }
4928
4929 /**
4930  * i40e_quiesce_vsi - Pause a given VSI
4931  * @vsi: the VSI being paused
4932  **/
4933 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4934 {
4935         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4936                 return;
4937
4938         set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4939         if (vsi->netdev && netif_running(vsi->netdev))
4940                 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4941         else
4942                 i40e_vsi_close(vsi);
4943 }
4944
4945 /**
4946  * i40e_unquiesce_vsi - Resume a given VSI
4947  * @vsi: the VSI being resumed
4948  **/
4949 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4950 {
4951         if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4952                 return;
4953
4954         if (vsi->netdev && netif_running(vsi->netdev))
4955                 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4956         else
4957                 i40e_vsi_open(vsi);   /* this clears the DOWN bit */
4958 }
4959
4960 /**
4961  * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4962  * @pf: the PF
4963  **/
4964 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4965 {
4966         int v;
4967
4968         for (v = 0; v < pf->num_alloc_vsi; v++) {
4969                 if (pf->vsi[v])
4970                         i40e_quiesce_vsi(pf->vsi[v]);
4971         }
4972 }
4973
4974 /**
4975  * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4976  * @pf: the PF
4977  **/
4978 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4979 {
4980         int v;
4981
4982         for (v = 0; v < pf->num_alloc_vsi; v++) {
4983                 if (pf->vsi[v])
4984                         i40e_unquiesce_vsi(pf->vsi[v]);
4985         }
4986 }
4987
4988 /**
4989  * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4990  * @vsi: the VSI being configured
4991  *
4992  * Wait until all queues on a given VSI have been disabled.
4993  **/
4994 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4995 {
4996         struct i40e_pf *pf = vsi->back;
4997         int i, pf_q, ret;
4998
4999         pf_q = vsi->base_queue;
5000         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5001                 /* Check and wait for the Tx queue */
5002                 ret = i40e_pf_txq_wait(pf, pf_q, false);
5003                 if (ret) {
5004                         dev_info(&pf->pdev->dev,
5005                                  "VSI seid %d Tx ring %d disable timeout\n",
5006                                  vsi->seid, pf_q);
5007                         return ret;
5008                 }
5009
5010                 if (!i40e_enabled_xdp_vsi(vsi))
5011                         goto wait_rx;
5012
5013                 /* Check and wait for the XDP Tx queue */
5014                 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5015                                        false);
5016                 if (ret) {
5017                         dev_info(&pf->pdev->dev,
5018                                  "VSI seid %d XDP Tx ring %d disable timeout\n",
5019                                  vsi->seid, pf_q);
5020                         return ret;
5021                 }
5022 wait_rx:
5023                 /* Check and wait for the Rx queue */
5024                 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5025                 if (ret) {
5026                         dev_info(&pf->pdev->dev,
5027                                  "VSI seid %d Rx ring %d disable timeout\n",
5028                                  vsi->seid, pf_q);
5029                         return ret;
5030                 }
5031         }
5032
5033         return 0;
5034 }
5035
5036 #ifdef CONFIG_I40E_DCB
5037 /**
5038  * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5039  * @pf: the PF
5040  *
5041  * This function waits for the queues to be in disabled state for all the
5042  * VSIs that are managed by this PF.
5043  **/
5044 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5045 {
5046         int v, ret = 0;
5047
5048         for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5049                 if (pf->vsi[v]) {
5050                         ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5051                         if (ret)
5052                                 break;
5053                 }
5054         }
5055
5056         return ret;
5057 }
5058
5059 #endif
5060
5061 /**
5062  * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5063  * @pf: pointer to PF
5064  *
5065  * Get TC map for ISCSI PF type that will include iSCSI TC
5066  * and LAN TC.
5067  **/
5068 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5069 {
5070         struct i40e_dcb_app_priority_table app;
5071         struct i40e_hw *hw = &pf->hw;
5072         u8 enabled_tc = 1; /* TC0 is always enabled */
5073         u8 tc, i;
5074         /* Get the iSCSI APP TLV */
5075         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5076
5077         for (i = 0; i < dcbcfg->numapps; i++) {
5078                 app = dcbcfg->app[i];
5079                 if (app.selector == I40E_APP_SEL_TCPIP &&
5080                     app.protocolid == I40E_APP_PROTOID_ISCSI) {
5081                         tc = dcbcfg->etscfg.prioritytable[app.priority];
5082                         enabled_tc |= BIT(tc);
5083                         break;
5084                 }
5085         }
5086
5087         return enabled_tc;
5088 }
5089
5090 /**
5091  * i40e_dcb_get_num_tc -  Get the number of TCs from DCBx config
5092  * @dcbcfg: the corresponding DCBx configuration structure
5093  *
5094  * Return the number of TCs from given DCBx configuration
5095  **/
5096 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5097 {
5098         int i, tc_unused = 0;
5099         u8 num_tc = 0;
5100         u8 ret = 0;
5101
5102         /* Scan the ETS Config Priority Table to find
5103          * traffic class enabled for a given priority
5104          * and create a bitmask of enabled TCs
5105          */
5106         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5107                 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5108
5109         /* Now scan the bitmask to check for
5110          * contiguous TCs starting with TC0
5111          */
5112         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5113                 if (num_tc & BIT(i)) {
5114                         if (!tc_unused) {
5115                                 ret++;
5116                         } else {
5117                                 pr_err("Non-contiguous TC - Disabling DCB\n");
5118                                 return 1;
5119                         }
5120                 } else {
5121                         tc_unused = 1;
5122                 }
5123         }
5124
5125         /* There is always at least TC0 */
5126         if (!ret)
5127                 ret = 1;
5128
5129         return ret;
5130 }
5131
5132 /**
5133  * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5134  * @dcbcfg: the corresponding DCBx configuration structure
5135  *
5136  * Query the current DCB configuration and return the number of
5137  * traffic classes enabled from the given DCBX config
5138  **/
5139 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5140 {
5141         u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5142         u8 enabled_tc = 1;
5143         u8 i;
5144
5145         for (i = 0; i < num_tc; i++)
5146                 enabled_tc |= BIT(i);
5147
5148         return enabled_tc;
5149 }
5150
5151 /**
5152  * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5153  * @pf: PF being queried
5154  *
5155  * Query the current MQPRIO configuration and return the number of
5156  * traffic classes enabled.
5157  **/
5158 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5159 {
5160         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5161         u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5162         u8 enabled_tc = 1, i;
5163
5164         for (i = 1; i < num_tc; i++)
5165                 enabled_tc |= BIT(i);
5166         return enabled_tc;
5167 }
5168
5169 /**
5170  * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5171  * @pf: PF being queried
5172  *
5173  * Return number of traffic classes enabled for the given PF
5174  **/
5175 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5176 {
5177         struct i40e_hw *hw = &pf->hw;
5178         u8 i, enabled_tc = 1;
5179         u8 num_tc = 0;
5180         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5181
5182         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5183                 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5184
5185         /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5186         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5187                 return 1;
5188
5189         /* SFP mode will be enabled for all TCs on port */
5190         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5191                 return i40e_dcb_get_num_tc(dcbcfg);
5192
5193         /* MFP mode return count of enabled TCs for this PF */
5194         if (pf->hw.func_caps.iscsi)
5195                 enabled_tc =  i40e_get_iscsi_tc_map(pf);
5196         else
5197                 return 1; /* Only TC0 */
5198
5199         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5200                 if (enabled_tc & BIT(i))
5201                         num_tc++;
5202         }
5203         return num_tc;
5204 }
5205
5206 /**
5207  * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5208  * @pf: PF being queried
5209  *
5210  * Return a bitmap for enabled traffic classes for this PF.
5211  **/
5212 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5213 {
5214         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5215                 return i40e_mqprio_get_enabled_tc(pf);
5216
5217         /* If neither MQPRIO nor DCB is enabled for this PF then just return
5218          * default TC
5219          */
5220         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5221                 return I40E_DEFAULT_TRAFFIC_CLASS;
5222
5223         /* SFP mode we want PF to be enabled for all TCs */
5224         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5225                 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5226
5227         /* MFP enabled and iSCSI PF type */
5228         if (pf->hw.func_caps.iscsi)
5229                 return i40e_get_iscsi_tc_map(pf);
5230         else
5231                 return I40E_DEFAULT_TRAFFIC_CLASS;
5232 }
5233
5234 /**
5235  * i40e_vsi_get_bw_info - Query VSI BW Information
5236  * @vsi: the VSI being queried
5237  *
5238  * Returns 0 on success, negative value on failure
5239  **/
5240 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5241 {
5242         struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5243         struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5244         struct i40e_pf *pf = vsi->back;
5245         struct i40e_hw *hw = &pf->hw;
5246         i40e_status ret;
5247         u32 tc_bw_max;
5248         int i;
5249
5250         /* Get the VSI level BW configuration */
5251         ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5252         if (ret) {
5253                 dev_info(&pf->pdev->dev,
5254                          "couldn't get PF vsi bw config, err %s aq_err %s\n",
5255                          i40e_stat_str(&pf->hw, ret),
5256                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5257                 return -EINVAL;
5258         }
5259
5260         /* Get the VSI level BW configuration per TC */
5261         ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5262                                                NULL);
5263         if (ret) {
5264                 dev_info(&pf->pdev->dev,
5265                          "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5266                          i40e_stat_str(&pf->hw, ret),
5267                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5268                 return -EINVAL;
5269         }
5270
5271         if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5272                 dev_info(&pf->pdev->dev,
5273                          "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5274                          bw_config.tc_valid_bits,
5275                          bw_ets_config.tc_valid_bits);
5276                 /* Still continuing */
5277         }
5278
5279         vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5280         vsi->bw_max_quanta = bw_config.max_bw;
5281         tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5282                     (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5283         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5284                 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5285                 vsi->bw_ets_limit_credits[i] =
5286                                         le16_to_cpu(bw_ets_config.credits[i]);
5287                 /* 3 bits out of 4 for each TC */
5288                 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5289         }
5290
5291         return 0;
5292 }
5293
5294 /**
5295  * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5296  * @vsi: the VSI being configured
5297  * @enabled_tc: TC bitmap
5298  * @bw_share: BW shared credits per TC
5299  *
5300  * Returns 0 on success, negative value on failure
5301  **/
5302 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5303                                        u8 *bw_share)
5304 {
5305         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5306         struct i40e_pf *pf = vsi->back;
5307         i40e_status ret;
5308         int i;
5309
5310         /* There is no need to reset BW when mqprio mode is on.  */
5311         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5312                 return 0;
5313         if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5314                 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5315                 if (ret)
5316                         dev_info(&pf->pdev->dev,
5317                                  "Failed to reset tx rate for vsi->seid %u\n",
5318                                  vsi->seid);
5319                 return ret;
5320         }
5321         memset(&bw_data, 0, sizeof(bw_data));
5322         bw_data.tc_valid_bits = enabled_tc;
5323         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5324                 bw_data.tc_bw_credits[i] = bw_share[i];
5325
5326         ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5327         if (ret) {
5328                 dev_info(&pf->pdev->dev,
5329                          "AQ command Config VSI BW allocation per TC failed = %d\n",
5330                          pf->hw.aq.asq_last_status);
5331                 return -EINVAL;
5332         }
5333
5334         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5335                 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5336
5337         return 0;
5338 }
5339
5340 /**
5341  * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5342  * @vsi: the VSI being configured
5343  * @enabled_tc: TC map to be enabled
5344  *
5345  **/
5346 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5347 {
5348         struct net_device *netdev = vsi->netdev;
5349         struct i40e_pf *pf = vsi->back;
5350         struct i40e_hw *hw = &pf->hw;
5351         u8 netdev_tc = 0;
5352         int i;
5353         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5354
5355         if (!netdev)
5356                 return;
5357
5358         if (!enabled_tc) {
5359                 netdev_reset_tc(netdev);
5360                 return;
5361         }
5362
5363         /* Set up actual enabled TCs on the VSI */
5364         if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5365                 return;
5366
5367         /* set per TC queues for the VSI */
5368         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5369                 /* Only set TC queues for enabled tcs
5370                  *
5371                  * e.g. For a VSI that has TC0 and TC3 enabled the
5372                  * enabled_tc bitmap would be 0x00001001; the driver
5373                  * will set the numtc for netdev as 2 that will be
5374                  * referenced by the netdev layer as TC 0 and 1.
5375                  */
5376                 if (vsi->tc_config.enabled_tc & BIT(i))
5377                         netdev_set_tc_queue(netdev,
5378                                         vsi->tc_config.tc_info[i].netdev_tc,
5379                                         vsi->tc_config.tc_info[i].qcount,
5380                                         vsi->tc_config.tc_info[i].qoffset);
5381         }
5382
5383         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5384                 return;
5385
5386         /* Assign UP2TC map for the VSI */
5387         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5388                 /* Get the actual TC# for the UP */
5389                 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5390                 /* Get the mapped netdev TC# for the UP */
5391                 netdev_tc =  vsi->tc_config.tc_info[ets_tc].netdev_tc;
5392                 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5393         }
5394 }
5395
5396 /**
5397  * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5398  * @vsi: the VSI being configured
5399  * @ctxt: the ctxt buffer returned from AQ VSI update param command
5400  **/
5401 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5402                                       struct i40e_vsi_context *ctxt)
5403 {
5404         /* copy just the sections touched not the entire info
5405          * since not all sections are valid as returned by
5406          * update vsi params
5407          */
5408         vsi->info.mapping_flags = ctxt->info.mapping_flags;
5409         memcpy(&vsi->info.queue_mapping,
5410                &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5411         memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5412                sizeof(vsi->info.tc_mapping));
5413 }
5414
5415 /**
5416  * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5417  * @vsi: VSI to be configured
5418  * @enabled_tc: TC bitmap
5419  *
5420  * This configures a particular VSI for TCs that are mapped to the
5421  * given TC bitmap. It uses default bandwidth share for TCs across
5422  * VSIs to configure TC for a particular VSI.
5423  *
5424  * NOTE:
5425  * It is expected that the VSI queues have been quisced before calling
5426  * this function.
5427  **/
5428 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5429 {
5430         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5431         struct i40e_pf *pf = vsi->back;
5432         struct i40e_hw *hw = &pf->hw;
5433         struct i40e_vsi_context ctxt;
5434         int ret = 0;
5435         int i;
5436
5437         /* Check if enabled_tc is same as existing or new TCs */
5438         if (vsi->tc_config.enabled_tc == enabled_tc &&
5439             vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5440                 return ret;
5441
5442         /* Enable ETS TCs with equal BW Share for now across all VSIs */
5443         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5444                 if (enabled_tc & BIT(i))
5445                         bw_share[i] = 1;
5446         }
5447
5448         ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5449         if (ret) {
5450                 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5451
5452                 dev_info(&pf->pdev->dev,
5453                          "Failed configuring TC map %d for VSI %d\n",
5454                          enabled_tc, vsi->seid);
5455                 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5456                                                   &bw_config, NULL);
5457                 if (ret) {
5458                         dev_info(&pf->pdev->dev,
5459                                  "Failed querying vsi bw info, err %s aq_err %s\n",
5460                                  i40e_stat_str(hw, ret),
5461                                  i40e_aq_str(hw, hw->aq.asq_last_status));
5462                         goto out;
5463                 }
5464                 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5465                         u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5466
5467                         if (!valid_tc)
5468                                 valid_tc = bw_config.tc_valid_bits;
5469                         /* Always enable TC0, no matter what */
5470                         valid_tc |= 1;
5471                         dev_info(&pf->pdev->dev,
5472                                  "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5473                                  enabled_tc, bw_config.tc_valid_bits, valid_tc);
5474                         enabled_tc = valid_tc;
5475                 }
5476
5477                 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5478                 if (ret) {
5479                         dev_err(&pf->pdev->dev,
5480                                 "Unable to  configure TC map %d for VSI %d\n",
5481                                 enabled_tc, vsi->seid);
5482                         goto out;
5483                 }
5484         }
5485
5486         /* Update Queue Pairs Mapping for currently enabled UPs */
5487         ctxt.seid = vsi->seid;
5488         ctxt.pf_num = vsi->back->hw.pf_id;
5489         ctxt.vf_num = 0;
5490         ctxt.uplink_seid = vsi->uplink_seid;
5491         ctxt.info = vsi->info;
5492         if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5493                 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5494                 if (ret)
5495                         goto out;
5496         } else {
5497                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5498         }
5499
5500         /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5501          * queues changed.
5502          */
5503         if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5504                 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5505                                       vsi->num_queue_pairs);
5506                 ret = i40e_vsi_config_rss(vsi);
5507                 if (ret) {
5508                         dev_info(&vsi->back->pdev->dev,
5509                                  "Failed to reconfig rss for num_queues\n");
5510                         return ret;
5511                 }
5512                 vsi->reconfig_rss = false;
5513         }
5514         if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5515                 ctxt.info.valid_sections |=
5516                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5517                 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5518         }
5519
5520         /* Update the VSI after updating the VSI queue-mapping
5521          * information
5522          */
5523         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5524         if (ret) {
5525                 dev_info(&pf->pdev->dev,
5526                          "Update vsi tc config failed, err %s aq_err %s\n",
5527                          i40e_stat_str(hw, ret),
5528                          i40e_aq_str(hw, hw->aq.asq_last_status));
5529                 goto out;
5530         }
5531         /* update the local VSI info with updated queue map */
5532         i40e_vsi_update_queue_map(vsi, &ctxt);
5533         vsi->info.valid_sections = 0;
5534
5535         /* Update current VSI BW information */
5536         ret = i40e_vsi_get_bw_info(vsi);
5537         if (ret) {
5538                 dev_info(&pf->pdev->dev,
5539                          "Failed updating vsi bw info, err %s aq_err %s\n",
5540                          i40e_stat_str(hw, ret),
5541                          i40e_aq_str(hw, hw->aq.asq_last_status));
5542                 goto out;
5543         }
5544
5545         /* Update the netdev TC setup */
5546         i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5547 out:
5548         return ret;
5549 }
5550
5551 /**
5552  * i40e_get_link_speed - Returns link speed for the interface
5553  * @vsi: VSI to be configured
5554  *
5555  **/
5556 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5557 {
5558         struct i40e_pf *pf = vsi->back;
5559
5560         switch (pf->hw.phy.link_info.link_speed) {
5561         case I40E_LINK_SPEED_40GB:
5562                 return 40000;
5563         case I40E_LINK_SPEED_25GB:
5564                 return 25000;
5565         case I40E_LINK_SPEED_20GB:
5566                 return 20000;
5567         case I40E_LINK_SPEED_10GB:
5568                 return 10000;
5569         case I40E_LINK_SPEED_1GB:
5570                 return 1000;
5571         default:
5572                 return -EINVAL;
5573         }
5574 }
5575
5576 /**
5577  * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5578  * @vsi: VSI to be configured
5579  * @seid: seid of the channel/VSI
5580  * @max_tx_rate: max TX rate to be configured as BW limit
5581  *
5582  * Helper function to set BW limit for a given VSI
5583  **/
5584 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5585 {
5586         struct i40e_pf *pf = vsi->back;
5587         u64 credits = 0;
5588         int speed = 0;
5589         int ret = 0;
5590
5591         speed = i40e_get_link_speed(vsi);
5592         if (max_tx_rate > speed) {
5593                 dev_err(&pf->pdev->dev,
5594                         "Invalid max tx rate %llu specified for VSI seid %d.",
5595                         max_tx_rate, seid);
5596                 return -EINVAL;
5597         }
5598         if (max_tx_rate && max_tx_rate < 50) {
5599                 dev_warn(&pf->pdev->dev,
5600                          "Setting max tx rate to minimum usable value of 50Mbps.\n");
5601                 max_tx_rate = 50;
5602         }
5603
5604         /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5605         credits = max_tx_rate;
5606         do_div(credits, I40E_BW_CREDIT_DIVISOR);
5607         ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5608                                           I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5609         if (ret)
5610                 dev_err(&pf->pdev->dev,
5611                         "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5612                         max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5613                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5614         return ret;
5615 }
5616
5617 /**
5618  * i40e_remove_queue_channels - Remove queue channels for the TCs
5619  * @vsi: VSI to be configured
5620  *
5621  * Remove queue channels for the TCs
5622  **/
5623 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5624 {
5625         enum i40e_admin_queue_err last_aq_status;
5626         struct i40e_cloud_filter *cfilter;
5627         struct i40e_channel *ch, *ch_tmp;
5628         struct i40e_pf *pf = vsi->back;
5629         struct hlist_node *node;
5630         int ret, i;
5631
5632         /* Reset rss size that was stored when reconfiguring rss for
5633          * channel VSIs with non-power-of-2 queue count.
5634          */
5635         vsi->current_rss_size = 0;
5636
5637         /* perform cleanup for channels if they exist */
5638         if (list_empty(&vsi->ch_list))
5639                 return;
5640
5641         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5642                 struct i40e_vsi *p_vsi;
5643
5644                 list_del(&ch->list);
5645                 p_vsi = ch->parent_vsi;
5646                 if (!p_vsi || !ch->initialized) {
5647                         kfree(ch);
5648                         continue;
5649                 }
5650                 /* Reset queue contexts */
5651                 for (i = 0; i < ch->num_queue_pairs; i++) {
5652                         struct i40e_ring *tx_ring, *rx_ring;
5653                         u16 pf_q;
5654
5655                         pf_q = ch->base_queue + i;
5656                         tx_ring = vsi->tx_rings[pf_q];
5657                         tx_ring->ch = NULL;
5658
5659                         rx_ring = vsi->rx_rings[pf_q];
5660                         rx_ring->ch = NULL;
5661                 }
5662
5663                 /* Reset BW configured for this VSI via mqprio */
5664                 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5665                 if (ret)
5666                         dev_info(&vsi->back->pdev->dev,
5667                                  "Failed to reset tx rate for ch->seid %u\n",
5668                                  ch->seid);
5669
5670                 /* delete cloud filters associated with this channel */
5671                 hlist_for_each_entry_safe(cfilter, node,
5672                                           &pf->cloud_filter_list, cloud_node) {
5673                         if (cfilter->seid != ch->seid)
5674                                 continue;
5675
5676                         hash_del(&cfilter->cloud_node);
5677                         if (cfilter->dst_port)
5678                                 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5679                                                                         cfilter,
5680                                                                         false);
5681                         else
5682                                 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5683                                                                 false);
5684                         last_aq_status = pf->hw.aq.asq_last_status;
5685                         if (ret)
5686                                 dev_info(&pf->pdev->dev,
5687                                          "Failed to delete cloud filter, err %s aq_err %s\n",
5688                                          i40e_stat_str(&pf->hw, ret),
5689                                          i40e_aq_str(&pf->hw, last_aq_status));
5690                         kfree(cfilter);
5691                 }
5692
5693                 /* delete VSI from FW */
5694                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5695                                              NULL);
5696                 if (ret)
5697                         dev_err(&vsi->back->pdev->dev,
5698                                 "unable to remove channel (%d) for parent VSI(%d)\n",
5699                                 ch->seid, p_vsi->seid);
5700                 kfree(ch);
5701         }
5702         INIT_LIST_HEAD(&vsi->ch_list);
5703 }
5704
5705 /**
5706  * i40e_is_any_channel - channel exist or not
5707  * @vsi: ptr to VSI to which channels are associated with
5708  *
5709  * Returns true or false if channel(s) exist for associated VSI or not
5710  **/
5711 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5712 {
5713         struct i40e_channel *ch, *ch_tmp;
5714
5715         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5716                 if (ch->initialized)
5717                         return true;
5718         }
5719
5720         return false;
5721 }
5722
5723 /**
5724  * i40e_get_max_queues_for_channel
5725  * @vsi: ptr to VSI to which channels are associated with
5726  *
5727  * Helper function which returns max value among the queue counts set on the
5728  * channels/TCs created.
5729  **/
5730 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5731 {
5732         struct i40e_channel *ch, *ch_tmp;
5733         int max = 0;
5734
5735         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5736                 if (!ch->initialized)
5737                         continue;
5738                 if (ch->num_queue_pairs > max)
5739                         max = ch->num_queue_pairs;
5740         }
5741
5742         return max;
5743 }
5744
5745 /**
5746  * i40e_validate_num_queues - validate num_queues w.r.t channel
5747  * @pf: ptr to PF device
5748  * @num_queues: number of queues
5749  * @vsi: the parent VSI
5750  * @reconfig_rss: indicates should the RSS be reconfigured or not
5751  *
5752  * This function validates number of queues in the context of new channel
5753  * which is being established and determines if RSS should be reconfigured
5754  * or not for parent VSI.
5755  **/
5756 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5757                                     struct i40e_vsi *vsi, bool *reconfig_rss)
5758 {
5759         int max_ch_queues;
5760
5761         if (!reconfig_rss)
5762                 return -EINVAL;
5763
5764         *reconfig_rss = false;
5765         if (vsi->current_rss_size) {
5766                 if (num_queues > vsi->current_rss_size) {
5767                         dev_dbg(&pf->pdev->dev,
5768                                 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5769                                 num_queues, vsi->current_rss_size);
5770                         return -EINVAL;
5771                 } else if ((num_queues < vsi->current_rss_size) &&
5772                            (!is_power_of_2(num_queues))) {
5773                         dev_dbg(&pf->pdev->dev,
5774                                 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5775                                 num_queues, vsi->current_rss_size);
5776                         return -EINVAL;
5777                 }
5778         }
5779
5780         if (!is_power_of_2(num_queues)) {
5781                 /* Find the max num_queues configured for channel if channel
5782                  * exist.
5783                  * if channel exist, then enforce 'num_queues' to be more than
5784                  * max ever queues configured for channel.
5785                  */
5786                 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5787                 if (num_queues < max_ch_queues) {
5788                         dev_dbg(&pf->pdev->dev,
5789                                 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5790                                 num_queues, max_ch_queues);
5791                         return -EINVAL;
5792                 }
5793                 *reconfig_rss = true;
5794         }
5795
5796         return 0;
5797 }
5798
5799 /**
5800  * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5801  * @vsi: the VSI being setup
5802  * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5803  *
5804  * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5805  **/
5806 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5807 {
5808         struct i40e_pf *pf = vsi->back;
5809         u8 seed[I40E_HKEY_ARRAY_SIZE];
5810         struct i40e_hw *hw = &pf->hw;
5811         int local_rss_size;
5812         u8 *lut;
5813         int ret;
5814
5815         if (!vsi->rss_size)
5816                 return -EINVAL;
5817
5818         if (rss_size > vsi->rss_size)
5819                 return -EINVAL;
5820
5821         local_rss_size = min_t(int, vsi->rss_size, rss_size);
5822         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5823         if (!lut)
5824                 return -ENOMEM;
5825
5826         /* Ignoring user configured lut if there is one */
5827         i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5828
5829         /* Use user configured hash key if there is one, otherwise
5830          * use default.
5831          */
5832         if (vsi->rss_hkey_user)
5833                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5834         else
5835                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5836
5837         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5838         if (ret) {
5839                 dev_info(&pf->pdev->dev,
5840                          "Cannot set RSS lut, err %s aq_err %s\n",
5841                          i40e_stat_str(hw, ret),
5842                          i40e_aq_str(hw, hw->aq.asq_last_status));
5843                 kfree(lut);
5844                 return ret;
5845         }
5846         kfree(lut);
5847
5848         /* Do the update w.r.t. storing rss_size */
5849         if (!vsi->orig_rss_size)
5850                 vsi->orig_rss_size = vsi->rss_size;
5851         vsi->current_rss_size = local_rss_size;
5852
5853         return ret;
5854 }
5855
5856 /**
5857  * i40e_channel_setup_queue_map - Setup a channel queue map
5858  * @pf: ptr to PF device
5859  * @ctxt: VSI context structure
5860  * @ch: ptr to channel structure
5861  *
5862  * Setup queue map for a specific channel
5863  **/
5864 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5865                                          struct i40e_vsi_context *ctxt,
5866                                          struct i40e_channel *ch)
5867 {
5868         u16 qcount, qmap, sections = 0;
5869         u8 offset = 0;
5870         int pow;
5871
5872         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5873         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5874
5875         qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5876         ch->num_queue_pairs = qcount;
5877
5878         /* find the next higher power-of-2 of num queue pairs */
5879         pow = ilog2(qcount);
5880         if (!is_power_of_2(qcount))
5881                 pow++;
5882
5883         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5884                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5885
5886         /* Setup queue TC[0].qmap for given VSI context */
5887         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5888
5889         ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5890         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5891         ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5892         ctxt->info.valid_sections |= cpu_to_le16(sections);
5893 }
5894
5895 /**
5896  * i40e_add_channel - add a channel by adding VSI
5897  * @pf: ptr to PF device
5898  * @uplink_seid: underlying HW switching element (VEB) ID
5899  * @ch: ptr to channel structure
5900  *
5901  * Add a channel (VSI) using add_vsi and queue_map
5902  **/
5903 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5904                             struct i40e_channel *ch)
5905 {
5906         struct i40e_hw *hw = &pf->hw;
5907         struct i40e_vsi_context ctxt;
5908         u8 enabled_tc = 0x1; /* TC0 enabled */
5909         int ret;
5910
5911         if (ch->type != I40E_VSI_VMDQ2) {
5912                 dev_info(&pf->pdev->dev,
5913                          "add new vsi failed, ch->type %d\n", ch->type);
5914                 return -EINVAL;
5915         }
5916
5917         memset(&ctxt, 0, sizeof(ctxt));
5918         ctxt.pf_num = hw->pf_id;
5919         ctxt.vf_num = 0;
5920         ctxt.uplink_seid = uplink_seid;
5921         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5922         if (ch->type == I40E_VSI_VMDQ2)
5923                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5924
5925         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5926                 ctxt.info.valid_sections |=
5927                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5928                 ctxt.info.switch_id =
5929                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5930         }
5931
5932         /* Set queue map for a given VSI context */
5933         i40e_channel_setup_queue_map(pf, &ctxt, ch);
5934
5935         /* Now time to create VSI */
5936         ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5937         if (ret) {
5938                 dev_info(&pf->pdev->dev,
5939                          "add new vsi failed, err %s aq_err %s\n",
5940                          i40e_stat_str(&pf->hw, ret),
5941                          i40e_aq_str(&pf->hw,
5942                                      pf->hw.aq.asq_last_status));
5943                 return -ENOENT;
5944         }
5945
5946         /* Success, update channel, set enabled_tc only if the channel
5947          * is not a macvlan
5948          */
5949         ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
5950         ch->seid = ctxt.seid;
5951         ch->vsi_number = ctxt.vsi_number;
5952         ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
5953
5954         /* copy just the sections touched not the entire info
5955          * since not all sections are valid as returned by
5956          * update vsi params
5957          */
5958         ch->info.mapping_flags = ctxt.info.mapping_flags;
5959         memcpy(&ch->info.queue_mapping,
5960                &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5961         memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5962                sizeof(ctxt.info.tc_mapping));
5963
5964         return 0;
5965 }
5966
5967 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5968                                   u8 *bw_share)
5969 {
5970         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5971         i40e_status ret;
5972         int i;
5973
5974         memset(&bw_data, 0, sizeof(bw_data));
5975         bw_data.tc_valid_bits = ch->enabled_tc;
5976         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5977                 bw_data.tc_bw_credits[i] = bw_share[i];
5978
5979         ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5980                                        &bw_data, NULL);
5981         if (ret) {
5982                 dev_info(&vsi->back->pdev->dev,
5983                          "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5984                          vsi->back->hw.aq.asq_last_status, ch->seid);
5985                 return -EINVAL;
5986         }
5987
5988         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5989                 ch->info.qs_handle[i] = bw_data.qs_handles[i];
5990
5991         return 0;
5992 }
5993
5994 /**
5995  * i40e_channel_config_tx_ring - config TX ring associated with new channel
5996  * @pf: ptr to PF device
5997  * @vsi: the VSI being setup
5998  * @ch: ptr to channel structure
5999  *
6000  * Configure TX rings associated with channel (VSI) since queues are being
6001  * from parent VSI.
6002  **/
6003 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6004                                        struct i40e_vsi *vsi,
6005                                        struct i40e_channel *ch)
6006 {
6007         i40e_status ret;
6008         int i;
6009         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6010
6011         /* Enable ETS TCs with equal BW Share for now across all VSIs */
6012         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6013                 if (ch->enabled_tc & BIT(i))
6014                         bw_share[i] = 1;
6015         }
6016
6017         /* configure BW for new VSI */
6018         ret = i40e_channel_config_bw(vsi, ch, bw_share);
6019         if (ret) {
6020                 dev_info(&vsi->back->pdev->dev,
6021                          "Failed configuring TC map %d for channel (seid %u)\n",
6022                          ch->enabled_tc, ch->seid);
6023                 return ret;
6024         }
6025
6026         for (i = 0; i < ch->num_queue_pairs; i++) {
6027                 struct i40e_ring *tx_ring, *rx_ring;
6028                 u16 pf_q;
6029
6030                 pf_q = ch->base_queue + i;
6031
6032                 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6033                  * context
6034                  */
6035                 tx_ring = vsi->tx_rings[pf_q];
6036                 tx_ring->ch = ch;
6037
6038                 /* Get the RX ring ptr */
6039                 rx_ring = vsi->rx_rings[pf_q];
6040                 rx_ring->ch = ch;
6041         }
6042
6043         return 0;
6044 }
6045
6046 /**
6047  * i40e_setup_hw_channel - setup new channel
6048  * @pf: ptr to PF device
6049  * @vsi: the VSI being setup
6050  * @ch: ptr to channel structure
6051  * @uplink_seid: underlying HW switching element (VEB) ID
6052  * @type: type of channel to be created (VMDq2/VF)
6053  *
6054  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6055  * and configures TX rings accordingly
6056  **/
6057 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6058                                         struct i40e_vsi *vsi,
6059                                         struct i40e_channel *ch,
6060                                         u16 uplink_seid, u8 type)
6061 {
6062         int ret;
6063
6064         ch->initialized = false;
6065         ch->base_queue = vsi->next_base_queue;
6066         ch->type = type;
6067
6068         /* Proceed with creation of channel (VMDq2) VSI */
6069         ret = i40e_add_channel(pf, uplink_seid, ch);
6070         if (ret) {
6071                 dev_info(&pf->pdev->dev,
6072                          "failed to add_channel using uplink_seid %u\n",
6073                          uplink_seid);
6074                 return ret;
6075         }
6076
6077         /* Mark the successful creation of channel */
6078         ch->initialized = true;
6079
6080         /* Reconfigure TX queues using QTX_CTL register */
6081         ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6082         if (ret) {
6083                 dev_info(&pf->pdev->dev,
6084                          "failed to configure TX rings for channel %u\n",
6085                          ch->seid);
6086                 return ret;
6087         }
6088
6089         /* update 'next_base_queue' */
6090         vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6091         dev_dbg(&pf->pdev->dev,
6092                 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6093                 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6094                 ch->num_queue_pairs,
6095                 vsi->next_base_queue);
6096         return ret;
6097 }
6098
6099 /**
6100  * i40e_setup_channel - setup new channel using uplink element
6101  * @pf: ptr to PF device
6102  * @vsi: pointer to the VSI to set up the channel within
6103  * @ch: ptr to channel structure
6104  *
6105  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6106  * and uplink switching element (uplink_seid)
6107  **/
6108 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6109                                struct i40e_channel *ch)
6110 {
6111         u8 vsi_type;
6112         u16 seid;
6113         int ret;
6114
6115         if (vsi->type == I40E_VSI_MAIN) {
6116                 vsi_type = I40E_VSI_VMDQ2;
6117         } else {
6118                 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6119                         vsi->type);
6120                 return false;
6121         }
6122
6123         /* underlying switching element */
6124         seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6125
6126         /* create channel (VSI), configure TX rings */
6127         ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6128         if (ret) {
6129                 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6130                 return false;
6131         }
6132
6133         return ch->initialized ? true : false;
6134 }
6135
6136 /**
6137  * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6138  * @vsi: ptr to VSI which has PF backing
6139  *
6140  * Sets up switch mode correctly if it needs to be changed and perform
6141  * what are allowed modes.
6142  **/
6143 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6144 {
6145         u8 mode;
6146         struct i40e_pf *pf = vsi->back;
6147         struct i40e_hw *hw = &pf->hw;
6148         int ret;
6149
6150         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6151         if (ret)
6152                 return -EINVAL;
6153
6154         if (hw->dev_caps.switch_mode) {
6155                 /* if switch mode is set, support mode2 (non-tunneled for
6156                  * cloud filter) for now
6157                  */
6158                 u32 switch_mode = hw->dev_caps.switch_mode &
6159                                   I40E_SWITCH_MODE_MASK;
6160                 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6161                         if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6162                                 return 0;
6163                         dev_err(&pf->pdev->dev,
6164                                 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6165                                 hw->dev_caps.switch_mode);
6166                         return -EINVAL;
6167                 }
6168         }
6169
6170         /* Set Bit 7 to be valid */
6171         mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6172
6173         /* Set L4type for TCP support */
6174         mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6175
6176         /* Set cloud filter mode */
6177         mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6178
6179         /* Prep mode field for set_switch_config */
6180         ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6181                                         pf->last_sw_conf_valid_flags,
6182                                         mode, NULL);
6183         if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6184                 dev_err(&pf->pdev->dev,
6185                         "couldn't set switch config bits, err %s aq_err %s\n",
6186                         i40e_stat_str(hw, ret),
6187                         i40e_aq_str(hw,
6188                                     hw->aq.asq_last_status));
6189
6190         return ret;
6191 }
6192
6193 /**
6194  * i40e_create_queue_channel - function to create channel
6195  * @vsi: VSI to be configured
6196  * @ch: ptr to channel (it contains channel specific params)
6197  *
6198  * This function creates channel (VSI) using num_queues specified by user,
6199  * reconfigs RSS if needed.
6200  **/
6201 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6202                               struct i40e_channel *ch)
6203 {
6204         struct i40e_pf *pf = vsi->back;
6205         bool reconfig_rss;
6206         int err;
6207
6208         if (!ch)
6209                 return -EINVAL;
6210
6211         if (!ch->num_queue_pairs) {
6212                 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6213                         ch->num_queue_pairs);
6214                 return -EINVAL;
6215         }
6216
6217         /* validate user requested num_queues for channel */
6218         err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6219                                        &reconfig_rss);
6220         if (err) {
6221                 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6222                          ch->num_queue_pairs);
6223                 return -EINVAL;
6224         }
6225
6226         /* By default we are in VEPA mode, if this is the first VF/VMDq
6227          * VSI to be added switch to VEB mode.
6228          */
6229         if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6230             (!i40e_is_any_channel(vsi))) {
6231                 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6232                         dev_dbg(&pf->pdev->dev,
6233                                 "Failed to create channel. Override queues (%u) not power of 2\n",
6234                                 vsi->tc_config.tc_info[0].qcount);
6235                         return -EINVAL;
6236                 }
6237
6238                 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6239                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6240
6241                         if (vsi->type == I40E_VSI_MAIN) {
6242                                 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6243                                         i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6244                                                       true);
6245                                 else
6246                                         i40e_do_reset_safe(pf,
6247                                                            I40E_PF_RESET_FLAG);
6248                         }
6249                 }
6250                 /* now onwards for main VSI, number of queues will be value
6251                  * of TC0's queue count
6252                  */
6253         }
6254
6255         /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6256          * it should be more than num_queues
6257          */
6258         if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6259                 dev_dbg(&pf->pdev->dev,
6260                         "Error: cnt_q_avail (%u) less than num_queues %d\n",
6261                         vsi->cnt_q_avail, ch->num_queue_pairs);
6262                 return -EINVAL;
6263         }
6264
6265         /* reconfig_rss only if vsi type is MAIN_VSI */
6266         if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6267                 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6268                 if (err) {
6269                         dev_info(&pf->pdev->dev,
6270                                  "Error: unable to reconfig rss for num_queues (%u)\n",
6271                                  ch->num_queue_pairs);
6272                         return -EINVAL;
6273                 }
6274         }
6275
6276         if (!i40e_setup_channel(pf, vsi, ch)) {
6277                 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6278                 return -EINVAL;
6279         }
6280
6281         dev_info(&pf->pdev->dev,
6282                  "Setup channel (id:%u) utilizing num_queues %d\n",
6283                  ch->seid, ch->num_queue_pairs);
6284
6285         /* configure VSI for BW limit */
6286         if (ch->max_tx_rate) {
6287                 u64 credits = ch->max_tx_rate;
6288
6289                 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6290                         return -EINVAL;
6291
6292                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6293                 dev_dbg(&pf->pdev->dev,
6294                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6295                         ch->max_tx_rate,
6296                         credits,
6297                         ch->seid);
6298         }
6299
6300         /* in case of VF, this will be main SRIOV VSI */
6301         ch->parent_vsi = vsi;
6302
6303         /* and update main_vsi's count for queue_available to use */
6304         vsi->cnt_q_avail -= ch->num_queue_pairs;
6305
6306         return 0;
6307 }
6308
6309 /**
6310  * i40e_configure_queue_channels - Add queue channel for the given TCs
6311  * @vsi: VSI to be configured
6312  *
6313  * Configures queue channel mapping to the given TCs
6314  **/
6315 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6316 {
6317         struct i40e_channel *ch;
6318         u64 max_rate = 0;
6319         int ret = 0, i;
6320
6321         /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6322         vsi->tc_seid_map[0] = vsi->seid;
6323         for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6324                 if (vsi->tc_config.enabled_tc & BIT(i)) {
6325                         ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6326                         if (!ch) {
6327                                 ret = -ENOMEM;
6328                                 goto err_free;
6329                         }
6330
6331                         INIT_LIST_HEAD(&ch->list);
6332                         ch->num_queue_pairs =
6333                                 vsi->tc_config.tc_info[i].qcount;
6334                         ch->base_queue =
6335                                 vsi->tc_config.tc_info[i].qoffset;
6336
6337                         /* Bandwidth limit through tc interface is in bytes/s,
6338                          * change to Mbit/s
6339                          */
6340                         max_rate = vsi->mqprio_qopt.max_rate[i];
6341                         do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6342                         ch->max_tx_rate = max_rate;
6343
6344                         list_add_tail(&ch->list, &vsi->ch_list);
6345
6346                         ret = i40e_create_queue_channel(vsi, ch);
6347                         if (ret) {
6348                                 dev_err(&vsi->back->pdev->dev,
6349                                         "Failed creating queue channel with TC%d: queues %d\n",
6350                                         i, ch->num_queue_pairs);
6351                                 goto err_free;
6352                         }
6353                         vsi->tc_seid_map[i] = ch->seid;
6354                 }
6355         }
6356         return ret;
6357
6358 err_free:
6359         i40e_remove_queue_channels(vsi);
6360         return ret;
6361 }
6362
6363 /**
6364  * i40e_veb_config_tc - Configure TCs for given VEB
6365  * @veb: given VEB
6366  * @enabled_tc: TC bitmap
6367  *
6368  * Configures given TC bitmap for VEB (switching) element
6369  **/
6370 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6371 {
6372         struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6373         struct i40e_pf *pf = veb->pf;
6374         int ret = 0;
6375         int i;
6376
6377         /* No TCs or already enabled TCs just return */
6378         if (!enabled_tc || veb->enabled_tc == enabled_tc)
6379                 return ret;
6380
6381         bw_data.tc_valid_bits = enabled_tc;
6382         /* bw_data.absolute_credits is not set (relative) */
6383
6384         /* Enable ETS TCs with equal BW Share for now */
6385         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6386                 if (enabled_tc & BIT(i))
6387                         bw_data.tc_bw_share_credits[i] = 1;
6388         }
6389
6390         ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6391                                                    &bw_data, NULL);
6392         if (ret) {
6393                 dev_info(&pf->pdev->dev,
6394                          "VEB bw config failed, err %s aq_err %s\n",
6395                          i40e_stat_str(&pf->hw, ret),
6396                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6397                 goto out;
6398         }
6399
6400         /* Update the BW information */
6401         ret = i40e_veb_get_bw_info(veb);
6402         if (ret) {
6403                 dev_info(&pf->pdev->dev,
6404                          "Failed getting veb bw config, err %s aq_err %s\n",
6405                          i40e_stat_str(&pf->hw, ret),
6406                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6407         }
6408
6409 out:
6410         return ret;
6411 }
6412
6413 #ifdef CONFIG_I40E_DCB
6414 /**
6415  * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6416  * @pf: PF struct
6417  *
6418  * Reconfigure VEB/VSIs on a given PF; it is assumed that
6419  * the caller would've quiesce all the VSIs before calling
6420  * this function
6421  **/
6422 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6423 {
6424         u8 tc_map = 0;
6425         int ret;
6426         u8 v;
6427
6428         /* Enable the TCs available on PF to all VEBs */
6429         tc_map = i40e_pf_get_tc_map(pf);
6430         if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6431                 return;
6432
6433         for (v = 0; v < I40E_MAX_VEB; v++) {
6434                 if (!pf->veb[v])
6435                         continue;
6436                 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6437                 if (ret) {
6438                         dev_info(&pf->pdev->dev,
6439                                  "Failed configuring TC for VEB seid=%d\n",
6440                                  pf->veb[v]->seid);
6441                         /* Will try to configure as many components */
6442                 }
6443         }
6444
6445         /* Update each VSI */
6446         for (v = 0; v < pf->num_alloc_vsi; v++) {
6447                 if (!pf->vsi[v])
6448                         continue;
6449
6450                 /* - Enable all TCs for the LAN VSI
6451                  * - For all others keep them at TC0 for now
6452                  */
6453                 if (v == pf->lan_vsi)
6454                         tc_map = i40e_pf_get_tc_map(pf);
6455                 else
6456                         tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6457
6458                 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6459                 if (ret) {
6460                         dev_info(&pf->pdev->dev,
6461                                  "Failed configuring TC for VSI seid=%d\n",
6462                                  pf->vsi[v]->seid);
6463                         /* Will try to configure as many components */
6464                 } else {
6465                         /* Re-configure VSI vectors based on updated TC map */
6466                         i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6467                         if (pf->vsi[v]->netdev)
6468                                 i40e_dcbnl_set_all(pf->vsi[v]);
6469                 }
6470         }
6471 }
6472
6473 /**
6474  * i40e_resume_port_tx - Resume port Tx
6475  * @pf: PF struct
6476  *
6477  * Resume a port's Tx and issue a PF reset in case of failure to
6478  * resume.
6479  **/
6480 static int i40e_resume_port_tx(struct i40e_pf *pf)
6481 {
6482         struct i40e_hw *hw = &pf->hw;
6483         int ret;
6484
6485         ret = i40e_aq_resume_port_tx(hw, NULL);
6486         if (ret) {
6487                 dev_info(&pf->pdev->dev,
6488                          "Resume Port Tx failed, err %s aq_err %s\n",
6489                           i40e_stat_str(&pf->hw, ret),
6490                           i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6491                 /* Schedule PF reset to recover */
6492                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6493                 i40e_service_event_schedule(pf);
6494         }
6495
6496         return ret;
6497 }
6498
6499 /**
6500  * i40e_suspend_port_tx - Suspend port Tx
6501  * @pf: PF struct
6502  *
6503  * Suspend a port's Tx and issue a PF reset in case of failure.
6504  **/
6505 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6506 {
6507         struct i40e_hw *hw = &pf->hw;
6508         int ret;
6509
6510         ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6511         if (ret) {
6512                 dev_info(&pf->pdev->dev,
6513                          "Suspend Port Tx failed, err %s aq_err %s\n",
6514                          i40e_stat_str(&pf->hw, ret),
6515                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6516                 /* Schedule PF reset to recover */
6517                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6518                 i40e_service_event_schedule(pf);
6519         }
6520
6521         return ret;
6522 }
6523
6524 /**
6525  * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6526  * @pf: PF being configured
6527  * @new_cfg: New DCBX configuration
6528  *
6529  * Program DCB settings into HW and reconfigure VEB/VSIs on
6530  * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6531  **/
6532 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6533                                   struct i40e_dcbx_config *new_cfg)
6534 {
6535         struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6536         int ret;
6537
6538         /* Check if need reconfiguration */
6539         if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6540                 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6541                 return 0;
6542         }
6543
6544         /* Config change disable all VSIs */
6545         i40e_pf_quiesce_all_vsi(pf);
6546
6547         /* Copy the new config to the current config */
6548         *old_cfg = *new_cfg;
6549         old_cfg->etsrec = old_cfg->etscfg;
6550         ret = i40e_set_dcb_config(&pf->hw);
6551         if (ret) {
6552                 dev_info(&pf->pdev->dev,
6553                          "Set DCB Config failed, err %s aq_err %s\n",
6554                          i40e_stat_str(&pf->hw, ret),
6555                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6556                 goto out;
6557         }
6558
6559         /* Changes in configuration update VEB/VSI */
6560         i40e_dcb_reconfigure(pf);
6561 out:
6562         /* In case of reset do not try to resume anything */
6563         if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6564                 /* Re-start the VSIs if disabled */
6565                 ret = i40e_resume_port_tx(pf);
6566                 /* In case of error no point in resuming VSIs */
6567                 if (ret)
6568                         goto err;
6569                 i40e_pf_unquiesce_all_vsi(pf);
6570         }
6571 err:
6572         return ret;
6573 }
6574
6575 /**
6576  * i40e_hw_dcb_config - Program new DCBX settings into HW
6577  * @pf: PF being configured
6578  * @new_cfg: New DCBX configuration
6579  *
6580  * Program DCB settings into HW and reconfigure VEB/VSIs on
6581  * given PF
6582  **/
6583 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6584 {
6585         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6586         u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6587         u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6588         struct i40e_dcbx_config *old_cfg;
6589         u8 mode[I40E_MAX_TRAFFIC_CLASS];
6590         struct i40e_rx_pb_config pb_cfg;
6591         struct i40e_hw *hw = &pf->hw;
6592         u8 num_ports = hw->num_ports;
6593         bool need_reconfig;
6594         int ret = -EINVAL;
6595         u8 lltc_map = 0;
6596         u8 tc_map = 0;
6597         u8 new_numtc;
6598         u8 i;
6599
6600         dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6601         /* Un-pack information to Program ETS HW via shared API
6602          * numtc, tcmap
6603          * LLTC map
6604          * ETS/NON-ETS arbiter mode
6605          * max exponent (credit refills)
6606          * Total number of ports
6607          * PFC priority bit-map
6608          * Priority Table
6609          * BW % per TC
6610          * Arbiter mode between UPs sharing same TC
6611          * TSA table (ETS or non-ETS)
6612          * EEE enabled or not
6613          * MFS TC table
6614          */
6615
6616         new_numtc = i40e_dcb_get_num_tc(new_cfg);
6617
6618         memset(&ets_data, 0, sizeof(ets_data));
6619         for (i = 0; i < new_numtc; i++) {
6620                 tc_map |= BIT(i);
6621                 switch (new_cfg->etscfg.tsatable[i]) {
6622                 case I40E_IEEE_TSA_ETS:
6623                         prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6624                         ets_data.tc_bw_share_credits[i] =
6625                                         new_cfg->etscfg.tcbwtable[i];
6626                         break;
6627                 case I40E_IEEE_TSA_STRICT:
6628                         prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6629                         lltc_map |= BIT(i);
6630                         ets_data.tc_bw_share_credits[i] =
6631                                         I40E_DCB_STRICT_PRIO_CREDITS;
6632                         break;
6633                 default:
6634                         /* Invalid TSA type */
6635                         need_reconfig = false;
6636                         goto out;
6637                 }
6638         }
6639
6640         old_cfg = &hw->local_dcbx_config;
6641         /* Check if need reconfiguration */
6642         need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6643
6644         /* If needed, enable/disable frame tagging, disable all VSIs
6645          * and suspend port tx
6646          */
6647         if (need_reconfig) {
6648                 /* Enable DCB tagging only when more than one TC */
6649                 if (new_numtc > 1)
6650                         pf->flags |= I40E_FLAG_DCB_ENABLED;
6651                 else
6652                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6653
6654                 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6655                 /* Reconfiguration needed quiesce all VSIs */
6656                 i40e_pf_quiesce_all_vsi(pf);
6657                 ret = i40e_suspend_port_tx(pf);
6658                 if (ret)
6659                         goto err;
6660         }
6661
6662         /* Configure Port ETS Tx Scheduler */
6663         ets_data.tc_valid_bits = tc_map;
6664         ets_data.tc_strict_priority_flags = lltc_map;
6665         ret = i40e_aq_config_switch_comp_ets
6666                 (hw, pf->mac_seid, &ets_data,
6667                  i40e_aqc_opc_modify_switching_comp_ets, NULL);
6668         if (ret) {
6669                 dev_info(&pf->pdev->dev,
6670                          "Modify Port ETS failed, err %s aq_err %s\n",
6671                          i40e_stat_str(&pf->hw, ret),
6672                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6673                 goto out;
6674         }
6675
6676         /* Configure Rx ETS HW */
6677         memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
6678         i40e_dcb_hw_set_num_tc(hw, new_numtc);
6679         i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
6680                                    I40E_DCB_ARB_MODE_STRICT_PRIORITY,
6681                                    I40E_DCB_DEFAULT_MAX_EXPONENT,
6682                                    lltc_map);
6683         i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
6684         i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
6685                                      prio_type);
6686         i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
6687                                new_cfg->etscfg.prioritytable);
6688         i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
6689
6690         /* Configure Rx Packet Buffers in HW */
6691         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6692                 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
6693                 mfs_tc[i] += I40E_PACKET_HDR_PAD;
6694         }
6695
6696         i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
6697                                          false, new_cfg->pfc.pfcenable,
6698                                          mfs_tc, &pb_cfg);
6699         i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
6700
6701         /* Update the local Rx Packet buffer config */
6702         pf->pb_cfg = pb_cfg;
6703
6704         /* Inform the FW about changes to DCB configuration */
6705         ret = i40e_aq_dcb_updated(&pf->hw, NULL);
6706         if (ret) {
6707                 dev_info(&pf->pdev->dev,
6708                          "DCB Updated failed, err %s aq_err %s\n",
6709                          i40e_stat_str(&pf->hw, ret),
6710                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6711                 goto out;
6712         }
6713
6714         /* Update the port DCBx configuration */
6715         *old_cfg = *new_cfg;
6716
6717         /* Changes in configuration update VEB/VSI */
6718         i40e_dcb_reconfigure(pf);
6719 out:
6720         /* Re-start the VSIs if disabled */
6721         if (need_reconfig) {
6722                 ret = i40e_resume_port_tx(pf);
6723
6724                 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
6725                 /* In case of error no point in resuming VSIs */
6726                 if (ret)
6727                         goto err;
6728
6729                 /* Wait for the PF's queues to be disabled */
6730                 ret = i40e_pf_wait_queues_disabled(pf);
6731                 if (ret) {
6732                         /* Schedule PF reset to recover */
6733                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6734                         i40e_service_event_schedule(pf);
6735                         goto err;
6736                 } else {
6737                         i40e_pf_unquiesce_all_vsi(pf);
6738                         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6739                         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
6740                 }
6741         /* registers are set, lets apply */
6742         if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
6743                 ret = i40e_hw_set_dcb_config(pf, new_cfg);
6744         }
6745
6746 err:
6747         return ret;
6748 }
6749
6750 /**
6751  * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
6752  * @pf: PF being queried
6753  *
6754  * Set default DCB configuration in case DCB is to be done in SW.
6755  **/
6756 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
6757 {
6758         struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
6759         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6760         struct i40e_hw *hw = &pf->hw;
6761         int err;
6762
6763         if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
6764                 /* Update the local cached instance with TC0 ETS */
6765                 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
6766                 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6767                 pf->tmp_cfg.etscfg.maxtcs = 0;
6768                 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6769                 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
6770                 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
6771                 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
6772                 /* FW needs one App to configure HW */
6773                 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
6774                 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
6775                 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
6776                 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
6777
6778                 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
6779         }
6780
6781         memset(&ets_data, 0, sizeof(ets_data));
6782         ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
6783         ets_data.tc_strict_priority_flags = 0; /* ETS */
6784         ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
6785
6786         /* Enable ETS on the Physical port */
6787         err = i40e_aq_config_switch_comp_ets
6788                 (hw, pf->mac_seid, &ets_data,
6789                  i40e_aqc_opc_enable_switching_comp_ets, NULL);
6790         if (err) {
6791                 dev_info(&pf->pdev->dev,
6792                          "Enable Port ETS failed, err %s aq_err %s\n",
6793                          i40e_stat_str(&pf->hw, err),
6794                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6795                 err = -ENOENT;
6796                 goto out;
6797         }
6798
6799         /* Update the local cached instance with TC0 ETS */
6800         dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6801         dcb_cfg->etscfg.cbs = 0;
6802         dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
6803         dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6804
6805 out:
6806         return err;
6807 }
6808
6809 /**
6810  * i40e_init_pf_dcb - Initialize DCB configuration
6811  * @pf: PF being configured
6812  *
6813  * Query the current DCB configuration and cache it
6814  * in the hardware structure
6815  **/
6816 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6817 {
6818         struct i40e_hw *hw = &pf->hw;
6819         int err;
6820
6821         /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6822          * Also do not enable DCBx if FW LLDP agent is disabled
6823          */
6824         if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
6825                 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
6826                 err = I40E_NOT_SUPPORTED;
6827                 goto out;
6828         }
6829         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
6830                 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
6831                 err = i40e_dcb_sw_default_config(pf);
6832                 if (err) {
6833                         dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
6834                         goto out;
6835                 }
6836                 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
6837                 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
6838                                DCB_CAP_DCBX_VER_IEEE;
6839                 /* at init capable but disabled */
6840                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6841                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6842                 goto out;
6843         }
6844         err = i40e_init_dcb(hw, true);
6845         if (!err) {
6846                 /* Device/Function is not DCBX capable */
6847                 if ((!hw->func_caps.dcb) ||
6848                     (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6849                         dev_info(&pf->pdev->dev,
6850                                  "DCBX offload is not supported or is disabled for this PF.\n");
6851                 } else {
6852                         /* When status is not DISABLED then DCBX in FW */
6853                         pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6854                                        DCB_CAP_DCBX_VER_IEEE;
6855
6856                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
6857                         /* Enable DCB tagging only when more than one TC
6858                          * or explicitly disable if only one TC
6859                          */
6860                         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6861                                 pf->flags |= I40E_FLAG_DCB_ENABLED;
6862                         else
6863                                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6864                         dev_dbg(&pf->pdev->dev,
6865                                 "DCBX offload is supported for this PF.\n");
6866                 }
6867         } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
6868                 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
6869                 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
6870         } else {
6871                 dev_info(&pf->pdev->dev,
6872                          "Query for DCB configuration failed, err %s aq_err %s\n",
6873                          i40e_stat_str(&pf->hw, err),
6874                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6875         }
6876
6877 out:
6878         return err;
6879 }
6880 #endif /* CONFIG_I40E_DCB */
6881
6882 /**
6883  * i40e_set_lldp_forwarding - set forwarding of lldp frames
6884  * @pf: PF being configured
6885  * @enable: if forwarding to OS shall be enabled
6886  *
6887  * Toggle forwarding of lldp frames behavior,
6888  * When passing DCB control from firmware to software
6889  * lldp frames must be forwarded to the software based
6890  * lldp agent.
6891  */
6892 void i40e_set_lldp_forwarding(struct i40e_pf *pf, bool enable)
6893 {
6894         if (pf->lan_vsi == I40E_NO_VSI)
6895                 return;
6896
6897         if (!pf->vsi[pf->lan_vsi])
6898                 return;
6899
6900         /* No need to check the outcome, commands may fail
6901          * if desired value is already set
6902          */
6903         i40e_aq_add_rem_control_packet_filter(&pf->hw, NULL, ETH_P_LLDP,
6904                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TX |
6905                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC,
6906                                               pf->vsi[pf->lan_vsi]->seid, 0,
6907                                               enable, NULL, NULL);
6908
6909         i40e_aq_add_rem_control_packet_filter(&pf->hw, NULL, ETH_P_LLDP,
6910                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_RX |
6911                                               I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC,
6912                                               pf->vsi[pf->lan_vsi]->seid, 0,
6913                                               enable, NULL, NULL);
6914 }
6915
6916 /**
6917  * i40e_print_link_message - print link up or down
6918  * @vsi: the VSI for which link needs a message
6919  * @isup: true of link is up, false otherwise
6920  */
6921 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6922 {
6923         enum i40e_aq_link_speed new_speed;
6924         struct i40e_pf *pf = vsi->back;
6925         char *speed = "Unknown";
6926         char *fc = "Unknown";
6927         char *fec = "";
6928         char *req_fec = "";
6929         char *an = "";
6930
6931         if (isup)
6932                 new_speed = pf->hw.phy.link_info.link_speed;
6933         else
6934                 new_speed = I40E_LINK_SPEED_UNKNOWN;
6935
6936         if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6937                 return;
6938         vsi->current_isup = isup;
6939         vsi->current_speed = new_speed;
6940         if (!isup) {
6941                 netdev_info(vsi->netdev, "NIC Link is Down\n");
6942                 return;
6943         }
6944
6945         /* Warn user if link speed on NPAR enabled partition is not at
6946          * least 10GB
6947          */
6948         if (pf->hw.func_caps.npar_enable &&
6949             (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6950              pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6951                 netdev_warn(vsi->netdev,
6952                             "The partition detected link speed that is less than 10Gbps\n");
6953
6954         switch (pf->hw.phy.link_info.link_speed) {
6955         case I40E_LINK_SPEED_40GB:
6956                 speed = "40 G";
6957                 break;
6958         case I40E_LINK_SPEED_20GB:
6959                 speed = "20 G";
6960                 break;
6961         case I40E_LINK_SPEED_25GB:
6962                 speed = "25 G";
6963                 break;
6964         case I40E_LINK_SPEED_10GB:
6965                 speed = "10 G";
6966                 break;
6967         case I40E_LINK_SPEED_5GB:
6968                 speed = "5 G";
6969                 break;
6970         case I40E_LINK_SPEED_2_5GB:
6971                 speed = "2.5 G";
6972                 break;
6973         case I40E_LINK_SPEED_1GB:
6974                 speed = "1000 M";
6975                 break;
6976         case I40E_LINK_SPEED_100MB:
6977                 speed = "100 M";
6978                 break;
6979         default:
6980                 break;
6981         }
6982
6983         switch (pf->hw.fc.current_mode) {
6984         case I40E_FC_FULL:
6985                 fc = "RX/TX";
6986                 break;
6987         case I40E_FC_TX_PAUSE:
6988                 fc = "TX";
6989                 break;
6990         case I40E_FC_RX_PAUSE:
6991                 fc = "RX";
6992                 break;
6993         default:
6994                 fc = "None";
6995                 break;
6996         }
6997
6998         if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6999                 req_fec = "None";
7000                 fec = "None";
7001                 an = "False";
7002
7003                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7004                         an = "True";
7005
7006                 if (pf->hw.phy.link_info.fec_info &
7007                     I40E_AQ_CONFIG_FEC_KR_ENA)
7008                         fec = "CL74 FC-FEC/BASE-R";
7009                 else if (pf->hw.phy.link_info.fec_info &
7010                          I40E_AQ_CONFIG_FEC_RS_ENA)
7011                         fec = "CL108 RS-FEC";
7012
7013                 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7014                  * both RS and FC are requested
7015                  */
7016                 if (vsi->back->hw.phy.link_info.req_fec_info &
7017                     (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7018                         if (vsi->back->hw.phy.link_info.req_fec_info &
7019                             I40E_AQ_REQUEST_FEC_RS)
7020                                 req_fec = "CL108 RS-FEC";
7021                         else
7022                                 req_fec = "CL74 FC-FEC/BASE-R";
7023                 }
7024                 netdev_info(vsi->netdev,
7025                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7026                             speed, req_fec, fec, an, fc);
7027         } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7028                 req_fec = "None";
7029                 fec = "None";
7030                 an = "False";
7031
7032                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7033                         an = "True";
7034
7035                 if (pf->hw.phy.link_info.fec_info &
7036                     I40E_AQ_CONFIG_FEC_KR_ENA)
7037                         fec = "CL74 FC-FEC/BASE-R";
7038
7039                 if (pf->hw.phy.link_info.req_fec_info &
7040                     I40E_AQ_REQUEST_FEC_KR)
7041                         req_fec = "CL74 FC-FEC/BASE-R";
7042
7043                 netdev_info(vsi->netdev,
7044                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7045                             speed, req_fec, fec, an, fc);
7046         } else {
7047                 netdev_info(vsi->netdev,
7048                             "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7049                             speed, fc);
7050         }
7051
7052 }
7053
7054 /**
7055  * i40e_up_complete - Finish the last steps of bringing up a connection
7056  * @vsi: the VSI being configured
7057  **/
7058 static int i40e_up_complete(struct i40e_vsi *vsi)
7059 {
7060         struct i40e_pf *pf = vsi->back;
7061         int err;
7062
7063         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7064                 i40e_vsi_configure_msix(vsi);
7065         else
7066                 i40e_configure_msi_and_legacy(vsi);
7067
7068         /* start rings */
7069         err = i40e_vsi_start_rings(vsi);
7070         if (err)
7071                 return err;
7072
7073         clear_bit(__I40E_VSI_DOWN, vsi->state);
7074         i40e_napi_enable_all(vsi);
7075         i40e_vsi_enable_irq(vsi);
7076
7077         if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7078             (vsi->netdev)) {
7079                 i40e_print_link_message(vsi, true);
7080                 netif_tx_start_all_queues(vsi->netdev);
7081                 netif_carrier_on(vsi->netdev);
7082         }
7083
7084         /* replay FDIR SB filters */
7085         if (vsi->type == I40E_VSI_FDIR) {
7086                 /* reset fd counters */
7087                 pf->fd_add_err = 0;
7088                 pf->fd_atr_cnt = 0;
7089                 i40e_fdir_filter_restore(vsi);
7090         }
7091
7092         /* On the next run of the service_task, notify any clients of the new
7093          * opened netdev
7094          */
7095         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7096         i40e_service_event_schedule(pf);
7097
7098         return 0;
7099 }
7100
7101 /**
7102  * i40e_vsi_reinit_locked - Reset the VSI
7103  * @vsi: the VSI being configured
7104  *
7105  * Rebuild the ring structs after some configuration
7106  * has changed, e.g. MTU size.
7107  **/
7108 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7109 {
7110         struct i40e_pf *pf = vsi->back;
7111
7112         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7113                 usleep_range(1000, 2000);
7114         i40e_down(vsi);
7115
7116         i40e_up(vsi);
7117         clear_bit(__I40E_CONFIG_BUSY, pf->state);
7118 }
7119
7120 /**
7121  * i40e_force_link_state - Force the link status
7122  * @pf: board private structure
7123  * @is_up: whether the link state should be forced up or down
7124  **/
7125 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7126 {
7127         struct i40e_aq_get_phy_abilities_resp abilities;
7128         struct i40e_aq_set_phy_config config = {0};
7129         bool non_zero_phy_type = is_up;
7130         struct i40e_hw *hw = &pf->hw;
7131         i40e_status err;
7132         u64 mask;
7133         u8 speed;
7134
7135         /* Card might've been put in an unstable state by other drivers
7136          * and applications, which causes incorrect speed values being
7137          * set on startup. In order to clear speed registers, we call
7138          * get_phy_capabilities twice, once to get initial state of
7139          * available speeds, and once to get current PHY config.
7140          */
7141         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7142                                            NULL);
7143         if (err) {
7144                 dev_err(&pf->pdev->dev,
7145                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7146                         i40e_stat_str(hw, err),
7147                         i40e_aq_str(hw, hw->aq.asq_last_status));
7148                 return err;
7149         }
7150         speed = abilities.link_speed;
7151
7152         /* Get the current phy config */
7153         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7154                                            NULL);
7155         if (err) {
7156                 dev_err(&pf->pdev->dev,
7157                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7158                         i40e_stat_str(hw, err),
7159                         i40e_aq_str(hw, hw->aq.asq_last_status));
7160                 return err;
7161         }
7162
7163         /* If link needs to go up, but was not forced to go down,
7164          * and its speed values are OK, no need for a flap
7165          * if non_zero_phy_type was set, still need to force up
7166          */
7167         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7168                 non_zero_phy_type = true;
7169         else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7170                 return I40E_SUCCESS;
7171
7172         /* To force link we need to set bits for all supported PHY types,
7173          * but there are now more than 32, so we need to split the bitmap
7174          * across two fields.
7175          */
7176         mask = I40E_PHY_TYPES_BITMASK;
7177         config.phy_type =
7178                 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7179         config.phy_type_ext =
7180                 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7181         /* Copy the old settings, except of phy_type */
7182         config.abilities = abilities.abilities;
7183         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7184                 if (is_up)
7185                         config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7186                 else
7187                         config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7188         }
7189         if (abilities.link_speed != 0)
7190                 config.link_speed = abilities.link_speed;
7191         else
7192                 config.link_speed = speed;
7193         config.eee_capability = abilities.eee_capability;
7194         config.eeer = abilities.eeer_val;
7195         config.low_power_ctrl = abilities.d3_lpan;
7196         config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7197                             I40E_AQ_PHY_FEC_CONFIG_MASK;
7198         err = i40e_aq_set_phy_config(hw, &config, NULL);
7199
7200         if (err) {
7201                 dev_err(&pf->pdev->dev,
7202                         "set phy config ret =  %s last_status =  %s\n",
7203                         i40e_stat_str(&pf->hw, err),
7204                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7205                 return err;
7206         }
7207
7208         /* Update the link info */
7209         err = i40e_update_link_info(hw);
7210         if (err) {
7211                 /* Wait a little bit (on 40G cards it sometimes takes a really
7212                  * long time for link to come back from the atomic reset)
7213                  * and try once more
7214                  */
7215                 msleep(1000);
7216                 i40e_update_link_info(hw);
7217         }
7218
7219         i40e_aq_set_link_restart_an(hw, is_up, NULL);
7220
7221         return I40E_SUCCESS;
7222 }
7223
7224 /**
7225  * i40e_up - Bring the connection back up after being down
7226  * @vsi: the VSI being configured
7227  **/
7228 int i40e_up(struct i40e_vsi *vsi)
7229 {
7230         int err;
7231
7232         if (vsi->type == I40E_VSI_MAIN &&
7233             (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7234              vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7235                 i40e_force_link_state(vsi->back, true);
7236
7237         err = i40e_vsi_configure(vsi);
7238         if (!err)
7239                 err = i40e_up_complete(vsi);
7240
7241         return err;
7242 }
7243
7244 /**
7245  * i40e_down - Shutdown the connection processing
7246  * @vsi: the VSI being stopped
7247  **/
7248 void i40e_down(struct i40e_vsi *vsi)
7249 {
7250         int i;
7251
7252         /* It is assumed that the caller of this function
7253          * sets the vsi->state __I40E_VSI_DOWN bit.
7254          */
7255         if (vsi->netdev) {
7256                 netif_carrier_off(vsi->netdev);
7257                 netif_tx_disable(vsi->netdev);
7258         }
7259         i40e_vsi_disable_irq(vsi);
7260         i40e_vsi_stop_rings(vsi);
7261         if (vsi->type == I40E_VSI_MAIN &&
7262            (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7263             vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7264                 i40e_force_link_state(vsi->back, false);
7265         i40e_napi_disable_all(vsi);
7266
7267         for (i = 0; i < vsi->num_queue_pairs; i++) {
7268                 i40e_clean_tx_ring(vsi->tx_rings[i]);
7269                 if (i40e_enabled_xdp_vsi(vsi)) {
7270                         /* Make sure that in-progress ndo_xdp_xmit and
7271                          * ndo_xsk_wakeup calls are completed.
7272                          */
7273                         synchronize_rcu();
7274                         i40e_clean_tx_ring(vsi->xdp_rings[i]);
7275                 }
7276                 i40e_clean_rx_ring(vsi->rx_rings[i]);
7277         }
7278
7279 }
7280
7281 /**
7282  * i40e_validate_mqprio_qopt- validate queue mapping info
7283  * @vsi: the VSI being configured
7284  * @mqprio_qopt: queue parametrs
7285  **/
7286 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7287                                      struct tc_mqprio_qopt_offload *mqprio_qopt)
7288 {
7289         u64 sum_max_rate = 0;
7290         u64 max_rate = 0;
7291         int i;
7292
7293         if (mqprio_qopt->qopt.offset[0] != 0 ||
7294             mqprio_qopt->qopt.num_tc < 1 ||
7295             mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7296                 return -EINVAL;
7297         for (i = 0; ; i++) {
7298                 if (!mqprio_qopt->qopt.count[i])
7299                         return -EINVAL;
7300                 if (mqprio_qopt->min_rate[i]) {
7301                         dev_err(&vsi->back->pdev->dev,
7302                                 "Invalid min tx rate (greater than 0) specified\n");
7303                         return -EINVAL;
7304                 }
7305                 max_rate = mqprio_qopt->max_rate[i];
7306                 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7307                 sum_max_rate += max_rate;
7308
7309                 if (i >= mqprio_qopt->qopt.num_tc - 1)
7310                         break;
7311                 if (mqprio_qopt->qopt.offset[i + 1] !=
7312                     (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7313                         return -EINVAL;
7314         }
7315         if (vsi->num_queue_pairs <
7316             (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7317                 return -EINVAL;
7318         }
7319         if (sum_max_rate > i40e_get_link_speed(vsi)) {
7320                 dev_err(&vsi->back->pdev->dev,
7321                         "Invalid max tx rate specified\n");
7322                 return -EINVAL;
7323         }
7324         return 0;
7325 }
7326
7327 /**
7328  * i40e_vsi_set_default_tc_config - set default values for tc configuration
7329  * @vsi: the VSI being configured
7330  **/
7331 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7332 {
7333         u16 qcount;
7334         int i;
7335
7336         /* Only TC0 is enabled */
7337         vsi->tc_config.numtc = 1;
7338         vsi->tc_config.enabled_tc = 1;
7339         qcount = min_t(int, vsi->alloc_queue_pairs,
7340                        i40e_pf_get_max_q_per_tc(vsi->back));
7341         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7342                 /* For the TC that is not enabled set the offset to to default
7343                  * queue and allocate one queue for the given TC.
7344                  */
7345                 vsi->tc_config.tc_info[i].qoffset = 0;
7346                 if (i == 0)
7347                         vsi->tc_config.tc_info[i].qcount = qcount;
7348                 else
7349                         vsi->tc_config.tc_info[i].qcount = 1;
7350                 vsi->tc_config.tc_info[i].netdev_tc = 0;
7351         }
7352 }
7353
7354 /**
7355  * i40e_del_macvlan_filter
7356  * @hw: pointer to the HW structure
7357  * @seid: seid of the channel VSI
7358  * @macaddr: the mac address to apply as a filter
7359  * @aq_err: store the admin Q error
7360  *
7361  * This function deletes a mac filter on the channel VSI which serves as the
7362  * macvlan. Returns 0 on success.
7363  **/
7364 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7365                                            const u8 *macaddr, int *aq_err)
7366 {
7367         struct i40e_aqc_remove_macvlan_element_data element;
7368         i40e_status status;
7369
7370         memset(&element, 0, sizeof(element));
7371         ether_addr_copy(element.mac_addr, macaddr);
7372         element.vlan_tag = 0;
7373         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7374         status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7375         *aq_err = hw->aq.asq_last_status;
7376
7377         return status;
7378 }
7379
7380 /**
7381  * i40e_add_macvlan_filter
7382  * @hw: pointer to the HW structure
7383  * @seid: seid of the channel VSI
7384  * @macaddr: the mac address to apply as a filter
7385  * @aq_err: store the admin Q error
7386  *
7387  * This function adds a mac filter on the channel VSI which serves as the
7388  * macvlan. Returns 0 on success.
7389  **/
7390 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7391                                            const u8 *macaddr, int *aq_err)
7392 {
7393         struct i40e_aqc_add_macvlan_element_data element;
7394         i40e_status status;
7395         u16 cmd_flags = 0;
7396
7397         ether_addr_copy(element.mac_addr, macaddr);
7398         element.vlan_tag = 0;
7399         element.queue_number = 0;
7400         element.match_method = I40E_AQC_MM_ERR_NO_RES;
7401         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7402         element.flags = cpu_to_le16(cmd_flags);
7403         status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7404         *aq_err = hw->aq.asq_last_status;
7405
7406         return status;
7407 }
7408
7409 /**
7410  * i40e_reset_ch_rings - Reset the queue contexts in a channel
7411  * @vsi: the VSI we want to access
7412  * @ch: the channel we want to access
7413  */
7414 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7415 {
7416         struct i40e_ring *tx_ring, *rx_ring;
7417         u16 pf_q;
7418         int i;
7419
7420         for (i = 0; i < ch->num_queue_pairs; i++) {
7421                 pf_q = ch->base_queue + i;
7422                 tx_ring = vsi->tx_rings[pf_q];
7423                 tx_ring->ch = NULL;
7424                 rx_ring = vsi->rx_rings[pf_q];
7425                 rx_ring->ch = NULL;
7426         }
7427 }
7428
7429 /**
7430  * i40e_free_macvlan_channels
7431  * @vsi: the VSI we want to access
7432  *
7433  * This function frees the Qs of the channel VSI from
7434  * the stack and also deletes the channel VSIs which
7435  * serve as macvlans.
7436  */
7437 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7438 {
7439         struct i40e_channel *ch, *ch_tmp;
7440         int ret;
7441
7442         if (list_empty(&vsi->macvlan_list))
7443                 return;
7444
7445         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7446                 struct i40e_vsi *parent_vsi;
7447
7448                 if (i40e_is_channel_macvlan(ch)) {
7449                         i40e_reset_ch_rings(vsi, ch);
7450                         clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7451                         netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7452                         netdev_set_sb_channel(ch->fwd->netdev, 0);
7453                         kfree(ch->fwd);
7454                         ch->fwd = NULL;
7455                 }
7456
7457                 list_del(&ch->list);
7458                 parent_vsi = ch->parent_vsi;
7459                 if (!parent_vsi || !ch->initialized) {
7460                         kfree(ch);
7461                         continue;
7462                 }
7463
7464                 /* remove the VSI */
7465                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7466                                              NULL);
7467                 if (ret)
7468                         dev_err(&vsi->back->pdev->dev,
7469                                 "unable to remove channel (%d) for parent VSI(%d)\n",
7470                                 ch->seid, parent_vsi->seid);
7471                 kfree(ch);
7472         }
7473         vsi->macvlan_cnt = 0;
7474 }
7475
7476 /**
7477  * i40e_fwd_ring_up - bring the macvlan device up
7478  * @vsi: the VSI we want to access
7479  * @vdev: macvlan netdevice
7480  * @fwd: the private fwd structure
7481  */
7482 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7483                             struct i40e_fwd_adapter *fwd)
7484 {
7485         int ret = 0, num_tc = 1,  i, aq_err;
7486         struct i40e_channel *ch, *ch_tmp;
7487         struct i40e_pf *pf = vsi->back;
7488         struct i40e_hw *hw = &pf->hw;
7489
7490         if (list_empty(&vsi->macvlan_list))
7491                 return -EINVAL;
7492
7493         /* Go through the list and find an available channel */
7494         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7495                 if (!i40e_is_channel_macvlan(ch)) {
7496                         ch->fwd = fwd;
7497                         /* record configuration for macvlan interface in vdev */
7498                         for (i = 0; i < num_tc; i++)
7499                                 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7500                                                              i,
7501                                                              ch->num_queue_pairs,
7502                                                              ch->base_queue);
7503                         for (i = 0; i < ch->num_queue_pairs; i++) {
7504                                 struct i40e_ring *tx_ring, *rx_ring;
7505                                 u16 pf_q;
7506
7507                                 pf_q = ch->base_queue + i;
7508
7509                                 /* Get to TX ring ptr */
7510                                 tx_ring = vsi->tx_rings[pf_q];
7511                                 tx_ring->ch = ch;
7512
7513                                 /* Get the RX ring ptr */
7514                                 rx_ring = vsi->rx_rings[pf_q];
7515                                 rx_ring->ch = ch;
7516                         }
7517                         break;
7518                 }
7519         }
7520
7521         /* Guarantee all rings are updated before we update the
7522          * MAC address filter.
7523          */
7524         wmb();
7525
7526         /* Add a mac filter */
7527         ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7528         if (ret) {
7529                 /* if we cannot add the MAC rule then disable the offload */
7530                 macvlan_release_l2fw_offload(vdev);
7531                 for (i = 0; i < ch->num_queue_pairs; i++) {
7532                         struct i40e_ring *rx_ring;
7533                         u16 pf_q;
7534
7535                         pf_q = ch->base_queue + i;
7536                         rx_ring = vsi->rx_rings[pf_q];
7537                         rx_ring->netdev = NULL;
7538                 }
7539                 dev_info(&pf->pdev->dev,
7540                          "Error adding mac filter on macvlan err %s, aq_err %s\n",
7541                           i40e_stat_str(hw, ret),
7542                           i40e_aq_str(hw, aq_err));
7543                 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7544         }
7545
7546         return ret;
7547 }
7548
7549 /**
7550  * i40e_setup_macvlans - create the channels which will be macvlans
7551  * @vsi: the VSI we want to access
7552  * @macvlan_cnt: no. of macvlans to be setup
7553  * @qcnt: no. of Qs per macvlan
7554  * @vdev: macvlan netdevice
7555  */
7556 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7557                                struct net_device *vdev)
7558 {
7559         struct i40e_pf *pf = vsi->back;
7560         struct i40e_hw *hw = &pf->hw;
7561         struct i40e_vsi_context ctxt;
7562         u16 sections, qmap, num_qps;
7563         struct i40e_channel *ch;
7564         int i, pow, ret = 0;
7565         u8 offset = 0;
7566
7567         if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7568                 return -EINVAL;
7569
7570         num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7571
7572         /* find the next higher power-of-2 of num queue pairs */
7573         pow = fls(roundup_pow_of_two(num_qps) - 1);
7574
7575         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7576                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7577
7578         /* Setup context bits for the main VSI */
7579         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7580         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7581         memset(&ctxt, 0, sizeof(ctxt));
7582         ctxt.seid = vsi->seid;
7583         ctxt.pf_num = vsi->back->hw.pf_id;
7584         ctxt.vf_num = 0;
7585         ctxt.uplink_seid = vsi->uplink_seid;
7586         ctxt.info = vsi->info;
7587         ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7588         ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7589         ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7590         ctxt.info.valid_sections |= cpu_to_le16(sections);
7591
7592         /* Reconfigure RSS for main VSI with new max queue count */
7593         vsi->rss_size = max_t(u16, num_qps, qcnt);
7594         ret = i40e_vsi_config_rss(vsi);
7595         if (ret) {
7596                 dev_info(&pf->pdev->dev,
7597                          "Failed to reconfig RSS for num_queues (%u)\n",
7598                          vsi->rss_size);
7599                 return ret;
7600         }
7601         vsi->reconfig_rss = true;
7602         dev_dbg(&vsi->back->pdev->dev,
7603                 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7604         vsi->next_base_queue = num_qps;
7605         vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7606
7607         /* Update the VSI after updating the VSI queue-mapping
7608          * information
7609          */
7610         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7611         if (ret) {
7612                 dev_info(&pf->pdev->dev,
7613                          "Update vsi tc config failed, err %s aq_err %s\n",
7614                          i40e_stat_str(hw, ret),
7615                          i40e_aq_str(hw, hw->aq.asq_last_status));
7616                 return ret;
7617         }
7618         /* update the local VSI info with updated queue map */
7619         i40e_vsi_update_queue_map(vsi, &ctxt);
7620         vsi->info.valid_sections = 0;
7621
7622         /* Create channels for macvlans */
7623         INIT_LIST_HEAD(&vsi->macvlan_list);
7624         for (i = 0; i < macvlan_cnt; i++) {
7625                 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7626                 if (!ch) {
7627                         ret = -ENOMEM;
7628                         goto err_free;
7629                 }
7630                 INIT_LIST_HEAD(&ch->list);
7631                 ch->num_queue_pairs = qcnt;
7632                 if (!i40e_setup_channel(pf, vsi, ch)) {
7633                         ret = -EINVAL;
7634                         kfree(ch);
7635                         goto err_free;
7636                 }
7637                 ch->parent_vsi = vsi;
7638                 vsi->cnt_q_avail -= ch->num_queue_pairs;
7639                 vsi->macvlan_cnt++;
7640                 list_add_tail(&ch->list, &vsi->macvlan_list);
7641         }
7642
7643         return ret;
7644
7645 err_free:
7646         dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7647         i40e_free_macvlan_channels(vsi);
7648
7649         return ret;
7650 }
7651
7652 /**
7653  * i40e_fwd_add - configure macvlans
7654  * @netdev: net device to configure
7655  * @vdev: macvlan netdevice
7656  **/
7657 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7658 {
7659         struct i40e_netdev_priv *np = netdev_priv(netdev);
7660         u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7661         struct i40e_vsi *vsi = np->vsi;
7662         struct i40e_pf *pf = vsi->back;
7663         struct i40e_fwd_adapter *fwd;
7664         int avail_macvlan, ret;
7665
7666         if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7667                 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7668                 return ERR_PTR(-EINVAL);
7669         }
7670         if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7671                 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7672                 return ERR_PTR(-EINVAL);
7673         }
7674         if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7675                 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7676                 return ERR_PTR(-EINVAL);
7677         }
7678
7679         /* The macvlan device has to be a single Q device so that the
7680          * tc_to_txq field can be reused to pick the tx queue.
7681          */
7682         if (netif_is_multiqueue(vdev))
7683                 return ERR_PTR(-ERANGE);
7684
7685         if (!vsi->macvlan_cnt) {
7686                 /* reserve bit 0 for the pf device */
7687                 set_bit(0, vsi->fwd_bitmask);
7688
7689                 /* Try to reserve as many queues as possible for macvlans. First
7690                  * reserve 3/4th of max vectors, then half, then quarter and
7691                  * calculate Qs per macvlan as you go
7692                  */
7693                 vectors = pf->num_lan_msix;
7694                 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7695                         /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7696                         q_per_macvlan = 4;
7697                         macvlan_cnt = (vectors - 32) / 4;
7698                 } else if (vectors <= 64 && vectors > 32) {
7699                         /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7700                         q_per_macvlan = 2;
7701                         macvlan_cnt = (vectors - 16) / 2;
7702                 } else if (vectors <= 32 && vectors > 16) {
7703                         /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7704                         q_per_macvlan = 1;
7705                         macvlan_cnt = vectors - 16;
7706                 } else if (vectors <= 16 && vectors > 8) {
7707                         /* allocate 1 Q per macvlan and 8 Qs to the PF */
7708                         q_per_macvlan = 1;
7709                         macvlan_cnt = vectors - 8;
7710                 } else {
7711                         /* allocate 1 Q per macvlan and 1 Q to the PF */
7712                         q_per_macvlan = 1;
7713                         macvlan_cnt = vectors - 1;
7714                 }
7715
7716                 if (macvlan_cnt == 0)
7717                         return ERR_PTR(-EBUSY);
7718
7719                 /* Quiesce VSI queues */
7720                 i40e_quiesce_vsi(vsi);
7721
7722                 /* sets up the macvlans but does not "enable" them */
7723                 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7724                                           vdev);
7725                 if (ret)
7726                         return ERR_PTR(ret);
7727
7728                 /* Unquiesce VSI */
7729                 i40e_unquiesce_vsi(vsi);
7730         }
7731         avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7732                                             vsi->macvlan_cnt);
7733         if (avail_macvlan >= I40E_MAX_MACVLANS)
7734                 return ERR_PTR(-EBUSY);
7735
7736         /* create the fwd struct */
7737         fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7738         if (!fwd)
7739                 return ERR_PTR(-ENOMEM);
7740
7741         set_bit(avail_macvlan, vsi->fwd_bitmask);
7742         fwd->bit_no = avail_macvlan;
7743         netdev_set_sb_channel(vdev, avail_macvlan);
7744         fwd->netdev = vdev;
7745
7746         if (!netif_running(netdev))
7747                 return fwd;
7748
7749         /* Set fwd ring up */
7750         ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7751         if (ret) {
7752                 /* unbind the queues and drop the subordinate channel config */
7753                 netdev_unbind_sb_channel(netdev, vdev);
7754                 netdev_set_sb_channel(vdev, 0);
7755
7756                 kfree(fwd);
7757                 return ERR_PTR(-EINVAL);
7758         }
7759
7760         return fwd;
7761 }
7762
7763 /**
7764  * i40e_del_all_macvlans - Delete all the mac filters on the channels
7765  * @vsi: the VSI we want to access
7766  */
7767 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7768 {
7769         struct i40e_channel *ch, *ch_tmp;
7770         struct i40e_pf *pf = vsi->back;
7771         struct i40e_hw *hw = &pf->hw;
7772         int aq_err, ret = 0;
7773
7774         if (list_empty(&vsi->macvlan_list))
7775                 return;
7776
7777         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7778                 if (i40e_is_channel_macvlan(ch)) {
7779                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7780                                                       i40e_channel_mac(ch),
7781                                                       &aq_err);
7782                         if (!ret) {
7783                                 /* Reset queue contexts */
7784                                 i40e_reset_ch_rings(vsi, ch);
7785                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7786                                 netdev_unbind_sb_channel(vsi->netdev,
7787                                                          ch->fwd->netdev);
7788                                 netdev_set_sb_channel(ch->fwd->netdev, 0);
7789                                 kfree(ch->fwd);
7790                                 ch->fwd = NULL;
7791                         }
7792                 }
7793         }
7794 }
7795
7796 /**
7797  * i40e_fwd_del - delete macvlan interfaces
7798  * @netdev: net device to configure
7799  * @vdev: macvlan netdevice
7800  */
7801 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7802 {
7803         struct i40e_netdev_priv *np = netdev_priv(netdev);
7804         struct i40e_fwd_adapter *fwd = vdev;
7805         struct i40e_channel *ch, *ch_tmp;
7806         struct i40e_vsi *vsi = np->vsi;
7807         struct i40e_pf *pf = vsi->back;
7808         struct i40e_hw *hw = &pf->hw;
7809         int aq_err, ret = 0;
7810
7811         /* Find the channel associated with the macvlan and del mac filter */
7812         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7813                 if (i40e_is_channel_macvlan(ch) &&
7814                     ether_addr_equal(i40e_channel_mac(ch),
7815                                      fwd->netdev->dev_addr)) {
7816                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7817                                                       i40e_channel_mac(ch),
7818                                                       &aq_err);
7819                         if (!ret) {
7820                                 /* Reset queue contexts */
7821                                 i40e_reset_ch_rings(vsi, ch);
7822                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7823                                 netdev_unbind_sb_channel(netdev, fwd->netdev);
7824                                 netdev_set_sb_channel(fwd->netdev, 0);
7825                                 kfree(ch->fwd);
7826                                 ch->fwd = NULL;
7827                         } else {
7828                                 dev_info(&pf->pdev->dev,
7829                                          "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7830                                           i40e_stat_str(hw, ret),
7831                                           i40e_aq_str(hw, aq_err));
7832                         }
7833                         break;
7834                 }
7835         }
7836 }
7837
7838 /**
7839  * i40e_setup_tc - configure multiple traffic classes
7840  * @netdev: net device to configure
7841  * @type_data: tc offload data
7842  **/
7843 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7844 {
7845         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7846         struct i40e_netdev_priv *np = netdev_priv(netdev);
7847         struct i40e_vsi *vsi = np->vsi;
7848         struct i40e_pf *pf = vsi->back;
7849         u8 enabled_tc = 0, num_tc, hw;
7850         bool need_reset = false;
7851         int old_queue_pairs;
7852         int ret = -EINVAL;
7853         u16 mode;
7854         int i;
7855
7856         old_queue_pairs = vsi->num_queue_pairs;
7857         num_tc = mqprio_qopt->qopt.num_tc;
7858         hw = mqprio_qopt->qopt.hw;
7859         mode = mqprio_qopt->mode;
7860         if (!hw) {
7861                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7862                 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
7863                 goto config_tc;
7864         }
7865
7866         /* Check if MFP enabled */
7867         if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7868                 netdev_info(netdev,
7869                             "Configuring TC not supported in MFP mode\n");
7870                 return ret;
7871         }
7872         switch (mode) {
7873         case TC_MQPRIO_MODE_DCB:
7874                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7875
7876                 /* Check if DCB enabled to continue */
7877                 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7878                         netdev_info(netdev,
7879                                     "DCB is not enabled for adapter\n");
7880                         return ret;
7881                 }
7882
7883                 /* Check whether tc count is within enabled limit */
7884                 if (num_tc > i40e_pf_get_num_tc(pf)) {
7885                         netdev_info(netdev,
7886                                     "TC count greater than enabled on link for adapter\n");
7887                         return ret;
7888                 }
7889                 break;
7890         case TC_MQPRIO_MODE_CHANNEL:
7891                 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
7892                         netdev_info(netdev,
7893                                     "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
7894                         return ret;
7895                 }
7896                 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7897                         return ret;
7898                 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
7899                 if (ret)
7900                         return ret;
7901                 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
7902                        sizeof(*mqprio_qopt));
7903                 pf->flags |= I40E_FLAG_TC_MQPRIO;
7904                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7905                 break;
7906         default:
7907                 return -EINVAL;
7908         }
7909
7910 config_tc:
7911         /* Generate TC map for number of tc requested */
7912         for (i = 0; i < num_tc; i++)
7913                 enabled_tc |= BIT(i);
7914
7915         /* Requesting same TC configuration as already enabled */
7916         if (enabled_tc == vsi->tc_config.enabled_tc &&
7917             mode != TC_MQPRIO_MODE_CHANNEL)
7918                 return 0;
7919
7920         /* Quiesce VSI queues */
7921         i40e_quiesce_vsi(vsi);
7922
7923         if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
7924                 i40e_remove_queue_channels(vsi);
7925
7926         /* Configure VSI for enabled TCs */
7927         ret = i40e_vsi_config_tc(vsi, enabled_tc);
7928         if (ret) {
7929                 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
7930                             vsi->seid);
7931                 need_reset = true;
7932                 goto exit;
7933         } else {
7934                 dev_info(&vsi->back->pdev->dev,
7935                          "Setup channel (id:%u) utilizing num_queues %d\n",
7936                          vsi->seid, vsi->tc_config.tc_info[0].qcount);
7937         }
7938
7939         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
7940                 if (vsi->mqprio_qopt.max_rate[0]) {
7941                         u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
7942
7943                         do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
7944                         ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
7945                         if (!ret) {
7946                                 u64 credits = max_tx_rate;
7947
7948                                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
7949                                 dev_dbg(&vsi->back->pdev->dev,
7950                                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
7951                                         max_tx_rate,
7952                                         credits,
7953                                         vsi->seid);
7954                         } else {
7955                                 need_reset = true;
7956                                 goto exit;
7957                         }
7958                 }
7959                 ret = i40e_configure_queue_channels(vsi);
7960                 if (ret) {
7961                         vsi->num_queue_pairs = old_queue_pairs;
7962                         netdev_info(netdev,
7963                                     "Failed configuring queue channels\n");
7964                         need_reset = true;
7965                         goto exit;
7966                 }
7967         }
7968
7969 exit:
7970         /* Reset the configuration data to defaults, only TC0 is enabled */
7971         if (need_reset) {
7972                 i40e_vsi_set_default_tc_config(vsi);
7973                 need_reset = false;
7974         }
7975
7976         /* Unquiesce VSI */
7977         i40e_unquiesce_vsi(vsi);
7978         return ret;
7979 }
7980
7981 /**
7982  * i40e_set_cld_element - sets cloud filter element data
7983  * @filter: cloud filter rule
7984  * @cld: ptr to cloud filter element data
7985  *
7986  * This is helper function to copy data into cloud filter element
7987  **/
7988 static inline void
7989 i40e_set_cld_element(struct i40e_cloud_filter *filter,
7990                      struct i40e_aqc_cloud_filters_element_data *cld)
7991 {
7992         u32 ipa;
7993         int i;
7994
7995         memset(cld, 0, sizeof(*cld));
7996         ether_addr_copy(cld->outer_mac, filter->dst_mac);
7997         ether_addr_copy(cld->inner_mac, filter->src_mac);
7998
7999         if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8000                 return;
8001
8002         if (filter->n_proto == ETH_P_IPV6) {
8003 #define IPV6_MAX_INDEX  (ARRAY_SIZE(filter->dst_ipv6) - 1)
8004                 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8005                         ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8006
8007                         *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8008                 }
8009         } else {
8010                 ipa = be32_to_cpu(filter->dst_ipv4);
8011
8012                 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8013         }
8014
8015         cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8016
8017         /* tenant_id is not supported by FW now, once the support is enabled
8018          * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8019          */
8020         if (filter->tenant_id)
8021                 return;
8022 }
8023
8024 /**
8025  * i40e_add_del_cloud_filter - Add/del cloud filter
8026  * @vsi: pointer to VSI
8027  * @filter: cloud filter rule
8028  * @add: if true, add, if false, delete
8029  *
8030  * Add or delete a cloud filter for a specific flow spec.
8031  * Returns 0 if the filter were successfully added.
8032  **/
8033 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8034                               struct i40e_cloud_filter *filter, bool add)
8035 {
8036         struct i40e_aqc_cloud_filters_element_data cld_filter;
8037         struct i40e_pf *pf = vsi->back;
8038         int ret;
8039         static const u16 flag_table[128] = {
8040                 [I40E_CLOUD_FILTER_FLAGS_OMAC]  =
8041                         I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8042                 [I40E_CLOUD_FILTER_FLAGS_IMAC]  =
8043                         I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8044                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN]  =
8045                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8046                 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8047                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8048                 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8049                         I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8050                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8051                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8052                 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8053                         I40E_AQC_ADD_CLOUD_FILTER_IIP,
8054         };
8055
8056         if (filter->flags >= ARRAY_SIZE(flag_table))
8057                 return I40E_ERR_CONFIG;
8058
8059         memset(&cld_filter, 0, sizeof(cld_filter));
8060
8061         /* copy element needed to add cloud filter from filter */
8062         i40e_set_cld_element(filter, &cld_filter);
8063
8064         if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8065                 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8066                                              I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8067
8068         if (filter->n_proto == ETH_P_IPV6)
8069                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8070                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8071         else
8072                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8073                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8074
8075         if (add)
8076                 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8077                                                 &cld_filter, 1);
8078         else
8079                 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8080                                                 &cld_filter, 1);
8081         if (ret)
8082                 dev_dbg(&pf->pdev->dev,
8083                         "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8084                         add ? "add" : "delete", filter->dst_port, ret,
8085                         pf->hw.aq.asq_last_status);
8086         else
8087                 dev_info(&pf->pdev->dev,
8088                          "%s cloud filter for VSI: %d\n",
8089                          add ? "Added" : "Deleted", filter->seid);
8090         return ret;
8091 }
8092
8093 /**
8094  * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8095  * @vsi: pointer to VSI
8096  * @filter: cloud filter rule
8097  * @add: if true, add, if false, delete
8098  *
8099  * Add or delete a cloud filter for a specific flow spec using big buffer.
8100  * Returns 0 if the filter were successfully added.
8101  **/
8102 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8103                                       struct i40e_cloud_filter *filter,
8104                                       bool add)
8105 {
8106         struct i40e_aqc_cloud_filters_element_bb cld_filter;
8107         struct i40e_pf *pf = vsi->back;
8108         int ret;
8109
8110         /* Both (src/dst) valid mac_addr are not supported */
8111         if ((is_valid_ether_addr(filter->dst_mac) &&
8112              is_valid_ether_addr(filter->src_mac)) ||
8113             (is_multicast_ether_addr(filter->dst_mac) &&
8114              is_multicast_ether_addr(filter->src_mac)))
8115                 return -EOPNOTSUPP;
8116
8117         /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8118          * ports are not supported via big buffer now.
8119          */
8120         if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8121                 return -EOPNOTSUPP;
8122
8123         /* adding filter using src_port/src_ip is not supported at this stage */
8124         if (filter->src_port ||
8125             (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8126             !ipv6_addr_any(&filter->ip.v6.src_ip6))
8127                 return -EOPNOTSUPP;
8128
8129         memset(&cld_filter, 0, sizeof(cld_filter));
8130
8131         /* copy element needed to add cloud filter from filter */
8132         i40e_set_cld_element(filter, &cld_filter.element);
8133
8134         if (is_valid_ether_addr(filter->dst_mac) ||
8135             is_valid_ether_addr(filter->src_mac) ||
8136             is_multicast_ether_addr(filter->dst_mac) ||
8137             is_multicast_ether_addr(filter->src_mac)) {
8138                 /* MAC + IP : unsupported mode */
8139                 if (filter->dst_ipv4)
8140                         return -EOPNOTSUPP;
8141
8142                 /* since we validated that L4 port must be valid before
8143                  * we get here, start with respective "flags" value
8144                  * and update if vlan is present or not
8145                  */
8146                 cld_filter.element.flags =
8147                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8148
8149                 if (filter->vlan_id) {
8150                         cld_filter.element.flags =
8151                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8152                 }
8153
8154         } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8155                    !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8156                 cld_filter.element.flags =
8157                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8158                 if (filter->n_proto == ETH_P_IPV6)
8159                         cld_filter.element.flags |=
8160                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8161                 else
8162                         cld_filter.element.flags |=
8163                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8164         } else {
8165                 dev_err(&pf->pdev->dev,
8166                         "either mac or ip has to be valid for cloud filter\n");
8167                 return -EINVAL;
8168         }
8169
8170         /* Now copy L4 port in Byte 6..7 in general fields */
8171         cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8172                                                 be16_to_cpu(filter->dst_port);
8173
8174         if (add) {
8175                 /* Validate current device switch mode, change if necessary */
8176                 ret = i40e_validate_and_set_switch_mode(vsi);
8177                 if (ret) {
8178                         dev_err(&pf->pdev->dev,
8179                                 "failed to set switch mode, ret %d\n",
8180                                 ret);
8181                         return ret;
8182                 }
8183
8184                 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8185                                                    &cld_filter, 1);
8186         } else {
8187                 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8188                                                    &cld_filter, 1);
8189         }
8190
8191         if (ret)
8192                 dev_dbg(&pf->pdev->dev,
8193                         "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8194                         add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8195         else
8196                 dev_info(&pf->pdev->dev,
8197                          "%s cloud filter for VSI: %d, L4 port: %d\n",
8198                          add ? "add" : "delete", filter->seid,
8199                          ntohs(filter->dst_port));
8200         return ret;
8201 }
8202
8203 /**
8204  * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8205  * @vsi: Pointer to VSI
8206  * @f: Pointer to struct flow_cls_offload
8207  * @filter: Pointer to cloud filter structure
8208  *
8209  **/
8210 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8211                                  struct flow_cls_offload *f,
8212                                  struct i40e_cloud_filter *filter)
8213 {
8214         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8215         struct flow_dissector *dissector = rule->match.dissector;
8216         u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8217         struct i40e_pf *pf = vsi->back;
8218         u8 field_flags = 0;
8219
8220         if (dissector->used_keys &
8221             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
8222               BIT(FLOW_DISSECTOR_KEY_BASIC) |
8223               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8224               BIT(FLOW_DISSECTOR_KEY_VLAN) |
8225               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8226               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8227               BIT(FLOW_DISSECTOR_KEY_PORTS) |
8228               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8229                 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
8230                         dissector->used_keys);
8231                 return -EOPNOTSUPP;
8232         }
8233
8234         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8235                 struct flow_match_enc_keyid match;
8236
8237                 flow_rule_match_enc_keyid(rule, &match);
8238                 if (match.mask->keyid != 0)
8239                         field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8240
8241                 filter->tenant_id = be32_to_cpu(match.key->keyid);
8242         }
8243
8244         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8245                 struct flow_match_basic match;
8246
8247                 flow_rule_match_basic(rule, &match);
8248                 n_proto_key = ntohs(match.key->n_proto);
8249                 n_proto_mask = ntohs(match.mask->n_proto);
8250
8251                 if (n_proto_key == ETH_P_ALL) {
8252                         n_proto_key = 0;
8253                         n_proto_mask = 0;
8254                 }
8255                 filter->n_proto = n_proto_key & n_proto_mask;
8256                 filter->ip_proto = match.key->ip_proto;
8257         }
8258
8259         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8260                 struct flow_match_eth_addrs match;
8261
8262                 flow_rule_match_eth_addrs(rule, &match);
8263
8264                 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8265                 if (!is_zero_ether_addr(match.mask->dst)) {
8266                         if (is_broadcast_ether_addr(match.mask->dst)) {
8267                                 field_flags |= I40E_CLOUD_FIELD_OMAC;
8268                         } else {
8269                                 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8270                                         match.mask->dst);
8271                                 return I40E_ERR_CONFIG;
8272                         }
8273                 }
8274
8275                 if (!is_zero_ether_addr(match.mask->src)) {
8276                         if (is_broadcast_ether_addr(match.mask->src)) {
8277                                 field_flags |= I40E_CLOUD_FIELD_IMAC;
8278                         } else {
8279                                 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8280                                         match.mask->src);
8281                                 return I40E_ERR_CONFIG;
8282                         }
8283                 }
8284                 ether_addr_copy(filter->dst_mac, match.key->dst);
8285                 ether_addr_copy(filter->src_mac, match.key->src);
8286         }
8287
8288         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8289                 struct flow_match_vlan match;
8290
8291                 flow_rule_match_vlan(rule, &match);
8292                 if (match.mask->vlan_id) {
8293                         if (match.mask->vlan_id == VLAN_VID_MASK) {
8294                                 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8295
8296                         } else {
8297                                 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8298                                         match.mask->vlan_id);
8299                                 return I40E_ERR_CONFIG;
8300                         }
8301                 }
8302
8303                 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8304         }
8305
8306         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8307                 struct flow_match_control match;
8308
8309                 flow_rule_match_control(rule, &match);
8310                 addr_type = match.key->addr_type;
8311         }
8312
8313         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8314                 struct flow_match_ipv4_addrs match;
8315
8316                 flow_rule_match_ipv4_addrs(rule, &match);
8317                 if (match.mask->dst) {
8318                         if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8319                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8320                         } else {
8321                                 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8322                                         &match.mask->dst);
8323                                 return I40E_ERR_CONFIG;
8324                         }
8325                 }
8326
8327                 if (match.mask->src) {
8328                         if (match.mask->src == cpu_to_be32(0xffffffff)) {
8329                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8330                         } else {
8331                                 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8332                                         &match.mask->src);
8333                                 return I40E_ERR_CONFIG;
8334                         }
8335                 }
8336
8337                 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8338                         dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8339                         return I40E_ERR_CONFIG;
8340                 }
8341                 filter->dst_ipv4 = match.key->dst;
8342                 filter->src_ipv4 = match.key->src;
8343         }
8344
8345         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8346                 struct flow_match_ipv6_addrs match;
8347
8348                 flow_rule_match_ipv6_addrs(rule, &match);
8349
8350                 /* src and dest IPV6 address should not be LOOPBACK
8351                  * (0:0:0:0:0:0:0:1), which can be represented as ::1
8352                  */
8353                 if (ipv6_addr_loopback(&match.key->dst) ||
8354                     ipv6_addr_loopback(&match.key->src)) {
8355                         dev_err(&pf->pdev->dev,
8356                                 "Bad ipv6, addr is LOOPBACK\n");
8357                         return I40E_ERR_CONFIG;
8358                 }
8359                 if (!ipv6_addr_any(&match.mask->dst) ||
8360                     !ipv6_addr_any(&match.mask->src))
8361                         field_flags |= I40E_CLOUD_FIELD_IIP;
8362
8363                 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8364                        sizeof(filter->src_ipv6));
8365                 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8366                        sizeof(filter->dst_ipv6));
8367         }
8368
8369         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8370                 struct flow_match_ports match;
8371
8372                 flow_rule_match_ports(rule, &match);
8373                 if (match.mask->src) {
8374                         if (match.mask->src == cpu_to_be16(0xffff)) {
8375                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8376                         } else {
8377                                 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8378                                         be16_to_cpu(match.mask->src));
8379                                 return I40E_ERR_CONFIG;
8380                         }
8381                 }
8382
8383                 if (match.mask->dst) {
8384                         if (match.mask->dst == cpu_to_be16(0xffff)) {
8385                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8386                         } else {
8387                                 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8388                                         be16_to_cpu(match.mask->dst));
8389                                 return I40E_ERR_CONFIG;
8390                         }
8391                 }
8392
8393                 filter->dst_port = match.key->dst;
8394                 filter->src_port = match.key->src;
8395
8396                 switch (filter->ip_proto) {
8397                 case IPPROTO_TCP:
8398                 case IPPROTO_UDP:
8399                         break;
8400                 default:
8401                         dev_err(&pf->pdev->dev,
8402                                 "Only UDP and TCP transport are supported\n");
8403                         return -EINVAL;
8404                 }
8405         }
8406         filter->flags = field_flags;
8407         return 0;
8408 }
8409
8410 /**
8411  * i40e_handle_tclass: Forward to a traffic class on the device
8412  * @vsi: Pointer to VSI
8413  * @tc: traffic class index on the device
8414  * @filter: Pointer to cloud filter structure
8415  *
8416  **/
8417 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8418                               struct i40e_cloud_filter *filter)
8419 {
8420         struct i40e_channel *ch, *ch_tmp;
8421
8422         /* direct to a traffic class on the same device */
8423         if (tc == 0) {
8424                 filter->seid = vsi->seid;
8425                 return 0;
8426         } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8427                 if (!filter->dst_port) {
8428                         dev_err(&vsi->back->pdev->dev,
8429                                 "Specify destination port to direct to traffic class that is not default\n");
8430                         return -EINVAL;
8431                 }
8432                 if (list_empty(&vsi->ch_list))
8433                         return -EINVAL;
8434                 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8435                                          list) {
8436                         if (ch->seid == vsi->tc_seid_map[tc])
8437                                 filter->seid = ch->seid;
8438                 }
8439                 return 0;
8440         }
8441         dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8442         return -EINVAL;
8443 }
8444
8445 /**
8446  * i40e_configure_clsflower - Configure tc flower filters
8447  * @vsi: Pointer to VSI
8448  * @cls_flower: Pointer to struct flow_cls_offload
8449  *
8450  **/
8451 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8452                                     struct flow_cls_offload *cls_flower)
8453 {
8454         int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8455         struct i40e_cloud_filter *filter = NULL;
8456         struct i40e_pf *pf = vsi->back;
8457         int err = 0;
8458
8459         if (tc < 0) {
8460                 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8461                 return -EOPNOTSUPP;
8462         }
8463
8464         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8465             test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8466                 return -EBUSY;
8467
8468         if (pf->fdir_pf_active_filters ||
8469             (!hlist_empty(&pf->fdir_filter_list))) {
8470                 dev_err(&vsi->back->pdev->dev,
8471                         "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8472                 return -EINVAL;
8473         }
8474
8475         if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8476                 dev_err(&vsi->back->pdev->dev,
8477                         "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8478                 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8479                 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8480         }
8481
8482         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8483         if (!filter)
8484                 return -ENOMEM;
8485
8486         filter->cookie = cls_flower->cookie;
8487
8488         err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8489         if (err < 0)
8490                 goto err;
8491
8492         err = i40e_handle_tclass(vsi, tc, filter);
8493         if (err < 0)
8494                 goto err;
8495
8496         /* Add cloud filter */
8497         if (filter->dst_port)
8498                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8499         else
8500                 err = i40e_add_del_cloud_filter(vsi, filter, true);
8501
8502         if (err) {
8503                 dev_err(&pf->pdev->dev,
8504                         "Failed to add cloud filter, err %s\n",
8505                         i40e_stat_str(&pf->hw, err));
8506                 goto err;
8507         }
8508
8509         /* add filter to the ordered list */
8510         INIT_HLIST_NODE(&filter->cloud_node);
8511
8512         hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8513
8514         pf->num_cloud_filters++;
8515
8516         return err;
8517 err:
8518         kfree(filter);
8519         return err;
8520 }
8521
8522 /**
8523  * i40e_find_cloud_filter - Find the could filter in the list
8524  * @vsi: Pointer to VSI
8525  * @cookie: filter specific cookie
8526  *
8527  **/
8528 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8529                                                         unsigned long *cookie)
8530 {
8531         struct i40e_cloud_filter *filter = NULL;
8532         struct hlist_node *node2;
8533
8534         hlist_for_each_entry_safe(filter, node2,
8535                                   &vsi->back->cloud_filter_list, cloud_node)
8536                 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8537                         return filter;
8538         return NULL;
8539 }
8540
8541 /**
8542  * i40e_delete_clsflower - Remove tc flower filters
8543  * @vsi: Pointer to VSI
8544  * @cls_flower: Pointer to struct flow_cls_offload
8545  *
8546  **/
8547 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8548                                  struct flow_cls_offload *cls_flower)
8549 {
8550         struct i40e_cloud_filter *filter = NULL;
8551         struct i40e_pf *pf = vsi->back;
8552         int err = 0;
8553
8554         filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8555
8556         if (!filter)
8557                 return -EINVAL;
8558
8559         hash_del(&filter->cloud_node);
8560
8561         if (filter->dst_port)
8562                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8563         else
8564                 err = i40e_add_del_cloud_filter(vsi, filter, false);
8565
8566         kfree(filter);
8567         if (err) {
8568                 dev_err(&pf->pdev->dev,
8569                         "Failed to delete cloud filter, err %s\n",
8570                         i40e_stat_str(&pf->hw, err));
8571                 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8572         }
8573
8574         pf->num_cloud_filters--;
8575         if (!pf->num_cloud_filters)
8576                 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8577                     !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8578                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8579                         pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8580                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8581                 }
8582         return 0;
8583 }
8584
8585 /**
8586  * i40e_setup_tc_cls_flower - flower classifier offloads
8587  * @np: net device to configure
8588  * @cls_flower: offload data
8589  **/
8590 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8591                                     struct flow_cls_offload *cls_flower)
8592 {
8593         struct i40e_vsi *vsi = np->vsi;
8594
8595         switch (cls_flower->command) {
8596         case FLOW_CLS_REPLACE:
8597                 return i40e_configure_clsflower(vsi, cls_flower);
8598         case FLOW_CLS_DESTROY:
8599                 return i40e_delete_clsflower(vsi, cls_flower);
8600         case FLOW_CLS_STATS:
8601                 return -EOPNOTSUPP;
8602         default:
8603                 return -EOPNOTSUPP;
8604         }
8605 }
8606
8607 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8608                                   void *cb_priv)
8609 {
8610         struct i40e_netdev_priv *np = cb_priv;
8611
8612         if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8613                 return -EOPNOTSUPP;
8614
8615         switch (type) {
8616         case TC_SETUP_CLSFLOWER:
8617                 return i40e_setup_tc_cls_flower(np, type_data);
8618
8619         default:
8620                 return -EOPNOTSUPP;
8621         }
8622 }
8623
8624 static LIST_HEAD(i40e_block_cb_list);
8625
8626 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8627                            void *type_data)
8628 {
8629         struct i40e_netdev_priv *np = netdev_priv(netdev);
8630
8631         switch (type) {
8632         case TC_SETUP_QDISC_MQPRIO:
8633                 return i40e_setup_tc(netdev, type_data);
8634         case TC_SETUP_BLOCK:
8635                 return flow_block_cb_setup_simple(type_data,
8636                                                   &i40e_block_cb_list,
8637                                                   i40e_setup_tc_block_cb,
8638                                                   np, np, true);
8639         default:
8640                 return -EOPNOTSUPP;
8641         }
8642 }
8643
8644 /**
8645  * i40e_open - Called when a network interface is made active
8646  * @netdev: network interface device structure
8647  *
8648  * The open entry point is called when a network interface is made
8649  * active by the system (IFF_UP).  At this point all resources needed
8650  * for transmit and receive operations are allocated, the interrupt
8651  * handler is registered with the OS, the netdev watchdog subtask is
8652  * enabled, and the stack is notified that the interface is ready.
8653  *
8654  * Returns 0 on success, negative value on failure
8655  **/
8656 int i40e_open(struct net_device *netdev)
8657 {
8658         struct i40e_netdev_priv *np = netdev_priv(netdev);
8659         struct i40e_vsi *vsi = np->vsi;
8660         struct i40e_pf *pf = vsi->back;
8661         int err;
8662
8663         /* disallow open during test or if eeprom is broken */
8664         if (test_bit(__I40E_TESTING, pf->state) ||
8665             test_bit(__I40E_BAD_EEPROM, pf->state))
8666                 return -EBUSY;
8667
8668         netif_carrier_off(netdev);
8669
8670         if (i40e_force_link_state(pf, true))
8671                 return -EAGAIN;
8672
8673         err = i40e_vsi_open(vsi);
8674         if (err)
8675                 return err;
8676
8677         /* configure global TSO hardware offload settings */
8678         wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8679                                                        TCP_FLAG_FIN) >> 16);
8680         wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8681                                                        TCP_FLAG_FIN |
8682                                                        TCP_FLAG_CWR) >> 16);
8683         wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8684         udp_tunnel_get_rx_info(netdev);
8685
8686         return 0;
8687 }
8688
8689 /**
8690  * i40e_vsi_open -
8691  * @vsi: the VSI to open
8692  *
8693  * Finish initialization of the VSI.
8694  *
8695  * Returns 0 on success, negative value on failure
8696  *
8697  * Note: expects to be called while under rtnl_lock()
8698  **/
8699 int i40e_vsi_open(struct i40e_vsi *vsi)
8700 {
8701         struct i40e_pf *pf = vsi->back;
8702         char int_name[I40E_INT_NAME_STR_LEN];
8703         int err;
8704
8705         /* allocate descriptors */
8706         err = i40e_vsi_setup_tx_resources(vsi);
8707         if (err)
8708                 goto err_setup_tx;
8709         err = i40e_vsi_setup_rx_resources(vsi);
8710         if (err)
8711                 goto err_setup_rx;
8712
8713         err = i40e_vsi_configure(vsi);
8714         if (err)
8715                 goto err_setup_rx;
8716
8717         if (vsi->netdev) {
8718                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8719                          dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8720                 err = i40e_vsi_request_irq(vsi, int_name);
8721                 if (err)
8722                         goto err_setup_rx;
8723
8724                 /* Notify the stack of the actual queue counts. */
8725                 err = netif_set_real_num_tx_queues(vsi->netdev,
8726                                                    vsi->num_queue_pairs);
8727                 if (err)
8728                         goto err_set_queues;
8729
8730                 err = netif_set_real_num_rx_queues(vsi->netdev,
8731                                                    vsi->num_queue_pairs);
8732                 if (err)
8733                         goto err_set_queues;
8734
8735         } else if (vsi->type == I40E_VSI_FDIR) {
8736                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8737                          dev_driver_string(&pf->pdev->dev),
8738                          dev_name(&pf->pdev->dev));
8739                 err = i40e_vsi_request_irq(vsi, int_name);
8740
8741         } else {
8742                 err = -EINVAL;
8743                 goto err_setup_rx;
8744         }
8745
8746         err = i40e_up_complete(vsi);
8747         if (err)
8748                 goto err_up_complete;
8749
8750         return 0;
8751
8752 err_up_complete:
8753         i40e_down(vsi);
8754 err_set_queues:
8755         i40e_vsi_free_irq(vsi);
8756 err_setup_rx:
8757         i40e_vsi_free_rx_resources(vsi);
8758 err_setup_tx:
8759         i40e_vsi_free_tx_resources(vsi);
8760         if (vsi == pf->vsi[pf->lan_vsi])
8761                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8762
8763         return err;
8764 }
8765
8766 /**
8767  * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8768  * @pf: Pointer to PF
8769  *
8770  * This function destroys the hlist where all the Flow Director
8771  * filters were saved.
8772  **/
8773 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8774 {
8775         struct i40e_fdir_filter *filter;
8776         struct i40e_flex_pit *pit_entry, *tmp;
8777         struct hlist_node *node2;
8778
8779         hlist_for_each_entry_safe(filter, node2,
8780                                   &pf->fdir_filter_list, fdir_node) {
8781                 hlist_del(&filter->fdir_node);
8782                 kfree(filter);
8783         }
8784
8785         list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8786                 list_del(&pit_entry->list);
8787                 kfree(pit_entry);
8788         }
8789         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8790
8791         list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8792                 list_del(&pit_entry->list);
8793                 kfree(pit_entry);
8794         }
8795         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8796
8797         pf->fdir_pf_active_filters = 0;
8798         i40e_reset_fdir_filter_cnt(pf);
8799
8800         /* Reprogram the default input set for TCP/IPv4 */
8801         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8802                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8803                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8804
8805         /* Reprogram the default input set for TCP/IPv6 */
8806         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
8807                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8808                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8809
8810         /* Reprogram the default input set for UDP/IPv4 */
8811         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8812                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8813                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8814
8815         /* Reprogram the default input set for UDP/IPv6 */
8816         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
8817                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8818                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8819
8820         /* Reprogram the default input set for SCTP/IPv4 */
8821         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8822                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8823                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8824
8825         /* Reprogram the default input set for SCTP/IPv6 */
8826         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
8827                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8828                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8829
8830         /* Reprogram the default input set for Other/IPv4 */
8831         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
8832                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8833
8834         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
8835                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8836
8837         /* Reprogram the default input set for Other/IPv6 */
8838         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
8839                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8840
8841         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
8842                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8843 }
8844
8845 /**
8846  * i40e_cloud_filter_exit - Cleans up the cloud filters
8847  * @pf: Pointer to PF
8848  *
8849  * This function destroys the hlist where all the cloud filters
8850  * were saved.
8851  **/
8852 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
8853 {
8854         struct i40e_cloud_filter *cfilter;
8855         struct hlist_node *node;
8856
8857         hlist_for_each_entry_safe(cfilter, node,
8858                                   &pf->cloud_filter_list, cloud_node) {
8859                 hlist_del(&cfilter->cloud_node);
8860                 kfree(cfilter);
8861         }
8862         pf->num_cloud_filters = 0;
8863
8864         if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8865             !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8866                 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8867                 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8868                 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8869         }
8870 }
8871
8872 /**
8873  * i40e_close - Disables a network interface
8874  * @netdev: network interface device structure
8875  *
8876  * The close entry point is called when an interface is de-activated
8877  * by the OS.  The hardware is still under the driver's control, but
8878  * this netdev interface is disabled.
8879  *
8880  * Returns 0, this is not allowed to fail
8881  **/
8882 int i40e_close(struct net_device *netdev)
8883 {
8884         struct i40e_netdev_priv *np = netdev_priv(netdev);
8885         struct i40e_vsi *vsi = np->vsi;
8886
8887         i40e_vsi_close(vsi);
8888
8889         return 0;
8890 }
8891
8892 /**
8893  * i40e_do_reset - Start a PF or Core Reset sequence
8894  * @pf: board private structure
8895  * @reset_flags: which reset is requested
8896  * @lock_acquired: indicates whether or not the lock has been acquired
8897  * before this function was called.
8898  *
8899  * The essential difference in resets is that the PF Reset
8900  * doesn't clear the packet buffers, doesn't reset the PE
8901  * firmware, and doesn't bother the other PFs on the chip.
8902  **/
8903 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
8904 {
8905         u32 val;
8906
8907         /* do the biggest reset indicated */
8908         if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
8909
8910                 /* Request a Global Reset
8911                  *
8912                  * This will start the chip's countdown to the actual full
8913                  * chip reset event, and a warning interrupt to be sent
8914                  * to all PFs, including the requestor.  Our handler
8915                  * for the warning interrupt will deal with the shutdown
8916                  * and recovery of the switch setup.
8917                  */
8918                 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
8919                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8920                 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
8921                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8922
8923         } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
8924
8925                 /* Request a Core Reset
8926                  *
8927                  * Same as Global Reset, except does *not* include the MAC/PHY
8928                  */
8929                 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
8930                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8931                 val |= I40E_GLGEN_RTRIG_CORER_MASK;
8932                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8933                 i40e_flush(&pf->hw);
8934
8935         } else if (reset_flags & I40E_PF_RESET_FLAG) {
8936
8937                 /* Request a PF Reset
8938                  *
8939                  * Resets only the PF-specific registers
8940                  *
8941                  * This goes directly to the tear-down and rebuild of
8942                  * the switch, since we need to do all the recovery as
8943                  * for the Core Reset.
8944                  */
8945                 dev_dbg(&pf->pdev->dev, "PFR requested\n");
8946                 i40e_handle_reset_warning(pf, lock_acquired);
8947
8948         } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
8949                 /* Request a PF Reset
8950                  *
8951                  * Resets PF and reinitializes PFs VSI.
8952                  */
8953                 i40e_prep_for_reset(pf);
8954                 i40e_reset_and_rebuild(pf, true, lock_acquired);
8955                 dev_info(&pf->pdev->dev,
8956                          pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
8957                          "FW LLDP is disabled\n" :
8958                          "FW LLDP is enabled\n");
8959
8960         } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
8961                 int v;
8962
8963                 /* Find the VSI(s) that requested a re-init */
8964                 dev_info(&pf->pdev->dev,
8965                          "VSI reinit requested\n");
8966                 for (v = 0; v < pf->num_alloc_vsi; v++) {
8967                         struct i40e_vsi *vsi = pf->vsi[v];
8968
8969                         if (vsi != NULL &&
8970                             test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
8971                                                vsi->state))
8972                                 i40e_vsi_reinit_locked(pf->vsi[v]);
8973                 }
8974         } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
8975                 int v;
8976
8977                 /* Find the VSI(s) that needs to be brought down */
8978                 dev_info(&pf->pdev->dev, "VSI down requested\n");
8979                 for (v = 0; v < pf->num_alloc_vsi; v++) {
8980                         struct i40e_vsi *vsi = pf->vsi[v];
8981
8982                         if (vsi != NULL &&
8983                             test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
8984                                                vsi->state)) {
8985                                 set_bit(__I40E_VSI_DOWN, vsi->state);
8986                                 i40e_down(vsi);
8987                         }
8988                 }
8989         } else {
8990                 dev_info(&pf->pdev->dev,
8991                          "bad reset request 0x%08x\n", reset_flags);
8992         }
8993 }
8994
8995 #ifdef CONFIG_I40E_DCB
8996 /**
8997  * i40e_dcb_need_reconfig - Check if DCB needs reconfig
8998  * @pf: board private structure
8999  * @old_cfg: current DCB config
9000  * @new_cfg: new DCB config
9001  **/
9002 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9003                             struct i40e_dcbx_config *old_cfg,
9004                             struct i40e_dcbx_config *new_cfg)
9005 {
9006         bool need_reconfig = false;
9007
9008         /* Check if ETS configuration has changed */
9009         if (memcmp(&new_cfg->etscfg,
9010                    &old_cfg->etscfg,
9011                    sizeof(new_cfg->etscfg))) {
9012                 /* If Priority Table has changed reconfig is needed */
9013                 if (memcmp(&new_cfg->etscfg.prioritytable,
9014                            &old_cfg->etscfg.prioritytable,
9015                            sizeof(new_cfg->etscfg.prioritytable))) {
9016                         need_reconfig = true;
9017                         dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9018                 }
9019
9020                 if (memcmp(&new_cfg->etscfg.tcbwtable,
9021                            &old_cfg->etscfg.tcbwtable,
9022                            sizeof(new_cfg->etscfg.tcbwtable)))
9023                         dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9024
9025                 if (memcmp(&new_cfg->etscfg.tsatable,
9026                            &old_cfg->etscfg.tsatable,
9027                            sizeof(new_cfg->etscfg.tsatable)))
9028                         dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9029         }
9030
9031         /* Check if PFC configuration has changed */
9032         if (memcmp(&new_cfg->pfc,
9033                    &old_cfg->pfc,
9034                    sizeof(new_cfg->pfc))) {
9035                 need_reconfig = true;
9036                 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9037         }
9038
9039         /* Check if APP Table has changed */
9040         if (memcmp(&new_cfg->app,
9041                    &old_cfg->app,
9042                    sizeof(new_cfg->app))) {
9043                 need_reconfig = true;
9044                 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9045         }
9046
9047         dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9048         return need_reconfig;
9049 }
9050
9051 /**
9052  * i40e_handle_lldp_event - Handle LLDP Change MIB event
9053  * @pf: board private structure
9054  * @e: event info posted on ARQ
9055  **/
9056 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9057                                   struct i40e_arq_event_info *e)
9058 {
9059         struct i40e_aqc_lldp_get_mib *mib =
9060                 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9061         struct i40e_hw *hw = &pf->hw;
9062         struct i40e_dcbx_config tmp_dcbx_cfg;
9063         bool need_reconfig = false;
9064         int ret = 0;
9065         u8 type;
9066
9067         /* X710-T*L 2.5G and 5G speeds don't support DCB */
9068         if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9069             (hw->phy.link_info.link_speed &
9070              ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9071              !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9072                 /* let firmware decide if the DCB should be disabled */
9073                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9074
9075         /* Not DCB capable or capability disabled */
9076         if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9077                 return ret;
9078
9079         /* Ignore if event is not for Nearest Bridge */
9080         type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9081                 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9082         dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9083         if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9084                 return ret;
9085
9086         /* Check MIB Type and return if event for Remote MIB update */
9087         type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9088         dev_dbg(&pf->pdev->dev,
9089                 "LLDP event mib type %s\n", type ? "remote" : "local");
9090         if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9091                 /* Update the remote cached instance and return */
9092                 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9093                                 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9094                                 &hw->remote_dcbx_config);
9095                 goto exit;
9096         }
9097
9098         /* Store the old configuration */
9099         tmp_dcbx_cfg = hw->local_dcbx_config;
9100
9101         /* Reset the old DCBx configuration data */
9102         memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9103         /* Get updated DCBX data from firmware */
9104         ret = i40e_get_dcb_config(&pf->hw);
9105         if (ret) {
9106                 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9107                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9108                     (hw->phy.link_info.link_speed &
9109                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9110                         dev_warn(&pf->pdev->dev,
9111                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9112                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9113                 } else {
9114                         dev_info(&pf->pdev->dev,
9115                                  "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
9116                                  i40e_stat_str(&pf->hw, ret),
9117                                  i40e_aq_str(&pf->hw,
9118                                              pf->hw.aq.asq_last_status));
9119                 }
9120                 goto exit;
9121         }
9122
9123         /* No change detected in DCBX configs */
9124         if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9125                     sizeof(tmp_dcbx_cfg))) {
9126                 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9127                 goto exit;
9128         }
9129
9130         need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9131                                                &hw->local_dcbx_config);
9132
9133         i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9134
9135         if (!need_reconfig)
9136                 goto exit;
9137
9138         /* Enable DCB tagging only when more than one TC */
9139         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9140                 pf->flags |= I40E_FLAG_DCB_ENABLED;
9141         else
9142                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9143
9144         set_bit(__I40E_PORT_SUSPENDED, pf->state);
9145         /* Reconfiguration needed quiesce all VSIs */
9146         i40e_pf_quiesce_all_vsi(pf);
9147
9148         /* Changes in configuration update VEB/VSI */
9149         i40e_dcb_reconfigure(pf);
9150
9151         ret = i40e_resume_port_tx(pf);
9152
9153         clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9154         /* In case of error no point in resuming VSIs */
9155         if (ret)
9156                 goto exit;
9157
9158         /* Wait for the PF's queues to be disabled */
9159         ret = i40e_pf_wait_queues_disabled(pf);
9160         if (ret) {
9161                 /* Schedule PF reset to recover */
9162                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9163                 i40e_service_event_schedule(pf);
9164         } else {
9165                 i40e_pf_unquiesce_all_vsi(pf);
9166                 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9167                 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9168         }
9169
9170 exit:
9171         return ret;
9172 }
9173 #endif /* CONFIG_I40E_DCB */
9174
9175 /**
9176  * i40e_do_reset_safe - Protected reset path for userland calls.
9177  * @pf: board private structure
9178  * @reset_flags: which reset is requested
9179  *
9180  **/
9181 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9182 {
9183         rtnl_lock();
9184         i40e_do_reset(pf, reset_flags, true);
9185         rtnl_unlock();
9186 }
9187
9188 /**
9189  * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9190  * @pf: board private structure
9191  * @e: event info posted on ARQ
9192  *
9193  * Handler for LAN Queue Overflow Event generated by the firmware for PF
9194  * and VF queues
9195  **/
9196 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9197                                            struct i40e_arq_event_info *e)
9198 {
9199         struct i40e_aqc_lan_overflow *data =
9200                 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9201         u32 queue = le32_to_cpu(data->prtdcb_rupto);
9202         u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9203         struct i40e_hw *hw = &pf->hw;
9204         struct i40e_vf *vf;
9205         u16 vf_id;
9206
9207         dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9208                 queue, qtx_ctl);
9209
9210         /* Queue belongs to VF, find the VF and issue VF reset */
9211         if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9212             >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9213                 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9214                          >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9215                 vf_id -= hw->func_caps.vf_base_id;
9216                 vf = &pf->vf[vf_id];
9217                 i40e_vc_notify_vf_reset(vf);
9218                 /* Allow VF to process pending reset notification */
9219                 msleep(20);
9220                 i40e_reset_vf(vf, false);
9221         }
9222 }
9223
9224 /**
9225  * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9226  * @pf: board private structure
9227  **/
9228 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9229 {
9230         u32 val, fcnt_prog;
9231
9232         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9233         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9234         return fcnt_prog;
9235 }
9236
9237 /**
9238  * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9239  * @pf: board private structure
9240  **/
9241 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9242 {
9243         u32 val, fcnt_prog;
9244
9245         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9246         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9247                     ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9248                       I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9249         return fcnt_prog;
9250 }
9251
9252 /**
9253  * i40e_get_global_fd_count - Get total FD filters programmed on device
9254  * @pf: board private structure
9255  **/
9256 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9257 {
9258         u32 val, fcnt_prog;
9259
9260         val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9261         fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9262                     ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9263                      I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9264         return fcnt_prog;
9265 }
9266
9267 /**
9268  * i40e_reenable_fdir_sb - Restore FDir SB capability
9269  * @pf: board private structure
9270  **/
9271 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9272 {
9273         if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9274                 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9275                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9276                         dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9277 }
9278
9279 /**
9280  * i40e_reenable_fdir_atr - Restore FDir ATR capability
9281  * @pf: board private structure
9282  **/
9283 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9284 {
9285         if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9286                 /* ATR uses the same filtering logic as SB rules. It only
9287                  * functions properly if the input set mask is at the default
9288                  * settings. It is safe to restore the default input set
9289                  * because there are no active TCPv4 filter rules.
9290                  */
9291                 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9292                                         I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9293                                         I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9294
9295                 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9296                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9297                         dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9298         }
9299 }
9300
9301 /**
9302  * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9303  * @pf: board private structure
9304  * @filter: FDir filter to remove
9305  */
9306 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9307                                        struct i40e_fdir_filter *filter)
9308 {
9309         /* Update counters */
9310         pf->fdir_pf_active_filters--;
9311         pf->fd_inv = 0;
9312
9313         switch (filter->flow_type) {
9314         case TCP_V4_FLOW:
9315                 pf->fd_tcp4_filter_cnt--;
9316                 break;
9317         case UDP_V4_FLOW:
9318                 pf->fd_udp4_filter_cnt--;
9319                 break;
9320         case SCTP_V4_FLOW:
9321                 pf->fd_sctp4_filter_cnt--;
9322                 break;
9323         case TCP_V6_FLOW:
9324                 pf->fd_tcp6_filter_cnt--;
9325                 break;
9326         case UDP_V6_FLOW:
9327                 pf->fd_udp6_filter_cnt--;
9328                 break;
9329         case SCTP_V6_FLOW:
9330                 pf->fd_udp6_filter_cnt--;
9331                 break;
9332         case IP_USER_FLOW:
9333                 switch (filter->ipl4_proto) {
9334                 case IPPROTO_TCP:
9335                         pf->fd_tcp4_filter_cnt--;
9336                         break;
9337                 case IPPROTO_UDP:
9338                         pf->fd_udp4_filter_cnt--;
9339                         break;
9340                 case IPPROTO_SCTP:
9341                         pf->fd_sctp4_filter_cnt--;
9342                         break;
9343                 case IPPROTO_IP:
9344                         pf->fd_ip4_filter_cnt--;
9345                         break;
9346                 }
9347                 break;
9348         case IPV6_USER_FLOW:
9349                 switch (filter->ipl4_proto) {
9350                 case IPPROTO_TCP:
9351                         pf->fd_tcp6_filter_cnt--;
9352                         break;
9353                 case IPPROTO_UDP:
9354                         pf->fd_udp6_filter_cnt--;
9355                         break;
9356                 case IPPROTO_SCTP:
9357                         pf->fd_sctp6_filter_cnt--;
9358                         break;
9359                 case IPPROTO_IP:
9360                         pf->fd_ip6_filter_cnt--;
9361                         break;
9362                 }
9363                 break;
9364         }
9365
9366         /* Remove the filter from the list and free memory */
9367         hlist_del(&filter->fdir_node);
9368         kfree(filter);
9369 }
9370
9371 /**
9372  * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9373  * @pf: board private structure
9374  **/
9375 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9376 {
9377         struct i40e_fdir_filter *filter;
9378         u32 fcnt_prog, fcnt_avail;
9379         struct hlist_node *node;
9380
9381         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9382                 return;
9383
9384         /* Check if we have enough room to re-enable FDir SB capability. */
9385         fcnt_prog = i40e_get_global_fd_count(pf);
9386         fcnt_avail = pf->fdir_pf_filter_count;
9387         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9388             (pf->fd_add_err == 0) ||
9389             (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9390                 i40e_reenable_fdir_sb(pf);
9391
9392         /* We should wait for even more space before re-enabling ATR.
9393          * Additionally, we cannot enable ATR as long as we still have TCP SB
9394          * rules active.
9395          */
9396         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9397             pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9398                 i40e_reenable_fdir_atr(pf);
9399
9400         /* if hw had a problem adding a filter, delete it */
9401         if (pf->fd_inv > 0) {
9402                 hlist_for_each_entry_safe(filter, node,
9403                                           &pf->fdir_filter_list, fdir_node)
9404                         if (filter->fd_id == pf->fd_inv)
9405                                 i40e_delete_invalid_filter(pf, filter);
9406         }
9407 }
9408
9409 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9410 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9411 /**
9412  * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9413  * @pf: board private structure
9414  **/
9415 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9416 {
9417         unsigned long min_flush_time;
9418         int flush_wait_retry = 50;
9419         bool disable_atr = false;
9420         int fd_room;
9421         int reg;
9422
9423         if (!time_after(jiffies, pf->fd_flush_timestamp +
9424                                  (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9425                 return;
9426
9427         /* If the flush is happening too quick and we have mostly SB rules we
9428          * should not re-enable ATR for some time.
9429          */
9430         min_flush_time = pf->fd_flush_timestamp +
9431                          (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9432         fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9433
9434         if (!(time_after(jiffies, min_flush_time)) &&
9435             (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9436                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9437                         dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9438                 disable_atr = true;
9439         }
9440
9441         pf->fd_flush_timestamp = jiffies;
9442         set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9443         /* flush all filters */
9444         wr32(&pf->hw, I40E_PFQF_CTL_1,
9445              I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9446         i40e_flush(&pf->hw);
9447         pf->fd_flush_cnt++;
9448         pf->fd_add_err = 0;
9449         do {
9450                 /* Check FD flush status every 5-6msec */
9451                 usleep_range(5000, 6000);
9452                 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9453                 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9454                         break;
9455         } while (flush_wait_retry--);
9456         if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9457                 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9458         } else {
9459                 /* replay sideband filters */
9460                 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9461                 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9462                         clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9463                 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9464                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9465                         dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9466         }
9467 }
9468
9469 /**
9470  * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
9471  * @pf: board private structure
9472  **/
9473 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9474 {
9475         return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9476 }
9477
9478 /**
9479  * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9480  * @pf: board private structure
9481  **/
9482 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9483 {
9484
9485         /* if interface is down do nothing */
9486         if (test_bit(__I40E_DOWN, pf->state))
9487                 return;
9488
9489         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9490                 i40e_fdir_flush_and_replay(pf);
9491
9492         i40e_fdir_check_and_reenable(pf);
9493
9494 }
9495
9496 /**
9497  * i40e_vsi_link_event - notify VSI of a link event
9498  * @vsi: vsi to be notified
9499  * @link_up: link up or down
9500  **/
9501 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9502 {
9503         if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9504                 return;
9505
9506         switch (vsi->type) {
9507         case I40E_VSI_MAIN:
9508                 if (!vsi->netdev || !vsi->netdev_registered)
9509                         break;
9510
9511                 if (link_up) {
9512                         netif_carrier_on(vsi->netdev);
9513                         netif_tx_wake_all_queues(vsi->netdev);
9514                 } else {
9515                         netif_carrier_off(vsi->netdev);
9516                         netif_tx_stop_all_queues(vsi->netdev);
9517                 }
9518                 break;
9519
9520         case I40E_VSI_SRIOV:
9521         case I40E_VSI_VMDQ2:
9522         case I40E_VSI_CTRL:
9523         case I40E_VSI_IWARP:
9524         case I40E_VSI_MIRROR:
9525         default:
9526                 /* there is no notification for other VSIs */
9527                 break;
9528         }
9529 }
9530
9531 /**
9532  * i40e_veb_link_event - notify elements on the veb of a link event
9533  * @veb: veb to be notified
9534  * @link_up: link up or down
9535  **/
9536 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9537 {
9538         struct i40e_pf *pf;
9539         int i;
9540
9541         if (!veb || !veb->pf)
9542                 return;
9543         pf = veb->pf;
9544
9545         /* depth first... */
9546         for (i = 0; i < I40E_MAX_VEB; i++)
9547                 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9548                         i40e_veb_link_event(pf->veb[i], link_up);
9549
9550         /* ... now the local VSIs */
9551         for (i = 0; i < pf->num_alloc_vsi; i++)
9552                 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9553                         i40e_vsi_link_event(pf->vsi[i], link_up);
9554 }
9555
9556 /**
9557  * i40e_link_event - Update netif_carrier status
9558  * @pf: board private structure
9559  **/
9560 static void i40e_link_event(struct i40e_pf *pf)
9561 {
9562         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9563         u8 new_link_speed, old_link_speed;
9564         i40e_status status;
9565         bool new_link, old_link;
9566 #ifdef CONFIG_I40E_DCB
9567         int err;
9568 #endif /* CONFIG_I40E_DCB */
9569
9570         /* set this to force the get_link_status call to refresh state */
9571         pf->hw.phy.get_link_info = true;
9572         old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9573         status = i40e_get_link_status(&pf->hw, &new_link);
9574
9575         /* On success, disable temp link polling */
9576         if (status == I40E_SUCCESS) {
9577                 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9578         } else {
9579                 /* Enable link polling temporarily until i40e_get_link_status
9580                  * returns I40E_SUCCESS
9581                  */
9582                 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9583                 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9584                         status);
9585                 return;
9586         }
9587
9588         old_link_speed = pf->hw.phy.link_info_old.link_speed;
9589         new_link_speed = pf->hw.phy.link_info.link_speed;
9590
9591         if (new_link == old_link &&
9592             new_link_speed == old_link_speed &&
9593             (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9594              new_link == netif_carrier_ok(vsi->netdev)))
9595                 return;
9596
9597         i40e_print_link_message(vsi, new_link);
9598
9599         /* Notify the base of the switch tree connected to
9600          * the link.  Floating VEBs are not notified.
9601          */
9602         if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9603                 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9604         else
9605                 i40e_vsi_link_event(vsi, new_link);
9606
9607         if (pf->vf)
9608                 i40e_vc_notify_link_state(pf);
9609
9610         if (pf->flags & I40E_FLAG_PTP)
9611                 i40e_ptp_set_increment(pf);
9612 #ifdef CONFIG_I40E_DCB
9613         if (new_link == old_link)
9614                 return;
9615         /* Not SW DCB so firmware will take care of default settings */
9616         if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9617                 return;
9618
9619         /* We cover here only link down, as after link up in case of SW DCB
9620          * SW LLDP agent will take care of setting it up
9621          */
9622         if (!new_link) {
9623                 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9624                 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9625                 err = i40e_dcb_sw_default_config(pf);
9626                 if (err) {
9627                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9628                                        I40E_FLAG_DCB_ENABLED);
9629                 } else {
9630                         pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9631                                        DCB_CAP_DCBX_VER_IEEE;
9632                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
9633                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9634                 }
9635         }
9636 #endif /* CONFIG_I40E_DCB */
9637 }
9638
9639 /**
9640  * i40e_watchdog_subtask - periodic checks not using event driven response
9641  * @pf: board private structure
9642  **/
9643 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9644 {
9645         int i;
9646
9647         /* if interface is down do nothing */
9648         if (test_bit(__I40E_DOWN, pf->state) ||
9649             test_bit(__I40E_CONFIG_BUSY, pf->state))
9650                 return;
9651
9652         /* make sure we don't do these things too often */
9653         if (time_before(jiffies, (pf->service_timer_previous +
9654                                   pf->service_timer_period)))
9655                 return;
9656         pf->service_timer_previous = jiffies;
9657
9658         if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9659             test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9660                 i40e_link_event(pf);
9661
9662         /* Update the stats for active netdevs so the network stack
9663          * can look at updated numbers whenever it cares to
9664          */
9665         for (i = 0; i < pf->num_alloc_vsi; i++)
9666                 if (pf->vsi[i] && pf->vsi[i]->netdev)
9667                         i40e_update_stats(pf->vsi[i]);
9668
9669         if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9670                 /* Update the stats for the active switching components */
9671                 for (i = 0; i < I40E_MAX_VEB; i++)
9672                         if (pf->veb[i])
9673                                 i40e_update_veb_stats(pf->veb[i]);
9674         }
9675
9676         i40e_ptp_rx_hang(pf);
9677         i40e_ptp_tx_hang(pf);
9678 }
9679
9680 /**
9681  * i40e_reset_subtask - Set up for resetting the device and driver
9682  * @pf: board private structure
9683  **/
9684 static void i40e_reset_subtask(struct i40e_pf *pf)
9685 {
9686         u32 reset_flags = 0;
9687
9688         if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9689                 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9690                 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9691         }
9692         if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9693                 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9694                 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9695         }
9696         if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9697                 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9698                 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9699         }
9700         if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9701                 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9702                 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9703         }
9704         if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9705                 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9706                 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9707         }
9708
9709         /* If there's a recovery already waiting, it takes
9710          * precedence before starting a new reset sequence.
9711          */
9712         if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9713                 i40e_prep_for_reset(pf);
9714                 i40e_reset(pf);
9715                 i40e_rebuild(pf, false, false);
9716         }
9717
9718         /* If we're already down or resetting, just bail */
9719         if (reset_flags &&
9720             !test_bit(__I40E_DOWN, pf->state) &&
9721             !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9722                 i40e_do_reset(pf, reset_flags, false);
9723         }
9724 }
9725
9726 /**
9727  * i40e_handle_link_event - Handle link event
9728  * @pf: board private structure
9729  * @e: event info posted on ARQ
9730  **/
9731 static void i40e_handle_link_event(struct i40e_pf *pf,
9732                                    struct i40e_arq_event_info *e)
9733 {
9734         struct i40e_aqc_get_link_status *status =
9735                 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9736
9737         /* Do a new status request to re-enable LSE reporting
9738          * and load new status information into the hw struct
9739          * This completely ignores any state information
9740          * in the ARQ event info, instead choosing to always
9741          * issue the AQ update link status command.
9742          */
9743         i40e_link_event(pf);
9744
9745         /* Check if module meets thermal requirements */
9746         if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9747                 dev_err(&pf->pdev->dev,
9748                         "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9749                 dev_err(&pf->pdev->dev,
9750                         "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9751         } else {
9752                 /* check for unqualified module, if link is down, suppress
9753                  * the message if link was forced to be down.
9754                  */
9755                 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9756                     (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9757                     (!(status->link_info & I40E_AQ_LINK_UP)) &&
9758                     (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9759                         dev_err(&pf->pdev->dev,
9760                                 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9761                         dev_err(&pf->pdev->dev,
9762                                 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9763                 }
9764         }
9765 }
9766
9767 /**
9768  * i40e_clean_adminq_subtask - Clean the AdminQ rings
9769  * @pf: board private structure
9770  **/
9771 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9772 {
9773         struct i40e_arq_event_info event;
9774         struct i40e_hw *hw = &pf->hw;
9775         u16 pending, i = 0;
9776         i40e_status ret;
9777         u16 opcode;
9778         u32 oldval;
9779         u32 val;
9780
9781         /* Do not run clean AQ when PF reset fails */
9782         if (test_bit(__I40E_RESET_FAILED, pf->state))
9783                 return;
9784
9785         /* check for error indications */
9786         val = rd32(&pf->hw, pf->hw.aq.arq.len);
9787         oldval = val;
9788         if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9789                 if (hw->debug_mask & I40E_DEBUG_AQ)
9790                         dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9791                 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9792         }
9793         if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9794                 if (hw->debug_mask & I40E_DEBUG_AQ)
9795                         dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9796                 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9797                 pf->arq_overflows++;
9798         }
9799         if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9800                 if (hw->debug_mask & I40E_DEBUG_AQ)
9801                         dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9802                 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9803         }
9804         if (oldval != val)
9805                 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9806
9807         val = rd32(&pf->hw, pf->hw.aq.asq.len);
9808         oldval = val;
9809         if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9810                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9811                         dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9812                 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9813         }
9814         if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9815                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9816                         dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9817                 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9818         }
9819         if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9820                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9821                         dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9822                 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
9823         }
9824         if (oldval != val)
9825                 wr32(&pf->hw, pf->hw.aq.asq.len, val);
9826
9827         event.buf_len = I40E_MAX_AQ_BUF_SIZE;
9828         event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
9829         if (!event.msg_buf)
9830                 return;
9831
9832         do {
9833                 ret = i40e_clean_arq_element(hw, &event, &pending);
9834                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
9835                         break;
9836                 else if (ret) {
9837                         dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
9838                         break;
9839                 }
9840
9841                 opcode = le16_to_cpu(event.desc.opcode);
9842                 switch (opcode) {
9843
9844                 case i40e_aqc_opc_get_link_status:
9845                         rtnl_lock();
9846                         i40e_handle_link_event(pf, &event);
9847                         rtnl_unlock();
9848                         break;
9849                 case i40e_aqc_opc_send_msg_to_pf:
9850                         ret = i40e_vc_process_vf_msg(pf,
9851                                         le16_to_cpu(event.desc.retval),
9852                                         le32_to_cpu(event.desc.cookie_high),
9853                                         le32_to_cpu(event.desc.cookie_low),
9854                                         event.msg_buf,
9855                                         event.msg_len);
9856                         break;
9857                 case i40e_aqc_opc_lldp_update_mib:
9858                         dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
9859 #ifdef CONFIG_I40E_DCB
9860                         rtnl_lock();
9861                         i40e_handle_lldp_event(pf, &event);
9862                         rtnl_unlock();
9863 #endif /* CONFIG_I40E_DCB */
9864                         break;
9865                 case i40e_aqc_opc_event_lan_overflow:
9866                         dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
9867                         i40e_handle_lan_overflow_event(pf, &event);
9868                         break;
9869                 case i40e_aqc_opc_send_msg_to_peer:
9870                         dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
9871                         break;
9872                 case i40e_aqc_opc_nvm_erase:
9873                 case i40e_aqc_opc_nvm_update:
9874                 case i40e_aqc_opc_oem_post_update:
9875                         i40e_debug(&pf->hw, I40E_DEBUG_NVM,
9876                                    "ARQ NVM operation 0x%04x completed\n",
9877                                    opcode);
9878                         break;
9879                 default:
9880                         dev_info(&pf->pdev->dev,
9881                                  "ARQ: Unknown event 0x%04x ignored\n",
9882                                  opcode);
9883                         break;
9884                 }
9885         } while (i++ < pf->adminq_work_limit);
9886
9887         if (i < pf->adminq_work_limit)
9888                 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
9889
9890         /* re-enable Admin queue interrupt cause */
9891         val = rd32(hw, I40E_PFINT_ICR0_ENA);
9892         val |=  I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
9893         wr32(hw, I40E_PFINT_ICR0_ENA, val);
9894         i40e_flush(hw);
9895
9896         kfree(event.msg_buf);
9897 }
9898
9899 /**
9900  * i40e_verify_eeprom - make sure eeprom is good to use
9901  * @pf: board private structure
9902  **/
9903 static void i40e_verify_eeprom(struct i40e_pf *pf)
9904 {
9905         int err;
9906
9907         err = i40e_diag_eeprom_test(&pf->hw);
9908         if (err) {
9909                 /* retry in case of garbage read */
9910                 err = i40e_diag_eeprom_test(&pf->hw);
9911                 if (err) {
9912                         dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
9913                                  err);
9914                         set_bit(__I40E_BAD_EEPROM, pf->state);
9915                 }
9916         }
9917
9918         if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
9919                 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
9920                 clear_bit(__I40E_BAD_EEPROM, pf->state);
9921         }
9922 }
9923
9924 /**
9925  * i40e_enable_pf_switch_lb
9926  * @pf: pointer to the PF structure
9927  *
9928  * enable switch loop back or die - no point in a return value
9929  **/
9930 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
9931 {
9932         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9933         struct i40e_vsi_context ctxt;
9934         int ret;
9935
9936         ctxt.seid = pf->main_vsi_seid;
9937         ctxt.pf_num = pf->hw.pf_id;
9938         ctxt.vf_num = 0;
9939         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9940         if (ret) {
9941                 dev_info(&pf->pdev->dev,
9942                          "couldn't get PF vsi config, err %s aq_err %s\n",
9943                          i40e_stat_str(&pf->hw, ret),
9944                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9945                 return;
9946         }
9947         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9948         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9949         ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9950
9951         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9952         if (ret) {
9953                 dev_info(&pf->pdev->dev,
9954                          "update vsi switch failed, err %s aq_err %s\n",
9955                          i40e_stat_str(&pf->hw, ret),
9956                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9957         }
9958 }
9959
9960 /**
9961  * i40e_disable_pf_switch_lb
9962  * @pf: pointer to the PF structure
9963  *
9964  * disable switch loop back or die - no point in a return value
9965  **/
9966 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
9967 {
9968         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9969         struct i40e_vsi_context ctxt;
9970         int ret;
9971
9972         ctxt.seid = pf->main_vsi_seid;
9973         ctxt.pf_num = pf->hw.pf_id;
9974         ctxt.vf_num = 0;
9975         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9976         if (ret) {
9977                 dev_info(&pf->pdev->dev,
9978                          "couldn't get PF vsi config, err %s aq_err %s\n",
9979                          i40e_stat_str(&pf->hw, ret),
9980                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9981                 return;
9982         }
9983         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9984         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9985         ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9986
9987         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9988         if (ret) {
9989                 dev_info(&pf->pdev->dev,
9990                          "update vsi switch failed, err %s aq_err %s\n",
9991                          i40e_stat_str(&pf->hw, ret),
9992                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9993         }
9994 }
9995
9996 /**
9997  * i40e_config_bridge_mode - Configure the HW bridge mode
9998  * @veb: pointer to the bridge instance
9999  *
10000  * Configure the loop back mode for the LAN VSI that is downlink to the
10001  * specified HW bridge instance. It is expected this function is called
10002  * when a new HW bridge is instantiated.
10003  **/
10004 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10005 {
10006         struct i40e_pf *pf = veb->pf;
10007
10008         if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10009                 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10010                          veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10011         if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10012                 i40e_disable_pf_switch_lb(pf);
10013         else
10014                 i40e_enable_pf_switch_lb(pf);
10015 }
10016
10017 /**
10018  * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10019  * @veb: pointer to the VEB instance
10020  *
10021  * This is a recursive function that first builds the attached VSIs then
10022  * recurses in to build the next layer of VEB.  We track the connections
10023  * through our own index numbers because the seid's from the HW could
10024  * change across the reset.
10025  **/
10026 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10027 {
10028         struct i40e_vsi *ctl_vsi = NULL;
10029         struct i40e_pf *pf = veb->pf;
10030         int v, veb_idx;
10031         int ret;
10032
10033         /* build VSI that owns this VEB, temporarily attached to base VEB */
10034         for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10035                 if (pf->vsi[v] &&
10036                     pf->vsi[v]->veb_idx == veb->idx &&
10037                     pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10038                         ctl_vsi = pf->vsi[v];
10039                         break;
10040                 }
10041         }
10042         if (!ctl_vsi) {
10043                 dev_info(&pf->pdev->dev,
10044                          "missing owner VSI for veb_idx %d\n", veb->idx);
10045                 ret = -ENOENT;
10046                 goto end_reconstitute;
10047         }
10048         if (ctl_vsi != pf->vsi[pf->lan_vsi])
10049                 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10050         ret = i40e_add_vsi(ctl_vsi);
10051         if (ret) {
10052                 dev_info(&pf->pdev->dev,
10053                          "rebuild of veb_idx %d owner VSI failed: %d\n",
10054                          veb->idx, ret);
10055                 goto end_reconstitute;
10056         }
10057         i40e_vsi_reset_stats(ctl_vsi);
10058
10059         /* create the VEB in the switch and move the VSI onto the VEB */
10060         ret = i40e_add_veb(veb, ctl_vsi);
10061         if (ret)
10062                 goto end_reconstitute;
10063
10064         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10065                 veb->bridge_mode = BRIDGE_MODE_VEB;
10066         else
10067                 veb->bridge_mode = BRIDGE_MODE_VEPA;
10068         i40e_config_bridge_mode(veb);
10069
10070         /* create the remaining VSIs attached to this VEB */
10071         for (v = 0; v < pf->num_alloc_vsi; v++) {
10072                 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10073                         continue;
10074
10075                 if (pf->vsi[v]->veb_idx == veb->idx) {
10076                         struct i40e_vsi *vsi = pf->vsi[v];
10077
10078                         vsi->uplink_seid = veb->seid;
10079                         ret = i40e_add_vsi(vsi);
10080                         if (ret) {
10081                                 dev_info(&pf->pdev->dev,
10082                                          "rebuild of vsi_idx %d failed: %d\n",
10083                                          v, ret);
10084                                 goto end_reconstitute;
10085                         }
10086                         i40e_vsi_reset_stats(vsi);
10087                 }
10088         }
10089
10090         /* create any VEBs attached to this VEB - RECURSION */
10091         for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10092                 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10093                         pf->veb[veb_idx]->uplink_seid = veb->seid;
10094                         ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10095                         if (ret)
10096                                 break;
10097                 }
10098         }
10099
10100 end_reconstitute:
10101         return ret;
10102 }
10103
10104 /**
10105  * i40e_get_capabilities - get info about the HW
10106  * @pf: the PF struct
10107  * @list_type: AQ capability to be queried
10108  **/
10109 static int i40e_get_capabilities(struct i40e_pf *pf,
10110                                  enum i40e_admin_queue_opc list_type)
10111 {
10112         struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10113         u16 data_size;
10114         int buf_len;
10115         int err;
10116
10117         buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10118         do {
10119                 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10120                 if (!cap_buf)
10121                         return -ENOMEM;
10122
10123                 /* this loads the data into the hw struct for us */
10124                 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10125                                                     &data_size, list_type,
10126                                                     NULL);
10127                 /* data loaded, buffer no longer needed */
10128                 kfree(cap_buf);
10129
10130                 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10131                         /* retry with a larger buffer */
10132                         buf_len = data_size;
10133                 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
10134                         dev_info(&pf->pdev->dev,
10135                                  "capability discovery failed, err %s aq_err %s\n",
10136                                  i40e_stat_str(&pf->hw, err),
10137                                  i40e_aq_str(&pf->hw,
10138                                              pf->hw.aq.asq_last_status));
10139                         return -ENODEV;
10140                 }
10141         } while (err);
10142
10143         if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10144                 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10145                         dev_info(&pf->pdev->dev,
10146                                  "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10147                                  pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10148                                  pf->hw.func_caps.num_msix_vectors,
10149                                  pf->hw.func_caps.num_msix_vectors_vf,
10150                                  pf->hw.func_caps.fd_filters_guaranteed,
10151                                  pf->hw.func_caps.fd_filters_best_effort,
10152                                  pf->hw.func_caps.num_tx_qp,
10153                                  pf->hw.func_caps.num_vsis);
10154                 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10155                         dev_info(&pf->pdev->dev,
10156                                  "switch_mode=0x%04x, function_valid=0x%08x\n",
10157                                  pf->hw.dev_caps.switch_mode,
10158                                  pf->hw.dev_caps.valid_functions);
10159                         dev_info(&pf->pdev->dev,
10160                                  "SR-IOV=%d, num_vfs for all function=%u\n",
10161                                  pf->hw.dev_caps.sr_iov_1_1,
10162                                  pf->hw.dev_caps.num_vfs);
10163                         dev_info(&pf->pdev->dev,
10164                                  "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10165                                  pf->hw.dev_caps.num_vsis,
10166                                  pf->hw.dev_caps.num_rx_qp,
10167                                  pf->hw.dev_caps.num_tx_qp);
10168                 }
10169         }
10170         if (list_type == i40e_aqc_opc_list_func_capabilities) {
10171 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10172                        + pf->hw.func_caps.num_vfs)
10173                 if (pf->hw.revision_id == 0 &&
10174                     pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10175                         dev_info(&pf->pdev->dev,
10176                                  "got num_vsis %d, setting num_vsis to %d\n",
10177                                  pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10178                         pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10179                 }
10180         }
10181         return 0;
10182 }
10183
10184 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10185
10186 /**
10187  * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10188  * @pf: board private structure
10189  **/
10190 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10191 {
10192         struct i40e_vsi *vsi;
10193
10194         /* quick workaround for an NVM issue that leaves a critical register
10195          * uninitialized
10196          */
10197         if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10198                 static const u32 hkey[] = {
10199                         0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10200                         0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10201                         0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10202                         0x95b3a76d};
10203                 int i;
10204
10205                 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10206                         wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10207         }
10208
10209         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10210                 return;
10211
10212         /* find existing VSI and see if it needs configuring */
10213         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10214
10215         /* create a new VSI if none exists */
10216         if (!vsi) {
10217                 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10218                                      pf->vsi[pf->lan_vsi]->seid, 0);
10219                 if (!vsi) {
10220                         dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10221                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10222                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10223                         return;
10224                 }
10225         }
10226
10227         i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10228 }
10229
10230 /**
10231  * i40e_fdir_teardown - release the Flow Director resources
10232  * @pf: board private structure
10233  **/
10234 static void i40e_fdir_teardown(struct i40e_pf *pf)
10235 {
10236         struct i40e_vsi *vsi;
10237
10238         i40e_fdir_filter_exit(pf);
10239         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10240         if (vsi)
10241                 i40e_vsi_release(vsi);
10242 }
10243
10244 /**
10245  * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10246  * @vsi: PF main vsi
10247  * @seid: seid of main or channel VSIs
10248  *
10249  * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10250  * existed before reset
10251  **/
10252 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10253 {
10254         struct i40e_cloud_filter *cfilter;
10255         struct i40e_pf *pf = vsi->back;
10256         struct hlist_node *node;
10257         i40e_status ret;
10258
10259         /* Add cloud filters back if they exist */
10260         hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10261                                   cloud_node) {
10262                 if (cfilter->seid != seid)
10263                         continue;
10264
10265                 if (cfilter->dst_port)
10266                         ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10267                                                                 true);
10268                 else
10269                         ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10270
10271                 if (ret) {
10272                         dev_dbg(&pf->pdev->dev,
10273                                 "Failed to rebuild cloud filter, err %s aq_err %s\n",
10274                                 i40e_stat_str(&pf->hw, ret),
10275                                 i40e_aq_str(&pf->hw,
10276                                             pf->hw.aq.asq_last_status));
10277                         return ret;
10278                 }
10279         }
10280         return 0;
10281 }
10282
10283 /**
10284  * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10285  * @vsi: PF main vsi
10286  *
10287  * Rebuilds channel VSIs if they existed before reset
10288  **/
10289 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10290 {
10291         struct i40e_channel *ch, *ch_tmp;
10292         i40e_status ret;
10293
10294         if (list_empty(&vsi->ch_list))
10295                 return 0;
10296
10297         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10298                 if (!ch->initialized)
10299                         break;
10300                 /* Proceed with creation of channel (VMDq2) VSI */
10301                 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10302                 if (ret) {
10303                         dev_info(&vsi->back->pdev->dev,
10304                                  "failed to rebuild channels using uplink_seid %u\n",
10305                                  vsi->uplink_seid);
10306                         return ret;
10307                 }
10308                 /* Reconfigure TX queues using QTX_CTL register */
10309                 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10310                 if (ret) {
10311                         dev_info(&vsi->back->pdev->dev,
10312                                  "failed to configure TX rings for channel %u\n",
10313                                  ch->seid);
10314                         return ret;
10315                 }
10316                 /* update 'next_base_queue' */
10317                 vsi->next_base_queue = vsi->next_base_queue +
10318                                                         ch->num_queue_pairs;
10319                 if (ch->max_tx_rate) {
10320                         u64 credits = ch->max_tx_rate;
10321
10322                         if (i40e_set_bw_limit(vsi, ch->seid,
10323                                               ch->max_tx_rate))
10324                                 return -EINVAL;
10325
10326                         do_div(credits, I40E_BW_CREDIT_DIVISOR);
10327                         dev_dbg(&vsi->back->pdev->dev,
10328                                 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10329                                 ch->max_tx_rate,
10330                                 credits,
10331                                 ch->seid);
10332                 }
10333                 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10334                 if (ret) {
10335                         dev_dbg(&vsi->back->pdev->dev,
10336                                 "Failed to rebuild cloud filters for channel VSI %u\n",
10337                                 ch->seid);
10338                         return ret;
10339                 }
10340         }
10341         return 0;
10342 }
10343
10344 /**
10345  * i40e_prep_for_reset - prep for the core to reset
10346  * @pf: board private structure
10347  *
10348  * Close up the VFs and other things in prep for PF Reset.
10349   **/
10350 static void i40e_prep_for_reset(struct i40e_pf *pf)
10351 {
10352         struct i40e_hw *hw = &pf->hw;
10353         i40e_status ret = 0;
10354         u32 v;
10355
10356         clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10357         if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10358                 return;
10359         if (i40e_check_asq_alive(&pf->hw))
10360                 i40e_vc_notify_reset(pf);
10361
10362         dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10363
10364         /* quiesce the VSIs and their queues that are not already DOWN */
10365         i40e_pf_quiesce_all_vsi(pf);
10366
10367         for (v = 0; v < pf->num_alloc_vsi; v++) {
10368                 if (pf->vsi[v])
10369                         pf->vsi[v]->seid = 0;
10370         }
10371
10372         i40e_shutdown_adminq(&pf->hw);
10373
10374         /* call shutdown HMC */
10375         if (hw->hmc.hmc_obj) {
10376                 ret = i40e_shutdown_lan_hmc(hw);
10377                 if (ret)
10378                         dev_warn(&pf->pdev->dev,
10379                                  "shutdown_lan_hmc failed: %d\n", ret);
10380         }
10381
10382         /* Save the current PTP time so that we can restore the time after the
10383          * reset completes.
10384          */
10385         i40e_ptp_save_hw_time(pf);
10386 }
10387
10388 /**
10389  * i40e_send_version - update firmware with driver version
10390  * @pf: PF struct
10391  */
10392 static void i40e_send_version(struct i40e_pf *pf)
10393 {
10394         struct i40e_driver_version dv;
10395
10396         dv.major_version = 0xff;
10397         dv.minor_version = 0xff;
10398         dv.build_version = 0xff;
10399         dv.subbuild_version = 0;
10400         strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10401         i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10402 }
10403
10404 /**
10405  * i40e_get_oem_version - get OEM specific version information
10406  * @hw: pointer to the hardware structure
10407  **/
10408 static void i40e_get_oem_version(struct i40e_hw *hw)
10409 {
10410         u16 block_offset = 0xffff;
10411         u16 block_length = 0;
10412         u16 capabilities = 0;
10413         u16 gen_snap = 0;
10414         u16 release = 0;
10415
10416 #define I40E_SR_NVM_OEM_VERSION_PTR             0x1B
10417 #define I40E_NVM_OEM_LENGTH_OFFSET              0x00
10418 #define I40E_NVM_OEM_CAPABILITIES_OFFSET        0x01
10419 #define I40E_NVM_OEM_GEN_OFFSET                 0x02
10420 #define I40E_NVM_OEM_RELEASE_OFFSET             0x03
10421 #define I40E_NVM_OEM_CAPABILITIES_MASK          0x000F
10422 #define I40E_NVM_OEM_LENGTH                     3
10423
10424         /* Check if pointer to OEM version block is valid. */
10425         i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10426         if (block_offset == 0xffff)
10427                 return;
10428
10429         /* Check if OEM version block has correct length. */
10430         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10431                            &block_length);
10432         if (block_length < I40E_NVM_OEM_LENGTH)
10433                 return;
10434
10435         /* Check if OEM version format is as expected. */
10436         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10437                            &capabilities);
10438         if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10439                 return;
10440
10441         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10442                            &gen_snap);
10443         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10444                            &release);
10445         hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10446         hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10447 }
10448
10449 /**
10450  * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10451  * @pf: board private structure
10452  **/
10453 static int i40e_reset(struct i40e_pf *pf)
10454 {
10455         struct i40e_hw *hw = &pf->hw;
10456         i40e_status ret;
10457
10458         ret = i40e_pf_reset(hw);
10459         if (ret) {
10460                 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10461                 set_bit(__I40E_RESET_FAILED, pf->state);
10462                 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10463         } else {
10464                 pf->pfr_count++;
10465         }
10466         return ret;
10467 }
10468
10469 /**
10470  * i40e_rebuild - rebuild using a saved config
10471  * @pf: board private structure
10472  * @reinit: if the Main VSI needs to re-initialized.
10473  * @lock_acquired: indicates whether or not the lock has been acquired
10474  * before this function was called.
10475  **/
10476 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10477 {
10478         int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
10479         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10480         struct i40e_hw *hw = &pf->hw;
10481         i40e_status ret;
10482         u32 val;
10483         int v;
10484
10485         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10486             i40e_check_recovery_mode(pf)) {
10487                 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10488         }
10489
10490         if (test_bit(__I40E_DOWN, pf->state) &&
10491             !test_bit(__I40E_RECOVERY_MODE, pf->state) &&
10492             !old_recovery_mode_bit)
10493                 goto clear_recovery;
10494         dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10495
10496         /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10497         ret = i40e_init_adminq(&pf->hw);
10498         if (ret) {
10499                 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
10500                          i40e_stat_str(&pf->hw, ret),
10501                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10502                 goto clear_recovery;
10503         }
10504         i40e_get_oem_version(&pf->hw);
10505
10506         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10507             ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
10508              hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
10509                 /* The following delay is necessary for 4.33 firmware and older
10510                  * to recover after EMP reset. 200 ms should suffice but we
10511                  * put here 300 ms to be sure that FW is ready to operate
10512                  * after reset.
10513                  */
10514                 mdelay(300);
10515         }
10516
10517         /* re-verify the eeprom if we just had an EMP reset */
10518         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10519                 i40e_verify_eeprom(pf);
10520
10521         /* if we are going out of or into recovery mode we have to act
10522          * accordingly with regard to resources initialization
10523          * and deinitialization
10524          */
10525         if (test_bit(__I40E_RECOVERY_MODE, pf->state) ||
10526             old_recovery_mode_bit) {
10527                 if (i40e_get_capabilities(pf,
10528                                           i40e_aqc_opc_list_func_capabilities))
10529                         goto end_unlock;
10530
10531                 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10532                         /* we're staying in recovery mode so we'll reinitialize
10533                          * misc vector here
10534                          */
10535                         if (i40e_setup_misc_vector_for_recovery_mode(pf))
10536                                 goto end_unlock;
10537                 } else {
10538                         if (!lock_acquired)
10539                                 rtnl_lock();
10540                         /* we're going out of recovery mode so we'll free
10541                          * the IRQ allocated specifically for recovery mode
10542                          * and restore the interrupt scheme
10543                          */
10544                         free_irq(pf->pdev->irq, pf);
10545                         i40e_clear_interrupt_scheme(pf);
10546                         if (i40e_restore_interrupt_scheme(pf))
10547                                 goto end_unlock;
10548                 }
10549
10550                 /* tell the firmware that we're starting */
10551                 i40e_send_version(pf);
10552
10553                 /* bail out in case recovery mode was detected, as there is
10554                  * no need for further configuration.
10555                  */
10556                 goto end_unlock;
10557         }
10558
10559         i40e_clear_pxe_mode(hw);
10560         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10561         if (ret)
10562                 goto end_core_reset;
10563
10564         ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10565                                 hw->func_caps.num_rx_qp, 0, 0);
10566         if (ret) {
10567                 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10568                 goto end_core_reset;
10569         }
10570         ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10571         if (ret) {
10572                 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10573                 goto end_core_reset;
10574         }
10575
10576         if (!lock_acquired)
10577                 rtnl_lock();
10578         ret = i40e_setup_pf_switch(pf, reinit);
10579         if (ret)
10580                 goto end_unlock;
10581
10582 #ifdef CONFIG_I40E_DCB
10583         /* Enable FW to write a default DCB config on link-up
10584          * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10585          * is not supported with new link speed
10586          */
10587         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
10588                 i40e_aq_set_dcb_parameters(hw, false, NULL);
10589         } else {
10590                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10591                     (hw->phy.link_info.link_speed &
10592                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10593                         i40e_aq_set_dcb_parameters(hw, false, NULL);
10594                         dev_warn(&pf->pdev->dev,
10595                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10596                                  pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10597                 } else {
10598                         i40e_aq_set_dcb_parameters(hw, true, NULL);
10599                         ret = i40e_init_pf_dcb(pf);
10600                         if (ret) {
10601                                 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10602                                          ret);
10603                                 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10604                                 /* Continue without DCB enabled */
10605                         }
10606                 }
10607         }
10608
10609 #endif /* CONFIG_I40E_DCB */
10610
10611         /* The driver only wants link up/down and module qualification
10612          * reports from firmware.  Note the negative logic.
10613          */
10614         ret = i40e_aq_set_phy_int_mask(&pf->hw,
10615                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
10616                                          I40E_AQ_EVENT_MEDIA_NA |
10617                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10618         if (ret)
10619                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10620                          i40e_stat_str(&pf->hw, ret),
10621                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10622
10623         /* Rebuild the VSIs and VEBs that existed before reset.
10624          * They are still in our local switch element arrays, so only
10625          * need to rebuild the switch model in the HW.
10626          *
10627          * If there were VEBs but the reconstitution failed, we'll try
10628          * try to recover minimal use by getting the basic PF VSI working.
10629          */
10630         if (vsi->uplink_seid != pf->mac_seid) {
10631                 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10632                 /* find the one VEB connected to the MAC, and find orphans */
10633                 for (v = 0; v < I40E_MAX_VEB; v++) {
10634                         if (!pf->veb[v])
10635                                 continue;
10636
10637                         if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10638                             pf->veb[v]->uplink_seid == 0) {
10639                                 ret = i40e_reconstitute_veb(pf->veb[v]);
10640
10641                                 if (!ret)
10642                                         continue;
10643
10644                                 /* If Main VEB failed, we're in deep doodoo,
10645                                  * so give up rebuilding the switch and set up
10646                                  * for minimal rebuild of PF VSI.
10647                                  * If orphan failed, we'll report the error
10648                                  * but try to keep going.
10649                                  */
10650                                 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10651                                         dev_info(&pf->pdev->dev,
10652                                                  "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10653                                                  ret);
10654                                         vsi->uplink_seid = pf->mac_seid;
10655                                         break;
10656                                 } else if (pf->veb[v]->uplink_seid == 0) {
10657                                         dev_info(&pf->pdev->dev,
10658                                                  "rebuild of orphan VEB failed: %d\n",
10659                                                  ret);
10660                                 }
10661                         }
10662                 }
10663         }
10664
10665         if (vsi->uplink_seid == pf->mac_seid) {
10666                 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10667                 /* no VEB, so rebuild only the Main VSI */
10668                 ret = i40e_add_vsi(vsi);
10669                 if (ret) {
10670                         dev_info(&pf->pdev->dev,
10671                                  "rebuild of Main VSI failed: %d\n", ret);
10672                         goto end_unlock;
10673                 }
10674         }
10675
10676         if (vsi->mqprio_qopt.max_rate[0]) {
10677                 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10678                 u64 credits = 0;
10679
10680                 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10681                 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10682                 if (ret)
10683                         goto end_unlock;
10684
10685                 credits = max_tx_rate;
10686                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10687                 dev_dbg(&vsi->back->pdev->dev,
10688                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10689                         max_tx_rate,
10690                         credits,
10691                         vsi->seid);
10692         }
10693
10694         ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10695         if (ret)
10696                 goto end_unlock;
10697
10698         /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10699          * for this main VSI if they exist
10700          */
10701         ret = i40e_rebuild_channels(vsi);
10702         if (ret)
10703                 goto end_unlock;
10704
10705         /* Reconfigure hardware for allowing smaller MSS in the case
10706          * of TSO, so that we avoid the MDD being fired and causing
10707          * a reset in the case of small MSS+TSO.
10708          */
10709 #define I40E_REG_MSS          0x000E64DC
10710 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10711 #define I40E_64BYTE_MSS       0x400000
10712         val = rd32(hw, I40E_REG_MSS);
10713         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10714                 val &= ~I40E_REG_MSS_MIN_MASK;
10715                 val |= I40E_64BYTE_MSS;
10716                 wr32(hw, I40E_REG_MSS, val);
10717         }
10718
10719         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10720                 msleep(75);
10721                 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10722                 if (ret)
10723                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10724                                  i40e_stat_str(&pf->hw, ret),
10725                                  i40e_aq_str(&pf->hw,
10726                                              pf->hw.aq.asq_last_status));
10727         }
10728         /* reinit the misc interrupt */
10729         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10730                 ret = i40e_setup_misc_vector(pf);
10731
10732         /* Add a filter to drop all Flow control frames from any VSI from being
10733          * transmitted. By doing so we stop a malicious VF from sending out
10734          * PAUSE or PFC frames and potentially controlling traffic for other
10735          * PF/VF VSIs.
10736          * The FW can still send Flow control frames if enabled.
10737          */
10738         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10739                                                        pf->main_vsi_seid);
10740 #ifdef CONFIG_I40E_DCB
10741         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP)
10742                 i40e_set_lldp_forwarding(pf, true);
10743 #endif /* CONFIG_I40E_DCB */
10744
10745         /* restart the VSIs that were rebuilt and running before the reset */
10746         i40e_pf_unquiesce_all_vsi(pf);
10747
10748         /* Release the RTNL lock before we start resetting VFs */
10749         if (!lock_acquired)
10750                 rtnl_unlock();
10751
10752         /* Restore promiscuous settings */
10753         ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10754         if (ret)
10755                 dev_warn(&pf->pdev->dev,
10756                          "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10757                          pf->cur_promisc ? "on" : "off",
10758                          i40e_stat_str(&pf->hw, ret),
10759                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10760
10761         i40e_reset_all_vfs(pf, true);
10762
10763         /* tell the firmware that we're starting */
10764         i40e_send_version(pf);
10765
10766         /* We've already released the lock, so don't do it again */
10767         goto end_core_reset;
10768
10769 end_unlock:
10770         if (!lock_acquired)
10771                 rtnl_unlock();
10772 end_core_reset:
10773         clear_bit(__I40E_RESET_FAILED, pf->state);
10774 clear_recovery:
10775         clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10776         clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10777 }
10778
10779 /**
10780  * i40e_reset_and_rebuild - reset and rebuild using a saved config
10781  * @pf: board private structure
10782  * @reinit: if the Main VSI needs to re-initialized.
10783  * @lock_acquired: indicates whether or not the lock has been acquired
10784  * before this function was called.
10785  **/
10786 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10787                                    bool lock_acquired)
10788 {
10789         int ret;
10790         /* Now we wait for GRST to settle out.
10791          * We don't have to delete the VEBs or VSIs from the hw switch
10792          * because the reset will make them disappear.
10793          */
10794         ret = i40e_reset(pf);
10795         if (!ret)
10796                 i40e_rebuild(pf, reinit, lock_acquired);
10797 }
10798
10799 /**
10800  * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10801  * @pf: board private structure
10802  *
10803  * Close up the VFs and other things in prep for a Core Reset,
10804  * then get ready to rebuild the world.
10805  * @lock_acquired: indicates whether or not the lock has been acquired
10806  * before this function was called.
10807  **/
10808 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10809 {
10810         i40e_prep_for_reset(pf);
10811         i40e_reset_and_rebuild(pf, false, lock_acquired);
10812 }
10813
10814 /**
10815  * i40e_handle_mdd_event
10816  * @pf: pointer to the PF structure
10817  *
10818  * Called from the MDD irq handler to identify possibly malicious vfs
10819  **/
10820 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10821 {
10822         struct i40e_hw *hw = &pf->hw;
10823         bool mdd_detected = false;
10824         struct i40e_vf *vf;
10825         u32 reg;
10826         int i;
10827
10828         if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10829                 return;
10830
10831         /* find what triggered the MDD event */
10832         reg = rd32(hw, I40E_GL_MDET_TX);
10833         if (reg & I40E_GL_MDET_TX_VALID_MASK) {
10834                 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
10835                                 I40E_GL_MDET_TX_PF_NUM_SHIFT;
10836                 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
10837                                 I40E_GL_MDET_TX_VF_NUM_SHIFT;
10838                 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
10839                                 I40E_GL_MDET_TX_EVENT_SHIFT;
10840                 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
10841                                 I40E_GL_MDET_TX_QUEUE_SHIFT) -
10842                                 pf->hw.func_caps.base_queue;
10843                 if (netif_msg_tx_err(pf))
10844                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
10845                                  event, queue, pf_num, vf_num);
10846                 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
10847                 mdd_detected = true;
10848         }
10849         reg = rd32(hw, I40E_GL_MDET_RX);
10850         if (reg & I40E_GL_MDET_RX_VALID_MASK) {
10851                 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
10852                                 I40E_GL_MDET_RX_FUNCTION_SHIFT;
10853                 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
10854                                 I40E_GL_MDET_RX_EVENT_SHIFT;
10855                 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
10856                                 I40E_GL_MDET_RX_QUEUE_SHIFT) -
10857                                 pf->hw.func_caps.base_queue;
10858                 if (netif_msg_rx_err(pf))
10859                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
10860                                  event, queue, func);
10861                 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
10862                 mdd_detected = true;
10863         }
10864
10865         if (mdd_detected) {
10866                 reg = rd32(hw, I40E_PF_MDET_TX);
10867                 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
10868                         wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
10869                         dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
10870                 }
10871                 reg = rd32(hw, I40E_PF_MDET_RX);
10872                 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
10873                         wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
10874                         dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
10875                 }
10876         }
10877
10878         /* see if one of the VFs needs its hand slapped */
10879         for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
10880                 vf = &(pf->vf[i]);
10881                 reg = rd32(hw, I40E_VP_MDET_TX(i));
10882                 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
10883                         wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
10884                         vf->num_mdd_events++;
10885                         dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
10886                                  i);
10887                         dev_info(&pf->pdev->dev,
10888                                  "Use PF Control I/F to re-enable the VF\n");
10889                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10890                 }
10891
10892                 reg = rd32(hw, I40E_VP_MDET_RX(i));
10893                 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
10894                         wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
10895                         vf->num_mdd_events++;
10896                         dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
10897                                  i);
10898                         dev_info(&pf->pdev->dev,
10899                                  "Use PF Control I/F to re-enable the VF\n");
10900                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10901                 }
10902         }
10903
10904         /* re-enable mdd interrupt cause */
10905         clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
10906         reg = rd32(hw, I40E_PFINT_ICR0_ENA);
10907         reg |=  I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
10908         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
10909         i40e_flush(hw);
10910 }
10911
10912 /**
10913  * i40e_service_task - Run the driver's async subtasks
10914  * @work: pointer to work_struct containing our data
10915  **/
10916 static void i40e_service_task(struct work_struct *work)
10917 {
10918         struct i40e_pf *pf = container_of(work,
10919                                           struct i40e_pf,
10920                                           service_task);
10921         unsigned long start_time = jiffies;
10922
10923         /* don't bother with service tasks if a reset is in progress */
10924         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
10925             test_bit(__I40E_SUSPENDED, pf->state))
10926                 return;
10927
10928         if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
10929                 return;
10930
10931         if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10932                 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
10933                 i40e_sync_filters_subtask(pf);
10934                 i40e_reset_subtask(pf);
10935                 i40e_handle_mdd_event(pf);
10936                 i40e_vc_process_vflr_event(pf);
10937                 i40e_watchdog_subtask(pf);
10938                 i40e_fdir_reinit_subtask(pf);
10939                 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
10940                         /* Client subtask will reopen next time through. */
10941                         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
10942                                                            true);
10943                 } else {
10944                         i40e_client_subtask(pf);
10945                         if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
10946                                                pf->state))
10947                                 i40e_notify_client_of_l2_param_changes(
10948                                                                 pf->vsi[pf->lan_vsi]);
10949                 }
10950                 i40e_sync_filters_subtask(pf);
10951         } else {
10952                 i40e_reset_subtask(pf);
10953         }
10954
10955         i40e_clean_adminq_subtask(pf);
10956
10957         /* flush memory to make sure state is correct before next watchdog */
10958         smp_mb__before_atomic();
10959         clear_bit(__I40E_SERVICE_SCHED, pf->state);
10960
10961         /* If the tasks have taken longer than one timer cycle or there
10962          * is more work to be done, reschedule the service task now
10963          * rather than wait for the timer to tick again.
10964          */
10965         if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
10966             test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state)             ||
10967             test_bit(__I40E_MDD_EVENT_PENDING, pf->state)                ||
10968             test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
10969                 i40e_service_event_schedule(pf);
10970 }
10971
10972 /**
10973  * i40e_service_timer - timer callback
10974  * @t: timer list pointer
10975  **/
10976 static void i40e_service_timer(struct timer_list *t)
10977 {
10978         struct i40e_pf *pf = from_timer(pf, t, service_timer);
10979
10980         mod_timer(&pf->service_timer,
10981                   round_jiffies(jiffies + pf->service_timer_period));
10982         i40e_service_event_schedule(pf);
10983 }
10984
10985 /**
10986  * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
10987  * @vsi: the VSI being configured
10988  **/
10989 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
10990 {
10991         struct i40e_pf *pf = vsi->back;
10992
10993         switch (vsi->type) {
10994         case I40E_VSI_MAIN:
10995                 vsi->alloc_queue_pairs = pf->num_lan_qps;
10996                 if (!vsi->num_tx_desc)
10997                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10998                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
10999                 if (!vsi->num_rx_desc)
11000                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11001                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11002                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11003                         vsi->num_q_vectors = pf->num_lan_msix;
11004                 else
11005                         vsi->num_q_vectors = 1;
11006
11007                 break;
11008
11009         case I40E_VSI_FDIR:
11010                 vsi->alloc_queue_pairs = 1;
11011                 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11012                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11013                 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11014                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11015                 vsi->num_q_vectors = pf->num_fdsb_msix;
11016                 break;
11017
11018         case I40E_VSI_VMDQ2:
11019                 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11020                 if (!vsi->num_tx_desc)
11021                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11022                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11023                 if (!vsi->num_rx_desc)
11024                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11025                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11026                 vsi->num_q_vectors = pf->num_vmdq_msix;
11027                 break;
11028
11029         case I40E_VSI_SRIOV:
11030                 vsi->alloc_queue_pairs = pf->num_vf_qps;
11031                 if (!vsi->num_tx_desc)
11032                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11033                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11034                 if (!vsi->num_rx_desc)
11035                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11036                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11037                 break;
11038
11039         default:
11040                 WARN_ON(1);
11041                 return -ENODATA;
11042         }
11043
11044         return 0;
11045 }
11046
11047 /**
11048  * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11049  * @vsi: VSI pointer
11050  * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11051  *
11052  * On error: returns error code (negative)
11053  * On success: returns 0
11054  **/
11055 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11056 {
11057         struct i40e_ring **next_rings;
11058         int size;
11059         int ret = 0;
11060
11061         /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11062         size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11063                (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11064         vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11065         if (!vsi->tx_rings)
11066                 return -ENOMEM;
11067         next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11068         if (i40e_enabled_xdp_vsi(vsi)) {
11069                 vsi->xdp_rings = next_rings;
11070                 next_rings += vsi->alloc_queue_pairs;
11071         }
11072         vsi->rx_rings = next_rings;
11073
11074         if (alloc_qvectors) {
11075                 /* allocate memory for q_vector pointers */
11076                 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11077                 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11078                 if (!vsi->q_vectors) {
11079                         ret = -ENOMEM;
11080                         goto err_vectors;
11081                 }
11082         }
11083         return ret;
11084
11085 err_vectors:
11086         kfree(vsi->tx_rings);
11087         return ret;
11088 }
11089
11090 /**
11091  * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11092  * @pf: board private structure
11093  * @type: type of VSI
11094  *
11095  * On error: returns error code (negative)
11096  * On success: returns vsi index in PF (positive)
11097  **/
11098 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11099 {
11100         int ret = -ENODEV;
11101         struct i40e_vsi *vsi;
11102         int vsi_idx;
11103         int i;
11104
11105         /* Need to protect the allocation of the VSIs at the PF level */
11106         mutex_lock(&pf->switch_mutex);
11107
11108         /* VSI list may be fragmented if VSI creation/destruction has
11109          * been happening.  We can afford to do a quick scan to look
11110          * for any free VSIs in the list.
11111          *
11112          * find next empty vsi slot, looping back around if necessary
11113          */
11114         i = pf->next_vsi;
11115         while (i < pf->num_alloc_vsi && pf->vsi[i])
11116                 i++;
11117         if (i >= pf->num_alloc_vsi) {
11118                 i = 0;
11119                 while (i < pf->next_vsi && pf->vsi[i])
11120                         i++;
11121         }
11122
11123         if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11124                 vsi_idx = i;             /* Found one! */
11125         } else {
11126                 ret = -ENODEV;
11127                 goto unlock_pf;  /* out of VSI slots! */
11128         }
11129         pf->next_vsi = ++i;
11130
11131         vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11132         if (!vsi) {
11133                 ret = -ENOMEM;
11134                 goto unlock_pf;
11135         }
11136         vsi->type = type;
11137         vsi->back = pf;
11138         set_bit(__I40E_VSI_DOWN, vsi->state);
11139         vsi->flags = 0;
11140         vsi->idx = vsi_idx;
11141         vsi->int_rate_limit = 0;
11142         vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11143                                 pf->rss_table_size : 64;
11144         vsi->netdev_registered = false;
11145         vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11146         hash_init(vsi->mac_filter_hash);
11147         vsi->irqs_ready = false;
11148
11149         if (type == I40E_VSI_MAIN) {
11150                 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11151                 if (!vsi->af_xdp_zc_qps)
11152                         goto err_rings;
11153         }
11154
11155         ret = i40e_set_num_rings_in_vsi(vsi);
11156         if (ret)
11157                 goto err_rings;
11158
11159         ret = i40e_vsi_alloc_arrays(vsi, true);
11160         if (ret)
11161                 goto err_rings;
11162
11163         /* Setup default MSIX irq handler for VSI */
11164         i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11165
11166         /* Initialize VSI lock */
11167         spin_lock_init(&vsi->mac_filter_hash_lock);
11168         pf->vsi[vsi_idx] = vsi;
11169         ret = vsi_idx;
11170         goto unlock_pf;
11171
11172 err_rings:
11173         bitmap_free(vsi->af_xdp_zc_qps);
11174         pf->next_vsi = i - 1;
11175         kfree(vsi);
11176 unlock_pf:
11177         mutex_unlock(&pf->switch_mutex);
11178         return ret;
11179 }
11180
11181 /**
11182  * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11183  * @vsi: VSI pointer
11184  * @free_qvectors: a bool to specify if q_vectors need to be freed.
11185  *
11186  * On error: returns error code (negative)
11187  * On success: returns 0
11188  **/
11189 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11190 {
11191         /* free the ring and vector containers */
11192         if (free_qvectors) {
11193                 kfree(vsi->q_vectors);
11194                 vsi->q_vectors = NULL;
11195         }
11196         kfree(vsi->tx_rings);
11197         vsi->tx_rings = NULL;
11198         vsi->rx_rings = NULL;
11199         vsi->xdp_rings = NULL;
11200 }
11201
11202 /**
11203  * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11204  * and lookup table
11205  * @vsi: Pointer to VSI structure
11206  */
11207 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11208 {
11209         if (!vsi)
11210                 return;
11211
11212         kfree(vsi->rss_hkey_user);
11213         vsi->rss_hkey_user = NULL;
11214
11215         kfree(vsi->rss_lut_user);
11216         vsi->rss_lut_user = NULL;
11217 }
11218
11219 /**
11220  * i40e_vsi_clear - Deallocate the VSI provided
11221  * @vsi: the VSI being un-configured
11222  **/
11223 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11224 {
11225         struct i40e_pf *pf;
11226
11227         if (!vsi)
11228                 return 0;
11229
11230         if (!vsi->back)
11231                 goto free_vsi;
11232         pf = vsi->back;
11233
11234         mutex_lock(&pf->switch_mutex);
11235         if (!pf->vsi[vsi->idx]) {
11236                 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11237                         vsi->idx, vsi->idx, vsi->type);
11238                 goto unlock_vsi;
11239         }
11240
11241         if (pf->vsi[vsi->idx] != vsi) {
11242                 dev_err(&pf->pdev->dev,
11243                         "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11244                         pf->vsi[vsi->idx]->idx,
11245                         pf->vsi[vsi->idx]->type,
11246                         vsi->idx, vsi->type);
11247                 goto unlock_vsi;
11248         }
11249
11250         /* updates the PF for this cleared vsi */
11251         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11252         i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11253
11254         bitmap_free(vsi->af_xdp_zc_qps);
11255         i40e_vsi_free_arrays(vsi, true);
11256         i40e_clear_rss_config_user(vsi);
11257
11258         pf->vsi[vsi->idx] = NULL;
11259         if (vsi->idx < pf->next_vsi)
11260                 pf->next_vsi = vsi->idx;
11261
11262 unlock_vsi:
11263         mutex_unlock(&pf->switch_mutex);
11264 free_vsi:
11265         kfree(vsi);
11266
11267         return 0;
11268 }
11269
11270 /**
11271  * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11272  * @vsi: the VSI being cleaned
11273  **/
11274 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11275 {
11276         int i;
11277
11278         if (vsi->tx_rings && vsi->tx_rings[0]) {
11279                 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11280                         kfree_rcu(vsi->tx_rings[i], rcu);
11281                         WRITE_ONCE(vsi->tx_rings[i], NULL);
11282                         WRITE_ONCE(vsi->rx_rings[i], NULL);
11283                         if (vsi->xdp_rings)
11284                                 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11285                 }
11286         }
11287 }
11288
11289 /**
11290  * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11291  * @vsi: the VSI being configured
11292  **/
11293 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11294 {
11295         int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11296         struct i40e_pf *pf = vsi->back;
11297         struct i40e_ring *ring;
11298
11299         /* Set basic values in the rings to be used later during open() */
11300         for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11301                 /* allocate space for both Tx and Rx in one shot */
11302                 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11303                 if (!ring)
11304                         goto err_out;
11305
11306                 ring->queue_index = i;
11307                 ring->reg_idx = vsi->base_queue + i;
11308                 ring->ring_active = false;
11309                 ring->vsi = vsi;
11310                 ring->netdev = vsi->netdev;
11311                 ring->dev = &pf->pdev->dev;
11312                 ring->count = vsi->num_tx_desc;
11313                 ring->size = 0;
11314                 ring->dcb_tc = 0;
11315                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11316                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11317                 ring->itr_setting = pf->tx_itr_default;
11318                 WRITE_ONCE(vsi->tx_rings[i], ring++);
11319
11320                 if (!i40e_enabled_xdp_vsi(vsi))
11321                         goto setup_rx;
11322
11323                 ring->queue_index = vsi->alloc_queue_pairs + i;
11324                 ring->reg_idx = vsi->base_queue + ring->queue_index;
11325                 ring->ring_active = false;
11326                 ring->vsi = vsi;
11327                 ring->netdev = NULL;
11328                 ring->dev = &pf->pdev->dev;
11329                 ring->count = vsi->num_tx_desc;
11330                 ring->size = 0;
11331                 ring->dcb_tc = 0;
11332                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11333                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11334                 set_ring_xdp(ring);
11335                 ring->itr_setting = pf->tx_itr_default;
11336                 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11337
11338 setup_rx:
11339                 ring->queue_index = i;
11340                 ring->reg_idx = vsi->base_queue + i;
11341                 ring->ring_active = false;
11342                 ring->vsi = vsi;
11343                 ring->netdev = vsi->netdev;
11344                 ring->dev = &pf->pdev->dev;
11345                 ring->count = vsi->num_rx_desc;
11346                 ring->size = 0;
11347                 ring->dcb_tc = 0;
11348                 ring->itr_setting = pf->rx_itr_default;
11349                 WRITE_ONCE(vsi->rx_rings[i], ring);
11350         }
11351
11352         return 0;
11353
11354 err_out:
11355         i40e_vsi_clear_rings(vsi);
11356         return -ENOMEM;
11357 }
11358
11359 /**
11360  * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11361  * @pf: board private structure
11362  * @vectors: the number of MSI-X vectors to request
11363  *
11364  * Returns the number of vectors reserved, or error
11365  **/
11366 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11367 {
11368         vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11369                                         I40E_MIN_MSIX, vectors);
11370         if (vectors < 0) {
11371                 dev_info(&pf->pdev->dev,
11372                          "MSI-X vector reservation failed: %d\n", vectors);
11373                 vectors = 0;
11374         }
11375
11376         return vectors;
11377 }
11378
11379 /**
11380  * i40e_init_msix - Setup the MSIX capability
11381  * @pf: board private structure
11382  *
11383  * Work with the OS to set up the MSIX vectors needed.
11384  *
11385  * Returns the number of vectors reserved or negative on failure
11386  **/
11387 static int i40e_init_msix(struct i40e_pf *pf)
11388 {
11389         struct i40e_hw *hw = &pf->hw;
11390         int cpus, extra_vectors;
11391         int vectors_left;
11392         int v_budget, i;
11393         int v_actual;
11394         int iwarp_requested = 0;
11395
11396         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11397                 return -ENODEV;
11398
11399         /* The number of vectors we'll request will be comprised of:
11400          *   - Add 1 for "other" cause for Admin Queue events, etc.
11401          *   - The number of LAN queue pairs
11402          *      - Queues being used for RSS.
11403          *              We don't need as many as max_rss_size vectors.
11404          *              use rss_size instead in the calculation since that
11405          *              is governed by number of cpus in the system.
11406          *      - assumes symmetric Tx/Rx pairing
11407          *   - The number of VMDq pairs
11408          *   - The CPU count within the NUMA node if iWARP is enabled
11409          * Once we count this up, try the request.
11410          *
11411          * If we can't get what we want, we'll simplify to nearly nothing
11412          * and try again.  If that still fails, we punt.
11413          */
11414         vectors_left = hw->func_caps.num_msix_vectors;
11415         v_budget = 0;
11416
11417         /* reserve one vector for miscellaneous handler */
11418         if (vectors_left) {
11419                 v_budget++;
11420                 vectors_left--;
11421         }
11422
11423         /* reserve some vectors for the main PF traffic queues. Initially we
11424          * only reserve at most 50% of the available vectors, in the case that
11425          * the number of online CPUs is large. This ensures that we can enable
11426          * extra features as well. Once we've enabled the other features, we
11427          * will use any remaining vectors to reach as close as we can to the
11428          * number of online CPUs.
11429          */
11430         cpus = num_online_cpus();
11431         pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11432         vectors_left -= pf->num_lan_msix;
11433
11434         /* reserve one vector for sideband flow director */
11435         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11436                 if (vectors_left) {
11437                         pf->num_fdsb_msix = 1;
11438                         v_budget++;
11439                         vectors_left--;
11440                 } else {
11441                         pf->num_fdsb_msix = 0;
11442                 }
11443         }
11444
11445         /* can we reserve enough for iWARP? */
11446         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11447                 iwarp_requested = pf->num_iwarp_msix;
11448
11449                 if (!vectors_left)
11450                         pf->num_iwarp_msix = 0;
11451                 else if (vectors_left < pf->num_iwarp_msix)
11452                         pf->num_iwarp_msix = 1;
11453                 v_budget += pf->num_iwarp_msix;
11454                 vectors_left -= pf->num_iwarp_msix;
11455         }
11456
11457         /* any vectors left over go for VMDq support */
11458         if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11459                 if (!vectors_left) {
11460                         pf->num_vmdq_msix = 0;
11461                         pf->num_vmdq_qps = 0;
11462                 } else {
11463                         int vmdq_vecs_wanted =
11464                                 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11465                         int vmdq_vecs =
11466                                 min_t(int, vectors_left, vmdq_vecs_wanted);
11467
11468                         /* if we're short on vectors for what's desired, we limit
11469                          * the queues per vmdq.  If this is still more than are
11470                          * available, the user will need to change the number of
11471                          * queues/vectors used by the PF later with the ethtool
11472                          * channels command
11473                          */
11474                         if (vectors_left < vmdq_vecs_wanted) {
11475                                 pf->num_vmdq_qps = 1;
11476                                 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11477                                 vmdq_vecs = min_t(int,
11478                                                   vectors_left,
11479                                                   vmdq_vecs_wanted);
11480                         }
11481                         pf->num_vmdq_msix = pf->num_vmdq_qps;
11482
11483                         v_budget += vmdq_vecs;
11484                         vectors_left -= vmdq_vecs;
11485                 }
11486         }
11487
11488         /* On systems with a large number of SMP cores, we previously limited
11489          * the number of vectors for num_lan_msix to be at most 50% of the
11490          * available vectors, to allow for other features. Now, we add back
11491          * the remaining vectors. However, we ensure that the total
11492          * num_lan_msix will not exceed num_online_cpus(). To do this, we
11493          * calculate the number of vectors we can add without going over the
11494          * cap of CPUs. For systems with a small number of CPUs this will be
11495          * zero.
11496          */
11497         extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11498         pf->num_lan_msix += extra_vectors;
11499         vectors_left -= extra_vectors;
11500
11501         WARN(vectors_left < 0,
11502              "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11503
11504         v_budget += pf->num_lan_msix;
11505         pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11506                                    GFP_KERNEL);
11507         if (!pf->msix_entries)
11508                 return -ENOMEM;
11509
11510         for (i = 0; i < v_budget; i++)
11511                 pf->msix_entries[i].entry = i;
11512         v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11513
11514         if (v_actual < I40E_MIN_MSIX) {
11515                 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11516                 kfree(pf->msix_entries);
11517                 pf->msix_entries = NULL;
11518                 pci_disable_msix(pf->pdev);
11519                 return -ENODEV;
11520
11521         } else if (v_actual == I40E_MIN_MSIX) {
11522                 /* Adjust for minimal MSIX use */
11523                 pf->num_vmdq_vsis = 0;
11524                 pf->num_vmdq_qps = 0;
11525                 pf->num_lan_qps = 1;
11526                 pf->num_lan_msix = 1;
11527
11528         } else if (v_actual != v_budget) {
11529                 /* If we have limited resources, we will start with no vectors
11530                  * for the special features and then allocate vectors to some
11531                  * of these features based on the policy and at the end disable
11532                  * the features that did not get any vectors.
11533                  */
11534                 int vec;
11535
11536                 dev_info(&pf->pdev->dev,
11537                          "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11538                          v_actual, v_budget);
11539                 /* reserve the misc vector */
11540                 vec = v_actual - 1;
11541
11542                 /* Scale vector usage down */
11543                 pf->num_vmdq_msix = 1;    /* force VMDqs to only one vector */
11544                 pf->num_vmdq_vsis = 1;
11545                 pf->num_vmdq_qps = 1;
11546
11547                 /* partition out the remaining vectors */
11548                 switch (vec) {
11549                 case 2:
11550                         pf->num_lan_msix = 1;
11551                         break;
11552                 case 3:
11553                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11554                                 pf->num_lan_msix = 1;
11555                                 pf->num_iwarp_msix = 1;
11556                         } else {
11557                                 pf->num_lan_msix = 2;
11558                         }
11559                         break;
11560                 default:
11561                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11562                                 pf->num_iwarp_msix = min_t(int, (vec / 3),
11563                                                  iwarp_requested);
11564                                 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11565                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11566                         } else {
11567                                 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11568                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11569                         }
11570                         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11571                                 pf->num_fdsb_msix = 1;
11572                                 vec--;
11573                         }
11574                         pf->num_lan_msix = min_t(int,
11575                                (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11576                                                               pf->num_lan_msix);
11577                         pf->num_lan_qps = pf->num_lan_msix;
11578                         break;
11579                 }
11580         }
11581
11582         if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11583             (pf->num_fdsb_msix == 0)) {
11584                 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11585                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11586                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11587         }
11588         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11589             (pf->num_vmdq_msix == 0)) {
11590                 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11591                 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11592         }
11593
11594         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11595             (pf->num_iwarp_msix == 0)) {
11596                 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11597                 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11598         }
11599         i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11600                    "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11601                    pf->num_lan_msix,
11602                    pf->num_vmdq_msix * pf->num_vmdq_vsis,
11603                    pf->num_fdsb_msix,
11604                    pf->num_iwarp_msix);
11605
11606         return v_actual;
11607 }
11608
11609 /**
11610  * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11611  * @vsi: the VSI being configured
11612  * @v_idx: index of the vector in the vsi struct
11613  *
11614  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
11615  **/
11616 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11617 {
11618         struct i40e_q_vector *q_vector;
11619
11620         /* allocate q_vector */
11621         q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11622         if (!q_vector)
11623                 return -ENOMEM;
11624
11625         q_vector->vsi = vsi;
11626         q_vector->v_idx = v_idx;
11627         cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11628
11629         if (vsi->netdev)
11630                 netif_napi_add(vsi->netdev, &q_vector->napi,
11631                                i40e_napi_poll, NAPI_POLL_WEIGHT);
11632
11633         /* tie q_vector and vsi together */
11634         vsi->q_vectors[v_idx] = q_vector;
11635
11636         return 0;
11637 }
11638
11639 /**
11640  * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11641  * @vsi: the VSI being configured
11642  *
11643  * We allocate one q_vector per queue interrupt.  If allocation fails we
11644  * return -ENOMEM.
11645  **/
11646 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11647 {
11648         struct i40e_pf *pf = vsi->back;
11649         int err, v_idx, num_q_vectors;
11650
11651         /* if not MSIX, give the one vector only to the LAN VSI */
11652         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11653                 num_q_vectors = vsi->num_q_vectors;
11654         else if (vsi == pf->vsi[pf->lan_vsi])
11655                 num_q_vectors = 1;
11656         else
11657                 return -EINVAL;
11658
11659         for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11660                 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
11661                 if (err)
11662                         goto err_out;
11663         }
11664
11665         return 0;
11666
11667 err_out:
11668         while (v_idx--)
11669                 i40e_free_q_vector(vsi, v_idx);
11670
11671         return err;
11672 }
11673
11674 /**
11675  * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11676  * @pf: board private structure to initialize
11677  **/
11678 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11679 {
11680         int vectors = 0;
11681         ssize_t size;
11682
11683         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11684                 vectors = i40e_init_msix(pf);
11685                 if (vectors < 0) {
11686                         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED   |
11687                                        I40E_FLAG_IWARP_ENABLED  |
11688                                        I40E_FLAG_RSS_ENABLED    |
11689                                        I40E_FLAG_DCB_CAPABLE    |
11690                                        I40E_FLAG_DCB_ENABLED    |
11691                                        I40E_FLAG_SRIOV_ENABLED  |
11692                                        I40E_FLAG_FD_SB_ENABLED  |
11693                                        I40E_FLAG_FD_ATR_ENABLED |
11694                                        I40E_FLAG_VMDQ_ENABLED);
11695                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11696
11697                         /* rework the queue expectations without MSIX */
11698                         i40e_determine_queue_usage(pf);
11699                 }
11700         }
11701
11702         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11703             (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11704                 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11705                 vectors = pci_enable_msi(pf->pdev);
11706                 if (vectors < 0) {
11707                         dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11708                                  vectors);
11709                         pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11710                 }
11711                 vectors = 1;  /* one MSI or Legacy vector */
11712         }
11713
11714         if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11715                 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11716
11717         /* set up vector assignment tracking */
11718         size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11719         pf->irq_pile = kzalloc(size, GFP_KERNEL);
11720         if (!pf->irq_pile)
11721                 return -ENOMEM;
11722
11723         pf->irq_pile->num_entries = vectors;
11724         pf->irq_pile->search_hint = 0;
11725
11726         /* track first vector for misc interrupts, ignore return */
11727         (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11728
11729         return 0;
11730 }
11731
11732 /**
11733  * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11734  * @pf: private board data structure
11735  *
11736  * Restore the interrupt scheme that was cleared when we suspended the
11737  * device. This should be called during resume to re-allocate the q_vectors
11738  * and reacquire IRQs.
11739  */
11740 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11741 {
11742         int err, i;
11743
11744         /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11745          * scheme. We need to re-enabled them here in order to attempt to
11746          * re-acquire the MSI or MSI-X vectors
11747          */
11748         pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11749
11750         err = i40e_init_interrupt_scheme(pf);
11751         if (err)
11752                 return err;
11753
11754         /* Now that we've re-acquired IRQs, we need to remap the vectors and
11755          * rings together again.
11756          */
11757         for (i = 0; i < pf->num_alloc_vsi; i++) {
11758                 if (pf->vsi[i]) {
11759                         err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11760                         if (err)
11761                                 goto err_unwind;
11762                         i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11763                 }
11764         }
11765
11766         err = i40e_setup_misc_vector(pf);
11767         if (err)
11768                 goto err_unwind;
11769
11770         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11771                 i40e_client_update_msix_info(pf);
11772
11773         return 0;
11774
11775 err_unwind:
11776         while (i--) {
11777                 if (pf->vsi[i])
11778                         i40e_vsi_free_q_vectors(pf->vsi[i]);
11779         }
11780
11781         return err;
11782 }
11783
11784 /**
11785  * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11786  * non queue events in recovery mode
11787  * @pf: board private structure
11788  *
11789  * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11790  * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11791  * This is handled differently than in recovery mode since no Tx/Rx resources
11792  * are being allocated.
11793  **/
11794 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11795 {
11796         int err;
11797
11798         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11799                 err = i40e_setup_misc_vector(pf);
11800
11801                 if (err) {
11802                         dev_info(&pf->pdev->dev,
11803                                  "MSI-X misc vector request failed, error %d\n",
11804                                  err);
11805                         return err;
11806                 }
11807         } else {
11808                 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11809
11810                 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11811                                   pf->int_name, pf);
11812
11813                 if (err) {
11814                         dev_info(&pf->pdev->dev,
11815                                  "MSI/legacy misc vector request failed, error %d\n",
11816                                  err);
11817                         return err;
11818                 }
11819                 i40e_enable_misc_int_causes(pf);
11820                 i40e_irq_dynamic_enable_icr0(pf);
11821         }
11822
11823         return 0;
11824 }
11825
11826 /**
11827  * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11828  * @pf: board private structure
11829  *
11830  * This sets up the handler for MSIX 0, which is used to manage the
11831  * non-queue interrupts, e.g. AdminQ and errors.  This is not used
11832  * when in MSI or Legacy interrupt mode.
11833  **/
11834 static int i40e_setup_misc_vector(struct i40e_pf *pf)
11835 {
11836         struct i40e_hw *hw = &pf->hw;
11837         int err = 0;
11838
11839         /* Only request the IRQ once, the first time through. */
11840         if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
11841                 err = request_irq(pf->msix_entries[0].vector,
11842                                   i40e_intr, 0, pf->int_name, pf);
11843                 if (err) {
11844                         clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
11845                         dev_info(&pf->pdev->dev,
11846                                  "request_irq for %s failed: %d\n",
11847                                  pf->int_name, err);
11848                         return -EFAULT;
11849                 }
11850         }
11851
11852         i40e_enable_misc_int_causes(pf);
11853
11854         /* associate no queues to the misc vector */
11855         wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
11856         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
11857
11858         i40e_flush(hw);
11859
11860         i40e_irq_dynamic_enable_icr0(pf);
11861
11862         return err;
11863 }
11864
11865 /**
11866  * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
11867  * @vsi: Pointer to vsi structure
11868  * @seed: Buffter to store the hash keys
11869  * @lut: Buffer to store the lookup table entries
11870  * @lut_size: Size of buffer to store the lookup table entries
11871  *
11872  * Return 0 on success, negative on failure
11873  */
11874 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
11875                            u8 *lut, u16 lut_size)
11876 {
11877         struct i40e_pf *pf = vsi->back;
11878         struct i40e_hw *hw = &pf->hw;
11879         int ret = 0;
11880
11881         if (seed) {
11882                 ret = i40e_aq_get_rss_key(hw, vsi->id,
11883                         (struct i40e_aqc_get_set_rss_key_data *)seed);
11884                 if (ret) {
11885                         dev_info(&pf->pdev->dev,
11886                                  "Cannot get RSS key, err %s aq_err %s\n",
11887                                  i40e_stat_str(&pf->hw, ret),
11888                                  i40e_aq_str(&pf->hw,
11889                                              pf->hw.aq.asq_last_status));
11890                         return ret;
11891                 }
11892         }
11893
11894         if (lut) {
11895                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
11896
11897                 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11898                 if (ret) {
11899                         dev_info(&pf->pdev->dev,
11900                                  "Cannot get RSS lut, err %s aq_err %s\n",
11901                                  i40e_stat_str(&pf->hw, ret),
11902                                  i40e_aq_str(&pf->hw,
11903                                              pf->hw.aq.asq_last_status));
11904                         return ret;
11905                 }
11906         }
11907
11908         return ret;
11909 }
11910
11911 /**
11912  * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
11913  * @vsi: Pointer to vsi structure
11914  * @seed: RSS hash seed
11915  * @lut: Lookup table
11916  * @lut_size: Lookup table size
11917  *
11918  * Returns 0 on success, negative on failure
11919  **/
11920 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
11921                                const u8 *lut, u16 lut_size)
11922 {
11923         struct i40e_pf *pf = vsi->back;
11924         struct i40e_hw *hw = &pf->hw;
11925         u16 vf_id = vsi->vf_id;
11926         u8 i;
11927
11928         /* Fill out hash function seed */
11929         if (seed) {
11930                 u32 *seed_dw = (u32 *)seed;
11931
11932                 if (vsi->type == I40E_VSI_MAIN) {
11933                         for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11934                                 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
11935                 } else if (vsi->type == I40E_VSI_SRIOV) {
11936                         for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
11937                                 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
11938                 } else {
11939                         dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
11940                 }
11941         }
11942
11943         if (lut) {
11944                 u32 *lut_dw = (u32 *)lut;
11945
11946                 if (vsi->type == I40E_VSI_MAIN) {
11947                         if (lut_size != I40E_HLUT_ARRAY_SIZE)
11948                                 return -EINVAL;
11949                         for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11950                                 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
11951                 } else if (vsi->type == I40E_VSI_SRIOV) {
11952                         if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
11953                                 return -EINVAL;
11954                         for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11955                                 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
11956                 } else {
11957                         dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11958                 }
11959         }
11960         i40e_flush(hw);
11961
11962         return 0;
11963 }
11964
11965 /**
11966  * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
11967  * @vsi: Pointer to VSI structure
11968  * @seed: Buffer to store the keys
11969  * @lut: Buffer to store the lookup table entries
11970  * @lut_size: Size of buffer to store the lookup table entries
11971  *
11972  * Returns 0 on success, negative on failure
11973  */
11974 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
11975                             u8 *lut, u16 lut_size)
11976 {
11977         struct i40e_pf *pf = vsi->back;
11978         struct i40e_hw *hw = &pf->hw;
11979         u16 i;
11980
11981         if (seed) {
11982                 u32 *seed_dw = (u32 *)seed;
11983
11984                 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11985                         seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
11986         }
11987         if (lut) {
11988                 u32 *lut_dw = (u32 *)lut;
11989
11990                 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11991                         return -EINVAL;
11992                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11993                         lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
11994         }
11995
11996         return 0;
11997 }
11998
11999 /**
12000  * i40e_config_rss - Configure RSS keys and lut
12001  * @vsi: Pointer to VSI structure
12002  * @seed: RSS hash seed
12003  * @lut: Lookup table
12004  * @lut_size: Lookup table size
12005  *
12006  * Returns 0 on success, negative on failure
12007  */
12008 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12009 {
12010         struct i40e_pf *pf = vsi->back;
12011
12012         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12013                 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12014         else
12015                 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12016 }
12017
12018 /**
12019  * i40e_get_rss - Get RSS keys and lut
12020  * @vsi: Pointer to VSI structure
12021  * @seed: Buffer to store the keys
12022  * @lut: Buffer to store the lookup table entries
12023  * @lut_size: Size of buffer to store the lookup table entries
12024  *
12025  * Returns 0 on success, negative on failure
12026  */
12027 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12028 {
12029         struct i40e_pf *pf = vsi->back;
12030
12031         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12032                 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12033         else
12034                 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12035 }
12036
12037 /**
12038  * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12039  * @pf: Pointer to board private structure
12040  * @lut: Lookup table
12041  * @rss_table_size: Lookup table size
12042  * @rss_size: Range of queue number for hashing
12043  */
12044 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12045                        u16 rss_table_size, u16 rss_size)
12046 {
12047         u16 i;
12048
12049         for (i = 0; i < rss_table_size; i++)
12050                 lut[i] = i % rss_size;
12051 }
12052
12053 /**
12054  * i40e_pf_config_rss - Prepare for RSS if used
12055  * @pf: board private structure
12056  **/
12057 static int i40e_pf_config_rss(struct i40e_pf *pf)
12058 {
12059         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12060         u8 seed[I40E_HKEY_ARRAY_SIZE];
12061         u8 *lut;
12062         struct i40e_hw *hw = &pf->hw;
12063         u32 reg_val;
12064         u64 hena;
12065         int ret;
12066
12067         /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12068         hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12069                 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12070         hena |= i40e_pf_get_default_rss_hena(pf);
12071
12072         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12073         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12074
12075         /* Determine the RSS table size based on the hardware capabilities */
12076         reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12077         reg_val = (pf->rss_table_size == 512) ?
12078                         (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12079                         (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12080         i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12081
12082         /* Determine the RSS size of the VSI */
12083         if (!vsi->rss_size) {
12084                 u16 qcount;
12085                 /* If the firmware does something weird during VSI init, we
12086                  * could end up with zero TCs. Check for that to avoid
12087                  * divide-by-zero. It probably won't pass traffic, but it also
12088                  * won't panic.
12089                  */
12090                 qcount = vsi->num_queue_pairs /
12091                          (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12092                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12093         }
12094         if (!vsi->rss_size)
12095                 return -EINVAL;
12096
12097         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12098         if (!lut)
12099                 return -ENOMEM;
12100
12101         /* Use user configured lut if there is one, otherwise use default */
12102         if (vsi->rss_lut_user)
12103                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12104         else
12105                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12106
12107         /* Use user configured hash key if there is one, otherwise
12108          * use default.
12109          */
12110         if (vsi->rss_hkey_user)
12111                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12112         else
12113                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12114         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12115         kfree(lut);
12116
12117         return ret;
12118 }
12119
12120 /**
12121  * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12122  * @pf: board private structure
12123  * @queue_count: the requested queue count for rss.
12124  *
12125  * returns 0 if rss is not enabled, if enabled returns the final rss queue
12126  * count which may be different from the requested queue count.
12127  * Note: expects to be called while under rtnl_lock()
12128  **/
12129 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12130 {
12131         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12132         int new_rss_size;
12133
12134         if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12135                 return 0;
12136
12137         queue_count = min_t(int, queue_count, num_online_cpus());
12138         new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12139
12140         if (queue_count != vsi->num_queue_pairs) {
12141                 u16 qcount;
12142
12143                 vsi->req_queue_pairs = queue_count;
12144                 i40e_prep_for_reset(pf);
12145
12146                 pf->alloc_rss_size = new_rss_size;
12147
12148                 i40e_reset_and_rebuild(pf, true, true);
12149
12150                 /* Discard the user configured hash keys and lut, if less
12151                  * queues are enabled.
12152                  */
12153                 if (queue_count < vsi->rss_size) {
12154                         i40e_clear_rss_config_user(vsi);
12155                         dev_dbg(&pf->pdev->dev,
12156                                 "discard user configured hash keys and lut\n");
12157                 }
12158
12159                 /* Reset vsi->rss_size, as number of enabled queues changed */
12160                 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12161                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12162
12163                 i40e_pf_config_rss(pf);
12164         }
12165         dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count:  %d/%d\n",
12166                  vsi->req_queue_pairs, pf->rss_size_max);
12167         return pf->alloc_rss_size;
12168 }
12169
12170 /**
12171  * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12172  * @pf: board private structure
12173  **/
12174 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
12175 {
12176         i40e_status status;
12177         bool min_valid, max_valid;
12178         u32 max_bw, min_bw;
12179
12180         status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12181                                            &min_valid, &max_valid);
12182
12183         if (!status) {
12184                 if (min_valid)
12185                         pf->min_bw = min_bw;
12186                 if (max_valid)
12187                         pf->max_bw = max_bw;
12188         }
12189
12190         return status;
12191 }
12192
12193 /**
12194  * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12195  * @pf: board private structure
12196  **/
12197 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
12198 {
12199         struct i40e_aqc_configure_partition_bw_data bw_data;
12200         i40e_status status;
12201
12202         memset(&bw_data, 0, sizeof(bw_data));
12203
12204         /* Set the valid bit for this PF */
12205         bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12206         bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12207         bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12208
12209         /* Set the new bandwidths */
12210         status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12211
12212         return status;
12213 }
12214
12215 /**
12216  * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12217  * @pf: board private structure
12218  **/
12219 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12220 {
12221         /* Commit temporary BW setting to permanent NVM image */
12222         enum i40e_admin_queue_err last_aq_status;
12223         i40e_status ret;
12224         u16 nvm_word;
12225
12226         if (pf->hw.partition_id != 1) {
12227                 dev_info(&pf->pdev->dev,
12228                          "Commit BW only works on partition 1! This is partition %d",
12229                          pf->hw.partition_id);
12230                 ret = I40E_NOT_SUPPORTED;
12231                 goto bw_commit_out;
12232         }
12233
12234         /* Acquire NVM for read access */
12235         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12236         last_aq_status = pf->hw.aq.asq_last_status;
12237         if (ret) {
12238                 dev_info(&pf->pdev->dev,
12239                          "Cannot acquire NVM for read access, err %s aq_err %s\n",
12240                          i40e_stat_str(&pf->hw, ret),
12241                          i40e_aq_str(&pf->hw, last_aq_status));
12242                 goto bw_commit_out;
12243         }
12244
12245         /* Read word 0x10 of NVM - SW compatibility word 1 */
12246         ret = i40e_aq_read_nvm(&pf->hw,
12247                                I40E_SR_NVM_CONTROL_WORD,
12248                                0x10, sizeof(nvm_word), &nvm_word,
12249                                false, NULL);
12250         /* Save off last admin queue command status before releasing
12251          * the NVM
12252          */
12253         last_aq_status = pf->hw.aq.asq_last_status;
12254         i40e_release_nvm(&pf->hw);
12255         if (ret) {
12256                 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
12257                          i40e_stat_str(&pf->hw, ret),
12258                          i40e_aq_str(&pf->hw, last_aq_status));
12259                 goto bw_commit_out;
12260         }
12261
12262         /* Wait a bit for NVM release to complete */
12263         msleep(50);
12264
12265         /* Acquire NVM for write access */
12266         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12267         last_aq_status = pf->hw.aq.asq_last_status;
12268         if (ret) {
12269                 dev_info(&pf->pdev->dev,
12270                          "Cannot acquire NVM for write access, err %s aq_err %s\n",
12271                          i40e_stat_str(&pf->hw, ret),
12272                          i40e_aq_str(&pf->hw, last_aq_status));
12273                 goto bw_commit_out;
12274         }
12275         /* Write it back out unchanged to initiate update NVM,
12276          * which will force a write of the shadow (alt) RAM to
12277          * the NVM - thus storing the bandwidth values permanently.
12278          */
12279         ret = i40e_aq_update_nvm(&pf->hw,
12280                                  I40E_SR_NVM_CONTROL_WORD,
12281                                  0x10, sizeof(nvm_word),
12282                                  &nvm_word, true, 0, NULL);
12283         /* Save off last admin queue command status before releasing
12284          * the NVM
12285          */
12286         last_aq_status = pf->hw.aq.asq_last_status;
12287         i40e_release_nvm(&pf->hw);
12288         if (ret)
12289                 dev_info(&pf->pdev->dev,
12290                          "BW settings NOT SAVED, err %s aq_err %s\n",
12291                          i40e_stat_str(&pf->hw, ret),
12292                          i40e_aq_str(&pf->hw, last_aq_status));
12293 bw_commit_out:
12294
12295         return ret;
12296 }
12297
12298 /**
12299  * i40e_is_total_port_shutdown_enabled - read NVM and return value
12300  * if total port shutdown feature is enabled for this PF
12301  * @pf: board private structure
12302  **/
12303 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12304 {
12305 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED        BIT(4)
12306 #define I40E_FEATURES_ENABLE_PTR                0x2A
12307 #define I40E_CURRENT_SETTING_PTR                0x2B
12308 #define I40E_LINK_BEHAVIOR_WORD_OFFSET          0x2D
12309 #define I40E_LINK_BEHAVIOR_WORD_LENGTH          0x1
12310 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED    BIT(0)
12311 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH      4
12312         i40e_status read_status = I40E_SUCCESS;
12313         u16 sr_emp_sr_settings_ptr = 0;
12314         u16 features_enable = 0;
12315         u16 link_behavior = 0;
12316         bool ret = false;
12317
12318         read_status = i40e_read_nvm_word(&pf->hw,
12319                                          I40E_SR_EMP_SR_SETTINGS_PTR,
12320                                          &sr_emp_sr_settings_ptr);
12321         if (read_status)
12322                 goto err_nvm;
12323         read_status = i40e_read_nvm_word(&pf->hw,
12324                                          sr_emp_sr_settings_ptr +
12325                                          I40E_FEATURES_ENABLE_PTR,
12326                                          &features_enable);
12327         if (read_status)
12328                 goto err_nvm;
12329         if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12330                 read_status = i40e_read_nvm_module_data(&pf->hw,
12331                                                         I40E_SR_EMP_SR_SETTINGS_PTR,
12332                                                         I40E_CURRENT_SETTING_PTR,
12333                                                         I40E_LINK_BEHAVIOR_WORD_OFFSET,
12334                                                         I40E_LINK_BEHAVIOR_WORD_LENGTH,
12335                                                         &link_behavior);
12336                 if (read_status)
12337                         goto err_nvm;
12338                 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12339                 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12340         }
12341         return ret;
12342
12343 err_nvm:
12344         dev_warn(&pf->pdev->dev,
12345                  "total-port-shutdown feature is off due to read nvm error: %s\n",
12346                  i40e_stat_str(&pf->hw, read_status));
12347         return ret;
12348 }
12349
12350 /**
12351  * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12352  * @pf: board private structure to initialize
12353  *
12354  * i40e_sw_init initializes the Adapter private data structure.
12355  * Fields are initialized based on PCI device information and
12356  * OS network device settings (MTU size).
12357  **/
12358 static int i40e_sw_init(struct i40e_pf *pf)
12359 {
12360         int err = 0;
12361         int size;
12362
12363         /* Set default capability flags */
12364         pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12365                     I40E_FLAG_MSI_ENABLED     |
12366                     I40E_FLAG_MSIX_ENABLED;
12367
12368         /* Set default ITR */
12369         pf->rx_itr_default = I40E_ITR_RX_DEF;
12370         pf->tx_itr_default = I40E_ITR_TX_DEF;
12371
12372         /* Depending on PF configurations, it is possible that the RSS
12373          * maximum might end up larger than the available queues
12374          */
12375         pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12376         pf->alloc_rss_size = 1;
12377         pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12378         pf->rss_size_max = min_t(int, pf->rss_size_max,
12379                                  pf->hw.func_caps.num_tx_qp);
12380         if (pf->hw.func_caps.rss) {
12381                 pf->flags |= I40E_FLAG_RSS_ENABLED;
12382                 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12383                                            num_online_cpus());
12384         }
12385
12386         /* MFP mode enabled */
12387         if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12388                 pf->flags |= I40E_FLAG_MFP_ENABLED;
12389                 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12390                 if (i40e_get_partition_bw_setting(pf)) {
12391                         dev_warn(&pf->pdev->dev,
12392                                  "Could not get partition bw settings\n");
12393                 } else {
12394                         dev_info(&pf->pdev->dev,
12395                                  "Partition BW Min = %8.8x, Max = %8.8x\n",
12396                                  pf->min_bw, pf->max_bw);
12397
12398                         /* nudge the Tx scheduler */
12399                         i40e_set_partition_bw_setting(pf);
12400                 }
12401         }
12402
12403         if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12404             (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12405                 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12406                 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12407                 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12408                     pf->hw.num_partitions > 1)
12409                         dev_info(&pf->pdev->dev,
12410                                  "Flow Director Sideband mode Disabled in MFP mode\n");
12411                 else
12412                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12413                 pf->fdir_pf_filter_count =
12414                                  pf->hw.func_caps.fd_filters_guaranteed;
12415                 pf->hw.fdir_shared_filter_count =
12416                                  pf->hw.func_caps.fd_filters_best_effort;
12417         }
12418
12419         if (pf->hw.mac.type == I40E_MAC_X722) {
12420                 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12421                                     I40E_HW_128_QP_RSS_CAPABLE |
12422                                     I40E_HW_ATR_EVICT_CAPABLE |
12423                                     I40E_HW_WB_ON_ITR_CAPABLE |
12424                                     I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12425                                     I40E_HW_NO_PCI_LINK_CHECK |
12426                                     I40E_HW_USE_SET_LLDP_MIB |
12427                                     I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12428                                     I40E_HW_PTP_L4_CAPABLE |
12429                                     I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12430                                     I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12431
12432 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12433                 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12434                     I40E_FDEVICT_PCTYPE_DEFAULT) {
12435                         dev_warn(&pf->pdev->dev,
12436                                  "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12437                         pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12438                 }
12439         } else if ((pf->hw.aq.api_maj_ver > 1) ||
12440                    ((pf->hw.aq.api_maj_ver == 1) &&
12441                     (pf->hw.aq.api_min_ver > 4))) {
12442                 /* Supported in FW API version higher than 1.4 */
12443                 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12444         }
12445
12446         /* Enable HW ATR eviction if possible */
12447         if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12448                 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12449
12450         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12451             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12452             (pf->hw.aq.fw_maj_ver < 4))) {
12453                 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12454                 /* No DCB support  for FW < v4.33 */
12455                 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12456         }
12457
12458         /* Disable FW LLDP if FW < v4.3 */
12459         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12460             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12461             (pf->hw.aq.fw_maj_ver < 4)))
12462                 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12463
12464         /* Use the FW Set LLDP MIB API if FW > v4.40 */
12465         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12466             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12467             (pf->hw.aq.fw_maj_ver >= 5)))
12468                 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12469
12470         /* Enable PTP L4 if FW > v6.0 */
12471         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12472             pf->hw.aq.fw_maj_ver >= 6)
12473                 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12474
12475         if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12476                 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12477                 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12478                 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12479         }
12480
12481         if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12482                 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12483                 /* IWARP needs one extra vector for CQP just like MISC.*/
12484                 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12485         }
12486         /* Stopping FW LLDP engine is supported on XL710 and X722
12487          * starting from FW versions determined in i40e_init_adminq.
12488          * Stopping the FW LLDP engine is not supported on XL710
12489          * if NPAR is functioning so unset this hw flag in this case.
12490          */
12491         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12492             pf->hw.func_caps.npar_enable &&
12493             (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12494                 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12495
12496 #ifdef CONFIG_PCI_IOV
12497         if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12498                 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12499                 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12500                 pf->num_req_vfs = min_t(int,
12501                                         pf->hw.func_caps.num_vfs,
12502                                         I40E_MAX_VF_COUNT);
12503         }
12504 #endif /* CONFIG_PCI_IOV */
12505         pf->eeprom_version = 0xDEAD;
12506         pf->lan_veb = I40E_NO_VEB;
12507         pf->lan_vsi = I40E_NO_VSI;
12508
12509         /* By default FW has this off for performance reasons */
12510         pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12511
12512         /* set up queue assignment tracking */
12513         size = sizeof(struct i40e_lump_tracking)
12514                 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12515         pf->qp_pile = kzalloc(size, GFP_KERNEL);
12516         if (!pf->qp_pile) {
12517                 err = -ENOMEM;
12518                 goto sw_init_done;
12519         }
12520         pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12521         pf->qp_pile->search_hint = 0;
12522
12523         pf->tx_timeout_recovery_level = 1;
12524
12525         if (pf->hw.mac.type != I40E_MAC_X722 &&
12526             i40e_is_total_port_shutdown_enabled(pf)) {
12527                 /* Link down on close must be on when total port shutdown
12528                  * is enabled for a given port
12529                  */
12530                 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12531                               I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12532                 dev_info(&pf->pdev->dev,
12533                          "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12534         }
12535         mutex_init(&pf->switch_mutex);
12536
12537 sw_init_done:
12538         return err;
12539 }
12540
12541 /**
12542  * i40e_set_ntuple - set the ntuple feature flag and take action
12543  * @pf: board private structure to initialize
12544  * @features: the feature set that the stack is suggesting
12545  *
12546  * returns a bool to indicate if reset needs to happen
12547  **/
12548 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12549 {
12550         bool need_reset = false;
12551
12552         /* Check if Flow Director n-tuple support was enabled or disabled.  If
12553          * the state changed, we need to reset.
12554          */
12555         if (features & NETIF_F_NTUPLE) {
12556                 /* Enable filters and mark for reset */
12557                 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12558                         need_reset = true;
12559                 /* enable FD_SB only if there is MSI-X vector and no cloud
12560                  * filters exist
12561                  */
12562                 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12563                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12564                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12565                 }
12566         } else {
12567                 /* turn off filters, mark for reset and clear SW filter list */
12568                 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12569                         need_reset = true;
12570                         i40e_fdir_filter_exit(pf);
12571                 }
12572                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12573                 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12574                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12575
12576                 /* reset fd counters */
12577                 pf->fd_add_err = 0;
12578                 pf->fd_atr_cnt = 0;
12579                 /* if ATR was auto disabled it can be re-enabled. */
12580                 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12581                         if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12582                             (I40E_DEBUG_FD & pf->hw.debug_mask))
12583                                 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12584         }
12585         return need_reset;
12586 }
12587
12588 /**
12589  * i40e_clear_rss_lut - clear the rx hash lookup table
12590  * @vsi: the VSI being configured
12591  **/
12592 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12593 {
12594         struct i40e_pf *pf = vsi->back;
12595         struct i40e_hw *hw = &pf->hw;
12596         u16 vf_id = vsi->vf_id;
12597         u8 i;
12598
12599         if (vsi->type == I40E_VSI_MAIN) {
12600                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12601                         wr32(hw, I40E_PFQF_HLUT(i), 0);
12602         } else if (vsi->type == I40E_VSI_SRIOV) {
12603                 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12604                         i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12605         } else {
12606                 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12607         }
12608 }
12609
12610 /**
12611  * i40e_set_features - set the netdev feature flags
12612  * @netdev: ptr to the netdev being adjusted
12613  * @features: the feature set that the stack is suggesting
12614  * Note: expects to be called while under rtnl_lock()
12615  **/
12616 static int i40e_set_features(struct net_device *netdev,
12617                              netdev_features_t features)
12618 {
12619         struct i40e_netdev_priv *np = netdev_priv(netdev);
12620         struct i40e_vsi *vsi = np->vsi;
12621         struct i40e_pf *pf = vsi->back;
12622         bool need_reset;
12623
12624         if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12625                 i40e_pf_config_rss(pf);
12626         else if (!(features & NETIF_F_RXHASH) &&
12627                  netdev->features & NETIF_F_RXHASH)
12628                 i40e_clear_rss_lut(vsi);
12629
12630         if (features & NETIF_F_HW_VLAN_CTAG_RX)
12631                 i40e_vlan_stripping_enable(vsi);
12632         else
12633                 i40e_vlan_stripping_disable(vsi);
12634
12635         if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12636                 dev_err(&pf->pdev->dev,
12637                         "Offloaded tc filters active, can't turn hw_tc_offload off");
12638                 return -EINVAL;
12639         }
12640
12641         if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12642                 i40e_del_all_macvlans(vsi);
12643
12644         need_reset = i40e_set_ntuple(pf, features);
12645
12646         if (need_reset)
12647                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12648
12649         return 0;
12650 }
12651
12652 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12653                                     unsigned int table, unsigned int idx,
12654                                     struct udp_tunnel_info *ti)
12655 {
12656         struct i40e_netdev_priv *np = netdev_priv(netdev);
12657         struct i40e_hw *hw = &np->vsi->back->hw;
12658         u8 type, filter_index;
12659         i40e_status ret;
12660
12661         type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12662                                                    I40E_AQC_TUNNEL_TYPE_NGE;
12663
12664         ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12665                                      NULL);
12666         if (ret) {
12667                 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n",
12668                             i40e_stat_str(hw, ret),
12669                             i40e_aq_str(hw, hw->aq.asq_last_status));
12670                 return -EIO;
12671         }
12672
12673         udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
12674         return 0;
12675 }
12676
12677 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12678                                       unsigned int table, unsigned int idx,
12679                                       struct udp_tunnel_info *ti)
12680 {
12681         struct i40e_netdev_priv *np = netdev_priv(netdev);
12682         struct i40e_hw *hw = &np->vsi->back->hw;
12683         i40e_status ret;
12684
12685         ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
12686         if (ret) {
12687                 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n",
12688                             i40e_stat_str(hw, ret),
12689                             i40e_aq_str(hw, hw->aq.asq_last_status));
12690                 return -EIO;
12691         }
12692
12693         return 0;
12694 }
12695
12696 static int i40e_get_phys_port_id(struct net_device *netdev,
12697                                  struct netdev_phys_item_id *ppid)
12698 {
12699         struct i40e_netdev_priv *np = netdev_priv(netdev);
12700         struct i40e_pf *pf = np->vsi->back;
12701         struct i40e_hw *hw = &pf->hw;
12702
12703         if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12704                 return -EOPNOTSUPP;
12705
12706         ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12707         memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12708
12709         return 0;
12710 }
12711
12712 /**
12713  * i40e_ndo_fdb_add - add an entry to the hardware database
12714  * @ndm: the input from the stack
12715  * @tb: pointer to array of nladdr (unused)
12716  * @dev: the net device pointer
12717  * @addr: the MAC address entry being added
12718  * @vid: VLAN ID
12719  * @flags: instructions from stack about fdb operation
12720  * @extack: netlink extended ack, unused currently
12721  */
12722 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12723                             struct net_device *dev,
12724                             const unsigned char *addr, u16 vid,
12725                             u16 flags,
12726                             struct netlink_ext_ack *extack)
12727 {
12728         struct i40e_netdev_priv *np = netdev_priv(dev);
12729         struct i40e_pf *pf = np->vsi->back;
12730         int err = 0;
12731
12732         if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12733                 return -EOPNOTSUPP;
12734
12735         if (vid) {
12736                 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12737                 return -EINVAL;
12738         }
12739
12740         /* Hardware does not support aging addresses so if a
12741          * ndm_state is given only allow permanent addresses
12742          */
12743         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12744                 netdev_info(dev, "FDB only supports static addresses\n");
12745                 return -EINVAL;
12746         }
12747
12748         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12749                 err = dev_uc_add_excl(dev, addr);
12750         else if (is_multicast_ether_addr(addr))
12751                 err = dev_mc_add_excl(dev, addr);
12752         else
12753                 err = -EINVAL;
12754
12755         /* Only return duplicate errors if NLM_F_EXCL is set */
12756         if (err == -EEXIST && !(flags & NLM_F_EXCL))
12757                 err = 0;
12758
12759         return err;
12760 }
12761
12762 /**
12763  * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12764  * @dev: the netdev being configured
12765  * @nlh: RTNL message
12766  * @flags: bridge flags
12767  * @extack: netlink extended ack
12768  *
12769  * Inserts a new hardware bridge if not already created and
12770  * enables the bridging mode requested (VEB or VEPA). If the
12771  * hardware bridge has already been inserted and the request
12772  * is to change the mode then that requires a PF reset to
12773  * allow rebuild of the components with required hardware
12774  * bridge mode enabled.
12775  *
12776  * Note: expects to be called while under rtnl_lock()
12777  **/
12778 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12779                                    struct nlmsghdr *nlh,
12780                                    u16 flags,
12781                                    struct netlink_ext_ack *extack)
12782 {
12783         struct i40e_netdev_priv *np = netdev_priv(dev);
12784         struct i40e_vsi *vsi = np->vsi;
12785         struct i40e_pf *pf = vsi->back;
12786         struct i40e_veb *veb = NULL;
12787         struct nlattr *attr, *br_spec;
12788         int i, rem;
12789
12790         /* Only for PF VSI for now */
12791         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12792                 return -EOPNOTSUPP;
12793
12794         /* Find the HW bridge for PF VSI */
12795         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12796                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12797                         veb = pf->veb[i];
12798         }
12799
12800         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12801
12802         nla_for_each_nested(attr, br_spec, rem) {
12803                 __u16 mode;
12804
12805                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12806                         continue;
12807
12808                 mode = nla_get_u16(attr);
12809                 if ((mode != BRIDGE_MODE_VEPA) &&
12810                     (mode != BRIDGE_MODE_VEB))
12811                         return -EINVAL;
12812
12813                 /* Insert a new HW bridge */
12814                 if (!veb) {
12815                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12816                                              vsi->tc_config.enabled_tc);
12817                         if (veb) {
12818                                 veb->bridge_mode = mode;
12819                                 i40e_config_bridge_mode(veb);
12820                         } else {
12821                                 /* No Bridge HW offload available */
12822                                 return -ENOENT;
12823                         }
12824                         break;
12825                 } else if (mode != veb->bridge_mode) {
12826                         /* Existing HW bridge but different mode needs reset */
12827                         veb->bridge_mode = mode;
12828                         /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
12829                         if (mode == BRIDGE_MODE_VEB)
12830                                 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
12831                         else
12832                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12833                         i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12834                         break;
12835                 }
12836         }
12837
12838         return 0;
12839 }
12840
12841 /**
12842  * i40e_ndo_bridge_getlink - Get the hardware bridge mode
12843  * @skb: skb buff
12844  * @pid: process id
12845  * @seq: RTNL message seq #
12846  * @dev: the netdev being configured
12847  * @filter_mask: unused
12848  * @nlflags: netlink flags passed in
12849  *
12850  * Return the mode in which the hardware bridge is operating in
12851  * i.e VEB or VEPA.
12852  **/
12853 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
12854                                    struct net_device *dev,
12855                                    u32 __always_unused filter_mask,
12856                                    int nlflags)
12857 {
12858         struct i40e_netdev_priv *np = netdev_priv(dev);
12859         struct i40e_vsi *vsi = np->vsi;
12860         struct i40e_pf *pf = vsi->back;
12861         struct i40e_veb *veb = NULL;
12862         int i;
12863
12864         /* Only for PF VSI for now */
12865         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12866                 return -EOPNOTSUPP;
12867
12868         /* Find the HW bridge for the PF VSI */
12869         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12870                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12871                         veb = pf->veb[i];
12872         }
12873
12874         if (!veb)
12875                 return 0;
12876
12877         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
12878                                        0, 0, nlflags, filter_mask, NULL);
12879 }
12880
12881 /**
12882  * i40e_features_check - Validate encapsulated packet conforms to limits
12883  * @skb: skb buff
12884  * @dev: This physical port's netdev
12885  * @features: Offload features that the stack believes apply
12886  **/
12887 static netdev_features_t i40e_features_check(struct sk_buff *skb,
12888                                              struct net_device *dev,
12889                                              netdev_features_t features)
12890 {
12891         size_t len;
12892
12893         /* No point in doing any of this if neither checksum nor GSO are
12894          * being requested for this frame.  We can rule out both by just
12895          * checking for CHECKSUM_PARTIAL
12896          */
12897         if (skb->ip_summed != CHECKSUM_PARTIAL)
12898                 return features;
12899
12900         /* We cannot support GSO if the MSS is going to be less than
12901          * 64 bytes.  If it is then we need to drop support for GSO.
12902          */
12903         if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
12904                 features &= ~NETIF_F_GSO_MASK;
12905
12906         /* MACLEN can support at most 63 words */
12907         len = skb_network_header(skb) - skb->data;
12908         if (len & ~(63 * 2))
12909                 goto out_err;
12910
12911         /* IPLEN and EIPLEN can support at most 127 dwords */
12912         len = skb_transport_header(skb) - skb_network_header(skb);
12913         if (len & ~(127 * 4))
12914                 goto out_err;
12915
12916         if (skb->encapsulation) {
12917                 /* L4TUNLEN can support 127 words */
12918                 len = skb_inner_network_header(skb) - skb_transport_header(skb);
12919                 if (len & ~(127 * 2))
12920                         goto out_err;
12921
12922                 /* IPLEN can support at most 127 dwords */
12923                 len = skb_inner_transport_header(skb) -
12924                       skb_inner_network_header(skb);
12925                 if (len & ~(127 * 4))
12926                         goto out_err;
12927         }
12928
12929         /* No need to validate L4LEN as TCP is the only protocol with a
12930          * a flexible value and we support all possible values supported
12931          * by TCP, which is at most 15 dwords
12932          */
12933
12934         return features;
12935 out_err:
12936         return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
12937 }
12938
12939 /**
12940  * i40e_xdp_setup - add/remove an XDP program
12941  * @vsi: VSI to changed
12942  * @prog: XDP program
12943  * @extack: netlink extended ack
12944  **/
12945 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
12946                           struct netlink_ext_ack *extack)
12947 {
12948         int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
12949         struct i40e_pf *pf = vsi->back;
12950         struct bpf_prog *old_prog;
12951         bool need_reset;
12952         int i;
12953
12954         /* Don't allow frames that span over multiple buffers */
12955         if (frame_size > vsi->rx_buf_len) {
12956                 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP");
12957                 return -EINVAL;
12958         }
12959
12960         /* When turning XDP on->off/off->on we reset and rebuild the rings. */
12961         need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
12962
12963         if (need_reset)
12964                 i40e_prep_for_reset(pf);
12965
12966         old_prog = xchg(&vsi->xdp_prog, prog);
12967
12968         if (need_reset) {
12969                 if (!prog)
12970                         /* Wait until ndo_xsk_wakeup completes. */
12971                         synchronize_rcu();
12972                 i40e_reset_and_rebuild(pf, true, true);
12973         }
12974
12975         for (i = 0; i < vsi->num_queue_pairs; i++)
12976                 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
12977
12978         if (old_prog)
12979                 bpf_prog_put(old_prog);
12980
12981         /* Kick start the NAPI context if there is an AF_XDP socket open
12982          * on that queue id. This so that receiving will start.
12983          */
12984         if (need_reset && prog)
12985                 for (i = 0; i < vsi->num_queue_pairs; i++)
12986                         if (vsi->xdp_rings[i]->xsk_pool)
12987                                 (void)i40e_xsk_wakeup(vsi->netdev, i,
12988                                                       XDP_WAKEUP_RX);
12989
12990         return 0;
12991 }
12992
12993 /**
12994  * i40e_enter_busy_conf - Enters busy config state
12995  * @vsi: vsi
12996  *
12997  * Returns 0 on success, <0 for failure.
12998  **/
12999 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13000 {
13001         struct i40e_pf *pf = vsi->back;
13002         int timeout = 50;
13003
13004         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13005                 timeout--;
13006                 if (!timeout)
13007                         return -EBUSY;
13008                 usleep_range(1000, 2000);
13009         }
13010
13011         return 0;
13012 }
13013
13014 /**
13015  * i40e_exit_busy_conf - Exits busy config state
13016  * @vsi: vsi
13017  **/
13018 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13019 {
13020         struct i40e_pf *pf = vsi->back;
13021
13022         clear_bit(__I40E_CONFIG_BUSY, pf->state);
13023 }
13024
13025 /**
13026  * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13027  * @vsi: vsi
13028  * @queue_pair: queue pair
13029  **/
13030 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13031 {
13032         memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13033                sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13034         memset(&vsi->tx_rings[queue_pair]->stats, 0,
13035                sizeof(vsi->tx_rings[queue_pair]->stats));
13036         if (i40e_enabled_xdp_vsi(vsi)) {
13037                 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13038                        sizeof(vsi->xdp_rings[queue_pair]->stats));
13039         }
13040 }
13041
13042 /**
13043  * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13044  * @vsi: vsi
13045  * @queue_pair: queue pair
13046  **/
13047 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13048 {
13049         i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13050         if (i40e_enabled_xdp_vsi(vsi)) {
13051                 /* Make sure that in-progress ndo_xdp_xmit calls are
13052                  * completed.
13053                  */
13054                 synchronize_rcu();
13055                 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13056         }
13057         i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13058 }
13059
13060 /**
13061  * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13062  * @vsi: vsi
13063  * @queue_pair: queue pair
13064  * @enable: true for enable, false for disable
13065  **/
13066 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13067                                         bool enable)
13068 {
13069         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13070         struct i40e_q_vector *q_vector = rxr->q_vector;
13071
13072         if (!vsi->netdev)
13073                 return;
13074
13075         /* All rings in a qp belong to the same qvector. */
13076         if (q_vector->rx.ring || q_vector->tx.ring) {
13077                 if (enable)
13078                         napi_enable(&q_vector->napi);
13079                 else
13080                         napi_disable(&q_vector->napi);
13081         }
13082 }
13083
13084 /**
13085  * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13086  * @vsi: vsi
13087  * @queue_pair: queue pair
13088  * @enable: true for enable, false for disable
13089  *
13090  * Returns 0 on success, <0 on failure.
13091  **/
13092 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13093                                         bool enable)
13094 {
13095         struct i40e_pf *pf = vsi->back;
13096         int pf_q, ret = 0;
13097
13098         pf_q = vsi->base_queue + queue_pair;
13099         ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13100                                      false /*is xdp*/, enable);
13101         if (ret) {
13102                 dev_info(&pf->pdev->dev,
13103                          "VSI seid %d Tx ring %d %sable timeout\n",
13104                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13105                 return ret;
13106         }
13107
13108         i40e_control_rx_q(pf, pf_q, enable);
13109         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13110         if (ret) {
13111                 dev_info(&pf->pdev->dev,
13112                          "VSI seid %d Rx ring %d %sable timeout\n",
13113                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13114                 return ret;
13115         }
13116
13117         /* Due to HW errata, on Rx disable only, the register can
13118          * indicate done before it really is. Needs 50ms to be sure
13119          */
13120         if (!enable)
13121                 mdelay(50);
13122
13123         if (!i40e_enabled_xdp_vsi(vsi))
13124                 return ret;
13125
13126         ret = i40e_control_wait_tx_q(vsi->seid, pf,
13127                                      pf_q + vsi->alloc_queue_pairs,
13128                                      true /*is xdp*/, enable);
13129         if (ret) {
13130                 dev_info(&pf->pdev->dev,
13131                          "VSI seid %d XDP Tx ring %d %sable timeout\n",
13132                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13133         }
13134
13135         return ret;
13136 }
13137
13138 /**
13139  * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13140  * @vsi: vsi
13141  * @queue_pair: queue_pair
13142  **/
13143 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13144 {
13145         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13146         struct i40e_pf *pf = vsi->back;
13147         struct i40e_hw *hw = &pf->hw;
13148
13149         /* All rings in a qp belong to the same qvector. */
13150         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13151                 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13152         else
13153                 i40e_irq_dynamic_enable_icr0(pf);
13154
13155         i40e_flush(hw);
13156 }
13157
13158 /**
13159  * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13160  * @vsi: vsi
13161  * @queue_pair: queue_pair
13162  **/
13163 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13164 {
13165         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13166         struct i40e_pf *pf = vsi->back;
13167         struct i40e_hw *hw = &pf->hw;
13168
13169         /* For simplicity, instead of removing the qp interrupt causes
13170          * from the interrupt linked list, we simply disable the interrupt, and
13171          * leave the list intact.
13172          *
13173          * All rings in a qp belong to the same qvector.
13174          */
13175         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13176                 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13177
13178                 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13179                 i40e_flush(hw);
13180                 synchronize_irq(pf->msix_entries[intpf].vector);
13181         } else {
13182                 /* Legacy and MSI mode - this stops all interrupt handling */
13183                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13184                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13185                 i40e_flush(hw);
13186                 synchronize_irq(pf->pdev->irq);
13187         }
13188 }
13189
13190 /**
13191  * i40e_queue_pair_disable - Disables a queue pair
13192  * @vsi: vsi
13193  * @queue_pair: queue pair
13194  *
13195  * Returns 0 on success, <0 on failure.
13196  **/
13197 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13198 {
13199         int err;
13200
13201         err = i40e_enter_busy_conf(vsi);
13202         if (err)
13203                 return err;
13204
13205         i40e_queue_pair_disable_irq(vsi, queue_pair);
13206         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13207         i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13208         i40e_queue_pair_clean_rings(vsi, queue_pair);
13209         i40e_queue_pair_reset_stats(vsi, queue_pair);
13210
13211         return err;
13212 }
13213
13214 /**
13215  * i40e_queue_pair_enable - Enables a queue pair
13216  * @vsi: vsi
13217  * @queue_pair: queue pair
13218  *
13219  * Returns 0 on success, <0 on failure.
13220  **/
13221 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13222 {
13223         int err;
13224
13225         err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13226         if (err)
13227                 return err;
13228
13229         if (i40e_enabled_xdp_vsi(vsi)) {
13230                 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13231                 if (err)
13232                         return err;
13233         }
13234
13235         err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13236         if (err)
13237                 return err;
13238
13239         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13240         i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13241         i40e_queue_pair_enable_irq(vsi, queue_pair);
13242
13243         i40e_exit_busy_conf(vsi);
13244
13245         return err;
13246 }
13247
13248 /**
13249  * i40e_xdp - implements ndo_bpf for i40e
13250  * @dev: netdevice
13251  * @xdp: XDP command
13252  **/
13253 static int i40e_xdp(struct net_device *dev,
13254                     struct netdev_bpf *xdp)
13255 {
13256         struct i40e_netdev_priv *np = netdev_priv(dev);
13257         struct i40e_vsi *vsi = np->vsi;
13258
13259         if (vsi->type != I40E_VSI_MAIN)
13260                 return -EINVAL;
13261
13262         switch (xdp->command) {
13263         case XDP_SETUP_PROG:
13264                 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13265         case XDP_SETUP_XSK_POOL:
13266                 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13267                                            xdp->xsk.queue_id);
13268         default:
13269                 return -EINVAL;
13270         }
13271 }
13272
13273 static const struct net_device_ops i40e_netdev_ops = {
13274         .ndo_open               = i40e_open,
13275         .ndo_stop               = i40e_close,
13276         .ndo_start_xmit         = i40e_lan_xmit_frame,
13277         .ndo_get_stats64        = i40e_get_netdev_stats_struct,
13278         .ndo_set_rx_mode        = i40e_set_rx_mode,
13279         .ndo_validate_addr      = eth_validate_addr,
13280         .ndo_set_mac_address    = i40e_set_mac,
13281         .ndo_change_mtu         = i40e_change_mtu,
13282         .ndo_do_ioctl           = i40e_ioctl,
13283         .ndo_tx_timeout         = i40e_tx_timeout,
13284         .ndo_vlan_rx_add_vid    = i40e_vlan_rx_add_vid,
13285         .ndo_vlan_rx_kill_vid   = i40e_vlan_rx_kill_vid,
13286 #ifdef CONFIG_NET_POLL_CONTROLLER
13287         .ndo_poll_controller    = i40e_netpoll,
13288 #endif
13289         .ndo_setup_tc           = __i40e_setup_tc,
13290         .ndo_set_features       = i40e_set_features,
13291         .ndo_set_vf_mac         = i40e_ndo_set_vf_mac,
13292         .ndo_set_vf_vlan        = i40e_ndo_set_vf_port_vlan,
13293         .ndo_get_vf_stats       = i40e_get_vf_stats,
13294         .ndo_set_vf_rate        = i40e_ndo_set_vf_bw,
13295         .ndo_get_vf_config      = i40e_ndo_get_vf_config,
13296         .ndo_set_vf_link_state  = i40e_ndo_set_vf_link_state,
13297         .ndo_set_vf_spoofchk    = i40e_ndo_set_vf_spoofchk,
13298         .ndo_set_vf_trust       = i40e_ndo_set_vf_trust,
13299         .ndo_get_phys_port_id   = i40e_get_phys_port_id,
13300         .ndo_fdb_add            = i40e_ndo_fdb_add,
13301         .ndo_features_check     = i40e_features_check,
13302         .ndo_bridge_getlink     = i40e_ndo_bridge_getlink,
13303         .ndo_bridge_setlink     = i40e_ndo_bridge_setlink,
13304         .ndo_bpf                = i40e_xdp,
13305         .ndo_xdp_xmit           = i40e_xdp_xmit,
13306         .ndo_xsk_wakeup         = i40e_xsk_wakeup,
13307         .ndo_dfwd_add_station   = i40e_fwd_add,
13308         .ndo_dfwd_del_station   = i40e_fwd_del,
13309 };
13310
13311 /**
13312  * i40e_config_netdev - Setup the netdev flags
13313  * @vsi: the VSI being configured
13314  *
13315  * Returns 0 on success, negative value on failure
13316  **/
13317 static int i40e_config_netdev(struct i40e_vsi *vsi)
13318 {
13319         struct i40e_pf *pf = vsi->back;
13320         struct i40e_hw *hw = &pf->hw;
13321         struct i40e_netdev_priv *np;
13322         struct net_device *netdev;
13323         u8 broadcast[ETH_ALEN];
13324         u8 mac_addr[ETH_ALEN];
13325         int etherdev_size;
13326         netdev_features_t hw_enc_features;
13327         netdev_features_t hw_features;
13328
13329         etherdev_size = sizeof(struct i40e_netdev_priv);
13330         netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13331         if (!netdev)
13332                 return -ENOMEM;
13333
13334         vsi->netdev = netdev;
13335         np = netdev_priv(netdev);
13336         np->vsi = vsi;
13337
13338         hw_enc_features = NETIF_F_SG                    |
13339                           NETIF_F_IP_CSUM               |
13340                           NETIF_F_IPV6_CSUM             |
13341                           NETIF_F_HIGHDMA               |
13342                           NETIF_F_SOFT_FEATURES         |
13343                           NETIF_F_TSO                   |
13344                           NETIF_F_TSO_ECN               |
13345                           NETIF_F_TSO6                  |
13346                           NETIF_F_GSO_GRE               |
13347                           NETIF_F_GSO_GRE_CSUM          |
13348                           NETIF_F_GSO_PARTIAL           |
13349                           NETIF_F_GSO_IPXIP4            |
13350                           NETIF_F_GSO_IPXIP6            |
13351                           NETIF_F_GSO_UDP_TUNNEL        |
13352                           NETIF_F_GSO_UDP_TUNNEL_CSUM   |
13353                           NETIF_F_GSO_UDP_L4            |
13354                           NETIF_F_SCTP_CRC              |
13355                           NETIF_F_RXHASH                |
13356                           NETIF_F_RXCSUM                |
13357                           0;
13358
13359         if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13360                 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13361
13362         netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13363
13364         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13365
13366         netdev->hw_enc_features |= hw_enc_features;
13367
13368         /* record features VLANs can make use of */
13369         netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13370
13371         /* enable macvlan offloads */
13372         netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13373
13374         hw_features = hw_enc_features           |
13375                       NETIF_F_HW_VLAN_CTAG_TX   |
13376                       NETIF_F_HW_VLAN_CTAG_RX;
13377
13378         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13379                 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13380
13381         netdev->hw_features |= hw_features;
13382
13383         netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13384         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13385
13386         if (vsi->type == I40E_VSI_MAIN) {
13387                 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13388                 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13389                 /* The following steps are necessary for two reasons. First,
13390                  * some older NVM configurations load a default MAC-VLAN
13391                  * filter that will accept any tagged packet, and we want to
13392                  * replace this with a normal filter. Additionally, it is
13393                  * possible our MAC address was provided by the platform using
13394                  * Open Firmware or similar.
13395                  *
13396                  * Thus, we need to remove the default filter and install one
13397                  * specific to the MAC address.
13398                  */
13399                 i40e_rm_default_mac_filter(vsi, mac_addr);
13400                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13401                 i40e_add_mac_filter(vsi, mac_addr);
13402                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13403         } else {
13404                 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13405                  * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13406                  * the end, which is 4 bytes long, so force truncation of the
13407                  * original name by IFNAMSIZ - 4
13408                  */
13409                 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13410                          IFNAMSIZ - 4,
13411                          pf->vsi[pf->lan_vsi]->netdev->name);
13412                 eth_random_addr(mac_addr);
13413
13414                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13415                 i40e_add_mac_filter(vsi, mac_addr);
13416                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13417         }
13418
13419         /* Add the broadcast filter so that we initially will receive
13420          * broadcast packets. Note that when a new VLAN is first added the
13421          * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13422          * specific filters as part of transitioning into "vlan" operation.
13423          * When more VLANs are added, the driver will copy each existing MAC
13424          * filter and add it for the new VLAN.
13425          *
13426          * Broadcast filters are handled specially by
13427          * i40e_sync_filters_subtask, as the driver must to set the broadcast
13428          * promiscuous bit instead of adding this directly as a MAC/VLAN
13429          * filter. The subtask will update the correct broadcast promiscuous
13430          * bits as VLANs become active or inactive.
13431          */
13432         eth_broadcast_addr(broadcast);
13433         spin_lock_bh(&vsi->mac_filter_hash_lock);
13434         i40e_add_mac_filter(vsi, broadcast);
13435         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13436
13437         ether_addr_copy(netdev->dev_addr, mac_addr);
13438         ether_addr_copy(netdev->perm_addr, mac_addr);
13439
13440         /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13441         netdev->neigh_priv_len = sizeof(u32) * 4;
13442
13443         netdev->priv_flags |= IFF_UNICAST_FLT;
13444         netdev->priv_flags |= IFF_SUPP_NOFCS;
13445         /* Setup netdev TC information */
13446         i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13447
13448         netdev->netdev_ops = &i40e_netdev_ops;
13449         netdev->watchdog_timeo = 5 * HZ;
13450         i40e_set_ethtool_ops(netdev);
13451
13452         /* MTU range: 68 - 9706 */
13453         netdev->min_mtu = ETH_MIN_MTU;
13454         netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13455
13456         return 0;
13457 }
13458
13459 /**
13460  * i40e_vsi_delete - Delete a VSI from the switch
13461  * @vsi: the VSI being removed
13462  *
13463  * Returns 0 on success, negative value on failure
13464  **/
13465 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13466 {
13467         /* remove default VSI is not allowed */
13468         if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13469                 return;
13470
13471         i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13472 }
13473
13474 /**
13475  * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13476  * @vsi: the VSI being queried
13477  *
13478  * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13479  **/
13480 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13481 {
13482         struct i40e_veb *veb;
13483         struct i40e_pf *pf = vsi->back;
13484
13485         /* Uplink is not a bridge so default to VEB */
13486         if (vsi->veb_idx >= I40E_MAX_VEB)
13487                 return 1;
13488
13489         veb = pf->veb[vsi->veb_idx];
13490         if (!veb) {
13491                 dev_info(&pf->pdev->dev,
13492                          "There is no veb associated with the bridge\n");
13493                 return -ENOENT;
13494         }
13495
13496         /* Uplink is a bridge in VEPA mode */
13497         if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13498                 return 0;
13499         } else {
13500                 /* Uplink is a bridge in VEB mode */
13501                 return 1;
13502         }
13503
13504         /* VEPA is now default bridge, so return 0 */
13505         return 0;
13506 }
13507
13508 /**
13509  * i40e_add_vsi - Add a VSI to the switch
13510  * @vsi: the VSI being configured
13511  *
13512  * This initializes a VSI context depending on the VSI type to be added and
13513  * passes it down to the add_vsi aq command.
13514  **/
13515 static int i40e_add_vsi(struct i40e_vsi *vsi)
13516 {
13517         int ret = -ENODEV;
13518         struct i40e_pf *pf = vsi->back;
13519         struct i40e_hw *hw = &pf->hw;
13520         struct i40e_vsi_context ctxt;
13521         struct i40e_mac_filter *f;
13522         struct hlist_node *h;
13523         int bkt;
13524
13525         u8 enabled_tc = 0x1; /* TC0 enabled */
13526         int f_count = 0;
13527
13528         memset(&ctxt, 0, sizeof(ctxt));
13529         switch (vsi->type) {
13530         case I40E_VSI_MAIN:
13531                 /* The PF's main VSI is already setup as part of the
13532                  * device initialization, so we'll not bother with
13533                  * the add_vsi call, but we will retrieve the current
13534                  * VSI context.
13535                  */
13536                 ctxt.seid = pf->main_vsi_seid;
13537                 ctxt.pf_num = pf->hw.pf_id;
13538                 ctxt.vf_num = 0;
13539                 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13540                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13541                 if (ret) {
13542                         dev_info(&pf->pdev->dev,
13543                                  "couldn't get PF vsi config, err %s aq_err %s\n",
13544                                  i40e_stat_str(&pf->hw, ret),
13545                                  i40e_aq_str(&pf->hw,
13546                                              pf->hw.aq.asq_last_status));
13547                         return -ENOENT;
13548                 }
13549                 vsi->info = ctxt.info;
13550                 vsi->info.valid_sections = 0;
13551
13552                 vsi->seid = ctxt.seid;
13553                 vsi->id = ctxt.vsi_number;
13554
13555                 enabled_tc = i40e_pf_get_tc_map(pf);
13556
13557                 /* Source pruning is enabled by default, so the flag is
13558                  * negative logic - if it's set, we need to fiddle with
13559                  * the VSI to disable source pruning.
13560                  */
13561                 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13562                         memset(&ctxt, 0, sizeof(ctxt));
13563                         ctxt.seid = pf->main_vsi_seid;
13564                         ctxt.pf_num = pf->hw.pf_id;
13565                         ctxt.vf_num = 0;
13566                         ctxt.info.valid_sections |=
13567                                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13568                         ctxt.info.switch_id =
13569                                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13570                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13571                         if (ret) {
13572                                 dev_info(&pf->pdev->dev,
13573                                          "update vsi failed, err %s aq_err %s\n",
13574                                          i40e_stat_str(&pf->hw, ret),
13575                                          i40e_aq_str(&pf->hw,
13576                                                      pf->hw.aq.asq_last_status));
13577                                 ret = -ENOENT;
13578                                 goto err;
13579                         }
13580                 }
13581
13582                 /* MFP mode setup queue map and update VSI */
13583                 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13584                     !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13585                         memset(&ctxt, 0, sizeof(ctxt));
13586                         ctxt.seid = pf->main_vsi_seid;
13587                         ctxt.pf_num = pf->hw.pf_id;
13588                         ctxt.vf_num = 0;
13589                         i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13590                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13591                         if (ret) {
13592                                 dev_info(&pf->pdev->dev,
13593                                          "update vsi failed, err %s aq_err %s\n",
13594                                          i40e_stat_str(&pf->hw, ret),
13595                                          i40e_aq_str(&pf->hw,
13596                                                     pf->hw.aq.asq_last_status));
13597                                 ret = -ENOENT;
13598                                 goto err;
13599                         }
13600                         /* update the local VSI info queue map */
13601                         i40e_vsi_update_queue_map(vsi, &ctxt);
13602                         vsi->info.valid_sections = 0;
13603                 } else {
13604                         /* Default/Main VSI is only enabled for TC0
13605                          * reconfigure it to enable all TCs that are
13606                          * available on the port in SFP mode.
13607                          * For MFP case the iSCSI PF would use this
13608                          * flow to enable LAN+iSCSI TC.
13609                          */
13610                         ret = i40e_vsi_config_tc(vsi, enabled_tc);
13611                         if (ret) {
13612                                 /* Single TC condition is not fatal,
13613                                  * message and continue
13614                                  */
13615                                 dev_info(&pf->pdev->dev,
13616                                          "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13617                                          enabled_tc,
13618                                          i40e_stat_str(&pf->hw, ret),
13619                                          i40e_aq_str(&pf->hw,
13620                                                     pf->hw.aq.asq_last_status));
13621                         }
13622                 }
13623                 break;
13624
13625         case I40E_VSI_FDIR:
13626                 ctxt.pf_num = hw->pf_id;
13627                 ctxt.vf_num = 0;
13628                 ctxt.uplink_seid = vsi->uplink_seid;
13629                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13630                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13631                 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13632                     (i40e_is_vsi_uplink_mode_veb(vsi))) {
13633                         ctxt.info.valid_sections |=
13634                              cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13635                         ctxt.info.switch_id =
13636                            cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13637                 }
13638                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13639                 break;
13640
13641         case I40E_VSI_VMDQ2:
13642                 ctxt.pf_num = hw->pf_id;
13643                 ctxt.vf_num = 0;
13644                 ctxt.uplink_seid = vsi->uplink_seid;
13645                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13646                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13647
13648                 /* This VSI is connected to VEB so the switch_id
13649                  * should be set to zero by default.
13650                  */
13651                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13652                         ctxt.info.valid_sections |=
13653                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13654                         ctxt.info.switch_id =
13655                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13656                 }
13657
13658                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13659                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13660                 break;
13661
13662         case I40E_VSI_SRIOV:
13663                 ctxt.pf_num = hw->pf_id;
13664                 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13665                 ctxt.uplink_seid = vsi->uplink_seid;
13666                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13667                 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13668
13669                 /* This VSI is connected to VEB so the switch_id
13670                  * should be set to zero by default.
13671                  */
13672                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13673                         ctxt.info.valid_sections |=
13674                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13675                         ctxt.info.switch_id =
13676                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13677                 }
13678
13679                 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13680                         ctxt.info.valid_sections |=
13681                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13682                         ctxt.info.queueing_opt_flags |=
13683                                 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13684                                  I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13685                 }
13686
13687                 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13688                 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13689                 if (pf->vf[vsi->vf_id].spoofchk) {
13690                         ctxt.info.valid_sections |=
13691                                 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13692                         ctxt.info.sec_flags |=
13693                                 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13694                                  I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13695                 }
13696                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13697                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13698                 break;
13699
13700         case I40E_VSI_IWARP:
13701                 /* send down message to iWARP */
13702                 break;
13703
13704         default:
13705                 return -ENODEV;
13706         }
13707
13708         if (vsi->type != I40E_VSI_MAIN) {
13709                 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13710                 if (ret) {
13711                         dev_info(&vsi->back->pdev->dev,
13712                                  "add vsi failed, err %s aq_err %s\n",
13713                                  i40e_stat_str(&pf->hw, ret),
13714                                  i40e_aq_str(&pf->hw,
13715                                              pf->hw.aq.asq_last_status));
13716                         ret = -ENOENT;
13717                         goto err;
13718                 }
13719                 vsi->info = ctxt.info;
13720                 vsi->info.valid_sections = 0;
13721                 vsi->seid = ctxt.seid;
13722                 vsi->id = ctxt.vsi_number;
13723         }
13724
13725         vsi->active_filters = 0;
13726         clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13727         spin_lock_bh(&vsi->mac_filter_hash_lock);
13728         /* If macvlan filters already exist, force them to get loaded */
13729         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13730                 f->state = I40E_FILTER_NEW;
13731                 f_count++;
13732         }
13733         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13734
13735         if (f_count) {
13736                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13737                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13738         }
13739
13740         /* Update VSI BW information */
13741         ret = i40e_vsi_get_bw_info(vsi);
13742         if (ret) {
13743                 dev_info(&pf->pdev->dev,
13744                          "couldn't get vsi bw info, err %s aq_err %s\n",
13745                          i40e_stat_str(&pf->hw, ret),
13746                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13747                 /* VSI is already added so not tearing that up */
13748                 ret = 0;
13749         }
13750
13751 err:
13752         return ret;
13753 }
13754
13755 /**
13756  * i40e_vsi_release - Delete a VSI and free its resources
13757  * @vsi: the VSI being removed
13758  *
13759  * Returns 0 on success or < 0 on error
13760  **/
13761 int i40e_vsi_release(struct i40e_vsi *vsi)
13762 {
13763         struct i40e_mac_filter *f;
13764         struct hlist_node *h;
13765         struct i40e_veb *veb = NULL;
13766         struct i40e_pf *pf;
13767         u16 uplink_seid;
13768         int i, n, bkt;
13769
13770         pf = vsi->back;
13771
13772         /* release of a VEB-owner or last VSI is not allowed */
13773         if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13774                 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13775                          vsi->seid, vsi->uplink_seid);
13776                 return -ENODEV;
13777         }
13778         if (vsi == pf->vsi[pf->lan_vsi] &&
13779             !test_bit(__I40E_DOWN, pf->state)) {
13780                 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13781                 return -ENODEV;
13782         }
13783
13784         uplink_seid = vsi->uplink_seid;
13785         if (vsi->type != I40E_VSI_SRIOV) {
13786                 if (vsi->netdev_registered) {
13787                         vsi->netdev_registered = false;
13788                         if (vsi->netdev) {
13789                                 /* results in a call to i40e_close() */
13790                                 unregister_netdev(vsi->netdev);
13791                         }
13792                 } else {
13793                         i40e_vsi_close(vsi);
13794                 }
13795                 i40e_vsi_disable_irq(vsi);
13796         }
13797
13798         spin_lock_bh(&vsi->mac_filter_hash_lock);
13799
13800         /* clear the sync flag on all filters */
13801         if (vsi->netdev) {
13802                 __dev_uc_unsync(vsi->netdev, NULL);
13803                 __dev_mc_unsync(vsi->netdev, NULL);
13804         }
13805
13806         /* make sure any remaining filters are marked for deletion */
13807         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
13808                 __i40e_del_filter(vsi, f);
13809
13810         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13811
13812         i40e_sync_vsi_filters(vsi);
13813
13814         i40e_vsi_delete(vsi);
13815         i40e_vsi_free_q_vectors(vsi);
13816         if (vsi->netdev) {
13817                 free_netdev(vsi->netdev);
13818                 vsi->netdev = NULL;
13819         }
13820         i40e_vsi_clear_rings(vsi);
13821         i40e_vsi_clear(vsi);
13822
13823         /* If this was the last thing on the VEB, except for the
13824          * controlling VSI, remove the VEB, which puts the controlling
13825          * VSI onto the next level down in the switch.
13826          *
13827          * Well, okay, there's one more exception here: don't remove
13828          * the orphan VEBs yet.  We'll wait for an explicit remove request
13829          * from up the network stack.
13830          */
13831         for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
13832                 if (pf->vsi[i] &&
13833                     pf->vsi[i]->uplink_seid == uplink_seid &&
13834                     (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13835                         n++;      /* count the VSIs */
13836                 }
13837         }
13838         for (i = 0; i < I40E_MAX_VEB; i++) {
13839                 if (!pf->veb[i])
13840                         continue;
13841                 if (pf->veb[i]->uplink_seid == uplink_seid)
13842                         n++;     /* count the VEBs */
13843                 if (pf->veb[i]->seid == uplink_seid)
13844                         veb = pf->veb[i];
13845         }
13846         if (n == 0 && veb && veb->uplink_seid != 0)
13847                 i40e_veb_release(veb);
13848
13849         return 0;
13850 }
13851
13852 /**
13853  * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
13854  * @vsi: ptr to the VSI
13855  *
13856  * This should only be called after i40e_vsi_mem_alloc() which allocates the
13857  * corresponding SW VSI structure and initializes num_queue_pairs for the
13858  * newly allocated VSI.
13859  *
13860  * Returns 0 on success or negative on failure
13861  **/
13862 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
13863 {
13864         int ret = -ENOENT;
13865         struct i40e_pf *pf = vsi->back;
13866
13867         if (vsi->q_vectors[0]) {
13868                 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
13869                          vsi->seid);
13870                 return -EEXIST;
13871         }
13872
13873         if (vsi->base_vector) {
13874                 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
13875                          vsi->seid, vsi->base_vector);
13876                 return -EEXIST;
13877         }
13878
13879         ret = i40e_vsi_alloc_q_vectors(vsi);
13880         if (ret) {
13881                 dev_info(&pf->pdev->dev,
13882                          "failed to allocate %d q_vector for VSI %d, ret=%d\n",
13883                          vsi->num_q_vectors, vsi->seid, ret);
13884                 vsi->num_q_vectors = 0;
13885                 goto vector_setup_out;
13886         }
13887
13888         /* In Legacy mode, we do not have to get any other vector since we
13889          * piggyback on the misc/ICR0 for queue interrupts.
13890         */
13891         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
13892                 return ret;
13893         if (vsi->num_q_vectors)
13894                 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
13895                                                  vsi->num_q_vectors, vsi->idx);
13896         if (vsi->base_vector < 0) {
13897                 dev_info(&pf->pdev->dev,
13898                          "failed to get tracking for %d vectors for VSI %d, err=%d\n",
13899                          vsi->num_q_vectors, vsi->seid, vsi->base_vector);
13900                 i40e_vsi_free_q_vectors(vsi);
13901                 ret = -ENOENT;
13902                 goto vector_setup_out;
13903         }
13904
13905 vector_setup_out:
13906         return ret;
13907 }
13908
13909 /**
13910  * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
13911  * @vsi: pointer to the vsi.
13912  *
13913  * This re-allocates a vsi's queue resources.
13914  *
13915  * Returns pointer to the successfully allocated and configured VSI sw struct
13916  * on success, otherwise returns NULL on failure.
13917  **/
13918 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
13919 {
13920         u16 alloc_queue_pairs;
13921         struct i40e_pf *pf;
13922         u8 enabled_tc;
13923         int ret;
13924
13925         if (!vsi)
13926                 return NULL;
13927
13928         pf = vsi->back;
13929
13930         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
13931         i40e_vsi_clear_rings(vsi);
13932
13933         i40e_vsi_free_arrays(vsi, false);
13934         i40e_set_num_rings_in_vsi(vsi);
13935         ret = i40e_vsi_alloc_arrays(vsi, false);
13936         if (ret)
13937                 goto err_vsi;
13938
13939         alloc_queue_pairs = vsi->alloc_queue_pairs *
13940                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13941
13942         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13943         if (ret < 0) {
13944                 dev_info(&pf->pdev->dev,
13945                          "failed to get tracking for %d queues for VSI %d err %d\n",
13946                          alloc_queue_pairs, vsi->seid, ret);
13947                 goto err_vsi;
13948         }
13949         vsi->base_queue = ret;
13950
13951         /* Update the FW view of the VSI. Force a reset of TC and queue
13952          * layout configurations.
13953          */
13954         enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13955         pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13956         pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13957         i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13958         if (vsi->type == I40E_VSI_MAIN)
13959                 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
13960
13961         /* assign it some queues */
13962         ret = i40e_alloc_rings(vsi);
13963         if (ret)
13964                 goto err_rings;
13965
13966         /* map all of the rings to the q_vectors */
13967         i40e_vsi_map_rings_to_vectors(vsi);
13968         return vsi;
13969
13970 err_rings:
13971         i40e_vsi_free_q_vectors(vsi);
13972         if (vsi->netdev_registered) {
13973                 vsi->netdev_registered = false;
13974                 unregister_netdev(vsi->netdev);
13975                 free_netdev(vsi->netdev);
13976                 vsi->netdev = NULL;
13977         }
13978         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13979 err_vsi:
13980         i40e_vsi_clear(vsi);
13981         return NULL;
13982 }
13983
13984 /**
13985  * i40e_vsi_setup - Set up a VSI by a given type
13986  * @pf: board private structure
13987  * @type: VSI type
13988  * @uplink_seid: the switch element to link to
13989  * @param1: usage depends upon VSI type. For VF types, indicates VF id
13990  *
13991  * This allocates the sw VSI structure and its queue resources, then add a VSI
13992  * to the identified VEB.
13993  *
13994  * Returns pointer to the successfully allocated and configure VSI sw struct on
13995  * success, otherwise returns NULL on failure.
13996  **/
13997 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
13998                                 u16 uplink_seid, u32 param1)
13999 {
14000         struct i40e_vsi *vsi = NULL;
14001         struct i40e_veb *veb = NULL;
14002         u16 alloc_queue_pairs;
14003         int ret, i;
14004         int v_idx;
14005
14006         /* The requested uplink_seid must be either
14007          *     - the PF's port seid
14008          *              no VEB is needed because this is the PF
14009          *              or this is a Flow Director special case VSI
14010          *     - seid of an existing VEB
14011          *     - seid of a VSI that owns an existing VEB
14012          *     - seid of a VSI that doesn't own a VEB
14013          *              a new VEB is created and the VSI becomes the owner
14014          *     - seid of the PF VSI, which is what creates the first VEB
14015          *              this is a special case of the previous
14016          *
14017          * Find which uplink_seid we were given and create a new VEB if needed
14018          */
14019         for (i = 0; i < I40E_MAX_VEB; i++) {
14020                 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14021                         veb = pf->veb[i];
14022                         break;
14023                 }
14024         }
14025
14026         if (!veb && uplink_seid != pf->mac_seid) {
14027
14028                 for (i = 0; i < pf->num_alloc_vsi; i++) {
14029                         if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14030                                 vsi = pf->vsi[i];
14031                                 break;
14032                         }
14033                 }
14034                 if (!vsi) {
14035                         dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14036                                  uplink_seid);
14037                         return NULL;
14038                 }
14039
14040                 if (vsi->uplink_seid == pf->mac_seid)
14041                         veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14042                                              vsi->tc_config.enabled_tc);
14043                 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14044                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14045                                              vsi->tc_config.enabled_tc);
14046                 if (veb) {
14047                         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14048                                 dev_info(&vsi->back->pdev->dev,
14049                                          "New VSI creation error, uplink seid of LAN VSI expected.\n");
14050                                 return NULL;
14051                         }
14052                         /* We come up by default in VEPA mode if SRIOV is not
14053                          * already enabled, in which case we can't force VEPA
14054                          * mode.
14055                          */
14056                         if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14057                                 veb->bridge_mode = BRIDGE_MODE_VEPA;
14058                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14059                         }
14060                         i40e_config_bridge_mode(veb);
14061                 }
14062                 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14063                         if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14064                                 veb = pf->veb[i];
14065                 }
14066                 if (!veb) {
14067                         dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14068                         return NULL;
14069                 }
14070
14071                 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14072                 uplink_seid = veb->seid;
14073         }
14074
14075         /* get vsi sw struct */
14076         v_idx = i40e_vsi_mem_alloc(pf, type);
14077         if (v_idx < 0)
14078                 goto err_alloc;
14079         vsi = pf->vsi[v_idx];
14080         if (!vsi)
14081                 goto err_alloc;
14082         vsi->type = type;
14083         vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14084
14085         if (type == I40E_VSI_MAIN)
14086                 pf->lan_vsi = v_idx;
14087         else if (type == I40E_VSI_SRIOV)
14088                 vsi->vf_id = param1;
14089         /* assign it some queues */
14090         alloc_queue_pairs = vsi->alloc_queue_pairs *
14091                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14092
14093         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14094         if (ret < 0) {
14095                 dev_info(&pf->pdev->dev,
14096                          "failed to get tracking for %d queues for VSI %d err=%d\n",
14097                          alloc_queue_pairs, vsi->seid, ret);
14098                 goto err_vsi;
14099         }
14100         vsi->base_queue = ret;
14101
14102         /* get a VSI from the hardware */
14103         vsi->uplink_seid = uplink_seid;
14104         ret = i40e_add_vsi(vsi);
14105         if (ret)
14106                 goto err_vsi;
14107
14108         switch (vsi->type) {
14109         /* setup the netdev if needed */
14110         case I40E_VSI_MAIN:
14111         case I40E_VSI_VMDQ2:
14112                 ret = i40e_config_netdev(vsi);
14113                 if (ret)
14114                         goto err_netdev;
14115                 ret = register_netdev(vsi->netdev);
14116                 if (ret)
14117                         goto err_netdev;
14118                 vsi->netdev_registered = true;
14119                 netif_carrier_off(vsi->netdev);
14120 #ifdef CONFIG_I40E_DCB
14121                 /* Setup DCB netlink interface */
14122                 i40e_dcbnl_setup(vsi);
14123 #endif /* CONFIG_I40E_DCB */
14124                 fallthrough;
14125         case I40E_VSI_FDIR:
14126                 /* set up vectors and rings if needed */
14127                 ret = i40e_vsi_setup_vectors(vsi);
14128                 if (ret)
14129                         goto err_msix;
14130
14131                 ret = i40e_alloc_rings(vsi);
14132                 if (ret)
14133                         goto err_rings;
14134
14135                 /* map all of the rings to the q_vectors */
14136                 i40e_vsi_map_rings_to_vectors(vsi);
14137
14138                 i40e_vsi_reset_stats(vsi);
14139                 break;
14140         default:
14141                 /* no netdev or rings for the other VSI types */
14142                 break;
14143         }
14144
14145         if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14146             (vsi->type == I40E_VSI_VMDQ2)) {
14147                 ret = i40e_vsi_config_rss(vsi);
14148         }
14149         return vsi;
14150
14151 err_rings:
14152         i40e_vsi_free_q_vectors(vsi);
14153 err_msix:
14154         if (vsi->netdev_registered) {
14155                 vsi->netdev_registered = false;
14156                 unregister_netdev(vsi->netdev);
14157                 free_netdev(vsi->netdev);
14158                 vsi->netdev = NULL;
14159         }
14160 err_netdev:
14161         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14162 err_vsi:
14163         i40e_vsi_clear(vsi);
14164 err_alloc:
14165         return NULL;
14166 }
14167
14168 /**
14169  * i40e_veb_get_bw_info - Query VEB BW information
14170  * @veb: the veb to query
14171  *
14172  * Query the Tx scheduler BW configuration data for given VEB
14173  **/
14174 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14175 {
14176         struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14177         struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14178         struct i40e_pf *pf = veb->pf;
14179         struct i40e_hw *hw = &pf->hw;
14180         u32 tc_bw_max;
14181         int ret = 0;
14182         int i;
14183
14184         ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14185                                                   &bw_data, NULL);
14186         if (ret) {
14187                 dev_info(&pf->pdev->dev,
14188                          "query veb bw config failed, err %s aq_err %s\n",
14189                          i40e_stat_str(&pf->hw, ret),
14190                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14191                 goto out;
14192         }
14193
14194         ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14195                                                    &ets_data, NULL);
14196         if (ret) {
14197                 dev_info(&pf->pdev->dev,
14198                          "query veb bw ets config failed, err %s aq_err %s\n",
14199                          i40e_stat_str(&pf->hw, ret),
14200                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14201                 goto out;
14202         }
14203
14204         veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14205         veb->bw_max_quanta = ets_data.tc_bw_max;
14206         veb->is_abs_credits = bw_data.absolute_credits_enable;
14207         veb->enabled_tc = ets_data.tc_valid_bits;
14208         tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14209                     (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14210         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14211                 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14212                 veb->bw_tc_limit_credits[i] =
14213                                         le16_to_cpu(bw_data.tc_bw_limits[i]);
14214                 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14215         }
14216
14217 out:
14218         return ret;
14219 }
14220
14221 /**
14222  * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14223  * @pf: board private structure
14224  *
14225  * On error: returns error code (negative)
14226  * On success: returns vsi index in PF (positive)
14227  **/
14228 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14229 {
14230         int ret = -ENOENT;
14231         struct i40e_veb *veb;
14232         int i;
14233
14234         /* Need to protect the allocation of switch elements at the PF level */
14235         mutex_lock(&pf->switch_mutex);
14236
14237         /* VEB list may be fragmented if VEB creation/destruction has
14238          * been happening.  We can afford to do a quick scan to look
14239          * for any free slots in the list.
14240          *
14241          * find next empty veb slot, looping back around if necessary
14242          */
14243         i = 0;
14244         while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14245                 i++;
14246         if (i >= I40E_MAX_VEB) {
14247                 ret = -ENOMEM;
14248                 goto err_alloc_veb;  /* out of VEB slots! */
14249         }
14250
14251         veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14252         if (!veb) {
14253                 ret = -ENOMEM;
14254                 goto err_alloc_veb;
14255         }
14256         veb->pf = pf;
14257         veb->idx = i;
14258         veb->enabled_tc = 1;
14259
14260         pf->veb[i] = veb;
14261         ret = i;
14262 err_alloc_veb:
14263         mutex_unlock(&pf->switch_mutex);
14264         return ret;
14265 }
14266
14267 /**
14268  * i40e_switch_branch_release - Delete a branch of the switch tree
14269  * @branch: where to start deleting
14270  *
14271  * This uses recursion to find the tips of the branch to be
14272  * removed, deleting until we get back to and can delete this VEB.
14273  **/
14274 static void i40e_switch_branch_release(struct i40e_veb *branch)
14275 {
14276         struct i40e_pf *pf = branch->pf;
14277         u16 branch_seid = branch->seid;
14278         u16 veb_idx = branch->idx;
14279         int i;
14280
14281         /* release any VEBs on this VEB - RECURSION */
14282         for (i = 0; i < I40E_MAX_VEB; i++) {
14283                 if (!pf->veb[i])
14284                         continue;
14285                 if (pf->veb[i]->uplink_seid == branch->seid)
14286                         i40e_switch_branch_release(pf->veb[i]);
14287         }
14288
14289         /* Release the VSIs on this VEB, but not the owner VSI.
14290          *
14291          * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14292          *       the VEB itself, so don't use (*branch) after this loop.
14293          */
14294         for (i = 0; i < pf->num_alloc_vsi; i++) {
14295                 if (!pf->vsi[i])
14296                         continue;
14297                 if (pf->vsi[i]->uplink_seid == branch_seid &&
14298                    (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14299                         i40e_vsi_release(pf->vsi[i]);
14300                 }
14301         }
14302
14303         /* There's one corner case where the VEB might not have been
14304          * removed, so double check it here and remove it if needed.
14305          * This case happens if the veb was created from the debugfs
14306          * commands and no VSIs were added to it.
14307          */
14308         if (pf->veb[veb_idx])
14309                 i40e_veb_release(pf->veb[veb_idx]);
14310 }
14311
14312 /**
14313  * i40e_veb_clear - remove veb struct
14314  * @veb: the veb to remove
14315  **/
14316 static void i40e_veb_clear(struct i40e_veb *veb)
14317 {
14318         if (!veb)
14319                 return;
14320
14321         if (veb->pf) {
14322                 struct i40e_pf *pf = veb->pf;
14323
14324                 mutex_lock(&pf->switch_mutex);
14325                 if (pf->veb[veb->idx] == veb)
14326                         pf->veb[veb->idx] = NULL;
14327                 mutex_unlock(&pf->switch_mutex);
14328         }
14329
14330         kfree(veb);
14331 }
14332
14333 /**
14334  * i40e_veb_release - Delete a VEB and free its resources
14335  * @veb: the VEB being removed
14336  **/
14337 void i40e_veb_release(struct i40e_veb *veb)
14338 {
14339         struct i40e_vsi *vsi = NULL;
14340         struct i40e_pf *pf;
14341         int i, n = 0;
14342
14343         pf = veb->pf;
14344
14345         /* find the remaining VSI and check for extras */
14346         for (i = 0; i < pf->num_alloc_vsi; i++) {
14347                 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14348                         n++;
14349                         vsi = pf->vsi[i];
14350                 }
14351         }
14352         if (n != 1) {
14353                 dev_info(&pf->pdev->dev,
14354                          "can't remove VEB %d with %d VSIs left\n",
14355                          veb->seid, n);
14356                 return;
14357         }
14358
14359         /* move the remaining VSI to uplink veb */
14360         vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14361         if (veb->uplink_seid) {
14362                 vsi->uplink_seid = veb->uplink_seid;
14363                 if (veb->uplink_seid == pf->mac_seid)
14364                         vsi->veb_idx = I40E_NO_VEB;
14365                 else
14366                         vsi->veb_idx = veb->veb_idx;
14367         } else {
14368                 /* floating VEB */
14369                 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14370                 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14371         }
14372
14373         i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14374         i40e_veb_clear(veb);
14375 }
14376
14377 /**
14378  * i40e_add_veb - create the VEB in the switch
14379  * @veb: the VEB to be instantiated
14380  * @vsi: the controlling VSI
14381  **/
14382 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14383 {
14384         struct i40e_pf *pf = veb->pf;
14385         bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14386         int ret;
14387
14388         ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14389                               veb->enabled_tc, false,
14390                               &veb->seid, enable_stats, NULL);
14391
14392         /* get a VEB from the hardware */
14393         if (ret) {
14394                 dev_info(&pf->pdev->dev,
14395                          "couldn't add VEB, err %s aq_err %s\n",
14396                          i40e_stat_str(&pf->hw, ret),
14397                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14398                 return -EPERM;
14399         }
14400
14401         /* get statistics counter */
14402         ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14403                                          &veb->stats_idx, NULL, NULL, NULL);
14404         if (ret) {
14405                 dev_info(&pf->pdev->dev,
14406                          "couldn't get VEB statistics idx, err %s aq_err %s\n",
14407                          i40e_stat_str(&pf->hw, ret),
14408                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14409                 return -EPERM;
14410         }
14411         ret = i40e_veb_get_bw_info(veb);
14412         if (ret) {
14413                 dev_info(&pf->pdev->dev,
14414                          "couldn't get VEB bw info, err %s aq_err %s\n",
14415                          i40e_stat_str(&pf->hw, ret),
14416                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14417                 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14418                 return -ENOENT;
14419         }
14420
14421         vsi->uplink_seid = veb->seid;
14422         vsi->veb_idx = veb->idx;
14423         vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14424
14425         return 0;
14426 }
14427
14428 /**
14429  * i40e_veb_setup - Set up a VEB
14430  * @pf: board private structure
14431  * @flags: VEB setup flags
14432  * @uplink_seid: the switch element to link to
14433  * @vsi_seid: the initial VSI seid
14434  * @enabled_tc: Enabled TC bit-map
14435  *
14436  * This allocates the sw VEB structure and links it into the switch
14437  * It is possible and legal for this to be a duplicate of an already
14438  * existing VEB.  It is also possible for both uplink and vsi seids
14439  * to be zero, in order to create a floating VEB.
14440  *
14441  * Returns pointer to the successfully allocated VEB sw struct on
14442  * success, otherwise returns NULL on failure.
14443  **/
14444 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14445                                 u16 uplink_seid, u16 vsi_seid,
14446                                 u8 enabled_tc)
14447 {
14448         struct i40e_veb *veb, *uplink_veb = NULL;
14449         int vsi_idx, veb_idx;
14450         int ret;
14451
14452         /* if one seid is 0, the other must be 0 to create a floating relay */
14453         if ((uplink_seid == 0 || vsi_seid == 0) &&
14454             (uplink_seid + vsi_seid != 0)) {
14455                 dev_info(&pf->pdev->dev,
14456                          "one, not both seid's are 0: uplink=%d vsi=%d\n",
14457                          uplink_seid, vsi_seid);
14458                 return NULL;
14459         }
14460
14461         /* make sure there is such a vsi and uplink */
14462         for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14463                 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14464                         break;
14465         if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14466                 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14467                          vsi_seid);
14468                 return NULL;
14469         }
14470
14471         if (uplink_seid && uplink_seid != pf->mac_seid) {
14472                 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14473                         if (pf->veb[veb_idx] &&
14474                             pf->veb[veb_idx]->seid == uplink_seid) {
14475                                 uplink_veb = pf->veb[veb_idx];
14476                                 break;
14477                         }
14478                 }
14479                 if (!uplink_veb) {
14480                         dev_info(&pf->pdev->dev,
14481                                  "uplink seid %d not found\n", uplink_seid);
14482                         return NULL;
14483                 }
14484         }
14485
14486         /* get veb sw struct */
14487         veb_idx = i40e_veb_mem_alloc(pf);
14488         if (veb_idx < 0)
14489                 goto err_alloc;
14490         veb = pf->veb[veb_idx];
14491         veb->flags = flags;
14492         veb->uplink_seid = uplink_seid;
14493         veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14494         veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14495
14496         /* create the VEB in the switch */
14497         ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14498         if (ret)
14499                 goto err_veb;
14500         if (vsi_idx == pf->lan_vsi)
14501                 pf->lan_veb = veb->idx;
14502
14503         return veb;
14504
14505 err_veb:
14506         i40e_veb_clear(veb);
14507 err_alloc:
14508         return NULL;
14509 }
14510
14511 /**
14512  * i40e_setup_pf_switch_element - set PF vars based on switch type
14513  * @pf: board private structure
14514  * @ele: element we are building info from
14515  * @num_reported: total number of elements
14516  * @printconfig: should we print the contents
14517  *
14518  * helper function to assist in extracting a few useful SEID values.
14519  **/
14520 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14521                                 struct i40e_aqc_switch_config_element_resp *ele,
14522                                 u16 num_reported, bool printconfig)
14523 {
14524         u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14525         u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14526         u8 element_type = ele->element_type;
14527         u16 seid = le16_to_cpu(ele->seid);
14528
14529         if (printconfig)
14530                 dev_info(&pf->pdev->dev,
14531                          "type=%d seid=%d uplink=%d downlink=%d\n",
14532                          element_type, seid, uplink_seid, downlink_seid);
14533
14534         switch (element_type) {
14535         case I40E_SWITCH_ELEMENT_TYPE_MAC:
14536                 pf->mac_seid = seid;
14537                 break;
14538         case I40E_SWITCH_ELEMENT_TYPE_VEB:
14539                 /* Main VEB? */
14540                 if (uplink_seid != pf->mac_seid)
14541                         break;
14542                 if (pf->lan_veb >= I40E_MAX_VEB) {
14543                         int v;
14544
14545                         /* find existing or else empty VEB */
14546                         for (v = 0; v < I40E_MAX_VEB; v++) {
14547                                 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14548                                         pf->lan_veb = v;
14549                                         break;
14550                                 }
14551                         }
14552                         if (pf->lan_veb >= I40E_MAX_VEB) {
14553                                 v = i40e_veb_mem_alloc(pf);
14554                                 if (v < 0)
14555                                         break;
14556                                 pf->lan_veb = v;
14557                         }
14558                 }
14559                 if (pf->lan_veb >= I40E_MAX_VEB)
14560                         break;
14561
14562                 pf->veb[pf->lan_veb]->seid = seid;
14563                 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14564                 pf->veb[pf->lan_veb]->pf = pf;
14565                 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14566                 break;
14567         case I40E_SWITCH_ELEMENT_TYPE_VSI:
14568                 if (num_reported != 1)
14569                         break;
14570                 /* This is immediately after a reset so we can assume this is
14571                  * the PF's VSI
14572                  */
14573                 pf->mac_seid = uplink_seid;
14574                 pf->pf_seid = downlink_seid;
14575                 pf->main_vsi_seid = seid;
14576                 if (printconfig)
14577                         dev_info(&pf->pdev->dev,
14578                                  "pf_seid=%d main_vsi_seid=%d\n",
14579                                  pf->pf_seid, pf->main_vsi_seid);
14580                 break;
14581         case I40E_SWITCH_ELEMENT_TYPE_PF:
14582         case I40E_SWITCH_ELEMENT_TYPE_VF:
14583         case I40E_SWITCH_ELEMENT_TYPE_EMP:
14584         case I40E_SWITCH_ELEMENT_TYPE_BMC:
14585         case I40E_SWITCH_ELEMENT_TYPE_PE:
14586         case I40E_SWITCH_ELEMENT_TYPE_PA:
14587                 /* ignore these for now */
14588                 break;
14589         default:
14590                 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14591                          element_type, seid);
14592                 break;
14593         }
14594 }
14595
14596 /**
14597  * i40e_fetch_switch_configuration - Get switch config from firmware
14598  * @pf: board private structure
14599  * @printconfig: should we print the contents
14600  *
14601  * Get the current switch configuration from the device and
14602  * extract a few useful SEID values.
14603  **/
14604 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14605 {
14606         struct i40e_aqc_get_switch_config_resp *sw_config;
14607         u16 next_seid = 0;
14608         int ret = 0;
14609         u8 *aq_buf;
14610         int i;
14611
14612         aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14613         if (!aq_buf)
14614                 return -ENOMEM;
14615
14616         sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14617         do {
14618                 u16 num_reported, num_total;
14619
14620                 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14621                                                 I40E_AQ_LARGE_BUF,
14622                                                 &next_seid, NULL);
14623                 if (ret) {
14624                         dev_info(&pf->pdev->dev,
14625                                  "get switch config failed err %s aq_err %s\n",
14626                                  i40e_stat_str(&pf->hw, ret),
14627                                  i40e_aq_str(&pf->hw,
14628                                              pf->hw.aq.asq_last_status));
14629                         kfree(aq_buf);
14630                         return -ENOENT;
14631                 }
14632
14633                 num_reported = le16_to_cpu(sw_config->header.num_reported);
14634                 num_total = le16_to_cpu(sw_config->header.num_total);
14635
14636                 if (printconfig)
14637                         dev_info(&pf->pdev->dev,
14638                                  "header: %d reported %d total\n",
14639                                  num_reported, num_total);
14640
14641                 for (i = 0; i < num_reported; i++) {
14642                         struct i40e_aqc_switch_config_element_resp *ele =
14643                                 &sw_config->element[i];
14644
14645                         i40e_setup_pf_switch_element(pf, ele, num_reported,
14646                                                      printconfig);
14647                 }
14648         } while (next_seid != 0);
14649
14650         kfree(aq_buf);
14651         return ret;
14652 }
14653
14654 /**
14655  * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14656  * @pf: board private structure
14657  * @reinit: if the Main VSI needs to re-initialized.
14658  *
14659  * Returns 0 on success, negative value on failure
14660  **/
14661 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
14662 {
14663         u16 flags = 0;
14664         int ret;
14665
14666         /* find out what's out there already */
14667         ret = i40e_fetch_switch_configuration(pf, false);
14668         if (ret) {
14669                 dev_info(&pf->pdev->dev,
14670                          "couldn't fetch switch config, err %s aq_err %s\n",
14671                          i40e_stat_str(&pf->hw, ret),
14672                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14673                 return ret;
14674         }
14675         i40e_pf_reset_stats(pf);
14676
14677         /* set the switch config bit for the whole device to
14678          * support limited promisc or true promisc
14679          * when user requests promisc. The default is limited
14680          * promisc.
14681         */
14682
14683         if ((pf->hw.pf_id == 0) &&
14684             !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14685                 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14686                 pf->last_sw_conf_flags = flags;
14687         }
14688
14689         if (pf->hw.pf_id == 0) {
14690                 u16 valid_flags;
14691
14692                 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14693                 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14694                                                 NULL);
14695                 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14696                         dev_info(&pf->pdev->dev,
14697                                  "couldn't set switch config bits, err %s aq_err %s\n",
14698                                  i40e_stat_str(&pf->hw, ret),
14699                                  i40e_aq_str(&pf->hw,
14700                                              pf->hw.aq.asq_last_status));
14701                         /* not a fatal problem, just keep going */
14702                 }
14703                 pf->last_sw_conf_valid_flags = valid_flags;
14704         }
14705
14706         /* first time setup */
14707         if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14708                 struct i40e_vsi *vsi = NULL;
14709                 u16 uplink_seid;
14710
14711                 /* Set up the PF VSI associated with the PF's main VSI
14712                  * that is already in the HW switch
14713                  */
14714                 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14715                         uplink_seid = pf->veb[pf->lan_veb]->seid;
14716                 else
14717                         uplink_seid = pf->mac_seid;
14718                 if (pf->lan_vsi == I40E_NO_VSI)
14719                         vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14720                 else if (reinit)
14721                         vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14722                 if (!vsi) {
14723                         dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14724                         i40e_cloud_filter_exit(pf);
14725                         i40e_fdir_teardown(pf);
14726                         return -EAGAIN;
14727                 }
14728         } else {
14729                 /* force a reset of TC and queue layout configurations */
14730                 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14731
14732                 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14733                 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14734                 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14735         }
14736         i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14737
14738         i40e_fdir_sb_setup(pf);
14739
14740         /* Setup static PF queue filter control settings */
14741         ret = i40e_setup_pf_filter_control(pf);
14742         if (ret) {
14743                 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14744                          ret);
14745                 /* Failure here should not stop continuing other steps */
14746         }
14747
14748         /* enable RSS in the HW, even for only one queue, as the stack can use
14749          * the hash
14750          */
14751         if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14752                 i40e_pf_config_rss(pf);
14753
14754         /* fill in link information and enable LSE reporting */
14755         i40e_link_event(pf);
14756
14757         /* Initialize user-specific link properties */
14758         pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14759                                   I40E_AQ_AN_COMPLETED) ? true : false);
14760
14761         i40e_ptp_init(pf);
14762
14763         /* repopulate tunnel port filters */
14764         udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
14765
14766         return ret;
14767 }
14768
14769 /**
14770  * i40e_determine_queue_usage - Work out queue distribution
14771  * @pf: board private structure
14772  **/
14773 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14774 {
14775         int queues_left;
14776         int q_max;
14777
14778         pf->num_lan_qps = 0;
14779
14780         /* Find the max queues to be put into basic use.  We'll always be
14781          * using TC0, whether or not DCB is running, and TC0 will get the
14782          * big RSS set.
14783          */
14784         queues_left = pf->hw.func_caps.num_tx_qp;
14785
14786         if ((queues_left == 1) ||
14787             !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
14788                 /* one qp for PF, no queues for anything else */
14789                 queues_left = 0;
14790                 pf->alloc_rss_size = pf->num_lan_qps = 1;
14791
14792                 /* make sure all the fancies are disabled */
14793                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
14794                                I40E_FLAG_IWARP_ENABLED  |
14795                                I40E_FLAG_FD_SB_ENABLED  |
14796                                I40E_FLAG_FD_ATR_ENABLED |
14797                                I40E_FLAG_DCB_CAPABLE    |
14798                                I40E_FLAG_DCB_ENABLED    |
14799                                I40E_FLAG_SRIOV_ENABLED  |
14800                                I40E_FLAG_VMDQ_ENABLED);
14801                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14802         } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
14803                                   I40E_FLAG_FD_SB_ENABLED |
14804                                   I40E_FLAG_FD_ATR_ENABLED |
14805                                   I40E_FLAG_DCB_CAPABLE))) {
14806                 /* one qp for PF */
14807                 pf->alloc_rss_size = pf->num_lan_qps = 1;
14808                 queues_left -= pf->num_lan_qps;
14809
14810                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
14811                                I40E_FLAG_IWARP_ENABLED  |
14812                                I40E_FLAG_FD_SB_ENABLED  |
14813                                I40E_FLAG_FD_ATR_ENABLED |
14814                                I40E_FLAG_DCB_ENABLED    |
14815                                I40E_FLAG_VMDQ_ENABLED);
14816                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14817         } else {
14818                 /* Not enough queues for all TCs */
14819                 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
14820                     (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
14821                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
14822                                         I40E_FLAG_DCB_ENABLED);
14823                         dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
14824                 }
14825
14826                 /* limit lan qps to the smaller of qps, cpus or msix */
14827                 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
14828                 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
14829                 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
14830                 pf->num_lan_qps = q_max;
14831
14832                 queues_left -= pf->num_lan_qps;
14833         }
14834
14835         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14836                 if (queues_left > 1) {
14837                         queues_left -= 1; /* save 1 queue for FD */
14838                 } else {
14839                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
14840                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14841                         dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
14842                 }
14843         }
14844
14845         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14846             pf->num_vf_qps && pf->num_req_vfs && queues_left) {
14847                 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
14848                                         (queues_left / pf->num_vf_qps));
14849                 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
14850         }
14851
14852         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
14853             pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
14854                 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
14855                                           (queues_left / pf->num_vmdq_qps));
14856                 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
14857         }
14858
14859         pf->queues_left = queues_left;
14860         dev_dbg(&pf->pdev->dev,
14861                 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
14862                 pf->hw.func_caps.num_tx_qp,
14863                 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
14864                 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
14865                 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
14866                 queues_left);
14867 }
14868
14869 /**
14870  * i40e_setup_pf_filter_control - Setup PF static filter control
14871  * @pf: PF to be setup
14872  *
14873  * i40e_setup_pf_filter_control sets up a PF's initial filter control
14874  * settings. If PE/FCoE are enabled then it will also set the per PF
14875  * based filter sizes required for them. It also enables Flow director,
14876  * ethertype and macvlan type filter settings for the pf.
14877  *
14878  * Returns 0 on success, negative on failure
14879  **/
14880 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
14881 {
14882         struct i40e_filter_control_settings *settings = &pf->filter_settings;
14883
14884         settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
14885
14886         /* Flow Director is enabled */
14887         if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
14888                 settings->enable_fdir = true;
14889
14890         /* Ethtype and MACVLAN filters enabled for PF */
14891         settings->enable_ethtype = true;
14892         settings->enable_macvlan = true;
14893
14894         if (i40e_set_filter_control(&pf->hw, settings))
14895                 return -ENOENT;
14896
14897         return 0;
14898 }
14899
14900 #define INFO_STRING_LEN 255
14901 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
14902 static void i40e_print_features(struct i40e_pf *pf)
14903 {
14904         struct i40e_hw *hw = &pf->hw;
14905         char *buf;
14906         int i;
14907
14908         buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
14909         if (!buf)
14910                 return;
14911
14912         i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
14913 #ifdef CONFIG_PCI_IOV
14914         i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
14915 #endif
14916         i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
14917                       pf->hw.func_caps.num_vsis,
14918                       pf->vsi[pf->lan_vsi]->num_queue_pairs);
14919         if (pf->flags & I40E_FLAG_RSS_ENABLED)
14920                 i += scnprintf(&buf[i], REMAIN(i), " RSS");
14921         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
14922                 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
14923         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14924                 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
14925                 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
14926         }
14927         if (pf->flags & I40E_FLAG_DCB_CAPABLE)
14928                 i += scnprintf(&buf[i], REMAIN(i), " DCB");
14929         i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
14930         i += scnprintf(&buf[i], REMAIN(i), " Geneve");
14931         if (pf->flags & I40E_FLAG_PTP)
14932                 i += scnprintf(&buf[i], REMAIN(i), " PTP");
14933         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
14934                 i += scnprintf(&buf[i], REMAIN(i), " VEB");
14935         else
14936                 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
14937
14938         dev_info(&pf->pdev->dev, "%s\n", buf);
14939         kfree(buf);
14940         WARN_ON(i > INFO_STRING_LEN);
14941 }
14942
14943 /**
14944  * i40e_get_platform_mac_addr - get platform-specific MAC address
14945  * @pdev: PCI device information struct
14946  * @pf: board private structure
14947  *
14948  * Look up the MAC address for the device. First we'll try
14949  * eth_platform_get_mac_address, which will check Open Firmware, or arch
14950  * specific fallback. Otherwise, we'll default to the stored value in
14951  * firmware.
14952  **/
14953 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
14954 {
14955         if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
14956                 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
14957 }
14958
14959 /**
14960  * i40e_set_fec_in_flags - helper function for setting FEC options in flags
14961  * @fec_cfg: FEC option to set in flags
14962  * @flags: ptr to flags in which we set FEC option
14963  **/
14964 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
14965 {
14966         if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
14967                 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
14968         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
14969             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
14970                 *flags |= I40E_FLAG_RS_FEC;
14971                 *flags &= ~I40E_FLAG_BASE_R_FEC;
14972         }
14973         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
14974             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
14975                 *flags |= I40E_FLAG_BASE_R_FEC;
14976                 *flags &= ~I40E_FLAG_RS_FEC;
14977         }
14978         if (fec_cfg == 0)
14979                 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
14980 }
14981
14982 /**
14983  * i40e_check_recovery_mode - check if we are running transition firmware
14984  * @pf: board private structure
14985  *
14986  * Check registers indicating the firmware runs in recovery mode. Sets the
14987  * appropriate driver state.
14988  *
14989  * Returns true if the recovery mode was detected, false otherwise
14990  **/
14991 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
14992 {
14993         u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
14994
14995         if (val & I40E_GL_FWSTS_FWS1B_MASK) {
14996                 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
14997                 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
14998                 set_bit(__I40E_RECOVERY_MODE, pf->state);
14999
15000                 return true;
15001         }
15002         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15003                 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15004
15005         return false;
15006 }
15007
15008 /**
15009  * i40e_pf_loop_reset - perform reset in a loop.
15010  * @pf: board private structure
15011  *
15012  * This function is useful when a NIC is about to enter recovery mode.
15013  * When a NIC's internal data structures are corrupted the NIC's
15014  * firmware is going to enter recovery mode.
15015  * Right after a POR it takes about 7 minutes for firmware to enter
15016  * recovery mode. Until that time a NIC is in some kind of intermediate
15017  * state. After that time period the NIC almost surely enters
15018  * recovery mode. The only way for a driver to detect intermediate
15019  * state is to issue a series of pf-resets and check a return value.
15020  * If a PF reset returns success then the firmware could be in recovery
15021  * mode so the caller of this code needs to check for recovery mode
15022  * if this function returns success. There is a little chance that
15023  * firmware will hang in intermediate state forever.
15024  * Since waiting 7 minutes is quite a lot of time this function waits
15025  * 10 seconds and then gives up by returning an error.
15026  *
15027  * Return 0 on success, negative on failure.
15028  **/
15029 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
15030 {
15031         /* wait max 10 seconds for PF reset to succeed */
15032         const unsigned long time_end = jiffies + 10 * HZ;
15033
15034         struct i40e_hw *hw = &pf->hw;
15035         i40e_status ret;
15036
15037         ret = i40e_pf_reset(hw);
15038         while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) {
15039                 usleep_range(10000, 20000);
15040                 ret = i40e_pf_reset(hw);
15041         }
15042
15043         if (ret == I40E_SUCCESS)
15044                 pf->pfr_count++;
15045         else
15046                 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15047
15048         return ret;
15049 }
15050
15051 /**
15052  * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15053  * @pf: board private structure
15054  *
15055  * Check FW registers to determine if FW issued unexpected EMP Reset.
15056  * Every time when unexpected EMP Reset occurs the FW increments
15057  * a counter of unexpected EMP Resets. When the counter reaches 10
15058  * the FW should enter the Recovery mode
15059  *
15060  * Returns true if FW issued unexpected EMP Reset
15061  **/
15062 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15063 {
15064         const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15065                            I40E_GL_FWSTS_FWS1B_MASK;
15066         return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15067                (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15068 }
15069
15070 /**
15071  * i40e_handle_resets - handle EMP resets and PF resets
15072  * @pf: board private structure
15073  *
15074  * Handle both EMP resets and PF resets and conclude whether there are
15075  * any issues regarding these resets. If there are any issues then
15076  * generate log entry.
15077  *
15078  * Return 0 if NIC is healthy or negative value when there are issues
15079  * with resets
15080  **/
15081 static i40e_status i40e_handle_resets(struct i40e_pf *pf)
15082 {
15083         const i40e_status pfr = i40e_pf_loop_reset(pf);
15084         const bool is_empr = i40e_check_fw_empr(pf);
15085
15086         if (is_empr || pfr != I40E_SUCCESS)
15087                 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15088
15089         return is_empr ? I40E_ERR_RESET_FAILED : pfr;
15090 }
15091
15092 /**
15093  * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15094  * @pf: board private structure
15095  * @hw: ptr to the hardware info
15096  *
15097  * This function does a minimal setup of all subsystems needed for running
15098  * recovery mode.
15099  *
15100  * Returns 0 on success, negative on failure
15101  **/
15102 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15103 {
15104         struct i40e_vsi *vsi;
15105         int err;
15106         int v_idx;
15107
15108         pci_save_state(pf->pdev);
15109
15110         /* set up periodic task facility */
15111         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15112         pf->service_timer_period = HZ;
15113
15114         INIT_WORK(&pf->service_task, i40e_service_task);
15115         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15116
15117         err = i40e_init_interrupt_scheme(pf);
15118         if (err)
15119                 goto err_switch_setup;
15120
15121         /* The number of VSIs reported by the FW is the minimum guaranteed
15122          * to us; HW supports far more and we share the remaining pool with
15123          * the other PFs. We allocate space for more than the guarantee with
15124          * the understanding that we might not get them all later.
15125          */
15126         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15127                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15128         else
15129                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15130
15131         /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15132         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15133                           GFP_KERNEL);
15134         if (!pf->vsi) {
15135                 err = -ENOMEM;
15136                 goto err_switch_setup;
15137         }
15138
15139         /* We allocate one VSI which is needed as absolute minimum
15140          * in order to register the netdev
15141          */
15142         v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15143         if (v_idx < 0)
15144                 goto err_switch_setup;
15145         pf->lan_vsi = v_idx;
15146         vsi = pf->vsi[v_idx];
15147         if (!vsi)
15148                 goto err_switch_setup;
15149         vsi->alloc_queue_pairs = 1;
15150         err = i40e_config_netdev(vsi);
15151         if (err)
15152                 goto err_switch_setup;
15153         err = register_netdev(vsi->netdev);
15154         if (err)
15155                 goto err_switch_setup;
15156         vsi->netdev_registered = true;
15157         i40e_dbg_pf_init(pf);
15158
15159         err = i40e_setup_misc_vector_for_recovery_mode(pf);
15160         if (err)
15161                 goto err_switch_setup;
15162
15163         /* tell the firmware that we're starting */
15164         i40e_send_version(pf);
15165
15166         /* since everything's happy, start the service_task timer */
15167         mod_timer(&pf->service_timer,
15168                   round_jiffies(jiffies + pf->service_timer_period));
15169
15170         return 0;
15171
15172 err_switch_setup:
15173         i40e_reset_interrupt_capability(pf);
15174         del_timer_sync(&pf->service_timer);
15175         i40e_shutdown_adminq(hw);
15176         iounmap(hw->hw_addr);
15177         pci_disable_pcie_error_reporting(pf->pdev);
15178         pci_release_mem_regions(pf->pdev);
15179         pci_disable_device(pf->pdev);
15180         kfree(pf);
15181
15182         return err;
15183 }
15184
15185 /**
15186  * i40e_probe - Device initialization routine
15187  * @pdev: PCI device information struct
15188  * @ent: entry in i40e_pci_tbl
15189  *
15190  * i40e_probe initializes a PF identified by a pci_dev structure.
15191  * The OS initialization, configuring of the PF private structure,
15192  * and a hardware reset occur.
15193  *
15194  * Returns 0 on success, negative on failure
15195  **/
15196 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15197 {
15198         struct i40e_aq_get_phy_abilities_resp abilities;
15199 #ifdef CONFIG_I40E_DCB
15200         enum i40e_get_fw_lldp_status_resp lldp_status;
15201         i40e_status status;
15202 #endif /* CONFIG_I40E_DCB */
15203         struct i40e_pf *pf;
15204         struct i40e_hw *hw;
15205         static u16 pfs_found;
15206         u16 wol_nvm_bits;
15207         u16 link_status;
15208         int err;
15209         u32 val;
15210         u32 i;
15211
15212         err = pci_enable_device_mem(pdev);
15213         if (err)
15214                 return err;
15215
15216         /* set up for high or low dma */
15217         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15218         if (err) {
15219                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
15220                 if (err) {
15221                         dev_err(&pdev->dev,
15222                                 "DMA configuration failed: 0x%x\n", err);
15223                         goto err_dma;
15224                 }
15225         }
15226
15227         /* set up pci connections */
15228         err = pci_request_mem_regions(pdev, i40e_driver_name);
15229         if (err) {
15230                 dev_info(&pdev->dev,
15231                          "pci_request_selected_regions failed %d\n", err);
15232                 goto err_pci_reg;
15233         }
15234
15235         pci_enable_pcie_error_reporting(pdev);
15236         pci_set_master(pdev);
15237
15238         /* Now that we have a PCI connection, we need to do the
15239          * low level device setup.  This is primarily setting up
15240          * the Admin Queue structures and then querying for the
15241          * device's current profile information.
15242          */
15243         pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15244         if (!pf) {
15245                 err = -ENOMEM;
15246                 goto err_pf_alloc;
15247         }
15248         pf->next_vsi = 0;
15249         pf->pdev = pdev;
15250         set_bit(__I40E_DOWN, pf->state);
15251
15252         hw = &pf->hw;
15253         hw->back = pf;
15254
15255         pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15256                                 I40E_MAX_CSR_SPACE);
15257         /* We believe that the highest register to read is
15258          * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15259          * is not less than that before mapping to prevent a
15260          * kernel panic.
15261          */
15262         if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15263                 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15264                         pf->ioremap_len);
15265                 err = -ENOMEM;
15266                 goto err_ioremap;
15267         }
15268         hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15269         if (!hw->hw_addr) {
15270                 err = -EIO;
15271                 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15272                          (unsigned int)pci_resource_start(pdev, 0),
15273                          pf->ioremap_len, err);
15274                 goto err_ioremap;
15275         }
15276         hw->vendor_id = pdev->vendor;
15277         hw->device_id = pdev->device;
15278         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15279         hw->subsystem_vendor_id = pdev->subsystem_vendor;
15280         hw->subsystem_device_id = pdev->subsystem_device;
15281         hw->bus.device = PCI_SLOT(pdev->devfn);
15282         hw->bus.func = PCI_FUNC(pdev->devfn);
15283         hw->bus.bus_id = pdev->bus->number;
15284         pf->instance = pfs_found;
15285
15286         /* Select something other than the 802.1ad ethertype for the
15287          * switch to use internally and drop on ingress.
15288          */
15289         hw->switch_tag = 0xffff;
15290         hw->first_tag = ETH_P_8021AD;
15291         hw->second_tag = ETH_P_8021Q;
15292
15293         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15294         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15295         INIT_LIST_HEAD(&pf->ddp_old_prof);
15296
15297         /* set up the locks for the AQ, do this only once in probe
15298          * and destroy them only once in remove
15299          */
15300         mutex_init(&hw->aq.asq_mutex);
15301         mutex_init(&hw->aq.arq_mutex);
15302
15303         pf->msg_enable = netif_msg_init(debug,
15304                                         NETIF_MSG_DRV |
15305                                         NETIF_MSG_PROBE |
15306                                         NETIF_MSG_LINK);
15307         if (debug < -1)
15308                 pf->hw.debug_mask = debug;
15309
15310         /* do a special CORER for clearing PXE mode once at init */
15311         if (hw->revision_id == 0 &&
15312             (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15313                 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15314                 i40e_flush(hw);
15315                 msleep(200);
15316                 pf->corer_count++;
15317
15318                 i40e_clear_pxe_mode(hw);
15319         }
15320
15321         /* Reset here to make sure all is clean and to define PF 'n' */
15322         i40e_clear_hw(hw);
15323
15324         err = i40e_set_mac_type(hw);
15325         if (err) {
15326                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15327                          err);
15328                 goto err_pf_reset;
15329         }
15330
15331         err = i40e_handle_resets(pf);
15332         if (err)
15333                 goto err_pf_reset;
15334
15335         i40e_check_recovery_mode(pf);
15336
15337         hw->aq.num_arq_entries = I40E_AQ_LEN;
15338         hw->aq.num_asq_entries = I40E_AQ_LEN;
15339         hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15340         hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15341         pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15342
15343         snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15344                  "%s-%s:misc",
15345                  dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15346
15347         err = i40e_init_shared_code(hw);
15348         if (err) {
15349                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15350                          err);
15351                 goto err_pf_reset;
15352         }
15353
15354         /* set up a default setting for link flow control */
15355         pf->hw.fc.requested_mode = I40E_FC_NONE;
15356
15357         err = i40e_init_adminq(hw);
15358         if (err) {
15359                 if (err == I40E_ERR_FIRMWARE_API_VERSION)
15360                         dev_info(&pdev->dev,
15361                                  "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15362                                  hw->aq.api_maj_ver,
15363                                  hw->aq.api_min_ver,
15364                                  I40E_FW_API_VERSION_MAJOR,
15365                                  I40E_FW_MINOR_VERSION(hw));
15366                 else
15367                         dev_info(&pdev->dev,
15368                                  "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15369
15370                 goto err_pf_reset;
15371         }
15372         i40e_get_oem_version(hw);
15373
15374         /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15375         dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15376                  hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15377                  hw->aq.api_maj_ver, hw->aq.api_min_ver,
15378                  i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15379                  hw->subsystem_vendor_id, hw->subsystem_device_id);
15380
15381         if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15382             hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15383                 dev_info(&pdev->dev,
15384                          "The driver for the device detected a newer version of the NVM image v%u.%u than expected v%u.%u. Please install the most recent version of the network driver.\n",
15385                          hw->aq.api_maj_ver,
15386                          hw->aq.api_min_ver,
15387                          I40E_FW_API_VERSION_MAJOR,
15388                          I40E_FW_MINOR_VERSION(hw));
15389         else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15390                 dev_info(&pdev->dev,
15391                          "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15392                          hw->aq.api_maj_ver,
15393                          hw->aq.api_min_ver,
15394                          I40E_FW_API_VERSION_MAJOR,
15395                          I40E_FW_MINOR_VERSION(hw));
15396
15397         i40e_verify_eeprom(pf);
15398
15399         /* Rev 0 hardware was never productized */
15400         if (hw->revision_id < 1)
15401                 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15402
15403         i40e_clear_pxe_mode(hw);
15404
15405         err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15406         if (err)
15407                 goto err_adminq_setup;
15408
15409         err = i40e_sw_init(pf);
15410         if (err) {
15411                 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15412                 goto err_sw_init;
15413         }
15414
15415         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15416                 return i40e_init_recovery_mode(pf, hw);
15417
15418         err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15419                                 hw->func_caps.num_rx_qp, 0, 0);
15420         if (err) {
15421                 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15422                 goto err_init_lan_hmc;
15423         }
15424
15425         err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15426         if (err) {
15427                 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15428                 err = -ENOENT;
15429                 goto err_configure_lan_hmc;
15430         }
15431
15432         /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15433          * Ignore error return codes because if it was already disabled via
15434          * hardware settings this will fail
15435          */
15436         if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15437                 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15438                 i40e_aq_stop_lldp(hw, true, false, NULL);
15439         }
15440
15441         /* allow a platform config to override the HW addr */
15442         i40e_get_platform_mac_addr(pdev, pf);
15443
15444         if (!is_valid_ether_addr(hw->mac.addr)) {
15445                 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15446                 err = -EIO;
15447                 goto err_mac_addr;
15448         }
15449         dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15450         ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15451         i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15452         if (is_valid_ether_addr(hw->mac.port_addr))
15453                 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15454
15455         pci_set_drvdata(pdev, pf);
15456         pci_save_state(pdev);
15457
15458 #ifdef CONFIG_I40E_DCB
15459         status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15460         (!status &&
15461          lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15462                 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15463                 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15464         dev_info(&pdev->dev,
15465                  (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15466                         "FW LLDP is disabled\n" :
15467                         "FW LLDP is enabled\n");
15468
15469         /* Enable FW to write default DCB config on link-up */
15470         i40e_aq_set_dcb_parameters(hw, true, NULL);
15471
15472         err = i40e_init_pf_dcb(pf);
15473         if (err) {
15474                 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15475                 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15476                 /* Continue without DCB enabled */
15477         }
15478 #endif /* CONFIG_I40E_DCB */
15479
15480         /* set up periodic task facility */
15481         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15482         pf->service_timer_period = HZ;
15483
15484         INIT_WORK(&pf->service_task, i40e_service_task);
15485         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15486
15487         /* NVM bit on means WoL disabled for the port */
15488         i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15489         if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15490                 pf->wol_en = false;
15491         else
15492                 pf->wol_en = true;
15493         device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15494
15495         /* set up the main switch operations */
15496         i40e_determine_queue_usage(pf);
15497         err = i40e_init_interrupt_scheme(pf);
15498         if (err)
15499                 goto err_switch_setup;
15500
15501         pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15502         pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15503         pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15504         pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15505         pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15506         pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15507                                                     UDP_TUNNEL_TYPE_GENEVE;
15508
15509         /* The number of VSIs reported by the FW is the minimum guaranteed
15510          * to us; HW supports far more and we share the remaining pool with
15511          * the other PFs. We allocate space for more than the guarantee with
15512          * the understanding that we might not get them all later.
15513          */
15514         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15515                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15516         else
15517                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15518         if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15519                 dev_warn(&pf->pdev->dev,
15520                          "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15521                          pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15522                 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15523         }
15524
15525         /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15526         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15527                           GFP_KERNEL);
15528         if (!pf->vsi) {
15529                 err = -ENOMEM;
15530                 goto err_switch_setup;
15531         }
15532
15533 #ifdef CONFIG_PCI_IOV
15534         /* prep for VF support */
15535         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15536             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15537             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15538                 if (pci_num_vf(pdev))
15539                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15540         }
15541 #endif
15542         err = i40e_setup_pf_switch(pf, false);
15543         if (err) {
15544                 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15545                 goto err_vsis;
15546         }
15547         INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15548
15549         /* if FDIR VSI was set up, start it now */
15550         for (i = 0; i < pf->num_alloc_vsi; i++) {
15551                 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15552                         i40e_vsi_open(pf->vsi[i]);
15553                         break;
15554                 }
15555         }
15556
15557         /* The driver only wants link up/down and module qualification
15558          * reports from firmware.  Note the negative logic.
15559          */
15560         err = i40e_aq_set_phy_int_mask(&pf->hw,
15561                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
15562                                          I40E_AQ_EVENT_MEDIA_NA |
15563                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15564         if (err)
15565                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15566                          i40e_stat_str(&pf->hw, err),
15567                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15568
15569         /* Reconfigure hardware for allowing smaller MSS in the case
15570          * of TSO, so that we avoid the MDD being fired and causing
15571          * a reset in the case of small MSS+TSO.
15572          */
15573         val = rd32(hw, I40E_REG_MSS);
15574         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15575                 val &= ~I40E_REG_MSS_MIN_MASK;
15576                 val |= I40E_64BYTE_MSS;
15577                 wr32(hw, I40E_REG_MSS, val);
15578         }
15579
15580         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15581                 msleep(75);
15582                 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15583                 if (err)
15584                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15585                                  i40e_stat_str(&pf->hw, err),
15586                                  i40e_aq_str(&pf->hw,
15587                                              pf->hw.aq.asq_last_status));
15588         }
15589         /* The main driver is (mostly) up and happy. We need to set this state
15590          * before setting up the misc vector or we get a race and the vector
15591          * ends up disabled forever.
15592          */
15593         clear_bit(__I40E_DOWN, pf->state);
15594
15595         /* In case of MSIX we are going to setup the misc vector right here
15596          * to handle admin queue events etc. In case of legacy and MSI
15597          * the misc functionality and queue processing is combined in
15598          * the same vector and that gets setup at open.
15599          */
15600         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15601                 err = i40e_setup_misc_vector(pf);
15602                 if (err) {
15603                         dev_info(&pdev->dev,
15604                                  "setup of misc vector failed: %d\n", err);
15605                         i40e_cloud_filter_exit(pf);
15606                         i40e_fdir_teardown(pf);
15607                         goto err_vsis;
15608                 }
15609         }
15610
15611 #ifdef CONFIG_PCI_IOV
15612         /* prep for VF support */
15613         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15614             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15615             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15616                 /* disable link interrupts for VFs */
15617                 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15618                 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15619                 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15620                 i40e_flush(hw);
15621
15622                 if (pci_num_vf(pdev)) {
15623                         dev_info(&pdev->dev,
15624                                  "Active VFs found, allocating resources.\n");
15625                         err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15626                         if (err)
15627                                 dev_info(&pdev->dev,
15628                                          "Error %d allocating resources for existing VFs\n",
15629                                          err);
15630                 }
15631         }
15632 #endif /* CONFIG_PCI_IOV */
15633
15634         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15635                 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15636                                                       pf->num_iwarp_msix,
15637                                                       I40E_IWARP_IRQ_PILE_ID);
15638                 if (pf->iwarp_base_vector < 0) {
15639                         dev_info(&pdev->dev,
15640                                  "failed to get tracking for %d vectors for IWARP err=%d\n",
15641                                  pf->num_iwarp_msix, pf->iwarp_base_vector);
15642                         pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15643                 }
15644         }
15645
15646         i40e_dbg_pf_init(pf);
15647
15648         /* tell the firmware that we're starting */
15649         i40e_send_version(pf);
15650
15651         /* since everything's happy, start the service_task timer */
15652         mod_timer(&pf->service_timer,
15653                   round_jiffies(jiffies + pf->service_timer_period));
15654
15655         /* add this PF to client device list and launch a client service task */
15656         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15657                 err = i40e_lan_add_device(pf);
15658                 if (err)
15659                         dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15660                                  err);
15661         }
15662
15663 #define PCI_SPEED_SIZE 8
15664 #define PCI_WIDTH_SIZE 8
15665         /* Devices on the IOSF bus do not have this information
15666          * and will report PCI Gen 1 x 1 by default so don't bother
15667          * checking them.
15668          */
15669         if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15670                 char speed[PCI_SPEED_SIZE] = "Unknown";
15671                 char width[PCI_WIDTH_SIZE] = "Unknown";
15672
15673                 /* Get the negotiated link width and speed from PCI config
15674                  * space
15675                  */
15676                 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15677                                           &link_status);
15678
15679                 i40e_set_pci_config_data(hw, link_status);
15680
15681                 switch (hw->bus.speed) {
15682                 case i40e_bus_speed_8000:
15683                         strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15684                 case i40e_bus_speed_5000:
15685                         strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15686                 case i40e_bus_speed_2500:
15687                         strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15688                 default:
15689                         break;
15690                 }
15691                 switch (hw->bus.width) {
15692                 case i40e_bus_width_pcie_x8:
15693                         strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15694                 case i40e_bus_width_pcie_x4:
15695                         strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15696                 case i40e_bus_width_pcie_x2:
15697                         strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15698                 case i40e_bus_width_pcie_x1:
15699                         strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15700                 default:
15701                         break;
15702                 }
15703
15704                 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15705                          speed, width);
15706
15707                 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15708                     hw->bus.speed < i40e_bus_speed_8000) {
15709                         dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15710                         dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15711                 }
15712         }
15713
15714         /* get the requested speeds from the fw */
15715         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15716         if (err)
15717                 dev_dbg(&pf->pdev->dev, "get requested speeds ret =  %s last_status =  %s\n",
15718                         i40e_stat_str(&pf->hw, err),
15719                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15720         pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15721
15722         /* set the FEC config due to the board capabilities */
15723         i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15724
15725         /* get the supported phy types from the fw */
15726         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15727         if (err)
15728                 dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %s last_status =  %s\n",
15729                         i40e_stat_str(&pf->hw, err),
15730                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15731
15732         /* make sure the MFS hasn't been set lower than the default */
15733 #define MAX_FRAME_SIZE_DEFAULT 0x2600
15734         val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
15735                I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
15736         if (val < MAX_FRAME_SIZE_DEFAULT)
15737                 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
15738                          i, val);
15739
15740         /* Add a filter to drop all Flow control frames from any VSI from being
15741          * transmitted. By doing so we stop a malicious VF from sending out
15742          * PAUSE or PFC frames and potentially controlling traffic for other
15743          * PF/VF VSIs.
15744          * The FW can still send Flow control frames if enabled.
15745          */
15746         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15747                                                        pf->main_vsi_seid);
15748 #ifdef CONFIG_I40E_DCB
15749         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP)
15750                 i40e_set_lldp_forwarding(pf, true);
15751 #endif /* CONFIG_I40E_DCB */
15752
15753         if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15754                 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15755                 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15756         if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15757                 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15758         /* print a string summarizing features */
15759         i40e_print_features(pf);
15760
15761         return 0;
15762
15763         /* Unwind what we've done if something failed in the setup */
15764 err_vsis:
15765         set_bit(__I40E_DOWN, pf->state);
15766         i40e_clear_interrupt_scheme(pf);
15767         kfree(pf->vsi);
15768 err_switch_setup:
15769         i40e_reset_interrupt_capability(pf);
15770         del_timer_sync(&pf->service_timer);
15771 err_mac_addr:
15772 err_configure_lan_hmc:
15773         (void)i40e_shutdown_lan_hmc(hw);
15774 err_init_lan_hmc:
15775         kfree(pf->qp_pile);
15776 err_sw_init:
15777 err_adminq_setup:
15778 err_pf_reset:
15779         iounmap(hw->hw_addr);
15780 err_ioremap:
15781         kfree(pf);
15782 err_pf_alloc:
15783         pci_disable_pcie_error_reporting(pdev);
15784         pci_release_mem_regions(pdev);
15785 err_pci_reg:
15786 err_dma:
15787         pci_disable_device(pdev);
15788         return err;
15789 }
15790
15791 /**
15792  * i40e_remove - Device removal routine
15793  * @pdev: PCI device information struct
15794  *
15795  * i40e_remove is called by the PCI subsystem to alert the driver
15796  * that is should release a PCI device.  This could be caused by a
15797  * Hot-Plug event, or because the driver is going to be removed from
15798  * memory.
15799  **/
15800 static void i40e_remove(struct pci_dev *pdev)
15801 {
15802         struct i40e_pf *pf = pci_get_drvdata(pdev);
15803         struct i40e_hw *hw = &pf->hw;
15804         i40e_status ret_code;
15805         int i;
15806
15807         i40e_dbg_pf_exit(pf);
15808
15809         i40e_ptp_stop(pf);
15810
15811         /* Disable RSS in hw */
15812         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
15813         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
15814
15815         while (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
15816                 usleep_range(1000, 2000);
15817
15818         if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
15819                 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
15820                 i40e_free_vfs(pf);
15821                 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
15822         }
15823         /* no more scheduling of any task */
15824         set_bit(__I40E_SUSPENDED, pf->state);
15825         set_bit(__I40E_DOWN, pf->state);
15826         if (pf->service_timer.function)
15827                 del_timer_sync(&pf->service_timer);
15828         if (pf->service_task.func)
15829                 cancel_work_sync(&pf->service_task);
15830
15831         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
15832                 struct i40e_vsi *vsi = pf->vsi[0];
15833
15834                 /* We know that we have allocated only one vsi for this PF,
15835                  * it was just for registering netdevice, so the interface
15836                  * could be visible in the 'ifconfig' output
15837                  */
15838                 unregister_netdev(vsi->netdev);
15839                 free_netdev(vsi->netdev);
15840
15841                 goto unmap;
15842         }
15843
15844         /* Client close must be called explicitly here because the timer
15845          * has been stopped.
15846          */
15847         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15848
15849         i40e_fdir_teardown(pf);
15850
15851         /* If there is a switch structure or any orphans, remove them.
15852          * This will leave only the PF's VSI remaining.
15853          */
15854         for (i = 0; i < I40E_MAX_VEB; i++) {
15855                 if (!pf->veb[i])
15856                         continue;
15857
15858                 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
15859                     pf->veb[i]->uplink_seid == 0)
15860                         i40e_switch_branch_release(pf->veb[i]);
15861         }
15862
15863         /* Now we can shutdown the PF's VSI, just before we kill
15864          * adminq and hmc.
15865          */
15866         if (pf->vsi[pf->lan_vsi])
15867                 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
15868
15869         i40e_cloud_filter_exit(pf);
15870
15871         /* remove attached clients */
15872         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15873                 ret_code = i40e_lan_del_device(pf);
15874                 if (ret_code)
15875                         dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
15876                                  ret_code);
15877         }
15878
15879         /* shutdown and destroy the HMC */
15880         if (hw->hmc.hmc_obj) {
15881                 ret_code = i40e_shutdown_lan_hmc(hw);
15882                 if (ret_code)
15883                         dev_warn(&pdev->dev,
15884                                  "Failed to destroy the HMC resources: %d\n",
15885                                  ret_code);
15886         }
15887
15888 unmap:
15889         /* Free MSI/legacy interrupt 0 when in recovery mode. */
15890         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15891             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15892                 free_irq(pf->pdev->irq, pf);
15893
15894         /* shutdown the adminq */
15895         i40e_shutdown_adminq(hw);
15896
15897         /* destroy the locks only once, here */
15898         mutex_destroy(&hw->aq.arq_mutex);
15899         mutex_destroy(&hw->aq.asq_mutex);
15900
15901         /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
15902         rtnl_lock();
15903         i40e_clear_interrupt_scheme(pf);
15904         for (i = 0; i < pf->num_alloc_vsi; i++) {
15905                 if (pf->vsi[i]) {
15906                         if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
15907                                 i40e_vsi_clear_rings(pf->vsi[i]);
15908                         i40e_vsi_clear(pf->vsi[i]);
15909                         pf->vsi[i] = NULL;
15910                 }
15911         }
15912         rtnl_unlock();
15913
15914         for (i = 0; i < I40E_MAX_VEB; i++) {
15915                 kfree(pf->veb[i]);
15916                 pf->veb[i] = NULL;
15917         }
15918
15919         kfree(pf->qp_pile);
15920         kfree(pf->vsi);
15921
15922         iounmap(hw->hw_addr);
15923         kfree(pf);
15924         pci_release_mem_regions(pdev);
15925
15926         pci_disable_pcie_error_reporting(pdev);
15927         pci_disable_device(pdev);
15928 }
15929
15930 /**
15931  * i40e_pci_error_detected - warning that something funky happened in PCI land
15932  * @pdev: PCI device information struct
15933  * @error: the type of PCI error
15934  *
15935  * Called to warn that something happened and the error handling steps
15936  * are in progress.  Allows the driver to quiesce things, be ready for
15937  * remediation.
15938  **/
15939 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
15940                                                 pci_channel_state_t error)
15941 {
15942         struct i40e_pf *pf = pci_get_drvdata(pdev);
15943
15944         dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
15945
15946         if (!pf) {
15947                 dev_info(&pdev->dev,
15948                          "Cannot recover - error happened during device probe\n");
15949                 return PCI_ERS_RESULT_DISCONNECT;
15950         }
15951
15952         /* shutdown all operations */
15953         if (!test_bit(__I40E_SUSPENDED, pf->state))
15954                 i40e_prep_for_reset(pf);
15955
15956         /* Request a slot reset */
15957         return PCI_ERS_RESULT_NEED_RESET;
15958 }
15959
15960 /**
15961  * i40e_pci_error_slot_reset - a PCI slot reset just happened
15962  * @pdev: PCI device information struct
15963  *
15964  * Called to find if the driver can work with the device now that
15965  * the pci slot has been reset.  If a basic connection seems good
15966  * (registers are readable and have sane content) then return a
15967  * happy little PCI_ERS_RESULT_xxx.
15968  **/
15969 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
15970 {
15971         struct i40e_pf *pf = pci_get_drvdata(pdev);
15972         pci_ers_result_t result;
15973         u32 reg;
15974
15975         dev_dbg(&pdev->dev, "%s\n", __func__);
15976         if (pci_enable_device_mem(pdev)) {
15977                 dev_info(&pdev->dev,
15978                          "Cannot re-enable PCI device after reset.\n");
15979                 result = PCI_ERS_RESULT_DISCONNECT;
15980         } else {
15981                 pci_set_master(pdev);
15982                 pci_restore_state(pdev);
15983                 pci_save_state(pdev);
15984                 pci_wake_from_d3(pdev, false);
15985
15986                 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
15987                 if (reg == 0)
15988                         result = PCI_ERS_RESULT_RECOVERED;
15989                 else
15990                         result = PCI_ERS_RESULT_DISCONNECT;
15991         }
15992
15993         return result;
15994 }
15995
15996 /**
15997  * i40e_pci_error_reset_prepare - prepare device driver for pci reset
15998  * @pdev: PCI device information struct
15999  */
16000 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16001 {
16002         struct i40e_pf *pf = pci_get_drvdata(pdev);
16003
16004         i40e_prep_for_reset(pf);
16005 }
16006
16007 /**
16008  * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16009  * @pdev: PCI device information struct
16010  */
16011 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16012 {
16013         struct i40e_pf *pf = pci_get_drvdata(pdev);
16014
16015         i40e_reset_and_rebuild(pf, false, false);
16016 }
16017
16018 /**
16019  * i40e_pci_error_resume - restart operations after PCI error recovery
16020  * @pdev: PCI device information struct
16021  *
16022  * Called to allow the driver to bring things back up after PCI error
16023  * and/or reset recovery has finished.
16024  **/
16025 static void i40e_pci_error_resume(struct pci_dev *pdev)
16026 {
16027         struct i40e_pf *pf = pci_get_drvdata(pdev);
16028
16029         dev_dbg(&pdev->dev, "%s\n", __func__);
16030         if (test_bit(__I40E_SUSPENDED, pf->state))
16031                 return;
16032
16033         i40e_handle_reset_warning(pf, false);
16034 }
16035
16036 /**
16037  * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16038  * using the mac_address_write admin q function
16039  * @pf: pointer to i40e_pf struct
16040  **/
16041 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16042 {
16043         struct i40e_hw *hw = &pf->hw;
16044         i40e_status ret;
16045         u8 mac_addr[6];
16046         u16 flags = 0;
16047
16048         /* Get current MAC address in case it's an LAA */
16049         if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16050                 ether_addr_copy(mac_addr,
16051                                 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16052         } else {
16053                 dev_err(&pf->pdev->dev,
16054                         "Failed to retrieve MAC address; using default\n");
16055                 ether_addr_copy(mac_addr, hw->mac.addr);
16056         }
16057
16058         /* The FW expects the mac address write cmd to first be called with
16059          * one of these flags before calling it again with the multicast
16060          * enable flags.
16061          */
16062         flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16063
16064         if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16065                 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16066
16067         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16068         if (ret) {
16069                 dev_err(&pf->pdev->dev,
16070                         "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16071                 return;
16072         }
16073
16074         flags = I40E_AQC_MC_MAG_EN
16075                         | I40E_AQC_WOL_PRESERVE_ON_PFR
16076                         | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16077         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16078         if (ret)
16079                 dev_err(&pf->pdev->dev,
16080                         "Failed to enable Multicast Magic Packet wake up\n");
16081 }
16082
16083 /**
16084  * i40e_shutdown - PCI callback for shutting down
16085  * @pdev: PCI device information struct
16086  **/
16087 static void i40e_shutdown(struct pci_dev *pdev)
16088 {
16089         struct i40e_pf *pf = pci_get_drvdata(pdev);
16090         struct i40e_hw *hw = &pf->hw;
16091
16092         set_bit(__I40E_SUSPENDED, pf->state);
16093         set_bit(__I40E_DOWN, pf->state);
16094
16095         del_timer_sync(&pf->service_timer);
16096         cancel_work_sync(&pf->service_task);
16097         i40e_cloud_filter_exit(pf);
16098         i40e_fdir_teardown(pf);
16099
16100         /* Client close must be called explicitly here because the timer
16101          * has been stopped.
16102          */
16103         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16104
16105         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16106                 i40e_enable_mc_magic_wake(pf);
16107
16108         i40e_prep_for_reset(pf);
16109
16110         wr32(hw, I40E_PFPM_APM,
16111              (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16112         wr32(hw, I40E_PFPM_WUFC,
16113              (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16114
16115         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16116         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16117             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16118                 free_irq(pf->pdev->irq, pf);
16119
16120         /* Since we're going to destroy queues during the
16121          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16122          * whole section
16123          */
16124         rtnl_lock();
16125         i40e_clear_interrupt_scheme(pf);
16126         rtnl_unlock();
16127
16128         if (system_state == SYSTEM_POWER_OFF) {
16129                 pci_wake_from_d3(pdev, pf->wol_en);
16130                 pci_set_power_state(pdev, PCI_D3hot);
16131         }
16132 }
16133
16134 /**
16135  * i40e_suspend - PM callback for moving to D3
16136  * @dev: generic device information structure
16137  **/
16138 static int __maybe_unused i40e_suspend(struct device *dev)
16139 {
16140         struct i40e_pf *pf = dev_get_drvdata(dev);
16141         struct i40e_hw *hw = &pf->hw;
16142
16143         /* If we're already suspended, then there is nothing to do */
16144         if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16145                 return 0;
16146
16147         set_bit(__I40E_DOWN, pf->state);
16148
16149         /* Ensure service task will not be running */
16150         del_timer_sync(&pf->service_timer);
16151         cancel_work_sync(&pf->service_task);
16152
16153         /* Client close must be called explicitly here because the timer
16154          * has been stopped.
16155          */
16156         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16157
16158         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16159                 i40e_enable_mc_magic_wake(pf);
16160
16161         /* Since we're going to destroy queues during the
16162          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16163          * whole section
16164          */
16165         rtnl_lock();
16166
16167         i40e_prep_for_reset(pf);
16168
16169         wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16170         wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16171
16172         /* Clear the interrupt scheme and release our IRQs so that the system
16173          * can safely hibernate even when there are a large number of CPUs.
16174          * Otherwise hibernation might fail when mapping all the vectors back
16175          * to CPU0.
16176          */
16177         i40e_clear_interrupt_scheme(pf);
16178
16179         rtnl_unlock();
16180
16181         return 0;
16182 }
16183
16184 /**
16185  * i40e_resume - PM callback for waking up from D3
16186  * @dev: generic device information structure
16187  **/
16188 static int __maybe_unused i40e_resume(struct device *dev)
16189 {
16190         struct i40e_pf *pf = dev_get_drvdata(dev);
16191         int err;
16192
16193         /* If we're not suspended, then there is nothing to do */
16194         if (!test_bit(__I40E_SUSPENDED, pf->state))
16195                 return 0;
16196
16197         /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16198          * since we're going to be restoring queues
16199          */
16200         rtnl_lock();
16201
16202         /* We cleared the interrupt scheme when we suspended, so we need to
16203          * restore it now to resume device functionality.
16204          */
16205         err = i40e_restore_interrupt_scheme(pf);
16206         if (err) {
16207                 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16208                         err);
16209         }
16210
16211         clear_bit(__I40E_DOWN, pf->state);
16212         i40e_reset_and_rebuild(pf, false, true);
16213
16214         rtnl_unlock();
16215
16216         /* Clear suspended state last after everything is recovered */
16217         clear_bit(__I40E_SUSPENDED, pf->state);
16218
16219         /* Restart the service task */
16220         mod_timer(&pf->service_timer,
16221                   round_jiffies(jiffies + pf->service_timer_period));
16222
16223         return 0;
16224 }
16225
16226 static const struct pci_error_handlers i40e_err_handler = {
16227         .error_detected = i40e_pci_error_detected,
16228         .slot_reset = i40e_pci_error_slot_reset,
16229         .reset_prepare = i40e_pci_error_reset_prepare,
16230         .reset_done = i40e_pci_error_reset_done,
16231         .resume = i40e_pci_error_resume,
16232 };
16233
16234 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16235
16236 static struct pci_driver i40e_driver = {
16237         .name     = i40e_driver_name,
16238         .id_table = i40e_pci_tbl,
16239         .probe    = i40e_probe,
16240         .remove   = i40e_remove,
16241         .driver   = {
16242                 .pm = &i40e_pm_ops,
16243         },
16244         .shutdown = i40e_shutdown,
16245         .err_handler = &i40e_err_handler,
16246         .sriov_configure = i40e_pci_sriov_configure,
16247 };
16248
16249 /**
16250  * i40e_init_module - Driver registration routine
16251  *
16252  * i40e_init_module is the first routine called when the driver is
16253  * loaded. All it does is register with the PCI subsystem.
16254  **/
16255 static int __init i40e_init_module(void)
16256 {
16257         pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16258         pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16259
16260         /* There is no need to throttle the number of active tasks because
16261          * each device limits its own task using a state bit for scheduling
16262          * the service task, and the device tasks do not interfere with each
16263          * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16264          * since we need to be able to guarantee forward progress even under
16265          * memory pressure.
16266          */
16267         i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16268         if (!i40e_wq) {
16269                 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16270                 return -ENOMEM;
16271         }
16272
16273         i40e_dbg_init();
16274         return pci_register_driver(&i40e_driver);
16275 }
16276 module_init(i40e_init_module);
16277
16278 /**
16279  * i40e_exit_module - Driver exit cleanup routine
16280  *
16281  * i40e_exit_module is called just before the driver is removed
16282  * from memory.
16283  **/
16284 static void __exit i40e_exit_module(void)
16285 {
16286         pci_unregister_driver(&i40e_driver);
16287         destroy_workqueue(i40e_wq);
16288         i40e_dbg_exit();
16289 }
16290 module_exit(i40e_exit_module);