1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
4 #include <linux/etherdevice.h>
5 #include <linux/of_net.h>
11 #include "i40e_diag.h"
13 #include <net/udp_tunnel.h>
14 #include <net/xdp_sock_drv.h>
15 /* All i40e tracepoints are defined by the include below, which
16 * must be included exactly once across the whole kernel with
17 * CREATE_TRACE_POINTS defined
19 #define CREATE_TRACE_POINTS
20 #include "i40e_trace.h"
22 const char i40e_driver_name[] = "i40e";
23 static const char i40e_driver_string[] =
24 "Intel(R) Ethernet Connection XL710 Network Driver";
28 #define DRV_VERSION_MAJOR 2
29 #define DRV_VERSION_MINOR 8
30 #define DRV_VERSION_BUILD 20
31 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
32 __stringify(DRV_VERSION_MINOR) "." \
33 __stringify(DRV_VERSION_BUILD) DRV_KERN
34 const char i40e_driver_version_str[] = DRV_VERSION;
35 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
37 /* a bit of forward declarations */
38 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
39 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
40 static int i40e_add_vsi(struct i40e_vsi *vsi);
41 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
42 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
43 static int i40e_setup_misc_vector(struct i40e_pf *pf);
44 static void i40e_determine_queue_usage(struct i40e_pf *pf);
45 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
46 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired);
47 static int i40e_reset(struct i40e_pf *pf);
48 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
49 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
50 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
51 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
52 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
53 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
54 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
55 static int i40e_get_capabilities(struct i40e_pf *pf,
56 enum i40e_admin_queue_opc list_type);
59 /* i40e_pci_tbl - PCI Device ID Table
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static const struct pci_device_id i40e_pci_tbl[] = {
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
91 /* required last entry */
94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
96 #define I40E_MAX_VF_COUNT 128
97 static int debug = -1;
98 module_param(debug, uint, 0);
99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103 MODULE_LICENSE("GPL v2");
104 MODULE_VERSION(DRV_VERSION);
106 static struct workqueue_struct *i40e_wq;
109 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
110 * @hw: pointer to the HW structure
111 * @mem: ptr to mem struct to fill out
112 * @size: size of memory requested
113 * @alignment: what to align the allocation to
115 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
116 u64 size, u32 alignment)
118 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
120 mem->size = ALIGN(size, alignment);
121 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
130 * i40e_free_dma_mem_d - OS specific memory free for shared code
131 * @hw: pointer to the HW structure
132 * @mem: ptr to mem struct to free
134 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
136 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
138 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
147 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
148 * @hw: pointer to the HW structure
149 * @mem: ptr to mem struct to fill out
150 * @size: size of memory requested
152 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
156 mem->va = kzalloc(size, GFP_KERNEL);
165 * i40e_free_virt_mem_d - OS specific memory free for shared code
166 * @hw: pointer to the HW structure
167 * @mem: ptr to mem struct to free
169 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
171 /* it's ok to kfree a NULL pointer */
180 * i40e_get_lump - find a lump of free generic resource
181 * @pf: board private structure
182 * @pile: the pile of resource to search
183 * @needed: the number of items needed
184 * @id: an owner id to stick on the items assigned
186 * Returns the base item index of the lump, or negative for error
188 * The search_hint trick and lack of advanced fit-finding only work
189 * because we're highly likely to have all the same size lump requests.
190 * Linear search time and any fragmentation should be minimal.
192 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
198 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
199 dev_info(&pf->pdev->dev,
200 "param err: pile=%s needed=%d id=0x%04x\n",
201 pile ? "<valid>" : "<null>", needed, id);
205 /* start the linear search with an imperfect hint */
206 i = pile->search_hint;
207 while (i < pile->num_entries) {
208 /* skip already allocated entries */
209 if (pile->list[i] & I40E_PILE_VALID_BIT) {
214 /* do we have enough in this lump? */
215 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
216 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
221 /* there was enough, so assign it to the requestor */
222 for (j = 0; j < needed; j++)
223 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
225 pile->search_hint = i + j;
229 /* not enough, so skip over it and continue looking */
237 * i40e_put_lump - return a lump of generic resource
238 * @pile: the pile of resource to search
239 * @index: the base item index
240 * @id: the owner id of the items assigned
242 * Returns the count of items in the lump
244 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
246 int valid_id = (id | I40E_PILE_VALID_BIT);
250 if (!pile || index >= pile->num_entries)
254 i < pile->num_entries && pile->list[i] == valid_id;
260 if (count && index < pile->search_hint)
261 pile->search_hint = index;
267 * i40e_find_vsi_from_id - searches for the vsi with the given id
268 * @pf: the pf structure to search for the vsi
269 * @id: id of the vsi it is searching for
271 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
275 for (i = 0; i < pf->num_alloc_vsi; i++)
276 if (pf->vsi[i] && (pf->vsi[i]->id == id))
283 * i40e_service_event_schedule - Schedule the service task to wake up
284 * @pf: board private structure
286 * If not already scheduled, this puts the task into the work queue
288 void i40e_service_event_schedule(struct i40e_pf *pf)
290 if ((!test_bit(__I40E_DOWN, pf->state) &&
291 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
292 test_bit(__I40E_RECOVERY_MODE, pf->state))
293 queue_work(i40e_wq, &pf->service_task);
297 * i40e_tx_timeout - Respond to a Tx Hang
298 * @netdev: network interface device structure
300 * If any port has noticed a Tx timeout, it is likely that the whole
301 * device is munged, not just the one netdev port, so go for the full
304 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
306 struct i40e_netdev_priv *np = netdev_priv(netdev);
307 struct i40e_vsi *vsi = np->vsi;
308 struct i40e_pf *pf = vsi->back;
309 struct i40e_ring *tx_ring = NULL;
313 pf->tx_timeout_count++;
315 /* with txqueue index, find the tx_ring struct */
316 for (i = 0; i < vsi->num_queue_pairs; i++) {
317 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
319 vsi->tx_rings[i]->queue_index) {
320 tx_ring = vsi->tx_rings[i];
326 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
327 pf->tx_timeout_recovery_level = 1; /* reset after some time */
328 else if (time_before(jiffies,
329 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
330 return; /* don't do any new action before the next timeout */
332 /* don't kick off another recovery if one is already pending */
333 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
337 head = i40e_get_head(tx_ring);
338 /* Read interrupt register */
339 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
341 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
342 tx_ring->vsi->base_vector - 1));
344 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
346 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
347 vsi->seid, txqueue, tx_ring->next_to_clean,
348 head, tx_ring->next_to_use,
349 readl(tx_ring->tail), val);
352 pf->tx_timeout_last_recovery = jiffies;
353 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
354 pf->tx_timeout_recovery_level, txqueue);
356 switch (pf->tx_timeout_recovery_level) {
358 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
361 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
364 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
367 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
371 i40e_service_event_schedule(pf);
372 pf->tx_timeout_recovery_level++;
376 * i40e_get_vsi_stats_struct - Get System Network Statistics
377 * @vsi: the VSI we care about
379 * Returns the address of the device statistics structure.
380 * The statistics are actually updated from the service task.
382 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
384 return &vsi->net_stats;
388 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
389 * @ring: Tx ring to get statistics from
390 * @stats: statistics entry to be updated
392 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
393 struct rtnl_link_stats64 *stats)
399 start = u64_stats_fetch_begin_irq(&ring->syncp);
400 packets = ring->stats.packets;
401 bytes = ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
404 stats->tx_packets += packets;
405 stats->tx_bytes += bytes;
409 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
410 * @netdev: network interface device structure
411 * @stats: data structure to store statistics
413 * Returns the address of the device statistics structure.
414 * The statistics are actually updated from the service task.
416 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
417 struct rtnl_link_stats64 *stats)
419 struct i40e_netdev_priv *np = netdev_priv(netdev);
420 struct i40e_vsi *vsi = np->vsi;
421 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
422 struct i40e_ring *ring;
425 if (test_bit(__I40E_VSI_DOWN, vsi->state))
432 for (i = 0; i < vsi->num_queue_pairs; i++) {
436 ring = READ_ONCE(vsi->tx_rings[i]);
439 i40e_get_netdev_stats_struct_tx(ring, stats);
441 if (i40e_enabled_xdp_vsi(vsi)) {
442 ring = READ_ONCE(vsi->xdp_rings[i]);
445 i40e_get_netdev_stats_struct_tx(ring, stats);
448 ring = READ_ONCE(vsi->rx_rings[i]);
452 start = u64_stats_fetch_begin_irq(&ring->syncp);
453 packets = ring->stats.packets;
454 bytes = ring->stats.bytes;
455 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
457 stats->rx_packets += packets;
458 stats->rx_bytes += bytes;
463 /* following stats updated by i40e_watchdog_subtask() */
464 stats->multicast = vsi_stats->multicast;
465 stats->tx_errors = vsi_stats->tx_errors;
466 stats->tx_dropped = vsi_stats->tx_dropped;
467 stats->rx_errors = vsi_stats->rx_errors;
468 stats->rx_dropped = vsi_stats->rx_dropped;
469 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
470 stats->rx_length_errors = vsi_stats->rx_length_errors;
474 * i40e_vsi_reset_stats - Resets all stats of the given vsi
475 * @vsi: the VSI to have its stats reset
477 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
479 struct rtnl_link_stats64 *ns;
485 ns = i40e_get_vsi_stats_struct(vsi);
486 memset(ns, 0, sizeof(*ns));
487 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
488 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
489 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
490 if (vsi->rx_rings && vsi->rx_rings[0]) {
491 for (i = 0; i < vsi->num_queue_pairs; i++) {
492 memset(&vsi->rx_rings[i]->stats, 0,
493 sizeof(vsi->rx_rings[i]->stats));
494 memset(&vsi->rx_rings[i]->rx_stats, 0,
495 sizeof(vsi->rx_rings[i]->rx_stats));
496 memset(&vsi->tx_rings[i]->stats, 0,
497 sizeof(vsi->tx_rings[i]->stats));
498 memset(&vsi->tx_rings[i]->tx_stats, 0,
499 sizeof(vsi->tx_rings[i]->tx_stats));
502 vsi->stat_offsets_loaded = false;
506 * i40e_pf_reset_stats - Reset all of the stats for the given PF
507 * @pf: the PF to be reset
509 void i40e_pf_reset_stats(struct i40e_pf *pf)
513 memset(&pf->stats, 0, sizeof(pf->stats));
514 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
515 pf->stat_offsets_loaded = false;
517 for (i = 0; i < I40E_MAX_VEB; i++) {
519 memset(&pf->veb[i]->stats, 0,
520 sizeof(pf->veb[i]->stats));
521 memset(&pf->veb[i]->stats_offsets, 0,
522 sizeof(pf->veb[i]->stats_offsets));
523 memset(&pf->veb[i]->tc_stats, 0,
524 sizeof(pf->veb[i]->tc_stats));
525 memset(&pf->veb[i]->tc_stats_offsets, 0,
526 sizeof(pf->veb[i]->tc_stats_offsets));
527 pf->veb[i]->stat_offsets_loaded = false;
530 pf->hw_csum_rx_error = 0;
534 * i40e_stat_update48 - read and update a 48 bit stat from the chip
535 * @hw: ptr to the hardware info
536 * @hireg: the high 32 bit reg to read
537 * @loreg: the low 32 bit reg to read
538 * @offset_loaded: has the initial offset been loaded yet
539 * @offset: ptr to current offset value
540 * @stat: ptr to the stat
542 * Since the device stats are not reset at PFReset, they likely will not
543 * be zeroed when the driver starts. We'll save the first values read
544 * and use them as offsets to be subtracted from the raw values in order
545 * to report stats that count from zero. In the process, we also manage
546 * the potential roll-over.
548 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
549 bool offset_loaded, u64 *offset, u64 *stat)
553 if (hw->device_id == I40E_DEV_ID_QEMU) {
554 new_data = rd32(hw, loreg);
555 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
557 new_data = rd64(hw, loreg);
561 if (likely(new_data >= *offset))
562 *stat = new_data - *offset;
564 *stat = (new_data + BIT_ULL(48)) - *offset;
565 *stat &= 0xFFFFFFFFFFFFULL;
569 * i40e_stat_update32 - read and update a 32 bit stat from the chip
570 * @hw: ptr to the hardware info
571 * @reg: the hw reg to read
572 * @offset_loaded: has the initial offset been loaded yet
573 * @offset: ptr to current offset value
574 * @stat: ptr to the stat
576 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
577 bool offset_loaded, u64 *offset, u64 *stat)
581 new_data = rd32(hw, reg);
584 if (likely(new_data >= *offset))
585 *stat = (u32)(new_data - *offset);
587 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
591 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
592 * @hw: ptr to the hardware info
593 * @reg: the hw reg to read and clear
594 * @stat: ptr to the stat
596 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
598 u32 new_data = rd32(hw, reg);
600 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
605 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
606 * @vsi: the VSI to be updated
608 void i40e_update_eth_stats(struct i40e_vsi *vsi)
610 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
611 struct i40e_pf *pf = vsi->back;
612 struct i40e_hw *hw = &pf->hw;
613 struct i40e_eth_stats *oes;
614 struct i40e_eth_stats *es; /* device's eth stats */
616 es = &vsi->eth_stats;
617 oes = &vsi->eth_stats_offsets;
619 /* Gather up the stats that the hw collects */
620 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->tx_errors, &es->tx_errors);
623 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->rx_discards, &es->rx_discards);
626 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
630 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
631 I40E_GLV_GORCL(stat_idx),
632 vsi->stat_offsets_loaded,
633 &oes->rx_bytes, &es->rx_bytes);
634 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
635 I40E_GLV_UPRCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_unicast, &es->rx_unicast);
638 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
639 I40E_GLV_MPRCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->rx_multicast, &es->rx_multicast);
642 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
643 I40E_GLV_BPRCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->rx_broadcast, &es->rx_broadcast);
647 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
648 I40E_GLV_GOTCL(stat_idx),
649 vsi->stat_offsets_loaded,
650 &oes->tx_bytes, &es->tx_bytes);
651 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
652 I40E_GLV_UPTCL(stat_idx),
653 vsi->stat_offsets_loaded,
654 &oes->tx_unicast, &es->tx_unicast);
655 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
656 I40E_GLV_MPTCL(stat_idx),
657 vsi->stat_offsets_loaded,
658 &oes->tx_multicast, &es->tx_multicast);
659 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
660 I40E_GLV_BPTCL(stat_idx),
661 vsi->stat_offsets_loaded,
662 &oes->tx_broadcast, &es->tx_broadcast);
663 vsi->stat_offsets_loaded = true;
667 * i40e_update_veb_stats - Update Switch component statistics
668 * @veb: the VEB being updated
670 void i40e_update_veb_stats(struct i40e_veb *veb)
672 struct i40e_pf *pf = veb->pf;
673 struct i40e_hw *hw = &pf->hw;
674 struct i40e_eth_stats *oes;
675 struct i40e_eth_stats *es; /* device's eth stats */
676 struct i40e_veb_tc_stats *veb_oes;
677 struct i40e_veb_tc_stats *veb_es;
680 idx = veb->stats_idx;
682 oes = &veb->stats_offsets;
683 veb_es = &veb->tc_stats;
684 veb_oes = &veb->tc_stats_offsets;
686 /* Gather up the stats that the hw collects */
687 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
688 veb->stat_offsets_loaded,
689 &oes->tx_discards, &es->tx_discards);
690 if (hw->revision_id > 0)
691 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_unknown_protocol,
694 &es->rx_unknown_protocol);
695 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_bytes, &es->rx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_unicast, &es->rx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_multicast, &es->rx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->rx_broadcast, &es->rx_broadcast);
708 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_bytes, &es->tx_bytes);
711 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_unicast, &es->tx_unicast);
714 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_multicast, &es->tx_multicast);
717 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
718 veb->stat_offsets_loaded,
719 &oes->tx_broadcast, &es->tx_broadcast);
720 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
721 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
722 I40E_GLVEBTC_RPCL(i, idx),
723 veb->stat_offsets_loaded,
724 &veb_oes->tc_rx_packets[i],
725 &veb_es->tc_rx_packets[i]);
726 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
727 I40E_GLVEBTC_RBCL(i, idx),
728 veb->stat_offsets_loaded,
729 &veb_oes->tc_rx_bytes[i],
730 &veb_es->tc_rx_bytes[i]);
731 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
732 I40E_GLVEBTC_TPCL(i, idx),
733 veb->stat_offsets_loaded,
734 &veb_oes->tc_tx_packets[i],
735 &veb_es->tc_tx_packets[i]);
736 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
737 I40E_GLVEBTC_TBCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_tx_bytes[i],
740 &veb_es->tc_tx_bytes[i]);
742 veb->stat_offsets_loaded = true;
746 * i40e_update_vsi_stats - Update the vsi statistics counters.
747 * @vsi: the VSI to be updated
749 * There are a few instances where we store the same stat in a
750 * couple of different structs. This is partly because we have
751 * the netdev stats that need to be filled out, which is slightly
752 * different from the "eth_stats" defined by the chip and used in
753 * VF communications. We sort it out here.
755 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
757 struct i40e_pf *pf = vsi->back;
758 struct rtnl_link_stats64 *ons;
759 struct rtnl_link_stats64 *ns; /* netdev stats */
760 struct i40e_eth_stats *oes;
761 struct i40e_eth_stats *es; /* device's eth stats */
762 u32 tx_restart, tx_busy;
773 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
774 test_bit(__I40E_CONFIG_BUSY, pf->state))
777 ns = i40e_get_vsi_stats_struct(vsi);
778 ons = &vsi->net_stats_offsets;
779 es = &vsi->eth_stats;
780 oes = &vsi->eth_stats_offsets;
782 /* Gather up the netdev and vsi stats that the driver collects
783 * on the fly during packet processing
787 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
791 for (q = 0; q < vsi->num_queue_pairs; q++) {
793 p = READ_ONCE(vsi->tx_rings[q]);
798 start = u64_stats_fetch_begin_irq(&p->syncp);
799 packets = p->stats.packets;
800 bytes = p->stats.bytes;
801 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
804 tx_restart += p->tx_stats.restart_queue;
805 tx_busy += p->tx_stats.tx_busy;
806 tx_linearize += p->tx_stats.tx_linearize;
807 tx_force_wb += p->tx_stats.tx_force_wb;
810 p = READ_ONCE(vsi->rx_rings[q]);
815 start = u64_stats_fetch_begin_irq(&p->syncp);
816 packets = p->stats.packets;
817 bytes = p->stats.bytes;
818 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
821 rx_buf += p->rx_stats.alloc_buff_failed;
822 rx_page += p->rx_stats.alloc_page_failed;
825 vsi->tx_restart = tx_restart;
826 vsi->tx_busy = tx_busy;
827 vsi->tx_linearize = tx_linearize;
828 vsi->tx_force_wb = tx_force_wb;
829 vsi->rx_page_failed = rx_page;
830 vsi->rx_buf_failed = rx_buf;
832 ns->rx_packets = rx_p;
834 ns->tx_packets = tx_p;
837 /* update netdev stats from eth stats */
838 i40e_update_eth_stats(vsi);
839 ons->tx_errors = oes->tx_errors;
840 ns->tx_errors = es->tx_errors;
841 ons->multicast = oes->rx_multicast;
842 ns->multicast = es->rx_multicast;
843 ons->rx_dropped = oes->rx_discards;
844 ns->rx_dropped = es->rx_discards;
845 ons->tx_dropped = oes->tx_discards;
846 ns->tx_dropped = es->tx_discards;
848 /* pull in a couple PF stats if this is the main vsi */
849 if (vsi == pf->vsi[pf->lan_vsi]) {
850 ns->rx_crc_errors = pf->stats.crc_errors;
851 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
852 ns->rx_length_errors = pf->stats.rx_length_errors;
857 * i40e_update_pf_stats - Update the PF statistics counters.
858 * @pf: the PF to be updated
860 static void i40e_update_pf_stats(struct i40e_pf *pf)
862 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
863 struct i40e_hw_port_stats *nsd = &pf->stats;
864 struct i40e_hw *hw = &pf->hw;
868 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
869 I40E_GLPRT_GORCL(hw->port),
870 pf->stat_offsets_loaded,
871 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
872 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
873 I40E_GLPRT_GOTCL(hw->port),
874 pf->stat_offsets_loaded,
875 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
876 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
877 pf->stat_offsets_loaded,
878 &osd->eth.rx_discards,
879 &nsd->eth.rx_discards);
880 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
881 I40E_GLPRT_UPRCL(hw->port),
882 pf->stat_offsets_loaded,
883 &osd->eth.rx_unicast,
884 &nsd->eth.rx_unicast);
885 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
886 I40E_GLPRT_MPRCL(hw->port),
887 pf->stat_offsets_loaded,
888 &osd->eth.rx_multicast,
889 &nsd->eth.rx_multicast);
890 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
891 I40E_GLPRT_BPRCL(hw->port),
892 pf->stat_offsets_loaded,
893 &osd->eth.rx_broadcast,
894 &nsd->eth.rx_broadcast);
895 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
896 I40E_GLPRT_UPTCL(hw->port),
897 pf->stat_offsets_loaded,
898 &osd->eth.tx_unicast,
899 &nsd->eth.tx_unicast);
900 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
901 I40E_GLPRT_MPTCL(hw->port),
902 pf->stat_offsets_loaded,
903 &osd->eth.tx_multicast,
904 &nsd->eth.tx_multicast);
905 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
906 I40E_GLPRT_BPTCL(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->eth.tx_broadcast,
909 &nsd->eth.tx_broadcast);
911 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->tx_dropped_link_down,
914 &nsd->tx_dropped_link_down);
916 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->crc_errors, &nsd->crc_errors);
920 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->illegal_bytes, &nsd->illegal_bytes);
924 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->mac_local_faults,
927 &nsd->mac_local_faults);
928 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->mac_remote_faults,
931 &nsd->mac_remote_faults);
933 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->rx_length_errors,
936 &nsd->rx_length_errors);
938 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->link_xon_rx, &nsd->link_xon_rx);
941 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->link_xon_tx, &nsd->link_xon_tx);
944 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
945 pf->stat_offsets_loaded,
946 &osd->link_xoff_rx, &nsd->link_xoff_rx);
947 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->link_xoff_tx, &nsd->link_xoff_tx);
951 for (i = 0; i < 8; i++) {
952 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
953 pf->stat_offsets_loaded,
954 &osd->priority_xoff_rx[i],
955 &nsd->priority_xoff_rx[i]);
956 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
957 pf->stat_offsets_loaded,
958 &osd->priority_xon_rx[i],
959 &nsd->priority_xon_rx[i]);
960 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
961 pf->stat_offsets_loaded,
962 &osd->priority_xon_tx[i],
963 &nsd->priority_xon_tx[i]);
964 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
965 pf->stat_offsets_loaded,
966 &osd->priority_xoff_tx[i],
967 &nsd->priority_xoff_tx[i]);
968 i40e_stat_update32(hw,
969 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
970 pf->stat_offsets_loaded,
971 &osd->priority_xon_2_xoff[i],
972 &nsd->priority_xon_2_xoff[i]);
975 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
976 I40E_GLPRT_PRC64L(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->rx_size_64, &nsd->rx_size_64);
979 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
980 I40E_GLPRT_PRC127L(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->rx_size_127, &nsd->rx_size_127);
983 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
984 I40E_GLPRT_PRC255L(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->rx_size_255, &nsd->rx_size_255);
987 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
988 I40E_GLPRT_PRC511L(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->rx_size_511, &nsd->rx_size_511);
991 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
992 I40E_GLPRT_PRC1023L(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->rx_size_1023, &nsd->rx_size_1023);
995 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
996 I40E_GLPRT_PRC1522L(hw->port),
997 pf->stat_offsets_loaded,
998 &osd->rx_size_1522, &nsd->rx_size_1522);
999 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1000 I40E_GLPRT_PRC9522L(hw->port),
1001 pf->stat_offsets_loaded,
1002 &osd->rx_size_big, &nsd->rx_size_big);
1004 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1005 I40E_GLPRT_PTC64L(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->tx_size_64, &nsd->tx_size_64);
1008 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1009 I40E_GLPRT_PTC127L(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->tx_size_127, &nsd->tx_size_127);
1012 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1013 I40E_GLPRT_PTC255L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->tx_size_255, &nsd->tx_size_255);
1016 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1017 I40E_GLPRT_PTC511L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->tx_size_511, &nsd->tx_size_511);
1020 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1021 I40E_GLPRT_PTC1023L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->tx_size_1023, &nsd->tx_size_1023);
1024 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1025 I40E_GLPRT_PTC1522L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->tx_size_1522, &nsd->tx_size_1522);
1028 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1029 I40E_GLPRT_PTC9522L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->tx_size_big, &nsd->tx_size_big);
1033 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_undersize, &nsd->rx_undersize);
1036 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_fragments, &nsd->rx_fragments);
1039 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_oversize, &nsd->rx_oversize);
1042 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->rx_jabber, &nsd->rx_jabber);
1047 i40e_stat_update_and_clear32(hw,
1048 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1049 &nsd->fd_atr_match);
1050 i40e_stat_update_and_clear32(hw,
1051 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1053 i40e_stat_update_and_clear32(hw,
1054 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1055 &nsd->fd_atr_tunnel_match);
1057 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1058 nsd->tx_lpi_status =
1059 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1060 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1061 nsd->rx_lpi_status =
1062 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1063 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1064 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1065 pf->stat_offsets_loaded,
1066 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1067 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1068 pf->stat_offsets_loaded,
1069 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1071 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1072 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1073 nsd->fd_sb_status = true;
1075 nsd->fd_sb_status = false;
1077 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1078 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1079 nsd->fd_atr_status = true;
1081 nsd->fd_atr_status = false;
1083 pf->stat_offsets_loaded = true;
1087 * i40e_update_stats - Update the various statistics counters.
1088 * @vsi: the VSI to be updated
1090 * Update the various stats for this VSI and its related entities.
1092 void i40e_update_stats(struct i40e_vsi *vsi)
1094 struct i40e_pf *pf = vsi->back;
1096 if (vsi == pf->vsi[pf->lan_vsi])
1097 i40e_update_pf_stats(pf);
1099 i40e_update_vsi_stats(vsi);
1103 * i40e_count_filters - counts VSI mac filters
1104 * @vsi: the VSI to be searched
1106 * Returns count of mac filters
1108 int i40e_count_filters(struct i40e_vsi *vsi)
1110 struct i40e_mac_filter *f;
1111 struct hlist_node *h;
1115 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1122 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1123 * @vsi: the VSI to be searched
1124 * @macaddr: the MAC address
1127 * Returns ptr to the filter object or NULL
1129 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1130 const u8 *macaddr, s16 vlan)
1132 struct i40e_mac_filter *f;
1135 if (!vsi || !macaddr)
1138 key = i40e_addr_to_hkey(macaddr);
1139 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1140 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1148 * i40e_find_mac - Find a mac addr in the macvlan filters list
1149 * @vsi: the VSI to be searched
1150 * @macaddr: the MAC address we are searching for
1152 * Returns the first filter with the provided MAC address or NULL if
1153 * MAC address was not found
1155 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1157 struct i40e_mac_filter *f;
1160 if (!vsi || !macaddr)
1163 key = i40e_addr_to_hkey(macaddr);
1164 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1165 if ((ether_addr_equal(macaddr, f->macaddr)))
1172 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1173 * @vsi: the VSI to be searched
1175 * Returns true if VSI is in vlan mode or false otherwise
1177 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1179 /* If we have a PVID, always operate in VLAN mode */
1183 /* We need to operate in VLAN mode whenever we have any filters with
1184 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1185 * time, incurring search cost repeatedly. However, we can notice two
1188 * 1) the only place where we can gain a VLAN filter is in
1191 * 2) the only place where filters are actually removed is in
1192 * i40e_sync_filters_subtask.
1194 * Thus, we can simply use a boolean value, has_vlan_filters which we
1195 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1196 * we have to perform the full search after deleting filters in
1197 * i40e_sync_filters_subtask, but we already have to search
1198 * filters here and can perform the check at the same time. This
1199 * results in avoiding embedding a loop for VLAN mode inside another
1200 * loop over all the filters, and should maintain correctness as noted
1203 return vsi->has_vlan_filter;
1207 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1208 * @vsi: the VSI to configure
1209 * @tmp_add_list: list of filters ready to be added
1210 * @tmp_del_list: list of filters ready to be deleted
1211 * @vlan_filters: the number of active VLAN filters
1213 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1214 * behave as expected. If we have any active VLAN filters remaining or about
1215 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1216 * so that they only match against untagged traffic. If we no longer have any
1217 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1218 * so that they match against both tagged and untagged traffic. In this way,
1219 * we ensure that we correctly receive the desired traffic. This ensures that
1220 * when we have an active VLAN we will receive only untagged traffic and
1221 * traffic matching active VLANs. If we have no active VLANs then we will
1222 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1224 * Finally, in a similar fashion, this function also corrects filters when
1225 * there is an active PVID assigned to this VSI.
1227 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1229 * This function is only expected to be called from within
1230 * i40e_sync_vsi_filters.
1232 * NOTE: This function expects to be called while under the
1233 * mac_filter_hash_lock
1235 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1236 struct hlist_head *tmp_add_list,
1237 struct hlist_head *tmp_del_list,
1240 s16 pvid = le16_to_cpu(vsi->info.pvid);
1241 struct i40e_mac_filter *f, *add_head;
1242 struct i40e_new_mac_filter *new;
1243 struct hlist_node *h;
1246 /* To determine if a particular filter needs to be replaced we
1247 * have the three following conditions:
1249 * a) if we have a PVID assigned, then all filters which are
1250 * not marked as VLAN=PVID must be replaced with filters that
1252 * b) otherwise, if we have any active VLANS, all filters
1253 * which are marked as VLAN=-1 must be replaced with
1254 * filters marked as VLAN=0
1255 * c) finally, if we do not have any active VLANS, all filters
1256 * which are marked as VLAN=0 must be replaced with filters
1260 /* Update the filters about to be added in place */
1261 hlist_for_each_entry(new, tmp_add_list, hlist) {
1262 if (pvid && new->f->vlan != pvid)
1263 new->f->vlan = pvid;
1264 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1266 else if (!vlan_filters && new->f->vlan == 0)
1267 new->f->vlan = I40E_VLAN_ANY;
1270 /* Update the remaining active filters */
1271 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1272 /* Combine the checks for whether a filter needs to be changed
1273 * and then determine the new VLAN inside the if block, in
1274 * order to avoid duplicating code for adding the new filter
1275 * then deleting the old filter.
1277 if ((pvid && f->vlan != pvid) ||
1278 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1279 (!vlan_filters && f->vlan == 0)) {
1280 /* Determine the new vlan we will be adding */
1283 else if (vlan_filters)
1286 new_vlan = I40E_VLAN_ANY;
1288 /* Create the new filter */
1289 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1293 /* Create a temporary i40e_new_mac_filter */
1294 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1299 new->state = add_head->state;
1301 /* Add the new filter to the tmp list */
1302 hlist_add_head(&new->hlist, tmp_add_list);
1304 /* Put the original filter into the delete list */
1305 f->state = I40E_FILTER_REMOVE;
1306 hash_del(&f->hlist);
1307 hlist_add_head(&f->hlist, tmp_del_list);
1311 vsi->has_vlan_filter = !!vlan_filters;
1317 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1318 * @vsi: the PF Main VSI - inappropriate for any other VSI
1319 * @macaddr: the MAC address
1321 * Remove whatever filter the firmware set up so the driver can manage
1322 * its own filtering intelligently.
1324 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1326 struct i40e_aqc_remove_macvlan_element_data element;
1327 struct i40e_pf *pf = vsi->back;
1329 /* Only appropriate for the PF main VSI */
1330 if (vsi->type != I40E_VSI_MAIN)
1333 memset(&element, 0, sizeof(element));
1334 ether_addr_copy(element.mac_addr, macaddr);
1335 element.vlan_tag = 0;
1336 /* Ignore error returns, some firmware does it this way... */
1337 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1338 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1340 memset(&element, 0, sizeof(element));
1341 ether_addr_copy(element.mac_addr, macaddr);
1342 element.vlan_tag = 0;
1343 /* ...and some firmware does it this way. */
1344 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1345 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1346 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1350 * i40e_add_filter - Add a mac/vlan filter to the VSI
1351 * @vsi: the VSI to be searched
1352 * @macaddr: the MAC address
1355 * Returns ptr to the filter object or NULL when no memory available.
1357 * NOTE: This function is expected to be called with mac_filter_hash_lock
1360 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1361 const u8 *macaddr, s16 vlan)
1363 struct i40e_mac_filter *f;
1366 if (!vsi || !macaddr)
1369 f = i40e_find_filter(vsi, macaddr, vlan);
1371 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1375 /* Update the boolean indicating if we need to function in
1379 vsi->has_vlan_filter = true;
1381 ether_addr_copy(f->macaddr, macaddr);
1383 f->state = I40E_FILTER_NEW;
1384 INIT_HLIST_NODE(&f->hlist);
1386 key = i40e_addr_to_hkey(macaddr);
1387 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1389 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1390 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1393 /* If we're asked to add a filter that has been marked for removal, it
1394 * is safe to simply restore it to active state. __i40e_del_filter
1395 * will have simply deleted any filters which were previously marked
1396 * NEW or FAILED, so if it is currently marked REMOVE it must have
1397 * previously been ACTIVE. Since we haven't yet run the sync filters
1398 * task, just restore this filter to the ACTIVE state so that the
1399 * sync task leaves it in place
1401 if (f->state == I40E_FILTER_REMOVE)
1402 f->state = I40E_FILTER_ACTIVE;
1408 * __i40e_del_filter - Remove a specific filter from the VSI
1409 * @vsi: VSI to remove from
1410 * @f: the filter to remove from the list
1412 * This function should be called instead of i40e_del_filter only if you know
1413 * the exact filter you will remove already, such as via i40e_find_filter or
1416 * NOTE: This function is expected to be called with mac_filter_hash_lock
1418 * ANOTHER NOTE: This function MUST be called from within the context of
1419 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1420 * instead of list_for_each_entry().
1422 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1427 /* If the filter was never added to firmware then we can just delete it
1428 * directly and we don't want to set the status to remove or else an
1429 * admin queue command will unnecessarily fire.
1431 if ((f->state == I40E_FILTER_FAILED) ||
1432 (f->state == I40E_FILTER_NEW)) {
1433 hash_del(&f->hlist);
1436 f->state = I40E_FILTER_REMOVE;
1439 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1440 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1444 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1445 * @vsi: the VSI to be searched
1446 * @macaddr: the MAC address
1449 * NOTE: This function is expected to be called with mac_filter_hash_lock
1451 * ANOTHER NOTE: This function MUST be called from within the context of
1452 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1453 * instead of list_for_each_entry().
1455 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1457 struct i40e_mac_filter *f;
1459 if (!vsi || !macaddr)
1462 f = i40e_find_filter(vsi, macaddr, vlan);
1463 __i40e_del_filter(vsi, f);
1467 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1468 * @vsi: the VSI to be searched
1469 * @macaddr: the mac address to be filtered
1471 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1472 * go through all the macvlan filters and add a macvlan filter for each
1473 * unique vlan that already exists. If a PVID has been assigned, instead only
1474 * add the macaddr to that VLAN.
1476 * Returns last filter added on success, else NULL
1478 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1481 struct i40e_mac_filter *f, *add = NULL;
1482 struct hlist_node *h;
1486 return i40e_add_filter(vsi, macaddr,
1487 le16_to_cpu(vsi->info.pvid));
1489 if (!i40e_is_vsi_in_vlan(vsi))
1490 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1492 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1493 if (f->state == I40E_FILTER_REMOVE)
1495 add = i40e_add_filter(vsi, macaddr, f->vlan);
1504 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1505 * @vsi: the VSI to be searched
1506 * @macaddr: the mac address to be removed
1508 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1511 * Returns 0 for success, or error
1513 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1515 struct i40e_mac_filter *f;
1516 struct hlist_node *h;
1520 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1521 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1522 if (ether_addr_equal(macaddr, f->macaddr)) {
1523 __i40e_del_filter(vsi, f);
1535 * i40e_set_mac - NDO callback to set mac address
1536 * @netdev: network interface device structure
1537 * @p: pointer to an address structure
1539 * Returns 0 on success, negative on failure
1541 static int i40e_set_mac(struct net_device *netdev, void *p)
1543 struct i40e_netdev_priv *np = netdev_priv(netdev);
1544 struct i40e_vsi *vsi = np->vsi;
1545 struct i40e_pf *pf = vsi->back;
1546 struct i40e_hw *hw = &pf->hw;
1547 struct sockaddr *addr = p;
1549 if (!is_valid_ether_addr(addr->sa_data))
1550 return -EADDRNOTAVAIL;
1552 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1553 netdev_info(netdev, "already using mac address %pM\n",
1558 if (test_bit(__I40E_DOWN, pf->state) ||
1559 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1560 return -EADDRNOTAVAIL;
1562 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1563 netdev_info(netdev, "returning to hw mac address %pM\n",
1566 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1568 /* Copy the address first, so that we avoid a possible race with
1570 * - Remove old address from MAC filter
1571 * - Copy new address
1572 * - Add new address to MAC filter
1574 spin_lock_bh(&vsi->mac_filter_hash_lock);
1575 i40e_del_mac_filter(vsi, netdev->dev_addr);
1576 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1577 i40e_add_mac_filter(vsi, netdev->dev_addr);
1578 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1580 if (vsi->type == I40E_VSI_MAIN) {
1583 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1584 addr->sa_data, NULL);
1586 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1587 i40e_stat_str(hw, ret),
1588 i40e_aq_str(hw, hw->aq.asq_last_status));
1591 /* schedule our worker thread which will take care of
1592 * applying the new filter changes
1594 i40e_service_event_schedule(pf);
1599 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1600 * @vsi: vsi structure
1601 * @seed: RSS hash seed
1603 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1604 u8 *lut, u16 lut_size)
1606 struct i40e_pf *pf = vsi->back;
1607 struct i40e_hw *hw = &pf->hw;
1611 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1612 (struct i40e_aqc_get_set_rss_key_data *)seed;
1613 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1615 dev_info(&pf->pdev->dev,
1616 "Cannot set RSS key, err %s aq_err %s\n",
1617 i40e_stat_str(hw, ret),
1618 i40e_aq_str(hw, hw->aq.asq_last_status));
1623 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1625 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1627 dev_info(&pf->pdev->dev,
1628 "Cannot set RSS lut, err %s aq_err %s\n",
1629 i40e_stat_str(hw, ret),
1630 i40e_aq_str(hw, hw->aq.asq_last_status));
1638 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1639 * @vsi: VSI structure
1641 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1643 struct i40e_pf *pf = vsi->back;
1644 u8 seed[I40E_HKEY_ARRAY_SIZE];
1648 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1651 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1652 vsi->num_queue_pairs);
1655 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1659 /* Use the user configured hash keys and lookup table if there is one,
1660 * otherwise use default
1662 if (vsi->rss_lut_user)
1663 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1665 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1666 if (vsi->rss_hkey_user)
1667 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1669 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1670 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1676 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1677 * @vsi: the VSI being configured,
1678 * @ctxt: VSI context structure
1679 * @enabled_tc: number of traffic classes to enable
1681 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1683 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1684 struct i40e_vsi_context *ctxt,
1687 u16 qcount = 0, max_qcount, qmap, sections = 0;
1688 int i, override_q, pow, num_qps, ret;
1689 u8 netdev_tc = 0, offset = 0;
1691 if (vsi->type != I40E_VSI_MAIN)
1693 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1694 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1695 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1696 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1697 num_qps = vsi->mqprio_qopt.qopt.count[0];
1699 /* find the next higher power-of-2 of num queue pairs */
1700 pow = ilog2(num_qps);
1701 if (!is_power_of_2(num_qps))
1703 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1704 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1706 /* Setup queue offset/count for all TCs for given VSI */
1707 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1708 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1709 /* See if the given TC is enabled for the given VSI */
1710 if (vsi->tc_config.enabled_tc & BIT(i)) {
1711 offset = vsi->mqprio_qopt.qopt.offset[i];
1712 qcount = vsi->mqprio_qopt.qopt.count[i];
1713 if (qcount > max_qcount)
1714 max_qcount = qcount;
1715 vsi->tc_config.tc_info[i].qoffset = offset;
1716 vsi->tc_config.tc_info[i].qcount = qcount;
1717 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1719 /* TC is not enabled so set the offset to
1720 * default queue and allocate one queue
1723 vsi->tc_config.tc_info[i].qoffset = 0;
1724 vsi->tc_config.tc_info[i].qcount = 1;
1725 vsi->tc_config.tc_info[i].netdev_tc = 0;
1729 /* Set actual Tx/Rx queue pairs */
1730 vsi->num_queue_pairs = offset + qcount;
1732 /* Setup queue TC[0].qmap for given VSI context */
1733 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1734 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1735 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1736 ctxt->info.valid_sections |= cpu_to_le16(sections);
1738 /* Reconfigure RSS for main VSI with max queue count */
1739 vsi->rss_size = max_qcount;
1740 ret = i40e_vsi_config_rss(vsi);
1742 dev_info(&vsi->back->pdev->dev,
1743 "Failed to reconfig rss for num_queues (%u)\n",
1747 vsi->reconfig_rss = true;
1748 dev_dbg(&vsi->back->pdev->dev,
1749 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1751 /* Find queue count available for channel VSIs and starting offset
1754 override_q = vsi->mqprio_qopt.qopt.count[0];
1755 if (override_q && override_q < vsi->num_queue_pairs) {
1756 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1757 vsi->next_base_queue = override_q;
1763 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1764 * @vsi: the VSI being setup
1765 * @ctxt: VSI context structure
1766 * @enabled_tc: Enabled TCs bitmap
1767 * @is_add: True if called before Add VSI
1769 * Setup VSI queue mapping for enabled traffic classes.
1771 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1772 struct i40e_vsi_context *ctxt,
1776 struct i40e_pf *pf = vsi->back;
1786 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1789 /* Number of queues per enabled TC */
1790 num_tc_qps = vsi->alloc_queue_pairs;
1791 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1792 /* Find numtc from enabled TC bitmap */
1793 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1794 if (enabled_tc & BIT(i)) /* TC is enabled */
1798 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1801 num_tc_qps = num_tc_qps / numtc;
1802 num_tc_qps = min_t(int, num_tc_qps,
1803 i40e_pf_get_max_q_per_tc(pf));
1806 vsi->tc_config.numtc = numtc;
1807 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1809 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1810 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1811 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1813 /* Setup queue offset/count for all TCs for given VSI */
1814 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1815 /* See if the given TC is enabled for the given VSI */
1816 if (vsi->tc_config.enabled_tc & BIT(i)) {
1820 switch (vsi->type) {
1822 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1823 I40E_FLAG_FD_ATR_ENABLED)) ||
1824 vsi->tc_config.enabled_tc != 1) {
1825 qcount = min_t(int, pf->alloc_rss_size,
1831 case I40E_VSI_SRIOV:
1832 case I40E_VSI_VMDQ2:
1834 qcount = num_tc_qps;
1838 vsi->tc_config.tc_info[i].qoffset = offset;
1839 vsi->tc_config.tc_info[i].qcount = qcount;
1841 /* find the next higher power-of-2 of num queue pairs */
1844 while (num_qps && (BIT_ULL(pow) < qcount)) {
1849 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1851 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1852 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1856 /* TC is not enabled so set the offset to
1857 * default queue and allocate one queue
1860 vsi->tc_config.tc_info[i].qoffset = 0;
1861 vsi->tc_config.tc_info[i].qcount = 1;
1862 vsi->tc_config.tc_info[i].netdev_tc = 0;
1866 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1869 /* Set actual Tx/Rx queue pairs */
1870 vsi->num_queue_pairs = offset;
1871 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1872 if (vsi->req_queue_pairs > 0)
1873 vsi->num_queue_pairs = vsi->req_queue_pairs;
1874 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1875 vsi->num_queue_pairs = pf->num_lan_msix;
1878 /* Scheduler section valid can only be set for ADD VSI */
1880 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1882 ctxt->info.up_enable_bits = enabled_tc;
1884 if (vsi->type == I40E_VSI_SRIOV) {
1885 ctxt->info.mapping_flags |=
1886 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1887 for (i = 0; i < vsi->num_queue_pairs; i++)
1888 ctxt->info.queue_mapping[i] =
1889 cpu_to_le16(vsi->base_queue + i);
1891 ctxt->info.mapping_flags |=
1892 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1893 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1895 ctxt->info.valid_sections |= cpu_to_le16(sections);
1899 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
1900 * @netdev: the netdevice
1901 * @addr: address to add
1903 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
1904 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1906 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
1908 struct i40e_netdev_priv *np = netdev_priv(netdev);
1909 struct i40e_vsi *vsi = np->vsi;
1911 if (i40e_add_mac_filter(vsi, addr))
1918 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
1919 * @netdev: the netdevice
1920 * @addr: address to add
1922 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
1923 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
1925 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
1927 struct i40e_netdev_priv *np = netdev_priv(netdev);
1928 struct i40e_vsi *vsi = np->vsi;
1930 /* Under some circumstances, we might receive a request to delete
1931 * our own device address from our uc list. Because we store the
1932 * device address in the VSI's MAC/VLAN filter list, we need to ignore
1933 * such requests and not delete our device address from this list.
1935 if (ether_addr_equal(addr, netdev->dev_addr))
1938 i40e_del_mac_filter(vsi, addr);
1944 * i40e_set_rx_mode - NDO callback to set the netdev filters
1945 * @netdev: network interface device structure
1947 static void i40e_set_rx_mode(struct net_device *netdev)
1949 struct i40e_netdev_priv *np = netdev_priv(netdev);
1950 struct i40e_vsi *vsi = np->vsi;
1952 spin_lock_bh(&vsi->mac_filter_hash_lock);
1954 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1955 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
1957 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1959 /* check for other flag changes */
1960 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1961 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1962 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1967 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1968 * @vsi: Pointer to VSI struct
1969 * @from: Pointer to list which contains MAC filter entries - changes to
1970 * those entries needs to be undone.
1972 * MAC filter entries from this list were slated for deletion.
1974 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1975 struct hlist_head *from)
1977 struct i40e_mac_filter *f;
1978 struct hlist_node *h;
1980 hlist_for_each_entry_safe(f, h, from, hlist) {
1981 u64 key = i40e_addr_to_hkey(f->macaddr);
1983 /* Move the element back into MAC filter list*/
1984 hlist_del(&f->hlist);
1985 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1990 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1991 * @vsi: Pointer to vsi struct
1992 * @from: Pointer to list which contains MAC filter entries - changes to
1993 * those entries needs to be undone.
1995 * MAC filter entries from this list were slated for addition.
1997 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
1998 struct hlist_head *from)
2000 struct i40e_new_mac_filter *new;
2001 struct hlist_node *h;
2003 hlist_for_each_entry_safe(new, h, from, hlist) {
2004 /* We can simply free the wrapper structure */
2005 hlist_del(&new->hlist);
2011 * i40e_next_entry - Get the next non-broadcast filter from a list
2012 * @next: pointer to filter in list
2014 * Returns the next non-broadcast filter in the list. Required so that we
2015 * ignore broadcast filters within the list, since these are not handled via
2016 * the normal firmware update path.
2019 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2021 hlist_for_each_entry_continue(next, hlist) {
2022 if (!is_broadcast_ether_addr(next->f->macaddr))
2030 * i40e_update_filter_state - Update filter state based on return data
2032 * @count: Number of filters added
2033 * @add_list: return data from fw
2034 * @add_head: pointer to first filter in current batch
2036 * MAC filter entries from list were slated to be added to device. Returns
2037 * number of successful filters. Note that 0 does NOT mean success!
2040 i40e_update_filter_state(int count,
2041 struct i40e_aqc_add_macvlan_element_data *add_list,
2042 struct i40e_new_mac_filter *add_head)
2047 for (i = 0; i < count; i++) {
2048 /* Always check status of each filter. We don't need to check
2049 * the firmware return status because we pre-set the filter
2050 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2051 * request to the adminq. Thus, if it no longer matches then
2052 * we know the filter is active.
2054 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2055 add_head->state = I40E_FILTER_FAILED;
2057 add_head->state = I40E_FILTER_ACTIVE;
2061 add_head = i40e_next_filter(add_head);
2070 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2071 * @vsi: ptr to the VSI
2072 * @vsi_name: name to display in messages
2073 * @list: the list of filters to send to firmware
2074 * @num_del: the number of filters to delete
2075 * @retval: Set to -EIO on failure to delete
2077 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2078 * *retval instead of a return value so that success does not force ret_val to
2079 * be set to 0. This ensures that a sequence of calls to this function
2080 * preserve the previous value of *retval on successful delete.
2083 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2084 struct i40e_aqc_remove_macvlan_element_data *list,
2085 int num_del, int *retval)
2087 struct i40e_hw *hw = &vsi->back->hw;
2091 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, list, num_del, NULL);
2092 aq_err = hw->aq.asq_last_status;
2094 /* Explicitly ignore and do not report when firmware returns ENOENT */
2095 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
2097 dev_info(&vsi->back->pdev->dev,
2098 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2099 vsi_name, i40e_stat_str(hw, aq_ret),
2100 i40e_aq_str(hw, aq_err));
2105 * i40e_aqc_add_filters - Request firmware to add a set of filters
2106 * @vsi: ptr to the VSI
2107 * @vsi_name: name to display in messages
2108 * @list: the list of filters to send to firmware
2109 * @add_head: Position in the add hlist
2110 * @num_add: the number of filters to add
2112 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2113 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2114 * space for more filters.
2117 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2118 struct i40e_aqc_add_macvlan_element_data *list,
2119 struct i40e_new_mac_filter *add_head,
2122 struct i40e_hw *hw = &vsi->back->hw;
2125 i40e_aq_add_macvlan(hw, vsi->seid, list, num_add, NULL);
2126 aq_err = hw->aq.asq_last_status;
2127 fcnt = i40e_update_filter_state(num_add, list, add_head);
2129 if (fcnt != num_add) {
2130 if (vsi->type == I40E_VSI_MAIN) {
2131 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2132 dev_warn(&vsi->back->pdev->dev,
2133 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2134 i40e_aq_str(hw, aq_err), vsi_name);
2135 } else if (vsi->type == I40E_VSI_SRIOV ||
2136 vsi->type == I40E_VSI_VMDQ1 ||
2137 vsi->type == I40E_VSI_VMDQ2) {
2138 dev_warn(&vsi->back->pdev->dev,
2139 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2140 i40e_aq_str(hw, aq_err), vsi_name, vsi_name);
2142 dev_warn(&vsi->back->pdev->dev,
2143 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2144 i40e_aq_str(hw, aq_err), vsi_name, vsi->type);
2150 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2151 * @vsi: pointer to the VSI
2152 * @vsi_name: the VSI name
2155 * This function sets or clears the promiscuous broadcast flags for VLAN
2156 * filters in order to properly receive broadcast frames. Assumes that only
2157 * broadcast filters are passed.
2159 * Returns status indicating success or failure;
2162 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2163 struct i40e_mac_filter *f)
2165 bool enable = f->state == I40E_FILTER_NEW;
2166 struct i40e_hw *hw = &vsi->back->hw;
2169 if (f->vlan == I40E_VLAN_ANY) {
2170 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2175 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2183 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2184 dev_warn(&vsi->back->pdev->dev,
2185 "Error %s, forcing overflow promiscuous on %s\n",
2186 i40e_aq_str(hw, hw->aq.asq_last_status),
2194 * i40e_set_promiscuous - set promiscuous mode
2195 * @pf: board private structure
2196 * @promisc: promisc on or off
2198 * There are different ways of setting promiscuous mode on a PF depending on
2199 * what state/environment we're in. This identifies and sets it appropriately.
2200 * Returns 0 on success.
2202 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2204 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2205 struct i40e_hw *hw = &pf->hw;
2208 if (vsi->type == I40E_VSI_MAIN &&
2209 pf->lan_veb != I40E_NO_VEB &&
2210 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2211 /* set defport ON for Main VSI instead of true promisc
2212 * this way we will get all unicast/multicast and VLAN
2213 * promisc behavior but will not get VF or VMDq traffic
2214 * replicated on the Main VSI.
2217 aq_ret = i40e_aq_set_default_vsi(hw,
2221 aq_ret = i40e_aq_clear_default_vsi(hw,
2225 dev_info(&pf->pdev->dev,
2226 "Set default VSI failed, err %s, aq_err %s\n",
2227 i40e_stat_str(hw, aq_ret),
2228 i40e_aq_str(hw, hw->aq.asq_last_status));
2231 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2237 dev_info(&pf->pdev->dev,
2238 "set unicast promisc failed, err %s, aq_err %s\n",
2239 i40e_stat_str(hw, aq_ret),
2240 i40e_aq_str(hw, hw->aq.asq_last_status));
2242 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2247 dev_info(&pf->pdev->dev,
2248 "set multicast promisc failed, err %s, aq_err %s\n",
2249 i40e_stat_str(hw, aq_ret),
2250 i40e_aq_str(hw, hw->aq.asq_last_status));
2255 pf->cur_promisc = promisc;
2261 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2262 * @vsi: ptr to the VSI
2264 * Push any outstanding VSI filter changes through the AdminQ.
2266 * Returns 0 or error value
2268 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2270 struct hlist_head tmp_add_list, tmp_del_list;
2271 struct i40e_mac_filter *f;
2272 struct i40e_new_mac_filter *new, *add_head = NULL;
2273 struct i40e_hw *hw = &vsi->back->hw;
2274 bool old_overflow, new_overflow;
2275 unsigned int failed_filters = 0;
2276 unsigned int vlan_filters = 0;
2277 char vsi_name[16] = "PF";
2278 int filter_list_len = 0;
2279 i40e_status aq_ret = 0;
2280 u32 changed_flags = 0;
2281 struct hlist_node *h;
2290 /* empty array typed pointers, kcalloc later */
2291 struct i40e_aqc_add_macvlan_element_data *add_list;
2292 struct i40e_aqc_remove_macvlan_element_data *del_list;
2294 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2295 usleep_range(1000, 2000);
2298 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2301 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2302 vsi->current_netdev_flags = vsi->netdev->flags;
2305 INIT_HLIST_HEAD(&tmp_add_list);
2306 INIT_HLIST_HEAD(&tmp_del_list);
2308 if (vsi->type == I40E_VSI_SRIOV)
2309 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2310 else if (vsi->type != I40E_VSI_MAIN)
2311 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2313 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2314 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2316 spin_lock_bh(&vsi->mac_filter_hash_lock);
2317 /* Create a list of filters to delete. */
2318 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2319 if (f->state == I40E_FILTER_REMOVE) {
2320 /* Move the element into temporary del_list */
2321 hash_del(&f->hlist);
2322 hlist_add_head(&f->hlist, &tmp_del_list);
2324 /* Avoid counting removed filters */
2327 if (f->state == I40E_FILTER_NEW) {
2328 /* Create a temporary i40e_new_mac_filter */
2329 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2331 goto err_no_memory_locked;
2333 /* Store pointer to the real filter */
2335 new->state = f->state;
2337 /* Add it to the hash list */
2338 hlist_add_head(&new->hlist, &tmp_add_list);
2341 /* Count the number of active (current and new) VLAN
2342 * filters we have now. Does not count filters which
2343 * are marked for deletion.
2349 retval = i40e_correct_mac_vlan_filters(vsi,
2354 goto err_no_memory_locked;
2356 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2359 /* Now process 'del_list' outside the lock */
2360 if (!hlist_empty(&tmp_del_list)) {
2361 filter_list_len = hw->aq.asq_buf_size /
2362 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2363 list_size = filter_list_len *
2364 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2365 del_list = kzalloc(list_size, GFP_ATOMIC);
2369 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2372 /* handle broadcast filters by updating the broadcast
2373 * promiscuous flag and release filter list.
2375 if (is_broadcast_ether_addr(f->macaddr)) {
2376 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2378 hlist_del(&f->hlist);
2383 /* add to delete list */
2384 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2385 if (f->vlan == I40E_VLAN_ANY) {
2386 del_list[num_del].vlan_tag = 0;
2387 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2389 del_list[num_del].vlan_tag =
2390 cpu_to_le16((u16)(f->vlan));
2393 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2394 del_list[num_del].flags = cmd_flags;
2397 /* flush a full buffer */
2398 if (num_del == filter_list_len) {
2399 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2401 memset(del_list, 0, list_size);
2404 /* Release memory for MAC filter entries which were
2405 * synced up with HW.
2407 hlist_del(&f->hlist);
2412 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2420 if (!hlist_empty(&tmp_add_list)) {
2421 /* Do all the adds now. */
2422 filter_list_len = hw->aq.asq_buf_size /
2423 sizeof(struct i40e_aqc_add_macvlan_element_data);
2424 list_size = filter_list_len *
2425 sizeof(struct i40e_aqc_add_macvlan_element_data);
2426 add_list = kzalloc(list_size, GFP_ATOMIC);
2431 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2432 /* handle broadcast filters by updating the broadcast
2433 * promiscuous flag instead of adding a MAC filter.
2435 if (is_broadcast_ether_addr(new->f->macaddr)) {
2436 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2438 new->state = I40E_FILTER_FAILED;
2440 new->state = I40E_FILTER_ACTIVE;
2444 /* add to add array */
2448 ether_addr_copy(add_list[num_add].mac_addr,
2450 if (new->f->vlan == I40E_VLAN_ANY) {
2451 add_list[num_add].vlan_tag = 0;
2452 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2454 add_list[num_add].vlan_tag =
2455 cpu_to_le16((u16)(new->f->vlan));
2457 add_list[num_add].queue_number = 0;
2458 /* set invalid match method for later detection */
2459 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2460 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2461 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2464 /* flush a full buffer */
2465 if (num_add == filter_list_len) {
2466 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2468 memset(add_list, 0, list_size);
2473 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2476 /* Now move all of the filters from the temp add list back to
2479 spin_lock_bh(&vsi->mac_filter_hash_lock);
2480 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2481 /* Only update the state if we're still NEW */
2482 if (new->f->state == I40E_FILTER_NEW)
2483 new->f->state = new->state;
2484 hlist_del(&new->hlist);
2487 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2492 /* Determine the number of active and failed filters. */
2493 spin_lock_bh(&vsi->mac_filter_hash_lock);
2494 vsi->active_filters = 0;
2495 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2496 if (f->state == I40E_FILTER_ACTIVE)
2497 vsi->active_filters++;
2498 else if (f->state == I40E_FILTER_FAILED)
2501 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2503 /* Check if we are able to exit overflow promiscuous mode. We can
2504 * safely exit if we didn't just enter, we no longer have any failed
2505 * filters, and we have reduced filters below the threshold value.
2507 if (old_overflow && !failed_filters &&
2508 vsi->active_filters < vsi->promisc_threshold) {
2509 dev_info(&pf->pdev->dev,
2510 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2512 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2513 vsi->promisc_threshold = 0;
2516 /* if the VF is not trusted do not do promisc */
2517 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2518 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2522 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2524 /* If we are entering overflow promiscuous, we need to calculate a new
2525 * threshold for when we are safe to exit
2527 if (!old_overflow && new_overflow)
2528 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2530 /* check for changes in promiscuous modes */
2531 if (changed_flags & IFF_ALLMULTI) {
2532 bool cur_multipromisc;
2534 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2535 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2540 retval = i40e_aq_rc_to_posix(aq_ret,
2541 hw->aq.asq_last_status);
2542 dev_info(&pf->pdev->dev,
2543 "set multi promisc failed on %s, err %s aq_err %s\n",
2545 i40e_stat_str(hw, aq_ret),
2546 i40e_aq_str(hw, hw->aq.asq_last_status));
2548 dev_info(&pf->pdev->dev, "%s is %s allmulti mode.\n",
2550 cur_multipromisc ? "entering" : "leaving");
2554 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2557 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2559 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2561 retval = i40e_aq_rc_to_posix(aq_ret,
2562 hw->aq.asq_last_status);
2563 dev_info(&pf->pdev->dev,
2564 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2565 cur_promisc ? "on" : "off",
2567 i40e_stat_str(hw, aq_ret),
2568 i40e_aq_str(hw, hw->aq.asq_last_status));
2572 /* if something went wrong then set the changed flag so we try again */
2574 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2576 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2580 /* Restore elements on the temporary add and delete lists */
2581 spin_lock_bh(&vsi->mac_filter_hash_lock);
2582 err_no_memory_locked:
2583 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2584 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2585 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2587 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2588 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2593 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2594 * @pf: board private structure
2596 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2602 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2604 if (test_and_set_bit(__I40E_VF_DISABLE, pf->state)) {
2605 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2609 for (v = 0; v < pf->num_alloc_vsi; v++) {
2611 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2612 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2615 /* come back and try again later */
2616 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2622 clear_bit(__I40E_VF_DISABLE, pf->state);
2626 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2629 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2631 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2632 return I40E_RXBUFFER_2048;
2634 return I40E_RXBUFFER_3072;
2638 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2639 * @netdev: network interface device structure
2640 * @new_mtu: new value for maximum frame size
2642 * Returns 0 on success, negative on failure
2644 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2646 struct i40e_netdev_priv *np = netdev_priv(netdev);
2647 struct i40e_vsi *vsi = np->vsi;
2648 struct i40e_pf *pf = vsi->back;
2650 if (i40e_enabled_xdp_vsi(vsi)) {
2651 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2653 if (frame_size > i40e_max_xdp_frame_size(vsi))
2657 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2658 netdev->mtu, new_mtu);
2659 netdev->mtu = new_mtu;
2660 if (netif_running(netdev))
2661 i40e_vsi_reinit_locked(vsi);
2662 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2663 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2668 * i40e_ioctl - Access the hwtstamp interface
2669 * @netdev: network interface device structure
2670 * @ifr: interface request data
2671 * @cmd: ioctl command
2673 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2675 struct i40e_netdev_priv *np = netdev_priv(netdev);
2676 struct i40e_pf *pf = np->vsi->back;
2680 return i40e_ptp_get_ts_config(pf, ifr);
2682 return i40e_ptp_set_ts_config(pf, ifr);
2689 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2690 * @vsi: the vsi being adjusted
2692 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2694 struct i40e_vsi_context ctxt;
2697 /* Don't modify stripping options if a port VLAN is active */
2701 if ((vsi->info.valid_sections &
2702 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2703 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2704 return; /* already enabled */
2706 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2707 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2708 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2710 ctxt.seid = vsi->seid;
2711 ctxt.info = vsi->info;
2712 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2714 dev_info(&vsi->back->pdev->dev,
2715 "update vlan stripping failed, err %s aq_err %s\n",
2716 i40e_stat_str(&vsi->back->hw, ret),
2717 i40e_aq_str(&vsi->back->hw,
2718 vsi->back->hw.aq.asq_last_status));
2723 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2724 * @vsi: the vsi being adjusted
2726 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2728 struct i40e_vsi_context ctxt;
2731 /* Don't modify stripping options if a port VLAN is active */
2735 if ((vsi->info.valid_sections &
2736 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2737 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2738 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2739 return; /* already disabled */
2741 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2742 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2743 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2745 ctxt.seid = vsi->seid;
2746 ctxt.info = vsi->info;
2747 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2749 dev_info(&vsi->back->pdev->dev,
2750 "update vlan stripping failed, err %s aq_err %s\n",
2751 i40e_stat_str(&vsi->back->hw, ret),
2752 i40e_aq_str(&vsi->back->hw,
2753 vsi->back->hw.aq.asq_last_status));
2758 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2759 * @vsi: the vsi being configured
2760 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2762 * This is a helper function for adding a new MAC/VLAN filter with the
2763 * specified VLAN for each existing MAC address already in the hash table.
2764 * This function does *not* perform any accounting to update filters based on
2767 * NOTE: this function expects to be called while under the
2768 * mac_filter_hash_lock
2770 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2772 struct i40e_mac_filter *f, *add_f;
2773 struct hlist_node *h;
2776 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2777 if (f->state == I40E_FILTER_REMOVE)
2779 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2781 dev_info(&vsi->back->pdev->dev,
2782 "Could not add vlan filter %d for %pM\n",
2792 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2793 * @vsi: the VSI being configured
2794 * @vid: VLAN id to be added
2796 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2803 /* The network stack will attempt to add VID=0, with the intention to
2804 * receive priority tagged packets with a VLAN of 0. Our HW receives
2805 * these packets by default when configured to receive untagged
2806 * packets, so we don't need to add a filter for this case.
2807 * Additionally, HW interprets adding a VID=0 filter as meaning to
2808 * receive *only* tagged traffic and stops receiving untagged traffic.
2809 * Thus, we do not want to actually add a filter for VID=0
2814 /* Locked once because all functions invoked below iterates list*/
2815 spin_lock_bh(&vsi->mac_filter_hash_lock);
2816 err = i40e_add_vlan_all_mac(vsi, vid);
2817 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2821 /* schedule our worker thread which will take care of
2822 * applying the new filter changes
2824 i40e_service_event_schedule(vsi->back);
2829 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2830 * @vsi: the vsi being configured
2831 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2833 * This function should be used to remove all VLAN filters which match the
2834 * given VID. It does not schedule the service event and does not take the
2835 * mac_filter_hash_lock so it may be combined with other operations under
2836 * a single invocation of the mac_filter_hash_lock.
2838 * NOTE: this function expects to be called while under the
2839 * mac_filter_hash_lock
2841 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2843 struct i40e_mac_filter *f;
2844 struct hlist_node *h;
2847 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2849 __i40e_del_filter(vsi, f);
2854 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
2855 * @vsi: the VSI being configured
2856 * @vid: VLAN id to be removed
2858 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
2860 if (!vid || vsi->info.pvid)
2863 spin_lock_bh(&vsi->mac_filter_hash_lock);
2864 i40e_rm_vlan_all_mac(vsi, vid);
2865 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2867 /* schedule our worker thread which will take care of
2868 * applying the new filter changes
2870 i40e_service_event_schedule(vsi->back);
2874 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2875 * @netdev: network interface to be adjusted
2876 * @proto: unused protocol value
2877 * @vid: vlan id to be added
2879 * net_device_ops implementation for adding vlan ids
2881 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2882 __always_unused __be16 proto, u16 vid)
2884 struct i40e_netdev_priv *np = netdev_priv(netdev);
2885 struct i40e_vsi *vsi = np->vsi;
2888 if (vid >= VLAN_N_VID)
2891 ret = i40e_vsi_add_vlan(vsi, vid);
2893 set_bit(vid, vsi->active_vlans);
2899 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
2900 * @netdev: network interface to be adjusted
2901 * @proto: unused protocol value
2902 * @vid: vlan id to be added
2904 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
2905 __always_unused __be16 proto, u16 vid)
2907 struct i40e_netdev_priv *np = netdev_priv(netdev);
2908 struct i40e_vsi *vsi = np->vsi;
2910 if (vid >= VLAN_N_VID)
2912 set_bit(vid, vsi->active_vlans);
2916 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2917 * @netdev: network interface to be adjusted
2918 * @proto: unused protocol value
2919 * @vid: vlan id to be removed
2921 * net_device_ops implementation for removing vlan ids
2923 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2924 __always_unused __be16 proto, u16 vid)
2926 struct i40e_netdev_priv *np = netdev_priv(netdev);
2927 struct i40e_vsi *vsi = np->vsi;
2929 /* return code is ignored as there is nothing a user
2930 * can do about failure to remove and a log message was
2931 * already printed from the other function
2933 i40e_vsi_kill_vlan(vsi, vid);
2935 clear_bit(vid, vsi->active_vlans);
2941 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2942 * @vsi: the vsi being brought back up
2944 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2951 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2952 i40e_vlan_stripping_enable(vsi);
2954 i40e_vlan_stripping_disable(vsi);
2956 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2957 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
2962 * i40e_vsi_add_pvid - Add pvid for the VSI
2963 * @vsi: the vsi being adjusted
2964 * @vid: the vlan id to set as a PVID
2966 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2968 struct i40e_vsi_context ctxt;
2971 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2972 vsi->info.pvid = cpu_to_le16(vid);
2973 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2974 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2975 I40E_AQ_VSI_PVLAN_EMOD_STR;
2977 ctxt.seid = vsi->seid;
2978 ctxt.info = vsi->info;
2979 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2981 dev_info(&vsi->back->pdev->dev,
2982 "add pvid failed, err %s aq_err %s\n",
2983 i40e_stat_str(&vsi->back->hw, ret),
2984 i40e_aq_str(&vsi->back->hw,
2985 vsi->back->hw.aq.asq_last_status));
2993 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2994 * @vsi: the vsi being adjusted
2996 * Just use the vlan_rx_register() service to put it back to normal
2998 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3002 i40e_vlan_stripping_disable(vsi);
3006 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3007 * @vsi: ptr to the VSI
3009 * If this function returns with an error, then it's possible one or
3010 * more of the rings is populated (while the rest are not). It is the
3011 * callers duty to clean those orphaned rings.
3013 * Return 0 on success, negative on failure
3015 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3019 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3020 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3022 if (!i40e_enabled_xdp_vsi(vsi))
3025 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3026 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3032 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3033 * @vsi: ptr to the VSI
3035 * Free VSI's transmit software resources
3037 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3041 if (vsi->tx_rings) {
3042 for (i = 0; i < vsi->num_queue_pairs; i++)
3043 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3044 i40e_free_tx_resources(vsi->tx_rings[i]);
3047 if (vsi->xdp_rings) {
3048 for (i = 0; i < vsi->num_queue_pairs; i++)
3049 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3050 i40e_free_tx_resources(vsi->xdp_rings[i]);
3055 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3056 * @vsi: ptr to the VSI
3058 * If this function returns with an error, then it's possible one or
3059 * more of the rings is populated (while the rest are not). It is the
3060 * callers duty to clean those orphaned rings.
3062 * Return 0 on success, negative on failure
3064 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3068 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3069 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3074 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3075 * @vsi: ptr to the VSI
3077 * Free all receive software resources
3079 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3086 for (i = 0; i < vsi->num_queue_pairs; i++)
3087 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3088 i40e_free_rx_resources(vsi->rx_rings[i]);
3092 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3093 * @ring: The Tx ring to configure
3095 * This enables/disables XPS for a given Tx descriptor ring
3096 * based on the TCs enabled for the VSI that ring belongs to.
3098 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3102 if (!ring->q_vector || !ring->netdev || ring->ch)
3105 /* We only initialize XPS once, so as not to overwrite user settings */
3106 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3109 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3110 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3115 * i40e_xsk_umem - Retrieve the AF_XDP ZC if XDP and ZC is enabled
3116 * @ring: The Tx or Rx ring
3118 * Returns the UMEM or NULL.
3120 static struct xdp_umem *i40e_xsk_umem(struct i40e_ring *ring)
3122 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3123 int qid = ring->queue_index;
3125 if (ring_is_xdp(ring))
3126 qid -= ring->vsi->alloc_queue_pairs;
3128 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3131 return xdp_get_umem_from_qid(ring->vsi->netdev, qid);
3135 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3136 * @ring: The Tx ring to configure
3138 * Configure the Tx descriptor ring in the HMC context.
3140 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3142 struct i40e_vsi *vsi = ring->vsi;
3143 u16 pf_q = vsi->base_queue + ring->queue_index;
3144 struct i40e_hw *hw = &vsi->back->hw;
3145 struct i40e_hmc_obj_txq tx_ctx;
3146 i40e_status err = 0;
3149 if (ring_is_xdp(ring))
3150 ring->xsk_umem = i40e_xsk_umem(ring);
3152 /* some ATR related tx ring init */
3153 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3154 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3155 ring->atr_count = 0;
3157 ring->atr_sample_rate = 0;
3161 i40e_config_xps_tx_ring(ring);
3163 /* clear the context structure first */
3164 memset(&tx_ctx, 0, sizeof(tx_ctx));
3166 tx_ctx.new_context = 1;
3167 tx_ctx.base = (ring->dma / 128);
3168 tx_ctx.qlen = ring->count;
3169 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3170 I40E_FLAG_FD_ATR_ENABLED));
3171 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3172 /* FDIR VSI tx ring can still use RS bit and writebacks */
3173 if (vsi->type != I40E_VSI_FDIR)
3174 tx_ctx.head_wb_ena = 1;
3175 tx_ctx.head_wb_addr = ring->dma +
3176 (ring->count * sizeof(struct i40e_tx_desc));
3178 /* As part of VSI creation/update, FW allocates certain
3179 * Tx arbitration queue sets for each TC enabled for
3180 * the VSI. The FW returns the handles to these queue
3181 * sets as part of the response buffer to Add VSI,
3182 * Update VSI, etc. AQ commands. It is expected that
3183 * these queue set handles be associated with the Tx
3184 * queues by the driver as part of the TX queue context
3185 * initialization. This has to be done regardless of
3186 * DCB as by default everything is mapped to TC0.
3191 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3194 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3196 tx_ctx.rdylist_act = 0;
3198 /* clear the context in the HMC */
3199 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3201 dev_info(&vsi->back->pdev->dev,
3202 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3203 ring->queue_index, pf_q, err);
3207 /* set the context in the HMC */
3208 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3210 dev_info(&vsi->back->pdev->dev,
3211 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3212 ring->queue_index, pf_q, err);
3216 /* Now associate this queue with this PCI function */
3218 if (ring->ch->type == I40E_VSI_VMDQ2)
3219 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3223 qtx_ctl |= (ring->ch->vsi_number <<
3224 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3225 I40E_QTX_CTL_VFVM_INDX_MASK;
3227 if (vsi->type == I40E_VSI_VMDQ2) {
3228 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3229 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3230 I40E_QTX_CTL_VFVM_INDX_MASK;
3232 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3236 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3237 I40E_QTX_CTL_PF_INDX_MASK);
3238 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3241 /* cache tail off for easier writes later */
3242 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3248 * i40e_configure_rx_ring - Configure a receive ring context
3249 * @ring: The Rx ring to configure
3251 * Configure the Rx descriptor ring in the HMC context.
3253 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3255 struct i40e_vsi *vsi = ring->vsi;
3256 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3257 u16 pf_q = vsi->base_queue + ring->queue_index;
3258 struct i40e_hw *hw = &vsi->back->hw;
3259 struct i40e_hmc_obj_rxq rx_ctx;
3260 i40e_status err = 0;
3264 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3266 /* clear the context structure first */
3267 memset(&rx_ctx, 0, sizeof(rx_ctx));
3269 if (ring->vsi->type == I40E_VSI_MAIN)
3270 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3273 ring->xsk_umem = i40e_xsk_umem(ring);
3274 if (ring->xsk_umem) {
3275 ret = i40e_alloc_rx_bi_zc(ring);
3278 ring->rx_buf_len = xsk_umem_get_rx_frame_size(ring->xsk_umem);
3279 /* For AF_XDP ZC, we disallow packets to span on
3280 * multiple buffers, thus letting us skip that
3281 * handling in the fast-path.
3284 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3285 MEM_TYPE_XSK_BUFF_POOL,
3289 dev_info(&vsi->back->pdev->dev,
3290 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3294 ret = i40e_alloc_rx_bi(ring);
3297 ring->rx_buf_len = vsi->rx_buf_len;
3298 if (ring->vsi->type == I40E_VSI_MAIN) {
3299 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3300 MEM_TYPE_PAGE_SHARED,
3307 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3308 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3310 rx_ctx.base = (ring->dma / 128);
3311 rx_ctx.qlen = ring->count;
3313 /* use 32 byte descriptors */
3316 /* descriptor type is always zero
3319 rx_ctx.hsplit_0 = 0;
3321 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3322 if (hw->revision_id == 0)
3323 rx_ctx.lrxqthresh = 0;
3325 rx_ctx.lrxqthresh = 1;
3326 rx_ctx.crcstrip = 1;
3328 /* this controls whether VLAN is stripped from inner headers */
3330 /* set the prefena field to 1 because the manual says to */
3333 /* clear the context in the HMC */
3334 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3336 dev_info(&vsi->back->pdev->dev,
3337 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3338 ring->queue_index, pf_q, err);
3342 /* set the context in the HMC */
3343 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3345 dev_info(&vsi->back->pdev->dev,
3346 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3347 ring->queue_index, pf_q, err);
3351 /* configure Rx buffer alignment */
3352 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3353 clear_ring_build_skb_enabled(ring);
3355 set_ring_build_skb_enabled(ring);
3357 /* cache tail for quicker writes, and clear the reg before use */
3358 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3359 writel(0, ring->tail);
3361 if (ring->xsk_umem) {
3362 xsk_buff_set_rxq_info(ring->xsk_umem, &ring->xdp_rxq);
3363 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3365 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3368 /* Log this in case the user has forgotten to give the kernel
3369 * any buffers, even later in the application.
3371 dev_info(&vsi->back->pdev->dev,
3372 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3373 ring->xsk_umem ? "UMEM enabled " : "",
3374 ring->queue_index, pf_q);
3381 * i40e_vsi_configure_tx - Configure the VSI for Tx
3382 * @vsi: VSI structure describing this set of rings and resources
3384 * Configure the Tx VSI for operation.
3386 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3391 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3392 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3394 if (err || !i40e_enabled_xdp_vsi(vsi))
3397 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3398 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3404 * i40e_vsi_configure_rx - Configure the VSI for Rx
3405 * @vsi: the VSI being configured
3407 * Configure the Rx VSI for operation.
3409 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3414 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3415 vsi->max_frame = I40E_MAX_RXBUFFER;
3416 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3417 #if (PAGE_SIZE < 8192)
3418 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3419 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3420 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3421 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3424 vsi->max_frame = I40E_MAX_RXBUFFER;
3425 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3429 /* set up individual rings */
3430 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3431 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3437 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3438 * @vsi: ptr to the VSI
3440 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3442 struct i40e_ring *tx_ring, *rx_ring;
3443 u16 qoffset, qcount;
3446 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3447 /* Reset the TC information */
3448 for (i = 0; i < vsi->num_queue_pairs; i++) {
3449 rx_ring = vsi->rx_rings[i];
3450 tx_ring = vsi->tx_rings[i];
3451 rx_ring->dcb_tc = 0;
3452 tx_ring->dcb_tc = 0;
3457 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3458 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3461 qoffset = vsi->tc_config.tc_info[n].qoffset;
3462 qcount = vsi->tc_config.tc_info[n].qcount;
3463 for (i = qoffset; i < (qoffset + qcount); i++) {
3464 rx_ring = vsi->rx_rings[i];
3465 tx_ring = vsi->tx_rings[i];
3466 rx_ring->dcb_tc = n;
3467 tx_ring->dcb_tc = n;
3473 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3474 * @vsi: ptr to the VSI
3476 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3479 i40e_set_rx_mode(vsi->netdev);
3483 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3484 * @vsi: Pointer to the targeted VSI
3486 * This function replays the hlist on the hw where all the SB Flow Director
3487 * filters were saved.
3489 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3491 struct i40e_fdir_filter *filter;
3492 struct i40e_pf *pf = vsi->back;
3493 struct hlist_node *node;
3495 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3498 /* Reset FDir counters as we're replaying all existing filters */
3499 pf->fd_tcp4_filter_cnt = 0;
3500 pf->fd_udp4_filter_cnt = 0;
3501 pf->fd_sctp4_filter_cnt = 0;
3502 pf->fd_ip4_filter_cnt = 0;
3504 hlist_for_each_entry_safe(filter, node,
3505 &pf->fdir_filter_list, fdir_node) {
3506 i40e_add_del_fdir(vsi, filter, true);
3511 * i40e_vsi_configure - Set up the VSI for action
3512 * @vsi: the VSI being configured
3514 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3518 i40e_set_vsi_rx_mode(vsi);
3519 i40e_restore_vlan(vsi);
3520 i40e_vsi_config_dcb_rings(vsi);
3521 err = i40e_vsi_configure_tx(vsi);
3523 err = i40e_vsi_configure_rx(vsi);
3529 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3530 * @vsi: the VSI being configured
3532 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3534 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3535 struct i40e_pf *pf = vsi->back;
3536 struct i40e_hw *hw = &pf->hw;
3541 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3542 * and PFINT_LNKLSTn registers, e.g.:
3543 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3545 qp = vsi->base_queue;
3546 vector = vsi->base_vector;
3547 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3548 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3550 q_vector->rx.next_update = jiffies + 1;
3551 q_vector->rx.target_itr =
3552 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3553 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3554 q_vector->rx.target_itr >> 1);
3555 q_vector->rx.current_itr = q_vector->rx.target_itr;
3557 q_vector->tx.next_update = jiffies + 1;
3558 q_vector->tx.target_itr =
3559 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3560 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3561 q_vector->tx.target_itr >> 1);
3562 q_vector->tx.current_itr = q_vector->tx.target_itr;
3564 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3565 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3567 /* Linked list for the queuepairs assigned to this vector */
3568 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3569 for (q = 0; q < q_vector->num_ringpairs; q++) {
3570 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3573 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3574 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3575 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3576 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3577 (I40E_QUEUE_TYPE_TX <<
3578 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3580 wr32(hw, I40E_QINT_RQCTL(qp), val);
3583 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3584 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3585 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3586 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3587 (I40E_QUEUE_TYPE_TX <<
3588 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3590 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3593 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3594 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3595 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3596 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3597 (I40E_QUEUE_TYPE_RX <<
3598 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3600 /* Terminate the linked list */
3601 if (q == (q_vector->num_ringpairs - 1))
3602 val |= (I40E_QUEUE_END_OF_LIST <<
3603 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3605 wr32(hw, I40E_QINT_TQCTL(qp), val);
3614 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3615 * @pf: pointer to private device data structure
3617 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3619 struct i40e_hw *hw = &pf->hw;
3622 /* clear things first */
3623 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3624 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3626 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3627 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3628 I40E_PFINT_ICR0_ENA_GRST_MASK |
3629 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3630 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3631 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3632 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3633 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3635 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3636 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3638 if (pf->flags & I40E_FLAG_PTP)
3639 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3641 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3643 /* SW_ITR_IDX = 0, but don't change INTENA */
3644 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3645 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3647 /* OTHER_ITR_IDX = 0 */
3648 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3652 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3653 * @vsi: the VSI being configured
3655 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3657 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3658 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3659 struct i40e_pf *pf = vsi->back;
3660 struct i40e_hw *hw = &pf->hw;
3663 /* set the ITR configuration */
3664 q_vector->rx.next_update = jiffies + 1;
3665 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3666 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3667 q_vector->rx.current_itr = q_vector->rx.target_itr;
3668 q_vector->tx.next_update = jiffies + 1;
3669 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3670 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3671 q_vector->tx.current_itr = q_vector->tx.target_itr;
3673 i40e_enable_misc_int_causes(pf);
3675 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3676 wr32(hw, I40E_PFINT_LNKLST0, 0);
3678 /* Associate the queue pair to the vector and enable the queue int */
3679 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3680 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3681 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3682 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3684 wr32(hw, I40E_QINT_RQCTL(0), val);
3686 if (i40e_enabled_xdp_vsi(vsi)) {
3687 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3688 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3690 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3692 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3695 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3696 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3697 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3699 wr32(hw, I40E_QINT_TQCTL(0), val);
3704 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3705 * @pf: board private structure
3707 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3709 struct i40e_hw *hw = &pf->hw;
3711 wr32(hw, I40E_PFINT_DYN_CTL0,
3712 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3717 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3718 * @pf: board private structure
3720 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3722 struct i40e_hw *hw = &pf->hw;
3725 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3726 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3727 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3729 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3734 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3735 * @irq: interrupt number
3736 * @data: pointer to a q_vector
3738 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3740 struct i40e_q_vector *q_vector = data;
3742 if (!q_vector->tx.ring && !q_vector->rx.ring)
3745 napi_schedule_irqoff(&q_vector->napi);
3751 * i40e_irq_affinity_notify - Callback for affinity changes
3752 * @notify: context as to what irq was changed
3753 * @mask: the new affinity mask
3755 * This is a callback function used by the irq_set_affinity_notifier function
3756 * so that we may register to receive changes to the irq affinity masks.
3758 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3759 const cpumask_t *mask)
3761 struct i40e_q_vector *q_vector =
3762 container_of(notify, struct i40e_q_vector, affinity_notify);
3764 cpumask_copy(&q_vector->affinity_mask, mask);
3768 * i40e_irq_affinity_release - Callback for affinity notifier release
3769 * @ref: internal core kernel usage
3771 * This is a callback function used by the irq_set_affinity_notifier function
3772 * to inform the current notification subscriber that they will no longer
3773 * receive notifications.
3775 static void i40e_irq_affinity_release(struct kref *ref) {}
3778 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3779 * @vsi: the VSI being configured
3780 * @basename: name for the vector
3782 * Allocates MSI-X vectors and requests interrupts from the kernel.
3784 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3786 int q_vectors = vsi->num_q_vectors;
3787 struct i40e_pf *pf = vsi->back;
3788 int base = vsi->base_vector;
3795 for (vector = 0; vector < q_vectors; vector++) {
3796 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3798 irq_num = pf->msix_entries[base + vector].vector;
3800 if (q_vector->tx.ring && q_vector->rx.ring) {
3801 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3802 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3804 } else if (q_vector->rx.ring) {
3805 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3806 "%s-%s-%d", basename, "rx", rx_int_idx++);
3807 } else if (q_vector->tx.ring) {
3808 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3809 "%s-%s-%d", basename, "tx", tx_int_idx++);
3811 /* skip this unused q_vector */
3814 err = request_irq(irq_num,
3820 dev_info(&pf->pdev->dev,
3821 "MSIX request_irq failed, error: %d\n", err);
3822 goto free_queue_irqs;
3825 /* register for affinity change notifications */
3826 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3827 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3828 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3829 /* Spread affinity hints out across online CPUs.
3831 * get_cpu_mask returns a static constant mask with
3832 * a permanent lifetime so it's ok to pass to
3833 * irq_set_affinity_hint without making a copy.
3835 cpu = cpumask_local_spread(q_vector->v_idx, -1);
3836 irq_set_affinity_hint(irq_num, get_cpu_mask(cpu));
3839 vsi->irqs_ready = true;
3845 irq_num = pf->msix_entries[base + vector].vector;
3846 irq_set_affinity_notifier(irq_num, NULL);
3847 irq_set_affinity_hint(irq_num, NULL);
3848 free_irq(irq_num, &vsi->q_vectors[vector]);
3854 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3855 * @vsi: the VSI being un-configured
3857 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3859 struct i40e_pf *pf = vsi->back;
3860 struct i40e_hw *hw = &pf->hw;
3861 int base = vsi->base_vector;
3864 /* disable interrupt causation from each queue */
3865 for (i = 0; i < vsi->num_queue_pairs; i++) {
3868 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
3869 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3870 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
3872 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
3873 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3874 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
3876 if (!i40e_enabled_xdp_vsi(vsi))
3878 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
3881 /* disable each interrupt */
3882 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3883 for (i = vsi->base_vector;
3884 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3885 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3888 for (i = 0; i < vsi->num_q_vectors; i++)
3889 synchronize_irq(pf->msix_entries[i + base].vector);
3891 /* Legacy and MSI mode - this stops all interrupt handling */
3892 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3893 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3895 synchronize_irq(pf->pdev->irq);
3900 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3901 * @vsi: the VSI being configured
3903 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3905 struct i40e_pf *pf = vsi->back;
3908 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3909 for (i = 0; i < vsi->num_q_vectors; i++)
3910 i40e_irq_dynamic_enable(vsi, i);
3912 i40e_irq_dynamic_enable_icr0(pf);
3915 i40e_flush(&pf->hw);
3920 * i40e_free_misc_vector - Free the vector that handles non-queue events
3921 * @pf: board private structure
3923 static void i40e_free_misc_vector(struct i40e_pf *pf)
3926 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3927 i40e_flush(&pf->hw);
3929 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
3930 synchronize_irq(pf->msix_entries[0].vector);
3931 free_irq(pf->msix_entries[0].vector, pf);
3932 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
3937 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3938 * @irq: interrupt number
3939 * @data: pointer to a q_vector
3941 * This is the handler used for all MSI/Legacy interrupts, and deals
3942 * with both queue and non-queue interrupts. This is also used in
3943 * MSIX mode to handle the non-queue interrupts.
3945 static irqreturn_t i40e_intr(int irq, void *data)
3947 struct i40e_pf *pf = (struct i40e_pf *)data;
3948 struct i40e_hw *hw = &pf->hw;
3949 irqreturn_t ret = IRQ_NONE;
3950 u32 icr0, icr0_remaining;
3953 icr0 = rd32(hw, I40E_PFINT_ICR0);
3954 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3956 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3957 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3960 /* if interrupt but no bits showing, must be SWINT */
3961 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3962 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3965 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3966 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3967 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3968 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
3969 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
3972 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3973 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3974 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3975 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3977 /* We do not have a way to disarm Queue causes while leaving
3978 * interrupt enabled for all other causes, ideally
3979 * interrupt should be disabled while we are in NAPI but
3980 * this is not a performance path and napi_schedule()
3981 * can deal with rescheduling.
3983 if (!test_bit(__I40E_DOWN, pf->state))
3984 napi_schedule_irqoff(&q_vector->napi);
3987 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3988 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3989 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
3990 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3993 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3994 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3995 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
3998 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3999 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4000 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4003 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4004 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4005 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4006 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4007 val = rd32(hw, I40E_GLGEN_RSTAT);
4008 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4009 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4010 if (val == I40E_RESET_CORER) {
4012 } else if (val == I40E_RESET_GLOBR) {
4014 } else if (val == I40E_RESET_EMPR) {
4016 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4020 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4021 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4022 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4023 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4024 rd32(hw, I40E_PFHMC_ERRORINFO),
4025 rd32(hw, I40E_PFHMC_ERRORDATA));
4028 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4029 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4031 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
4032 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4033 i40e_ptp_tx_hwtstamp(pf);
4037 /* If a critical error is pending we have no choice but to reset the
4039 * Report and mask out any remaining unexpected interrupts.
4041 icr0_remaining = icr0 & ena_mask;
4042 if (icr0_remaining) {
4043 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4045 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4046 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4047 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4048 dev_info(&pf->pdev->dev, "device will be reset\n");
4049 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4050 i40e_service_event_schedule(pf);
4052 ena_mask &= ~icr0_remaining;
4057 /* re-enable interrupt causes */
4058 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4059 if (!test_bit(__I40E_DOWN, pf->state) ||
4060 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4061 i40e_service_event_schedule(pf);
4062 i40e_irq_dynamic_enable_icr0(pf);
4069 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4070 * @tx_ring: tx ring to clean
4071 * @budget: how many cleans we're allowed
4073 * Returns true if there's any budget left (e.g. the clean is finished)
4075 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4077 struct i40e_vsi *vsi = tx_ring->vsi;
4078 u16 i = tx_ring->next_to_clean;
4079 struct i40e_tx_buffer *tx_buf;
4080 struct i40e_tx_desc *tx_desc;
4082 tx_buf = &tx_ring->tx_bi[i];
4083 tx_desc = I40E_TX_DESC(tx_ring, i);
4084 i -= tx_ring->count;
4087 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4089 /* if next_to_watch is not set then there is no work pending */
4093 /* prevent any other reads prior to eop_desc */
4096 /* if the descriptor isn't done, no work yet to do */
4097 if (!(eop_desc->cmd_type_offset_bsz &
4098 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4101 /* clear next_to_watch to prevent false hangs */
4102 tx_buf->next_to_watch = NULL;
4104 tx_desc->buffer_addr = 0;
4105 tx_desc->cmd_type_offset_bsz = 0;
4106 /* move past filter desc */
4111 i -= tx_ring->count;
4112 tx_buf = tx_ring->tx_bi;
4113 tx_desc = I40E_TX_DESC(tx_ring, 0);
4115 /* unmap skb header data */
4116 dma_unmap_single(tx_ring->dev,
4117 dma_unmap_addr(tx_buf, dma),
4118 dma_unmap_len(tx_buf, len),
4120 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4121 kfree(tx_buf->raw_buf);
4123 tx_buf->raw_buf = NULL;
4124 tx_buf->tx_flags = 0;
4125 tx_buf->next_to_watch = NULL;
4126 dma_unmap_len_set(tx_buf, len, 0);
4127 tx_desc->buffer_addr = 0;
4128 tx_desc->cmd_type_offset_bsz = 0;
4130 /* move us past the eop_desc for start of next FD desc */
4135 i -= tx_ring->count;
4136 tx_buf = tx_ring->tx_bi;
4137 tx_desc = I40E_TX_DESC(tx_ring, 0);
4140 /* update budget accounting */
4142 } while (likely(budget));
4144 i += tx_ring->count;
4145 tx_ring->next_to_clean = i;
4147 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4148 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4154 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4155 * @irq: interrupt number
4156 * @data: pointer to a q_vector
4158 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4160 struct i40e_q_vector *q_vector = data;
4161 struct i40e_vsi *vsi;
4163 if (!q_vector->tx.ring)
4166 vsi = q_vector->tx.ring->vsi;
4167 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4173 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4174 * @vsi: the VSI being configured
4175 * @v_idx: vector index
4176 * @qp_idx: queue pair index
4178 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4180 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4181 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4182 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4184 tx_ring->q_vector = q_vector;
4185 tx_ring->next = q_vector->tx.ring;
4186 q_vector->tx.ring = tx_ring;
4187 q_vector->tx.count++;
4189 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4190 if (i40e_enabled_xdp_vsi(vsi)) {
4191 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4193 xdp_ring->q_vector = q_vector;
4194 xdp_ring->next = q_vector->tx.ring;
4195 q_vector->tx.ring = xdp_ring;
4196 q_vector->tx.count++;
4199 rx_ring->q_vector = q_vector;
4200 rx_ring->next = q_vector->rx.ring;
4201 q_vector->rx.ring = rx_ring;
4202 q_vector->rx.count++;
4206 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4207 * @vsi: the VSI being configured
4209 * This function maps descriptor rings to the queue-specific vectors
4210 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4211 * one vector per queue pair, but on a constrained vector budget, we
4212 * group the queue pairs as "efficiently" as possible.
4214 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4216 int qp_remaining = vsi->num_queue_pairs;
4217 int q_vectors = vsi->num_q_vectors;
4222 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4223 * group them so there are multiple queues per vector.
4224 * It is also important to go through all the vectors available to be
4225 * sure that if we don't use all the vectors, that the remaining vectors
4226 * are cleared. This is especially important when decreasing the
4227 * number of queues in use.
4229 for (; v_start < q_vectors; v_start++) {
4230 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4232 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4234 q_vector->num_ringpairs = num_ringpairs;
4235 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4237 q_vector->rx.count = 0;
4238 q_vector->tx.count = 0;
4239 q_vector->rx.ring = NULL;
4240 q_vector->tx.ring = NULL;
4242 while (num_ringpairs--) {
4243 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4251 * i40e_vsi_request_irq - Request IRQ from the OS
4252 * @vsi: the VSI being configured
4253 * @basename: name for the vector
4255 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4257 struct i40e_pf *pf = vsi->back;
4260 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4261 err = i40e_vsi_request_irq_msix(vsi, basename);
4262 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4263 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4266 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4270 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4275 #ifdef CONFIG_NET_POLL_CONTROLLER
4277 * i40e_netpoll - A Polling 'interrupt' handler
4278 * @netdev: network interface device structure
4280 * This is used by netconsole to send skbs without having to re-enable
4281 * interrupts. It's not called while the normal interrupt routine is executing.
4283 static void i40e_netpoll(struct net_device *netdev)
4285 struct i40e_netdev_priv *np = netdev_priv(netdev);
4286 struct i40e_vsi *vsi = np->vsi;
4287 struct i40e_pf *pf = vsi->back;
4290 /* if interface is down do nothing */
4291 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4294 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4295 for (i = 0; i < vsi->num_q_vectors; i++)
4296 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4298 i40e_intr(pf->pdev->irq, netdev);
4303 #define I40E_QTX_ENA_WAIT_COUNT 50
4306 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4307 * @pf: the PF being configured
4308 * @pf_q: the PF queue
4309 * @enable: enable or disable state of the queue
4311 * This routine will wait for the given Tx queue of the PF to reach the
4312 * enabled or disabled state.
4313 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4314 * multiple retries; else will return 0 in case of success.
4316 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4321 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4322 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4323 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4326 usleep_range(10, 20);
4328 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4335 * i40e_control_tx_q - Start or stop a particular Tx queue
4336 * @pf: the PF structure
4337 * @pf_q: the PF queue to configure
4338 * @enable: start or stop the queue
4340 * This function enables or disables a single queue. Note that any delay
4341 * required after the operation is expected to be handled by the caller of
4344 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4346 struct i40e_hw *hw = &pf->hw;
4350 /* warn the TX unit of coming changes */
4351 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4353 usleep_range(10, 20);
4355 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4356 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4357 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4358 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4360 usleep_range(1000, 2000);
4363 /* Skip if the queue is already in the requested state */
4364 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4367 /* turn on/off the queue */
4369 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4370 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4372 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4375 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4379 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4381 * @pf: the PF structure
4382 * @pf_q: the PF queue to configure
4383 * @is_xdp: true if the queue is used for XDP
4384 * @enable: start or stop the queue
4386 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4387 bool is_xdp, bool enable)
4391 i40e_control_tx_q(pf, pf_q, enable);
4393 /* wait for the change to finish */
4394 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4396 dev_info(&pf->pdev->dev,
4397 "VSI seid %d %sTx ring %d %sable timeout\n",
4398 seid, (is_xdp ? "XDP " : ""), pf_q,
4399 (enable ? "en" : "dis"));
4406 * i40e_vsi_control_tx - Start or stop a VSI's rings
4407 * @vsi: the VSI being configured
4408 * @enable: start or stop the rings
4410 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
4412 struct i40e_pf *pf = vsi->back;
4413 int i, pf_q, ret = 0;
4415 pf_q = vsi->base_queue;
4416 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4417 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4419 false /*is xdp*/, enable);
4423 if (!i40e_enabled_xdp_vsi(vsi))
4426 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4427 pf_q + vsi->alloc_queue_pairs,
4428 true /*is xdp*/, enable);
4436 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4437 * @pf: the PF being configured
4438 * @pf_q: the PF queue
4439 * @enable: enable or disable state of the queue
4441 * This routine will wait for the given Rx queue of the PF to reach the
4442 * enabled or disabled state.
4443 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4444 * multiple retries; else will return 0 in case of success.
4446 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4451 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4452 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4453 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4456 usleep_range(10, 20);
4458 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4465 * i40e_control_rx_q - Start or stop a particular Rx queue
4466 * @pf: the PF structure
4467 * @pf_q: the PF queue to configure
4468 * @enable: start or stop the queue
4470 * This function enables or disables a single queue. Note that
4471 * any delay required after the operation is expected to be
4472 * handled by the caller of this function.
4474 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4476 struct i40e_hw *hw = &pf->hw;
4480 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4481 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4482 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4483 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4485 usleep_range(1000, 2000);
4488 /* Skip if the queue is already in the requested state */
4489 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4492 /* turn on/off the queue */
4494 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4496 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4498 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4502 * i40e_control_wait_rx_q
4503 * @pf: the PF structure
4504 * @pf_q: queue being configured
4505 * @enable: start or stop the rings
4507 * This function enables or disables a single queue along with waiting
4508 * for the change to finish. The caller of this function should handle
4509 * the delays needed in the case of disabling queues.
4511 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4515 i40e_control_rx_q(pf, pf_q, enable);
4517 /* wait for the change to finish */
4518 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4526 * i40e_vsi_control_rx - Start or stop a VSI's rings
4527 * @vsi: the VSI being configured
4528 * @enable: start or stop the rings
4530 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
4532 struct i40e_pf *pf = vsi->back;
4533 int i, pf_q, ret = 0;
4535 pf_q = vsi->base_queue;
4536 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4537 ret = i40e_control_wait_rx_q(pf, pf_q, enable);
4539 dev_info(&pf->pdev->dev,
4540 "VSI seid %d Rx ring %d %sable timeout\n",
4541 vsi->seid, pf_q, (enable ? "en" : "dis"));
4546 /* Due to HW errata, on Rx disable only, the register can indicate done
4547 * before it really is. Needs 50ms to be sure
4556 * i40e_vsi_start_rings - Start a VSI's rings
4557 * @vsi: the VSI being configured
4559 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4563 /* do rx first for enable and last for disable */
4564 ret = i40e_vsi_control_rx(vsi, true);
4567 ret = i40e_vsi_control_tx(vsi, true);
4573 * i40e_vsi_stop_rings - Stop a VSI's rings
4574 * @vsi: the VSI being configured
4576 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4578 /* When port TX is suspended, don't wait */
4579 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4580 return i40e_vsi_stop_rings_no_wait(vsi);
4582 /* do rx first for enable and last for disable
4583 * Ignore return value, we need to shutdown whatever we can
4585 i40e_vsi_control_tx(vsi, false);
4586 i40e_vsi_control_rx(vsi, false);
4590 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4591 * @vsi: the VSI being shutdown
4593 * This function stops all the rings for a VSI but does not delay to verify
4594 * that rings have been disabled. It is expected that the caller is shutting
4595 * down multiple VSIs at once and will delay together for all the VSIs after
4596 * initiating the shutdown. This is particularly useful for shutting down lots
4597 * of VFs together. Otherwise, a large delay can be incurred while configuring
4598 * each VSI in serial.
4600 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4602 struct i40e_pf *pf = vsi->back;
4605 pf_q = vsi->base_queue;
4606 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4607 i40e_control_tx_q(pf, pf_q, false);
4608 i40e_control_rx_q(pf, pf_q, false);
4613 * i40e_vsi_free_irq - Free the irq association with the OS
4614 * @vsi: the VSI being configured
4616 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4618 struct i40e_pf *pf = vsi->back;
4619 struct i40e_hw *hw = &pf->hw;
4620 int base = vsi->base_vector;
4624 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4625 if (!vsi->q_vectors)
4628 if (!vsi->irqs_ready)
4631 vsi->irqs_ready = false;
4632 for (i = 0; i < vsi->num_q_vectors; i++) {
4637 irq_num = pf->msix_entries[vector].vector;
4639 /* free only the irqs that were actually requested */
4640 if (!vsi->q_vectors[i] ||
4641 !vsi->q_vectors[i]->num_ringpairs)
4644 /* clear the affinity notifier in the IRQ descriptor */
4645 irq_set_affinity_notifier(irq_num, NULL);
4646 /* remove our suggested affinity mask for this IRQ */
4647 irq_set_affinity_hint(irq_num, NULL);
4648 synchronize_irq(irq_num);
4649 free_irq(irq_num, vsi->q_vectors[i]);
4651 /* Tear down the interrupt queue link list
4653 * We know that they come in pairs and always
4654 * the Rx first, then the Tx. To clear the
4655 * link list, stick the EOL value into the
4656 * next_q field of the registers.
4658 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4659 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4660 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4661 val |= I40E_QUEUE_END_OF_LIST
4662 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4663 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4665 while (qp != I40E_QUEUE_END_OF_LIST) {
4668 val = rd32(hw, I40E_QINT_RQCTL(qp));
4670 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4671 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4672 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4673 I40E_QINT_RQCTL_INTEVENT_MASK);
4675 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4676 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4678 wr32(hw, I40E_QINT_RQCTL(qp), val);
4680 val = rd32(hw, I40E_QINT_TQCTL(qp));
4682 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4683 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4685 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4686 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4687 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4688 I40E_QINT_TQCTL_INTEVENT_MASK);
4690 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4691 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4693 wr32(hw, I40E_QINT_TQCTL(qp), val);
4698 free_irq(pf->pdev->irq, pf);
4700 val = rd32(hw, I40E_PFINT_LNKLST0);
4701 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4702 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4703 val |= I40E_QUEUE_END_OF_LIST
4704 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4705 wr32(hw, I40E_PFINT_LNKLST0, val);
4707 val = rd32(hw, I40E_QINT_RQCTL(qp));
4708 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4709 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4710 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4711 I40E_QINT_RQCTL_INTEVENT_MASK);
4713 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4714 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4716 wr32(hw, I40E_QINT_RQCTL(qp), val);
4718 val = rd32(hw, I40E_QINT_TQCTL(qp));
4720 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4721 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4722 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4723 I40E_QINT_TQCTL_INTEVENT_MASK);
4725 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4726 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4728 wr32(hw, I40E_QINT_TQCTL(qp), val);
4733 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4734 * @vsi: the VSI being configured
4735 * @v_idx: Index of vector to be freed
4737 * This function frees the memory allocated to the q_vector. In addition if
4738 * NAPI is enabled it will delete any references to the NAPI struct prior
4739 * to freeing the q_vector.
4741 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4743 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4744 struct i40e_ring *ring;
4749 /* disassociate q_vector from rings */
4750 i40e_for_each_ring(ring, q_vector->tx)
4751 ring->q_vector = NULL;
4753 i40e_for_each_ring(ring, q_vector->rx)
4754 ring->q_vector = NULL;
4756 /* only VSI w/ an associated netdev is set up w/ NAPI */
4758 netif_napi_del(&q_vector->napi);
4760 vsi->q_vectors[v_idx] = NULL;
4762 kfree_rcu(q_vector, rcu);
4766 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4767 * @vsi: the VSI being un-configured
4769 * This frees the memory allocated to the q_vectors and
4770 * deletes references to the NAPI struct.
4772 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4776 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4777 i40e_free_q_vector(vsi, v_idx);
4781 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4782 * @pf: board private structure
4784 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4786 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4787 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4788 pci_disable_msix(pf->pdev);
4789 kfree(pf->msix_entries);
4790 pf->msix_entries = NULL;
4791 kfree(pf->irq_pile);
4792 pf->irq_pile = NULL;
4793 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4794 pci_disable_msi(pf->pdev);
4796 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4800 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4801 * @pf: board private structure
4803 * We go through and clear interrupt specific resources and reset the structure
4804 * to pre-load conditions
4806 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4810 i40e_free_misc_vector(pf);
4812 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4813 I40E_IWARP_IRQ_PILE_ID);
4815 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4816 for (i = 0; i < pf->num_alloc_vsi; i++)
4818 i40e_vsi_free_q_vectors(pf->vsi[i]);
4819 i40e_reset_interrupt_capability(pf);
4823 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4824 * @vsi: the VSI being configured
4826 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4833 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4834 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4836 if (q_vector->rx.ring || q_vector->tx.ring)
4837 napi_enable(&q_vector->napi);
4842 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4843 * @vsi: the VSI being configured
4845 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4852 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
4853 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
4855 if (q_vector->rx.ring || q_vector->tx.ring)
4856 napi_disable(&q_vector->napi);
4861 * i40e_vsi_close - Shut down a VSI
4862 * @vsi: the vsi to be quelled
4864 static void i40e_vsi_close(struct i40e_vsi *vsi)
4866 struct i40e_pf *pf = vsi->back;
4867 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
4869 i40e_vsi_free_irq(vsi);
4870 i40e_vsi_free_tx_resources(vsi);
4871 i40e_vsi_free_rx_resources(vsi);
4872 vsi->current_netdev_flags = 0;
4873 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
4874 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4875 set_bit(__I40E_CLIENT_RESET, pf->state);
4879 * i40e_quiesce_vsi - Pause a given VSI
4880 * @vsi: the VSI being paused
4882 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4884 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4887 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
4888 if (vsi->netdev && netif_running(vsi->netdev))
4889 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4891 i40e_vsi_close(vsi);
4895 * i40e_unquiesce_vsi - Resume a given VSI
4896 * @vsi: the VSI being resumed
4898 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4900 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
4903 if (vsi->netdev && netif_running(vsi->netdev))
4904 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4906 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4910 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4913 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4917 for (v = 0; v < pf->num_alloc_vsi; v++) {
4919 i40e_quiesce_vsi(pf->vsi[v]);
4924 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4927 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4931 for (v = 0; v < pf->num_alloc_vsi; v++) {
4933 i40e_unquiesce_vsi(pf->vsi[v]);
4938 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4939 * @vsi: the VSI being configured
4941 * Wait until all queues on a given VSI have been disabled.
4943 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4945 struct i40e_pf *pf = vsi->back;
4948 pf_q = vsi->base_queue;
4949 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4950 /* Check and wait for the Tx queue */
4951 ret = i40e_pf_txq_wait(pf, pf_q, false);
4953 dev_info(&pf->pdev->dev,
4954 "VSI seid %d Tx ring %d disable timeout\n",
4959 if (!i40e_enabled_xdp_vsi(vsi))
4962 /* Check and wait for the XDP Tx queue */
4963 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
4966 dev_info(&pf->pdev->dev,
4967 "VSI seid %d XDP Tx ring %d disable timeout\n",
4972 /* Check and wait for the Rx queue */
4973 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4975 dev_info(&pf->pdev->dev,
4976 "VSI seid %d Rx ring %d disable timeout\n",
4985 #ifdef CONFIG_I40E_DCB
4987 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4990 * This function waits for the queues to be in disabled state for all the
4991 * VSIs that are managed by this PF.
4993 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4997 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4999 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5011 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5012 * @pf: pointer to PF
5014 * Get TC map for ISCSI PF type that will include iSCSI TC
5017 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5019 struct i40e_dcb_app_priority_table app;
5020 struct i40e_hw *hw = &pf->hw;
5021 u8 enabled_tc = 1; /* TC0 is always enabled */
5023 /* Get the iSCSI APP TLV */
5024 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5026 for (i = 0; i < dcbcfg->numapps; i++) {
5027 app = dcbcfg->app[i];
5028 if (app.selector == I40E_APP_SEL_TCPIP &&
5029 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5030 tc = dcbcfg->etscfg.prioritytable[app.priority];
5031 enabled_tc |= BIT(tc);
5040 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5041 * @dcbcfg: the corresponding DCBx configuration structure
5043 * Return the number of TCs from given DCBx configuration
5045 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5047 int i, tc_unused = 0;
5051 /* Scan the ETS Config Priority Table to find
5052 * traffic class enabled for a given priority
5053 * and create a bitmask of enabled TCs
5055 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5056 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5058 /* Now scan the bitmask to check for
5059 * contiguous TCs starting with TC0
5061 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5062 if (num_tc & BIT(i)) {
5066 pr_err("Non-contiguous TC - Disabling DCB\n");
5074 /* There is always at least TC0 */
5082 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5083 * @dcbcfg: the corresponding DCBx configuration structure
5085 * Query the current DCB configuration and return the number of
5086 * traffic classes enabled from the given DCBX config
5088 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5090 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5094 for (i = 0; i < num_tc; i++)
5095 enabled_tc |= BIT(i);
5101 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5102 * @pf: PF being queried
5104 * Query the current MQPRIO configuration and return the number of
5105 * traffic classes enabled.
5107 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5109 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5110 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5111 u8 enabled_tc = 1, i;
5113 for (i = 1; i < num_tc; i++)
5114 enabled_tc |= BIT(i);
5119 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5120 * @pf: PF being queried
5122 * Return number of traffic classes enabled for the given PF
5124 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5126 struct i40e_hw *hw = &pf->hw;
5127 u8 i, enabled_tc = 1;
5129 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5131 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5132 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5134 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5135 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5138 /* SFP mode will be enabled for all TCs on port */
5139 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5140 return i40e_dcb_get_num_tc(dcbcfg);
5142 /* MFP mode return count of enabled TCs for this PF */
5143 if (pf->hw.func_caps.iscsi)
5144 enabled_tc = i40e_get_iscsi_tc_map(pf);
5146 return 1; /* Only TC0 */
5148 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5149 if (enabled_tc & BIT(i))
5156 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
5157 * @pf: PF being queried
5159 * Return a bitmap for enabled traffic classes for this PF.
5161 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5163 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5164 return i40e_mqprio_get_enabled_tc(pf);
5166 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5169 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5170 return I40E_DEFAULT_TRAFFIC_CLASS;
5172 /* SFP mode we want PF to be enabled for all TCs */
5173 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5174 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5176 /* MFP enabled and iSCSI PF type */
5177 if (pf->hw.func_caps.iscsi)
5178 return i40e_get_iscsi_tc_map(pf);
5180 return I40E_DEFAULT_TRAFFIC_CLASS;
5184 * i40e_vsi_get_bw_info - Query VSI BW Information
5185 * @vsi: the VSI being queried
5187 * Returns 0 on success, negative value on failure
5189 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5191 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5192 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5193 struct i40e_pf *pf = vsi->back;
5194 struct i40e_hw *hw = &pf->hw;
5199 /* Get the VSI level BW configuration */
5200 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5202 dev_info(&pf->pdev->dev,
5203 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5204 i40e_stat_str(&pf->hw, ret),
5205 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5209 /* Get the VSI level BW configuration per TC */
5210 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5213 dev_info(&pf->pdev->dev,
5214 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5215 i40e_stat_str(&pf->hw, ret),
5216 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5220 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5221 dev_info(&pf->pdev->dev,
5222 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5223 bw_config.tc_valid_bits,
5224 bw_ets_config.tc_valid_bits);
5225 /* Still continuing */
5228 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5229 vsi->bw_max_quanta = bw_config.max_bw;
5230 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5231 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5232 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5233 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5234 vsi->bw_ets_limit_credits[i] =
5235 le16_to_cpu(bw_ets_config.credits[i]);
5236 /* 3 bits out of 4 for each TC */
5237 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5244 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5245 * @vsi: the VSI being configured
5246 * @enabled_tc: TC bitmap
5247 * @bw_share: BW shared credits per TC
5249 * Returns 0 on success, negative value on failure
5251 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5254 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5255 struct i40e_pf *pf = vsi->back;
5259 /* There is no need to reset BW when mqprio mode is on. */
5260 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5262 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5263 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5265 dev_info(&pf->pdev->dev,
5266 "Failed to reset tx rate for vsi->seid %u\n",
5270 bw_data.tc_valid_bits = enabled_tc;
5271 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5272 bw_data.tc_bw_credits[i] = bw_share[i];
5274 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5276 dev_info(&pf->pdev->dev,
5277 "AQ command Config VSI BW allocation per TC failed = %d\n",
5278 pf->hw.aq.asq_last_status);
5282 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5283 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5289 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5290 * @vsi: the VSI being configured
5291 * @enabled_tc: TC map to be enabled
5294 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5296 struct net_device *netdev = vsi->netdev;
5297 struct i40e_pf *pf = vsi->back;
5298 struct i40e_hw *hw = &pf->hw;
5301 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5307 netdev_reset_tc(netdev);
5311 /* Set up actual enabled TCs on the VSI */
5312 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5315 /* set per TC queues for the VSI */
5316 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5317 /* Only set TC queues for enabled tcs
5319 * e.g. For a VSI that has TC0 and TC3 enabled the
5320 * enabled_tc bitmap would be 0x00001001; the driver
5321 * will set the numtc for netdev as 2 that will be
5322 * referenced by the netdev layer as TC 0 and 1.
5324 if (vsi->tc_config.enabled_tc & BIT(i))
5325 netdev_set_tc_queue(netdev,
5326 vsi->tc_config.tc_info[i].netdev_tc,
5327 vsi->tc_config.tc_info[i].qcount,
5328 vsi->tc_config.tc_info[i].qoffset);
5331 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5334 /* Assign UP2TC map for the VSI */
5335 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5336 /* Get the actual TC# for the UP */
5337 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5338 /* Get the mapped netdev TC# for the UP */
5339 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5340 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5345 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5346 * @vsi: the VSI being configured
5347 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5349 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5350 struct i40e_vsi_context *ctxt)
5352 /* copy just the sections touched not the entire info
5353 * since not all sections are valid as returned by
5356 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5357 memcpy(&vsi->info.queue_mapping,
5358 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5359 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5360 sizeof(vsi->info.tc_mapping));
5364 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5365 * @vsi: VSI to be configured
5366 * @enabled_tc: TC bitmap
5368 * This configures a particular VSI for TCs that are mapped to the
5369 * given TC bitmap. It uses default bandwidth share for TCs across
5370 * VSIs to configure TC for a particular VSI.
5373 * It is expected that the VSI queues have been quisced before calling
5376 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5378 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5379 struct i40e_pf *pf = vsi->back;
5380 struct i40e_hw *hw = &pf->hw;
5381 struct i40e_vsi_context ctxt;
5385 /* Check if enabled_tc is same as existing or new TCs */
5386 if (vsi->tc_config.enabled_tc == enabled_tc &&
5387 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5390 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5391 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5392 if (enabled_tc & BIT(i))
5396 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5398 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5400 dev_info(&pf->pdev->dev,
5401 "Failed configuring TC map %d for VSI %d\n",
5402 enabled_tc, vsi->seid);
5403 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5406 dev_info(&pf->pdev->dev,
5407 "Failed querying vsi bw info, err %s aq_err %s\n",
5408 i40e_stat_str(hw, ret),
5409 i40e_aq_str(hw, hw->aq.asq_last_status));
5412 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5413 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5416 valid_tc = bw_config.tc_valid_bits;
5417 /* Always enable TC0, no matter what */
5419 dev_info(&pf->pdev->dev,
5420 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5421 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5422 enabled_tc = valid_tc;
5425 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5427 dev_err(&pf->pdev->dev,
5428 "Unable to configure TC map %d for VSI %d\n",
5429 enabled_tc, vsi->seid);
5434 /* Update Queue Pairs Mapping for currently enabled UPs */
5435 ctxt.seid = vsi->seid;
5436 ctxt.pf_num = vsi->back->hw.pf_id;
5438 ctxt.uplink_seid = vsi->uplink_seid;
5439 ctxt.info = vsi->info;
5440 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5441 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5445 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5448 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5451 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5452 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5453 vsi->num_queue_pairs);
5454 ret = i40e_vsi_config_rss(vsi);
5456 dev_info(&vsi->back->pdev->dev,
5457 "Failed to reconfig rss for num_queues\n");
5460 vsi->reconfig_rss = false;
5462 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5463 ctxt.info.valid_sections |=
5464 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5465 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5468 /* Update the VSI after updating the VSI queue-mapping
5471 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5473 dev_info(&pf->pdev->dev,
5474 "Update vsi tc config failed, err %s aq_err %s\n",
5475 i40e_stat_str(hw, ret),
5476 i40e_aq_str(hw, hw->aq.asq_last_status));
5479 /* update the local VSI info with updated queue map */
5480 i40e_vsi_update_queue_map(vsi, &ctxt);
5481 vsi->info.valid_sections = 0;
5483 /* Update current VSI BW information */
5484 ret = i40e_vsi_get_bw_info(vsi);
5486 dev_info(&pf->pdev->dev,
5487 "Failed updating vsi bw info, err %s aq_err %s\n",
5488 i40e_stat_str(hw, ret),
5489 i40e_aq_str(hw, hw->aq.asq_last_status));
5493 /* Update the netdev TC setup */
5494 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5500 * i40e_get_link_speed - Returns link speed for the interface
5501 * @vsi: VSI to be configured
5504 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5506 struct i40e_pf *pf = vsi->back;
5508 switch (pf->hw.phy.link_info.link_speed) {
5509 case I40E_LINK_SPEED_40GB:
5511 case I40E_LINK_SPEED_25GB:
5513 case I40E_LINK_SPEED_20GB:
5515 case I40E_LINK_SPEED_10GB:
5517 case I40E_LINK_SPEED_1GB:
5525 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5526 * @vsi: VSI to be configured
5527 * @seid: seid of the channel/VSI
5528 * @max_tx_rate: max TX rate to be configured as BW limit
5530 * Helper function to set BW limit for a given VSI
5532 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5534 struct i40e_pf *pf = vsi->back;
5539 speed = i40e_get_link_speed(vsi);
5540 if (max_tx_rate > speed) {
5541 dev_err(&pf->pdev->dev,
5542 "Invalid max tx rate %llu specified for VSI seid %d.",
5546 if (max_tx_rate && max_tx_rate < 50) {
5547 dev_warn(&pf->pdev->dev,
5548 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5552 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5553 credits = max_tx_rate;
5554 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5555 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5556 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5558 dev_err(&pf->pdev->dev,
5559 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5560 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5561 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5566 * i40e_remove_queue_channels - Remove queue channels for the TCs
5567 * @vsi: VSI to be configured
5569 * Remove queue channels for the TCs
5571 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5573 enum i40e_admin_queue_err last_aq_status;
5574 struct i40e_cloud_filter *cfilter;
5575 struct i40e_channel *ch, *ch_tmp;
5576 struct i40e_pf *pf = vsi->back;
5577 struct hlist_node *node;
5580 /* Reset rss size that was stored when reconfiguring rss for
5581 * channel VSIs with non-power-of-2 queue count.
5583 vsi->current_rss_size = 0;
5585 /* perform cleanup for channels if they exist */
5586 if (list_empty(&vsi->ch_list))
5589 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5590 struct i40e_vsi *p_vsi;
5592 list_del(&ch->list);
5593 p_vsi = ch->parent_vsi;
5594 if (!p_vsi || !ch->initialized) {
5598 /* Reset queue contexts */
5599 for (i = 0; i < ch->num_queue_pairs; i++) {
5600 struct i40e_ring *tx_ring, *rx_ring;
5603 pf_q = ch->base_queue + i;
5604 tx_ring = vsi->tx_rings[pf_q];
5607 rx_ring = vsi->rx_rings[pf_q];
5611 /* Reset BW configured for this VSI via mqprio */
5612 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5614 dev_info(&vsi->back->pdev->dev,
5615 "Failed to reset tx rate for ch->seid %u\n",
5618 /* delete cloud filters associated with this channel */
5619 hlist_for_each_entry_safe(cfilter, node,
5620 &pf->cloud_filter_list, cloud_node) {
5621 if (cfilter->seid != ch->seid)
5624 hash_del(&cfilter->cloud_node);
5625 if (cfilter->dst_port)
5626 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5630 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5632 last_aq_status = pf->hw.aq.asq_last_status;
5634 dev_info(&pf->pdev->dev,
5635 "Failed to delete cloud filter, err %s aq_err %s\n",
5636 i40e_stat_str(&pf->hw, ret),
5637 i40e_aq_str(&pf->hw, last_aq_status));
5641 /* delete VSI from FW */
5642 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5645 dev_err(&vsi->back->pdev->dev,
5646 "unable to remove channel (%d) for parent VSI(%d)\n",
5647 ch->seid, p_vsi->seid);
5650 INIT_LIST_HEAD(&vsi->ch_list);
5654 * i40e_is_any_channel - channel exist or not
5655 * @vsi: ptr to VSI to which channels are associated with
5657 * Returns true or false if channel(s) exist for associated VSI or not
5659 static bool i40e_is_any_channel(struct i40e_vsi *vsi)
5661 struct i40e_channel *ch, *ch_tmp;
5663 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5664 if (ch->initialized)
5672 * i40e_get_max_queues_for_channel
5673 * @vsi: ptr to VSI to which channels are associated with
5675 * Helper function which returns max value among the queue counts set on the
5676 * channels/TCs created.
5678 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5680 struct i40e_channel *ch, *ch_tmp;
5683 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5684 if (!ch->initialized)
5686 if (ch->num_queue_pairs > max)
5687 max = ch->num_queue_pairs;
5694 * i40e_validate_num_queues - validate num_queues w.r.t channel
5695 * @pf: ptr to PF device
5696 * @num_queues: number of queues
5697 * @vsi: the parent VSI
5698 * @reconfig_rss: indicates should the RSS be reconfigured or not
5700 * This function validates number of queues in the context of new channel
5701 * which is being established and determines if RSS should be reconfigured
5702 * or not for parent VSI.
5704 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5705 struct i40e_vsi *vsi, bool *reconfig_rss)
5712 *reconfig_rss = false;
5713 if (vsi->current_rss_size) {
5714 if (num_queues > vsi->current_rss_size) {
5715 dev_dbg(&pf->pdev->dev,
5716 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5717 num_queues, vsi->current_rss_size);
5719 } else if ((num_queues < vsi->current_rss_size) &&
5720 (!is_power_of_2(num_queues))) {
5721 dev_dbg(&pf->pdev->dev,
5722 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5723 num_queues, vsi->current_rss_size);
5728 if (!is_power_of_2(num_queues)) {
5729 /* Find the max num_queues configured for channel if channel
5731 * if channel exist, then enforce 'num_queues' to be more than
5732 * max ever queues configured for channel.
5734 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5735 if (num_queues < max_ch_queues) {
5736 dev_dbg(&pf->pdev->dev,
5737 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5738 num_queues, max_ch_queues);
5741 *reconfig_rss = true;
5748 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5749 * @vsi: the VSI being setup
5750 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5752 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5754 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5756 struct i40e_pf *pf = vsi->back;
5757 u8 seed[I40E_HKEY_ARRAY_SIZE];
5758 struct i40e_hw *hw = &pf->hw;
5766 if (rss_size > vsi->rss_size)
5769 local_rss_size = min_t(int, vsi->rss_size, rss_size);
5770 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
5774 /* Ignoring user configured lut if there is one */
5775 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
5777 /* Use user configured hash key if there is one, otherwise
5780 if (vsi->rss_hkey_user)
5781 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
5783 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
5785 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
5787 dev_info(&pf->pdev->dev,
5788 "Cannot set RSS lut, err %s aq_err %s\n",
5789 i40e_stat_str(hw, ret),
5790 i40e_aq_str(hw, hw->aq.asq_last_status));
5796 /* Do the update w.r.t. storing rss_size */
5797 if (!vsi->orig_rss_size)
5798 vsi->orig_rss_size = vsi->rss_size;
5799 vsi->current_rss_size = local_rss_size;
5805 * i40e_channel_setup_queue_map - Setup a channel queue map
5806 * @pf: ptr to PF device
5807 * @vsi: the VSI being setup
5808 * @ctxt: VSI context structure
5809 * @ch: ptr to channel structure
5811 * Setup queue map for a specific channel
5813 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
5814 struct i40e_vsi_context *ctxt,
5815 struct i40e_channel *ch)
5817 u16 qcount, qmap, sections = 0;
5821 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
5822 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
5824 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
5825 ch->num_queue_pairs = qcount;
5827 /* find the next higher power-of-2 of num queue pairs */
5828 pow = ilog2(qcount);
5829 if (!is_power_of_2(qcount))
5832 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
5833 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
5835 /* Setup queue TC[0].qmap for given VSI context */
5836 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
5838 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
5839 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
5840 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
5841 ctxt->info.valid_sections |= cpu_to_le16(sections);
5845 * i40e_add_channel - add a channel by adding VSI
5846 * @pf: ptr to PF device
5847 * @uplink_seid: underlying HW switching element (VEB) ID
5848 * @ch: ptr to channel structure
5850 * Add a channel (VSI) using add_vsi and queue_map
5852 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
5853 struct i40e_channel *ch)
5855 struct i40e_hw *hw = &pf->hw;
5856 struct i40e_vsi_context ctxt;
5857 u8 enabled_tc = 0x1; /* TC0 enabled */
5860 if (ch->type != I40E_VSI_VMDQ2) {
5861 dev_info(&pf->pdev->dev,
5862 "add new vsi failed, ch->type %d\n", ch->type);
5866 memset(&ctxt, 0, sizeof(ctxt));
5867 ctxt.pf_num = hw->pf_id;
5869 ctxt.uplink_seid = uplink_seid;
5870 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5871 if (ch->type == I40E_VSI_VMDQ2)
5872 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
5874 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
5875 ctxt.info.valid_sections |=
5876 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
5877 ctxt.info.switch_id =
5878 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
5881 /* Set queue map for a given VSI context */
5882 i40e_channel_setup_queue_map(pf, &ctxt, ch);
5884 /* Now time to create VSI */
5885 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
5887 dev_info(&pf->pdev->dev,
5888 "add new vsi failed, err %s aq_err %s\n",
5889 i40e_stat_str(&pf->hw, ret),
5890 i40e_aq_str(&pf->hw,
5891 pf->hw.aq.asq_last_status));
5895 /* Success, update channel, set enabled_tc only if the channel
5898 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
5899 ch->seid = ctxt.seid;
5900 ch->vsi_number = ctxt.vsi_number;
5901 ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx);
5903 /* copy just the sections touched not the entire info
5904 * since not all sections are valid as returned by
5907 ch->info.mapping_flags = ctxt.info.mapping_flags;
5908 memcpy(&ch->info.queue_mapping,
5909 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
5910 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
5911 sizeof(ctxt.info.tc_mapping));
5916 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
5919 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5923 bw_data.tc_valid_bits = ch->enabled_tc;
5924 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5925 bw_data.tc_bw_credits[i] = bw_share[i];
5927 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
5930 dev_info(&vsi->back->pdev->dev,
5931 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
5932 vsi->back->hw.aq.asq_last_status, ch->seid);
5936 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5937 ch->info.qs_handle[i] = bw_data.qs_handles[i];
5943 * i40e_channel_config_tx_ring - config TX ring associated with new channel
5944 * @pf: ptr to PF device
5945 * @vsi: the VSI being setup
5946 * @ch: ptr to channel structure
5948 * Configure TX rings associated with channel (VSI) since queues are being
5951 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
5952 struct i40e_vsi *vsi,
5953 struct i40e_channel *ch)
5957 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5959 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5960 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5961 if (ch->enabled_tc & BIT(i))
5965 /* configure BW for new VSI */
5966 ret = i40e_channel_config_bw(vsi, ch, bw_share);
5968 dev_info(&vsi->back->pdev->dev,
5969 "Failed configuring TC map %d for channel (seid %u)\n",
5970 ch->enabled_tc, ch->seid);
5974 for (i = 0; i < ch->num_queue_pairs; i++) {
5975 struct i40e_ring *tx_ring, *rx_ring;
5978 pf_q = ch->base_queue + i;
5980 /* Get to TX ring ptr of main VSI, for re-setup TX queue
5983 tx_ring = vsi->tx_rings[pf_q];
5986 /* Get the RX ring ptr */
5987 rx_ring = vsi->rx_rings[pf_q];
5995 * i40e_setup_hw_channel - setup new channel
5996 * @pf: ptr to PF device
5997 * @vsi: the VSI being setup
5998 * @ch: ptr to channel structure
5999 * @uplink_seid: underlying HW switching element (VEB) ID
6000 * @type: type of channel to be created (VMDq2/VF)
6002 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6003 * and configures TX rings accordingly
6005 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6006 struct i40e_vsi *vsi,
6007 struct i40e_channel *ch,
6008 u16 uplink_seid, u8 type)
6012 ch->initialized = false;
6013 ch->base_queue = vsi->next_base_queue;
6016 /* Proceed with creation of channel (VMDq2) VSI */
6017 ret = i40e_add_channel(pf, uplink_seid, ch);
6019 dev_info(&pf->pdev->dev,
6020 "failed to add_channel using uplink_seid %u\n",
6025 /* Mark the successful creation of channel */
6026 ch->initialized = true;
6028 /* Reconfigure TX queues using QTX_CTL register */
6029 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6031 dev_info(&pf->pdev->dev,
6032 "failed to configure TX rings for channel %u\n",
6037 /* update 'next_base_queue' */
6038 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6039 dev_dbg(&pf->pdev->dev,
6040 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6041 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6042 ch->num_queue_pairs,
6043 vsi->next_base_queue);
6048 * i40e_setup_channel - setup new channel using uplink element
6049 * @pf: ptr to PF device
6050 * @type: type of channel to be created (VMDq2/VF)
6051 * @uplink_seid: underlying HW switching element (VEB) ID
6052 * @ch: ptr to channel structure
6054 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6055 * and uplink switching element (uplink_seid)
6057 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6058 struct i40e_channel *ch)
6064 if (vsi->type == I40E_VSI_MAIN) {
6065 vsi_type = I40E_VSI_VMDQ2;
6067 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6072 /* underlying switching element */
6073 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6075 /* create channel (VSI), configure TX rings */
6076 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6078 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6082 return ch->initialized ? true : false;
6086 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6087 * @vsi: ptr to VSI which has PF backing
6089 * Sets up switch mode correctly if it needs to be changed and perform
6090 * what are allowed modes.
6092 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6095 struct i40e_pf *pf = vsi->back;
6096 struct i40e_hw *hw = &pf->hw;
6099 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6103 if (hw->dev_caps.switch_mode) {
6104 /* if switch mode is set, support mode2 (non-tunneled for
6105 * cloud filter) for now
6107 u32 switch_mode = hw->dev_caps.switch_mode &
6108 I40E_SWITCH_MODE_MASK;
6109 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6110 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6112 dev_err(&pf->pdev->dev,
6113 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6114 hw->dev_caps.switch_mode);
6119 /* Set Bit 7 to be valid */
6120 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6122 /* Set L4type for TCP support */
6123 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6125 /* Set cloud filter mode */
6126 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6128 /* Prep mode field for set_switch_config */
6129 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6130 pf->last_sw_conf_valid_flags,
6132 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6133 dev_err(&pf->pdev->dev,
6134 "couldn't set switch config bits, err %s aq_err %s\n",
6135 i40e_stat_str(hw, ret),
6137 hw->aq.asq_last_status));
6143 * i40e_create_queue_channel - function to create channel
6144 * @vsi: VSI to be configured
6145 * @ch: ptr to channel (it contains channel specific params)
6147 * This function creates channel (VSI) using num_queues specified by user,
6148 * reconfigs RSS if needed.
6150 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6151 struct i40e_channel *ch)
6153 struct i40e_pf *pf = vsi->back;
6160 if (!ch->num_queue_pairs) {
6161 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6162 ch->num_queue_pairs);
6166 /* validate user requested num_queues for channel */
6167 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6170 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6171 ch->num_queue_pairs);
6175 /* By default we are in VEPA mode, if this is the first VF/VMDq
6176 * VSI to be added switch to VEB mode.
6178 if ((!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) ||
6179 (!i40e_is_any_channel(vsi))) {
6180 if (!is_power_of_2(vsi->tc_config.tc_info[0].qcount)) {
6181 dev_dbg(&pf->pdev->dev,
6182 "Failed to create channel. Override queues (%u) not power of 2\n",
6183 vsi->tc_config.tc_info[0].qcount);
6187 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6188 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6190 if (vsi->type == I40E_VSI_MAIN) {
6191 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6192 i40e_do_reset(pf, I40E_PF_RESET_FLAG,
6195 i40e_do_reset_safe(pf,
6196 I40E_PF_RESET_FLAG);
6199 /* now onwards for main VSI, number of queues will be value
6200 * of TC0's queue count
6204 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6205 * it should be more than num_queues
6207 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6208 dev_dbg(&pf->pdev->dev,
6209 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6210 vsi->cnt_q_avail, ch->num_queue_pairs);
6214 /* reconfig_rss only if vsi type is MAIN_VSI */
6215 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6216 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6218 dev_info(&pf->pdev->dev,
6219 "Error: unable to reconfig rss for num_queues (%u)\n",
6220 ch->num_queue_pairs);
6225 if (!i40e_setup_channel(pf, vsi, ch)) {
6226 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6230 dev_info(&pf->pdev->dev,
6231 "Setup channel (id:%u) utilizing num_queues %d\n",
6232 ch->seid, ch->num_queue_pairs);
6234 /* configure VSI for BW limit */
6235 if (ch->max_tx_rate) {
6236 u64 credits = ch->max_tx_rate;
6238 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6241 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6242 dev_dbg(&pf->pdev->dev,
6243 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6249 /* in case of VF, this will be main SRIOV VSI */
6250 ch->parent_vsi = vsi;
6252 /* and update main_vsi's count for queue_available to use */
6253 vsi->cnt_q_avail -= ch->num_queue_pairs;
6259 * i40e_configure_queue_channels - Add queue channel for the given TCs
6260 * @vsi: VSI to be configured
6262 * Configures queue channel mapping to the given TCs
6264 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6266 struct i40e_channel *ch;
6270 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6271 vsi->tc_seid_map[0] = vsi->seid;
6272 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6273 if (vsi->tc_config.enabled_tc & BIT(i)) {
6274 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6280 INIT_LIST_HEAD(&ch->list);
6281 ch->num_queue_pairs =
6282 vsi->tc_config.tc_info[i].qcount;
6284 vsi->tc_config.tc_info[i].qoffset;
6286 /* Bandwidth limit through tc interface is in bytes/s,
6289 max_rate = vsi->mqprio_qopt.max_rate[i];
6290 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6291 ch->max_tx_rate = max_rate;
6293 list_add_tail(&ch->list, &vsi->ch_list);
6295 ret = i40e_create_queue_channel(vsi, ch);
6297 dev_err(&vsi->back->pdev->dev,
6298 "Failed creating queue channel with TC%d: queues %d\n",
6299 i, ch->num_queue_pairs);
6302 vsi->tc_seid_map[i] = ch->seid;
6308 i40e_remove_queue_channels(vsi);
6313 * i40e_veb_config_tc - Configure TCs for given VEB
6315 * @enabled_tc: TC bitmap
6317 * Configures given TC bitmap for VEB (switching) element
6319 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6321 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6322 struct i40e_pf *pf = veb->pf;
6326 /* No TCs or already enabled TCs just return */
6327 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6330 bw_data.tc_valid_bits = enabled_tc;
6331 /* bw_data.absolute_credits is not set (relative) */
6333 /* Enable ETS TCs with equal BW Share for now */
6334 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6335 if (enabled_tc & BIT(i))
6336 bw_data.tc_bw_share_credits[i] = 1;
6339 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6342 dev_info(&pf->pdev->dev,
6343 "VEB bw config failed, err %s aq_err %s\n",
6344 i40e_stat_str(&pf->hw, ret),
6345 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6349 /* Update the BW information */
6350 ret = i40e_veb_get_bw_info(veb);
6352 dev_info(&pf->pdev->dev,
6353 "Failed getting veb bw config, err %s aq_err %s\n",
6354 i40e_stat_str(&pf->hw, ret),
6355 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6362 #ifdef CONFIG_I40E_DCB
6364 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6367 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6368 * the caller would've quiesce all the VSIs before calling
6371 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6377 /* Enable the TCs available on PF to all VEBs */
6378 tc_map = i40e_pf_get_tc_map(pf);
6379 for (v = 0; v < I40E_MAX_VEB; v++) {
6382 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6384 dev_info(&pf->pdev->dev,
6385 "Failed configuring TC for VEB seid=%d\n",
6387 /* Will try to configure as many components */
6391 /* Update each VSI */
6392 for (v = 0; v < pf->num_alloc_vsi; v++) {
6396 /* - Enable all TCs for the LAN VSI
6397 * - For all others keep them at TC0 for now
6399 if (v == pf->lan_vsi)
6400 tc_map = i40e_pf_get_tc_map(pf);
6402 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6404 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6406 dev_info(&pf->pdev->dev,
6407 "Failed configuring TC for VSI seid=%d\n",
6409 /* Will try to configure as many components */
6411 /* Re-configure VSI vectors based on updated TC map */
6412 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6413 if (pf->vsi[v]->netdev)
6414 i40e_dcbnl_set_all(pf->vsi[v]);
6420 * i40e_resume_port_tx - Resume port Tx
6423 * Resume a port's Tx and issue a PF reset in case of failure to
6426 static int i40e_resume_port_tx(struct i40e_pf *pf)
6428 struct i40e_hw *hw = &pf->hw;
6431 ret = i40e_aq_resume_port_tx(hw, NULL);
6433 dev_info(&pf->pdev->dev,
6434 "Resume Port Tx failed, err %s aq_err %s\n",
6435 i40e_stat_str(&pf->hw, ret),
6436 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6437 /* Schedule PF reset to recover */
6438 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6439 i40e_service_event_schedule(pf);
6446 * i40e_init_pf_dcb - Initialize DCB configuration
6447 * @pf: PF being configured
6449 * Query the current DCB configuration and cache it
6450 * in the hardware structure
6452 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6454 struct i40e_hw *hw = &pf->hw;
6457 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6458 * Also do not enable DCBx if FW LLDP agent is disabled
6460 if ((pf->hw_features & I40E_HW_NO_DCB_SUPPORT) ||
6461 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP)) {
6462 dev_info(&pf->pdev->dev, "DCB is not supported or FW LLDP is disabled\n");
6463 err = I40E_NOT_SUPPORTED;
6467 err = i40e_init_dcb(hw, true);
6469 /* Device/Function is not DCBX capable */
6470 if ((!hw->func_caps.dcb) ||
6471 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
6472 dev_info(&pf->pdev->dev,
6473 "DCBX offload is not supported or is disabled for this PF.\n");
6475 /* When status is not DISABLED then DCBX in FW */
6476 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
6477 DCB_CAP_DCBX_VER_IEEE;
6479 pf->flags |= I40E_FLAG_DCB_CAPABLE;
6480 /* Enable DCB tagging only when more than one TC
6481 * or explicitly disable if only one TC
6483 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
6484 pf->flags |= I40E_FLAG_DCB_ENABLED;
6486 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6487 dev_dbg(&pf->pdev->dev,
6488 "DCBX offload is supported for this PF.\n");
6490 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
6491 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
6492 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
6494 dev_info(&pf->pdev->dev,
6495 "Query for DCB configuration failed, err %s aq_err %s\n",
6496 i40e_stat_str(&pf->hw, err),
6497 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6503 #endif /* CONFIG_I40E_DCB */
6504 #define SPEED_SIZE 14
6507 * i40e_print_link_message - print link up or down
6508 * @vsi: the VSI for which link needs a message
6509 * @isup: true of link is up, false otherwise
6511 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
6513 enum i40e_aq_link_speed new_speed;
6514 struct i40e_pf *pf = vsi->back;
6515 char *speed = "Unknown";
6516 char *fc = "Unknown";
6522 new_speed = pf->hw.phy.link_info.link_speed;
6524 new_speed = I40E_LINK_SPEED_UNKNOWN;
6526 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
6528 vsi->current_isup = isup;
6529 vsi->current_speed = new_speed;
6531 netdev_info(vsi->netdev, "NIC Link is Down\n");
6535 /* Warn user if link speed on NPAR enabled partition is not at
6538 if (pf->hw.func_caps.npar_enable &&
6539 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
6540 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
6541 netdev_warn(vsi->netdev,
6542 "The partition detected link speed that is less than 10Gbps\n");
6544 switch (pf->hw.phy.link_info.link_speed) {
6545 case I40E_LINK_SPEED_40GB:
6548 case I40E_LINK_SPEED_20GB:
6551 case I40E_LINK_SPEED_25GB:
6554 case I40E_LINK_SPEED_10GB:
6557 case I40E_LINK_SPEED_5GB:
6560 case I40E_LINK_SPEED_2_5GB:
6563 case I40E_LINK_SPEED_1GB:
6566 case I40E_LINK_SPEED_100MB:
6573 switch (pf->hw.fc.current_mode) {
6577 case I40E_FC_TX_PAUSE:
6580 case I40E_FC_RX_PAUSE:
6588 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
6593 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
6596 if (pf->hw.phy.link_info.fec_info &
6597 I40E_AQ_CONFIG_FEC_KR_ENA)
6598 fec = "CL74 FC-FEC/BASE-R";
6599 else if (pf->hw.phy.link_info.fec_info &
6600 I40E_AQ_CONFIG_FEC_RS_ENA)
6601 fec = "CL108 RS-FEC";
6603 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
6604 * both RS and FC are requested
6606 if (vsi->back->hw.phy.link_info.req_fec_info &
6607 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
6608 if (vsi->back->hw.phy.link_info.req_fec_info &
6609 I40E_AQ_REQUEST_FEC_RS)
6610 req_fec = "CL108 RS-FEC";
6612 req_fec = "CL74 FC-FEC/BASE-R";
6614 netdev_info(vsi->netdev,
6615 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
6616 speed, req_fec, fec, an, fc);
6618 netdev_info(vsi->netdev,
6619 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
6626 * i40e_up_complete - Finish the last steps of bringing up a connection
6627 * @vsi: the VSI being configured
6629 static int i40e_up_complete(struct i40e_vsi *vsi)
6631 struct i40e_pf *pf = vsi->back;
6634 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6635 i40e_vsi_configure_msix(vsi);
6637 i40e_configure_msi_and_legacy(vsi);
6640 err = i40e_vsi_start_rings(vsi);
6644 clear_bit(__I40E_VSI_DOWN, vsi->state);
6645 i40e_napi_enable_all(vsi);
6646 i40e_vsi_enable_irq(vsi);
6648 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
6650 i40e_print_link_message(vsi, true);
6651 netif_tx_start_all_queues(vsi->netdev);
6652 netif_carrier_on(vsi->netdev);
6655 /* replay FDIR SB filters */
6656 if (vsi->type == I40E_VSI_FDIR) {
6657 /* reset fd counters */
6660 i40e_fdir_filter_restore(vsi);
6663 /* On the next run of the service_task, notify any clients of the new
6666 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6667 i40e_service_event_schedule(pf);
6673 * i40e_vsi_reinit_locked - Reset the VSI
6674 * @vsi: the VSI being configured
6676 * Rebuild the ring structs after some configuration
6677 * has changed, e.g. MTU size.
6679 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
6681 struct i40e_pf *pf = vsi->back;
6683 WARN_ON(in_interrupt());
6684 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
6685 usleep_range(1000, 2000);
6689 clear_bit(__I40E_CONFIG_BUSY, pf->state);
6693 * i40e_up - Bring the connection back up after being down
6694 * @vsi: the VSI being configured
6696 int i40e_up(struct i40e_vsi *vsi)
6700 err = i40e_vsi_configure(vsi);
6702 err = i40e_up_complete(vsi);
6708 * i40e_force_link_state - Force the link status
6709 * @pf: board private structure
6710 * @is_up: whether the link state should be forced up or down
6712 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
6714 struct i40e_aq_get_phy_abilities_resp abilities;
6715 struct i40e_aq_set_phy_config config = {0};
6716 struct i40e_hw *hw = &pf->hw;
6721 /* Card might've been put in an unstable state by other drivers
6722 * and applications, which causes incorrect speed values being
6723 * set on startup. In order to clear speed registers, we call
6724 * get_phy_capabilities twice, once to get initial state of
6725 * available speeds, and once to get current PHY config.
6727 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
6730 dev_err(&pf->pdev->dev,
6731 "failed to get phy cap., ret = %s last_status = %s\n",
6732 i40e_stat_str(hw, err),
6733 i40e_aq_str(hw, hw->aq.asq_last_status));
6736 speed = abilities.link_speed;
6738 /* Get the current phy config */
6739 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
6742 dev_err(&pf->pdev->dev,
6743 "failed to get phy cap., ret = %s last_status = %s\n",
6744 i40e_stat_str(hw, err),
6745 i40e_aq_str(hw, hw->aq.asq_last_status));
6749 /* If link needs to go up, but was not forced to go down,
6750 * and its speed values are OK, no need for a flap
6752 if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
6753 return I40E_SUCCESS;
6755 /* To force link we need to set bits for all supported PHY types,
6756 * but there are now more than 32, so we need to split the bitmap
6757 * across two fields.
6759 mask = I40E_PHY_TYPES_BITMASK;
6760 config.phy_type = is_up ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
6761 config.phy_type_ext = is_up ? (u8)((mask >> 32) & 0xff) : 0;
6762 /* Copy the old settings, except of phy_type */
6763 config.abilities = abilities.abilities;
6764 if (abilities.link_speed != 0)
6765 config.link_speed = abilities.link_speed;
6767 config.link_speed = speed;
6768 config.eee_capability = abilities.eee_capability;
6769 config.eeer = abilities.eeer_val;
6770 config.low_power_ctrl = abilities.d3_lpan;
6771 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
6772 I40E_AQ_PHY_FEC_CONFIG_MASK;
6773 err = i40e_aq_set_phy_config(hw, &config, NULL);
6776 dev_err(&pf->pdev->dev,
6777 "set phy config ret = %s last_status = %s\n",
6778 i40e_stat_str(&pf->hw, err),
6779 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6783 /* Update the link info */
6784 err = i40e_update_link_info(hw);
6786 /* Wait a little bit (on 40G cards it sometimes takes a really
6787 * long time for link to come back from the atomic reset)
6791 i40e_update_link_info(hw);
6794 i40e_aq_set_link_restart_an(hw, true, NULL);
6796 return I40E_SUCCESS;
6800 * i40e_down - Shutdown the connection processing
6801 * @vsi: the VSI being stopped
6803 void i40e_down(struct i40e_vsi *vsi)
6807 /* It is assumed that the caller of this function
6808 * sets the vsi->state __I40E_VSI_DOWN bit.
6811 netif_carrier_off(vsi->netdev);
6812 netif_tx_disable(vsi->netdev);
6814 i40e_vsi_disable_irq(vsi);
6815 i40e_vsi_stop_rings(vsi);
6816 if (vsi->type == I40E_VSI_MAIN &&
6817 vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED)
6818 i40e_force_link_state(vsi->back, false);
6819 i40e_napi_disable_all(vsi);
6821 for (i = 0; i < vsi->num_queue_pairs; i++) {
6822 i40e_clean_tx_ring(vsi->tx_rings[i]);
6823 if (i40e_enabled_xdp_vsi(vsi)) {
6824 /* Make sure that in-progress ndo_xdp_xmit and
6825 * ndo_xsk_wakeup calls are completed.
6828 i40e_clean_tx_ring(vsi->xdp_rings[i]);
6830 i40e_clean_rx_ring(vsi->rx_rings[i]);
6836 * i40e_validate_mqprio_qopt- validate queue mapping info
6837 * @vsi: the VSI being configured
6838 * @mqprio_qopt: queue parametrs
6840 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
6841 struct tc_mqprio_qopt_offload *mqprio_qopt)
6843 u64 sum_max_rate = 0;
6847 if (mqprio_qopt->qopt.offset[0] != 0 ||
6848 mqprio_qopt->qopt.num_tc < 1 ||
6849 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
6851 for (i = 0; ; i++) {
6852 if (!mqprio_qopt->qopt.count[i])
6854 if (mqprio_qopt->min_rate[i]) {
6855 dev_err(&vsi->back->pdev->dev,
6856 "Invalid min tx rate (greater than 0) specified\n");
6859 max_rate = mqprio_qopt->max_rate[i];
6860 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6861 sum_max_rate += max_rate;
6863 if (i >= mqprio_qopt->qopt.num_tc - 1)
6865 if (mqprio_qopt->qopt.offset[i + 1] !=
6866 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
6869 if (vsi->num_queue_pairs <
6870 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
6873 if (sum_max_rate > i40e_get_link_speed(vsi)) {
6874 dev_err(&vsi->back->pdev->dev,
6875 "Invalid max tx rate specified\n");
6882 * i40e_vsi_set_default_tc_config - set default values for tc configuration
6883 * @vsi: the VSI being configured
6885 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
6890 /* Only TC0 is enabled */
6891 vsi->tc_config.numtc = 1;
6892 vsi->tc_config.enabled_tc = 1;
6893 qcount = min_t(int, vsi->alloc_queue_pairs,
6894 i40e_pf_get_max_q_per_tc(vsi->back));
6895 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6896 /* For the TC that is not enabled set the offset to to default
6897 * queue and allocate one queue for the given TC.
6899 vsi->tc_config.tc_info[i].qoffset = 0;
6901 vsi->tc_config.tc_info[i].qcount = qcount;
6903 vsi->tc_config.tc_info[i].qcount = 1;
6904 vsi->tc_config.tc_info[i].netdev_tc = 0;
6909 * i40e_del_macvlan_filter
6910 * @hw: pointer to the HW structure
6911 * @seid: seid of the channel VSI
6912 * @macaddr: the mac address to apply as a filter
6913 * @aq_err: store the admin Q error
6915 * This function deletes a mac filter on the channel VSI which serves as the
6916 * macvlan. Returns 0 on success.
6918 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
6919 const u8 *macaddr, int *aq_err)
6921 struct i40e_aqc_remove_macvlan_element_data element;
6924 memset(&element, 0, sizeof(element));
6925 ether_addr_copy(element.mac_addr, macaddr);
6926 element.vlan_tag = 0;
6927 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
6928 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
6929 *aq_err = hw->aq.asq_last_status;
6935 * i40e_add_macvlan_filter
6936 * @hw: pointer to the HW structure
6937 * @seid: seid of the channel VSI
6938 * @macaddr: the mac address to apply as a filter
6939 * @aq_err: store the admin Q error
6941 * This function adds a mac filter on the channel VSI which serves as the
6942 * macvlan. Returns 0 on success.
6944 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
6945 const u8 *macaddr, int *aq_err)
6947 struct i40e_aqc_add_macvlan_element_data element;
6951 ether_addr_copy(element.mac_addr, macaddr);
6952 element.vlan_tag = 0;
6953 element.queue_number = 0;
6954 element.match_method = I40E_AQC_MM_ERR_NO_RES;
6955 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
6956 element.flags = cpu_to_le16(cmd_flags);
6957 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
6958 *aq_err = hw->aq.asq_last_status;
6964 * i40e_reset_ch_rings - Reset the queue contexts in a channel
6965 * @vsi: the VSI we want to access
6966 * @ch: the channel we want to access
6968 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
6970 struct i40e_ring *tx_ring, *rx_ring;
6974 for (i = 0; i < ch->num_queue_pairs; i++) {
6975 pf_q = ch->base_queue + i;
6976 tx_ring = vsi->tx_rings[pf_q];
6978 rx_ring = vsi->rx_rings[pf_q];
6984 * i40e_free_macvlan_channels
6985 * @vsi: the VSI we want to access
6987 * This function frees the Qs of the channel VSI from
6988 * the stack and also deletes the channel VSIs which
6989 * serve as macvlans.
6991 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
6993 struct i40e_channel *ch, *ch_tmp;
6996 if (list_empty(&vsi->macvlan_list))
6999 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7000 struct i40e_vsi *parent_vsi;
7002 if (i40e_is_channel_macvlan(ch)) {
7003 i40e_reset_ch_rings(vsi, ch);
7004 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7005 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7006 netdev_set_sb_channel(ch->fwd->netdev, 0);
7011 list_del(&ch->list);
7012 parent_vsi = ch->parent_vsi;
7013 if (!parent_vsi || !ch->initialized) {
7018 /* remove the VSI */
7019 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7022 dev_err(&vsi->back->pdev->dev,
7023 "unable to remove channel (%d) for parent VSI(%d)\n",
7024 ch->seid, parent_vsi->seid);
7027 vsi->macvlan_cnt = 0;
7031 * i40e_fwd_ring_up - bring the macvlan device up
7032 * @vsi: the VSI we want to access
7033 * @vdev: macvlan netdevice
7034 * @fwd: the private fwd structure
7036 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7037 struct i40e_fwd_adapter *fwd)
7039 int ret = 0, num_tc = 1, i, aq_err;
7040 struct i40e_channel *ch, *ch_tmp;
7041 struct i40e_pf *pf = vsi->back;
7042 struct i40e_hw *hw = &pf->hw;
7044 if (list_empty(&vsi->macvlan_list))
7047 /* Go through the list and find an available channel */
7048 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7049 if (!i40e_is_channel_macvlan(ch)) {
7051 /* record configuration for macvlan interface in vdev */
7052 for (i = 0; i < num_tc; i++)
7053 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7055 ch->num_queue_pairs,
7057 for (i = 0; i < ch->num_queue_pairs; i++) {
7058 struct i40e_ring *tx_ring, *rx_ring;
7061 pf_q = ch->base_queue + i;
7063 /* Get to TX ring ptr */
7064 tx_ring = vsi->tx_rings[pf_q];
7067 /* Get the RX ring ptr */
7068 rx_ring = vsi->rx_rings[pf_q];
7075 /* Guarantee all rings are updated before we update the
7076 * MAC address filter.
7080 /* Add a mac filter */
7081 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7083 /* if we cannot add the MAC rule then disable the offload */
7084 macvlan_release_l2fw_offload(vdev);
7085 for (i = 0; i < ch->num_queue_pairs; i++) {
7086 struct i40e_ring *rx_ring;
7089 pf_q = ch->base_queue + i;
7090 rx_ring = vsi->rx_rings[pf_q];
7091 rx_ring->netdev = NULL;
7093 dev_info(&pf->pdev->dev,
7094 "Error adding mac filter on macvlan err %s, aq_err %s\n",
7095 i40e_stat_str(hw, ret),
7096 i40e_aq_str(hw, aq_err));
7097 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7104 * i40e_setup_macvlans - create the channels which will be macvlans
7105 * @vsi: the VSI we want to access
7106 * @macvlan_cnt: no. of macvlans to be setup
7107 * @qcnt: no. of Qs per macvlan
7108 * @vdev: macvlan netdevice
7110 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7111 struct net_device *vdev)
7113 struct i40e_pf *pf = vsi->back;
7114 struct i40e_hw *hw = &pf->hw;
7115 struct i40e_vsi_context ctxt;
7116 u16 sections, qmap, num_qps;
7117 struct i40e_channel *ch;
7118 int i, pow, ret = 0;
7121 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7124 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7126 /* find the next higher power-of-2 of num queue pairs */
7127 pow = fls(roundup_pow_of_two(num_qps) - 1);
7129 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7130 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7132 /* Setup context bits for the main VSI */
7133 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7134 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7135 memset(&ctxt, 0, sizeof(ctxt));
7136 ctxt.seid = vsi->seid;
7137 ctxt.pf_num = vsi->back->hw.pf_id;
7139 ctxt.uplink_seid = vsi->uplink_seid;
7140 ctxt.info = vsi->info;
7141 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7142 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7143 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7144 ctxt.info.valid_sections |= cpu_to_le16(sections);
7146 /* Reconfigure RSS for main VSI with new max queue count */
7147 vsi->rss_size = max_t(u16, num_qps, qcnt);
7148 ret = i40e_vsi_config_rss(vsi);
7150 dev_info(&pf->pdev->dev,
7151 "Failed to reconfig RSS for num_queues (%u)\n",
7155 vsi->reconfig_rss = true;
7156 dev_dbg(&vsi->back->pdev->dev,
7157 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7158 vsi->next_base_queue = num_qps;
7159 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7161 /* Update the VSI after updating the VSI queue-mapping
7164 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7166 dev_info(&pf->pdev->dev,
7167 "Update vsi tc config failed, err %s aq_err %s\n",
7168 i40e_stat_str(hw, ret),
7169 i40e_aq_str(hw, hw->aq.asq_last_status));
7172 /* update the local VSI info with updated queue map */
7173 i40e_vsi_update_queue_map(vsi, &ctxt);
7174 vsi->info.valid_sections = 0;
7176 /* Create channels for macvlans */
7177 INIT_LIST_HEAD(&vsi->macvlan_list);
7178 for (i = 0; i < macvlan_cnt; i++) {
7179 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7184 INIT_LIST_HEAD(&ch->list);
7185 ch->num_queue_pairs = qcnt;
7186 if (!i40e_setup_channel(pf, vsi, ch)) {
7191 ch->parent_vsi = vsi;
7192 vsi->cnt_q_avail -= ch->num_queue_pairs;
7194 list_add_tail(&ch->list, &vsi->macvlan_list);
7200 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7201 i40e_free_macvlan_channels(vsi);
7207 * i40e_fwd_add - configure macvlans
7208 * @netdev: net device to configure
7209 * @vdev: macvlan netdevice
7211 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7213 struct i40e_netdev_priv *np = netdev_priv(netdev);
7214 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7215 struct i40e_vsi *vsi = np->vsi;
7216 struct i40e_pf *pf = vsi->back;
7217 struct i40e_fwd_adapter *fwd;
7218 int avail_macvlan, ret;
7220 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7221 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7222 return ERR_PTR(-EINVAL);
7224 if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7225 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7226 return ERR_PTR(-EINVAL);
7228 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7229 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7230 return ERR_PTR(-EINVAL);
7233 /* The macvlan device has to be a single Q device so that the
7234 * tc_to_txq field can be reused to pick the tx queue.
7236 if (netif_is_multiqueue(vdev))
7237 return ERR_PTR(-ERANGE);
7239 if (!vsi->macvlan_cnt) {
7240 /* reserve bit 0 for the pf device */
7241 set_bit(0, vsi->fwd_bitmask);
7243 /* Try to reserve as many queues as possible for macvlans. First
7244 * reserve 3/4th of max vectors, then half, then quarter and
7245 * calculate Qs per macvlan as you go
7247 vectors = pf->num_lan_msix;
7248 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7249 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7251 macvlan_cnt = (vectors - 32) / 4;
7252 } else if (vectors <= 64 && vectors > 32) {
7253 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7255 macvlan_cnt = (vectors - 16) / 2;
7256 } else if (vectors <= 32 && vectors > 16) {
7257 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7259 macvlan_cnt = vectors - 16;
7260 } else if (vectors <= 16 && vectors > 8) {
7261 /* allocate 1 Q per macvlan and 8 Qs to the PF */
7263 macvlan_cnt = vectors - 8;
7265 /* allocate 1 Q per macvlan and 1 Q to the PF */
7267 macvlan_cnt = vectors - 1;
7270 if (macvlan_cnt == 0)
7271 return ERR_PTR(-EBUSY);
7273 /* Quiesce VSI queues */
7274 i40e_quiesce_vsi(vsi);
7276 /* sets up the macvlans but does not "enable" them */
7277 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7280 return ERR_PTR(ret);
7283 i40e_unquiesce_vsi(vsi);
7285 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7287 if (avail_macvlan >= I40E_MAX_MACVLANS)
7288 return ERR_PTR(-EBUSY);
7290 /* create the fwd struct */
7291 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7293 return ERR_PTR(-ENOMEM);
7295 set_bit(avail_macvlan, vsi->fwd_bitmask);
7296 fwd->bit_no = avail_macvlan;
7297 netdev_set_sb_channel(vdev, avail_macvlan);
7300 if (!netif_running(netdev))
7303 /* Set fwd ring up */
7304 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7306 /* unbind the queues and drop the subordinate channel config */
7307 netdev_unbind_sb_channel(netdev, vdev);
7308 netdev_set_sb_channel(vdev, 0);
7311 return ERR_PTR(-EINVAL);
7318 * i40e_del_all_macvlans - Delete all the mac filters on the channels
7319 * @vsi: the VSI we want to access
7321 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7323 struct i40e_channel *ch, *ch_tmp;
7324 struct i40e_pf *pf = vsi->back;
7325 struct i40e_hw *hw = &pf->hw;
7326 int aq_err, ret = 0;
7328 if (list_empty(&vsi->macvlan_list))
7331 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7332 if (i40e_is_channel_macvlan(ch)) {
7333 ret = i40e_del_macvlan_filter(hw, ch->seid,
7334 i40e_channel_mac(ch),
7337 /* Reset queue contexts */
7338 i40e_reset_ch_rings(vsi, ch);
7339 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7340 netdev_unbind_sb_channel(vsi->netdev,
7342 netdev_set_sb_channel(ch->fwd->netdev, 0);
7351 * i40e_fwd_del - delete macvlan interfaces
7352 * @netdev: net device to configure
7353 * @vdev: macvlan netdevice
7355 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7357 struct i40e_netdev_priv *np = netdev_priv(netdev);
7358 struct i40e_fwd_adapter *fwd = vdev;
7359 struct i40e_channel *ch, *ch_tmp;
7360 struct i40e_vsi *vsi = np->vsi;
7361 struct i40e_pf *pf = vsi->back;
7362 struct i40e_hw *hw = &pf->hw;
7363 int aq_err, ret = 0;
7365 /* Find the channel associated with the macvlan and del mac filter */
7366 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7367 if (i40e_is_channel_macvlan(ch) &&
7368 ether_addr_equal(i40e_channel_mac(ch),
7369 fwd->netdev->dev_addr)) {
7370 ret = i40e_del_macvlan_filter(hw, ch->seid,
7371 i40e_channel_mac(ch),
7374 /* Reset queue contexts */
7375 i40e_reset_ch_rings(vsi, ch);
7376 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7377 netdev_unbind_sb_channel(netdev, fwd->netdev);
7378 netdev_set_sb_channel(fwd->netdev, 0);
7382 dev_info(&pf->pdev->dev,
7383 "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7384 i40e_stat_str(hw, ret),
7385 i40e_aq_str(hw, aq_err));
7393 * i40e_setup_tc - configure multiple traffic classes
7394 * @netdev: net device to configure
7395 * @type_data: tc offload data
7397 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7399 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7400 struct i40e_netdev_priv *np = netdev_priv(netdev);
7401 struct i40e_vsi *vsi = np->vsi;
7402 struct i40e_pf *pf = vsi->back;
7403 u8 enabled_tc = 0, num_tc, hw;
7404 bool need_reset = false;
7405 int old_queue_pairs;
7410 old_queue_pairs = vsi->num_queue_pairs;
7411 num_tc = mqprio_qopt->qopt.num_tc;
7412 hw = mqprio_qopt->qopt.hw;
7413 mode = mqprio_qopt->mode;
7415 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7416 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
7420 /* Check if MFP enabled */
7421 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7423 "Configuring TC not supported in MFP mode\n");
7427 case TC_MQPRIO_MODE_DCB:
7428 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
7430 /* Check if DCB enabled to continue */
7431 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7433 "DCB is not enabled for adapter\n");
7437 /* Check whether tc count is within enabled limit */
7438 if (num_tc > i40e_pf_get_num_tc(pf)) {
7440 "TC count greater than enabled on link for adapter\n");
7444 case TC_MQPRIO_MODE_CHANNEL:
7445 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
7447 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
7450 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7452 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
7455 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
7456 sizeof(*mqprio_qopt));
7457 pf->flags |= I40E_FLAG_TC_MQPRIO;
7458 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7465 /* Generate TC map for number of tc requested */
7466 for (i = 0; i < num_tc; i++)
7467 enabled_tc |= BIT(i);
7469 /* Requesting same TC configuration as already enabled */
7470 if (enabled_tc == vsi->tc_config.enabled_tc &&
7471 mode != TC_MQPRIO_MODE_CHANNEL)
7474 /* Quiesce VSI queues */
7475 i40e_quiesce_vsi(vsi);
7477 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
7478 i40e_remove_queue_channels(vsi);
7480 /* Configure VSI for enabled TCs */
7481 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7483 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
7488 dev_info(&vsi->back->pdev->dev,
7489 "Setup channel (id:%u) utilizing num_queues %d\n",
7490 vsi->seid, vsi->tc_config.tc_info[0].qcount);
7493 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
7494 if (vsi->mqprio_qopt.max_rate[0]) {
7495 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
7497 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
7498 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
7500 u64 credits = max_tx_rate;
7502 do_div(credits, I40E_BW_CREDIT_DIVISOR);
7503 dev_dbg(&vsi->back->pdev->dev,
7504 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
7513 ret = i40e_configure_queue_channels(vsi);
7515 vsi->num_queue_pairs = old_queue_pairs;
7517 "Failed configuring queue channels\n");
7524 /* Reset the configuration data to defaults, only TC0 is enabled */
7526 i40e_vsi_set_default_tc_config(vsi);
7531 i40e_unquiesce_vsi(vsi);
7536 * i40e_set_cld_element - sets cloud filter element data
7537 * @filter: cloud filter rule
7538 * @cld: ptr to cloud filter element data
7540 * This is helper function to copy data into cloud filter element
7543 i40e_set_cld_element(struct i40e_cloud_filter *filter,
7544 struct i40e_aqc_cloud_filters_element_data *cld)
7549 memset(cld, 0, sizeof(*cld));
7550 ether_addr_copy(cld->outer_mac, filter->dst_mac);
7551 ether_addr_copy(cld->inner_mac, filter->src_mac);
7553 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
7556 if (filter->n_proto == ETH_P_IPV6) {
7557 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
7558 for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);
7560 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
7561 ipa = cpu_to_le32(ipa);
7562 memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));
7565 ipa = be32_to_cpu(filter->dst_ipv4);
7566 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
7569 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
7571 /* tenant_id is not supported by FW now, once the support is enabled
7572 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
7574 if (filter->tenant_id)
7579 * i40e_add_del_cloud_filter - Add/del cloud filter
7580 * @vsi: pointer to VSI
7581 * @filter: cloud filter rule
7582 * @add: if true, add, if false, delete
7584 * Add or delete a cloud filter for a specific flow spec.
7585 * Returns 0 if the filter were successfully added.
7587 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
7588 struct i40e_cloud_filter *filter, bool add)
7590 struct i40e_aqc_cloud_filters_element_data cld_filter;
7591 struct i40e_pf *pf = vsi->back;
7593 static const u16 flag_table[128] = {
7594 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
7595 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
7596 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
7597 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
7598 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
7599 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
7600 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
7601 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
7602 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
7603 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
7604 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
7605 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
7606 [I40E_CLOUD_FILTER_FLAGS_IIP] =
7607 I40E_AQC_ADD_CLOUD_FILTER_IIP,
7610 if (filter->flags >= ARRAY_SIZE(flag_table))
7611 return I40E_ERR_CONFIG;
7613 /* copy element needed to add cloud filter from filter */
7614 i40e_set_cld_element(filter, &cld_filter);
7616 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
7617 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
7618 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
7620 if (filter->n_proto == ETH_P_IPV6)
7621 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
7622 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7624 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
7625 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7628 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
7631 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
7634 dev_dbg(&pf->pdev->dev,
7635 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
7636 add ? "add" : "delete", filter->dst_port, ret,
7637 pf->hw.aq.asq_last_status);
7639 dev_info(&pf->pdev->dev,
7640 "%s cloud filter for VSI: %d\n",
7641 add ? "Added" : "Deleted", filter->seid);
7646 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
7647 * @vsi: pointer to VSI
7648 * @filter: cloud filter rule
7649 * @add: if true, add, if false, delete
7651 * Add or delete a cloud filter for a specific flow spec using big buffer.
7652 * Returns 0 if the filter were successfully added.
7654 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
7655 struct i40e_cloud_filter *filter,
7658 struct i40e_aqc_cloud_filters_element_bb cld_filter;
7659 struct i40e_pf *pf = vsi->back;
7662 /* Both (src/dst) valid mac_addr are not supported */
7663 if ((is_valid_ether_addr(filter->dst_mac) &&
7664 is_valid_ether_addr(filter->src_mac)) ||
7665 (is_multicast_ether_addr(filter->dst_mac) &&
7666 is_multicast_ether_addr(filter->src_mac)))
7669 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
7670 * ports are not supported via big buffer now.
7672 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
7675 /* adding filter using src_port/src_ip is not supported at this stage */
7676 if (filter->src_port || filter->src_ipv4 ||
7677 !ipv6_addr_any(&filter->ip.v6.src_ip6))
7680 /* copy element needed to add cloud filter from filter */
7681 i40e_set_cld_element(filter, &cld_filter.element);
7683 if (is_valid_ether_addr(filter->dst_mac) ||
7684 is_valid_ether_addr(filter->src_mac) ||
7685 is_multicast_ether_addr(filter->dst_mac) ||
7686 is_multicast_ether_addr(filter->src_mac)) {
7687 /* MAC + IP : unsupported mode */
7688 if (filter->dst_ipv4)
7691 /* since we validated that L4 port must be valid before
7692 * we get here, start with respective "flags" value
7693 * and update if vlan is present or not
7695 cld_filter.element.flags =
7696 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
7698 if (filter->vlan_id) {
7699 cld_filter.element.flags =
7700 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
7703 } else if (filter->dst_ipv4 ||
7704 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
7705 cld_filter.element.flags =
7706 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
7707 if (filter->n_proto == ETH_P_IPV6)
7708 cld_filter.element.flags |=
7709 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
7711 cld_filter.element.flags |=
7712 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
7714 dev_err(&pf->pdev->dev,
7715 "either mac or ip has to be valid for cloud filter\n");
7719 /* Now copy L4 port in Byte 6..7 in general fields */
7720 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
7721 be16_to_cpu(filter->dst_port);
7724 /* Validate current device switch mode, change if necessary */
7725 ret = i40e_validate_and_set_switch_mode(vsi);
7727 dev_err(&pf->pdev->dev,
7728 "failed to set switch mode, ret %d\n",
7733 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
7736 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
7741 dev_dbg(&pf->pdev->dev,
7742 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
7743 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
7745 dev_info(&pf->pdev->dev,
7746 "%s cloud filter for VSI: %d, L4 port: %d\n",
7747 add ? "add" : "delete", filter->seid,
7748 ntohs(filter->dst_port));
7753 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
7754 * @vsi: Pointer to VSI
7755 * @cls_flower: Pointer to struct flow_cls_offload
7756 * @filter: Pointer to cloud filter structure
7759 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
7760 struct flow_cls_offload *f,
7761 struct i40e_cloud_filter *filter)
7763 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
7764 struct flow_dissector *dissector = rule->match.dissector;
7765 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
7766 struct i40e_pf *pf = vsi->back;
7769 if (dissector->used_keys &
7770 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
7771 BIT(FLOW_DISSECTOR_KEY_BASIC) |
7772 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
7773 BIT(FLOW_DISSECTOR_KEY_VLAN) |
7774 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
7775 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
7776 BIT(FLOW_DISSECTOR_KEY_PORTS) |
7777 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
7778 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
7779 dissector->used_keys);
7783 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
7784 struct flow_match_enc_keyid match;
7786 flow_rule_match_enc_keyid(rule, &match);
7787 if (match.mask->keyid != 0)
7788 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
7790 filter->tenant_id = be32_to_cpu(match.key->keyid);
7793 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
7794 struct flow_match_basic match;
7796 flow_rule_match_basic(rule, &match);
7797 n_proto_key = ntohs(match.key->n_proto);
7798 n_proto_mask = ntohs(match.mask->n_proto);
7800 if (n_proto_key == ETH_P_ALL) {
7804 filter->n_proto = n_proto_key & n_proto_mask;
7805 filter->ip_proto = match.key->ip_proto;
7808 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
7809 struct flow_match_eth_addrs match;
7811 flow_rule_match_eth_addrs(rule, &match);
7813 /* use is_broadcast and is_zero to check for all 0xf or 0 */
7814 if (!is_zero_ether_addr(match.mask->dst)) {
7815 if (is_broadcast_ether_addr(match.mask->dst)) {
7816 field_flags |= I40E_CLOUD_FIELD_OMAC;
7818 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
7820 return I40E_ERR_CONFIG;
7824 if (!is_zero_ether_addr(match.mask->src)) {
7825 if (is_broadcast_ether_addr(match.mask->src)) {
7826 field_flags |= I40E_CLOUD_FIELD_IMAC;
7828 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
7830 return I40E_ERR_CONFIG;
7833 ether_addr_copy(filter->dst_mac, match.key->dst);
7834 ether_addr_copy(filter->src_mac, match.key->src);
7837 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
7838 struct flow_match_vlan match;
7840 flow_rule_match_vlan(rule, &match);
7841 if (match.mask->vlan_id) {
7842 if (match.mask->vlan_id == VLAN_VID_MASK) {
7843 field_flags |= I40E_CLOUD_FIELD_IVLAN;
7846 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
7847 match.mask->vlan_id);
7848 return I40E_ERR_CONFIG;
7852 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
7855 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
7856 struct flow_match_control match;
7858 flow_rule_match_control(rule, &match);
7859 addr_type = match.key->addr_type;
7862 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
7863 struct flow_match_ipv4_addrs match;
7865 flow_rule_match_ipv4_addrs(rule, &match);
7866 if (match.mask->dst) {
7867 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
7868 field_flags |= I40E_CLOUD_FIELD_IIP;
7870 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
7872 return I40E_ERR_CONFIG;
7876 if (match.mask->src) {
7877 if (match.mask->src == cpu_to_be32(0xffffffff)) {
7878 field_flags |= I40E_CLOUD_FIELD_IIP;
7880 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
7882 return I40E_ERR_CONFIG;
7886 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
7887 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
7888 return I40E_ERR_CONFIG;
7890 filter->dst_ipv4 = match.key->dst;
7891 filter->src_ipv4 = match.key->src;
7894 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
7895 struct flow_match_ipv6_addrs match;
7897 flow_rule_match_ipv6_addrs(rule, &match);
7899 /* src and dest IPV6 address should not be LOOPBACK
7900 * (0:0:0:0:0:0:0:1), which can be represented as ::1
7902 if (ipv6_addr_loopback(&match.key->dst) ||
7903 ipv6_addr_loopback(&match.key->src)) {
7904 dev_err(&pf->pdev->dev,
7905 "Bad ipv6, addr is LOOPBACK\n");
7906 return I40E_ERR_CONFIG;
7908 if (!ipv6_addr_any(&match.mask->dst) ||
7909 !ipv6_addr_any(&match.mask->src))
7910 field_flags |= I40E_CLOUD_FIELD_IIP;
7912 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
7913 sizeof(filter->src_ipv6));
7914 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
7915 sizeof(filter->dst_ipv6));
7918 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
7919 struct flow_match_ports match;
7921 flow_rule_match_ports(rule, &match);
7922 if (match.mask->src) {
7923 if (match.mask->src == cpu_to_be16(0xffff)) {
7924 field_flags |= I40E_CLOUD_FIELD_IIP;
7926 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
7927 be16_to_cpu(match.mask->src));
7928 return I40E_ERR_CONFIG;
7932 if (match.mask->dst) {
7933 if (match.mask->dst == cpu_to_be16(0xffff)) {
7934 field_flags |= I40E_CLOUD_FIELD_IIP;
7936 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
7937 be16_to_cpu(match.mask->dst));
7938 return I40E_ERR_CONFIG;
7942 filter->dst_port = match.key->dst;
7943 filter->src_port = match.key->src;
7945 switch (filter->ip_proto) {
7950 dev_err(&pf->pdev->dev,
7951 "Only UDP and TCP transport are supported\n");
7955 filter->flags = field_flags;
7960 * i40e_handle_tclass: Forward to a traffic class on the device
7961 * @vsi: Pointer to VSI
7962 * @tc: traffic class index on the device
7963 * @filter: Pointer to cloud filter structure
7966 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
7967 struct i40e_cloud_filter *filter)
7969 struct i40e_channel *ch, *ch_tmp;
7971 /* direct to a traffic class on the same device */
7973 filter->seid = vsi->seid;
7975 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
7976 if (!filter->dst_port) {
7977 dev_err(&vsi->back->pdev->dev,
7978 "Specify destination port to direct to traffic class that is not default\n");
7981 if (list_empty(&vsi->ch_list))
7983 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
7985 if (ch->seid == vsi->tc_seid_map[tc])
7986 filter->seid = ch->seid;
7990 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
7995 * i40e_configure_clsflower - Configure tc flower filters
7996 * @vsi: Pointer to VSI
7997 * @cls_flower: Pointer to struct flow_cls_offload
8000 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8001 struct flow_cls_offload *cls_flower)
8003 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8004 struct i40e_cloud_filter *filter = NULL;
8005 struct i40e_pf *pf = vsi->back;
8009 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8013 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8014 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8017 if (pf->fdir_pf_active_filters ||
8018 (!hlist_empty(&pf->fdir_filter_list))) {
8019 dev_err(&vsi->back->pdev->dev,
8020 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8024 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8025 dev_err(&vsi->back->pdev->dev,
8026 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8027 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8028 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8031 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8035 filter->cookie = cls_flower->cookie;
8037 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8041 err = i40e_handle_tclass(vsi, tc, filter);
8045 /* Add cloud filter */
8046 if (filter->dst_port)
8047 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8049 err = i40e_add_del_cloud_filter(vsi, filter, true);
8052 dev_err(&pf->pdev->dev,
8053 "Failed to add cloud filter, err %s\n",
8054 i40e_stat_str(&pf->hw, err));
8058 /* add filter to the ordered list */
8059 INIT_HLIST_NODE(&filter->cloud_node);
8061 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8063 pf->num_cloud_filters++;
8072 * i40e_find_cloud_filter - Find the could filter in the list
8073 * @vsi: Pointer to VSI
8074 * @cookie: filter specific cookie
8077 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8078 unsigned long *cookie)
8080 struct i40e_cloud_filter *filter = NULL;
8081 struct hlist_node *node2;
8083 hlist_for_each_entry_safe(filter, node2,
8084 &vsi->back->cloud_filter_list, cloud_node)
8085 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8091 * i40e_delete_clsflower - Remove tc flower filters
8092 * @vsi: Pointer to VSI
8093 * @cls_flower: Pointer to struct flow_cls_offload
8096 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8097 struct flow_cls_offload *cls_flower)
8099 struct i40e_cloud_filter *filter = NULL;
8100 struct i40e_pf *pf = vsi->back;
8103 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8108 hash_del(&filter->cloud_node);
8110 if (filter->dst_port)
8111 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8113 err = i40e_add_del_cloud_filter(vsi, filter, false);
8117 dev_err(&pf->pdev->dev,
8118 "Failed to delete cloud filter, err %s\n",
8119 i40e_stat_str(&pf->hw, err));
8120 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8123 pf->num_cloud_filters--;
8124 if (!pf->num_cloud_filters)
8125 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8126 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8127 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8128 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8129 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8135 * i40e_setup_tc_cls_flower - flower classifier offloads
8136 * @netdev: net device to configure
8137 * @type_data: offload data
8139 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8140 struct flow_cls_offload *cls_flower)
8142 struct i40e_vsi *vsi = np->vsi;
8144 switch (cls_flower->command) {
8145 case FLOW_CLS_REPLACE:
8146 return i40e_configure_clsflower(vsi, cls_flower);
8147 case FLOW_CLS_DESTROY:
8148 return i40e_delete_clsflower(vsi, cls_flower);
8149 case FLOW_CLS_STATS:
8156 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8159 struct i40e_netdev_priv *np = cb_priv;
8161 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8165 case TC_SETUP_CLSFLOWER:
8166 return i40e_setup_tc_cls_flower(np, type_data);
8173 static LIST_HEAD(i40e_block_cb_list);
8175 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8178 struct i40e_netdev_priv *np = netdev_priv(netdev);
8181 case TC_SETUP_QDISC_MQPRIO:
8182 return i40e_setup_tc(netdev, type_data);
8183 case TC_SETUP_BLOCK:
8184 return flow_block_cb_setup_simple(type_data,
8185 &i40e_block_cb_list,
8186 i40e_setup_tc_block_cb,
8194 * i40e_open - Called when a network interface is made active
8195 * @netdev: network interface device structure
8197 * The open entry point is called when a network interface is made
8198 * active by the system (IFF_UP). At this point all resources needed
8199 * for transmit and receive operations are allocated, the interrupt
8200 * handler is registered with the OS, the netdev watchdog subtask is
8201 * enabled, and the stack is notified that the interface is ready.
8203 * Returns 0 on success, negative value on failure
8205 int i40e_open(struct net_device *netdev)
8207 struct i40e_netdev_priv *np = netdev_priv(netdev);
8208 struct i40e_vsi *vsi = np->vsi;
8209 struct i40e_pf *pf = vsi->back;
8212 /* disallow open during test or if eeprom is broken */
8213 if (test_bit(__I40E_TESTING, pf->state) ||
8214 test_bit(__I40E_BAD_EEPROM, pf->state))
8217 netif_carrier_off(netdev);
8219 if (i40e_force_link_state(pf, true))
8222 err = i40e_vsi_open(vsi);
8226 /* configure global TSO hardware offload settings */
8227 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8228 TCP_FLAG_FIN) >> 16);
8229 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8231 TCP_FLAG_CWR) >> 16);
8232 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8234 udp_tunnel_get_rx_info(netdev);
8241 * @vsi: the VSI to open
8243 * Finish initialization of the VSI.
8245 * Returns 0 on success, negative value on failure
8247 * Note: expects to be called while under rtnl_lock()
8249 int i40e_vsi_open(struct i40e_vsi *vsi)
8251 struct i40e_pf *pf = vsi->back;
8252 char int_name[I40E_INT_NAME_STR_LEN];
8255 /* allocate descriptors */
8256 err = i40e_vsi_setup_tx_resources(vsi);
8259 err = i40e_vsi_setup_rx_resources(vsi);
8263 err = i40e_vsi_configure(vsi);
8268 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8269 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8270 err = i40e_vsi_request_irq(vsi, int_name);
8274 /* Notify the stack of the actual queue counts. */
8275 err = netif_set_real_num_tx_queues(vsi->netdev,
8276 vsi->num_queue_pairs);
8278 goto err_set_queues;
8280 err = netif_set_real_num_rx_queues(vsi->netdev,
8281 vsi->num_queue_pairs);
8283 goto err_set_queues;
8285 } else if (vsi->type == I40E_VSI_FDIR) {
8286 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8287 dev_driver_string(&pf->pdev->dev),
8288 dev_name(&pf->pdev->dev));
8289 err = i40e_vsi_request_irq(vsi, int_name);
8296 err = i40e_up_complete(vsi);
8298 goto err_up_complete;
8305 i40e_vsi_free_irq(vsi);
8307 i40e_vsi_free_rx_resources(vsi);
8309 i40e_vsi_free_tx_resources(vsi);
8310 if (vsi == pf->vsi[pf->lan_vsi])
8311 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8317 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8318 * @pf: Pointer to PF
8320 * This function destroys the hlist where all the Flow Director
8321 * filters were saved.
8323 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8325 struct i40e_fdir_filter *filter;
8326 struct i40e_flex_pit *pit_entry, *tmp;
8327 struct hlist_node *node2;
8329 hlist_for_each_entry_safe(filter, node2,
8330 &pf->fdir_filter_list, fdir_node) {
8331 hlist_del(&filter->fdir_node);
8335 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8336 list_del(&pit_entry->list);
8339 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8341 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8342 list_del(&pit_entry->list);
8345 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8347 pf->fdir_pf_active_filters = 0;
8348 pf->fd_tcp4_filter_cnt = 0;
8349 pf->fd_udp4_filter_cnt = 0;
8350 pf->fd_sctp4_filter_cnt = 0;
8351 pf->fd_ip4_filter_cnt = 0;
8353 /* Reprogram the default input set for TCP/IPv4 */
8354 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8355 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8356 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8358 /* Reprogram the default input set for UDP/IPv4 */
8359 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8360 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8361 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8363 /* Reprogram the default input set for SCTP/IPv4 */
8364 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8365 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8366 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8368 /* Reprogram the default input set for Other/IPv4 */
8369 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
8370 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8372 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
8373 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
8377 * i40e_cloud_filter_exit - Cleans up the cloud filters
8378 * @pf: Pointer to PF
8380 * This function destroys the hlist where all the cloud filters
8383 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
8385 struct i40e_cloud_filter *cfilter;
8386 struct hlist_node *node;
8388 hlist_for_each_entry_safe(cfilter, node,
8389 &pf->cloud_filter_list, cloud_node) {
8390 hlist_del(&cfilter->cloud_node);
8393 pf->num_cloud_filters = 0;
8395 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8396 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8397 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8398 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8399 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8404 * i40e_close - Disables a network interface
8405 * @netdev: network interface device structure
8407 * The close entry point is called when an interface is de-activated
8408 * by the OS. The hardware is still under the driver's control, but
8409 * this netdev interface is disabled.
8411 * Returns 0, this is not allowed to fail
8413 int i40e_close(struct net_device *netdev)
8415 struct i40e_netdev_priv *np = netdev_priv(netdev);
8416 struct i40e_vsi *vsi = np->vsi;
8418 i40e_vsi_close(vsi);
8424 * i40e_do_reset - Start a PF or Core Reset sequence
8425 * @pf: board private structure
8426 * @reset_flags: which reset is requested
8427 * @lock_acquired: indicates whether or not the lock has been acquired
8428 * before this function was called.
8430 * The essential difference in resets is that the PF Reset
8431 * doesn't clear the packet buffers, doesn't reset the PE
8432 * firmware, and doesn't bother the other PFs on the chip.
8434 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
8438 WARN_ON(in_interrupt());
8441 /* do the biggest reset indicated */
8442 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
8444 /* Request a Global Reset
8446 * This will start the chip's countdown to the actual full
8447 * chip reset event, and a warning interrupt to be sent
8448 * to all PFs, including the requestor. Our handler
8449 * for the warning interrupt will deal with the shutdown
8450 * and recovery of the switch setup.
8452 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
8453 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8454 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
8455 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8457 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
8459 /* Request a Core Reset
8461 * Same as Global Reset, except does *not* include the MAC/PHY
8463 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
8464 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8465 val |= I40E_GLGEN_RTRIG_CORER_MASK;
8466 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
8467 i40e_flush(&pf->hw);
8469 } else if (reset_flags & I40E_PF_RESET_FLAG) {
8471 /* Request a PF Reset
8473 * Resets only the PF-specific registers
8475 * This goes directly to the tear-down and rebuild of
8476 * the switch, since we need to do all the recovery as
8477 * for the Core Reset.
8479 dev_dbg(&pf->pdev->dev, "PFR requested\n");
8480 i40e_handle_reset_warning(pf, lock_acquired);
8482 dev_info(&pf->pdev->dev,
8483 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
8484 "FW LLDP is disabled\n" :
8485 "FW LLDP is enabled\n");
8487 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
8490 /* Find the VSI(s) that requested a re-init */
8491 dev_info(&pf->pdev->dev,
8492 "VSI reinit requested\n");
8493 for (v = 0; v < pf->num_alloc_vsi; v++) {
8494 struct i40e_vsi *vsi = pf->vsi[v];
8497 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
8499 i40e_vsi_reinit_locked(pf->vsi[v]);
8501 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
8504 /* Find the VSI(s) that needs to be brought down */
8505 dev_info(&pf->pdev->dev, "VSI down requested\n");
8506 for (v = 0; v < pf->num_alloc_vsi; v++) {
8507 struct i40e_vsi *vsi = pf->vsi[v];
8510 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
8512 set_bit(__I40E_VSI_DOWN, vsi->state);
8517 dev_info(&pf->pdev->dev,
8518 "bad reset request 0x%08x\n", reset_flags);
8522 #ifdef CONFIG_I40E_DCB
8524 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
8525 * @pf: board private structure
8526 * @old_cfg: current DCB config
8527 * @new_cfg: new DCB config
8529 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
8530 struct i40e_dcbx_config *old_cfg,
8531 struct i40e_dcbx_config *new_cfg)
8533 bool need_reconfig = false;
8535 /* Check if ETS configuration has changed */
8536 if (memcmp(&new_cfg->etscfg,
8538 sizeof(new_cfg->etscfg))) {
8539 /* If Priority Table has changed reconfig is needed */
8540 if (memcmp(&new_cfg->etscfg.prioritytable,
8541 &old_cfg->etscfg.prioritytable,
8542 sizeof(new_cfg->etscfg.prioritytable))) {
8543 need_reconfig = true;
8544 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
8547 if (memcmp(&new_cfg->etscfg.tcbwtable,
8548 &old_cfg->etscfg.tcbwtable,
8549 sizeof(new_cfg->etscfg.tcbwtable)))
8550 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
8552 if (memcmp(&new_cfg->etscfg.tsatable,
8553 &old_cfg->etscfg.tsatable,
8554 sizeof(new_cfg->etscfg.tsatable)))
8555 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
8558 /* Check if PFC configuration has changed */
8559 if (memcmp(&new_cfg->pfc,
8561 sizeof(new_cfg->pfc))) {
8562 need_reconfig = true;
8563 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
8566 /* Check if APP Table has changed */
8567 if (memcmp(&new_cfg->app,
8569 sizeof(new_cfg->app))) {
8570 need_reconfig = true;
8571 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
8574 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
8575 return need_reconfig;
8579 * i40e_handle_lldp_event - Handle LLDP Change MIB event
8580 * @pf: board private structure
8581 * @e: event info posted on ARQ
8583 static int i40e_handle_lldp_event(struct i40e_pf *pf,
8584 struct i40e_arq_event_info *e)
8586 struct i40e_aqc_lldp_get_mib *mib =
8587 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
8588 struct i40e_hw *hw = &pf->hw;
8589 struct i40e_dcbx_config tmp_dcbx_cfg;
8590 bool need_reconfig = false;
8594 /* Not DCB capable or capability disabled */
8595 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
8598 /* Ignore if event is not for Nearest Bridge */
8599 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
8600 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
8601 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
8602 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
8605 /* Check MIB Type and return if event for Remote MIB update */
8606 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
8607 dev_dbg(&pf->pdev->dev,
8608 "LLDP event mib type %s\n", type ? "remote" : "local");
8609 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
8610 /* Update the remote cached instance and return */
8611 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
8612 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
8613 &hw->remote_dcbx_config);
8617 /* Store the old configuration */
8618 tmp_dcbx_cfg = hw->local_dcbx_config;
8620 /* Reset the old DCBx configuration data */
8621 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
8622 /* Get updated DCBX data from firmware */
8623 ret = i40e_get_dcb_config(&pf->hw);
8625 dev_info(&pf->pdev->dev,
8626 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
8627 i40e_stat_str(&pf->hw, ret),
8628 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8632 /* No change detected in DCBX configs */
8633 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
8634 sizeof(tmp_dcbx_cfg))) {
8635 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
8639 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
8640 &hw->local_dcbx_config);
8642 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
8647 /* Enable DCB tagging only when more than one TC */
8648 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
8649 pf->flags |= I40E_FLAG_DCB_ENABLED;
8651 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8653 set_bit(__I40E_PORT_SUSPENDED, pf->state);
8654 /* Reconfiguration needed quiesce all VSIs */
8655 i40e_pf_quiesce_all_vsi(pf);
8657 /* Changes in configuration update VEB/VSI */
8658 i40e_dcb_reconfigure(pf);
8660 ret = i40e_resume_port_tx(pf);
8662 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
8663 /* In case of error no point in resuming VSIs */
8667 /* Wait for the PF's queues to be disabled */
8668 ret = i40e_pf_wait_queues_disabled(pf);
8670 /* Schedule PF reset to recover */
8671 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
8672 i40e_service_event_schedule(pf);
8674 i40e_pf_unquiesce_all_vsi(pf);
8675 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
8676 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
8682 #endif /* CONFIG_I40E_DCB */
8685 * i40e_do_reset_safe - Protected reset path for userland calls.
8686 * @pf: board private structure
8687 * @reset_flags: which reset is requested
8690 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
8693 i40e_do_reset(pf, reset_flags, true);
8698 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
8699 * @pf: board private structure
8700 * @e: event info posted on ARQ
8702 * Handler for LAN Queue Overflow Event generated by the firmware for PF
8705 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
8706 struct i40e_arq_event_info *e)
8708 struct i40e_aqc_lan_overflow *data =
8709 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
8710 u32 queue = le32_to_cpu(data->prtdcb_rupto);
8711 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
8712 struct i40e_hw *hw = &pf->hw;
8716 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
8719 /* Queue belongs to VF, find the VF and issue VF reset */
8720 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
8721 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
8722 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
8723 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
8724 vf_id -= hw->func_caps.vf_base_id;
8725 vf = &pf->vf[vf_id];
8726 i40e_vc_notify_vf_reset(vf);
8727 /* Allow VF to process pending reset notification */
8729 i40e_reset_vf(vf, false);
8734 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
8735 * @pf: board private structure
8737 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
8741 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8742 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
8747 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
8748 * @pf: board private structure
8750 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
8754 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
8755 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
8756 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
8757 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
8762 * i40e_get_global_fd_count - Get total FD filters programmed on device
8763 * @pf: board private structure
8765 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
8769 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
8770 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
8771 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
8772 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
8777 * i40e_reenable_fdir_sb - Restore FDir SB capability
8778 * @pf: board private structure
8780 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
8782 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
8783 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
8784 (I40E_DEBUG_FD & pf->hw.debug_mask))
8785 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
8789 * i40e_reenable_fdir_atr - Restore FDir ATR capability
8790 * @pf: board private structure
8792 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
8794 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
8795 /* ATR uses the same filtering logic as SB rules. It only
8796 * functions properly if the input set mask is at the default
8797 * settings. It is safe to restore the default input set
8798 * because there are no active TCPv4 filter rules.
8800 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8801 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8802 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8804 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8805 (I40E_DEBUG_FD & pf->hw.debug_mask))
8806 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
8811 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
8812 * @pf: board private structure
8813 * @filter: FDir filter to remove
8815 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
8816 struct i40e_fdir_filter *filter)
8818 /* Update counters */
8819 pf->fdir_pf_active_filters--;
8822 switch (filter->flow_type) {
8824 pf->fd_tcp4_filter_cnt--;
8827 pf->fd_udp4_filter_cnt--;
8830 pf->fd_sctp4_filter_cnt--;
8833 switch (filter->ip4_proto) {
8835 pf->fd_tcp4_filter_cnt--;
8838 pf->fd_udp4_filter_cnt--;
8841 pf->fd_sctp4_filter_cnt--;
8844 pf->fd_ip4_filter_cnt--;
8850 /* Remove the filter from the list and free memory */
8851 hlist_del(&filter->fdir_node);
8856 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
8857 * @pf: board private structure
8859 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
8861 struct i40e_fdir_filter *filter;
8862 u32 fcnt_prog, fcnt_avail;
8863 struct hlist_node *node;
8865 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8868 /* Check if we have enough room to re-enable FDir SB capability. */
8869 fcnt_prog = i40e_get_global_fd_count(pf);
8870 fcnt_avail = pf->fdir_pf_filter_count;
8871 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
8872 (pf->fd_add_err == 0) ||
8873 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
8874 i40e_reenable_fdir_sb(pf);
8876 /* We should wait for even more space before re-enabling ATR.
8877 * Additionally, we cannot enable ATR as long as we still have TCP SB
8880 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
8881 (pf->fd_tcp4_filter_cnt == 0))
8882 i40e_reenable_fdir_atr(pf);
8884 /* if hw had a problem adding a filter, delete it */
8885 if (pf->fd_inv > 0) {
8886 hlist_for_each_entry_safe(filter, node,
8887 &pf->fdir_filter_list, fdir_node)
8888 if (filter->fd_id == pf->fd_inv)
8889 i40e_delete_invalid_filter(pf, filter);
8893 #define I40E_MIN_FD_FLUSH_INTERVAL 10
8894 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
8896 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
8897 * @pf: board private structure
8899 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
8901 unsigned long min_flush_time;
8902 int flush_wait_retry = 50;
8903 bool disable_atr = false;
8907 if (!time_after(jiffies, pf->fd_flush_timestamp +
8908 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
8911 /* If the flush is happening too quick and we have mostly SB rules we
8912 * should not re-enable ATR for some time.
8914 min_flush_time = pf->fd_flush_timestamp +
8915 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
8916 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
8918 if (!(time_after(jiffies, min_flush_time)) &&
8919 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
8920 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8921 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
8925 pf->fd_flush_timestamp = jiffies;
8926 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
8927 /* flush all filters */
8928 wr32(&pf->hw, I40E_PFQF_CTL_1,
8929 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
8930 i40e_flush(&pf->hw);
8934 /* Check FD flush status every 5-6msec */
8935 usleep_range(5000, 6000);
8936 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
8937 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
8939 } while (flush_wait_retry--);
8940 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
8941 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
8943 /* replay sideband filters */
8944 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
8945 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
8946 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
8947 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
8948 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8949 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
8954 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
8955 * @pf: board private structure
8957 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
8959 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
8962 /* We can see up to 256 filter programming desc in transit if the filters are
8963 * being applied really fast; before we see the first
8964 * filter miss error on Rx queue 0. Accumulating enough error messages before
8965 * reacting will make sure we don't cause flush too often.
8967 #define I40E_MAX_FD_PROGRAM_ERROR 256
8970 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
8971 * @pf: board private structure
8973 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
8976 /* if interface is down do nothing */
8977 if (test_bit(__I40E_DOWN, pf->state))
8980 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
8981 i40e_fdir_flush_and_replay(pf);
8983 i40e_fdir_check_and_reenable(pf);
8988 * i40e_vsi_link_event - notify VSI of a link event
8989 * @vsi: vsi to be notified
8990 * @link_up: link up or down
8992 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
8994 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
8997 switch (vsi->type) {
8999 if (!vsi->netdev || !vsi->netdev_registered)
9003 netif_carrier_on(vsi->netdev);
9004 netif_tx_wake_all_queues(vsi->netdev);
9006 netif_carrier_off(vsi->netdev);
9007 netif_tx_stop_all_queues(vsi->netdev);
9011 case I40E_VSI_SRIOV:
9012 case I40E_VSI_VMDQ2:
9014 case I40E_VSI_IWARP:
9015 case I40E_VSI_MIRROR:
9017 /* there is no notification for other VSIs */
9023 * i40e_veb_link_event - notify elements on the veb of a link event
9024 * @veb: veb to be notified
9025 * @link_up: link up or down
9027 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9032 if (!veb || !veb->pf)
9036 /* depth first... */
9037 for (i = 0; i < I40E_MAX_VEB; i++)
9038 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9039 i40e_veb_link_event(pf->veb[i], link_up);
9041 /* ... now the local VSIs */
9042 for (i = 0; i < pf->num_alloc_vsi; i++)
9043 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9044 i40e_vsi_link_event(pf->vsi[i], link_up);
9048 * i40e_link_event - Update netif_carrier status
9049 * @pf: board private structure
9051 static void i40e_link_event(struct i40e_pf *pf)
9053 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9054 u8 new_link_speed, old_link_speed;
9056 bool new_link, old_link;
9058 /* set this to force the get_link_status call to refresh state */
9059 pf->hw.phy.get_link_info = true;
9060 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9061 status = i40e_get_link_status(&pf->hw, &new_link);
9063 /* On success, disable temp link polling */
9064 if (status == I40E_SUCCESS) {
9065 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9067 /* Enable link polling temporarily until i40e_get_link_status
9068 * returns I40E_SUCCESS
9070 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9071 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9076 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9077 new_link_speed = pf->hw.phy.link_info.link_speed;
9079 if (new_link == old_link &&
9080 new_link_speed == old_link_speed &&
9081 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9082 new_link == netif_carrier_ok(vsi->netdev)))
9085 i40e_print_link_message(vsi, new_link);
9087 /* Notify the base of the switch tree connected to
9088 * the link. Floating VEBs are not notified.
9090 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9091 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9093 i40e_vsi_link_event(vsi, new_link);
9096 i40e_vc_notify_link_state(pf);
9098 if (pf->flags & I40E_FLAG_PTP)
9099 i40e_ptp_set_increment(pf);
9103 * i40e_watchdog_subtask - periodic checks not using event driven response
9104 * @pf: board private structure
9106 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9110 /* if interface is down do nothing */
9111 if (test_bit(__I40E_DOWN, pf->state) ||
9112 test_bit(__I40E_CONFIG_BUSY, pf->state))
9115 /* make sure we don't do these things too often */
9116 if (time_before(jiffies, (pf->service_timer_previous +
9117 pf->service_timer_period)))
9119 pf->service_timer_previous = jiffies;
9121 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9122 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9123 i40e_link_event(pf);
9125 /* Update the stats for active netdevs so the network stack
9126 * can look at updated numbers whenever it cares to
9128 for (i = 0; i < pf->num_alloc_vsi; i++)
9129 if (pf->vsi[i] && pf->vsi[i]->netdev)
9130 i40e_update_stats(pf->vsi[i]);
9132 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9133 /* Update the stats for the active switching components */
9134 for (i = 0; i < I40E_MAX_VEB; i++)
9136 i40e_update_veb_stats(pf->veb[i]);
9139 i40e_ptp_rx_hang(pf);
9140 i40e_ptp_tx_hang(pf);
9144 * i40e_reset_subtask - Set up for resetting the device and driver
9145 * @pf: board private structure
9147 static void i40e_reset_subtask(struct i40e_pf *pf)
9149 u32 reset_flags = 0;
9151 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9152 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9153 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9155 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9156 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9157 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9159 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9160 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9161 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9163 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9164 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9165 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9167 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9168 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9169 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9172 /* If there's a recovery already waiting, it takes
9173 * precedence before starting a new reset sequence.
9175 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9176 i40e_prep_for_reset(pf, false);
9178 i40e_rebuild(pf, false, false);
9181 /* If we're already down or resetting, just bail */
9183 !test_bit(__I40E_DOWN, pf->state) &&
9184 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9185 i40e_do_reset(pf, reset_flags, false);
9190 * i40e_handle_link_event - Handle link event
9191 * @pf: board private structure
9192 * @e: event info posted on ARQ
9194 static void i40e_handle_link_event(struct i40e_pf *pf,
9195 struct i40e_arq_event_info *e)
9197 struct i40e_aqc_get_link_status *status =
9198 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9200 /* Do a new status request to re-enable LSE reporting
9201 * and load new status information into the hw struct
9202 * This completely ignores any state information
9203 * in the ARQ event info, instead choosing to always
9204 * issue the AQ update link status command.
9206 i40e_link_event(pf);
9208 /* Check if module meets thermal requirements */
9209 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9210 dev_err(&pf->pdev->dev,
9211 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9212 dev_err(&pf->pdev->dev,
9213 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9215 /* check for unqualified module, if link is down, suppress
9216 * the message if link was forced to be down.
9218 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9219 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9220 (!(status->link_info & I40E_AQ_LINK_UP)) &&
9221 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9222 dev_err(&pf->pdev->dev,
9223 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9224 dev_err(&pf->pdev->dev,
9225 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9231 * i40e_clean_adminq_subtask - Clean the AdminQ rings
9232 * @pf: board private structure
9234 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9236 struct i40e_arq_event_info event;
9237 struct i40e_hw *hw = &pf->hw;
9244 /* Do not run clean AQ when PF reset fails */
9245 if (test_bit(__I40E_RESET_FAILED, pf->state))
9248 /* check for error indications */
9249 val = rd32(&pf->hw, pf->hw.aq.arq.len);
9251 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9252 if (hw->debug_mask & I40E_DEBUG_AQ)
9253 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9254 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9256 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9257 if (hw->debug_mask & I40E_DEBUG_AQ)
9258 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9259 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9260 pf->arq_overflows++;
9262 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9263 if (hw->debug_mask & I40E_DEBUG_AQ)
9264 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9265 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9268 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9270 val = rd32(&pf->hw, pf->hw.aq.asq.len);
9272 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9273 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9274 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9275 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9277 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9278 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9279 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9280 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9282 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9283 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9284 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9285 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
9288 wr32(&pf->hw, pf->hw.aq.asq.len, val);
9290 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
9291 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
9296 ret = i40e_clean_arq_element(hw, &event, &pending);
9297 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
9300 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
9304 opcode = le16_to_cpu(event.desc.opcode);
9307 case i40e_aqc_opc_get_link_status:
9308 i40e_handle_link_event(pf, &event);
9310 case i40e_aqc_opc_send_msg_to_pf:
9311 ret = i40e_vc_process_vf_msg(pf,
9312 le16_to_cpu(event.desc.retval),
9313 le32_to_cpu(event.desc.cookie_high),
9314 le32_to_cpu(event.desc.cookie_low),
9318 case i40e_aqc_opc_lldp_update_mib:
9319 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
9320 #ifdef CONFIG_I40E_DCB
9322 ret = i40e_handle_lldp_event(pf, &event);
9324 #endif /* CONFIG_I40E_DCB */
9326 case i40e_aqc_opc_event_lan_overflow:
9327 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
9328 i40e_handle_lan_overflow_event(pf, &event);
9330 case i40e_aqc_opc_send_msg_to_peer:
9331 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
9333 case i40e_aqc_opc_nvm_erase:
9334 case i40e_aqc_opc_nvm_update:
9335 case i40e_aqc_opc_oem_post_update:
9336 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
9337 "ARQ NVM operation 0x%04x completed\n",
9341 dev_info(&pf->pdev->dev,
9342 "ARQ: Unknown event 0x%04x ignored\n",
9346 } while (i++ < pf->adminq_work_limit);
9348 if (i < pf->adminq_work_limit)
9349 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
9351 /* re-enable Admin queue interrupt cause */
9352 val = rd32(hw, I40E_PFINT_ICR0_ENA);
9353 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
9354 wr32(hw, I40E_PFINT_ICR0_ENA, val);
9357 kfree(event.msg_buf);
9361 * i40e_verify_eeprom - make sure eeprom is good to use
9362 * @pf: board private structure
9364 static void i40e_verify_eeprom(struct i40e_pf *pf)
9368 err = i40e_diag_eeprom_test(&pf->hw);
9370 /* retry in case of garbage read */
9371 err = i40e_diag_eeprom_test(&pf->hw);
9373 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
9375 set_bit(__I40E_BAD_EEPROM, pf->state);
9379 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
9380 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
9381 clear_bit(__I40E_BAD_EEPROM, pf->state);
9386 * i40e_enable_pf_switch_lb
9387 * @pf: pointer to the PF structure
9389 * enable switch loop back or die - no point in a return value
9391 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
9393 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9394 struct i40e_vsi_context ctxt;
9397 ctxt.seid = pf->main_vsi_seid;
9398 ctxt.pf_num = pf->hw.pf_id;
9400 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9402 dev_info(&pf->pdev->dev,
9403 "couldn't get PF vsi config, err %s aq_err %s\n",
9404 i40e_stat_str(&pf->hw, ret),
9405 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9408 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9409 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9410 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9412 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9414 dev_info(&pf->pdev->dev,
9415 "update vsi switch failed, err %s aq_err %s\n",
9416 i40e_stat_str(&pf->hw, ret),
9417 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9422 * i40e_disable_pf_switch_lb
9423 * @pf: pointer to the PF structure
9425 * disable switch loop back or die - no point in a return value
9427 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
9429 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9430 struct i40e_vsi_context ctxt;
9433 ctxt.seid = pf->main_vsi_seid;
9434 ctxt.pf_num = pf->hw.pf_id;
9436 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9438 dev_info(&pf->pdev->dev,
9439 "couldn't get PF vsi config, err %s aq_err %s\n",
9440 i40e_stat_str(&pf->hw, ret),
9441 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9444 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9445 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9446 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9448 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
9450 dev_info(&pf->pdev->dev,
9451 "update vsi switch failed, err %s aq_err %s\n",
9452 i40e_stat_str(&pf->hw, ret),
9453 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9458 * i40e_config_bridge_mode - Configure the HW bridge mode
9459 * @veb: pointer to the bridge instance
9461 * Configure the loop back mode for the LAN VSI that is downlink to the
9462 * specified HW bridge instance. It is expected this function is called
9463 * when a new HW bridge is instantiated.
9465 static void i40e_config_bridge_mode(struct i40e_veb *veb)
9467 struct i40e_pf *pf = veb->pf;
9469 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
9470 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
9471 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
9472 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
9473 i40e_disable_pf_switch_lb(pf);
9475 i40e_enable_pf_switch_lb(pf);
9479 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
9480 * @veb: pointer to the VEB instance
9482 * This is a recursive function that first builds the attached VSIs then
9483 * recurses in to build the next layer of VEB. We track the connections
9484 * through our own index numbers because the seid's from the HW could
9485 * change across the reset.
9487 static int i40e_reconstitute_veb(struct i40e_veb *veb)
9489 struct i40e_vsi *ctl_vsi = NULL;
9490 struct i40e_pf *pf = veb->pf;
9494 /* build VSI that owns this VEB, temporarily attached to base VEB */
9495 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
9497 pf->vsi[v]->veb_idx == veb->idx &&
9498 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
9499 ctl_vsi = pf->vsi[v];
9504 dev_info(&pf->pdev->dev,
9505 "missing owner VSI for veb_idx %d\n", veb->idx);
9507 goto end_reconstitute;
9509 if (ctl_vsi != pf->vsi[pf->lan_vsi])
9510 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9511 ret = i40e_add_vsi(ctl_vsi);
9513 dev_info(&pf->pdev->dev,
9514 "rebuild of veb_idx %d owner VSI failed: %d\n",
9516 goto end_reconstitute;
9518 i40e_vsi_reset_stats(ctl_vsi);
9520 /* create the VEB in the switch and move the VSI onto the VEB */
9521 ret = i40e_add_veb(veb, ctl_vsi);
9523 goto end_reconstitute;
9525 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
9526 veb->bridge_mode = BRIDGE_MODE_VEB;
9528 veb->bridge_mode = BRIDGE_MODE_VEPA;
9529 i40e_config_bridge_mode(veb);
9531 /* create the remaining VSIs attached to this VEB */
9532 for (v = 0; v < pf->num_alloc_vsi; v++) {
9533 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
9536 if (pf->vsi[v]->veb_idx == veb->idx) {
9537 struct i40e_vsi *vsi = pf->vsi[v];
9539 vsi->uplink_seid = veb->seid;
9540 ret = i40e_add_vsi(vsi);
9542 dev_info(&pf->pdev->dev,
9543 "rebuild of vsi_idx %d failed: %d\n",
9545 goto end_reconstitute;
9547 i40e_vsi_reset_stats(vsi);
9551 /* create any VEBs attached to this VEB - RECURSION */
9552 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9553 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
9554 pf->veb[veb_idx]->uplink_seid = veb->seid;
9555 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
9566 * i40e_get_capabilities - get info about the HW
9567 * @pf: the PF struct
9569 static int i40e_get_capabilities(struct i40e_pf *pf,
9570 enum i40e_admin_queue_opc list_type)
9572 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
9577 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
9579 cap_buf = kzalloc(buf_len, GFP_KERNEL);
9583 /* this loads the data into the hw struct for us */
9584 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
9585 &data_size, list_type,
9587 /* data loaded, buffer no longer needed */
9590 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
9591 /* retry with a larger buffer */
9592 buf_len = data_size;
9593 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
9594 dev_info(&pf->pdev->dev,
9595 "capability discovery failed, err %s aq_err %s\n",
9596 i40e_stat_str(&pf->hw, err),
9597 i40e_aq_str(&pf->hw,
9598 pf->hw.aq.asq_last_status));
9603 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
9604 if (list_type == i40e_aqc_opc_list_func_capabilities) {
9605 dev_info(&pf->pdev->dev,
9606 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
9607 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
9608 pf->hw.func_caps.num_msix_vectors,
9609 pf->hw.func_caps.num_msix_vectors_vf,
9610 pf->hw.func_caps.fd_filters_guaranteed,
9611 pf->hw.func_caps.fd_filters_best_effort,
9612 pf->hw.func_caps.num_tx_qp,
9613 pf->hw.func_caps.num_vsis);
9614 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
9615 dev_info(&pf->pdev->dev,
9616 "switch_mode=0x%04x, function_valid=0x%08x\n",
9617 pf->hw.dev_caps.switch_mode,
9618 pf->hw.dev_caps.valid_functions);
9619 dev_info(&pf->pdev->dev,
9620 "SR-IOV=%d, num_vfs for all function=%u\n",
9621 pf->hw.dev_caps.sr_iov_1_1,
9622 pf->hw.dev_caps.num_vfs);
9623 dev_info(&pf->pdev->dev,
9624 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
9625 pf->hw.dev_caps.num_vsis,
9626 pf->hw.dev_caps.num_rx_qp,
9627 pf->hw.dev_caps.num_tx_qp);
9630 if (list_type == i40e_aqc_opc_list_func_capabilities) {
9631 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
9632 + pf->hw.func_caps.num_vfs)
9633 if (pf->hw.revision_id == 0 &&
9634 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
9635 dev_info(&pf->pdev->dev,
9636 "got num_vsis %d, setting num_vsis to %d\n",
9637 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
9638 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
9644 static int i40e_vsi_clear(struct i40e_vsi *vsi);
9647 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
9648 * @pf: board private structure
9650 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
9652 struct i40e_vsi *vsi;
9654 /* quick workaround for an NVM issue that leaves a critical register
9657 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
9658 static const u32 hkey[] = {
9659 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
9660 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
9661 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
9665 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
9666 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
9669 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
9672 /* find existing VSI and see if it needs configuring */
9673 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9675 /* create a new VSI if none exists */
9677 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
9678 pf->vsi[pf->lan_vsi]->seid, 0);
9680 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
9681 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9682 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
9687 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
9691 * i40e_fdir_teardown - release the Flow Director resources
9692 * @pf: board private structure
9694 static void i40e_fdir_teardown(struct i40e_pf *pf)
9696 struct i40e_vsi *vsi;
9698 i40e_fdir_filter_exit(pf);
9699 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
9701 i40e_vsi_release(vsi);
9705 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
9707 * @seid: seid of main or channel VSIs
9709 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
9710 * existed before reset
9712 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
9714 struct i40e_cloud_filter *cfilter;
9715 struct i40e_pf *pf = vsi->back;
9716 struct hlist_node *node;
9719 /* Add cloud filters back if they exist */
9720 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
9722 if (cfilter->seid != seid)
9725 if (cfilter->dst_port)
9726 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
9729 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
9732 dev_dbg(&pf->pdev->dev,
9733 "Failed to rebuild cloud filter, err %s aq_err %s\n",
9734 i40e_stat_str(&pf->hw, ret),
9735 i40e_aq_str(&pf->hw,
9736 pf->hw.aq.asq_last_status));
9744 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
9747 * Rebuilds channel VSIs if they existed before reset
9749 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
9751 struct i40e_channel *ch, *ch_tmp;
9754 if (list_empty(&vsi->ch_list))
9757 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
9758 if (!ch->initialized)
9760 /* Proceed with creation of channel (VMDq2) VSI */
9761 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
9763 dev_info(&vsi->back->pdev->dev,
9764 "failed to rebuild channels using uplink_seid %u\n",
9768 /* Reconfigure TX queues using QTX_CTL register */
9769 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
9771 dev_info(&vsi->back->pdev->dev,
9772 "failed to configure TX rings for channel %u\n",
9776 /* update 'next_base_queue' */
9777 vsi->next_base_queue = vsi->next_base_queue +
9778 ch->num_queue_pairs;
9779 if (ch->max_tx_rate) {
9780 u64 credits = ch->max_tx_rate;
9782 if (i40e_set_bw_limit(vsi, ch->seid,
9786 do_div(credits, I40E_BW_CREDIT_DIVISOR);
9787 dev_dbg(&vsi->back->pdev->dev,
9788 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
9793 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
9795 dev_dbg(&vsi->back->pdev->dev,
9796 "Failed to rebuild cloud filters for channel VSI %u\n",
9805 * i40e_prep_for_reset - prep for the core to reset
9806 * @pf: board private structure
9807 * @lock_acquired: indicates whether or not the lock has been acquired
9808 * before this function was called.
9810 * Close up the VFs and other things in prep for PF Reset.
9812 static void i40e_prep_for_reset(struct i40e_pf *pf, bool lock_acquired)
9814 struct i40e_hw *hw = &pf->hw;
9815 i40e_status ret = 0;
9818 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
9819 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
9821 if (i40e_check_asq_alive(&pf->hw))
9822 i40e_vc_notify_reset(pf);
9824 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
9826 /* quiesce the VSIs and their queues that are not already DOWN */
9827 /* pf_quiesce_all_vsi modifies netdev structures -rtnl_lock needed */
9830 i40e_pf_quiesce_all_vsi(pf);
9834 for (v = 0; v < pf->num_alloc_vsi; v++) {
9836 pf->vsi[v]->seid = 0;
9839 i40e_shutdown_adminq(&pf->hw);
9841 /* call shutdown HMC */
9842 if (hw->hmc.hmc_obj) {
9843 ret = i40e_shutdown_lan_hmc(hw);
9845 dev_warn(&pf->pdev->dev,
9846 "shutdown_lan_hmc failed: %d\n", ret);
9849 /* Save the current PTP time so that we can restore the time after the
9852 i40e_ptp_save_hw_time(pf);
9856 * i40e_send_version - update firmware with driver version
9859 static void i40e_send_version(struct i40e_pf *pf)
9861 struct i40e_driver_version dv;
9863 dv.major_version = DRV_VERSION_MAJOR;
9864 dv.minor_version = DRV_VERSION_MINOR;
9865 dv.build_version = DRV_VERSION_BUILD;
9866 dv.subbuild_version = 0;
9867 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
9868 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
9872 * i40e_get_oem_version - get OEM specific version information
9873 * @hw: pointer to the hardware structure
9875 static void i40e_get_oem_version(struct i40e_hw *hw)
9877 u16 block_offset = 0xffff;
9878 u16 block_length = 0;
9879 u16 capabilities = 0;
9883 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
9884 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
9885 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
9886 #define I40E_NVM_OEM_GEN_OFFSET 0x02
9887 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
9888 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
9889 #define I40E_NVM_OEM_LENGTH 3
9891 /* Check if pointer to OEM version block is valid. */
9892 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
9893 if (block_offset == 0xffff)
9896 /* Check if OEM version block has correct length. */
9897 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
9899 if (block_length < I40E_NVM_OEM_LENGTH)
9902 /* Check if OEM version format is as expected. */
9903 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
9905 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
9908 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
9910 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
9912 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
9913 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
9917 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
9918 * @pf: board private structure
9920 static int i40e_reset(struct i40e_pf *pf)
9922 struct i40e_hw *hw = &pf->hw;
9925 ret = i40e_pf_reset(hw);
9927 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
9928 set_bit(__I40E_RESET_FAILED, pf->state);
9929 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
9937 * i40e_rebuild - rebuild using a saved config
9938 * @pf: board private structure
9939 * @reinit: if the Main VSI needs to re-initialized.
9940 * @lock_acquired: indicates whether or not the lock has been acquired
9941 * before this function was called.
9943 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
9945 int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
9946 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9947 struct i40e_hw *hw = &pf->hw;
9948 u8 set_fc_aq_fail = 0;
9953 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
9954 i40e_check_recovery_mode(pf)) {
9955 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
9958 if (test_bit(__I40E_DOWN, pf->state) &&
9959 !test_bit(__I40E_RECOVERY_MODE, pf->state) &&
9960 !old_recovery_mode_bit)
9961 goto clear_recovery;
9962 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
9964 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
9965 ret = i40e_init_adminq(&pf->hw);
9967 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
9968 i40e_stat_str(&pf->hw, ret),
9969 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9970 goto clear_recovery;
9972 i40e_get_oem_version(&pf->hw);
9974 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
9975 ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
9976 hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
9977 /* The following delay is necessary for 4.33 firmware and older
9978 * to recover after EMP reset. 200 ms should suffice but we
9979 * put here 300 ms to be sure that FW is ready to operate
9985 /* re-verify the eeprom if we just had an EMP reset */
9986 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
9987 i40e_verify_eeprom(pf);
9989 /* if we are going out of or into recovery mode we have to act
9990 * accordingly with regard to resources initialization
9991 * and deinitialization
9993 if (test_bit(__I40E_RECOVERY_MODE, pf->state) ||
9994 old_recovery_mode_bit) {
9995 if (i40e_get_capabilities(pf,
9996 i40e_aqc_opc_list_func_capabilities))
9999 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10000 /* we're staying in recovery mode so we'll reinitialize
10003 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10006 if (!lock_acquired)
10008 /* we're going out of recovery mode so we'll free
10009 * the IRQ allocated specifically for recovery mode
10010 * and restore the interrupt scheme
10012 free_irq(pf->pdev->irq, pf);
10013 i40e_clear_interrupt_scheme(pf);
10014 if (i40e_restore_interrupt_scheme(pf))
10018 /* tell the firmware that we're starting */
10019 i40e_send_version(pf);
10021 /* bail out in case recovery mode was detected, as there is
10022 * no need for further configuration.
10027 i40e_clear_pxe_mode(hw);
10028 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10030 goto end_core_reset;
10032 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10033 hw->func_caps.num_rx_qp, 0, 0);
10035 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10036 goto end_core_reset;
10038 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10040 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10041 goto end_core_reset;
10044 /* Enable FW to write a default DCB config on link-up */
10045 i40e_aq_set_dcb_parameters(hw, true, NULL);
10047 #ifdef CONFIG_I40E_DCB
10048 ret = i40e_init_pf_dcb(pf);
10050 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
10051 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10052 /* Continue without DCB enabled */
10054 #endif /* CONFIG_I40E_DCB */
10055 /* do basic switch setup */
10056 if (!lock_acquired)
10058 ret = i40e_setup_pf_switch(pf, reinit);
10062 /* The driver only wants link up/down and module qualification
10063 * reports from firmware. Note the negative logic.
10065 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10066 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10067 I40E_AQ_EVENT_MEDIA_NA |
10068 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10070 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10071 i40e_stat_str(&pf->hw, ret),
10072 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10074 /* make sure our flow control settings are restored */
10075 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
10077 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
10078 i40e_stat_str(&pf->hw, ret),
10079 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10081 /* Rebuild the VSIs and VEBs that existed before reset.
10082 * They are still in our local switch element arrays, so only
10083 * need to rebuild the switch model in the HW.
10085 * If there were VEBs but the reconstitution failed, we'll try
10086 * try to recover minimal use by getting the basic PF VSI working.
10088 if (vsi->uplink_seid != pf->mac_seid) {
10089 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10090 /* find the one VEB connected to the MAC, and find orphans */
10091 for (v = 0; v < I40E_MAX_VEB; v++) {
10095 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10096 pf->veb[v]->uplink_seid == 0) {
10097 ret = i40e_reconstitute_veb(pf->veb[v]);
10102 /* If Main VEB failed, we're in deep doodoo,
10103 * so give up rebuilding the switch and set up
10104 * for minimal rebuild of PF VSI.
10105 * If orphan failed, we'll report the error
10106 * but try to keep going.
10108 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10109 dev_info(&pf->pdev->dev,
10110 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10112 vsi->uplink_seid = pf->mac_seid;
10114 } else if (pf->veb[v]->uplink_seid == 0) {
10115 dev_info(&pf->pdev->dev,
10116 "rebuild of orphan VEB failed: %d\n",
10123 if (vsi->uplink_seid == pf->mac_seid) {
10124 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10125 /* no VEB, so rebuild only the Main VSI */
10126 ret = i40e_add_vsi(vsi);
10128 dev_info(&pf->pdev->dev,
10129 "rebuild of Main VSI failed: %d\n", ret);
10134 if (vsi->mqprio_qopt.max_rate[0]) {
10135 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10138 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10139 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10143 credits = max_tx_rate;
10144 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10145 dev_dbg(&vsi->back->pdev->dev,
10146 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10152 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10156 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10157 * for this main VSI if they exist
10159 ret = i40e_rebuild_channels(vsi);
10163 /* Reconfigure hardware for allowing smaller MSS in the case
10164 * of TSO, so that we avoid the MDD being fired and causing
10165 * a reset in the case of small MSS+TSO.
10167 #define I40E_REG_MSS 0x000E64DC
10168 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10169 #define I40E_64BYTE_MSS 0x400000
10170 val = rd32(hw, I40E_REG_MSS);
10171 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10172 val &= ~I40E_REG_MSS_MIN_MASK;
10173 val |= I40E_64BYTE_MSS;
10174 wr32(hw, I40E_REG_MSS, val);
10177 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10179 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10181 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10182 i40e_stat_str(&pf->hw, ret),
10183 i40e_aq_str(&pf->hw,
10184 pf->hw.aq.asq_last_status));
10186 /* reinit the misc interrupt */
10187 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10188 ret = i40e_setup_misc_vector(pf);
10190 /* Add a filter to drop all Flow control frames from any VSI from being
10191 * transmitted. By doing so we stop a malicious VF from sending out
10192 * PAUSE or PFC frames and potentially controlling traffic for other
10194 * The FW can still send Flow control frames if enabled.
10196 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10197 pf->main_vsi_seid);
10199 /* restart the VSIs that were rebuilt and running before the reset */
10200 i40e_pf_unquiesce_all_vsi(pf);
10202 /* Release the RTNL lock before we start resetting VFs */
10203 if (!lock_acquired)
10206 /* Restore promiscuous settings */
10207 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10209 dev_warn(&pf->pdev->dev,
10210 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10211 pf->cur_promisc ? "on" : "off",
10212 i40e_stat_str(&pf->hw, ret),
10213 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10215 i40e_reset_all_vfs(pf, true);
10217 /* tell the firmware that we're starting */
10218 i40e_send_version(pf);
10220 /* We've already released the lock, so don't do it again */
10221 goto end_core_reset;
10224 if (!lock_acquired)
10227 clear_bit(__I40E_RESET_FAILED, pf->state);
10229 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10230 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10234 * i40e_reset_and_rebuild - reset and rebuild using a saved config
10235 * @pf: board private structure
10236 * @reinit: if the Main VSI needs to re-initialized.
10237 * @lock_acquired: indicates whether or not the lock has been acquired
10238 * before this function was called.
10240 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10241 bool lock_acquired)
10244 /* Now we wait for GRST to settle out.
10245 * We don't have to delete the VEBs or VSIs from the hw switch
10246 * because the reset will make them disappear.
10248 ret = i40e_reset(pf);
10250 i40e_rebuild(pf, reinit, lock_acquired);
10254 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10255 * @pf: board private structure
10257 * Close up the VFs and other things in prep for a Core Reset,
10258 * then get ready to rebuild the world.
10259 * @lock_acquired: indicates whether or not the lock has been acquired
10260 * before this function was called.
10262 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10264 i40e_prep_for_reset(pf, lock_acquired);
10265 i40e_reset_and_rebuild(pf, false, lock_acquired);
10269 * i40e_handle_mdd_event
10270 * @pf: pointer to the PF structure
10272 * Called from the MDD irq handler to identify possibly malicious vfs
10274 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10276 struct i40e_hw *hw = &pf->hw;
10277 bool mdd_detected = false;
10278 struct i40e_vf *vf;
10282 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10285 /* find what triggered the MDD event */
10286 reg = rd32(hw, I40E_GL_MDET_TX);
10287 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
10288 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
10289 I40E_GL_MDET_TX_PF_NUM_SHIFT;
10290 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
10291 I40E_GL_MDET_TX_VF_NUM_SHIFT;
10292 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
10293 I40E_GL_MDET_TX_EVENT_SHIFT;
10294 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
10295 I40E_GL_MDET_TX_QUEUE_SHIFT) -
10296 pf->hw.func_caps.base_queue;
10297 if (netif_msg_tx_err(pf))
10298 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
10299 event, queue, pf_num, vf_num);
10300 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
10301 mdd_detected = true;
10303 reg = rd32(hw, I40E_GL_MDET_RX);
10304 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
10305 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
10306 I40E_GL_MDET_RX_FUNCTION_SHIFT;
10307 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
10308 I40E_GL_MDET_RX_EVENT_SHIFT;
10309 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
10310 I40E_GL_MDET_RX_QUEUE_SHIFT) -
10311 pf->hw.func_caps.base_queue;
10312 if (netif_msg_rx_err(pf))
10313 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
10314 event, queue, func);
10315 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
10316 mdd_detected = true;
10319 if (mdd_detected) {
10320 reg = rd32(hw, I40E_PF_MDET_TX);
10321 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
10322 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
10323 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
10325 reg = rd32(hw, I40E_PF_MDET_RX);
10326 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
10327 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
10328 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
10332 /* see if one of the VFs needs its hand slapped */
10333 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
10335 reg = rd32(hw, I40E_VP_MDET_TX(i));
10336 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
10337 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
10338 vf->num_mdd_events++;
10339 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
10341 dev_info(&pf->pdev->dev,
10342 "Use PF Control I/F to re-enable the VF\n");
10343 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10346 reg = rd32(hw, I40E_VP_MDET_RX(i));
10347 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
10348 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
10349 vf->num_mdd_events++;
10350 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
10352 dev_info(&pf->pdev->dev,
10353 "Use PF Control I/F to re-enable the VF\n");
10354 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
10358 /* re-enable mdd interrupt cause */
10359 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
10360 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
10361 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
10362 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
10366 static const char *i40e_tunnel_name(u8 type)
10369 case UDP_TUNNEL_TYPE_VXLAN:
10371 case UDP_TUNNEL_TYPE_GENEVE:
10379 * i40e_sync_udp_filters - Trigger a sync event for existing UDP filters
10380 * @pf: board private structure
10382 static void i40e_sync_udp_filters(struct i40e_pf *pf)
10386 /* loop through and set pending bit for all active UDP filters */
10387 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
10388 if (pf->udp_ports[i].port)
10389 pf->pending_udp_bitmap |= BIT_ULL(i);
10392 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
10396 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
10397 * @pf: board private structure
10399 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
10401 struct i40e_hw *hw = &pf->hw;
10402 u8 filter_index, type;
10406 if (!test_and_clear_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state))
10409 /* acquire RTNL to maintain state of flags and port requests */
10412 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
10413 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
10414 struct i40e_udp_port_config *udp_port;
10415 i40e_status ret = 0;
10417 udp_port = &pf->udp_ports[i];
10418 pf->pending_udp_bitmap &= ~BIT_ULL(i);
10420 port = READ_ONCE(udp_port->port);
10421 type = READ_ONCE(udp_port->type);
10422 filter_index = READ_ONCE(udp_port->filter_index);
10424 /* release RTNL while we wait on AQ command */
10428 ret = i40e_aq_add_udp_tunnel(hw, port,
10432 else if (filter_index != I40E_UDP_PORT_INDEX_UNUSED)
10433 ret = i40e_aq_del_udp_tunnel(hw, filter_index,
10436 /* reacquire RTNL so we can update filter_index */
10440 dev_info(&pf->pdev->dev,
10441 "%s %s port %d, index %d failed, err %s aq_err %s\n",
10442 i40e_tunnel_name(type),
10443 port ? "add" : "delete",
10446 i40e_stat_str(&pf->hw, ret),
10447 i40e_aq_str(&pf->hw,
10448 pf->hw.aq.asq_last_status));
10450 /* failed to add, just reset port,
10451 * drop pending bit for any deletion
10453 udp_port->port = 0;
10454 pf->pending_udp_bitmap &= ~BIT_ULL(i);
10457 /* record filter index on success */
10458 udp_port->filter_index = filter_index;
10467 * i40e_service_task - Run the driver's async subtasks
10468 * @work: pointer to work_struct containing our data
10470 static void i40e_service_task(struct work_struct *work)
10472 struct i40e_pf *pf = container_of(work,
10475 unsigned long start_time = jiffies;
10477 /* don't bother with service tasks if a reset is in progress */
10478 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
10479 test_bit(__I40E_SUSPENDED, pf->state))
10482 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
10485 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10486 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
10487 i40e_sync_filters_subtask(pf);
10488 i40e_reset_subtask(pf);
10489 i40e_handle_mdd_event(pf);
10490 i40e_vc_process_vflr_event(pf);
10491 i40e_watchdog_subtask(pf);
10492 i40e_fdir_reinit_subtask(pf);
10493 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
10494 /* Client subtask will reopen next time through. */
10495 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
10498 i40e_client_subtask(pf);
10499 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
10501 i40e_notify_client_of_l2_param_changes(
10502 pf->vsi[pf->lan_vsi]);
10504 i40e_sync_filters_subtask(pf);
10505 i40e_sync_udp_filters_subtask(pf);
10507 i40e_reset_subtask(pf);
10510 i40e_clean_adminq_subtask(pf);
10512 /* flush memory to make sure state is correct before next watchdog */
10513 smp_mb__before_atomic();
10514 clear_bit(__I40E_SERVICE_SCHED, pf->state);
10516 /* If the tasks have taken longer than one timer cycle or there
10517 * is more work to be done, reschedule the service task now
10518 * rather than wait for the timer to tick again.
10520 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
10521 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
10522 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
10523 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
10524 i40e_service_event_schedule(pf);
10528 * i40e_service_timer - timer callback
10529 * @data: pointer to PF struct
10531 static void i40e_service_timer(struct timer_list *t)
10533 struct i40e_pf *pf = from_timer(pf, t, service_timer);
10535 mod_timer(&pf->service_timer,
10536 round_jiffies(jiffies + pf->service_timer_period));
10537 i40e_service_event_schedule(pf);
10541 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
10542 * @vsi: the VSI being configured
10544 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
10546 struct i40e_pf *pf = vsi->back;
10548 switch (vsi->type) {
10549 case I40E_VSI_MAIN:
10550 vsi->alloc_queue_pairs = pf->num_lan_qps;
10551 if (!vsi->num_tx_desc)
10552 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10553 I40E_REQ_DESCRIPTOR_MULTIPLE);
10554 if (!vsi->num_rx_desc)
10555 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10556 I40E_REQ_DESCRIPTOR_MULTIPLE);
10557 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10558 vsi->num_q_vectors = pf->num_lan_msix;
10560 vsi->num_q_vectors = 1;
10564 case I40E_VSI_FDIR:
10565 vsi->alloc_queue_pairs = 1;
10566 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
10567 I40E_REQ_DESCRIPTOR_MULTIPLE);
10568 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
10569 I40E_REQ_DESCRIPTOR_MULTIPLE);
10570 vsi->num_q_vectors = pf->num_fdsb_msix;
10573 case I40E_VSI_VMDQ2:
10574 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
10575 if (!vsi->num_tx_desc)
10576 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10577 I40E_REQ_DESCRIPTOR_MULTIPLE);
10578 if (!vsi->num_rx_desc)
10579 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10580 I40E_REQ_DESCRIPTOR_MULTIPLE);
10581 vsi->num_q_vectors = pf->num_vmdq_msix;
10584 case I40E_VSI_SRIOV:
10585 vsi->alloc_queue_pairs = pf->num_vf_qps;
10586 if (!vsi->num_tx_desc)
10587 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10588 I40E_REQ_DESCRIPTOR_MULTIPLE);
10589 if (!vsi->num_rx_desc)
10590 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
10591 I40E_REQ_DESCRIPTOR_MULTIPLE);
10603 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
10604 * @vsi: VSI pointer
10605 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
10607 * On error: returns error code (negative)
10608 * On success: returns 0
10610 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
10612 struct i40e_ring **next_rings;
10616 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
10617 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
10618 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
10619 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
10620 if (!vsi->tx_rings)
10622 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
10623 if (i40e_enabled_xdp_vsi(vsi)) {
10624 vsi->xdp_rings = next_rings;
10625 next_rings += vsi->alloc_queue_pairs;
10627 vsi->rx_rings = next_rings;
10629 if (alloc_qvectors) {
10630 /* allocate memory for q_vector pointers */
10631 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
10632 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
10633 if (!vsi->q_vectors) {
10641 kfree(vsi->tx_rings);
10646 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
10647 * @pf: board private structure
10648 * @type: type of VSI
10650 * On error: returns error code (negative)
10651 * On success: returns vsi index in PF (positive)
10653 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
10656 struct i40e_vsi *vsi;
10660 /* Need to protect the allocation of the VSIs at the PF level */
10661 mutex_lock(&pf->switch_mutex);
10663 /* VSI list may be fragmented if VSI creation/destruction has
10664 * been happening. We can afford to do a quick scan to look
10665 * for any free VSIs in the list.
10667 * find next empty vsi slot, looping back around if necessary
10670 while (i < pf->num_alloc_vsi && pf->vsi[i])
10672 if (i >= pf->num_alloc_vsi) {
10674 while (i < pf->next_vsi && pf->vsi[i])
10678 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
10679 vsi_idx = i; /* Found one! */
10682 goto unlock_pf; /* out of VSI slots! */
10684 pf->next_vsi = ++i;
10686 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
10693 set_bit(__I40E_VSI_DOWN, vsi->state);
10695 vsi->idx = vsi_idx;
10696 vsi->int_rate_limit = 0;
10697 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
10698 pf->rss_table_size : 64;
10699 vsi->netdev_registered = false;
10700 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
10701 hash_init(vsi->mac_filter_hash);
10702 vsi->irqs_ready = false;
10704 if (type == I40E_VSI_MAIN) {
10705 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
10706 if (!vsi->af_xdp_zc_qps)
10710 ret = i40e_set_num_rings_in_vsi(vsi);
10714 ret = i40e_vsi_alloc_arrays(vsi, true);
10718 /* Setup default MSIX irq handler for VSI */
10719 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
10721 /* Initialize VSI lock */
10722 spin_lock_init(&vsi->mac_filter_hash_lock);
10723 pf->vsi[vsi_idx] = vsi;
10728 bitmap_free(vsi->af_xdp_zc_qps);
10729 pf->next_vsi = i - 1;
10732 mutex_unlock(&pf->switch_mutex);
10737 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
10738 * @vsi: VSI pointer
10739 * @free_qvectors: a bool to specify if q_vectors need to be freed.
10741 * On error: returns error code (negative)
10742 * On success: returns 0
10744 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
10746 /* free the ring and vector containers */
10747 if (free_qvectors) {
10748 kfree(vsi->q_vectors);
10749 vsi->q_vectors = NULL;
10751 kfree(vsi->tx_rings);
10752 vsi->tx_rings = NULL;
10753 vsi->rx_rings = NULL;
10754 vsi->xdp_rings = NULL;
10758 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
10760 * @vsi: Pointer to VSI structure
10762 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
10767 kfree(vsi->rss_hkey_user);
10768 vsi->rss_hkey_user = NULL;
10770 kfree(vsi->rss_lut_user);
10771 vsi->rss_lut_user = NULL;
10775 * i40e_vsi_clear - Deallocate the VSI provided
10776 * @vsi: the VSI being un-configured
10778 static int i40e_vsi_clear(struct i40e_vsi *vsi)
10780 struct i40e_pf *pf;
10789 mutex_lock(&pf->switch_mutex);
10790 if (!pf->vsi[vsi->idx]) {
10791 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
10792 vsi->idx, vsi->idx, vsi->type);
10796 if (pf->vsi[vsi->idx] != vsi) {
10797 dev_err(&pf->pdev->dev,
10798 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
10799 pf->vsi[vsi->idx]->idx,
10800 pf->vsi[vsi->idx]->type,
10801 vsi->idx, vsi->type);
10805 /* updates the PF for this cleared vsi */
10806 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
10807 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
10809 bitmap_free(vsi->af_xdp_zc_qps);
10810 i40e_vsi_free_arrays(vsi, true);
10811 i40e_clear_rss_config_user(vsi);
10813 pf->vsi[vsi->idx] = NULL;
10814 if (vsi->idx < pf->next_vsi)
10815 pf->next_vsi = vsi->idx;
10818 mutex_unlock(&pf->switch_mutex);
10826 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
10827 * @vsi: the VSI being cleaned
10829 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
10833 if (vsi->tx_rings && vsi->tx_rings[0]) {
10834 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10835 kfree_rcu(vsi->tx_rings[i], rcu);
10836 WRITE_ONCE(vsi->tx_rings[i], NULL);
10837 WRITE_ONCE(vsi->rx_rings[i], NULL);
10838 if (vsi->xdp_rings)
10839 WRITE_ONCE(vsi->xdp_rings[i], NULL);
10845 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
10846 * @vsi: the VSI being configured
10848 static int i40e_alloc_rings(struct i40e_vsi *vsi)
10850 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
10851 struct i40e_pf *pf = vsi->back;
10852 struct i40e_ring *ring;
10854 /* Set basic values in the rings to be used later during open() */
10855 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
10856 /* allocate space for both Tx and Rx in one shot */
10857 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
10861 ring->queue_index = i;
10862 ring->reg_idx = vsi->base_queue + i;
10863 ring->ring_active = false;
10865 ring->netdev = vsi->netdev;
10866 ring->dev = &pf->pdev->dev;
10867 ring->count = vsi->num_tx_desc;
10870 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10871 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10872 ring->itr_setting = pf->tx_itr_default;
10873 WRITE_ONCE(vsi->tx_rings[i], ring++);
10875 if (!i40e_enabled_xdp_vsi(vsi))
10878 ring->queue_index = vsi->alloc_queue_pairs + i;
10879 ring->reg_idx = vsi->base_queue + ring->queue_index;
10880 ring->ring_active = false;
10882 ring->netdev = NULL;
10883 ring->dev = &pf->pdev->dev;
10884 ring->count = vsi->num_tx_desc;
10887 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
10888 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
10889 set_ring_xdp(ring);
10890 ring->itr_setting = pf->tx_itr_default;
10891 WRITE_ONCE(vsi->xdp_rings[i], ring++);
10894 ring->queue_index = i;
10895 ring->reg_idx = vsi->base_queue + i;
10896 ring->ring_active = false;
10898 ring->netdev = vsi->netdev;
10899 ring->dev = &pf->pdev->dev;
10900 ring->count = vsi->num_rx_desc;
10903 ring->itr_setting = pf->rx_itr_default;
10904 WRITE_ONCE(vsi->rx_rings[i], ring);
10910 i40e_vsi_clear_rings(vsi);
10915 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
10916 * @pf: board private structure
10917 * @vectors: the number of MSI-X vectors to request
10919 * Returns the number of vectors reserved, or error
10921 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
10923 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
10924 I40E_MIN_MSIX, vectors);
10926 dev_info(&pf->pdev->dev,
10927 "MSI-X vector reservation failed: %d\n", vectors);
10935 * i40e_init_msix - Setup the MSIX capability
10936 * @pf: board private structure
10938 * Work with the OS to set up the MSIX vectors needed.
10940 * Returns the number of vectors reserved or negative on failure
10942 static int i40e_init_msix(struct i40e_pf *pf)
10944 struct i40e_hw *hw = &pf->hw;
10945 int cpus, extra_vectors;
10949 int iwarp_requested = 0;
10951 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
10954 /* The number of vectors we'll request will be comprised of:
10955 * - Add 1 for "other" cause for Admin Queue events, etc.
10956 * - The number of LAN queue pairs
10957 * - Queues being used for RSS.
10958 * We don't need as many as max_rss_size vectors.
10959 * use rss_size instead in the calculation since that
10960 * is governed by number of cpus in the system.
10961 * - assumes symmetric Tx/Rx pairing
10962 * - The number of VMDq pairs
10963 * - The CPU count within the NUMA node if iWARP is enabled
10964 * Once we count this up, try the request.
10966 * If we can't get what we want, we'll simplify to nearly nothing
10967 * and try again. If that still fails, we punt.
10969 vectors_left = hw->func_caps.num_msix_vectors;
10972 /* reserve one vector for miscellaneous handler */
10973 if (vectors_left) {
10978 /* reserve some vectors for the main PF traffic queues. Initially we
10979 * only reserve at most 50% of the available vectors, in the case that
10980 * the number of online CPUs is large. This ensures that we can enable
10981 * extra features as well. Once we've enabled the other features, we
10982 * will use any remaining vectors to reach as close as we can to the
10983 * number of online CPUs.
10985 cpus = num_online_cpus();
10986 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
10987 vectors_left -= pf->num_lan_msix;
10989 /* reserve one vector for sideband flow director */
10990 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10991 if (vectors_left) {
10992 pf->num_fdsb_msix = 1;
10996 pf->num_fdsb_msix = 0;
11000 /* can we reserve enough for iWARP? */
11001 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11002 iwarp_requested = pf->num_iwarp_msix;
11005 pf->num_iwarp_msix = 0;
11006 else if (vectors_left < pf->num_iwarp_msix)
11007 pf->num_iwarp_msix = 1;
11008 v_budget += pf->num_iwarp_msix;
11009 vectors_left -= pf->num_iwarp_msix;
11012 /* any vectors left over go for VMDq support */
11013 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11014 if (!vectors_left) {
11015 pf->num_vmdq_msix = 0;
11016 pf->num_vmdq_qps = 0;
11018 int vmdq_vecs_wanted =
11019 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11021 min_t(int, vectors_left, vmdq_vecs_wanted);
11023 /* if we're short on vectors for what's desired, we limit
11024 * the queues per vmdq. If this is still more than are
11025 * available, the user will need to change the number of
11026 * queues/vectors used by the PF later with the ethtool
11029 if (vectors_left < vmdq_vecs_wanted) {
11030 pf->num_vmdq_qps = 1;
11031 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11032 vmdq_vecs = min_t(int,
11036 pf->num_vmdq_msix = pf->num_vmdq_qps;
11038 v_budget += vmdq_vecs;
11039 vectors_left -= vmdq_vecs;
11043 /* On systems with a large number of SMP cores, we previously limited
11044 * the number of vectors for num_lan_msix to be at most 50% of the
11045 * available vectors, to allow for other features. Now, we add back
11046 * the remaining vectors. However, we ensure that the total
11047 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11048 * calculate the number of vectors we can add without going over the
11049 * cap of CPUs. For systems with a small number of CPUs this will be
11052 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11053 pf->num_lan_msix += extra_vectors;
11054 vectors_left -= extra_vectors;
11056 WARN(vectors_left < 0,
11057 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11059 v_budget += pf->num_lan_msix;
11060 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11062 if (!pf->msix_entries)
11065 for (i = 0; i < v_budget; i++)
11066 pf->msix_entries[i].entry = i;
11067 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11069 if (v_actual < I40E_MIN_MSIX) {
11070 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11071 kfree(pf->msix_entries);
11072 pf->msix_entries = NULL;
11073 pci_disable_msix(pf->pdev);
11076 } else if (v_actual == I40E_MIN_MSIX) {
11077 /* Adjust for minimal MSIX use */
11078 pf->num_vmdq_vsis = 0;
11079 pf->num_vmdq_qps = 0;
11080 pf->num_lan_qps = 1;
11081 pf->num_lan_msix = 1;
11083 } else if (v_actual != v_budget) {
11084 /* If we have limited resources, we will start with no vectors
11085 * for the special features and then allocate vectors to some
11086 * of these features based on the policy and at the end disable
11087 * the features that did not get any vectors.
11091 dev_info(&pf->pdev->dev,
11092 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11093 v_actual, v_budget);
11094 /* reserve the misc vector */
11095 vec = v_actual - 1;
11097 /* Scale vector usage down */
11098 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11099 pf->num_vmdq_vsis = 1;
11100 pf->num_vmdq_qps = 1;
11102 /* partition out the remaining vectors */
11105 pf->num_lan_msix = 1;
11108 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11109 pf->num_lan_msix = 1;
11110 pf->num_iwarp_msix = 1;
11112 pf->num_lan_msix = 2;
11116 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11117 pf->num_iwarp_msix = min_t(int, (vec / 3),
11119 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11120 I40E_DEFAULT_NUM_VMDQ_VSI);
11122 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11123 I40E_DEFAULT_NUM_VMDQ_VSI);
11125 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11126 pf->num_fdsb_msix = 1;
11129 pf->num_lan_msix = min_t(int,
11130 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11132 pf->num_lan_qps = pf->num_lan_msix;
11137 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11138 (pf->num_fdsb_msix == 0)) {
11139 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11140 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11141 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11143 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11144 (pf->num_vmdq_msix == 0)) {
11145 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11146 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11149 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11150 (pf->num_iwarp_msix == 0)) {
11151 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11152 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11154 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11155 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11157 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11159 pf->num_iwarp_msix);
11165 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11166 * @vsi: the VSI being configured
11167 * @v_idx: index of the vector in the vsi struct
11168 * @cpu: cpu to be used on affinity_mask
11170 * We allocate one q_vector. If allocation fails we return -ENOMEM.
11172 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
11174 struct i40e_q_vector *q_vector;
11176 /* allocate q_vector */
11177 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11181 q_vector->vsi = vsi;
11182 q_vector->v_idx = v_idx;
11183 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11186 netif_napi_add(vsi->netdev, &q_vector->napi,
11187 i40e_napi_poll, NAPI_POLL_WEIGHT);
11189 /* tie q_vector and vsi together */
11190 vsi->q_vectors[v_idx] = q_vector;
11196 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11197 * @vsi: the VSI being configured
11199 * We allocate one q_vector per queue interrupt. If allocation fails we
11202 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11204 struct i40e_pf *pf = vsi->back;
11205 int err, v_idx, num_q_vectors, current_cpu;
11207 /* if not MSIX, give the one vector only to the LAN VSI */
11208 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11209 num_q_vectors = vsi->num_q_vectors;
11210 else if (vsi == pf->vsi[pf->lan_vsi])
11215 current_cpu = cpumask_first(cpu_online_mask);
11217 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11218 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
11221 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
11222 if (unlikely(current_cpu >= nr_cpu_ids))
11223 current_cpu = cpumask_first(cpu_online_mask);
11230 i40e_free_q_vector(vsi, v_idx);
11236 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11237 * @pf: board private structure to initialize
11239 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11244 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11245 vectors = i40e_init_msix(pf);
11247 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
11248 I40E_FLAG_IWARP_ENABLED |
11249 I40E_FLAG_RSS_ENABLED |
11250 I40E_FLAG_DCB_CAPABLE |
11251 I40E_FLAG_DCB_ENABLED |
11252 I40E_FLAG_SRIOV_ENABLED |
11253 I40E_FLAG_FD_SB_ENABLED |
11254 I40E_FLAG_FD_ATR_ENABLED |
11255 I40E_FLAG_VMDQ_ENABLED);
11256 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11258 /* rework the queue expectations without MSIX */
11259 i40e_determine_queue_usage(pf);
11263 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11264 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11265 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11266 vectors = pci_enable_msi(pf->pdev);
11268 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11270 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11272 vectors = 1; /* one MSI or Legacy vector */
11275 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11276 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11278 /* set up vector assignment tracking */
11279 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11280 pf->irq_pile = kzalloc(size, GFP_KERNEL);
11284 pf->irq_pile->num_entries = vectors;
11285 pf->irq_pile->search_hint = 0;
11287 /* track first vector for misc interrupts, ignore return */
11288 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11294 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11295 * @pf: private board data structure
11297 * Restore the interrupt scheme that was cleared when we suspended the
11298 * device. This should be called during resume to re-allocate the q_vectors
11299 * and reacquire IRQs.
11301 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11305 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11306 * scheme. We need to re-enabled them here in order to attempt to
11307 * re-acquire the MSI or MSI-X vectors
11309 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11311 err = i40e_init_interrupt_scheme(pf);
11315 /* Now that we've re-acquired IRQs, we need to remap the vectors and
11316 * rings together again.
11318 for (i = 0; i < pf->num_alloc_vsi; i++) {
11320 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11323 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11327 err = i40e_setup_misc_vector(pf);
11331 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11332 i40e_client_update_msix_info(pf);
11339 i40e_vsi_free_q_vectors(pf->vsi[i]);
11346 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11347 * non queue events in recovery mode
11348 * @pf: board private structure
11350 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11351 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11352 * This is handled differently than in recovery mode since no Tx/Rx resources
11353 * are being allocated.
11355 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11359 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11360 err = i40e_setup_misc_vector(pf);
11363 dev_info(&pf->pdev->dev,
11364 "MSI-X misc vector request failed, error %d\n",
11369 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11371 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11375 dev_info(&pf->pdev->dev,
11376 "MSI/legacy misc vector request failed, error %d\n",
11380 i40e_enable_misc_int_causes(pf);
11381 i40e_irq_dynamic_enable_icr0(pf);
11388 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11389 * @pf: board private structure
11391 * This sets up the handler for MSIX 0, which is used to manage the
11392 * non-queue interrupts, e.g. AdminQ and errors. This is not used
11393 * when in MSI or Legacy interrupt mode.
11395 static int i40e_setup_misc_vector(struct i40e_pf *pf)
11397 struct i40e_hw *hw = &pf->hw;
11400 /* Only request the IRQ once, the first time through. */
11401 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
11402 err = request_irq(pf->msix_entries[0].vector,
11403 i40e_intr, 0, pf->int_name, pf);
11405 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
11406 dev_info(&pf->pdev->dev,
11407 "request_irq for %s failed: %d\n",
11408 pf->int_name, err);
11413 i40e_enable_misc_int_causes(pf);
11415 /* associate no queues to the misc vector */
11416 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
11417 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
11421 i40e_irq_dynamic_enable_icr0(pf);
11427 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
11428 * @vsi: Pointer to vsi structure
11429 * @seed: Buffter to store the hash keys
11430 * @lut: Buffer to store the lookup table entries
11431 * @lut_size: Size of buffer to store the lookup table entries
11433 * Return 0 on success, negative on failure
11435 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
11436 u8 *lut, u16 lut_size)
11438 struct i40e_pf *pf = vsi->back;
11439 struct i40e_hw *hw = &pf->hw;
11443 ret = i40e_aq_get_rss_key(hw, vsi->id,
11444 (struct i40e_aqc_get_set_rss_key_data *)seed);
11446 dev_info(&pf->pdev->dev,
11447 "Cannot get RSS key, err %s aq_err %s\n",
11448 i40e_stat_str(&pf->hw, ret),
11449 i40e_aq_str(&pf->hw,
11450 pf->hw.aq.asq_last_status));
11456 bool pf_lut = vsi->type == I40E_VSI_MAIN;
11458 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11460 dev_info(&pf->pdev->dev,
11461 "Cannot get RSS lut, err %s aq_err %s\n",
11462 i40e_stat_str(&pf->hw, ret),
11463 i40e_aq_str(&pf->hw,
11464 pf->hw.aq.asq_last_status));
11473 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
11474 * @vsi: Pointer to vsi structure
11475 * @seed: RSS hash seed
11476 * @lut: Lookup table
11477 * @lut_size: Lookup table size
11479 * Returns 0 on success, negative on failure
11481 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
11482 const u8 *lut, u16 lut_size)
11484 struct i40e_pf *pf = vsi->back;
11485 struct i40e_hw *hw = &pf->hw;
11486 u16 vf_id = vsi->vf_id;
11489 /* Fill out hash function seed */
11491 u32 *seed_dw = (u32 *)seed;
11493 if (vsi->type == I40E_VSI_MAIN) {
11494 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11495 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
11496 } else if (vsi->type == I40E_VSI_SRIOV) {
11497 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
11498 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
11500 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
11505 u32 *lut_dw = (u32 *)lut;
11507 if (vsi->type == I40E_VSI_MAIN) {
11508 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11510 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11511 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
11512 } else if (vsi->type == I40E_VSI_SRIOV) {
11513 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
11515 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
11516 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
11518 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
11527 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
11528 * @vsi: Pointer to VSI structure
11529 * @seed: Buffer to store the keys
11530 * @lut: Buffer to store the lookup table entries
11531 * @lut_size: Size of buffer to store the lookup table entries
11533 * Returns 0 on success, negative on failure
11535 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
11536 u8 *lut, u16 lut_size)
11538 struct i40e_pf *pf = vsi->back;
11539 struct i40e_hw *hw = &pf->hw;
11543 u32 *seed_dw = (u32 *)seed;
11545 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
11546 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
11549 u32 *lut_dw = (u32 *)lut;
11551 if (lut_size != I40E_HLUT_ARRAY_SIZE)
11553 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
11554 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
11561 * i40e_config_rss - Configure RSS keys and lut
11562 * @vsi: Pointer to VSI structure
11563 * @seed: RSS hash seed
11564 * @lut: Lookup table
11565 * @lut_size: Lookup table size
11567 * Returns 0 on success, negative on failure
11569 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
11571 struct i40e_pf *pf = vsi->back;
11573 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
11574 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
11576 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
11580 * i40e_get_rss - Get RSS keys and lut
11581 * @vsi: Pointer to VSI structure
11582 * @seed: Buffer to store the keys
11583 * @lut: Buffer to store the lookup table entries
11584 * @lut_size: Size of buffer to store the lookup table entries
11586 * Returns 0 on success, negative on failure
11588 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
11590 struct i40e_pf *pf = vsi->back;
11592 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
11593 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
11595 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
11599 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
11600 * @pf: Pointer to board private structure
11601 * @lut: Lookup table
11602 * @rss_table_size: Lookup table size
11603 * @rss_size: Range of queue number for hashing
11605 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
11606 u16 rss_table_size, u16 rss_size)
11610 for (i = 0; i < rss_table_size; i++)
11611 lut[i] = i % rss_size;
11615 * i40e_pf_config_rss - Prepare for RSS if used
11616 * @pf: board private structure
11618 static int i40e_pf_config_rss(struct i40e_pf *pf)
11620 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
11621 u8 seed[I40E_HKEY_ARRAY_SIZE];
11623 struct i40e_hw *hw = &pf->hw;
11628 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
11629 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
11630 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
11631 hena |= i40e_pf_get_default_rss_hena(pf);
11633 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
11634 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
11636 /* Determine the RSS table size based on the hardware capabilities */
11637 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
11638 reg_val = (pf->rss_table_size == 512) ?
11639 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
11640 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
11641 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
11643 /* Determine the RSS size of the VSI */
11644 if (!vsi->rss_size) {
11646 /* If the firmware does something weird during VSI init, we
11647 * could end up with zero TCs. Check for that to avoid
11648 * divide-by-zero. It probably won't pass traffic, but it also
11651 qcount = vsi->num_queue_pairs /
11652 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
11653 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
11655 if (!vsi->rss_size)
11658 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
11662 /* Use user configured lut if there is one, otherwise use default */
11663 if (vsi->rss_lut_user)
11664 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
11666 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
11668 /* Use user configured hash key if there is one, otherwise
11671 if (vsi->rss_hkey_user)
11672 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
11674 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
11675 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
11682 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
11683 * @pf: board private structure
11684 * @queue_count: the requested queue count for rss.
11686 * returns 0 if rss is not enabled, if enabled returns the final rss queue
11687 * count which may be different from the requested queue count.
11688 * Note: expects to be called while under rtnl_lock()
11690 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
11692 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
11695 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
11698 queue_count = min_t(int, queue_count, num_online_cpus());
11699 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
11701 if (queue_count != vsi->num_queue_pairs) {
11704 vsi->req_queue_pairs = queue_count;
11705 i40e_prep_for_reset(pf, true);
11707 pf->alloc_rss_size = new_rss_size;
11709 i40e_reset_and_rebuild(pf, true, true);
11711 /* Discard the user configured hash keys and lut, if less
11712 * queues are enabled.
11714 if (queue_count < vsi->rss_size) {
11715 i40e_clear_rss_config_user(vsi);
11716 dev_dbg(&pf->pdev->dev,
11717 "discard user configured hash keys and lut\n");
11720 /* Reset vsi->rss_size, as number of enabled queues changed */
11721 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
11722 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
11724 i40e_pf_config_rss(pf);
11726 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
11727 vsi->req_queue_pairs, pf->rss_size_max);
11728 return pf->alloc_rss_size;
11732 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
11733 * @pf: board private structure
11735 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
11737 i40e_status status;
11738 bool min_valid, max_valid;
11739 u32 max_bw, min_bw;
11741 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
11742 &min_valid, &max_valid);
11746 pf->min_bw = min_bw;
11748 pf->max_bw = max_bw;
11755 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
11756 * @pf: board private structure
11758 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
11760 struct i40e_aqc_configure_partition_bw_data bw_data;
11761 i40e_status status;
11763 /* Set the valid bit for this PF */
11764 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
11765 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
11766 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
11768 /* Set the new bandwidths */
11769 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
11775 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
11776 * @pf: board private structure
11778 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
11780 /* Commit temporary BW setting to permanent NVM image */
11781 enum i40e_admin_queue_err last_aq_status;
11785 if (pf->hw.partition_id != 1) {
11786 dev_info(&pf->pdev->dev,
11787 "Commit BW only works on partition 1! This is partition %d",
11788 pf->hw.partition_id);
11789 ret = I40E_NOT_SUPPORTED;
11790 goto bw_commit_out;
11793 /* Acquire NVM for read access */
11794 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
11795 last_aq_status = pf->hw.aq.asq_last_status;
11797 dev_info(&pf->pdev->dev,
11798 "Cannot acquire NVM for read access, err %s aq_err %s\n",
11799 i40e_stat_str(&pf->hw, ret),
11800 i40e_aq_str(&pf->hw, last_aq_status));
11801 goto bw_commit_out;
11804 /* Read word 0x10 of NVM - SW compatibility word 1 */
11805 ret = i40e_aq_read_nvm(&pf->hw,
11806 I40E_SR_NVM_CONTROL_WORD,
11807 0x10, sizeof(nvm_word), &nvm_word,
11809 /* Save off last admin queue command status before releasing
11812 last_aq_status = pf->hw.aq.asq_last_status;
11813 i40e_release_nvm(&pf->hw);
11815 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
11816 i40e_stat_str(&pf->hw, ret),
11817 i40e_aq_str(&pf->hw, last_aq_status));
11818 goto bw_commit_out;
11821 /* Wait a bit for NVM release to complete */
11824 /* Acquire NVM for write access */
11825 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
11826 last_aq_status = pf->hw.aq.asq_last_status;
11828 dev_info(&pf->pdev->dev,
11829 "Cannot acquire NVM for write access, err %s aq_err %s\n",
11830 i40e_stat_str(&pf->hw, ret),
11831 i40e_aq_str(&pf->hw, last_aq_status));
11832 goto bw_commit_out;
11834 /* Write it back out unchanged to initiate update NVM,
11835 * which will force a write of the shadow (alt) RAM to
11836 * the NVM - thus storing the bandwidth values permanently.
11838 ret = i40e_aq_update_nvm(&pf->hw,
11839 I40E_SR_NVM_CONTROL_WORD,
11840 0x10, sizeof(nvm_word),
11841 &nvm_word, true, 0, NULL);
11842 /* Save off last admin queue command status before releasing
11845 last_aq_status = pf->hw.aq.asq_last_status;
11846 i40e_release_nvm(&pf->hw);
11848 dev_info(&pf->pdev->dev,
11849 "BW settings NOT SAVED, err %s aq_err %s\n",
11850 i40e_stat_str(&pf->hw, ret),
11851 i40e_aq_str(&pf->hw, last_aq_status));
11858 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
11859 * @pf: board private structure to initialize
11861 * i40e_sw_init initializes the Adapter private data structure.
11862 * Fields are initialized based on PCI device information and
11863 * OS network device settings (MTU size).
11865 static int i40e_sw_init(struct i40e_pf *pf)
11870 /* Set default capability flags */
11871 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
11872 I40E_FLAG_MSI_ENABLED |
11873 I40E_FLAG_MSIX_ENABLED;
11875 /* Set default ITR */
11876 pf->rx_itr_default = I40E_ITR_RX_DEF;
11877 pf->tx_itr_default = I40E_ITR_TX_DEF;
11879 /* Depending on PF configurations, it is possible that the RSS
11880 * maximum might end up larger than the available queues
11882 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
11883 pf->alloc_rss_size = 1;
11884 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
11885 pf->rss_size_max = min_t(int, pf->rss_size_max,
11886 pf->hw.func_caps.num_tx_qp);
11887 if (pf->hw.func_caps.rss) {
11888 pf->flags |= I40E_FLAG_RSS_ENABLED;
11889 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
11890 num_online_cpus());
11893 /* MFP mode enabled */
11894 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
11895 pf->flags |= I40E_FLAG_MFP_ENABLED;
11896 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
11897 if (i40e_get_partition_bw_setting(pf)) {
11898 dev_warn(&pf->pdev->dev,
11899 "Could not get partition bw settings\n");
11901 dev_info(&pf->pdev->dev,
11902 "Partition BW Min = %8.8x, Max = %8.8x\n",
11903 pf->min_bw, pf->max_bw);
11905 /* nudge the Tx scheduler */
11906 i40e_set_partition_bw_setting(pf);
11910 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
11911 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
11912 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
11913 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
11914 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
11915 pf->hw.num_partitions > 1)
11916 dev_info(&pf->pdev->dev,
11917 "Flow Director Sideband mode Disabled in MFP mode\n");
11919 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
11920 pf->fdir_pf_filter_count =
11921 pf->hw.func_caps.fd_filters_guaranteed;
11922 pf->hw.fdir_shared_filter_count =
11923 pf->hw.func_caps.fd_filters_best_effort;
11926 if (pf->hw.mac.type == I40E_MAC_X722) {
11927 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
11928 I40E_HW_128_QP_RSS_CAPABLE |
11929 I40E_HW_ATR_EVICT_CAPABLE |
11930 I40E_HW_WB_ON_ITR_CAPABLE |
11931 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
11932 I40E_HW_NO_PCI_LINK_CHECK |
11933 I40E_HW_USE_SET_LLDP_MIB |
11934 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
11935 I40E_HW_PTP_L4_CAPABLE |
11936 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
11937 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
11939 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
11940 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
11941 I40E_FDEVICT_PCTYPE_DEFAULT) {
11942 dev_warn(&pf->pdev->dev,
11943 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
11944 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
11946 } else if ((pf->hw.aq.api_maj_ver > 1) ||
11947 ((pf->hw.aq.api_maj_ver == 1) &&
11948 (pf->hw.aq.api_min_ver > 4))) {
11949 /* Supported in FW API version higher than 1.4 */
11950 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
11953 /* Enable HW ATR eviction if possible */
11954 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
11955 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
11957 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11958 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
11959 (pf->hw.aq.fw_maj_ver < 4))) {
11960 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
11961 /* No DCB support for FW < v4.33 */
11962 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
11965 /* Disable FW LLDP if FW < v4.3 */
11966 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11967 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
11968 (pf->hw.aq.fw_maj_ver < 4)))
11969 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
11971 /* Use the FW Set LLDP MIB API if FW > v4.40 */
11972 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
11973 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
11974 (pf->hw.aq.fw_maj_ver >= 5)))
11975 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
11977 /* Enable PTP L4 if FW > v6.0 */
11978 if (pf->hw.mac.type == I40E_MAC_XL710 &&
11979 pf->hw.aq.fw_maj_ver >= 6)
11980 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
11982 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
11983 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
11984 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
11985 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
11988 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
11989 pf->flags |= I40E_FLAG_IWARP_ENABLED;
11990 /* IWARP needs one extra vector for CQP just like MISC.*/
11991 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
11993 /* Stopping FW LLDP engine is supported on XL710 and X722
11994 * starting from FW versions determined in i40e_init_adminq.
11995 * Stopping the FW LLDP engine is not supported on XL710
11996 * if NPAR is functioning so unset this hw flag in this case.
11998 if (pf->hw.mac.type == I40E_MAC_XL710 &&
11999 pf->hw.func_caps.npar_enable &&
12000 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12001 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12003 #ifdef CONFIG_PCI_IOV
12004 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12005 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12006 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12007 pf->num_req_vfs = min_t(int,
12008 pf->hw.func_caps.num_vfs,
12009 I40E_MAX_VF_COUNT);
12011 #endif /* CONFIG_PCI_IOV */
12012 pf->eeprom_version = 0xDEAD;
12013 pf->lan_veb = I40E_NO_VEB;
12014 pf->lan_vsi = I40E_NO_VSI;
12016 /* By default FW has this off for performance reasons */
12017 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12019 /* set up queue assignment tracking */
12020 size = sizeof(struct i40e_lump_tracking)
12021 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12022 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12023 if (!pf->qp_pile) {
12027 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12028 pf->qp_pile->search_hint = 0;
12030 pf->tx_timeout_recovery_level = 1;
12032 mutex_init(&pf->switch_mutex);
12039 * i40e_set_ntuple - set the ntuple feature flag and take action
12040 * @pf: board private structure to initialize
12041 * @features: the feature set that the stack is suggesting
12043 * returns a bool to indicate if reset needs to happen
12045 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12047 bool need_reset = false;
12049 /* Check if Flow Director n-tuple support was enabled or disabled. If
12050 * the state changed, we need to reset.
12052 if (features & NETIF_F_NTUPLE) {
12053 /* Enable filters and mark for reset */
12054 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12056 /* enable FD_SB only if there is MSI-X vector and no cloud
12059 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12060 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12061 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12064 /* turn off filters, mark for reset and clear SW filter list */
12065 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12067 i40e_fdir_filter_exit(pf);
12069 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12070 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12071 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12073 /* reset fd counters */
12074 pf->fd_add_err = 0;
12075 pf->fd_atr_cnt = 0;
12076 /* if ATR was auto disabled it can be re-enabled. */
12077 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12078 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12079 (I40E_DEBUG_FD & pf->hw.debug_mask))
12080 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12086 * i40e_clear_rss_lut - clear the rx hash lookup table
12087 * @vsi: the VSI being configured
12089 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12091 struct i40e_pf *pf = vsi->back;
12092 struct i40e_hw *hw = &pf->hw;
12093 u16 vf_id = vsi->vf_id;
12096 if (vsi->type == I40E_VSI_MAIN) {
12097 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12098 wr32(hw, I40E_PFQF_HLUT(i), 0);
12099 } else if (vsi->type == I40E_VSI_SRIOV) {
12100 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12101 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12103 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12108 * i40e_set_features - set the netdev feature flags
12109 * @netdev: ptr to the netdev being adjusted
12110 * @features: the feature set that the stack is suggesting
12111 * Note: expects to be called while under rtnl_lock()
12113 static int i40e_set_features(struct net_device *netdev,
12114 netdev_features_t features)
12116 struct i40e_netdev_priv *np = netdev_priv(netdev);
12117 struct i40e_vsi *vsi = np->vsi;
12118 struct i40e_pf *pf = vsi->back;
12121 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12122 i40e_pf_config_rss(pf);
12123 else if (!(features & NETIF_F_RXHASH) &&
12124 netdev->features & NETIF_F_RXHASH)
12125 i40e_clear_rss_lut(vsi);
12127 if (features & NETIF_F_HW_VLAN_CTAG_RX)
12128 i40e_vlan_stripping_enable(vsi);
12130 i40e_vlan_stripping_disable(vsi);
12132 if (!(features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12133 dev_err(&pf->pdev->dev,
12134 "Offloaded tc filters active, can't turn hw_tc_offload off");
12138 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12139 i40e_del_all_macvlans(vsi);
12141 need_reset = i40e_set_ntuple(pf, features);
12144 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12150 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
12151 * @pf: board private structure
12152 * @port: The UDP port to look up
12154 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
12156 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, u16 port)
12160 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
12161 /* Do not report ports with pending deletions as
12164 if (!port && (pf->pending_udp_bitmap & BIT_ULL(i)))
12166 if (pf->udp_ports[i].port == port)
12174 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
12175 * @netdev: This physical port's netdev
12176 * @ti: Tunnel endpoint information
12178 static void i40e_udp_tunnel_add(struct net_device *netdev,
12179 struct udp_tunnel_info *ti)
12181 struct i40e_netdev_priv *np = netdev_priv(netdev);
12182 struct i40e_vsi *vsi = np->vsi;
12183 struct i40e_pf *pf = vsi->back;
12184 u16 port = ntohs(ti->port);
12188 idx = i40e_get_udp_port_idx(pf, port);
12190 /* Check if port already exists */
12191 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
12192 netdev_info(netdev, "port %d already offloaded\n", port);
12196 /* Now check if there is space to add the new port */
12197 next_idx = i40e_get_udp_port_idx(pf, 0);
12199 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
12200 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
12205 switch (ti->type) {
12206 case UDP_TUNNEL_TYPE_VXLAN:
12207 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
12209 case UDP_TUNNEL_TYPE_GENEVE:
12210 if (!(pf->hw_features & I40E_HW_GENEVE_OFFLOAD_CAPABLE))
12212 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
12218 /* New port: add it and mark its index in the bitmap */
12219 pf->udp_ports[next_idx].port = port;
12220 pf->udp_ports[next_idx].filter_index = I40E_UDP_PORT_INDEX_UNUSED;
12221 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
12222 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
12226 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
12227 * @netdev: This physical port's netdev
12228 * @ti: Tunnel endpoint information
12230 static void i40e_udp_tunnel_del(struct net_device *netdev,
12231 struct udp_tunnel_info *ti)
12233 struct i40e_netdev_priv *np = netdev_priv(netdev);
12234 struct i40e_vsi *vsi = np->vsi;
12235 struct i40e_pf *pf = vsi->back;
12236 u16 port = ntohs(ti->port);
12239 idx = i40e_get_udp_port_idx(pf, port);
12241 /* Check if port already exists */
12242 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
12245 switch (ti->type) {
12246 case UDP_TUNNEL_TYPE_VXLAN:
12247 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
12250 case UDP_TUNNEL_TYPE_GENEVE:
12251 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
12258 /* if port exists, set it to 0 (mark for deletion)
12259 * and make it pending
12261 pf->udp_ports[idx].port = 0;
12263 /* Toggle pending bit instead of setting it. This way if we are
12264 * deleting a port that has yet to be added we just clear the pending
12265 * bit and don't have to worry about it.
12267 pf->pending_udp_bitmap ^= BIT_ULL(idx);
12268 set_bit(__I40E_UDP_FILTER_SYNC_PENDING, pf->state);
12272 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
12276 static int i40e_get_phys_port_id(struct net_device *netdev,
12277 struct netdev_phys_item_id *ppid)
12279 struct i40e_netdev_priv *np = netdev_priv(netdev);
12280 struct i40e_pf *pf = np->vsi->back;
12281 struct i40e_hw *hw = &pf->hw;
12283 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12284 return -EOPNOTSUPP;
12286 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12287 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12293 * i40e_ndo_fdb_add - add an entry to the hardware database
12294 * @ndm: the input from the stack
12295 * @tb: pointer to array of nladdr (unused)
12296 * @dev: the net device pointer
12297 * @addr: the MAC address entry being added
12299 * @flags: instructions from stack about fdb operation
12301 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12302 struct net_device *dev,
12303 const unsigned char *addr, u16 vid,
12305 struct netlink_ext_ack *extack)
12307 struct i40e_netdev_priv *np = netdev_priv(dev);
12308 struct i40e_pf *pf = np->vsi->back;
12311 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12312 return -EOPNOTSUPP;
12315 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12319 /* Hardware does not support aging addresses so if a
12320 * ndm_state is given only allow permanent addresses
12322 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12323 netdev_info(dev, "FDB only supports static addresses\n");
12327 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12328 err = dev_uc_add_excl(dev, addr);
12329 else if (is_multicast_ether_addr(addr))
12330 err = dev_mc_add_excl(dev, addr);
12334 /* Only return duplicate errors if NLM_F_EXCL is set */
12335 if (err == -EEXIST && !(flags & NLM_F_EXCL))
12342 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12343 * @dev: the netdev being configured
12344 * @nlh: RTNL message
12345 * @flags: bridge flags
12346 * @extack: netlink extended ack
12348 * Inserts a new hardware bridge if not already created and
12349 * enables the bridging mode requested (VEB or VEPA). If the
12350 * hardware bridge has already been inserted and the request
12351 * is to change the mode then that requires a PF reset to
12352 * allow rebuild of the components with required hardware
12353 * bridge mode enabled.
12355 * Note: expects to be called while under rtnl_lock()
12357 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12358 struct nlmsghdr *nlh,
12360 struct netlink_ext_ack *extack)
12362 struct i40e_netdev_priv *np = netdev_priv(dev);
12363 struct i40e_vsi *vsi = np->vsi;
12364 struct i40e_pf *pf = vsi->back;
12365 struct i40e_veb *veb = NULL;
12366 struct nlattr *attr, *br_spec;
12369 /* Only for PF VSI for now */
12370 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12371 return -EOPNOTSUPP;
12373 /* Find the HW bridge for PF VSI */
12374 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12375 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12379 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12381 nla_for_each_nested(attr, br_spec, rem) {
12384 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12387 mode = nla_get_u16(attr);
12388 if ((mode != BRIDGE_MODE_VEPA) &&
12389 (mode != BRIDGE_MODE_VEB))
12392 /* Insert a new HW bridge */
12394 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12395 vsi->tc_config.enabled_tc);
12397 veb->bridge_mode = mode;
12398 i40e_config_bridge_mode(veb);
12400 /* No Bridge HW offload available */
12404 } else if (mode != veb->bridge_mode) {
12405 /* Existing HW bridge but different mode needs reset */
12406 veb->bridge_mode = mode;
12407 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
12408 if (mode == BRIDGE_MODE_VEB)
12409 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
12411 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
12412 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12421 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
12424 * @seq: RTNL message seq #
12425 * @dev: the netdev being configured
12426 * @filter_mask: unused
12427 * @nlflags: netlink flags passed in
12429 * Return the mode in which the hardware bridge is operating in
12432 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
12433 struct net_device *dev,
12434 u32 __always_unused filter_mask,
12437 struct i40e_netdev_priv *np = netdev_priv(dev);
12438 struct i40e_vsi *vsi = np->vsi;
12439 struct i40e_pf *pf = vsi->back;
12440 struct i40e_veb *veb = NULL;
12443 /* Only for PF VSI for now */
12444 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12445 return -EOPNOTSUPP;
12447 /* Find the HW bridge for the PF VSI */
12448 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12449 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12456 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
12457 0, 0, nlflags, filter_mask, NULL);
12461 * i40e_features_check - Validate encapsulated packet conforms to limits
12463 * @dev: This physical port's netdev
12464 * @features: Offload features that the stack believes apply
12466 static netdev_features_t i40e_features_check(struct sk_buff *skb,
12467 struct net_device *dev,
12468 netdev_features_t features)
12472 /* No point in doing any of this if neither checksum nor GSO are
12473 * being requested for this frame. We can rule out both by just
12474 * checking for CHECKSUM_PARTIAL
12476 if (skb->ip_summed != CHECKSUM_PARTIAL)
12479 /* We cannot support GSO if the MSS is going to be less than
12480 * 64 bytes. If it is then we need to drop support for GSO.
12482 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
12483 features &= ~NETIF_F_GSO_MASK;
12485 /* MACLEN can support at most 63 words */
12486 len = skb_network_header(skb) - skb->data;
12487 if (len & ~(63 * 2))
12490 /* IPLEN and EIPLEN can support at most 127 dwords */
12491 len = skb_transport_header(skb) - skb_network_header(skb);
12492 if (len & ~(127 * 4))
12495 if (skb->encapsulation) {
12496 /* L4TUNLEN can support 127 words */
12497 len = skb_inner_network_header(skb) - skb_transport_header(skb);
12498 if (len & ~(127 * 2))
12501 /* IPLEN can support at most 127 dwords */
12502 len = skb_inner_transport_header(skb) -
12503 skb_inner_network_header(skb);
12504 if (len & ~(127 * 4))
12508 /* No need to validate L4LEN as TCP is the only protocol with a
12509 * a flexible value and we support all possible values supported
12510 * by TCP, which is at most 15 dwords
12515 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
12519 * i40e_xdp_setup - add/remove an XDP program
12520 * @vsi: VSI to changed
12521 * @prog: XDP program
12523 static int i40e_xdp_setup(struct i40e_vsi *vsi,
12524 struct bpf_prog *prog)
12526 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
12527 struct i40e_pf *pf = vsi->back;
12528 struct bpf_prog *old_prog;
12532 /* Don't allow frames that span over multiple buffers */
12533 if (frame_size > vsi->rx_buf_len)
12536 if (!i40e_enabled_xdp_vsi(vsi) && !prog)
12539 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
12540 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
12543 i40e_prep_for_reset(pf, true);
12545 old_prog = xchg(&vsi->xdp_prog, prog);
12549 /* Wait until ndo_xsk_wakeup completes. */
12551 i40e_reset_and_rebuild(pf, true, true);
12554 for (i = 0; i < vsi->num_queue_pairs; i++)
12555 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
12558 bpf_prog_put(old_prog);
12560 /* Kick start the NAPI context if there is an AF_XDP socket open
12561 * on that queue id. This so that receiving will start.
12563 if (need_reset && prog)
12564 for (i = 0; i < vsi->num_queue_pairs; i++)
12565 if (vsi->xdp_rings[i]->xsk_umem)
12566 (void)i40e_xsk_wakeup(vsi->netdev, i,
12573 * i40e_enter_busy_conf - Enters busy config state
12576 * Returns 0 on success, <0 for failure.
12578 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
12580 struct i40e_pf *pf = vsi->back;
12583 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
12587 usleep_range(1000, 2000);
12594 * i40e_exit_busy_conf - Exits busy config state
12597 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
12599 struct i40e_pf *pf = vsi->back;
12601 clear_bit(__I40E_CONFIG_BUSY, pf->state);
12605 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
12607 * @queue_pair: queue pair
12609 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
12611 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
12612 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
12613 memset(&vsi->tx_rings[queue_pair]->stats, 0,
12614 sizeof(vsi->tx_rings[queue_pair]->stats));
12615 if (i40e_enabled_xdp_vsi(vsi)) {
12616 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
12617 sizeof(vsi->xdp_rings[queue_pair]->stats));
12622 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
12624 * @queue_pair: queue pair
12626 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
12628 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
12629 if (i40e_enabled_xdp_vsi(vsi)) {
12630 /* Make sure that in-progress ndo_xdp_xmit calls are
12634 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
12636 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
12640 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
12642 * @queue_pair: queue pair
12643 * @enable: true for enable, false for disable
12645 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
12648 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12649 struct i40e_q_vector *q_vector = rxr->q_vector;
12654 /* All rings in a qp belong to the same qvector. */
12655 if (q_vector->rx.ring || q_vector->tx.ring) {
12657 napi_enable(&q_vector->napi);
12659 napi_disable(&q_vector->napi);
12664 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
12666 * @queue_pair: queue pair
12667 * @enable: true for enable, false for disable
12669 * Returns 0 on success, <0 on failure.
12671 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
12674 struct i40e_pf *pf = vsi->back;
12677 pf_q = vsi->base_queue + queue_pair;
12678 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
12679 false /*is xdp*/, enable);
12681 dev_info(&pf->pdev->dev,
12682 "VSI seid %d Tx ring %d %sable timeout\n",
12683 vsi->seid, pf_q, (enable ? "en" : "dis"));
12687 i40e_control_rx_q(pf, pf_q, enable);
12688 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
12690 dev_info(&pf->pdev->dev,
12691 "VSI seid %d Rx ring %d %sable timeout\n",
12692 vsi->seid, pf_q, (enable ? "en" : "dis"));
12696 /* Due to HW errata, on Rx disable only, the register can
12697 * indicate done before it really is. Needs 50ms to be sure
12702 if (!i40e_enabled_xdp_vsi(vsi))
12705 ret = i40e_control_wait_tx_q(vsi->seid, pf,
12706 pf_q + vsi->alloc_queue_pairs,
12707 true /*is xdp*/, enable);
12709 dev_info(&pf->pdev->dev,
12710 "VSI seid %d XDP Tx ring %d %sable timeout\n",
12711 vsi->seid, pf_q, (enable ? "en" : "dis"));
12718 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
12720 * @queue_pair: queue_pair
12722 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
12724 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12725 struct i40e_pf *pf = vsi->back;
12726 struct i40e_hw *hw = &pf->hw;
12728 /* All rings in a qp belong to the same qvector. */
12729 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
12730 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
12732 i40e_irq_dynamic_enable_icr0(pf);
12738 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
12740 * @queue_pair: queue_pair
12742 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
12744 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
12745 struct i40e_pf *pf = vsi->back;
12746 struct i40e_hw *hw = &pf->hw;
12748 /* For simplicity, instead of removing the qp interrupt causes
12749 * from the interrupt linked list, we simply disable the interrupt, and
12750 * leave the list intact.
12752 * All rings in a qp belong to the same qvector.
12754 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12755 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
12757 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
12759 synchronize_irq(pf->msix_entries[intpf].vector);
12761 /* Legacy and MSI mode - this stops all interrupt handling */
12762 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
12763 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
12765 synchronize_irq(pf->pdev->irq);
12770 * i40e_queue_pair_disable - Disables a queue pair
12772 * @queue_pair: queue pair
12774 * Returns 0 on success, <0 on failure.
12776 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
12780 err = i40e_enter_busy_conf(vsi);
12784 i40e_queue_pair_disable_irq(vsi, queue_pair);
12785 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
12786 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
12787 i40e_queue_pair_clean_rings(vsi, queue_pair);
12788 i40e_queue_pair_reset_stats(vsi, queue_pair);
12794 * i40e_queue_pair_enable - Enables a queue pair
12796 * @queue_pair: queue pair
12798 * Returns 0 on success, <0 on failure.
12800 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
12804 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
12808 if (i40e_enabled_xdp_vsi(vsi)) {
12809 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
12814 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
12818 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
12819 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
12820 i40e_queue_pair_enable_irq(vsi, queue_pair);
12822 i40e_exit_busy_conf(vsi);
12828 * i40e_xdp - implements ndo_bpf for i40e
12830 * @xdp: XDP command
12832 static int i40e_xdp(struct net_device *dev,
12833 struct netdev_bpf *xdp)
12835 struct i40e_netdev_priv *np = netdev_priv(dev);
12836 struct i40e_vsi *vsi = np->vsi;
12838 if (vsi->type != I40E_VSI_MAIN)
12841 switch (xdp->command) {
12842 case XDP_SETUP_PROG:
12843 return i40e_xdp_setup(vsi, xdp->prog);
12844 case XDP_QUERY_PROG:
12845 xdp->prog_id = vsi->xdp_prog ? vsi->xdp_prog->aux->id : 0;
12847 case XDP_SETUP_XSK_UMEM:
12848 return i40e_xsk_umem_setup(vsi, xdp->xsk.umem,
12849 xdp->xsk.queue_id);
12855 static const struct net_device_ops i40e_netdev_ops = {
12856 .ndo_open = i40e_open,
12857 .ndo_stop = i40e_close,
12858 .ndo_start_xmit = i40e_lan_xmit_frame,
12859 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
12860 .ndo_set_rx_mode = i40e_set_rx_mode,
12861 .ndo_validate_addr = eth_validate_addr,
12862 .ndo_set_mac_address = i40e_set_mac,
12863 .ndo_change_mtu = i40e_change_mtu,
12864 .ndo_do_ioctl = i40e_ioctl,
12865 .ndo_tx_timeout = i40e_tx_timeout,
12866 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
12867 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
12868 #ifdef CONFIG_NET_POLL_CONTROLLER
12869 .ndo_poll_controller = i40e_netpoll,
12871 .ndo_setup_tc = __i40e_setup_tc,
12872 .ndo_set_features = i40e_set_features,
12873 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
12874 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
12875 .ndo_get_vf_stats = i40e_get_vf_stats,
12876 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
12877 .ndo_get_vf_config = i40e_ndo_get_vf_config,
12878 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
12879 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
12880 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
12881 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
12882 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
12883 .ndo_get_phys_port_id = i40e_get_phys_port_id,
12884 .ndo_fdb_add = i40e_ndo_fdb_add,
12885 .ndo_features_check = i40e_features_check,
12886 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
12887 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
12888 .ndo_bpf = i40e_xdp,
12889 .ndo_xdp_xmit = i40e_xdp_xmit,
12890 .ndo_xsk_wakeup = i40e_xsk_wakeup,
12891 .ndo_dfwd_add_station = i40e_fwd_add,
12892 .ndo_dfwd_del_station = i40e_fwd_del,
12896 * i40e_config_netdev - Setup the netdev flags
12897 * @vsi: the VSI being configured
12899 * Returns 0 on success, negative value on failure
12901 static int i40e_config_netdev(struct i40e_vsi *vsi)
12903 struct i40e_pf *pf = vsi->back;
12904 struct i40e_hw *hw = &pf->hw;
12905 struct i40e_netdev_priv *np;
12906 struct net_device *netdev;
12907 u8 broadcast[ETH_ALEN];
12908 u8 mac_addr[ETH_ALEN];
12910 netdev_features_t hw_enc_features;
12911 netdev_features_t hw_features;
12913 etherdev_size = sizeof(struct i40e_netdev_priv);
12914 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
12918 vsi->netdev = netdev;
12919 np = netdev_priv(netdev);
12922 hw_enc_features = NETIF_F_SG |
12924 NETIF_F_IPV6_CSUM |
12926 NETIF_F_SOFT_FEATURES |
12931 NETIF_F_GSO_GRE_CSUM |
12932 NETIF_F_GSO_PARTIAL |
12933 NETIF_F_GSO_IPXIP4 |
12934 NETIF_F_GSO_IPXIP6 |
12935 NETIF_F_GSO_UDP_TUNNEL |
12936 NETIF_F_GSO_UDP_TUNNEL_CSUM |
12937 NETIF_F_GSO_UDP_L4 |
12943 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
12944 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
12946 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
12948 netdev->hw_enc_features |= hw_enc_features;
12950 /* record features VLANs can make use of */
12951 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
12953 /* enable macvlan offloads */
12954 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
12956 hw_features = hw_enc_features |
12957 NETIF_F_HW_VLAN_CTAG_TX |
12958 NETIF_F_HW_VLAN_CTAG_RX;
12960 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
12961 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
12963 netdev->hw_features |= hw_features;
12965 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
12966 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
12968 if (vsi->type == I40E_VSI_MAIN) {
12969 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
12970 ether_addr_copy(mac_addr, hw->mac.perm_addr);
12971 /* The following steps are necessary for two reasons. First,
12972 * some older NVM configurations load a default MAC-VLAN
12973 * filter that will accept any tagged packet, and we want to
12974 * replace this with a normal filter. Additionally, it is
12975 * possible our MAC address was provided by the platform using
12976 * Open Firmware or similar.
12978 * Thus, we need to remove the default filter and install one
12979 * specific to the MAC address.
12981 i40e_rm_default_mac_filter(vsi, mac_addr);
12982 spin_lock_bh(&vsi->mac_filter_hash_lock);
12983 i40e_add_mac_filter(vsi, mac_addr);
12984 spin_unlock_bh(&vsi->mac_filter_hash_lock);
12986 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
12987 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
12988 * the end, which is 4 bytes long, so force truncation of the
12989 * original name by IFNAMSIZ - 4
12991 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
12993 pf->vsi[pf->lan_vsi]->netdev->name);
12994 eth_random_addr(mac_addr);
12996 spin_lock_bh(&vsi->mac_filter_hash_lock);
12997 i40e_add_mac_filter(vsi, mac_addr);
12998 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13001 /* Add the broadcast filter so that we initially will receive
13002 * broadcast packets. Note that when a new VLAN is first added the
13003 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13004 * specific filters as part of transitioning into "vlan" operation.
13005 * When more VLANs are added, the driver will copy each existing MAC
13006 * filter and add it for the new VLAN.
13008 * Broadcast filters are handled specially by
13009 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13010 * promiscuous bit instead of adding this directly as a MAC/VLAN
13011 * filter. The subtask will update the correct broadcast promiscuous
13012 * bits as VLANs become active or inactive.
13014 eth_broadcast_addr(broadcast);
13015 spin_lock_bh(&vsi->mac_filter_hash_lock);
13016 i40e_add_mac_filter(vsi, broadcast);
13017 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13019 ether_addr_copy(netdev->dev_addr, mac_addr);
13020 ether_addr_copy(netdev->perm_addr, mac_addr);
13022 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13023 netdev->neigh_priv_len = sizeof(u32) * 4;
13025 netdev->priv_flags |= IFF_UNICAST_FLT;
13026 netdev->priv_flags |= IFF_SUPP_NOFCS;
13027 /* Setup netdev TC information */
13028 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13030 netdev->netdev_ops = &i40e_netdev_ops;
13031 netdev->watchdog_timeo = 5 * HZ;
13032 i40e_set_ethtool_ops(netdev);
13034 /* MTU range: 68 - 9706 */
13035 netdev->min_mtu = ETH_MIN_MTU;
13036 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13042 * i40e_vsi_delete - Delete a VSI from the switch
13043 * @vsi: the VSI being removed
13045 * Returns 0 on success, negative value on failure
13047 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13049 /* remove default VSI is not allowed */
13050 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13053 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13057 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13058 * @vsi: the VSI being queried
13060 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13062 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13064 struct i40e_veb *veb;
13065 struct i40e_pf *pf = vsi->back;
13067 /* Uplink is not a bridge so default to VEB */
13068 if (vsi->veb_idx >= I40E_MAX_VEB)
13071 veb = pf->veb[vsi->veb_idx];
13073 dev_info(&pf->pdev->dev,
13074 "There is no veb associated with the bridge\n");
13078 /* Uplink is a bridge in VEPA mode */
13079 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13082 /* Uplink is a bridge in VEB mode */
13086 /* VEPA is now default bridge, so return 0 */
13091 * i40e_add_vsi - Add a VSI to the switch
13092 * @vsi: the VSI being configured
13094 * This initializes a VSI context depending on the VSI type to be added and
13095 * passes it down to the add_vsi aq command.
13097 static int i40e_add_vsi(struct i40e_vsi *vsi)
13100 struct i40e_pf *pf = vsi->back;
13101 struct i40e_hw *hw = &pf->hw;
13102 struct i40e_vsi_context ctxt;
13103 struct i40e_mac_filter *f;
13104 struct hlist_node *h;
13107 u8 enabled_tc = 0x1; /* TC0 enabled */
13110 memset(&ctxt, 0, sizeof(ctxt));
13111 switch (vsi->type) {
13112 case I40E_VSI_MAIN:
13113 /* The PF's main VSI is already setup as part of the
13114 * device initialization, so we'll not bother with
13115 * the add_vsi call, but we will retrieve the current
13118 ctxt.seid = pf->main_vsi_seid;
13119 ctxt.pf_num = pf->hw.pf_id;
13121 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13122 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13124 dev_info(&pf->pdev->dev,
13125 "couldn't get PF vsi config, err %s aq_err %s\n",
13126 i40e_stat_str(&pf->hw, ret),
13127 i40e_aq_str(&pf->hw,
13128 pf->hw.aq.asq_last_status));
13131 vsi->info = ctxt.info;
13132 vsi->info.valid_sections = 0;
13134 vsi->seid = ctxt.seid;
13135 vsi->id = ctxt.vsi_number;
13137 enabled_tc = i40e_pf_get_tc_map(pf);
13139 /* Source pruning is enabled by default, so the flag is
13140 * negative logic - if it's set, we need to fiddle with
13141 * the VSI to disable source pruning.
13143 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13144 memset(&ctxt, 0, sizeof(ctxt));
13145 ctxt.seid = pf->main_vsi_seid;
13146 ctxt.pf_num = pf->hw.pf_id;
13148 ctxt.info.valid_sections |=
13149 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13150 ctxt.info.switch_id =
13151 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13152 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13154 dev_info(&pf->pdev->dev,
13155 "update vsi failed, err %s aq_err %s\n",
13156 i40e_stat_str(&pf->hw, ret),
13157 i40e_aq_str(&pf->hw,
13158 pf->hw.aq.asq_last_status));
13164 /* MFP mode setup queue map and update VSI */
13165 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13166 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13167 memset(&ctxt, 0, sizeof(ctxt));
13168 ctxt.seid = pf->main_vsi_seid;
13169 ctxt.pf_num = pf->hw.pf_id;
13171 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13172 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13174 dev_info(&pf->pdev->dev,
13175 "update vsi failed, err %s aq_err %s\n",
13176 i40e_stat_str(&pf->hw, ret),
13177 i40e_aq_str(&pf->hw,
13178 pf->hw.aq.asq_last_status));
13182 /* update the local VSI info queue map */
13183 i40e_vsi_update_queue_map(vsi, &ctxt);
13184 vsi->info.valid_sections = 0;
13186 /* Default/Main VSI is only enabled for TC0
13187 * reconfigure it to enable all TCs that are
13188 * available on the port in SFP mode.
13189 * For MFP case the iSCSI PF would use this
13190 * flow to enable LAN+iSCSI TC.
13192 ret = i40e_vsi_config_tc(vsi, enabled_tc);
13194 /* Single TC condition is not fatal,
13195 * message and continue
13197 dev_info(&pf->pdev->dev,
13198 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13200 i40e_stat_str(&pf->hw, ret),
13201 i40e_aq_str(&pf->hw,
13202 pf->hw.aq.asq_last_status));
13207 case I40E_VSI_FDIR:
13208 ctxt.pf_num = hw->pf_id;
13210 ctxt.uplink_seid = vsi->uplink_seid;
13211 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13212 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13213 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13214 (i40e_is_vsi_uplink_mode_veb(vsi))) {
13215 ctxt.info.valid_sections |=
13216 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13217 ctxt.info.switch_id =
13218 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13220 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13223 case I40E_VSI_VMDQ2:
13224 ctxt.pf_num = hw->pf_id;
13226 ctxt.uplink_seid = vsi->uplink_seid;
13227 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13228 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13230 /* This VSI is connected to VEB so the switch_id
13231 * should be set to zero by default.
13233 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13234 ctxt.info.valid_sections |=
13235 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13236 ctxt.info.switch_id =
13237 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13240 /* Setup the VSI tx/rx queue map for TC0 only for now */
13241 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13244 case I40E_VSI_SRIOV:
13245 ctxt.pf_num = hw->pf_id;
13246 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13247 ctxt.uplink_seid = vsi->uplink_seid;
13248 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13249 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13251 /* This VSI is connected to VEB so the switch_id
13252 * should be set to zero by default.
13254 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13255 ctxt.info.valid_sections |=
13256 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13257 ctxt.info.switch_id =
13258 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13261 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13262 ctxt.info.valid_sections |=
13263 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13264 ctxt.info.queueing_opt_flags |=
13265 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13266 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13269 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13270 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13271 if (pf->vf[vsi->vf_id].spoofchk) {
13272 ctxt.info.valid_sections |=
13273 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13274 ctxt.info.sec_flags |=
13275 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13276 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13278 /* Setup the VSI tx/rx queue map for TC0 only for now */
13279 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13282 case I40E_VSI_IWARP:
13283 /* send down message to iWARP */
13290 if (vsi->type != I40E_VSI_MAIN) {
13291 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13293 dev_info(&vsi->back->pdev->dev,
13294 "add vsi failed, err %s aq_err %s\n",
13295 i40e_stat_str(&pf->hw, ret),
13296 i40e_aq_str(&pf->hw,
13297 pf->hw.aq.asq_last_status));
13301 vsi->info = ctxt.info;
13302 vsi->info.valid_sections = 0;
13303 vsi->seid = ctxt.seid;
13304 vsi->id = ctxt.vsi_number;
13307 vsi->active_filters = 0;
13308 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13309 spin_lock_bh(&vsi->mac_filter_hash_lock);
13310 /* If macvlan filters already exist, force them to get loaded */
13311 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13312 f->state = I40E_FILTER_NEW;
13315 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13318 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13319 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13322 /* Update VSI BW information */
13323 ret = i40e_vsi_get_bw_info(vsi);
13325 dev_info(&pf->pdev->dev,
13326 "couldn't get vsi bw info, err %s aq_err %s\n",
13327 i40e_stat_str(&pf->hw, ret),
13328 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13329 /* VSI is already added so not tearing that up */
13338 * i40e_vsi_release - Delete a VSI and free its resources
13339 * @vsi: the VSI being removed
13341 * Returns 0 on success or < 0 on error
13343 int i40e_vsi_release(struct i40e_vsi *vsi)
13345 struct i40e_mac_filter *f;
13346 struct hlist_node *h;
13347 struct i40e_veb *veb = NULL;
13348 struct i40e_pf *pf;
13354 /* release of a VEB-owner or last VSI is not allowed */
13355 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13356 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13357 vsi->seid, vsi->uplink_seid);
13360 if (vsi == pf->vsi[pf->lan_vsi] &&
13361 !test_bit(__I40E_DOWN, pf->state)) {
13362 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13366 uplink_seid = vsi->uplink_seid;
13367 if (vsi->type != I40E_VSI_SRIOV) {
13368 if (vsi->netdev_registered) {
13369 vsi->netdev_registered = false;
13371 /* results in a call to i40e_close() */
13372 unregister_netdev(vsi->netdev);
13375 i40e_vsi_close(vsi);
13377 i40e_vsi_disable_irq(vsi);
13380 spin_lock_bh(&vsi->mac_filter_hash_lock);
13382 /* clear the sync flag on all filters */
13384 __dev_uc_unsync(vsi->netdev, NULL);
13385 __dev_mc_unsync(vsi->netdev, NULL);
13388 /* make sure any remaining filters are marked for deletion */
13389 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
13390 __i40e_del_filter(vsi, f);
13392 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13394 i40e_sync_vsi_filters(vsi);
13396 i40e_vsi_delete(vsi);
13397 i40e_vsi_free_q_vectors(vsi);
13399 free_netdev(vsi->netdev);
13400 vsi->netdev = NULL;
13402 i40e_vsi_clear_rings(vsi);
13403 i40e_vsi_clear(vsi);
13405 /* If this was the last thing on the VEB, except for the
13406 * controlling VSI, remove the VEB, which puts the controlling
13407 * VSI onto the next level down in the switch.
13409 * Well, okay, there's one more exception here: don't remove
13410 * the orphan VEBs yet. We'll wait for an explicit remove request
13411 * from up the network stack.
13413 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
13415 pf->vsi[i]->uplink_seid == uplink_seid &&
13416 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13417 n++; /* count the VSIs */
13420 for (i = 0; i < I40E_MAX_VEB; i++) {
13423 if (pf->veb[i]->uplink_seid == uplink_seid)
13424 n++; /* count the VEBs */
13425 if (pf->veb[i]->seid == uplink_seid)
13428 if (n == 0 && veb && veb->uplink_seid != 0)
13429 i40e_veb_release(veb);
13435 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
13436 * @vsi: ptr to the VSI
13438 * This should only be called after i40e_vsi_mem_alloc() which allocates the
13439 * corresponding SW VSI structure and initializes num_queue_pairs for the
13440 * newly allocated VSI.
13442 * Returns 0 on success or negative on failure
13444 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
13447 struct i40e_pf *pf = vsi->back;
13449 if (vsi->q_vectors[0]) {
13450 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
13455 if (vsi->base_vector) {
13456 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
13457 vsi->seid, vsi->base_vector);
13461 ret = i40e_vsi_alloc_q_vectors(vsi);
13463 dev_info(&pf->pdev->dev,
13464 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
13465 vsi->num_q_vectors, vsi->seid, ret);
13466 vsi->num_q_vectors = 0;
13467 goto vector_setup_out;
13470 /* In Legacy mode, we do not have to get any other vector since we
13471 * piggyback on the misc/ICR0 for queue interrupts.
13473 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
13475 if (vsi->num_q_vectors)
13476 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
13477 vsi->num_q_vectors, vsi->idx);
13478 if (vsi->base_vector < 0) {
13479 dev_info(&pf->pdev->dev,
13480 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
13481 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
13482 i40e_vsi_free_q_vectors(vsi);
13484 goto vector_setup_out;
13492 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
13493 * @vsi: pointer to the vsi.
13495 * This re-allocates a vsi's queue resources.
13497 * Returns pointer to the successfully allocated and configured VSI sw struct
13498 * on success, otherwise returns NULL on failure.
13500 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
13502 u16 alloc_queue_pairs;
13503 struct i40e_pf *pf;
13512 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
13513 i40e_vsi_clear_rings(vsi);
13515 i40e_vsi_free_arrays(vsi, false);
13516 i40e_set_num_rings_in_vsi(vsi);
13517 ret = i40e_vsi_alloc_arrays(vsi, false);
13521 alloc_queue_pairs = vsi->alloc_queue_pairs *
13522 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13524 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13526 dev_info(&pf->pdev->dev,
13527 "failed to get tracking for %d queues for VSI %d err %d\n",
13528 alloc_queue_pairs, vsi->seid, ret);
13531 vsi->base_queue = ret;
13533 /* Update the FW view of the VSI. Force a reset of TC and queue
13534 * layout configurations.
13536 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
13537 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
13538 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
13539 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
13540 if (vsi->type == I40E_VSI_MAIN)
13541 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
13543 /* assign it some queues */
13544 ret = i40e_alloc_rings(vsi);
13548 /* map all of the rings to the q_vectors */
13549 i40e_vsi_map_rings_to_vectors(vsi);
13553 i40e_vsi_free_q_vectors(vsi);
13554 if (vsi->netdev_registered) {
13555 vsi->netdev_registered = false;
13556 unregister_netdev(vsi->netdev);
13557 free_netdev(vsi->netdev);
13558 vsi->netdev = NULL;
13560 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13562 i40e_vsi_clear(vsi);
13567 * i40e_vsi_setup - Set up a VSI by a given type
13568 * @pf: board private structure
13570 * @uplink_seid: the switch element to link to
13571 * @param1: usage depends upon VSI type. For VF types, indicates VF id
13573 * This allocates the sw VSI structure and its queue resources, then add a VSI
13574 * to the identified VEB.
13576 * Returns pointer to the successfully allocated and configure VSI sw struct on
13577 * success, otherwise returns NULL on failure.
13579 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
13580 u16 uplink_seid, u32 param1)
13582 struct i40e_vsi *vsi = NULL;
13583 struct i40e_veb *veb = NULL;
13584 u16 alloc_queue_pairs;
13588 /* The requested uplink_seid must be either
13589 * - the PF's port seid
13590 * no VEB is needed because this is the PF
13591 * or this is a Flow Director special case VSI
13592 * - seid of an existing VEB
13593 * - seid of a VSI that owns an existing VEB
13594 * - seid of a VSI that doesn't own a VEB
13595 * a new VEB is created and the VSI becomes the owner
13596 * - seid of the PF VSI, which is what creates the first VEB
13597 * this is a special case of the previous
13599 * Find which uplink_seid we were given and create a new VEB if needed
13601 for (i = 0; i < I40E_MAX_VEB; i++) {
13602 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
13608 if (!veb && uplink_seid != pf->mac_seid) {
13610 for (i = 0; i < pf->num_alloc_vsi; i++) {
13611 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
13617 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
13622 if (vsi->uplink_seid == pf->mac_seid)
13623 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
13624 vsi->tc_config.enabled_tc);
13625 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
13626 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
13627 vsi->tc_config.enabled_tc);
13629 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
13630 dev_info(&vsi->back->pdev->dev,
13631 "New VSI creation error, uplink seid of LAN VSI expected.\n");
13634 /* We come up by default in VEPA mode if SRIOV is not
13635 * already enabled, in which case we can't force VEPA
13638 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
13639 veb->bridge_mode = BRIDGE_MODE_VEPA;
13640 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13642 i40e_config_bridge_mode(veb);
13644 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13645 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13649 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
13653 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
13654 uplink_seid = veb->seid;
13657 /* get vsi sw struct */
13658 v_idx = i40e_vsi_mem_alloc(pf, type);
13661 vsi = pf->vsi[v_idx];
13665 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
13667 if (type == I40E_VSI_MAIN)
13668 pf->lan_vsi = v_idx;
13669 else if (type == I40E_VSI_SRIOV)
13670 vsi->vf_id = param1;
13671 /* assign it some queues */
13672 alloc_queue_pairs = vsi->alloc_queue_pairs *
13673 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
13675 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
13677 dev_info(&pf->pdev->dev,
13678 "failed to get tracking for %d queues for VSI %d err=%d\n",
13679 alloc_queue_pairs, vsi->seid, ret);
13682 vsi->base_queue = ret;
13684 /* get a VSI from the hardware */
13685 vsi->uplink_seid = uplink_seid;
13686 ret = i40e_add_vsi(vsi);
13690 switch (vsi->type) {
13691 /* setup the netdev if needed */
13692 case I40E_VSI_MAIN:
13693 case I40E_VSI_VMDQ2:
13694 ret = i40e_config_netdev(vsi);
13697 ret = register_netdev(vsi->netdev);
13700 vsi->netdev_registered = true;
13701 netif_carrier_off(vsi->netdev);
13702 #ifdef CONFIG_I40E_DCB
13703 /* Setup DCB netlink interface */
13704 i40e_dcbnl_setup(vsi);
13705 #endif /* CONFIG_I40E_DCB */
13708 case I40E_VSI_FDIR:
13709 /* set up vectors and rings if needed */
13710 ret = i40e_vsi_setup_vectors(vsi);
13714 ret = i40e_alloc_rings(vsi);
13718 /* map all of the rings to the q_vectors */
13719 i40e_vsi_map_rings_to_vectors(vsi);
13721 i40e_vsi_reset_stats(vsi);
13725 /* no netdev or rings for the other VSI types */
13729 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
13730 (vsi->type == I40E_VSI_VMDQ2)) {
13731 ret = i40e_vsi_config_rss(vsi);
13736 i40e_vsi_free_q_vectors(vsi);
13738 if (vsi->netdev_registered) {
13739 vsi->netdev_registered = false;
13740 unregister_netdev(vsi->netdev);
13741 free_netdev(vsi->netdev);
13742 vsi->netdev = NULL;
13745 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
13747 i40e_vsi_clear(vsi);
13753 * i40e_veb_get_bw_info - Query VEB BW information
13754 * @veb: the veb to query
13756 * Query the Tx scheduler BW configuration data for given VEB
13758 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
13760 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
13761 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
13762 struct i40e_pf *pf = veb->pf;
13763 struct i40e_hw *hw = &pf->hw;
13768 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
13771 dev_info(&pf->pdev->dev,
13772 "query veb bw config failed, err %s aq_err %s\n",
13773 i40e_stat_str(&pf->hw, ret),
13774 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
13778 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
13781 dev_info(&pf->pdev->dev,
13782 "query veb bw ets config failed, err %s aq_err %s\n",
13783 i40e_stat_str(&pf->hw, ret),
13784 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
13788 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
13789 veb->bw_max_quanta = ets_data.tc_bw_max;
13790 veb->is_abs_credits = bw_data.absolute_credits_enable;
13791 veb->enabled_tc = ets_data.tc_valid_bits;
13792 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
13793 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
13794 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
13795 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
13796 veb->bw_tc_limit_credits[i] =
13797 le16_to_cpu(bw_data.tc_bw_limits[i]);
13798 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
13806 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
13807 * @pf: board private structure
13809 * On error: returns error code (negative)
13810 * On success: returns vsi index in PF (positive)
13812 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
13815 struct i40e_veb *veb;
13818 /* Need to protect the allocation of switch elements at the PF level */
13819 mutex_lock(&pf->switch_mutex);
13821 /* VEB list may be fragmented if VEB creation/destruction has
13822 * been happening. We can afford to do a quick scan to look
13823 * for any free slots in the list.
13825 * find next empty veb slot, looping back around if necessary
13828 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
13830 if (i >= I40E_MAX_VEB) {
13832 goto err_alloc_veb; /* out of VEB slots! */
13835 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
13838 goto err_alloc_veb;
13842 veb->enabled_tc = 1;
13847 mutex_unlock(&pf->switch_mutex);
13852 * i40e_switch_branch_release - Delete a branch of the switch tree
13853 * @branch: where to start deleting
13855 * This uses recursion to find the tips of the branch to be
13856 * removed, deleting until we get back to and can delete this VEB.
13858 static void i40e_switch_branch_release(struct i40e_veb *branch)
13860 struct i40e_pf *pf = branch->pf;
13861 u16 branch_seid = branch->seid;
13862 u16 veb_idx = branch->idx;
13865 /* release any VEBs on this VEB - RECURSION */
13866 for (i = 0; i < I40E_MAX_VEB; i++) {
13869 if (pf->veb[i]->uplink_seid == branch->seid)
13870 i40e_switch_branch_release(pf->veb[i]);
13873 /* Release the VSIs on this VEB, but not the owner VSI.
13875 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
13876 * the VEB itself, so don't use (*branch) after this loop.
13878 for (i = 0; i < pf->num_alloc_vsi; i++) {
13881 if (pf->vsi[i]->uplink_seid == branch_seid &&
13882 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
13883 i40e_vsi_release(pf->vsi[i]);
13887 /* There's one corner case where the VEB might not have been
13888 * removed, so double check it here and remove it if needed.
13889 * This case happens if the veb was created from the debugfs
13890 * commands and no VSIs were added to it.
13892 if (pf->veb[veb_idx])
13893 i40e_veb_release(pf->veb[veb_idx]);
13897 * i40e_veb_clear - remove veb struct
13898 * @veb: the veb to remove
13900 static void i40e_veb_clear(struct i40e_veb *veb)
13906 struct i40e_pf *pf = veb->pf;
13908 mutex_lock(&pf->switch_mutex);
13909 if (pf->veb[veb->idx] == veb)
13910 pf->veb[veb->idx] = NULL;
13911 mutex_unlock(&pf->switch_mutex);
13918 * i40e_veb_release - Delete a VEB and free its resources
13919 * @veb: the VEB being removed
13921 void i40e_veb_release(struct i40e_veb *veb)
13923 struct i40e_vsi *vsi = NULL;
13924 struct i40e_pf *pf;
13929 /* find the remaining VSI and check for extras */
13930 for (i = 0; i < pf->num_alloc_vsi; i++) {
13931 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
13937 dev_info(&pf->pdev->dev,
13938 "can't remove VEB %d with %d VSIs left\n",
13943 /* move the remaining VSI to uplink veb */
13944 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
13945 if (veb->uplink_seid) {
13946 vsi->uplink_seid = veb->uplink_seid;
13947 if (veb->uplink_seid == pf->mac_seid)
13948 vsi->veb_idx = I40E_NO_VEB;
13950 vsi->veb_idx = veb->veb_idx;
13953 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
13954 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
13957 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
13958 i40e_veb_clear(veb);
13962 * i40e_add_veb - create the VEB in the switch
13963 * @veb: the VEB to be instantiated
13964 * @vsi: the controlling VSI
13966 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
13968 struct i40e_pf *pf = veb->pf;
13969 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
13972 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
13973 veb->enabled_tc, false,
13974 &veb->seid, enable_stats, NULL);
13976 /* get a VEB from the hardware */
13978 dev_info(&pf->pdev->dev,
13979 "couldn't add VEB, err %s aq_err %s\n",
13980 i40e_stat_str(&pf->hw, ret),
13981 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13985 /* get statistics counter */
13986 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
13987 &veb->stats_idx, NULL, NULL, NULL);
13989 dev_info(&pf->pdev->dev,
13990 "couldn't get VEB statistics idx, err %s aq_err %s\n",
13991 i40e_stat_str(&pf->hw, ret),
13992 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13995 ret = i40e_veb_get_bw_info(veb);
13997 dev_info(&pf->pdev->dev,
13998 "couldn't get VEB bw info, err %s aq_err %s\n",
13999 i40e_stat_str(&pf->hw, ret),
14000 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14001 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14005 vsi->uplink_seid = veb->seid;
14006 vsi->veb_idx = veb->idx;
14007 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14013 * i40e_veb_setup - Set up a VEB
14014 * @pf: board private structure
14015 * @flags: VEB setup flags
14016 * @uplink_seid: the switch element to link to
14017 * @vsi_seid: the initial VSI seid
14018 * @enabled_tc: Enabled TC bit-map
14020 * This allocates the sw VEB structure and links it into the switch
14021 * It is possible and legal for this to be a duplicate of an already
14022 * existing VEB. It is also possible for both uplink and vsi seids
14023 * to be zero, in order to create a floating VEB.
14025 * Returns pointer to the successfully allocated VEB sw struct on
14026 * success, otherwise returns NULL on failure.
14028 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14029 u16 uplink_seid, u16 vsi_seid,
14032 struct i40e_veb *veb, *uplink_veb = NULL;
14033 int vsi_idx, veb_idx;
14036 /* if one seid is 0, the other must be 0 to create a floating relay */
14037 if ((uplink_seid == 0 || vsi_seid == 0) &&
14038 (uplink_seid + vsi_seid != 0)) {
14039 dev_info(&pf->pdev->dev,
14040 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14041 uplink_seid, vsi_seid);
14045 /* make sure there is such a vsi and uplink */
14046 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14047 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14049 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14050 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14055 if (uplink_seid && uplink_seid != pf->mac_seid) {
14056 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14057 if (pf->veb[veb_idx] &&
14058 pf->veb[veb_idx]->seid == uplink_seid) {
14059 uplink_veb = pf->veb[veb_idx];
14064 dev_info(&pf->pdev->dev,
14065 "uplink seid %d not found\n", uplink_seid);
14070 /* get veb sw struct */
14071 veb_idx = i40e_veb_mem_alloc(pf);
14074 veb = pf->veb[veb_idx];
14075 veb->flags = flags;
14076 veb->uplink_seid = uplink_seid;
14077 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14078 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14080 /* create the VEB in the switch */
14081 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14084 if (vsi_idx == pf->lan_vsi)
14085 pf->lan_veb = veb->idx;
14090 i40e_veb_clear(veb);
14096 * i40e_setup_pf_switch_element - set PF vars based on switch type
14097 * @pf: board private structure
14098 * @ele: element we are building info from
14099 * @num_reported: total number of elements
14100 * @printconfig: should we print the contents
14102 * helper function to assist in extracting a few useful SEID values.
14104 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14105 struct i40e_aqc_switch_config_element_resp *ele,
14106 u16 num_reported, bool printconfig)
14108 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14109 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14110 u8 element_type = ele->element_type;
14111 u16 seid = le16_to_cpu(ele->seid);
14114 dev_info(&pf->pdev->dev,
14115 "type=%d seid=%d uplink=%d downlink=%d\n",
14116 element_type, seid, uplink_seid, downlink_seid);
14118 switch (element_type) {
14119 case I40E_SWITCH_ELEMENT_TYPE_MAC:
14120 pf->mac_seid = seid;
14122 case I40E_SWITCH_ELEMENT_TYPE_VEB:
14124 if (uplink_seid != pf->mac_seid)
14126 if (pf->lan_veb >= I40E_MAX_VEB) {
14129 /* find existing or else empty VEB */
14130 for (v = 0; v < I40E_MAX_VEB; v++) {
14131 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14136 if (pf->lan_veb >= I40E_MAX_VEB) {
14137 v = i40e_veb_mem_alloc(pf);
14143 if (pf->lan_veb >= I40E_MAX_VEB)
14146 pf->veb[pf->lan_veb]->seid = seid;
14147 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14148 pf->veb[pf->lan_veb]->pf = pf;
14149 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14151 case I40E_SWITCH_ELEMENT_TYPE_VSI:
14152 if (num_reported != 1)
14154 /* This is immediately after a reset so we can assume this is
14157 pf->mac_seid = uplink_seid;
14158 pf->pf_seid = downlink_seid;
14159 pf->main_vsi_seid = seid;
14161 dev_info(&pf->pdev->dev,
14162 "pf_seid=%d main_vsi_seid=%d\n",
14163 pf->pf_seid, pf->main_vsi_seid);
14165 case I40E_SWITCH_ELEMENT_TYPE_PF:
14166 case I40E_SWITCH_ELEMENT_TYPE_VF:
14167 case I40E_SWITCH_ELEMENT_TYPE_EMP:
14168 case I40E_SWITCH_ELEMENT_TYPE_BMC:
14169 case I40E_SWITCH_ELEMENT_TYPE_PE:
14170 case I40E_SWITCH_ELEMENT_TYPE_PA:
14171 /* ignore these for now */
14174 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14175 element_type, seid);
14181 * i40e_fetch_switch_configuration - Get switch config from firmware
14182 * @pf: board private structure
14183 * @printconfig: should we print the contents
14185 * Get the current switch configuration from the device and
14186 * extract a few useful SEID values.
14188 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14190 struct i40e_aqc_get_switch_config_resp *sw_config;
14196 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14200 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14202 u16 num_reported, num_total;
14204 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14208 dev_info(&pf->pdev->dev,
14209 "get switch config failed err %s aq_err %s\n",
14210 i40e_stat_str(&pf->hw, ret),
14211 i40e_aq_str(&pf->hw,
14212 pf->hw.aq.asq_last_status));
14217 num_reported = le16_to_cpu(sw_config->header.num_reported);
14218 num_total = le16_to_cpu(sw_config->header.num_total);
14221 dev_info(&pf->pdev->dev,
14222 "header: %d reported %d total\n",
14223 num_reported, num_total);
14225 for (i = 0; i < num_reported; i++) {
14226 struct i40e_aqc_switch_config_element_resp *ele =
14227 &sw_config->element[i];
14229 i40e_setup_pf_switch_element(pf, ele, num_reported,
14232 } while (next_seid != 0);
14239 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14240 * @pf: board private structure
14241 * @reinit: if the Main VSI needs to re-initialized.
14243 * Returns 0 on success, negative value on failure
14245 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
14250 /* find out what's out there already */
14251 ret = i40e_fetch_switch_configuration(pf, false);
14253 dev_info(&pf->pdev->dev,
14254 "couldn't fetch switch config, err %s aq_err %s\n",
14255 i40e_stat_str(&pf->hw, ret),
14256 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14259 i40e_pf_reset_stats(pf);
14261 /* set the switch config bit for the whole device to
14262 * support limited promisc or true promisc
14263 * when user requests promisc. The default is limited
14267 if ((pf->hw.pf_id == 0) &&
14268 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14269 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14270 pf->last_sw_conf_flags = flags;
14273 if (pf->hw.pf_id == 0) {
14276 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14277 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14279 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14280 dev_info(&pf->pdev->dev,
14281 "couldn't set switch config bits, err %s aq_err %s\n",
14282 i40e_stat_str(&pf->hw, ret),
14283 i40e_aq_str(&pf->hw,
14284 pf->hw.aq.asq_last_status));
14285 /* not a fatal problem, just keep going */
14287 pf->last_sw_conf_valid_flags = valid_flags;
14290 /* first time setup */
14291 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14292 struct i40e_vsi *vsi = NULL;
14295 /* Set up the PF VSI associated with the PF's main VSI
14296 * that is already in the HW switch
14298 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14299 uplink_seid = pf->veb[pf->lan_veb]->seid;
14301 uplink_seid = pf->mac_seid;
14302 if (pf->lan_vsi == I40E_NO_VSI)
14303 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14305 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14307 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14308 i40e_cloud_filter_exit(pf);
14309 i40e_fdir_teardown(pf);
14313 /* force a reset of TC and queue layout configurations */
14314 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14316 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14317 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14318 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14320 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14322 i40e_fdir_sb_setup(pf);
14324 /* Setup static PF queue filter control settings */
14325 ret = i40e_setup_pf_filter_control(pf);
14327 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14329 /* Failure here should not stop continuing other steps */
14332 /* enable RSS in the HW, even for only one queue, as the stack can use
14335 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14336 i40e_pf_config_rss(pf);
14338 /* fill in link information and enable LSE reporting */
14339 i40e_link_event(pf);
14341 /* Initialize user-specific link properties */
14342 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14343 I40E_AQ_AN_COMPLETED) ? true : false);
14347 /* repopulate tunnel port filters */
14348 i40e_sync_udp_filters(pf);
14354 * i40e_determine_queue_usage - Work out queue distribution
14355 * @pf: board private structure
14357 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14362 pf->num_lan_qps = 0;
14364 /* Find the max queues to be put into basic use. We'll always be
14365 * using TC0, whether or not DCB is running, and TC0 will get the
14368 queues_left = pf->hw.func_caps.num_tx_qp;
14370 if ((queues_left == 1) ||
14371 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
14372 /* one qp for PF, no queues for anything else */
14374 pf->alloc_rss_size = pf->num_lan_qps = 1;
14376 /* make sure all the fancies are disabled */
14377 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
14378 I40E_FLAG_IWARP_ENABLED |
14379 I40E_FLAG_FD_SB_ENABLED |
14380 I40E_FLAG_FD_ATR_ENABLED |
14381 I40E_FLAG_DCB_CAPABLE |
14382 I40E_FLAG_DCB_ENABLED |
14383 I40E_FLAG_SRIOV_ENABLED |
14384 I40E_FLAG_VMDQ_ENABLED);
14385 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14386 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
14387 I40E_FLAG_FD_SB_ENABLED |
14388 I40E_FLAG_FD_ATR_ENABLED |
14389 I40E_FLAG_DCB_CAPABLE))) {
14390 /* one qp for PF */
14391 pf->alloc_rss_size = pf->num_lan_qps = 1;
14392 queues_left -= pf->num_lan_qps;
14394 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
14395 I40E_FLAG_IWARP_ENABLED |
14396 I40E_FLAG_FD_SB_ENABLED |
14397 I40E_FLAG_FD_ATR_ENABLED |
14398 I40E_FLAG_DCB_ENABLED |
14399 I40E_FLAG_VMDQ_ENABLED);
14400 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14402 /* Not enough queues for all TCs */
14403 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
14404 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
14405 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
14406 I40E_FLAG_DCB_ENABLED);
14407 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
14410 /* limit lan qps to the smaller of qps, cpus or msix */
14411 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
14412 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
14413 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
14414 pf->num_lan_qps = q_max;
14416 queues_left -= pf->num_lan_qps;
14419 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14420 if (queues_left > 1) {
14421 queues_left -= 1; /* save 1 queue for FD */
14423 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
14424 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
14425 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
14429 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
14430 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
14431 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
14432 (queues_left / pf->num_vf_qps));
14433 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
14436 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
14437 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
14438 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
14439 (queues_left / pf->num_vmdq_qps));
14440 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
14443 pf->queues_left = queues_left;
14444 dev_dbg(&pf->pdev->dev,
14445 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
14446 pf->hw.func_caps.num_tx_qp,
14447 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
14448 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
14449 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
14454 * i40e_setup_pf_filter_control - Setup PF static filter control
14455 * @pf: PF to be setup
14457 * i40e_setup_pf_filter_control sets up a PF's initial filter control
14458 * settings. If PE/FCoE are enabled then it will also set the per PF
14459 * based filter sizes required for them. It also enables Flow director,
14460 * ethertype and macvlan type filter settings for the pf.
14462 * Returns 0 on success, negative on failure
14464 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
14466 struct i40e_filter_control_settings *settings = &pf->filter_settings;
14468 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
14470 /* Flow Director is enabled */
14471 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
14472 settings->enable_fdir = true;
14474 /* Ethtype and MACVLAN filters enabled for PF */
14475 settings->enable_ethtype = true;
14476 settings->enable_macvlan = true;
14478 if (i40e_set_filter_control(&pf->hw, settings))
14484 #define INFO_STRING_LEN 255
14485 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
14486 static void i40e_print_features(struct i40e_pf *pf)
14488 struct i40e_hw *hw = &pf->hw;
14492 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
14496 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
14497 #ifdef CONFIG_PCI_IOV
14498 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
14500 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
14501 pf->hw.func_caps.num_vsis,
14502 pf->vsi[pf->lan_vsi]->num_queue_pairs);
14503 if (pf->flags & I40E_FLAG_RSS_ENABLED)
14504 i += scnprintf(&buf[i], REMAIN(i), " RSS");
14505 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
14506 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
14507 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
14508 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
14509 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
14511 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
14512 i += scnprintf(&buf[i], REMAIN(i), " DCB");
14513 i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
14514 i += scnprintf(&buf[i], REMAIN(i), " Geneve");
14515 if (pf->flags & I40E_FLAG_PTP)
14516 i += scnprintf(&buf[i], REMAIN(i), " PTP");
14517 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
14518 i += scnprintf(&buf[i], REMAIN(i), " VEB");
14520 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
14522 dev_info(&pf->pdev->dev, "%s\n", buf);
14524 WARN_ON(i > INFO_STRING_LEN);
14528 * i40e_get_platform_mac_addr - get platform-specific MAC address
14529 * @pdev: PCI device information struct
14530 * @pf: board private structure
14532 * Look up the MAC address for the device. First we'll try
14533 * eth_platform_get_mac_address, which will check Open Firmware, or arch
14534 * specific fallback. Otherwise, we'll default to the stored value in
14537 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
14539 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
14540 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
14544 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
14545 * @fec_cfg: FEC option to set in flags
14546 * @flags: ptr to flags in which we set FEC option
14548 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
14550 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
14551 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
14552 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
14553 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
14554 *flags |= I40E_FLAG_RS_FEC;
14555 *flags &= ~I40E_FLAG_BASE_R_FEC;
14557 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
14558 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
14559 *flags |= I40E_FLAG_BASE_R_FEC;
14560 *flags &= ~I40E_FLAG_RS_FEC;
14563 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
14567 * i40e_check_recovery_mode - check if we are running transition firmware
14568 * @pf: board private structure
14570 * Check registers indicating the firmware runs in recovery mode. Sets the
14571 * appropriate driver state.
14573 * Returns true if the recovery mode was detected, false otherwise
14575 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
14577 u32 val = rd32(&pf->hw, I40E_GL_FWSTS) & I40E_GL_FWSTS_FWS1B_MASK;
14578 bool is_recovery_mode = false;
14580 if (pf->hw.mac.type == I40E_MAC_XL710)
14582 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK ||
14583 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK ||
14584 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_TRANSITION_MASK ||
14585 val == I40E_XL710_GL_FWSTS_FWS1B_REC_MOD_NVM_MASK;
14586 if (pf->hw.mac.type == I40E_MAC_X722)
14588 val == I40E_X722_GL_FWSTS_FWS1B_REC_MOD_CORER_MASK ||
14589 val == I40E_X722_GL_FWSTS_FWS1B_REC_MOD_GLOBR_MASK;
14590 if (is_recovery_mode) {
14591 dev_notice(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
14592 dev_notice(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
14593 set_bit(__I40E_RECOVERY_MODE, pf->state);
14597 if (test_and_clear_bit(__I40E_RECOVERY_MODE, pf->state))
14598 dev_info(&pf->pdev->dev, "Reinitializing in normal mode with full functionality.\n");
14604 * i40e_pf_loop_reset - perform reset in a loop.
14605 * @pf: board private structure
14607 * This function is useful when a NIC is about to enter recovery mode.
14608 * When a NIC's internal data structures are corrupted the NIC's
14609 * firmware is going to enter recovery mode.
14610 * Right after a POR it takes about 7 minutes for firmware to enter
14611 * recovery mode. Until that time a NIC is in some kind of intermediate
14612 * state. After that time period the NIC almost surely enters
14613 * recovery mode. The only way for a driver to detect intermediate
14614 * state is to issue a series of pf-resets and check a return value.
14615 * If a PF reset returns success then the firmware could be in recovery
14616 * mode so the caller of this code needs to check for recovery mode
14617 * if this function returns success. There is a little chance that
14618 * firmware will hang in intermediate state forever.
14619 * Since waiting 7 minutes is quite a lot of time this function waits
14620 * 10 seconds and then gives up by returning an error.
14622 * Return 0 on success, negative on failure.
14624 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
14626 const unsigned short MAX_CNT = 1000;
14627 const unsigned short MSECS = 10;
14628 struct i40e_hw *hw = &pf->hw;
14632 for (cnt = 0; cnt < MAX_CNT; ++cnt) {
14633 ret = i40e_pf_reset(hw);
14639 if (cnt == MAX_CNT) {
14640 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
14649 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
14650 * @pf: board private structure
14651 * @hw: ptr to the hardware info
14653 * This function does a minimal setup of all subsystems needed for running
14656 * Returns 0 on success, negative on failure
14658 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
14660 struct i40e_vsi *vsi;
14664 pci_save_state(pf->pdev);
14666 /* set up periodic task facility */
14667 timer_setup(&pf->service_timer, i40e_service_timer, 0);
14668 pf->service_timer_period = HZ;
14670 INIT_WORK(&pf->service_task, i40e_service_task);
14671 clear_bit(__I40E_SERVICE_SCHED, pf->state);
14673 err = i40e_init_interrupt_scheme(pf);
14675 goto err_switch_setup;
14677 /* The number of VSIs reported by the FW is the minimum guaranteed
14678 * to us; HW supports far more and we share the remaining pool with
14679 * the other PFs. We allocate space for more than the guarantee with
14680 * the understanding that we might not get them all later.
14682 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
14683 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
14685 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
14687 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
14688 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
14692 goto err_switch_setup;
14695 /* We allocate one VSI which is needed as absolute minimum
14696 * in order to register the netdev
14698 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
14700 goto err_switch_setup;
14701 pf->lan_vsi = v_idx;
14702 vsi = pf->vsi[v_idx];
14704 goto err_switch_setup;
14705 vsi->alloc_queue_pairs = 1;
14706 err = i40e_config_netdev(vsi);
14708 goto err_switch_setup;
14709 err = register_netdev(vsi->netdev);
14711 goto err_switch_setup;
14712 vsi->netdev_registered = true;
14713 i40e_dbg_pf_init(pf);
14715 err = i40e_setup_misc_vector_for_recovery_mode(pf);
14717 goto err_switch_setup;
14719 /* tell the firmware that we're starting */
14720 i40e_send_version(pf);
14722 /* since everything's happy, start the service_task timer */
14723 mod_timer(&pf->service_timer,
14724 round_jiffies(jiffies + pf->service_timer_period));
14729 i40e_reset_interrupt_capability(pf);
14730 del_timer_sync(&pf->service_timer);
14731 i40e_shutdown_adminq(hw);
14732 iounmap(hw->hw_addr);
14733 pci_disable_pcie_error_reporting(pf->pdev);
14734 pci_release_mem_regions(pf->pdev);
14735 pci_disable_device(pf->pdev);
14742 * i40e_probe - Device initialization routine
14743 * @pdev: PCI device information struct
14744 * @ent: entry in i40e_pci_tbl
14746 * i40e_probe initializes a PF identified by a pci_dev structure.
14747 * The OS initialization, configuring of the PF private structure,
14748 * and a hardware reset occur.
14750 * Returns 0 on success, negative on failure
14752 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
14754 struct i40e_aq_get_phy_abilities_resp abilities;
14755 struct i40e_pf *pf;
14756 struct i40e_hw *hw;
14757 static u16 pfs_found;
14765 err = pci_enable_device_mem(pdev);
14769 /* set up for high or low dma */
14770 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
14772 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
14774 dev_err(&pdev->dev,
14775 "DMA configuration failed: 0x%x\n", err);
14780 /* set up pci connections */
14781 err = pci_request_mem_regions(pdev, i40e_driver_name);
14783 dev_info(&pdev->dev,
14784 "pci_request_selected_regions failed %d\n", err);
14788 pci_enable_pcie_error_reporting(pdev);
14789 pci_set_master(pdev);
14791 /* Now that we have a PCI connection, we need to do the
14792 * low level device setup. This is primarily setting up
14793 * the Admin Queue structures and then querying for the
14794 * device's current profile information.
14796 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
14803 set_bit(__I40E_DOWN, pf->state);
14808 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
14809 I40E_MAX_CSR_SPACE);
14810 /* We believe that the highest register to read is
14811 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
14812 * is not less than that before mapping to prevent a
14815 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
14816 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
14821 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
14822 if (!hw->hw_addr) {
14824 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
14825 (unsigned int)pci_resource_start(pdev, 0),
14826 pf->ioremap_len, err);
14829 hw->vendor_id = pdev->vendor;
14830 hw->device_id = pdev->device;
14831 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
14832 hw->subsystem_vendor_id = pdev->subsystem_vendor;
14833 hw->subsystem_device_id = pdev->subsystem_device;
14834 hw->bus.device = PCI_SLOT(pdev->devfn);
14835 hw->bus.func = PCI_FUNC(pdev->devfn);
14836 hw->bus.bus_id = pdev->bus->number;
14837 pf->instance = pfs_found;
14839 /* Select something other than the 802.1ad ethertype for the
14840 * switch to use internally and drop on ingress.
14842 hw->switch_tag = 0xffff;
14843 hw->first_tag = ETH_P_8021AD;
14844 hw->second_tag = ETH_P_8021Q;
14846 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
14847 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
14848 INIT_LIST_HEAD(&pf->ddp_old_prof);
14850 /* set up the locks for the AQ, do this only once in probe
14851 * and destroy them only once in remove
14853 mutex_init(&hw->aq.asq_mutex);
14854 mutex_init(&hw->aq.arq_mutex);
14856 pf->msg_enable = netif_msg_init(debug,
14861 pf->hw.debug_mask = debug;
14863 /* do a special CORER for clearing PXE mode once at init */
14864 if (hw->revision_id == 0 &&
14865 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
14866 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
14871 i40e_clear_pxe_mode(hw);
14874 /* Reset here to make sure all is clean and to define PF 'n' */
14877 err = i40e_set_mac_type(hw);
14879 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
14884 err = i40e_pf_loop_reset(pf);
14886 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
14890 i40e_check_recovery_mode(pf);
14892 hw->aq.num_arq_entries = I40E_AQ_LEN;
14893 hw->aq.num_asq_entries = I40E_AQ_LEN;
14894 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
14895 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
14896 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
14898 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
14900 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
14902 err = i40e_init_shared_code(hw);
14904 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
14909 /* set up a default setting for link flow control */
14910 pf->hw.fc.requested_mode = I40E_FC_NONE;
14912 err = i40e_init_adminq(hw);
14914 if (err == I40E_ERR_FIRMWARE_API_VERSION)
14915 dev_info(&pdev->dev,
14916 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
14917 hw->aq.api_maj_ver,
14918 hw->aq.api_min_ver,
14919 I40E_FW_API_VERSION_MAJOR,
14920 I40E_FW_MINOR_VERSION(hw));
14922 dev_info(&pdev->dev,
14923 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
14927 i40e_get_oem_version(hw);
14929 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
14930 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
14931 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
14932 hw->aq.api_maj_ver, hw->aq.api_min_ver,
14933 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
14934 hw->subsystem_vendor_id, hw->subsystem_device_id);
14936 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
14937 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
14938 dev_info(&pdev->dev,
14939 "The driver for the device detected a newer version of the NVM image v%u.%u than expected v%u.%u. Please install the most recent version of the network driver.\n",
14940 hw->aq.api_maj_ver,
14941 hw->aq.api_min_ver,
14942 I40E_FW_API_VERSION_MAJOR,
14943 I40E_FW_MINOR_VERSION(hw));
14944 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
14945 dev_info(&pdev->dev,
14946 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
14947 hw->aq.api_maj_ver,
14948 hw->aq.api_min_ver,
14949 I40E_FW_API_VERSION_MAJOR,
14950 I40E_FW_MINOR_VERSION(hw));
14952 i40e_verify_eeprom(pf);
14954 /* Rev 0 hardware was never productized */
14955 if (hw->revision_id < 1)
14956 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
14958 i40e_clear_pxe_mode(hw);
14960 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
14962 goto err_adminq_setup;
14964 err = i40e_sw_init(pf);
14966 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
14970 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
14971 return i40e_init_recovery_mode(pf, hw);
14973 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
14974 hw->func_caps.num_rx_qp, 0, 0);
14976 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
14977 goto err_init_lan_hmc;
14980 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
14982 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
14984 goto err_configure_lan_hmc;
14987 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
14988 * Ignore error return codes because if it was already disabled via
14989 * hardware settings this will fail
14991 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
14992 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
14993 i40e_aq_stop_lldp(hw, true, false, NULL);
14996 /* allow a platform config to override the HW addr */
14997 i40e_get_platform_mac_addr(pdev, pf);
14999 if (!is_valid_ether_addr(hw->mac.addr)) {
15000 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15004 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15005 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15006 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15007 if (is_valid_ether_addr(hw->mac.port_addr))
15008 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15010 pci_set_drvdata(pdev, pf);
15011 pci_save_state(pdev);
15013 dev_info(&pdev->dev,
15014 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15015 "FW LLDP is disabled\n" :
15016 "FW LLDP is enabled\n");
15018 /* Enable FW to write default DCB config on link-up */
15019 i40e_aq_set_dcb_parameters(hw, true, NULL);
15021 #ifdef CONFIG_I40E_DCB
15022 err = i40e_init_pf_dcb(pf);
15024 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15025 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15026 /* Continue without DCB enabled */
15028 #endif /* CONFIG_I40E_DCB */
15030 /* set up periodic task facility */
15031 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15032 pf->service_timer_period = HZ;
15034 INIT_WORK(&pf->service_task, i40e_service_task);
15035 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15037 /* NVM bit on means WoL disabled for the port */
15038 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15039 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15040 pf->wol_en = false;
15043 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15045 /* set up the main switch operations */
15046 i40e_determine_queue_usage(pf);
15047 err = i40e_init_interrupt_scheme(pf);
15049 goto err_switch_setup;
15051 /* The number of VSIs reported by the FW is the minimum guaranteed
15052 * to us; HW supports far more and we share the remaining pool with
15053 * the other PFs. We allocate space for more than the guarantee with
15054 * the understanding that we might not get them all later.
15056 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15057 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15059 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15061 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15062 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15066 goto err_switch_setup;
15069 #ifdef CONFIG_PCI_IOV
15070 /* prep for VF support */
15071 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15072 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15073 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15074 if (pci_num_vf(pdev))
15075 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15078 err = i40e_setup_pf_switch(pf, false);
15080 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15083 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15085 /* Make sure flow control is set according to current settings */
15086 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
15087 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
15088 dev_dbg(&pf->pdev->dev,
15089 "Set fc with err %s aq_err %s on get_phy_cap\n",
15090 i40e_stat_str(hw, err),
15091 i40e_aq_str(hw, hw->aq.asq_last_status));
15092 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
15093 dev_dbg(&pf->pdev->dev,
15094 "Set fc with err %s aq_err %s on set_phy_config\n",
15095 i40e_stat_str(hw, err),
15096 i40e_aq_str(hw, hw->aq.asq_last_status));
15097 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
15098 dev_dbg(&pf->pdev->dev,
15099 "Set fc with err %s aq_err %s on get_link_info\n",
15100 i40e_stat_str(hw, err),
15101 i40e_aq_str(hw, hw->aq.asq_last_status));
15103 /* if FDIR VSI was set up, start it now */
15104 for (i = 0; i < pf->num_alloc_vsi; i++) {
15105 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15106 i40e_vsi_open(pf->vsi[i]);
15111 /* The driver only wants link up/down and module qualification
15112 * reports from firmware. Note the negative logic.
15114 err = i40e_aq_set_phy_int_mask(&pf->hw,
15115 ~(I40E_AQ_EVENT_LINK_UPDOWN |
15116 I40E_AQ_EVENT_MEDIA_NA |
15117 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15119 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15120 i40e_stat_str(&pf->hw, err),
15121 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15123 /* Reconfigure hardware for allowing smaller MSS in the case
15124 * of TSO, so that we avoid the MDD being fired and causing
15125 * a reset in the case of small MSS+TSO.
15127 val = rd32(hw, I40E_REG_MSS);
15128 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15129 val &= ~I40E_REG_MSS_MIN_MASK;
15130 val |= I40E_64BYTE_MSS;
15131 wr32(hw, I40E_REG_MSS, val);
15134 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15136 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15138 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15139 i40e_stat_str(&pf->hw, err),
15140 i40e_aq_str(&pf->hw,
15141 pf->hw.aq.asq_last_status));
15143 /* The main driver is (mostly) up and happy. We need to set this state
15144 * before setting up the misc vector or we get a race and the vector
15145 * ends up disabled forever.
15147 clear_bit(__I40E_DOWN, pf->state);
15149 /* In case of MSIX we are going to setup the misc vector right here
15150 * to handle admin queue events etc. In case of legacy and MSI
15151 * the misc functionality and queue processing is combined in
15152 * the same vector and that gets setup at open.
15154 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15155 err = i40e_setup_misc_vector(pf);
15157 dev_info(&pdev->dev,
15158 "setup of misc vector failed: %d\n", err);
15163 #ifdef CONFIG_PCI_IOV
15164 /* prep for VF support */
15165 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15166 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15167 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15168 /* disable link interrupts for VFs */
15169 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15170 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15171 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15174 if (pci_num_vf(pdev)) {
15175 dev_info(&pdev->dev,
15176 "Active VFs found, allocating resources.\n");
15177 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15179 dev_info(&pdev->dev,
15180 "Error %d allocating resources for existing VFs\n",
15184 #endif /* CONFIG_PCI_IOV */
15186 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15187 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15188 pf->num_iwarp_msix,
15189 I40E_IWARP_IRQ_PILE_ID);
15190 if (pf->iwarp_base_vector < 0) {
15191 dev_info(&pdev->dev,
15192 "failed to get tracking for %d vectors for IWARP err=%d\n",
15193 pf->num_iwarp_msix, pf->iwarp_base_vector);
15194 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15198 i40e_dbg_pf_init(pf);
15200 /* tell the firmware that we're starting */
15201 i40e_send_version(pf);
15203 /* since everything's happy, start the service_task timer */
15204 mod_timer(&pf->service_timer,
15205 round_jiffies(jiffies + pf->service_timer_period));
15207 /* add this PF to client device list and launch a client service task */
15208 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15209 err = i40e_lan_add_device(pf);
15211 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15215 #define PCI_SPEED_SIZE 8
15216 #define PCI_WIDTH_SIZE 8
15217 /* Devices on the IOSF bus do not have this information
15218 * and will report PCI Gen 1 x 1 by default so don't bother
15221 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15222 char speed[PCI_SPEED_SIZE] = "Unknown";
15223 char width[PCI_WIDTH_SIZE] = "Unknown";
15225 /* Get the negotiated link width and speed from PCI config
15228 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15231 i40e_set_pci_config_data(hw, link_status);
15233 switch (hw->bus.speed) {
15234 case i40e_bus_speed_8000:
15235 strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15236 case i40e_bus_speed_5000:
15237 strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15238 case i40e_bus_speed_2500:
15239 strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15243 switch (hw->bus.width) {
15244 case i40e_bus_width_pcie_x8:
15245 strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15246 case i40e_bus_width_pcie_x4:
15247 strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15248 case i40e_bus_width_pcie_x2:
15249 strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15250 case i40e_bus_width_pcie_x1:
15251 strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15256 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15259 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15260 hw->bus.speed < i40e_bus_speed_8000) {
15261 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15262 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15266 /* get the requested speeds from the fw */
15267 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15269 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
15270 i40e_stat_str(&pf->hw, err),
15271 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15272 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15274 /* set the FEC config due to the board capabilities */
15275 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15277 /* get the supported phy types from the fw */
15278 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15280 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
15281 i40e_stat_str(&pf->hw, err),
15282 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15284 /* Add a filter to drop all Flow control frames from any VSI from being
15285 * transmitted. By doing so we stop a malicious VF from sending out
15286 * PAUSE or PFC frames and potentially controlling traffic for other
15288 * The FW can still send Flow control frames if enabled.
15290 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15291 pf->main_vsi_seid);
15293 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15294 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15295 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15296 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15297 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15298 /* print a string summarizing features */
15299 i40e_print_features(pf);
15303 /* Unwind what we've done if something failed in the setup */
15305 set_bit(__I40E_DOWN, pf->state);
15306 i40e_clear_interrupt_scheme(pf);
15309 i40e_reset_interrupt_capability(pf);
15310 del_timer_sync(&pf->service_timer);
15312 err_configure_lan_hmc:
15313 (void)i40e_shutdown_lan_hmc(hw);
15315 kfree(pf->qp_pile);
15319 iounmap(hw->hw_addr);
15323 pci_disable_pcie_error_reporting(pdev);
15324 pci_release_mem_regions(pdev);
15327 pci_disable_device(pdev);
15332 * i40e_remove - Device removal routine
15333 * @pdev: PCI device information struct
15335 * i40e_remove is called by the PCI subsystem to alert the driver
15336 * that is should release a PCI device. This could be caused by a
15337 * Hot-Plug event, or because the driver is going to be removed from
15340 static void i40e_remove(struct pci_dev *pdev)
15342 struct i40e_pf *pf = pci_get_drvdata(pdev);
15343 struct i40e_hw *hw = &pf->hw;
15344 i40e_status ret_code;
15347 i40e_dbg_pf_exit(pf);
15351 /* Disable RSS in hw */
15352 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
15353 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
15355 /* no more scheduling of any task */
15356 set_bit(__I40E_SUSPENDED, pf->state);
15357 set_bit(__I40E_DOWN, pf->state);
15358 if (pf->service_timer.function)
15359 del_timer_sync(&pf->service_timer);
15360 if (pf->service_task.func)
15361 cancel_work_sync(&pf->service_task);
15363 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
15364 struct i40e_vsi *vsi = pf->vsi[0];
15366 /* We know that we have allocated only one vsi for this PF,
15367 * it was just for registering netdevice, so the interface
15368 * could be visible in the 'ifconfig' output
15370 unregister_netdev(vsi->netdev);
15371 free_netdev(vsi->netdev);
15376 /* Client close must be called explicitly here because the timer
15377 * has been stopped.
15379 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15381 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
15383 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
15386 i40e_fdir_teardown(pf);
15388 /* If there is a switch structure or any orphans, remove them.
15389 * This will leave only the PF's VSI remaining.
15391 for (i = 0; i < I40E_MAX_VEB; i++) {
15395 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
15396 pf->veb[i]->uplink_seid == 0)
15397 i40e_switch_branch_release(pf->veb[i]);
15400 /* Now we can shutdown the PF's VSI, just before we kill
15403 if (pf->vsi[pf->lan_vsi])
15404 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
15406 i40e_cloud_filter_exit(pf);
15408 /* remove attached clients */
15409 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15410 ret_code = i40e_lan_del_device(pf);
15412 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
15416 /* shutdown and destroy the HMC */
15417 if (hw->hmc.hmc_obj) {
15418 ret_code = i40e_shutdown_lan_hmc(hw);
15420 dev_warn(&pdev->dev,
15421 "Failed to destroy the HMC resources: %d\n",
15426 /* Free MSI/legacy interrupt 0 when in recovery mode. */
15427 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15428 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15429 free_irq(pf->pdev->irq, pf);
15431 /* shutdown the adminq */
15432 i40e_shutdown_adminq(hw);
15434 /* destroy the locks only once, here */
15435 mutex_destroy(&hw->aq.arq_mutex);
15436 mutex_destroy(&hw->aq.asq_mutex);
15438 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
15440 i40e_clear_interrupt_scheme(pf);
15441 for (i = 0; i < pf->num_alloc_vsi; i++) {
15443 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
15444 i40e_vsi_clear_rings(pf->vsi[i]);
15445 i40e_vsi_clear(pf->vsi[i]);
15451 for (i = 0; i < I40E_MAX_VEB; i++) {
15456 kfree(pf->qp_pile);
15459 iounmap(hw->hw_addr);
15461 pci_release_mem_regions(pdev);
15463 pci_disable_pcie_error_reporting(pdev);
15464 pci_disable_device(pdev);
15468 * i40e_pci_error_detected - warning that something funky happened in PCI land
15469 * @pdev: PCI device information struct
15470 * @error: the type of PCI error
15472 * Called to warn that something happened and the error handling steps
15473 * are in progress. Allows the driver to quiesce things, be ready for
15476 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
15477 enum pci_channel_state error)
15479 struct i40e_pf *pf = pci_get_drvdata(pdev);
15481 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
15484 dev_info(&pdev->dev,
15485 "Cannot recover - error happened during device probe\n");
15486 return PCI_ERS_RESULT_DISCONNECT;
15489 /* shutdown all operations */
15490 if (!test_bit(__I40E_SUSPENDED, pf->state))
15491 i40e_prep_for_reset(pf, false);
15493 /* Request a slot reset */
15494 return PCI_ERS_RESULT_NEED_RESET;
15498 * i40e_pci_error_slot_reset - a PCI slot reset just happened
15499 * @pdev: PCI device information struct
15501 * Called to find if the driver can work with the device now that
15502 * the pci slot has been reset. If a basic connection seems good
15503 * (registers are readable and have sane content) then return a
15504 * happy little PCI_ERS_RESULT_xxx.
15506 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
15508 struct i40e_pf *pf = pci_get_drvdata(pdev);
15509 pci_ers_result_t result;
15512 dev_dbg(&pdev->dev, "%s\n", __func__);
15513 if (pci_enable_device_mem(pdev)) {
15514 dev_info(&pdev->dev,
15515 "Cannot re-enable PCI device after reset.\n");
15516 result = PCI_ERS_RESULT_DISCONNECT;
15518 pci_set_master(pdev);
15519 pci_restore_state(pdev);
15520 pci_save_state(pdev);
15521 pci_wake_from_d3(pdev, false);
15523 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
15525 result = PCI_ERS_RESULT_RECOVERED;
15527 result = PCI_ERS_RESULT_DISCONNECT;
15534 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
15535 * @pdev: PCI device information struct
15537 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
15539 struct i40e_pf *pf = pci_get_drvdata(pdev);
15541 i40e_prep_for_reset(pf, false);
15545 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
15546 * @pdev: PCI device information struct
15548 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
15550 struct i40e_pf *pf = pci_get_drvdata(pdev);
15552 i40e_reset_and_rebuild(pf, false, false);
15556 * i40e_pci_error_resume - restart operations after PCI error recovery
15557 * @pdev: PCI device information struct
15559 * Called to allow the driver to bring things back up after PCI error
15560 * and/or reset recovery has finished.
15562 static void i40e_pci_error_resume(struct pci_dev *pdev)
15564 struct i40e_pf *pf = pci_get_drvdata(pdev);
15566 dev_dbg(&pdev->dev, "%s\n", __func__);
15567 if (test_bit(__I40E_SUSPENDED, pf->state))
15570 i40e_handle_reset_warning(pf, false);
15574 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
15575 * using the mac_address_write admin q function
15576 * @pf: pointer to i40e_pf struct
15578 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
15580 struct i40e_hw *hw = &pf->hw;
15585 /* Get current MAC address in case it's an LAA */
15586 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
15587 ether_addr_copy(mac_addr,
15588 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
15590 dev_err(&pf->pdev->dev,
15591 "Failed to retrieve MAC address; using default\n");
15592 ether_addr_copy(mac_addr, hw->mac.addr);
15595 /* The FW expects the mac address write cmd to first be called with
15596 * one of these flags before calling it again with the multicast
15599 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
15601 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
15602 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
15604 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
15606 dev_err(&pf->pdev->dev,
15607 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
15611 flags = I40E_AQC_MC_MAG_EN
15612 | I40E_AQC_WOL_PRESERVE_ON_PFR
15613 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
15614 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
15616 dev_err(&pf->pdev->dev,
15617 "Failed to enable Multicast Magic Packet wake up\n");
15621 * i40e_shutdown - PCI callback for shutting down
15622 * @pdev: PCI device information struct
15624 static void i40e_shutdown(struct pci_dev *pdev)
15626 struct i40e_pf *pf = pci_get_drvdata(pdev);
15627 struct i40e_hw *hw = &pf->hw;
15629 set_bit(__I40E_SUSPENDED, pf->state);
15630 set_bit(__I40E_DOWN, pf->state);
15632 del_timer_sync(&pf->service_timer);
15633 cancel_work_sync(&pf->service_task);
15634 i40e_cloud_filter_exit(pf);
15635 i40e_fdir_teardown(pf);
15637 /* Client close must be called explicitly here because the timer
15638 * has been stopped.
15640 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15642 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
15643 i40e_enable_mc_magic_wake(pf);
15645 i40e_prep_for_reset(pf, false);
15647 wr32(hw, I40E_PFPM_APM,
15648 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
15649 wr32(hw, I40E_PFPM_WUFC,
15650 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
15652 /* Free MSI/legacy interrupt 0 when in recovery mode. */
15653 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
15654 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
15655 free_irq(pf->pdev->irq, pf);
15657 /* Since we're going to destroy queues during the
15658 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
15662 i40e_clear_interrupt_scheme(pf);
15665 if (system_state == SYSTEM_POWER_OFF) {
15666 pci_wake_from_d3(pdev, pf->wol_en);
15667 pci_set_power_state(pdev, PCI_D3hot);
15672 * i40e_suspend - PM callback for moving to D3
15673 * @dev: generic device information structure
15675 static int __maybe_unused i40e_suspend(struct device *dev)
15677 struct i40e_pf *pf = dev_get_drvdata(dev);
15678 struct i40e_hw *hw = &pf->hw;
15680 /* If we're already suspended, then there is nothing to do */
15681 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
15684 set_bit(__I40E_DOWN, pf->state);
15686 /* Ensure service task will not be running */
15687 del_timer_sync(&pf->service_timer);
15688 cancel_work_sync(&pf->service_task);
15690 /* Client close must be called explicitly here because the timer
15691 * has been stopped.
15693 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
15695 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
15696 i40e_enable_mc_magic_wake(pf);
15698 /* Since we're going to destroy queues during the
15699 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
15704 i40e_prep_for_reset(pf, true);
15706 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
15707 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
15709 /* Clear the interrupt scheme and release our IRQs so that the system
15710 * can safely hibernate even when there are a large number of CPUs.
15711 * Otherwise hibernation might fail when mapping all the vectors back
15714 i40e_clear_interrupt_scheme(pf);
15722 * i40e_resume - PM callback for waking up from D3
15723 * @dev: generic device information structure
15725 static int __maybe_unused i40e_resume(struct device *dev)
15727 struct i40e_pf *pf = dev_get_drvdata(dev);
15730 /* If we're not suspended, then there is nothing to do */
15731 if (!test_bit(__I40E_SUSPENDED, pf->state))
15734 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
15735 * since we're going to be restoring queues
15739 /* We cleared the interrupt scheme when we suspended, so we need to
15740 * restore it now to resume device functionality.
15742 err = i40e_restore_interrupt_scheme(pf);
15744 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
15748 clear_bit(__I40E_DOWN, pf->state);
15749 i40e_reset_and_rebuild(pf, false, true);
15753 /* Clear suspended state last after everything is recovered */
15754 clear_bit(__I40E_SUSPENDED, pf->state);
15756 /* Restart the service task */
15757 mod_timer(&pf->service_timer,
15758 round_jiffies(jiffies + pf->service_timer_period));
15763 static const struct pci_error_handlers i40e_err_handler = {
15764 .error_detected = i40e_pci_error_detected,
15765 .slot_reset = i40e_pci_error_slot_reset,
15766 .reset_prepare = i40e_pci_error_reset_prepare,
15767 .reset_done = i40e_pci_error_reset_done,
15768 .resume = i40e_pci_error_resume,
15771 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
15773 static struct pci_driver i40e_driver = {
15774 .name = i40e_driver_name,
15775 .id_table = i40e_pci_tbl,
15776 .probe = i40e_probe,
15777 .remove = i40e_remove,
15779 .pm = &i40e_pm_ops,
15781 .shutdown = i40e_shutdown,
15782 .err_handler = &i40e_err_handler,
15783 .sriov_configure = i40e_pci_sriov_configure,
15787 * i40e_init_module - Driver registration routine
15789 * i40e_init_module is the first routine called when the driver is
15790 * loaded. All it does is register with the PCI subsystem.
15792 static int __init i40e_init_module(void)
15794 pr_info("%s: %s - version %s\n", i40e_driver_name,
15795 i40e_driver_string, i40e_driver_version_str);
15796 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
15798 /* There is no need to throttle the number of active tasks because
15799 * each device limits its own task using a state bit for scheduling
15800 * the service task, and the device tasks do not interfere with each
15801 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
15802 * since we need to be able to guarantee forward progress even under
15805 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
15807 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
15812 return pci_register_driver(&i40e_driver);
15814 module_init(i40e_init_module);
15817 * i40e_exit_module - Driver exit cleanup routine
15819 * i40e_exit_module is called just before the driver is removed
15822 static void __exit i40e_exit_module(void)
15824 pci_unregister_driver(&i40e_driver);
15825 destroy_workqueue(i40e_wq);
15828 module_exit(i40e_exit_module);