drivers/net/ethernet/intel/i40e/i40e_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
   3
   4 #include <generated/utsrelease.h>
   5 #include <linux/crash_dump.h>
   6 #include <linux/if_bridge.h>
   7 #include <linux/if_macvlan.h>
   8 #include <linux/module.h>
   9 #include <net/pkt_cls.h>
  10 #include <net/xdp_sock_drv.h>
  11
  12 /* Local includes */
  13 #include "i40e.h"
  14 #include "i40e_devids.h"
  15 #include "i40e_diag.h"
  16 #include "i40e_lan_hmc.h"
  17 #include "i40e_virtchnl_pf.h"
  18 #include "i40e_xsk.h"
  19
  20 /* All i40e tracepoints are defined by the include below, which
  21  * must be included exactly once across the whole kernel with
  22  * CREATE_TRACE_POINTS defined
  23  */
  24 #define CREATE_TRACE_POINTS
  25 #include "i40e_trace.h"
  26
  27 const char i40e_driver_name[] = "i40e";
  28 static const char i40e_driver_string[] =
  29                         "Intel(R) Ethernet Connection XL710 Network Driver";
  30
  31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
  32
  33 /* a bit of forward declarations */
  34 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
  35 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
  36 static int i40e_add_vsi(struct i40e_vsi *vsi);
  37 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
  38 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  39 static int i40e_setup_misc_vector(struct i40e_pf *pf);
  40 static void i40e_determine_queue_usage(struct i40e_pf *pf);
  41 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
  42 static void i40e_prep_for_reset(struct i40e_pf *pf);
  43 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
  44                                    bool lock_acquired);
  45 static int i40e_reset(struct i40e_pf *pf);
  46 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  47 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
  48 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
  49 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
  50 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
  51 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
  52 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
  53 static int i40e_get_capabilities(struct i40e_pf *pf,
  54                                  enum i40e_admin_queue_opc list_type);
  55 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
  56
  57 /* i40e_pci_tbl - PCI Device ID Table
  58  *
  59  * Last entry must be all 0s
  60  *
  61  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  62  *   Class, Class Mask, private data (not used) }
  63  */
  64 static const struct pci_device_id i40e_pci_tbl[] = {
  65         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
  66         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
  67         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
  68         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
  69         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
  70         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
  71         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
  72         {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_BC), 0},
  73         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
  74         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
  75         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
  76         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
  77         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
  78         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
  79         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
  80         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
  81         {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
  82         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
  83         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
  84         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
  85         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
  86         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
  87         {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
  88         {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
  89         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
  90         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
  91         /* required last entry */
  92         {0, }
  93 };
  94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
  95
  96 #define I40E_MAX_VF_COUNT 128
  97 static int debug = -1;
  98 module_param(debug, uint, 0);
  99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
 100
 101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
 103 MODULE_LICENSE("GPL v2");
 104
 105 static struct workqueue_struct *i40e_wq;
 106
 107 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
 108                                   struct net_device *netdev, int delta)
 109 {
 110         struct netdev_hw_addr_list *ha_list;
 111         struct netdev_hw_addr *ha;
 112
 113         if (!f || !netdev)
 114                 return;
 115
 116         if (is_unicast_ether_addr(f->macaddr) || is_link_local_ether_addr(f->macaddr))
 117                 ha_list = &netdev->uc;
 118         else
 119                 ha_list = &netdev->mc;
 120
 121         netdev_hw_addr_list_for_each(ha, ha_list) {
 122                 if (ether_addr_equal(ha->addr, f->macaddr)) {
 123                         ha->refcount += delta;
 124                         if (ha->refcount <= 0)
 125                                 ha->refcount = 1;
 126                         break;
 127                 }
 128         }
 129 }
 130
 131 /**
 132  * i40e_hw_to_dev - get device pointer from the hardware structure
 133  * @hw: pointer to the device HW structure
 134  **/
 135 struct device *i40e_hw_to_dev(struct i40e_hw *hw)
 136 {
 137         struct i40e_pf *pf = i40e_hw_to_pf(hw);
 138
 139         return &pf->pdev->dev;
 140 }
 141
 142 /**
 143  * i40e_allocate_dma_mem - OS specific memory alloc for shared code
 144  * @hw:   pointer to the HW structure
 145  * @mem:  ptr to mem struct to fill out
 146  * @size: size of memory requested
 147  * @alignment: what to align the allocation to
 148  **/
 149 int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
 150                           u64 size, u32 alignment)
 151 {
 152         struct i40e_pf *pf = i40e_hw_to_pf(hw);
 153
 154         mem->size = ALIGN(size, alignment);
 155         mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
 156                                      GFP_KERNEL);
 157         if (!mem->va)
 158                 return -ENOMEM;
 159
 160         return 0;
 161 }
 162
 163 /**
 164  * i40e_free_dma_mem - OS specific memory free for shared code
 165  * @hw:   pointer to the HW structure
 166  * @mem:  ptr to mem struct to free
 167  **/
 168 int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
 169 {
 170         struct i40e_pf *pf = i40e_hw_to_pf(hw);
 171
 172         dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
 173         mem->va = NULL;
 174         mem->pa = 0;
 175         mem->size = 0;
 176
 177         return 0;
 178 }
 179
 180 /**
 181  * i40e_allocate_virt_mem - OS specific memory alloc for shared code
 182  * @hw:   pointer to the HW structure
 183  * @mem:  ptr to mem struct to fill out
 184  * @size: size of memory requested
 185  **/
 186 int i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem,
 187                            u32 size)
 188 {
 189         mem->size = size;
 190         mem->va = kzalloc(size, GFP_KERNEL);
 191
 192         if (!mem->va)
 193                 return -ENOMEM;
 194
 195         return 0;
 196 }
 197
 198 /**
 199  * i40e_free_virt_mem - OS specific memory free for shared code
 200  * @hw:   pointer to the HW structure
 201  * @mem:  ptr to mem struct to free
 202  **/
 203 int i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
 204 {
 205         /* it's ok to kfree a NULL pointer */
 206         kfree(mem->va);
 207         mem->va = NULL;
 208         mem->size = 0;
 209
 210         return 0;
 211 }
 212
 213 /**
 214  * i40e_get_lump - find a lump of free generic resource
 215  * @pf: board private structure
 216  * @pile: the pile of resource to search
 217  * @needed: the number of items needed
 218  * @id: an owner id to stick on the items assigned
 219  *
 220  * Returns the base item index of the lump, or negative for error
 221  **/
 222 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
 223                          u16 needed, u16 id)
 224 {
 225         int ret = -ENOMEM;
 226         int i, j;
 227
 228         if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
 229                 dev_info(&pf->pdev->dev,
 230                          "param err: pile=%s needed=%d id=0x%04x\n",
 231                          pile ? "<valid>" : "<null>", needed, id);
 232                 return -EINVAL;
 233         }
 234
 235         /* Allocate last queue in the pile for FDIR VSI queue
 236          * so it doesn't fragment the qp_pile
 237          */
 238         if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
 239                 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
 240                         dev_err(&pf->pdev->dev,
 241                                 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
 242                                 pile->num_entries - 1);
 243                         return -ENOMEM;
 244                 }
 245                 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
 246                 return pile->num_entries - 1;
 247         }
 248
 249         i = 0;
 250         while (i < pile->num_entries) {
 251                 /* skip already allocated entries */
 252                 if (pile->list[i] & I40E_PILE_VALID_BIT) {
 253                         i++;
 254                         continue;
 255                 }
 256
 257                 /* do we have enough in this lump? */
 258                 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
 259                         if (pile->list[i+j] & I40E_PILE_VALID_BIT)
 260                                 break;
 261                 }
 262
 263                 if (j == needed) {
 264                         /* there was enough, so assign it to the requestor */
 265                         for (j = 0; j < needed; j++)
 266                                 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
 267                         ret = i;
 268                         break;
 269                 }
 270
 271                 /* not enough, so skip over it and continue looking */
 272                 i += j;
 273         }
 274
 275         return ret;
 276 }
 277
 278 /**
 279  * i40e_put_lump - return a lump of generic resource
 280  * @pile: the pile of resource to search
 281  * @index: the base item index
 282  * @id: the owner id of the items assigned
 283  *
 284  * Returns the count of items in the lump
 285  **/
 286 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
 287 {
 288         int valid_id = (id | I40E_PILE_VALID_BIT);
 289         int count = 0;
 290         u16 i;
 291
 292         if (!pile || index >= pile->num_entries)
 293                 return -EINVAL;
 294
 295         for (i = index;
 296              i < pile->num_entries && pile->list[i] == valid_id;
 297              i++) {
 298                 pile->list[i] = 0;
 299                 count++;
 300         }
 301
 302
 303         return count;
 304 }
 305
 306 /**
 307  * i40e_find_vsi_from_id - searches for the vsi with the given id
 308  * @pf: the pf structure to search for the vsi
 309  * @id: id of the vsi it is searching for
 310  **/
 311 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
 312 {
 313         int i;
 314
 315         for (i = 0; i < pf->num_alloc_vsi; i++)
 316                 if (pf->vsi[i] && (pf->vsi[i]->id == id))
 317                         return pf->vsi[i];
 318
 319         return NULL;
 320 }
 321
 322 /**
 323  * i40e_service_event_schedule - Schedule the service task to wake up
 324  * @pf: board private structure
 325  *
 326  * If not already scheduled, this puts the task into the work queue
 327  **/
 328 void i40e_service_event_schedule(struct i40e_pf *pf)
 329 {
 330         if ((!test_bit(__I40E_DOWN, pf->state) &&
 331              !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
 332               test_bit(__I40E_RECOVERY_MODE, pf->state))
 333                 queue_work(i40e_wq, &pf->service_task);
 334 }
 335
 336 /**
 337  * i40e_tx_timeout - Respond to a Tx Hang
 338  * @netdev: network interface device structure
 339  * @txqueue: queue number timing out
 340  *
 341  * If any port has noticed a Tx timeout, it is likely that the whole
 342  * device is munged, not just the one netdev port, so go for the full
 343  * reset.
 344  **/
 345 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
 346 {
 347         struct i40e_netdev_priv *np = netdev_priv(netdev);
 348         struct i40e_vsi *vsi = np->vsi;
 349         struct i40e_pf *pf = vsi->back;
 350         struct i40e_ring *tx_ring = NULL;
 351         unsigned int i;
 352         u32 head, val;
 353
 354         pf->tx_timeout_count++;
 355
 356         /* with txqueue index, find the tx_ring struct */
 357         for (i = 0; i < vsi->num_queue_pairs; i++) {
 358                 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
 359                         if (txqueue ==
 360                             vsi->tx_rings[i]->queue_index) {
 361                                 tx_ring = vsi->tx_rings[i];
 362                                 break;
 363                         }
 364                 }
 365         }
 366
 367         if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
 368                 pf->tx_timeout_recovery_level = 1;  /* reset after some time */
 369         else if (time_before(jiffies,
 370                       (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
 371                 return;   /* don't do any new action before the next timeout */
 372
 373         /* don't kick off another recovery if one is already pending */
 374         if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
 375                 return;
 376
 377         if (tx_ring) {
 378                 head = i40e_get_head(tx_ring);
 379                 /* Read interrupt register */
 380                 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
 381                         val = rd32(&pf->hw,
 382                              I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
 383                                                 tx_ring->vsi->base_vector - 1));
 384                 else
 385                         val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
 386
 387                 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
 388                             vsi->seid, txqueue, tx_ring->next_to_clean,
 389                             head, tx_ring->next_to_use,
 390                             readl(tx_ring->tail), val);
 391         }
 392
 393         pf->tx_timeout_last_recovery = jiffies;
 394         netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
 395                     pf->tx_timeout_recovery_level, txqueue);
 396
 397         switch (pf->tx_timeout_recovery_level) {
 398         case 1:
 399                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
 400                 break;
 401         case 2:
 402                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
 403                 break;
 404         case 3:
 405                 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
 406                 break;
 407         default:
 408                 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in non-recoverable state.\n");
 409                 set_bit(__I40E_DOWN_REQUESTED, pf->state);
 410                 set_bit(__I40E_VSI_DOWN_REQUESTED, vsi->state);
 411                 break;
 412         }
 413
 414         i40e_service_event_schedule(pf);
 415         pf->tx_timeout_recovery_level++;
 416 }
 417
 418 /**
 419  * i40e_get_vsi_stats_struct - Get System Network Statistics
 420  * @vsi: the VSI we care about
 421  *
 422  * Returns the address of the device statistics structure.
 423  * The statistics are actually updated from the service task.
 424  **/
 425 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
 426 {
 427         return &vsi->net_stats;
 428 }
 429
 430 /**
 431  * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
 432  * @ring: Tx ring to get statistics from
 433  * @stats: statistics entry to be updated
 434  **/
 435 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
 436                                             struct rtnl_link_stats64 *stats)
 437 {
 438         u64 bytes, packets;
 439         unsigned int start;
 440
 441         do {
 442                 start = u64_stats_fetch_begin(&ring->syncp);
 443                 packets = ring->stats.packets;
 444                 bytes   = ring->stats.bytes;
 445         } while (u64_stats_fetch_retry(&ring->syncp, start));
 446
 447         stats->tx_packets += packets;
 448         stats->tx_bytes   += bytes;
 449 }
 450
 451 /**
 452  * i40e_get_netdev_stats_struct - Get statistics for netdev interface
 453  * @netdev: network interface device structure
 454  * @stats: data structure to store statistics
 455  *
 456  * Returns the address of the device statistics structure.
 457  * The statistics are actually updated from the service task.
 458  **/
 459 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
 460                                   struct rtnl_link_stats64 *stats)
 461 {
 462         struct i40e_netdev_priv *np = netdev_priv(netdev);
 463         struct i40e_vsi *vsi = np->vsi;
 464         struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
 465         struct i40e_ring *ring;
 466         int i;
 467
 468         if (test_bit(__I40E_VSI_DOWN, vsi->state))
 469                 return;
 470
 471         if (!vsi->tx_rings)
 472                 return;
 473
 474         rcu_read_lock();
 475         for (i = 0; i < vsi->num_queue_pairs; i++) {
 476                 u64 bytes, packets;
 477                 unsigned int start;
 478
 479                 ring = READ_ONCE(vsi->tx_rings[i]);
 480                 if (!ring)
 481                         continue;
 482                 i40e_get_netdev_stats_struct_tx(ring, stats);
 483
 484                 if (i40e_enabled_xdp_vsi(vsi)) {
 485                         ring = READ_ONCE(vsi->xdp_rings[i]);
 486                         if (!ring)
 487                                 continue;
 488                         i40e_get_netdev_stats_struct_tx(ring, stats);
 489                 }
 490
 491                 ring = READ_ONCE(vsi->rx_rings[i]);
 492                 if (!ring)
 493                         continue;
 494                 do {
 495                         start   = u64_stats_fetch_begin(&ring->syncp);
 496                         packets = ring->stats.packets;
 497                         bytes   = ring->stats.bytes;
 498                 } while (u64_stats_fetch_retry(&ring->syncp, start));
 499
 500                 stats->rx_packets += packets;
 501                 stats->rx_bytes   += bytes;
 502
 503         }
 504         rcu_read_unlock();
 505
 506         /* following stats updated by i40e_watchdog_subtask() */
 507         stats->multicast        = vsi_stats->multicast;
 508         stats->tx_errors        = vsi_stats->tx_errors;
 509         stats->tx_dropped       = vsi_stats->tx_dropped;
 510         stats->rx_errors        = vsi_stats->rx_errors;
 511         stats->rx_dropped       = vsi_stats->rx_dropped;
 512         stats->rx_missed_errors = vsi_stats->rx_missed_errors;
 513         stats->rx_crc_errors    = vsi_stats->rx_crc_errors;
 514         stats->rx_length_errors = vsi_stats->rx_length_errors;
 515 }
 516
 517 /**
 518  * i40e_vsi_reset_stats - Resets all stats of the given vsi
 519  * @vsi: the VSI to have its stats reset
 520  **/
 521 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
 522 {
 523         struct rtnl_link_stats64 *ns;
 524         int i;
 525
 526         if (!vsi)
 527                 return;
 528
 529         ns = i40e_get_vsi_stats_struct(vsi);
 530         memset(ns, 0, sizeof(*ns));
 531         memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
 532         memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
 533         memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
 534         if (vsi->rx_rings && vsi->rx_rings[0]) {
 535                 for (i = 0; i < vsi->num_queue_pairs; i++) {
 536                         memset(&vsi->rx_rings[i]->stats, 0,
 537                                sizeof(vsi->rx_rings[i]->stats));
 538                         memset(&vsi->rx_rings[i]->rx_stats, 0,
 539                                sizeof(vsi->rx_rings[i]->rx_stats));
 540                         memset(&vsi->tx_rings[i]->stats, 0,
 541                                sizeof(vsi->tx_rings[i]->stats));
 542                         memset(&vsi->tx_rings[i]->tx_stats, 0,
 543                                sizeof(vsi->tx_rings[i]->tx_stats));
 544                 }
 545         }
 546         vsi->stat_offsets_loaded = false;
 547 }
 548
 549 /**
 550  * i40e_pf_reset_stats - Reset all of the stats for the given PF
 551  * @pf: the PF to be reset
 552  **/
 553 void i40e_pf_reset_stats(struct i40e_pf *pf)
 554 {
 555         int i;
 556
 557         memset(&pf->stats, 0, sizeof(pf->stats));
 558         memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
 559         pf->stat_offsets_loaded = false;
 560
 561         for (i = 0; i < I40E_MAX_VEB; i++) {
 562                 if (pf->veb[i]) {
 563                         memset(&pf->veb[i]->stats, 0,
 564                                sizeof(pf->veb[i]->stats));
 565                         memset(&pf->veb[i]->stats_offsets, 0,
 566                                sizeof(pf->veb[i]->stats_offsets));
 567                         memset(&pf->veb[i]->tc_stats, 0,
 568                                sizeof(pf->veb[i]->tc_stats));
 569                         memset(&pf->veb[i]->tc_stats_offsets, 0,
 570                                sizeof(pf->veb[i]->tc_stats_offsets));
 571                         pf->veb[i]->stat_offsets_loaded = false;
 572                 }
 573         }
 574         pf->hw_csum_rx_error = 0;
 575 }
 576
 577 /**
 578  * i40e_compute_pci_to_hw_id - compute index form PCI function.
 579  * @vsi: ptr to the VSI to read from.
 580  * @hw: ptr to the hardware info.
 581  **/
 582 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
 583 {
 584         int pf_count = i40e_get_pf_count(hw);
 585
 586         if (vsi->type == I40E_VSI_SRIOV)
 587                 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
 588
 589         return hw->port + BIT(7);
 590 }
 591
 592 /**
 593  * i40e_stat_update64 - read and update a 64 bit stat from the chip.
 594  * @hw: ptr to the hardware info.
 595  * @hireg: the high 32 bit reg to read.
 596  * @loreg: the low 32 bit reg to read.
 597  * @offset_loaded: has the initial offset been loaded yet.
 598  * @offset: ptr to current offset value.
 599  * @stat: ptr to the stat.
 600  *
 601  * Since the device stats are not reset at PFReset, they will not
 602  * be zeroed when the driver starts.  We'll save the first values read
 603  * and use them as offsets to be subtracted from the raw values in order
 604  * to report stats that count from zero.
 605  **/
 606 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
 607                                bool offset_loaded, u64 *offset, u64 *stat)
 608 {
 609         u64 new_data;
 610
 611         new_data = rd64(hw, loreg);
 612
 613         if (!offset_loaded || new_data < *offset)
 614                 *offset = new_data;
 615         *stat = new_data - *offset;
 616 }
 617
 618 /**
 619  * i40e_stat_update48 - read and update a 48 bit stat from the chip
 620  * @hw: ptr to the hardware info
 621  * @hireg: the high 32 bit reg to read
 622  * @loreg: the low 32 bit reg to read
 623  * @offset_loaded: has the initial offset been loaded yet
 624  * @offset: ptr to current offset value
 625  * @stat: ptr to the stat
 626  *
 627  * Since the device stats are not reset at PFReset, they likely will not
 628  * be zeroed when the driver starts.  We'll save the first values read
 629  * and use them as offsets to be subtracted from the raw values in order
 630  * to report stats that count from zero.  In the process, we also manage
 631  * the potential roll-over.
 632  **/
 633 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
 634                                bool offset_loaded, u64 *offset, u64 *stat)
 635 {
 636         u64 new_data;
 637
 638         if (hw->device_id == I40E_DEV_ID_QEMU) {
 639                 new_data = rd32(hw, loreg);
 640                 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
 641         } else {
 642                 new_data = rd64(hw, loreg);
 643         }
 644         if (!offset_loaded)
 645                 *offset = new_data;
 646         if (likely(new_data >= *offset))
 647                 *stat = new_data - *offset;
 648         else
 649                 *stat = (new_data + BIT_ULL(48)) - *offset;
 650         *stat &= 0xFFFFFFFFFFFFULL;
 651 }
 652
 653 /**
 654  * i40e_stat_update32 - read and update a 32 bit stat from the chip
 655  * @hw: ptr to the hardware info
 656  * @reg: the hw reg to read
 657  * @offset_loaded: has the initial offset been loaded yet
 658  * @offset: ptr to current offset value
 659  * @stat: ptr to the stat
 660  **/
 661 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
 662                                bool offset_loaded, u64 *offset, u64 *stat)
 663 {
 664         u32 new_data;
 665
 666         new_data = rd32(hw, reg);
 667         if (!offset_loaded)
 668                 *offset = new_data;
 669         if (likely(new_data >= *offset))
 670                 *stat = (u32)(new_data - *offset);
 671         else
 672                 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
 673 }
 674
 675 /**
 676  * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
 677  * @hw: ptr to the hardware info
 678  * @reg: the hw reg to read and clear
 679  * @stat: ptr to the stat
 680  **/
 681 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
 682 {
 683         u32 new_data = rd32(hw, reg);
 684
 685         wr32(hw, reg, 1); /* must write a nonzero value to clear register */
 686         *stat += new_data;
 687 }
 688
 689 /**
 690  * i40e_stats_update_rx_discards - update rx_discards.
 691  * @vsi: ptr to the VSI to be updated.
 692  * @hw: ptr to the hardware info.
 693  * @stat_idx: VSI's stat_counter_idx.
 694  * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
 695  * @stat_offset: ptr to stat_offset to store first read of specific register.
 696  * @stat: ptr to VSI's stat to be updated.
 697  **/
 698 static void
 699 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
 700                               int stat_idx, bool offset_loaded,
 701                               struct i40e_eth_stats *stat_offset,
 702                               struct i40e_eth_stats *stat)
 703 {
 704         i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
 705                            &stat_offset->rx_discards, &stat->rx_discards);
 706         i40e_stat_update64(hw,
 707                            I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
 708                            I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
 709                            offset_loaded, &stat_offset->rx_discards_other,
 710                            &stat->rx_discards_other);
 711 }
 712
 713 /**
 714  * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
 715  * @vsi: the VSI to be updated
 716  **/
 717 void i40e_update_eth_stats(struct i40e_vsi *vsi)
 718 {
 719         int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
 720         struct i40e_pf *pf = vsi->back;
 721         struct i40e_hw *hw = &pf->hw;
 722         struct i40e_eth_stats *oes;
 723         struct i40e_eth_stats *es;     /* device's eth stats */
 724
 725         es = &vsi->eth_stats;
 726         oes = &vsi->eth_stats_offsets;
 727
 728         /* Gather up the stats that the hw collects */
 729         i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
 730                            vsi->stat_offsets_loaded,
 731                            &oes->tx_errors, &es->tx_errors);
 732         i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
 733                            vsi->stat_offsets_loaded,
 734                            &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
 735
 736         i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
 737                            I40E_GLV_GORCL(stat_idx),
 738                            vsi->stat_offsets_loaded,
 739                            &oes->rx_bytes, &es->rx_bytes);
 740         i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
 741                            I40E_GLV_UPRCL(stat_idx),
 742                            vsi->stat_offsets_loaded,
 743                            &oes->rx_unicast, &es->rx_unicast);
 744         i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
 745                            I40E_GLV_MPRCL(stat_idx),
 746                            vsi->stat_offsets_loaded,
 747                            &oes->rx_multicast, &es->rx_multicast);
 748         i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
 749                            I40E_GLV_BPRCL(stat_idx),
 750                            vsi->stat_offsets_loaded,
 751                            &oes->rx_broadcast, &es->rx_broadcast);
 752
 753         i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
 754                            I40E_GLV_GOTCL(stat_idx),
 755                            vsi->stat_offsets_loaded,
 756                            &oes->tx_bytes, &es->tx_bytes);
 757         i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
 758                            I40E_GLV_UPTCL(stat_idx),
 759                            vsi->stat_offsets_loaded,
 760                            &oes->tx_unicast, &es->tx_unicast);
 761         i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
 762                            I40E_GLV_MPTCL(stat_idx),
 763                            vsi->stat_offsets_loaded,
 764                            &oes->tx_multicast, &es->tx_multicast);
 765         i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
 766                            I40E_GLV_BPTCL(stat_idx),
 767                            vsi->stat_offsets_loaded,
 768                            &oes->tx_broadcast, &es->tx_broadcast);
 769
 770         i40e_stats_update_rx_discards(vsi, hw, stat_idx,
 771                                       vsi->stat_offsets_loaded, oes, es);
 772
 773         vsi->stat_offsets_loaded = true;
 774 }
 775
 776 /**
 777  * i40e_update_veb_stats - Update Switch component statistics
 778  * @veb: the VEB being updated
 779  **/
 780 void i40e_update_veb_stats(struct i40e_veb *veb)
 781 {
 782         struct i40e_pf *pf = veb->pf;
 783         struct i40e_hw *hw = &pf->hw;
 784         struct i40e_eth_stats *oes;
 785         struct i40e_eth_stats *es;     /* device's eth stats */
 786         struct i40e_veb_tc_stats *veb_oes;
 787         struct i40e_veb_tc_stats *veb_es;
 788         int i, idx = 0;
 789
 790         idx = veb->stats_idx;
 791         es = &veb->stats;
 792         oes = &veb->stats_offsets;
 793         veb_es = &veb->tc_stats;
 794         veb_oes = &veb->tc_stats_offsets;
 795
 796         /* Gather up the stats that the hw collects */
 797         i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
 798                            veb->stat_offsets_loaded,
 799                            &oes->tx_discards, &es->tx_discards);
 800         if (hw->revision_id > 0)
 801                 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
 802                                    veb->stat_offsets_loaded,
 803                                    &oes->rx_unknown_protocol,
 804                                    &es->rx_unknown_protocol);
 805         i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
 806                            veb->stat_offsets_loaded,
 807                            &oes->rx_bytes, &es->rx_bytes);
 808         i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
 809                            veb->stat_offsets_loaded,
 810                            &oes->rx_unicast, &es->rx_unicast);
 811         i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
 812                            veb->stat_offsets_loaded,
 813                            &oes->rx_multicast, &es->rx_multicast);
 814         i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
 815                            veb->stat_offsets_loaded,
 816                            &oes->rx_broadcast, &es->rx_broadcast);
 817
 818         i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
 819                            veb->stat_offsets_loaded,
 820                            &oes->tx_bytes, &es->tx_bytes);
 821         i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
 822                            veb->stat_offsets_loaded,
 823                            &oes->tx_unicast, &es->tx_unicast);
 824         i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
 825                            veb->stat_offsets_loaded,
 826                            &oes->tx_multicast, &es->tx_multicast);
 827         i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
 828                            veb->stat_offsets_loaded,
 829                            &oes->tx_broadcast, &es->tx_broadcast);
 830         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 831                 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
 832                                    I40E_GLVEBTC_RPCL(i, idx),
 833                                    veb->stat_offsets_loaded,
 834                                    &veb_oes->tc_rx_packets[i],
 835                                    &veb_es->tc_rx_packets[i]);
 836                 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
 837                                    I40E_GLVEBTC_RBCL(i, idx),
 838                                    veb->stat_offsets_loaded,
 839                                    &veb_oes->tc_rx_bytes[i],
 840                                    &veb_es->tc_rx_bytes[i]);
 841                 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
 842                                    I40E_GLVEBTC_TPCL(i, idx),
 843                                    veb->stat_offsets_loaded,
 844                                    &veb_oes->tc_tx_packets[i],
 845                                    &veb_es->tc_tx_packets[i]);
 846                 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
 847                                    I40E_GLVEBTC_TBCL(i, idx),
 848                                    veb->stat_offsets_loaded,
 849                                    &veb_oes->tc_tx_bytes[i],
 850                                    &veb_es->tc_tx_bytes[i]);
 851         }
 852         veb->stat_offsets_loaded = true;
 853 }
 854
 855 /**
 856  * i40e_update_vsi_stats - Update the vsi statistics counters.
 857  * @vsi: the VSI to be updated
 858  *
 859  * There are a few instances where we store the same stat in a
 860  * couple of different structs.  This is partly because we have
 861  * the netdev stats that need to be filled out, which is slightly
 862  * different from the "eth_stats" defined by the chip and used in
 863  * VF communications.  We sort it out here.
 864  **/
 865 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
 866 {
 867         u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
 868         struct i40e_pf *pf = vsi->back;
 869         struct rtnl_link_stats64 *ons;
 870         struct rtnl_link_stats64 *ns;   /* netdev stats */
 871         struct i40e_eth_stats *oes;
 872         struct i40e_eth_stats *es;     /* device's eth stats */
 873         u64 tx_restart, tx_busy;
 874         struct i40e_ring *p;
 875         u64 bytes, packets;
 876         unsigned int start;
 877         u64 tx_linearize;
 878         u64 tx_force_wb;
 879         u64 tx_stopped;
 880         u64 rx_p, rx_b;
 881         u64 tx_p, tx_b;
 882         u16 q;
 883
 884         if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
 885             test_bit(__I40E_CONFIG_BUSY, pf->state))
 886                 return;
 887
 888         ns = i40e_get_vsi_stats_struct(vsi);
 889         ons = &vsi->net_stats_offsets;
 890         es = &vsi->eth_stats;
 891         oes = &vsi->eth_stats_offsets;
 892
 893         /* Gather up the netdev and vsi stats that the driver collects
 894          * on the fly during packet processing
 895          */
 896         rx_b = rx_p = 0;
 897         tx_b = tx_p = 0;
 898         tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
 899         tx_stopped = 0;
 900         rx_page = 0;
 901         rx_buf = 0;
 902         rx_reuse = 0;
 903         rx_alloc = 0;
 904         rx_waive = 0;
 905         rx_busy = 0;
 906         rcu_read_lock();
 907         for (q = 0; q < vsi->num_queue_pairs; q++) {
 908                 /* locate Tx ring */
 909                 p = READ_ONCE(vsi->tx_rings[q]);
 910                 if (!p)
 911                         continue;
 912
 913                 do {
 914                         start = u64_stats_fetch_begin(&p->syncp);
 915                         packets = p->stats.packets;
 916                         bytes = p->stats.bytes;
 917                 } while (u64_stats_fetch_retry(&p->syncp, start));
 918                 tx_b += bytes;
 919                 tx_p += packets;
 920                 tx_restart += p->tx_stats.restart_queue;
 921                 tx_busy += p->tx_stats.tx_busy;
 922                 tx_linearize += p->tx_stats.tx_linearize;
 923                 tx_force_wb += p->tx_stats.tx_force_wb;
 924                 tx_stopped += p->tx_stats.tx_stopped;
 925
 926                 /* locate Rx ring */
 927                 p = READ_ONCE(vsi->rx_rings[q]);
 928                 if (!p)
 929                         continue;
 930
 931                 do {
 932                         start = u64_stats_fetch_begin(&p->syncp);
 933                         packets = p->stats.packets;
 934                         bytes = p->stats.bytes;
 935                 } while (u64_stats_fetch_retry(&p->syncp, start));
 936                 rx_b += bytes;
 937                 rx_p += packets;
 938                 rx_buf += p->rx_stats.alloc_buff_failed;
 939                 rx_page += p->rx_stats.alloc_page_failed;
 940                 rx_reuse += p->rx_stats.page_reuse_count;
 941                 rx_alloc += p->rx_stats.page_alloc_count;
 942                 rx_waive += p->rx_stats.page_waive_count;
 943                 rx_busy += p->rx_stats.page_busy_count;
 944
 945                 if (i40e_enabled_xdp_vsi(vsi)) {
 946                         /* locate XDP ring */
 947                         p = READ_ONCE(vsi->xdp_rings[q]);
 948                         if (!p)
 949                                 continue;
 950
 951                         do {
 952                                 start = u64_stats_fetch_begin(&p->syncp);
 953                                 packets = p->stats.packets;
 954                                 bytes = p->stats.bytes;
 955                         } while (u64_stats_fetch_retry(&p->syncp, start));
 956                         tx_b += bytes;
 957                         tx_p += packets;
 958                         tx_restart += p->tx_stats.restart_queue;
 959                         tx_busy += p->tx_stats.tx_busy;
 960                         tx_linearize += p->tx_stats.tx_linearize;
 961                         tx_force_wb += p->tx_stats.tx_force_wb;
 962                 }
 963         }
 964         rcu_read_unlock();
 965         vsi->tx_restart = tx_restart;
 966         vsi->tx_busy = tx_busy;
 967         vsi->tx_linearize = tx_linearize;
 968         vsi->tx_force_wb = tx_force_wb;
 969         vsi->tx_stopped = tx_stopped;
 970         vsi->rx_page_failed = rx_page;
 971         vsi->rx_buf_failed = rx_buf;
 972         vsi->rx_page_reuse = rx_reuse;
 973         vsi->rx_page_alloc = rx_alloc;
 974         vsi->rx_page_waive = rx_waive;
 975         vsi->rx_page_busy = rx_busy;
 976
 977         ns->rx_packets = rx_p;
 978         ns->rx_bytes = rx_b;
 979         ns->tx_packets = tx_p;
 980         ns->tx_bytes = tx_b;
 981
 982         /* update netdev stats from eth stats */
 983         i40e_update_eth_stats(vsi);
 984         ons->tx_errors = oes->tx_errors;
 985         ns->tx_errors = es->tx_errors;
 986         ons->multicast = oes->rx_multicast;
 987         ns->multicast = es->rx_multicast;
 988         ons->rx_dropped = oes->rx_discards_other;
 989         ns->rx_dropped = es->rx_discards_other;
 990         ons->rx_missed_errors = oes->rx_discards;
 991         ns->rx_missed_errors = es->rx_discards;
 992         ons->tx_dropped = oes->tx_discards;
 993         ns->tx_dropped = es->tx_discards;
 994
 995         /* pull in a couple PF stats if this is the main vsi */
 996         if (vsi == pf->vsi[pf->lan_vsi]) {
 997                 ns->rx_crc_errors = pf->stats.crc_errors;
 998                 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
 999                 ns->rx_length_errors = pf->stats.rx_length_errors;
1000         }
1001 }
1002
1003 /**
1004  * i40e_update_pf_stats - Update the PF statistics counters.
1005  * @pf: the PF to be updated
1006  **/
1007 static void i40e_update_pf_stats(struct i40e_pf *pf)
1008 {
1009         struct i40e_hw_port_stats *osd = &pf->stats_offsets;
1010         struct i40e_hw_port_stats *nsd = &pf->stats;
1011         struct i40e_hw *hw = &pf->hw;
1012         u32 val;
1013         int i;
1014
1015         i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
1016                            I40E_GLPRT_GORCL(hw->port),
1017                            pf->stat_offsets_loaded,
1018                            &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1019         i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1020                            I40E_GLPRT_GOTCL(hw->port),
1021                            pf->stat_offsets_loaded,
1022                            &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1023         i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1024                            pf->stat_offsets_loaded,
1025                            &osd->eth.rx_discards,
1026                            &nsd->eth.rx_discards);
1027         i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1028                            I40E_GLPRT_UPRCL(hw->port),
1029                            pf->stat_offsets_loaded,
1030                            &osd->eth.rx_unicast,
1031                            &nsd->eth.rx_unicast);
1032         i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1033                            I40E_GLPRT_MPRCL(hw->port),
1034                            pf->stat_offsets_loaded,
1035                            &osd->eth.rx_multicast,
1036                            &nsd->eth.rx_multicast);
1037         i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1038                            I40E_GLPRT_BPRCL(hw->port),
1039                            pf->stat_offsets_loaded,
1040                            &osd->eth.rx_broadcast,
1041                            &nsd->eth.rx_broadcast);
1042         i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1043                            I40E_GLPRT_UPTCL(hw->port),
1044                            pf->stat_offsets_loaded,
1045                            &osd->eth.tx_unicast,
1046                            &nsd->eth.tx_unicast);
1047         i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1048                            I40E_GLPRT_MPTCL(hw->port),
1049                            pf->stat_offsets_loaded,
1050                            &osd->eth.tx_multicast,
1051                            &nsd->eth.tx_multicast);
1052         i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1053                            I40E_GLPRT_BPTCL(hw->port),
1054                            pf->stat_offsets_loaded,
1055                            &osd->eth.tx_broadcast,
1056                            &nsd->eth.tx_broadcast);
1057
1058         i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1059                            pf->stat_offsets_loaded,
1060                            &osd->tx_dropped_link_down,
1061                            &nsd->tx_dropped_link_down);
1062
1063         i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1064                            pf->stat_offsets_loaded,
1065                            &osd->crc_errors, &nsd->crc_errors);
1066
1067         i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1068                            pf->stat_offsets_loaded,
1069                            &osd->illegal_bytes, &nsd->illegal_bytes);
1070
1071         i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1072                            pf->stat_offsets_loaded,
1073                            &osd->mac_local_faults,
1074                            &nsd->mac_local_faults);
1075         i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1076                            pf->stat_offsets_loaded,
1077                            &osd->mac_remote_faults,
1078                            &nsd->mac_remote_faults);
1079
1080         i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1081                            pf->stat_offsets_loaded,
1082                            &osd->rx_length_errors,
1083                            &nsd->rx_length_errors);
1084
1085         i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1086                            pf->stat_offsets_loaded,
1087                            &osd->link_xon_rx, &nsd->link_xon_rx);
1088         i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1089                            pf->stat_offsets_loaded,
1090                            &osd->link_xon_tx, &nsd->link_xon_tx);
1091         i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1092                            pf->stat_offsets_loaded,
1093                            &osd->link_xoff_rx, &nsd->link_xoff_rx);
1094         i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1095                            pf->stat_offsets_loaded,
1096                            &osd->link_xoff_tx, &nsd->link_xoff_tx);
1097
1098         for (i = 0; i < 8; i++) {
1099                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1100                                    pf->stat_offsets_loaded,
1101                                    &osd->priority_xoff_rx[i],
1102                                    &nsd->priority_xoff_rx[i]);
1103                 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1104                                    pf->stat_offsets_loaded,
1105                                    &osd->priority_xon_rx[i],
1106                                    &nsd->priority_xon_rx[i]);
1107                 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1108                                    pf->stat_offsets_loaded,
1109                                    &osd->priority_xon_tx[i],
1110                                    &nsd->priority_xon_tx[i]);
1111                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1112                                    pf->stat_offsets_loaded,
1113                                    &osd->priority_xoff_tx[i],
1114                                    &nsd->priority_xoff_tx[i]);
1115                 i40e_stat_update32(hw,
1116                                    I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1117                                    pf->stat_offsets_loaded,
1118                                    &osd->priority_xon_2_xoff[i],
1119                                    &nsd->priority_xon_2_xoff[i]);
1120         }
1121
1122         i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1123                            I40E_GLPRT_PRC64L(hw->port),
1124                            pf->stat_offsets_loaded,
1125                            &osd->rx_size_64, &nsd->rx_size_64);
1126         i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1127                            I40E_GLPRT_PRC127L(hw->port),
1128                            pf->stat_offsets_loaded,
1129                            &osd->rx_size_127, &nsd->rx_size_127);
1130         i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1131                            I40E_GLPRT_PRC255L(hw->port),
1132                            pf->stat_offsets_loaded,
1133                            &osd->rx_size_255, &nsd->rx_size_255);
1134         i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1135                            I40E_GLPRT_PRC511L(hw->port),
1136                            pf->stat_offsets_loaded,
1137                            &osd->rx_size_511, &nsd->rx_size_511);
1138         i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1139                            I40E_GLPRT_PRC1023L(hw->port),
1140                            pf->stat_offsets_loaded,
1141                            &osd->rx_size_1023, &nsd->rx_size_1023);
1142         i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1143                            I40E_GLPRT_PRC1522L(hw->port),
1144                            pf->stat_offsets_loaded,
1145                            &osd->rx_size_1522, &nsd->rx_size_1522);
1146         i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1147                            I40E_GLPRT_PRC9522L(hw->port),
1148                            pf->stat_offsets_loaded,
1149                            &osd->rx_size_big, &nsd->rx_size_big);
1150
1151         i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1152                            I40E_GLPRT_PTC64L(hw->port),
1153                            pf->stat_offsets_loaded,
1154                            &osd->tx_size_64, &nsd->tx_size_64);
1155         i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1156                            I40E_GLPRT_PTC127L(hw->port),
1157                            pf->stat_offsets_loaded,
1158                            &osd->tx_size_127, &nsd->tx_size_127);
1159         i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1160                            I40E_GLPRT_PTC255L(hw->port),
1161                            pf->stat_offsets_loaded,
1162                            &osd->tx_size_255, &nsd->tx_size_255);
1163         i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1164                            I40E_GLPRT_PTC511L(hw->port),
1165                            pf->stat_offsets_loaded,
1166                            &osd->tx_size_511, &nsd->tx_size_511);
1167         i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1168                            I40E_GLPRT_PTC1023L(hw->port),
1169                            pf->stat_offsets_loaded,
1170                            &osd->tx_size_1023, &nsd->tx_size_1023);
1171         i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1172                            I40E_GLPRT_PTC1522L(hw->port),
1173                            pf->stat_offsets_loaded,
1174                            &osd->tx_size_1522, &nsd->tx_size_1522);
1175         i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1176                            I40E_GLPRT_PTC9522L(hw->port),
1177                            pf->stat_offsets_loaded,
1178                            &osd->tx_size_big, &nsd->tx_size_big);
1179
1180         i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1181                            pf->stat_offsets_loaded,
1182                            &osd->rx_undersize, &nsd->rx_undersize);
1183         i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1184                            pf->stat_offsets_loaded,
1185                            &osd->rx_fragments, &nsd->rx_fragments);
1186         i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1187                            pf->stat_offsets_loaded,
1188                            &osd->rx_oversize, &nsd->rx_oversize);
1189         i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1190                            pf->stat_offsets_loaded,
1191                            &osd->rx_jabber, &nsd->rx_jabber);
1192
1193         /* FDIR stats */
1194         i40e_stat_update_and_clear32(hw,
1195                         I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1196                         &nsd->fd_atr_match);
1197         i40e_stat_update_and_clear32(hw,
1198                         I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1199                         &nsd->fd_sb_match);
1200         i40e_stat_update_and_clear32(hw,
1201                         I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1202                         &nsd->fd_atr_tunnel_match);
1203
1204         val = rd32(hw, I40E_PRTPM_EEE_STAT);
1205         nsd->tx_lpi_status =
1206                        FIELD_GET(I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK, val);
1207         nsd->rx_lpi_status =
1208                        FIELD_GET(I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK, val);
1209         i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1210                            pf->stat_offsets_loaded,
1211                            &osd->tx_lpi_count, &nsd->tx_lpi_count);
1212         i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1213                            pf->stat_offsets_loaded,
1214                            &osd->rx_lpi_count, &nsd->rx_lpi_count);
1215
1216         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
1217             !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1218                 nsd->fd_sb_status = true;
1219         else
1220                 nsd->fd_sb_status = false;
1221
1222         if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
1223             !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1224                 nsd->fd_atr_status = true;
1225         else
1226                 nsd->fd_atr_status = false;
1227
1228         pf->stat_offsets_loaded = true;
1229 }
1230
1231 /**
1232  * i40e_update_stats - Update the various statistics counters.
1233  * @vsi: the VSI to be updated
1234  *
1235  * Update the various stats for this VSI and its related entities.
1236  **/
1237 void i40e_update_stats(struct i40e_vsi *vsi)
1238 {
1239         struct i40e_pf *pf = vsi->back;
1240
1241         if (vsi == pf->vsi[pf->lan_vsi])
1242                 i40e_update_pf_stats(pf);
1243
1244         i40e_update_vsi_stats(vsi);
1245 }
1246
1247 /**
1248  * i40e_count_filters - counts VSI mac filters
1249  * @vsi: the VSI to be searched
1250  *
1251  * Returns count of mac filters
1252  **/
1253 int i40e_count_filters(struct i40e_vsi *vsi)
1254 {
1255         struct i40e_mac_filter *f;
1256         struct hlist_node *h;
1257         int bkt;
1258         int cnt = 0;
1259
1260         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1261                 ++cnt;
1262
1263         return cnt;
1264 }
1265
1266 /**
1267  * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1268  * @vsi: the VSI to be searched
1269  * @macaddr: the MAC address
1270  * @vlan: the vlan
1271  *
1272  * Returns ptr to the filter object or NULL
1273  **/
1274 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1275                                                 const u8 *macaddr, s16 vlan)
1276 {
1277         struct i40e_mac_filter *f;
1278         u64 key;
1279
1280         if (!vsi || !macaddr)
1281                 return NULL;
1282
1283         key = i40e_addr_to_hkey(macaddr);
1284         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1285                 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1286                     (vlan == f->vlan))
1287                         return f;
1288         }
1289         return NULL;
1290 }
1291
1292 /**
1293  * i40e_find_mac - Find a mac addr in the macvlan filters list
1294  * @vsi: the VSI to be searched
1295  * @macaddr: the MAC address we are searching for
1296  *
1297  * Returns the first filter with the provided MAC address or NULL if
1298  * MAC address was not found
1299  **/
1300 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1301 {
1302         struct i40e_mac_filter *f;
1303         u64 key;
1304
1305         if (!vsi || !macaddr)
1306                 return NULL;
1307
1308         key = i40e_addr_to_hkey(macaddr);
1309         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1310                 if ((ether_addr_equal(macaddr, f->macaddr)))
1311                         return f;
1312         }
1313         return NULL;
1314 }
1315
1316 /**
1317  * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1318  * @vsi: the VSI to be searched
1319  *
1320  * Returns true if VSI is in vlan mode or false otherwise
1321  **/
1322 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1323 {
1324         /* If we have a PVID, always operate in VLAN mode */
1325         if (vsi->info.pvid)
1326                 return true;
1327
1328         /* We need to operate in VLAN mode whenever we have any filters with
1329          * a VLAN other than I40E_VLAN_ALL. We could check the table each
1330          * time, incurring search cost repeatedly. However, we can notice two
1331          * things:
1332          *
1333          * 1) the only place where we can gain a VLAN filter is in
1334          *    i40e_add_filter.
1335          *
1336          * 2) the only place where filters are actually removed is in
1337          *    i40e_sync_filters_subtask.
1338          *
1339          * Thus, we can simply use a boolean value, has_vlan_filters which we
1340          * will set to true when we add a VLAN filter in i40e_add_filter. Then
1341          * we have to perform the full search after deleting filters in
1342          * i40e_sync_filters_subtask, but we already have to search
1343          * filters here and can perform the check at the same time. This
1344          * results in avoiding embedding a loop for VLAN mode inside another
1345          * loop over all the filters, and should maintain correctness as noted
1346          * above.
1347          */
1348         return vsi->has_vlan_filter;
1349 }
1350
1351 /**
1352  * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1353  * @vsi: the VSI to configure
1354  * @tmp_add_list: list of filters ready to be added
1355  * @tmp_del_list: list of filters ready to be deleted
1356  * @vlan_filters: the number of active VLAN filters
1357  *
1358  * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1359  * behave as expected. If we have any active VLAN filters remaining or about
1360  * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1361  * so that they only match against untagged traffic. If we no longer have any
1362  * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1363  * so that they match against both tagged and untagged traffic. In this way,
1364  * we ensure that we correctly receive the desired traffic. This ensures that
1365  * when we have an active VLAN we will receive only untagged traffic and
1366  * traffic matching active VLANs. If we have no active VLANs then we will
1367  * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1368  *
1369  * Finally, in a similar fashion, this function also corrects filters when
1370  * there is an active PVID assigned to this VSI.
1371  *
1372  * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1373  *
1374  * This function is only expected to be called from within
1375  * i40e_sync_vsi_filters.
1376  *
1377  * NOTE: This function expects to be called while under the
1378  * mac_filter_hash_lock
1379  */
1380 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1381                                          struct hlist_head *tmp_add_list,
1382                                          struct hlist_head *tmp_del_list,
1383                                          int vlan_filters)
1384 {
1385         s16 pvid = le16_to_cpu(vsi->info.pvid);
1386         struct i40e_mac_filter *f, *add_head;
1387         struct i40e_new_mac_filter *new;
1388         struct hlist_node *h;
1389         int bkt, new_vlan;
1390
1391         /* To determine if a particular filter needs to be replaced we
1392          * have the three following conditions:
1393          *
1394          * a) if we have a PVID assigned, then all filters which are
1395          *    not marked as VLAN=PVID must be replaced with filters that
1396          *    are.
1397          * b) otherwise, if we have any active VLANS, all filters
1398          *    which are marked as VLAN=-1 must be replaced with
1399          *    filters marked as VLAN=0
1400          * c) finally, if we do not have any active VLANS, all filters
1401          *    which are marked as VLAN=0 must be replaced with filters
1402          *    marked as VLAN=-1
1403          */
1404
1405         /* Update the filters about to be added in place */
1406         hlist_for_each_entry(new, tmp_add_list, hlist) {
1407                 if (pvid && new->f->vlan != pvid)
1408                         new->f->vlan = pvid;
1409                 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1410                         new->f->vlan = 0;
1411                 else if (!vlan_filters && new->f->vlan == 0)
1412                         new->f->vlan = I40E_VLAN_ANY;
1413         }
1414
1415         /* Update the remaining active filters */
1416         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1417                 /* Combine the checks for whether a filter needs to be changed
1418                  * and then determine the new VLAN inside the if block, in
1419                  * order to avoid duplicating code for adding the new filter
1420                  * then deleting the old filter.
1421                  */
1422                 if ((pvid && f->vlan != pvid) ||
1423                     (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1424                     (!vlan_filters && f->vlan == 0)) {
1425                         /* Determine the new vlan we will be adding */
1426                         if (pvid)
1427                                 new_vlan = pvid;
1428                         else if (vlan_filters)
1429                                 new_vlan = 0;
1430                         else
1431                                 new_vlan = I40E_VLAN_ANY;
1432
1433                         /* Create the new filter */
1434                         add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1435                         if (!add_head)
1436                                 return -ENOMEM;
1437
1438                         /* Create a temporary i40e_new_mac_filter */
1439                         new = kzalloc(sizeof(*new), GFP_ATOMIC);
1440                         if (!new)
1441                                 return -ENOMEM;
1442
1443                         new->f = add_head;
1444                         new->state = add_head->state;
1445
1446                         /* Add the new filter to the tmp list */
1447                         hlist_add_head(&new->hlist, tmp_add_list);
1448
1449                         /* Put the original filter into the delete list */
1450                         f->state = I40E_FILTER_REMOVE;
1451                         hash_del(&f->hlist);
1452                         hlist_add_head(&f->hlist, tmp_del_list);
1453                 }
1454         }
1455
1456         vsi->has_vlan_filter = !!vlan_filters;
1457
1458         return 0;
1459 }
1460
1461 /**
1462  * i40e_get_vf_new_vlan - Get new vlan id on a vf
1463  * @vsi: the vsi to configure
1464  * @new_mac: new mac filter to be added
1465  * @f: existing mac filter, replaced with new_mac->f if new_mac is not NULL
1466  * @vlan_filters: the number of active VLAN filters
1467  * @trusted: flag if the VF is trusted
1468  *
1469  * Get new VLAN id based on current VLAN filters, trust, PVID
1470  * and vf-vlan-prune-disable flag.
1471  *
1472  * Returns the value of the new vlan filter or
1473  * the old value if no new filter is needed.
1474  */
1475 static s16 i40e_get_vf_new_vlan(struct i40e_vsi *vsi,
1476                                 struct i40e_new_mac_filter *new_mac,
1477                                 struct i40e_mac_filter *f,
1478                                 int vlan_filters,
1479                                 bool trusted)
1480 {
1481         s16 pvid = le16_to_cpu(vsi->info.pvid);
1482         struct i40e_pf *pf = vsi->back;
1483         bool is_any;
1484
1485         if (new_mac)
1486                 f = new_mac->f;
1487
1488         if (pvid && f->vlan != pvid)
1489                 return pvid;
1490
1491         is_any = (trusted ||
1492                   !test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, pf->flags));
1493
1494         if ((vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1495             (!is_any && !vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1496             (is_any && !vlan_filters && f->vlan == 0)) {
1497                 if (is_any)
1498                         return I40E_VLAN_ANY;
1499                 else
1500                         return 0;
1501         }
1502
1503         return f->vlan;
1504 }
1505
1506 /**
1507  * i40e_correct_vf_mac_vlan_filters - Correct non-VLAN VF filters if necessary
1508  * @vsi: the vsi to configure
1509  * @tmp_add_list: list of filters ready to be added
1510  * @tmp_del_list: list of filters ready to be deleted
1511  * @vlan_filters: the number of active VLAN filters
1512  * @trusted: flag if the VF is trusted
1513  *
1514  * Correct VF VLAN filters based on current VLAN filters, trust, PVID
1515  * and vf-vlan-prune-disable flag.
1516  *
1517  * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1518  *
1519  * This function is only expected to be called from within
1520  * i40e_sync_vsi_filters.
1521  *
1522  * NOTE: This function expects to be called while under the
1523  * mac_filter_hash_lock
1524  */
1525 static int i40e_correct_vf_mac_vlan_filters(struct i40e_vsi *vsi,
1526                                             struct hlist_head *tmp_add_list,
1527                                             struct hlist_head *tmp_del_list,
1528                                             int vlan_filters,
1529                                             bool trusted)
1530 {
1531         struct i40e_mac_filter *f, *add_head;
1532         struct i40e_new_mac_filter *new_mac;
1533         struct hlist_node *h;
1534         int bkt, new_vlan;
1535
1536         hlist_for_each_entry(new_mac, tmp_add_list, hlist) {
1537                 new_mac->f->vlan = i40e_get_vf_new_vlan(vsi, new_mac, NULL,
1538                                                         vlan_filters, trusted);
1539         }
1540
1541         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1542                 new_vlan = i40e_get_vf_new_vlan(vsi, NULL, f, vlan_filters,
1543                                                 trusted);
1544                 if (new_vlan != f->vlan) {
1545                         add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1546                         if (!add_head)
1547                                 return -ENOMEM;
1548                         /* Create a temporary i40e_new_mac_filter */
1549                         new_mac = kzalloc(sizeof(*new_mac), GFP_ATOMIC);
1550                         if (!new_mac)
1551                                 return -ENOMEM;
1552                         new_mac->f = add_head;
1553                         new_mac->state = add_head->state;
1554
1555                         /* Add the new filter to the tmp list */
1556                         hlist_add_head(&new_mac->hlist, tmp_add_list);
1557
1558                         /* Put the original filter into the delete list */
1559                         f->state = I40E_FILTER_REMOVE;
1560                         hash_del(&f->hlist);
1561                         hlist_add_head(&f->hlist, tmp_del_list);
1562                 }
1563         }
1564
1565         vsi->has_vlan_filter = !!vlan_filters;
1566         return 0;
1567 }
1568
1569 /**
1570  * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1571  * @vsi: the PF Main VSI - inappropriate for any other VSI
1572  * @macaddr: the MAC address
1573  *
1574  * Remove whatever filter the firmware set up so the driver can manage
1575  * its own filtering intelligently.
1576  **/
1577 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1578 {
1579         struct i40e_aqc_remove_macvlan_element_data element;
1580         struct i40e_pf *pf = vsi->back;
1581
1582         /* Only appropriate for the PF main VSI */
1583         if (vsi->type != I40E_VSI_MAIN)
1584                 return;
1585
1586         memset(&element, 0, sizeof(element));
1587         ether_addr_copy(element.mac_addr, macaddr);
1588         element.vlan_tag = 0;
1589         /* Ignore error returns, some firmware does it this way... */
1590         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1591         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1592
1593         memset(&element, 0, sizeof(element));
1594         ether_addr_copy(element.mac_addr, macaddr);
1595         element.vlan_tag = 0;
1596         /* ...and some firmware does it this way. */
1597         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1598                         I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1599         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1600 }
1601
1602 /**
1603  * i40e_add_filter - Add a mac/vlan filter to the VSI
1604  * @vsi: the VSI to be searched
1605  * @macaddr: the MAC address
1606  * @vlan: the vlan
1607  *
1608  * Returns ptr to the filter object or NULL when no memory available.
1609  *
1610  * NOTE: This function is expected to be called with mac_filter_hash_lock
1611  * being held.
1612  **/
1613 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1614                                         const u8 *macaddr, s16 vlan)
1615 {
1616         struct i40e_mac_filter *f;
1617         u64 key;
1618
1619         if (!vsi || !macaddr)
1620                 return NULL;
1621
1622         f = i40e_find_filter(vsi, macaddr, vlan);
1623         if (!f) {
1624                 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1625                 if (!f)
1626                         return NULL;
1627
1628                 /* Update the boolean indicating if we need to function in
1629                  * VLAN mode.
1630                  */
1631                 if (vlan >= 0)
1632                         vsi->has_vlan_filter = true;
1633
1634                 ether_addr_copy(f->macaddr, macaddr);
1635                 f->vlan = vlan;
1636                 f->state = I40E_FILTER_NEW;
1637                 INIT_HLIST_NODE(&f->hlist);
1638
1639                 key = i40e_addr_to_hkey(macaddr);
1640                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1641
1642                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1643                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1644         }
1645
1646         /* If we're asked to add a filter that has been marked for removal, it
1647          * is safe to simply restore it to active state. __i40e_del_filter
1648          * will have simply deleted any filters which were previously marked
1649          * NEW or FAILED, so if it is currently marked REMOVE it must have
1650          * previously been ACTIVE. Since we haven't yet run the sync filters
1651          * task, just restore this filter to the ACTIVE state so that the
1652          * sync task leaves it in place
1653          */
1654         if (f->state == I40E_FILTER_REMOVE)
1655                 f->state = I40E_FILTER_ACTIVE;
1656
1657         return f;
1658 }
1659
1660 /**
1661  * __i40e_del_filter - Remove a specific filter from the VSI
1662  * @vsi: VSI to remove from
1663  * @f: the filter to remove from the list
1664  *
1665  * This function should be called instead of i40e_del_filter only if you know
1666  * the exact filter you will remove already, such as via i40e_find_filter or
1667  * i40e_find_mac.
1668  *
1669  * NOTE: This function is expected to be called with mac_filter_hash_lock
1670  * being held.
1671  * ANOTHER NOTE: This function MUST be called from within the context of
1672  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1673  * instead of list_for_each_entry().
1674  **/
1675 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1676 {
1677         if (!f)
1678                 return;
1679
1680         /* If the filter was never added to firmware then we can just delete it
1681          * directly and we don't want to set the status to remove or else an
1682          * admin queue command will unnecessarily fire.
1683          */
1684         if ((f->state == I40E_FILTER_FAILED) ||
1685             (f->state == I40E_FILTER_NEW)) {
1686                 hash_del(&f->hlist);
1687                 kfree(f);
1688         } else {
1689                 f->state = I40E_FILTER_REMOVE;
1690         }
1691
1692         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1693         set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1694 }
1695
1696 /**
1697  * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1698  * @vsi: the VSI to be searched
1699  * @macaddr: the MAC address
1700  * @vlan: the VLAN
1701  *
1702  * NOTE: This function is expected to be called with mac_filter_hash_lock
1703  * being held.
1704  * ANOTHER NOTE: This function MUST be called from within the context of
1705  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1706  * instead of list_for_each_entry().
1707  **/
1708 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1709 {
1710         struct i40e_mac_filter *f;
1711
1712         if (!vsi || !macaddr)
1713                 return;
1714
1715         f = i40e_find_filter(vsi, macaddr, vlan);
1716         __i40e_del_filter(vsi, f);
1717 }
1718
1719 /**
1720  * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1721  * @vsi: the VSI to be searched
1722  * @macaddr: the mac address to be filtered
1723  *
1724  * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1725  * go through all the macvlan filters and add a macvlan filter for each
1726  * unique vlan that already exists. If a PVID has been assigned, instead only
1727  * add the macaddr to that VLAN.
1728  *
1729  * Returns last filter added on success, else NULL
1730  **/
1731 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1732                                             const u8 *macaddr)
1733 {
1734         struct i40e_mac_filter *f, *add = NULL;
1735         struct hlist_node *h;
1736         int bkt;
1737
1738         if (vsi->info.pvid)
1739                 return i40e_add_filter(vsi, macaddr,
1740                                        le16_to_cpu(vsi->info.pvid));
1741
1742         if (!i40e_is_vsi_in_vlan(vsi))
1743                 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1744
1745         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1746                 if (f->state == I40E_FILTER_REMOVE)
1747                         continue;
1748                 add = i40e_add_filter(vsi, macaddr, f->vlan);
1749                 if (!add)
1750                         return NULL;
1751         }
1752
1753         return add;
1754 }
1755
1756 /**
1757  * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1758  * @vsi: the VSI to be searched
1759  * @macaddr: the mac address to be removed
1760  *
1761  * Removes a given MAC address from a VSI regardless of what VLAN it has been
1762  * associated with.
1763  *
1764  * Returns 0 for success, or error
1765  **/
1766 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1767 {
1768         struct i40e_mac_filter *f;
1769         struct hlist_node *h;
1770         bool found = false;
1771         int bkt;
1772
1773         lockdep_assert_held(&vsi->mac_filter_hash_lock);
1774         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1775                 if (ether_addr_equal(macaddr, f->macaddr)) {
1776                         __i40e_del_filter(vsi, f);
1777                         found = true;
1778                 }
1779         }
1780
1781         if (found)
1782                 return 0;
1783         else
1784                 return -ENOENT;
1785 }
1786
1787 /**
1788  * i40e_set_mac - NDO callback to set mac address
1789  * @netdev: network interface device structure
1790  * @p: pointer to an address structure
1791  *
1792  * Returns 0 on success, negative on failure
1793  **/
1794 static int i40e_set_mac(struct net_device *netdev, void *p)
1795 {
1796         struct i40e_netdev_priv *np = netdev_priv(netdev);
1797         struct i40e_vsi *vsi = np->vsi;
1798         struct i40e_pf *pf = vsi->back;
1799         struct i40e_hw *hw = &pf->hw;
1800         struct sockaddr *addr = p;
1801
1802         if (!is_valid_ether_addr(addr->sa_data))
1803                 return -EADDRNOTAVAIL;
1804
1805         if (test_bit(__I40E_DOWN, pf->state) ||
1806             test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1807                 return -EADDRNOTAVAIL;
1808
1809         if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1810                 netdev_info(netdev, "returning to hw mac address %pM\n",
1811                             hw->mac.addr);
1812         else
1813                 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1814
1815         /* Copy the address first, so that we avoid a possible race with
1816          * .set_rx_mode().
1817          * - Remove old address from MAC filter
1818          * - Copy new address
1819          * - Add new address to MAC filter
1820          */
1821         spin_lock_bh(&vsi->mac_filter_hash_lock);
1822         i40e_del_mac_filter(vsi, netdev->dev_addr);
1823         eth_hw_addr_set(netdev, addr->sa_data);
1824         i40e_add_mac_filter(vsi, netdev->dev_addr);
1825         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1826
1827         if (vsi->type == I40E_VSI_MAIN) {
1828                 int ret;
1829
1830                 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1831                                                 addr->sa_data, NULL);
1832                 if (ret)
1833                         netdev_info(netdev, "Ignoring error from firmware on LAA update, status %pe, AQ ret %s\n",
1834                                     ERR_PTR(ret),
1835                                     i40e_aq_str(hw, hw->aq.asq_last_status));
1836         }
1837
1838         /* schedule our worker thread which will take care of
1839          * applying the new filter changes
1840          */
1841         i40e_service_event_schedule(pf);
1842         return 0;
1843 }
1844
1845 /**
1846  * i40e_config_rss_aq - Prepare for RSS using AQ commands
1847  * @vsi: vsi structure
1848  * @seed: RSS hash seed
1849  * @lut: pointer to lookup table of lut_size
1850  * @lut_size: size of the lookup table
1851  **/
1852 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1853                               u8 *lut, u16 lut_size)
1854 {
1855         struct i40e_pf *pf = vsi->back;
1856         struct i40e_hw *hw = &pf->hw;
1857         int ret = 0;
1858
1859         if (seed) {
1860                 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1861                         (struct i40e_aqc_get_set_rss_key_data *)seed;
1862                 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1863                 if (ret) {
1864                         dev_info(&pf->pdev->dev,
1865                                  "Cannot set RSS key, err %pe aq_err %s\n",
1866                                  ERR_PTR(ret),
1867                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1868                         return ret;
1869                 }
1870         }
1871         if (lut) {
1872                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1873
1874                 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1875                 if (ret) {
1876                         dev_info(&pf->pdev->dev,
1877                                  "Cannot set RSS lut, err %pe aq_err %s\n",
1878                                  ERR_PTR(ret),
1879                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1880                         return ret;
1881                 }
1882         }
1883         return ret;
1884 }
1885
1886 /**
1887  * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1888  * @vsi: VSI structure
1889  **/
1890 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1891 {
1892         struct i40e_pf *pf = vsi->back;
1893         u8 seed[I40E_HKEY_ARRAY_SIZE];
1894         u8 *lut;
1895         int ret;
1896
1897         if (!test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
1898                 return 0;
1899         if (!vsi->rss_size)
1900                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1901                                       vsi->num_queue_pairs);
1902         if (!vsi->rss_size)
1903                 return -EINVAL;
1904         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1905         if (!lut)
1906                 return -ENOMEM;
1907
1908         /* Use the user configured hash keys and lookup table if there is one,
1909          * otherwise use default
1910          */
1911         if (vsi->rss_lut_user)
1912                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1913         else
1914                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1915         if (vsi->rss_hkey_user)
1916                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1917         else
1918                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1919         ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1920         kfree(lut);
1921         return ret;
1922 }
1923
1924 /**
1925  * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1926  * @vsi: the VSI being configured,
1927  * @ctxt: VSI context structure
1928  * @enabled_tc: number of traffic classes to enable
1929  *
1930  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1931  **/
1932 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1933                                            struct i40e_vsi_context *ctxt,
1934                                            u8 enabled_tc)
1935 {
1936         u16 qcount = 0, max_qcount, qmap, sections = 0;
1937         int i, override_q, pow, num_qps, ret;
1938         u8 netdev_tc = 0, offset = 0;
1939
1940         if (vsi->type != I40E_VSI_MAIN)
1941                 return -EINVAL;
1942         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1943         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1944         vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1945         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1946         num_qps = vsi->mqprio_qopt.qopt.count[0];
1947
1948         /* find the next higher power-of-2 of num queue pairs */
1949         pow = ilog2(num_qps);
1950         if (!is_power_of_2(num_qps))
1951                 pow++;
1952         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1953                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1954
1955         /* Setup queue offset/count for all TCs for given VSI */
1956         max_qcount = vsi->mqprio_qopt.qopt.count[0];
1957         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1958                 /* See if the given TC is enabled for the given VSI */
1959                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1960                         offset = vsi->mqprio_qopt.qopt.offset[i];
1961                         qcount = vsi->mqprio_qopt.qopt.count[i];
1962                         if (qcount > max_qcount)
1963                                 max_qcount = qcount;
1964                         vsi->tc_config.tc_info[i].qoffset = offset;
1965                         vsi->tc_config.tc_info[i].qcount = qcount;
1966                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1967                 } else {
1968                         /* TC is not enabled so set the offset to
1969                          * default queue and allocate one queue
1970                          * for the given TC.
1971                          */
1972                         vsi->tc_config.tc_info[i].qoffset = 0;
1973                         vsi->tc_config.tc_info[i].qcount = 1;
1974                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1975                 }
1976         }
1977
1978         /* Set actual Tx/Rx queue pairs */
1979         vsi->num_queue_pairs = offset + qcount;
1980
1981         /* Setup queue TC[0].qmap for given VSI context */
1982         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1983         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1984         ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1985         ctxt->info.valid_sections |= cpu_to_le16(sections);
1986
1987         /* Reconfigure RSS for main VSI with max queue count */
1988         vsi->rss_size = max_qcount;
1989         ret = i40e_vsi_config_rss(vsi);
1990         if (ret) {
1991                 dev_info(&vsi->back->pdev->dev,
1992                          "Failed to reconfig rss for num_queues (%u)\n",
1993                          max_qcount);
1994                 return ret;
1995         }
1996         vsi->reconfig_rss = true;
1997         dev_dbg(&vsi->back->pdev->dev,
1998                 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1999
2000         /* Find queue count available for channel VSIs and starting offset
2001          * for channel VSIs
2002          */
2003         override_q = vsi->mqprio_qopt.qopt.count[0];
2004         if (override_q && override_q < vsi->num_queue_pairs) {
2005                 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
2006                 vsi->next_base_queue = override_q;
2007         }
2008         return 0;
2009 }
2010
2011 /**
2012  * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
2013  * @vsi: the VSI being setup
2014  * @ctxt: VSI context structure
2015  * @enabled_tc: Enabled TCs bitmap
2016  * @is_add: True if called before Add VSI
2017  *
2018  * Setup VSI queue mapping for enabled traffic classes.
2019  **/
2020 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
2021                                      struct i40e_vsi_context *ctxt,
2022                                      u8 enabled_tc,
2023                                      bool is_add)
2024 {
2025         struct i40e_pf *pf = vsi->back;
2026         u16 num_tc_qps = 0;
2027         u16 sections = 0;
2028         u8 netdev_tc = 0;
2029         u16 numtc = 1;
2030         u16 qcount;
2031         u8 offset;
2032         u16 qmap;
2033         int i;
2034
2035         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
2036         offset = 0;
2037         /* zero out queue mapping, it will get updated on the end of the function */
2038         memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
2039
2040         if (vsi->type == I40E_VSI_MAIN) {
2041                 /* This code helps add more queue to the VSI if we have
2042                  * more cores than RSS can support, the higher cores will
2043                  * be served by ATR or other filters. Furthermore, the
2044                  * non-zero req_queue_pairs says that user requested a new
2045                  * queue count via ethtool's set_channels, so use this
2046                  * value for queues distribution across traffic classes
2047                  * We need at least one queue pair for the interface
2048                  * to be usable as we see in else statement.
2049                  */
2050                 if (vsi->req_queue_pairs > 0)
2051                         vsi->num_queue_pairs = vsi->req_queue_pairs;
2052                 else if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
2053                         vsi->num_queue_pairs = pf->num_lan_msix;
2054                 else
2055                         vsi->num_queue_pairs = 1;
2056         }
2057
2058         /* Number of queues per enabled TC */
2059         if (vsi->type == I40E_VSI_MAIN ||
2060             (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
2061                 num_tc_qps = vsi->num_queue_pairs;
2062         else
2063                 num_tc_qps = vsi->alloc_queue_pairs;
2064
2065         if (enabled_tc && test_bit(I40E_FLAG_DCB_ENA, vsi->back->flags)) {
2066                 /* Find numtc from enabled TC bitmap */
2067                 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2068                         if (enabled_tc & BIT(i)) /* TC is enabled */
2069                                 numtc++;
2070                 }
2071                 if (!numtc) {
2072                         dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
2073                         numtc = 1;
2074                 }
2075                 num_tc_qps = num_tc_qps / numtc;
2076                 num_tc_qps = min_t(int, num_tc_qps,
2077                                    i40e_pf_get_max_q_per_tc(pf));
2078         }
2079
2080         vsi->tc_config.numtc = numtc;
2081         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
2082
2083         /* Do not allow use more TC queue pairs than MSI-X vectors exist */
2084         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
2085                 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
2086
2087         /* Setup queue offset/count for all TCs for given VSI */
2088         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2089                 /* See if the given TC is enabled for the given VSI */
2090                 if (vsi->tc_config.enabled_tc & BIT(i)) {
2091                         /* TC is enabled */
2092                         int pow, num_qps;
2093
2094                         switch (vsi->type) {
2095                         case I40E_VSI_MAIN:
2096                                 if ((!test_bit(I40E_FLAG_FD_SB_ENA,
2097                                                pf->flags) &&
2098                                      !test_bit(I40E_FLAG_FD_ATR_ENA,
2099                                                pf->flags)) ||
2100                                     vsi->tc_config.enabled_tc != 1) {
2101                                         qcount = min_t(int, pf->alloc_rss_size,
2102                                                        num_tc_qps);
2103                                         break;
2104                                 }
2105                                 fallthrough;
2106                         case I40E_VSI_FDIR:
2107                         case I40E_VSI_SRIOV:
2108                         case I40E_VSI_VMDQ2:
2109                         default:
2110                                 qcount = num_tc_qps;
2111                                 WARN_ON(i != 0);
2112                                 break;
2113                         }
2114                         vsi->tc_config.tc_info[i].qoffset = offset;
2115                         vsi->tc_config.tc_info[i].qcount = qcount;
2116
2117                         /* find the next higher power-of-2 of num queue pairs */
2118                         num_qps = qcount;
2119                         pow = 0;
2120                         while (num_qps && (BIT_ULL(pow) < qcount)) {
2121                                 pow++;
2122                                 num_qps >>= 1;
2123                         }
2124
2125                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2126                         qmap =
2127                             (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2128                             (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2129
2130                         offset += qcount;
2131                 } else {
2132                         /* TC is not enabled so set the offset to
2133                          * default queue and allocate one queue
2134                          * for the given TC.
2135                          */
2136                         vsi->tc_config.tc_info[i].qoffset = 0;
2137                         vsi->tc_config.tc_info[i].qcount = 1;
2138                         vsi->tc_config.tc_info[i].netdev_tc = 0;
2139
2140                         qmap = 0;
2141                 }
2142                 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2143         }
2144         /* Do not change previously set num_queue_pairs for PFs and VFs*/
2145         if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2146             (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2147             (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2148                 vsi->num_queue_pairs = offset;
2149
2150         /* Scheduler section valid can only be set for ADD VSI */
2151         if (is_add) {
2152                 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2153
2154                 ctxt->info.up_enable_bits = enabled_tc;
2155         }
2156         if (vsi->type == I40E_VSI_SRIOV) {
2157                 ctxt->info.mapping_flags |=
2158                                      cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2159                 for (i = 0; i < vsi->num_queue_pairs; i++)
2160                         ctxt->info.queue_mapping[i] =
2161                                                cpu_to_le16(vsi->base_queue + i);
2162         } else {
2163                 ctxt->info.mapping_flags |=
2164                                         cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2165                 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2166         }
2167         ctxt->info.valid_sections |= cpu_to_le16(sections);
2168 }
2169
2170 /**
2171  * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2172  * @netdev: the netdevice
2173  * @addr: address to add
2174  *
2175  * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2176  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2177  */
2178 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2179 {
2180         struct i40e_netdev_priv *np = netdev_priv(netdev);
2181         struct i40e_vsi *vsi = np->vsi;
2182
2183         if (i40e_add_mac_filter(vsi, addr))
2184                 return 0;
2185         else
2186                 return -ENOMEM;
2187 }
2188
2189 /**
2190  * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2191  * @netdev: the netdevice
2192  * @addr: address to add
2193  *
2194  * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2195  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2196  */
2197 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2198 {
2199         struct i40e_netdev_priv *np = netdev_priv(netdev);
2200         struct i40e_vsi *vsi = np->vsi;
2201
2202         /* Under some circumstances, we might receive a request to delete
2203          * our own device address from our uc list. Because we store the
2204          * device address in the VSI's MAC/VLAN filter list, we need to ignore
2205          * such requests and not delete our device address from this list.
2206          */
2207         if (ether_addr_equal(addr, netdev->dev_addr))
2208                 return 0;
2209
2210         i40e_del_mac_filter(vsi, addr);
2211
2212         return 0;
2213 }
2214
2215 /**
2216  * i40e_set_rx_mode - NDO callback to set the netdev filters
2217  * @netdev: network interface device structure
2218  **/
2219 static void i40e_set_rx_mode(struct net_device *netdev)
2220 {
2221         struct i40e_netdev_priv *np = netdev_priv(netdev);
2222         struct i40e_vsi *vsi = np->vsi;
2223
2224         spin_lock_bh(&vsi->mac_filter_hash_lock);
2225
2226         __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2227         __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2228
2229         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2230
2231         /* check for other flag changes */
2232         if (vsi->current_netdev_flags != vsi->netdev->flags) {
2233                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2234                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2235         }
2236 }
2237
2238 /**
2239  * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2240  * @vsi: Pointer to VSI struct
2241  * @from: Pointer to list which contains MAC filter entries - changes to
2242  *        those entries needs to be undone.
2243  *
2244  * MAC filter entries from this list were slated for deletion.
2245  **/
2246 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2247                                          struct hlist_head *from)
2248 {
2249         struct i40e_mac_filter *f;
2250         struct hlist_node *h;
2251
2252         hlist_for_each_entry_safe(f, h, from, hlist) {
2253                 u64 key = i40e_addr_to_hkey(f->macaddr);
2254
2255                 /* Move the element back into MAC filter list*/
2256                 hlist_del(&f->hlist);
2257                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2258         }
2259 }
2260
2261 /**
2262  * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2263  * @vsi: Pointer to vsi struct
2264  * @from: Pointer to list which contains MAC filter entries - changes to
2265  *        those entries needs to be undone.
2266  *
2267  * MAC filter entries from this list were slated for addition.
2268  **/
2269 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2270                                          struct hlist_head *from)
2271 {
2272         struct i40e_new_mac_filter *new;
2273         struct hlist_node *h;
2274
2275         hlist_for_each_entry_safe(new, h, from, hlist) {
2276                 /* We can simply free the wrapper structure */
2277                 hlist_del(&new->hlist);
2278                 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2279                 kfree(new);
2280         }
2281 }
2282
2283 /**
2284  * i40e_next_filter - Get the next non-broadcast filter from a list
2285  * @next: pointer to filter in list
2286  *
2287  * Returns the next non-broadcast filter in the list. Required so that we
2288  * ignore broadcast filters within the list, since these are not handled via
2289  * the normal firmware update path.
2290  */
2291 static
2292 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2293 {
2294         hlist_for_each_entry_continue(next, hlist) {
2295                 if (!is_broadcast_ether_addr(next->f->macaddr))
2296                         return next;
2297         }
2298
2299         return NULL;
2300 }
2301
2302 /**
2303  * i40e_update_filter_state - Update filter state based on return data
2304  * from firmware
2305  * @count: Number of filters added
2306  * @add_list: return data from fw
2307  * @add_head: pointer to first filter in current batch
2308  *
2309  * MAC filter entries from list were slated to be added to device. Returns
2310  * number of successful filters. Note that 0 does NOT mean success!
2311  **/
2312 static int
2313 i40e_update_filter_state(int count,
2314                          struct i40e_aqc_add_macvlan_element_data *add_list,
2315                          struct i40e_new_mac_filter *add_head)
2316 {
2317         int retval = 0;
2318         int i;
2319
2320         for (i = 0; i < count; i++) {
2321                 /* Always check status of each filter. We don't need to check
2322                  * the firmware return status because we pre-set the filter
2323                  * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2324                  * request to the adminq. Thus, if it no longer matches then
2325                  * we know the filter is active.
2326                  */
2327                 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2328                         add_head->state = I40E_FILTER_FAILED;
2329                 } else {
2330                         add_head->state = I40E_FILTER_ACTIVE;
2331                         retval++;
2332                 }
2333
2334                 add_head = i40e_next_filter(add_head);
2335                 if (!add_head)
2336                         break;
2337         }
2338
2339         return retval;
2340 }
2341
2342 /**
2343  * i40e_aqc_del_filters - Request firmware to delete a set of filters
2344  * @vsi: ptr to the VSI
2345  * @vsi_name: name to display in messages
2346  * @list: the list of filters to send to firmware
2347  * @num_del: the number of filters to delete
2348  * @retval: Set to -EIO on failure to delete
2349  *
2350  * Send a request to firmware via AdminQ to delete a set of filters. Uses
2351  * *retval instead of a return value so that success does not force ret_val to
2352  * be set to 0. This ensures that a sequence of calls to this function
2353  * preserve the previous value of *retval on successful delete.
2354  */
2355 static
2356 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2357                           struct i40e_aqc_remove_macvlan_element_data *list,
2358                           int num_del, int *retval)
2359 {
2360         struct i40e_hw *hw = &vsi->back->hw;
2361         enum i40e_admin_queue_err aq_status;
2362         int aq_ret;
2363
2364         aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2365                                            &aq_status);
2366
2367         /* Explicitly ignore and do not report when firmware returns ENOENT */
2368         if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2369                 *retval = -EIO;
2370                 dev_info(&vsi->back->pdev->dev,
2371                          "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",
2372                          vsi_name, ERR_PTR(aq_ret),
2373                          i40e_aq_str(hw, aq_status));
2374         }
2375 }
2376
2377 /**
2378  * i40e_aqc_add_filters - Request firmware to add a set of filters
2379  * @vsi: ptr to the VSI
2380  * @vsi_name: name to display in messages
2381  * @list: the list of filters to send to firmware
2382  * @add_head: Position in the add hlist
2383  * @num_add: the number of filters to add
2384  *
2385  * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2386  * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2387  * space for more filters.
2388  */
2389 static
2390 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2391                           struct i40e_aqc_add_macvlan_element_data *list,
2392                           struct i40e_new_mac_filter *add_head,
2393                           int num_add)
2394 {
2395         struct i40e_hw *hw = &vsi->back->hw;
2396         enum i40e_admin_queue_err aq_status;
2397         int fcnt;
2398
2399         i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2400         fcnt = i40e_update_filter_state(num_add, list, add_head);
2401
2402         if (fcnt != num_add) {
2403                 if (vsi->type == I40E_VSI_MAIN) {
2404                         set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2405                         dev_warn(&vsi->back->pdev->dev,
2406                                  "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2407                                  i40e_aq_str(hw, aq_status), vsi_name);
2408                 } else if (vsi->type == I40E_VSI_SRIOV ||
2409                            vsi->type == I40E_VSI_VMDQ1 ||
2410                            vsi->type == I40E_VSI_VMDQ2) {
2411                         dev_warn(&vsi->back->pdev->dev,
2412                                  "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2413                                  i40e_aq_str(hw, aq_status), vsi_name,
2414                                              vsi_name);
2415                 } else {
2416                         dev_warn(&vsi->back->pdev->dev,
2417                                  "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2418                                  i40e_aq_str(hw, aq_status), vsi_name,
2419                                              vsi->type);
2420                 }
2421         }
2422 }
2423
2424 /**
2425  * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2426  * @vsi: pointer to the VSI
2427  * @vsi_name: the VSI name
2428  * @f: filter data
2429  *
2430  * This function sets or clears the promiscuous broadcast flags for VLAN
2431  * filters in order to properly receive broadcast frames. Assumes that only
2432  * broadcast filters are passed.
2433  *
2434  * Returns status indicating success or failure;
2435  **/
2436 static int
2437 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2438                           struct i40e_mac_filter *f)
2439 {
2440         bool enable = f->state == I40E_FILTER_NEW;
2441         struct i40e_hw *hw = &vsi->back->hw;
2442         int aq_ret;
2443
2444         if (f->vlan == I40E_VLAN_ANY) {
2445                 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2446                                                    vsi->seid,
2447                                                    enable,
2448                                                    NULL);
2449         } else {
2450                 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2451                                                             vsi->seid,
2452                                                             enable,
2453                                                             f->vlan,
2454                                                             NULL);
2455         }
2456
2457         if (aq_ret) {
2458                 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2459                 dev_warn(&vsi->back->pdev->dev,
2460                          "Error %s, forcing overflow promiscuous on %s\n",
2461                          i40e_aq_str(hw, hw->aq.asq_last_status),
2462                          vsi_name);
2463         }
2464
2465         return aq_ret;
2466 }
2467
2468 /**
2469  * i40e_set_promiscuous - set promiscuous mode
2470  * @pf: board private structure
2471  * @promisc: promisc on or off
2472  *
2473  * There are different ways of setting promiscuous mode on a PF depending on
2474  * what state/environment we're in.  This identifies and sets it appropriately.
2475  * Returns 0 on success.
2476  **/
2477 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2478 {
2479         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2480         struct i40e_hw *hw = &pf->hw;
2481         int aq_ret;
2482
2483         if (vsi->type == I40E_VSI_MAIN &&
2484             pf->lan_veb != I40E_NO_VEB &&
2485             !test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
2486                 /* set defport ON for Main VSI instead of true promisc
2487                  * this way we will get all unicast/multicast and VLAN
2488                  * promisc behavior but will not get VF or VMDq traffic
2489                  * replicated on the Main VSI.
2490                  */
2491                 if (promisc)
2492                         aq_ret = i40e_aq_set_default_vsi(hw,
2493                                                          vsi->seid,
2494                                                          NULL);
2495                 else
2496                         aq_ret = i40e_aq_clear_default_vsi(hw,
2497                                                            vsi->seid,
2498                                                            NULL);
2499                 if (aq_ret) {
2500                         dev_info(&pf->pdev->dev,
2501                                  "Set default VSI failed, err %pe, aq_err %s\n",
2502                                  ERR_PTR(aq_ret),
2503                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2504                 }
2505         } else {
2506                 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2507                                                   hw,
2508                                                   vsi->seid,
2509                                                   promisc, NULL,
2510                                                   true);
2511                 if (aq_ret) {
2512                         dev_info(&pf->pdev->dev,
2513                                  "set unicast promisc failed, err %pe, aq_err %s\n",
2514                                  ERR_PTR(aq_ret),
2515                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2516                 }
2517                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2518                                                   hw,
2519                                                   vsi->seid,
2520                                                   promisc, NULL);
2521                 if (aq_ret) {
2522                         dev_info(&pf->pdev->dev,
2523                                  "set multicast promisc failed, err %pe, aq_err %s\n",
2524                                  ERR_PTR(aq_ret),
2525                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2526                 }
2527         }
2528
2529         if (!aq_ret)
2530                 pf->cur_promisc = promisc;
2531
2532         return aq_ret;
2533 }
2534
2535 /**
2536  * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2537  * @vsi: ptr to the VSI
2538  *
2539  * Push any outstanding VSI filter changes through the AdminQ.
2540  *
2541  * Returns 0 or error value
2542  **/
2543 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2544 {
2545         struct hlist_head tmp_add_list, tmp_del_list;
2546         struct i40e_mac_filter *f;
2547         struct i40e_new_mac_filter *new, *add_head = NULL;
2548         struct i40e_hw *hw = &vsi->back->hw;
2549         bool old_overflow, new_overflow;
2550         unsigned int failed_filters = 0;
2551         unsigned int vlan_filters = 0;
2552         char vsi_name[16] = "PF";
2553         int filter_list_len = 0;
2554         u32 changed_flags = 0;
2555         struct hlist_node *h;
2556         struct i40e_pf *pf;
2557         int num_add = 0;
2558         int num_del = 0;
2559         int aq_ret = 0;
2560         int retval = 0;
2561         u16 cmd_flags;
2562         int list_size;
2563         int bkt;
2564
2565         /* empty array typed pointers, kcalloc later */
2566         struct i40e_aqc_add_macvlan_element_data *add_list;
2567         struct i40e_aqc_remove_macvlan_element_data *del_list;
2568
2569         while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2570                 usleep_range(1000, 2000);
2571         pf = vsi->back;
2572
2573         old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2574
2575         if (vsi->netdev) {
2576                 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2577                 vsi->current_netdev_flags = vsi->netdev->flags;
2578         }
2579
2580         INIT_HLIST_HEAD(&tmp_add_list);
2581         INIT_HLIST_HEAD(&tmp_del_list);
2582
2583         if (vsi->type == I40E_VSI_SRIOV)
2584                 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2585         else if (vsi->type != I40E_VSI_MAIN)
2586                 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2587
2588         if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2589                 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2590
2591                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2592                 /* Create a list of filters to delete. */
2593                 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2594                         if (f->state == I40E_FILTER_REMOVE) {
2595                                 /* Move the element into temporary del_list */
2596                                 hash_del(&f->hlist);
2597                                 hlist_add_head(&f->hlist, &tmp_del_list);
2598
2599                                 /* Avoid counting removed filters */
2600                                 continue;
2601                         }
2602                         if (f->state == I40E_FILTER_NEW) {
2603                                 /* Create a temporary i40e_new_mac_filter */
2604                                 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2605                                 if (!new)
2606                                         goto err_no_memory_locked;
2607
2608                                 /* Store pointer to the real filter */
2609                                 new->f = f;
2610                                 new->state = f->state;
2611
2612                                 /* Add it to the hash list */
2613                                 hlist_add_head(&new->hlist, &tmp_add_list);
2614                         }
2615
2616                         /* Count the number of active (current and new) VLAN
2617                          * filters we have now. Does not count filters which
2618                          * are marked for deletion.
2619                          */
2620                         if (f->vlan > 0)
2621                                 vlan_filters++;
2622                 }
2623
2624                 if (vsi->type != I40E_VSI_SRIOV)
2625                         retval = i40e_correct_mac_vlan_filters
2626                                 (vsi, &tmp_add_list, &tmp_del_list,
2627                                  vlan_filters);
2628                 else if (pf->vf)
2629                         retval = i40e_correct_vf_mac_vlan_filters
2630                                 (vsi, &tmp_add_list, &tmp_del_list,
2631                                  vlan_filters, pf->vf[vsi->vf_id].trusted);
2632
2633                 hlist_for_each_entry(new, &tmp_add_list, hlist)
2634                         netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2635
2636                 if (retval)
2637                         goto err_no_memory_locked;
2638
2639                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2640         }
2641
2642         /* Now process 'del_list' outside the lock */
2643         if (!hlist_empty(&tmp_del_list)) {
2644                 filter_list_len = hw->aq.asq_buf_size /
2645                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2646                 list_size = filter_list_len *
2647                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2648                 del_list = kzalloc(list_size, GFP_ATOMIC);
2649                 if (!del_list)
2650                         goto err_no_memory;
2651
2652                 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2653                         cmd_flags = 0;
2654
2655                         /* handle broadcast filters by updating the broadcast
2656                          * promiscuous flag and release filter list.
2657                          */
2658                         if (is_broadcast_ether_addr(f->macaddr)) {
2659                                 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2660
2661                                 hlist_del(&f->hlist);
2662                                 kfree(f);
2663                                 continue;
2664                         }
2665
2666                         /* add to delete list */
2667                         ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2668                         if (f->vlan == I40E_VLAN_ANY) {
2669                                 del_list[num_del].vlan_tag = 0;
2670                                 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2671                         } else {
2672                                 del_list[num_del].vlan_tag =
2673                                         cpu_to_le16((u16)(f->vlan));
2674                         }
2675
2676                         cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2677                         del_list[num_del].flags = cmd_flags;
2678                         num_del++;
2679
2680                         /* flush a full buffer */
2681                         if (num_del == filter_list_len) {
2682                                 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2683                                                      num_del, &retval);
2684                                 memset(del_list, 0, list_size);
2685                                 num_del = 0;
2686                         }
2687                         /* Release memory for MAC filter entries which were
2688                          * synced up with HW.
2689                          */
2690                         hlist_del(&f->hlist);
2691                         kfree(f);
2692                 }
2693
2694                 if (num_del) {
2695                         i40e_aqc_del_filters(vsi, vsi_name, del_list,
2696                                              num_del, &retval);
2697                 }
2698
2699                 kfree(del_list);
2700                 del_list = NULL;
2701         }
2702
2703         if (!hlist_empty(&tmp_add_list)) {
2704                 /* Do all the adds now. */
2705                 filter_list_len = hw->aq.asq_buf_size /
2706                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2707                 list_size = filter_list_len *
2708                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2709                 add_list = kzalloc(list_size, GFP_ATOMIC);
2710                 if (!add_list)
2711                         goto err_no_memory;
2712
2713                 num_add = 0;
2714                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2715                         /* handle broadcast filters by updating the broadcast
2716                          * promiscuous flag instead of adding a MAC filter.
2717                          */
2718                         if (is_broadcast_ether_addr(new->f->macaddr)) {
2719                                 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2720                                                               new->f))
2721                                         new->state = I40E_FILTER_FAILED;
2722                                 else
2723                                         new->state = I40E_FILTER_ACTIVE;
2724                                 continue;
2725                         }
2726
2727                         /* add to add array */
2728                         if (num_add == 0)
2729                                 add_head = new;
2730                         cmd_flags = 0;
2731                         ether_addr_copy(add_list[num_add].mac_addr,
2732                                         new->f->macaddr);
2733                         if (new->f->vlan == I40E_VLAN_ANY) {
2734                                 add_list[num_add].vlan_tag = 0;
2735                                 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2736                         } else {
2737                                 add_list[num_add].vlan_tag =
2738                                         cpu_to_le16((u16)(new->f->vlan));
2739                         }
2740                         add_list[num_add].queue_number = 0;
2741                         /* set invalid match method for later detection */
2742                         add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2743                         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2744                         add_list[num_add].flags = cpu_to_le16(cmd_flags);
2745                         num_add++;
2746
2747                         /* flush a full buffer */
2748                         if (num_add == filter_list_len) {
2749                                 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2750                                                      add_head, num_add);
2751                                 memset(add_list, 0, list_size);
2752                                 num_add = 0;
2753                         }
2754                 }
2755                 if (num_add) {
2756                         i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2757                                              num_add);
2758                 }
2759                 /* Now move all of the filters from the temp add list back to
2760                  * the VSI's list.
2761                  */
2762                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2763                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2764                         /* Only update the state if we're still NEW */
2765                         if (new->f->state == I40E_FILTER_NEW)
2766                                 new->f->state = new->state;
2767                         hlist_del(&new->hlist);
2768                         netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2769                         kfree(new);
2770                 }
2771                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2772                 kfree(add_list);
2773                 add_list = NULL;
2774         }
2775
2776         /* Determine the number of active and failed filters. */
2777         spin_lock_bh(&vsi->mac_filter_hash_lock);
2778         vsi->active_filters = 0;
2779         hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2780                 if (f->state == I40E_FILTER_ACTIVE)
2781                         vsi->active_filters++;
2782                 else if (f->state == I40E_FILTER_FAILED)
2783                         failed_filters++;
2784         }
2785         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2786
2787         /* Check if we are able to exit overflow promiscuous mode. We can
2788          * safely exit if we didn't just enter, we no longer have any failed
2789          * filters, and we have reduced filters below the threshold value.
2790          */
2791         if (old_overflow && !failed_filters &&
2792             vsi->active_filters < vsi->promisc_threshold) {
2793                 dev_info(&pf->pdev->dev,
2794                          "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2795                          vsi_name);
2796                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2797                 vsi->promisc_threshold = 0;
2798         }
2799
2800         /* if the VF is not trusted do not do promisc */
2801         if (vsi->type == I40E_VSI_SRIOV && pf->vf &&
2802             !pf->vf[vsi->vf_id].trusted) {
2803                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2804                 goto out;
2805         }
2806
2807         new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2808
2809         /* If we are entering overflow promiscuous, we need to calculate a new
2810          * threshold for when we are safe to exit
2811          */
2812         if (!old_overflow && new_overflow)
2813                 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2814
2815         /* check for changes in promiscuous modes */
2816         if (changed_flags & IFF_ALLMULTI) {
2817                 bool cur_multipromisc;
2818
2819                 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2820                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2821                                                                vsi->seid,
2822                                                                cur_multipromisc,
2823                                                                NULL);
2824                 if (aq_ret) {
2825                         retval = i40e_aq_rc_to_posix(aq_ret,
2826                                                      hw->aq.asq_last_status);
2827                         dev_info(&pf->pdev->dev,
2828                                  "set multi promisc failed on %s, err %pe aq_err %s\n",
2829                                  vsi_name,
2830                                  ERR_PTR(aq_ret),
2831                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2832                 } else {
2833                         dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2834                                  cur_multipromisc ? "entering" : "leaving");
2835                 }
2836         }
2837
2838         if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2839                 bool cur_promisc;
2840
2841                 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2842                                new_overflow);
2843                 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2844                 if (aq_ret) {
2845                         retval = i40e_aq_rc_to_posix(aq_ret,
2846                                                      hw->aq.asq_last_status);
2847                         dev_info(&pf->pdev->dev,
2848                                  "Setting promiscuous %s failed on %s, err %pe aq_err %s\n",
2849                                  cur_promisc ? "on" : "off",
2850                                  vsi_name,
2851                                  ERR_PTR(aq_ret),
2852                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2853                 }
2854         }
2855 out:
2856         /* if something went wrong then set the changed flag so we try again */
2857         if (retval)
2858                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2859
2860         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2861         return retval;
2862
2863 err_no_memory:
2864         /* Restore elements on the temporary add and delete lists */
2865         spin_lock_bh(&vsi->mac_filter_hash_lock);
2866 err_no_memory_locked:
2867         i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2868         i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2869         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2870
2871         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2872         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2873         return -ENOMEM;
2874 }
2875
2876 /**
2877  * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2878  * @pf: board private structure
2879  **/
2880 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2881 {
2882         int v;
2883
2884         if (!pf)
2885                 return;
2886         if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2887                 return;
2888         if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2889                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2890                 return;
2891         }
2892
2893         for (v = 0; v < pf->num_alloc_vsi; v++) {
2894                 if (pf->vsi[v] &&
2895                     (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2896                     !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2897                         int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2898
2899                         if (ret) {
2900                                 /* come back and try again later */
2901                                 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2902                                         pf->state);
2903                                 break;
2904                         }
2905                 }
2906         }
2907 }
2908
2909 /**
2910  * i40e_calculate_vsi_rx_buf_len - Calculates buffer length
2911  *
2912  * @vsi: VSI to calculate rx_buf_len from
2913  */
2914 static u16 i40e_calculate_vsi_rx_buf_len(struct i40e_vsi *vsi)
2915 {
2916         if (!vsi->netdev || test_bit(I40E_FLAG_LEGACY_RX_ENA, vsi->back->flags))
2917                 return SKB_WITH_OVERHEAD(I40E_RXBUFFER_2048);
2918
2919         return PAGE_SIZE < 8192 ? I40E_RXBUFFER_3072 : I40E_RXBUFFER_2048;
2920 }
2921
2922 /**
2923  * i40e_max_vsi_frame_size - returns the maximum allowed frame size for VSI
2924  * @vsi: the vsi
2925  * @xdp_prog: XDP program
2926  **/
2927 static int i40e_max_vsi_frame_size(struct i40e_vsi *vsi,
2928                                    struct bpf_prog *xdp_prog)
2929 {
2930         u16 rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
2931         u16 chain_len;
2932
2933         if (xdp_prog && !xdp_prog->aux->xdp_has_frags)
2934                 chain_len = 1;
2935         else
2936                 chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
2937
2938         return min_t(u16, rx_buf_len * chain_len, I40E_MAX_RXBUFFER);
2939 }
2940
2941 /**
2942  * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2943  * @netdev: network interface device structure
2944  * @new_mtu: new value for maximum frame size
2945  *
2946  * Returns 0 on success, negative on failure
2947  **/
2948 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2949 {
2950         struct i40e_netdev_priv *np = netdev_priv(netdev);
2951         struct i40e_vsi *vsi = np->vsi;
2952         struct i40e_pf *pf = vsi->back;
2953         int frame_size;
2954
2955         frame_size = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
2956         if (new_mtu > frame_size - I40E_PACKET_HDR_PAD) {
2957                 netdev_err(netdev, "Error changing mtu to %d, Max is %d\n",
2958                            new_mtu, frame_size - I40E_PACKET_HDR_PAD);
2959                 return -EINVAL;
2960         }
2961
2962         netdev_dbg(netdev, "changing MTU from %d to %d\n",
2963                    netdev->mtu, new_mtu);
2964         netdev->mtu = new_mtu;
2965         if (netif_running(netdev))
2966                 i40e_vsi_reinit_locked(vsi);
2967         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2968         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2969         return 0;
2970 }
2971
2972 /**
2973  * i40e_ioctl - Access the hwtstamp interface
2974  * @netdev: network interface device structure
2975  * @ifr: interface request data
2976  * @cmd: ioctl command
2977  **/
2978 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2979 {
2980         struct i40e_netdev_priv *np = netdev_priv(netdev);
2981         struct i40e_pf *pf = np->vsi->back;
2982
2983         switch (cmd) {
2984         case SIOCGHWTSTAMP:
2985                 return i40e_ptp_get_ts_config(pf, ifr);
2986         case SIOCSHWTSTAMP:
2987                 return i40e_ptp_set_ts_config(pf, ifr);
2988         default:
2989                 return -EOPNOTSUPP;
2990         }
2991 }
2992
2993 /**
2994  * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2995  * @vsi: the vsi being adjusted
2996  **/
2997 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2998 {
2999         struct i40e_vsi_context ctxt;
3000         int ret;
3001
3002         /* Don't modify stripping options if a port VLAN is active */
3003         if (vsi->info.pvid)
3004                 return;
3005
3006         if ((vsi->info.valid_sections &
3007              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3008             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
3009                 return;  /* already enabled */
3010
3011         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3012         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3013                                     I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
3014
3015         ctxt.seid = vsi->seid;
3016         ctxt.info = vsi->info;
3017         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3018         if (ret) {
3019                 dev_info(&vsi->back->pdev->dev,
3020                          "update vlan stripping failed, err %pe aq_err %s\n",
3021                          ERR_PTR(ret),
3022                          i40e_aq_str(&vsi->back->hw,
3023                                      vsi->back->hw.aq.asq_last_status));
3024         }
3025 }
3026
3027 /**
3028  * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
3029  * @vsi: the vsi being adjusted
3030  **/
3031 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
3032 {
3033         struct i40e_vsi_context ctxt;
3034         int ret;
3035
3036         /* Don't modify stripping options if a port VLAN is active */
3037         if (vsi->info.pvid)
3038                 return;
3039
3040         if ((vsi->info.valid_sections &
3041              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3042             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
3043              I40E_AQ_VSI_PVLAN_EMOD_MASK))
3044                 return;  /* already disabled */
3045
3046         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3047         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3048                                     I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
3049
3050         ctxt.seid = vsi->seid;
3051         ctxt.info = vsi->info;
3052         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3053         if (ret) {
3054                 dev_info(&vsi->back->pdev->dev,
3055                          "update vlan stripping failed, err %pe aq_err %s\n",
3056                          ERR_PTR(ret),
3057                          i40e_aq_str(&vsi->back->hw,
3058                                      vsi->back->hw.aq.asq_last_status));
3059         }
3060 }
3061
3062 /**
3063  * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
3064  * @vsi: the vsi being configured
3065  * @vid: vlan id to be added (0 = untagged only , -1 = any)
3066  *
3067  * This is a helper function for adding a new MAC/VLAN filter with the
3068  * specified VLAN for each existing MAC address already in the hash table.
3069  * This function does *not* perform any accounting to update filters based on
3070  * VLAN mode.
3071  *
3072  * NOTE: this function expects to be called while under the
3073  * mac_filter_hash_lock
3074  **/
3075 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3076 {
3077         struct i40e_mac_filter *f, *add_f;
3078         struct hlist_node *h;
3079         int bkt;
3080
3081         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3082                 /* If we're asked to add a filter that has been marked for
3083                  * removal, it is safe to simply restore it to active state.
3084                  * __i40e_del_filter will have simply deleted any filters which
3085                  * were previously marked NEW or FAILED, so if it is currently
3086                  * marked REMOVE it must have previously been ACTIVE. Since we
3087                  * haven't yet run the sync filters task, just restore this
3088                  * filter to the ACTIVE state so that the sync task leaves it
3089                  * in place.
3090                  */
3091                 if (f->state == I40E_FILTER_REMOVE && f->vlan == vid) {
3092                         f->state = I40E_FILTER_ACTIVE;
3093                         continue;
3094                 } else if (f->state == I40E_FILTER_REMOVE) {
3095                         continue;
3096                 }
3097                 add_f = i40e_add_filter(vsi, f->macaddr, vid);
3098                 if (!add_f) {
3099                         dev_info(&vsi->back->pdev->dev,
3100                                  "Could not add vlan filter %d for %pM\n",
3101                                  vid, f->macaddr);
3102                         return -ENOMEM;
3103                 }
3104         }
3105
3106         return 0;
3107 }
3108
3109 /**
3110  * i40e_vsi_add_vlan - Add VSI membership for given VLAN
3111  * @vsi: the VSI being configured
3112  * @vid: VLAN id to be added
3113  **/
3114 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
3115 {
3116         int err;
3117
3118         if (vsi->info.pvid)
3119                 return -EINVAL;
3120
3121         /* The network stack will attempt to add VID=0, with the intention to
3122          * receive priority tagged packets with a VLAN of 0. Our HW receives
3123          * these packets by default when configured to receive untagged
3124          * packets, so we don't need to add a filter for this case.
3125          * Additionally, HW interprets adding a VID=0 filter as meaning to
3126          * receive *only* tagged traffic and stops receiving untagged traffic.
3127          * Thus, we do not want to actually add a filter for VID=0
3128          */
3129         if (!vid)
3130                 return 0;
3131
3132         /* Locked once because all functions invoked below iterates list*/
3133         spin_lock_bh(&vsi->mac_filter_hash_lock);
3134         err = i40e_add_vlan_all_mac(vsi, vid);
3135         spin_unlock_bh(&vsi->mac_filter_hash_lock);
3136         if (err)
3137                 return err;
3138
3139         /* schedule our worker thread which will take care of
3140          * applying the new filter changes
3141          */
3142         i40e_service_event_schedule(vsi->back);
3143         return 0;
3144 }
3145
3146 /**
3147  * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
3148  * @vsi: the vsi being configured
3149  * @vid: vlan id to be removed (0 = untagged only , -1 = any)
3150  *
3151  * This function should be used to remove all VLAN filters which match the
3152  * given VID. It does not schedule the service event and does not take the
3153  * mac_filter_hash_lock so it may be combined with other operations under
3154  * a single invocation of the mac_filter_hash_lock.
3155  *
3156  * NOTE: this function expects to be called while under the
3157  * mac_filter_hash_lock
3158  */
3159 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3160 {
3161         struct i40e_mac_filter *f;
3162         struct hlist_node *h;
3163         int bkt;
3164
3165         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3166                 if (f->vlan == vid)
3167                         __i40e_del_filter(vsi, f);
3168         }
3169 }
3170
3171 /**
3172  * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3173  * @vsi: the VSI being configured
3174  * @vid: VLAN id to be removed
3175  **/
3176 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3177 {
3178         if (!vid || vsi->info.pvid)
3179                 return;
3180
3181         spin_lock_bh(&vsi->mac_filter_hash_lock);
3182         i40e_rm_vlan_all_mac(vsi, vid);
3183         spin_unlock_bh(&vsi->mac_filter_hash_lock);
3184
3185         /* schedule our worker thread which will take care of
3186          * applying the new filter changes
3187          */
3188         i40e_service_event_schedule(vsi->back);
3189 }
3190
3191 /**
3192  * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3193  * @netdev: network interface to be adjusted
3194  * @proto: unused protocol value
3195  * @vid: vlan id to be added
3196  *
3197  * net_device_ops implementation for adding vlan ids
3198  **/
3199 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3200                                 __always_unused __be16 proto, u16 vid)
3201 {
3202         struct i40e_netdev_priv *np = netdev_priv(netdev);
3203         struct i40e_vsi *vsi = np->vsi;
3204         int ret = 0;
3205
3206         if (vid >= VLAN_N_VID)
3207                 return -EINVAL;
3208
3209         ret = i40e_vsi_add_vlan(vsi, vid);
3210         if (!ret)
3211                 set_bit(vid, vsi->active_vlans);
3212
3213         return ret;
3214 }
3215
3216 /**
3217  * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3218  * @netdev: network interface to be adjusted
3219  * @proto: unused protocol value
3220  * @vid: vlan id to be added
3221  **/
3222 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3223                                     __always_unused __be16 proto, u16 vid)
3224 {
3225         struct i40e_netdev_priv *np = netdev_priv(netdev);
3226         struct i40e_vsi *vsi = np->vsi;
3227
3228         if (vid >= VLAN_N_VID)
3229                 return;
3230         set_bit(vid, vsi->active_vlans);
3231 }
3232
3233 /**
3234  * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3235  * @netdev: network interface to be adjusted
3236  * @proto: unused protocol value
3237  * @vid: vlan id to be removed
3238  *
3239  * net_device_ops implementation for removing vlan ids
3240  **/
3241 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3242                                  __always_unused __be16 proto, u16 vid)
3243 {
3244         struct i40e_netdev_priv *np = netdev_priv(netdev);
3245         struct i40e_vsi *vsi = np->vsi;
3246
3247         /* return code is ignored as there is nothing a user
3248          * can do about failure to remove and a log message was
3249          * already printed from the other function
3250          */
3251         i40e_vsi_kill_vlan(vsi, vid);
3252
3253         clear_bit(vid, vsi->active_vlans);
3254
3255         return 0;
3256 }
3257
3258 /**
3259  * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3260  * @vsi: the vsi being brought back up
3261  **/
3262 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3263 {
3264         u16 vid;
3265
3266         if (!vsi->netdev)
3267                 return;
3268
3269         if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3270                 i40e_vlan_stripping_enable(vsi);
3271         else
3272                 i40e_vlan_stripping_disable(vsi);
3273
3274         for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3275                 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3276                                         vid);
3277 }
3278
3279 /**
3280  * i40e_vsi_add_pvid - Add pvid for the VSI
3281  * @vsi: the vsi being adjusted
3282  * @vid: the vlan id to set as a PVID
3283  **/
3284 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3285 {
3286         struct i40e_vsi_context ctxt;
3287         int ret;
3288
3289         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3290         vsi->info.pvid = cpu_to_le16(vid);
3291         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3292                                     I40E_AQ_VSI_PVLAN_INSERT_PVID |
3293                                     I40E_AQ_VSI_PVLAN_EMOD_STR;
3294
3295         ctxt.seid = vsi->seid;
3296         ctxt.info = vsi->info;
3297         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3298         if (ret) {
3299                 dev_info(&vsi->back->pdev->dev,
3300                          "add pvid failed, err %pe aq_err %s\n",
3301                          ERR_PTR(ret),
3302                          i40e_aq_str(&vsi->back->hw,
3303                                      vsi->back->hw.aq.asq_last_status));
3304                 return -ENOENT;
3305         }
3306
3307         return 0;
3308 }
3309
3310 /**
3311  * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3312  * @vsi: the vsi being adjusted
3313  *
3314  * Just use the vlan_rx_register() service to put it back to normal
3315  **/
3316 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3317 {
3318         vsi->info.pvid = 0;
3319
3320         i40e_vlan_stripping_disable(vsi);
3321 }
3322
3323 /**
3324  * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3325  * @vsi: ptr to the VSI
3326  *
3327  * If this function returns with an error, then it's possible one or
3328  * more of the rings is populated (while the rest are not).  It is the
3329  * callers duty to clean those orphaned rings.
3330  *
3331  * Return 0 on success, negative on failure
3332  **/
3333 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3334 {
3335         int i, err = 0;
3336
3337         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3338                 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3339
3340         if (!i40e_enabled_xdp_vsi(vsi))
3341                 return err;
3342
3343         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3344                 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3345
3346         return err;
3347 }
3348
3349 /**
3350  * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3351  * @vsi: ptr to the VSI
3352  *
3353  * Free VSI's transmit software resources
3354  **/
3355 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3356 {
3357         int i;
3358
3359         if (vsi->tx_rings) {
3360                 for (i = 0; i < vsi->num_queue_pairs; i++)
3361                         if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3362                                 i40e_free_tx_resources(vsi->tx_rings[i]);
3363         }
3364
3365         if (vsi->xdp_rings) {
3366                 for (i = 0; i < vsi->num_queue_pairs; i++)
3367                         if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3368                                 i40e_free_tx_resources(vsi->xdp_rings[i]);
3369         }
3370 }
3371
3372 /**
3373  * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3374  * @vsi: ptr to the VSI
3375  *
3376  * If this function returns with an error, then it's possible one or
3377  * more of the rings is populated (while the rest are not).  It is the
3378  * callers duty to clean those orphaned rings.
3379  *
3380  * Return 0 on success, negative on failure
3381  **/
3382 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3383 {
3384         int i, err = 0;
3385
3386         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3387                 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3388         return err;
3389 }
3390
3391 /**
3392  * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3393  * @vsi: ptr to the VSI
3394  *
3395  * Free all receive software resources
3396  **/
3397 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3398 {
3399         int i;
3400
3401         if (!vsi->rx_rings)
3402                 return;
3403
3404         for (i = 0; i < vsi->num_queue_pairs; i++)
3405                 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3406                         i40e_free_rx_resources(vsi->rx_rings[i]);
3407 }
3408
3409 /**
3410  * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3411  * @ring: The Tx ring to configure
3412  *
3413  * This enables/disables XPS for a given Tx descriptor ring
3414  * based on the TCs enabled for the VSI that ring belongs to.
3415  **/
3416 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3417 {
3418         int cpu;
3419
3420         if (!ring->q_vector || !ring->netdev || ring->ch)
3421                 return;
3422
3423         /* We only initialize XPS once, so as not to overwrite user settings */
3424         if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3425                 return;
3426
3427         cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3428         netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3429                             ring->queue_index);
3430 }
3431
3432 /**
3433  * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3434  * @ring: The Tx or Rx ring
3435  *
3436  * Returns the AF_XDP buffer pool or NULL.
3437  **/
3438 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3439 {
3440         bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3441         int qid = ring->queue_index;
3442
3443         if (ring_is_xdp(ring))
3444                 qid -= ring->vsi->alloc_queue_pairs;
3445
3446         if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3447                 return NULL;
3448
3449         return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3450 }
3451
3452 /**
3453  * i40e_configure_tx_ring - Configure a transmit ring context and rest
3454  * @ring: The Tx ring to configure
3455  *
3456  * Configure the Tx descriptor ring in the HMC context.
3457  **/
3458 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3459 {
3460         struct i40e_vsi *vsi = ring->vsi;
3461         u16 pf_q = vsi->base_queue + ring->queue_index;
3462         struct i40e_hw *hw = &vsi->back->hw;
3463         struct i40e_hmc_obj_txq tx_ctx;
3464         u32 qtx_ctl = 0;
3465         int err = 0;
3466
3467         if (ring_is_xdp(ring))
3468                 ring->xsk_pool = i40e_xsk_pool(ring);
3469
3470         /* some ATR related tx ring init */
3471         if (test_bit(I40E_FLAG_FD_ATR_ENA, vsi->back->flags)) {
3472                 ring->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
3473                 ring->atr_count = 0;
3474         } else {
3475                 ring->atr_sample_rate = 0;
3476         }
3477
3478         /* configure XPS */
3479         i40e_config_xps_tx_ring(ring);
3480
3481         /* clear the context structure first */
3482         memset(&tx_ctx, 0, sizeof(tx_ctx));
3483
3484         tx_ctx.new_context = 1;
3485         tx_ctx.base = (ring->dma / 128);
3486         tx_ctx.qlen = ring->count;
3487         if (test_bit(I40E_FLAG_FD_SB_ENA, vsi->back->flags) ||
3488             test_bit(I40E_FLAG_FD_ATR_ENA, vsi->back->flags))
3489                 tx_ctx.fd_ena = 1;
3490         if (test_bit(I40E_FLAG_PTP_ENA, vsi->back->flags))
3491                 tx_ctx.timesync_ena = 1;
3492         /* FDIR VSI tx ring can still use RS bit and writebacks */
3493         if (vsi->type != I40E_VSI_FDIR)
3494                 tx_ctx.head_wb_ena = 1;
3495         tx_ctx.head_wb_addr = ring->dma +
3496                               (ring->count * sizeof(struct i40e_tx_desc));
3497
3498         /* As part of VSI creation/update, FW allocates certain
3499          * Tx arbitration queue sets for each TC enabled for
3500          * the VSI. The FW returns the handles to these queue
3501          * sets as part of the response buffer to Add VSI,
3502          * Update VSI, etc. AQ commands. It is expected that
3503          * these queue set handles be associated with the Tx
3504          * queues by the driver as part of the TX queue context
3505          * initialization. This has to be done regardless of
3506          * DCB as by default everything is mapped to TC0.
3507          */
3508
3509         if (ring->ch)
3510                 tx_ctx.rdylist =
3511                         le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3512
3513         else
3514                 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3515
3516         tx_ctx.rdylist_act = 0;
3517
3518         /* clear the context in the HMC */
3519         err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3520         if (err) {
3521                 dev_info(&vsi->back->pdev->dev,
3522                          "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3523                          ring->queue_index, pf_q, err);
3524                 return -ENOMEM;
3525         }
3526
3527         /* set the context in the HMC */
3528         err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3529         if (err) {
3530                 dev_info(&vsi->back->pdev->dev,
3531                          "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3532                          ring->queue_index, pf_q, err);
3533                 return -ENOMEM;
3534         }
3535
3536         /* Now associate this queue with this PCI function */
3537         if (ring->ch) {
3538                 if (ring->ch->type == I40E_VSI_VMDQ2)
3539                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3540                 else
3541                         return -EINVAL;
3542
3543                 qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,
3544                                       ring->ch->vsi_number);
3545         } else {
3546                 if (vsi->type == I40E_VSI_VMDQ2) {
3547                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3548                         qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_VFVM_INDX_MASK,
3549                                               vsi->id);
3550                 } else {
3551                         qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3552                 }
3553         }
3554
3555         qtx_ctl |= FIELD_PREP(I40E_QTX_CTL_PF_INDX_MASK, hw->pf_id);
3556         wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3557         i40e_flush(hw);
3558
3559         /* cache tail off for easier writes later */
3560         ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3561
3562         return 0;
3563 }
3564
3565 /**
3566  * i40e_rx_offset - Return expected offset into page to access data
3567  * @rx_ring: Ring we are requesting offset of
3568  *
3569  * Returns the offset value for ring into the data buffer.
3570  */
3571 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3572 {
3573         return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3574 }
3575
3576 /**
3577  * i40e_configure_rx_ring - Configure a receive ring context
3578  * @ring: The Rx ring to configure
3579  *
3580  * Configure the Rx descriptor ring in the HMC context.
3581  **/
3582 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3583 {
3584         struct i40e_vsi *vsi = ring->vsi;
3585         u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3586         u16 pf_q = vsi->base_queue + ring->queue_index;
3587         struct i40e_hw *hw = &vsi->back->hw;
3588         struct i40e_hmc_obj_rxq rx_ctx;
3589         int err = 0;
3590         bool ok;
3591         int ret;
3592
3593         bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3594
3595         /* clear the context structure first */
3596         memset(&rx_ctx, 0, sizeof(rx_ctx));
3597
3598         if (ring->vsi->type == I40E_VSI_MAIN)
3599                 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3600
3601         ring->xsk_pool = i40e_xsk_pool(ring);
3602         if (ring->xsk_pool) {
3603                 ring->rx_buf_len =
3604                   xsk_pool_get_rx_frame_size(ring->xsk_pool);
3605                 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3606                                                  MEM_TYPE_XSK_BUFF_POOL,
3607                                                  NULL);
3608                 if (ret)
3609                         return ret;
3610                 dev_info(&vsi->back->pdev->dev,
3611                          "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3612                          ring->queue_index);
3613
3614         } else {
3615                 ring->rx_buf_len = vsi->rx_buf_len;
3616                 if (ring->vsi->type == I40E_VSI_MAIN) {
3617                         ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3618                                                          MEM_TYPE_PAGE_SHARED,
3619                                                          NULL);
3620                         if (ret)
3621                                 return ret;
3622                 }
3623         }
3624
3625         xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
3626
3627         rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3628                                     BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3629
3630         rx_ctx.base = (ring->dma / 128);
3631         rx_ctx.qlen = ring->count;
3632
3633         /* use 16 byte descriptors */
3634         rx_ctx.dsize = 0;
3635
3636         /* descriptor type is always zero
3637          * rx_ctx.dtype = 0;
3638          */
3639         rx_ctx.hsplit_0 = 0;
3640
3641         rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3642         if (hw->revision_id == 0)
3643                 rx_ctx.lrxqthresh = 0;
3644         else
3645                 rx_ctx.lrxqthresh = 1;
3646         rx_ctx.crcstrip = 1;
3647         rx_ctx.l2tsel = 1;
3648         /* this controls whether VLAN is stripped from inner headers */
3649         rx_ctx.showiv = 0;
3650         /* set the prefena field to 1 because the manual says to */
3651         rx_ctx.prefena = 1;
3652
3653         /* clear the context in the HMC */
3654         err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3655         if (err) {
3656                 dev_info(&vsi->back->pdev->dev,
3657                          "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3658                          ring->queue_index, pf_q, err);
3659                 return -ENOMEM;
3660         }
3661
3662         /* set the context in the HMC */
3663         err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3664         if (err) {
3665                 dev_info(&vsi->back->pdev->dev,
3666                          "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3667                          ring->queue_index, pf_q, err);
3668                 return -ENOMEM;
3669         }
3670
3671         /* configure Rx buffer alignment */
3672         if (!vsi->netdev || test_bit(I40E_FLAG_LEGACY_RX_ENA, vsi->back->flags)) {
3673                 if (I40E_2K_TOO_SMALL_WITH_PADDING) {
3674                         dev_info(&vsi->back->pdev->dev,
3675                                  "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
3676                         return -EOPNOTSUPP;
3677                 }
3678                 clear_ring_build_skb_enabled(ring);
3679         } else {
3680                 set_ring_build_skb_enabled(ring);
3681         }
3682
3683         ring->rx_offset = i40e_rx_offset(ring);
3684
3685         /* cache tail for quicker writes, and clear the reg before use */
3686         ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3687         writel(0, ring->tail);
3688
3689         if (ring->xsk_pool) {
3690                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3691                 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3692         } else {
3693                 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3694         }
3695         if (!ok) {
3696                 /* Log this in case the user has forgotten to give the kernel
3697                  * any buffers, even later in the application.
3698                  */
3699                 dev_info(&vsi->back->pdev->dev,
3700                          "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3701                          ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3702                          ring->queue_index, pf_q);
3703         }
3704
3705         return 0;
3706 }
3707
3708 /**
3709  * i40e_vsi_configure_tx - Configure the VSI for Tx
3710  * @vsi: VSI structure describing this set of rings and resources
3711  *
3712  * Configure the Tx VSI for operation.
3713  **/
3714 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3715 {
3716         int err = 0;
3717         u16 i;
3718
3719         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3720                 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3721
3722         if (err || !i40e_enabled_xdp_vsi(vsi))
3723                 return err;
3724
3725         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3726                 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3727
3728         return err;
3729 }
3730
3731 /**
3732  * i40e_vsi_configure_rx - Configure the VSI for Rx
3733  * @vsi: the VSI being configured
3734  *
3735  * Configure the Rx VSI for operation.
3736  **/
3737 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3738 {
3739         int err = 0;
3740         u16 i;
3741
3742         vsi->max_frame = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
3743         vsi->rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
3744
3745 #if (PAGE_SIZE < 8192)
3746         if (vsi->netdev && !I40E_2K_TOO_SMALL_WITH_PADDING &&
3747             vsi->netdev->mtu <= ETH_DATA_LEN) {
3748                 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3749                 vsi->max_frame = vsi->rx_buf_len;
3750         }
3751 #endif
3752
3753         /* set up individual rings */
3754         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3755                 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3756
3757         return err;
3758 }
3759
3760 /**
3761  * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3762  * @vsi: ptr to the VSI
3763  **/
3764 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3765 {
3766         struct i40e_ring *tx_ring, *rx_ring;
3767         u16 qoffset, qcount;
3768         int i, n;
3769
3770         if (!test_bit(I40E_FLAG_DCB_ENA, vsi->back->flags)) {
3771                 /* Reset the TC information */
3772                 for (i = 0; i < vsi->num_queue_pairs; i++) {
3773                         rx_ring = vsi->rx_rings[i];
3774                         tx_ring = vsi->tx_rings[i];
3775                         rx_ring->dcb_tc = 0;
3776                         tx_ring->dcb_tc = 0;
3777                 }
3778                 return;
3779         }
3780
3781         for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3782                 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3783                         continue;
3784
3785                 qoffset = vsi->tc_config.tc_info[n].qoffset;
3786                 qcount = vsi->tc_config.tc_info[n].qcount;
3787                 for (i = qoffset; i < (qoffset + qcount); i++) {
3788                         rx_ring = vsi->rx_rings[i];
3789                         tx_ring = vsi->tx_rings[i];
3790                         rx_ring->dcb_tc = n;
3791                         tx_ring->dcb_tc = n;
3792                 }
3793         }
3794 }
3795
3796 /**
3797  * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3798  * @vsi: ptr to the VSI
3799  **/
3800 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3801 {
3802         if (vsi->netdev)
3803                 i40e_set_rx_mode(vsi->netdev);
3804 }
3805
3806 /**
3807  * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3808  * @pf: Pointer to the targeted PF
3809  *
3810  * Set all flow director counters to 0.
3811  */
3812 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3813 {
3814         pf->fd_tcp4_filter_cnt = 0;
3815         pf->fd_udp4_filter_cnt = 0;
3816         pf->fd_sctp4_filter_cnt = 0;
3817         pf->fd_ip4_filter_cnt = 0;
3818         pf->fd_tcp6_filter_cnt = 0;
3819         pf->fd_udp6_filter_cnt = 0;
3820         pf->fd_sctp6_filter_cnt = 0;
3821         pf->fd_ip6_filter_cnt = 0;
3822 }
3823
3824 /**
3825  * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3826  * @vsi: Pointer to the targeted VSI
3827  *
3828  * This function replays the hlist on the hw where all the SB Flow Director
3829  * filters were saved.
3830  **/
3831 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3832 {
3833         struct i40e_fdir_filter *filter;
3834         struct i40e_pf *pf = vsi->back;
3835         struct hlist_node *node;
3836
3837         if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
3838                 return;
3839
3840         /* Reset FDir counters as we're replaying all existing filters */
3841         i40e_reset_fdir_filter_cnt(pf);
3842
3843         hlist_for_each_entry_safe(filter, node,
3844                                   &pf->fdir_filter_list, fdir_node) {
3845                 i40e_add_del_fdir(vsi, filter, true);
3846         }
3847 }
3848
3849 /**
3850  * i40e_vsi_configure - Set up the VSI for action
3851  * @vsi: the VSI being configured
3852  **/
3853 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3854 {
3855         int err;
3856
3857         i40e_set_vsi_rx_mode(vsi);
3858         i40e_restore_vlan(vsi);
3859         i40e_vsi_config_dcb_rings(vsi);
3860         err = i40e_vsi_configure_tx(vsi);
3861         if (!err)
3862                 err = i40e_vsi_configure_rx(vsi);
3863
3864         return err;
3865 }
3866
3867 /**
3868  * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3869  * @vsi: the VSI being configured
3870  **/
3871 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3872 {
3873         bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3874         struct i40e_pf *pf = vsi->back;
3875         struct i40e_hw *hw = &pf->hw;
3876         u16 vector;
3877         int i, q;
3878         u32 qp;
3879
3880         /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3881          * and PFINT_LNKLSTn registers, e.g.:
3882          *   PFINT_ITRn[0..n-1] gets msix-1..msix-n  (qpair interrupts)
3883          */
3884         qp = vsi->base_queue;
3885         vector = vsi->base_vector;
3886         for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3887                 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3888
3889                 q_vector->rx.next_update = jiffies + 1;
3890                 q_vector->rx.target_itr =
3891                         ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3892                 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3893                      q_vector->rx.target_itr >> 1);
3894                 q_vector->rx.current_itr = q_vector->rx.target_itr;
3895
3896                 q_vector->tx.next_update = jiffies + 1;
3897                 q_vector->tx.target_itr =
3898                         ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3899                 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3900                      q_vector->tx.target_itr >> 1);
3901                 q_vector->tx.current_itr = q_vector->tx.target_itr;
3902
3903                 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3904                      i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3905
3906                 /* begin of linked list for RX queue assigned to this vector */
3907                 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3908                 for (q = 0; q < q_vector->num_ringpairs; q++) {
3909                         u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3910                         u32 val;
3911
3912                         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3913                               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3914                               (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3915                               (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3916                               (I40E_QUEUE_TYPE_TX <<
3917                                I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3918
3919                         wr32(hw, I40E_QINT_RQCTL(qp), val);
3920
3921                         if (has_xdp) {
3922                                 /* TX queue with next queue set to TX */
3923                                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3924                                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3925                                       (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3926                                       (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3927                                       (I40E_QUEUE_TYPE_TX <<
3928                                        I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3929
3930                                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3931                         }
3932                         /* TX queue with next RX or end of linked list */
3933                         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3934                               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3935                               (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3936                               ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3937                               (I40E_QUEUE_TYPE_RX <<
3938                                I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3939
3940                         /* Terminate the linked list */
3941                         if (q == (q_vector->num_ringpairs - 1))
3942                                 val |= (I40E_QUEUE_END_OF_LIST <<
3943                                         I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3944
3945                         wr32(hw, I40E_QINT_TQCTL(qp), val);
3946                         qp++;
3947                 }
3948         }
3949
3950         i40e_flush(hw);
3951 }
3952
3953 /**
3954  * i40e_enable_misc_int_causes - enable the non-queue interrupts
3955  * @pf: pointer to private device data structure
3956  **/
3957 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3958 {
3959         struct i40e_hw *hw = &pf->hw;
3960         u32 val;
3961
3962         /* clear things first */
3963         wr32(hw, I40E_PFINT_ICR0_ENA, 0);  /* disable all */
3964         rd32(hw, I40E_PFINT_ICR0);         /* read to clear */
3965
3966         val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK       |
3967               I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK    |
3968               I40E_PFINT_ICR0_ENA_GRST_MASK          |
3969               I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3970               I40E_PFINT_ICR0_ENA_GPIO_MASK          |
3971               I40E_PFINT_ICR0_ENA_HMC_ERR_MASK       |
3972               I40E_PFINT_ICR0_ENA_VFLR_MASK          |
3973               I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3974
3975         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags))
3976                 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3977
3978         if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
3979                 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3980
3981         wr32(hw, I40E_PFINT_ICR0_ENA, val);
3982
3983         /* SW_ITR_IDX = 0, but don't change INTENA */
3984         wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3985                                         I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3986
3987         /* OTHER_ITR_IDX = 0 */
3988         wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3989 }
3990
3991 /**
3992  * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3993  * @vsi: the VSI being configured
3994  **/
3995 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3996 {
3997         u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3998         struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3999         struct i40e_pf *pf = vsi->back;
4000         struct i40e_hw *hw = &pf->hw;
4001
4002         /* set the ITR configuration */
4003         q_vector->rx.next_update = jiffies + 1;
4004         q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
4005         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
4006         q_vector->rx.current_itr = q_vector->rx.target_itr;
4007         q_vector->tx.next_update = jiffies + 1;
4008         q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
4009         wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
4010         q_vector->tx.current_itr = q_vector->tx.target_itr;
4011
4012         i40e_enable_misc_int_causes(pf);
4013
4014         /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
4015         wr32(hw, I40E_PFINT_LNKLST0, 0);
4016
4017         /* Associate the queue pair to the vector and enable the queue
4018          * interrupt RX queue in linked list with next queue set to TX
4019          */
4020         wr32(hw, I40E_QINT_RQCTL(0), I40E_QINT_RQCTL_VAL(nextqp, 0, TX));
4021
4022         if (i40e_enabled_xdp_vsi(vsi)) {
4023                 /* TX queue in linked list with next queue set to TX */
4024                 wr32(hw, I40E_QINT_TQCTL(nextqp),
4025                      I40E_QINT_TQCTL_VAL(nextqp, 0, TX));
4026         }
4027
4028         /* last TX queue so the next RX queue doesn't matter */
4029         wr32(hw, I40E_QINT_TQCTL(0),
4030              I40E_QINT_TQCTL_VAL(I40E_QUEUE_END_OF_LIST, 0, RX));
4031         i40e_flush(hw);
4032 }
4033
4034 /**
4035  * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
4036  * @pf: board private structure
4037  **/
4038 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
4039 {
4040         struct i40e_hw *hw = &pf->hw;
4041
4042         wr32(hw, I40E_PFINT_DYN_CTL0,
4043              I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
4044         i40e_flush(hw);
4045 }
4046
4047 /**
4048  * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
4049  * @pf: board private structure
4050  **/
4051 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
4052 {
4053         struct i40e_hw *hw = &pf->hw;
4054         u32 val;
4055
4056         val = I40E_PFINT_DYN_CTL0_INTENA_MASK   |
4057               I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
4058               (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
4059
4060         wr32(hw, I40E_PFINT_DYN_CTL0, val);
4061         i40e_flush(hw);
4062 }
4063
4064 /**
4065  * i40e_msix_clean_rings - MSIX mode Interrupt Handler
4066  * @irq: interrupt number
4067  * @data: pointer to a q_vector
4068  **/
4069 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
4070 {
4071         struct i40e_q_vector *q_vector = data;
4072
4073         if (!q_vector->tx.ring && !q_vector->rx.ring)
4074                 return IRQ_HANDLED;
4075
4076         napi_schedule_irqoff(&q_vector->napi);
4077
4078         return IRQ_HANDLED;
4079 }
4080
4081 /**
4082  * i40e_irq_affinity_notify - Callback for affinity changes
4083  * @notify: context as to what irq was changed
4084  * @mask: the new affinity mask
4085  *
4086  * This is a callback function used by the irq_set_affinity_notifier function
4087  * so that we may register to receive changes to the irq affinity masks.
4088  **/
4089 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
4090                                      const cpumask_t *mask)
4091 {
4092         struct i40e_q_vector *q_vector =
4093                 container_of(notify, struct i40e_q_vector, affinity_notify);
4094
4095         cpumask_copy(&q_vector->affinity_mask, mask);
4096 }
4097
4098 /**
4099  * i40e_irq_affinity_release - Callback for affinity notifier release
4100  * @ref: internal core kernel usage
4101  *
4102  * This is a callback function used by the irq_set_affinity_notifier function
4103  * to inform the current notification subscriber that they will no longer
4104  * receive notifications.
4105  **/
4106 static void i40e_irq_affinity_release(struct kref *ref) {}
4107
4108 /**
4109  * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
4110  * @vsi: the VSI being configured
4111  * @basename: name for the vector
4112  *
4113  * Allocates MSI-X vectors and requests interrupts from the kernel.
4114  **/
4115 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
4116 {
4117         int q_vectors = vsi->num_q_vectors;
4118         struct i40e_pf *pf = vsi->back;
4119         int base = vsi->base_vector;
4120         int rx_int_idx = 0;
4121         int tx_int_idx = 0;
4122         int vector, err;
4123         int irq_num;
4124         int cpu;
4125
4126         for (vector = 0; vector < q_vectors; vector++) {
4127                 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
4128
4129                 irq_num = pf->msix_entries[base + vector].vector;
4130
4131                 if (q_vector->tx.ring && q_vector->rx.ring) {
4132                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4133                                  "%s-%s-%d", basename, "TxRx", rx_int_idx++);
4134                         tx_int_idx++;
4135                 } else if (q_vector->rx.ring) {
4136                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4137                                  "%s-%s-%d", basename, "rx", rx_int_idx++);
4138                 } else if (q_vector->tx.ring) {
4139                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4140                                  "%s-%s-%d", basename, "tx", tx_int_idx++);
4141                 } else {
4142                         /* skip this unused q_vector */
4143                         continue;
4144                 }
4145                 err = request_irq(irq_num,
4146                                   vsi->irq_handler,
4147                                   0,
4148                                   q_vector->name,
4149                                   q_vector);
4150                 if (err) {
4151                         dev_info(&pf->pdev->dev,
4152                                  "MSIX request_irq failed, error: %d\n", err);
4153                         goto free_queue_irqs;
4154                 }
4155
4156                 /* register for affinity change notifications */
4157                 q_vector->irq_num = irq_num;
4158                 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4159                 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4160                 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4161                 /* Spread affinity hints out across online CPUs.
4162                  *
4163                  * get_cpu_mask returns a static constant mask with
4164                  * a permanent lifetime so it's ok to pass to
4165                  * irq_update_affinity_hint without making a copy.
4166                  */
4167                 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4168                 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4169         }
4170
4171         vsi->irqs_ready = true;
4172         return 0;
4173
4174 free_queue_irqs:
4175         while (vector) {
4176                 vector--;
4177                 irq_num = pf->msix_entries[base + vector].vector;
4178                 irq_set_affinity_notifier(irq_num, NULL);
4179                 irq_update_affinity_hint(irq_num, NULL);
4180                 free_irq(irq_num, &vsi->q_vectors[vector]);
4181         }
4182         return err;
4183 }
4184
4185 /**
4186  * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4187  * @vsi: the VSI being un-configured
4188  **/
4189 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4190 {
4191         struct i40e_pf *pf = vsi->back;
4192         struct i40e_hw *hw = &pf->hw;
4193         int base = vsi->base_vector;
4194         int i;
4195
4196         /* disable interrupt causation from each queue */
4197         for (i = 0; i < vsi->num_queue_pairs; i++) {
4198                 u32 val;
4199
4200                 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4201                 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4202                 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4203
4204                 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4205                 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4206                 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4207
4208                 if (!i40e_enabled_xdp_vsi(vsi))
4209                         continue;
4210                 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4211         }
4212
4213         /* disable each interrupt */
4214         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4215                 for (i = vsi->base_vector;
4216                      i < (vsi->num_q_vectors + vsi->base_vector); i++)
4217                         wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4218
4219                 i40e_flush(hw);
4220                 for (i = 0; i < vsi->num_q_vectors; i++)
4221                         synchronize_irq(pf->msix_entries[i + base].vector);
4222         } else {
4223                 /* Legacy and MSI mode - this stops all interrupt handling */
4224                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4225                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4226                 i40e_flush(hw);
4227                 synchronize_irq(pf->pdev->irq);
4228         }
4229 }
4230
4231 /**
4232  * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4233  * @vsi: the VSI being configured
4234  **/
4235 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4236 {
4237         struct i40e_pf *pf = vsi->back;
4238         int i;
4239
4240         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4241                 for (i = 0; i < vsi->num_q_vectors; i++)
4242                         i40e_irq_dynamic_enable(vsi, i);
4243         } else {
4244                 i40e_irq_dynamic_enable_icr0(pf);
4245         }
4246
4247         i40e_flush(&pf->hw);
4248         return 0;
4249 }
4250
4251 /**
4252  * i40e_free_misc_vector - Free the vector that handles non-queue events
4253  * @pf: board private structure
4254  **/
4255 static void i40e_free_misc_vector(struct i40e_pf *pf)
4256 {
4257         /* Disable ICR 0 */
4258         wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4259         i40e_flush(&pf->hw);
4260
4261         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags) && pf->msix_entries) {
4262                 free_irq(pf->msix_entries[0].vector, pf);
4263                 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4264         }
4265 }
4266
4267 /**
4268  * i40e_intr - MSI/Legacy and non-queue interrupt handler
4269  * @irq: interrupt number
4270  * @data: pointer to a q_vector
4271  *
4272  * This is the handler used for all MSI/Legacy interrupts, and deals
4273  * with both queue and non-queue interrupts.  This is also used in
4274  * MSIX mode to handle the non-queue interrupts.
4275  **/
4276 static irqreturn_t i40e_intr(int irq, void *data)
4277 {
4278         struct i40e_pf *pf = (struct i40e_pf *)data;
4279         struct i40e_hw *hw = &pf->hw;
4280         irqreturn_t ret = IRQ_NONE;
4281         u32 icr0, icr0_remaining;
4282         u32 val, ena_mask;
4283
4284         icr0 = rd32(hw, I40E_PFINT_ICR0);
4285         ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4286
4287         /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4288         if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4289                 goto enable_intr;
4290
4291         /* if interrupt but no bits showing, must be SWINT */
4292         if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4293             (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4294                 pf->sw_int_count++;
4295
4296         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags) &&
4297             (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4298                 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4299                 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4300                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4301         }
4302
4303         /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4304         if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4305                 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4306                 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4307
4308                 /* We do not have a way to disarm Queue causes while leaving
4309                  * interrupt enabled for all other causes, ideally
4310                  * interrupt should be disabled while we are in NAPI but
4311                  * this is not a performance path and napi_schedule()
4312                  * can deal with rescheduling.
4313                  */
4314                 if (!test_bit(__I40E_DOWN, pf->state))
4315                         napi_schedule_irqoff(&q_vector->napi);
4316         }
4317
4318         if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4319                 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4320                 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4321                 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4322         }
4323
4324         if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4325                 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4326                 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4327         }
4328
4329         if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4330                 /* disable any further VFLR event notifications */
4331                 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4332                         u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4333
4334                         reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4335                         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4336                 } else {
4337                         ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4338                         set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4339                 }
4340         }
4341
4342         if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4343                 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4344                         set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4345                 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4346                 val = rd32(hw, I40E_GLGEN_RSTAT);
4347                 val = FIELD_GET(I40E_GLGEN_RSTAT_RESET_TYPE_MASK, val);
4348                 if (val == I40E_RESET_CORER) {
4349                         pf->corer_count++;
4350                 } else if (val == I40E_RESET_GLOBR) {
4351                         pf->globr_count++;
4352                 } else if (val == I40E_RESET_EMPR) {
4353                         pf->empr_count++;
4354                         set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4355                 }
4356         }
4357
4358         if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4359                 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4360                 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4361                 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4362                          rd32(hw, I40E_PFHMC_ERRORINFO),
4363                          rd32(hw, I40E_PFHMC_ERRORDATA));
4364         }
4365
4366         if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4367                 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4368
4369                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4370                         schedule_work(&pf->ptp_extts0_work);
4371
4372                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4373                         i40e_ptp_tx_hwtstamp(pf);
4374
4375                 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4376         }
4377
4378         /* If a critical error is pending we have no choice but to reset the
4379          * device.
4380          * Report and mask out any remaining unexpected interrupts.
4381          */
4382         icr0_remaining = icr0 & ena_mask;
4383         if (icr0_remaining) {
4384                 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4385                          icr0_remaining);
4386                 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4387                     (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4388                     (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4389                         dev_info(&pf->pdev->dev, "device will be reset\n");
4390                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4391                         i40e_service_event_schedule(pf);
4392                 }
4393                 ena_mask &= ~icr0_remaining;
4394         }
4395         ret = IRQ_HANDLED;
4396
4397 enable_intr:
4398         /* re-enable interrupt causes */
4399         wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4400         if (!test_bit(__I40E_DOWN, pf->state) ||
4401             test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4402                 i40e_service_event_schedule(pf);
4403                 i40e_irq_dynamic_enable_icr0(pf);
4404         }
4405
4406         return ret;
4407 }
4408
4409 /**
4410  * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4411  * @tx_ring:  tx ring to clean
4412  * @budget:   how many cleans we're allowed
4413  *
4414  * Returns true if there's any budget left (e.g. the clean is finished)
4415  **/
4416 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4417 {
4418         struct i40e_vsi *vsi = tx_ring->vsi;
4419         u16 i = tx_ring->next_to_clean;
4420         struct i40e_tx_buffer *tx_buf;
4421         struct i40e_tx_desc *tx_desc;
4422
4423         tx_buf = &tx_ring->tx_bi[i];
4424         tx_desc = I40E_TX_DESC(tx_ring, i);
4425         i -= tx_ring->count;
4426
4427         do {
4428                 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4429
4430                 /* if next_to_watch is not set then there is no work pending */
4431                 if (!eop_desc)
4432                         break;
4433
4434                 /* prevent any other reads prior to eop_desc */
4435                 smp_rmb();
4436
4437                 /* if the descriptor isn't done, no work yet to do */
4438                 if (!(eop_desc->cmd_type_offset_bsz &
4439                       cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4440                         break;
4441
4442                 /* clear next_to_watch to prevent false hangs */
4443                 tx_buf->next_to_watch = NULL;
4444
4445                 tx_desc->buffer_addr = 0;
4446                 tx_desc->cmd_type_offset_bsz = 0;
4447                 /* move past filter desc */
4448                 tx_buf++;
4449                 tx_desc++;
4450                 i++;
4451                 if (unlikely(!i)) {
4452                         i -= tx_ring->count;
4453                         tx_buf = tx_ring->tx_bi;
4454                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4455                 }
4456                 /* unmap skb header data */
4457                 dma_unmap_single(tx_ring->dev,
4458                                  dma_unmap_addr(tx_buf, dma),
4459                                  dma_unmap_len(tx_buf, len),
4460                                  DMA_TO_DEVICE);
4461                 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4462                         kfree(tx_buf->raw_buf);
4463
4464                 tx_buf->raw_buf = NULL;
4465                 tx_buf->tx_flags = 0;
4466                 tx_buf->next_to_watch = NULL;
4467                 dma_unmap_len_set(tx_buf, len, 0);
4468                 tx_desc->buffer_addr = 0;
4469                 tx_desc->cmd_type_offset_bsz = 0;
4470
4471                 /* move us past the eop_desc for start of next FD desc */
4472                 tx_buf++;
4473                 tx_desc++;
4474                 i++;
4475                 if (unlikely(!i)) {
4476                         i -= tx_ring->count;
4477                         tx_buf = tx_ring->tx_bi;
4478                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4479                 }
4480
4481                 /* update budget accounting */
4482                 budget--;
4483         } while (likely(budget));
4484
4485         i += tx_ring->count;
4486         tx_ring->next_to_clean = i;
4487
4488         if (test_bit(I40E_FLAG_MSIX_ENA, vsi->back->flags))
4489                 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4490
4491         return budget > 0;
4492 }
4493
4494 /**
4495  * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4496  * @irq: interrupt number
4497  * @data: pointer to a q_vector
4498  **/
4499 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4500 {
4501         struct i40e_q_vector *q_vector = data;
4502         struct i40e_vsi *vsi;
4503
4504         if (!q_vector->tx.ring)
4505                 return IRQ_HANDLED;
4506
4507         vsi = q_vector->tx.ring->vsi;
4508         i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4509
4510         return IRQ_HANDLED;
4511 }
4512
4513 /**
4514  * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4515  * @vsi: the VSI being configured
4516  * @v_idx: vector index
4517  * @qp_idx: queue pair index
4518  **/
4519 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4520 {
4521         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4522         struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4523         struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4524
4525         tx_ring->q_vector = q_vector;
4526         tx_ring->next = q_vector->tx.ring;
4527         q_vector->tx.ring = tx_ring;
4528         q_vector->tx.count++;
4529
4530         /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4531         if (i40e_enabled_xdp_vsi(vsi)) {
4532                 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4533
4534                 xdp_ring->q_vector = q_vector;
4535                 xdp_ring->next = q_vector->tx.ring;
4536                 q_vector->tx.ring = xdp_ring;
4537                 q_vector->tx.count++;
4538         }
4539
4540         rx_ring->q_vector = q_vector;
4541         rx_ring->next = q_vector->rx.ring;
4542         q_vector->rx.ring = rx_ring;
4543         q_vector->rx.count++;
4544 }
4545
4546 /**
4547  * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4548  * @vsi: the VSI being configured
4549  *
4550  * This function maps descriptor rings to the queue-specific vectors
4551  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
4552  * one vector per queue pair, but on a constrained vector budget, we
4553  * group the queue pairs as "efficiently" as possible.
4554  **/
4555 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4556 {
4557         int qp_remaining = vsi->num_queue_pairs;
4558         int q_vectors = vsi->num_q_vectors;
4559         int num_ringpairs;
4560         int v_start = 0;
4561         int qp_idx = 0;
4562
4563         /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4564          * group them so there are multiple queues per vector.
4565          * It is also important to go through all the vectors available to be
4566          * sure that if we don't use all the vectors, that the remaining vectors
4567          * are cleared. This is especially important when decreasing the
4568          * number of queues in use.
4569          */
4570         for (; v_start < q_vectors; v_start++) {
4571                 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4572
4573                 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4574
4575                 q_vector->num_ringpairs = num_ringpairs;
4576                 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4577
4578                 q_vector->rx.count = 0;
4579                 q_vector->tx.count = 0;
4580                 q_vector->rx.ring = NULL;
4581                 q_vector->tx.ring = NULL;
4582
4583                 while (num_ringpairs--) {
4584                         i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4585                         qp_idx++;
4586                         qp_remaining--;
4587                 }
4588         }
4589 }
4590
4591 /**
4592  * i40e_vsi_request_irq - Request IRQ from the OS
4593  * @vsi: the VSI being configured
4594  * @basename: name for the vector
4595  **/
4596 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4597 {
4598         struct i40e_pf *pf = vsi->back;
4599         int err;
4600
4601         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
4602                 err = i40e_vsi_request_irq_msix(vsi, basename);
4603         else if (test_bit(I40E_FLAG_MSI_ENA, pf->flags))
4604                 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4605                                   pf->int_name, pf);
4606         else
4607                 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4608                                   pf->int_name, pf);
4609
4610         if (err)
4611                 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4612
4613         return err;
4614 }
4615
4616 #ifdef CONFIG_NET_POLL_CONTROLLER
4617 /**
4618  * i40e_netpoll - A Polling 'interrupt' handler
4619  * @netdev: network interface device structure
4620  *
4621  * This is used by netconsole to send skbs without having to re-enable
4622  * interrupts.  It's not called while the normal interrupt routine is executing.
4623  **/
4624 static void i40e_netpoll(struct net_device *netdev)
4625 {
4626         struct i40e_netdev_priv *np = netdev_priv(netdev);
4627         struct i40e_vsi *vsi = np->vsi;
4628         struct i40e_pf *pf = vsi->back;
4629         int i;
4630
4631         /* if interface is down do nothing */
4632         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4633                 return;
4634
4635         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4636                 for (i = 0; i < vsi->num_q_vectors; i++)
4637                         i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4638         } else {
4639                 i40e_intr(pf->pdev->irq, netdev);
4640         }
4641 }
4642 #endif
4643
4644 #define I40E_QTX_ENA_WAIT_COUNT 50
4645
4646 /**
4647  * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4648  * @pf: the PF being configured
4649  * @pf_q: the PF queue
4650  * @enable: enable or disable state of the queue
4651  *
4652  * This routine will wait for the given Tx queue of the PF to reach the
4653  * enabled or disabled state.
4654  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4655  * multiple retries; else will return 0 in case of success.
4656  **/
4657 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4658 {
4659         int i;
4660         u32 tx_reg;
4661
4662         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4663                 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4664                 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4665                         break;
4666
4667                 usleep_range(10, 20);
4668         }
4669         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4670                 return -ETIMEDOUT;
4671
4672         return 0;
4673 }
4674
4675 /**
4676  * i40e_control_tx_q - Start or stop a particular Tx queue
4677  * @pf: the PF structure
4678  * @pf_q: the PF queue to configure
4679  * @enable: start or stop the queue
4680  *
4681  * This function enables or disables a single queue. Note that any delay
4682  * required after the operation is expected to be handled by the caller of
4683  * this function.
4684  **/
4685 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4686 {
4687         struct i40e_hw *hw = &pf->hw;
4688         u32 tx_reg;
4689         int i;
4690
4691         /* warn the TX unit of coming changes */
4692         i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4693         if (!enable)
4694                 usleep_range(10, 20);
4695
4696         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4697                 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4698                 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4699                     ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4700                         break;
4701                 usleep_range(1000, 2000);
4702         }
4703
4704         /* Skip if the queue is already in the requested state */
4705         if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4706                 return;
4707
4708         /* turn on/off the queue */
4709         if (enable) {
4710                 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4711                 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4712         } else {
4713                 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4714         }
4715
4716         wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4717 }
4718
4719 /**
4720  * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4721  * @seid: VSI SEID
4722  * @pf: the PF structure
4723  * @pf_q: the PF queue to configure
4724  * @is_xdp: true if the queue is used for XDP
4725  * @enable: start or stop the queue
4726  **/
4727 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4728                            bool is_xdp, bool enable)
4729 {
4730         int ret;
4731
4732         i40e_control_tx_q(pf, pf_q, enable);
4733
4734         /* wait for the change to finish */
4735         ret = i40e_pf_txq_wait(pf, pf_q, enable);
4736         if (ret) {
4737                 dev_info(&pf->pdev->dev,
4738                          "VSI seid %d %sTx ring %d %sable timeout\n",
4739                          seid, (is_xdp ? "XDP " : ""), pf_q,
4740                          (enable ? "en" : "dis"));
4741         }
4742
4743         return ret;
4744 }
4745
4746 /**
4747  * i40e_vsi_enable_tx - Start a VSI's rings
4748  * @vsi: the VSI being configured
4749  **/
4750 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4751 {
4752         struct i40e_pf *pf = vsi->back;
4753         int i, pf_q, ret = 0;
4754
4755         pf_q = vsi->base_queue;
4756         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4757                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4758                                              pf_q,
4759                                              false /*is xdp*/, true);
4760                 if (ret)
4761                         break;
4762
4763                 if (!i40e_enabled_xdp_vsi(vsi))
4764                         continue;
4765
4766                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4767                                              pf_q + vsi->alloc_queue_pairs,
4768                                              true /*is xdp*/, true);
4769                 if (ret)
4770                         break;
4771         }
4772         return ret;
4773 }
4774
4775 /**
4776  * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4777  * @pf: the PF being configured
4778  * @pf_q: the PF queue
4779  * @enable: enable or disable state of the queue
4780  *
4781  * This routine will wait for the given Rx queue of the PF to reach the
4782  * enabled or disabled state.
4783  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4784  * multiple retries; else will return 0 in case of success.
4785  **/
4786 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4787 {
4788         int i;
4789         u32 rx_reg;
4790
4791         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4792                 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4793                 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4794                         break;
4795
4796                 usleep_range(10, 20);
4797         }
4798         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4799                 return -ETIMEDOUT;
4800
4801         return 0;
4802 }
4803
4804 /**
4805  * i40e_control_rx_q - Start or stop a particular Rx queue
4806  * @pf: the PF structure
4807  * @pf_q: the PF queue to configure
4808  * @enable: start or stop the queue
4809  *
4810  * This function enables or disables a single queue. Note that
4811  * any delay required after the operation is expected to be
4812  * handled by the caller of this function.
4813  **/
4814 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4815 {
4816         struct i40e_hw *hw = &pf->hw;
4817         u32 rx_reg;
4818         int i;
4819
4820         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4821                 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4822                 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4823                     ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4824                         break;
4825                 usleep_range(1000, 2000);
4826         }
4827
4828         /* Skip if the queue is already in the requested state */
4829         if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4830                 return;
4831
4832         /* turn on/off the queue */
4833         if (enable)
4834                 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4835         else
4836                 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4837
4838         wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4839 }
4840
4841 /**
4842  * i40e_control_wait_rx_q
4843  * @pf: the PF structure
4844  * @pf_q: queue being configured
4845  * @enable: start or stop the rings
4846  *
4847  * This function enables or disables a single queue along with waiting
4848  * for the change to finish. The caller of this function should handle
4849  * the delays needed in the case of disabling queues.
4850  **/
4851 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4852 {
4853         int ret = 0;
4854
4855         i40e_control_rx_q(pf, pf_q, enable);
4856
4857         /* wait for the change to finish */
4858         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4859         if (ret)
4860                 return ret;
4861
4862         return ret;
4863 }
4864
4865 /**
4866  * i40e_vsi_enable_rx - Start a VSI's rings
4867  * @vsi: the VSI being configured
4868  **/
4869 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4870 {
4871         struct i40e_pf *pf = vsi->back;
4872         int i, pf_q, ret = 0;
4873
4874         pf_q = vsi->base_queue;
4875         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4876                 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4877                 if (ret) {
4878                         dev_info(&pf->pdev->dev,
4879                                  "VSI seid %d Rx ring %d enable timeout\n",
4880                                  vsi->seid, pf_q);
4881                         break;
4882                 }
4883         }
4884
4885         return ret;
4886 }
4887
4888 /**
4889  * i40e_vsi_start_rings - Start a VSI's rings
4890  * @vsi: the VSI being configured
4891  **/
4892 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4893 {
4894         int ret = 0;
4895
4896         /* do rx first for enable and last for disable */
4897         ret = i40e_vsi_enable_rx(vsi);
4898         if (ret)
4899                 return ret;
4900         ret = i40e_vsi_enable_tx(vsi);
4901
4902         return ret;
4903 }
4904
4905 #define I40E_DISABLE_TX_GAP_MSEC        50
4906
4907 /**
4908  * i40e_vsi_stop_rings - Stop a VSI's rings
4909  * @vsi: the VSI being configured
4910  **/
4911 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4912 {
4913         struct i40e_pf *pf = vsi->back;
4914         int pf_q, err, q_end;
4915
4916         /* When port TX is suspended, don't wait */
4917         if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4918                 return i40e_vsi_stop_rings_no_wait(vsi);
4919
4920         q_end = vsi->base_queue + vsi->num_queue_pairs;
4921         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4922                 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4923
4924         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4925                 err = i40e_control_wait_rx_q(pf, pf_q, false);
4926                 if (err)
4927                         dev_info(&pf->pdev->dev,
4928                                  "VSI seid %d Rx ring %d disable timeout\n",
4929                                  vsi->seid, pf_q);
4930         }
4931
4932         msleep(I40E_DISABLE_TX_GAP_MSEC);
4933         pf_q = vsi->base_queue;
4934         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4935                 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4936
4937         i40e_vsi_wait_queues_disabled(vsi);
4938 }
4939
4940 /**
4941  * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4942  * @vsi: the VSI being shutdown
4943  *
4944  * This function stops all the rings for a VSI but does not delay to verify
4945  * that rings have been disabled. It is expected that the caller is shutting
4946  * down multiple VSIs at once and will delay together for all the VSIs after
4947  * initiating the shutdown. This is particularly useful for shutting down lots
4948  * of VFs together. Otherwise, a large delay can be incurred while configuring
4949  * each VSI in serial.
4950  **/
4951 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4952 {
4953         struct i40e_pf *pf = vsi->back;
4954         int i, pf_q;
4955
4956         pf_q = vsi->base_queue;
4957         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4958                 i40e_control_tx_q(pf, pf_q, false);
4959                 i40e_control_rx_q(pf, pf_q, false);
4960         }
4961 }
4962
4963 /**
4964  * i40e_vsi_free_irq - Free the irq association with the OS
4965  * @vsi: the VSI being configured
4966  **/
4967 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4968 {
4969         struct i40e_pf *pf = vsi->back;
4970         struct i40e_hw *hw = &pf->hw;
4971         int base = vsi->base_vector;
4972         u32 val, qp;
4973         int i;
4974
4975         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
4976                 if (!vsi->q_vectors)
4977                         return;
4978
4979                 if (!vsi->irqs_ready)
4980                         return;
4981
4982                 vsi->irqs_ready = false;
4983                 for (i = 0; i < vsi->num_q_vectors; i++) {
4984                         int irq_num;
4985                         u16 vector;
4986
4987                         vector = i + base;
4988                         irq_num = pf->msix_entries[vector].vector;
4989
4990                         /* free only the irqs that were actually requested */
4991                         if (!vsi->q_vectors[i] ||
4992                             !vsi->q_vectors[i]->num_ringpairs)
4993                                 continue;
4994
4995                         /* clear the affinity notifier in the IRQ descriptor */
4996                         irq_set_affinity_notifier(irq_num, NULL);
4997                         /* remove our suggested affinity mask for this IRQ */
4998                         irq_update_affinity_hint(irq_num, NULL);
4999                         free_irq(irq_num, vsi->q_vectors[i]);
5000
5001                         /* Tear down the interrupt queue link list
5002                          *
5003                          * We know that they come in pairs and always
5004                          * the Rx first, then the Tx.  To clear the
5005                          * link list, stick the EOL value into the
5006                          * next_q field of the registers.
5007                          */
5008                         val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
5009                         qp = FIELD_GET(I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK,
5010                                        val);
5011                         val |= I40E_QUEUE_END_OF_LIST
5012                                 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5013                         wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
5014
5015                         while (qp != I40E_QUEUE_END_OF_LIST) {
5016                                 u32 next;
5017
5018                                 val = rd32(hw, I40E_QINT_RQCTL(qp));
5019
5020                                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
5021                                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5022                                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
5023                                          I40E_QINT_RQCTL_INTEVENT_MASK);
5024
5025                                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5026                                          I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5027
5028                                 wr32(hw, I40E_QINT_RQCTL(qp), val);
5029
5030                                 val = rd32(hw, I40E_QINT_TQCTL(qp));
5031
5032                                 next = FIELD_GET(I40E_QINT_TQCTL_NEXTQ_INDX_MASK,
5033                                                  val);
5034
5035                                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
5036                                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5037                                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
5038                                          I40E_QINT_TQCTL_INTEVENT_MASK);
5039
5040                                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5041                                          I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5042
5043                                 wr32(hw, I40E_QINT_TQCTL(qp), val);
5044                                 qp = next;
5045                         }
5046                 }
5047         } else {
5048                 free_irq(pf->pdev->irq, pf);
5049
5050                 val = rd32(hw, I40E_PFINT_LNKLST0);
5051                 qp = FIELD_GET(I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK, val);
5052                 val |= I40E_QUEUE_END_OF_LIST
5053                         << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
5054                 wr32(hw, I40E_PFINT_LNKLST0, val);
5055
5056                 val = rd32(hw, I40E_QINT_RQCTL(qp));
5057                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
5058                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5059                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
5060                          I40E_QINT_RQCTL_INTEVENT_MASK);
5061
5062                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5063                         I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5064
5065                 wr32(hw, I40E_QINT_RQCTL(qp), val);
5066
5067                 val = rd32(hw, I40E_QINT_TQCTL(qp));
5068
5069                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
5070                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5071                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
5072                          I40E_QINT_TQCTL_INTEVENT_MASK);
5073
5074                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5075                         I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5076
5077                 wr32(hw, I40E_QINT_TQCTL(qp), val);
5078         }
5079 }
5080
5081 /**
5082  * i40e_free_q_vector - Free memory allocated for specific interrupt vector
5083  * @vsi: the VSI being configured
5084  * @v_idx: Index of vector to be freed
5085  *
5086  * This function frees the memory allocated to the q_vector.  In addition if
5087  * NAPI is enabled it will delete any references to the NAPI struct prior
5088  * to freeing the q_vector.
5089  **/
5090 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
5091 {
5092         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
5093         struct i40e_ring *ring;
5094
5095         if (!q_vector)
5096                 return;
5097
5098         /* disassociate q_vector from rings */
5099         i40e_for_each_ring(ring, q_vector->tx)
5100                 ring->q_vector = NULL;
5101
5102         i40e_for_each_ring(ring, q_vector->rx)
5103                 ring->q_vector = NULL;
5104
5105         /* only VSI w/ an associated netdev is set up w/ NAPI */
5106         if (vsi->netdev)
5107                 netif_napi_del(&q_vector->napi);
5108
5109         vsi->q_vectors[v_idx] = NULL;
5110
5111         kfree_rcu(q_vector, rcu);
5112 }
5113
5114 /**
5115  * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
5116  * @vsi: the VSI being un-configured
5117  *
5118  * This frees the memory allocated to the q_vectors and
5119  * deletes references to the NAPI struct.
5120  **/
5121 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
5122 {
5123         int v_idx;
5124
5125         for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
5126                 i40e_free_q_vector(vsi, v_idx);
5127 }
5128
5129 /**
5130  * i40e_reset_interrupt_capability - Disable interrupt setup in OS
5131  * @pf: board private structure
5132  **/
5133 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
5134 {
5135         /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
5136         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
5137                 pci_disable_msix(pf->pdev);
5138                 kfree(pf->msix_entries);
5139                 pf->msix_entries = NULL;
5140                 kfree(pf->irq_pile);
5141                 pf->irq_pile = NULL;
5142         } else if (test_bit(I40E_FLAG_MSI_ENA, pf->flags)) {
5143                 pci_disable_msi(pf->pdev);
5144         }
5145         clear_bit(I40E_FLAG_MSI_ENA, pf->flags);
5146         clear_bit(I40E_FLAG_MSIX_ENA, pf->flags);
5147 }
5148
5149 /**
5150  * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5151  * @pf: board private structure
5152  *
5153  * We go through and clear interrupt specific resources and reset the structure
5154  * to pre-load conditions
5155  **/
5156 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5157 {
5158         int i;
5159
5160         if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5161                 i40e_free_misc_vector(pf);
5162
5163         i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5164                       I40E_IWARP_IRQ_PILE_ID);
5165
5166         i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5167         for (i = 0; i < pf->num_alloc_vsi; i++)
5168                 if (pf->vsi[i])
5169                         i40e_vsi_free_q_vectors(pf->vsi[i]);
5170         i40e_reset_interrupt_capability(pf);
5171 }
5172
5173 /**
5174  * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5175  * @vsi: the VSI being configured
5176  **/
5177 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5178 {
5179         int q_idx;
5180
5181         if (!vsi->netdev)
5182                 return;
5183
5184         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5185                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5186
5187                 if (q_vector->rx.ring || q_vector->tx.ring)
5188                         napi_enable(&q_vector->napi);
5189         }
5190 }
5191
5192 /**
5193  * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5194  * @vsi: the VSI being configured
5195  **/
5196 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5197 {
5198         int q_idx;
5199
5200         if (!vsi->netdev)
5201                 return;
5202
5203         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5204                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5205
5206                 if (q_vector->rx.ring || q_vector->tx.ring)
5207                         napi_disable(&q_vector->napi);
5208         }
5209 }
5210
5211 /**
5212  * i40e_vsi_close - Shut down a VSI
5213  * @vsi: the vsi to be quelled
5214  **/
5215 static void i40e_vsi_close(struct i40e_vsi *vsi)
5216 {
5217         struct i40e_pf *pf = vsi->back;
5218         if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5219                 i40e_down(vsi);
5220         i40e_vsi_free_irq(vsi);
5221         i40e_vsi_free_tx_resources(vsi);
5222         i40e_vsi_free_rx_resources(vsi);
5223         vsi->current_netdev_flags = 0;
5224         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5225         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5226                 set_bit(__I40E_CLIENT_RESET, pf->state);
5227 }
5228
5229 /**
5230  * i40e_quiesce_vsi - Pause a given VSI
5231  * @vsi: the VSI being paused
5232  **/
5233 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5234 {
5235         if (test_bit(__I40E_VSI_DOWN, vsi->state))
5236                 return;
5237
5238         set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5239         if (vsi->netdev && netif_running(vsi->netdev))
5240                 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5241         else
5242                 i40e_vsi_close(vsi);
5243 }
5244
5245 /**
5246  * i40e_unquiesce_vsi - Resume a given VSI
5247  * @vsi: the VSI being resumed
5248  **/
5249 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5250 {
5251         if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5252                 return;
5253
5254         if (vsi->netdev && netif_running(vsi->netdev))
5255                 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5256         else
5257                 i40e_vsi_open(vsi);   /* this clears the DOWN bit */
5258 }
5259
5260 /**
5261  * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5262  * @pf: the PF
5263  **/
5264 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5265 {
5266         int v;
5267
5268         for (v = 0; v < pf->num_alloc_vsi; v++) {
5269                 if (pf->vsi[v])
5270                         i40e_quiesce_vsi(pf->vsi[v]);
5271         }
5272 }
5273
5274 /**
5275  * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5276  * @pf: the PF
5277  **/
5278 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5279 {
5280         int v;
5281
5282         for (v = 0; v < pf->num_alloc_vsi; v++) {
5283                 if (pf->vsi[v])
5284                         i40e_unquiesce_vsi(pf->vsi[v]);
5285         }
5286 }
5287
5288 /**
5289  * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5290  * @vsi: the VSI being configured
5291  *
5292  * Wait until all queues on a given VSI have been disabled.
5293  **/
5294 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5295 {
5296         struct i40e_pf *pf = vsi->back;
5297         int i, pf_q, ret;
5298
5299         pf_q = vsi->base_queue;
5300         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5301                 /* Check and wait for the Tx queue */
5302                 ret = i40e_pf_txq_wait(pf, pf_q, false);
5303                 if (ret) {
5304                         dev_info(&pf->pdev->dev,
5305                                  "VSI seid %d Tx ring %d disable timeout\n",
5306                                  vsi->seid, pf_q);
5307                         return ret;
5308                 }
5309
5310                 if (!i40e_enabled_xdp_vsi(vsi))
5311                         goto wait_rx;
5312
5313                 /* Check and wait for the XDP Tx queue */
5314                 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5315                                        false);
5316                 if (ret) {
5317                         dev_info(&pf->pdev->dev,
5318                                  "VSI seid %d XDP Tx ring %d disable timeout\n",
5319                                  vsi->seid, pf_q);
5320                         return ret;
5321                 }
5322 wait_rx:
5323                 /* Check and wait for the Rx queue */
5324                 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5325                 if (ret) {
5326                         dev_info(&pf->pdev->dev,
5327                                  "VSI seid %d Rx ring %d disable timeout\n",
5328                                  vsi->seid, pf_q);
5329                         return ret;
5330                 }
5331         }
5332
5333         return 0;
5334 }
5335
5336 #ifdef CONFIG_I40E_DCB
5337 /**
5338  * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5339  * @pf: the PF
5340  *
5341  * This function waits for the queues to be in disabled state for all the
5342  * VSIs that are managed by this PF.
5343  **/
5344 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5345 {
5346         int v, ret = 0;
5347
5348         for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5349                 if (pf->vsi[v]) {
5350                         ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5351                         if (ret)
5352                                 break;
5353                 }
5354         }
5355
5356         return ret;
5357 }
5358
5359 #endif
5360
5361 /**
5362  * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5363  * @pf: pointer to PF
5364  *
5365  * Get TC map for ISCSI PF type that will include iSCSI TC
5366  * and LAN TC.
5367  **/
5368 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5369 {
5370         struct i40e_dcb_app_priority_table app;
5371         struct i40e_hw *hw = &pf->hw;
5372         u8 enabled_tc = 1; /* TC0 is always enabled */
5373         u8 tc, i;
5374         /* Get the iSCSI APP TLV */
5375         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5376
5377         for (i = 0; i < dcbcfg->numapps; i++) {
5378                 app = dcbcfg->app[i];
5379                 if (app.selector == I40E_APP_SEL_TCPIP &&
5380                     app.protocolid == I40E_APP_PROTOID_ISCSI) {
5381                         tc = dcbcfg->etscfg.prioritytable[app.priority];
5382                         enabled_tc |= BIT(tc);
5383                         break;
5384                 }
5385         }
5386
5387         return enabled_tc;
5388 }
5389
5390 /**
5391  * i40e_dcb_get_num_tc -  Get the number of TCs from DCBx config
5392  * @dcbcfg: the corresponding DCBx configuration structure
5393  *
5394  * Return the number of TCs from given DCBx configuration
5395  **/
5396 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5397 {
5398         int i, tc_unused = 0;
5399         u8 num_tc = 0;
5400         u8 ret = 0;
5401
5402         /* Scan the ETS Config Priority Table to find
5403          * traffic class enabled for a given priority
5404          * and create a bitmask of enabled TCs
5405          */
5406         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5407                 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5408
5409         /* Now scan the bitmask to check for
5410          * contiguous TCs starting with TC0
5411          */
5412         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5413                 if (num_tc & BIT(i)) {
5414                         if (!tc_unused) {
5415                                 ret++;
5416                         } else {
5417                                 pr_err("Non-contiguous TC - Disabling DCB\n");
5418                                 return 1;
5419                         }
5420                 } else {
5421                         tc_unused = 1;
5422                 }
5423         }
5424
5425         /* There is always at least TC0 */
5426         if (!ret)
5427                 ret = 1;
5428
5429         return ret;
5430 }
5431
5432 /**
5433  * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5434  * @dcbcfg: the corresponding DCBx configuration structure
5435  *
5436  * Query the current DCB configuration and return the number of
5437  * traffic classes enabled from the given DCBX config
5438  **/
5439 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5440 {
5441         u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5442         u8 enabled_tc = 1;
5443         u8 i;
5444
5445         for (i = 0; i < num_tc; i++)
5446                 enabled_tc |= BIT(i);
5447
5448         return enabled_tc;
5449 }
5450
5451 /**
5452  * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5453  * @pf: PF being queried
5454  *
5455  * Query the current MQPRIO configuration and return the number of
5456  * traffic classes enabled.
5457  **/
5458 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5459 {
5460         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5461         u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5462         u8 enabled_tc = 1, i;
5463
5464         for (i = 1; i < num_tc; i++)
5465                 enabled_tc |= BIT(i);
5466         return enabled_tc;
5467 }
5468
5469 /**
5470  * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5471  * @pf: PF being queried
5472  *
5473  * Return number of traffic classes enabled for the given PF
5474  **/
5475 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5476 {
5477         struct i40e_hw *hw = &pf->hw;
5478         u8 i, enabled_tc = 1;
5479         u8 num_tc = 0;
5480         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5481
5482         if (i40e_is_tc_mqprio_enabled(pf))
5483                 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5484
5485         /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5486         if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
5487                 return 1;
5488
5489         /* SFP mode will be enabled for all TCs on port */
5490         if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
5491                 return i40e_dcb_get_num_tc(dcbcfg);
5492
5493         /* MFP mode return count of enabled TCs for this PF */
5494         if (pf->hw.func_caps.iscsi)
5495                 enabled_tc =  i40e_get_iscsi_tc_map(pf);
5496         else
5497                 return 1; /* Only TC0 */
5498
5499         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5500                 if (enabled_tc & BIT(i))
5501                         num_tc++;
5502         }
5503         return num_tc;
5504 }
5505
5506 /**
5507  * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5508  * @pf: PF being queried
5509  *
5510  * Return a bitmap for enabled traffic classes for this PF.
5511  **/
5512 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5513 {
5514         if (i40e_is_tc_mqprio_enabled(pf))
5515                 return i40e_mqprio_get_enabled_tc(pf);
5516
5517         /* If neither MQPRIO nor DCB is enabled for this PF then just return
5518          * default TC
5519          */
5520         if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
5521                 return I40E_DEFAULT_TRAFFIC_CLASS;
5522
5523         /* SFP mode we want PF to be enabled for all TCs */
5524         if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
5525                 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5526
5527         /* MFP enabled and iSCSI PF type */
5528         if (pf->hw.func_caps.iscsi)
5529                 return i40e_get_iscsi_tc_map(pf);
5530         else
5531                 return I40E_DEFAULT_TRAFFIC_CLASS;
5532 }
5533
5534 /**
5535  * i40e_vsi_get_bw_info - Query VSI BW Information
5536  * @vsi: the VSI being queried
5537  *
5538  * Returns 0 on success, negative value on failure
5539  **/
5540 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5541 {
5542         struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5543         struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5544         struct i40e_pf *pf = vsi->back;
5545         struct i40e_hw *hw = &pf->hw;
5546         u32 tc_bw_max;
5547         int ret;
5548         int i;
5549
5550         /* Get the VSI level BW configuration */
5551         ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5552         if (ret) {
5553                 dev_info(&pf->pdev->dev,
5554                          "couldn't get PF vsi bw config, err %pe aq_err %s\n",
5555                          ERR_PTR(ret),
5556                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5557                 return -EINVAL;
5558         }
5559
5560         /* Get the VSI level BW configuration per TC */
5561         ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5562                                                NULL);
5563         if (ret) {
5564                 dev_info(&pf->pdev->dev,
5565                          "couldn't get PF vsi ets bw config, err %pe aq_err %s\n",
5566                          ERR_PTR(ret),
5567                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5568                 return -EINVAL;
5569         }
5570
5571         if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5572                 dev_info(&pf->pdev->dev,
5573                          "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5574                          bw_config.tc_valid_bits,
5575                          bw_ets_config.tc_valid_bits);
5576                 /* Still continuing */
5577         }
5578
5579         vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5580         vsi->bw_max_quanta = bw_config.max_bw;
5581         tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5582                     (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5583         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5584                 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5585                 vsi->bw_ets_limit_credits[i] =
5586                                         le16_to_cpu(bw_ets_config.credits[i]);
5587                 /* 3 bits out of 4 for each TC */
5588                 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5589         }
5590
5591         return 0;
5592 }
5593
5594 /**
5595  * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5596  * @vsi: the VSI being configured
5597  * @enabled_tc: TC bitmap
5598  * @bw_share: BW shared credits per TC
5599  *
5600  * Returns 0 on success, negative value on failure
5601  **/
5602 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5603                                        u8 *bw_share)
5604 {
5605         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5606         struct i40e_pf *pf = vsi->back;
5607         int ret;
5608         int i;
5609
5610         /* There is no need to reset BW when mqprio mode is on.  */
5611         if (i40e_is_tc_mqprio_enabled(pf))
5612                 return 0;
5613         if (!vsi->mqprio_qopt.qopt.hw && !test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
5614                 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5615                 if (ret)
5616                         dev_info(&pf->pdev->dev,
5617                                  "Failed to reset tx rate for vsi->seid %u\n",
5618                                  vsi->seid);
5619                 return ret;
5620         }
5621         memset(&bw_data, 0, sizeof(bw_data));
5622         bw_data.tc_valid_bits = enabled_tc;
5623         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5624                 bw_data.tc_bw_credits[i] = bw_share[i];
5625
5626         ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5627         if (ret) {
5628                 dev_info(&pf->pdev->dev,
5629                          "AQ command Config VSI BW allocation per TC failed = %d\n",
5630                          pf->hw.aq.asq_last_status);
5631                 return -EINVAL;
5632         }
5633
5634         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5635                 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5636
5637         return 0;
5638 }
5639
5640 /**
5641  * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5642  * @vsi: the VSI being configured
5643  * @enabled_tc: TC map to be enabled
5644  *
5645  **/
5646 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5647 {
5648         struct net_device *netdev = vsi->netdev;
5649         struct i40e_pf *pf = vsi->back;
5650         struct i40e_hw *hw = &pf->hw;
5651         u8 netdev_tc = 0;
5652         int i;
5653         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5654
5655         if (!netdev)
5656                 return;
5657
5658         if (!enabled_tc) {
5659                 netdev_reset_tc(netdev);
5660                 return;
5661         }
5662
5663         /* Set up actual enabled TCs on the VSI */
5664         if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5665                 return;
5666
5667         /* set per TC queues for the VSI */
5668         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5669                 /* Only set TC queues for enabled tcs
5670                  *
5671                  * e.g. For a VSI that has TC0 and TC3 enabled the
5672                  * enabled_tc bitmap would be 0x00001001; the driver
5673                  * will set the numtc for netdev as 2 that will be
5674                  * referenced by the netdev layer as TC 0 and 1.
5675                  */
5676                 if (vsi->tc_config.enabled_tc & BIT(i))
5677                         netdev_set_tc_queue(netdev,
5678                                         vsi->tc_config.tc_info[i].netdev_tc,
5679                                         vsi->tc_config.tc_info[i].qcount,
5680                                         vsi->tc_config.tc_info[i].qoffset);
5681         }
5682
5683         if (i40e_is_tc_mqprio_enabled(pf))
5684                 return;
5685
5686         /* Assign UP2TC map for the VSI */
5687         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5688                 /* Get the actual TC# for the UP */
5689                 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5690                 /* Get the mapped netdev TC# for the UP */
5691                 netdev_tc =  vsi->tc_config.tc_info[ets_tc].netdev_tc;
5692                 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5693         }
5694 }
5695
5696 /**
5697  * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5698  * @vsi: the VSI being configured
5699  * @ctxt: the ctxt buffer returned from AQ VSI update param command
5700  **/
5701 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5702                                       struct i40e_vsi_context *ctxt)
5703 {
5704         /* copy just the sections touched not the entire info
5705          * since not all sections are valid as returned by
5706          * update vsi params
5707          */
5708         vsi->info.mapping_flags = ctxt->info.mapping_flags;
5709         memcpy(&vsi->info.queue_mapping,
5710                &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5711         memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5712                sizeof(vsi->info.tc_mapping));
5713 }
5714
5715 /**
5716  * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5717  * @vsi: the VSI being reconfigured
5718  * @vsi_offset: offset from main VF VSI
5719  */
5720 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5721 {
5722         struct i40e_vsi_context ctxt = {};
5723         struct i40e_pf *pf;
5724         struct i40e_hw *hw;
5725         int ret;
5726
5727         if (!vsi)
5728                 return -EINVAL;
5729         pf = vsi->back;
5730         hw = &pf->hw;
5731
5732         ctxt.seid = vsi->seid;
5733         ctxt.pf_num = hw->pf_id;
5734         ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5735         ctxt.uplink_seid = vsi->uplink_seid;
5736         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5737         ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5738         ctxt.info = vsi->info;
5739
5740         i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5741                                  false);
5742         if (vsi->reconfig_rss) {
5743                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5744                                       vsi->num_queue_pairs);
5745                 ret = i40e_vsi_config_rss(vsi);
5746                 if (ret) {
5747                         dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5748                         return ret;
5749                 }
5750                 vsi->reconfig_rss = false;
5751         }
5752
5753         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5754         if (ret) {
5755                 dev_info(&pf->pdev->dev, "Update vsi config failed, err %pe aq_err %s\n",
5756                          ERR_PTR(ret),
5757                          i40e_aq_str(hw, hw->aq.asq_last_status));
5758                 return ret;
5759         }
5760         /* update the local VSI info with updated queue map */
5761         i40e_vsi_update_queue_map(vsi, &ctxt);
5762         vsi->info.valid_sections = 0;
5763
5764         return ret;
5765 }
5766
5767 /**
5768  * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5769  * @vsi: VSI to be configured
5770  * @enabled_tc: TC bitmap
5771  *
5772  * This configures a particular VSI for TCs that are mapped to the
5773  * given TC bitmap. It uses default bandwidth share for TCs across
5774  * VSIs to configure TC for a particular VSI.
5775  *
5776  * NOTE:
5777  * It is expected that the VSI queues have been quisced before calling
5778  * this function.
5779  **/
5780 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5781 {
5782         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5783         struct i40e_pf *pf = vsi->back;
5784         struct i40e_hw *hw = &pf->hw;
5785         struct i40e_vsi_context ctxt;
5786         int ret = 0;
5787         int i;
5788
5789         /* Check if enabled_tc is same as existing or new TCs */
5790         if (vsi->tc_config.enabled_tc == enabled_tc &&
5791             vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5792                 return ret;
5793
5794         /* Enable ETS TCs with equal BW Share for now across all VSIs */
5795         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5796                 if (enabled_tc & BIT(i))
5797                         bw_share[i] = 1;
5798         }
5799
5800         ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5801         if (ret) {
5802                 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5803
5804                 dev_info(&pf->pdev->dev,
5805                          "Failed configuring TC map %d for VSI %d\n",
5806                          enabled_tc, vsi->seid);
5807                 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5808                                                   &bw_config, NULL);
5809                 if (ret) {
5810                         dev_info(&pf->pdev->dev,
5811                                  "Failed querying vsi bw info, err %pe aq_err %s\n",
5812                                  ERR_PTR(ret),
5813                                  i40e_aq_str(hw, hw->aq.asq_last_status));
5814                         goto out;
5815                 }
5816                 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5817                         u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5818
5819                         if (!valid_tc)
5820                                 valid_tc = bw_config.tc_valid_bits;
5821                         /* Always enable TC0, no matter what */
5822                         valid_tc |= 1;
5823                         dev_info(&pf->pdev->dev,
5824                                  "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5825                                  enabled_tc, bw_config.tc_valid_bits, valid_tc);
5826                         enabled_tc = valid_tc;
5827                 }
5828
5829                 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5830                 if (ret) {
5831                         dev_err(&pf->pdev->dev,
5832                                 "Unable to  configure TC map %d for VSI %d\n",
5833                                 enabled_tc, vsi->seid);
5834                         goto out;
5835                 }
5836         }
5837
5838         /* Update Queue Pairs Mapping for currently enabled UPs */
5839         ctxt.seid = vsi->seid;
5840         ctxt.pf_num = vsi->back->hw.pf_id;
5841         ctxt.vf_num = 0;
5842         ctxt.uplink_seid = vsi->uplink_seid;
5843         ctxt.info = vsi->info;
5844         if (i40e_is_tc_mqprio_enabled(pf)) {
5845                 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5846                 if (ret)
5847                         goto out;
5848         } else {
5849                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5850         }
5851
5852         /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5853          * queues changed.
5854          */
5855         if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5856                 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5857                                       vsi->num_queue_pairs);
5858                 ret = i40e_vsi_config_rss(vsi);
5859                 if (ret) {
5860                         dev_info(&vsi->back->pdev->dev,
5861                                  "Failed to reconfig rss for num_queues\n");
5862                         return ret;
5863                 }
5864                 vsi->reconfig_rss = false;
5865         }
5866         if (test_bit(I40E_FLAG_IWARP_ENA, vsi->back->flags)) {
5867                 ctxt.info.valid_sections |=
5868                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5869                 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5870         }
5871
5872         /* Update the VSI after updating the VSI queue-mapping
5873          * information
5874          */
5875         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5876         if (ret) {
5877                 dev_info(&pf->pdev->dev,
5878                          "Update vsi tc config failed, err %pe aq_err %s\n",
5879                          ERR_PTR(ret),
5880                          i40e_aq_str(hw, hw->aq.asq_last_status));
5881                 goto out;
5882         }
5883         /* update the local VSI info with updated queue map */
5884         i40e_vsi_update_queue_map(vsi, &ctxt);
5885         vsi->info.valid_sections = 0;
5886
5887         /* Update current VSI BW information */
5888         ret = i40e_vsi_get_bw_info(vsi);
5889         if (ret) {
5890                 dev_info(&pf->pdev->dev,
5891                          "Failed updating vsi bw info, err %pe aq_err %s\n",
5892                          ERR_PTR(ret),
5893                          i40e_aq_str(hw, hw->aq.asq_last_status));
5894                 goto out;
5895         }
5896
5897         /* Update the netdev TC setup */
5898         i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5899 out:
5900         return ret;
5901 }
5902
5903 /**
5904  * i40e_get_link_speed - Returns link speed for the interface
5905  * @vsi: VSI to be configured
5906  *
5907  **/
5908 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5909 {
5910         struct i40e_pf *pf = vsi->back;
5911
5912         switch (pf->hw.phy.link_info.link_speed) {
5913         case I40E_LINK_SPEED_40GB:
5914                 return 40000;
5915         case I40E_LINK_SPEED_25GB:
5916                 return 25000;
5917         case I40E_LINK_SPEED_20GB:
5918                 return 20000;
5919         case I40E_LINK_SPEED_10GB:
5920                 return 10000;
5921         case I40E_LINK_SPEED_1GB:
5922                 return 1000;
5923         default:
5924                 return -EINVAL;
5925         }
5926 }
5927
5928 /**
5929  * i40e_bw_bytes_to_mbits - Convert max_tx_rate from bytes to mbits
5930  * @vsi: Pointer to vsi structure
5931  * @max_tx_rate: max TX rate in bytes to be converted into Mbits
5932  *
5933  * Helper function to convert units before send to set BW limit
5934  **/
5935 static u64 i40e_bw_bytes_to_mbits(struct i40e_vsi *vsi, u64 max_tx_rate)
5936 {
5937         if (max_tx_rate < I40E_BW_MBPS_DIVISOR) {
5938                 dev_warn(&vsi->back->pdev->dev,
5939                          "Setting max tx rate to minimum usable value of 50Mbps.\n");
5940                 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5941         } else {
5942                 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
5943         }
5944
5945         return max_tx_rate;
5946 }
5947
5948 /**
5949  * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5950  * @vsi: VSI to be configured
5951  * @seid: seid of the channel/VSI
5952  * @max_tx_rate: max TX rate to be configured as BW limit
5953  *
5954  * Helper function to set BW limit for a given VSI
5955  **/
5956 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5957 {
5958         struct i40e_pf *pf = vsi->back;
5959         u64 credits = 0;
5960         int speed = 0;
5961         int ret = 0;
5962
5963         speed = i40e_get_link_speed(vsi);
5964         if (max_tx_rate > speed) {
5965                 dev_err(&pf->pdev->dev,
5966                         "Invalid max tx rate %llu specified for VSI seid %d.",
5967                         max_tx_rate, seid);
5968                 return -EINVAL;
5969         }
5970         if (max_tx_rate && max_tx_rate < I40E_BW_CREDIT_DIVISOR) {
5971                 dev_warn(&pf->pdev->dev,
5972                          "Setting max tx rate to minimum usable value of 50Mbps.\n");
5973                 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5974         }
5975
5976         /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5977         credits = max_tx_rate;
5978         do_div(credits, I40E_BW_CREDIT_DIVISOR);
5979         ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5980                                           I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5981         if (ret)
5982                 dev_err(&pf->pdev->dev,
5983                         "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %pe aq_err %s\n",
5984                         max_tx_rate, seid, ERR_PTR(ret),
5985                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5986         return ret;
5987 }
5988
5989 /**
5990  * i40e_remove_queue_channels - Remove queue channels for the TCs
5991  * @vsi: VSI to be configured
5992  *
5993  * Remove queue channels for the TCs
5994  **/
5995 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5996 {
5997         enum i40e_admin_queue_err last_aq_status;
5998         struct i40e_cloud_filter *cfilter;
5999         struct i40e_channel *ch, *ch_tmp;
6000         struct i40e_pf *pf = vsi->back;
6001         struct hlist_node *node;
6002         int ret, i;
6003
6004         /* Reset rss size that was stored when reconfiguring rss for
6005          * channel VSIs with non-power-of-2 queue count.
6006          */
6007         vsi->current_rss_size = 0;
6008
6009         /* perform cleanup for channels if they exist */
6010         if (list_empty(&vsi->ch_list))
6011                 return;
6012
6013         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6014                 struct i40e_vsi *p_vsi;
6015
6016                 list_del(&ch->list);
6017                 p_vsi = ch->parent_vsi;
6018                 if (!p_vsi || !ch->initialized) {
6019                         kfree(ch);
6020                         continue;
6021                 }
6022                 /* Reset queue contexts */
6023                 for (i = 0; i < ch->num_queue_pairs; i++) {
6024                         struct i40e_ring *tx_ring, *rx_ring;
6025                         u16 pf_q;
6026
6027                         pf_q = ch->base_queue + i;
6028                         tx_ring = vsi->tx_rings[pf_q];
6029                         tx_ring->ch = NULL;
6030
6031                         rx_ring = vsi->rx_rings[pf_q];
6032                         rx_ring->ch = NULL;
6033                 }
6034
6035                 /* Reset BW configured for this VSI via mqprio */
6036                 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
6037                 if (ret)
6038                         dev_info(&vsi->back->pdev->dev,
6039                                  "Failed to reset tx rate for ch->seid %u\n",
6040                                  ch->seid);
6041
6042                 /* delete cloud filters associated with this channel */
6043                 hlist_for_each_entry_safe(cfilter, node,
6044                                           &pf->cloud_filter_list, cloud_node) {
6045                         if (cfilter->seid != ch->seid)
6046                                 continue;
6047
6048                         hash_del(&cfilter->cloud_node);
6049                         if (cfilter->dst_port)
6050                                 ret = i40e_add_del_cloud_filter_big_buf(vsi,
6051                                                                         cfilter,
6052                                                                         false);
6053                         else
6054                                 ret = i40e_add_del_cloud_filter(vsi, cfilter,
6055                                                                 false);
6056                         last_aq_status = pf->hw.aq.asq_last_status;
6057                         if (ret)
6058                                 dev_info(&pf->pdev->dev,
6059                                          "Failed to delete cloud filter, err %pe aq_err %s\n",
6060                                          ERR_PTR(ret),
6061                                          i40e_aq_str(&pf->hw, last_aq_status));
6062                         kfree(cfilter);
6063                 }
6064
6065                 /* delete VSI from FW */
6066                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
6067                                              NULL);
6068                 if (ret)
6069                         dev_err(&vsi->back->pdev->dev,
6070                                 "unable to remove channel (%d) for parent VSI(%d)\n",
6071                                 ch->seid, p_vsi->seid);
6072                 kfree(ch);
6073         }
6074         INIT_LIST_HEAD(&vsi->ch_list);
6075 }
6076
6077 /**
6078  * i40e_get_max_queues_for_channel
6079  * @vsi: ptr to VSI to which channels are associated with
6080  *
6081  * Helper function which returns max value among the queue counts set on the
6082  * channels/TCs created.
6083  **/
6084 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
6085 {
6086         struct i40e_channel *ch, *ch_tmp;
6087         int max = 0;
6088
6089         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6090                 if (!ch->initialized)
6091                         continue;
6092                 if (ch->num_queue_pairs > max)
6093                         max = ch->num_queue_pairs;
6094         }
6095
6096         return max;
6097 }
6098
6099 /**
6100  * i40e_validate_num_queues - validate num_queues w.r.t channel
6101  * @pf: ptr to PF device
6102  * @num_queues: number of queues
6103  * @vsi: the parent VSI
6104  * @reconfig_rss: indicates should the RSS be reconfigured or not
6105  *
6106  * This function validates number of queues in the context of new channel
6107  * which is being established and determines if RSS should be reconfigured
6108  * or not for parent VSI.
6109  **/
6110 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
6111                                     struct i40e_vsi *vsi, bool *reconfig_rss)
6112 {
6113         int max_ch_queues;
6114
6115         if (!reconfig_rss)
6116                 return -EINVAL;
6117
6118         *reconfig_rss = false;
6119         if (vsi->current_rss_size) {
6120                 if (num_queues > vsi->current_rss_size) {
6121                         dev_dbg(&pf->pdev->dev,
6122                                 "Error: num_queues (%d) > vsi's current_size(%d)\n",
6123                                 num_queues, vsi->current_rss_size);
6124                         return -EINVAL;
6125                 } else if ((num_queues < vsi->current_rss_size) &&
6126                            (!is_power_of_2(num_queues))) {
6127                         dev_dbg(&pf->pdev->dev,
6128                                 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
6129                                 num_queues, vsi->current_rss_size);
6130                         return -EINVAL;
6131                 }
6132         }
6133
6134         if (!is_power_of_2(num_queues)) {
6135                 /* Find the max num_queues configured for channel if channel
6136                  * exist.
6137                  * if channel exist, then enforce 'num_queues' to be more than
6138                  * max ever queues configured for channel.
6139                  */
6140                 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
6141                 if (num_queues < max_ch_queues) {
6142                         dev_dbg(&pf->pdev->dev,
6143                                 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
6144                                 num_queues, max_ch_queues);
6145                         return -EINVAL;
6146                 }
6147                 *reconfig_rss = true;
6148         }
6149
6150         return 0;
6151 }
6152
6153 /**
6154  * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
6155  * @vsi: the VSI being setup
6156  * @rss_size: size of RSS, accordingly LUT gets reprogrammed
6157  *
6158  * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
6159  **/
6160 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
6161 {
6162         struct i40e_pf *pf = vsi->back;
6163         u8 seed[I40E_HKEY_ARRAY_SIZE];
6164         struct i40e_hw *hw = &pf->hw;
6165         int local_rss_size;
6166         u8 *lut;
6167         int ret;
6168
6169         if (!vsi->rss_size)
6170                 return -EINVAL;
6171
6172         if (rss_size > vsi->rss_size)
6173                 return -EINVAL;
6174
6175         local_rss_size = min_t(int, vsi->rss_size, rss_size);
6176         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6177         if (!lut)
6178                 return -ENOMEM;
6179
6180         /* Ignoring user configured lut if there is one */
6181         i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6182
6183         /* Use user configured hash key if there is one, otherwise
6184          * use default.
6185          */
6186         if (vsi->rss_hkey_user)
6187                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6188         else
6189                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6190
6191         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6192         if (ret) {
6193                 dev_info(&pf->pdev->dev,
6194                          "Cannot set RSS lut, err %pe aq_err %s\n",
6195                          ERR_PTR(ret),
6196                          i40e_aq_str(hw, hw->aq.asq_last_status));
6197                 kfree(lut);
6198                 return ret;
6199         }
6200         kfree(lut);
6201
6202         /* Do the update w.r.t. storing rss_size */
6203         if (!vsi->orig_rss_size)
6204                 vsi->orig_rss_size = vsi->rss_size;
6205         vsi->current_rss_size = local_rss_size;
6206
6207         return ret;
6208 }
6209
6210 /**
6211  * i40e_channel_setup_queue_map - Setup a channel queue map
6212  * @pf: ptr to PF device
6213  * @ctxt: VSI context structure
6214  * @ch: ptr to channel structure
6215  *
6216  * Setup queue map for a specific channel
6217  **/
6218 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6219                                          struct i40e_vsi_context *ctxt,
6220                                          struct i40e_channel *ch)
6221 {
6222         u16 qcount, qmap, sections = 0;
6223         u8 offset = 0;
6224         int pow;
6225
6226         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6227         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6228
6229         qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6230         ch->num_queue_pairs = qcount;
6231
6232         /* find the next higher power-of-2 of num queue pairs */
6233         pow = ilog2(qcount);
6234         if (!is_power_of_2(qcount))
6235                 pow++;
6236
6237         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6238                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6239
6240         /* Setup queue TC[0].qmap for given VSI context */
6241         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6242
6243         ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6244         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6245         ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6246         ctxt->info.valid_sections |= cpu_to_le16(sections);
6247 }
6248
6249 /**
6250  * i40e_add_channel - add a channel by adding VSI
6251  * @pf: ptr to PF device
6252  * @uplink_seid: underlying HW switching element (VEB) ID
6253  * @ch: ptr to channel structure
6254  *
6255  * Add a channel (VSI) using add_vsi and queue_map
6256  **/
6257 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6258                             struct i40e_channel *ch)
6259 {
6260         struct i40e_hw *hw = &pf->hw;
6261         struct i40e_vsi_context ctxt;
6262         u8 enabled_tc = 0x1; /* TC0 enabled */
6263         int ret;
6264
6265         if (ch->type != I40E_VSI_VMDQ2) {
6266                 dev_info(&pf->pdev->dev,
6267                          "add new vsi failed, ch->type %d\n", ch->type);
6268                 return -EINVAL;
6269         }
6270
6271         memset(&ctxt, 0, sizeof(ctxt));
6272         ctxt.pf_num = hw->pf_id;
6273         ctxt.vf_num = 0;
6274         ctxt.uplink_seid = uplink_seid;
6275         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6276         if (ch->type == I40E_VSI_VMDQ2)
6277                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6278
6279         if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
6280                 ctxt.info.valid_sections |=
6281                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6282                 ctxt.info.switch_id =
6283                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6284         }
6285
6286         /* Set queue map for a given VSI context */
6287         i40e_channel_setup_queue_map(pf, &ctxt, ch);
6288
6289         /* Now time to create VSI */
6290         ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6291         if (ret) {
6292                 dev_info(&pf->pdev->dev,
6293                          "add new vsi failed, err %pe aq_err %s\n",
6294                          ERR_PTR(ret),
6295                          i40e_aq_str(&pf->hw,
6296                                      pf->hw.aq.asq_last_status));
6297                 return -ENOENT;
6298         }
6299
6300         /* Success, update channel, set enabled_tc only if the channel
6301          * is not a macvlan
6302          */
6303         ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6304         ch->seid = ctxt.seid;
6305         ch->vsi_number = ctxt.vsi_number;
6306         ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6307
6308         /* copy just the sections touched not the entire info
6309          * since not all sections are valid as returned by
6310          * update vsi params
6311          */
6312         ch->info.mapping_flags = ctxt.info.mapping_flags;
6313         memcpy(&ch->info.queue_mapping,
6314                &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6315         memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6316                sizeof(ctxt.info.tc_mapping));
6317
6318         return 0;
6319 }
6320
6321 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6322                                   u8 *bw_share)
6323 {
6324         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6325         int ret;
6326         int i;
6327
6328         memset(&bw_data, 0, sizeof(bw_data));
6329         bw_data.tc_valid_bits = ch->enabled_tc;
6330         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6331                 bw_data.tc_bw_credits[i] = bw_share[i];
6332
6333         ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6334                                        &bw_data, NULL);
6335         if (ret) {
6336                 dev_info(&vsi->back->pdev->dev,
6337                          "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6338                          vsi->back->hw.aq.asq_last_status, ch->seid);
6339                 return -EINVAL;
6340         }
6341
6342         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6343                 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6344
6345         return 0;
6346 }
6347
6348 /**
6349  * i40e_channel_config_tx_ring - config TX ring associated with new channel
6350  * @pf: ptr to PF device
6351  * @vsi: the VSI being setup
6352  * @ch: ptr to channel structure
6353  *
6354  * Configure TX rings associated with channel (VSI) since queues are being
6355  * from parent VSI.
6356  **/
6357 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6358                                        struct i40e_vsi *vsi,
6359                                        struct i40e_channel *ch)
6360 {
6361         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6362         int ret;
6363         int i;
6364
6365         /* Enable ETS TCs with equal BW Share for now across all VSIs */
6366         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6367                 if (ch->enabled_tc & BIT(i))
6368                         bw_share[i] = 1;
6369         }
6370
6371         /* configure BW for new VSI */
6372         ret = i40e_channel_config_bw(vsi, ch, bw_share);
6373         if (ret) {
6374                 dev_info(&vsi->back->pdev->dev,
6375                          "Failed configuring TC map %d for channel (seid %u)\n",
6376                          ch->enabled_tc, ch->seid);
6377                 return ret;
6378         }
6379
6380         for (i = 0; i < ch->num_queue_pairs; i++) {
6381                 struct i40e_ring *tx_ring, *rx_ring;
6382                 u16 pf_q;
6383
6384                 pf_q = ch->base_queue + i;
6385
6386                 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6387                  * context
6388                  */
6389                 tx_ring = vsi->tx_rings[pf_q];
6390                 tx_ring->ch = ch;
6391
6392                 /* Get the RX ring ptr */
6393                 rx_ring = vsi->rx_rings[pf_q];
6394                 rx_ring->ch = ch;
6395         }
6396
6397         return 0;
6398 }
6399
6400 /**
6401  * i40e_setup_hw_channel - setup new channel
6402  * @pf: ptr to PF device
6403  * @vsi: the VSI being setup
6404  * @ch: ptr to channel structure
6405  * @uplink_seid: underlying HW switching element (VEB) ID
6406  * @type: type of channel to be created (VMDq2/VF)
6407  *
6408  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6409  * and configures TX rings accordingly
6410  **/
6411 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6412                                         struct i40e_vsi *vsi,
6413                                         struct i40e_channel *ch,
6414                                         u16 uplink_seid, u8 type)
6415 {
6416         int ret;
6417
6418         ch->initialized = false;
6419         ch->base_queue = vsi->next_base_queue;
6420         ch->type = type;
6421
6422         /* Proceed with creation of channel (VMDq2) VSI */
6423         ret = i40e_add_channel(pf, uplink_seid, ch);
6424         if (ret) {
6425                 dev_info(&pf->pdev->dev,
6426                          "failed to add_channel using uplink_seid %u\n",
6427                          uplink_seid);
6428                 return ret;
6429         }
6430
6431         /* Mark the successful creation of channel */
6432         ch->initialized = true;
6433
6434         /* Reconfigure TX queues using QTX_CTL register */
6435         ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6436         if (ret) {
6437                 dev_info(&pf->pdev->dev,
6438                          "failed to configure TX rings for channel %u\n",
6439                          ch->seid);
6440                 return ret;
6441         }
6442
6443         /* update 'next_base_queue' */
6444         vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6445         dev_dbg(&pf->pdev->dev,
6446                 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6447                 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6448                 ch->num_queue_pairs,
6449                 vsi->next_base_queue);
6450         return ret;
6451 }
6452
6453 /**
6454  * i40e_setup_channel - setup new channel using uplink element
6455  * @pf: ptr to PF device
6456  * @vsi: pointer to the VSI to set up the channel within
6457  * @ch: ptr to channel structure
6458  *
6459  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6460  * and uplink switching element (uplink_seid)
6461  **/
6462 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6463                                struct i40e_channel *ch)
6464 {
6465         u8 vsi_type;
6466         u16 seid;
6467         int ret;
6468
6469         if (vsi->type == I40E_VSI_MAIN) {
6470                 vsi_type = I40E_VSI_VMDQ2;
6471         } else {
6472                 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6473                         vsi->type);
6474                 return false;
6475         }
6476
6477         /* underlying switching element */
6478         seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6479
6480         /* create channel (VSI), configure TX rings */
6481         ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6482         if (ret) {
6483                 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6484                 return false;
6485         }
6486
6487         return ch->initialized ? true : false;
6488 }
6489
6490 /**
6491  * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6492  * @vsi: ptr to VSI which has PF backing
6493  *
6494  * Sets up switch mode correctly if it needs to be changed and perform
6495  * what are allowed modes.
6496  **/
6497 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6498 {
6499         u8 mode;
6500         struct i40e_pf *pf = vsi->back;
6501         struct i40e_hw *hw = &pf->hw;
6502         int ret;
6503
6504         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6505         if (ret)
6506                 return -EINVAL;
6507
6508         if (hw->dev_caps.switch_mode) {
6509                 /* if switch mode is set, support mode2 (non-tunneled for
6510                  * cloud filter) for now
6511                  */
6512                 u32 switch_mode = hw->dev_caps.switch_mode &
6513                                   I40E_SWITCH_MODE_MASK;
6514                 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6515                         if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6516                                 return 0;
6517                         dev_err(&pf->pdev->dev,
6518                                 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6519                                 hw->dev_caps.switch_mode);
6520                         return -EINVAL;
6521                 }
6522         }
6523
6524         /* Set Bit 7 to be valid */
6525         mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6526
6527         /* Set L4type for TCP support */
6528         mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6529
6530         /* Set cloud filter mode */
6531         mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6532
6533         /* Prep mode field for set_switch_config */
6534         ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6535                                         pf->last_sw_conf_valid_flags,
6536                                         mode, NULL);
6537         if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6538                 dev_err(&pf->pdev->dev,
6539                         "couldn't set switch config bits, err %pe aq_err %s\n",
6540                         ERR_PTR(ret),
6541                         i40e_aq_str(hw,
6542                                     hw->aq.asq_last_status));
6543
6544         return ret;
6545 }
6546
6547 /**
6548  * i40e_create_queue_channel - function to create channel
6549  * @vsi: VSI to be configured
6550  * @ch: ptr to channel (it contains channel specific params)
6551  *
6552  * This function creates channel (VSI) using num_queues specified by user,
6553  * reconfigs RSS if needed.
6554  **/
6555 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6556                               struct i40e_channel *ch)
6557 {
6558         struct i40e_pf *pf = vsi->back;
6559         bool reconfig_rss;
6560         int err;
6561
6562         if (!ch)
6563                 return -EINVAL;
6564
6565         if (!ch->num_queue_pairs) {
6566                 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6567                         ch->num_queue_pairs);
6568                 return -EINVAL;
6569         }
6570
6571         /* validate user requested num_queues for channel */
6572         err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6573                                        &reconfig_rss);
6574         if (err) {
6575                 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6576                          ch->num_queue_pairs);
6577                 return -EINVAL;
6578         }
6579
6580         /* By default we are in VEPA mode, if this is the first VF/VMDq
6581          * VSI to be added switch to VEB mode.
6582          */
6583
6584         if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
6585                 set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
6586
6587                 if (vsi->type == I40E_VSI_MAIN) {
6588                         if (i40e_is_tc_mqprio_enabled(pf))
6589                                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6590                         else
6591                                 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6592                 }
6593                 /* now onwards for main VSI, number of queues will be value
6594                  * of TC0's queue count
6595                  */
6596         }
6597
6598         /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6599          * it should be more than num_queues
6600          */
6601         if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6602                 dev_dbg(&pf->pdev->dev,
6603                         "Error: cnt_q_avail (%u) less than num_queues %d\n",
6604                         vsi->cnt_q_avail, ch->num_queue_pairs);
6605                 return -EINVAL;
6606         }
6607
6608         /* reconfig_rss only if vsi type is MAIN_VSI */
6609         if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6610                 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6611                 if (err) {
6612                         dev_info(&pf->pdev->dev,
6613                                  "Error: unable to reconfig rss for num_queues (%u)\n",
6614                                  ch->num_queue_pairs);
6615                         return -EINVAL;
6616                 }
6617         }
6618
6619         if (!i40e_setup_channel(pf, vsi, ch)) {
6620                 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6621                 return -EINVAL;
6622         }
6623
6624         dev_info(&pf->pdev->dev,
6625                  "Setup channel (id:%u) utilizing num_queues %d\n",
6626                  ch->seid, ch->num_queue_pairs);
6627
6628         /* configure VSI for BW limit */
6629         if (ch->max_tx_rate) {
6630                 u64 credits = ch->max_tx_rate;
6631
6632                 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6633                         return -EINVAL;
6634
6635                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6636                 dev_dbg(&pf->pdev->dev,
6637                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6638                         ch->max_tx_rate,
6639                         credits,
6640                         ch->seid);
6641         }
6642
6643         /* in case of VF, this will be main SRIOV VSI */
6644         ch->parent_vsi = vsi;
6645
6646         /* and update main_vsi's count for queue_available to use */
6647         vsi->cnt_q_avail -= ch->num_queue_pairs;
6648
6649         return 0;
6650 }
6651
6652 /**
6653  * i40e_configure_queue_channels - Add queue channel for the given TCs
6654  * @vsi: VSI to be configured
6655  *
6656  * Configures queue channel mapping to the given TCs
6657  **/
6658 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6659 {
6660         struct i40e_channel *ch;
6661         u64 max_rate = 0;
6662         int ret = 0, i;
6663
6664         /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6665         vsi->tc_seid_map[0] = vsi->seid;
6666         for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6667                 if (vsi->tc_config.enabled_tc & BIT(i)) {
6668                         ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6669                         if (!ch) {
6670                                 ret = -ENOMEM;
6671                                 goto err_free;
6672                         }
6673
6674                         INIT_LIST_HEAD(&ch->list);
6675                         ch->num_queue_pairs =
6676                                 vsi->tc_config.tc_info[i].qcount;
6677                         ch->base_queue =
6678                                 vsi->tc_config.tc_info[i].qoffset;
6679
6680                         /* Bandwidth limit through tc interface is in bytes/s,
6681                          * change to Mbit/s
6682                          */
6683                         max_rate = vsi->mqprio_qopt.max_rate[i];
6684                         do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6685                         ch->max_tx_rate = max_rate;
6686
6687                         list_add_tail(&ch->list, &vsi->ch_list);
6688
6689                         ret = i40e_create_queue_channel(vsi, ch);
6690                         if (ret) {
6691                                 dev_err(&vsi->back->pdev->dev,
6692                                         "Failed creating queue channel with TC%d: queues %d\n",
6693                                         i, ch->num_queue_pairs);
6694                                 goto err_free;
6695                         }
6696                         vsi->tc_seid_map[i] = ch->seid;
6697                 }
6698         }
6699
6700         /* reset to reconfigure TX queue contexts */
6701         i40e_do_reset(vsi->back, I40E_PF_RESET_FLAG, true);
6702         return ret;
6703
6704 err_free:
6705         i40e_remove_queue_channels(vsi);
6706         return ret;
6707 }
6708
6709 /**
6710  * i40e_veb_config_tc - Configure TCs for given VEB
6711  * @veb: given VEB
6712  * @enabled_tc: TC bitmap
6713  *
6714  * Configures given TC bitmap for VEB (switching) element
6715  **/
6716 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6717 {
6718         struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6719         struct i40e_pf *pf = veb->pf;
6720         int ret = 0;
6721         int i;
6722
6723         /* No TCs or already enabled TCs just return */
6724         if (!enabled_tc || veb->enabled_tc == enabled_tc)
6725                 return ret;
6726
6727         bw_data.tc_valid_bits = enabled_tc;
6728         /* bw_data.absolute_credits is not set (relative) */
6729
6730         /* Enable ETS TCs with equal BW Share for now */
6731         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6732                 if (enabled_tc & BIT(i))
6733                         bw_data.tc_bw_share_credits[i] = 1;
6734         }
6735
6736         ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6737                                                    &bw_data, NULL);
6738         if (ret) {
6739                 dev_info(&pf->pdev->dev,
6740                          "VEB bw config failed, err %pe aq_err %s\n",
6741                          ERR_PTR(ret),
6742                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6743                 goto out;
6744         }
6745
6746         /* Update the BW information */
6747         ret = i40e_veb_get_bw_info(veb);
6748         if (ret) {
6749                 dev_info(&pf->pdev->dev,
6750                          "Failed getting veb bw config, err %pe aq_err %s\n",
6751                          ERR_PTR(ret),
6752                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6753         }
6754
6755 out:
6756         return ret;
6757 }
6758
6759 #ifdef CONFIG_I40E_DCB
6760 /**
6761  * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6762  * @pf: PF struct
6763  *
6764  * Reconfigure VEB/VSIs on a given PF; it is assumed that
6765  * the caller would've quiesce all the VSIs before calling
6766  * this function
6767  **/
6768 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6769 {
6770         u8 tc_map = 0;
6771         int ret;
6772         u8 v;
6773
6774         /* Enable the TCs available on PF to all VEBs */
6775         tc_map = i40e_pf_get_tc_map(pf);
6776         if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6777                 return;
6778
6779         for (v = 0; v < I40E_MAX_VEB; v++) {
6780                 if (!pf->veb[v])
6781                         continue;
6782                 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6783                 if (ret) {
6784                         dev_info(&pf->pdev->dev,
6785                                  "Failed configuring TC for VEB seid=%d\n",
6786                                  pf->veb[v]->seid);
6787                         /* Will try to configure as many components */
6788                 }
6789         }
6790
6791         /* Update each VSI */
6792         for (v = 0; v < pf->num_alloc_vsi; v++) {
6793                 if (!pf->vsi[v])
6794                         continue;
6795
6796                 /* - Enable all TCs for the LAN VSI
6797                  * - For all others keep them at TC0 for now
6798                  */
6799                 if (v == pf->lan_vsi)
6800                         tc_map = i40e_pf_get_tc_map(pf);
6801                 else
6802                         tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6803
6804                 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6805                 if (ret) {
6806                         dev_info(&pf->pdev->dev,
6807                                  "Failed configuring TC for VSI seid=%d\n",
6808                                  pf->vsi[v]->seid);
6809                         /* Will try to configure as many components */
6810                 } else {
6811                         /* Re-configure VSI vectors based on updated TC map */
6812                         i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6813                         if (pf->vsi[v]->netdev)
6814                                 i40e_dcbnl_set_all(pf->vsi[v]);
6815                 }
6816         }
6817 }
6818
6819 /**
6820  * i40e_resume_port_tx - Resume port Tx
6821  * @pf: PF struct
6822  *
6823  * Resume a port's Tx and issue a PF reset in case of failure to
6824  * resume.
6825  **/
6826 static int i40e_resume_port_tx(struct i40e_pf *pf)
6827 {
6828         struct i40e_hw *hw = &pf->hw;
6829         int ret;
6830
6831         ret = i40e_aq_resume_port_tx(hw, NULL);
6832         if (ret) {
6833                 dev_info(&pf->pdev->dev,
6834                          "Resume Port Tx failed, err %pe aq_err %s\n",
6835                           ERR_PTR(ret),
6836                           i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6837                 /* Schedule PF reset to recover */
6838                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6839                 i40e_service_event_schedule(pf);
6840         }
6841
6842         return ret;
6843 }
6844
6845 /**
6846  * i40e_suspend_port_tx - Suspend port Tx
6847  * @pf: PF struct
6848  *
6849  * Suspend a port's Tx and issue a PF reset in case of failure.
6850  **/
6851 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6852 {
6853         struct i40e_hw *hw = &pf->hw;
6854         int ret;
6855
6856         ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6857         if (ret) {
6858                 dev_info(&pf->pdev->dev,
6859                          "Suspend Port Tx failed, err %pe aq_err %s\n",
6860                          ERR_PTR(ret),
6861                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6862                 /* Schedule PF reset to recover */
6863                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6864                 i40e_service_event_schedule(pf);
6865         }
6866
6867         return ret;
6868 }
6869
6870 /**
6871  * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6872  * @pf: PF being configured
6873  * @new_cfg: New DCBX configuration
6874  *
6875  * Program DCB settings into HW and reconfigure VEB/VSIs on
6876  * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6877  **/
6878 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6879                                   struct i40e_dcbx_config *new_cfg)
6880 {
6881         struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6882         int ret;
6883
6884         /* Check if need reconfiguration */
6885         if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6886                 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6887                 return 0;
6888         }
6889
6890         /* Config change disable all VSIs */
6891         i40e_pf_quiesce_all_vsi(pf);
6892
6893         /* Copy the new config to the current config */
6894         *old_cfg = *new_cfg;
6895         old_cfg->etsrec = old_cfg->etscfg;
6896         ret = i40e_set_dcb_config(&pf->hw);
6897         if (ret) {
6898                 dev_info(&pf->pdev->dev,
6899                          "Set DCB Config failed, err %pe aq_err %s\n",
6900                          ERR_PTR(ret),
6901                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6902                 goto out;
6903         }
6904
6905         /* Changes in configuration update VEB/VSI */
6906         i40e_dcb_reconfigure(pf);
6907 out:
6908         /* In case of reset do not try to resume anything */
6909         if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6910                 /* Re-start the VSIs if disabled */
6911                 ret = i40e_resume_port_tx(pf);
6912                 /* In case of error no point in resuming VSIs */
6913                 if (ret)
6914                         goto err;
6915                 i40e_pf_unquiesce_all_vsi(pf);
6916         }
6917 err:
6918         return ret;
6919 }
6920
6921 /**
6922  * i40e_hw_dcb_config - Program new DCBX settings into HW
6923  * @pf: PF being configured
6924  * @new_cfg: New DCBX configuration
6925  *
6926  * Program DCB settings into HW and reconfigure VEB/VSIs on
6927  * given PF
6928  **/
6929 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6930 {
6931         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6932         u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6933         u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6934         struct i40e_dcbx_config *old_cfg;
6935         u8 mode[I40E_MAX_TRAFFIC_CLASS];
6936         struct i40e_rx_pb_config pb_cfg;
6937         struct i40e_hw *hw = &pf->hw;
6938         u8 num_ports = hw->num_ports;
6939         bool need_reconfig;
6940         int ret = -EINVAL;
6941         u8 lltc_map = 0;
6942         u8 tc_map = 0;
6943         u8 new_numtc;
6944         u8 i;
6945
6946         dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6947         /* Un-pack information to Program ETS HW via shared API
6948          * numtc, tcmap
6949          * LLTC map
6950          * ETS/NON-ETS arbiter mode
6951          * max exponent (credit refills)
6952          * Total number of ports
6953          * PFC priority bit-map
6954          * Priority Table
6955          * BW % per TC
6956          * Arbiter mode between UPs sharing same TC
6957          * TSA table (ETS or non-ETS)
6958          * EEE enabled or not
6959          * MFS TC table
6960          */
6961
6962         new_numtc = i40e_dcb_get_num_tc(new_cfg);
6963
6964         memset(&ets_data, 0, sizeof(ets_data));
6965         for (i = 0; i < new_numtc; i++) {
6966                 tc_map |= BIT(i);
6967                 switch (new_cfg->etscfg.tsatable[i]) {
6968                 case I40E_IEEE_TSA_ETS:
6969                         prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6970                         ets_data.tc_bw_share_credits[i] =
6971                                         new_cfg->etscfg.tcbwtable[i];
6972                         break;
6973                 case I40E_IEEE_TSA_STRICT:
6974                         prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6975                         lltc_map |= BIT(i);
6976                         ets_data.tc_bw_share_credits[i] =
6977                                         I40E_DCB_STRICT_PRIO_CREDITS;
6978                         break;
6979                 default:
6980                         /* Invalid TSA type */
6981                         need_reconfig = false;
6982                         goto out;
6983                 }
6984         }
6985
6986         old_cfg = &hw->local_dcbx_config;
6987         /* Check if need reconfiguration */
6988         need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6989
6990         /* If needed, enable/disable frame tagging, disable all VSIs
6991          * and suspend port tx
6992          */
6993         if (need_reconfig) {
6994                 /* Enable DCB tagging only when more than one TC */
6995                 if (new_numtc > 1)
6996                         set_bit(I40E_FLAG_DCB_ENA, pf->flags);
6997                 else
6998                         clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
6999
7000                 set_bit(__I40E_PORT_SUSPENDED, pf->state);
7001                 /* Reconfiguration needed quiesce all VSIs */
7002                 i40e_pf_quiesce_all_vsi(pf);
7003                 ret = i40e_suspend_port_tx(pf);
7004                 if (ret)
7005                         goto err;
7006         }
7007
7008         /* Configure Port ETS Tx Scheduler */
7009         ets_data.tc_valid_bits = tc_map;
7010         ets_data.tc_strict_priority_flags = lltc_map;
7011         ret = i40e_aq_config_switch_comp_ets
7012                 (hw, pf->mac_seid, &ets_data,
7013                  i40e_aqc_opc_modify_switching_comp_ets, NULL);
7014         if (ret) {
7015                 dev_info(&pf->pdev->dev,
7016                          "Modify Port ETS failed, err %pe aq_err %s\n",
7017                          ERR_PTR(ret),
7018                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7019                 goto out;
7020         }
7021
7022         /* Configure Rx ETS HW */
7023         memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
7024         i40e_dcb_hw_set_num_tc(hw, new_numtc);
7025         i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
7026                                    I40E_DCB_ARB_MODE_STRICT_PRIORITY,
7027                                    I40E_DCB_DEFAULT_MAX_EXPONENT,
7028                                    lltc_map);
7029         i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
7030         i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
7031                                      prio_type);
7032         i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
7033                                new_cfg->etscfg.prioritytable);
7034         i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
7035
7036         /* Configure Rx Packet Buffers in HW */
7037         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7038                 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
7039                 mfs_tc[i] += I40E_PACKET_HDR_PAD;
7040         }
7041
7042         i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
7043                                          false, new_cfg->pfc.pfcenable,
7044                                          mfs_tc, &pb_cfg);
7045         i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
7046
7047         /* Update the local Rx Packet buffer config */
7048         pf->pb_cfg = pb_cfg;
7049
7050         /* Inform the FW about changes to DCB configuration */
7051         ret = i40e_aq_dcb_updated(&pf->hw, NULL);
7052         if (ret) {
7053                 dev_info(&pf->pdev->dev,
7054                          "DCB Updated failed, err %pe aq_err %s\n",
7055                          ERR_PTR(ret),
7056                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7057                 goto out;
7058         }
7059
7060         /* Update the port DCBx configuration */
7061         *old_cfg = *new_cfg;
7062
7063         /* Changes in configuration update VEB/VSI */
7064         i40e_dcb_reconfigure(pf);
7065 out:
7066         /* Re-start the VSIs if disabled */
7067         if (need_reconfig) {
7068                 ret = i40e_resume_port_tx(pf);
7069
7070                 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
7071                 /* In case of error no point in resuming VSIs */
7072                 if (ret)
7073                         goto err;
7074
7075                 /* Wait for the PF's queues to be disabled */
7076                 ret = i40e_pf_wait_queues_disabled(pf);
7077                 if (ret) {
7078                         /* Schedule PF reset to recover */
7079                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
7080                         i40e_service_event_schedule(pf);
7081                         goto err;
7082                 } else {
7083                         i40e_pf_unquiesce_all_vsi(pf);
7084                         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7085                         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
7086                 }
7087                 /* registers are set, lets apply */
7088                 if (test_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps))
7089                         ret = i40e_hw_set_dcb_config(pf, new_cfg);
7090         }
7091
7092 err:
7093         return ret;
7094 }
7095
7096 /**
7097  * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
7098  * @pf: PF being queried
7099  *
7100  * Set default DCB configuration in case DCB is to be done in SW.
7101  **/
7102 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
7103 {
7104         struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
7105         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
7106         struct i40e_hw *hw = &pf->hw;
7107         int err;
7108
7109         if (test_bit(I40E_HW_CAP_USE_SET_LLDP_MIB, pf->hw.caps)) {
7110                 /* Update the local cached instance with TC0 ETS */
7111                 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
7112                 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7113                 pf->tmp_cfg.etscfg.maxtcs = 0;
7114                 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7115                 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
7116                 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
7117                 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
7118                 /* FW needs one App to configure HW */
7119                 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
7120                 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
7121                 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
7122                 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
7123
7124                 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
7125         }
7126
7127         memset(&ets_data, 0, sizeof(ets_data));
7128         ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
7129         ets_data.tc_strict_priority_flags = 0; /* ETS */
7130         ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
7131
7132         /* Enable ETS on the Physical port */
7133         err = i40e_aq_config_switch_comp_ets
7134                 (hw, pf->mac_seid, &ets_data,
7135                  i40e_aqc_opc_enable_switching_comp_ets, NULL);
7136         if (err) {
7137                 dev_info(&pf->pdev->dev,
7138                          "Enable Port ETS failed, err %pe aq_err %s\n",
7139                          ERR_PTR(err),
7140                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7141                 err = -ENOENT;
7142                 goto out;
7143         }
7144
7145         /* Update the local cached instance with TC0 ETS */
7146         dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7147         dcb_cfg->etscfg.cbs = 0;
7148         dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
7149         dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7150
7151 out:
7152         return err;
7153 }
7154
7155 /**
7156  * i40e_init_pf_dcb - Initialize DCB configuration
7157  * @pf: PF being configured
7158  *
7159  * Query the current DCB configuration and cache it
7160  * in the hardware structure
7161  **/
7162 static int i40e_init_pf_dcb(struct i40e_pf *pf)
7163 {
7164         struct i40e_hw *hw = &pf->hw;
7165         int err;
7166
7167         /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
7168          * Also do not enable DCBx if FW LLDP agent is disabled
7169          */
7170         if (test_bit(I40E_HW_CAP_NO_DCB_SUPPORT, pf->hw.caps)) {
7171                 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7172                 err = -EOPNOTSUPP;
7173                 goto out;
7174         }
7175         if (test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags)) {
7176                 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7177                 err = i40e_dcb_sw_default_config(pf);
7178                 if (err) {
7179                         dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7180                         goto out;
7181                 }
7182                 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7183                 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7184                                DCB_CAP_DCBX_VER_IEEE;
7185                 /* at init capable but disabled */
7186                 set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
7187                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
7188                 goto out;
7189         }
7190         err = i40e_init_dcb(hw, true);
7191         if (!err) {
7192                 /* Device/Function is not DCBX capable */
7193                 if ((!hw->func_caps.dcb) ||
7194                     (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7195                         dev_info(&pf->pdev->dev,
7196                                  "DCBX offload is not supported or is disabled for this PF.\n");
7197                 } else {
7198                         /* When status is not DISABLED then DCBX in FW */
7199                         pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7200                                        DCB_CAP_DCBX_VER_IEEE;
7201
7202                         set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
7203                         /* Enable DCB tagging only when more than one TC
7204                          * or explicitly disable if only one TC
7205                          */
7206                         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7207                                 set_bit(I40E_FLAG_DCB_ENA, pf->flags);
7208                         else
7209                                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
7210                         dev_dbg(&pf->pdev->dev,
7211                                 "DCBX offload is supported for this PF.\n");
7212                 }
7213         } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7214                 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7215                 set_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags);
7216         } else {
7217                 dev_info(&pf->pdev->dev,
7218                          "Query for DCB configuration failed, err %pe aq_err %s\n",
7219                          ERR_PTR(err),
7220                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7221         }
7222
7223 out:
7224         return err;
7225 }
7226 #endif /* CONFIG_I40E_DCB */
7227
7228 /**
7229  * i40e_print_link_message - print link up or down
7230  * @vsi: the VSI for which link needs a message
7231  * @isup: true of link is up, false otherwise
7232  */
7233 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7234 {
7235         enum i40e_aq_link_speed new_speed;
7236         struct i40e_pf *pf = vsi->back;
7237         char *speed = "Unknown";
7238         char *fc = "Unknown";
7239         char *fec = "";
7240         char *req_fec = "";
7241         char *an = "";
7242
7243         if (isup)
7244                 new_speed = pf->hw.phy.link_info.link_speed;
7245         else
7246                 new_speed = I40E_LINK_SPEED_UNKNOWN;
7247
7248         if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7249                 return;
7250         vsi->current_isup = isup;
7251         vsi->current_speed = new_speed;
7252         if (!isup) {
7253                 netdev_info(vsi->netdev, "NIC Link is Down\n");
7254                 return;
7255         }
7256
7257         /* Warn user if link speed on NPAR enabled partition is not at
7258          * least 10GB
7259          */
7260         if (pf->hw.func_caps.npar_enable &&
7261             (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7262              pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7263                 netdev_warn(vsi->netdev,
7264                             "The partition detected link speed that is less than 10Gbps\n");
7265
7266         switch (pf->hw.phy.link_info.link_speed) {
7267         case I40E_LINK_SPEED_40GB:
7268                 speed = "40 G";
7269                 break;
7270         case I40E_LINK_SPEED_20GB:
7271                 speed = "20 G";
7272                 break;
7273         case I40E_LINK_SPEED_25GB:
7274                 speed = "25 G";
7275                 break;
7276         case I40E_LINK_SPEED_10GB:
7277                 speed = "10 G";
7278                 break;
7279         case I40E_LINK_SPEED_5GB:
7280                 speed = "5 G";
7281                 break;
7282         case I40E_LINK_SPEED_2_5GB:
7283                 speed = "2.5 G";
7284                 break;
7285         case I40E_LINK_SPEED_1GB:
7286                 speed = "1000 M";
7287                 break;
7288         case I40E_LINK_SPEED_100MB:
7289                 speed = "100 M";
7290                 break;
7291         default:
7292                 break;
7293         }
7294
7295         switch (pf->hw.fc.current_mode) {
7296         case I40E_FC_FULL:
7297                 fc = "RX/TX";
7298                 break;
7299         case I40E_FC_TX_PAUSE:
7300                 fc = "TX";
7301                 break;
7302         case I40E_FC_RX_PAUSE:
7303                 fc = "RX";
7304                 break;
7305         default:
7306                 fc = "None";
7307                 break;
7308         }
7309
7310         if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7311                 req_fec = "None";
7312                 fec = "None";
7313                 an = "False";
7314
7315                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7316                         an = "True";
7317
7318                 if (pf->hw.phy.link_info.fec_info &
7319                     I40E_AQ_CONFIG_FEC_KR_ENA)
7320                         fec = "CL74 FC-FEC/BASE-R";
7321                 else if (pf->hw.phy.link_info.fec_info &
7322                          I40E_AQ_CONFIG_FEC_RS_ENA)
7323                         fec = "CL108 RS-FEC";
7324
7325                 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7326                  * both RS and FC are requested
7327                  */
7328                 if (vsi->back->hw.phy.link_info.req_fec_info &
7329                     (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7330                         if (vsi->back->hw.phy.link_info.req_fec_info &
7331                             I40E_AQ_REQUEST_FEC_RS)
7332                                 req_fec = "CL108 RS-FEC";
7333                         else
7334                                 req_fec = "CL74 FC-FEC/BASE-R";
7335                 }
7336                 netdev_info(vsi->netdev,
7337                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7338                             speed, req_fec, fec, an, fc);
7339         } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7340                 req_fec = "None";
7341                 fec = "None";
7342                 an = "False";
7343
7344                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7345                         an = "True";
7346
7347                 if (pf->hw.phy.link_info.fec_info &
7348                     I40E_AQ_CONFIG_FEC_KR_ENA)
7349                         fec = "CL74 FC-FEC/BASE-R";
7350
7351                 if (pf->hw.phy.link_info.req_fec_info &
7352                     I40E_AQ_REQUEST_FEC_KR)
7353                         req_fec = "CL74 FC-FEC/BASE-R";
7354
7355                 netdev_info(vsi->netdev,
7356                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7357                             speed, req_fec, fec, an, fc);
7358         } else {
7359                 netdev_info(vsi->netdev,
7360                             "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7361                             speed, fc);
7362         }
7363
7364 }
7365
7366 /**
7367  * i40e_up_complete - Finish the last steps of bringing up a connection
7368  * @vsi: the VSI being configured
7369  **/
7370 static int i40e_up_complete(struct i40e_vsi *vsi)
7371 {
7372         struct i40e_pf *pf = vsi->back;
7373         int err;
7374
7375         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
7376                 i40e_vsi_configure_msix(vsi);
7377         else
7378                 i40e_configure_msi_and_legacy(vsi);
7379
7380         /* start rings */
7381         err = i40e_vsi_start_rings(vsi);
7382         if (err)
7383                 return err;
7384
7385         clear_bit(__I40E_VSI_DOWN, vsi->state);
7386         i40e_napi_enable_all(vsi);
7387         i40e_vsi_enable_irq(vsi);
7388
7389         if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7390             (vsi->netdev)) {
7391                 i40e_print_link_message(vsi, true);
7392                 netif_tx_start_all_queues(vsi->netdev);
7393                 netif_carrier_on(vsi->netdev);
7394         }
7395
7396         /* replay FDIR SB filters */
7397         if (vsi->type == I40E_VSI_FDIR) {
7398                 /* reset fd counters */
7399                 pf->fd_add_err = 0;
7400                 pf->fd_atr_cnt = 0;
7401                 i40e_fdir_filter_restore(vsi);
7402         }
7403
7404         /* On the next run of the service_task, notify any clients of the new
7405          * opened netdev
7406          */
7407         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7408         i40e_service_event_schedule(pf);
7409
7410         return 0;
7411 }
7412
7413 /**
7414  * i40e_vsi_reinit_locked - Reset the VSI
7415  * @vsi: the VSI being configured
7416  *
7417  * Rebuild the ring structs after some configuration
7418  * has changed, e.g. MTU size.
7419  **/
7420 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7421 {
7422         struct i40e_pf *pf = vsi->back;
7423
7424         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7425                 usleep_range(1000, 2000);
7426         i40e_down(vsi);
7427
7428         i40e_up(vsi);
7429         clear_bit(__I40E_CONFIG_BUSY, pf->state);
7430 }
7431
7432 /**
7433  * i40e_force_link_state - Force the link status
7434  * @pf: board private structure
7435  * @is_up: whether the link state should be forced up or down
7436  **/
7437 static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7438 {
7439         struct i40e_aq_get_phy_abilities_resp abilities;
7440         struct i40e_aq_set_phy_config config = {0};
7441         bool non_zero_phy_type = is_up;
7442         struct i40e_hw *hw = &pf->hw;
7443         u64 mask;
7444         u8 speed;
7445         int err;
7446
7447         /* Card might've been put in an unstable state by other drivers
7448          * and applications, which causes incorrect speed values being
7449          * set on startup. In order to clear speed registers, we call
7450          * get_phy_capabilities twice, once to get initial state of
7451          * available speeds, and once to get current PHY config.
7452          */
7453         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7454                                            NULL);
7455         if (err) {
7456                 dev_err(&pf->pdev->dev,
7457                         "failed to get phy cap., ret =  %pe last_status =  %s\n",
7458                         ERR_PTR(err),
7459                         i40e_aq_str(hw, hw->aq.asq_last_status));
7460                 return err;
7461         }
7462         speed = abilities.link_speed;
7463
7464         /* Get the current phy config */
7465         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7466                                            NULL);
7467         if (err) {
7468                 dev_err(&pf->pdev->dev,
7469                         "failed to get phy cap., ret =  %pe last_status =  %s\n",
7470                         ERR_PTR(err),
7471                         i40e_aq_str(hw, hw->aq.asq_last_status));
7472                 return err;
7473         }
7474
7475         /* If link needs to go up, but was not forced to go down,
7476          * and its speed values are OK, no need for a flap
7477          * if non_zero_phy_type was set, still need to force up
7478          */
7479         if (test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags))
7480                 non_zero_phy_type = true;
7481         else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7482                 return 0;
7483
7484         /* To force link we need to set bits for all supported PHY types,
7485          * but there are now more than 32, so we need to split the bitmap
7486          * across two fields.
7487          */
7488         mask = I40E_PHY_TYPES_BITMASK;
7489         config.phy_type =
7490                 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7491         config.phy_type_ext =
7492                 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7493         /* Copy the old settings, except of phy_type */
7494         config.abilities = abilities.abilities;
7495         if (test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags)) {
7496                 if (is_up)
7497                         config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7498                 else
7499                         config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7500         }
7501         if (abilities.link_speed != 0)
7502                 config.link_speed = abilities.link_speed;
7503         else
7504                 config.link_speed = speed;
7505         config.eee_capability = abilities.eee_capability;
7506         config.eeer = abilities.eeer_val;
7507         config.low_power_ctrl = abilities.d3_lpan;
7508         config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7509                             I40E_AQ_PHY_FEC_CONFIG_MASK;
7510         err = i40e_aq_set_phy_config(hw, &config, NULL);
7511
7512         if (err) {
7513                 dev_err(&pf->pdev->dev,
7514                         "set phy config ret =  %pe last_status =  %s\n",
7515                         ERR_PTR(err),
7516                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7517                 return err;
7518         }
7519
7520         /* Update the link info */
7521         err = i40e_update_link_info(hw);
7522         if (err) {
7523                 /* Wait a little bit (on 40G cards it sometimes takes a really
7524                  * long time for link to come back from the atomic reset)
7525                  * and try once more
7526                  */
7527                 msleep(1000);
7528                 i40e_update_link_info(hw);
7529         }
7530
7531         i40e_aq_set_link_restart_an(hw, is_up, NULL);
7532
7533         return 0;
7534 }
7535
7536 /**
7537  * i40e_up - Bring the connection back up after being down
7538  * @vsi: the VSI being configured
7539  **/
7540 int i40e_up(struct i40e_vsi *vsi)
7541 {
7542         int err;
7543
7544         if (vsi->type == I40E_VSI_MAIN &&
7545             (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags) ||
7546              test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, vsi->back->flags)))
7547                 i40e_force_link_state(vsi->back, true);
7548
7549         err = i40e_vsi_configure(vsi);
7550         if (!err)
7551                 err = i40e_up_complete(vsi);
7552
7553         return err;
7554 }
7555
7556 /**
7557  * i40e_down - Shutdown the connection processing
7558  * @vsi: the VSI being stopped
7559  **/
7560 void i40e_down(struct i40e_vsi *vsi)
7561 {
7562         int i;
7563
7564         /* It is assumed that the caller of this function
7565          * sets the vsi->state __I40E_VSI_DOWN bit.
7566          */
7567         if (vsi->netdev) {
7568                 netif_carrier_off(vsi->netdev);
7569                 netif_tx_disable(vsi->netdev);
7570         }
7571         i40e_vsi_disable_irq(vsi);
7572         i40e_vsi_stop_rings(vsi);
7573         if (vsi->type == I40E_VSI_MAIN &&
7574            (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, vsi->back->flags) ||
7575             test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, vsi->back->flags)))
7576                 i40e_force_link_state(vsi->back, false);
7577         i40e_napi_disable_all(vsi);
7578
7579         for (i = 0; i < vsi->num_queue_pairs; i++) {
7580                 i40e_clean_tx_ring(vsi->tx_rings[i]);
7581                 if (i40e_enabled_xdp_vsi(vsi)) {
7582                         /* Make sure that in-progress ndo_xdp_xmit and
7583                          * ndo_xsk_wakeup calls are completed.
7584                          */
7585                         synchronize_rcu();
7586                         i40e_clean_tx_ring(vsi->xdp_rings[i]);
7587                 }
7588                 i40e_clean_rx_ring(vsi->rx_rings[i]);
7589         }
7590
7591 }
7592
7593 /**
7594  * i40e_validate_mqprio_qopt- validate queue mapping info
7595  * @vsi: the VSI being configured
7596  * @mqprio_qopt: queue parametrs
7597  **/
7598 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7599                                      struct tc_mqprio_qopt_offload *mqprio_qopt)
7600 {
7601         u64 sum_max_rate = 0;
7602         u64 max_rate = 0;
7603         int i;
7604
7605         if (mqprio_qopt->qopt.offset[0] != 0 ||
7606             mqprio_qopt->qopt.num_tc < 1 ||
7607             mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7608                 return -EINVAL;
7609         for (i = 0; ; i++) {
7610                 if (!mqprio_qopt->qopt.count[i])
7611                         return -EINVAL;
7612                 if (mqprio_qopt->min_rate[i]) {
7613                         dev_err(&vsi->back->pdev->dev,
7614                                 "Invalid min tx rate (greater than 0) specified\n");
7615                         return -EINVAL;
7616                 }
7617                 max_rate = mqprio_qopt->max_rate[i];
7618                 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7619                 sum_max_rate += max_rate;
7620
7621                 if (i >= mqprio_qopt->qopt.num_tc - 1)
7622                         break;
7623                 if (mqprio_qopt->qopt.offset[i + 1] !=
7624                     (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7625                         return -EINVAL;
7626         }
7627         if (vsi->num_queue_pairs <
7628             (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7629                 dev_err(&vsi->back->pdev->dev,
7630                         "Failed to create traffic channel, insufficient number of queues.\n");
7631                 return -EINVAL;
7632         }
7633         if (sum_max_rate > i40e_get_link_speed(vsi)) {
7634                 dev_err(&vsi->back->pdev->dev,
7635                         "Invalid max tx rate specified\n");
7636                 return -EINVAL;
7637         }
7638         return 0;
7639 }
7640
7641 /**
7642  * i40e_vsi_set_default_tc_config - set default values for tc configuration
7643  * @vsi: the VSI being configured
7644  **/
7645 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7646 {
7647         u16 qcount;
7648         int i;
7649
7650         /* Only TC0 is enabled */
7651         vsi->tc_config.numtc = 1;
7652         vsi->tc_config.enabled_tc = 1;
7653         qcount = min_t(int, vsi->alloc_queue_pairs,
7654                        i40e_pf_get_max_q_per_tc(vsi->back));
7655         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7656                 /* For the TC that is not enabled set the offset to default
7657                  * queue and allocate one queue for the given TC.
7658                  */
7659                 vsi->tc_config.tc_info[i].qoffset = 0;
7660                 if (i == 0)
7661                         vsi->tc_config.tc_info[i].qcount = qcount;
7662                 else
7663                         vsi->tc_config.tc_info[i].qcount = 1;
7664                 vsi->tc_config.tc_info[i].netdev_tc = 0;
7665         }
7666 }
7667
7668 /**
7669  * i40e_del_macvlan_filter
7670  * @hw: pointer to the HW structure
7671  * @seid: seid of the channel VSI
7672  * @macaddr: the mac address to apply as a filter
7673  * @aq_err: store the admin Q error
7674  *
7675  * This function deletes a mac filter on the channel VSI which serves as the
7676  * macvlan. Returns 0 on success.
7677  **/
7678 static int i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7679                                    const u8 *macaddr, int *aq_err)
7680 {
7681         struct i40e_aqc_remove_macvlan_element_data element;
7682         int status;
7683
7684         memset(&element, 0, sizeof(element));
7685         ether_addr_copy(element.mac_addr, macaddr);
7686         element.vlan_tag = 0;
7687         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7688         status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7689         *aq_err = hw->aq.asq_last_status;
7690
7691         return status;
7692 }
7693
7694 /**
7695  * i40e_add_macvlan_filter
7696  * @hw: pointer to the HW structure
7697  * @seid: seid of the channel VSI
7698  * @macaddr: the mac address to apply as a filter
7699  * @aq_err: store the admin Q error
7700  *
7701  * This function adds a mac filter on the channel VSI which serves as the
7702  * macvlan. Returns 0 on success.
7703  **/
7704 static int i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7705                                    const u8 *macaddr, int *aq_err)
7706 {
7707         struct i40e_aqc_add_macvlan_element_data element;
7708         u16 cmd_flags = 0;
7709         int status;
7710
7711         ether_addr_copy(element.mac_addr, macaddr);
7712         element.vlan_tag = 0;
7713         element.queue_number = 0;
7714         element.match_method = I40E_AQC_MM_ERR_NO_RES;
7715         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7716         element.flags = cpu_to_le16(cmd_flags);
7717         status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7718         *aq_err = hw->aq.asq_last_status;
7719
7720         return status;
7721 }
7722
7723 /**
7724  * i40e_reset_ch_rings - Reset the queue contexts in a channel
7725  * @vsi: the VSI we want to access
7726  * @ch: the channel we want to access
7727  */
7728 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7729 {
7730         struct i40e_ring *tx_ring, *rx_ring;
7731         u16 pf_q;
7732         int i;
7733
7734         for (i = 0; i < ch->num_queue_pairs; i++) {
7735                 pf_q = ch->base_queue + i;
7736                 tx_ring = vsi->tx_rings[pf_q];
7737                 tx_ring->ch = NULL;
7738                 rx_ring = vsi->rx_rings[pf_q];
7739                 rx_ring->ch = NULL;
7740         }
7741 }
7742
7743 /**
7744  * i40e_free_macvlan_channels
7745  * @vsi: the VSI we want to access
7746  *
7747  * This function frees the Qs of the channel VSI from
7748  * the stack and also deletes the channel VSIs which
7749  * serve as macvlans.
7750  */
7751 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7752 {
7753         struct i40e_channel *ch, *ch_tmp;
7754         int ret;
7755
7756         if (list_empty(&vsi->macvlan_list))
7757                 return;
7758
7759         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7760                 struct i40e_vsi *parent_vsi;
7761
7762                 if (i40e_is_channel_macvlan(ch)) {
7763                         i40e_reset_ch_rings(vsi, ch);
7764                         clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7765                         netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7766                         netdev_set_sb_channel(ch->fwd->netdev, 0);
7767                         kfree(ch->fwd);
7768                         ch->fwd = NULL;
7769                 }
7770
7771                 list_del(&ch->list);
7772                 parent_vsi = ch->parent_vsi;
7773                 if (!parent_vsi || !ch->initialized) {
7774                         kfree(ch);
7775                         continue;
7776                 }
7777
7778                 /* remove the VSI */
7779                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7780                                              NULL);
7781                 if (ret)
7782                         dev_err(&vsi->back->pdev->dev,
7783                                 "unable to remove channel (%d) for parent VSI(%d)\n",
7784                                 ch->seid, parent_vsi->seid);
7785                 kfree(ch);
7786         }
7787         vsi->macvlan_cnt = 0;
7788 }
7789
7790 /**
7791  * i40e_fwd_ring_up - bring the macvlan device up
7792  * @vsi: the VSI we want to access
7793  * @vdev: macvlan netdevice
7794  * @fwd: the private fwd structure
7795  */
7796 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7797                             struct i40e_fwd_adapter *fwd)
7798 {
7799         struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7800         int ret = 0, num_tc = 1,  i, aq_err;
7801         struct i40e_pf *pf = vsi->back;
7802         struct i40e_hw *hw = &pf->hw;
7803
7804         /* Go through the list and find an available channel */
7805         list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7806                 if (!i40e_is_channel_macvlan(iter)) {
7807                         iter->fwd = fwd;
7808                         /* record configuration for macvlan interface in vdev */
7809                         for (i = 0; i < num_tc; i++)
7810                                 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7811                                                              i,
7812                                                              iter->num_queue_pairs,
7813                                                              iter->base_queue);
7814                         for (i = 0; i < iter->num_queue_pairs; i++) {
7815                                 struct i40e_ring *tx_ring, *rx_ring;
7816                                 u16 pf_q;
7817
7818                                 pf_q = iter->base_queue + i;
7819
7820                                 /* Get to TX ring ptr */
7821                                 tx_ring = vsi->tx_rings[pf_q];
7822                                 tx_ring->ch = iter;
7823
7824                                 /* Get the RX ring ptr */
7825                                 rx_ring = vsi->rx_rings[pf_q];
7826                                 rx_ring->ch = iter;
7827                         }
7828                         ch = iter;
7829                         break;
7830                 }
7831         }
7832
7833         if (!ch)
7834                 return -EINVAL;
7835
7836         /* Guarantee all rings are updated before we update the
7837          * MAC address filter.
7838          */
7839         wmb();
7840
7841         /* Add a mac filter */
7842         ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7843         if (ret) {
7844                 /* if we cannot add the MAC rule then disable the offload */
7845                 macvlan_release_l2fw_offload(vdev);
7846                 for (i = 0; i < ch->num_queue_pairs; i++) {
7847                         struct i40e_ring *rx_ring;
7848                         u16 pf_q;
7849
7850                         pf_q = ch->base_queue + i;
7851                         rx_ring = vsi->rx_rings[pf_q];
7852                         rx_ring->netdev = NULL;
7853                 }
7854                 dev_info(&pf->pdev->dev,
7855                          "Error adding mac filter on macvlan err %pe, aq_err %s\n",
7856                           ERR_PTR(ret),
7857                           i40e_aq_str(hw, aq_err));
7858                 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7859         }
7860
7861         return ret;
7862 }
7863
7864 /**
7865  * i40e_setup_macvlans - create the channels which will be macvlans
7866  * @vsi: the VSI we want to access
7867  * @macvlan_cnt: no. of macvlans to be setup
7868  * @qcnt: no. of Qs per macvlan
7869  * @vdev: macvlan netdevice
7870  */
7871 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7872                                struct net_device *vdev)
7873 {
7874         struct i40e_pf *pf = vsi->back;
7875         struct i40e_hw *hw = &pf->hw;
7876         struct i40e_vsi_context ctxt;
7877         u16 sections, qmap, num_qps;
7878         struct i40e_channel *ch;
7879         int i, pow, ret = 0;
7880         u8 offset = 0;
7881
7882         if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7883                 return -EINVAL;
7884
7885         num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7886
7887         /* find the next higher power-of-2 of num queue pairs */
7888         pow = fls(roundup_pow_of_two(num_qps) - 1);
7889
7890         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7891                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7892
7893         /* Setup context bits for the main VSI */
7894         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7895         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7896         memset(&ctxt, 0, sizeof(ctxt));
7897         ctxt.seid = vsi->seid;
7898         ctxt.pf_num = vsi->back->hw.pf_id;
7899         ctxt.vf_num = 0;
7900         ctxt.uplink_seid = vsi->uplink_seid;
7901         ctxt.info = vsi->info;
7902         ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7903         ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7904         ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7905         ctxt.info.valid_sections |= cpu_to_le16(sections);
7906
7907         /* Reconfigure RSS for main VSI with new max queue count */
7908         vsi->rss_size = max_t(u16, num_qps, qcnt);
7909         ret = i40e_vsi_config_rss(vsi);
7910         if (ret) {
7911                 dev_info(&pf->pdev->dev,
7912                          "Failed to reconfig RSS for num_queues (%u)\n",
7913                          vsi->rss_size);
7914                 return ret;
7915         }
7916         vsi->reconfig_rss = true;
7917         dev_dbg(&vsi->back->pdev->dev,
7918                 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7919         vsi->next_base_queue = num_qps;
7920         vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7921
7922         /* Update the VSI after updating the VSI queue-mapping
7923          * information
7924          */
7925         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7926         if (ret) {
7927                 dev_info(&pf->pdev->dev,
7928                          "Update vsi tc config failed, err %pe aq_err %s\n",
7929                          ERR_PTR(ret),
7930                          i40e_aq_str(hw, hw->aq.asq_last_status));
7931                 return ret;
7932         }
7933         /* update the local VSI info with updated queue map */
7934         i40e_vsi_update_queue_map(vsi, &ctxt);
7935         vsi->info.valid_sections = 0;
7936
7937         /* Create channels for macvlans */
7938         INIT_LIST_HEAD(&vsi->macvlan_list);
7939         for (i = 0; i < macvlan_cnt; i++) {
7940                 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7941                 if (!ch) {
7942                         ret = -ENOMEM;
7943                         goto err_free;
7944                 }
7945                 INIT_LIST_HEAD(&ch->list);
7946                 ch->num_queue_pairs = qcnt;
7947                 if (!i40e_setup_channel(pf, vsi, ch)) {
7948                         ret = -EINVAL;
7949                         kfree(ch);
7950                         goto err_free;
7951                 }
7952                 ch->parent_vsi = vsi;
7953                 vsi->cnt_q_avail -= ch->num_queue_pairs;
7954                 vsi->macvlan_cnt++;
7955                 list_add_tail(&ch->list, &vsi->macvlan_list);
7956         }
7957
7958         return ret;
7959
7960 err_free:
7961         dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7962         i40e_free_macvlan_channels(vsi);
7963
7964         return ret;
7965 }
7966
7967 /**
7968  * i40e_fwd_add - configure macvlans
7969  * @netdev: net device to configure
7970  * @vdev: macvlan netdevice
7971  **/
7972 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7973 {
7974         struct i40e_netdev_priv *np = netdev_priv(netdev);
7975         u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7976         struct i40e_vsi *vsi = np->vsi;
7977         struct i40e_pf *pf = vsi->back;
7978         struct i40e_fwd_adapter *fwd;
7979         int avail_macvlan, ret;
7980
7981         if (test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
7982                 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7983                 return ERR_PTR(-EINVAL);
7984         }
7985         if (i40e_is_tc_mqprio_enabled(pf)) {
7986                 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7987                 return ERR_PTR(-EINVAL);
7988         }
7989         if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7990                 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7991                 return ERR_PTR(-EINVAL);
7992         }
7993
7994         /* The macvlan device has to be a single Q device so that the
7995          * tc_to_txq field can be reused to pick the tx queue.
7996          */
7997         if (netif_is_multiqueue(vdev))
7998                 return ERR_PTR(-ERANGE);
7999
8000         if (!vsi->macvlan_cnt) {
8001                 /* reserve bit 0 for the pf device */
8002                 set_bit(0, vsi->fwd_bitmask);
8003
8004                 /* Try to reserve as many queues as possible for macvlans. First
8005                  * reserve 3/4th of max vectors, then half, then quarter and
8006                  * calculate Qs per macvlan as you go
8007                  */
8008                 vectors = pf->num_lan_msix;
8009                 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
8010                         /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
8011                         q_per_macvlan = 4;
8012                         macvlan_cnt = (vectors - 32) / 4;
8013                 } else if (vectors <= 64 && vectors > 32) {
8014                         /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
8015                         q_per_macvlan = 2;
8016                         macvlan_cnt = (vectors - 16) / 2;
8017                 } else if (vectors <= 32 && vectors > 16) {
8018                         /* allocate 1 Q per macvlan and 16 Qs to the PF*/
8019                         q_per_macvlan = 1;
8020                         macvlan_cnt = vectors - 16;
8021                 } else if (vectors <= 16 && vectors > 8) {
8022                         /* allocate 1 Q per macvlan and 8 Qs to the PF */
8023                         q_per_macvlan = 1;
8024                         macvlan_cnt = vectors - 8;
8025                 } else {
8026                         /* allocate 1 Q per macvlan and 1 Q to the PF */
8027                         q_per_macvlan = 1;
8028                         macvlan_cnt = vectors - 1;
8029                 }
8030
8031                 if (macvlan_cnt == 0)
8032                         return ERR_PTR(-EBUSY);
8033
8034                 /* Quiesce VSI queues */
8035                 i40e_quiesce_vsi(vsi);
8036
8037                 /* sets up the macvlans but does not "enable" them */
8038                 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
8039                                           vdev);
8040                 if (ret)
8041                         return ERR_PTR(ret);
8042
8043                 /* Unquiesce VSI */
8044                 i40e_unquiesce_vsi(vsi);
8045         }
8046         avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
8047                                             vsi->macvlan_cnt);
8048         if (avail_macvlan >= I40E_MAX_MACVLANS)
8049                 return ERR_PTR(-EBUSY);
8050
8051         /* create the fwd struct */
8052         fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
8053         if (!fwd)
8054                 return ERR_PTR(-ENOMEM);
8055
8056         set_bit(avail_macvlan, vsi->fwd_bitmask);
8057         fwd->bit_no = avail_macvlan;
8058         netdev_set_sb_channel(vdev, avail_macvlan);
8059         fwd->netdev = vdev;
8060
8061         if (!netif_running(netdev))
8062                 return fwd;
8063
8064         /* Set fwd ring up */
8065         ret = i40e_fwd_ring_up(vsi, vdev, fwd);
8066         if (ret) {
8067                 /* unbind the queues and drop the subordinate channel config */
8068                 netdev_unbind_sb_channel(netdev, vdev);
8069                 netdev_set_sb_channel(vdev, 0);
8070
8071                 kfree(fwd);
8072                 return ERR_PTR(-EINVAL);
8073         }
8074
8075         return fwd;
8076 }
8077
8078 /**
8079  * i40e_del_all_macvlans - Delete all the mac filters on the channels
8080  * @vsi: the VSI we want to access
8081  */
8082 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
8083 {
8084         struct i40e_channel *ch, *ch_tmp;
8085         struct i40e_pf *pf = vsi->back;
8086         struct i40e_hw *hw = &pf->hw;
8087         int aq_err, ret = 0;
8088
8089         if (list_empty(&vsi->macvlan_list))
8090                 return;
8091
8092         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8093                 if (i40e_is_channel_macvlan(ch)) {
8094                         ret = i40e_del_macvlan_filter(hw, ch->seid,
8095                                                       i40e_channel_mac(ch),
8096                                                       &aq_err);
8097                         if (!ret) {
8098                                 /* Reset queue contexts */
8099                                 i40e_reset_ch_rings(vsi, ch);
8100                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8101                                 netdev_unbind_sb_channel(vsi->netdev,
8102                                                          ch->fwd->netdev);
8103                                 netdev_set_sb_channel(ch->fwd->netdev, 0);
8104                                 kfree(ch->fwd);
8105                                 ch->fwd = NULL;
8106                         }
8107                 }
8108         }
8109 }
8110
8111 /**
8112  * i40e_fwd_del - delete macvlan interfaces
8113  * @netdev: net device to configure
8114  * @vdev: macvlan netdevice
8115  */
8116 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
8117 {
8118         struct i40e_netdev_priv *np = netdev_priv(netdev);
8119         struct i40e_fwd_adapter *fwd = vdev;
8120         struct i40e_channel *ch, *ch_tmp;
8121         struct i40e_vsi *vsi = np->vsi;
8122         struct i40e_pf *pf = vsi->back;
8123         struct i40e_hw *hw = &pf->hw;
8124         int aq_err, ret = 0;
8125
8126         /* Find the channel associated with the macvlan and del mac filter */
8127         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8128                 if (i40e_is_channel_macvlan(ch) &&
8129                     ether_addr_equal(i40e_channel_mac(ch),
8130                                      fwd->netdev->dev_addr)) {
8131                         ret = i40e_del_macvlan_filter(hw, ch->seid,
8132                                                       i40e_channel_mac(ch),
8133                                                       &aq_err);
8134                         if (!ret) {
8135                                 /* Reset queue contexts */
8136                                 i40e_reset_ch_rings(vsi, ch);
8137                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8138                                 netdev_unbind_sb_channel(netdev, fwd->netdev);
8139                                 netdev_set_sb_channel(fwd->netdev, 0);
8140                                 kfree(ch->fwd);
8141                                 ch->fwd = NULL;
8142                         } else {
8143                                 dev_info(&pf->pdev->dev,
8144                                          "Error deleting mac filter on macvlan err %pe, aq_err %s\n",
8145                                           ERR_PTR(ret),
8146                                           i40e_aq_str(hw, aq_err));
8147                         }
8148                         break;
8149                 }
8150         }
8151 }
8152
8153 /**
8154  * i40e_setup_tc - configure multiple traffic classes
8155  * @netdev: net device to configure
8156  * @type_data: tc offload data
8157  **/
8158 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
8159 {
8160         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
8161         struct i40e_netdev_priv *np = netdev_priv(netdev);
8162         struct i40e_vsi *vsi = np->vsi;
8163         struct i40e_pf *pf = vsi->back;
8164         u8 enabled_tc = 0, num_tc, hw;
8165         bool need_reset = false;
8166         int old_queue_pairs;
8167         int ret = -EINVAL;
8168         u16 mode;
8169         int i;
8170
8171         old_queue_pairs = vsi->num_queue_pairs;
8172         num_tc = mqprio_qopt->qopt.num_tc;
8173         hw = mqprio_qopt->qopt.hw;
8174         mode = mqprio_qopt->mode;
8175         if (!hw) {
8176                 clear_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
8177                 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8178                 goto config_tc;
8179         }
8180
8181         /* Check if MFP enabled */
8182         if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
8183                 netdev_info(netdev,
8184                             "Configuring TC not supported in MFP mode\n");
8185                 return ret;
8186         }
8187         switch (mode) {
8188         case TC_MQPRIO_MODE_DCB:
8189                 clear_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
8190
8191                 /* Check if DCB enabled to continue */
8192                 if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8193                         netdev_info(netdev,
8194                                     "DCB is not enabled for adapter\n");
8195                         return ret;
8196                 }
8197
8198                 /* Check whether tc count is within enabled limit */
8199                 if (num_tc > i40e_pf_get_num_tc(pf)) {
8200                         netdev_info(netdev,
8201                                     "TC count greater than enabled on link for adapter\n");
8202                         return ret;
8203                 }
8204                 break;
8205         case TC_MQPRIO_MODE_CHANNEL:
8206                 if (test_bit(I40E_FLAG_DCB_ENA, pf->flags)) {
8207                         netdev_info(netdev,
8208                                     "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8209                         return ret;
8210                 }
8211                 if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
8212                         return ret;
8213                 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8214                 if (ret)
8215                         return ret;
8216                 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8217                        sizeof(*mqprio_qopt));
8218                 set_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
8219                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
8220                 break;
8221         default:
8222                 return -EINVAL;
8223         }
8224
8225 config_tc:
8226         /* Generate TC map for number of tc requested */
8227         for (i = 0; i < num_tc; i++)
8228                 enabled_tc |= BIT(i);
8229
8230         /* Requesting same TC configuration as already enabled */
8231         if (enabled_tc == vsi->tc_config.enabled_tc &&
8232             mode != TC_MQPRIO_MODE_CHANNEL)
8233                 return 0;
8234
8235         /* Quiesce VSI queues */
8236         i40e_quiesce_vsi(vsi);
8237
8238         if (!hw && !i40e_is_tc_mqprio_enabled(pf))
8239                 i40e_remove_queue_channels(vsi);
8240
8241         /* Configure VSI for enabled TCs */
8242         ret = i40e_vsi_config_tc(vsi, enabled_tc);
8243         if (ret) {
8244                 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8245                             vsi->seid);
8246                 need_reset = true;
8247                 goto exit;
8248         } else if (enabled_tc &&
8249                    (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8250                 netdev_info(netdev,
8251                             "Failed to create channel. Override queues (%u) not power of 2\n",
8252                             vsi->tc_config.tc_info[0].qcount);
8253                 ret = -EINVAL;
8254                 need_reset = true;
8255                 goto exit;
8256         }
8257
8258         dev_info(&vsi->back->pdev->dev,
8259                  "Setup channel (id:%u) utilizing num_queues %d\n",
8260                  vsi->seid, vsi->tc_config.tc_info[0].qcount);
8261
8262         if (i40e_is_tc_mqprio_enabled(pf)) {
8263                 if (vsi->mqprio_qopt.max_rate[0]) {
8264                         u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
8265                                                   vsi->mqprio_qopt.max_rate[0]);
8266
8267                         ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8268                         if (!ret) {
8269                                 u64 credits = max_tx_rate;
8270
8271                                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8272                                 dev_dbg(&vsi->back->pdev->dev,
8273                                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8274                                         max_tx_rate,
8275                                         credits,
8276                                         vsi->seid);
8277                         } else {
8278                                 need_reset = true;
8279                                 goto exit;
8280                         }
8281                 }
8282                 ret = i40e_configure_queue_channels(vsi);
8283                 if (ret) {
8284                         vsi->num_queue_pairs = old_queue_pairs;
8285                         netdev_info(netdev,
8286                                     "Failed configuring queue channels\n");
8287                         need_reset = true;
8288                         goto exit;
8289                 }
8290         }
8291
8292 exit:
8293         /* Reset the configuration data to defaults, only TC0 is enabled */
8294         if (need_reset) {
8295                 i40e_vsi_set_default_tc_config(vsi);
8296                 need_reset = false;
8297         }
8298
8299         /* Unquiesce VSI */
8300         i40e_unquiesce_vsi(vsi);
8301         return ret;
8302 }
8303
8304 /**
8305  * i40e_set_cld_element - sets cloud filter element data
8306  * @filter: cloud filter rule
8307  * @cld: ptr to cloud filter element data
8308  *
8309  * This is helper function to copy data into cloud filter element
8310  **/
8311 static inline void
8312 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8313                      struct i40e_aqc_cloud_filters_element_data *cld)
8314 {
8315         u32 ipa;
8316         int i;
8317
8318         memset(cld, 0, sizeof(*cld));
8319         ether_addr_copy(cld->outer_mac, filter->dst_mac);
8320         ether_addr_copy(cld->inner_mac, filter->src_mac);
8321
8322         if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8323                 return;
8324
8325         if (filter->n_proto == ETH_P_IPV6) {
8326 #define IPV6_MAX_INDEX  (ARRAY_SIZE(filter->dst_ipv6) - 1)
8327                 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8328                         ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8329
8330                         *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8331                 }
8332         } else {
8333                 ipa = be32_to_cpu(filter->dst_ipv4);
8334
8335                 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8336         }
8337
8338         cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8339
8340         /* tenant_id is not supported by FW now, once the support is enabled
8341          * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8342          */
8343         if (filter->tenant_id)
8344                 return;
8345 }
8346
8347 /**
8348  * i40e_add_del_cloud_filter - Add/del cloud filter
8349  * @vsi: pointer to VSI
8350  * @filter: cloud filter rule
8351  * @add: if true, add, if false, delete
8352  *
8353  * Add or delete a cloud filter for a specific flow spec.
8354  * Returns 0 if the filter were successfully added.
8355  **/
8356 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8357                               struct i40e_cloud_filter *filter, bool add)
8358 {
8359         struct i40e_aqc_cloud_filters_element_data cld_filter;
8360         struct i40e_pf *pf = vsi->back;
8361         int ret;
8362         static const u16 flag_table[128] = {
8363                 [I40E_CLOUD_FILTER_FLAGS_OMAC]  =
8364                         I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8365                 [I40E_CLOUD_FILTER_FLAGS_IMAC]  =
8366                         I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8367                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN]  =
8368                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8369                 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8370                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8371                 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8372                         I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8373                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8374                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8375                 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8376                         I40E_AQC_ADD_CLOUD_FILTER_IIP,
8377         };
8378
8379         if (filter->flags >= ARRAY_SIZE(flag_table))
8380                 return -EIO;
8381
8382         memset(&cld_filter, 0, sizeof(cld_filter));
8383
8384         /* copy element needed to add cloud filter from filter */
8385         i40e_set_cld_element(filter, &cld_filter);
8386
8387         if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8388                 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8389                                              I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8390
8391         if (filter->n_proto == ETH_P_IPV6)
8392                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8393                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8394         else
8395                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8396                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8397
8398         if (add)
8399                 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8400                                                 &cld_filter, 1);
8401         else
8402                 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8403                                                 &cld_filter, 1);
8404         if (ret)
8405                 dev_dbg(&pf->pdev->dev,
8406                         "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8407                         add ? "add" : "delete", filter->dst_port, ret,
8408                         pf->hw.aq.asq_last_status);
8409         else
8410                 dev_info(&pf->pdev->dev,
8411                          "%s cloud filter for VSI: %d\n",
8412                          add ? "Added" : "Deleted", filter->seid);
8413         return ret;
8414 }
8415
8416 /**
8417  * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8418  * @vsi: pointer to VSI
8419  * @filter: cloud filter rule
8420  * @add: if true, add, if false, delete
8421  *
8422  * Add or delete a cloud filter for a specific flow spec using big buffer.
8423  * Returns 0 if the filter were successfully added.
8424  **/
8425 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8426                                       struct i40e_cloud_filter *filter,
8427                                       bool add)
8428 {
8429         struct i40e_aqc_cloud_filters_element_bb cld_filter;
8430         struct i40e_pf *pf = vsi->back;
8431         int ret;
8432
8433         /* Both (src/dst) valid mac_addr are not supported */
8434         if ((is_valid_ether_addr(filter->dst_mac) &&
8435              is_valid_ether_addr(filter->src_mac)) ||
8436             (is_multicast_ether_addr(filter->dst_mac) &&
8437              is_multicast_ether_addr(filter->src_mac)))
8438                 return -EOPNOTSUPP;
8439
8440         /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8441          * ports are not supported via big buffer now.
8442          */
8443         if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8444                 return -EOPNOTSUPP;
8445
8446         /* adding filter using src_port/src_ip is not supported at this stage */
8447         if (filter->src_port ||
8448             (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8449             !ipv6_addr_any(&filter->ip.v6.src_ip6))
8450                 return -EOPNOTSUPP;
8451
8452         memset(&cld_filter, 0, sizeof(cld_filter));
8453
8454         /* copy element needed to add cloud filter from filter */
8455         i40e_set_cld_element(filter, &cld_filter.element);
8456
8457         if (is_valid_ether_addr(filter->dst_mac) ||
8458             is_valid_ether_addr(filter->src_mac) ||
8459             is_multicast_ether_addr(filter->dst_mac) ||
8460             is_multicast_ether_addr(filter->src_mac)) {
8461                 /* MAC + IP : unsupported mode */
8462                 if (filter->dst_ipv4)
8463                         return -EOPNOTSUPP;
8464
8465                 /* since we validated that L4 port must be valid before
8466                  * we get here, start with respective "flags" value
8467                  * and update if vlan is present or not
8468                  */
8469                 cld_filter.element.flags =
8470                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8471
8472                 if (filter->vlan_id) {
8473                         cld_filter.element.flags =
8474                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8475                 }
8476
8477         } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8478                    !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8479                 cld_filter.element.flags =
8480                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8481                 if (filter->n_proto == ETH_P_IPV6)
8482                         cld_filter.element.flags |=
8483                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8484                 else
8485                         cld_filter.element.flags |=
8486                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8487         } else {
8488                 dev_err(&pf->pdev->dev,
8489                         "either mac or ip has to be valid for cloud filter\n");
8490                 return -EINVAL;
8491         }
8492
8493         /* Now copy L4 port in Byte 6..7 in general fields */
8494         cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8495                                                 be16_to_cpu(filter->dst_port);
8496
8497         if (add) {
8498                 /* Validate current device switch mode, change if necessary */
8499                 ret = i40e_validate_and_set_switch_mode(vsi);
8500                 if (ret) {
8501                         dev_err(&pf->pdev->dev,
8502                                 "failed to set switch mode, ret %d\n",
8503                                 ret);
8504                         return ret;
8505                 }
8506
8507                 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8508                                                    &cld_filter, 1);
8509         } else {
8510                 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8511                                                    &cld_filter, 1);
8512         }
8513
8514         if (ret)
8515                 dev_dbg(&pf->pdev->dev,
8516                         "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8517                         add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8518         else
8519                 dev_info(&pf->pdev->dev,
8520                          "%s cloud filter for VSI: %d, L4 port: %d\n",
8521                          add ? "add" : "delete", filter->seid,
8522                          ntohs(filter->dst_port));
8523         return ret;
8524 }
8525
8526 /**
8527  * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8528  * @vsi: Pointer to VSI
8529  * @f: Pointer to struct flow_cls_offload
8530  * @filter: Pointer to cloud filter structure
8531  *
8532  **/
8533 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8534                                  struct flow_cls_offload *f,
8535                                  struct i40e_cloud_filter *filter)
8536 {
8537         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8538         struct flow_dissector *dissector = rule->match.dissector;
8539         u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8540         struct i40e_pf *pf = vsi->back;
8541         u8 field_flags = 0;
8542
8543         if (dissector->used_keys &
8544             ~(BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
8545               BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
8546               BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8547               BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |
8548               BIT_ULL(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8549               BIT_ULL(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8550               BIT_ULL(FLOW_DISSECTOR_KEY_PORTS) |
8551               BIT_ULL(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8552                 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%llx\n",
8553                         dissector->used_keys);
8554                 return -EOPNOTSUPP;
8555         }
8556
8557         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8558                 struct flow_match_enc_keyid match;
8559
8560                 flow_rule_match_enc_keyid(rule, &match);
8561                 if (match.mask->keyid != 0)
8562                         field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8563
8564                 filter->tenant_id = be32_to_cpu(match.key->keyid);
8565         }
8566
8567         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8568                 struct flow_match_basic match;
8569
8570                 flow_rule_match_basic(rule, &match);
8571                 n_proto_key = ntohs(match.key->n_proto);
8572                 n_proto_mask = ntohs(match.mask->n_proto);
8573
8574                 if (n_proto_key == ETH_P_ALL) {
8575                         n_proto_key = 0;
8576                         n_proto_mask = 0;
8577                 }
8578                 filter->n_proto = n_proto_key & n_proto_mask;
8579                 filter->ip_proto = match.key->ip_proto;
8580         }
8581
8582         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8583                 struct flow_match_eth_addrs match;
8584
8585                 flow_rule_match_eth_addrs(rule, &match);
8586
8587                 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8588                 if (!is_zero_ether_addr(match.mask->dst)) {
8589                         if (is_broadcast_ether_addr(match.mask->dst)) {
8590                                 field_flags |= I40E_CLOUD_FIELD_OMAC;
8591                         } else {
8592                                 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8593                                         match.mask->dst);
8594                                 return -EIO;
8595                         }
8596                 }
8597
8598                 if (!is_zero_ether_addr(match.mask->src)) {
8599                         if (is_broadcast_ether_addr(match.mask->src)) {
8600                                 field_flags |= I40E_CLOUD_FIELD_IMAC;
8601                         } else {
8602                                 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8603                                         match.mask->src);
8604                                 return -EIO;
8605                         }
8606                 }
8607                 ether_addr_copy(filter->dst_mac, match.key->dst);
8608                 ether_addr_copy(filter->src_mac, match.key->src);
8609         }
8610
8611         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8612                 struct flow_match_vlan match;
8613
8614                 flow_rule_match_vlan(rule, &match);
8615                 if (match.mask->vlan_id) {
8616                         if (match.mask->vlan_id == VLAN_VID_MASK) {
8617                                 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8618
8619                         } else {
8620                                 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8621                                         match.mask->vlan_id);
8622                                 return -EIO;
8623                         }
8624                 }
8625
8626                 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8627         }
8628
8629         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8630                 struct flow_match_control match;
8631
8632                 flow_rule_match_control(rule, &match);
8633                 addr_type = match.key->addr_type;
8634         }
8635
8636         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8637                 struct flow_match_ipv4_addrs match;
8638
8639                 flow_rule_match_ipv4_addrs(rule, &match);
8640                 if (match.mask->dst) {
8641                         if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8642                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8643                         } else {
8644                                 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8645                                         &match.mask->dst);
8646                                 return -EIO;
8647                         }
8648                 }
8649
8650                 if (match.mask->src) {
8651                         if (match.mask->src == cpu_to_be32(0xffffffff)) {
8652                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8653                         } else {
8654                                 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8655                                         &match.mask->src);
8656                                 return -EIO;
8657                         }
8658                 }
8659
8660                 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8661                         dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8662                         return -EIO;
8663                 }
8664                 filter->dst_ipv4 = match.key->dst;
8665                 filter->src_ipv4 = match.key->src;
8666         }
8667
8668         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8669                 struct flow_match_ipv6_addrs match;
8670
8671                 flow_rule_match_ipv6_addrs(rule, &match);
8672
8673                 /* src and dest IPV6 address should not be LOOPBACK
8674                  * (0:0:0:0:0:0:0:1), which can be represented as ::1
8675                  */
8676                 if (ipv6_addr_loopback(&match.key->dst) ||
8677                     ipv6_addr_loopback(&match.key->src)) {
8678                         dev_err(&pf->pdev->dev,
8679                                 "Bad ipv6, addr is LOOPBACK\n");
8680                         return -EIO;
8681                 }
8682                 if (!ipv6_addr_any(&match.mask->dst) ||
8683                     !ipv6_addr_any(&match.mask->src))
8684                         field_flags |= I40E_CLOUD_FIELD_IIP;
8685
8686                 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8687                        sizeof(filter->src_ipv6));
8688                 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8689                        sizeof(filter->dst_ipv6));
8690         }
8691
8692         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8693                 struct flow_match_ports match;
8694
8695                 flow_rule_match_ports(rule, &match);
8696                 if (match.mask->src) {
8697                         if (match.mask->src == cpu_to_be16(0xffff)) {
8698                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8699                         } else {
8700                                 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8701                                         be16_to_cpu(match.mask->src));
8702                                 return -EIO;
8703                         }
8704                 }
8705
8706                 if (match.mask->dst) {
8707                         if (match.mask->dst == cpu_to_be16(0xffff)) {
8708                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8709                         } else {
8710                                 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8711                                         be16_to_cpu(match.mask->dst));
8712                                 return -EIO;
8713                         }
8714                 }
8715
8716                 filter->dst_port = match.key->dst;
8717                 filter->src_port = match.key->src;
8718
8719                 switch (filter->ip_proto) {
8720                 case IPPROTO_TCP:
8721                 case IPPROTO_UDP:
8722                         break;
8723                 default:
8724                         dev_err(&pf->pdev->dev,
8725                                 "Only UDP and TCP transport are supported\n");
8726                         return -EINVAL;
8727                 }
8728         }
8729         filter->flags = field_flags;
8730         return 0;
8731 }
8732
8733 /**
8734  * i40e_handle_tclass: Forward to a traffic class on the device
8735  * @vsi: Pointer to VSI
8736  * @tc: traffic class index on the device
8737  * @filter: Pointer to cloud filter structure
8738  *
8739  **/
8740 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8741                               struct i40e_cloud_filter *filter)
8742 {
8743         struct i40e_channel *ch, *ch_tmp;
8744
8745         /* direct to a traffic class on the same device */
8746         if (tc == 0) {
8747                 filter->seid = vsi->seid;
8748                 return 0;
8749         } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8750                 if (!filter->dst_port) {
8751                         dev_err(&vsi->back->pdev->dev,
8752                                 "Specify destination port to direct to traffic class that is not default\n");
8753                         return -EINVAL;
8754                 }
8755                 if (list_empty(&vsi->ch_list))
8756                         return -EINVAL;
8757                 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8758                                          list) {
8759                         if (ch->seid == vsi->tc_seid_map[tc])
8760                                 filter->seid = ch->seid;
8761                 }
8762                 return 0;
8763         }
8764         dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8765         return -EINVAL;
8766 }
8767
8768 /**
8769  * i40e_configure_clsflower - Configure tc flower filters
8770  * @vsi: Pointer to VSI
8771  * @cls_flower: Pointer to struct flow_cls_offload
8772  *
8773  **/
8774 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8775                                     struct flow_cls_offload *cls_flower)
8776 {
8777         int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8778         struct i40e_cloud_filter *filter = NULL;
8779         struct i40e_pf *pf = vsi->back;
8780         int err = 0;
8781
8782         if (tc < 0) {
8783                 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8784                 return -EOPNOTSUPP;
8785         }
8786
8787         if (!tc) {
8788                 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8789                 return -EINVAL;
8790         }
8791
8792         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8793             test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8794                 return -EBUSY;
8795
8796         if (pf->fdir_pf_active_filters ||
8797             (!hlist_empty(&pf->fdir_filter_list))) {
8798                 dev_err(&vsi->back->pdev->dev,
8799                         "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8800                 return -EINVAL;
8801         }
8802
8803         if (test_bit(I40E_FLAG_FD_SB_ENA, vsi->back->flags)) {
8804                 dev_err(&vsi->back->pdev->dev,
8805                         "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8806                 clear_bit(I40E_FLAG_FD_SB_ENA, vsi->back->flags);
8807                 clear_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, vsi->back->flags);
8808         }
8809
8810         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8811         if (!filter)
8812                 return -ENOMEM;
8813
8814         filter->cookie = cls_flower->cookie;
8815
8816         err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8817         if (err < 0)
8818                 goto err;
8819
8820         err = i40e_handle_tclass(vsi, tc, filter);
8821         if (err < 0)
8822                 goto err;
8823
8824         /* Add cloud filter */
8825         if (filter->dst_port)
8826                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8827         else
8828                 err = i40e_add_del_cloud_filter(vsi, filter, true);
8829
8830         if (err) {
8831                 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8832                         err);
8833                 goto err;
8834         }
8835
8836         /* add filter to the ordered list */
8837         INIT_HLIST_NODE(&filter->cloud_node);
8838
8839         hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8840
8841         pf->num_cloud_filters++;
8842
8843         return err;
8844 err:
8845         kfree(filter);
8846         return err;
8847 }
8848
8849 /**
8850  * i40e_find_cloud_filter - Find the could filter in the list
8851  * @vsi: Pointer to VSI
8852  * @cookie: filter specific cookie
8853  *
8854  **/
8855 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8856                                                         unsigned long *cookie)
8857 {
8858         struct i40e_cloud_filter *filter = NULL;
8859         struct hlist_node *node2;
8860
8861         hlist_for_each_entry_safe(filter, node2,
8862                                   &vsi->back->cloud_filter_list, cloud_node)
8863                 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8864                         return filter;
8865         return NULL;
8866 }
8867
8868 /**
8869  * i40e_delete_clsflower - Remove tc flower filters
8870  * @vsi: Pointer to VSI
8871  * @cls_flower: Pointer to struct flow_cls_offload
8872  *
8873  **/
8874 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8875                                  struct flow_cls_offload *cls_flower)
8876 {
8877         struct i40e_cloud_filter *filter = NULL;
8878         struct i40e_pf *pf = vsi->back;
8879         int err = 0;
8880
8881         filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8882
8883         if (!filter)
8884                 return -EINVAL;
8885
8886         hash_del(&filter->cloud_node);
8887
8888         if (filter->dst_port)
8889                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8890         else
8891                 err = i40e_add_del_cloud_filter(vsi, filter, false);
8892
8893         kfree(filter);
8894         if (err) {
8895                 dev_err(&pf->pdev->dev,
8896                         "Failed to delete cloud filter, err %pe\n",
8897                         ERR_PTR(err));
8898                 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8899         }
8900
8901         pf->num_cloud_filters--;
8902         if (!pf->num_cloud_filters)
8903                 if (test_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags) &&
8904                     !test_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags)) {
8905                         set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
8906                         clear_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags);
8907                         clear_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
8908                 }
8909         return 0;
8910 }
8911
8912 /**
8913  * i40e_setup_tc_cls_flower - flower classifier offloads
8914  * @np: net device to configure
8915  * @cls_flower: offload data
8916  **/
8917 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8918                                     struct flow_cls_offload *cls_flower)
8919 {
8920         struct i40e_vsi *vsi = np->vsi;
8921
8922         switch (cls_flower->command) {
8923         case FLOW_CLS_REPLACE:
8924                 return i40e_configure_clsflower(vsi, cls_flower);
8925         case FLOW_CLS_DESTROY:
8926                 return i40e_delete_clsflower(vsi, cls_flower);
8927         case FLOW_CLS_STATS:
8928                 return -EOPNOTSUPP;
8929         default:
8930                 return -EOPNOTSUPP;
8931         }
8932 }
8933
8934 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8935                                   void *cb_priv)
8936 {
8937         struct i40e_netdev_priv *np = cb_priv;
8938
8939         if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8940                 return -EOPNOTSUPP;
8941
8942         switch (type) {
8943         case TC_SETUP_CLSFLOWER:
8944                 return i40e_setup_tc_cls_flower(np, type_data);
8945
8946         default:
8947                 return -EOPNOTSUPP;
8948         }
8949 }
8950
8951 static LIST_HEAD(i40e_block_cb_list);
8952
8953 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8954                            void *type_data)
8955 {
8956         struct i40e_netdev_priv *np = netdev_priv(netdev);
8957
8958         switch (type) {
8959         case TC_SETUP_QDISC_MQPRIO:
8960                 return i40e_setup_tc(netdev, type_data);
8961         case TC_SETUP_BLOCK:
8962                 return flow_block_cb_setup_simple(type_data,
8963                                                   &i40e_block_cb_list,
8964                                                   i40e_setup_tc_block_cb,
8965                                                   np, np, true);
8966         default:
8967                 return -EOPNOTSUPP;
8968         }
8969 }
8970
8971 /**
8972  * i40e_open - Called when a network interface is made active
8973  * @netdev: network interface device structure
8974  *
8975  * The open entry point is called when a network interface is made
8976  * active by the system (IFF_UP).  At this point all resources needed
8977  * for transmit and receive operations are allocated, the interrupt
8978  * handler is registered with the OS, the netdev watchdog subtask is
8979  * enabled, and the stack is notified that the interface is ready.
8980  *
8981  * Returns 0 on success, negative value on failure
8982  **/
8983 int i40e_open(struct net_device *netdev)
8984 {
8985         struct i40e_netdev_priv *np = netdev_priv(netdev);
8986         struct i40e_vsi *vsi = np->vsi;
8987         struct i40e_pf *pf = vsi->back;
8988         int err;
8989
8990         /* disallow open during test or if eeprom is broken */
8991         if (test_bit(__I40E_TESTING, pf->state) ||
8992             test_bit(__I40E_BAD_EEPROM, pf->state))
8993                 return -EBUSY;
8994
8995         netif_carrier_off(netdev);
8996
8997         if (i40e_force_link_state(pf, true))
8998                 return -EAGAIN;
8999
9000         err = i40e_vsi_open(vsi);
9001         if (err)
9002                 return err;
9003
9004         /* configure global TSO hardware offload settings */
9005         wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
9006                                                        TCP_FLAG_FIN) >> 16);
9007         wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
9008                                                        TCP_FLAG_FIN |
9009                                                        TCP_FLAG_CWR) >> 16);
9010         wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
9011         udp_tunnel_get_rx_info(netdev);
9012
9013         return 0;
9014 }
9015
9016 /**
9017  * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
9018  * @vsi: vsi structure
9019  *
9020  * This updates netdev's number of tx/rx queues
9021  *
9022  * Returns status of setting tx/rx queues
9023  **/
9024 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
9025 {
9026         int ret;
9027
9028         ret = netif_set_real_num_rx_queues(vsi->netdev,
9029                                            vsi->num_queue_pairs);
9030         if (ret)
9031                 return ret;
9032
9033         return netif_set_real_num_tx_queues(vsi->netdev,
9034                                             vsi->num_queue_pairs);
9035 }
9036
9037 /**
9038  * i40e_vsi_open -
9039  * @vsi: the VSI to open
9040  *
9041  * Finish initialization of the VSI.
9042  *
9043  * Returns 0 on success, negative value on failure
9044  *
9045  * Note: expects to be called while under rtnl_lock()
9046  **/
9047 int i40e_vsi_open(struct i40e_vsi *vsi)
9048 {
9049         struct i40e_pf *pf = vsi->back;
9050         char int_name[I40E_INT_NAME_STR_LEN];
9051         int err;
9052
9053         /* allocate descriptors */
9054         err = i40e_vsi_setup_tx_resources(vsi);
9055         if (err)
9056                 goto err_setup_tx;
9057         err = i40e_vsi_setup_rx_resources(vsi);
9058         if (err)
9059                 goto err_setup_rx;
9060
9061         err = i40e_vsi_configure(vsi);
9062         if (err)
9063                 goto err_setup_rx;
9064
9065         if (vsi->netdev) {
9066                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
9067                          dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
9068                 err = i40e_vsi_request_irq(vsi, int_name);
9069                 if (err)
9070                         goto err_setup_rx;
9071
9072                 /* Notify the stack of the actual queue counts. */
9073                 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
9074                 if (err)
9075                         goto err_set_queues;
9076
9077         } else if (vsi->type == I40E_VSI_FDIR) {
9078                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
9079                          dev_driver_string(&pf->pdev->dev),
9080                          dev_name(&pf->pdev->dev));
9081                 err = i40e_vsi_request_irq(vsi, int_name);
9082                 if (err)
9083                         goto err_setup_rx;
9084
9085         } else {
9086                 err = -EINVAL;
9087                 goto err_setup_rx;
9088         }
9089
9090         err = i40e_up_complete(vsi);
9091         if (err)
9092                 goto err_up_complete;
9093
9094         return 0;
9095
9096 err_up_complete:
9097         i40e_down(vsi);
9098 err_set_queues:
9099         i40e_vsi_free_irq(vsi);
9100 err_setup_rx:
9101         i40e_vsi_free_rx_resources(vsi);
9102 err_setup_tx:
9103         i40e_vsi_free_tx_resources(vsi);
9104         if (vsi == pf->vsi[pf->lan_vsi])
9105                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
9106
9107         return err;
9108 }
9109
9110 /**
9111  * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
9112  * @pf: Pointer to PF
9113  *
9114  * This function destroys the hlist where all the Flow Director
9115  * filters were saved.
9116  **/
9117 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
9118 {
9119         struct i40e_fdir_filter *filter;
9120         struct i40e_flex_pit *pit_entry, *tmp;
9121         struct hlist_node *node2;
9122
9123         hlist_for_each_entry_safe(filter, node2,
9124                                   &pf->fdir_filter_list, fdir_node) {
9125                 hlist_del(&filter->fdir_node);
9126                 kfree(filter);
9127         }
9128
9129         list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
9130                 list_del(&pit_entry->list);
9131                 kfree(pit_entry);
9132         }
9133         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
9134
9135         list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
9136                 list_del(&pit_entry->list);
9137                 kfree(pit_entry);
9138         }
9139         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
9140
9141         pf->fdir_pf_active_filters = 0;
9142         i40e_reset_fdir_filter_cnt(pf);
9143
9144         /* Reprogram the default input set for TCP/IPv4 */
9145         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9146                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9147                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9148
9149         /* Reprogram the default input set for TCP/IPv6 */
9150         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
9151                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9152                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9153
9154         /* Reprogram the default input set for UDP/IPv4 */
9155         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
9156                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9157                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9158
9159         /* Reprogram the default input set for UDP/IPv6 */
9160         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
9161                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9162                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9163
9164         /* Reprogram the default input set for SCTP/IPv4 */
9165         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
9166                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9167                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9168
9169         /* Reprogram the default input set for SCTP/IPv6 */
9170         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9171                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9172                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9173
9174         /* Reprogram the default input set for Other/IPv4 */
9175         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9176                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9177
9178         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9179                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9180
9181         /* Reprogram the default input set for Other/IPv6 */
9182         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9183                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9184
9185         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9186                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9187 }
9188
9189 /**
9190  * i40e_cloud_filter_exit - Cleans up the cloud filters
9191  * @pf: Pointer to PF
9192  *
9193  * This function destroys the hlist where all the cloud filters
9194  * were saved.
9195  **/
9196 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9197 {
9198         struct i40e_cloud_filter *cfilter;
9199         struct hlist_node *node;
9200
9201         hlist_for_each_entry_safe(cfilter, node,
9202                                   &pf->cloud_filter_list, cloud_node) {
9203                 hlist_del(&cfilter->cloud_node);
9204                 kfree(cfilter);
9205         }
9206         pf->num_cloud_filters = 0;
9207
9208         if (test_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags) &&
9209             !test_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags)) {
9210                 set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
9211                 clear_bit(I40E_FLAG_FD_SB_TO_CLOUD_FILTER, pf->flags);
9212                 clear_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
9213         }
9214 }
9215
9216 /**
9217  * i40e_close - Disables a network interface
9218  * @netdev: network interface device structure
9219  *
9220  * The close entry point is called when an interface is de-activated
9221  * by the OS.  The hardware is still under the driver's control, but
9222  * this netdev interface is disabled.
9223  *
9224  * Returns 0, this is not allowed to fail
9225  **/
9226 int i40e_close(struct net_device *netdev)
9227 {
9228         struct i40e_netdev_priv *np = netdev_priv(netdev);
9229         struct i40e_vsi *vsi = np->vsi;
9230
9231         i40e_vsi_close(vsi);
9232
9233         return 0;
9234 }
9235
9236 /**
9237  * i40e_do_reset - Start a PF or Core Reset sequence
9238  * @pf: board private structure
9239  * @reset_flags: which reset is requested
9240  * @lock_acquired: indicates whether or not the lock has been acquired
9241  * before this function was called.
9242  *
9243  * The essential difference in resets is that the PF Reset
9244  * doesn't clear the packet buffers, doesn't reset the PE
9245  * firmware, and doesn't bother the other PFs on the chip.
9246  **/
9247 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9248 {
9249         u32 val;
9250
9251         /* do the biggest reset indicated */
9252         if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9253
9254                 /* Request a Global Reset
9255                  *
9256                  * This will start the chip's countdown to the actual full
9257                  * chip reset event, and a warning interrupt to be sent
9258                  * to all PFs, including the requestor.  Our handler
9259                  * for the warning interrupt will deal with the shutdown
9260                  * and recovery of the switch setup.
9261                  */
9262                 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9263                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9264                 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9265                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9266
9267         } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9268
9269                 /* Request a Core Reset
9270                  *
9271                  * Same as Global Reset, except does *not* include the MAC/PHY
9272                  */
9273                 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9274                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9275                 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9276                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9277                 i40e_flush(&pf->hw);
9278
9279         } else if (reset_flags & I40E_PF_RESET_FLAG) {
9280
9281                 /* Request a PF Reset
9282                  *
9283                  * Resets only the PF-specific registers
9284                  *
9285                  * This goes directly to the tear-down and rebuild of
9286                  * the switch, since we need to do all the recovery as
9287                  * for the Core Reset.
9288                  */
9289                 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9290                 i40e_handle_reset_warning(pf, lock_acquired);
9291
9292         } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9293                 /* Request a PF Reset
9294                  *
9295                  * Resets PF and reinitializes PFs VSI.
9296                  */
9297                 i40e_prep_for_reset(pf);
9298                 i40e_reset_and_rebuild(pf, true, lock_acquired);
9299                 dev_info(&pf->pdev->dev,
9300                          test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags) ?
9301                          "FW LLDP is disabled\n" :
9302                          "FW LLDP is enabled\n");
9303
9304         } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9305                 int v;
9306
9307                 /* Find the VSI(s) that requested a re-init */
9308                 dev_info(&pf->pdev->dev,
9309                          "VSI reinit requested\n");
9310                 for (v = 0; v < pf->num_alloc_vsi; v++) {
9311                         struct i40e_vsi *vsi = pf->vsi[v];
9312
9313                         if (vsi != NULL &&
9314                             test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9315                                                vsi->state))
9316                                 i40e_vsi_reinit_locked(pf->vsi[v]);
9317                 }
9318         } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9319                 int v;
9320
9321                 /* Find the VSI(s) that needs to be brought down */
9322                 dev_info(&pf->pdev->dev, "VSI down requested\n");
9323                 for (v = 0; v < pf->num_alloc_vsi; v++) {
9324                         struct i40e_vsi *vsi = pf->vsi[v];
9325
9326                         if (vsi != NULL &&
9327                             test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9328                                                vsi->state)) {
9329                                 set_bit(__I40E_VSI_DOWN, vsi->state);
9330                                 i40e_down(vsi);
9331                         }
9332                 }
9333         } else {
9334                 dev_info(&pf->pdev->dev,
9335                          "bad reset request 0x%08x\n", reset_flags);
9336         }
9337 }
9338
9339 #ifdef CONFIG_I40E_DCB
9340 /**
9341  * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9342  * @pf: board private structure
9343  * @old_cfg: current DCB config
9344  * @new_cfg: new DCB config
9345  **/
9346 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9347                             struct i40e_dcbx_config *old_cfg,
9348                             struct i40e_dcbx_config *new_cfg)
9349 {
9350         bool need_reconfig = false;
9351
9352         /* Check if ETS configuration has changed */
9353         if (memcmp(&new_cfg->etscfg,
9354                    &old_cfg->etscfg,
9355                    sizeof(new_cfg->etscfg))) {
9356                 /* If Priority Table has changed reconfig is needed */
9357                 if (memcmp(&new_cfg->etscfg.prioritytable,
9358                            &old_cfg->etscfg.prioritytable,
9359                            sizeof(new_cfg->etscfg.prioritytable))) {
9360                         need_reconfig = true;
9361                         dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9362                 }
9363
9364                 if (memcmp(&new_cfg->etscfg.tcbwtable,
9365                            &old_cfg->etscfg.tcbwtable,
9366                            sizeof(new_cfg->etscfg.tcbwtable)))
9367                         dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9368
9369                 if (memcmp(&new_cfg->etscfg.tsatable,
9370                            &old_cfg->etscfg.tsatable,
9371                            sizeof(new_cfg->etscfg.tsatable)))
9372                         dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9373         }
9374
9375         /* Check if PFC configuration has changed */
9376         if (memcmp(&new_cfg->pfc,
9377                    &old_cfg->pfc,
9378                    sizeof(new_cfg->pfc))) {
9379                 need_reconfig = true;
9380                 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9381         }
9382
9383         /* Check if APP Table has changed */
9384         if (memcmp(&new_cfg->app,
9385                    &old_cfg->app,
9386                    sizeof(new_cfg->app))) {
9387                 need_reconfig = true;
9388                 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9389         }
9390
9391         dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9392         return need_reconfig;
9393 }
9394
9395 /**
9396  * i40e_handle_lldp_event - Handle LLDP Change MIB event
9397  * @pf: board private structure
9398  * @e: event info posted on ARQ
9399  **/
9400 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9401                                   struct i40e_arq_event_info *e)
9402 {
9403         struct i40e_aqc_lldp_get_mib *mib =
9404                 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9405         struct i40e_hw *hw = &pf->hw;
9406         struct i40e_dcbx_config tmp_dcbx_cfg;
9407         bool need_reconfig = false;
9408         int ret = 0;
9409         u8 type;
9410
9411         /* X710-T*L 2.5G and 5G speeds don't support DCB */
9412         if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9413             (hw->phy.link_info.link_speed &
9414              ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9415              !test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
9416                 /* let firmware decide if the DCB should be disabled */
9417                 set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
9418
9419         /* Not DCB capable or capability disabled */
9420         if (!test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
9421                 return ret;
9422
9423         /* Ignore if event is not for Nearest Bridge */
9424         type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9425                 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9426         dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9427         if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9428                 return ret;
9429
9430         /* Check MIB Type and return if event for Remote MIB update */
9431         type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9432         dev_dbg(&pf->pdev->dev,
9433                 "LLDP event mib type %s\n", type ? "remote" : "local");
9434         if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9435                 /* Update the remote cached instance and return */
9436                 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9437                                 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9438                                 &hw->remote_dcbx_config);
9439                 goto exit;
9440         }
9441
9442         /* Store the old configuration */
9443         tmp_dcbx_cfg = hw->local_dcbx_config;
9444
9445         /* Reset the old DCBx configuration data */
9446         memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9447         /* Get updated DCBX data from firmware */
9448         ret = i40e_get_dcb_config(&pf->hw);
9449         if (ret) {
9450                 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9451                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9452                     (hw->phy.link_info.link_speed &
9453                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9454                         dev_warn(&pf->pdev->dev,
9455                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9456                         clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
9457                 } else {
9458                         dev_info(&pf->pdev->dev,
9459                                  "Failed querying DCB configuration data from firmware, err %pe aq_err %s\n",
9460                                  ERR_PTR(ret),
9461                                  i40e_aq_str(&pf->hw,
9462                                              pf->hw.aq.asq_last_status));
9463                 }
9464                 goto exit;
9465         }
9466
9467         /* No change detected in DCBX configs */
9468         if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9469                     sizeof(tmp_dcbx_cfg))) {
9470                 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9471                 goto exit;
9472         }
9473
9474         need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9475                                                &hw->local_dcbx_config);
9476
9477         i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9478
9479         if (!need_reconfig)
9480                 goto exit;
9481
9482         /* Enable DCB tagging only when more than one TC */
9483         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9484                 set_bit(I40E_FLAG_DCB_ENA, pf->flags);
9485         else
9486                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
9487
9488         set_bit(__I40E_PORT_SUSPENDED, pf->state);
9489         /* Reconfiguration needed quiesce all VSIs */
9490         i40e_pf_quiesce_all_vsi(pf);
9491
9492         /* Changes in configuration update VEB/VSI */
9493         i40e_dcb_reconfigure(pf);
9494
9495         ret = i40e_resume_port_tx(pf);
9496
9497         clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9498         /* In case of error no point in resuming VSIs */
9499         if (ret)
9500                 goto exit;
9501
9502         /* Wait for the PF's queues to be disabled */
9503         ret = i40e_pf_wait_queues_disabled(pf);
9504         if (ret) {
9505                 /* Schedule PF reset to recover */
9506                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9507                 i40e_service_event_schedule(pf);
9508         } else {
9509                 i40e_pf_unquiesce_all_vsi(pf);
9510                 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9511                 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9512         }
9513
9514 exit:
9515         return ret;
9516 }
9517 #endif /* CONFIG_I40E_DCB */
9518
9519 /**
9520  * i40e_do_reset_safe - Protected reset path for userland calls.
9521  * @pf: board private structure
9522  * @reset_flags: which reset is requested
9523  *
9524  **/
9525 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9526 {
9527         rtnl_lock();
9528         i40e_do_reset(pf, reset_flags, true);
9529         rtnl_unlock();
9530 }
9531
9532 /**
9533  * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9534  * @pf: board private structure
9535  * @e: event info posted on ARQ
9536  *
9537  * Handler for LAN Queue Overflow Event generated by the firmware for PF
9538  * and VF queues
9539  **/
9540 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9541                                            struct i40e_arq_event_info *e)
9542 {
9543         struct i40e_aqc_lan_overflow *data =
9544                 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9545         u32 queue = le32_to_cpu(data->prtdcb_rupto);
9546         u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9547         struct i40e_hw *hw = &pf->hw;
9548         struct i40e_vf *vf;
9549         u16 vf_id;
9550
9551         dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9552                 queue, qtx_ctl);
9553
9554         if (FIELD_GET(I40E_QTX_CTL_PFVF_Q_MASK, qtx_ctl) !=
9555             I40E_QTX_CTL_VF_QUEUE)
9556                 return;
9557
9558         /* Queue belongs to VF, find the VF and issue VF reset */
9559         vf_id = FIELD_GET(I40E_QTX_CTL_VFVM_INDX_MASK, qtx_ctl);
9560         vf_id -= hw->func_caps.vf_base_id;
9561         vf = &pf->vf[vf_id];
9562         i40e_vc_notify_vf_reset(vf);
9563         /* Allow VF to process pending reset notification */
9564         msleep(20);
9565         i40e_reset_vf(vf, false);
9566 }
9567
9568 /**
9569  * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9570  * @pf: board private structure
9571  **/
9572 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9573 {
9574         u32 val, fcnt_prog;
9575
9576         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9577         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9578         return fcnt_prog;
9579 }
9580
9581 /**
9582  * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9583  * @pf: board private structure
9584  **/
9585 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9586 {
9587         u32 val, fcnt_prog;
9588
9589         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9590         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9591                     FIELD_GET(I40E_PFQF_FDSTAT_BEST_CNT_MASK, val);
9592         return fcnt_prog;
9593 }
9594
9595 /**
9596  * i40e_get_global_fd_count - Get total FD filters programmed on device
9597  * @pf: board private structure
9598  **/
9599 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9600 {
9601         u32 val, fcnt_prog;
9602
9603         val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9604         fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9605                     FIELD_GET(I40E_GLQF_FDCNT_0_BESTCNT_MASK, val);
9606         return fcnt_prog;
9607 }
9608
9609 /**
9610  * i40e_reenable_fdir_sb - Restore FDir SB capability
9611  * @pf: board private structure
9612  **/
9613 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9614 {
9615         if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9616                 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
9617                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9618                         dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9619 }
9620
9621 /**
9622  * i40e_reenable_fdir_atr - Restore FDir ATR capability
9623  * @pf: board private structure
9624  **/
9625 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9626 {
9627         if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9628                 /* ATR uses the same filtering logic as SB rules. It only
9629                  * functions properly if the input set mask is at the default
9630                  * settings. It is safe to restore the default input set
9631                  * because there are no active TCPv4 filter rules.
9632                  */
9633                 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9634                                         I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9635                                         I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9636
9637                 if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
9638                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9639                         dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9640         }
9641 }
9642
9643 /**
9644  * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9645  * @pf: board private structure
9646  * @filter: FDir filter to remove
9647  */
9648 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9649                                        struct i40e_fdir_filter *filter)
9650 {
9651         /* Update counters */
9652         pf->fdir_pf_active_filters--;
9653         pf->fd_inv = 0;
9654
9655         switch (filter->flow_type) {
9656         case TCP_V4_FLOW:
9657                 pf->fd_tcp4_filter_cnt--;
9658                 break;
9659         case UDP_V4_FLOW:
9660                 pf->fd_udp4_filter_cnt--;
9661                 break;
9662         case SCTP_V4_FLOW:
9663                 pf->fd_sctp4_filter_cnt--;
9664                 break;
9665         case TCP_V6_FLOW:
9666                 pf->fd_tcp6_filter_cnt--;
9667                 break;
9668         case UDP_V6_FLOW:
9669                 pf->fd_udp6_filter_cnt--;
9670                 break;
9671         case SCTP_V6_FLOW:
9672                 pf->fd_udp6_filter_cnt--;
9673                 break;
9674         case IP_USER_FLOW:
9675                 switch (filter->ipl4_proto) {
9676                 case IPPROTO_TCP:
9677                         pf->fd_tcp4_filter_cnt--;
9678                         break;
9679                 case IPPROTO_UDP:
9680                         pf->fd_udp4_filter_cnt--;
9681                         break;
9682                 case IPPROTO_SCTP:
9683                         pf->fd_sctp4_filter_cnt--;
9684                         break;
9685                 case IPPROTO_IP:
9686                         pf->fd_ip4_filter_cnt--;
9687                         break;
9688                 }
9689                 break;
9690         case IPV6_USER_FLOW:
9691                 switch (filter->ipl4_proto) {
9692                 case IPPROTO_TCP:
9693                         pf->fd_tcp6_filter_cnt--;
9694                         break;
9695                 case IPPROTO_UDP:
9696                         pf->fd_udp6_filter_cnt--;
9697                         break;
9698                 case IPPROTO_SCTP:
9699                         pf->fd_sctp6_filter_cnt--;
9700                         break;
9701                 case IPPROTO_IP:
9702                         pf->fd_ip6_filter_cnt--;
9703                         break;
9704                 }
9705                 break;
9706         }
9707
9708         /* Remove the filter from the list and free memory */
9709         hlist_del(&filter->fdir_node);
9710         kfree(filter);
9711 }
9712
9713 /**
9714  * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9715  * @pf: board private structure
9716  **/
9717 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9718 {
9719         struct i40e_fdir_filter *filter;
9720         u32 fcnt_prog, fcnt_avail;
9721         struct hlist_node *node;
9722
9723         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9724                 return;
9725
9726         /* Check if we have enough room to re-enable FDir SB capability. */
9727         fcnt_prog = i40e_get_global_fd_count(pf);
9728         fcnt_avail = pf->fdir_pf_filter_count;
9729         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9730             (pf->fd_add_err == 0) ||
9731             (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9732                 i40e_reenable_fdir_sb(pf);
9733
9734         /* We should wait for even more space before re-enabling ATR.
9735          * Additionally, we cannot enable ATR as long as we still have TCP SB
9736          * rules active.
9737          */
9738         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9739             pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9740                 i40e_reenable_fdir_atr(pf);
9741
9742         /* if hw had a problem adding a filter, delete it */
9743         if (pf->fd_inv > 0) {
9744                 hlist_for_each_entry_safe(filter, node,
9745                                           &pf->fdir_filter_list, fdir_node)
9746                         if (filter->fd_id == pf->fd_inv)
9747                                 i40e_delete_invalid_filter(pf, filter);
9748         }
9749 }
9750
9751 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9752 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9753 /**
9754  * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9755  * @pf: board private structure
9756  **/
9757 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9758 {
9759         unsigned long min_flush_time;
9760         int flush_wait_retry = 50;
9761         bool disable_atr = false;
9762         int fd_room;
9763         int reg;
9764
9765         if (!time_after(jiffies, pf->fd_flush_timestamp +
9766                                  (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9767                 return;
9768
9769         /* If the flush is happening too quick and we have mostly SB rules we
9770          * should not re-enable ATR for some time.
9771          */
9772         min_flush_time = pf->fd_flush_timestamp +
9773                          (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9774         fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9775
9776         if (!(time_after(jiffies, min_flush_time)) &&
9777             (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9778                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9779                         dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9780                 disable_atr = true;
9781         }
9782
9783         pf->fd_flush_timestamp = jiffies;
9784         set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9785         /* flush all filters */
9786         wr32(&pf->hw, I40E_PFQF_CTL_1,
9787              I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9788         i40e_flush(&pf->hw);
9789         pf->fd_flush_cnt++;
9790         pf->fd_add_err = 0;
9791         do {
9792                 /* Check FD flush status every 5-6msec */
9793                 usleep_range(5000, 6000);
9794                 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9795                 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9796                         break;
9797         } while (flush_wait_retry--);
9798         if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9799                 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9800         } else {
9801                 /* replay sideband filters */
9802                 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9803                 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9804                         clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9805                 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9806                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9807                         dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9808         }
9809 }
9810
9811 /**
9812  * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9813  * @pf: board private structure
9814  **/
9815 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9816 {
9817         return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9818 }
9819
9820 /**
9821  * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9822  * @pf: board private structure
9823  **/
9824 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9825 {
9826
9827         /* if interface is down do nothing */
9828         if (test_bit(__I40E_DOWN, pf->state))
9829                 return;
9830
9831         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9832                 i40e_fdir_flush_and_replay(pf);
9833
9834         i40e_fdir_check_and_reenable(pf);
9835
9836 }
9837
9838 /**
9839  * i40e_vsi_link_event - notify VSI of a link event
9840  * @vsi: vsi to be notified
9841  * @link_up: link up or down
9842  **/
9843 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9844 {
9845         if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9846                 return;
9847
9848         switch (vsi->type) {
9849         case I40E_VSI_MAIN:
9850                 if (!vsi->netdev || !vsi->netdev_registered)
9851                         break;
9852
9853                 if (link_up) {
9854                         netif_carrier_on(vsi->netdev);
9855                         netif_tx_wake_all_queues(vsi->netdev);
9856                 } else {
9857                         netif_carrier_off(vsi->netdev);
9858                         netif_tx_stop_all_queues(vsi->netdev);
9859                 }
9860                 break;
9861
9862         case I40E_VSI_SRIOV:
9863         case I40E_VSI_VMDQ2:
9864         case I40E_VSI_CTRL:
9865         case I40E_VSI_IWARP:
9866         case I40E_VSI_MIRROR:
9867         default:
9868                 /* there is no notification for other VSIs */
9869                 break;
9870         }
9871 }
9872
9873 /**
9874  * i40e_veb_link_event - notify elements on the veb of a link event
9875  * @veb: veb to be notified
9876  * @link_up: link up or down
9877  **/
9878 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9879 {
9880         struct i40e_pf *pf;
9881         int i;
9882
9883         if (!veb || !veb->pf)
9884                 return;
9885         pf = veb->pf;
9886
9887         /* depth first... */
9888         for (i = 0; i < I40E_MAX_VEB; i++)
9889                 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9890                         i40e_veb_link_event(pf->veb[i], link_up);
9891
9892         /* ... now the local VSIs */
9893         for (i = 0; i < pf->num_alloc_vsi; i++)
9894                 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9895                         i40e_vsi_link_event(pf->vsi[i], link_up);
9896 }
9897
9898 /**
9899  * i40e_link_event - Update netif_carrier status
9900  * @pf: board private structure
9901  **/
9902 static void i40e_link_event(struct i40e_pf *pf)
9903 {
9904         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9905         u8 new_link_speed, old_link_speed;
9906         bool new_link, old_link;
9907         int status;
9908 #ifdef CONFIG_I40E_DCB
9909         int err;
9910 #endif /* CONFIG_I40E_DCB */
9911
9912         /* set this to force the get_link_status call to refresh state */
9913         pf->hw.phy.get_link_info = true;
9914         old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9915         status = i40e_get_link_status(&pf->hw, &new_link);
9916
9917         /* On success, disable temp link polling */
9918         if (status == 0) {
9919                 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9920         } else {
9921                 /* Enable link polling temporarily until i40e_get_link_status
9922                  * returns 0
9923                  */
9924                 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9925                 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9926                         status);
9927                 return;
9928         }
9929
9930         old_link_speed = pf->hw.phy.link_info_old.link_speed;
9931         new_link_speed = pf->hw.phy.link_info.link_speed;
9932
9933         if (new_link == old_link &&
9934             new_link_speed == old_link_speed &&
9935             (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9936              new_link == netif_carrier_ok(vsi->netdev)))
9937                 return;
9938
9939         i40e_print_link_message(vsi, new_link);
9940
9941         /* Notify the base of the switch tree connected to
9942          * the link.  Floating VEBs are not notified.
9943          */
9944         if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9945                 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9946         else
9947                 i40e_vsi_link_event(vsi, new_link);
9948
9949         if (pf->vf)
9950                 i40e_vc_notify_link_state(pf);
9951
9952         if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
9953                 i40e_ptp_set_increment(pf);
9954 #ifdef CONFIG_I40E_DCB
9955         if (new_link == old_link)
9956                 return;
9957         /* Not SW DCB so firmware will take care of default settings */
9958         if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9959                 return;
9960
9961         /* We cover here only link down, as after link up in case of SW DCB
9962          * SW LLDP agent will take care of setting it up
9963          */
9964         if (!new_link) {
9965                 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9966                 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9967                 err = i40e_dcb_sw_default_config(pf);
9968                 if (err) {
9969                         clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
9970                         clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
9971                 } else {
9972                         pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9973                                        DCB_CAP_DCBX_VER_IEEE;
9974                         set_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
9975                         clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
9976                 }
9977         }
9978 #endif /* CONFIG_I40E_DCB */
9979 }
9980
9981 /**
9982  * i40e_watchdog_subtask - periodic checks not using event driven response
9983  * @pf: board private structure
9984  **/
9985 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9986 {
9987         int i;
9988
9989         /* if interface is down do nothing */
9990         if (test_bit(__I40E_DOWN, pf->state) ||
9991             test_bit(__I40E_CONFIG_BUSY, pf->state))
9992                 return;
9993
9994         /* make sure we don't do these things too often */
9995         if (time_before(jiffies, (pf->service_timer_previous +
9996                                   pf->service_timer_period)))
9997                 return;
9998         pf->service_timer_previous = jiffies;
9999
10000         if (test_bit(I40E_FLAG_LINK_POLLING_ENA, pf->flags) ||
10001             test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
10002                 i40e_link_event(pf);
10003
10004         /* Update the stats for active netdevs so the network stack
10005          * can look at updated numbers whenever it cares to
10006          */
10007         for (i = 0; i < pf->num_alloc_vsi; i++)
10008                 if (pf->vsi[i] && pf->vsi[i]->netdev)
10009                         i40e_update_stats(pf->vsi[i]);
10010
10011         if (test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags)) {
10012                 /* Update the stats for the active switching components */
10013                 for (i = 0; i < I40E_MAX_VEB; i++)
10014                         if (pf->veb[i])
10015                                 i40e_update_veb_stats(pf->veb[i]);
10016         }
10017
10018         i40e_ptp_rx_hang(pf);
10019         i40e_ptp_tx_hang(pf);
10020 }
10021
10022 /**
10023  * i40e_reset_subtask - Set up for resetting the device and driver
10024  * @pf: board private structure
10025  **/
10026 static void i40e_reset_subtask(struct i40e_pf *pf)
10027 {
10028         u32 reset_flags = 0;
10029
10030         if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
10031                 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
10032                 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
10033         }
10034         if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
10035                 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
10036                 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
10037         }
10038         if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
10039                 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
10040                 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
10041         }
10042         if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
10043                 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
10044                 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
10045         }
10046         if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
10047                 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
10048                 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
10049         }
10050
10051         /* If there's a recovery already waiting, it takes
10052          * precedence before starting a new reset sequence.
10053          */
10054         if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
10055                 i40e_prep_for_reset(pf);
10056                 i40e_reset(pf);
10057                 i40e_rebuild(pf, false, false);
10058         }
10059
10060         /* If we're already down or resetting, just bail */
10061         if (reset_flags &&
10062             !test_bit(__I40E_DOWN, pf->state) &&
10063             !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
10064                 i40e_do_reset(pf, reset_flags, false);
10065         }
10066 }
10067
10068 /**
10069  * i40e_handle_link_event - Handle link event
10070  * @pf: board private structure
10071  * @e: event info posted on ARQ
10072  **/
10073 static void i40e_handle_link_event(struct i40e_pf *pf,
10074                                    struct i40e_arq_event_info *e)
10075 {
10076         struct i40e_aqc_get_link_status *status =
10077                 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
10078
10079         /* Do a new status request to re-enable LSE reporting
10080          * and load new status information into the hw struct
10081          * This completely ignores any state information
10082          * in the ARQ event info, instead choosing to always
10083          * issue the AQ update link status command.
10084          */
10085         i40e_link_event(pf);
10086
10087         /* Check if module meets thermal requirements */
10088         if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
10089                 dev_err(&pf->pdev->dev,
10090                         "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
10091                 dev_err(&pf->pdev->dev,
10092                         "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10093         } else {
10094                 /* check for unqualified module, if link is down, suppress
10095                  * the message if link was forced to be down.
10096                  */
10097                 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
10098                     (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
10099                     (!(status->link_info & I40E_AQ_LINK_UP)) &&
10100                     (!test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags))) {
10101                         dev_err(&pf->pdev->dev,
10102                                 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
10103                         dev_err(&pf->pdev->dev,
10104                                 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10105                 }
10106         }
10107 }
10108
10109 /**
10110  * i40e_clean_adminq_subtask - Clean the AdminQ rings
10111  * @pf: board private structure
10112  **/
10113 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
10114 {
10115         struct i40e_arq_event_info event;
10116         struct i40e_hw *hw = &pf->hw;
10117         u16 pending, i = 0;
10118         u16 opcode;
10119         u32 oldval;
10120         int ret;
10121         u32 val;
10122
10123         /* Do not run clean AQ when PF reset fails */
10124         if (test_bit(__I40E_RESET_FAILED, pf->state))
10125                 return;
10126
10127         /* check for error indications */
10128         val = rd32(&pf->hw, I40E_PF_ARQLEN);
10129         oldval = val;
10130         if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
10131                 if (hw->debug_mask & I40E_DEBUG_AQ)
10132                         dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
10133                 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
10134         }
10135         if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
10136                 if (hw->debug_mask & I40E_DEBUG_AQ)
10137                         dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
10138                 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
10139                 pf->arq_overflows++;
10140         }
10141         if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
10142                 if (hw->debug_mask & I40E_DEBUG_AQ)
10143                         dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
10144                 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
10145         }
10146         if (oldval != val)
10147                 wr32(&pf->hw, I40E_PF_ARQLEN, val);
10148
10149         val = rd32(&pf->hw, I40E_PF_ATQLEN);
10150         oldval = val;
10151         if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
10152                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10153                         dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
10154                 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
10155         }
10156         if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
10157                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10158                         dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
10159                 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
10160         }
10161         if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
10162                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10163                         dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10164                 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10165         }
10166         if (oldval != val)
10167                 wr32(&pf->hw, I40E_PF_ATQLEN, val);
10168
10169         event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10170         event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10171         if (!event.msg_buf)
10172                 return;
10173
10174         do {
10175                 ret = i40e_clean_arq_element(hw, &event, &pending);
10176                 if (ret == -EALREADY)
10177                         break;
10178                 else if (ret) {
10179                         dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10180                         break;
10181                 }
10182
10183                 opcode = le16_to_cpu(event.desc.opcode);
10184                 switch (opcode) {
10185
10186                 case i40e_aqc_opc_get_link_status:
10187                         rtnl_lock();
10188                         i40e_handle_link_event(pf, &event);
10189                         rtnl_unlock();
10190                         break;
10191                 case i40e_aqc_opc_send_msg_to_pf:
10192                         ret = i40e_vc_process_vf_msg(pf,
10193                                         le16_to_cpu(event.desc.retval),
10194                                         le32_to_cpu(event.desc.cookie_high),
10195                                         le32_to_cpu(event.desc.cookie_low),
10196                                         event.msg_buf,
10197                                         event.msg_len);
10198                         break;
10199                 case i40e_aqc_opc_lldp_update_mib:
10200                         dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10201 #ifdef CONFIG_I40E_DCB
10202                         rtnl_lock();
10203                         i40e_handle_lldp_event(pf, &event);
10204                         rtnl_unlock();
10205 #endif /* CONFIG_I40E_DCB */
10206                         break;
10207                 case i40e_aqc_opc_event_lan_overflow:
10208                         dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10209                         i40e_handle_lan_overflow_event(pf, &event);
10210                         break;
10211                 case i40e_aqc_opc_send_msg_to_peer:
10212                         dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10213                         break;
10214                 case i40e_aqc_opc_nvm_erase:
10215                 case i40e_aqc_opc_nvm_update:
10216                 case i40e_aqc_opc_oem_post_update:
10217                         i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10218                                    "ARQ NVM operation 0x%04x completed\n",
10219                                    opcode);
10220                         break;
10221                 default:
10222                         dev_info(&pf->pdev->dev,
10223                                  "ARQ: Unknown event 0x%04x ignored\n",
10224                                  opcode);
10225                         break;
10226                 }
10227         } while (i++ < I40E_AQ_WORK_LIMIT);
10228
10229         if (i < I40E_AQ_WORK_LIMIT)
10230                 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10231
10232         /* re-enable Admin queue interrupt cause */
10233         val = rd32(hw, I40E_PFINT_ICR0_ENA);
10234         val |=  I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10235         wr32(hw, I40E_PFINT_ICR0_ENA, val);
10236         i40e_flush(hw);
10237
10238         kfree(event.msg_buf);
10239 }
10240
10241 /**
10242  * i40e_verify_eeprom - make sure eeprom is good to use
10243  * @pf: board private structure
10244  **/
10245 static void i40e_verify_eeprom(struct i40e_pf *pf)
10246 {
10247         int err;
10248
10249         err = i40e_diag_eeprom_test(&pf->hw);
10250         if (err) {
10251                 /* retry in case of garbage read */
10252                 err = i40e_diag_eeprom_test(&pf->hw);
10253                 if (err) {
10254                         dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10255                                  err);
10256                         set_bit(__I40E_BAD_EEPROM, pf->state);
10257                 }
10258         }
10259
10260         if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10261                 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10262                 clear_bit(__I40E_BAD_EEPROM, pf->state);
10263         }
10264 }
10265
10266 /**
10267  * i40e_enable_pf_switch_lb
10268  * @pf: pointer to the PF structure
10269  *
10270  * enable switch loop back or die - no point in a return value
10271  **/
10272 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10273 {
10274         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10275         struct i40e_vsi_context ctxt;
10276         int ret;
10277
10278         ctxt.seid = pf->main_vsi_seid;
10279         ctxt.pf_num = pf->hw.pf_id;
10280         ctxt.vf_num = 0;
10281         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10282         if (ret) {
10283                 dev_info(&pf->pdev->dev,
10284                          "couldn't get PF vsi config, err %pe aq_err %s\n",
10285                          ERR_PTR(ret),
10286                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10287                 return;
10288         }
10289         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10290         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10291         ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10292
10293         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10294         if (ret) {
10295                 dev_info(&pf->pdev->dev,
10296                          "update vsi switch failed, err %pe aq_err %s\n",
10297                          ERR_PTR(ret),
10298                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10299         }
10300 }
10301
10302 /**
10303  * i40e_disable_pf_switch_lb
10304  * @pf: pointer to the PF structure
10305  *
10306  * disable switch loop back or die - no point in a return value
10307  **/
10308 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10309 {
10310         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10311         struct i40e_vsi_context ctxt;
10312         int ret;
10313
10314         ctxt.seid = pf->main_vsi_seid;
10315         ctxt.pf_num = pf->hw.pf_id;
10316         ctxt.vf_num = 0;
10317         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10318         if (ret) {
10319                 dev_info(&pf->pdev->dev,
10320                          "couldn't get PF vsi config, err %pe aq_err %s\n",
10321                          ERR_PTR(ret),
10322                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10323                 return;
10324         }
10325         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10326         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10327         ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10328
10329         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10330         if (ret) {
10331                 dev_info(&pf->pdev->dev,
10332                          "update vsi switch failed, err %pe aq_err %s\n",
10333                          ERR_PTR(ret),
10334                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10335         }
10336 }
10337
10338 /**
10339  * i40e_config_bridge_mode - Configure the HW bridge mode
10340  * @veb: pointer to the bridge instance
10341  *
10342  * Configure the loop back mode for the LAN VSI that is downlink to the
10343  * specified HW bridge instance. It is expected this function is called
10344  * when a new HW bridge is instantiated.
10345  **/
10346 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10347 {
10348         struct i40e_pf *pf = veb->pf;
10349
10350         if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10351                 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10352                          veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10353         if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10354                 i40e_disable_pf_switch_lb(pf);
10355         else
10356                 i40e_enable_pf_switch_lb(pf);
10357 }
10358
10359 /**
10360  * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10361  * @veb: pointer to the VEB instance
10362  *
10363  * This is a recursive function that first builds the attached VSIs then
10364  * recurses in to build the next layer of VEB.  We track the connections
10365  * through our own index numbers because the seid's from the HW could
10366  * change across the reset.
10367  **/
10368 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10369 {
10370         struct i40e_vsi *ctl_vsi = NULL;
10371         struct i40e_pf *pf = veb->pf;
10372         int v, veb_idx;
10373         int ret;
10374
10375         /* build VSI that owns this VEB, temporarily attached to base VEB */
10376         for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10377                 if (pf->vsi[v] &&
10378                     pf->vsi[v]->veb_idx == veb->idx &&
10379                     pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10380                         ctl_vsi = pf->vsi[v];
10381                         break;
10382                 }
10383         }
10384         if (!ctl_vsi) {
10385                 dev_info(&pf->pdev->dev,
10386                          "missing owner VSI for veb_idx %d\n", veb->idx);
10387                 ret = -ENOENT;
10388                 goto end_reconstitute;
10389         }
10390         if (ctl_vsi != pf->vsi[pf->lan_vsi])
10391                 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10392         ret = i40e_add_vsi(ctl_vsi);
10393         if (ret) {
10394                 dev_info(&pf->pdev->dev,
10395                          "rebuild of veb_idx %d owner VSI failed: %d\n",
10396                          veb->idx, ret);
10397                 goto end_reconstitute;
10398         }
10399         i40e_vsi_reset_stats(ctl_vsi);
10400
10401         /* create the VEB in the switch and move the VSI onto the VEB */
10402         ret = i40e_add_veb(veb, ctl_vsi);
10403         if (ret)
10404                 goto end_reconstitute;
10405
10406         if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags))
10407                 veb->bridge_mode = BRIDGE_MODE_VEB;
10408         else
10409                 veb->bridge_mode = BRIDGE_MODE_VEPA;
10410         i40e_config_bridge_mode(veb);
10411
10412         /* create the remaining VSIs attached to this VEB */
10413         for (v = 0; v < pf->num_alloc_vsi; v++) {
10414                 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10415                         continue;
10416
10417                 if (pf->vsi[v]->veb_idx == veb->idx) {
10418                         struct i40e_vsi *vsi = pf->vsi[v];
10419
10420                         vsi->uplink_seid = veb->seid;
10421                         ret = i40e_add_vsi(vsi);
10422                         if (ret) {
10423                                 dev_info(&pf->pdev->dev,
10424                                          "rebuild of vsi_idx %d failed: %d\n",
10425                                          v, ret);
10426                                 goto end_reconstitute;
10427                         }
10428                         i40e_vsi_reset_stats(vsi);
10429                 }
10430         }
10431
10432         /* create any VEBs attached to this VEB - RECURSION */
10433         for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10434                 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10435                         pf->veb[veb_idx]->uplink_seid = veb->seid;
10436                         ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10437                         if (ret)
10438                                 break;
10439                 }
10440         }
10441
10442 end_reconstitute:
10443         return ret;
10444 }
10445
10446 /**
10447  * i40e_get_capabilities - get info about the HW
10448  * @pf: the PF struct
10449  * @list_type: AQ capability to be queried
10450  **/
10451 static int i40e_get_capabilities(struct i40e_pf *pf,
10452                                  enum i40e_admin_queue_opc list_type)
10453 {
10454         struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10455         u16 data_size;
10456         int buf_len;
10457         int err;
10458
10459         buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10460         do {
10461                 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10462                 if (!cap_buf)
10463                         return -ENOMEM;
10464
10465                 /* this loads the data into the hw struct for us */
10466                 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10467                                                     &data_size, list_type,
10468                                                     NULL);
10469                 /* data loaded, buffer no longer needed */
10470                 kfree(cap_buf);
10471
10472                 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10473                         /* retry with a larger buffer */
10474                         buf_len = data_size;
10475                 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10476                         dev_info(&pf->pdev->dev,
10477                                  "capability discovery failed, err %pe aq_err %s\n",
10478                                  ERR_PTR(err),
10479                                  i40e_aq_str(&pf->hw,
10480                                              pf->hw.aq.asq_last_status));
10481                         return -ENODEV;
10482                 }
10483         } while (err);
10484
10485         if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10486                 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10487                         dev_info(&pf->pdev->dev,
10488                                  "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10489                                  pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10490                                  pf->hw.func_caps.num_msix_vectors,
10491                                  pf->hw.func_caps.num_msix_vectors_vf,
10492                                  pf->hw.func_caps.fd_filters_guaranteed,
10493                                  pf->hw.func_caps.fd_filters_best_effort,
10494                                  pf->hw.func_caps.num_tx_qp,
10495                                  pf->hw.func_caps.num_vsis);
10496                 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10497                         dev_info(&pf->pdev->dev,
10498                                  "switch_mode=0x%04x, function_valid=0x%08x\n",
10499                                  pf->hw.dev_caps.switch_mode,
10500                                  pf->hw.dev_caps.valid_functions);
10501                         dev_info(&pf->pdev->dev,
10502                                  "SR-IOV=%d, num_vfs for all function=%u\n",
10503                                  pf->hw.dev_caps.sr_iov_1_1,
10504                                  pf->hw.dev_caps.num_vfs);
10505                         dev_info(&pf->pdev->dev,
10506                                  "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10507                                  pf->hw.dev_caps.num_vsis,
10508                                  pf->hw.dev_caps.num_rx_qp,
10509                                  pf->hw.dev_caps.num_tx_qp);
10510                 }
10511         }
10512         if (list_type == i40e_aqc_opc_list_func_capabilities) {
10513 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10514                        + pf->hw.func_caps.num_vfs)
10515                 if (pf->hw.revision_id == 0 &&
10516                     pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10517                         dev_info(&pf->pdev->dev,
10518                                  "got num_vsis %d, setting num_vsis to %d\n",
10519                                  pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10520                         pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10521                 }
10522         }
10523         return 0;
10524 }
10525
10526 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10527
10528 /**
10529  * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10530  * @pf: board private structure
10531  **/
10532 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10533 {
10534         struct i40e_vsi *vsi;
10535
10536         /* quick workaround for an NVM issue that leaves a critical register
10537          * uninitialized
10538          */
10539         if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10540                 static const u32 hkey[] = {
10541                         0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10542                         0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10543                         0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10544                         0x95b3a76d};
10545                 int i;
10546
10547                 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10548                         wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10549         }
10550
10551         if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
10552                 return;
10553
10554         /* find existing VSI and see if it needs configuring */
10555         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10556
10557         /* create a new VSI if none exists */
10558         if (!vsi) {
10559                 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10560                                      pf->vsi[pf->lan_vsi]->seid, 0);
10561                 if (!vsi) {
10562                         dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10563                         clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
10564                         set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
10565                         return;
10566                 }
10567         }
10568
10569         i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10570 }
10571
10572 /**
10573  * i40e_fdir_teardown - release the Flow Director resources
10574  * @pf: board private structure
10575  **/
10576 static void i40e_fdir_teardown(struct i40e_pf *pf)
10577 {
10578         struct i40e_vsi *vsi;
10579
10580         i40e_fdir_filter_exit(pf);
10581         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10582         if (vsi)
10583                 i40e_vsi_release(vsi);
10584 }
10585
10586 /**
10587  * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10588  * @vsi: PF main vsi
10589  * @seid: seid of main or channel VSIs
10590  *
10591  * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10592  * existed before reset
10593  **/
10594 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10595 {
10596         struct i40e_cloud_filter *cfilter;
10597         struct i40e_pf *pf = vsi->back;
10598         struct hlist_node *node;
10599         int ret;
10600
10601         /* Add cloud filters back if they exist */
10602         hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10603                                   cloud_node) {
10604                 if (cfilter->seid != seid)
10605                         continue;
10606
10607                 if (cfilter->dst_port)
10608                         ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10609                                                                 true);
10610                 else
10611                         ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10612
10613                 if (ret) {
10614                         dev_dbg(&pf->pdev->dev,
10615                                 "Failed to rebuild cloud filter, err %pe aq_err %s\n",
10616                                 ERR_PTR(ret),
10617                                 i40e_aq_str(&pf->hw,
10618                                             pf->hw.aq.asq_last_status));
10619                         return ret;
10620                 }
10621         }
10622         return 0;
10623 }
10624
10625 /**
10626  * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10627  * @vsi: PF main vsi
10628  *
10629  * Rebuilds channel VSIs if they existed before reset
10630  **/
10631 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10632 {
10633         struct i40e_channel *ch, *ch_tmp;
10634         int ret;
10635
10636         if (list_empty(&vsi->ch_list))
10637                 return 0;
10638
10639         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10640                 if (!ch->initialized)
10641                         break;
10642                 /* Proceed with creation of channel (VMDq2) VSI */
10643                 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10644                 if (ret) {
10645                         dev_info(&vsi->back->pdev->dev,
10646                                  "failed to rebuild channels using uplink_seid %u\n",
10647                                  vsi->uplink_seid);
10648                         return ret;
10649                 }
10650                 /* Reconfigure TX queues using QTX_CTL register */
10651                 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10652                 if (ret) {
10653                         dev_info(&vsi->back->pdev->dev,
10654                                  "failed to configure TX rings for channel %u\n",
10655                                  ch->seid);
10656                         return ret;
10657                 }
10658                 /* update 'next_base_queue' */
10659                 vsi->next_base_queue = vsi->next_base_queue +
10660                                                         ch->num_queue_pairs;
10661                 if (ch->max_tx_rate) {
10662                         u64 credits = ch->max_tx_rate;
10663
10664                         if (i40e_set_bw_limit(vsi, ch->seid,
10665                                               ch->max_tx_rate))
10666                                 return -EINVAL;
10667
10668                         do_div(credits, I40E_BW_CREDIT_DIVISOR);
10669                         dev_dbg(&vsi->back->pdev->dev,
10670                                 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10671                                 ch->max_tx_rate,
10672                                 credits,
10673                                 ch->seid);
10674                 }
10675                 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10676                 if (ret) {
10677                         dev_dbg(&vsi->back->pdev->dev,
10678                                 "Failed to rebuild cloud filters for channel VSI %u\n",
10679                                 ch->seid);
10680                         return ret;
10681                 }
10682         }
10683         return 0;
10684 }
10685
10686 /**
10687  * i40e_clean_xps_state - clean xps state for every tx_ring
10688  * @vsi: ptr to the VSI
10689  **/
10690 static void i40e_clean_xps_state(struct i40e_vsi *vsi)
10691 {
10692         int i;
10693
10694         if (vsi->tx_rings)
10695                 for (i = 0; i < vsi->num_queue_pairs; i++)
10696                         if (vsi->tx_rings[i])
10697                                 clear_bit(__I40E_TX_XPS_INIT_DONE,
10698                                           vsi->tx_rings[i]->state);
10699 }
10700
10701 /**
10702  * i40e_prep_for_reset - prep for the core to reset
10703  * @pf: board private structure
10704  *
10705  * Close up the VFs and other things in prep for PF Reset.
10706   **/
10707 static void i40e_prep_for_reset(struct i40e_pf *pf)
10708 {
10709         struct i40e_hw *hw = &pf->hw;
10710         int ret = 0;
10711         u32 v;
10712
10713         clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10714         if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10715                 return;
10716         if (i40e_check_asq_alive(&pf->hw))
10717                 i40e_vc_notify_reset(pf);
10718
10719         dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10720
10721         /* quiesce the VSIs and their queues that are not already DOWN */
10722         i40e_pf_quiesce_all_vsi(pf);
10723
10724         for (v = 0; v < pf->num_alloc_vsi; v++) {
10725                 if (pf->vsi[v]) {
10726                         i40e_clean_xps_state(pf->vsi[v]);
10727                         pf->vsi[v]->seid = 0;
10728                 }
10729         }
10730
10731         i40e_shutdown_adminq(&pf->hw);
10732
10733         /* call shutdown HMC */
10734         if (hw->hmc.hmc_obj) {
10735                 ret = i40e_shutdown_lan_hmc(hw);
10736                 if (ret)
10737                         dev_warn(&pf->pdev->dev,
10738                                  "shutdown_lan_hmc failed: %d\n", ret);
10739         }
10740
10741         /* Save the current PTP time so that we can restore the time after the
10742          * reset completes.
10743          */
10744         i40e_ptp_save_hw_time(pf);
10745 }
10746
10747 /**
10748  * i40e_send_version - update firmware with driver version
10749  * @pf: PF struct
10750  */
10751 static void i40e_send_version(struct i40e_pf *pf)
10752 {
10753         struct i40e_driver_version dv;
10754
10755         dv.major_version = 0xff;
10756         dv.minor_version = 0xff;
10757         dv.build_version = 0xff;
10758         dv.subbuild_version = 0;
10759         strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10760         i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10761 }
10762
10763 /**
10764  * i40e_get_oem_version - get OEM specific version information
10765  * @hw: pointer to the hardware structure
10766  **/
10767 static void i40e_get_oem_version(struct i40e_hw *hw)
10768 {
10769         u16 block_offset = 0xffff;
10770         u16 block_length = 0;
10771         u16 capabilities = 0;
10772         u16 gen_snap = 0;
10773         u16 release = 0;
10774
10775 #define I40E_SR_NVM_OEM_VERSION_PTR             0x1B
10776 #define I40E_NVM_OEM_LENGTH_OFFSET              0x00
10777 #define I40E_NVM_OEM_CAPABILITIES_OFFSET        0x01
10778 #define I40E_NVM_OEM_GEN_OFFSET                 0x02
10779 #define I40E_NVM_OEM_RELEASE_OFFSET             0x03
10780 #define I40E_NVM_OEM_CAPABILITIES_MASK          0x000F
10781 #define I40E_NVM_OEM_LENGTH                     3
10782
10783         /* Check if pointer to OEM version block is valid. */
10784         i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10785         if (block_offset == 0xffff)
10786                 return;
10787
10788         /* Check if OEM version block has correct length. */
10789         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10790                            &block_length);
10791         if (block_length < I40E_NVM_OEM_LENGTH)
10792                 return;
10793
10794         /* Check if OEM version format is as expected. */
10795         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10796                            &capabilities);
10797         if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10798                 return;
10799
10800         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10801                            &gen_snap);
10802         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10803                            &release);
10804         hw->nvm.oem_ver =
10805                 FIELD_PREP(I40E_OEM_GEN_MASK | I40E_OEM_SNAP_MASK, gen_snap) |
10806                 FIELD_PREP(I40E_OEM_RELEASE_MASK, release);
10807         hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10808 }
10809
10810 /**
10811  * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10812  * @pf: board private structure
10813  **/
10814 static int i40e_reset(struct i40e_pf *pf)
10815 {
10816         struct i40e_hw *hw = &pf->hw;
10817         int ret;
10818
10819         ret = i40e_pf_reset(hw);
10820         if (ret) {
10821                 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10822                 set_bit(__I40E_RESET_FAILED, pf->state);
10823                 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10824         } else {
10825                 pf->pfr_count++;
10826         }
10827         return ret;
10828 }
10829
10830 /**
10831  * i40e_rebuild - rebuild using a saved config
10832  * @pf: board private structure
10833  * @reinit: if the Main VSI needs to re-initialized.
10834  * @lock_acquired: indicates whether or not the lock has been acquired
10835  * before this function was called.
10836  **/
10837 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10838 {
10839         const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10840         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10841         struct i40e_hw *hw = &pf->hw;
10842         int ret;
10843         u32 val;
10844         int v;
10845
10846         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10847             is_recovery_mode_reported)
10848                 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10849
10850         if (test_bit(__I40E_DOWN, pf->state) &&
10851             !test_bit(__I40E_RECOVERY_MODE, pf->state))
10852                 goto clear_recovery;
10853         dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10854
10855         /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10856         ret = i40e_init_adminq(&pf->hw);
10857         if (ret) {
10858                 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",
10859                          ERR_PTR(ret),
10860                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10861                 goto clear_recovery;
10862         }
10863         i40e_get_oem_version(&pf->hw);
10864
10865         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10866                 /* The following delay is necessary for firmware update. */
10867                 mdelay(1000);
10868         }
10869
10870         /* re-verify the eeprom if we just had an EMP reset */
10871         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10872                 i40e_verify_eeprom(pf);
10873
10874         /* if we are going out of or into recovery mode we have to act
10875          * accordingly with regard to resources initialization
10876          * and deinitialization
10877          */
10878         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10879                 if (i40e_get_capabilities(pf,
10880                                           i40e_aqc_opc_list_func_capabilities))
10881                         goto end_unlock;
10882
10883                 if (is_recovery_mode_reported) {
10884                         /* we're staying in recovery mode so we'll reinitialize
10885                          * misc vector here
10886                          */
10887                         if (i40e_setup_misc_vector_for_recovery_mode(pf))
10888                                 goto end_unlock;
10889                 } else {
10890                         if (!lock_acquired)
10891                                 rtnl_lock();
10892                         /* we're going out of recovery mode so we'll free
10893                          * the IRQ allocated specifically for recovery mode
10894                          * and restore the interrupt scheme
10895                          */
10896                         free_irq(pf->pdev->irq, pf);
10897                         i40e_clear_interrupt_scheme(pf);
10898                         if (i40e_restore_interrupt_scheme(pf))
10899                                 goto end_unlock;
10900                 }
10901
10902                 /* tell the firmware that we're starting */
10903                 i40e_send_version(pf);
10904
10905                 /* bail out in case recovery mode was detected, as there is
10906                  * no need for further configuration.
10907                  */
10908                 goto end_unlock;
10909         }
10910
10911         i40e_clear_pxe_mode(hw);
10912         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10913         if (ret)
10914                 goto end_core_reset;
10915
10916         ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10917                                 hw->func_caps.num_rx_qp, 0, 0);
10918         if (ret) {
10919                 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10920                 goto end_core_reset;
10921         }
10922         ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10923         if (ret) {
10924                 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10925                 goto end_core_reset;
10926         }
10927
10928 #ifdef CONFIG_I40E_DCB
10929         /* Enable FW to write a default DCB config on link-up
10930          * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10931          * is not supported with new link speed
10932          */
10933         if (i40e_is_tc_mqprio_enabled(pf)) {
10934                 i40e_aq_set_dcb_parameters(hw, false, NULL);
10935         } else {
10936                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10937                     (hw->phy.link_info.link_speed &
10938                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10939                         i40e_aq_set_dcb_parameters(hw, false, NULL);
10940                         dev_warn(&pf->pdev->dev,
10941                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10942                         clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
10943                 } else {
10944                         i40e_aq_set_dcb_parameters(hw, true, NULL);
10945                         ret = i40e_init_pf_dcb(pf);
10946                         if (ret) {
10947                                 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10948                                          ret);
10949                                 clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
10950                                 /* Continue without DCB enabled */
10951                         }
10952                 }
10953         }
10954
10955 #endif /* CONFIG_I40E_DCB */
10956         if (!lock_acquired)
10957                 rtnl_lock();
10958         ret = i40e_setup_pf_switch(pf, reinit, true);
10959         if (ret)
10960                 goto end_unlock;
10961
10962         /* The driver only wants link up/down and module qualification
10963          * reports from firmware.  Note the negative logic.
10964          */
10965         ret = i40e_aq_set_phy_int_mask(&pf->hw,
10966                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
10967                                          I40E_AQ_EVENT_MEDIA_NA |
10968                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10969         if (ret)
10970                 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
10971                          ERR_PTR(ret),
10972                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10973
10974         /* Rebuild the VSIs and VEBs that existed before reset.
10975          * They are still in our local switch element arrays, so only
10976          * need to rebuild the switch model in the HW.
10977          *
10978          * If there were VEBs but the reconstitution failed, we'll try
10979          * to recover minimal use by getting the basic PF VSI working.
10980          */
10981         if (vsi->uplink_seid != pf->mac_seid) {
10982                 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10983                 /* find the one VEB connected to the MAC, and find orphans */
10984                 for (v = 0; v < I40E_MAX_VEB; v++) {
10985                         if (!pf->veb[v])
10986                                 continue;
10987
10988                         if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10989                             pf->veb[v]->uplink_seid == 0) {
10990                                 ret = i40e_reconstitute_veb(pf->veb[v]);
10991
10992                                 if (!ret)
10993                                         continue;
10994
10995                                 /* If Main VEB failed, we're in deep doodoo,
10996                                  * so give up rebuilding the switch and set up
10997                                  * for minimal rebuild of PF VSI.
10998                                  * If orphan failed, we'll report the error
10999                                  * but try to keep going.
11000                                  */
11001                                 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
11002                                         dev_info(&pf->pdev->dev,
11003                                                  "rebuild of switch failed: %d, will try to set up simple PF connection\n",
11004                                                  ret);
11005                                         vsi->uplink_seid = pf->mac_seid;
11006                                         break;
11007                                 } else if (pf->veb[v]->uplink_seid == 0) {
11008                                         dev_info(&pf->pdev->dev,
11009                                                  "rebuild of orphan VEB failed: %d\n",
11010                                                  ret);
11011                                 }
11012                         }
11013                 }
11014         }
11015
11016         if (vsi->uplink_seid == pf->mac_seid) {
11017                 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
11018                 /* no VEB, so rebuild only the Main VSI */
11019                 ret = i40e_add_vsi(vsi);
11020                 if (ret) {
11021                         dev_info(&pf->pdev->dev,
11022                                  "rebuild of Main VSI failed: %d\n", ret);
11023                         goto end_unlock;
11024                 }
11025         }
11026
11027         if (vsi->mqprio_qopt.max_rate[0]) {
11028                 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
11029                                                   vsi->mqprio_qopt.max_rate[0]);
11030                 u64 credits = 0;
11031
11032                 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
11033                 if (ret)
11034                         goto end_unlock;
11035
11036                 credits = max_tx_rate;
11037                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
11038                 dev_dbg(&vsi->back->pdev->dev,
11039                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
11040                         max_tx_rate,
11041                         credits,
11042                         vsi->seid);
11043         }
11044
11045         ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
11046         if (ret)
11047                 goto end_unlock;
11048
11049         /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
11050          * for this main VSI if they exist
11051          */
11052         ret = i40e_rebuild_channels(vsi);
11053         if (ret)
11054                 goto end_unlock;
11055
11056         /* Reconfigure hardware for allowing smaller MSS in the case
11057          * of TSO, so that we avoid the MDD being fired and causing
11058          * a reset in the case of small MSS+TSO.
11059          */
11060 #define I40E_REG_MSS          0x000E64DC
11061 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
11062 #define I40E_64BYTE_MSS       0x400000
11063         val = rd32(hw, I40E_REG_MSS);
11064         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11065                 val &= ~I40E_REG_MSS_MIN_MASK;
11066                 val |= I40E_64BYTE_MSS;
11067                 wr32(hw, I40E_REG_MSS, val);
11068         }
11069
11070         if (test_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps)) {
11071                 msleep(75);
11072                 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11073                 if (ret)
11074                         dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
11075                                  ERR_PTR(ret),
11076                                  i40e_aq_str(&pf->hw,
11077                                              pf->hw.aq.asq_last_status));
11078         }
11079         /* reinit the misc interrupt */
11080         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
11081                 ret = i40e_setup_misc_vector(pf);
11082                 if (ret)
11083                         goto end_unlock;
11084         }
11085
11086         /* Add a filter to drop all Flow control frames from any VSI from being
11087          * transmitted. By doing so we stop a malicious VF from sending out
11088          * PAUSE or PFC frames and potentially controlling traffic for other
11089          * PF/VF VSIs.
11090          * The FW can still send Flow control frames if enabled.
11091          */
11092         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11093                                                        pf->main_vsi_seid);
11094
11095         /* restart the VSIs that were rebuilt and running before the reset */
11096         i40e_pf_unquiesce_all_vsi(pf);
11097
11098         /* Release the RTNL lock before we start resetting VFs */
11099         if (!lock_acquired)
11100                 rtnl_unlock();
11101
11102         /* Restore promiscuous settings */
11103         ret = i40e_set_promiscuous(pf, pf->cur_promisc);
11104         if (ret)
11105                 dev_warn(&pf->pdev->dev,
11106                          "Failed to restore promiscuous setting: %s, err %pe aq_err %s\n",
11107                          pf->cur_promisc ? "on" : "off",
11108                          ERR_PTR(ret),
11109                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11110
11111         i40e_reset_all_vfs(pf, true);
11112
11113         /* tell the firmware that we're starting */
11114         i40e_send_version(pf);
11115
11116         /* We've already released the lock, so don't do it again */
11117         goto end_core_reset;
11118
11119 end_unlock:
11120         if (!lock_acquired)
11121                 rtnl_unlock();
11122 end_core_reset:
11123         clear_bit(__I40E_RESET_FAILED, pf->state);
11124 clear_recovery:
11125         clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
11126         clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
11127 }
11128
11129 /**
11130  * i40e_reset_and_rebuild - reset and rebuild using a saved config
11131  * @pf: board private structure
11132  * @reinit: if the Main VSI needs to re-initialized.
11133  * @lock_acquired: indicates whether or not the lock has been acquired
11134  * before this function was called.
11135  **/
11136 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
11137                                    bool lock_acquired)
11138 {
11139         int ret;
11140
11141         if (test_bit(__I40E_IN_REMOVE, pf->state))
11142                 return;
11143         /* Now we wait for GRST to settle out.
11144          * We don't have to delete the VEBs or VSIs from the hw switch
11145          * because the reset will make them disappear.
11146          */
11147         ret = i40e_reset(pf);
11148         if (!ret)
11149                 i40e_rebuild(pf, reinit, lock_acquired);
11150 }
11151
11152 /**
11153  * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
11154  * @pf: board private structure
11155  *
11156  * Close up the VFs and other things in prep for a Core Reset,
11157  * then get ready to rebuild the world.
11158  * @lock_acquired: indicates whether or not the lock has been acquired
11159  * before this function was called.
11160  **/
11161 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
11162 {
11163         i40e_prep_for_reset(pf);
11164         i40e_reset_and_rebuild(pf, false, lock_acquired);
11165 }
11166
11167 /**
11168  * i40e_handle_mdd_event
11169  * @pf: pointer to the PF structure
11170  *
11171  * Called from the MDD irq handler to identify possibly malicious vfs
11172  **/
11173 static void i40e_handle_mdd_event(struct i40e_pf *pf)
11174 {
11175         struct i40e_hw *hw = &pf->hw;
11176         bool mdd_detected = false;
11177         struct i40e_vf *vf;
11178         u32 reg;
11179         int i;
11180
11181         if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
11182                 return;
11183
11184         /* find what triggered the MDD event */
11185         reg = rd32(hw, I40E_GL_MDET_TX);
11186         if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11187                 u8 pf_num = FIELD_GET(I40E_GL_MDET_TX_PF_NUM_MASK, reg);
11188                 u16 vf_num = FIELD_GET(I40E_GL_MDET_TX_VF_NUM_MASK, reg);
11189                 u8 event = FIELD_GET(I40E_GL_MDET_TX_EVENT_MASK, reg);
11190                 u16 queue = FIELD_GET(I40E_GL_MDET_TX_QUEUE_MASK, reg) -
11191                                 pf->hw.func_caps.base_queue;
11192                 if (netif_msg_tx_err(pf))
11193                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11194                                  event, queue, pf_num, vf_num);
11195                 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11196                 mdd_detected = true;
11197         }
11198         reg = rd32(hw, I40E_GL_MDET_RX);
11199         if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11200                 u8 func = FIELD_GET(I40E_GL_MDET_RX_FUNCTION_MASK, reg);
11201                 u8 event = FIELD_GET(I40E_GL_MDET_RX_EVENT_MASK, reg);
11202                 u16 queue = FIELD_GET(I40E_GL_MDET_RX_QUEUE_MASK, reg) -
11203                                 pf->hw.func_caps.base_queue;
11204                 if (netif_msg_rx_err(pf))
11205                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11206                                  event, queue, func);
11207                 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11208                 mdd_detected = true;
11209         }
11210
11211         if (mdd_detected) {
11212                 reg = rd32(hw, I40E_PF_MDET_TX);
11213                 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11214                         wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11215                         dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11216                 }
11217                 reg = rd32(hw, I40E_PF_MDET_RX);
11218                 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11219                         wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11220                         dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11221                 }
11222         }
11223
11224         /* see if one of the VFs needs its hand slapped */
11225         for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11226                 vf = &(pf->vf[i]);
11227                 reg = rd32(hw, I40E_VP_MDET_TX(i));
11228                 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11229                         wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11230                         vf->num_mdd_events++;
11231                         dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11232                                  i);
11233                         dev_info(&pf->pdev->dev,
11234                                  "Use PF Control I/F to re-enable the VF\n");
11235                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11236                 }
11237
11238                 reg = rd32(hw, I40E_VP_MDET_RX(i));
11239                 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11240                         wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11241                         vf->num_mdd_events++;
11242                         dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11243                                  i);
11244                         dev_info(&pf->pdev->dev,
11245                                  "Use PF Control I/F to re-enable the VF\n");
11246                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11247                 }
11248         }
11249
11250         /* re-enable mdd interrupt cause */
11251         clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11252         reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11253         reg |=  I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11254         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11255         i40e_flush(hw);
11256 }
11257
11258 /**
11259  * i40e_service_task - Run the driver's async subtasks
11260  * @work: pointer to work_struct containing our data
11261  **/
11262 static void i40e_service_task(struct work_struct *work)
11263 {
11264         struct i40e_pf *pf = container_of(work,
11265                                           struct i40e_pf,
11266                                           service_task);
11267         unsigned long start_time = jiffies;
11268
11269         /* don't bother with service tasks if a reset is in progress */
11270         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11271             test_bit(__I40E_SUSPENDED, pf->state))
11272                 return;
11273
11274         if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11275                 return;
11276
11277         if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11278                 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11279                 i40e_sync_filters_subtask(pf);
11280                 i40e_reset_subtask(pf);
11281                 i40e_handle_mdd_event(pf);
11282                 i40e_vc_process_vflr_event(pf);
11283                 i40e_watchdog_subtask(pf);
11284                 i40e_fdir_reinit_subtask(pf);
11285                 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11286                         /* Client subtask will reopen next time through. */
11287                         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11288                                                            true);
11289                 } else {
11290                         i40e_client_subtask(pf);
11291                         if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11292                                                pf->state))
11293                                 i40e_notify_client_of_l2_param_changes(
11294                                                                 pf->vsi[pf->lan_vsi]);
11295                 }
11296                 i40e_sync_filters_subtask(pf);
11297         } else {
11298                 i40e_reset_subtask(pf);
11299         }
11300
11301         i40e_clean_adminq_subtask(pf);
11302
11303         /* flush memory to make sure state is correct before next watchdog */
11304         smp_mb__before_atomic();
11305         clear_bit(__I40E_SERVICE_SCHED, pf->state);
11306
11307         /* If the tasks have taken longer than one timer cycle or there
11308          * is more work to be done, reschedule the service task now
11309          * rather than wait for the timer to tick again.
11310          */
11311         if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11312             test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state)             ||
11313             test_bit(__I40E_MDD_EVENT_PENDING, pf->state)                ||
11314             test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11315                 i40e_service_event_schedule(pf);
11316 }
11317
11318 /**
11319  * i40e_service_timer - timer callback
11320  * @t: timer list pointer
11321  **/
11322 static void i40e_service_timer(struct timer_list *t)
11323 {
11324         struct i40e_pf *pf = from_timer(pf, t, service_timer);
11325
11326         mod_timer(&pf->service_timer,
11327                   round_jiffies(jiffies + pf->service_timer_period));
11328         i40e_service_event_schedule(pf);
11329 }
11330
11331 /**
11332  * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11333  * @vsi: the VSI being configured
11334  **/
11335 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11336 {
11337         struct i40e_pf *pf = vsi->back;
11338
11339         switch (vsi->type) {
11340         case I40E_VSI_MAIN:
11341                 vsi->alloc_queue_pairs = pf->num_lan_qps;
11342                 if (!vsi->num_tx_desc)
11343                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11344                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11345                 if (!vsi->num_rx_desc)
11346                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11347                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11348                 if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
11349                         vsi->num_q_vectors = pf->num_lan_msix;
11350                 else
11351                         vsi->num_q_vectors = 1;
11352
11353                 break;
11354
11355         case I40E_VSI_FDIR:
11356                 vsi->alloc_queue_pairs = 1;
11357                 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11358                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11359                 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11360                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11361                 vsi->num_q_vectors = pf->num_fdsb_msix;
11362                 break;
11363
11364         case I40E_VSI_VMDQ2:
11365                 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11366                 if (!vsi->num_tx_desc)
11367                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11368                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11369                 if (!vsi->num_rx_desc)
11370                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11371                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11372                 vsi->num_q_vectors = pf->num_vmdq_msix;
11373                 break;
11374
11375         case I40E_VSI_SRIOV:
11376                 vsi->alloc_queue_pairs = pf->num_vf_qps;
11377                 if (!vsi->num_tx_desc)
11378                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11379                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11380                 if (!vsi->num_rx_desc)
11381                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11382                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11383                 break;
11384
11385         default:
11386                 WARN_ON(1);
11387                 return -ENODATA;
11388         }
11389
11390         if (is_kdump_kernel()) {
11391                 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11392                 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11393         }
11394
11395         return 0;
11396 }
11397
11398 /**
11399  * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11400  * @vsi: VSI pointer
11401  * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11402  *
11403  * On error: returns error code (negative)
11404  * On success: returns 0
11405  **/
11406 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11407 {
11408         struct i40e_ring **next_rings;
11409         int size;
11410         int ret = 0;
11411
11412         /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11413         size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11414                (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11415         vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11416         if (!vsi->tx_rings)
11417                 return -ENOMEM;
11418         next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11419         if (i40e_enabled_xdp_vsi(vsi)) {
11420                 vsi->xdp_rings = next_rings;
11421                 next_rings += vsi->alloc_queue_pairs;
11422         }
11423         vsi->rx_rings = next_rings;
11424
11425         if (alloc_qvectors) {
11426                 /* allocate memory for q_vector pointers */
11427                 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11428                 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11429                 if (!vsi->q_vectors) {
11430                         ret = -ENOMEM;
11431                         goto err_vectors;
11432                 }
11433         }
11434         return ret;
11435
11436 err_vectors:
11437         kfree(vsi->tx_rings);
11438         return ret;
11439 }
11440
11441 /**
11442  * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11443  * @pf: board private structure
11444  * @type: type of VSI
11445  *
11446  * On error: returns error code (negative)
11447  * On success: returns vsi index in PF (positive)
11448  **/
11449 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11450 {
11451         int ret = -ENODEV;
11452         struct i40e_vsi *vsi;
11453         int vsi_idx;
11454         int i;
11455
11456         /* Need to protect the allocation of the VSIs at the PF level */
11457         mutex_lock(&pf->switch_mutex);
11458
11459         /* VSI list may be fragmented if VSI creation/destruction has
11460          * been happening.  We can afford to do a quick scan to look
11461          * for any free VSIs in the list.
11462          *
11463          * find next empty vsi slot, looping back around if necessary
11464          */
11465         i = pf->next_vsi;
11466         while (i < pf->num_alloc_vsi && pf->vsi[i])
11467                 i++;
11468         if (i >= pf->num_alloc_vsi) {
11469                 i = 0;
11470                 while (i < pf->next_vsi && pf->vsi[i])
11471                         i++;
11472         }
11473
11474         if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11475                 vsi_idx = i;             /* Found one! */
11476         } else {
11477                 ret = -ENODEV;
11478                 goto unlock_pf;  /* out of VSI slots! */
11479         }
11480         pf->next_vsi = ++i;
11481
11482         vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11483         if (!vsi) {
11484                 ret = -ENOMEM;
11485                 goto unlock_pf;
11486         }
11487         vsi->type = type;
11488         vsi->back = pf;
11489         set_bit(__I40E_VSI_DOWN, vsi->state);
11490         vsi->flags = 0;
11491         vsi->idx = vsi_idx;
11492         vsi->int_rate_limit = 0;
11493         vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11494                                 pf->rss_table_size : 64;
11495         vsi->netdev_registered = false;
11496         vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11497         hash_init(vsi->mac_filter_hash);
11498         vsi->irqs_ready = false;
11499
11500         if (type == I40E_VSI_MAIN) {
11501                 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11502                 if (!vsi->af_xdp_zc_qps)
11503                         goto err_rings;
11504         }
11505
11506         ret = i40e_set_num_rings_in_vsi(vsi);
11507         if (ret)
11508                 goto err_rings;
11509
11510         ret = i40e_vsi_alloc_arrays(vsi, true);
11511         if (ret)
11512                 goto err_rings;
11513
11514         /* Setup default MSIX irq handler for VSI */
11515         i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11516
11517         /* Initialize VSI lock */
11518         spin_lock_init(&vsi->mac_filter_hash_lock);
11519         pf->vsi[vsi_idx] = vsi;
11520         ret = vsi_idx;
11521         goto unlock_pf;
11522
11523 err_rings:
11524         bitmap_free(vsi->af_xdp_zc_qps);
11525         pf->next_vsi = i - 1;
11526         kfree(vsi);
11527 unlock_pf:
11528         mutex_unlock(&pf->switch_mutex);
11529         return ret;
11530 }
11531
11532 /**
11533  * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11534  * @vsi: VSI pointer
11535  * @free_qvectors: a bool to specify if q_vectors need to be freed.
11536  *
11537  * On error: returns error code (negative)
11538  * On success: returns 0
11539  **/
11540 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11541 {
11542         /* free the ring and vector containers */
11543         if (free_qvectors) {
11544                 kfree(vsi->q_vectors);
11545                 vsi->q_vectors = NULL;
11546         }
11547         kfree(vsi->tx_rings);
11548         vsi->tx_rings = NULL;
11549         vsi->rx_rings = NULL;
11550         vsi->xdp_rings = NULL;
11551 }
11552
11553 /**
11554  * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11555  * and lookup table
11556  * @vsi: Pointer to VSI structure
11557  */
11558 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11559 {
11560         if (!vsi)
11561                 return;
11562
11563         kfree(vsi->rss_hkey_user);
11564         vsi->rss_hkey_user = NULL;
11565
11566         kfree(vsi->rss_lut_user);
11567         vsi->rss_lut_user = NULL;
11568 }
11569
11570 /**
11571  * i40e_vsi_clear - Deallocate the VSI provided
11572  * @vsi: the VSI being un-configured
11573  **/
11574 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11575 {
11576         struct i40e_pf *pf;
11577
11578         if (!vsi)
11579                 return 0;
11580
11581         if (!vsi->back)
11582                 goto free_vsi;
11583         pf = vsi->back;
11584
11585         mutex_lock(&pf->switch_mutex);
11586         if (!pf->vsi[vsi->idx]) {
11587                 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11588                         vsi->idx, vsi->idx, vsi->type);
11589                 goto unlock_vsi;
11590         }
11591
11592         if (pf->vsi[vsi->idx] != vsi) {
11593                 dev_err(&pf->pdev->dev,
11594                         "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11595                         pf->vsi[vsi->idx]->idx,
11596                         pf->vsi[vsi->idx]->type,
11597                         vsi->idx, vsi->type);
11598                 goto unlock_vsi;
11599         }
11600
11601         /* updates the PF for this cleared vsi */
11602         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11603         i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11604
11605         bitmap_free(vsi->af_xdp_zc_qps);
11606         i40e_vsi_free_arrays(vsi, true);
11607         i40e_clear_rss_config_user(vsi);
11608
11609         pf->vsi[vsi->idx] = NULL;
11610         if (vsi->idx < pf->next_vsi)
11611                 pf->next_vsi = vsi->idx;
11612
11613 unlock_vsi:
11614         mutex_unlock(&pf->switch_mutex);
11615 free_vsi:
11616         kfree(vsi);
11617
11618         return 0;
11619 }
11620
11621 /**
11622  * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11623  * @vsi: the VSI being cleaned
11624  **/
11625 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11626 {
11627         int i;
11628
11629         if (vsi->tx_rings && vsi->tx_rings[0]) {
11630                 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11631                         kfree_rcu(vsi->tx_rings[i], rcu);
11632                         WRITE_ONCE(vsi->tx_rings[i], NULL);
11633                         WRITE_ONCE(vsi->rx_rings[i], NULL);
11634                         if (vsi->xdp_rings)
11635                                 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11636                 }
11637         }
11638 }
11639
11640 /**
11641  * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11642  * @vsi: the VSI being configured
11643  **/
11644 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11645 {
11646         int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11647         struct i40e_pf *pf = vsi->back;
11648         struct i40e_ring *ring;
11649
11650         /* Set basic values in the rings to be used later during open() */
11651         for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11652                 /* allocate space for both Tx and Rx in one shot */
11653                 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11654                 if (!ring)
11655                         goto err_out;
11656
11657                 ring->queue_index = i;
11658                 ring->reg_idx = vsi->base_queue + i;
11659                 ring->ring_active = false;
11660                 ring->vsi = vsi;
11661                 ring->netdev = vsi->netdev;
11662                 ring->dev = &pf->pdev->dev;
11663                 ring->count = vsi->num_tx_desc;
11664                 ring->size = 0;
11665                 ring->dcb_tc = 0;
11666                 if (test_bit(I40E_HW_CAP_WB_ON_ITR, vsi->back->hw.caps))
11667                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11668                 ring->itr_setting = pf->tx_itr_default;
11669                 WRITE_ONCE(vsi->tx_rings[i], ring++);
11670
11671                 if (!i40e_enabled_xdp_vsi(vsi))
11672                         goto setup_rx;
11673
11674                 ring->queue_index = vsi->alloc_queue_pairs + i;
11675                 ring->reg_idx = vsi->base_queue + ring->queue_index;
11676                 ring->ring_active = false;
11677                 ring->vsi = vsi;
11678                 ring->netdev = NULL;
11679                 ring->dev = &pf->pdev->dev;
11680                 ring->count = vsi->num_tx_desc;
11681                 ring->size = 0;
11682                 ring->dcb_tc = 0;
11683                 if (test_bit(I40E_HW_CAP_WB_ON_ITR, vsi->back->hw.caps))
11684                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11685                 set_ring_xdp(ring);
11686                 ring->itr_setting = pf->tx_itr_default;
11687                 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11688
11689 setup_rx:
11690                 ring->queue_index = i;
11691                 ring->reg_idx = vsi->base_queue + i;
11692                 ring->ring_active = false;
11693                 ring->vsi = vsi;
11694                 ring->netdev = vsi->netdev;
11695                 ring->dev = &pf->pdev->dev;
11696                 ring->count = vsi->num_rx_desc;
11697                 ring->size = 0;
11698                 ring->dcb_tc = 0;
11699                 ring->itr_setting = pf->rx_itr_default;
11700                 WRITE_ONCE(vsi->rx_rings[i], ring);
11701         }
11702
11703         return 0;
11704
11705 err_out:
11706         i40e_vsi_clear_rings(vsi);
11707         return -ENOMEM;
11708 }
11709
11710 /**
11711  * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11712  * @pf: board private structure
11713  * @vectors: the number of MSI-X vectors to request
11714  *
11715  * Returns the number of vectors reserved, or error
11716  **/
11717 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11718 {
11719         vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11720                                         I40E_MIN_MSIX, vectors);
11721         if (vectors < 0) {
11722                 dev_info(&pf->pdev->dev,
11723                          "MSI-X vector reservation failed: %d\n", vectors);
11724                 vectors = 0;
11725         }
11726
11727         return vectors;
11728 }
11729
11730 /**
11731  * i40e_init_msix - Setup the MSIX capability
11732  * @pf: board private structure
11733  *
11734  * Work with the OS to set up the MSIX vectors needed.
11735  *
11736  * Returns the number of vectors reserved or negative on failure
11737  **/
11738 static int i40e_init_msix(struct i40e_pf *pf)
11739 {
11740         struct i40e_hw *hw = &pf->hw;
11741         int cpus, extra_vectors;
11742         int vectors_left;
11743         int v_budget, i;
11744         int v_actual;
11745         int iwarp_requested = 0;
11746
11747         if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
11748                 return -ENODEV;
11749
11750         /* The number of vectors we'll request will be comprised of:
11751          *   - Add 1 for "other" cause for Admin Queue events, etc.
11752          *   - The number of LAN queue pairs
11753          *      - Queues being used for RSS.
11754          *              We don't need as many as max_rss_size vectors.
11755          *              use rss_size instead in the calculation since that
11756          *              is governed by number of cpus in the system.
11757          *      - assumes symmetric Tx/Rx pairing
11758          *   - The number of VMDq pairs
11759          *   - The CPU count within the NUMA node if iWARP is enabled
11760          * Once we count this up, try the request.
11761          *
11762          * If we can't get what we want, we'll simplify to nearly nothing
11763          * and try again.  If that still fails, we punt.
11764          */
11765         vectors_left = hw->func_caps.num_msix_vectors;
11766         v_budget = 0;
11767
11768         /* reserve one vector for miscellaneous handler */
11769         if (vectors_left) {
11770                 v_budget++;
11771                 vectors_left--;
11772         }
11773
11774         /* reserve some vectors for the main PF traffic queues. Initially we
11775          * only reserve at most 50% of the available vectors, in the case that
11776          * the number of online CPUs is large. This ensures that we can enable
11777          * extra features as well. Once we've enabled the other features, we
11778          * will use any remaining vectors to reach as close as we can to the
11779          * number of online CPUs.
11780          */
11781         cpus = num_online_cpus();
11782         pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11783         vectors_left -= pf->num_lan_msix;
11784
11785         /* reserve one vector for sideband flow director */
11786         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
11787                 if (vectors_left) {
11788                         pf->num_fdsb_msix = 1;
11789                         v_budget++;
11790                         vectors_left--;
11791                 } else {
11792                         pf->num_fdsb_msix = 0;
11793                 }
11794         }
11795
11796         /* can we reserve enough for iWARP? */
11797         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11798                 iwarp_requested = pf->num_iwarp_msix;
11799
11800                 if (!vectors_left)
11801                         pf->num_iwarp_msix = 0;
11802                 else if (vectors_left < pf->num_iwarp_msix)
11803                         pf->num_iwarp_msix = 1;
11804                 v_budget += pf->num_iwarp_msix;
11805                 vectors_left -= pf->num_iwarp_msix;
11806         }
11807
11808         /* any vectors left over go for VMDq support */
11809         if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags)) {
11810                 if (!vectors_left) {
11811                         pf->num_vmdq_msix = 0;
11812                         pf->num_vmdq_qps = 0;
11813                 } else {
11814                         int vmdq_vecs_wanted =
11815                                 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11816                         int vmdq_vecs =
11817                                 min_t(int, vectors_left, vmdq_vecs_wanted);
11818
11819                         /* if we're short on vectors for what's desired, we limit
11820                          * the queues per vmdq.  If this is still more than are
11821                          * available, the user will need to change the number of
11822                          * queues/vectors used by the PF later with the ethtool
11823                          * channels command
11824                          */
11825                         if (vectors_left < vmdq_vecs_wanted) {
11826                                 pf->num_vmdq_qps = 1;
11827                                 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11828                                 vmdq_vecs = min_t(int,
11829                                                   vectors_left,
11830                                                   vmdq_vecs_wanted);
11831                         }
11832                         pf->num_vmdq_msix = pf->num_vmdq_qps;
11833
11834                         v_budget += vmdq_vecs;
11835                         vectors_left -= vmdq_vecs;
11836                 }
11837         }
11838
11839         /* On systems with a large number of SMP cores, we previously limited
11840          * the number of vectors for num_lan_msix to be at most 50% of the
11841          * available vectors, to allow for other features. Now, we add back
11842          * the remaining vectors. However, we ensure that the total
11843          * num_lan_msix will not exceed num_online_cpus(). To do this, we
11844          * calculate the number of vectors we can add without going over the
11845          * cap of CPUs. For systems with a small number of CPUs this will be
11846          * zero.
11847          */
11848         extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11849         pf->num_lan_msix += extra_vectors;
11850         vectors_left -= extra_vectors;
11851
11852         WARN(vectors_left < 0,
11853              "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11854
11855         v_budget += pf->num_lan_msix;
11856         pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11857                                    GFP_KERNEL);
11858         if (!pf->msix_entries)
11859                 return -ENOMEM;
11860
11861         for (i = 0; i < v_budget; i++)
11862                 pf->msix_entries[i].entry = i;
11863         v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11864
11865         if (v_actual < I40E_MIN_MSIX) {
11866                 clear_bit(I40E_FLAG_MSIX_ENA, pf->flags);
11867                 kfree(pf->msix_entries);
11868                 pf->msix_entries = NULL;
11869                 pci_disable_msix(pf->pdev);
11870                 return -ENODEV;
11871
11872         } else if (v_actual == I40E_MIN_MSIX) {
11873                 /* Adjust for minimal MSIX use */
11874                 pf->num_vmdq_vsis = 0;
11875                 pf->num_vmdq_qps = 0;
11876                 pf->num_lan_qps = 1;
11877                 pf->num_lan_msix = 1;
11878
11879         } else if (v_actual != v_budget) {
11880                 /* If we have limited resources, we will start with no vectors
11881                  * for the special features and then allocate vectors to some
11882                  * of these features based on the policy and at the end disable
11883                  * the features that did not get any vectors.
11884                  */
11885                 int vec;
11886
11887                 dev_info(&pf->pdev->dev,
11888                          "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11889                          v_actual, v_budget);
11890                 /* reserve the misc vector */
11891                 vec = v_actual - 1;
11892
11893                 /* Scale vector usage down */
11894                 pf->num_vmdq_msix = 1;    /* force VMDqs to only one vector */
11895                 pf->num_vmdq_vsis = 1;
11896                 pf->num_vmdq_qps = 1;
11897
11898                 /* partition out the remaining vectors */
11899                 switch (vec) {
11900                 case 2:
11901                         pf->num_lan_msix = 1;
11902                         break;
11903                 case 3:
11904                         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11905                                 pf->num_lan_msix = 1;
11906                                 pf->num_iwarp_msix = 1;
11907                         } else {
11908                                 pf->num_lan_msix = 2;
11909                         }
11910                         break;
11911                 default:
11912                         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
11913                                 pf->num_iwarp_msix = min_t(int, (vec / 3),
11914                                                  iwarp_requested);
11915                                 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11916                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11917                         } else {
11918                                 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11919                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11920                         }
11921                         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
11922                                 pf->num_fdsb_msix = 1;
11923                                 vec--;
11924                         }
11925                         pf->num_lan_msix = min_t(int,
11926                                (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11927                                                               pf->num_lan_msix);
11928                         pf->num_lan_qps = pf->num_lan_msix;
11929                         break;
11930                 }
11931         }
11932
11933         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) && pf->num_fdsb_msix == 0) {
11934                 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11935                 clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
11936                 set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
11937         }
11938         if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags) && pf->num_vmdq_msix == 0) {
11939                 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11940                 clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
11941         }
11942
11943         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags) &&
11944             pf->num_iwarp_msix == 0) {
11945                 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11946                 clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
11947         }
11948         i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11949                    "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11950                    pf->num_lan_msix,
11951                    pf->num_vmdq_msix * pf->num_vmdq_vsis,
11952                    pf->num_fdsb_msix,
11953                    pf->num_iwarp_msix);
11954
11955         return v_actual;
11956 }
11957
11958 /**
11959  * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11960  * @vsi: the VSI being configured
11961  * @v_idx: index of the vector in the vsi struct
11962  *
11963  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
11964  **/
11965 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11966 {
11967         struct i40e_q_vector *q_vector;
11968
11969         /* allocate q_vector */
11970         q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11971         if (!q_vector)
11972                 return -ENOMEM;
11973
11974         q_vector->vsi = vsi;
11975         q_vector->v_idx = v_idx;
11976         cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11977
11978         if (vsi->netdev)
11979                 netif_napi_add(vsi->netdev, &q_vector->napi, i40e_napi_poll);
11980
11981         /* tie q_vector and vsi together */
11982         vsi->q_vectors[v_idx] = q_vector;
11983
11984         return 0;
11985 }
11986
11987 /**
11988  * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11989  * @vsi: the VSI being configured
11990  *
11991  * We allocate one q_vector per queue interrupt.  If allocation fails we
11992  * return -ENOMEM.
11993  **/
11994 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11995 {
11996         struct i40e_pf *pf = vsi->back;
11997         int err, v_idx, num_q_vectors;
11998
11999         /* if not MSIX, give the one vector only to the LAN VSI */
12000         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
12001                 num_q_vectors = vsi->num_q_vectors;
12002         else if (vsi == pf->vsi[pf->lan_vsi])
12003                 num_q_vectors = 1;
12004         else
12005                 return -EINVAL;
12006
12007         for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
12008                 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
12009                 if (err)
12010                         goto err_out;
12011         }
12012
12013         return 0;
12014
12015 err_out:
12016         while (v_idx--)
12017                 i40e_free_q_vector(vsi, v_idx);
12018
12019         return err;
12020 }
12021
12022 /**
12023  * i40e_init_interrupt_scheme - Determine proper interrupt scheme
12024  * @pf: board private structure to initialize
12025  **/
12026 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
12027 {
12028         int vectors = 0;
12029         ssize_t size;
12030
12031         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
12032                 vectors = i40e_init_msix(pf);
12033                 if (vectors < 0) {
12034                         clear_bit(I40E_FLAG_MSIX_ENA, pf->flags);
12035                         clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
12036                         clear_bit(I40E_FLAG_RSS_ENA, pf->flags);
12037                         clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
12038                         clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
12039                         clear_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
12040                         clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12041                         clear_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
12042                         clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
12043                         set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
12044
12045                         /* rework the queue expectations without MSIX */
12046                         i40e_determine_queue_usage(pf);
12047                 }
12048         }
12049
12050         if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
12051             test_bit(I40E_FLAG_MSI_ENA, pf->flags)) {
12052                 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
12053                 vectors = pci_enable_msi(pf->pdev);
12054                 if (vectors < 0) {
12055                         dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
12056                                  vectors);
12057                         clear_bit(I40E_FLAG_MSI_ENA, pf->flags);
12058                 }
12059                 vectors = 1;  /* one MSI or Legacy vector */
12060         }
12061
12062         if (!test_bit(I40E_FLAG_MSI_ENA, pf->flags) &&
12063             !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
12064                 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
12065
12066         /* set up vector assignment tracking */
12067         size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
12068         pf->irq_pile = kzalloc(size, GFP_KERNEL);
12069         if (!pf->irq_pile)
12070                 return -ENOMEM;
12071
12072         pf->irq_pile->num_entries = vectors;
12073
12074         /* track first vector for misc interrupts, ignore return */
12075         (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
12076
12077         return 0;
12078 }
12079
12080 /**
12081  * i40e_restore_interrupt_scheme - Restore the interrupt scheme
12082  * @pf: private board data structure
12083  *
12084  * Restore the interrupt scheme that was cleared when we suspended the
12085  * device. This should be called during resume to re-allocate the q_vectors
12086  * and reacquire IRQs.
12087  */
12088 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
12089 {
12090         int err, i;
12091
12092         /* We cleared the MSI and MSI-X flags when disabling the old interrupt
12093          * scheme. We need to re-enabled them here in order to attempt to
12094          * re-acquire the MSI or MSI-X vectors
12095          */
12096         set_bit(I40E_FLAG_MSI_ENA, pf->flags);
12097         set_bit(I40E_FLAG_MSIX_ENA, pf->flags);
12098
12099         err = i40e_init_interrupt_scheme(pf);
12100         if (err)
12101                 return err;
12102
12103         /* Now that we've re-acquired IRQs, we need to remap the vectors and
12104          * rings together again.
12105          */
12106         for (i = 0; i < pf->num_alloc_vsi; i++) {
12107                 if (pf->vsi[i]) {
12108                         err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
12109                         if (err)
12110                                 goto err_unwind;
12111                         i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
12112                 }
12113         }
12114
12115         err = i40e_setup_misc_vector(pf);
12116         if (err)
12117                 goto err_unwind;
12118
12119         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags))
12120                 i40e_client_update_msix_info(pf);
12121
12122         return 0;
12123
12124 err_unwind:
12125         while (i--) {
12126                 if (pf->vsi[i])
12127                         i40e_vsi_free_q_vectors(pf->vsi[i]);
12128         }
12129
12130         return err;
12131 }
12132
12133 /**
12134  * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
12135  * non queue events in recovery mode
12136  * @pf: board private structure
12137  *
12138  * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
12139  * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
12140  * This is handled differently than in recovery mode since no Tx/Rx resources
12141  * are being allocated.
12142  **/
12143 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
12144 {
12145         int err;
12146
12147         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
12148                 err = i40e_setup_misc_vector(pf);
12149
12150                 if (err) {
12151                         dev_info(&pf->pdev->dev,
12152                                  "MSI-X misc vector request failed, error %d\n",
12153                                  err);
12154                         return err;
12155                 }
12156         } else {
12157                 u32 flags = test_bit(I40E_FLAG_MSI_ENA, pf->flags) ? 0 : IRQF_SHARED;
12158
12159                 err = request_irq(pf->pdev->irq, i40e_intr, flags,
12160                                   pf->int_name, pf);
12161
12162                 if (err) {
12163                         dev_info(&pf->pdev->dev,
12164                                  "MSI/legacy misc vector request failed, error %d\n",
12165                                  err);
12166                         return err;
12167                 }
12168                 i40e_enable_misc_int_causes(pf);
12169                 i40e_irq_dynamic_enable_icr0(pf);
12170         }
12171
12172         return 0;
12173 }
12174
12175 /**
12176  * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
12177  * @pf: board private structure
12178  *
12179  * This sets up the handler for MSIX 0, which is used to manage the
12180  * non-queue interrupts, e.g. AdminQ and errors.  This is not used
12181  * when in MSI or Legacy interrupt mode.
12182  **/
12183 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12184 {
12185         struct i40e_hw *hw = &pf->hw;
12186         int err = 0;
12187
12188         /* Only request the IRQ once, the first time through. */
12189         if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12190                 err = request_irq(pf->msix_entries[0].vector,
12191                                   i40e_intr, 0, pf->int_name, pf);
12192                 if (err) {
12193                         clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12194                         dev_info(&pf->pdev->dev,
12195                                  "request_irq for %s failed: %d\n",
12196                                  pf->int_name, err);
12197                         return -EFAULT;
12198                 }
12199         }
12200
12201         i40e_enable_misc_int_causes(pf);
12202
12203         /* associate no queues to the misc vector */
12204         wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12205         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12206
12207         i40e_flush(hw);
12208
12209         i40e_irq_dynamic_enable_icr0(pf);
12210
12211         return err;
12212 }
12213
12214 /**
12215  * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12216  * @vsi: Pointer to vsi structure
12217  * @seed: Buffter to store the hash keys
12218  * @lut: Buffer to store the lookup table entries
12219  * @lut_size: Size of buffer to store the lookup table entries
12220  *
12221  * Return 0 on success, negative on failure
12222  */
12223 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12224                            u8 *lut, u16 lut_size)
12225 {
12226         struct i40e_pf *pf = vsi->back;
12227         struct i40e_hw *hw = &pf->hw;
12228         int ret = 0;
12229
12230         if (seed) {
12231                 ret = i40e_aq_get_rss_key(hw, vsi->id,
12232                         (struct i40e_aqc_get_set_rss_key_data *)seed);
12233                 if (ret) {
12234                         dev_info(&pf->pdev->dev,
12235                                  "Cannot get RSS key, err %pe aq_err %s\n",
12236                                  ERR_PTR(ret),
12237                                  i40e_aq_str(&pf->hw,
12238                                              pf->hw.aq.asq_last_status));
12239                         return ret;
12240                 }
12241         }
12242
12243         if (lut) {
12244                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12245
12246                 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12247                 if (ret) {
12248                         dev_info(&pf->pdev->dev,
12249                                  "Cannot get RSS lut, err %pe aq_err %s\n",
12250                                  ERR_PTR(ret),
12251                                  i40e_aq_str(&pf->hw,
12252                                              pf->hw.aq.asq_last_status));
12253                         return ret;
12254                 }
12255         }
12256
12257         return ret;
12258 }
12259
12260 /**
12261  * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12262  * @vsi: Pointer to vsi structure
12263  * @seed: RSS hash seed
12264  * @lut: Lookup table
12265  * @lut_size: Lookup table size
12266  *
12267  * Returns 0 on success, negative on failure
12268  **/
12269 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12270                                const u8 *lut, u16 lut_size)
12271 {
12272         struct i40e_pf *pf = vsi->back;
12273         struct i40e_hw *hw = &pf->hw;
12274         u16 vf_id = vsi->vf_id;
12275         u8 i;
12276
12277         /* Fill out hash function seed */
12278         if (seed) {
12279                 u32 *seed_dw = (u32 *)seed;
12280
12281                 if (vsi->type == I40E_VSI_MAIN) {
12282                         for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12283                                 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12284                 } else if (vsi->type == I40E_VSI_SRIOV) {
12285                         for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12286                                 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12287                 } else {
12288                         dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12289                 }
12290         }
12291
12292         if (lut) {
12293                 u32 *lut_dw = (u32 *)lut;
12294
12295                 if (vsi->type == I40E_VSI_MAIN) {
12296                         if (lut_size != I40E_HLUT_ARRAY_SIZE)
12297                                 return -EINVAL;
12298                         for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12299                                 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12300                 } else if (vsi->type == I40E_VSI_SRIOV) {
12301                         if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12302                                 return -EINVAL;
12303                         for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12304                                 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12305                 } else {
12306                         dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12307                 }
12308         }
12309         i40e_flush(hw);
12310
12311         return 0;
12312 }
12313
12314 /**
12315  * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12316  * @vsi: Pointer to VSI structure
12317  * @seed: Buffer to store the keys
12318  * @lut: Buffer to store the lookup table entries
12319  * @lut_size: Size of buffer to store the lookup table entries
12320  *
12321  * Returns 0 on success, negative on failure
12322  */
12323 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12324                             u8 *lut, u16 lut_size)
12325 {
12326         struct i40e_pf *pf = vsi->back;
12327         struct i40e_hw *hw = &pf->hw;
12328         u16 i;
12329
12330         if (seed) {
12331                 u32 *seed_dw = (u32 *)seed;
12332
12333                 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12334                         seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12335         }
12336         if (lut) {
12337                 u32 *lut_dw = (u32 *)lut;
12338
12339                 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12340                         return -EINVAL;
12341                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12342                         lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12343         }
12344
12345         return 0;
12346 }
12347
12348 /**
12349  * i40e_config_rss - Configure RSS keys and lut
12350  * @vsi: Pointer to VSI structure
12351  * @seed: RSS hash seed
12352  * @lut: Lookup table
12353  * @lut_size: Lookup table size
12354  *
12355  * Returns 0 on success, negative on failure
12356  */
12357 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12358 {
12359         struct i40e_pf *pf = vsi->back;
12360
12361         if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
12362                 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12363         else
12364                 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12365 }
12366
12367 /**
12368  * i40e_get_rss - Get RSS keys and lut
12369  * @vsi: Pointer to VSI structure
12370  * @seed: Buffer to store the keys
12371  * @lut: Buffer to store the lookup table entries
12372  * @lut_size: Size of buffer to store the lookup table entries
12373  *
12374  * Returns 0 on success, negative on failure
12375  */
12376 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12377 {
12378         struct i40e_pf *pf = vsi->back;
12379
12380         if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps))
12381                 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12382         else
12383                 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12384 }
12385
12386 /**
12387  * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12388  * @pf: Pointer to board private structure
12389  * @lut: Lookup table
12390  * @rss_table_size: Lookup table size
12391  * @rss_size: Range of queue number for hashing
12392  */
12393 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12394                        u16 rss_table_size, u16 rss_size)
12395 {
12396         u16 i;
12397
12398         for (i = 0; i < rss_table_size; i++)
12399                 lut[i] = i % rss_size;
12400 }
12401
12402 /**
12403  * i40e_pf_config_rss - Prepare for RSS if used
12404  * @pf: board private structure
12405  **/
12406 static int i40e_pf_config_rss(struct i40e_pf *pf)
12407 {
12408         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12409         u8 seed[I40E_HKEY_ARRAY_SIZE];
12410         u8 *lut;
12411         struct i40e_hw *hw = &pf->hw;
12412         u32 reg_val;
12413         u64 hena;
12414         int ret;
12415
12416         /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12417         hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12418                 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12419         hena |= i40e_pf_get_default_rss_hena(pf);
12420
12421         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12422         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12423
12424         /* Determine the RSS table size based on the hardware capabilities */
12425         reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12426         reg_val = (pf->rss_table_size == 512) ?
12427                         (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12428                         (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12429         i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12430
12431         /* Determine the RSS size of the VSI */
12432         if (!vsi->rss_size) {
12433                 u16 qcount;
12434                 /* If the firmware does something weird during VSI init, we
12435                  * could end up with zero TCs. Check for that to avoid
12436                  * divide-by-zero. It probably won't pass traffic, but it also
12437                  * won't panic.
12438                  */
12439                 qcount = vsi->num_queue_pairs /
12440                          (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12441                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12442         }
12443         if (!vsi->rss_size)
12444                 return -EINVAL;
12445
12446         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12447         if (!lut)
12448                 return -ENOMEM;
12449
12450         /* Use user configured lut if there is one, otherwise use default */
12451         if (vsi->rss_lut_user)
12452                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12453         else
12454                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12455
12456         /* Use user configured hash key if there is one, otherwise
12457          * use default.
12458          */
12459         if (vsi->rss_hkey_user)
12460                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12461         else
12462                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12463         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12464         kfree(lut);
12465
12466         return ret;
12467 }
12468
12469 /**
12470  * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12471  * @pf: board private structure
12472  * @queue_count: the requested queue count for rss.
12473  *
12474  * returns 0 if rss is not enabled, if enabled returns the final rss queue
12475  * count which may be different from the requested queue count.
12476  * Note: expects to be called while under rtnl_lock()
12477  **/
12478 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12479 {
12480         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12481         int new_rss_size;
12482
12483         if (!test_bit(I40E_FLAG_RSS_ENA, pf->flags))
12484                 return 0;
12485
12486         queue_count = min_t(int, queue_count, num_online_cpus());
12487         new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12488
12489         if (queue_count != vsi->num_queue_pairs) {
12490                 u16 qcount;
12491
12492                 vsi->req_queue_pairs = queue_count;
12493                 i40e_prep_for_reset(pf);
12494                 if (test_bit(__I40E_IN_REMOVE, pf->state))
12495                         return pf->alloc_rss_size;
12496
12497                 pf->alloc_rss_size = new_rss_size;
12498
12499                 i40e_reset_and_rebuild(pf, true, true);
12500
12501                 /* Discard the user configured hash keys and lut, if less
12502                  * queues are enabled.
12503                  */
12504                 if (queue_count < vsi->rss_size) {
12505                         i40e_clear_rss_config_user(vsi);
12506                         dev_dbg(&pf->pdev->dev,
12507                                 "discard user configured hash keys and lut\n");
12508                 }
12509
12510                 /* Reset vsi->rss_size, as number of enabled queues changed */
12511                 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12512                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12513
12514                 i40e_pf_config_rss(pf);
12515         }
12516         dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count:  %d/%d\n",
12517                  vsi->req_queue_pairs, pf->rss_size_max);
12518         return pf->alloc_rss_size;
12519 }
12520
12521 /**
12522  * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12523  * @pf: board private structure
12524  **/
12525 int i40e_get_partition_bw_setting(struct i40e_pf *pf)
12526 {
12527         bool min_valid, max_valid;
12528         u32 max_bw, min_bw;
12529         int status;
12530
12531         status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12532                                            &min_valid, &max_valid);
12533
12534         if (!status) {
12535                 if (min_valid)
12536                         pf->min_bw = min_bw;
12537                 if (max_valid)
12538                         pf->max_bw = max_bw;
12539         }
12540
12541         return status;
12542 }
12543
12544 /**
12545  * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12546  * @pf: board private structure
12547  **/
12548 int i40e_set_partition_bw_setting(struct i40e_pf *pf)
12549 {
12550         struct i40e_aqc_configure_partition_bw_data bw_data;
12551         int status;
12552
12553         memset(&bw_data, 0, sizeof(bw_data));
12554
12555         /* Set the valid bit for this PF */
12556         bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12557         bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12558         bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12559
12560         /* Set the new bandwidths */
12561         status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12562
12563         return status;
12564 }
12565
12566 /**
12567  * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12568  * @pf: board private structure
12569  **/
12570 int i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12571 {
12572         /* Commit temporary BW setting to permanent NVM image */
12573         enum i40e_admin_queue_err last_aq_status;
12574         u16 nvm_word;
12575         int ret;
12576
12577         if (pf->hw.partition_id != 1) {
12578                 dev_info(&pf->pdev->dev,
12579                          "Commit BW only works on partition 1! This is partition %d",
12580                          pf->hw.partition_id);
12581                 ret = -EOPNOTSUPP;
12582                 goto bw_commit_out;
12583         }
12584
12585         /* Acquire NVM for read access */
12586         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12587         last_aq_status = pf->hw.aq.asq_last_status;
12588         if (ret) {
12589                 dev_info(&pf->pdev->dev,
12590                          "Cannot acquire NVM for read access, err %pe aq_err %s\n",
12591                          ERR_PTR(ret),
12592                          i40e_aq_str(&pf->hw, last_aq_status));
12593                 goto bw_commit_out;
12594         }
12595
12596         /* Read word 0x10 of NVM - SW compatibility word 1 */
12597         ret = i40e_aq_read_nvm(&pf->hw,
12598                                I40E_SR_NVM_CONTROL_WORD,
12599                                0x10, sizeof(nvm_word), &nvm_word,
12600                                false, NULL);
12601         /* Save off last admin queue command status before releasing
12602          * the NVM
12603          */
12604         last_aq_status = pf->hw.aq.asq_last_status;
12605         i40e_release_nvm(&pf->hw);
12606         if (ret) {
12607                 dev_info(&pf->pdev->dev, "NVM read error, err %pe aq_err %s\n",
12608                          ERR_PTR(ret),
12609                          i40e_aq_str(&pf->hw, last_aq_status));
12610                 goto bw_commit_out;
12611         }
12612
12613         /* Wait a bit for NVM release to complete */
12614         msleep(50);
12615
12616         /* Acquire NVM for write access */
12617         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12618         last_aq_status = pf->hw.aq.asq_last_status;
12619         if (ret) {
12620                 dev_info(&pf->pdev->dev,
12621                          "Cannot acquire NVM for write access, err %pe aq_err %s\n",
12622                          ERR_PTR(ret),
12623                          i40e_aq_str(&pf->hw, last_aq_status));
12624                 goto bw_commit_out;
12625         }
12626         /* Write it back out unchanged to initiate update NVM,
12627          * which will force a write of the shadow (alt) RAM to
12628          * the NVM - thus storing the bandwidth values permanently.
12629          */
12630         ret = i40e_aq_update_nvm(&pf->hw,
12631                                  I40E_SR_NVM_CONTROL_WORD,
12632                                  0x10, sizeof(nvm_word),
12633                                  &nvm_word, true, 0, NULL);
12634         /* Save off last admin queue command status before releasing
12635          * the NVM
12636          */
12637         last_aq_status = pf->hw.aq.asq_last_status;
12638         i40e_release_nvm(&pf->hw);
12639         if (ret)
12640                 dev_info(&pf->pdev->dev,
12641                          "BW settings NOT SAVED, err %pe aq_err %s\n",
12642                          ERR_PTR(ret),
12643                          i40e_aq_str(&pf->hw, last_aq_status));
12644 bw_commit_out:
12645
12646         return ret;
12647 }
12648
12649 /**
12650  * i40e_is_total_port_shutdown_enabled - read NVM and return value
12651  * if total port shutdown feature is enabled for this PF
12652  * @pf: board private structure
12653  **/
12654 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12655 {
12656 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED        BIT(4)
12657 #define I40E_FEATURES_ENABLE_PTR                0x2A
12658 #define I40E_CURRENT_SETTING_PTR                0x2B
12659 #define I40E_LINK_BEHAVIOR_WORD_OFFSET          0x2D
12660 #define I40E_LINK_BEHAVIOR_WORD_LENGTH          0x1
12661 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED    BIT(0)
12662 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH      4
12663         u16 sr_emp_sr_settings_ptr = 0;
12664         u16 features_enable = 0;
12665         u16 link_behavior = 0;
12666         int read_status = 0;
12667         bool ret = false;
12668
12669         read_status = i40e_read_nvm_word(&pf->hw,
12670                                          I40E_SR_EMP_SR_SETTINGS_PTR,
12671                                          &sr_emp_sr_settings_ptr);
12672         if (read_status)
12673                 goto err_nvm;
12674         read_status = i40e_read_nvm_word(&pf->hw,
12675                                          sr_emp_sr_settings_ptr +
12676                                          I40E_FEATURES_ENABLE_PTR,
12677                                          &features_enable);
12678         if (read_status)
12679                 goto err_nvm;
12680         if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12681                 read_status = i40e_read_nvm_module_data(&pf->hw,
12682                                                         I40E_SR_EMP_SR_SETTINGS_PTR,
12683                                                         I40E_CURRENT_SETTING_PTR,
12684                                                         I40E_LINK_BEHAVIOR_WORD_OFFSET,
12685                                                         I40E_LINK_BEHAVIOR_WORD_LENGTH,
12686                                                         &link_behavior);
12687                 if (read_status)
12688                         goto err_nvm;
12689                 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12690                 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12691         }
12692         return ret;
12693
12694 err_nvm:
12695         dev_warn(&pf->pdev->dev,
12696                  "total-port-shutdown feature is off due to read nvm error: %pe\n",
12697                  ERR_PTR(read_status));
12698         return ret;
12699 }
12700
12701 /**
12702  * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12703  * @pf: board private structure to initialize
12704  *
12705  * i40e_sw_init initializes the Adapter private data structure.
12706  * Fields are initialized based on PCI device information and
12707  * OS network device settings (MTU size).
12708  **/
12709 static int i40e_sw_init(struct i40e_pf *pf)
12710 {
12711         int err = 0;
12712         int size;
12713         u16 pow;
12714
12715         /* Set default capability flags */
12716         bitmap_zero(pf->flags, I40E_PF_FLAGS_NBITS);
12717         set_bit(I40E_FLAG_MSI_ENA, pf->flags);
12718         set_bit(I40E_FLAG_MSIX_ENA, pf->flags);
12719
12720         /* Set default ITR */
12721         pf->rx_itr_default = I40E_ITR_RX_DEF;
12722         pf->tx_itr_default = I40E_ITR_TX_DEF;
12723
12724         /* Depending on PF configurations, it is possible that the RSS
12725          * maximum might end up larger than the available queues
12726          */
12727         pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12728         pf->alloc_rss_size = 1;
12729         pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12730         pf->rss_size_max = min_t(int, pf->rss_size_max,
12731                                  pf->hw.func_caps.num_tx_qp);
12732
12733         /* find the next higher power-of-2 of num cpus */
12734         pow = roundup_pow_of_two(num_online_cpus());
12735         pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12736
12737         if (pf->hw.func_caps.rss) {
12738                 set_bit(I40E_FLAG_RSS_ENA, pf->flags);
12739                 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12740                                            num_online_cpus());
12741         }
12742
12743         /* MFP mode enabled */
12744         if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12745                 set_bit(I40E_FLAG_MFP_ENA, pf->flags);
12746                 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12747                 if (i40e_get_partition_bw_setting(pf)) {
12748                         dev_warn(&pf->pdev->dev,
12749                                  "Could not get partition bw settings\n");
12750                 } else {
12751                         dev_info(&pf->pdev->dev,
12752                                  "Partition BW Min = %8.8x, Max = %8.8x\n",
12753                                  pf->min_bw, pf->max_bw);
12754
12755                         /* nudge the Tx scheduler */
12756                         i40e_set_partition_bw_setting(pf);
12757                 }
12758         }
12759
12760         if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12761             (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12762                 set_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
12763                 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) &&
12764                     pf->hw.num_partitions > 1)
12765                         dev_info(&pf->pdev->dev,
12766                                  "Flow Director Sideband mode Disabled in MFP mode\n");
12767                 else
12768                         set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12769                 pf->fdir_pf_filter_count =
12770                                  pf->hw.func_caps.fd_filters_guaranteed;
12771                 pf->hw.fdir_shared_filter_count =
12772                                  pf->hw.func_caps.fd_filters_best_effort;
12773         }
12774
12775         /* Enable HW ATR eviction if possible */
12776         if (test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))
12777                 set_bit(I40E_FLAG_HW_ATR_EVICT_ENA, pf->flags);
12778
12779         if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12780                 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12781                 set_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
12782                 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12783         }
12784
12785         if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12786                 set_bit(I40E_FLAG_IWARP_ENA, pf->flags);
12787                 /* IWARP needs one extra vector for CQP just like MISC.*/
12788                 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12789         }
12790         /* Stopping FW LLDP engine is supported on XL710 and X722
12791          * starting from FW versions determined in i40e_init_adminq.
12792          * Stopping the FW LLDP engine is not supported on XL710
12793          * if NPAR is functioning so unset this hw flag in this case.
12794          */
12795         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12796             pf->hw.func_caps.npar_enable)
12797                 clear_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps);
12798
12799 #ifdef CONFIG_PCI_IOV
12800         if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12801                 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12802                 set_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
12803                 pf->num_req_vfs = min_t(int,
12804                                         pf->hw.func_caps.num_vfs,
12805                                         I40E_MAX_VF_COUNT);
12806         }
12807 #endif /* CONFIG_PCI_IOV */
12808         pf->lan_veb = I40E_NO_VEB;
12809         pf->lan_vsi = I40E_NO_VSI;
12810
12811         /* By default FW has this off for performance reasons */
12812         clear_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
12813
12814         /* set up queue assignment tracking */
12815         size = sizeof(struct i40e_lump_tracking)
12816                 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12817         pf->qp_pile = kzalloc(size, GFP_KERNEL);
12818         if (!pf->qp_pile) {
12819                 err = -ENOMEM;
12820                 goto sw_init_done;
12821         }
12822         pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12823
12824         pf->tx_timeout_recovery_level = 1;
12825
12826         if (pf->hw.mac.type != I40E_MAC_X722 &&
12827             i40e_is_total_port_shutdown_enabled(pf)) {
12828                 /* Link down on close must be on when total port shutdown
12829                  * is enabled for a given port
12830                  */
12831                 set_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, pf->flags);
12832                 set_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, pf->flags);
12833                 dev_info(&pf->pdev->dev,
12834                          "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12835         }
12836         mutex_init(&pf->switch_mutex);
12837
12838 sw_init_done:
12839         return err;
12840 }
12841
12842 /**
12843  * i40e_set_ntuple - set the ntuple feature flag and take action
12844  * @pf: board private structure to initialize
12845  * @features: the feature set that the stack is suggesting
12846  *
12847  * returns a bool to indicate if reset needs to happen
12848  **/
12849 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12850 {
12851         bool need_reset = false;
12852
12853         /* Check if Flow Director n-tuple support was enabled or disabled.  If
12854          * the state changed, we need to reset.
12855          */
12856         if (features & NETIF_F_NTUPLE) {
12857                 /* Enable filters and mark for reset */
12858                 if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
12859                         need_reset = true;
12860                 /* enable FD_SB only if there is MSI-X vector and no cloud
12861                  * filters exist
12862                  */
12863                 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12864                         set_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12865                         clear_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
12866                 }
12867         } else {
12868                 /* turn off filters, mark for reset and clear SW filter list */
12869                 if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
12870                         need_reset = true;
12871                         i40e_fdir_filter_exit(pf);
12872                 }
12873                 clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
12874                 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12875                 set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
12876
12877                 /* reset fd counters */
12878                 pf->fd_add_err = 0;
12879                 pf->fd_atr_cnt = 0;
12880                 /* if ATR was auto disabled it can be re-enabled. */
12881                 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12882                         if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
12883                             (I40E_DEBUG_FD & pf->hw.debug_mask))
12884                                 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12885         }
12886         return need_reset;
12887 }
12888
12889 /**
12890  * i40e_clear_rss_lut - clear the rx hash lookup table
12891  * @vsi: the VSI being configured
12892  **/
12893 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12894 {
12895         struct i40e_pf *pf = vsi->back;
12896         struct i40e_hw *hw = &pf->hw;
12897         u16 vf_id = vsi->vf_id;
12898         u8 i;
12899
12900         if (vsi->type == I40E_VSI_MAIN) {
12901                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12902                         wr32(hw, I40E_PFQF_HLUT(i), 0);
12903         } else if (vsi->type == I40E_VSI_SRIOV) {
12904                 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12905                         i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12906         } else {
12907                 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12908         }
12909 }
12910
12911 /**
12912  * i40e_set_loopback - turn on/off loopback mode on underlying PF
12913  * @vsi: ptr to VSI
12914  * @ena: flag to indicate the on/off setting
12915  */
12916 static int i40e_set_loopback(struct i40e_vsi *vsi, bool ena)
12917 {
12918         bool if_running = netif_running(vsi->netdev) &&
12919                           !test_and_set_bit(__I40E_VSI_DOWN, vsi->state);
12920         int ret;
12921
12922         if (if_running)
12923                 i40e_down(vsi);
12924
12925         ret = i40e_aq_set_mac_loopback(&vsi->back->hw, ena, NULL);
12926         if (ret)
12927                 netdev_err(vsi->netdev, "Failed to toggle loopback state\n");
12928         if (if_running)
12929                 i40e_up(vsi);
12930
12931         return ret;
12932 }
12933
12934 /**
12935  * i40e_set_features - set the netdev feature flags
12936  * @netdev: ptr to the netdev being adjusted
12937  * @features: the feature set that the stack is suggesting
12938  * Note: expects to be called while under rtnl_lock()
12939  **/
12940 static int i40e_set_features(struct net_device *netdev,
12941                              netdev_features_t features)
12942 {
12943         struct i40e_netdev_priv *np = netdev_priv(netdev);
12944         struct i40e_vsi *vsi = np->vsi;
12945         struct i40e_pf *pf = vsi->back;
12946         bool need_reset;
12947
12948         if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12949                 i40e_pf_config_rss(pf);
12950         else if (!(features & NETIF_F_RXHASH) &&
12951                  netdev->features & NETIF_F_RXHASH)
12952                 i40e_clear_rss_lut(vsi);
12953
12954         if (features & NETIF_F_HW_VLAN_CTAG_RX)
12955                 i40e_vlan_stripping_enable(vsi);
12956         else
12957                 i40e_vlan_stripping_disable(vsi);
12958
12959         if (!(features & NETIF_F_HW_TC) &&
12960             (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12961                 dev_err(&pf->pdev->dev,
12962                         "Offloaded tc filters active, can't turn hw_tc_offload off");
12963                 return -EINVAL;
12964         }
12965
12966         if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12967                 i40e_del_all_macvlans(vsi);
12968
12969         need_reset = i40e_set_ntuple(pf, features);
12970
12971         if (need_reset)
12972                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12973
12974         if ((features ^ netdev->features) & NETIF_F_LOOPBACK)
12975                 return i40e_set_loopback(vsi, !!(features & NETIF_F_LOOPBACK));
12976
12977         return 0;
12978 }
12979
12980 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12981                                     unsigned int table, unsigned int idx,
12982                                     struct udp_tunnel_info *ti)
12983 {
12984         struct i40e_netdev_priv *np = netdev_priv(netdev);
12985         struct i40e_hw *hw = &np->vsi->back->hw;
12986         u8 type, filter_index;
12987         int ret;
12988
12989         type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12990                                                    I40E_AQC_TUNNEL_TYPE_NGE;
12991
12992         ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12993                                      NULL);
12994         if (ret) {
12995                 netdev_info(netdev, "add UDP port failed, err %pe aq_err %s\n",
12996                             ERR_PTR(ret),
12997                             i40e_aq_str(hw, hw->aq.asq_last_status));
12998                 return -EIO;
12999         }
13000
13001         udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
13002         return 0;
13003 }
13004
13005 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
13006                                       unsigned int table, unsigned int idx,
13007                                       struct udp_tunnel_info *ti)
13008 {
13009         struct i40e_netdev_priv *np = netdev_priv(netdev);
13010         struct i40e_hw *hw = &np->vsi->back->hw;
13011         int ret;
13012
13013         ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
13014         if (ret) {
13015                 netdev_info(netdev, "delete UDP port failed, err %pe aq_err %s\n",
13016                             ERR_PTR(ret),
13017                             i40e_aq_str(hw, hw->aq.asq_last_status));
13018                 return -EIO;
13019         }
13020
13021         return 0;
13022 }
13023
13024 static int i40e_get_phys_port_id(struct net_device *netdev,
13025                                  struct netdev_phys_item_id *ppid)
13026 {
13027         struct i40e_netdev_priv *np = netdev_priv(netdev);
13028         struct i40e_pf *pf = np->vsi->back;
13029         struct i40e_hw *hw = &pf->hw;
13030
13031         if (!test_bit(I40E_HW_CAP_PORT_ID_VALID, pf->hw.caps))
13032                 return -EOPNOTSUPP;
13033
13034         ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
13035         memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
13036
13037         return 0;
13038 }
13039
13040 /**
13041  * i40e_ndo_fdb_add - add an entry to the hardware database
13042  * @ndm: the input from the stack
13043  * @tb: pointer to array of nladdr (unused)
13044  * @dev: the net device pointer
13045  * @addr: the MAC address entry being added
13046  * @vid: VLAN ID
13047  * @flags: instructions from stack about fdb operation
13048  * @extack: netlink extended ack, unused currently
13049  */
13050 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
13051                             struct net_device *dev,
13052                             const unsigned char *addr, u16 vid,
13053                             u16 flags,
13054                             struct netlink_ext_ack *extack)
13055 {
13056         struct i40e_netdev_priv *np = netdev_priv(dev);
13057         struct i40e_pf *pf = np->vsi->back;
13058         int err = 0;
13059
13060         if (!test_bit(I40E_FLAG_SRIOV_ENA, pf->flags))
13061                 return -EOPNOTSUPP;
13062
13063         if (vid) {
13064                 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
13065                 return -EINVAL;
13066         }
13067
13068         /* Hardware does not support aging addresses so if a
13069          * ndm_state is given only allow permanent addresses
13070          */
13071         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
13072                 netdev_info(dev, "FDB only supports static addresses\n");
13073                 return -EINVAL;
13074         }
13075
13076         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
13077                 err = dev_uc_add_excl(dev, addr);
13078         else if (is_multicast_ether_addr(addr))
13079                 err = dev_mc_add_excl(dev, addr);
13080         else
13081                 err = -EINVAL;
13082
13083         /* Only return duplicate errors if NLM_F_EXCL is set */
13084         if (err == -EEXIST && !(flags & NLM_F_EXCL))
13085                 err = 0;
13086
13087         return err;
13088 }
13089
13090 /**
13091  * i40e_ndo_bridge_setlink - Set the hardware bridge mode
13092  * @dev: the netdev being configured
13093  * @nlh: RTNL message
13094  * @flags: bridge flags
13095  * @extack: netlink extended ack
13096  *
13097  * Inserts a new hardware bridge if not already created and
13098  * enables the bridging mode requested (VEB or VEPA). If the
13099  * hardware bridge has already been inserted and the request
13100  * is to change the mode then that requires a PF reset to
13101  * allow rebuild of the components with required hardware
13102  * bridge mode enabled.
13103  *
13104  * Note: expects to be called while under rtnl_lock()
13105  **/
13106 static int i40e_ndo_bridge_setlink(struct net_device *dev,
13107                                    struct nlmsghdr *nlh,
13108                                    u16 flags,
13109                                    struct netlink_ext_ack *extack)
13110 {
13111         struct i40e_netdev_priv *np = netdev_priv(dev);
13112         struct i40e_vsi *vsi = np->vsi;
13113         struct i40e_pf *pf = vsi->back;
13114         struct i40e_veb *veb = NULL;
13115         struct nlattr *attr, *br_spec;
13116         int i, rem;
13117
13118         /* Only for PF VSI for now */
13119         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13120                 return -EOPNOTSUPP;
13121
13122         /* Find the HW bridge for PF VSI */
13123         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13124                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13125                         veb = pf->veb[i];
13126         }
13127
13128         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
13129         if (!br_spec)
13130                 return -EINVAL;
13131
13132         nla_for_each_nested(attr, br_spec, rem) {
13133                 __u16 mode;
13134
13135                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
13136                         continue;
13137
13138                 mode = nla_get_u16(attr);
13139                 if ((mode != BRIDGE_MODE_VEPA) &&
13140                     (mode != BRIDGE_MODE_VEB))
13141                         return -EINVAL;
13142
13143                 /* Insert a new HW bridge */
13144                 if (!veb) {
13145                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
13146                                              vsi->tc_config.enabled_tc);
13147                         if (veb) {
13148                                 veb->bridge_mode = mode;
13149                                 i40e_config_bridge_mode(veb);
13150                         } else {
13151                                 /* No Bridge HW offload available */
13152                                 return -ENOENT;
13153                         }
13154                         break;
13155                 } else if (mode != veb->bridge_mode) {
13156                         /* Existing HW bridge but different mode needs reset */
13157                         veb->bridge_mode = mode;
13158                         /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13159                         if (mode == BRIDGE_MODE_VEB)
13160                                 set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
13161                         else
13162                                 clear_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
13163                         i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13164                         break;
13165                 }
13166         }
13167
13168         return 0;
13169 }
13170
13171 /**
13172  * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13173  * @skb: skb buff
13174  * @pid: process id
13175  * @seq: RTNL message seq #
13176  * @dev: the netdev being configured
13177  * @filter_mask: unused
13178  * @nlflags: netlink flags passed in
13179  *
13180  * Return the mode in which the hardware bridge is operating in
13181  * i.e VEB or VEPA.
13182  **/
13183 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13184                                    struct net_device *dev,
13185                                    u32 __always_unused filter_mask,
13186                                    int nlflags)
13187 {
13188         struct i40e_netdev_priv *np = netdev_priv(dev);
13189         struct i40e_vsi *vsi = np->vsi;
13190         struct i40e_pf *pf = vsi->back;
13191         struct i40e_veb *veb = NULL;
13192         int i;
13193
13194         /* Only for PF VSI for now */
13195         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13196                 return -EOPNOTSUPP;
13197
13198         /* Find the HW bridge for the PF VSI */
13199         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13200                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13201                         veb = pf->veb[i];
13202         }
13203
13204         if (!veb)
13205                 return 0;
13206
13207         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13208                                        0, 0, nlflags, filter_mask, NULL);
13209 }
13210
13211 /**
13212  * i40e_features_check - Validate encapsulated packet conforms to limits
13213  * @skb: skb buff
13214  * @dev: This physical port's netdev
13215  * @features: Offload features that the stack believes apply
13216  **/
13217 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13218                                              struct net_device *dev,
13219                                              netdev_features_t features)
13220 {
13221         size_t len;
13222
13223         /* No point in doing any of this if neither checksum nor GSO are
13224          * being requested for this frame.  We can rule out both by just
13225          * checking for CHECKSUM_PARTIAL
13226          */
13227         if (skb->ip_summed != CHECKSUM_PARTIAL)
13228                 return features;
13229
13230         /* We cannot support GSO if the MSS is going to be less than
13231          * 64 bytes.  If it is then we need to drop support for GSO.
13232          */
13233         if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13234                 features &= ~NETIF_F_GSO_MASK;
13235
13236         /* MACLEN can support at most 63 words */
13237         len = skb_network_header(skb) - skb->data;
13238         if (len & ~(63 * 2))
13239                 goto out_err;
13240
13241         /* IPLEN and EIPLEN can support at most 127 dwords */
13242         len = skb_transport_header(skb) - skb_network_header(skb);
13243         if (len & ~(127 * 4))
13244                 goto out_err;
13245
13246         if (skb->encapsulation) {
13247                 /* L4TUNLEN can support 127 words */
13248                 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13249                 if (len & ~(127 * 2))
13250                         goto out_err;
13251
13252                 /* IPLEN can support at most 127 dwords */
13253                 len = skb_inner_transport_header(skb) -
13254                       skb_inner_network_header(skb);
13255                 if (len & ~(127 * 4))
13256                         goto out_err;
13257         }
13258
13259         /* No need to validate L4LEN as TCP is the only protocol with a
13260          * flexible value and we support all possible values supported
13261          * by TCP, which is at most 15 dwords
13262          */
13263
13264         return features;
13265 out_err:
13266         return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13267 }
13268
13269 /**
13270  * i40e_xdp_setup - add/remove an XDP program
13271  * @vsi: VSI to changed
13272  * @prog: XDP program
13273  * @extack: netlink extended ack
13274  **/
13275 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13276                           struct netlink_ext_ack *extack)
13277 {
13278         int frame_size = i40e_max_vsi_frame_size(vsi, prog);
13279         struct i40e_pf *pf = vsi->back;
13280         struct bpf_prog *old_prog;
13281         bool need_reset;
13282         int i;
13283
13284         /* Don't allow frames that span over multiple buffers */
13285         if (vsi->netdev->mtu > frame_size - I40E_PACKET_HDR_PAD) {
13286                 NL_SET_ERR_MSG_MOD(extack, "MTU too large for linear frames and XDP prog does not support frags");
13287                 return -EINVAL;
13288         }
13289
13290         /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13291         need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13292
13293         if (need_reset)
13294                 i40e_prep_for_reset(pf);
13295
13296         /* VSI shall be deleted in a moment, just return EINVAL */
13297         if (test_bit(__I40E_IN_REMOVE, pf->state))
13298                 return -EINVAL;
13299
13300         old_prog = xchg(&vsi->xdp_prog, prog);
13301
13302         if (need_reset) {
13303                 if (!prog) {
13304                         xdp_features_clear_redirect_target(vsi->netdev);
13305                         /* Wait until ndo_xsk_wakeup completes. */
13306                         synchronize_rcu();
13307                 }
13308                 i40e_reset_and_rebuild(pf, true, true);
13309         }
13310
13311         if (!i40e_enabled_xdp_vsi(vsi) && prog) {
13312                 if (i40e_realloc_rx_bi_zc(vsi, true))
13313                         return -ENOMEM;
13314         } else if (i40e_enabled_xdp_vsi(vsi) && !prog) {
13315                 if (i40e_realloc_rx_bi_zc(vsi, false))
13316                         return -ENOMEM;
13317         }
13318
13319         for (i = 0; i < vsi->num_queue_pairs; i++)
13320                 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13321
13322         if (old_prog)
13323                 bpf_prog_put(old_prog);
13324
13325         /* Kick start the NAPI context if there is an AF_XDP socket open
13326          * on that queue id. This so that receiving will start.
13327          */
13328         if (need_reset && prog) {
13329                 for (i = 0; i < vsi->num_queue_pairs; i++)
13330                         if (vsi->xdp_rings[i]->xsk_pool)
13331                                 (void)i40e_xsk_wakeup(vsi->netdev, i,
13332                                                       XDP_WAKEUP_RX);
13333                 xdp_features_set_redirect_target(vsi->netdev, true);
13334         }
13335
13336         return 0;
13337 }
13338
13339 /**
13340  * i40e_enter_busy_conf - Enters busy config state
13341  * @vsi: vsi
13342  *
13343  * Returns 0 on success, <0 for failure.
13344  **/
13345 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13346 {
13347         struct i40e_pf *pf = vsi->back;
13348         int timeout = 50;
13349
13350         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13351                 timeout--;
13352                 if (!timeout)
13353                         return -EBUSY;
13354                 usleep_range(1000, 2000);
13355         }
13356
13357         return 0;
13358 }
13359
13360 /**
13361  * i40e_exit_busy_conf - Exits busy config state
13362  * @vsi: vsi
13363  **/
13364 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13365 {
13366         struct i40e_pf *pf = vsi->back;
13367
13368         clear_bit(__I40E_CONFIG_BUSY, pf->state);
13369 }
13370
13371 /**
13372  * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13373  * @vsi: vsi
13374  * @queue_pair: queue pair
13375  **/
13376 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13377 {
13378         memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13379                sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13380         memset(&vsi->tx_rings[queue_pair]->stats, 0,
13381                sizeof(vsi->tx_rings[queue_pair]->stats));
13382         if (i40e_enabled_xdp_vsi(vsi)) {
13383                 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13384                        sizeof(vsi->xdp_rings[queue_pair]->stats));
13385         }
13386 }
13387
13388 /**
13389  * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13390  * @vsi: vsi
13391  * @queue_pair: queue pair
13392  **/
13393 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13394 {
13395         i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13396         if (i40e_enabled_xdp_vsi(vsi)) {
13397                 /* Make sure that in-progress ndo_xdp_xmit calls are
13398                  * completed.
13399                  */
13400                 synchronize_rcu();
13401                 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13402         }
13403         i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13404 }
13405
13406 /**
13407  * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13408  * @vsi: vsi
13409  * @queue_pair: queue pair
13410  * @enable: true for enable, false for disable
13411  **/
13412 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13413                                         bool enable)
13414 {
13415         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13416         struct i40e_q_vector *q_vector = rxr->q_vector;
13417
13418         if (!vsi->netdev)
13419                 return;
13420
13421         /* All rings in a qp belong to the same qvector. */
13422         if (q_vector->rx.ring || q_vector->tx.ring) {
13423                 if (enable)
13424                         napi_enable(&q_vector->napi);
13425                 else
13426                         napi_disable(&q_vector->napi);
13427         }
13428 }
13429
13430 /**
13431  * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13432  * @vsi: vsi
13433  * @queue_pair: queue pair
13434  * @enable: true for enable, false for disable
13435  *
13436  * Returns 0 on success, <0 on failure.
13437  **/
13438 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13439                                         bool enable)
13440 {
13441         struct i40e_pf *pf = vsi->back;
13442         int pf_q, ret = 0;
13443
13444         pf_q = vsi->base_queue + queue_pair;
13445         ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13446                                      false /*is xdp*/, enable);
13447         if (ret) {
13448                 dev_info(&pf->pdev->dev,
13449                          "VSI seid %d Tx ring %d %sable timeout\n",
13450                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13451                 return ret;
13452         }
13453
13454         i40e_control_rx_q(pf, pf_q, enable);
13455         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13456         if (ret) {
13457                 dev_info(&pf->pdev->dev,
13458                          "VSI seid %d Rx ring %d %sable timeout\n",
13459                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13460                 return ret;
13461         }
13462
13463         /* Due to HW errata, on Rx disable only, the register can
13464          * indicate done before it really is. Needs 50ms to be sure
13465          */
13466         if (!enable)
13467                 mdelay(50);
13468
13469         if (!i40e_enabled_xdp_vsi(vsi))
13470                 return ret;
13471
13472         ret = i40e_control_wait_tx_q(vsi->seid, pf,
13473                                      pf_q + vsi->alloc_queue_pairs,
13474                                      true /*is xdp*/, enable);
13475         if (ret) {
13476                 dev_info(&pf->pdev->dev,
13477                          "VSI seid %d XDP Tx ring %d %sable timeout\n",
13478                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13479         }
13480
13481         return ret;
13482 }
13483
13484 /**
13485  * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13486  * @vsi: vsi
13487  * @queue_pair: queue_pair
13488  **/
13489 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13490 {
13491         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13492         struct i40e_pf *pf = vsi->back;
13493         struct i40e_hw *hw = &pf->hw;
13494
13495         /* All rings in a qp belong to the same qvector. */
13496         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
13497                 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13498         else
13499                 i40e_irq_dynamic_enable_icr0(pf);
13500
13501         i40e_flush(hw);
13502 }
13503
13504 /**
13505  * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13506  * @vsi: vsi
13507  * @queue_pair: queue_pair
13508  **/
13509 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13510 {
13511         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13512         struct i40e_pf *pf = vsi->back;
13513         struct i40e_hw *hw = &pf->hw;
13514
13515         /* For simplicity, instead of removing the qp interrupt causes
13516          * from the interrupt linked list, we simply disable the interrupt, and
13517          * leave the list intact.
13518          *
13519          * All rings in a qp belong to the same qvector.
13520          */
13521         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
13522                 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13523
13524                 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13525                 i40e_flush(hw);
13526                 synchronize_irq(pf->msix_entries[intpf].vector);
13527         } else {
13528                 /* Legacy and MSI mode - this stops all interrupt handling */
13529                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13530                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13531                 i40e_flush(hw);
13532                 synchronize_irq(pf->pdev->irq);
13533         }
13534 }
13535
13536 /**
13537  * i40e_queue_pair_disable - Disables a queue pair
13538  * @vsi: vsi
13539  * @queue_pair: queue pair
13540  *
13541  * Returns 0 on success, <0 on failure.
13542  **/
13543 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13544 {
13545         int err;
13546
13547         err = i40e_enter_busy_conf(vsi);
13548         if (err)
13549                 return err;
13550
13551         i40e_queue_pair_disable_irq(vsi, queue_pair);
13552         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13553         i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13554         i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13555         i40e_queue_pair_clean_rings(vsi, queue_pair);
13556         i40e_queue_pair_reset_stats(vsi, queue_pair);
13557
13558         return err;
13559 }
13560
13561 /**
13562  * i40e_queue_pair_enable - Enables a queue pair
13563  * @vsi: vsi
13564  * @queue_pair: queue pair
13565  *
13566  * Returns 0 on success, <0 on failure.
13567  **/
13568 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13569 {
13570         int err;
13571
13572         err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13573         if (err)
13574                 return err;
13575
13576         if (i40e_enabled_xdp_vsi(vsi)) {
13577                 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13578                 if (err)
13579                         return err;
13580         }
13581
13582         err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13583         if (err)
13584                 return err;
13585
13586         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13587         i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13588         i40e_queue_pair_enable_irq(vsi, queue_pair);
13589
13590         i40e_exit_busy_conf(vsi);
13591
13592         return err;
13593 }
13594
13595 /**
13596  * i40e_xdp - implements ndo_bpf for i40e
13597  * @dev: netdevice
13598  * @xdp: XDP command
13599  **/
13600 static int i40e_xdp(struct net_device *dev,
13601                     struct netdev_bpf *xdp)
13602 {
13603         struct i40e_netdev_priv *np = netdev_priv(dev);
13604         struct i40e_vsi *vsi = np->vsi;
13605
13606         if (vsi->type != I40E_VSI_MAIN)
13607                 return -EINVAL;
13608
13609         switch (xdp->command) {
13610         case XDP_SETUP_PROG:
13611                 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13612         case XDP_SETUP_XSK_POOL:
13613                 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13614                                            xdp->xsk.queue_id);
13615         default:
13616                 return -EINVAL;
13617         }
13618 }
13619
13620 static const struct net_device_ops i40e_netdev_ops = {
13621         .ndo_open               = i40e_open,
13622         .ndo_stop               = i40e_close,
13623         .ndo_start_xmit         = i40e_lan_xmit_frame,
13624         .ndo_get_stats64        = i40e_get_netdev_stats_struct,
13625         .ndo_set_rx_mode        = i40e_set_rx_mode,
13626         .ndo_validate_addr      = eth_validate_addr,
13627         .ndo_set_mac_address    = i40e_set_mac,
13628         .ndo_change_mtu         = i40e_change_mtu,
13629         .ndo_eth_ioctl          = i40e_ioctl,
13630         .ndo_tx_timeout         = i40e_tx_timeout,
13631         .ndo_vlan_rx_add_vid    = i40e_vlan_rx_add_vid,
13632         .ndo_vlan_rx_kill_vid   = i40e_vlan_rx_kill_vid,
13633 #ifdef CONFIG_NET_POLL_CONTROLLER
13634         .ndo_poll_controller    = i40e_netpoll,
13635 #endif
13636         .ndo_setup_tc           = __i40e_setup_tc,
13637         .ndo_select_queue       = i40e_lan_select_queue,
13638         .ndo_set_features       = i40e_set_features,
13639         .ndo_set_vf_mac         = i40e_ndo_set_vf_mac,
13640         .ndo_set_vf_vlan        = i40e_ndo_set_vf_port_vlan,
13641         .ndo_get_vf_stats       = i40e_get_vf_stats,
13642         .ndo_set_vf_rate        = i40e_ndo_set_vf_bw,
13643         .ndo_get_vf_config      = i40e_ndo_get_vf_config,
13644         .ndo_set_vf_link_state  = i40e_ndo_set_vf_link_state,
13645         .ndo_set_vf_spoofchk    = i40e_ndo_set_vf_spoofchk,
13646         .ndo_set_vf_trust       = i40e_ndo_set_vf_trust,
13647         .ndo_get_phys_port_id   = i40e_get_phys_port_id,
13648         .ndo_fdb_add            = i40e_ndo_fdb_add,
13649         .ndo_features_check     = i40e_features_check,
13650         .ndo_bridge_getlink     = i40e_ndo_bridge_getlink,
13651         .ndo_bridge_setlink     = i40e_ndo_bridge_setlink,
13652         .ndo_bpf                = i40e_xdp,
13653         .ndo_xdp_xmit           = i40e_xdp_xmit,
13654         .ndo_xsk_wakeup         = i40e_xsk_wakeup,
13655         .ndo_dfwd_add_station   = i40e_fwd_add,
13656         .ndo_dfwd_del_station   = i40e_fwd_del,
13657 };
13658
13659 /**
13660  * i40e_config_netdev - Setup the netdev flags
13661  * @vsi: the VSI being configured
13662  *
13663  * Returns 0 on success, negative value on failure
13664  **/
13665 static int i40e_config_netdev(struct i40e_vsi *vsi)
13666 {
13667         struct i40e_pf *pf = vsi->back;
13668         struct i40e_hw *hw = &pf->hw;
13669         struct i40e_netdev_priv *np;
13670         struct net_device *netdev;
13671         u8 broadcast[ETH_ALEN];
13672         u8 mac_addr[ETH_ALEN];
13673         int etherdev_size;
13674         netdev_features_t hw_enc_features;
13675         netdev_features_t hw_features;
13676
13677         etherdev_size = sizeof(struct i40e_netdev_priv);
13678         netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13679         if (!netdev)
13680                 return -ENOMEM;
13681
13682         vsi->netdev = netdev;
13683         np = netdev_priv(netdev);
13684         np->vsi = vsi;
13685
13686         hw_enc_features = NETIF_F_SG                    |
13687                           NETIF_F_HW_CSUM               |
13688                           NETIF_F_HIGHDMA               |
13689                           NETIF_F_SOFT_FEATURES         |
13690                           NETIF_F_TSO                   |
13691                           NETIF_F_TSO_ECN               |
13692                           NETIF_F_TSO6                  |
13693                           NETIF_F_GSO_GRE               |
13694                           NETIF_F_GSO_GRE_CSUM          |
13695                           NETIF_F_GSO_PARTIAL           |
13696                           NETIF_F_GSO_IPXIP4            |
13697                           NETIF_F_GSO_IPXIP6            |
13698                           NETIF_F_GSO_UDP_TUNNEL        |
13699                           NETIF_F_GSO_UDP_TUNNEL_CSUM   |
13700                           NETIF_F_GSO_UDP_L4            |
13701                           NETIF_F_SCTP_CRC              |
13702                           NETIF_F_RXHASH                |
13703                           NETIF_F_RXCSUM                |
13704                           0;
13705
13706         if (!test_bit(I40E_HW_CAP_OUTER_UDP_CSUM, pf->hw.caps))
13707                 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13708
13709         netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13710
13711         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13712
13713         netdev->hw_enc_features |= hw_enc_features;
13714
13715         /* record features VLANs can make use of */
13716         netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13717
13718 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE |            \
13719                                    NETIF_F_GSO_GRE_CSUM |       \
13720                                    NETIF_F_GSO_IPXIP4 |         \
13721                                    NETIF_F_GSO_IPXIP6 |         \
13722                                    NETIF_F_GSO_UDP_TUNNEL |     \
13723                                    NETIF_F_GSO_UDP_TUNNEL_CSUM)
13724
13725         netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13726         netdev->features |= NETIF_F_GSO_PARTIAL |
13727                             I40E_GSO_PARTIAL_FEATURES;
13728
13729         netdev->mpls_features |= NETIF_F_SG;
13730         netdev->mpls_features |= NETIF_F_HW_CSUM;
13731         netdev->mpls_features |= NETIF_F_TSO;
13732         netdev->mpls_features |= NETIF_F_TSO6;
13733         netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13734
13735         /* enable macvlan offloads */
13736         netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13737
13738         hw_features = hw_enc_features           |
13739                       NETIF_F_HW_VLAN_CTAG_TX   |
13740                       NETIF_F_HW_VLAN_CTAG_RX;
13741
13742         if (!test_bit(I40E_FLAG_MFP_ENA, pf->flags))
13743                 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13744
13745         netdev->hw_features |= hw_features | NETIF_F_LOOPBACK;
13746
13747         netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13748         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13749
13750         netdev->features &= ~NETIF_F_HW_TC;
13751
13752         if (vsi->type == I40E_VSI_MAIN) {
13753                 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13754                 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13755                 /* The following steps are necessary for two reasons. First,
13756                  * some older NVM configurations load a default MAC-VLAN
13757                  * filter that will accept any tagged packet, and we want to
13758                  * replace this with a normal filter. Additionally, it is
13759                  * possible our MAC address was provided by the platform using
13760                  * Open Firmware or similar.
13761                  *
13762                  * Thus, we need to remove the default filter and install one
13763                  * specific to the MAC address.
13764                  */
13765                 i40e_rm_default_mac_filter(vsi, mac_addr);
13766                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13767                 i40e_add_mac_filter(vsi, mac_addr);
13768                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13769
13770                 netdev->xdp_features = NETDEV_XDP_ACT_BASIC |
13771                                        NETDEV_XDP_ACT_REDIRECT |
13772                                        NETDEV_XDP_ACT_XSK_ZEROCOPY |
13773                                        NETDEV_XDP_ACT_RX_SG;
13774                 netdev->xdp_zc_max_segs = I40E_MAX_BUFFER_TXD;
13775         } else {
13776                 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13777                  * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13778                  * the end, which is 4 bytes long, so force truncation of the
13779                  * original name by IFNAMSIZ - 4
13780                  */
13781                 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13782                          IFNAMSIZ - 4,
13783                          pf->vsi[pf->lan_vsi]->netdev->name);
13784                 eth_random_addr(mac_addr);
13785
13786                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13787                 i40e_add_mac_filter(vsi, mac_addr);
13788                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13789         }
13790
13791         /* Add the broadcast filter so that we initially will receive
13792          * broadcast packets. Note that when a new VLAN is first added the
13793          * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13794          * specific filters as part of transitioning into "vlan" operation.
13795          * When more VLANs are added, the driver will copy each existing MAC
13796          * filter and add it for the new VLAN.
13797          *
13798          * Broadcast filters are handled specially by
13799          * i40e_sync_filters_subtask, as the driver must to set the broadcast
13800          * promiscuous bit instead of adding this directly as a MAC/VLAN
13801          * filter. The subtask will update the correct broadcast promiscuous
13802          * bits as VLANs become active or inactive.
13803          */
13804         eth_broadcast_addr(broadcast);
13805         spin_lock_bh(&vsi->mac_filter_hash_lock);
13806         i40e_add_mac_filter(vsi, broadcast);
13807         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13808
13809         eth_hw_addr_set(netdev, mac_addr);
13810         ether_addr_copy(netdev->perm_addr, mac_addr);
13811
13812         /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13813         netdev->neigh_priv_len = sizeof(u32) * 4;
13814
13815         netdev->priv_flags |= IFF_UNICAST_FLT;
13816         netdev->priv_flags |= IFF_SUPP_NOFCS;
13817         /* Setup netdev TC information */
13818         i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13819
13820         netdev->netdev_ops = &i40e_netdev_ops;
13821         netdev->watchdog_timeo = 5 * HZ;
13822         i40e_set_ethtool_ops(netdev);
13823
13824         /* MTU range: 68 - 9706 */
13825         netdev->min_mtu = ETH_MIN_MTU;
13826         netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13827
13828         return 0;
13829 }
13830
13831 /**
13832  * i40e_vsi_delete - Delete a VSI from the switch
13833  * @vsi: the VSI being removed
13834  *
13835  * Returns 0 on success, negative value on failure
13836  **/
13837 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13838 {
13839         /* remove default VSI is not allowed */
13840         if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13841                 return;
13842
13843         i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13844 }
13845
13846 /**
13847  * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13848  * @vsi: the VSI being queried
13849  *
13850  * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13851  **/
13852 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13853 {
13854         struct i40e_veb *veb;
13855         struct i40e_pf *pf = vsi->back;
13856
13857         /* Uplink is not a bridge so default to VEB */
13858         if (vsi->veb_idx >= I40E_MAX_VEB)
13859                 return 1;
13860
13861         veb = pf->veb[vsi->veb_idx];
13862         if (!veb) {
13863                 dev_info(&pf->pdev->dev,
13864                          "There is no veb associated with the bridge\n");
13865                 return -ENOENT;
13866         }
13867
13868         /* Uplink is a bridge in VEPA mode */
13869         if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13870                 return 0;
13871         } else {
13872                 /* Uplink is a bridge in VEB mode */
13873                 return 1;
13874         }
13875
13876         /* VEPA is now default bridge, so return 0 */
13877         return 0;
13878 }
13879
13880 /**
13881  * i40e_add_vsi - Add a VSI to the switch
13882  * @vsi: the VSI being configured
13883  *
13884  * This initializes a VSI context depending on the VSI type to be added and
13885  * passes it down to the add_vsi aq command.
13886  **/
13887 static int i40e_add_vsi(struct i40e_vsi *vsi)
13888 {
13889         int ret = -ENODEV;
13890         struct i40e_pf *pf = vsi->back;
13891         struct i40e_hw *hw = &pf->hw;
13892         struct i40e_vsi_context ctxt;
13893         struct i40e_mac_filter *f;
13894         struct hlist_node *h;
13895         int bkt;
13896
13897         u8 enabled_tc = 0x1; /* TC0 enabled */
13898         int f_count = 0;
13899
13900         memset(&ctxt, 0, sizeof(ctxt));
13901         switch (vsi->type) {
13902         case I40E_VSI_MAIN:
13903                 /* The PF's main VSI is already setup as part of the
13904                  * device initialization, so we'll not bother with
13905                  * the add_vsi call, but we will retrieve the current
13906                  * VSI context.
13907                  */
13908                 ctxt.seid = pf->main_vsi_seid;
13909                 ctxt.pf_num = pf->hw.pf_id;
13910                 ctxt.vf_num = 0;
13911                 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13912                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13913                 if (ret) {
13914                         dev_info(&pf->pdev->dev,
13915                                  "couldn't get PF vsi config, err %pe aq_err %s\n",
13916                                  ERR_PTR(ret),
13917                                  i40e_aq_str(&pf->hw,
13918                                              pf->hw.aq.asq_last_status));
13919                         return -ENOENT;
13920                 }
13921                 vsi->info = ctxt.info;
13922                 vsi->info.valid_sections = 0;
13923
13924                 vsi->seid = ctxt.seid;
13925                 vsi->id = ctxt.vsi_number;
13926
13927                 enabled_tc = i40e_pf_get_tc_map(pf);
13928
13929                 /* Source pruning is enabled by default, so the flag is
13930                  * negative logic - if it's set, we need to fiddle with
13931                  * the VSI to disable source pruning.
13932                  */
13933                 if (test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, pf->flags)) {
13934                         memset(&ctxt, 0, sizeof(ctxt));
13935                         ctxt.seid = pf->main_vsi_seid;
13936                         ctxt.pf_num = pf->hw.pf_id;
13937                         ctxt.vf_num = 0;
13938                         ctxt.info.valid_sections |=
13939                                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13940                         ctxt.info.switch_id =
13941                                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13942                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13943                         if (ret) {
13944                                 dev_info(&pf->pdev->dev,
13945                                          "update vsi failed, err %d aq_err %s\n",
13946                                          ret,
13947                                          i40e_aq_str(&pf->hw,
13948                                                      pf->hw.aq.asq_last_status));
13949                                 ret = -ENOENT;
13950                                 goto err;
13951                         }
13952                 }
13953
13954                 /* MFP mode setup queue map and update VSI */
13955                 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) &&
13956                     !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13957                         memset(&ctxt, 0, sizeof(ctxt));
13958                         ctxt.seid = pf->main_vsi_seid;
13959                         ctxt.pf_num = pf->hw.pf_id;
13960                         ctxt.vf_num = 0;
13961                         i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13962                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13963                         if (ret) {
13964                                 dev_info(&pf->pdev->dev,
13965                                          "update vsi failed, err %pe aq_err %s\n",
13966                                          ERR_PTR(ret),
13967                                          i40e_aq_str(&pf->hw,
13968                                                     pf->hw.aq.asq_last_status));
13969                                 ret = -ENOENT;
13970                                 goto err;
13971                         }
13972                         /* update the local VSI info queue map */
13973                         i40e_vsi_update_queue_map(vsi, &ctxt);
13974                         vsi->info.valid_sections = 0;
13975                 } else {
13976                         /* Default/Main VSI is only enabled for TC0
13977                          * reconfigure it to enable all TCs that are
13978                          * available on the port in SFP mode.
13979                          * For MFP case the iSCSI PF would use this
13980                          * flow to enable LAN+iSCSI TC.
13981                          */
13982                         ret = i40e_vsi_config_tc(vsi, enabled_tc);
13983                         if (ret) {
13984                                 /* Single TC condition is not fatal,
13985                                  * message and continue
13986                                  */
13987                                 dev_info(&pf->pdev->dev,
13988                                          "failed to configure TCs for main VSI tc_map 0x%08x, err %pe aq_err %s\n",
13989                                          enabled_tc,
13990                                          ERR_PTR(ret),
13991                                          i40e_aq_str(&pf->hw,
13992                                                     pf->hw.aq.asq_last_status));
13993                         }
13994                 }
13995                 break;
13996
13997         case I40E_VSI_FDIR:
13998                 ctxt.pf_num = hw->pf_id;
13999                 ctxt.vf_num = 0;
14000                 ctxt.uplink_seid = vsi->uplink_seid;
14001                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14002                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
14003                 if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags) &&
14004                     (i40e_is_vsi_uplink_mode_veb(vsi))) {
14005                         ctxt.info.valid_sections |=
14006                              cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14007                         ctxt.info.switch_id =
14008                            cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14009                 }
14010                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14011                 break;
14012
14013         case I40E_VSI_VMDQ2:
14014                 ctxt.pf_num = hw->pf_id;
14015                 ctxt.vf_num = 0;
14016                 ctxt.uplink_seid = vsi->uplink_seid;
14017                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14018                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
14019
14020                 /* This VSI is connected to VEB so the switch_id
14021                  * should be set to zero by default.
14022                  */
14023                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14024                         ctxt.info.valid_sections |=
14025                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14026                         ctxt.info.switch_id =
14027                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14028                 }
14029
14030                 /* Setup the VSI tx/rx queue map for TC0 only for now */
14031                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14032                 break;
14033
14034         case I40E_VSI_SRIOV:
14035                 ctxt.pf_num = hw->pf_id;
14036                 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
14037                 ctxt.uplink_seid = vsi->uplink_seid;
14038                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14039                 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
14040
14041                 /* This VSI is connected to VEB so the switch_id
14042                  * should be set to zero by default.
14043                  */
14044                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14045                         ctxt.info.valid_sections |=
14046                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14047                         ctxt.info.switch_id =
14048                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14049                 }
14050
14051                 if (test_bit(I40E_FLAG_IWARP_ENA, vsi->back->flags)) {
14052                         ctxt.info.valid_sections |=
14053                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
14054                         ctxt.info.queueing_opt_flags |=
14055                                 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
14056                                  I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
14057                 }
14058
14059                 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
14060                 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
14061                 if (pf->vf[vsi->vf_id].spoofchk) {
14062                         ctxt.info.valid_sections |=
14063                                 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
14064                         ctxt.info.sec_flags |=
14065                                 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
14066                                  I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
14067                 }
14068                 /* Setup the VSI tx/rx queue map for TC0 only for now */
14069                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14070                 break;
14071
14072         case I40E_VSI_IWARP:
14073                 /* send down message to iWARP */
14074                 break;
14075
14076         default:
14077                 return -ENODEV;
14078         }
14079
14080         if (vsi->type != I40E_VSI_MAIN) {
14081                 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
14082                 if (ret) {
14083                         dev_info(&vsi->back->pdev->dev,
14084                                  "add vsi failed, err %pe aq_err %s\n",
14085                                  ERR_PTR(ret),
14086                                  i40e_aq_str(&pf->hw,
14087                                              pf->hw.aq.asq_last_status));
14088                         ret = -ENOENT;
14089                         goto err;
14090                 }
14091                 vsi->info = ctxt.info;
14092                 vsi->info.valid_sections = 0;
14093                 vsi->seid = ctxt.seid;
14094                 vsi->id = ctxt.vsi_number;
14095         }
14096
14097         spin_lock_bh(&vsi->mac_filter_hash_lock);
14098         vsi->active_filters = 0;
14099         /* If macvlan filters already exist, force them to get loaded */
14100         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
14101                 f->state = I40E_FILTER_NEW;
14102                 f_count++;
14103         }
14104         spin_unlock_bh(&vsi->mac_filter_hash_lock);
14105         clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
14106
14107         if (f_count) {
14108                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
14109                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
14110         }
14111
14112         /* Update VSI BW information */
14113         ret = i40e_vsi_get_bw_info(vsi);
14114         if (ret) {
14115                 dev_info(&pf->pdev->dev,
14116                          "couldn't get vsi bw info, err %pe aq_err %s\n",
14117                          ERR_PTR(ret),
14118                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14119                 /* VSI is already added so not tearing that up */
14120                 ret = 0;
14121         }
14122
14123 err:
14124         return ret;
14125 }
14126
14127 /**
14128  * i40e_vsi_release - Delete a VSI and free its resources
14129  * @vsi: the VSI being removed
14130  *
14131  * Returns 0 on success or < 0 on error
14132  **/
14133 int i40e_vsi_release(struct i40e_vsi *vsi)
14134 {
14135         struct i40e_mac_filter *f;
14136         struct hlist_node *h;
14137         struct i40e_veb *veb = NULL;
14138         struct i40e_pf *pf;
14139         u16 uplink_seid;
14140         int i, n, bkt;
14141
14142         pf = vsi->back;
14143
14144         /* release of a VEB-owner or last VSI is not allowed */
14145         if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
14146                 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
14147                          vsi->seid, vsi->uplink_seid);
14148                 return -ENODEV;
14149         }
14150         if (vsi == pf->vsi[pf->lan_vsi] &&
14151             !test_bit(__I40E_DOWN, pf->state)) {
14152                 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
14153                 return -ENODEV;
14154         }
14155         set_bit(__I40E_VSI_RELEASING, vsi->state);
14156         uplink_seid = vsi->uplink_seid;
14157
14158         if (vsi->type != I40E_VSI_SRIOV) {
14159                 if (vsi->netdev_registered) {
14160                         vsi->netdev_registered = false;
14161                         if (vsi->netdev) {
14162                                 /* results in a call to i40e_close() */
14163                                 unregister_netdev(vsi->netdev);
14164                         }
14165                 } else {
14166                         i40e_vsi_close(vsi);
14167                 }
14168                 i40e_vsi_disable_irq(vsi);
14169         }
14170
14171         if (vsi->type == I40E_VSI_MAIN)
14172                 i40e_devlink_destroy_port(pf);
14173
14174         spin_lock_bh(&vsi->mac_filter_hash_lock);
14175
14176         /* clear the sync flag on all filters */
14177         if (vsi->netdev) {
14178                 __dev_uc_unsync(vsi->netdev, NULL);
14179                 __dev_mc_unsync(vsi->netdev, NULL);
14180         }
14181
14182         /* make sure any remaining filters are marked for deletion */
14183         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14184                 __i40e_del_filter(vsi, f);
14185
14186         spin_unlock_bh(&vsi->mac_filter_hash_lock);
14187
14188         i40e_sync_vsi_filters(vsi);
14189
14190         i40e_vsi_delete(vsi);
14191         i40e_vsi_free_q_vectors(vsi);
14192         if (vsi->netdev) {
14193                 free_netdev(vsi->netdev);
14194                 vsi->netdev = NULL;
14195         }
14196         i40e_vsi_clear_rings(vsi);
14197         i40e_vsi_clear(vsi);
14198
14199         /* If this was the last thing on the VEB, except for the
14200          * controlling VSI, remove the VEB, which puts the controlling
14201          * VSI onto the next level down in the switch.
14202          *
14203          * Well, okay, there's one more exception here: don't remove
14204          * the orphan VEBs yet.  We'll wait for an explicit remove request
14205          * from up the network stack.
14206          */
14207         for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14208                 if (pf->vsi[i] &&
14209                     pf->vsi[i]->uplink_seid == uplink_seid &&
14210                     (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14211                         n++;      /* count the VSIs */
14212                 }
14213         }
14214         for (i = 0; i < I40E_MAX_VEB; i++) {
14215                 if (!pf->veb[i])
14216                         continue;
14217                 if (pf->veb[i]->uplink_seid == uplink_seid)
14218                         n++;     /* count the VEBs */
14219                 if (pf->veb[i]->seid == uplink_seid)
14220                         veb = pf->veb[i];
14221         }
14222         if (n == 0 && veb && veb->uplink_seid != 0)
14223                 i40e_veb_release(veb);
14224
14225         return 0;
14226 }
14227
14228 /**
14229  * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14230  * @vsi: ptr to the VSI
14231  *
14232  * This should only be called after i40e_vsi_mem_alloc() which allocates the
14233  * corresponding SW VSI structure and initializes num_queue_pairs for the
14234  * newly allocated VSI.
14235  *
14236  * Returns 0 on success or negative on failure
14237  **/
14238 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14239 {
14240         int ret = -ENOENT;
14241         struct i40e_pf *pf = vsi->back;
14242
14243         if (vsi->q_vectors[0]) {
14244                 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14245                          vsi->seid);
14246                 return -EEXIST;
14247         }
14248
14249         if (vsi->base_vector) {
14250                 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14251                          vsi->seid, vsi->base_vector);
14252                 return -EEXIST;
14253         }
14254
14255         ret = i40e_vsi_alloc_q_vectors(vsi);
14256         if (ret) {
14257                 dev_info(&pf->pdev->dev,
14258                          "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14259                          vsi->num_q_vectors, vsi->seid, ret);
14260                 vsi->num_q_vectors = 0;
14261                 goto vector_setup_out;
14262         }
14263
14264         /* In Legacy mode, we do not have to get any other vector since we
14265          * piggyback on the misc/ICR0 for queue interrupts.
14266         */
14267         if (!test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
14268                 return ret;
14269         if (vsi->num_q_vectors)
14270                 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14271                                                  vsi->num_q_vectors, vsi->idx);
14272         if (vsi->base_vector < 0) {
14273                 dev_info(&pf->pdev->dev,
14274                          "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14275                          vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14276                 i40e_vsi_free_q_vectors(vsi);
14277                 ret = -ENOENT;
14278                 goto vector_setup_out;
14279         }
14280
14281 vector_setup_out:
14282         return ret;
14283 }
14284
14285 /**
14286  * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14287  * @vsi: pointer to the vsi.
14288  *
14289  * This re-allocates a vsi's queue resources.
14290  *
14291  * Returns pointer to the successfully allocated and configured VSI sw struct
14292  * on success, otherwise returns NULL on failure.
14293  **/
14294 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14295 {
14296         u16 alloc_queue_pairs;
14297         struct i40e_pf *pf;
14298         u8 enabled_tc;
14299         int ret;
14300
14301         if (!vsi)
14302                 return NULL;
14303
14304         pf = vsi->back;
14305
14306         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14307         i40e_vsi_clear_rings(vsi);
14308
14309         i40e_vsi_free_arrays(vsi, false);
14310         i40e_set_num_rings_in_vsi(vsi);
14311         ret = i40e_vsi_alloc_arrays(vsi, false);
14312         if (ret)
14313                 goto err_vsi;
14314
14315         alloc_queue_pairs = vsi->alloc_queue_pairs *
14316                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14317
14318         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14319         if (ret < 0) {
14320                 dev_info(&pf->pdev->dev,
14321                          "failed to get tracking for %d queues for VSI %d err %d\n",
14322                          alloc_queue_pairs, vsi->seid, ret);
14323                 goto err_vsi;
14324         }
14325         vsi->base_queue = ret;
14326
14327         /* Update the FW view of the VSI. Force a reset of TC and queue
14328          * layout configurations.
14329          */
14330         enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14331         pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14332         pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14333         i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14334         if (vsi->type == I40E_VSI_MAIN)
14335                 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14336
14337         /* assign it some queues */
14338         ret = i40e_alloc_rings(vsi);
14339         if (ret)
14340                 goto err_rings;
14341
14342         /* map all of the rings to the q_vectors */
14343         i40e_vsi_map_rings_to_vectors(vsi);
14344         return vsi;
14345
14346 err_rings:
14347         i40e_vsi_free_q_vectors(vsi);
14348         if (vsi->netdev_registered) {
14349                 vsi->netdev_registered = false;
14350                 unregister_netdev(vsi->netdev);
14351                 free_netdev(vsi->netdev);
14352                 vsi->netdev = NULL;
14353         }
14354         if (vsi->type == I40E_VSI_MAIN)
14355                 i40e_devlink_destroy_port(pf);
14356         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14357 err_vsi:
14358         i40e_vsi_clear(vsi);
14359         return NULL;
14360 }
14361
14362 /**
14363  * i40e_vsi_setup - Set up a VSI by a given type
14364  * @pf: board private structure
14365  * @type: VSI type
14366  * @uplink_seid: the switch element to link to
14367  * @param1: usage depends upon VSI type. For VF types, indicates VF id
14368  *
14369  * This allocates the sw VSI structure and its queue resources, then add a VSI
14370  * to the identified VEB.
14371  *
14372  * Returns pointer to the successfully allocated and configure VSI sw struct on
14373  * success, otherwise returns NULL on failure.
14374  **/
14375 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14376                                 u16 uplink_seid, u32 param1)
14377 {
14378         struct i40e_vsi *vsi = NULL;
14379         struct i40e_veb *veb = NULL;
14380         u16 alloc_queue_pairs;
14381         int ret, i;
14382         int v_idx;
14383
14384         /* The requested uplink_seid must be either
14385          *     - the PF's port seid
14386          *              no VEB is needed because this is the PF
14387          *              or this is a Flow Director special case VSI
14388          *     - seid of an existing VEB
14389          *     - seid of a VSI that owns an existing VEB
14390          *     - seid of a VSI that doesn't own a VEB
14391          *              a new VEB is created and the VSI becomes the owner
14392          *     - seid of the PF VSI, which is what creates the first VEB
14393          *              this is a special case of the previous
14394          *
14395          * Find which uplink_seid we were given and create a new VEB if needed
14396          */
14397         for (i = 0; i < I40E_MAX_VEB; i++) {
14398                 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14399                         veb = pf->veb[i];
14400                         break;
14401                 }
14402         }
14403
14404         if (!veb && uplink_seid != pf->mac_seid) {
14405
14406                 for (i = 0; i < pf->num_alloc_vsi; i++) {
14407                         if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14408                                 vsi = pf->vsi[i];
14409                                 break;
14410                         }
14411                 }
14412                 if (!vsi) {
14413                         dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14414                                  uplink_seid);
14415                         return NULL;
14416                 }
14417
14418                 if (vsi->uplink_seid == pf->mac_seid)
14419                         veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14420                                              vsi->tc_config.enabled_tc);
14421                 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14422                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14423                                              vsi->tc_config.enabled_tc);
14424                 if (veb) {
14425                         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14426                                 dev_info(&vsi->back->pdev->dev,
14427                                          "New VSI creation error, uplink seid of LAN VSI expected.\n");
14428                                 return NULL;
14429                         }
14430                         /* We come up by default in VEPA mode if SRIOV is not
14431                          * already enabled, in which case we can't force VEPA
14432                          * mode.
14433                          */
14434                         if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
14435                                 veb->bridge_mode = BRIDGE_MODE_VEPA;
14436                                 clear_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
14437                         }
14438                         i40e_config_bridge_mode(veb);
14439                 }
14440                 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14441                         if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14442                                 veb = pf->veb[i];
14443                 }
14444                 if (!veb) {
14445                         dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14446                         return NULL;
14447                 }
14448
14449                 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14450                 uplink_seid = veb->seid;
14451         }
14452
14453         /* get vsi sw struct */
14454         v_idx = i40e_vsi_mem_alloc(pf, type);
14455         if (v_idx < 0)
14456                 goto err_alloc;
14457         vsi = pf->vsi[v_idx];
14458         if (!vsi)
14459                 goto err_alloc;
14460         vsi->type = type;
14461         vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14462
14463         if (type == I40E_VSI_MAIN)
14464                 pf->lan_vsi = v_idx;
14465         else if (type == I40E_VSI_SRIOV)
14466                 vsi->vf_id = param1;
14467         /* assign it some queues */
14468         alloc_queue_pairs = vsi->alloc_queue_pairs *
14469                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14470
14471         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14472         if (ret < 0) {
14473                 dev_info(&pf->pdev->dev,
14474                          "failed to get tracking for %d queues for VSI %d err=%d\n",
14475                          alloc_queue_pairs, vsi->seid, ret);
14476                 goto err_vsi;
14477         }
14478         vsi->base_queue = ret;
14479
14480         /* get a VSI from the hardware */
14481         vsi->uplink_seid = uplink_seid;
14482         ret = i40e_add_vsi(vsi);
14483         if (ret)
14484                 goto err_vsi;
14485
14486         switch (vsi->type) {
14487         /* setup the netdev if needed */
14488         case I40E_VSI_MAIN:
14489         case I40E_VSI_VMDQ2:
14490                 ret = i40e_config_netdev(vsi);
14491                 if (ret)
14492                         goto err_netdev;
14493                 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14494                 if (ret)
14495                         goto err_netdev;
14496                 if (vsi->type == I40E_VSI_MAIN) {
14497                         ret = i40e_devlink_create_port(pf);
14498                         if (ret)
14499                                 goto err_netdev;
14500                         SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port);
14501                 }
14502                 ret = register_netdev(vsi->netdev);
14503                 if (ret)
14504                         goto err_dl_port;
14505                 vsi->netdev_registered = true;
14506                 netif_carrier_off(vsi->netdev);
14507 #ifdef CONFIG_I40E_DCB
14508                 /* Setup DCB netlink interface */
14509                 i40e_dcbnl_setup(vsi);
14510 #endif /* CONFIG_I40E_DCB */
14511                 fallthrough;
14512         case I40E_VSI_FDIR:
14513                 /* set up vectors and rings if needed */
14514                 ret = i40e_vsi_setup_vectors(vsi);
14515                 if (ret)
14516                         goto err_msix;
14517
14518                 ret = i40e_alloc_rings(vsi);
14519                 if (ret)
14520                         goto err_rings;
14521
14522                 /* map all of the rings to the q_vectors */
14523                 i40e_vsi_map_rings_to_vectors(vsi);
14524
14525                 i40e_vsi_reset_stats(vsi);
14526                 break;
14527         default:
14528                 /* no netdev or rings for the other VSI types */
14529                 break;
14530         }
14531
14532         if (test_bit(I40E_HW_CAP_RSS_AQ, pf->hw.caps) &&
14533             vsi->type == I40E_VSI_VMDQ2) {
14534                 ret = i40e_vsi_config_rss(vsi);
14535                 if (ret)
14536                         goto err_config;
14537         }
14538         return vsi;
14539
14540 err_config:
14541         i40e_vsi_clear_rings(vsi);
14542 err_rings:
14543         i40e_vsi_free_q_vectors(vsi);
14544 err_msix:
14545         if (vsi->netdev_registered) {
14546                 vsi->netdev_registered = false;
14547                 unregister_netdev(vsi->netdev);
14548                 free_netdev(vsi->netdev);
14549                 vsi->netdev = NULL;
14550         }
14551 err_dl_port:
14552         if (vsi->type == I40E_VSI_MAIN)
14553                 i40e_devlink_destroy_port(pf);
14554 err_netdev:
14555         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14556 err_vsi:
14557         i40e_vsi_clear(vsi);
14558 err_alloc:
14559         return NULL;
14560 }
14561
14562 /**
14563  * i40e_veb_get_bw_info - Query VEB BW information
14564  * @veb: the veb to query
14565  *
14566  * Query the Tx scheduler BW configuration data for given VEB
14567  **/
14568 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14569 {
14570         struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14571         struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14572         struct i40e_pf *pf = veb->pf;
14573         struct i40e_hw *hw = &pf->hw;
14574         u32 tc_bw_max;
14575         int ret = 0;
14576         int i;
14577
14578         ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14579                                                   &bw_data, NULL);
14580         if (ret) {
14581                 dev_info(&pf->pdev->dev,
14582                          "query veb bw config failed, err %pe aq_err %s\n",
14583                          ERR_PTR(ret),
14584                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14585                 goto out;
14586         }
14587
14588         ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14589                                                    &ets_data, NULL);
14590         if (ret) {
14591                 dev_info(&pf->pdev->dev,
14592                          "query veb bw ets config failed, err %pe aq_err %s\n",
14593                          ERR_PTR(ret),
14594                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14595                 goto out;
14596         }
14597
14598         veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14599         veb->bw_max_quanta = ets_data.tc_bw_max;
14600         veb->is_abs_credits = bw_data.absolute_credits_enable;
14601         veb->enabled_tc = ets_data.tc_valid_bits;
14602         tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14603                     (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14604         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14605                 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14606                 veb->bw_tc_limit_credits[i] =
14607                                         le16_to_cpu(bw_data.tc_bw_limits[i]);
14608                 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14609         }
14610
14611 out:
14612         return ret;
14613 }
14614
14615 /**
14616  * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14617  * @pf: board private structure
14618  *
14619  * On error: returns error code (negative)
14620  * On success: returns vsi index in PF (positive)
14621  **/
14622 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14623 {
14624         int ret = -ENOENT;
14625         struct i40e_veb *veb;
14626         int i;
14627
14628         /* Need to protect the allocation of switch elements at the PF level */
14629         mutex_lock(&pf->switch_mutex);
14630
14631         /* VEB list may be fragmented if VEB creation/destruction has
14632          * been happening.  We can afford to do a quick scan to look
14633          * for any free slots in the list.
14634          *
14635          * find next empty veb slot, looping back around if necessary
14636          */
14637         i = 0;
14638         while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14639                 i++;
14640         if (i >= I40E_MAX_VEB) {
14641                 ret = -ENOMEM;
14642                 goto err_alloc_veb;  /* out of VEB slots! */
14643         }
14644
14645         veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14646         if (!veb) {
14647                 ret = -ENOMEM;
14648                 goto err_alloc_veb;
14649         }
14650         veb->pf = pf;
14651         veb->idx = i;
14652         veb->enabled_tc = 1;
14653
14654         pf->veb[i] = veb;
14655         ret = i;
14656 err_alloc_veb:
14657         mutex_unlock(&pf->switch_mutex);
14658         return ret;
14659 }
14660
14661 /**
14662  * i40e_switch_branch_release - Delete a branch of the switch tree
14663  * @branch: where to start deleting
14664  *
14665  * This uses recursion to find the tips of the branch to be
14666  * removed, deleting until we get back to and can delete this VEB.
14667  **/
14668 static void i40e_switch_branch_release(struct i40e_veb *branch)
14669 {
14670         struct i40e_pf *pf = branch->pf;
14671         u16 branch_seid = branch->seid;
14672         u16 veb_idx = branch->idx;
14673         int i;
14674
14675         /* release any VEBs on this VEB - RECURSION */
14676         for (i = 0; i < I40E_MAX_VEB; i++) {
14677                 if (!pf->veb[i])
14678                         continue;
14679                 if (pf->veb[i]->uplink_seid == branch->seid)
14680                         i40e_switch_branch_release(pf->veb[i]);
14681         }
14682
14683         /* Release the VSIs on this VEB, but not the owner VSI.
14684          *
14685          * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14686          *       the VEB itself, so don't use (*branch) after this loop.
14687          */
14688         for (i = 0; i < pf->num_alloc_vsi; i++) {
14689                 if (!pf->vsi[i])
14690                         continue;
14691                 if (pf->vsi[i]->uplink_seid == branch_seid &&
14692                    (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14693                         i40e_vsi_release(pf->vsi[i]);
14694                 }
14695         }
14696
14697         /* There's one corner case where the VEB might not have been
14698          * removed, so double check it here and remove it if needed.
14699          * This case happens if the veb was created from the debugfs
14700          * commands and no VSIs were added to it.
14701          */
14702         if (pf->veb[veb_idx])
14703                 i40e_veb_release(pf->veb[veb_idx]);
14704 }
14705
14706 /**
14707  * i40e_veb_clear - remove veb struct
14708  * @veb: the veb to remove
14709  **/
14710 static void i40e_veb_clear(struct i40e_veb *veb)
14711 {
14712         if (!veb)
14713                 return;
14714
14715         if (veb->pf) {
14716                 struct i40e_pf *pf = veb->pf;
14717
14718                 mutex_lock(&pf->switch_mutex);
14719                 if (pf->veb[veb->idx] == veb)
14720                         pf->veb[veb->idx] = NULL;
14721                 mutex_unlock(&pf->switch_mutex);
14722         }
14723
14724         kfree(veb);
14725 }
14726
14727 /**
14728  * i40e_veb_release - Delete a VEB and free its resources
14729  * @veb: the VEB being removed
14730  **/
14731 void i40e_veb_release(struct i40e_veb *veb)
14732 {
14733         struct i40e_vsi *vsi = NULL;
14734         struct i40e_pf *pf;
14735         int i, n = 0;
14736
14737         pf = veb->pf;
14738
14739         /* find the remaining VSI and check for extras */
14740         for (i = 0; i < pf->num_alloc_vsi; i++) {
14741                 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14742                         n++;
14743                         vsi = pf->vsi[i];
14744                 }
14745         }
14746         if (n != 1) {
14747                 dev_info(&pf->pdev->dev,
14748                          "can't remove VEB %d with %d VSIs left\n",
14749                          veb->seid, n);
14750                 return;
14751         }
14752
14753         /* move the remaining VSI to uplink veb */
14754         vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14755         if (veb->uplink_seid) {
14756                 vsi->uplink_seid = veb->uplink_seid;
14757                 if (veb->uplink_seid == pf->mac_seid)
14758                         vsi->veb_idx = I40E_NO_VEB;
14759                 else
14760                         vsi->veb_idx = veb->veb_idx;
14761         } else {
14762                 /* floating VEB */
14763                 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14764                 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14765         }
14766
14767         i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14768         i40e_veb_clear(veb);
14769 }
14770
14771 /**
14772  * i40e_add_veb - create the VEB in the switch
14773  * @veb: the VEB to be instantiated
14774  * @vsi: the controlling VSI
14775  **/
14776 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14777 {
14778         struct i40e_pf *pf = veb->pf;
14779         bool enable_stats = !!test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
14780         int ret;
14781
14782         ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14783                               veb->enabled_tc, false,
14784                               &veb->seid, enable_stats, NULL);
14785
14786         /* get a VEB from the hardware */
14787         if (ret) {
14788                 dev_info(&pf->pdev->dev,
14789                          "couldn't add VEB, err %pe aq_err %s\n",
14790                          ERR_PTR(ret),
14791                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14792                 return -EPERM;
14793         }
14794
14795         /* get statistics counter */
14796         ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14797                                          &veb->stats_idx, NULL, NULL, NULL);
14798         if (ret) {
14799                 dev_info(&pf->pdev->dev,
14800                          "couldn't get VEB statistics idx, err %pe aq_err %s\n",
14801                          ERR_PTR(ret),
14802                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14803                 return -EPERM;
14804         }
14805         ret = i40e_veb_get_bw_info(veb);
14806         if (ret) {
14807                 dev_info(&pf->pdev->dev,
14808                          "couldn't get VEB bw info, err %pe aq_err %s\n",
14809                          ERR_PTR(ret),
14810                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14811                 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14812                 return -ENOENT;
14813         }
14814
14815         vsi->uplink_seid = veb->seid;
14816         vsi->veb_idx = veb->idx;
14817         vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14818
14819         return 0;
14820 }
14821
14822 /**
14823  * i40e_veb_setup - Set up a VEB
14824  * @pf: board private structure
14825  * @flags: VEB setup flags
14826  * @uplink_seid: the switch element to link to
14827  * @vsi_seid: the initial VSI seid
14828  * @enabled_tc: Enabled TC bit-map
14829  *
14830  * This allocates the sw VEB structure and links it into the switch
14831  * It is possible and legal for this to be a duplicate of an already
14832  * existing VEB.  It is also possible for both uplink and vsi seids
14833  * to be zero, in order to create a floating VEB.
14834  *
14835  * Returns pointer to the successfully allocated VEB sw struct on
14836  * success, otherwise returns NULL on failure.
14837  **/
14838 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14839                                 u16 uplink_seid, u16 vsi_seid,
14840                                 u8 enabled_tc)
14841 {
14842         struct i40e_veb *veb, *uplink_veb = NULL;
14843         int vsi_idx, veb_idx;
14844         int ret;
14845
14846         /* if one seid is 0, the other must be 0 to create a floating relay */
14847         if ((uplink_seid == 0 || vsi_seid == 0) &&
14848             (uplink_seid + vsi_seid != 0)) {
14849                 dev_info(&pf->pdev->dev,
14850                          "one, not both seid's are 0: uplink=%d vsi=%d\n",
14851                          uplink_seid, vsi_seid);
14852                 return NULL;
14853         }
14854
14855         /* make sure there is such a vsi and uplink */
14856         for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14857                 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14858                         break;
14859         if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14860                 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14861                          vsi_seid);
14862                 return NULL;
14863         }
14864
14865         if (uplink_seid && uplink_seid != pf->mac_seid) {
14866                 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14867                         if (pf->veb[veb_idx] &&
14868                             pf->veb[veb_idx]->seid == uplink_seid) {
14869                                 uplink_veb = pf->veb[veb_idx];
14870                                 break;
14871                         }
14872                 }
14873                 if (!uplink_veb) {
14874                         dev_info(&pf->pdev->dev,
14875                                  "uplink seid %d not found\n", uplink_seid);
14876                         return NULL;
14877                 }
14878         }
14879
14880         /* get veb sw struct */
14881         veb_idx = i40e_veb_mem_alloc(pf);
14882         if (veb_idx < 0)
14883                 goto err_alloc;
14884         veb = pf->veb[veb_idx];
14885         veb->flags = flags;
14886         veb->uplink_seid = uplink_seid;
14887         veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14888         veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14889
14890         /* create the VEB in the switch */
14891         ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14892         if (ret)
14893                 goto err_veb;
14894         if (vsi_idx == pf->lan_vsi)
14895                 pf->lan_veb = veb->idx;
14896
14897         return veb;
14898
14899 err_veb:
14900         i40e_veb_clear(veb);
14901 err_alloc:
14902         return NULL;
14903 }
14904
14905 /**
14906  * i40e_setup_pf_switch_element - set PF vars based on switch type
14907  * @pf: board private structure
14908  * @ele: element we are building info from
14909  * @num_reported: total number of elements
14910  * @printconfig: should we print the contents
14911  *
14912  * helper function to assist in extracting a few useful SEID values.
14913  **/
14914 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14915                                 struct i40e_aqc_switch_config_element_resp *ele,
14916                                 u16 num_reported, bool printconfig)
14917 {
14918         u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14919         u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14920         u8 element_type = ele->element_type;
14921         u16 seid = le16_to_cpu(ele->seid);
14922
14923         if (printconfig)
14924                 dev_info(&pf->pdev->dev,
14925                          "type=%d seid=%d uplink=%d downlink=%d\n",
14926                          element_type, seid, uplink_seid, downlink_seid);
14927
14928         switch (element_type) {
14929         case I40E_SWITCH_ELEMENT_TYPE_MAC:
14930                 pf->mac_seid = seid;
14931                 break;
14932         case I40E_SWITCH_ELEMENT_TYPE_VEB:
14933                 /* Main VEB? */
14934                 if (uplink_seid != pf->mac_seid)
14935                         break;
14936                 if (pf->lan_veb >= I40E_MAX_VEB) {
14937                         int v;
14938
14939                         /* find existing or else empty VEB */
14940                         for (v = 0; v < I40E_MAX_VEB; v++) {
14941                                 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14942                                         pf->lan_veb = v;
14943                                         break;
14944                                 }
14945                         }
14946                         if (pf->lan_veb >= I40E_MAX_VEB) {
14947                                 v = i40e_veb_mem_alloc(pf);
14948                                 if (v < 0)
14949                                         break;
14950                                 pf->lan_veb = v;
14951                         }
14952                 }
14953                 if (pf->lan_veb >= I40E_MAX_VEB)
14954                         break;
14955
14956                 pf->veb[pf->lan_veb]->seid = seid;
14957                 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14958                 pf->veb[pf->lan_veb]->pf = pf;
14959                 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14960                 break;
14961         case I40E_SWITCH_ELEMENT_TYPE_VSI:
14962                 if (num_reported != 1)
14963                         break;
14964                 /* This is immediately after a reset so we can assume this is
14965                  * the PF's VSI
14966                  */
14967                 pf->mac_seid = uplink_seid;
14968                 pf->main_vsi_seid = seid;
14969                 if (printconfig)
14970                         dev_info(&pf->pdev->dev,
14971                                  "pf_seid=%d main_vsi_seid=%d\n",
14972                                  downlink_seid, pf->main_vsi_seid);
14973                 break;
14974         case I40E_SWITCH_ELEMENT_TYPE_PF:
14975         case I40E_SWITCH_ELEMENT_TYPE_VF:
14976         case I40E_SWITCH_ELEMENT_TYPE_EMP:
14977         case I40E_SWITCH_ELEMENT_TYPE_BMC:
14978         case I40E_SWITCH_ELEMENT_TYPE_PE:
14979         case I40E_SWITCH_ELEMENT_TYPE_PA:
14980                 /* ignore these for now */
14981                 break;
14982         default:
14983                 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14984                          element_type, seid);
14985                 break;
14986         }
14987 }
14988
14989 /**
14990  * i40e_fetch_switch_configuration - Get switch config from firmware
14991  * @pf: board private structure
14992  * @printconfig: should we print the contents
14993  *
14994  * Get the current switch configuration from the device and
14995  * extract a few useful SEID values.
14996  **/
14997 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14998 {
14999         struct i40e_aqc_get_switch_config_resp *sw_config;
15000         u16 next_seid = 0;
15001         int ret = 0;
15002         u8 *aq_buf;
15003         int i;
15004
15005         aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
15006         if (!aq_buf)
15007                 return -ENOMEM;
15008
15009         sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
15010         do {
15011                 u16 num_reported, num_total;
15012
15013                 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
15014                                                 I40E_AQ_LARGE_BUF,
15015                                                 &next_seid, NULL);
15016                 if (ret) {
15017                         dev_info(&pf->pdev->dev,
15018                                  "get switch config failed err %d aq_err %s\n",
15019                                  ret,
15020                                  i40e_aq_str(&pf->hw,
15021                                              pf->hw.aq.asq_last_status));
15022                         kfree(aq_buf);
15023                         return -ENOENT;
15024                 }
15025
15026                 num_reported = le16_to_cpu(sw_config->header.num_reported);
15027                 num_total = le16_to_cpu(sw_config->header.num_total);
15028
15029                 if (printconfig)
15030                         dev_info(&pf->pdev->dev,
15031                                  "header: %d reported %d total\n",
15032                                  num_reported, num_total);
15033
15034                 for (i = 0; i < num_reported; i++) {
15035                         struct i40e_aqc_switch_config_element_resp *ele =
15036                                 &sw_config->element[i];
15037
15038                         i40e_setup_pf_switch_element(pf, ele, num_reported,
15039                                                      printconfig);
15040                 }
15041         } while (next_seid != 0);
15042
15043         kfree(aq_buf);
15044         return ret;
15045 }
15046
15047 /**
15048  * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
15049  * @pf: board private structure
15050  * @reinit: if the Main VSI needs to re-initialized.
15051  * @lock_acquired: indicates whether or not the lock has been acquired
15052  *
15053  * Returns 0 on success, negative value on failure
15054  **/
15055 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
15056 {
15057         u16 flags = 0;
15058         int ret;
15059
15060         /* find out what's out there already */
15061         ret = i40e_fetch_switch_configuration(pf, false);
15062         if (ret) {
15063                 dev_info(&pf->pdev->dev,
15064                          "couldn't fetch switch config, err %pe aq_err %s\n",
15065                          ERR_PTR(ret),
15066                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15067                 return ret;
15068         }
15069         i40e_pf_reset_stats(pf);
15070
15071         /* set the switch config bit for the whole device to
15072          * support limited promisc or true promisc
15073          * when user requests promisc. The default is limited
15074          * promisc.
15075         */
15076
15077         if ((pf->hw.pf_id == 0) &&
15078             !test_bit(I40E_FLAG_TRUE_PROMISC_ENA, pf->flags)) {
15079                 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15080                 pf->last_sw_conf_flags = flags;
15081         }
15082
15083         if (pf->hw.pf_id == 0) {
15084                 u16 valid_flags;
15085
15086                 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15087                 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
15088                                                 NULL);
15089                 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
15090                         dev_info(&pf->pdev->dev,
15091                                  "couldn't set switch config bits, err %pe aq_err %s\n",
15092                                  ERR_PTR(ret),
15093                                  i40e_aq_str(&pf->hw,
15094                                              pf->hw.aq.asq_last_status));
15095                         /* not a fatal problem, just keep going */
15096                 }
15097                 pf->last_sw_conf_valid_flags = valid_flags;
15098         }
15099
15100         /* first time setup */
15101         if (pf->lan_vsi == I40E_NO_VSI || reinit) {
15102                 struct i40e_vsi *vsi = NULL;
15103                 u16 uplink_seid;
15104
15105                 /* Set up the PF VSI associated with the PF's main VSI
15106                  * that is already in the HW switch
15107                  */
15108                 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
15109                         uplink_seid = pf->veb[pf->lan_veb]->seid;
15110                 else
15111                         uplink_seid = pf->mac_seid;
15112                 if (pf->lan_vsi == I40E_NO_VSI)
15113                         vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
15114                 else if (reinit)
15115                         vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
15116                 if (!vsi) {
15117                         dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
15118                         i40e_cloud_filter_exit(pf);
15119                         i40e_fdir_teardown(pf);
15120                         return -EAGAIN;
15121                 }
15122         } else {
15123                 /* force a reset of TC and queue layout configurations */
15124                 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
15125
15126                 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
15127                 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
15128                 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
15129         }
15130         i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
15131
15132         i40e_fdir_sb_setup(pf);
15133
15134         /* Setup static PF queue filter control settings */
15135         ret = i40e_setup_pf_filter_control(pf);
15136         if (ret) {
15137                 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
15138                          ret);
15139                 /* Failure here should not stop continuing other steps */
15140         }
15141
15142         /* enable RSS in the HW, even for only one queue, as the stack can use
15143          * the hash
15144          */
15145         if (test_bit(I40E_FLAG_RSS_ENA, pf->flags))
15146                 i40e_pf_config_rss(pf);
15147
15148         /* fill in link information and enable LSE reporting */
15149         i40e_link_event(pf);
15150
15151         i40e_ptp_init(pf);
15152
15153         if (!lock_acquired)
15154                 rtnl_lock();
15155
15156         /* repopulate tunnel port filters */
15157         udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
15158
15159         if (!lock_acquired)
15160                 rtnl_unlock();
15161
15162         return ret;
15163 }
15164
15165 /**
15166  * i40e_determine_queue_usage - Work out queue distribution
15167  * @pf: board private structure
15168  **/
15169 static void i40e_determine_queue_usage(struct i40e_pf *pf)
15170 {
15171         int queues_left;
15172         int q_max;
15173
15174         pf->num_lan_qps = 0;
15175
15176         /* Find the max queues to be put into basic use.  We'll always be
15177          * using TC0, whether or not DCB is running, and TC0 will get the
15178          * big RSS set.
15179          */
15180         queues_left = pf->hw.func_caps.num_tx_qp;
15181
15182         if ((queues_left == 1) ||
15183             !test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
15184                 /* one qp for PF, no queues for anything else */
15185                 queues_left = 0;
15186                 pf->alloc_rss_size = pf->num_lan_qps = 1;
15187
15188                 /* make sure all the fancies are disabled */
15189                 clear_bit(I40E_FLAG_RSS_ENA, pf->flags);
15190                 clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
15191                 clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
15192                 clear_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
15193                 clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
15194                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15195                 clear_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
15196                 clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
15197                 set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
15198         } else if (!test_bit(I40E_FLAG_RSS_ENA, pf->flags) &&
15199                    !test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
15200                    !test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
15201                    !test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags)) {
15202                 /* one qp for PF */
15203                 pf->alloc_rss_size = pf->num_lan_qps = 1;
15204                 queues_left -= pf->num_lan_qps;
15205
15206                 clear_bit(I40E_FLAG_RSS_ENA, pf->flags);
15207                 clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
15208                 clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
15209                 clear_bit(I40E_FLAG_FD_ATR_ENA, pf->flags);
15210                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15211                 clear_bit(I40E_FLAG_VMDQ_ENA, pf->flags);
15212                 set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
15213         } else {
15214                 /* Not enough queues for all TCs */
15215                 if (test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags) &&
15216                     queues_left < I40E_MAX_TRAFFIC_CLASS) {
15217                         clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
15218                         clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15219                         dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15220                 }
15221
15222                 /* limit lan qps to the smaller of qps, cpus or msix */
15223                 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15224                 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15225                 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15226                 pf->num_lan_qps = q_max;
15227
15228                 queues_left -= pf->num_lan_qps;
15229         }
15230
15231         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
15232                 if (queues_left > 1) {
15233                         queues_left -= 1; /* save 1 queue for FD */
15234                 } else {
15235                         clear_bit(I40E_FLAG_FD_SB_ENA, pf->flags);
15236                         set_bit(I40E_FLAG_FD_SB_INACTIVE, pf->flags);
15237                         dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15238                 }
15239         }
15240
15241         if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15242             pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15243                 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15244                                         (queues_left / pf->num_vf_qps));
15245                 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15246         }
15247
15248         if (test_bit(I40E_FLAG_VMDQ_ENA, pf->flags) &&
15249             pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15250                 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15251                                           (queues_left / pf->num_vmdq_qps));
15252                 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15253         }
15254
15255         pf->queues_left = queues_left;
15256         dev_dbg(&pf->pdev->dev,
15257                 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15258                 pf->hw.func_caps.num_tx_qp,
15259                 !!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags),
15260                 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15261                 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15262                 queues_left);
15263 }
15264
15265 /**
15266  * i40e_setup_pf_filter_control - Setup PF static filter control
15267  * @pf: PF to be setup
15268  *
15269  * i40e_setup_pf_filter_control sets up a PF's initial filter control
15270  * settings. If PE/FCoE are enabled then it will also set the per PF
15271  * based filter sizes required for them. It also enables Flow director,
15272  * ethertype and macvlan type filter settings for the pf.
15273  *
15274  * Returns 0 on success, negative on failure
15275  **/
15276 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15277 {
15278         struct i40e_filter_control_settings *settings = &pf->filter_settings;
15279
15280         settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15281
15282         /* Flow Director is enabled */
15283         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ||
15284             test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
15285                 settings->enable_fdir = true;
15286
15287         /* Ethtype and MACVLAN filters enabled for PF */
15288         settings->enable_ethtype = true;
15289         settings->enable_macvlan = true;
15290
15291         if (i40e_set_filter_control(&pf->hw, settings))
15292                 return -ENOENT;
15293
15294         return 0;
15295 }
15296
15297 #define INFO_STRING_LEN 255
15298 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
15299 static void i40e_print_features(struct i40e_pf *pf)
15300 {
15301         struct i40e_hw *hw = &pf->hw;
15302         char *buf;
15303         int i;
15304
15305         buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15306         if (!buf)
15307                 return;
15308
15309         i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15310 #ifdef CONFIG_PCI_IOV
15311         i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15312 #endif
15313         i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15314                       pf->hw.func_caps.num_vsis,
15315                       pf->vsi[pf->lan_vsi]->num_queue_pairs);
15316         if (test_bit(I40E_FLAG_RSS_ENA, pf->flags))
15317                 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15318         if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
15319                 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15320         if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags)) {
15321                 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15322                 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15323         }
15324         if (test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
15325                 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15326         i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15327         i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15328         if (test_bit(I40E_FLAG_PTP_ENA, pf->flags))
15329                 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15330         if (test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags))
15331                 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15332         else
15333                 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15334
15335         dev_info(&pf->pdev->dev, "%s\n", buf);
15336         kfree(buf);
15337         WARN_ON(i > INFO_STRING_LEN);
15338 }
15339
15340 /**
15341  * i40e_get_platform_mac_addr - get platform-specific MAC address
15342  * @pdev: PCI device information struct
15343  * @pf: board private structure
15344  *
15345  * Look up the MAC address for the device. First we'll try
15346  * eth_platform_get_mac_address, which will check Open Firmware, or arch
15347  * specific fallback. Otherwise, we'll default to the stored value in
15348  * firmware.
15349  **/
15350 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15351 {
15352         if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15353                 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15354 }
15355
15356 /**
15357  * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15358  * @fec_cfg: FEC option to set in flags
15359  * @flags: ptr to flags in which we set FEC option
15360  **/
15361 void i40e_set_fec_in_flags(u8 fec_cfg, unsigned long *flags)
15362 {
15363         if (fec_cfg & I40E_AQ_SET_FEC_AUTO) {
15364                 set_bit(I40E_FLAG_RS_FEC, flags);
15365                 set_bit(I40E_FLAG_BASE_R_FEC, flags);
15366         }
15367         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15368             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15369                 set_bit(I40E_FLAG_RS_FEC, flags);
15370                 clear_bit(I40E_FLAG_BASE_R_FEC, flags);
15371         }
15372         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15373             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15374                 set_bit(I40E_FLAG_BASE_R_FEC, flags);
15375                 clear_bit(I40E_FLAG_RS_FEC, flags);
15376         }
15377         if (fec_cfg == 0) {
15378                 clear_bit(I40E_FLAG_RS_FEC, flags);
15379                 clear_bit(I40E_FLAG_BASE_R_FEC, flags);
15380         }
15381 }
15382
15383 /**
15384  * i40e_check_recovery_mode - check if we are running transition firmware
15385  * @pf: board private structure
15386  *
15387  * Check registers indicating the firmware runs in recovery mode. Sets the
15388  * appropriate driver state.
15389  *
15390  * Returns true if the recovery mode was detected, false otherwise
15391  **/
15392 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15393 {
15394         u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15395
15396         if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15397                 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15398                 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15399                 set_bit(__I40E_RECOVERY_MODE, pf->state);
15400
15401                 return true;
15402         }
15403         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15404                 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15405
15406         return false;
15407 }
15408
15409 /**
15410  * i40e_pf_loop_reset - perform reset in a loop.
15411  * @pf: board private structure
15412  *
15413  * This function is useful when a NIC is about to enter recovery mode.
15414  * When a NIC's internal data structures are corrupted the NIC's
15415  * firmware is going to enter recovery mode.
15416  * Right after a POR it takes about 7 minutes for firmware to enter
15417  * recovery mode. Until that time a NIC is in some kind of intermediate
15418  * state. After that time period the NIC almost surely enters
15419  * recovery mode. The only way for a driver to detect intermediate
15420  * state is to issue a series of pf-resets and check a return value.
15421  * If a PF reset returns success then the firmware could be in recovery
15422  * mode so the caller of this code needs to check for recovery mode
15423  * if this function returns success. There is a little chance that
15424  * firmware will hang in intermediate state forever.
15425  * Since waiting 7 minutes is quite a lot of time this function waits
15426  * 10 seconds and then gives up by returning an error.
15427  *
15428  * Return 0 on success, negative on failure.
15429  **/
15430 static int i40e_pf_loop_reset(struct i40e_pf *pf)
15431 {
15432         /* wait max 10 seconds for PF reset to succeed */
15433         const unsigned long time_end = jiffies + 10 * HZ;
15434         struct i40e_hw *hw = &pf->hw;
15435         int ret;
15436
15437         ret = i40e_pf_reset(hw);
15438         while (ret != 0 && time_before(jiffies, time_end)) {
15439                 usleep_range(10000, 20000);
15440                 ret = i40e_pf_reset(hw);
15441         }
15442
15443         if (ret == 0)
15444                 pf->pfr_count++;
15445         else
15446                 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15447
15448         return ret;
15449 }
15450
15451 /**
15452  * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15453  * @pf: board private structure
15454  *
15455  * Check FW registers to determine if FW issued unexpected EMP Reset.
15456  * Every time when unexpected EMP Reset occurs the FW increments
15457  * a counter of unexpected EMP Resets. When the counter reaches 10
15458  * the FW should enter the Recovery mode
15459  *
15460  * Returns true if FW issued unexpected EMP Reset
15461  **/
15462 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15463 {
15464         const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15465                            I40E_GL_FWSTS_FWS1B_MASK;
15466         return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15467                (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15468 }
15469
15470 /**
15471  * i40e_handle_resets - handle EMP resets and PF resets
15472  * @pf: board private structure
15473  *
15474  * Handle both EMP resets and PF resets and conclude whether there are
15475  * any issues regarding these resets. If there are any issues then
15476  * generate log entry.
15477  *
15478  * Return 0 if NIC is healthy or negative value when there are issues
15479  * with resets
15480  **/
15481 static int i40e_handle_resets(struct i40e_pf *pf)
15482 {
15483         const int pfr = i40e_pf_loop_reset(pf);
15484         const bool is_empr = i40e_check_fw_empr(pf);
15485
15486         if (is_empr || pfr != 0)
15487                 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15488
15489         return is_empr ? -EIO : pfr;
15490 }
15491
15492 /**
15493  * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15494  * @pf: board private structure
15495  * @hw: ptr to the hardware info
15496  *
15497  * This function does a minimal setup of all subsystems needed for running
15498  * recovery mode.
15499  *
15500  * Returns 0 on success, negative on failure
15501  **/
15502 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15503 {
15504         struct i40e_vsi *vsi;
15505         int err;
15506         int v_idx;
15507
15508         pci_set_drvdata(pf->pdev, pf);
15509         pci_save_state(pf->pdev);
15510
15511         /* set up periodic task facility */
15512         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15513         pf->service_timer_period = HZ;
15514
15515         INIT_WORK(&pf->service_task, i40e_service_task);
15516         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15517
15518         err = i40e_init_interrupt_scheme(pf);
15519         if (err)
15520                 goto err_switch_setup;
15521
15522         /* The number of VSIs reported by the FW is the minimum guaranteed
15523          * to us; HW supports far more and we share the remaining pool with
15524          * the other PFs. We allocate space for more than the guarantee with
15525          * the understanding that we might not get them all later.
15526          */
15527         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15528                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15529         else
15530                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15531
15532         /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15533         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15534                           GFP_KERNEL);
15535         if (!pf->vsi) {
15536                 err = -ENOMEM;
15537                 goto err_switch_setup;
15538         }
15539
15540         /* We allocate one VSI which is needed as absolute minimum
15541          * in order to register the netdev
15542          */
15543         v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15544         if (v_idx < 0) {
15545                 err = v_idx;
15546                 goto err_switch_setup;
15547         }
15548         pf->lan_vsi = v_idx;
15549         vsi = pf->vsi[v_idx];
15550         if (!vsi) {
15551                 err = -EFAULT;
15552                 goto err_switch_setup;
15553         }
15554         vsi->alloc_queue_pairs = 1;
15555         err = i40e_config_netdev(vsi);
15556         if (err)
15557                 goto err_switch_setup;
15558         err = register_netdev(vsi->netdev);
15559         if (err)
15560                 goto err_switch_setup;
15561         vsi->netdev_registered = true;
15562         i40e_dbg_pf_init(pf);
15563
15564         err = i40e_setup_misc_vector_for_recovery_mode(pf);
15565         if (err)
15566                 goto err_switch_setup;
15567
15568         /* tell the firmware that we're starting */
15569         i40e_send_version(pf);
15570
15571         /* since everything's happy, start the service_task timer */
15572         mod_timer(&pf->service_timer,
15573                   round_jiffies(jiffies + pf->service_timer_period));
15574
15575         return 0;
15576
15577 err_switch_setup:
15578         i40e_reset_interrupt_capability(pf);
15579         timer_shutdown_sync(&pf->service_timer);
15580         i40e_shutdown_adminq(hw);
15581         iounmap(hw->hw_addr);
15582         pci_release_mem_regions(pf->pdev);
15583         pci_disable_device(pf->pdev);
15584         i40e_free_pf(pf);
15585
15586         return err;
15587 }
15588
15589 /**
15590  * i40e_set_subsystem_device_id - set subsystem device id
15591  * @hw: pointer to the hardware info
15592  *
15593  * Set PCI subsystem device id either from a pci_dev structure or
15594  * a specific FW register.
15595  **/
15596 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15597 {
15598         struct i40e_pf *pf = i40e_hw_to_pf(hw);
15599
15600         hw->subsystem_device_id = pf->pdev->subsystem_device ?
15601                 pf->pdev->subsystem_device :
15602                 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15603 }
15604
15605 /**
15606  * i40e_probe - Device initialization routine
15607  * @pdev: PCI device information struct
15608  * @ent: entry in i40e_pci_tbl
15609  *
15610  * i40e_probe initializes a PF identified by a pci_dev structure.
15611  * The OS initialization, configuring of the PF private structure,
15612  * and a hardware reset occur.
15613  *
15614  * Returns 0 on success, negative on failure
15615  **/
15616 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15617 {
15618         struct i40e_aq_get_phy_abilities_resp abilities;
15619 #ifdef CONFIG_I40E_DCB
15620         enum i40e_get_fw_lldp_status_resp lldp_status;
15621 #endif /* CONFIG_I40E_DCB */
15622         struct i40e_pf *pf;
15623         struct i40e_hw *hw;
15624         u16 wol_nvm_bits;
15625         char nvm_ver[32];
15626         u16 link_status;
15627 #ifdef CONFIG_I40E_DCB
15628         int status;
15629 #endif /* CONFIG_I40E_DCB */
15630         int err;
15631         u32 val;
15632         u32 i;
15633
15634         err = pci_enable_device_mem(pdev);
15635         if (err)
15636                 return err;
15637
15638         /* set up for high or low dma */
15639         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15640         if (err) {
15641                 dev_err(&pdev->dev,
15642                         "DMA configuration failed: 0x%x\n", err);
15643                 goto err_dma;
15644         }
15645
15646         /* set up pci connections */
15647         err = pci_request_mem_regions(pdev, i40e_driver_name);
15648         if (err) {
15649                 dev_info(&pdev->dev,
15650                          "pci_request_selected_regions failed %d\n", err);
15651                 goto err_pci_reg;
15652         }
15653
15654         pci_set_master(pdev);
15655
15656         /* Now that we have a PCI connection, we need to do the
15657          * low level device setup.  This is primarily setting up
15658          * the Admin Queue structures and then querying for the
15659          * device's current profile information.
15660          */
15661         pf = i40e_alloc_pf(&pdev->dev);
15662         if (!pf) {
15663                 err = -ENOMEM;
15664                 goto err_pf_alloc;
15665         }
15666         pf->next_vsi = 0;
15667         pf->pdev = pdev;
15668         set_bit(__I40E_DOWN, pf->state);
15669
15670         hw = &pf->hw;
15671
15672         pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15673                                 I40E_MAX_CSR_SPACE);
15674         /* We believe that the highest register to read is
15675          * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15676          * is not less than that before mapping to prevent a
15677          * kernel panic.
15678          */
15679         if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15680                 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15681                         pf->ioremap_len);
15682                 err = -ENOMEM;
15683                 goto err_ioremap;
15684         }
15685         hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15686         if (!hw->hw_addr) {
15687                 err = -EIO;
15688                 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15689                          (unsigned int)pci_resource_start(pdev, 0),
15690                          pf->ioremap_len, err);
15691                 goto err_ioremap;
15692         }
15693         hw->vendor_id = pdev->vendor;
15694         hw->device_id = pdev->device;
15695         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15696         hw->subsystem_vendor_id = pdev->subsystem_vendor;
15697         i40e_set_subsystem_device_id(hw);
15698         hw->bus.device = PCI_SLOT(pdev->devfn);
15699         hw->bus.func = PCI_FUNC(pdev->devfn);
15700         hw->bus.bus_id = pdev->bus->number;
15701
15702         /* Select something other than the 802.1ad ethertype for the
15703          * switch to use internally and drop on ingress.
15704          */
15705         hw->switch_tag = 0xffff;
15706         hw->first_tag = ETH_P_8021AD;
15707         hw->second_tag = ETH_P_8021Q;
15708
15709         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15710         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15711         INIT_LIST_HEAD(&pf->ddp_old_prof);
15712
15713         /* set up the locks for the AQ, do this only once in probe
15714          * and destroy them only once in remove
15715          */
15716         mutex_init(&hw->aq.asq_mutex);
15717         mutex_init(&hw->aq.arq_mutex);
15718
15719         pf->msg_enable = netif_msg_init(debug,
15720                                         NETIF_MSG_DRV |
15721                                         NETIF_MSG_PROBE |
15722                                         NETIF_MSG_LINK);
15723         if (debug < -1)
15724                 pf->hw.debug_mask = debug;
15725
15726         /* do a special CORER for clearing PXE mode once at init */
15727         if (hw->revision_id == 0 &&
15728             (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15729                 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15730                 i40e_flush(hw);
15731                 msleep(200);
15732                 pf->corer_count++;
15733
15734                 i40e_clear_pxe_mode(hw);
15735         }
15736
15737         /* Reset here to make sure all is clean and to define PF 'n' */
15738         i40e_clear_hw(hw);
15739
15740         err = i40e_set_mac_type(hw);
15741         if (err) {
15742                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15743                          err);
15744                 goto err_pf_reset;
15745         }
15746
15747         err = i40e_handle_resets(pf);
15748         if (err)
15749                 goto err_pf_reset;
15750
15751         i40e_check_recovery_mode(pf);
15752
15753         if (is_kdump_kernel()) {
15754                 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15755                 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15756         } else {
15757                 hw->aq.num_arq_entries = I40E_AQ_LEN;
15758                 hw->aq.num_asq_entries = I40E_AQ_LEN;
15759         }
15760         hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15761         hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15762
15763         snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15764                  "%s-%s:misc",
15765                  dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15766
15767         err = i40e_init_shared_code(hw);
15768         if (err) {
15769                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15770                          err);
15771                 goto err_pf_reset;
15772         }
15773
15774         /* set up a default setting for link flow control */
15775         pf->hw.fc.requested_mode = I40E_FC_NONE;
15776
15777         err = i40e_init_adminq(hw);
15778         if (err) {
15779                 if (err == -EIO)
15780                         dev_info(&pdev->dev,
15781                                  "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15782                                  hw->aq.api_maj_ver,
15783                                  hw->aq.api_min_ver,
15784                                  I40E_FW_API_VERSION_MAJOR,
15785                                  I40E_FW_MINOR_VERSION(hw));
15786                 else
15787                         dev_info(&pdev->dev,
15788                                  "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15789
15790                 goto err_pf_reset;
15791         }
15792         i40e_get_oem_version(hw);
15793         i40e_get_pba_string(hw);
15794
15795         /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15796         i40e_nvm_version_str(hw, nvm_ver, sizeof(nvm_ver));
15797         dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15798                  hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15799                  hw->aq.api_maj_ver, hw->aq.api_min_ver, nvm_ver,
15800                  hw->vendor_id, hw->device_id, hw->subsystem_vendor_id,
15801                  hw->subsystem_device_id);
15802
15803         if (i40e_is_aq_api_ver_ge(hw, I40E_FW_API_VERSION_MAJOR,
15804                                   I40E_FW_MINOR_VERSION(hw) + 1))
15805                 dev_dbg(&pdev->dev,
15806                         "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15807                          hw->aq.api_maj_ver,
15808                          hw->aq.api_min_ver,
15809                          I40E_FW_API_VERSION_MAJOR,
15810                          I40E_FW_MINOR_VERSION(hw));
15811         else if (i40e_is_aq_api_ver_lt(hw, 1, 4))
15812                 dev_info(&pdev->dev,
15813                          "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15814                          hw->aq.api_maj_ver,
15815                          hw->aq.api_min_ver,
15816                          I40E_FW_API_VERSION_MAJOR,
15817                          I40E_FW_MINOR_VERSION(hw));
15818
15819         i40e_verify_eeprom(pf);
15820
15821         /* Rev 0 hardware was never productized */
15822         if (hw->revision_id < 1)
15823                 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15824
15825         i40e_clear_pxe_mode(hw);
15826
15827         err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15828         if (err)
15829                 goto err_adminq_setup;
15830
15831         err = i40e_sw_init(pf);
15832         if (err) {
15833                 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15834                 goto err_sw_init;
15835         }
15836
15837         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15838                 return i40e_init_recovery_mode(pf, hw);
15839
15840         err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15841                                 hw->func_caps.num_rx_qp, 0, 0);
15842         if (err) {
15843                 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15844                 goto err_init_lan_hmc;
15845         }
15846
15847         err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15848         if (err) {
15849                 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15850                 err = -ENOENT;
15851                 goto err_configure_lan_hmc;
15852         }
15853
15854         /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15855          * Ignore error return codes because if it was already disabled via
15856          * hardware settings this will fail
15857          */
15858         if (test_bit(I40E_HW_CAP_STOP_FW_LLDP, pf->hw.caps)) {
15859                 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15860                 i40e_aq_stop_lldp(hw, true, false, NULL);
15861         }
15862
15863         /* allow a platform config to override the HW addr */
15864         i40e_get_platform_mac_addr(pdev, pf);
15865
15866         if (!is_valid_ether_addr(hw->mac.addr)) {
15867                 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15868                 err = -EIO;
15869                 goto err_mac_addr;
15870         }
15871         dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15872         ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15873         i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15874         if (is_valid_ether_addr(hw->mac.port_addr))
15875                 set_bit(I40E_HW_CAP_PORT_ID_VALID, pf->hw.caps);
15876
15877         i40e_ptp_alloc_pins(pf);
15878         pci_set_drvdata(pdev, pf);
15879         pci_save_state(pdev);
15880
15881 #ifdef CONFIG_I40E_DCB
15882         status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15883         (!status &&
15884          lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15885                 (clear_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags)) :
15886                 (set_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags));
15887         dev_info(&pdev->dev,
15888                  test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags) ?
15889                         "FW LLDP is disabled\n" :
15890                         "FW LLDP is enabled\n");
15891
15892         /* Enable FW to write default DCB config on link-up */
15893         i40e_aq_set_dcb_parameters(hw, true, NULL);
15894
15895         err = i40e_init_pf_dcb(pf);
15896         if (err) {
15897                 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15898                 clear_bit(I40E_FLAG_DCB_CAPABLE, pf->flags);
15899                 clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
15900                 /* Continue without DCB enabled */
15901         }
15902 #endif /* CONFIG_I40E_DCB */
15903
15904         /* set up periodic task facility */
15905         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15906         pf->service_timer_period = HZ;
15907
15908         INIT_WORK(&pf->service_task, i40e_service_task);
15909         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15910
15911         /* NVM bit on means WoL disabled for the port */
15912         i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15913         if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15914                 pf->wol_en = false;
15915         else
15916                 pf->wol_en = true;
15917         device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15918
15919         /* set up the main switch operations */
15920         i40e_determine_queue_usage(pf);
15921         err = i40e_init_interrupt_scheme(pf);
15922         if (err)
15923                 goto err_switch_setup;
15924
15925         /* Reduce Tx and Rx pairs for kdump
15926          * When MSI-X is enabled, it's not allowed to use more TC queue
15927          * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15928          * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15929          */
15930         if (is_kdump_kernel())
15931                 pf->num_lan_msix = 1;
15932
15933         pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15934         pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15935         pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15936         pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15937         pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15938         pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15939                                                     UDP_TUNNEL_TYPE_GENEVE;
15940
15941         /* The number of VSIs reported by the FW is the minimum guaranteed
15942          * to us; HW supports far more and we share the remaining pool with
15943          * the other PFs. We allocate space for more than the guarantee with
15944          * the understanding that we might not get them all later.
15945          */
15946         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15947                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15948         else
15949                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15950         if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15951                 dev_warn(&pf->pdev->dev,
15952                          "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15953                          pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15954                 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15955         }
15956
15957         /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15958         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15959                           GFP_KERNEL);
15960         if (!pf->vsi) {
15961                 err = -ENOMEM;
15962                 goto err_switch_setup;
15963         }
15964
15965 #ifdef CONFIG_PCI_IOV
15966         /* prep for VF support */
15967         if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
15968             test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
15969             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15970                 if (pci_num_vf(pdev))
15971                         set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
15972         }
15973 #endif
15974         err = i40e_setup_pf_switch(pf, false, false);
15975         if (err) {
15976                 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15977                 goto err_vsis;
15978         }
15979         INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15980
15981         /* if FDIR VSI was set up, start it now */
15982         for (i = 0; i < pf->num_alloc_vsi; i++) {
15983                 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15984                         i40e_vsi_open(pf->vsi[i]);
15985                         break;
15986                 }
15987         }
15988
15989         /* The driver only wants link up/down and module qualification
15990          * reports from firmware.  Note the negative logic.
15991          */
15992         err = i40e_aq_set_phy_int_mask(&pf->hw,
15993                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
15994                                          I40E_AQ_EVENT_MEDIA_NA |
15995                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15996         if (err)
15997                 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
15998                          ERR_PTR(err),
15999                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16000
16001         /* Reconfigure hardware for allowing smaller MSS in the case
16002          * of TSO, so that we avoid the MDD being fired and causing
16003          * a reset in the case of small MSS+TSO.
16004          */
16005         val = rd32(hw, I40E_REG_MSS);
16006         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
16007                 val &= ~I40E_REG_MSS_MIN_MASK;
16008                 val |= I40E_64BYTE_MSS;
16009                 wr32(hw, I40E_REG_MSS, val);
16010         }
16011
16012         if (test_bit(I40E_HW_CAP_RESTART_AUTONEG, pf->hw.caps)) {
16013                 msleep(75);
16014                 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
16015                 if (err)
16016                         dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
16017                                  ERR_PTR(err),
16018                                  i40e_aq_str(&pf->hw,
16019                                              pf->hw.aq.asq_last_status));
16020         }
16021         /* The main driver is (mostly) up and happy. We need to set this state
16022          * before setting up the misc vector or we get a race and the vector
16023          * ends up disabled forever.
16024          */
16025         clear_bit(__I40E_DOWN, pf->state);
16026
16027         /* In case of MSIX we are going to setup the misc vector right here
16028          * to handle admin queue events etc. In case of legacy and MSI
16029          * the misc functionality and queue processing is combined in
16030          * the same vector and that gets setup at open.
16031          */
16032         if (test_bit(I40E_FLAG_MSIX_ENA, pf->flags)) {
16033                 err = i40e_setup_misc_vector(pf);
16034                 if (err) {
16035                         dev_info(&pdev->dev,
16036                                  "setup of misc vector failed: %d\n", err);
16037                         i40e_cloud_filter_exit(pf);
16038                         i40e_fdir_teardown(pf);
16039                         goto err_vsis;
16040                 }
16041         }
16042
16043 #ifdef CONFIG_PCI_IOV
16044         /* prep for VF support */
16045         if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags) &&
16046             test_bit(I40E_FLAG_MSIX_ENA, pf->flags) &&
16047             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16048                 /* disable link interrupts for VFs */
16049                 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
16050                 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
16051                 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
16052                 i40e_flush(hw);
16053
16054                 if (pci_num_vf(pdev)) {
16055                         dev_info(&pdev->dev,
16056                                  "Active VFs found, allocating resources.\n");
16057                         err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
16058                         if (err)
16059                                 dev_info(&pdev->dev,
16060                                          "Error %d allocating resources for existing VFs\n",
16061                                          err);
16062                 }
16063         }
16064 #endif /* CONFIG_PCI_IOV */
16065
16066         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16067                 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
16068                                                       pf->num_iwarp_msix,
16069                                                       I40E_IWARP_IRQ_PILE_ID);
16070                 if (pf->iwarp_base_vector < 0) {
16071                         dev_info(&pdev->dev,
16072                                  "failed to get tracking for %d vectors for IWARP err=%d\n",
16073                                  pf->num_iwarp_msix, pf->iwarp_base_vector);
16074                         clear_bit(I40E_FLAG_IWARP_ENA, pf->flags);
16075                 }
16076         }
16077
16078         i40e_dbg_pf_init(pf);
16079
16080         /* tell the firmware that we're starting */
16081         i40e_send_version(pf);
16082
16083         /* since everything's happy, start the service_task timer */
16084         mod_timer(&pf->service_timer,
16085                   round_jiffies(jiffies + pf->service_timer_period));
16086
16087         /* add this PF to client device list and launch a client service task */
16088         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16089                 err = i40e_lan_add_device(pf);
16090                 if (err)
16091                         dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
16092                                  err);
16093         }
16094
16095 #define PCI_SPEED_SIZE 8
16096 #define PCI_WIDTH_SIZE 8
16097         /* Devices on the IOSF bus do not have this information
16098          * and will report PCI Gen 1 x 1 by default so don't bother
16099          * checking them.
16100          */
16101         if (!test_bit(I40E_HW_CAP_NO_PCI_LINK_CHECK, pf->hw.caps)) {
16102                 char speed[PCI_SPEED_SIZE] = "Unknown";
16103                 char width[PCI_WIDTH_SIZE] = "Unknown";
16104
16105                 /* Get the negotiated link width and speed from PCI config
16106                  * space
16107                  */
16108                 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
16109                                           &link_status);
16110
16111                 i40e_set_pci_config_data(hw, link_status);
16112
16113                 switch (hw->bus.speed) {
16114                 case i40e_bus_speed_8000:
16115                         strscpy(speed, "8.0", PCI_SPEED_SIZE); break;
16116                 case i40e_bus_speed_5000:
16117                         strscpy(speed, "5.0", PCI_SPEED_SIZE); break;
16118                 case i40e_bus_speed_2500:
16119                         strscpy(speed, "2.5", PCI_SPEED_SIZE); break;
16120                 default:
16121                         break;
16122                 }
16123                 switch (hw->bus.width) {
16124                 case i40e_bus_width_pcie_x8:
16125                         strscpy(width, "8", PCI_WIDTH_SIZE); break;
16126                 case i40e_bus_width_pcie_x4:
16127                         strscpy(width, "4", PCI_WIDTH_SIZE); break;
16128                 case i40e_bus_width_pcie_x2:
16129                         strscpy(width, "2", PCI_WIDTH_SIZE); break;
16130                 case i40e_bus_width_pcie_x1:
16131                         strscpy(width, "1", PCI_WIDTH_SIZE); break;
16132                 default:
16133                         break;
16134                 }
16135
16136                 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
16137                          speed, width);
16138
16139                 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
16140                     hw->bus.speed < i40e_bus_speed_8000) {
16141                         dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
16142                         dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
16143                 }
16144         }
16145
16146         /* get the requested speeds from the fw */
16147         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
16148         if (err)
16149                 dev_dbg(&pf->pdev->dev, "get requested speeds ret =  %pe last_status =  %s\n",
16150                         ERR_PTR(err),
16151                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16152         pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
16153
16154         /* set the FEC config due to the board capabilities */
16155         i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, pf->flags);
16156
16157         /* get the supported phy types from the fw */
16158         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
16159         if (err)
16160                 dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %pe last_status =  %s\n",
16161                         ERR_PTR(err),
16162                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16163
16164         /* make sure the MFS hasn't been set lower than the default */
16165 #define MAX_FRAME_SIZE_DEFAULT 0x2600
16166         val = FIELD_GET(I40E_PRTGL_SAH_MFS_MASK,
16167                         rd32(&pf->hw, I40E_PRTGL_SAH));
16168         if (val < MAX_FRAME_SIZE_DEFAULT)
16169                 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
16170                          pf->hw.port, val);
16171
16172         /* Add a filter to drop all Flow control frames from any VSI from being
16173          * transmitted. By doing so we stop a malicious VF from sending out
16174          * PAUSE or PFC frames and potentially controlling traffic for other
16175          * PF/VF VSIs.
16176          * The FW can still send Flow control frames if enabled.
16177          */
16178         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
16179                                                        pf->main_vsi_seid);
16180
16181         if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
16182             (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
16183                 set_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps);
16184         if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
16185                 set_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps);
16186         /* print a string summarizing features */
16187         i40e_print_features(pf);
16188
16189         i40e_devlink_register(pf);
16190
16191         return 0;
16192
16193         /* Unwind what we've done if something failed in the setup */
16194 err_vsis:
16195         set_bit(__I40E_DOWN, pf->state);
16196         i40e_clear_interrupt_scheme(pf);
16197         kfree(pf->vsi);
16198 err_switch_setup:
16199         i40e_reset_interrupt_capability(pf);
16200         timer_shutdown_sync(&pf->service_timer);
16201 err_mac_addr:
16202 err_configure_lan_hmc:
16203         (void)i40e_shutdown_lan_hmc(hw);
16204 err_init_lan_hmc:
16205         kfree(pf->qp_pile);
16206 err_sw_init:
16207 err_adminq_setup:
16208 err_pf_reset:
16209         iounmap(hw->hw_addr);
16210 err_ioremap:
16211         i40e_free_pf(pf);
16212 err_pf_alloc:
16213         pci_release_mem_regions(pdev);
16214 err_pci_reg:
16215 err_dma:
16216         pci_disable_device(pdev);
16217         return err;
16218 }
16219
16220 /**
16221  * i40e_remove - Device removal routine
16222  * @pdev: PCI device information struct
16223  *
16224  * i40e_remove is called by the PCI subsystem to alert the driver
16225  * that is should release a PCI device.  This could be caused by a
16226  * Hot-Plug event, or because the driver is going to be removed from
16227  * memory.
16228  **/
16229 static void i40e_remove(struct pci_dev *pdev)
16230 {
16231         struct i40e_pf *pf = pci_get_drvdata(pdev);
16232         struct i40e_hw *hw = &pf->hw;
16233         int ret_code;
16234         int i;
16235
16236         i40e_devlink_unregister(pf);
16237
16238         i40e_dbg_pf_exit(pf);
16239
16240         i40e_ptp_stop(pf);
16241
16242         /* Disable RSS in hw */
16243         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16244         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16245
16246         /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16247          * flags, once they are set, i40e_rebuild should not be called as
16248          * i40e_prep_for_reset always returns early.
16249          */
16250         while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16251                 usleep_range(1000, 2000);
16252         set_bit(__I40E_IN_REMOVE, pf->state);
16253
16254         if (test_bit(I40E_FLAG_SRIOV_ENA, pf->flags)) {
16255                 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16256                 i40e_free_vfs(pf);
16257                 clear_bit(I40E_FLAG_SRIOV_ENA, pf->flags);
16258         }
16259         /* no more scheduling of any task */
16260         set_bit(__I40E_SUSPENDED, pf->state);
16261         set_bit(__I40E_DOWN, pf->state);
16262         if (pf->service_timer.function)
16263                 timer_shutdown_sync(&pf->service_timer);
16264         if (pf->service_task.func)
16265                 cancel_work_sync(&pf->service_task);
16266
16267         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16268                 struct i40e_vsi *vsi = pf->vsi[0];
16269
16270                 /* We know that we have allocated only one vsi for this PF,
16271                  * it was just for registering netdevice, so the interface
16272                  * could be visible in the 'ifconfig' output
16273                  */
16274                 unregister_netdev(vsi->netdev);
16275                 free_netdev(vsi->netdev);
16276
16277                 goto unmap;
16278         }
16279
16280         /* Client close must be called explicitly here because the timer
16281          * has been stopped.
16282          */
16283         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16284
16285         i40e_fdir_teardown(pf);
16286
16287         /* If there is a switch structure or any orphans, remove them.
16288          * This will leave only the PF's VSI remaining.
16289          */
16290         for (i = 0; i < I40E_MAX_VEB; i++) {
16291                 if (!pf->veb[i])
16292                         continue;
16293
16294                 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16295                     pf->veb[i]->uplink_seid == 0)
16296                         i40e_switch_branch_release(pf->veb[i]);
16297         }
16298
16299         /* Now we can shutdown the PF's VSIs, just before we kill
16300          * adminq and hmc.
16301          */
16302         for (i = pf->num_alloc_vsi; i--;)
16303                 if (pf->vsi[i]) {
16304                         i40e_vsi_close(pf->vsi[i]);
16305                         i40e_vsi_release(pf->vsi[i]);
16306                         pf->vsi[i] = NULL;
16307                 }
16308
16309         i40e_cloud_filter_exit(pf);
16310
16311         /* remove attached clients */
16312         if (test_bit(I40E_FLAG_IWARP_ENA, pf->flags)) {
16313                 ret_code = i40e_lan_del_device(pf);
16314                 if (ret_code)
16315                         dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16316                                  ret_code);
16317         }
16318
16319         /* shutdown and destroy the HMC */
16320         if (hw->hmc.hmc_obj) {
16321                 ret_code = i40e_shutdown_lan_hmc(hw);
16322                 if (ret_code)
16323                         dev_warn(&pdev->dev,
16324                                  "Failed to destroy the HMC resources: %d\n",
16325                                  ret_code);
16326         }
16327
16328 unmap:
16329         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16330         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16331             !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
16332                 free_irq(pf->pdev->irq, pf);
16333
16334         /* shutdown the adminq */
16335         i40e_shutdown_adminq(hw);
16336
16337         /* destroy the locks only once, here */
16338         mutex_destroy(&hw->aq.arq_mutex);
16339         mutex_destroy(&hw->aq.asq_mutex);
16340
16341         /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16342         rtnl_lock();
16343         i40e_clear_interrupt_scheme(pf);
16344         for (i = 0; i < pf->num_alloc_vsi; i++) {
16345                 if (pf->vsi[i]) {
16346                         if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16347                                 i40e_vsi_clear_rings(pf->vsi[i]);
16348                         i40e_vsi_clear(pf->vsi[i]);
16349                         pf->vsi[i] = NULL;
16350                 }
16351         }
16352         rtnl_unlock();
16353
16354         for (i = 0; i < I40E_MAX_VEB; i++) {
16355                 kfree(pf->veb[i]);
16356                 pf->veb[i] = NULL;
16357         }
16358
16359         kfree(pf->qp_pile);
16360         kfree(pf->vsi);
16361
16362         iounmap(hw->hw_addr);
16363         i40e_free_pf(pf);
16364         pci_release_mem_regions(pdev);
16365
16366         pci_disable_device(pdev);
16367 }
16368
16369 /**
16370  * i40e_pci_error_detected - warning that something funky happened in PCI land
16371  * @pdev: PCI device information struct
16372  * @error: the type of PCI error
16373  *
16374  * Called to warn that something happened and the error handling steps
16375  * are in progress.  Allows the driver to quiesce things, be ready for
16376  * remediation.
16377  **/
16378 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16379                                                 pci_channel_state_t error)
16380 {
16381         struct i40e_pf *pf = pci_get_drvdata(pdev);
16382
16383         dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16384
16385         if (!pf) {
16386                 dev_info(&pdev->dev,
16387                          "Cannot recover - error happened during device probe\n");
16388                 return PCI_ERS_RESULT_DISCONNECT;
16389         }
16390
16391         /* shutdown all operations */
16392         if (!test_bit(__I40E_SUSPENDED, pf->state))
16393                 i40e_prep_for_reset(pf);
16394
16395         /* Request a slot reset */
16396         return PCI_ERS_RESULT_NEED_RESET;
16397 }
16398
16399 /**
16400  * i40e_pci_error_slot_reset - a PCI slot reset just happened
16401  * @pdev: PCI device information struct
16402  *
16403  * Called to find if the driver can work with the device now that
16404  * the pci slot has been reset.  If a basic connection seems good
16405  * (registers are readable and have sane content) then return a
16406  * happy little PCI_ERS_RESULT_xxx.
16407  **/
16408 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16409 {
16410         struct i40e_pf *pf = pci_get_drvdata(pdev);
16411         pci_ers_result_t result;
16412         u32 reg;
16413
16414         dev_dbg(&pdev->dev, "%s\n", __func__);
16415         if (pci_enable_device_mem(pdev)) {
16416                 dev_info(&pdev->dev,
16417                          "Cannot re-enable PCI device after reset.\n");
16418                 result = PCI_ERS_RESULT_DISCONNECT;
16419         } else {
16420                 pci_set_master(pdev);
16421                 pci_restore_state(pdev);
16422                 pci_save_state(pdev);
16423                 pci_wake_from_d3(pdev, false);
16424
16425                 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16426                 if (reg == 0)
16427                         result = PCI_ERS_RESULT_RECOVERED;
16428                 else
16429                         result = PCI_ERS_RESULT_DISCONNECT;
16430         }
16431
16432         return result;
16433 }
16434
16435 /**
16436  * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16437  * @pdev: PCI device information struct
16438  */
16439 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16440 {
16441         struct i40e_pf *pf = pci_get_drvdata(pdev);
16442
16443         i40e_prep_for_reset(pf);
16444 }
16445
16446 /**
16447  * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16448  * @pdev: PCI device information struct
16449  */
16450 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16451 {
16452         struct i40e_pf *pf = pci_get_drvdata(pdev);
16453
16454         if (test_bit(__I40E_IN_REMOVE, pf->state))
16455                 return;
16456
16457         i40e_reset_and_rebuild(pf, false, false);
16458 #ifdef CONFIG_PCI_IOV
16459         i40e_restore_all_vfs_msi_state(pdev);
16460 #endif /* CONFIG_PCI_IOV */
16461 }
16462
16463 /**
16464  * i40e_pci_error_resume - restart operations after PCI error recovery
16465  * @pdev: PCI device information struct
16466  *
16467  * Called to allow the driver to bring things back up after PCI error
16468  * and/or reset recovery has finished.
16469  **/
16470 static void i40e_pci_error_resume(struct pci_dev *pdev)
16471 {
16472         struct i40e_pf *pf = pci_get_drvdata(pdev);
16473
16474         dev_dbg(&pdev->dev, "%s\n", __func__);
16475         if (test_bit(__I40E_SUSPENDED, pf->state))
16476                 return;
16477
16478         i40e_handle_reset_warning(pf, false);
16479 }
16480
16481 /**
16482  * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16483  * using the mac_address_write admin q function
16484  * @pf: pointer to i40e_pf struct
16485  **/
16486 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16487 {
16488         struct i40e_hw *hw = &pf->hw;
16489         u8 mac_addr[6];
16490         u16 flags = 0;
16491         int ret;
16492
16493         /* Get current MAC address in case it's an LAA */
16494         if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16495                 ether_addr_copy(mac_addr,
16496                                 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16497         } else {
16498                 dev_err(&pf->pdev->dev,
16499                         "Failed to retrieve MAC address; using default\n");
16500                 ether_addr_copy(mac_addr, hw->mac.addr);
16501         }
16502
16503         /* The FW expects the mac address write cmd to first be called with
16504          * one of these flags before calling it again with the multicast
16505          * enable flags.
16506          */
16507         flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16508
16509         if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16510                 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16511
16512         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16513         if (ret) {
16514                 dev_err(&pf->pdev->dev,
16515                         "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16516                 return;
16517         }
16518
16519         flags = I40E_AQC_MC_MAG_EN
16520                         | I40E_AQC_WOL_PRESERVE_ON_PFR
16521                         | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16522         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16523         if (ret)
16524                 dev_err(&pf->pdev->dev,
16525                         "Failed to enable Multicast Magic Packet wake up\n");
16526 }
16527
16528 /**
16529  * i40e_shutdown - PCI callback for shutting down
16530  * @pdev: PCI device information struct
16531  **/
16532 static void i40e_shutdown(struct pci_dev *pdev)
16533 {
16534         struct i40e_pf *pf = pci_get_drvdata(pdev);
16535         struct i40e_hw *hw = &pf->hw;
16536
16537         set_bit(__I40E_SUSPENDED, pf->state);
16538         set_bit(__I40E_DOWN, pf->state);
16539
16540         del_timer_sync(&pf->service_timer);
16541         cancel_work_sync(&pf->service_task);
16542         i40e_cloud_filter_exit(pf);
16543         i40e_fdir_teardown(pf);
16544
16545         /* Client close must be called explicitly here because the timer
16546          * has been stopped.
16547          */
16548         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16549
16550         if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
16551             pf->wol_en)
16552                 i40e_enable_mc_magic_wake(pf);
16553
16554         i40e_prep_for_reset(pf);
16555
16556         wr32(hw, I40E_PFPM_APM,
16557              (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16558         wr32(hw, I40E_PFPM_WUFC,
16559              (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16560
16561         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16562         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16563             !test_bit(I40E_FLAG_MSIX_ENA, pf->flags))
16564                 free_irq(pf->pdev->irq, pf);
16565
16566         /* Since we're going to destroy queues during the
16567          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16568          * whole section
16569          */
16570         rtnl_lock();
16571         i40e_clear_interrupt_scheme(pf);
16572         rtnl_unlock();
16573
16574         if (system_state == SYSTEM_POWER_OFF) {
16575                 pci_wake_from_d3(pdev, pf->wol_en);
16576                 pci_set_power_state(pdev, PCI_D3hot);
16577         }
16578 }
16579
16580 /**
16581  * i40e_suspend - PM callback for moving to D3
16582  * @dev: generic device information structure
16583  **/
16584 static int __maybe_unused i40e_suspend(struct device *dev)
16585 {
16586         struct i40e_pf *pf = dev_get_drvdata(dev);
16587         struct i40e_hw *hw = &pf->hw;
16588
16589         /* If we're already suspended, then there is nothing to do */
16590         if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16591                 return 0;
16592
16593         set_bit(__I40E_DOWN, pf->state);
16594
16595         /* Ensure service task will not be running */
16596         del_timer_sync(&pf->service_timer);
16597         cancel_work_sync(&pf->service_task);
16598
16599         /* Client close must be called explicitly here because the timer
16600          * has been stopped.
16601          */
16602         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16603
16604         if (test_bit(I40E_HW_CAP_WOL_MC_MAGIC_PKT_WAKE, pf->hw.caps) &&
16605             pf->wol_en)
16606                 i40e_enable_mc_magic_wake(pf);
16607
16608         /* Since we're going to destroy queues during the
16609          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16610          * whole section
16611          */
16612         rtnl_lock();
16613
16614         i40e_prep_for_reset(pf);
16615
16616         wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16617         wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16618
16619         /* Clear the interrupt scheme and release our IRQs so that the system
16620          * can safely hibernate even when there are a large number of CPUs.
16621          * Otherwise hibernation might fail when mapping all the vectors back
16622          * to CPU0.
16623          */
16624         i40e_clear_interrupt_scheme(pf);
16625
16626         rtnl_unlock();
16627
16628         return 0;
16629 }
16630
16631 /**
16632  * i40e_resume - PM callback for waking up from D3
16633  * @dev: generic device information structure
16634  **/
16635 static int __maybe_unused i40e_resume(struct device *dev)
16636 {
16637         struct i40e_pf *pf = dev_get_drvdata(dev);
16638         int err;
16639
16640         /* If we're not suspended, then there is nothing to do */
16641         if (!test_bit(__I40E_SUSPENDED, pf->state))
16642                 return 0;
16643
16644         /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16645          * since we're going to be restoring queues
16646          */
16647         rtnl_lock();
16648
16649         /* We cleared the interrupt scheme when we suspended, so we need to
16650          * restore it now to resume device functionality.
16651          */
16652         err = i40e_restore_interrupt_scheme(pf);
16653         if (err) {
16654                 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16655                         err);
16656         }
16657
16658         clear_bit(__I40E_DOWN, pf->state);
16659         i40e_reset_and_rebuild(pf, false, true);
16660
16661         rtnl_unlock();
16662
16663         /* Clear suspended state last after everything is recovered */
16664         clear_bit(__I40E_SUSPENDED, pf->state);
16665
16666         /* Restart the service task */
16667         mod_timer(&pf->service_timer,
16668                   round_jiffies(jiffies + pf->service_timer_period));
16669
16670         return 0;
16671 }
16672
16673 static const struct pci_error_handlers i40e_err_handler = {
16674         .error_detected = i40e_pci_error_detected,
16675         .slot_reset = i40e_pci_error_slot_reset,
16676         .reset_prepare = i40e_pci_error_reset_prepare,
16677         .reset_done = i40e_pci_error_reset_done,
16678         .resume = i40e_pci_error_resume,
16679 };
16680
16681 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16682
16683 static struct pci_driver i40e_driver = {
16684         .name     = i40e_driver_name,
16685         .id_table = i40e_pci_tbl,
16686         .probe    = i40e_probe,
16687         .remove   = i40e_remove,
16688         .driver   = {
16689                 .pm = &i40e_pm_ops,
16690         },
16691         .shutdown = i40e_shutdown,
16692         .err_handler = &i40e_err_handler,
16693         .sriov_configure = i40e_pci_sriov_configure,
16694 };
16695
16696 /**
16697  * i40e_init_module - Driver registration routine
16698  *
16699  * i40e_init_module is the first routine called when the driver is
16700  * loaded. All it does is register with the PCI subsystem.
16701  **/
16702 static int __init i40e_init_module(void)
16703 {
16704         int err;
16705
16706         pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16707         pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16708
16709         /* There is no need to throttle the number of active tasks because
16710          * each device limits its own task using a state bit for scheduling
16711          * the service task, and the device tasks do not interfere with each
16712          * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16713          * since we need to be able to guarantee forward progress even under
16714          * memory pressure.
16715          */
16716         i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16717         if (!i40e_wq) {
16718                 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16719                 return -ENOMEM;
16720         }
16721
16722         i40e_dbg_init();
16723         err = pci_register_driver(&i40e_driver);
16724         if (err) {
16725                 destroy_workqueue(i40e_wq);
16726                 i40e_dbg_exit();
16727                 return err;
16728         }
16729
16730         return 0;
16731 }
16732 module_init(i40e_init_module);
16733
16734 /**
16735  * i40e_exit_module - Driver exit cleanup routine
16736  *
16737  * i40e_exit_module is called just before the driver is removed
16738  * from memory.
16739  **/
16740 static void __exit i40e_exit_module(void)
16741 {
16742         pci_unregister_driver(&i40e_driver);
16743         destroy_workqueue(i40e_wq);
16744         ida_destroy(&i40e_client_ida);
16745         i40e_dbg_exit();
16746 }
16747 module_exit(i40e_exit_module);