1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
4 #include <generated/utsrelease.h>
5 #include <linux/crash_dump.h>
6 #include <linux/if_bridge.h>
7 #include <linux/if_macvlan.h>
8 #include <linux/module.h>
9 #include <net/pkt_cls.h>
10 #include <net/xdp_sock_drv.h>
14 #include "i40e_devids.h"
15 #include "i40e_diag.h"
16 #include "i40e_lan_hmc.h"
17 #include "i40e_virtchnl_pf.h"
20 /* All i40e tracepoints are defined by the include below, which
21 * must be included exactly once across the whole kernel with
22 * CREATE_TRACE_POINTS defined
24 #define CREATE_TRACE_POINTS
25 #include "i40e_trace.h"
27 const char i40e_driver_name[] = "i40e";
28 static const char i40e_driver_string[] =
29 "Intel(R) Ethernet Connection XL710 Network Driver";
31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
33 /* a bit of forward declarations */
34 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
35 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
36 static int i40e_add_vsi(struct i40e_vsi *vsi);
37 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
38 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
39 static int i40e_setup_misc_vector(struct i40e_pf *pf);
40 static void i40e_determine_queue_usage(struct i40e_pf *pf);
41 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
42 static void i40e_prep_for_reset(struct i40e_pf *pf);
43 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
45 static int i40e_reset(struct i40e_pf *pf);
46 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
47 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
48 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
49 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
50 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
51 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
52 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
53 static int i40e_get_capabilities(struct i40e_pf *pf,
54 enum i40e_admin_queue_opc list_type);
55 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
57 /* i40e_pci_tbl - PCI Device ID Table
59 * Last entry must be all 0s
61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
62 * Class, Class Mask, private data (not used) }
64 static const struct pci_device_id i40e_pci_tbl[] = {
65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_BC), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
91 /* required last entry */
94 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
96 #define I40E_MAX_VF_COUNT 128
97 static int debug = -1;
98 module_param(debug, uint, 0);
99 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
101 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
102 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
103 MODULE_LICENSE("GPL v2");
105 static struct workqueue_struct *i40e_wq;
107 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
108 struct net_device *netdev, int delta)
110 struct netdev_hw_addr *ha;
115 netdev_for_each_mc_addr(ha, netdev) {
116 if (ether_addr_equal(ha->addr, f->macaddr)) {
117 ha->refcount += delta;
118 if (ha->refcount <= 0)
126 * i40e_hw_to_dev - get device pointer from the hardware structure
127 * @hw: pointer to the device HW structure
129 struct device *i40e_hw_to_dev(struct i40e_hw *hw)
131 struct i40e_pf *pf = i40e_hw_to_pf(hw);
133 return &pf->pdev->dev;
137 * i40e_allocate_dma_mem - OS specific memory alloc for shared code
138 * @hw: pointer to the HW structure
139 * @mem: ptr to mem struct to fill out
140 * @size: size of memory requested
141 * @alignment: what to align the allocation to
143 int i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,
144 u64 size, u32 alignment)
146 struct i40e_pf *pf = i40e_hw_to_pf(hw);
148 mem->size = ALIGN(size, alignment);
149 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
158 * i40e_free_dma_mem - OS specific memory free for shared code
159 * @hw: pointer to the HW structure
160 * @mem: ptr to mem struct to free
162 int i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)
164 struct i40e_pf *pf = i40e_hw_to_pf(hw);
166 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
175 * i40e_allocate_virt_mem - OS specific memory alloc for shared code
176 * @hw: pointer to the HW structure
177 * @mem: ptr to mem struct to fill out
178 * @size: size of memory requested
180 int i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem,
184 mem->va = kzalloc(size, GFP_KERNEL);
193 * i40e_free_virt_mem - OS specific memory free for shared code
194 * @hw: pointer to the HW structure
195 * @mem: ptr to mem struct to free
197 int i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)
199 /* it's ok to kfree a NULL pointer */
208 * i40e_get_lump - find a lump of free generic resource
209 * @pf: board private structure
210 * @pile: the pile of resource to search
211 * @needed: the number of items needed
212 * @id: an owner id to stick on the items assigned
214 * Returns the base item index of the lump, or negative for error
216 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
222 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
223 dev_info(&pf->pdev->dev,
224 "param err: pile=%s needed=%d id=0x%04x\n",
225 pile ? "<valid>" : "<null>", needed, id);
229 /* Allocate last queue in the pile for FDIR VSI queue
230 * so it doesn't fragment the qp_pile
232 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
233 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
234 dev_err(&pf->pdev->dev,
235 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
236 pile->num_entries - 1);
239 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
240 return pile->num_entries - 1;
244 while (i < pile->num_entries) {
245 /* skip already allocated entries */
246 if (pile->list[i] & I40E_PILE_VALID_BIT) {
251 /* do we have enough in this lump? */
252 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
253 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
258 /* there was enough, so assign it to the requestor */
259 for (j = 0; j < needed; j++)
260 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
265 /* not enough, so skip over it and continue looking */
273 * i40e_put_lump - return a lump of generic resource
274 * @pile: the pile of resource to search
275 * @index: the base item index
276 * @id: the owner id of the items assigned
278 * Returns the count of items in the lump
280 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
282 int valid_id = (id | I40E_PILE_VALID_BIT);
286 if (!pile || index >= pile->num_entries)
290 i < pile->num_entries && pile->list[i] == valid_id;
301 * i40e_find_vsi_from_id - searches for the vsi with the given id
302 * @pf: the pf structure to search for the vsi
303 * @id: id of the vsi it is searching for
305 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
309 for (i = 0; i < pf->num_alloc_vsi; i++)
310 if (pf->vsi[i] && (pf->vsi[i]->id == id))
317 * i40e_service_event_schedule - Schedule the service task to wake up
318 * @pf: board private structure
320 * If not already scheduled, this puts the task into the work queue
322 void i40e_service_event_schedule(struct i40e_pf *pf)
324 if ((!test_bit(__I40E_DOWN, pf->state) &&
325 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
326 test_bit(__I40E_RECOVERY_MODE, pf->state))
327 queue_work(i40e_wq, &pf->service_task);
331 * i40e_tx_timeout - Respond to a Tx Hang
332 * @netdev: network interface device structure
333 * @txqueue: queue number timing out
335 * If any port has noticed a Tx timeout, it is likely that the whole
336 * device is munged, not just the one netdev port, so go for the full
339 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
341 struct i40e_netdev_priv *np = netdev_priv(netdev);
342 struct i40e_vsi *vsi = np->vsi;
343 struct i40e_pf *pf = vsi->back;
344 struct i40e_ring *tx_ring = NULL;
348 pf->tx_timeout_count++;
350 /* with txqueue index, find the tx_ring struct */
351 for (i = 0; i < vsi->num_queue_pairs; i++) {
352 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
354 vsi->tx_rings[i]->queue_index) {
355 tx_ring = vsi->tx_rings[i];
361 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
362 pf->tx_timeout_recovery_level = 1; /* reset after some time */
363 else if (time_before(jiffies,
364 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
365 return; /* don't do any new action before the next timeout */
367 /* don't kick off another recovery if one is already pending */
368 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
372 head = i40e_get_head(tx_ring);
373 /* Read interrupt register */
374 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
376 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
377 tx_ring->vsi->base_vector - 1));
379 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
381 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
382 vsi->seid, txqueue, tx_ring->next_to_clean,
383 head, tx_ring->next_to_use,
384 readl(tx_ring->tail), val);
387 pf->tx_timeout_last_recovery = jiffies;
388 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
389 pf->tx_timeout_recovery_level, txqueue);
391 switch (pf->tx_timeout_recovery_level) {
393 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
396 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
399 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
402 netdev_err(netdev, "tx_timeout recovery unsuccessful, device is in non-recoverable state.\n");
403 set_bit(__I40E_DOWN_REQUESTED, pf->state);
404 set_bit(__I40E_VSI_DOWN_REQUESTED, vsi->state);
408 i40e_service_event_schedule(pf);
409 pf->tx_timeout_recovery_level++;
413 * i40e_get_vsi_stats_struct - Get System Network Statistics
414 * @vsi: the VSI we care about
416 * Returns the address of the device statistics structure.
417 * The statistics are actually updated from the service task.
419 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
421 return &vsi->net_stats;
425 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
426 * @ring: Tx ring to get statistics from
427 * @stats: statistics entry to be updated
429 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
430 struct rtnl_link_stats64 *stats)
436 start = u64_stats_fetch_begin(&ring->syncp);
437 packets = ring->stats.packets;
438 bytes = ring->stats.bytes;
439 } while (u64_stats_fetch_retry(&ring->syncp, start));
441 stats->tx_packets += packets;
442 stats->tx_bytes += bytes;
446 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
447 * @netdev: network interface device structure
448 * @stats: data structure to store statistics
450 * Returns the address of the device statistics structure.
451 * The statistics are actually updated from the service task.
453 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
454 struct rtnl_link_stats64 *stats)
456 struct i40e_netdev_priv *np = netdev_priv(netdev);
457 struct i40e_vsi *vsi = np->vsi;
458 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
459 struct i40e_ring *ring;
462 if (test_bit(__I40E_VSI_DOWN, vsi->state))
469 for (i = 0; i < vsi->num_queue_pairs; i++) {
473 ring = READ_ONCE(vsi->tx_rings[i]);
476 i40e_get_netdev_stats_struct_tx(ring, stats);
478 if (i40e_enabled_xdp_vsi(vsi)) {
479 ring = READ_ONCE(vsi->xdp_rings[i]);
482 i40e_get_netdev_stats_struct_tx(ring, stats);
485 ring = READ_ONCE(vsi->rx_rings[i]);
489 start = u64_stats_fetch_begin(&ring->syncp);
490 packets = ring->stats.packets;
491 bytes = ring->stats.bytes;
492 } while (u64_stats_fetch_retry(&ring->syncp, start));
494 stats->rx_packets += packets;
495 stats->rx_bytes += bytes;
500 /* following stats updated by i40e_watchdog_subtask() */
501 stats->multicast = vsi_stats->multicast;
502 stats->tx_errors = vsi_stats->tx_errors;
503 stats->tx_dropped = vsi_stats->tx_dropped;
504 stats->rx_errors = vsi_stats->rx_errors;
505 stats->rx_dropped = vsi_stats->rx_dropped;
506 stats->rx_missed_errors = vsi_stats->rx_missed_errors;
507 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
508 stats->rx_length_errors = vsi_stats->rx_length_errors;
512 * i40e_vsi_reset_stats - Resets all stats of the given vsi
513 * @vsi: the VSI to have its stats reset
515 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
517 struct rtnl_link_stats64 *ns;
523 ns = i40e_get_vsi_stats_struct(vsi);
524 memset(ns, 0, sizeof(*ns));
525 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
526 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
527 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
528 if (vsi->rx_rings && vsi->rx_rings[0]) {
529 for (i = 0; i < vsi->num_queue_pairs; i++) {
530 memset(&vsi->rx_rings[i]->stats, 0,
531 sizeof(vsi->rx_rings[i]->stats));
532 memset(&vsi->rx_rings[i]->rx_stats, 0,
533 sizeof(vsi->rx_rings[i]->rx_stats));
534 memset(&vsi->tx_rings[i]->stats, 0,
535 sizeof(vsi->tx_rings[i]->stats));
536 memset(&vsi->tx_rings[i]->tx_stats, 0,
537 sizeof(vsi->tx_rings[i]->tx_stats));
540 vsi->stat_offsets_loaded = false;
544 * i40e_pf_reset_stats - Reset all of the stats for the given PF
545 * @pf: the PF to be reset
547 void i40e_pf_reset_stats(struct i40e_pf *pf)
551 memset(&pf->stats, 0, sizeof(pf->stats));
552 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
553 pf->stat_offsets_loaded = false;
555 for (i = 0; i < I40E_MAX_VEB; i++) {
557 memset(&pf->veb[i]->stats, 0,
558 sizeof(pf->veb[i]->stats));
559 memset(&pf->veb[i]->stats_offsets, 0,
560 sizeof(pf->veb[i]->stats_offsets));
561 memset(&pf->veb[i]->tc_stats, 0,
562 sizeof(pf->veb[i]->tc_stats));
563 memset(&pf->veb[i]->tc_stats_offsets, 0,
564 sizeof(pf->veb[i]->tc_stats_offsets));
565 pf->veb[i]->stat_offsets_loaded = false;
568 pf->hw_csum_rx_error = 0;
572 * i40e_compute_pci_to_hw_id - compute index form PCI function.
573 * @vsi: ptr to the VSI to read from.
574 * @hw: ptr to the hardware info.
576 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
578 int pf_count = i40e_get_pf_count(hw);
580 if (vsi->type == I40E_VSI_SRIOV)
581 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
583 return hw->port + BIT(7);
587 * i40e_stat_update64 - read and update a 64 bit stat from the chip.
588 * @hw: ptr to the hardware info.
589 * @hireg: the high 32 bit reg to read.
590 * @loreg: the low 32 bit reg to read.
591 * @offset_loaded: has the initial offset been loaded yet.
592 * @offset: ptr to current offset value.
593 * @stat: ptr to the stat.
595 * Since the device stats are not reset at PFReset, they will not
596 * be zeroed when the driver starts. We'll save the first values read
597 * and use them as offsets to be subtracted from the raw values in order
598 * to report stats that count from zero.
600 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
601 bool offset_loaded, u64 *offset, u64 *stat)
605 new_data = rd64(hw, loreg);
607 if (!offset_loaded || new_data < *offset)
609 *stat = new_data - *offset;
613 * i40e_stat_update48 - read and update a 48 bit stat from the chip
614 * @hw: ptr to the hardware info
615 * @hireg: the high 32 bit reg to read
616 * @loreg: the low 32 bit reg to read
617 * @offset_loaded: has the initial offset been loaded yet
618 * @offset: ptr to current offset value
619 * @stat: ptr to the stat
621 * Since the device stats are not reset at PFReset, they likely will not
622 * be zeroed when the driver starts. We'll save the first values read
623 * and use them as offsets to be subtracted from the raw values in order
624 * to report stats that count from zero. In the process, we also manage
625 * the potential roll-over.
627 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
628 bool offset_loaded, u64 *offset, u64 *stat)
632 if (hw->device_id == I40E_DEV_ID_QEMU) {
633 new_data = rd32(hw, loreg);
634 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
636 new_data = rd64(hw, loreg);
640 if (likely(new_data >= *offset))
641 *stat = new_data - *offset;
643 *stat = (new_data + BIT_ULL(48)) - *offset;
644 *stat &= 0xFFFFFFFFFFFFULL;
648 * i40e_stat_update32 - read and update a 32 bit stat from the chip
649 * @hw: ptr to the hardware info
650 * @reg: the hw reg to read
651 * @offset_loaded: has the initial offset been loaded yet
652 * @offset: ptr to current offset value
653 * @stat: ptr to the stat
655 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
656 bool offset_loaded, u64 *offset, u64 *stat)
660 new_data = rd32(hw, reg);
663 if (likely(new_data >= *offset))
664 *stat = (u32)(new_data - *offset);
666 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
670 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
671 * @hw: ptr to the hardware info
672 * @reg: the hw reg to read and clear
673 * @stat: ptr to the stat
675 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
677 u32 new_data = rd32(hw, reg);
679 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
684 * i40e_stats_update_rx_discards - update rx_discards.
685 * @vsi: ptr to the VSI to be updated.
686 * @hw: ptr to the hardware info.
687 * @stat_idx: VSI's stat_counter_idx.
688 * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
689 * @stat_offset: ptr to stat_offset to store first read of specific register.
690 * @stat: ptr to VSI's stat to be updated.
693 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
694 int stat_idx, bool offset_loaded,
695 struct i40e_eth_stats *stat_offset,
696 struct i40e_eth_stats *stat)
698 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
699 &stat_offset->rx_discards, &stat->rx_discards);
700 i40e_stat_update64(hw,
701 I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
702 I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
703 offset_loaded, &stat_offset->rx_discards_other,
704 &stat->rx_discards_other);
708 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
709 * @vsi: the VSI to be updated
711 void i40e_update_eth_stats(struct i40e_vsi *vsi)
713 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
714 struct i40e_pf *pf = vsi->back;
715 struct i40e_hw *hw = &pf->hw;
716 struct i40e_eth_stats *oes;
717 struct i40e_eth_stats *es; /* device's eth stats */
719 es = &vsi->eth_stats;
720 oes = &vsi->eth_stats_offsets;
722 /* Gather up the stats that the hw collects */
723 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
724 vsi->stat_offsets_loaded,
725 &oes->tx_errors, &es->tx_errors);
726 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
727 vsi->stat_offsets_loaded,
728 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
730 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
731 I40E_GLV_GORCL(stat_idx),
732 vsi->stat_offsets_loaded,
733 &oes->rx_bytes, &es->rx_bytes);
734 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
735 I40E_GLV_UPRCL(stat_idx),
736 vsi->stat_offsets_loaded,
737 &oes->rx_unicast, &es->rx_unicast);
738 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
739 I40E_GLV_MPRCL(stat_idx),
740 vsi->stat_offsets_loaded,
741 &oes->rx_multicast, &es->rx_multicast);
742 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
743 I40E_GLV_BPRCL(stat_idx),
744 vsi->stat_offsets_loaded,
745 &oes->rx_broadcast, &es->rx_broadcast);
747 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
748 I40E_GLV_GOTCL(stat_idx),
749 vsi->stat_offsets_loaded,
750 &oes->tx_bytes, &es->tx_bytes);
751 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
752 I40E_GLV_UPTCL(stat_idx),
753 vsi->stat_offsets_loaded,
754 &oes->tx_unicast, &es->tx_unicast);
755 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
756 I40E_GLV_MPTCL(stat_idx),
757 vsi->stat_offsets_loaded,
758 &oes->tx_multicast, &es->tx_multicast);
759 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
760 I40E_GLV_BPTCL(stat_idx),
761 vsi->stat_offsets_loaded,
762 &oes->tx_broadcast, &es->tx_broadcast);
764 i40e_stats_update_rx_discards(vsi, hw, stat_idx,
765 vsi->stat_offsets_loaded, oes, es);
767 vsi->stat_offsets_loaded = true;
771 * i40e_update_veb_stats - Update Switch component statistics
772 * @veb: the VEB being updated
774 void i40e_update_veb_stats(struct i40e_veb *veb)
776 struct i40e_pf *pf = veb->pf;
777 struct i40e_hw *hw = &pf->hw;
778 struct i40e_eth_stats *oes;
779 struct i40e_eth_stats *es; /* device's eth stats */
780 struct i40e_veb_tc_stats *veb_oes;
781 struct i40e_veb_tc_stats *veb_es;
784 idx = veb->stats_idx;
786 oes = &veb->stats_offsets;
787 veb_es = &veb->tc_stats;
788 veb_oes = &veb->tc_stats_offsets;
790 /* Gather up the stats that the hw collects */
791 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
792 veb->stat_offsets_loaded,
793 &oes->tx_discards, &es->tx_discards);
794 if (hw->revision_id > 0)
795 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
796 veb->stat_offsets_loaded,
797 &oes->rx_unknown_protocol,
798 &es->rx_unknown_protocol);
799 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
800 veb->stat_offsets_loaded,
801 &oes->rx_bytes, &es->rx_bytes);
802 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
803 veb->stat_offsets_loaded,
804 &oes->rx_unicast, &es->rx_unicast);
805 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
806 veb->stat_offsets_loaded,
807 &oes->rx_multicast, &es->rx_multicast);
808 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
809 veb->stat_offsets_loaded,
810 &oes->rx_broadcast, &es->rx_broadcast);
812 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
813 veb->stat_offsets_loaded,
814 &oes->tx_bytes, &es->tx_bytes);
815 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
816 veb->stat_offsets_loaded,
817 &oes->tx_unicast, &es->tx_unicast);
818 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
819 veb->stat_offsets_loaded,
820 &oes->tx_multicast, &es->tx_multicast);
821 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
822 veb->stat_offsets_loaded,
823 &oes->tx_broadcast, &es->tx_broadcast);
824 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
825 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
826 I40E_GLVEBTC_RPCL(i, idx),
827 veb->stat_offsets_loaded,
828 &veb_oes->tc_rx_packets[i],
829 &veb_es->tc_rx_packets[i]);
830 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
831 I40E_GLVEBTC_RBCL(i, idx),
832 veb->stat_offsets_loaded,
833 &veb_oes->tc_rx_bytes[i],
834 &veb_es->tc_rx_bytes[i]);
835 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
836 I40E_GLVEBTC_TPCL(i, idx),
837 veb->stat_offsets_loaded,
838 &veb_oes->tc_tx_packets[i],
839 &veb_es->tc_tx_packets[i]);
840 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
841 I40E_GLVEBTC_TBCL(i, idx),
842 veb->stat_offsets_loaded,
843 &veb_oes->tc_tx_bytes[i],
844 &veb_es->tc_tx_bytes[i]);
846 veb->stat_offsets_loaded = true;
850 * i40e_update_vsi_stats - Update the vsi statistics counters.
851 * @vsi: the VSI to be updated
853 * There are a few instances where we store the same stat in a
854 * couple of different structs. This is partly because we have
855 * the netdev stats that need to be filled out, which is slightly
856 * different from the "eth_stats" defined by the chip and used in
857 * VF communications. We sort it out here.
859 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
861 u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
862 struct i40e_pf *pf = vsi->back;
863 struct rtnl_link_stats64 *ons;
864 struct rtnl_link_stats64 *ns; /* netdev stats */
865 struct i40e_eth_stats *oes;
866 struct i40e_eth_stats *es; /* device's eth stats */
867 u64 tx_restart, tx_busy;
878 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
879 test_bit(__I40E_CONFIG_BUSY, pf->state))
882 ns = i40e_get_vsi_stats_struct(vsi);
883 ons = &vsi->net_stats_offsets;
884 es = &vsi->eth_stats;
885 oes = &vsi->eth_stats_offsets;
887 /* Gather up the netdev and vsi stats that the driver collects
888 * on the fly during packet processing
892 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
901 for (q = 0; q < vsi->num_queue_pairs; q++) {
903 p = READ_ONCE(vsi->tx_rings[q]);
908 start = u64_stats_fetch_begin(&p->syncp);
909 packets = p->stats.packets;
910 bytes = p->stats.bytes;
911 } while (u64_stats_fetch_retry(&p->syncp, start));
914 tx_restart += p->tx_stats.restart_queue;
915 tx_busy += p->tx_stats.tx_busy;
916 tx_linearize += p->tx_stats.tx_linearize;
917 tx_force_wb += p->tx_stats.tx_force_wb;
918 tx_stopped += p->tx_stats.tx_stopped;
921 p = READ_ONCE(vsi->rx_rings[q]);
926 start = u64_stats_fetch_begin(&p->syncp);
927 packets = p->stats.packets;
928 bytes = p->stats.bytes;
929 } while (u64_stats_fetch_retry(&p->syncp, start));
932 rx_buf += p->rx_stats.alloc_buff_failed;
933 rx_page += p->rx_stats.alloc_page_failed;
934 rx_reuse += p->rx_stats.page_reuse_count;
935 rx_alloc += p->rx_stats.page_alloc_count;
936 rx_waive += p->rx_stats.page_waive_count;
937 rx_busy += p->rx_stats.page_busy_count;
939 if (i40e_enabled_xdp_vsi(vsi)) {
940 /* locate XDP ring */
941 p = READ_ONCE(vsi->xdp_rings[q]);
946 start = u64_stats_fetch_begin(&p->syncp);
947 packets = p->stats.packets;
948 bytes = p->stats.bytes;
949 } while (u64_stats_fetch_retry(&p->syncp, start));
952 tx_restart += p->tx_stats.restart_queue;
953 tx_busy += p->tx_stats.tx_busy;
954 tx_linearize += p->tx_stats.tx_linearize;
955 tx_force_wb += p->tx_stats.tx_force_wb;
959 vsi->tx_restart = tx_restart;
960 vsi->tx_busy = tx_busy;
961 vsi->tx_linearize = tx_linearize;
962 vsi->tx_force_wb = tx_force_wb;
963 vsi->tx_stopped = tx_stopped;
964 vsi->rx_page_failed = rx_page;
965 vsi->rx_buf_failed = rx_buf;
966 vsi->rx_page_reuse = rx_reuse;
967 vsi->rx_page_alloc = rx_alloc;
968 vsi->rx_page_waive = rx_waive;
969 vsi->rx_page_busy = rx_busy;
971 ns->rx_packets = rx_p;
973 ns->tx_packets = tx_p;
976 /* update netdev stats from eth stats */
977 i40e_update_eth_stats(vsi);
978 ons->tx_errors = oes->tx_errors;
979 ns->tx_errors = es->tx_errors;
980 ons->multicast = oes->rx_multicast;
981 ns->multicast = es->rx_multicast;
982 ons->rx_dropped = oes->rx_discards_other;
983 ns->rx_dropped = es->rx_discards_other;
984 ons->rx_missed_errors = oes->rx_discards;
985 ns->rx_missed_errors = es->rx_discards;
986 ons->tx_dropped = oes->tx_discards;
987 ns->tx_dropped = es->tx_discards;
989 /* pull in a couple PF stats if this is the main vsi */
990 if (vsi == pf->vsi[pf->lan_vsi]) {
991 ns->rx_crc_errors = pf->stats.crc_errors;
992 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
993 ns->rx_length_errors = pf->stats.rx_length_errors;
998 * i40e_update_pf_stats - Update the PF statistics counters.
999 * @pf: the PF to be updated
1001 static void i40e_update_pf_stats(struct i40e_pf *pf)
1003 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
1004 struct i40e_hw_port_stats *nsd = &pf->stats;
1005 struct i40e_hw *hw = &pf->hw;
1009 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
1010 I40E_GLPRT_GORCL(hw->port),
1011 pf->stat_offsets_loaded,
1012 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1013 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1014 I40E_GLPRT_GOTCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1017 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->eth.rx_discards,
1020 &nsd->eth.rx_discards);
1021 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1022 I40E_GLPRT_UPRCL(hw->port),
1023 pf->stat_offsets_loaded,
1024 &osd->eth.rx_unicast,
1025 &nsd->eth.rx_unicast);
1026 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1027 I40E_GLPRT_MPRCL(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->eth.rx_multicast,
1030 &nsd->eth.rx_multicast);
1031 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1032 I40E_GLPRT_BPRCL(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->eth.rx_broadcast,
1035 &nsd->eth.rx_broadcast);
1036 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1037 I40E_GLPRT_UPTCL(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->eth.tx_unicast,
1040 &nsd->eth.tx_unicast);
1041 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1042 I40E_GLPRT_MPTCL(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->eth.tx_multicast,
1045 &nsd->eth.tx_multicast);
1046 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1047 I40E_GLPRT_BPTCL(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->eth.tx_broadcast,
1050 &nsd->eth.tx_broadcast);
1052 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->tx_dropped_link_down,
1055 &nsd->tx_dropped_link_down);
1057 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->crc_errors, &nsd->crc_errors);
1061 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->illegal_bytes, &nsd->illegal_bytes);
1065 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->mac_local_faults,
1068 &nsd->mac_local_faults);
1069 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->mac_remote_faults,
1072 &nsd->mac_remote_faults);
1074 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_length_errors,
1077 &nsd->rx_length_errors);
1079 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->link_xon_rx, &nsd->link_xon_rx);
1082 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->link_xon_tx, &nsd->link_xon_tx);
1085 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1088 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1092 for (i = 0; i < 8; i++) {
1093 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1094 pf->stat_offsets_loaded,
1095 &osd->priority_xoff_rx[i],
1096 &nsd->priority_xoff_rx[i]);
1097 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1098 pf->stat_offsets_loaded,
1099 &osd->priority_xon_rx[i],
1100 &nsd->priority_xon_rx[i]);
1101 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1102 pf->stat_offsets_loaded,
1103 &osd->priority_xon_tx[i],
1104 &nsd->priority_xon_tx[i]);
1105 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1106 pf->stat_offsets_loaded,
1107 &osd->priority_xoff_tx[i],
1108 &nsd->priority_xoff_tx[i]);
1109 i40e_stat_update32(hw,
1110 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1111 pf->stat_offsets_loaded,
1112 &osd->priority_xon_2_xoff[i],
1113 &nsd->priority_xon_2_xoff[i]);
1116 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1117 I40E_GLPRT_PRC64L(hw->port),
1118 pf->stat_offsets_loaded,
1119 &osd->rx_size_64, &nsd->rx_size_64);
1120 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1121 I40E_GLPRT_PRC127L(hw->port),
1122 pf->stat_offsets_loaded,
1123 &osd->rx_size_127, &nsd->rx_size_127);
1124 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1125 I40E_GLPRT_PRC255L(hw->port),
1126 pf->stat_offsets_loaded,
1127 &osd->rx_size_255, &nsd->rx_size_255);
1128 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1129 I40E_GLPRT_PRC511L(hw->port),
1130 pf->stat_offsets_loaded,
1131 &osd->rx_size_511, &nsd->rx_size_511);
1132 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1133 I40E_GLPRT_PRC1023L(hw->port),
1134 pf->stat_offsets_loaded,
1135 &osd->rx_size_1023, &nsd->rx_size_1023);
1136 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1137 I40E_GLPRT_PRC1522L(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_size_1522, &nsd->rx_size_1522);
1140 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1141 I40E_GLPRT_PRC9522L(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->rx_size_big, &nsd->rx_size_big);
1145 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1146 I40E_GLPRT_PTC64L(hw->port),
1147 pf->stat_offsets_loaded,
1148 &osd->tx_size_64, &nsd->tx_size_64);
1149 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1150 I40E_GLPRT_PTC127L(hw->port),
1151 pf->stat_offsets_loaded,
1152 &osd->tx_size_127, &nsd->tx_size_127);
1153 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1154 I40E_GLPRT_PTC255L(hw->port),
1155 pf->stat_offsets_loaded,
1156 &osd->tx_size_255, &nsd->tx_size_255);
1157 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1158 I40E_GLPRT_PTC511L(hw->port),
1159 pf->stat_offsets_loaded,
1160 &osd->tx_size_511, &nsd->tx_size_511);
1161 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1162 I40E_GLPRT_PTC1023L(hw->port),
1163 pf->stat_offsets_loaded,
1164 &osd->tx_size_1023, &nsd->tx_size_1023);
1165 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1166 I40E_GLPRT_PTC1522L(hw->port),
1167 pf->stat_offsets_loaded,
1168 &osd->tx_size_1522, &nsd->tx_size_1522);
1169 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1170 I40E_GLPRT_PTC9522L(hw->port),
1171 pf->stat_offsets_loaded,
1172 &osd->tx_size_big, &nsd->tx_size_big);
1174 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1175 pf->stat_offsets_loaded,
1176 &osd->rx_undersize, &nsd->rx_undersize);
1177 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1178 pf->stat_offsets_loaded,
1179 &osd->rx_fragments, &nsd->rx_fragments);
1180 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1181 pf->stat_offsets_loaded,
1182 &osd->rx_oversize, &nsd->rx_oversize);
1183 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1184 pf->stat_offsets_loaded,
1185 &osd->rx_jabber, &nsd->rx_jabber);
1188 i40e_stat_update_and_clear32(hw,
1189 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1190 &nsd->fd_atr_match);
1191 i40e_stat_update_and_clear32(hw,
1192 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1194 i40e_stat_update_and_clear32(hw,
1195 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1196 &nsd->fd_atr_tunnel_match);
1198 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1199 nsd->tx_lpi_status =
1200 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1201 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1202 nsd->rx_lpi_status =
1203 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1204 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1205 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1206 pf->stat_offsets_loaded,
1207 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1208 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1209 pf->stat_offsets_loaded,
1210 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1212 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1213 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1214 nsd->fd_sb_status = true;
1216 nsd->fd_sb_status = false;
1218 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1219 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1220 nsd->fd_atr_status = true;
1222 nsd->fd_atr_status = false;
1224 pf->stat_offsets_loaded = true;
1228 * i40e_update_stats - Update the various statistics counters.
1229 * @vsi: the VSI to be updated
1231 * Update the various stats for this VSI and its related entities.
1233 void i40e_update_stats(struct i40e_vsi *vsi)
1235 struct i40e_pf *pf = vsi->back;
1237 if (vsi == pf->vsi[pf->lan_vsi])
1238 i40e_update_pf_stats(pf);
1240 i40e_update_vsi_stats(vsi);
1244 * i40e_count_filters - counts VSI mac filters
1245 * @vsi: the VSI to be searched
1247 * Returns count of mac filters
1249 int i40e_count_filters(struct i40e_vsi *vsi)
1251 struct i40e_mac_filter *f;
1252 struct hlist_node *h;
1256 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1263 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1264 * @vsi: the VSI to be searched
1265 * @macaddr: the MAC address
1268 * Returns ptr to the filter object or NULL
1270 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1271 const u8 *macaddr, s16 vlan)
1273 struct i40e_mac_filter *f;
1276 if (!vsi || !macaddr)
1279 key = i40e_addr_to_hkey(macaddr);
1280 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1281 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1289 * i40e_find_mac - Find a mac addr in the macvlan filters list
1290 * @vsi: the VSI to be searched
1291 * @macaddr: the MAC address we are searching for
1293 * Returns the first filter with the provided MAC address or NULL if
1294 * MAC address was not found
1296 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1298 struct i40e_mac_filter *f;
1301 if (!vsi || !macaddr)
1304 key = i40e_addr_to_hkey(macaddr);
1305 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1306 if ((ether_addr_equal(macaddr, f->macaddr)))
1313 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1314 * @vsi: the VSI to be searched
1316 * Returns true if VSI is in vlan mode or false otherwise
1318 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1320 /* If we have a PVID, always operate in VLAN mode */
1324 /* We need to operate in VLAN mode whenever we have any filters with
1325 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1326 * time, incurring search cost repeatedly. However, we can notice two
1329 * 1) the only place where we can gain a VLAN filter is in
1332 * 2) the only place where filters are actually removed is in
1333 * i40e_sync_filters_subtask.
1335 * Thus, we can simply use a boolean value, has_vlan_filters which we
1336 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1337 * we have to perform the full search after deleting filters in
1338 * i40e_sync_filters_subtask, but we already have to search
1339 * filters here and can perform the check at the same time. This
1340 * results in avoiding embedding a loop for VLAN mode inside another
1341 * loop over all the filters, and should maintain correctness as noted
1344 return vsi->has_vlan_filter;
1348 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1349 * @vsi: the VSI to configure
1350 * @tmp_add_list: list of filters ready to be added
1351 * @tmp_del_list: list of filters ready to be deleted
1352 * @vlan_filters: the number of active VLAN filters
1354 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1355 * behave as expected. If we have any active VLAN filters remaining or about
1356 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1357 * so that they only match against untagged traffic. If we no longer have any
1358 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1359 * so that they match against both tagged and untagged traffic. In this way,
1360 * we ensure that we correctly receive the desired traffic. This ensures that
1361 * when we have an active VLAN we will receive only untagged traffic and
1362 * traffic matching active VLANs. If we have no active VLANs then we will
1363 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1365 * Finally, in a similar fashion, this function also corrects filters when
1366 * there is an active PVID assigned to this VSI.
1368 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1370 * This function is only expected to be called from within
1371 * i40e_sync_vsi_filters.
1373 * NOTE: This function expects to be called while under the
1374 * mac_filter_hash_lock
1376 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1377 struct hlist_head *tmp_add_list,
1378 struct hlist_head *tmp_del_list,
1381 s16 pvid = le16_to_cpu(vsi->info.pvid);
1382 struct i40e_mac_filter *f, *add_head;
1383 struct i40e_new_mac_filter *new;
1384 struct hlist_node *h;
1387 /* To determine if a particular filter needs to be replaced we
1388 * have the three following conditions:
1390 * a) if we have a PVID assigned, then all filters which are
1391 * not marked as VLAN=PVID must be replaced with filters that
1393 * b) otherwise, if we have any active VLANS, all filters
1394 * which are marked as VLAN=-1 must be replaced with
1395 * filters marked as VLAN=0
1396 * c) finally, if we do not have any active VLANS, all filters
1397 * which are marked as VLAN=0 must be replaced with filters
1401 /* Update the filters about to be added in place */
1402 hlist_for_each_entry(new, tmp_add_list, hlist) {
1403 if (pvid && new->f->vlan != pvid)
1404 new->f->vlan = pvid;
1405 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1407 else if (!vlan_filters && new->f->vlan == 0)
1408 new->f->vlan = I40E_VLAN_ANY;
1411 /* Update the remaining active filters */
1412 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1413 /* Combine the checks for whether a filter needs to be changed
1414 * and then determine the new VLAN inside the if block, in
1415 * order to avoid duplicating code for adding the new filter
1416 * then deleting the old filter.
1418 if ((pvid && f->vlan != pvid) ||
1419 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1420 (!vlan_filters && f->vlan == 0)) {
1421 /* Determine the new vlan we will be adding */
1424 else if (vlan_filters)
1427 new_vlan = I40E_VLAN_ANY;
1429 /* Create the new filter */
1430 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1434 /* Create a temporary i40e_new_mac_filter */
1435 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1440 new->state = add_head->state;
1442 /* Add the new filter to the tmp list */
1443 hlist_add_head(&new->hlist, tmp_add_list);
1445 /* Put the original filter into the delete list */
1446 f->state = I40E_FILTER_REMOVE;
1447 hash_del(&f->hlist);
1448 hlist_add_head(&f->hlist, tmp_del_list);
1452 vsi->has_vlan_filter = !!vlan_filters;
1458 * i40e_get_vf_new_vlan - Get new vlan id on a vf
1459 * @vsi: the vsi to configure
1460 * @new_mac: new mac filter to be added
1461 * @f: existing mac filter, replaced with new_mac->f if new_mac is not NULL
1462 * @vlan_filters: the number of active VLAN filters
1463 * @trusted: flag if the VF is trusted
1465 * Get new VLAN id based on current VLAN filters, trust, PVID
1466 * and vf-vlan-prune-disable flag.
1468 * Returns the value of the new vlan filter or
1469 * the old value if no new filter is needed.
1471 static s16 i40e_get_vf_new_vlan(struct i40e_vsi *vsi,
1472 struct i40e_new_mac_filter *new_mac,
1473 struct i40e_mac_filter *f,
1477 s16 pvid = le16_to_cpu(vsi->info.pvid);
1478 struct i40e_pf *pf = vsi->back;
1484 if (pvid && f->vlan != pvid)
1487 is_any = (trusted ||
1488 !(pf->flags & I40E_FLAG_VF_VLAN_PRUNING));
1490 if ((vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1491 (!is_any && !vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1492 (is_any && !vlan_filters && f->vlan == 0)) {
1494 return I40E_VLAN_ANY;
1503 * i40e_correct_vf_mac_vlan_filters - Correct non-VLAN VF filters if necessary
1504 * @vsi: the vsi to configure
1505 * @tmp_add_list: list of filters ready to be added
1506 * @tmp_del_list: list of filters ready to be deleted
1507 * @vlan_filters: the number of active VLAN filters
1508 * @trusted: flag if the VF is trusted
1510 * Correct VF VLAN filters based on current VLAN filters, trust, PVID
1511 * and vf-vlan-prune-disable flag.
1513 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1515 * This function is only expected to be called from within
1516 * i40e_sync_vsi_filters.
1518 * NOTE: This function expects to be called while under the
1519 * mac_filter_hash_lock
1521 static int i40e_correct_vf_mac_vlan_filters(struct i40e_vsi *vsi,
1522 struct hlist_head *tmp_add_list,
1523 struct hlist_head *tmp_del_list,
1527 struct i40e_mac_filter *f, *add_head;
1528 struct i40e_new_mac_filter *new_mac;
1529 struct hlist_node *h;
1532 hlist_for_each_entry(new_mac, tmp_add_list, hlist) {
1533 new_mac->f->vlan = i40e_get_vf_new_vlan(vsi, new_mac, NULL,
1534 vlan_filters, trusted);
1537 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1538 new_vlan = i40e_get_vf_new_vlan(vsi, NULL, f, vlan_filters,
1540 if (new_vlan != f->vlan) {
1541 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1544 /* Create a temporary i40e_new_mac_filter */
1545 new_mac = kzalloc(sizeof(*new_mac), GFP_ATOMIC);
1548 new_mac->f = add_head;
1549 new_mac->state = add_head->state;
1551 /* Add the new filter to the tmp list */
1552 hlist_add_head(&new_mac->hlist, tmp_add_list);
1554 /* Put the original filter into the delete list */
1555 f->state = I40E_FILTER_REMOVE;
1556 hash_del(&f->hlist);
1557 hlist_add_head(&f->hlist, tmp_del_list);
1561 vsi->has_vlan_filter = !!vlan_filters;
1566 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1567 * @vsi: the PF Main VSI - inappropriate for any other VSI
1568 * @macaddr: the MAC address
1570 * Remove whatever filter the firmware set up so the driver can manage
1571 * its own filtering intelligently.
1573 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1575 struct i40e_aqc_remove_macvlan_element_data element;
1576 struct i40e_pf *pf = vsi->back;
1578 /* Only appropriate for the PF main VSI */
1579 if (vsi->type != I40E_VSI_MAIN)
1582 memset(&element, 0, sizeof(element));
1583 ether_addr_copy(element.mac_addr, macaddr);
1584 element.vlan_tag = 0;
1585 /* Ignore error returns, some firmware does it this way... */
1586 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1587 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1589 memset(&element, 0, sizeof(element));
1590 ether_addr_copy(element.mac_addr, macaddr);
1591 element.vlan_tag = 0;
1592 /* ...and some firmware does it this way. */
1593 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1594 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1595 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1599 * i40e_add_filter - Add a mac/vlan filter to the VSI
1600 * @vsi: the VSI to be searched
1601 * @macaddr: the MAC address
1604 * Returns ptr to the filter object or NULL when no memory available.
1606 * NOTE: This function is expected to be called with mac_filter_hash_lock
1609 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1610 const u8 *macaddr, s16 vlan)
1612 struct i40e_mac_filter *f;
1615 if (!vsi || !macaddr)
1618 f = i40e_find_filter(vsi, macaddr, vlan);
1620 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1624 /* Update the boolean indicating if we need to function in
1628 vsi->has_vlan_filter = true;
1630 ether_addr_copy(f->macaddr, macaddr);
1632 f->state = I40E_FILTER_NEW;
1633 INIT_HLIST_NODE(&f->hlist);
1635 key = i40e_addr_to_hkey(macaddr);
1636 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1638 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1639 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1642 /* If we're asked to add a filter that has been marked for removal, it
1643 * is safe to simply restore it to active state. __i40e_del_filter
1644 * will have simply deleted any filters which were previously marked
1645 * NEW or FAILED, so if it is currently marked REMOVE it must have
1646 * previously been ACTIVE. Since we haven't yet run the sync filters
1647 * task, just restore this filter to the ACTIVE state so that the
1648 * sync task leaves it in place
1650 if (f->state == I40E_FILTER_REMOVE)
1651 f->state = I40E_FILTER_ACTIVE;
1657 * __i40e_del_filter - Remove a specific filter from the VSI
1658 * @vsi: VSI to remove from
1659 * @f: the filter to remove from the list
1661 * This function should be called instead of i40e_del_filter only if you know
1662 * the exact filter you will remove already, such as via i40e_find_filter or
1665 * NOTE: This function is expected to be called with mac_filter_hash_lock
1667 * ANOTHER NOTE: This function MUST be called from within the context of
1668 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1669 * instead of list_for_each_entry().
1671 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1676 /* If the filter was never added to firmware then we can just delete it
1677 * directly and we don't want to set the status to remove or else an
1678 * admin queue command will unnecessarily fire.
1680 if ((f->state == I40E_FILTER_FAILED) ||
1681 (f->state == I40E_FILTER_NEW)) {
1682 hash_del(&f->hlist);
1685 f->state = I40E_FILTER_REMOVE;
1688 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1689 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1693 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1694 * @vsi: the VSI to be searched
1695 * @macaddr: the MAC address
1698 * NOTE: This function is expected to be called with mac_filter_hash_lock
1700 * ANOTHER NOTE: This function MUST be called from within the context of
1701 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1702 * instead of list_for_each_entry().
1704 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1706 struct i40e_mac_filter *f;
1708 if (!vsi || !macaddr)
1711 f = i40e_find_filter(vsi, macaddr, vlan);
1712 __i40e_del_filter(vsi, f);
1716 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1717 * @vsi: the VSI to be searched
1718 * @macaddr: the mac address to be filtered
1720 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1721 * go through all the macvlan filters and add a macvlan filter for each
1722 * unique vlan that already exists. If a PVID has been assigned, instead only
1723 * add the macaddr to that VLAN.
1725 * Returns last filter added on success, else NULL
1727 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1730 struct i40e_mac_filter *f, *add = NULL;
1731 struct hlist_node *h;
1735 return i40e_add_filter(vsi, macaddr,
1736 le16_to_cpu(vsi->info.pvid));
1738 if (!i40e_is_vsi_in_vlan(vsi))
1739 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1741 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1742 if (f->state == I40E_FILTER_REMOVE)
1744 add = i40e_add_filter(vsi, macaddr, f->vlan);
1753 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1754 * @vsi: the VSI to be searched
1755 * @macaddr: the mac address to be removed
1757 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1760 * Returns 0 for success, or error
1762 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1764 struct i40e_mac_filter *f;
1765 struct hlist_node *h;
1769 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1770 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1771 if (ether_addr_equal(macaddr, f->macaddr)) {
1772 __i40e_del_filter(vsi, f);
1784 * i40e_set_mac - NDO callback to set mac address
1785 * @netdev: network interface device structure
1786 * @p: pointer to an address structure
1788 * Returns 0 on success, negative on failure
1790 static int i40e_set_mac(struct net_device *netdev, void *p)
1792 struct i40e_netdev_priv *np = netdev_priv(netdev);
1793 struct i40e_vsi *vsi = np->vsi;
1794 struct i40e_pf *pf = vsi->back;
1795 struct i40e_hw *hw = &pf->hw;
1796 struct sockaddr *addr = p;
1798 if (!is_valid_ether_addr(addr->sa_data))
1799 return -EADDRNOTAVAIL;
1801 if (test_bit(__I40E_DOWN, pf->state) ||
1802 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1803 return -EADDRNOTAVAIL;
1805 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1806 netdev_info(netdev, "returning to hw mac address %pM\n",
1809 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1811 /* Copy the address first, so that we avoid a possible race with
1813 * - Remove old address from MAC filter
1814 * - Copy new address
1815 * - Add new address to MAC filter
1817 spin_lock_bh(&vsi->mac_filter_hash_lock);
1818 i40e_del_mac_filter(vsi, netdev->dev_addr);
1819 eth_hw_addr_set(netdev, addr->sa_data);
1820 i40e_add_mac_filter(vsi, netdev->dev_addr);
1821 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1823 if (vsi->type == I40E_VSI_MAIN) {
1826 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1827 addr->sa_data, NULL);
1829 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %pe, AQ ret %s\n",
1831 i40e_aq_str(hw, hw->aq.asq_last_status));
1834 /* schedule our worker thread which will take care of
1835 * applying the new filter changes
1837 i40e_service_event_schedule(pf);
1842 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1843 * @vsi: vsi structure
1844 * @seed: RSS hash seed
1845 * @lut: pointer to lookup table of lut_size
1846 * @lut_size: size of the lookup table
1848 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1849 u8 *lut, u16 lut_size)
1851 struct i40e_pf *pf = vsi->back;
1852 struct i40e_hw *hw = &pf->hw;
1856 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1857 (struct i40e_aqc_get_set_rss_key_data *)seed;
1858 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1860 dev_info(&pf->pdev->dev,
1861 "Cannot set RSS key, err %pe aq_err %s\n",
1863 i40e_aq_str(hw, hw->aq.asq_last_status));
1868 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1870 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1872 dev_info(&pf->pdev->dev,
1873 "Cannot set RSS lut, err %pe aq_err %s\n",
1875 i40e_aq_str(hw, hw->aq.asq_last_status));
1883 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1884 * @vsi: VSI structure
1886 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1888 struct i40e_pf *pf = vsi->back;
1889 u8 seed[I40E_HKEY_ARRAY_SIZE];
1893 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1896 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1897 vsi->num_queue_pairs);
1900 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1904 /* Use the user configured hash keys and lookup table if there is one,
1905 * otherwise use default
1907 if (vsi->rss_lut_user)
1908 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1910 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1911 if (vsi->rss_hkey_user)
1912 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1914 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1915 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1921 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1922 * @vsi: the VSI being configured,
1923 * @ctxt: VSI context structure
1924 * @enabled_tc: number of traffic classes to enable
1926 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1928 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1929 struct i40e_vsi_context *ctxt,
1932 u16 qcount = 0, max_qcount, qmap, sections = 0;
1933 int i, override_q, pow, num_qps, ret;
1934 u8 netdev_tc = 0, offset = 0;
1936 if (vsi->type != I40E_VSI_MAIN)
1938 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1939 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1940 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1941 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1942 num_qps = vsi->mqprio_qopt.qopt.count[0];
1944 /* find the next higher power-of-2 of num queue pairs */
1945 pow = ilog2(num_qps);
1946 if (!is_power_of_2(num_qps))
1948 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1949 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1951 /* Setup queue offset/count for all TCs for given VSI */
1952 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1953 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1954 /* See if the given TC is enabled for the given VSI */
1955 if (vsi->tc_config.enabled_tc & BIT(i)) {
1956 offset = vsi->mqprio_qopt.qopt.offset[i];
1957 qcount = vsi->mqprio_qopt.qopt.count[i];
1958 if (qcount > max_qcount)
1959 max_qcount = qcount;
1960 vsi->tc_config.tc_info[i].qoffset = offset;
1961 vsi->tc_config.tc_info[i].qcount = qcount;
1962 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1964 /* TC is not enabled so set the offset to
1965 * default queue and allocate one queue
1968 vsi->tc_config.tc_info[i].qoffset = 0;
1969 vsi->tc_config.tc_info[i].qcount = 1;
1970 vsi->tc_config.tc_info[i].netdev_tc = 0;
1974 /* Set actual Tx/Rx queue pairs */
1975 vsi->num_queue_pairs = offset + qcount;
1977 /* Setup queue TC[0].qmap for given VSI context */
1978 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1979 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1980 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1981 ctxt->info.valid_sections |= cpu_to_le16(sections);
1983 /* Reconfigure RSS for main VSI with max queue count */
1984 vsi->rss_size = max_qcount;
1985 ret = i40e_vsi_config_rss(vsi);
1987 dev_info(&vsi->back->pdev->dev,
1988 "Failed to reconfig rss for num_queues (%u)\n",
1992 vsi->reconfig_rss = true;
1993 dev_dbg(&vsi->back->pdev->dev,
1994 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1996 /* Find queue count available for channel VSIs and starting offset
1999 override_q = vsi->mqprio_qopt.qopt.count[0];
2000 if (override_q && override_q < vsi->num_queue_pairs) {
2001 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
2002 vsi->next_base_queue = override_q;
2008 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
2009 * @vsi: the VSI being setup
2010 * @ctxt: VSI context structure
2011 * @enabled_tc: Enabled TCs bitmap
2012 * @is_add: True if called before Add VSI
2014 * Setup VSI queue mapping for enabled traffic classes.
2016 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
2017 struct i40e_vsi_context *ctxt,
2021 struct i40e_pf *pf = vsi->back;
2031 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
2033 /* zero out queue mapping, it will get updated on the end of the function */
2034 memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
2036 if (vsi->type == I40E_VSI_MAIN) {
2037 /* This code helps add more queue to the VSI if we have
2038 * more cores than RSS can support, the higher cores will
2039 * be served by ATR or other filters. Furthermore, the
2040 * non-zero req_queue_pairs says that user requested a new
2041 * queue count via ethtool's set_channels, so use this
2042 * value for queues distribution across traffic classes
2043 * We need at least one queue pair for the interface
2044 * to be usable as we see in else statement.
2046 if (vsi->req_queue_pairs > 0)
2047 vsi->num_queue_pairs = vsi->req_queue_pairs;
2048 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2049 vsi->num_queue_pairs = pf->num_lan_msix;
2051 vsi->num_queue_pairs = 1;
2054 /* Number of queues per enabled TC */
2055 if (vsi->type == I40E_VSI_MAIN ||
2056 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
2057 num_tc_qps = vsi->num_queue_pairs;
2059 num_tc_qps = vsi->alloc_queue_pairs;
2061 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2062 /* Find numtc from enabled TC bitmap */
2063 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2064 if (enabled_tc & BIT(i)) /* TC is enabled */
2068 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
2071 num_tc_qps = num_tc_qps / numtc;
2072 num_tc_qps = min_t(int, num_tc_qps,
2073 i40e_pf_get_max_q_per_tc(pf));
2076 vsi->tc_config.numtc = numtc;
2077 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
2079 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
2080 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2081 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
2083 /* Setup queue offset/count for all TCs for given VSI */
2084 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
2085 /* See if the given TC is enabled for the given VSI */
2086 if (vsi->tc_config.enabled_tc & BIT(i)) {
2090 switch (vsi->type) {
2092 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
2093 I40E_FLAG_FD_ATR_ENABLED)) ||
2094 vsi->tc_config.enabled_tc != 1) {
2095 qcount = min_t(int, pf->alloc_rss_size,
2101 case I40E_VSI_SRIOV:
2102 case I40E_VSI_VMDQ2:
2104 qcount = num_tc_qps;
2108 vsi->tc_config.tc_info[i].qoffset = offset;
2109 vsi->tc_config.tc_info[i].qcount = qcount;
2111 /* find the next higher power-of-2 of num queue pairs */
2114 while (num_qps && (BIT_ULL(pow) < qcount)) {
2119 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2121 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2122 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2126 /* TC is not enabled so set the offset to
2127 * default queue and allocate one queue
2130 vsi->tc_config.tc_info[i].qoffset = 0;
2131 vsi->tc_config.tc_info[i].qcount = 1;
2132 vsi->tc_config.tc_info[i].netdev_tc = 0;
2136 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2138 /* Do not change previously set num_queue_pairs for PFs and VFs*/
2139 if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2140 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2141 (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2142 vsi->num_queue_pairs = offset;
2144 /* Scheduler section valid can only be set for ADD VSI */
2146 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2148 ctxt->info.up_enable_bits = enabled_tc;
2150 if (vsi->type == I40E_VSI_SRIOV) {
2151 ctxt->info.mapping_flags |=
2152 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2153 for (i = 0; i < vsi->num_queue_pairs; i++)
2154 ctxt->info.queue_mapping[i] =
2155 cpu_to_le16(vsi->base_queue + i);
2157 ctxt->info.mapping_flags |=
2158 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2159 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2161 ctxt->info.valid_sections |= cpu_to_le16(sections);
2165 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2166 * @netdev: the netdevice
2167 * @addr: address to add
2169 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2170 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2172 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2174 struct i40e_netdev_priv *np = netdev_priv(netdev);
2175 struct i40e_vsi *vsi = np->vsi;
2177 if (i40e_add_mac_filter(vsi, addr))
2184 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2185 * @netdev: the netdevice
2186 * @addr: address to add
2188 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2189 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2191 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2193 struct i40e_netdev_priv *np = netdev_priv(netdev);
2194 struct i40e_vsi *vsi = np->vsi;
2196 /* Under some circumstances, we might receive a request to delete
2197 * our own device address from our uc list. Because we store the
2198 * device address in the VSI's MAC/VLAN filter list, we need to ignore
2199 * such requests and not delete our device address from this list.
2201 if (ether_addr_equal(addr, netdev->dev_addr))
2204 i40e_del_mac_filter(vsi, addr);
2210 * i40e_set_rx_mode - NDO callback to set the netdev filters
2211 * @netdev: network interface device structure
2213 static void i40e_set_rx_mode(struct net_device *netdev)
2215 struct i40e_netdev_priv *np = netdev_priv(netdev);
2216 struct i40e_vsi *vsi = np->vsi;
2218 spin_lock_bh(&vsi->mac_filter_hash_lock);
2220 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2221 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2223 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2225 /* check for other flag changes */
2226 if (vsi->current_netdev_flags != vsi->netdev->flags) {
2227 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2228 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2233 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2234 * @vsi: Pointer to VSI struct
2235 * @from: Pointer to list which contains MAC filter entries - changes to
2236 * those entries needs to be undone.
2238 * MAC filter entries from this list were slated for deletion.
2240 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2241 struct hlist_head *from)
2243 struct i40e_mac_filter *f;
2244 struct hlist_node *h;
2246 hlist_for_each_entry_safe(f, h, from, hlist) {
2247 u64 key = i40e_addr_to_hkey(f->macaddr);
2249 /* Move the element back into MAC filter list*/
2250 hlist_del(&f->hlist);
2251 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2256 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2257 * @vsi: Pointer to vsi struct
2258 * @from: Pointer to list which contains MAC filter entries - changes to
2259 * those entries needs to be undone.
2261 * MAC filter entries from this list were slated for addition.
2263 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2264 struct hlist_head *from)
2266 struct i40e_new_mac_filter *new;
2267 struct hlist_node *h;
2269 hlist_for_each_entry_safe(new, h, from, hlist) {
2270 /* We can simply free the wrapper structure */
2271 hlist_del(&new->hlist);
2272 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2278 * i40e_next_filter - Get the next non-broadcast filter from a list
2279 * @next: pointer to filter in list
2281 * Returns the next non-broadcast filter in the list. Required so that we
2282 * ignore broadcast filters within the list, since these are not handled via
2283 * the normal firmware update path.
2286 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2288 hlist_for_each_entry_continue(next, hlist) {
2289 if (!is_broadcast_ether_addr(next->f->macaddr))
2297 * i40e_update_filter_state - Update filter state based on return data
2299 * @count: Number of filters added
2300 * @add_list: return data from fw
2301 * @add_head: pointer to first filter in current batch
2303 * MAC filter entries from list were slated to be added to device. Returns
2304 * number of successful filters. Note that 0 does NOT mean success!
2307 i40e_update_filter_state(int count,
2308 struct i40e_aqc_add_macvlan_element_data *add_list,
2309 struct i40e_new_mac_filter *add_head)
2314 for (i = 0; i < count; i++) {
2315 /* Always check status of each filter. We don't need to check
2316 * the firmware return status because we pre-set the filter
2317 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2318 * request to the adminq. Thus, if it no longer matches then
2319 * we know the filter is active.
2321 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2322 add_head->state = I40E_FILTER_FAILED;
2324 add_head->state = I40E_FILTER_ACTIVE;
2328 add_head = i40e_next_filter(add_head);
2337 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2338 * @vsi: ptr to the VSI
2339 * @vsi_name: name to display in messages
2340 * @list: the list of filters to send to firmware
2341 * @num_del: the number of filters to delete
2342 * @retval: Set to -EIO on failure to delete
2344 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2345 * *retval instead of a return value so that success does not force ret_val to
2346 * be set to 0. This ensures that a sequence of calls to this function
2347 * preserve the previous value of *retval on successful delete.
2350 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2351 struct i40e_aqc_remove_macvlan_element_data *list,
2352 int num_del, int *retval)
2354 struct i40e_hw *hw = &vsi->back->hw;
2355 enum i40e_admin_queue_err aq_status;
2358 aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2361 /* Explicitly ignore and do not report when firmware returns ENOENT */
2362 if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2364 dev_info(&vsi->back->pdev->dev,
2365 "ignoring delete macvlan error on %s, err %pe, aq_err %s\n",
2366 vsi_name, ERR_PTR(aq_ret),
2367 i40e_aq_str(hw, aq_status));
2372 * i40e_aqc_add_filters - Request firmware to add a set of filters
2373 * @vsi: ptr to the VSI
2374 * @vsi_name: name to display in messages
2375 * @list: the list of filters to send to firmware
2376 * @add_head: Position in the add hlist
2377 * @num_add: the number of filters to add
2379 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2380 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2381 * space for more filters.
2384 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2385 struct i40e_aqc_add_macvlan_element_data *list,
2386 struct i40e_new_mac_filter *add_head,
2389 struct i40e_hw *hw = &vsi->back->hw;
2390 enum i40e_admin_queue_err aq_status;
2393 i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2394 fcnt = i40e_update_filter_state(num_add, list, add_head);
2396 if (fcnt != num_add) {
2397 if (vsi->type == I40E_VSI_MAIN) {
2398 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2399 dev_warn(&vsi->back->pdev->dev,
2400 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2401 i40e_aq_str(hw, aq_status), vsi_name);
2402 } else if (vsi->type == I40E_VSI_SRIOV ||
2403 vsi->type == I40E_VSI_VMDQ1 ||
2404 vsi->type == I40E_VSI_VMDQ2) {
2405 dev_warn(&vsi->back->pdev->dev,
2406 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2407 i40e_aq_str(hw, aq_status), vsi_name,
2410 dev_warn(&vsi->back->pdev->dev,
2411 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2412 i40e_aq_str(hw, aq_status), vsi_name,
2419 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2420 * @vsi: pointer to the VSI
2421 * @vsi_name: the VSI name
2424 * This function sets or clears the promiscuous broadcast flags for VLAN
2425 * filters in order to properly receive broadcast frames. Assumes that only
2426 * broadcast filters are passed.
2428 * Returns status indicating success or failure;
2431 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2432 struct i40e_mac_filter *f)
2434 bool enable = f->state == I40E_FILTER_NEW;
2435 struct i40e_hw *hw = &vsi->back->hw;
2438 if (f->vlan == I40E_VLAN_ANY) {
2439 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2444 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2452 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2453 dev_warn(&vsi->back->pdev->dev,
2454 "Error %s, forcing overflow promiscuous on %s\n",
2455 i40e_aq_str(hw, hw->aq.asq_last_status),
2463 * i40e_set_promiscuous - set promiscuous mode
2464 * @pf: board private structure
2465 * @promisc: promisc on or off
2467 * There are different ways of setting promiscuous mode on a PF depending on
2468 * what state/environment we're in. This identifies and sets it appropriately.
2469 * Returns 0 on success.
2471 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2473 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2474 struct i40e_hw *hw = &pf->hw;
2477 if (vsi->type == I40E_VSI_MAIN &&
2478 pf->lan_veb != I40E_NO_VEB &&
2479 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2480 /* set defport ON for Main VSI instead of true promisc
2481 * this way we will get all unicast/multicast and VLAN
2482 * promisc behavior but will not get VF or VMDq traffic
2483 * replicated on the Main VSI.
2486 aq_ret = i40e_aq_set_default_vsi(hw,
2490 aq_ret = i40e_aq_clear_default_vsi(hw,
2494 dev_info(&pf->pdev->dev,
2495 "Set default VSI failed, err %pe, aq_err %s\n",
2497 i40e_aq_str(hw, hw->aq.asq_last_status));
2500 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2506 dev_info(&pf->pdev->dev,
2507 "set unicast promisc failed, err %pe, aq_err %s\n",
2509 i40e_aq_str(hw, hw->aq.asq_last_status));
2511 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2516 dev_info(&pf->pdev->dev,
2517 "set multicast promisc failed, err %pe, aq_err %s\n",
2519 i40e_aq_str(hw, hw->aq.asq_last_status));
2524 pf->cur_promisc = promisc;
2530 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2531 * @vsi: ptr to the VSI
2533 * Push any outstanding VSI filter changes through the AdminQ.
2535 * Returns 0 or error value
2537 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2539 struct hlist_head tmp_add_list, tmp_del_list;
2540 struct i40e_mac_filter *f;
2541 struct i40e_new_mac_filter *new, *add_head = NULL;
2542 struct i40e_hw *hw = &vsi->back->hw;
2543 bool old_overflow, new_overflow;
2544 unsigned int failed_filters = 0;
2545 unsigned int vlan_filters = 0;
2546 char vsi_name[16] = "PF";
2547 int filter_list_len = 0;
2548 u32 changed_flags = 0;
2549 struct hlist_node *h;
2559 /* empty array typed pointers, kcalloc later */
2560 struct i40e_aqc_add_macvlan_element_data *add_list;
2561 struct i40e_aqc_remove_macvlan_element_data *del_list;
2563 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2564 usleep_range(1000, 2000);
2567 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2570 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2571 vsi->current_netdev_flags = vsi->netdev->flags;
2574 INIT_HLIST_HEAD(&tmp_add_list);
2575 INIT_HLIST_HEAD(&tmp_del_list);
2577 if (vsi->type == I40E_VSI_SRIOV)
2578 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2579 else if (vsi->type != I40E_VSI_MAIN)
2580 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2582 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2583 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2585 spin_lock_bh(&vsi->mac_filter_hash_lock);
2586 /* Create a list of filters to delete. */
2587 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2588 if (f->state == I40E_FILTER_REMOVE) {
2589 /* Move the element into temporary del_list */
2590 hash_del(&f->hlist);
2591 hlist_add_head(&f->hlist, &tmp_del_list);
2593 /* Avoid counting removed filters */
2596 if (f->state == I40E_FILTER_NEW) {
2597 /* Create a temporary i40e_new_mac_filter */
2598 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2600 goto err_no_memory_locked;
2602 /* Store pointer to the real filter */
2604 new->state = f->state;
2606 /* Add it to the hash list */
2607 hlist_add_head(&new->hlist, &tmp_add_list);
2610 /* Count the number of active (current and new) VLAN
2611 * filters we have now. Does not count filters which
2612 * are marked for deletion.
2618 if (vsi->type != I40E_VSI_SRIOV)
2619 retval = i40e_correct_mac_vlan_filters
2620 (vsi, &tmp_add_list, &tmp_del_list,
2623 retval = i40e_correct_vf_mac_vlan_filters
2624 (vsi, &tmp_add_list, &tmp_del_list,
2625 vlan_filters, pf->vf[vsi->vf_id].trusted);
2627 hlist_for_each_entry(new, &tmp_add_list, hlist)
2628 netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2631 goto err_no_memory_locked;
2633 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2636 /* Now process 'del_list' outside the lock */
2637 if (!hlist_empty(&tmp_del_list)) {
2638 filter_list_len = hw->aq.asq_buf_size /
2639 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2640 list_size = filter_list_len *
2641 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2642 del_list = kzalloc(list_size, GFP_ATOMIC);
2646 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2649 /* handle broadcast filters by updating the broadcast
2650 * promiscuous flag and release filter list.
2652 if (is_broadcast_ether_addr(f->macaddr)) {
2653 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2655 hlist_del(&f->hlist);
2660 /* add to delete list */
2661 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2662 if (f->vlan == I40E_VLAN_ANY) {
2663 del_list[num_del].vlan_tag = 0;
2664 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2666 del_list[num_del].vlan_tag =
2667 cpu_to_le16((u16)(f->vlan));
2670 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2671 del_list[num_del].flags = cmd_flags;
2674 /* flush a full buffer */
2675 if (num_del == filter_list_len) {
2676 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2678 memset(del_list, 0, list_size);
2681 /* Release memory for MAC filter entries which were
2682 * synced up with HW.
2684 hlist_del(&f->hlist);
2689 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2697 if (!hlist_empty(&tmp_add_list)) {
2698 /* Do all the adds now. */
2699 filter_list_len = hw->aq.asq_buf_size /
2700 sizeof(struct i40e_aqc_add_macvlan_element_data);
2701 list_size = filter_list_len *
2702 sizeof(struct i40e_aqc_add_macvlan_element_data);
2703 add_list = kzalloc(list_size, GFP_ATOMIC);
2708 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2709 /* handle broadcast filters by updating the broadcast
2710 * promiscuous flag instead of adding a MAC filter.
2712 if (is_broadcast_ether_addr(new->f->macaddr)) {
2713 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2715 new->state = I40E_FILTER_FAILED;
2717 new->state = I40E_FILTER_ACTIVE;
2721 /* add to add array */
2725 ether_addr_copy(add_list[num_add].mac_addr,
2727 if (new->f->vlan == I40E_VLAN_ANY) {
2728 add_list[num_add].vlan_tag = 0;
2729 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2731 add_list[num_add].vlan_tag =
2732 cpu_to_le16((u16)(new->f->vlan));
2734 add_list[num_add].queue_number = 0;
2735 /* set invalid match method for later detection */
2736 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2737 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2738 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2741 /* flush a full buffer */
2742 if (num_add == filter_list_len) {
2743 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2745 memset(add_list, 0, list_size);
2750 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2753 /* Now move all of the filters from the temp add list back to
2756 spin_lock_bh(&vsi->mac_filter_hash_lock);
2757 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2758 /* Only update the state if we're still NEW */
2759 if (new->f->state == I40E_FILTER_NEW)
2760 new->f->state = new->state;
2761 hlist_del(&new->hlist);
2762 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2765 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2770 /* Determine the number of active and failed filters. */
2771 spin_lock_bh(&vsi->mac_filter_hash_lock);
2772 vsi->active_filters = 0;
2773 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2774 if (f->state == I40E_FILTER_ACTIVE)
2775 vsi->active_filters++;
2776 else if (f->state == I40E_FILTER_FAILED)
2779 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2781 /* Check if we are able to exit overflow promiscuous mode. We can
2782 * safely exit if we didn't just enter, we no longer have any failed
2783 * filters, and we have reduced filters below the threshold value.
2785 if (old_overflow && !failed_filters &&
2786 vsi->active_filters < vsi->promisc_threshold) {
2787 dev_info(&pf->pdev->dev,
2788 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2790 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2791 vsi->promisc_threshold = 0;
2794 /* if the VF is not trusted do not do promisc */
2795 if (vsi->type == I40E_VSI_SRIOV && pf->vf &&
2796 !pf->vf[vsi->vf_id].trusted) {
2797 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2801 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2803 /* If we are entering overflow promiscuous, we need to calculate a new
2804 * threshold for when we are safe to exit
2806 if (!old_overflow && new_overflow)
2807 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2809 /* check for changes in promiscuous modes */
2810 if (changed_flags & IFF_ALLMULTI) {
2811 bool cur_multipromisc;
2813 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2814 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2819 retval = i40e_aq_rc_to_posix(aq_ret,
2820 hw->aq.asq_last_status);
2821 dev_info(&pf->pdev->dev,
2822 "set multi promisc failed on %s, err %pe aq_err %s\n",
2825 i40e_aq_str(hw, hw->aq.asq_last_status));
2827 dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2828 cur_multipromisc ? "entering" : "leaving");
2832 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2835 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2837 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2839 retval = i40e_aq_rc_to_posix(aq_ret,
2840 hw->aq.asq_last_status);
2841 dev_info(&pf->pdev->dev,
2842 "Setting promiscuous %s failed on %s, err %pe aq_err %s\n",
2843 cur_promisc ? "on" : "off",
2846 i40e_aq_str(hw, hw->aq.asq_last_status));
2850 /* if something went wrong then set the changed flag so we try again */
2852 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2854 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2858 /* Restore elements on the temporary add and delete lists */
2859 spin_lock_bh(&vsi->mac_filter_hash_lock);
2860 err_no_memory_locked:
2861 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2862 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2863 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2865 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2866 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2871 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2872 * @pf: board private structure
2874 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2880 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2882 if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2883 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2887 for (v = 0; v < pf->num_alloc_vsi; v++) {
2889 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2890 !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2891 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2894 /* come back and try again later */
2895 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2904 * i40e_calculate_vsi_rx_buf_len - Calculates buffer length
2906 * @vsi: VSI to calculate rx_buf_len from
2908 static u16 i40e_calculate_vsi_rx_buf_len(struct i40e_vsi *vsi)
2910 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2911 return SKB_WITH_OVERHEAD(I40E_RXBUFFER_2048);
2913 return PAGE_SIZE < 8192 ? I40E_RXBUFFER_3072 : I40E_RXBUFFER_2048;
2917 * i40e_max_vsi_frame_size - returns the maximum allowed frame size for VSI
2919 * @xdp_prog: XDP program
2921 static int i40e_max_vsi_frame_size(struct i40e_vsi *vsi,
2922 struct bpf_prog *xdp_prog)
2924 u16 rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
2927 if (xdp_prog && !xdp_prog->aux->xdp_has_frags)
2930 chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
2932 return min_t(u16, rx_buf_len * chain_len, I40E_MAX_RXBUFFER);
2936 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2937 * @netdev: network interface device structure
2938 * @new_mtu: new value for maximum frame size
2940 * Returns 0 on success, negative on failure
2942 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2944 struct i40e_netdev_priv *np = netdev_priv(netdev);
2945 struct i40e_vsi *vsi = np->vsi;
2946 struct i40e_pf *pf = vsi->back;
2949 frame_size = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
2950 if (new_mtu > frame_size - I40E_PACKET_HDR_PAD) {
2951 netdev_err(netdev, "Error changing mtu to %d, Max is %d\n",
2952 new_mtu, frame_size - I40E_PACKET_HDR_PAD);
2956 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2957 netdev->mtu, new_mtu);
2958 netdev->mtu = new_mtu;
2959 if (netif_running(netdev))
2960 i40e_vsi_reinit_locked(vsi);
2961 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2962 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2967 * i40e_ioctl - Access the hwtstamp interface
2968 * @netdev: network interface device structure
2969 * @ifr: interface request data
2970 * @cmd: ioctl command
2972 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2974 struct i40e_netdev_priv *np = netdev_priv(netdev);
2975 struct i40e_pf *pf = np->vsi->back;
2979 return i40e_ptp_get_ts_config(pf, ifr);
2981 return i40e_ptp_set_ts_config(pf, ifr);
2988 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2989 * @vsi: the vsi being adjusted
2991 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2993 struct i40e_vsi_context ctxt;
2996 /* Don't modify stripping options if a port VLAN is active */
3000 if ((vsi->info.valid_sections &
3001 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3002 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
3003 return; /* already enabled */
3005 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3006 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3007 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
3009 ctxt.seid = vsi->seid;
3010 ctxt.info = vsi->info;
3011 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3013 dev_info(&vsi->back->pdev->dev,
3014 "update vlan stripping failed, err %pe aq_err %s\n",
3016 i40e_aq_str(&vsi->back->hw,
3017 vsi->back->hw.aq.asq_last_status));
3022 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
3023 * @vsi: the vsi being adjusted
3025 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
3027 struct i40e_vsi_context ctxt;
3030 /* Don't modify stripping options if a port VLAN is active */
3034 if ((vsi->info.valid_sections &
3035 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
3036 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
3037 I40E_AQ_VSI_PVLAN_EMOD_MASK))
3038 return; /* already disabled */
3040 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3041 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
3042 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
3044 ctxt.seid = vsi->seid;
3045 ctxt.info = vsi->info;
3046 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3048 dev_info(&vsi->back->pdev->dev,
3049 "update vlan stripping failed, err %pe aq_err %s\n",
3051 i40e_aq_str(&vsi->back->hw,
3052 vsi->back->hw.aq.asq_last_status));
3057 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
3058 * @vsi: the vsi being configured
3059 * @vid: vlan id to be added (0 = untagged only , -1 = any)
3061 * This is a helper function for adding a new MAC/VLAN filter with the
3062 * specified VLAN for each existing MAC address already in the hash table.
3063 * This function does *not* perform any accounting to update filters based on
3066 * NOTE: this function expects to be called while under the
3067 * mac_filter_hash_lock
3069 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3071 struct i40e_mac_filter *f, *add_f;
3072 struct hlist_node *h;
3075 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3076 /* If we're asked to add a filter that has been marked for
3077 * removal, it is safe to simply restore it to active state.
3078 * __i40e_del_filter will have simply deleted any filters which
3079 * were previously marked NEW or FAILED, so if it is currently
3080 * marked REMOVE it must have previously been ACTIVE. Since we
3081 * haven't yet run the sync filters task, just restore this
3082 * filter to the ACTIVE state so that the sync task leaves it
3085 if (f->state == I40E_FILTER_REMOVE && f->vlan == vid) {
3086 f->state = I40E_FILTER_ACTIVE;
3088 } else if (f->state == I40E_FILTER_REMOVE) {
3091 add_f = i40e_add_filter(vsi, f->macaddr, vid);
3093 dev_info(&vsi->back->pdev->dev,
3094 "Could not add vlan filter %d for %pM\n",
3104 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
3105 * @vsi: the VSI being configured
3106 * @vid: VLAN id to be added
3108 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
3115 /* The network stack will attempt to add VID=0, with the intention to
3116 * receive priority tagged packets with a VLAN of 0. Our HW receives
3117 * these packets by default when configured to receive untagged
3118 * packets, so we don't need to add a filter for this case.
3119 * Additionally, HW interprets adding a VID=0 filter as meaning to
3120 * receive *only* tagged traffic and stops receiving untagged traffic.
3121 * Thus, we do not want to actually add a filter for VID=0
3126 /* Locked once because all functions invoked below iterates list*/
3127 spin_lock_bh(&vsi->mac_filter_hash_lock);
3128 err = i40e_add_vlan_all_mac(vsi, vid);
3129 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3133 /* schedule our worker thread which will take care of
3134 * applying the new filter changes
3136 i40e_service_event_schedule(vsi->back);
3141 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
3142 * @vsi: the vsi being configured
3143 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
3145 * This function should be used to remove all VLAN filters which match the
3146 * given VID. It does not schedule the service event and does not take the
3147 * mac_filter_hash_lock so it may be combined with other operations under
3148 * a single invocation of the mac_filter_hash_lock.
3150 * NOTE: this function expects to be called while under the
3151 * mac_filter_hash_lock
3153 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3155 struct i40e_mac_filter *f;
3156 struct hlist_node *h;
3159 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3161 __i40e_del_filter(vsi, f);
3166 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3167 * @vsi: the VSI being configured
3168 * @vid: VLAN id to be removed
3170 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3172 if (!vid || vsi->info.pvid)
3175 spin_lock_bh(&vsi->mac_filter_hash_lock);
3176 i40e_rm_vlan_all_mac(vsi, vid);
3177 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3179 /* schedule our worker thread which will take care of
3180 * applying the new filter changes
3182 i40e_service_event_schedule(vsi->back);
3186 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3187 * @netdev: network interface to be adjusted
3188 * @proto: unused protocol value
3189 * @vid: vlan id to be added
3191 * net_device_ops implementation for adding vlan ids
3193 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3194 __always_unused __be16 proto, u16 vid)
3196 struct i40e_netdev_priv *np = netdev_priv(netdev);
3197 struct i40e_vsi *vsi = np->vsi;
3200 if (vid >= VLAN_N_VID)
3203 ret = i40e_vsi_add_vlan(vsi, vid);
3205 set_bit(vid, vsi->active_vlans);
3211 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3212 * @netdev: network interface to be adjusted
3213 * @proto: unused protocol value
3214 * @vid: vlan id to be added
3216 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3217 __always_unused __be16 proto, u16 vid)
3219 struct i40e_netdev_priv *np = netdev_priv(netdev);
3220 struct i40e_vsi *vsi = np->vsi;
3222 if (vid >= VLAN_N_VID)
3224 set_bit(vid, vsi->active_vlans);
3228 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3229 * @netdev: network interface to be adjusted
3230 * @proto: unused protocol value
3231 * @vid: vlan id to be removed
3233 * net_device_ops implementation for removing vlan ids
3235 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3236 __always_unused __be16 proto, u16 vid)
3238 struct i40e_netdev_priv *np = netdev_priv(netdev);
3239 struct i40e_vsi *vsi = np->vsi;
3241 /* return code is ignored as there is nothing a user
3242 * can do about failure to remove and a log message was
3243 * already printed from the other function
3245 i40e_vsi_kill_vlan(vsi, vid);
3247 clear_bit(vid, vsi->active_vlans);
3253 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3254 * @vsi: the vsi being brought back up
3256 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3263 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3264 i40e_vlan_stripping_enable(vsi);
3266 i40e_vlan_stripping_disable(vsi);
3268 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3269 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3274 * i40e_vsi_add_pvid - Add pvid for the VSI
3275 * @vsi: the vsi being adjusted
3276 * @vid: the vlan id to set as a PVID
3278 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3280 struct i40e_vsi_context ctxt;
3283 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3284 vsi->info.pvid = cpu_to_le16(vid);
3285 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3286 I40E_AQ_VSI_PVLAN_INSERT_PVID |
3287 I40E_AQ_VSI_PVLAN_EMOD_STR;
3289 ctxt.seid = vsi->seid;
3290 ctxt.info = vsi->info;
3291 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3293 dev_info(&vsi->back->pdev->dev,
3294 "add pvid failed, err %pe aq_err %s\n",
3296 i40e_aq_str(&vsi->back->hw,
3297 vsi->back->hw.aq.asq_last_status));
3305 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3306 * @vsi: the vsi being adjusted
3308 * Just use the vlan_rx_register() service to put it back to normal
3310 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3314 i40e_vlan_stripping_disable(vsi);
3318 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3319 * @vsi: ptr to the VSI
3321 * If this function returns with an error, then it's possible one or
3322 * more of the rings is populated (while the rest are not). It is the
3323 * callers duty to clean those orphaned rings.
3325 * Return 0 on success, negative on failure
3327 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3331 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3332 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3334 if (!i40e_enabled_xdp_vsi(vsi))
3337 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3338 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3344 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3345 * @vsi: ptr to the VSI
3347 * Free VSI's transmit software resources
3349 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3353 if (vsi->tx_rings) {
3354 for (i = 0; i < vsi->num_queue_pairs; i++)
3355 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3356 i40e_free_tx_resources(vsi->tx_rings[i]);
3359 if (vsi->xdp_rings) {
3360 for (i = 0; i < vsi->num_queue_pairs; i++)
3361 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3362 i40e_free_tx_resources(vsi->xdp_rings[i]);
3367 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3368 * @vsi: ptr to the VSI
3370 * If this function returns with an error, then it's possible one or
3371 * more of the rings is populated (while the rest are not). It is the
3372 * callers duty to clean those orphaned rings.
3374 * Return 0 on success, negative on failure
3376 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3380 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3381 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3386 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3387 * @vsi: ptr to the VSI
3389 * Free all receive software resources
3391 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3398 for (i = 0; i < vsi->num_queue_pairs; i++)
3399 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3400 i40e_free_rx_resources(vsi->rx_rings[i]);
3404 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3405 * @ring: The Tx ring to configure
3407 * This enables/disables XPS for a given Tx descriptor ring
3408 * based on the TCs enabled for the VSI that ring belongs to.
3410 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3414 if (!ring->q_vector || !ring->netdev || ring->ch)
3417 /* We only initialize XPS once, so as not to overwrite user settings */
3418 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3421 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3422 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3427 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3428 * @ring: The Tx or Rx ring
3430 * Returns the AF_XDP buffer pool or NULL.
3432 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3434 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3435 int qid = ring->queue_index;
3437 if (ring_is_xdp(ring))
3438 qid -= ring->vsi->alloc_queue_pairs;
3440 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3443 return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3447 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3448 * @ring: The Tx ring to configure
3450 * Configure the Tx descriptor ring in the HMC context.
3452 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3454 struct i40e_vsi *vsi = ring->vsi;
3455 u16 pf_q = vsi->base_queue + ring->queue_index;
3456 struct i40e_hw *hw = &vsi->back->hw;
3457 struct i40e_hmc_obj_txq tx_ctx;
3461 if (ring_is_xdp(ring))
3462 ring->xsk_pool = i40e_xsk_pool(ring);
3464 /* some ATR related tx ring init */
3465 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3466 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3467 ring->atr_count = 0;
3469 ring->atr_sample_rate = 0;
3473 i40e_config_xps_tx_ring(ring);
3475 /* clear the context structure first */
3476 memset(&tx_ctx, 0, sizeof(tx_ctx));
3478 tx_ctx.new_context = 1;
3479 tx_ctx.base = (ring->dma / 128);
3480 tx_ctx.qlen = ring->count;
3481 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3482 I40E_FLAG_FD_ATR_ENABLED));
3483 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3484 /* FDIR VSI tx ring can still use RS bit and writebacks */
3485 if (vsi->type != I40E_VSI_FDIR)
3486 tx_ctx.head_wb_ena = 1;
3487 tx_ctx.head_wb_addr = ring->dma +
3488 (ring->count * sizeof(struct i40e_tx_desc));
3490 /* As part of VSI creation/update, FW allocates certain
3491 * Tx arbitration queue sets for each TC enabled for
3492 * the VSI. The FW returns the handles to these queue
3493 * sets as part of the response buffer to Add VSI,
3494 * Update VSI, etc. AQ commands. It is expected that
3495 * these queue set handles be associated with the Tx
3496 * queues by the driver as part of the TX queue context
3497 * initialization. This has to be done regardless of
3498 * DCB as by default everything is mapped to TC0.
3503 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3506 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3508 tx_ctx.rdylist_act = 0;
3510 /* clear the context in the HMC */
3511 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3513 dev_info(&vsi->back->pdev->dev,
3514 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3515 ring->queue_index, pf_q, err);
3519 /* set the context in the HMC */
3520 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3522 dev_info(&vsi->back->pdev->dev,
3523 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3524 ring->queue_index, pf_q, err);
3528 /* Now associate this queue with this PCI function */
3530 if (ring->ch->type == I40E_VSI_VMDQ2)
3531 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3535 qtx_ctl |= (ring->ch->vsi_number <<
3536 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3537 I40E_QTX_CTL_VFVM_INDX_MASK;
3539 if (vsi->type == I40E_VSI_VMDQ2) {
3540 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3541 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3542 I40E_QTX_CTL_VFVM_INDX_MASK;
3544 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3548 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3549 I40E_QTX_CTL_PF_INDX_MASK);
3550 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3553 /* cache tail off for easier writes later */
3554 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3560 * i40e_rx_offset - Return expected offset into page to access data
3561 * @rx_ring: Ring we are requesting offset of
3563 * Returns the offset value for ring into the data buffer.
3565 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3567 return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3571 * i40e_configure_rx_ring - Configure a receive ring context
3572 * @ring: The Rx ring to configure
3574 * Configure the Rx descriptor ring in the HMC context.
3576 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3578 struct i40e_vsi *vsi = ring->vsi;
3579 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3580 u16 pf_q = vsi->base_queue + ring->queue_index;
3581 struct i40e_hw *hw = &vsi->back->hw;
3582 struct i40e_hmc_obj_rxq rx_ctx;
3587 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3589 /* clear the context structure first */
3590 memset(&rx_ctx, 0, sizeof(rx_ctx));
3592 if (ring->vsi->type == I40E_VSI_MAIN)
3593 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3595 ring->xsk_pool = i40e_xsk_pool(ring);
3596 if (ring->xsk_pool) {
3598 xsk_pool_get_rx_frame_size(ring->xsk_pool);
3599 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3600 MEM_TYPE_XSK_BUFF_POOL,
3604 dev_info(&vsi->back->pdev->dev,
3605 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3609 ring->rx_buf_len = vsi->rx_buf_len;
3610 if (ring->vsi->type == I40E_VSI_MAIN) {
3611 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3612 MEM_TYPE_PAGE_SHARED,
3619 xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
3621 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3622 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3624 rx_ctx.base = (ring->dma / 128);
3625 rx_ctx.qlen = ring->count;
3627 /* use 16 byte descriptors */
3630 /* descriptor type is always zero
3633 rx_ctx.hsplit_0 = 0;
3635 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3636 if (hw->revision_id == 0)
3637 rx_ctx.lrxqthresh = 0;
3639 rx_ctx.lrxqthresh = 1;
3640 rx_ctx.crcstrip = 1;
3642 /* this controls whether VLAN is stripped from inner headers */
3644 /* set the prefena field to 1 because the manual says to */
3647 /* clear the context in the HMC */
3648 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3650 dev_info(&vsi->back->pdev->dev,
3651 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3652 ring->queue_index, pf_q, err);
3656 /* set the context in the HMC */
3657 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3659 dev_info(&vsi->back->pdev->dev,
3660 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3661 ring->queue_index, pf_q, err);
3665 /* configure Rx buffer alignment */
3666 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3667 if (I40E_2K_TOO_SMALL_WITH_PADDING) {
3668 dev_info(&vsi->back->pdev->dev,
3669 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
3672 clear_ring_build_skb_enabled(ring);
3674 set_ring_build_skb_enabled(ring);
3677 ring->rx_offset = i40e_rx_offset(ring);
3679 /* cache tail for quicker writes, and clear the reg before use */
3680 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3681 writel(0, ring->tail);
3683 if (ring->xsk_pool) {
3684 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3685 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3687 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3690 /* Log this in case the user has forgotten to give the kernel
3691 * any buffers, even later in the application.
3693 dev_info(&vsi->back->pdev->dev,
3694 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3695 ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3696 ring->queue_index, pf_q);
3703 * i40e_vsi_configure_tx - Configure the VSI for Tx
3704 * @vsi: VSI structure describing this set of rings and resources
3706 * Configure the Tx VSI for operation.
3708 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3713 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3714 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3716 if (err || !i40e_enabled_xdp_vsi(vsi))
3719 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3720 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3726 * i40e_vsi_configure_rx - Configure the VSI for Rx
3727 * @vsi: the VSI being configured
3729 * Configure the Rx VSI for operation.
3731 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3736 vsi->max_frame = i40e_max_vsi_frame_size(vsi, vsi->xdp_prog);
3737 vsi->rx_buf_len = i40e_calculate_vsi_rx_buf_len(vsi);
3739 #if (PAGE_SIZE < 8192)
3740 if (vsi->netdev && !I40E_2K_TOO_SMALL_WITH_PADDING &&
3741 vsi->netdev->mtu <= ETH_DATA_LEN) {
3742 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3743 vsi->max_frame = vsi->rx_buf_len;
3747 /* set up individual rings */
3748 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3749 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3755 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3756 * @vsi: ptr to the VSI
3758 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3760 struct i40e_ring *tx_ring, *rx_ring;
3761 u16 qoffset, qcount;
3764 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3765 /* Reset the TC information */
3766 for (i = 0; i < vsi->num_queue_pairs; i++) {
3767 rx_ring = vsi->rx_rings[i];
3768 tx_ring = vsi->tx_rings[i];
3769 rx_ring->dcb_tc = 0;
3770 tx_ring->dcb_tc = 0;
3775 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3776 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3779 qoffset = vsi->tc_config.tc_info[n].qoffset;
3780 qcount = vsi->tc_config.tc_info[n].qcount;
3781 for (i = qoffset; i < (qoffset + qcount); i++) {
3782 rx_ring = vsi->rx_rings[i];
3783 tx_ring = vsi->tx_rings[i];
3784 rx_ring->dcb_tc = n;
3785 tx_ring->dcb_tc = n;
3791 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3792 * @vsi: ptr to the VSI
3794 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3797 i40e_set_rx_mode(vsi->netdev);
3801 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3802 * @pf: Pointer to the targeted PF
3804 * Set all flow director counters to 0.
3806 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3808 pf->fd_tcp4_filter_cnt = 0;
3809 pf->fd_udp4_filter_cnt = 0;
3810 pf->fd_sctp4_filter_cnt = 0;
3811 pf->fd_ip4_filter_cnt = 0;
3812 pf->fd_tcp6_filter_cnt = 0;
3813 pf->fd_udp6_filter_cnt = 0;
3814 pf->fd_sctp6_filter_cnt = 0;
3815 pf->fd_ip6_filter_cnt = 0;
3819 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3820 * @vsi: Pointer to the targeted VSI
3822 * This function replays the hlist on the hw where all the SB Flow Director
3823 * filters were saved.
3825 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3827 struct i40e_fdir_filter *filter;
3828 struct i40e_pf *pf = vsi->back;
3829 struct hlist_node *node;
3831 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3834 /* Reset FDir counters as we're replaying all existing filters */
3835 i40e_reset_fdir_filter_cnt(pf);
3837 hlist_for_each_entry_safe(filter, node,
3838 &pf->fdir_filter_list, fdir_node) {
3839 i40e_add_del_fdir(vsi, filter, true);
3844 * i40e_vsi_configure - Set up the VSI for action
3845 * @vsi: the VSI being configured
3847 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3851 i40e_set_vsi_rx_mode(vsi);
3852 i40e_restore_vlan(vsi);
3853 i40e_vsi_config_dcb_rings(vsi);
3854 err = i40e_vsi_configure_tx(vsi);
3856 err = i40e_vsi_configure_rx(vsi);
3862 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3863 * @vsi: the VSI being configured
3865 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3867 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3868 struct i40e_pf *pf = vsi->back;
3869 struct i40e_hw *hw = &pf->hw;
3874 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3875 * and PFINT_LNKLSTn registers, e.g.:
3876 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3878 qp = vsi->base_queue;
3879 vector = vsi->base_vector;
3880 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3881 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3883 q_vector->rx.next_update = jiffies + 1;
3884 q_vector->rx.target_itr =
3885 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3886 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3887 q_vector->rx.target_itr >> 1);
3888 q_vector->rx.current_itr = q_vector->rx.target_itr;
3890 q_vector->tx.next_update = jiffies + 1;
3891 q_vector->tx.target_itr =
3892 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3893 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3894 q_vector->tx.target_itr >> 1);
3895 q_vector->tx.current_itr = q_vector->tx.target_itr;
3897 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3898 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3900 /* begin of linked list for RX queue assigned to this vector */
3901 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3902 for (q = 0; q < q_vector->num_ringpairs; q++) {
3903 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3906 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3907 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3908 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3909 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3910 (I40E_QUEUE_TYPE_TX <<
3911 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3913 wr32(hw, I40E_QINT_RQCTL(qp), val);
3916 /* TX queue with next queue set to TX */
3917 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3918 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3919 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3920 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3921 (I40E_QUEUE_TYPE_TX <<
3922 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3924 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3926 /* TX queue with next RX or end of linked list */
3927 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3928 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3929 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3930 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3931 (I40E_QUEUE_TYPE_RX <<
3932 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3934 /* Terminate the linked list */
3935 if (q == (q_vector->num_ringpairs - 1))
3936 val |= (I40E_QUEUE_END_OF_LIST <<
3937 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3939 wr32(hw, I40E_QINT_TQCTL(qp), val);
3948 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3949 * @pf: pointer to private device data structure
3951 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3953 struct i40e_hw *hw = &pf->hw;
3956 /* clear things first */
3957 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3958 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3960 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3961 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3962 I40E_PFINT_ICR0_ENA_GRST_MASK |
3963 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3964 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3965 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3966 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3967 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3969 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3970 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3972 if (pf->flags & I40E_FLAG_PTP)
3973 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3975 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3977 /* SW_ITR_IDX = 0, but don't change INTENA */
3978 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3979 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3981 /* OTHER_ITR_IDX = 0 */
3982 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3986 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3987 * @vsi: the VSI being configured
3989 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3991 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3992 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3993 struct i40e_pf *pf = vsi->back;
3994 struct i40e_hw *hw = &pf->hw;
3996 /* set the ITR configuration */
3997 q_vector->rx.next_update = jiffies + 1;
3998 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3999 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
4000 q_vector->rx.current_itr = q_vector->rx.target_itr;
4001 q_vector->tx.next_update = jiffies + 1;
4002 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
4003 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
4004 q_vector->tx.current_itr = q_vector->tx.target_itr;
4006 i40e_enable_misc_int_causes(pf);
4008 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
4009 wr32(hw, I40E_PFINT_LNKLST0, 0);
4011 /* Associate the queue pair to the vector and enable the queue
4012 * interrupt RX queue in linked list with next queue set to TX
4014 wr32(hw, I40E_QINT_RQCTL(0), I40E_QINT_RQCTL_VAL(nextqp, 0, TX));
4016 if (i40e_enabled_xdp_vsi(vsi)) {
4017 /* TX queue in linked list with next queue set to TX */
4018 wr32(hw, I40E_QINT_TQCTL(nextqp),
4019 I40E_QINT_TQCTL_VAL(nextqp, 0, TX));
4022 /* last TX queue so the next RX queue doesn't matter */
4023 wr32(hw, I40E_QINT_TQCTL(0),
4024 I40E_QINT_TQCTL_VAL(I40E_QUEUE_END_OF_LIST, 0, RX));
4029 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
4030 * @pf: board private structure
4032 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
4034 struct i40e_hw *hw = &pf->hw;
4036 wr32(hw, I40E_PFINT_DYN_CTL0,
4037 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
4042 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
4043 * @pf: board private structure
4045 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
4047 struct i40e_hw *hw = &pf->hw;
4050 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
4051 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
4052 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
4054 wr32(hw, I40E_PFINT_DYN_CTL0, val);
4059 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
4060 * @irq: interrupt number
4061 * @data: pointer to a q_vector
4063 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
4065 struct i40e_q_vector *q_vector = data;
4067 if (!q_vector->tx.ring && !q_vector->rx.ring)
4070 napi_schedule_irqoff(&q_vector->napi);
4076 * i40e_irq_affinity_notify - Callback for affinity changes
4077 * @notify: context as to what irq was changed
4078 * @mask: the new affinity mask
4080 * This is a callback function used by the irq_set_affinity_notifier function
4081 * so that we may register to receive changes to the irq affinity masks.
4083 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
4084 const cpumask_t *mask)
4086 struct i40e_q_vector *q_vector =
4087 container_of(notify, struct i40e_q_vector, affinity_notify);
4089 cpumask_copy(&q_vector->affinity_mask, mask);
4093 * i40e_irq_affinity_release - Callback for affinity notifier release
4094 * @ref: internal core kernel usage
4096 * This is a callback function used by the irq_set_affinity_notifier function
4097 * to inform the current notification subscriber that they will no longer
4098 * receive notifications.
4100 static void i40e_irq_affinity_release(struct kref *ref) {}
4103 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
4104 * @vsi: the VSI being configured
4105 * @basename: name for the vector
4107 * Allocates MSI-X vectors and requests interrupts from the kernel.
4109 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
4111 int q_vectors = vsi->num_q_vectors;
4112 struct i40e_pf *pf = vsi->back;
4113 int base = vsi->base_vector;
4120 for (vector = 0; vector < q_vectors; vector++) {
4121 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
4123 irq_num = pf->msix_entries[base + vector].vector;
4125 if (q_vector->tx.ring && q_vector->rx.ring) {
4126 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4127 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
4129 } else if (q_vector->rx.ring) {
4130 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4131 "%s-%s-%d", basename, "rx", rx_int_idx++);
4132 } else if (q_vector->tx.ring) {
4133 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
4134 "%s-%s-%d", basename, "tx", tx_int_idx++);
4136 /* skip this unused q_vector */
4139 err = request_irq(irq_num,
4145 dev_info(&pf->pdev->dev,
4146 "MSIX request_irq failed, error: %d\n", err);
4147 goto free_queue_irqs;
4150 /* register for affinity change notifications */
4151 q_vector->irq_num = irq_num;
4152 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4153 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4154 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4155 /* Spread affinity hints out across online CPUs.
4157 * get_cpu_mask returns a static constant mask with
4158 * a permanent lifetime so it's ok to pass to
4159 * irq_update_affinity_hint without making a copy.
4161 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4162 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4165 vsi->irqs_ready = true;
4171 irq_num = pf->msix_entries[base + vector].vector;
4172 irq_set_affinity_notifier(irq_num, NULL);
4173 irq_update_affinity_hint(irq_num, NULL);
4174 free_irq(irq_num, &vsi->q_vectors[vector]);
4180 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4181 * @vsi: the VSI being un-configured
4183 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4185 struct i40e_pf *pf = vsi->back;
4186 struct i40e_hw *hw = &pf->hw;
4187 int base = vsi->base_vector;
4190 /* disable interrupt causation from each queue */
4191 for (i = 0; i < vsi->num_queue_pairs; i++) {
4194 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4195 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4196 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4198 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4199 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4200 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4202 if (!i40e_enabled_xdp_vsi(vsi))
4204 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4207 /* disable each interrupt */
4208 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4209 for (i = vsi->base_vector;
4210 i < (vsi->num_q_vectors + vsi->base_vector); i++)
4211 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4214 for (i = 0; i < vsi->num_q_vectors; i++)
4215 synchronize_irq(pf->msix_entries[i + base].vector);
4217 /* Legacy and MSI mode - this stops all interrupt handling */
4218 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4219 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4221 synchronize_irq(pf->pdev->irq);
4226 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4227 * @vsi: the VSI being configured
4229 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4231 struct i40e_pf *pf = vsi->back;
4234 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4235 for (i = 0; i < vsi->num_q_vectors; i++)
4236 i40e_irq_dynamic_enable(vsi, i);
4238 i40e_irq_dynamic_enable_icr0(pf);
4241 i40e_flush(&pf->hw);
4246 * i40e_free_misc_vector - Free the vector that handles non-queue events
4247 * @pf: board private structure
4249 static void i40e_free_misc_vector(struct i40e_pf *pf)
4252 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4253 i40e_flush(&pf->hw);
4255 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4256 free_irq(pf->msix_entries[0].vector, pf);
4257 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4262 * i40e_intr - MSI/Legacy and non-queue interrupt handler
4263 * @irq: interrupt number
4264 * @data: pointer to a q_vector
4266 * This is the handler used for all MSI/Legacy interrupts, and deals
4267 * with both queue and non-queue interrupts. This is also used in
4268 * MSIX mode to handle the non-queue interrupts.
4270 static irqreturn_t i40e_intr(int irq, void *data)
4272 struct i40e_pf *pf = (struct i40e_pf *)data;
4273 struct i40e_hw *hw = &pf->hw;
4274 irqreturn_t ret = IRQ_NONE;
4275 u32 icr0, icr0_remaining;
4278 icr0 = rd32(hw, I40E_PFINT_ICR0);
4279 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4281 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4282 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4285 /* if interrupt but no bits showing, must be SWINT */
4286 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4287 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4290 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4291 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4292 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4293 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4294 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4297 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4298 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4299 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4300 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4302 /* We do not have a way to disarm Queue causes while leaving
4303 * interrupt enabled for all other causes, ideally
4304 * interrupt should be disabled while we are in NAPI but
4305 * this is not a performance path and napi_schedule()
4306 * can deal with rescheduling.
4308 if (!test_bit(__I40E_DOWN, pf->state))
4309 napi_schedule_irqoff(&q_vector->napi);
4312 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4313 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4314 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4315 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4318 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4319 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4320 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4323 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4324 /* disable any further VFLR event notifications */
4325 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4326 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4328 reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4329 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4331 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4332 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4336 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4337 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4338 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4339 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4340 val = rd32(hw, I40E_GLGEN_RSTAT);
4341 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4342 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4343 if (val == I40E_RESET_CORER) {
4345 } else if (val == I40E_RESET_GLOBR) {
4347 } else if (val == I40E_RESET_EMPR) {
4349 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4353 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4354 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4355 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4356 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4357 rd32(hw, I40E_PFHMC_ERRORINFO),
4358 rd32(hw, I40E_PFHMC_ERRORDATA));
4361 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4362 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4364 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4365 schedule_work(&pf->ptp_extts0_work);
4367 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4368 i40e_ptp_tx_hwtstamp(pf);
4370 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4373 /* If a critical error is pending we have no choice but to reset the
4375 * Report and mask out any remaining unexpected interrupts.
4377 icr0_remaining = icr0 & ena_mask;
4378 if (icr0_remaining) {
4379 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4381 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4382 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4383 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4384 dev_info(&pf->pdev->dev, "device will be reset\n");
4385 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4386 i40e_service_event_schedule(pf);
4388 ena_mask &= ~icr0_remaining;
4393 /* re-enable interrupt causes */
4394 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4395 if (!test_bit(__I40E_DOWN, pf->state) ||
4396 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4397 i40e_service_event_schedule(pf);
4398 i40e_irq_dynamic_enable_icr0(pf);
4405 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4406 * @tx_ring: tx ring to clean
4407 * @budget: how many cleans we're allowed
4409 * Returns true if there's any budget left (e.g. the clean is finished)
4411 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4413 struct i40e_vsi *vsi = tx_ring->vsi;
4414 u16 i = tx_ring->next_to_clean;
4415 struct i40e_tx_buffer *tx_buf;
4416 struct i40e_tx_desc *tx_desc;
4418 tx_buf = &tx_ring->tx_bi[i];
4419 tx_desc = I40E_TX_DESC(tx_ring, i);
4420 i -= tx_ring->count;
4423 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4425 /* if next_to_watch is not set then there is no work pending */
4429 /* prevent any other reads prior to eop_desc */
4432 /* if the descriptor isn't done, no work yet to do */
4433 if (!(eop_desc->cmd_type_offset_bsz &
4434 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4437 /* clear next_to_watch to prevent false hangs */
4438 tx_buf->next_to_watch = NULL;
4440 tx_desc->buffer_addr = 0;
4441 tx_desc->cmd_type_offset_bsz = 0;
4442 /* move past filter desc */
4447 i -= tx_ring->count;
4448 tx_buf = tx_ring->tx_bi;
4449 tx_desc = I40E_TX_DESC(tx_ring, 0);
4451 /* unmap skb header data */
4452 dma_unmap_single(tx_ring->dev,
4453 dma_unmap_addr(tx_buf, dma),
4454 dma_unmap_len(tx_buf, len),
4456 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4457 kfree(tx_buf->raw_buf);
4459 tx_buf->raw_buf = NULL;
4460 tx_buf->tx_flags = 0;
4461 tx_buf->next_to_watch = NULL;
4462 dma_unmap_len_set(tx_buf, len, 0);
4463 tx_desc->buffer_addr = 0;
4464 tx_desc->cmd_type_offset_bsz = 0;
4466 /* move us past the eop_desc for start of next FD desc */
4471 i -= tx_ring->count;
4472 tx_buf = tx_ring->tx_bi;
4473 tx_desc = I40E_TX_DESC(tx_ring, 0);
4476 /* update budget accounting */
4478 } while (likely(budget));
4480 i += tx_ring->count;
4481 tx_ring->next_to_clean = i;
4483 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4484 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4490 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4491 * @irq: interrupt number
4492 * @data: pointer to a q_vector
4494 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4496 struct i40e_q_vector *q_vector = data;
4497 struct i40e_vsi *vsi;
4499 if (!q_vector->tx.ring)
4502 vsi = q_vector->tx.ring->vsi;
4503 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4509 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4510 * @vsi: the VSI being configured
4511 * @v_idx: vector index
4512 * @qp_idx: queue pair index
4514 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4516 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4517 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4518 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4520 tx_ring->q_vector = q_vector;
4521 tx_ring->next = q_vector->tx.ring;
4522 q_vector->tx.ring = tx_ring;
4523 q_vector->tx.count++;
4525 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4526 if (i40e_enabled_xdp_vsi(vsi)) {
4527 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4529 xdp_ring->q_vector = q_vector;
4530 xdp_ring->next = q_vector->tx.ring;
4531 q_vector->tx.ring = xdp_ring;
4532 q_vector->tx.count++;
4535 rx_ring->q_vector = q_vector;
4536 rx_ring->next = q_vector->rx.ring;
4537 q_vector->rx.ring = rx_ring;
4538 q_vector->rx.count++;
4542 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4543 * @vsi: the VSI being configured
4545 * This function maps descriptor rings to the queue-specific vectors
4546 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4547 * one vector per queue pair, but on a constrained vector budget, we
4548 * group the queue pairs as "efficiently" as possible.
4550 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4552 int qp_remaining = vsi->num_queue_pairs;
4553 int q_vectors = vsi->num_q_vectors;
4558 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4559 * group them so there are multiple queues per vector.
4560 * It is also important to go through all the vectors available to be
4561 * sure that if we don't use all the vectors, that the remaining vectors
4562 * are cleared. This is especially important when decreasing the
4563 * number of queues in use.
4565 for (; v_start < q_vectors; v_start++) {
4566 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4568 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4570 q_vector->num_ringpairs = num_ringpairs;
4571 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4573 q_vector->rx.count = 0;
4574 q_vector->tx.count = 0;
4575 q_vector->rx.ring = NULL;
4576 q_vector->tx.ring = NULL;
4578 while (num_ringpairs--) {
4579 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4587 * i40e_vsi_request_irq - Request IRQ from the OS
4588 * @vsi: the VSI being configured
4589 * @basename: name for the vector
4591 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4593 struct i40e_pf *pf = vsi->back;
4596 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4597 err = i40e_vsi_request_irq_msix(vsi, basename);
4598 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4599 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4602 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4606 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4611 #ifdef CONFIG_NET_POLL_CONTROLLER
4613 * i40e_netpoll - A Polling 'interrupt' handler
4614 * @netdev: network interface device structure
4616 * This is used by netconsole to send skbs without having to re-enable
4617 * interrupts. It's not called while the normal interrupt routine is executing.
4619 static void i40e_netpoll(struct net_device *netdev)
4621 struct i40e_netdev_priv *np = netdev_priv(netdev);
4622 struct i40e_vsi *vsi = np->vsi;
4623 struct i40e_pf *pf = vsi->back;
4626 /* if interface is down do nothing */
4627 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4630 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4631 for (i = 0; i < vsi->num_q_vectors; i++)
4632 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4634 i40e_intr(pf->pdev->irq, netdev);
4639 #define I40E_QTX_ENA_WAIT_COUNT 50
4642 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4643 * @pf: the PF being configured
4644 * @pf_q: the PF queue
4645 * @enable: enable or disable state of the queue
4647 * This routine will wait for the given Tx queue of the PF to reach the
4648 * enabled or disabled state.
4649 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4650 * multiple retries; else will return 0 in case of success.
4652 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4657 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4658 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4659 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4662 usleep_range(10, 20);
4664 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4671 * i40e_control_tx_q - Start or stop a particular Tx queue
4672 * @pf: the PF structure
4673 * @pf_q: the PF queue to configure
4674 * @enable: start or stop the queue
4676 * This function enables or disables a single queue. Note that any delay
4677 * required after the operation is expected to be handled by the caller of
4680 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4682 struct i40e_hw *hw = &pf->hw;
4686 /* warn the TX unit of coming changes */
4687 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4689 usleep_range(10, 20);
4691 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4692 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4693 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4694 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4696 usleep_range(1000, 2000);
4699 /* Skip if the queue is already in the requested state */
4700 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4703 /* turn on/off the queue */
4705 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4706 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4708 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4711 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4715 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4717 * @pf: the PF structure
4718 * @pf_q: the PF queue to configure
4719 * @is_xdp: true if the queue is used for XDP
4720 * @enable: start or stop the queue
4722 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4723 bool is_xdp, bool enable)
4727 i40e_control_tx_q(pf, pf_q, enable);
4729 /* wait for the change to finish */
4730 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4732 dev_info(&pf->pdev->dev,
4733 "VSI seid %d %sTx ring %d %sable timeout\n",
4734 seid, (is_xdp ? "XDP " : ""), pf_q,
4735 (enable ? "en" : "dis"));
4742 * i40e_vsi_enable_tx - Start a VSI's rings
4743 * @vsi: the VSI being configured
4745 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4747 struct i40e_pf *pf = vsi->back;
4748 int i, pf_q, ret = 0;
4750 pf_q = vsi->base_queue;
4751 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4752 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4754 false /*is xdp*/, true);
4758 if (!i40e_enabled_xdp_vsi(vsi))
4761 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4762 pf_q + vsi->alloc_queue_pairs,
4763 true /*is xdp*/, true);
4771 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4772 * @pf: the PF being configured
4773 * @pf_q: the PF queue
4774 * @enable: enable or disable state of the queue
4776 * This routine will wait for the given Rx queue of the PF to reach the
4777 * enabled or disabled state.
4778 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4779 * multiple retries; else will return 0 in case of success.
4781 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4786 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4787 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4788 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4791 usleep_range(10, 20);
4793 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4800 * i40e_control_rx_q - Start or stop a particular Rx queue
4801 * @pf: the PF structure
4802 * @pf_q: the PF queue to configure
4803 * @enable: start or stop the queue
4805 * This function enables or disables a single queue. Note that
4806 * any delay required after the operation is expected to be
4807 * handled by the caller of this function.
4809 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4811 struct i40e_hw *hw = &pf->hw;
4815 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4816 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4817 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4818 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4820 usleep_range(1000, 2000);
4823 /* Skip if the queue is already in the requested state */
4824 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4827 /* turn on/off the queue */
4829 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4831 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4833 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4837 * i40e_control_wait_rx_q
4838 * @pf: the PF structure
4839 * @pf_q: queue being configured
4840 * @enable: start or stop the rings
4842 * This function enables or disables a single queue along with waiting
4843 * for the change to finish. The caller of this function should handle
4844 * the delays needed in the case of disabling queues.
4846 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4850 i40e_control_rx_q(pf, pf_q, enable);
4852 /* wait for the change to finish */
4853 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4861 * i40e_vsi_enable_rx - Start a VSI's rings
4862 * @vsi: the VSI being configured
4864 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4866 struct i40e_pf *pf = vsi->back;
4867 int i, pf_q, ret = 0;
4869 pf_q = vsi->base_queue;
4870 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4871 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4873 dev_info(&pf->pdev->dev,
4874 "VSI seid %d Rx ring %d enable timeout\n",
4884 * i40e_vsi_start_rings - Start a VSI's rings
4885 * @vsi: the VSI being configured
4887 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4891 /* do rx first for enable and last for disable */
4892 ret = i40e_vsi_enable_rx(vsi);
4895 ret = i40e_vsi_enable_tx(vsi);
4900 #define I40E_DISABLE_TX_GAP_MSEC 50
4903 * i40e_vsi_stop_rings - Stop a VSI's rings
4904 * @vsi: the VSI being configured
4906 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4908 struct i40e_pf *pf = vsi->back;
4909 int pf_q, err, q_end;
4911 /* When port TX is suspended, don't wait */
4912 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4913 return i40e_vsi_stop_rings_no_wait(vsi);
4915 q_end = vsi->base_queue + vsi->num_queue_pairs;
4916 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4917 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4919 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4920 err = i40e_control_wait_rx_q(pf, pf_q, false);
4922 dev_info(&pf->pdev->dev,
4923 "VSI seid %d Rx ring %d disable timeout\n",
4927 msleep(I40E_DISABLE_TX_GAP_MSEC);
4928 pf_q = vsi->base_queue;
4929 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4930 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4932 i40e_vsi_wait_queues_disabled(vsi);
4936 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4937 * @vsi: the VSI being shutdown
4939 * This function stops all the rings for a VSI but does not delay to verify
4940 * that rings have been disabled. It is expected that the caller is shutting
4941 * down multiple VSIs at once and will delay together for all the VSIs after
4942 * initiating the shutdown. This is particularly useful for shutting down lots
4943 * of VFs together. Otherwise, a large delay can be incurred while configuring
4944 * each VSI in serial.
4946 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4948 struct i40e_pf *pf = vsi->back;
4951 pf_q = vsi->base_queue;
4952 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4953 i40e_control_tx_q(pf, pf_q, false);
4954 i40e_control_rx_q(pf, pf_q, false);
4959 * i40e_vsi_free_irq - Free the irq association with the OS
4960 * @vsi: the VSI being configured
4962 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4964 struct i40e_pf *pf = vsi->back;
4965 struct i40e_hw *hw = &pf->hw;
4966 int base = vsi->base_vector;
4970 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4971 if (!vsi->q_vectors)
4974 if (!vsi->irqs_ready)
4977 vsi->irqs_ready = false;
4978 for (i = 0; i < vsi->num_q_vectors; i++) {
4983 irq_num = pf->msix_entries[vector].vector;
4985 /* free only the irqs that were actually requested */
4986 if (!vsi->q_vectors[i] ||
4987 !vsi->q_vectors[i]->num_ringpairs)
4990 /* clear the affinity notifier in the IRQ descriptor */
4991 irq_set_affinity_notifier(irq_num, NULL);
4992 /* remove our suggested affinity mask for this IRQ */
4993 irq_update_affinity_hint(irq_num, NULL);
4994 free_irq(irq_num, vsi->q_vectors[i]);
4996 /* Tear down the interrupt queue link list
4998 * We know that they come in pairs and always
4999 * the Rx first, then the Tx. To clear the
5000 * link list, stick the EOL value into the
5001 * next_q field of the registers.
5003 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
5004 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
5005 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5006 val |= I40E_QUEUE_END_OF_LIST
5007 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5008 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
5010 while (qp != I40E_QUEUE_END_OF_LIST) {
5013 val = rd32(hw, I40E_QINT_RQCTL(qp));
5015 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5016 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5017 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5018 I40E_QINT_RQCTL_INTEVENT_MASK);
5020 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5021 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5023 wr32(hw, I40E_QINT_RQCTL(qp), val);
5025 val = rd32(hw, I40E_QINT_TQCTL(qp));
5027 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
5028 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
5030 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5031 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5032 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5033 I40E_QINT_TQCTL_INTEVENT_MASK);
5035 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5036 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5038 wr32(hw, I40E_QINT_TQCTL(qp), val);
5043 free_irq(pf->pdev->irq, pf);
5045 val = rd32(hw, I40E_PFINT_LNKLST0);
5046 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
5047 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
5048 val |= I40E_QUEUE_END_OF_LIST
5049 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
5050 wr32(hw, I40E_PFINT_LNKLST0, val);
5052 val = rd32(hw, I40E_QINT_RQCTL(qp));
5053 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
5054 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
5055 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
5056 I40E_QINT_RQCTL_INTEVENT_MASK);
5058 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
5059 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
5061 wr32(hw, I40E_QINT_RQCTL(qp), val);
5063 val = rd32(hw, I40E_QINT_TQCTL(qp));
5065 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
5066 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
5067 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
5068 I40E_QINT_TQCTL_INTEVENT_MASK);
5070 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
5071 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
5073 wr32(hw, I40E_QINT_TQCTL(qp), val);
5078 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
5079 * @vsi: the VSI being configured
5080 * @v_idx: Index of vector to be freed
5082 * This function frees the memory allocated to the q_vector. In addition if
5083 * NAPI is enabled it will delete any references to the NAPI struct prior
5084 * to freeing the q_vector.
5086 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
5088 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
5089 struct i40e_ring *ring;
5094 /* disassociate q_vector from rings */
5095 i40e_for_each_ring(ring, q_vector->tx)
5096 ring->q_vector = NULL;
5098 i40e_for_each_ring(ring, q_vector->rx)
5099 ring->q_vector = NULL;
5101 /* only VSI w/ an associated netdev is set up w/ NAPI */
5103 netif_napi_del(&q_vector->napi);
5105 vsi->q_vectors[v_idx] = NULL;
5107 kfree_rcu(q_vector, rcu);
5111 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
5112 * @vsi: the VSI being un-configured
5114 * This frees the memory allocated to the q_vectors and
5115 * deletes references to the NAPI struct.
5117 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
5121 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
5122 i40e_free_q_vector(vsi, v_idx);
5126 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
5127 * @pf: board private structure
5129 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
5131 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
5132 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5133 pci_disable_msix(pf->pdev);
5134 kfree(pf->msix_entries);
5135 pf->msix_entries = NULL;
5136 kfree(pf->irq_pile);
5137 pf->irq_pile = NULL;
5138 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
5139 pci_disable_msi(pf->pdev);
5141 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
5145 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5146 * @pf: board private structure
5148 * We go through and clear interrupt specific resources and reset the structure
5149 * to pre-load conditions
5151 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5155 if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5156 i40e_free_misc_vector(pf);
5158 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5159 I40E_IWARP_IRQ_PILE_ID);
5161 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5162 for (i = 0; i < pf->num_alloc_vsi; i++)
5164 i40e_vsi_free_q_vectors(pf->vsi[i]);
5165 i40e_reset_interrupt_capability(pf);
5169 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5170 * @vsi: the VSI being configured
5172 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5179 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5180 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5182 if (q_vector->rx.ring || q_vector->tx.ring)
5183 napi_enable(&q_vector->napi);
5188 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5189 * @vsi: the VSI being configured
5191 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5198 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5199 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5201 if (q_vector->rx.ring || q_vector->tx.ring)
5202 napi_disable(&q_vector->napi);
5207 * i40e_vsi_close - Shut down a VSI
5208 * @vsi: the vsi to be quelled
5210 static void i40e_vsi_close(struct i40e_vsi *vsi)
5212 struct i40e_pf *pf = vsi->back;
5213 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5215 i40e_vsi_free_irq(vsi);
5216 i40e_vsi_free_tx_resources(vsi);
5217 i40e_vsi_free_rx_resources(vsi);
5218 vsi->current_netdev_flags = 0;
5219 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5220 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5221 set_bit(__I40E_CLIENT_RESET, pf->state);
5225 * i40e_quiesce_vsi - Pause a given VSI
5226 * @vsi: the VSI being paused
5228 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5230 if (test_bit(__I40E_VSI_DOWN, vsi->state))
5233 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5234 if (vsi->netdev && netif_running(vsi->netdev))
5235 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5237 i40e_vsi_close(vsi);
5241 * i40e_unquiesce_vsi - Resume a given VSI
5242 * @vsi: the VSI being resumed
5244 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5246 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5249 if (vsi->netdev && netif_running(vsi->netdev))
5250 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5252 i40e_vsi_open(vsi); /* this clears the DOWN bit */
5256 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5259 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5263 for (v = 0; v < pf->num_alloc_vsi; v++) {
5265 i40e_quiesce_vsi(pf->vsi[v]);
5270 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5273 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5277 for (v = 0; v < pf->num_alloc_vsi; v++) {
5279 i40e_unquiesce_vsi(pf->vsi[v]);
5284 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5285 * @vsi: the VSI being configured
5287 * Wait until all queues on a given VSI have been disabled.
5289 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5291 struct i40e_pf *pf = vsi->back;
5294 pf_q = vsi->base_queue;
5295 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5296 /* Check and wait for the Tx queue */
5297 ret = i40e_pf_txq_wait(pf, pf_q, false);
5299 dev_info(&pf->pdev->dev,
5300 "VSI seid %d Tx ring %d disable timeout\n",
5305 if (!i40e_enabled_xdp_vsi(vsi))
5308 /* Check and wait for the XDP Tx queue */
5309 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5312 dev_info(&pf->pdev->dev,
5313 "VSI seid %d XDP Tx ring %d disable timeout\n",
5318 /* Check and wait for the Rx queue */
5319 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5321 dev_info(&pf->pdev->dev,
5322 "VSI seid %d Rx ring %d disable timeout\n",
5331 #ifdef CONFIG_I40E_DCB
5333 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5336 * This function waits for the queues to be in disabled state for all the
5337 * VSIs that are managed by this PF.
5339 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5343 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5345 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5357 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5358 * @pf: pointer to PF
5360 * Get TC map for ISCSI PF type that will include iSCSI TC
5363 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5365 struct i40e_dcb_app_priority_table app;
5366 struct i40e_hw *hw = &pf->hw;
5367 u8 enabled_tc = 1; /* TC0 is always enabled */
5369 /* Get the iSCSI APP TLV */
5370 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5372 for (i = 0; i < dcbcfg->numapps; i++) {
5373 app = dcbcfg->app[i];
5374 if (app.selector == I40E_APP_SEL_TCPIP &&
5375 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5376 tc = dcbcfg->etscfg.prioritytable[app.priority];
5377 enabled_tc |= BIT(tc);
5386 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5387 * @dcbcfg: the corresponding DCBx configuration structure
5389 * Return the number of TCs from given DCBx configuration
5391 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5393 int i, tc_unused = 0;
5397 /* Scan the ETS Config Priority Table to find
5398 * traffic class enabled for a given priority
5399 * and create a bitmask of enabled TCs
5401 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5402 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5404 /* Now scan the bitmask to check for
5405 * contiguous TCs starting with TC0
5407 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5408 if (num_tc & BIT(i)) {
5412 pr_err("Non-contiguous TC - Disabling DCB\n");
5420 /* There is always at least TC0 */
5428 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5429 * @dcbcfg: the corresponding DCBx configuration structure
5431 * Query the current DCB configuration and return the number of
5432 * traffic classes enabled from the given DCBX config
5434 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5436 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5440 for (i = 0; i < num_tc; i++)
5441 enabled_tc |= BIT(i);
5447 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5448 * @pf: PF being queried
5450 * Query the current MQPRIO configuration and return the number of
5451 * traffic classes enabled.
5453 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5455 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5456 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5457 u8 enabled_tc = 1, i;
5459 for (i = 1; i < num_tc; i++)
5460 enabled_tc |= BIT(i);
5465 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5466 * @pf: PF being queried
5468 * Return number of traffic classes enabled for the given PF
5470 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5472 struct i40e_hw *hw = &pf->hw;
5473 u8 i, enabled_tc = 1;
5475 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5477 if (i40e_is_tc_mqprio_enabled(pf))
5478 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5480 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5481 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5484 /* SFP mode will be enabled for all TCs on port */
5485 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5486 return i40e_dcb_get_num_tc(dcbcfg);
5488 /* MFP mode return count of enabled TCs for this PF */
5489 if (pf->hw.func_caps.iscsi)
5490 enabled_tc = i40e_get_iscsi_tc_map(pf);
5492 return 1; /* Only TC0 */
5494 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5495 if (enabled_tc & BIT(i))
5502 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5503 * @pf: PF being queried
5505 * Return a bitmap for enabled traffic classes for this PF.
5507 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5509 if (i40e_is_tc_mqprio_enabled(pf))
5510 return i40e_mqprio_get_enabled_tc(pf);
5512 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5515 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5516 return I40E_DEFAULT_TRAFFIC_CLASS;
5518 /* SFP mode we want PF to be enabled for all TCs */
5519 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5520 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5522 /* MFP enabled and iSCSI PF type */
5523 if (pf->hw.func_caps.iscsi)
5524 return i40e_get_iscsi_tc_map(pf);
5526 return I40E_DEFAULT_TRAFFIC_CLASS;
5530 * i40e_vsi_get_bw_info - Query VSI BW Information
5531 * @vsi: the VSI being queried
5533 * Returns 0 on success, negative value on failure
5535 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5537 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5538 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5539 struct i40e_pf *pf = vsi->back;
5540 struct i40e_hw *hw = &pf->hw;
5545 /* Get the VSI level BW configuration */
5546 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5548 dev_info(&pf->pdev->dev,
5549 "couldn't get PF vsi bw config, err %pe aq_err %s\n",
5551 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5555 /* Get the VSI level BW configuration per TC */
5556 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5559 dev_info(&pf->pdev->dev,
5560 "couldn't get PF vsi ets bw config, err %pe aq_err %s\n",
5562 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5566 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5567 dev_info(&pf->pdev->dev,
5568 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5569 bw_config.tc_valid_bits,
5570 bw_ets_config.tc_valid_bits);
5571 /* Still continuing */
5574 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5575 vsi->bw_max_quanta = bw_config.max_bw;
5576 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5577 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5578 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5579 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5580 vsi->bw_ets_limit_credits[i] =
5581 le16_to_cpu(bw_ets_config.credits[i]);
5582 /* 3 bits out of 4 for each TC */
5583 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5590 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5591 * @vsi: the VSI being configured
5592 * @enabled_tc: TC bitmap
5593 * @bw_share: BW shared credits per TC
5595 * Returns 0 on success, negative value on failure
5597 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5600 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5601 struct i40e_pf *pf = vsi->back;
5605 /* There is no need to reset BW when mqprio mode is on. */
5606 if (i40e_is_tc_mqprio_enabled(pf))
5608 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5609 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5611 dev_info(&pf->pdev->dev,
5612 "Failed to reset tx rate for vsi->seid %u\n",
5616 memset(&bw_data, 0, sizeof(bw_data));
5617 bw_data.tc_valid_bits = enabled_tc;
5618 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5619 bw_data.tc_bw_credits[i] = bw_share[i];
5621 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5623 dev_info(&pf->pdev->dev,
5624 "AQ command Config VSI BW allocation per TC failed = %d\n",
5625 pf->hw.aq.asq_last_status);
5629 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5630 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5636 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5637 * @vsi: the VSI being configured
5638 * @enabled_tc: TC map to be enabled
5641 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5643 struct net_device *netdev = vsi->netdev;
5644 struct i40e_pf *pf = vsi->back;
5645 struct i40e_hw *hw = &pf->hw;
5648 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5654 netdev_reset_tc(netdev);
5658 /* Set up actual enabled TCs on the VSI */
5659 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5662 /* set per TC queues for the VSI */
5663 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5664 /* Only set TC queues for enabled tcs
5666 * e.g. For a VSI that has TC0 and TC3 enabled the
5667 * enabled_tc bitmap would be 0x00001001; the driver
5668 * will set the numtc for netdev as 2 that will be
5669 * referenced by the netdev layer as TC 0 and 1.
5671 if (vsi->tc_config.enabled_tc & BIT(i))
5672 netdev_set_tc_queue(netdev,
5673 vsi->tc_config.tc_info[i].netdev_tc,
5674 vsi->tc_config.tc_info[i].qcount,
5675 vsi->tc_config.tc_info[i].qoffset);
5678 if (i40e_is_tc_mqprio_enabled(pf))
5681 /* Assign UP2TC map for the VSI */
5682 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5683 /* Get the actual TC# for the UP */
5684 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5685 /* Get the mapped netdev TC# for the UP */
5686 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5687 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5692 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5693 * @vsi: the VSI being configured
5694 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5696 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5697 struct i40e_vsi_context *ctxt)
5699 /* copy just the sections touched not the entire info
5700 * since not all sections are valid as returned by
5703 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5704 memcpy(&vsi->info.queue_mapping,
5705 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5706 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5707 sizeof(vsi->info.tc_mapping));
5711 * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5712 * @vsi: the VSI being reconfigured
5713 * @vsi_offset: offset from main VF VSI
5715 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5717 struct i40e_vsi_context ctxt = {};
5727 ctxt.seid = vsi->seid;
5728 ctxt.pf_num = hw->pf_id;
5729 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5730 ctxt.uplink_seid = vsi->uplink_seid;
5731 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5732 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5733 ctxt.info = vsi->info;
5735 i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5737 if (vsi->reconfig_rss) {
5738 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5739 vsi->num_queue_pairs);
5740 ret = i40e_vsi_config_rss(vsi);
5742 dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5745 vsi->reconfig_rss = false;
5748 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5750 dev_info(&pf->pdev->dev, "Update vsi config failed, err %pe aq_err %s\n",
5752 i40e_aq_str(hw, hw->aq.asq_last_status));
5755 /* update the local VSI info with updated queue map */
5756 i40e_vsi_update_queue_map(vsi, &ctxt);
5757 vsi->info.valid_sections = 0;
5763 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5764 * @vsi: VSI to be configured
5765 * @enabled_tc: TC bitmap
5767 * This configures a particular VSI for TCs that are mapped to the
5768 * given TC bitmap. It uses default bandwidth share for TCs across
5769 * VSIs to configure TC for a particular VSI.
5772 * It is expected that the VSI queues have been quisced before calling
5775 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5777 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5778 struct i40e_pf *pf = vsi->back;
5779 struct i40e_hw *hw = &pf->hw;
5780 struct i40e_vsi_context ctxt;
5784 /* Check if enabled_tc is same as existing or new TCs */
5785 if (vsi->tc_config.enabled_tc == enabled_tc &&
5786 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5789 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5790 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5791 if (enabled_tc & BIT(i))
5795 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5797 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5799 dev_info(&pf->pdev->dev,
5800 "Failed configuring TC map %d for VSI %d\n",
5801 enabled_tc, vsi->seid);
5802 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5805 dev_info(&pf->pdev->dev,
5806 "Failed querying vsi bw info, err %pe aq_err %s\n",
5808 i40e_aq_str(hw, hw->aq.asq_last_status));
5811 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5812 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5815 valid_tc = bw_config.tc_valid_bits;
5816 /* Always enable TC0, no matter what */
5818 dev_info(&pf->pdev->dev,
5819 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5820 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5821 enabled_tc = valid_tc;
5824 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5826 dev_err(&pf->pdev->dev,
5827 "Unable to configure TC map %d for VSI %d\n",
5828 enabled_tc, vsi->seid);
5833 /* Update Queue Pairs Mapping for currently enabled UPs */
5834 ctxt.seid = vsi->seid;
5835 ctxt.pf_num = vsi->back->hw.pf_id;
5837 ctxt.uplink_seid = vsi->uplink_seid;
5838 ctxt.info = vsi->info;
5839 if (i40e_is_tc_mqprio_enabled(pf)) {
5840 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5844 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5847 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5850 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5851 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5852 vsi->num_queue_pairs);
5853 ret = i40e_vsi_config_rss(vsi);
5855 dev_info(&vsi->back->pdev->dev,
5856 "Failed to reconfig rss for num_queues\n");
5859 vsi->reconfig_rss = false;
5861 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5862 ctxt.info.valid_sections |=
5863 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5864 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5867 /* Update the VSI after updating the VSI queue-mapping
5870 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5872 dev_info(&pf->pdev->dev,
5873 "Update vsi tc config failed, err %pe aq_err %s\n",
5875 i40e_aq_str(hw, hw->aq.asq_last_status));
5878 /* update the local VSI info with updated queue map */
5879 i40e_vsi_update_queue_map(vsi, &ctxt);
5880 vsi->info.valid_sections = 0;
5882 /* Update current VSI BW information */
5883 ret = i40e_vsi_get_bw_info(vsi);
5885 dev_info(&pf->pdev->dev,
5886 "Failed updating vsi bw info, err %pe aq_err %s\n",
5888 i40e_aq_str(hw, hw->aq.asq_last_status));
5892 /* Update the netdev TC setup */
5893 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5899 * i40e_get_link_speed - Returns link speed for the interface
5900 * @vsi: VSI to be configured
5903 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5905 struct i40e_pf *pf = vsi->back;
5907 switch (pf->hw.phy.link_info.link_speed) {
5908 case I40E_LINK_SPEED_40GB:
5910 case I40E_LINK_SPEED_25GB:
5912 case I40E_LINK_SPEED_20GB:
5914 case I40E_LINK_SPEED_10GB:
5916 case I40E_LINK_SPEED_1GB:
5924 * i40e_bw_bytes_to_mbits - Convert max_tx_rate from bytes to mbits
5925 * @vsi: Pointer to vsi structure
5926 * @max_tx_rate: max TX rate in bytes to be converted into Mbits
5928 * Helper function to convert units before send to set BW limit
5930 static u64 i40e_bw_bytes_to_mbits(struct i40e_vsi *vsi, u64 max_tx_rate)
5932 if (max_tx_rate < I40E_BW_MBPS_DIVISOR) {
5933 dev_warn(&vsi->back->pdev->dev,
5934 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5935 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5937 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
5944 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5945 * @vsi: VSI to be configured
5946 * @seid: seid of the channel/VSI
5947 * @max_tx_rate: max TX rate to be configured as BW limit
5949 * Helper function to set BW limit for a given VSI
5951 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5953 struct i40e_pf *pf = vsi->back;
5958 speed = i40e_get_link_speed(vsi);
5959 if (max_tx_rate > speed) {
5960 dev_err(&pf->pdev->dev,
5961 "Invalid max tx rate %llu specified for VSI seid %d.",
5965 if (max_tx_rate && max_tx_rate < I40E_BW_CREDIT_DIVISOR) {
5966 dev_warn(&pf->pdev->dev,
5967 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5968 max_tx_rate = I40E_BW_CREDIT_DIVISOR;
5971 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5972 credits = max_tx_rate;
5973 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5974 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5975 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5977 dev_err(&pf->pdev->dev,
5978 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %pe aq_err %s\n",
5979 max_tx_rate, seid, ERR_PTR(ret),
5980 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5985 * i40e_remove_queue_channels - Remove queue channels for the TCs
5986 * @vsi: VSI to be configured
5988 * Remove queue channels for the TCs
5990 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5992 enum i40e_admin_queue_err last_aq_status;
5993 struct i40e_cloud_filter *cfilter;
5994 struct i40e_channel *ch, *ch_tmp;
5995 struct i40e_pf *pf = vsi->back;
5996 struct hlist_node *node;
5999 /* Reset rss size that was stored when reconfiguring rss for
6000 * channel VSIs with non-power-of-2 queue count.
6002 vsi->current_rss_size = 0;
6004 /* perform cleanup for channels if they exist */
6005 if (list_empty(&vsi->ch_list))
6008 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6009 struct i40e_vsi *p_vsi;
6011 list_del(&ch->list);
6012 p_vsi = ch->parent_vsi;
6013 if (!p_vsi || !ch->initialized) {
6017 /* Reset queue contexts */
6018 for (i = 0; i < ch->num_queue_pairs; i++) {
6019 struct i40e_ring *tx_ring, *rx_ring;
6022 pf_q = ch->base_queue + i;
6023 tx_ring = vsi->tx_rings[pf_q];
6026 rx_ring = vsi->rx_rings[pf_q];
6030 /* Reset BW configured for this VSI via mqprio */
6031 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
6033 dev_info(&vsi->back->pdev->dev,
6034 "Failed to reset tx rate for ch->seid %u\n",
6037 /* delete cloud filters associated with this channel */
6038 hlist_for_each_entry_safe(cfilter, node,
6039 &pf->cloud_filter_list, cloud_node) {
6040 if (cfilter->seid != ch->seid)
6043 hash_del(&cfilter->cloud_node);
6044 if (cfilter->dst_port)
6045 ret = i40e_add_del_cloud_filter_big_buf(vsi,
6049 ret = i40e_add_del_cloud_filter(vsi, cfilter,
6051 last_aq_status = pf->hw.aq.asq_last_status;
6053 dev_info(&pf->pdev->dev,
6054 "Failed to delete cloud filter, err %pe aq_err %s\n",
6056 i40e_aq_str(&pf->hw, last_aq_status));
6060 /* delete VSI from FW */
6061 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
6064 dev_err(&vsi->back->pdev->dev,
6065 "unable to remove channel (%d) for parent VSI(%d)\n",
6066 ch->seid, p_vsi->seid);
6069 INIT_LIST_HEAD(&vsi->ch_list);
6073 * i40e_get_max_queues_for_channel
6074 * @vsi: ptr to VSI to which channels are associated with
6076 * Helper function which returns max value among the queue counts set on the
6077 * channels/TCs created.
6079 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
6081 struct i40e_channel *ch, *ch_tmp;
6084 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
6085 if (!ch->initialized)
6087 if (ch->num_queue_pairs > max)
6088 max = ch->num_queue_pairs;
6095 * i40e_validate_num_queues - validate num_queues w.r.t channel
6096 * @pf: ptr to PF device
6097 * @num_queues: number of queues
6098 * @vsi: the parent VSI
6099 * @reconfig_rss: indicates should the RSS be reconfigured or not
6101 * This function validates number of queues in the context of new channel
6102 * which is being established and determines if RSS should be reconfigured
6103 * or not for parent VSI.
6105 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
6106 struct i40e_vsi *vsi, bool *reconfig_rss)
6113 *reconfig_rss = false;
6114 if (vsi->current_rss_size) {
6115 if (num_queues > vsi->current_rss_size) {
6116 dev_dbg(&pf->pdev->dev,
6117 "Error: num_queues (%d) > vsi's current_size(%d)\n",
6118 num_queues, vsi->current_rss_size);
6120 } else if ((num_queues < vsi->current_rss_size) &&
6121 (!is_power_of_2(num_queues))) {
6122 dev_dbg(&pf->pdev->dev,
6123 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
6124 num_queues, vsi->current_rss_size);
6129 if (!is_power_of_2(num_queues)) {
6130 /* Find the max num_queues configured for channel if channel
6132 * if channel exist, then enforce 'num_queues' to be more than
6133 * max ever queues configured for channel.
6135 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
6136 if (num_queues < max_ch_queues) {
6137 dev_dbg(&pf->pdev->dev,
6138 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
6139 num_queues, max_ch_queues);
6142 *reconfig_rss = true;
6149 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
6150 * @vsi: the VSI being setup
6151 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
6153 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
6155 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
6157 struct i40e_pf *pf = vsi->back;
6158 u8 seed[I40E_HKEY_ARRAY_SIZE];
6159 struct i40e_hw *hw = &pf->hw;
6167 if (rss_size > vsi->rss_size)
6170 local_rss_size = min_t(int, vsi->rss_size, rss_size);
6171 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6175 /* Ignoring user configured lut if there is one */
6176 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6178 /* Use user configured hash key if there is one, otherwise
6181 if (vsi->rss_hkey_user)
6182 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6184 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6186 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6188 dev_info(&pf->pdev->dev,
6189 "Cannot set RSS lut, err %pe aq_err %s\n",
6191 i40e_aq_str(hw, hw->aq.asq_last_status));
6197 /* Do the update w.r.t. storing rss_size */
6198 if (!vsi->orig_rss_size)
6199 vsi->orig_rss_size = vsi->rss_size;
6200 vsi->current_rss_size = local_rss_size;
6206 * i40e_channel_setup_queue_map - Setup a channel queue map
6207 * @pf: ptr to PF device
6208 * @ctxt: VSI context structure
6209 * @ch: ptr to channel structure
6211 * Setup queue map for a specific channel
6213 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6214 struct i40e_vsi_context *ctxt,
6215 struct i40e_channel *ch)
6217 u16 qcount, qmap, sections = 0;
6221 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6222 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6224 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6225 ch->num_queue_pairs = qcount;
6227 /* find the next higher power-of-2 of num queue pairs */
6228 pow = ilog2(qcount);
6229 if (!is_power_of_2(qcount))
6232 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6233 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6235 /* Setup queue TC[0].qmap for given VSI context */
6236 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6238 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6239 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6240 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6241 ctxt->info.valid_sections |= cpu_to_le16(sections);
6245 * i40e_add_channel - add a channel by adding VSI
6246 * @pf: ptr to PF device
6247 * @uplink_seid: underlying HW switching element (VEB) ID
6248 * @ch: ptr to channel structure
6250 * Add a channel (VSI) using add_vsi and queue_map
6252 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6253 struct i40e_channel *ch)
6255 struct i40e_hw *hw = &pf->hw;
6256 struct i40e_vsi_context ctxt;
6257 u8 enabled_tc = 0x1; /* TC0 enabled */
6260 if (ch->type != I40E_VSI_VMDQ2) {
6261 dev_info(&pf->pdev->dev,
6262 "add new vsi failed, ch->type %d\n", ch->type);
6266 memset(&ctxt, 0, sizeof(ctxt));
6267 ctxt.pf_num = hw->pf_id;
6269 ctxt.uplink_seid = uplink_seid;
6270 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6271 if (ch->type == I40E_VSI_VMDQ2)
6272 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6274 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
6275 ctxt.info.valid_sections |=
6276 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6277 ctxt.info.switch_id =
6278 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6281 /* Set queue map for a given VSI context */
6282 i40e_channel_setup_queue_map(pf, &ctxt, ch);
6284 /* Now time to create VSI */
6285 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6287 dev_info(&pf->pdev->dev,
6288 "add new vsi failed, err %pe aq_err %s\n",
6290 i40e_aq_str(&pf->hw,
6291 pf->hw.aq.asq_last_status));
6295 /* Success, update channel, set enabled_tc only if the channel
6298 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6299 ch->seid = ctxt.seid;
6300 ch->vsi_number = ctxt.vsi_number;
6301 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6303 /* copy just the sections touched not the entire info
6304 * since not all sections are valid as returned by
6307 ch->info.mapping_flags = ctxt.info.mapping_flags;
6308 memcpy(&ch->info.queue_mapping,
6309 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6310 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6311 sizeof(ctxt.info.tc_mapping));
6316 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6319 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6323 memset(&bw_data, 0, sizeof(bw_data));
6324 bw_data.tc_valid_bits = ch->enabled_tc;
6325 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6326 bw_data.tc_bw_credits[i] = bw_share[i];
6328 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6331 dev_info(&vsi->back->pdev->dev,
6332 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6333 vsi->back->hw.aq.asq_last_status, ch->seid);
6337 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6338 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6344 * i40e_channel_config_tx_ring - config TX ring associated with new channel
6345 * @pf: ptr to PF device
6346 * @vsi: the VSI being setup
6347 * @ch: ptr to channel structure
6349 * Configure TX rings associated with channel (VSI) since queues are being
6352 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6353 struct i40e_vsi *vsi,
6354 struct i40e_channel *ch)
6356 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6360 /* Enable ETS TCs with equal BW Share for now across all VSIs */
6361 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6362 if (ch->enabled_tc & BIT(i))
6366 /* configure BW for new VSI */
6367 ret = i40e_channel_config_bw(vsi, ch, bw_share);
6369 dev_info(&vsi->back->pdev->dev,
6370 "Failed configuring TC map %d for channel (seid %u)\n",
6371 ch->enabled_tc, ch->seid);
6375 for (i = 0; i < ch->num_queue_pairs; i++) {
6376 struct i40e_ring *tx_ring, *rx_ring;
6379 pf_q = ch->base_queue + i;
6381 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6384 tx_ring = vsi->tx_rings[pf_q];
6387 /* Get the RX ring ptr */
6388 rx_ring = vsi->rx_rings[pf_q];
6396 * i40e_setup_hw_channel - setup new channel
6397 * @pf: ptr to PF device
6398 * @vsi: the VSI being setup
6399 * @ch: ptr to channel structure
6400 * @uplink_seid: underlying HW switching element (VEB) ID
6401 * @type: type of channel to be created (VMDq2/VF)
6403 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6404 * and configures TX rings accordingly
6406 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6407 struct i40e_vsi *vsi,
6408 struct i40e_channel *ch,
6409 u16 uplink_seid, u8 type)
6413 ch->initialized = false;
6414 ch->base_queue = vsi->next_base_queue;
6417 /* Proceed with creation of channel (VMDq2) VSI */
6418 ret = i40e_add_channel(pf, uplink_seid, ch);
6420 dev_info(&pf->pdev->dev,
6421 "failed to add_channel using uplink_seid %u\n",
6426 /* Mark the successful creation of channel */
6427 ch->initialized = true;
6429 /* Reconfigure TX queues using QTX_CTL register */
6430 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6432 dev_info(&pf->pdev->dev,
6433 "failed to configure TX rings for channel %u\n",
6438 /* update 'next_base_queue' */
6439 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6440 dev_dbg(&pf->pdev->dev,
6441 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6442 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6443 ch->num_queue_pairs,
6444 vsi->next_base_queue);
6449 * i40e_setup_channel - setup new channel using uplink element
6450 * @pf: ptr to PF device
6451 * @vsi: pointer to the VSI to set up the channel within
6452 * @ch: ptr to channel structure
6454 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6455 * and uplink switching element (uplink_seid)
6457 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6458 struct i40e_channel *ch)
6464 if (vsi->type == I40E_VSI_MAIN) {
6465 vsi_type = I40E_VSI_VMDQ2;
6467 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6472 /* underlying switching element */
6473 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6475 /* create channel (VSI), configure TX rings */
6476 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6478 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6482 return ch->initialized ? true : false;
6486 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6487 * @vsi: ptr to VSI which has PF backing
6489 * Sets up switch mode correctly if it needs to be changed and perform
6490 * what are allowed modes.
6492 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6495 struct i40e_pf *pf = vsi->back;
6496 struct i40e_hw *hw = &pf->hw;
6499 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6503 if (hw->dev_caps.switch_mode) {
6504 /* if switch mode is set, support mode2 (non-tunneled for
6505 * cloud filter) for now
6507 u32 switch_mode = hw->dev_caps.switch_mode &
6508 I40E_SWITCH_MODE_MASK;
6509 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6510 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6512 dev_err(&pf->pdev->dev,
6513 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6514 hw->dev_caps.switch_mode);
6519 /* Set Bit 7 to be valid */
6520 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6522 /* Set L4type for TCP support */
6523 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6525 /* Set cloud filter mode */
6526 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6528 /* Prep mode field for set_switch_config */
6529 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6530 pf->last_sw_conf_valid_flags,
6532 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6533 dev_err(&pf->pdev->dev,
6534 "couldn't set switch config bits, err %pe aq_err %s\n",
6537 hw->aq.asq_last_status));
6543 * i40e_create_queue_channel - function to create channel
6544 * @vsi: VSI to be configured
6545 * @ch: ptr to channel (it contains channel specific params)
6547 * This function creates channel (VSI) using num_queues specified by user,
6548 * reconfigs RSS if needed.
6550 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6551 struct i40e_channel *ch)
6553 struct i40e_pf *pf = vsi->back;
6560 if (!ch->num_queue_pairs) {
6561 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6562 ch->num_queue_pairs);
6566 /* validate user requested num_queues for channel */
6567 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6570 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6571 ch->num_queue_pairs);
6575 /* By default we are in VEPA mode, if this is the first VF/VMDq
6576 * VSI to be added switch to VEB mode.
6579 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6580 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6582 if (vsi->type == I40E_VSI_MAIN) {
6583 if (i40e_is_tc_mqprio_enabled(pf))
6584 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6586 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6588 /* now onwards for main VSI, number of queues will be value
6589 * of TC0's queue count
6593 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6594 * it should be more than num_queues
6596 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6597 dev_dbg(&pf->pdev->dev,
6598 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6599 vsi->cnt_q_avail, ch->num_queue_pairs);
6603 /* reconfig_rss only if vsi type is MAIN_VSI */
6604 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6605 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6607 dev_info(&pf->pdev->dev,
6608 "Error: unable to reconfig rss for num_queues (%u)\n",
6609 ch->num_queue_pairs);
6614 if (!i40e_setup_channel(pf, vsi, ch)) {
6615 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6619 dev_info(&pf->pdev->dev,
6620 "Setup channel (id:%u) utilizing num_queues %d\n",
6621 ch->seid, ch->num_queue_pairs);
6623 /* configure VSI for BW limit */
6624 if (ch->max_tx_rate) {
6625 u64 credits = ch->max_tx_rate;
6627 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6630 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6631 dev_dbg(&pf->pdev->dev,
6632 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6638 /* in case of VF, this will be main SRIOV VSI */
6639 ch->parent_vsi = vsi;
6641 /* and update main_vsi's count for queue_available to use */
6642 vsi->cnt_q_avail -= ch->num_queue_pairs;
6648 * i40e_configure_queue_channels - Add queue channel for the given TCs
6649 * @vsi: VSI to be configured
6651 * Configures queue channel mapping to the given TCs
6653 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6655 struct i40e_channel *ch;
6659 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6660 vsi->tc_seid_map[0] = vsi->seid;
6661 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6662 if (vsi->tc_config.enabled_tc & BIT(i)) {
6663 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6669 INIT_LIST_HEAD(&ch->list);
6670 ch->num_queue_pairs =
6671 vsi->tc_config.tc_info[i].qcount;
6673 vsi->tc_config.tc_info[i].qoffset;
6675 /* Bandwidth limit through tc interface is in bytes/s,
6678 max_rate = vsi->mqprio_qopt.max_rate[i];
6679 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6680 ch->max_tx_rate = max_rate;
6682 list_add_tail(&ch->list, &vsi->ch_list);
6684 ret = i40e_create_queue_channel(vsi, ch);
6686 dev_err(&vsi->back->pdev->dev,
6687 "Failed creating queue channel with TC%d: queues %d\n",
6688 i, ch->num_queue_pairs);
6691 vsi->tc_seid_map[i] = ch->seid;
6695 /* reset to reconfigure TX queue contexts */
6696 i40e_do_reset(vsi->back, I40E_PF_RESET_FLAG, true);
6700 i40e_remove_queue_channels(vsi);
6705 * i40e_veb_config_tc - Configure TCs for given VEB
6707 * @enabled_tc: TC bitmap
6709 * Configures given TC bitmap for VEB (switching) element
6711 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6713 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6714 struct i40e_pf *pf = veb->pf;
6718 /* No TCs or already enabled TCs just return */
6719 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6722 bw_data.tc_valid_bits = enabled_tc;
6723 /* bw_data.absolute_credits is not set (relative) */
6725 /* Enable ETS TCs with equal BW Share for now */
6726 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6727 if (enabled_tc & BIT(i))
6728 bw_data.tc_bw_share_credits[i] = 1;
6731 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6734 dev_info(&pf->pdev->dev,
6735 "VEB bw config failed, err %pe aq_err %s\n",
6737 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6741 /* Update the BW information */
6742 ret = i40e_veb_get_bw_info(veb);
6744 dev_info(&pf->pdev->dev,
6745 "Failed getting veb bw config, err %pe aq_err %s\n",
6747 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6754 #ifdef CONFIG_I40E_DCB
6756 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6759 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6760 * the caller would've quiesce all the VSIs before calling
6763 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6769 /* Enable the TCs available on PF to all VEBs */
6770 tc_map = i40e_pf_get_tc_map(pf);
6771 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6774 for (v = 0; v < I40E_MAX_VEB; v++) {
6777 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6779 dev_info(&pf->pdev->dev,
6780 "Failed configuring TC for VEB seid=%d\n",
6782 /* Will try to configure as many components */
6786 /* Update each VSI */
6787 for (v = 0; v < pf->num_alloc_vsi; v++) {
6791 /* - Enable all TCs for the LAN VSI
6792 * - For all others keep them at TC0 for now
6794 if (v == pf->lan_vsi)
6795 tc_map = i40e_pf_get_tc_map(pf);
6797 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6799 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6801 dev_info(&pf->pdev->dev,
6802 "Failed configuring TC for VSI seid=%d\n",
6804 /* Will try to configure as many components */
6806 /* Re-configure VSI vectors based on updated TC map */
6807 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6808 if (pf->vsi[v]->netdev)
6809 i40e_dcbnl_set_all(pf->vsi[v]);
6815 * i40e_resume_port_tx - Resume port Tx
6818 * Resume a port's Tx and issue a PF reset in case of failure to
6821 static int i40e_resume_port_tx(struct i40e_pf *pf)
6823 struct i40e_hw *hw = &pf->hw;
6826 ret = i40e_aq_resume_port_tx(hw, NULL);
6828 dev_info(&pf->pdev->dev,
6829 "Resume Port Tx failed, err %pe aq_err %s\n",
6831 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6832 /* Schedule PF reset to recover */
6833 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6834 i40e_service_event_schedule(pf);
6841 * i40e_suspend_port_tx - Suspend port Tx
6844 * Suspend a port's Tx and issue a PF reset in case of failure.
6846 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6848 struct i40e_hw *hw = &pf->hw;
6851 ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6853 dev_info(&pf->pdev->dev,
6854 "Suspend Port Tx failed, err %pe aq_err %s\n",
6856 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6857 /* Schedule PF reset to recover */
6858 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6859 i40e_service_event_schedule(pf);
6866 * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6867 * @pf: PF being configured
6868 * @new_cfg: New DCBX configuration
6870 * Program DCB settings into HW and reconfigure VEB/VSIs on
6871 * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6873 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6874 struct i40e_dcbx_config *new_cfg)
6876 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6879 /* Check if need reconfiguration */
6880 if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6881 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6885 /* Config change disable all VSIs */
6886 i40e_pf_quiesce_all_vsi(pf);
6888 /* Copy the new config to the current config */
6889 *old_cfg = *new_cfg;
6890 old_cfg->etsrec = old_cfg->etscfg;
6891 ret = i40e_set_dcb_config(&pf->hw);
6893 dev_info(&pf->pdev->dev,
6894 "Set DCB Config failed, err %pe aq_err %s\n",
6896 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6900 /* Changes in configuration update VEB/VSI */
6901 i40e_dcb_reconfigure(pf);
6903 /* In case of reset do not try to resume anything */
6904 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6905 /* Re-start the VSIs if disabled */
6906 ret = i40e_resume_port_tx(pf);
6907 /* In case of error no point in resuming VSIs */
6910 i40e_pf_unquiesce_all_vsi(pf);
6917 * i40e_hw_dcb_config - Program new DCBX settings into HW
6918 * @pf: PF being configured
6919 * @new_cfg: New DCBX configuration
6921 * Program DCB settings into HW and reconfigure VEB/VSIs on
6924 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6926 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6927 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6928 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6929 struct i40e_dcbx_config *old_cfg;
6930 u8 mode[I40E_MAX_TRAFFIC_CLASS];
6931 struct i40e_rx_pb_config pb_cfg;
6932 struct i40e_hw *hw = &pf->hw;
6933 u8 num_ports = hw->num_ports;
6941 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6942 /* Un-pack information to Program ETS HW via shared API
6945 * ETS/NON-ETS arbiter mode
6946 * max exponent (credit refills)
6947 * Total number of ports
6948 * PFC priority bit-map
6951 * Arbiter mode between UPs sharing same TC
6952 * TSA table (ETS or non-ETS)
6953 * EEE enabled or not
6957 new_numtc = i40e_dcb_get_num_tc(new_cfg);
6959 memset(&ets_data, 0, sizeof(ets_data));
6960 for (i = 0; i < new_numtc; i++) {
6962 switch (new_cfg->etscfg.tsatable[i]) {
6963 case I40E_IEEE_TSA_ETS:
6964 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6965 ets_data.tc_bw_share_credits[i] =
6966 new_cfg->etscfg.tcbwtable[i];
6968 case I40E_IEEE_TSA_STRICT:
6969 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6971 ets_data.tc_bw_share_credits[i] =
6972 I40E_DCB_STRICT_PRIO_CREDITS;
6975 /* Invalid TSA type */
6976 need_reconfig = false;
6981 old_cfg = &hw->local_dcbx_config;
6982 /* Check if need reconfiguration */
6983 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6985 /* If needed, enable/disable frame tagging, disable all VSIs
6986 * and suspend port tx
6988 if (need_reconfig) {
6989 /* Enable DCB tagging only when more than one TC */
6991 pf->flags |= I40E_FLAG_DCB_ENABLED;
6993 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6995 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6996 /* Reconfiguration needed quiesce all VSIs */
6997 i40e_pf_quiesce_all_vsi(pf);
6998 ret = i40e_suspend_port_tx(pf);
7003 /* Configure Port ETS Tx Scheduler */
7004 ets_data.tc_valid_bits = tc_map;
7005 ets_data.tc_strict_priority_flags = lltc_map;
7006 ret = i40e_aq_config_switch_comp_ets
7007 (hw, pf->mac_seid, &ets_data,
7008 i40e_aqc_opc_modify_switching_comp_ets, NULL);
7010 dev_info(&pf->pdev->dev,
7011 "Modify Port ETS failed, err %pe aq_err %s\n",
7013 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7017 /* Configure Rx ETS HW */
7018 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
7019 i40e_dcb_hw_set_num_tc(hw, new_numtc);
7020 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
7021 I40E_DCB_ARB_MODE_STRICT_PRIORITY,
7022 I40E_DCB_DEFAULT_MAX_EXPONENT,
7024 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
7025 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
7027 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
7028 new_cfg->etscfg.prioritytable);
7029 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
7031 /* Configure Rx Packet Buffers in HW */
7032 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7033 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
7034 mfs_tc[i] += I40E_PACKET_HDR_PAD;
7037 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
7038 false, new_cfg->pfc.pfcenable,
7040 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
7042 /* Update the local Rx Packet buffer config */
7043 pf->pb_cfg = pb_cfg;
7045 /* Inform the FW about changes to DCB configuration */
7046 ret = i40e_aq_dcb_updated(&pf->hw, NULL);
7048 dev_info(&pf->pdev->dev,
7049 "DCB Updated failed, err %pe aq_err %s\n",
7051 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7055 /* Update the port DCBx configuration */
7056 *old_cfg = *new_cfg;
7058 /* Changes in configuration update VEB/VSI */
7059 i40e_dcb_reconfigure(pf);
7061 /* Re-start the VSIs if disabled */
7062 if (need_reconfig) {
7063 ret = i40e_resume_port_tx(pf);
7065 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
7066 /* In case of error no point in resuming VSIs */
7070 /* Wait for the PF's queues to be disabled */
7071 ret = i40e_pf_wait_queues_disabled(pf);
7073 /* Schedule PF reset to recover */
7074 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
7075 i40e_service_event_schedule(pf);
7078 i40e_pf_unquiesce_all_vsi(pf);
7079 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7080 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
7082 /* registers are set, lets apply */
7083 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
7084 ret = i40e_hw_set_dcb_config(pf, new_cfg);
7092 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
7093 * @pf: PF being queried
7095 * Set default DCB configuration in case DCB is to be done in SW.
7097 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
7099 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
7100 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
7101 struct i40e_hw *hw = &pf->hw;
7104 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
7105 /* Update the local cached instance with TC0 ETS */
7106 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
7107 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7108 pf->tmp_cfg.etscfg.maxtcs = 0;
7109 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7110 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
7111 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
7112 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
7113 /* FW needs one App to configure HW */
7114 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
7115 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
7116 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
7117 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
7119 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
7122 memset(&ets_data, 0, sizeof(ets_data));
7123 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
7124 ets_data.tc_strict_priority_flags = 0; /* ETS */
7125 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
7127 /* Enable ETS on the Physical port */
7128 err = i40e_aq_config_switch_comp_ets
7129 (hw, pf->mac_seid, &ets_data,
7130 i40e_aqc_opc_enable_switching_comp_ets, NULL);
7132 dev_info(&pf->pdev->dev,
7133 "Enable Port ETS failed, err %pe aq_err %s\n",
7135 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7140 /* Update the local cached instance with TC0 ETS */
7141 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
7142 dcb_cfg->etscfg.cbs = 0;
7143 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
7144 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
7151 * i40e_init_pf_dcb - Initialize DCB configuration
7152 * @pf: PF being configured
7154 * Query the current DCB configuration and cache it
7155 * in the hardware structure
7157 static int i40e_init_pf_dcb(struct i40e_pf *pf)
7159 struct i40e_hw *hw = &pf->hw;
7162 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
7163 * Also do not enable DCBx if FW LLDP agent is disabled
7165 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
7166 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7170 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
7171 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7172 err = i40e_dcb_sw_default_config(pf);
7174 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7177 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7178 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7179 DCB_CAP_DCBX_VER_IEEE;
7180 /* at init capable but disabled */
7181 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7182 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7185 err = i40e_init_dcb(hw, true);
7187 /* Device/Function is not DCBX capable */
7188 if ((!hw->func_caps.dcb) ||
7189 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7190 dev_info(&pf->pdev->dev,
7191 "DCBX offload is not supported or is disabled for this PF.\n");
7193 /* When status is not DISABLED then DCBX in FW */
7194 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7195 DCB_CAP_DCBX_VER_IEEE;
7197 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7198 /* Enable DCB tagging only when more than one TC
7199 * or explicitly disable if only one TC
7201 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7202 pf->flags |= I40E_FLAG_DCB_ENABLED;
7204 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7205 dev_dbg(&pf->pdev->dev,
7206 "DCBX offload is supported for this PF.\n");
7208 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7209 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7210 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
7212 dev_info(&pf->pdev->dev,
7213 "Query for DCB configuration failed, err %pe aq_err %s\n",
7215 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7221 #endif /* CONFIG_I40E_DCB */
7224 * i40e_print_link_message - print link up or down
7225 * @vsi: the VSI for which link needs a message
7226 * @isup: true of link is up, false otherwise
7228 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7230 enum i40e_aq_link_speed new_speed;
7231 struct i40e_pf *pf = vsi->back;
7232 char *speed = "Unknown";
7233 char *fc = "Unknown";
7239 new_speed = pf->hw.phy.link_info.link_speed;
7241 new_speed = I40E_LINK_SPEED_UNKNOWN;
7243 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7245 vsi->current_isup = isup;
7246 vsi->current_speed = new_speed;
7248 netdev_info(vsi->netdev, "NIC Link is Down\n");
7252 /* Warn user if link speed on NPAR enabled partition is not at
7255 if (pf->hw.func_caps.npar_enable &&
7256 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7257 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7258 netdev_warn(vsi->netdev,
7259 "The partition detected link speed that is less than 10Gbps\n");
7261 switch (pf->hw.phy.link_info.link_speed) {
7262 case I40E_LINK_SPEED_40GB:
7265 case I40E_LINK_SPEED_20GB:
7268 case I40E_LINK_SPEED_25GB:
7271 case I40E_LINK_SPEED_10GB:
7274 case I40E_LINK_SPEED_5GB:
7277 case I40E_LINK_SPEED_2_5GB:
7280 case I40E_LINK_SPEED_1GB:
7283 case I40E_LINK_SPEED_100MB:
7290 switch (pf->hw.fc.current_mode) {
7294 case I40E_FC_TX_PAUSE:
7297 case I40E_FC_RX_PAUSE:
7305 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7310 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7313 if (pf->hw.phy.link_info.fec_info &
7314 I40E_AQ_CONFIG_FEC_KR_ENA)
7315 fec = "CL74 FC-FEC/BASE-R";
7316 else if (pf->hw.phy.link_info.fec_info &
7317 I40E_AQ_CONFIG_FEC_RS_ENA)
7318 fec = "CL108 RS-FEC";
7320 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7321 * both RS and FC are requested
7323 if (vsi->back->hw.phy.link_info.req_fec_info &
7324 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7325 if (vsi->back->hw.phy.link_info.req_fec_info &
7326 I40E_AQ_REQUEST_FEC_RS)
7327 req_fec = "CL108 RS-FEC";
7329 req_fec = "CL74 FC-FEC/BASE-R";
7331 netdev_info(vsi->netdev,
7332 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7333 speed, req_fec, fec, an, fc);
7334 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7339 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7342 if (pf->hw.phy.link_info.fec_info &
7343 I40E_AQ_CONFIG_FEC_KR_ENA)
7344 fec = "CL74 FC-FEC/BASE-R";
7346 if (pf->hw.phy.link_info.req_fec_info &
7347 I40E_AQ_REQUEST_FEC_KR)
7348 req_fec = "CL74 FC-FEC/BASE-R";
7350 netdev_info(vsi->netdev,
7351 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7352 speed, req_fec, fec, an, fc);
7354 netdev_info(vsi->netdev,
7355 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7362 * i40e_up_complete - Finish the last steps of bringing up a connection
7363 * @vsi: the VSI being configured
7365 static int i40e_up_complete(struct i40e_vsi *vsi)
7367 struct i40e_pf *pf = vsi->back;
7370 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7371 i40e_vsi_configure_msix(vsi);
7373 i40e_configure_msi_and_legacy(vsi);
7376 err = i40e_vsi_start_rings(vsi);
7380 clear_bit(__I40E_VSI_DOWN, vsi->state);
7381 i40e_napi_enable_all(vsi);
7382 i40e_vsi_enable_irq(vsi);
7384 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7386 i40e_print_link_message(vsi, true);
7387 netif_tx_start_all_queues(vsi->netdev);
7388 netif_carrier_on(vsi->netdev);
7391 /* replay FDIR SB filters */
7392 if (vsi->type == I40E_VSI_FDIR) {
7393 /* reset fd counters */
7396 i40e_fdir_filter_restore(vsi);
7399 /* On the next run of the service_task, notify any clients of the new
7402 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7403 i40e_service_event_schedule(pf);
7409 * i40e_vsi_reinit_locked - Reset the VSI
7410 * @vsi: the VSI being configured
7412 * Rebuild the ring structs after some configuration
7413 * has changed, e.g. MTU size.
7415 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7417 struct i40e_pf *pf = vsi->back;
7419 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7420 usleep_range(1000, 2000);
7424 clear_bit(__I40E_CONFIG_BUSY, pf->state);
7428 * i40e_force_link_state - Force the link status
7429 * @pf: board private structure
7430 * @is_up: whether the link state should be forced up or down
7432 static int i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7434 struct i40e_aq_get_phy_abilities_resp abilities;
7435 struct i40e_aq_set_phy_config config = {0};
7436 bool non_zero_phy_type = is_up;
7437 struct i40e_hw *hw = &pf->hw;
7442 /* Card might've been put in an unstable state by other drivers
7443 * and applications, which causes incorrect speed values being
7444 * set on startup. In order to clear speed registers, we call
7445 * get_phy_capabilities twice, once to get initial state of
7446 * available speeds, and once to get current PHY config.
7448 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7451 dev_err(&pf->pdev->dev,
7452 "failed to get phy cap., ret = %pe last_status = %s\n",
7454 i40e_aq_str(hw, hw->aq.asq_last_status));
7457 speed = abilities.link_speed;
7459 /* Get the current phy config */
7460 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7463 dev_err(&pf->pdev->dev,
7464 "failed to get phy cap., ret = %pe last_status = %s\n",
7466 i40e_aq_str(hw, hw->aq.asq_last_status));
7470 /* If link needs to go up, but was not forced to go down,
7471 * and its speed values are OK, no need for a flap
7472 * if non_zero_phy_type was set, still need to force up
7474 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7475 non_zero_phy_type = true;
7476 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7479 /* To force link we need to set bits for all supported PHY types,
7480 * but there are now more than 32, so we need to split the bitmap
7481 * across two fields.
7483 mask = I40E_PHY_TYPES_BITMASK;
7485 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7486 config.phy_type_ext =
7487 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7488 /* Copy the old settings, except of phy_type */
7489 config.abilities = abilities.abilities;
7490 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7492 config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7494 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7496 if (abilities.link_speed != 0)
7497 config.link_speed = abilities.link_speed;
7499 config.link_speed = speed;
7500 config.eee_capability = abilities.eee_capability;
7501 config.eeer = abilities.eeer_val;
7502 config.low_power_ctrl = abilities.d3_lpan;
7503 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7504 I40E_AQ_PHY_FEC_CONFIG_MASK;
7505 err = i40e_aq_set_phy_config(hw, &config, NULL);
7508 dev_err(&pf->pdev->dev,
7509 "set phy config ret = %pe last_status = %s\n",
7511 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7515 /* Update the link info */
7516 err = i40e_update_link_info(hw);
7518 /* Wait a little bit (on 40G cards it sometimes takes a really
7519 * long time for link to come back from the atomic reset)
7523 i40e_update_link_info(hw);
7526 i40e_aq_set_link_restart_an(hw, is_up, NULL);
7532 * i40e_up - Bring the connection back up after being down
7533 * @vsi: the VSI being configured
7535 int i40e_up(struct i40e_vsi *vsi)
7539 if (vsi->type == I40E_VSI_MAIN &&
7540 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7541 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7542 i40e_force_link_state(vsi->back, true);
7544 err = i40e_vsi_configure(vsi);
7546 err = i40e_up_complete(vsi);
7552 * i40e_down - Shutdown the connection processing
7553 * @vsi: the VSI being stopped
7555 void i40e_down(struct i40e_vsi *vsi)
7559 /* It is assumed that the caller of this function
7560 * sets the vsi->state __I40E_VSI_DOWN bit.
7563 netif_carrier_off(vsi->netdev);
7564 netif_tx_disable(vsi->netdev);
7566 i40e_vsi_disable_irq(vsi);
7567 i40e_vsi_stop_rings(vsi);
7568 if (vsi->type == I40E_VSI_MAIN &&
7569 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7570 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7571 i40e_force_link_state(vsi->back, false);
7572 i40e_napi_disable_all(vsi);
7574 for (i = 0; i < vsi->num_queue_pairs; i++) {
7575 i40e_clean_tx_ring(vsi->tx_rings[i]);
7576 if (i40e_enabled_xdp_vsi(vsi)) {
7577 /* Make sure that in-progress ndo_xdp_xmit and
7578 * ndo_xsk_wakeup calls are completed.
7581 i40e_clean_tx_ring(vsi->xdp_rings[i]);
7583 i40e_clean_rx_ring(vsi->rx_rings[i]);
7589 * i40e_validate_mqprio_qopt- validate queue mapping info
7590 * @vsi: the VSI being configured
7591 * @mqprio_qopt: queue parametrs
7593 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7594 struct tc_mqprio_qopt_offload *mqprio_qopt)
7596 u64 sum_max_rate = 0;
7600 if (mqprio_qopt->qopt.offset[0] != 0 ||
7601 mqprio_qopt->qopt.num_tc < 1 ||
7602 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7604 for (i = 0; ; i++) {
7605 if (!mqprio_qopt->qopt.count[i])
7607 if (mqprio_qopt->min_rate[i]) {
7608 dev_err(&vsi->back->pdev->dev,
7609 "Invalid min tx rate (greater than 0) specified\n");
7612 max_rate = mqprio_qopt->max_rate[i];
7613 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7614 sum_max_rate += max_rate;
7616 if (i >= mqprio_qopt->qopt.num_tc - 1)
7618 if (mqprio_qopt->qopt.offset[i + 1] !=
7619 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7622 if (vsi->num_queue_pairs <
7623 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7624 dev_err(&vsi->back->pdev->dev,
7625 "Failed to create traffic channel, insufficient number of queues.\n");
7628 if (sum_max_rate > i40e_get_link_speed(vsi)) {
7629 dev_err(&vsi->back->pdev->dev,
7630 "Invalid max tx rate specified\n");
7637 * i40e_vsi_set_default_tc_config - set default values for tc configuration
7638 * @vsi: the VSI being configured
7640 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7645 /* Only TC0 is enabled */
7646 vsi->tc_config.numtc = 1;
7647 vsi->tc_config.enabled_tc = 1;
7648 qcount = min_t(int, vsi->alloc_queue_pairs,
7649 i40e_pf_get_max_q_per_tc(vsi->back));
7650 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7651 /* For the TC that is not enabled set the offset to default
7652 * queue and allocate one queue for the given TC.
7654 vsi->tc_config.tc_info[i].qoffset = 0;
7656 vsi->tc_config.tc_info[i].qcount = qcount;
7658 vsi->tc_config.tc_info[i].qcount = 1;
7659 vsi->tc_config.tc_info[i].netdev_tc = 0;
7664 * i40e_del_macvlan_filter
7665 * @hw: pointer to the HW structure
7666 * @seid: seid of the channel VSI
7667 * @macaddr: the mac address to apply as a filter
7668 * @aq_err: store the admin Q error
7670 * This function deletes a mac filter on the channel VSI which serves as the
7671 * macvlan. Returns 0 on success.
7673 static int i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7674 const u8 *macaddr, int *aq_err)
7676 struct i40e_aqc_remove_macvlan_element_data element;
7679 memset(&element, 0, sizeof(element));
7680 ether_addr_copy(element.mac_addr, macaddr);
7681 element.vlan_tag = 0;
7682 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7683 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7684 *aq_err = hw->aq.asq_last_status;
7690 * i40e_add_macvlan_filter
7691 * @hw: pointer to the HW structure
7692 * @seid: seid of the channel VSI
7693 * @macaddr: the mac address to apply as a filter
7694 * @aq_err: store the admin Q error
7696 * This function adds a mac filter on the channel VSI which serves as the
7697 * macvlan. Returns 0 on success.
7699 static int i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7700 const u8 *macaddr, int *aq_err)
7702 struct i40e_aqc_add_macvlan_element_data element;
7706 ether_addr_copy(element.mac_addr, macaddr);
7707 element.vlan_tag = 0;
7708 element.queue_number = 0;
7709 element.match_method = I40E_AQC_MM_ERR_NO_RES;
7710 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7711 element.flags = cpu_to_le16(cmd_flags);
7712 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7713 *aq_err = hw->aq.asq_last_status;
7719 * i40e_reset_ch_rings - Reset the queue contexts in a channel
7720 * @vsi: the VSI we want to access
7721 * @ch: the channel we want to access
7723 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7725 struct i40e_ring *tx_ring, *rx_ring;
7729 for (i = 0; i < ch->num_queue_pairs; i++) {
7730 pf_q = ch->base_queue + i;
7731 tx_ring = vsi->tx_rings[pf_q];
7733 rx_ring = vsi->rx_rings[pf_q];
7739 * i40e_free_macvlan_channels
7740 * @vsi: the VSI we want to access
7742 * This function frees the Qs of the channel VSI from
7743 * the stack and also deletes the channel VSIs which
7744 * serve as macvlans.
7746 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7748 struct i40e_channel *ch, *ch_tmp;
7751 if (list_empty(&vsi->macvlan_list))
7754 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7755 struct i40e_vsi *parent_vsi;
7757 if (i40e_is_channel_macvlan(ch)) {
7758 i40e_reset_ch_rings(vsi, ch);
7759 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7760 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7761 netdev_set_sb_channel(ch->fwd->netdev, 0);
7766 list_del(&ch->list);
7767 parent_vsi = ch->parent_vsi;
7768 if (!parent_vsi || !ch->initialized) {
7773 /* remove the VSI */
7774 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7777 dev_err(&vsi->back->pdev->dev,
7778 "unable to remove channel (%d) for parent VSI(%d)\n",
7779 ch->seid, parent_vsi->seid);
7782 vsi->macvlan_cnt = 0;
7786 * i40e_fwd_ring_up - bring the macvlan device up
7787 * @vsi: the VSI we want to access
7788 * @vdev: macvlan netdevice
7789 * @fwd: the private fwd structure
7791 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7792 struct i40e_fwd_adapter *fwd)
7794 struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7795 int ret = 0, num_tc = 1, i, aq_err;
7796 struct i40e_pf *pf = vsi->back;
7797 struct i40e_hw *hw = &pf->hw;
7799 /* Go through the list and find an available channel */
7800 list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7801 if (!i40e_is_channel_macvlan(iter)) {
7803 /* record configuration for macvlan interface in vdev */
7804 for (i = 0; i < num_tc; i++)
7805 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7807 iter->num_queue_pairs,
7809 for (i = 0; i < iter->num_queue_pairs; i++) {
7810 struct i40e_ring *tx_ring, *rx_ring;
7813 pf_q = iter->base_queue + i;
7815 /* Get to TX ring ptr */
7816 tx_ring = vsi->tx_rings[pf_q];
7819 /* Get the RX ring ptr */
7820 rx_ring = vsi->rx_rings[pf_q];
7831 /* Guarantee all rings are updated before we update the
7832 * MAC address filter.
7836 /* Add a mac filter */
7837 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7839 /* if we cannot add the MAC rule then disable the offload */
7840 macvlan_release_l2fw_offload(vdev);
7841 for (i = 0; i < ch->num_queue_pairs; i++) {
7842 struct i40e_ring *rx_ring;
7845 pf_q = ch->base_queue + i;
7846 rx_ring = vsi->rx_rings[pf_q];
7847 rx_ring->netdev = NULL;
7849 dev_info(&pf->pdev->dev,
7850 "Error adding mac filter on macvlan err %pe, aq_err %s\n",
7852 i40e_aq_str(hw, aq_err));
7853 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7860 * i40e_setup_macvlans - create the channels which will be macvlans
7861 * @vsi: the VSI we want to access
7862 * @macvlan_cnt: no. of macvlans to be setup
7863 * @qcnt: no. of Qs per macvlan
7864 * @vdev: macvlan netdevice
7866 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7867 struct net_device *vdev)
7869 struct i40e_pf *pf = vsi->back;
7870 struct i40e_hw *hw = &pf->hw;
7871 struct i40e_vsi_context ctxt;
7872 u16 sections, qmap, num_qps;
7873 struct i40e_channel *ch;
7874 int i, pow, ret = 0;
7877 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7880 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7882 /* find the next higher power-of-2 of num queue pairs */
7883 pow = fls(roundup_pow_of_two(num_qps) - 1);
7885 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7886 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7888 /* Setup context bits for the main VSI */
7889 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7890 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7891 memset(&ctxt, 0, sizeof(ctxt));
7892 ctxt.seid = vsi->seid;
7893 ctxt.pf_num = vsi->back->hw.pf_id;
7895 ctxt.uplink_seid = vsi->uplink_seid;
7896 ctxt.info = vsi->info;
7897 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7898 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7899 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7900 ctxt.info.valid_sections |= cpu_to_le16(sections);
7902 /* Reconfigure RSS for main VSI with new max queue count */
7903 vsi->rss_size = max_t(u16, num_qps, qcnt);
7904 ret = i40e_vsi_config_rss(vsi);
7906 dev_info(&pf->pdev->dev,
7907 "Failed to reconfig RSS for num_queues (%u)\n",
7911 vsi->reconfig_rss = true;
7912 dev_dbg(&vsi->back->pdev->dev,
7913 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7914 vsi->next_base_queue = num_qps;
7915 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7917 /* Update the VSI after updating the VSI queue-mapping
7920 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7922 dev_info(&pf->pdev->dev,
7923 "Update vsi tc config failed, err %pe aq_err %s\n",
7925 i40e_aq_str(hw, hw->aq.asq_last_status));
7928 /* update the local VSI info with updated queue map */
7929 i40e_vsi_update_queue_map(vsi, &ctxt);
7930 vsi->info.valid_sections = 0;
7932 /* Create channels for macvlans */
7933 INIT_LIST_HEAD(&vsi->macvlan_list);
7934 for (i = 0; i < macvlan_cnt; i++) {
7935 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7940 INIT_LIST_HEAD(&ch->list);
7941 ch->num_queue_pairs = qcnt;
7942 if (!i40e_setup_channel(pf, vsi, ch)) {
7947 ch->parent_vsi = vsi;
7948 vsi->cnt_q_avail -= ch->num_queue_pairs;
7950 list_add_tail(&ch->list, &vsi->macvlan_list);
7956 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7957 i40e_free_macvlan_channels(vsi);
7963 * i40e_fwd_add - configure macvlans
7964 * @netdev: net device to configure
7965 * @vdev: macvlan netdevice
7967 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7969 struct i40e_netdev_priv *np = netdev_priv(netdev);
7970 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7971 struct i40e_vsi *vsi = np->vsi;
7972 struct i40e_pf *pf = vsi->back;
7973 struct i40e_fwd_adapter *fwd;
7974 int avail_macvlan, ret;
7976 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7977 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7978 return ERR_PTR(-EINVAL);
7980 if (i40e_is_tc_mqprio_enabled(pf)) {
7981 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7982 return ERR_PTR(-EINVAL);
7984 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7985 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7986 return ERR_PTR(-EINVAL);
7989 /* The macvlan device has to be a single Q device so that the
7990 * tc_to_txq field can be reused to pick the tx queue.
7992 if (netif_is_multiqueue(vdev))
7993 return ERR_PTR(-ERANGE);
7995 if (!vsi->macvlan_cnt) {
7996 /* reserve bit 0 for the pf device */
7997 set_bit(0, vsi->fwd_bitmask);
7999 /* Try to reserve as many queues as possible for macvlans. First
8000 * reserve 3/4th of max vectors, then half, then quarter and
8001 * calculate Qs per macvlan as you go
8003 vectors = pf->num_lan_msix;
8004 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
8005 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
8007 macvlan_cnt = (vectors - 32) / 4;
8008 } else if (vectors <= 64 && vectors > 32) {
8009 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
8011 macvlan_cnt = (vectors - 16) / 2;
8012 } else if (vectors <= 32 && vectors > 16) {
8013 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
8015 macvlan_cnt = vectors - 16;
8016 } else if (vectors <= 16 && vectors > 8) {
8017 /* allocate 1 Q per macvlan and 8 Qs to the PF */
8019 macvlan_cnt = vectors - 8;
8021 /* allocate 1 Q per macvlan and 1 Q to the PF */
8023 macvlan_cnt = vectors - 1;
8026 if (macvlan_cnt == 0)
8027 return ERR_PTR(-EBUSY);
8029 /* Quiesce VSI queues */
8030 i40e_quiesce_vsi(vsi);
8032 /* sets up the macvlans but does not "enable" them */
8033 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
8036 return ERR_PTR(ret);
8039 i40e_unquiesce_vsi(vsi);
8041 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
8043 if (avail_macvlan >= I40E_MAX_MACVLANS)
8044 return ERR_PTR(-EBUSY);
8046 /* create the fwd struct */
8047 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
8049 return ERR_PTR(-ENOMEM);
8051 set_bit(avail_macvlan, vsi->fwd_bitmask);
8052 fwd->bit_no = avail_macvlan;
8053 netdev_set_sb_channel(vdev, avail_macvlan);
8056 if (!netif_running(netdev))
8059 /* Set fwd ring up */
8060 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
8062 /* unbind the queues and drop the subordinate channel config */
8063 netdev_unbind_sb_channel(netdev, vdev);
8064 netdev_set_sb_channel(vdev, 0);
8067 return ERR_PTR(-EINVAL);
8074 * i40e_del_all_macvlans - Delete all the mac filters on the channels
8075 * @vsi: the VSI we want to access
8077 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
8079 struct i40e_channel *ch, *ch_tmp;
8080 struct i40e_pf *pf = vsi->back;
8081 struct i40e_hw *hw = &pf->hw;
8082 int aq_err, ret = 0;
8084 if (list_empty(&vsi->macvlan_list))
8087 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8088 if (i40e_is_channel_macvlan(ch)) {
8089 ret = i40e_del_macvlan_filter(hw, ch->seid,
8090 i40e_channel_mac(ch),
8093 /* Reset queue contexts */
8094 i40e_reset_ch_rings(vsi, ch);
8095 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8096 netdev_unbind_sb_channel(vsi->netdev,
8098 netdev_set_sb_channel(ch->fwd->netdev, 0);
8107 * i40e_fwd_del - delete macvlan interfaces
8108 * @netdev: net device to configure
8109 * @vdev: macvlan netdevice
8111 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
8113 struct i40e_netdev_priv *np = netdev_priv(netdev);
8114 struct i40e_fwd_adapter *fwd = vdev;
8115 struct i40e_channel *ch, *ch_tmp;
8116 struct i40e_vsi *vsi = np->vsi;
8117 struct i40e_pf *pf = vsi->back;
8118 struct i40e_hw *hw = &pf->hw;
8119 int aq_err, ret = 0;
8121 /* Find the channel associated with the macvlan and del mac filter */
8122 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
8123 if (i40e_is_channel_macvlan(ch) &&
8124 ether_addr_equal(i40e_channel_mac(ch),
8125 fwd->netdev->dev_addr)) {
8126 ret = i40e_del_macvlan_filter(hw, ch->seid,
8127 i40e_channel_mac(ch),
8130 /* Reset queue contexts */
8131 i40e_reset_ch_rings(vsi, ch);
8132 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
8133 netdev_unbind_sb_channel(netdev, fwd->netdev);
8134 netdev_set_sb_channel(fwd->netdev, 0);
8138 dev_info(&pf->pdev->dev,
8139 "Error deleting mac filter on macvlan err %pe, aq_err %s\n",
8141 i40e_aq_str(hw, aq_err));
8149 * i40e_setup_tc - configure multiple traffic classes
8150 * @netdev: net device to configure
8151 * @type_data: tc offload data
8153 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
8155 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
8156 struct i40e_netdev_priv *np = netdev_priv(netdev);
8157 struct i40e_vsi *vsi = np->vsi;
8158 struct i40e_pf *pf = vsi->back;
8159 u8 enabled_tc = 0, num_tc, hw;
8160 bool need_reset = false;
8161 int old_queue_pairs;
8166 old_queue_pairs = vsi->num_queue_pairs;
8167 num_tc = mqprio_qopt->qopt.num_tc;
8168 hw = mqprio_qopt->qopt.hw;
8169 mode = mqprio_qopt->mode;
8171 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8172 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8176 /* Check if MFP enabled */
8177 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
8179 "Configuring TC not supported in MFP mode\n");
8183 case TC_MQPRIO_MODE_DCB:
8184 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8186 /* Check if DCB enabled to continue */
8187 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
8189 "DCB is not enabled for adapter\n");
8193 /* Check whether tc count is within enabled limit */
8194 if (num_tc > i40e_pf_get_num_tc(pf)) {
8196 "TC count greater than enabled on link for adapter\n");
8200 case TC_MQPRIO_MODE_CHANNEL:
8201 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
8203 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8206 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8208 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8211 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8212 sizeof(*mqprio_qopt));
8213 pf->flags |= I40E_FLAG_TC_MQPRIO;
8214 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8221 /* Generate TC map for number of tc requested */
8222 for (i = 0; i < num_tc; i++)
8223 enabled_tc |= BIT(i);
8225 /* Requesting same TC configuration as already enabled */
8226 if (enabled_tc == vsi->tc_config.enabled_tc &&
8227 mode != TC_MQPRIO_MODE_CHANNEL)
8230 /* Quiesce VSI queues */
8231 i40e_quiesce_vsi(vsi);
8233 if (!hw && !i40e_is_tc_mqprio_enabled(pf))
8234 i40e_remove_queue_channels(vsi);
8236 /* Configure VSI for enabled TCs */
8237 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8239 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8243 } else if (enabled_tc &&
8244 (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8246 "Failed to create channel. Override queues (%u) not power of 2\n",
8247 vsi->tc_config.tc_info[0].qcount);
8253 dev_info(&vsi->back->pdev->dev,
8254 "Setup channel (id:%u) utilizing num_queues %d\n",
8255 vsi->seid, vsi->tc_config.tc_info[0].qcount);
8257 if (i40e_is_tc_mqprio_enabled(pf)) {
8258 if (vsi->mqprio_qopt.max_rate[0]) {
8259 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
8260 vsi->mqprio_qopt.max_rate[0]);
8262 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8264 u64 credits = max_tx_rate;
8266 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8267 dev_dbg(&vsi->back->pdev->dev,
8268 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8277 ret = i40e_configure_queue_channels(vsi);
8279 vsi->num_queue_pairs = old_queue_pairs;
8281 "Failed configuring queue channels\n");
8288 /* Reset the configuration data to defaults, only TC0 is enabled */
8290 i40e_vsi_set_default_tc_config(vsi);
8295 i40e_unquiesce_vsi(vsi);
8300 * i40e_set_cld_element - sets cloud filter element data
8301 * @filter: cloud filter rule
8302 * @cld: ptr to cloud filter element data
8304 * This is helper function to copy data into cloud filter element
8307 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8308 struct i40e_aqc_cloud_filters_element_data *cld)
8313 memset(cld, 0, sizeof(*cld));
8314 ether_addr_copy(cld->outer_mac, filter->dst_mac);
8315 ether_addr_copy(cld->inner_mac, filter->src_mac);
8317 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8320 if (filter->n_proto == ETH_P_IPV6) {
8321 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
8322 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8323 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8325 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8328 ipa = be32_to_cpu(filter->dst_ipv4);
8330 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8333 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8335 /* tenant_id is not supported by FW now, once the support is enabled
8336 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8338 if (filter->tenant_id)
8343 * i40e_add_del_cloud_filter - Add/del cloud filter
8344 * @vsi: pointer to VSI
8345 * @filter: cloud filter rule
8346 * @add: if true, add, if false, delete
8348 * Add or delete a cloud filter for a specific flow spec.
8349 * Returns 0 if the filter were successfully added.
8351 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8352 struct i40e_cloud_filter *filter, bool add)
8354 struct i40e_aqc_cloud_filters_element_data cld_filter;
8355 struct i40e_pf *pf = vsi->back;
8357 static const u16 flag_table[128] = {
8358 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
8359 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8360 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
8361 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8362 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
8363 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8364 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8365 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8366 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8367 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8368 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8369 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8370 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8371 I40E_AQC_ADD_CLOUD_FILTER_IIP,
8374 if (filter->flags >= ARRAY_SIZE(flag_table))
8377 memset(&cld_filter, 0, sizeof(cld_filter));
8379 /* copy element needed to add cloud filter from filter */
8380 i40e_set_cld_element(filter, &cld_filter);
8382 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8383 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8384 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8386 if (filter->n_proto == ETH_P_IPV6)
8387 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8388 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8390 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8391 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8394 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8397 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8400 dev_dbg(&pf->pdev->dev,
8401 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8402 add ? "add" : "delete", filter->dst_port, ret,
8403 pf->hw.aq.asq_last_status);
8405 dev_info(&pf->pdev->dev,
8406 "%s cloud filter for VSI: %d\n",
8407 add ? "Added" : "Deleted", filter->seid);
8412 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8413 * @vsi: pointer to VSI
8414 * @filter: cloud filter rule
8415 * @add: if true, add, if false, delete
8417 * Add or delete a cloud filter for a specific flow spec using big buffer.
8418 * Returns 0 if the filter were successfully added.
8420 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8421 struct i40e_cloud_filter *filter,
8424 struct i40e_aqc_cloud_filters_element_bb cld_filter;
8425 struct i40e_pf *pf = vsi->back;
8428 /* Both (src/dst) valid mac_addr are not supported */
8429 if ((is_valid_ether_addr(filter->dst_mac) &&
8430 is_valid_ether_addr(filter->src_mac)) ||
8431 (is_multicast_ether_addr(filter->dst_mac) &&
8432 is_multicast_ether_addr(filter->src_mac)))
8435 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8436 * ports are not supported via big buffer now.
8438 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8441 /* adding filter using src_port/src_ip is not supported at this stage */
8442 if (filter->src_port ||
8443 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8444 !ipv6_addr_any(&filter->ip.v6.src_ip6))
8447 memset(&cld_filter, 0, sizeof(cld_filter));
8449 /* copy element needed to add cloud filter from filter */
8450 i40e_set_cld_element(filter, &cld_filter.element);
8452 if (is_valid_ether_addr(filter->dst_mac) ||
8453 is_valid_ether_addr(filter->src_mac) ||
8454 is_multicast_ether_addr(filter->dst_mac) ||
8455 is_multicast_ether_addr(filter->src_mac)) {
8456 /* MAC + IP : unsupported mode */
8457 if (filter->dst_ipv4)
8460 /* since we validated that L4 port must be valid before
8461 * we get here, start with respective "flags" value
8462 * and update if vlan is present or not
8464 cld_filter.element.flags =
8465 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8467 if (filter->vlan_id) {
8468 cld_filter.element.flags =
8469 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8472 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8473 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8474 cld_filter.element.flags =
8475 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8476 if (filter->n_proto == ETH_P_IPV6)
8477 cld_filter.element.flags |=
8478 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8480 cld_filter.element.flags |=
8481 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8483 dev_err(&pf->pdev->dev,
8484 "either mac or ip has to be valid for cloud filter\n");
8488 /* Now copy L4 port in Byte 6..7 in general fields */
8489 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8490 be16_to_cpu(filter->dst_port);
8493 /* Validate current device switch mode, change if necessary */
8494 ret = i40e_validate_and_set_switch_mode(vsi);
8496 dev_err(&pf->pdev->dev,
8497 "failed to set switch mode, ret %d\n",
8502 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8505 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8510 dev_dbg(&pf->pdev->dev,
8511 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8512 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8514 dev_info(&pf->pdev->dev,
8515 "%s cloud filter for VSI: %d, L4 port: %d\n",
8516 add ? "add" : "delete", filter->seid,
8517 ntohs(filter->dst_port));
8522 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8523 * @vsi: Pointer to VSI
8524 * @f: Pointer to struct flow_cls_offload
8525 * @filter: Pointer to cloud filter structure
8528 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8529 struct flow_cls_offload *f,
8530 struct i40e_cloud_filter *filter)
8532 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8533 struct flow_dissector *dissector = rule->match.dissector;
8534 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8535 struct i40e_pf *pf = vsi->back;
8538 if (dissector->used_keys &
8539 ~(BIT_ULL(FLOW_DISSECTOR_KEY_CONTROL) |
8540 BIT_ULL(FLOW_DISSECTOR_KEY_BASIC) |
8541 BIT_ULL(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8542 BIT_ULL(FLOW_DISSECTOR_KEY_VLAN) |
8543 BIT_ULL(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8544 BIT_ULL(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8545 BIT_ULL(FLOW_DISSECTOR_KEY_PORTS) |
8546 BIT_ULL(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8547 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%llx\n",
8548 dissector->used_keys);
8552 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8553 struct flow_match_enc_keyid match;
8555 flow_rule_match_enc_keyid(rule, &match);
8556 if (match.mask->keyid != 0)
8557 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8559 filter->tenant_id = be32_to_cpu(match.key->keyid);
8562 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8563 struct flow_match_basic match;
8565 flow_rule_match_basic(rule, &match);
8566 n_proto_key = ntohs(match.key->n_proto);
8567 n_proto_mask = ntohs(match.mask->n_proto);
8569 if (n_proto_key == ETH_P_ALL) {
8573 filter->n_proto = n_proto_key & n_proto_mask;
8574 filter->ip_proto = match.key->ip_proto;
8577 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8578 struct flow_match_eth_addrs match;
8580 flow_rule_match_eth_addrs(rule, &match);
8582 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8583 if (!is_zero_ether_addr(match.mask->dst)) {
8584 if (is_broadcast_ether_addr(match.mask->dst)) {
8585 field_flags |= I40E_CLOUD_FIELD_OMAC;
8587 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8593 if (!is_zero_ether_addr(match.mask->src)) {
8594 if (is_broadcast_ether_addr(match.mask->src)) {
8595 field_flags |= I40E_CLOUD_FIELD_IMAC;
8597 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8602 ether_addr_copy(filter->dst_mac, match.key->dst);
8603 ether_addr_copy(filter->src_mac, match.key->src);
8606 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8607 struct flow_match_vlan match;
8609 flow_rule_match_vlan(rule, &match);
8610 if (match.mask->vlan_id) {
8611 if (match.mask->vlan_id == VLAN_VID_MASK) {
8612 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8615 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8616 match.mask->vlan_id);
8621 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8624 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8625 struct flow_match_control match;
8627 flow_rule_match_control(rule, &match);
8628 addr_type = match.key->addr_type;
8631 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8632 struct flow_match_ipv4_addrs match;
8634 flow_rule_match_ipv4_addrs(rule, &match);
8635 if (match.mask->dst) {
8636 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8637 field_flags |= I40E_CLOUD_FIELD_IIP;
8639 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8645 if (match.mask->src) {
8646 if (match.mask->src == cpu_to_be32(0xffffffff)) {
8647 field_flags |= I40E_CLOUD_FIELD_IIP;
8649 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8655 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8656 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8659 filter->dst_ipv4 = match.key->dst;
8660 filter->src_ipv4 = match.key->src;
8663 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8664 struct flow_match_ipv6_addrs match;
8666 flow_rule_match_ipv6_addrs(rule, &match);
8668 /* src and dest IPV6 address should not be LOOPBACK
8669 * (0:0:0:0:0:0:0:1), which can be represented as ::1
8671 if (ipv6_addr_loopback(&match.key->dst) ||
8672 ipv6_addr_loopback(&match.key->src)) {
8673 dev_err(&pf->pdev->dev,
8674 "Bad ipv6, addr is LOOPBACK\n");
8677 if (!ipv6_addr_any(&match.mask->dst) ||
8678 !ipv6_addr_any(&match.mask->src))
8679 field_flags |= I40E_CLOUD_FIELD_IIP;
8681 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8682 sizeof(filter->src_ipv6));
8683 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8684 sizeof(filter->dst_ipv6));
8687 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8688 struct flow_match_ports match;
8690 flow_rule_match_ports(rule, &match);
8691 if (match.mask->src) {
8692 if (match.mask->src == cpu_to_be16(0xffff)) {
8693 field_flags |= I40E_CLOUD_FIELD_IIP;
8695 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8696 be16_to_cpu(match.mask->src));
8701 if (match.mask->dst) {
8702 if (match.mask->dst == cpu_to_be16(0xffff)) {
8703 field_flags |= I40E_CLOUD_FIELD_IIP;
8705 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8706 be16_to_cpu(match.mask->dst));
8711 filter->dst_port = match.key->dst;
8712 filter->src_port = match.key->src;
8714 switch (filter->ip_proto) {
8719 dev_err(&pf->pdev->dev,
8720 "Only UDP and TCP transport are supported\n");
8724 filter->flags = field_flags;
8729 * i40e_handle_tclass: Forward to a traffic class on the device
8730 * @vsi: Pointer to VSI
8731 * @tc: traffic class index on the device
8732 * @filter: Pointer to cloud filter structure
8735 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8736 struct i40e_cloud_filter *filter)
8738 struct i40e_channel *ch, *ch_tmp;
8740 /* direct to a traffic class on the same device */
8742 filter->seid = vsi->seid;
8744 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8745 if (!filter->dst_port) {
8746 dev_err(&vsi->back->pdev->dev,
8747 "Specify destination port to direct to traffic class that is not default\n");
8750 if (list_empty(&vsi->ch_list))
8752 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8754 if (ch->seid == vsi->tc_seid_map[tc])
8755 filter->seid = ch->seid;
8759 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8764 * i40e_configure_clsflower - Configure tc flower filters
8765 * @vsi: Pointer to VSI
8766 * @cls_flower: Pointer to struct flow_cls_offload
8769 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8770 struct flow_cls_offload *cls_flower)
8772 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8773 struct i40e_cloud_filter *filter = NULL;
8774 struct i40e_pf *pf = vsi->back;
8778 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8783 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8787 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8788 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8791 if (pf->fdir_pf_active_filters ||
8792 (!hlist_empty(&pf->fdir_filter_list))) {
8793 dev_err(&vsi->back->pdev->dev,
8794 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8798 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8799 dev_err(&vsi->back->pdev->dev,
8800 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8801 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8802 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8805 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8809 filter->cookie = cls_flower->cookie;
8811 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8815 err = i40e_handle_tclass(vsi, tc, filter);
8819 /* Add cloud filter */
8820 if (filter->dst_port)
8821 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8823 err = i40e_add_del_cloud_filter(vsi, filter, true);
8826 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8831 /* add filter to the ordered list */
8832 INIT_HLIST_NODE(&filter->cloud_node);
8834 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8836 pf->num_cloud_filters++;
8845 * i40e_find_cloud_filter - Find the could filter in the list
8846 * @vsi: Pointer to VSI
8847 * @cookie: filter specific cookie
8850 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8851 unsigned long *cookie)
8853 struct i40e_cloud_filter *filter = NULL;
8854 struct hlist_node *node2;
8856 hlist_for_each_entry_safe(filter, node2,
8857 &vsi->back->cloud_filter_list, cloud_node)
8858 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8864 * i40e_delete_clsflower - Remove tc flower filters
8865 * @vsi: Pointer to VSI
8866 * @cls_flower: Pointer to struct flow_cls_offload
8869 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8870 struct flow_cls_offload *cls_flower)
8872 struct i40e_cloud_filter *filter = NULL;
8873 struct i40e_pf *pf = vsi->back;
8876 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8881 hash_del(&filter->cloud_node);
8883 if (filter->dst_port)
8884 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8886 err = i40e_add_del_cloud_filter(vsi, filter, false);
8890 dev_err(&pf->pdev->dev,
8891 "Failed to delete cloud filter, err %pe\n",
8893 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8896 pf->num_cloud_filters--;
8897 if (!pf->num_cloud_filters)
8898 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8899 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8900 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8901 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8902 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8908 * i40e_setup_tc_cls_flower - flower classifier offloads
8909 * @np: net device to configure
8910 * @cls_flower: offload data
8912 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8913 struct flow_cls_offload *cls_flower)
8915 struct i40e_vsi *vsi = np->vsi;
8917 switch (cls_flower->command) {
8918 case FLOW_CLS_REPLACE:
8919 return i40e_configure_clsflower(vsi, cls_flower);
8920 case FLOW_CLS_DESTROY:
8921 return i40e_delete_clsflower(vsi, cls_flower);
8922 case FLOW_CLS_STATS:
8929 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8932 struct i40e_netdev_priv *np = cb_priv;
8934 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8938 case TC_SETUP_CLSFLOWER:
8939 return i40e_setup_tc_cls_flower(np, type_data);
8946 static LIST_HEAD(i40e_block_cb_list);
8948 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8951 struct i40e_netdev_priv *np = netdev_priv(netdev);
8954 case TC_SETUP_QDISC_MQPRIO:
8955 return i40e_setup_tc(netdev, type_data);
8956 case TC_SETUP_BLOCK:
8957 return flow_block_cb_setup_simple(type_data,
8958 &i40e_block_cb_list,
8959 i40e_setup_tc_block_cb,
8967 * i40e_open - Called when a network interface is made active
8968 * @netdev: network interface device structure
8970 * The open entry point is called when a network interface is made
8971 * active by the system (IFF_UP). At this point all resources needed
8972 * for transmit and receive operations are allocated, the interrupt
8973 * handler is registered with the OS, the netdev watchdog subtask is
8974 * enabled, and the stack is notified that the interface is ready.
8976 * Returns 0 on success, negative value on failure
8978 int i40e_open(struct net_device *netdev)
8980 struct i40e_netdev_priv *np = netdev_priv(netdev);
8981 struct i40e_vsi *vsi = np->vsi;
8982 struct i40e_pf *pf = vsi->back;
8985 /* disallow open during test or if eeprom is broken */
8986 if (test_bit(__I40E_TESTING, pf->state) ||
8987 test_bit(__I40E_BAD_EEPROM, pf->state))
8990 netif_carrier_off(netdev);
8992 if (i40e_force_link_state(pf, true))
8995 err = i40e_vsi_open(vsi);
8999 /* configure global TSO hardware offload settings */
9000 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
9001 TCP_FLAG_FIN) >> 16);
9002 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
9004 TCP_FLAG_CWR) >> 16);
9005 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
9006 udp_tunnel_get_rx_info(netdev);
9012 * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
9013 * @vsi: vsi structure
9015 * This updates netdev's number of tx/rx queues
9017 * Returns status of setting tx/rx queues
9019 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
9023 ret = netif_set_real_num_rx_queues(vsi->netdev,
9024 vsi->num_queue_pairs);
9028 return netif_set_real_num_tx_queues(vsi->netdev,
9029 vsi->num_queue_pairs);
9034 * @vsi: the VSI to open
9036 * Finish initialization of the VSI.
9038 * Returns 0 on success, negative value on failure
9040 * Note: expects to be called while under rtnl_lock()
9042 int i40e_vsi_open(struct i40e_vsi *vsi)
9044 struct i40e_pf *pf = vsi->back;
9045 char int_name[I40E_INT_NAME_STR_LEN];
9048 /* allocate descriptors */
9049 err = i40e_vsi_setup_tx_resources(vsi);
9052 err = i40e_vsi_setup_rx_resources(vsi);
9056 err = i40e_vsi_configure(vsi);
9061 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
9062 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
9063 err = i40e_vsi_request_irq(vsi, int_name);
9067 /* Notify the stack of the actual queue counts. */
9068 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
9070 goto err_set_queues;
9072 } else if (vsi->type == I40E_VSI_FDIR) {
9073 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
9074 dev_driver_string(&pf->pdev->dev),
9075 dev_name(&pf->pdev->dev));
9076 err = i40e_vsi_request_irq(vsi, int_name);
9085 err = i40e_up_complete(vsi);
9087 goto err_up_complete;
9094 i40e_vsi_free_irq(vsi);
9096 i40e_vsi_free_rx_resources(vsi);
9098 i40e_vsi_free_tx_resources(vsi);
9099 if (vsi == pf->vsi[pf->lan_vsi])
9100 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
9106 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
9107 * @pf: Pointer to PF
9109 * This function destroys the hlist where all the Flow Director
9110 * filters were saved.
9112 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
9114 struct i40e_fdir_filter *filter;
9115 struct i40e_flex_pit *pit_entry, *tmp;
9116 struct hlist_node *node2;
9118 hlist_for_each_entry_safe(filter, node2,
9119 &pf->fdir_filter_list, fdir_node) {
9120 hlist_del(&filter->fdir_node);
9124 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
9125 list_del(&pit_entry->list);
9128 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
9130 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
9131 list_del(&pit_entry->list);
9134 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
9136 pf->fdir_pf_active_filters = 0;
9137 i40e_reset_fdir_filter_cnt(pf);
9139 /* Reprogram the default input set for TCP/IPv4 */
9140 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9141 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9142 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9144 /* Reprogram the default input set for TCP/IPv6 */
9145 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
9146 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9147 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9149 /* Reprogram the default input set for UDP/IPv4 */
9150 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
9151 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9152 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9154 /* Reprogram the default input set for UDP/IPv6 */
9155 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
9156 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9157 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9159 /* Reprogram the default input set for SCTP/IPv4 */
9160 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
9161 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9162 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9164 /* Reprogram the default input set for SCTP/IPv6 */
9165 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9166 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9167 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9169 /* Reprogram the default input set for Other/IPv4 */
9170 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9171 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9173 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9174 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9176 /* Reprogram the default input set for Other/IPv6 */
9177 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9178 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9180 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9181 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9185 * i40e_cloud_filter_exit - Cleans up the cloud filters
9186 * @pf: Pointer to PF
9188 * This function destroys the hlist where all the cloud filters
9191 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9193 struct i40e_cloud_filter *cfilter;
9194 struct hlist_node *node;
9196 hlist_for_each_entry_safe(cfilter, node,
9197 &pf->cloud_filter_list, cloud_node) {
9198 hlist_del(&cfilter->cloud_node);
9201 pf->num_cloud_filters = 0;
9203 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
9204 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
9205 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
9206 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
9207 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
9212 * i40e_close - Disables a network interface
9213 * @netdev: network interface device structure
9215 * The close entry point is called when an interface is de-activated
9216 * by the OS. The hardware is still under the driver's control, but
9217 * this netdev interface is disabled.
9219 * Returns 0, this is not allowed to fail
9221 int i40e_close(struct net_device *netdev)
9223 struct i40e_netdev_priv *np = netdev_priv(netdev);
9224 struct i40e_vsi *vsi = np->vsi;
9226 i40e_vsi_close(vsi);
9232 * i40e_do_reset - Start a PF or Core Reset sequence
9233 * @pf: board private structure
9234 * @reset_flags: which reset is requested
9235 * @lock_acquired: indicates whether or not the lock has been acquired
9236 * before this function was called.
9238 * The essential difference in resets is that the PF Reset
9239 * doesn't clear the packet buffers, doesn't reset the PE
9240 * firmware, and doesn't bother the other PFs on the chip.
9242 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9246 /* do the biggest reset indicated */
9247 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9249 /* Request a Global Reset
9251 * This will start the chip's countdown to the actual full
9252 * chip reset event, and a warning interrupt to be sent
9253 * to all PFs, including the requestor. Our handler
9254 * for the warning interrupt will deal with the shutdown
9255 * and recovery of the switch setup.
9257 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9258 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9259 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9260 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9262 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9264 /* Request a Core Reset
9266 * Same as Global Reset, except does *not* include the MAC/PHY
9268 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9269 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9270 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9271 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9272 i40e_flush(&pf->hw);
9274 } else if (reset_flags & I40E_PF_RESET_FLAG) {
9276 /* Request a PF Reset
9278 * Resets only the PF-specific registers
9280 * This goes directly to the tear-down and rebuild of
9281 * the switch, since we need to do all the recovery as
9282 * for the Core Reset.
9284 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9285 i40e_handle_reset_warning(pf, lock_acquired);
9287 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9288 /* Request a PF Reset
9290 * Resets PF and reinitializes PFs VSI.
9292 i40e_prep_for_reset(pf);
9293 i40e_reset_and_rebuild(pf, true, lock_acquired);
9294 dev_info(&pf->pdev->dev,
9295 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
9296 "FW LLDP is disabled\n" :
9297 "FW LLDP is enabled\n");
9299 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9302 /* Find the VSI(s) that requested a re-init */
9303 dev_info(&pf->pdev->dev,
9304 "VSI reinit requested\n");
9305 for (v = 0; v < pf->num_alloc_vsi; v++) {
9306 struct i40e_vsi *vsi = pf->vsi[v];
9309 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9311 i40e_vsi_reinit_locked(pf->vsi[v]);
9313 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9316 /* Find the VSI(s) that needs to be brought down */
9317 dev_info(&pf->pdev->dev, "VSI down requested\n");
9318 for (v = 0; v < pf->num_alloc_vsi; v++) {
9319 struct i40e_vsi *vsi = pf->vsi[v];
9322 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9324 set_bit(__I40E_VSI_DOWN, vsi->state);
9329 dev_info(&pf->pdev->dev,
9330 "bad reset request 0x%08x\n", reset_flags);
9334 #ifdef CONFIG_I40E_DCB
9336 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9337 * @pf: board private structure
9338 * @old_cfg: current DCB config
9339 * @new_cfg: new DCB config
9341 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9342 struct i40e_dcbx_config *old_cfg,
9343 struct i40e_dcbx_config *new_cfg)
9345 bool need_reconfig = false;
9347 /* Check if ETS configuration has changed */
9348 if (memcmp(&new_cfg->etscfg,
9350 sizeof(new_cfg->etscfg))) {
9351 /* If Priority Table has changed reconfig is needed */
9352 if (memcmp(&new_cfg->etscfg.prioritytable,
9353 &old_cfg->etscfg.prioritytable,
9354 sizeof(new_cfg->etscfg.prioritytable))) {
9355 need_reconfig = true;
9356 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9359 if (memcmp(&new_cfg->etscfg.tcbwtable,
9360 &old_cfg->etscfg.tcbwtable,
9361 sizeof(new_cfg->etscfg.tcbwtable)))
9362 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9364 if (memcmp(&new_cfg->etscfg.tsatable,
9365 &old_cfg->etscfg.tsatable,
9366 sizeof(new_cfg->etscfg.tsatable)))
9367 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9370 /* Check if PFC configuration has changed */
9371 if (memcmp(&new_cfg->pfc,
9373 sizeof(new_cfg->pfc))) {
9374 need_reconfig = true;
9375 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9378 /* Check if APP Table has changed */
9379 if (memcmp(&new_cfg->app,
9381 sizeof(new_cfg->app))) {
9382 need_reconfig = true;
9383 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9386 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9387 return need_reconfig;
9391 * i40e_handle_lldp_event - Handle LLDP Change MIB event
9392 * @pf: board private structure
9393 * @e: event info posted on ARQ
9395 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9396 struct i40e_arq_event_info *e)
9398 struct i40e_aqc_lldp_get_mib *mib =
9399 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9400 struct i40e_hw *hw = &pf->hw;
9401 struct i40e_dcbx_config tmp_dcbx_cfg;
9402 bool need_reconfig = false;
9406 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9407 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9408 (hw->phy.link_info.link_speed &
9409 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9410 !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9411 /* let firmware decide if the DCB should be disabled */
9412 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9414 /* Not DCB capable or capability disabled */
9415 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9418 /* Ignore if event is not for Nearest Bridge */
9419 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9420 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9421 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9422 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9425 /* Check MIB Type and return if event for Remote MIB update */
9426 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9427 dev_dbg(&pf->pdev->dev,
9428 "LLDP event mib type %s\n", type ? "remote" : "local");
9429 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9430 /* Update the remote cached instance and return */
9431 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9432 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9433 &hw->remote_dcbx_config);
9437 /* Store the old configuration */
9438 tmp_dcbx_cfg = hw->local_dcbx_config;
9440 /* Reset the old DCBx configuration data */
9441 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9442 /* Get updated DCBX data from firmware */
9443 ret = i40e_get_dcb_config(&pf->hw);
9445 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9446 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9447 (hw->phy.link_info.link_speed &
9448 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9449 dev_warn(&pf->pdev->dev,
9450 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9451 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9453 dev_info(&pf->pdev->dev,
9454 "Failed querying DCB configuration data from firmware, err %pe aq_err %s\n",
9456 i40e_aq_str(&pf->hw,
9457 pf->hw.aq.asq_last_status));
9462 /* No change detected in DCBX configs */
9463 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9464 sizeof(tmp_dcbx_cfg))) {
9465 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9469 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9470 &hw->local_dcbx_config);
9472 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9477 /* Enable DCB tagging only when more than one TC */
9478 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9479 pf->flags |= I40E_FLAG_DCB_ENABLED;
9481 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9483 set_bit(__I40E_PORT_SUSPENDED, pf->state);
9484 /* Reconfiguration needed quiesce all VSIs */
9485 i40e_pf_quiesce_all_vsi(pf);
9487 /* Changes in configuration update VEB/VSI */
9488 i40e_dcb_reconfigure(pf);
9490 ret = i40e_resume_port_tx(pf);
9492 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9493 /* In case of error no point in resuming VSIs */
9497 /* Wait for the PF's queues to be disabled */
9498 ret = i40e_pf_wait_queues_disabled(pf);
9500 /* Schedule PF reset to recover */
9501 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9502 i40e_service_event_schedule(pf);
9504 i40e_pf_unquiesce_all_vsi(pf);
9505 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9506 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9512 #endif /* CONFIG_I40E_DCB */
9515 * i40e_do_reset_safe - Protected reset path for userland calls.
9516 * @pf: board private structure
9517 * @reset_flags: which reset is requested
9520 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9523 i40e_do_reset(pf, reset_flags, true);
9528 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9529 * @pf: board private structure
9530 * @e: event info posted on ARQ
9532 * Handler for LAN Queue Overflow Event generated by the firmware for PF
9535 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9536 struct i40e_arq_event_info *e)
9538 struct i40e_aqc_lan_overflow *data =
9539 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9540 u32 queue = le32_to_cpu(data->prtdcb_rupto);
9541 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9542 struct i40e_hw *hw = &pf->hw;
9546 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9549 /* Queue belongs to VF, find the VF and issue VF reset */
9550 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9551 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9552 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9553 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9554 vf_id -= hw->func_caps.vf_base_id;
9555 vf = &pf->vf[vf_id];
9556 i40e_vc_notify_vf_reset(vf);
9557 /* Allow VF to process pending reset notification */
9559 i40e_reset_vf(vf, false);
9564 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9565 * @pf: board private structure
9567 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9571 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9572 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9577 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9578 * @pf: board private structure
9580 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9584 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9585 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9586 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9587 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9592 * i40e_get_global_fd_count - Get total FD filters programmed on device
9593 * @pf: board private structure
9595 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9599 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9600 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9601 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9602 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9607 * i40e_reenable_fdir_sb - Restore FDir SB capability
9608 * @pf: board private structure
9610 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9612 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9613 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9614 (I40E_DEBUG_FD & pf->hw.debug_mask))
9615 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9619 * i40e_reenable_fdir_atr - Restore FDir ATR capability
9620 * @pf: board private structure
9622 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9624 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9625 /* ATR uses the same filtering logic as SB rules. It only
9626 * functions properly if the input set mask is at the default
9627 * settings. It is safe to restore the default input set
9628 * because there are no active TCPv4 filter rules.
9630 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9631 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9632 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9634 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9635 (I40E_DEBUG_FD & pf->hw.debug_mask))
9636 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9641 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9642 * @pf: board private structure
9643 * @filter: FDir filter to remove
9645 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9646 struct i40e_fdir_filter *filter)
9648 /* Update counters */
9649 pf->fdir_pf_active_filters--;
9652 switch (filter->flow_type) {
9654 pf->fd_tcp4_filter_cnt--;
9657 pf->fd_udp4_filter_cnt--;
9660 pf->fd_sctp4_filter_cnt--;
9663 pf->fd_tcp6_filter_cnt--;
9666 pf->fd_udp6_filter_cnt--;
9669 pf->fd_udp6_filter_cnt--;
9672 switch (filter->ipl4_proto) {
9674 pf->fd_tcp4_filter_cnt--;
9677 pf->fd_udp4_filter_cnt--;
9680 pf->fd_sctp4_filter_cnt--;
9683 pf->fd_ip4_filter_cnt--;
9687 case IPV6_USER_FLOW:
9688 switch (filter->ipl4_proto) {
9690 pf->fd_tcp6_filter_cnt--;
9693 pf->fd_udp6_filter_cnt--;
9696 pf->fd_sctp6_filter_cnt--;
9699 pf->fd_ip6_filter_cnt--;
9705 /* Remove the filter from the list and free memory */
9706 hlist_del(&filter->fdir_node);
9711 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9712 * @pf: board private structure
9714 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9716 struct i40e_fdir_filter *filter;
9717 u32 fcnt_prog, fcnt_avail;
9718 struct hlist_node *node;
9720 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9723 /* Check if we have enough room to re-enable FDir SB capability. */
9724 fcnt_prog = i40e_get_global_fd_count(pf);
9725 fcnt_avail = pf->fdir_pf_filter_count;
9726 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9727 (pf->fd_add_err == 0) ||
9728 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9729 i40e_reenable_fdir_sb(pf);
9731 /* We should wait for even more space before re-enabling ATR.
9732 * Additionally, we cannot enable ATR as long as we still have TCP SB
9735 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9736 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9737 i40e_reenable_fdir_atr(pf);
9739 /* if hw had a problem adding a filter, delete it */
9740 if (pf->fd_inv > 0) {
9741 hlist_for_each_entry_safe(filter, node,
9742 &pf->fdir_filter_list, fdir_node)
9743 if (filter->fd_id == pf->fd_inv)
9744 i40e_delete_invalid_filter(pf, filter);
9748 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9749 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9751 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9752 * @pf: board private structure
9754 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9756 unsigned long min_flush_time;
9757 int flush_wait_retry = 50;
9758 bool disable_atr = false;
9762 if (!time_after(jiffies, pf->fd_flush_timestamp +
9763 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9766 /* If the flush is happening too quick and we have mostly SB rules we
9767 * should not re-enable ATR for some time.
9769 min_flush_time = pf->fd_flush_timestamp +
9770 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9771 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9773 if (!(time_after(jiffies, min_flush_time)) &&
9774 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9775 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9776 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9780 pf->fd_flush_timestamp = jiffies;
9781 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9782 /* flush all filters */
9783 wr32(&pf->hw, I40E_PFQF_CTL_1,
9784 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9785 i40e_flush(&pf->hw);
9789 /* Check FD flush status every 5-6msec */
9790 usleep_range(5000, 6000);
9791 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9792 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9794 } while (flush_wait_retry--);
9795 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9796 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9798 /* replay sideband filters */
9799 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9800 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9801 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9802 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9803 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9804 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9809 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9810 * @pf: board private structure
9812 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9814 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9818 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9819 * @pf: board private structure
9821 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9824 /* if interface is down do nothing */
9825 if (test_bit(__I40E_DOWN, pf->state))
9828 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9829 i40e_fdir_flush_and_replay(pf);
9831 i40e_fdir_check_and_reenable(pf);
9836 * i40e_vsi_link_event - notify VSI of a link event
9837 * @vsi: vsi to be notified
9838 * @link_up: link up or down
9840 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9842 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9845 switch (vsi->type) {
9847 if (!vsi->netdev || !vsi->netdev_registered)
9851 netif_carrier_on(vsi->netdev);
9852 netif_tx_wake_all_queues(vsi->netdev);
9854 netif_carrier_off(vsi->netdev);
9855 netif_tx_stop_all_queues(vsi->netdev);
9859 case I40E_VSI_SRIOV:
9860 case I40E_VSI_VMDQ2:
9862 case I40E_VSI_IWARP:
9863 case I40E_VSI_MIRROR:
9865 /* there is no notification for other VSIs */
9871 * i40e_veb_link_event - notify elements on the veb of a link event
9872 * @veb: veb to be notified
9873 * @link_up: link up or down
9875 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9880 if (!veb || !veb->pf)
9884 /* depth first... */
9885 for (i = 0; i < I40E_MAX_VEB; i++)
9886 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9887 i40e_veb_link_event(pf->veb[i], link_up);
9889 /* ... now the local VSIs */
9890 for (i = 0; i < pf->num_alloc_vsi; i++)
9891 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9892 i40e_vsi_link_event(pf->vsi[i], link_up);
9896 * i40e_link_event - Update netif_carrier status
9897 * @pf: board private structure
9899 static void i40e_link_event(struct i40e_pf *pf)
9901 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9902 u8 new_link_speed, old_link_speed;
9903 bool new_link, old_link;
9905 #ifdef CONFIG_I40E_DCB
9907 #endif /* CONFIG_I40E_DCB */
9909 /* set this to force the get_link_status call to refresh state */
9910 pf->hw.phy.get_link_info = true;
9911 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9912 status = i40e_get_link_status(&pf->hw, &new_link);
9914 /* On success, disable temp link polling */
9916 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9918 /* Enable link polling temporarily until i40e_get_link_status
9921 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9922 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9927 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9928 new_link_speed = pf->hw.phy.link_info.link_speed;
9930 if (new_link == old_link &&
9931 new_link_speed == old_link_speed &&
9932 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9933 new_link == netif_carrier_ok(vsi->netdev)))
9936 i40e_print_link_message(vsi, new_link);
9938 /* Notify the base of the switch tree connected to
9939 * the link. Floating VEBs are not notified.
9941 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9942 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9944 i40e_vsi_link_event(vsi, new_link);
9947 i40e_vc_notify_link_state(pf);
9949 if (pf->flags & I40E_FLAG_PTP)
9950 i40e_ptp_set_increment(pf);
9951 #ifdef CONFIG_I40E_DCB
9952 if (new_link == old_link)
9954 /* Not SW DCB so firmware will take care of default settings */
9955 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9958 /* We cover here only link down, as after link up in case of SW DCB
9959 * SW LLDP agent will take care of setting it up
9962 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9963 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9964 err = i40e_dcb_sw_default_config(pf);
9966 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9967 I40E_FLAG_DCB_ENABLED);
9969 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9970 DCB_CAP_DCBX_VER_IEEE;
9971 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9972 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9975 #endif /* CONFIG_I40E_DCB */
9979 * i40e_watchdog_subtask - periodic checks not using event driven response
9980 * @pf: board private structure
9982 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9986 /* if interface is down do nothing */
9987 if (test_bit(__I40E_DOWN, pf->state) ||
9988 test_bit(__I40E_CONFIG_BUSY, pf->state))
9991 /* make sure we don't do these things too often */
9992 if (time_before(jiffies, (pf->service_timer_previous +
9993 pf->service_timer_period)))
9995 pf->service_timer_previous = jiffies;
9997 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9998 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9999 i40e_link_event(pf);
10001 /* Update the stats for active netdevs so the network stack
10002 * can look at updated numbers whenever it cares to
10004 for (i = 0; i < pf->num_alloc_vsi; i++)
10005 if (pf->vsi[i] && pf->vsi[i]->netdev)
10006 i40e_update_stats(pf->vsi[i]);
10008 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
10009 /* Update the stats for the active switching components */
10010 for (i = 0; i < I40E_MAX_VEB; i++)
10012 i40e_update_veb_stats(pf->veb[i]);
10015 i40e_ptp_rx_hang(pf);
10016 i40e_ptp_tx_hang(pf);
10020 * i40e_reset_subtask - Set up for resetting the device and driver
10021 * @pf: board private structure
10023 static void i40e_reset_subtask(struct i40e_pf *pf)
10025 u32 reset_flags = 0;
10027 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
10028 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
10029 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
10031 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
10032 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
10033 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
10035 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
10036 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
10037 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
10039 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
10040 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
10041 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
10043 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
10044 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
10045 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
10048 /* If there's a recovery already waiting, it takes
10049 * precedence before starting a new reset sequence.
10051 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
10052 i40e_prep_for_reset(pf);
10054 i40e_rebuild(pf, false, false);
10057 /* If we're already down or resetting, just bail */
10059 !test_bit(__I40E_DOWN, pf->state) &&
10060 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
10061 i40e_do_reset(pf, reset_flags, false);
10066 * i40e_handle_link_event - Handle link event
10067 * @pf: board private structure
10068 * @e: event info posted on ARQ
10070 static void i40e_handle_link_event(struct i40e_pf *pf,
10071 struct i40e_arq_event_info *e)
10073 struct i40e_aqc_get_link_status *status =
10074 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
10076 /* Do a new status request to re-enable LSE reporting
10077 * and load new status information into the hw struct
10078 * This completely ignores any state information
10079 * in the ARQ event info, instead choosing to always
10080 * issue the AQ update link status command.
10082 i40e_link_event(pf);
10084 /* Check if module meets thermal requirements */
10085 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
10086 dev_err(&pf->pdev->dev,
10087 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
10088 dev_err(&pf->pdev->dev,
10089 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10091 /* check for unqualified module, if link is down, suppress
10092 * the message if link was forced to be down.
10094 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
10095 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
10096 (!(status->link_info & I40E_AQ_LINK_UP)) &&
10097 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
10098 dev_err(&pf->pdev->dev,
10099 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
10100 dev_err(&pf->pdev->dev,
10101 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
10107 * i40e_clean_adminq_subtask - Clean the AdminQ rings
10108 * @pf: board private structure
10110 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
10112 struct i40e_arq_event_info event;
10113 struct i40e_hw *hw = &pf->hw;
10114 u16 pending, i = 0;
10120 /* Do not run clean AQ when PF reset fails */
10121 if (test_bit(__I40E_RESET_FAILED, pf->state))
10124 /* check for error indications */
10125 val = rd32(&pf->hw, pf->hw.aq.arq.len);
10127 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
10128 if (hw->debug_mask & I40E_DEBUG_AQ)
10129 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
10130 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
10132 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
10133 if (hw->debug_mask & I40E_DEBUG_AQ)
10134 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
10135 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
10136 pf->arq_overflows++;
10138 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
10139 if (hw->debug_mask & I40E_DEBUG_AQ)
10140 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
10141 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
10144 wr32(&pf->hw, pf->hw.aq.arq.len, val);
10146 val = rd32(&pf->hw, pf->hw.aq.asq.len);
10148 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
10149 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10150 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
10151 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
10153 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
10154 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10155 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
10156 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
10158 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
10159 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10160 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10161 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10164 wr32(&pf->hw, pf->hw.aq.asq.len, val);
10166 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10167 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10168 if (!event.msg_buf)
10172 ret = i40e_clean_arq_element(hw, &event, &pending);
10173 if (ret == -EALREADY)
10176 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10180 opcode = le16_to_cpu(event.desc.opcode);
10183 case i40e_aqc_opc_get_link_status:
10185 i40e_handle_link_event(pf, &event);
10188 case i40e_aqc_opc_send_msg_to_pf:
10189 ret = i40e_vc_process_vf_msg(pf,
10190 le16_to_cpu(event.desc.retval),
10191 le32_to_cpu(event.desc.cookie_high),
10192 le32_to_cpu(event.desc.cookie_low),
10196 case i40e_aqc_opc_lldp_update_mib:
10197 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10198 #ifdef CONFIG_I40E_DCB
10200 i40e_handle_lldp_event(pf, &event);
10202 #endif /* CONFIG_I40E_DCB */
10204 case i40e_aqc_opc_event_lan_overflow:
10205 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10206 i40e_handle_lan_overflow_event(pf, &event);
10208 case i40e_aqc_opc_send_msg_to_peer:
10209 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10211 case i40e_aqc_opc_nvm_erase:
10212 case i40e_aqc_opc_nvm_update:
10213 case i40e_aqc_opc_oem_post_update:
10214 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10215 "ARQ NVM operation 0x%04x completed\n",
10219 dev_info(&pf->pdev->dev,
10220 "ARQ: Unknown event 0x%04x ignored\n",
10224 } while (i++ < pf->adminq_work_limit);
10226 if (i < pf->adminq_work_limit)
10227 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10229 /* re-enable Admin queue interrupt cause */
10230 val = rd32(hw, I40E_PFINT_ICR0_ENA);
10231 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10232 wr32(hw, I40E_PFINT_ICR0_ENA, val);
10235 kfree(event.msg_buf);
10239 * i40e_verify_eeprom - make sure eeprom is good to use
10240 * @pf: board private structure
10242 static void i40e_verify_eeprom(struct i40e_pf *pf)
10246 err = i40e_diag_eeprom_test(&pf->hw);
10248 /* retry in case of garbage read */
10249 err = i40e_diag_eeprom_test(&pf->hw);
10251 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10253 set_bit(__I40E_BAD_EEPROM, pf->state);
10257 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10258 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10259 clear_bit(__I40E_BAD_EEPROM, pf->state);
10264 * i40e_enable_pf_switch_lb
10265 * @pf: pointer to the PF structure
10267 * enable switch loop back or die - no point in a return value
10269 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10271 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10272 struct i40e_vsi_context ctxt;
10275 ctxt.seid = pf->main_vsi_seid;
10276 ctxt.pf_num = pf->hw.pf_id;
10278 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10280 dev_info(&pf->pdev->dev,
10281 "couldn't get PF vsi config, err %pe aq_err %s\n",
10283 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10286 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10287 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10288 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10290 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10292 dev_info(&pf->pdev->dev,
10293 "update vsi switch failed, err %pe aq_err %s\n",
10295 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10300 * i40e_disable_pf_switch_lb
10301 * @pf: pointer to the PF structure
10303 * disable switch loop back or die - no point in a return value
10305 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10307 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10308 struct i40e_vsi_context ctxt;
10311 ctxt.seid = pf->main_vsi_seid;
10312 ctxt.pf_num = pf->hw.pf_id;
10314 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10316 dev_info(&pf->pdev->dev,
10317 "couldn't get PF vsi config, err %pe aq_err %s\n",
10319 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10322 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10323 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10324 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10326 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10328 dev_info(&pf->pdev->dev,
10329 "update vsi switch failed, err %pe aq_err %s\n",
10331 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10336 * i40e_config_bridge_mode - Configure the HW bridge mode
10337 * @veb: pointer to the bridge instance
10339 * Configure the loop back mode for the LAN VSI that is downlink to the
10340 * specified HW bridge instance. It is expected this function is called
10341 * when a new HW bridge is instantiated.
10343 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10345 struct i40e_pf *pf = veb->pf;
10347 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10348 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10349 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10350 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10351 i40e_disable_pf_switch_lb(pf);
10353 i40e_enable_pf_switch_lb(pf);
10357 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10358 * @veb: pointer to the VEB instance
10360 * This is a recursive function that first builds the attached VSIs then
10361 * recurses in to build the next layer of VEB. We track the connections
10362 * through our own index numbers because the seid's from the HW could
10363 * change across the reset.
10365 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10367 struct i40e_vsi *ctl_vsi = NULL;
10368 struct i40e_pf *pf = veb->pf;
10372 /* build VSI that owns this VEB, temporarily attached to base VEB */
10373 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10375 pf->vsi[v]->veb_idx == veb->idx &&
10376 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10377 ctl_vsi = pf->vsi[v];
10382 dev_info(&pf->pdev->dev,
10383 "missing owner VSI for veb_idx %d\n", veb->idx);
10385 goto end_reconstitute;
10387 if (ctl_vsi != pf->vsi[pf->lan_vsi])
10388 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10389 ret = i40e_add_vsi(ctl_vsi);
10391 dev_info(&pf->pdev->dev,
10392 "rebuild of veb_idx %d owner VSI failed: %d\n",
10394 goto end_reconstitute;
10396 i40e_vsi_reset_stats(ctl_vsi);
10398 /* create the VEB in the switch and move the VSI onto the VEB */
10399 ret = i40e_add_veb(veb, ctl_vsi);
10401 goto end_reconstitute;
10403 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10404 veb->bridge_mode = BRIDGE_MODE_VEB;
10406 veb->bridge_mode = BRIDGE_MODE_VEPA;
10407 i40e_config_bridge_mode(veb);
10409 /* create the remaining VSIs attached to this VEB */
10410 for (v = 0; v < pf->num_alloc_vsi; v++) {
10411 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10414 if (pf->vsi[v]->veb_idx == veb->idx) {
10415 struct i40e_vsi *vsi = pf->vsi[v];
10417 vsi->uplink_seid = veb->seid;
10418 ret = i40e_add_vsi(vsi);
10420 dev_info(&pf->pdev->dev,
10421 "rebuild of vsi_idx %d failed: %d\n",
10423 goto end_reconstitute;
10425 i40e_vsi_reset_stats(vsi);
10429 /* create any VEBs attached to this VEB - RECURSION */
10430 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10431 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10432 pf->veb[veb_idx]->uplink_seid = veb->seid;
10433 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10444 * i40e_get_capabilities - get info about the HW
10445 * @pf: the PF struct
10446 * @list_type: AQ capability to be queried
10448 static int i40e_get_capabilities(struct i40e_pf *pf,
10449 enum i40e_admin_queue_opc list_type)
10451 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10456 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10458 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10462 /* this loads the data into the hw struct for us */
10463 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10464 &data_size, list_type,
10466 /* data loaded, buffer no longer needed */
10469 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10470 /* retry with a larger buffer */
10471 buf_len = data_size;
10472 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10473 dev_info(&pf->pdev->dev,
10474 "capability discovery failed, err %pe aq_err %s\n",
10476 i40e_aq_str(&pf->hw,
10477 pf->hw.aq.asq_last_status));
10482 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10483 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10484 dev_info(&pf->pdev->dev,
10485 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10486 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10487 pf->hw.func_caps.num_msix_vectors,
10488 pf->hw.func_caps.num_msix_vectors_vf,
10489 pf->hw.func_caps.fd_filters_guaranteed,
10490 pf->hw.func_caps.fd_filters_best_effort,
10491 pf->hw.func_caps.num_tx_qp,
10492 pf->hw.func_caps.num_vsis);
10493 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10494 dev_info(&pf->pdev->dev,
10495 "switch_mode=0x%04x, function_valid=0x%08x\n",
10496 pf->hw.dev_caps.switch_mode,
10497 pf->hw.dev_caps.valid_functions);
10498 dev_info(&pf->pdev->dev,
10499 "SR-IOV=%d, num_vfs for all function=%u\n",
10500 pf->hw.dev_caps.sr_iov_1_1,
10501 pf->hw.dev_caps.num_vfs);
10502 dev_info(&pf->pdev->dev,
10503 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10504 pf->hw.dev_caps.num_vsis,
10505 pf->hw.dev_caps.num_rx_qp,
10506 pf->hw.dev_caps.num_tx_qp);
10509 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10510 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10511 + pf->hw.func_caps.num_vfs)
10512 if (pf->hw.revision_id == 0 &&
10513 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10514 dev_info(&pf->pdev->dev,
10515 "got num_vsis %d, setting num_vsis to %d\n",
10516 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10517 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10523 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10526 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10527 * @pf: board private structure
10529 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10531 struct i40e_vsi *vsi;
10533 /* quick workaround for an NVM issue that leaves a critical register
10536 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10537 static const u32 hkey[] = {
10538 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10539 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10540 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10544 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10545 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10548 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10551 /* find existing VSI and see if it needs configuring */
10552 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10554 /* create a new VSI if none exists */
10556 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10557 pf->vsi[pf->lan_vsi]->seid, 0);
10559 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10560 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10561 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10566 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10570 * i40e_fdir_teardown - release the Flow Director resources
10571 * @pf: board private structure
10573 static void i40e_fdir_teardown(struct i40e_pf *pf)
10575 struct i40e_vsi *vsi;
10577 i40e_fdir_filter_exit(pf);
10578 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10580 i40e_vsi_release(vsi);
10584 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10585 * @vsi: PF main vsi
10586 * @seid: seid of main or channel VSIs
10588 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10589 * existed before reset
10591 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10593 struct i40e_cloud_filter *cfilter;
10594 struct i40e_pf *pf = vsi->back;
10595 struct hlist_node *node;
10598 /* Add cloud filters back if they exist */
10599 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10601 if (cfilter->seid != seid)
10604 if (cfilter->dst_port)
10605 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10608 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10611 dev_dbg(&pf->pdev->dev,
10612 "Failed to rebuild cloud filter, err %pe aq_err %s\n",
10614 i40e_aq_str(&pf->hw,
10615 pf->hw.aq.asq_last_status));
10623 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10624 * @vsi: PF main vsi
10626 * Rebuilds channel VSIs if they existed before reset
10628 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10630 struct i40e_channel *ch, *ch_tmp;
10633 if (list_empty(&vsi->ch_list))
10636 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10637 if (!ch->initialized)
10639 /* Proceed with creation of channel (VMDq2) VSI */
10640 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10642 dev_info(&vsi->back->pdev->dev,
10643 "failed to rebuild channels using uplink_seid %u\n",
10647 /* Reconfigure TX queues using QTX_CTL register */
10648 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10650 dev_info(&vsi->back->pdev->dev,
10651 "failed to configure TX rings for channel %u\n",
10655 /* update 'next_base_queue' */
10656 vsi->next_base_queue = vsi->next_base_queue +
10657 ch->num_queue_pairs;
10658 if (ch->max_tx_rate) {
10659 u64 credits = ch->max_tx_rate;
10661 if (i40e_set_bw_limit(vsi, ch->seid,
10665 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10666 dev_dbg(&vsi->back->pdev->dev,
10667 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10672 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10674 dev_dbg(&vsi->back->pdev->dev,
10675 "Failed to rebuild cloud filters for channel VSI %u\n",
10684 * i40e_clean_xps_state - clean xps state for every tx_ring
10685 * @vsi: ptr to the VSI
10687 static void i40e_clean_xps_state(struct i40e_vsi *vsi)
10692 for (i = 0; i < vsi->num_queue_pairs; i++)
10693 if (vsi->tx_rings[i])
10694 clear_bit(__I40E_TX_XPS_INIT_DONE,
10695 vsi->tx_rings[i]->state);
10699 * i40e_prep_for_reset - prep for the core to reset
10700 * @pf: board private structure
10702 * Close up the VFs and other things in prep for PF Reset.
10704 static void i40e_prep_for_reset(struct i40e_pf *pf)
10706 struct i40e_hw *hw = &pf->hw;
10710 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10711 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10713 if (i40e_check_asq_alive(&pf->hw))
10714 i40e_vc_notify_reset(pf);
10716 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10718 /* quiesce the VSIs and their queues that are not already DOWN */
10719 i40e_pf_quiesce_all_vsi(pf);
10721 for (v = 0; v < pf->num_alloc_vsi; v++) {
10723 i40e_clean_xps_state(pf->vsi[v]);
10724 pf->vsi[v]->seid = 0;
10728 i40e_shutdown_adminq(&pf->hw);
10730 /* call shutdown HMC */
10731 if (hw->hmc.hmc_obj) {
10732 ret = i40e_shutdown_lan_hmc(hw);
10734 dev_warn(&pf->pdev->dev,
10735 "shutdown_lan_hmc failed: %d\n", ret);
10738 /* Save the current PTP time so that we can restore the time after the
10741 i40e_ptp_save_hw_time(pf);
10745 * i40e_send_version - update firmware with driver version
10748 static void i40e_send_version(struct i40e_pf *pf)
10750 struct i40e_driver_version dv;
10752 dv.major_version = 0xff;
10753 dv.minor_version = 0xff;
10754 dv.build_version = 0xff;
10755 dv.subbuild_version = 0;
10756 strscpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10757 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10761 * i40e_get_oem_version - get OEM specific version information
10762 * @hw: pointer to the hardware structure
10764 static void i40e_get_oem_version(struct i40e_hw *hw)
10766 u16 block_offset = 0xffff;
10767 u16 block_length = 0;
10768 u16 capabilities = 0;
10772 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
10773 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
10774 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
10775 #define I40E_NVM_OEM_GEN_OFFSET 0x02
10776 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
10777 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
10778 #define I40E_NVM_OEM_LENGTH 3
10780 /* Check if pointer to OEM version block is valid. */
10781 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10782 if (block_offset == 0xffff)
10785 /* Check if OEM version block has correct length. */
10786 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10788 if (block_length < I40E_NVM_OEM_LENGTH)
10791 /* Check if OEM version format is as expected. */
10792 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10794 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10797 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10799 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10802 FIELD_PREP(I40E_OEM_GEN_MASK | I40E_OEM_SNAP_MASK, gen_snap) |
10803 FIELD_PREP(I40E_OEM_RELEASE_MASK, release);
10804 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10808 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10809 * @pf: board private structure
10811 static int i40e_reset(struct i40e_pf *pf)
10813 struct i40e_hw *hw = &pf->hw;
10816 ret = i40e_pf_reset(hw);
10818 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10819 set_bit(__I40E_RESET_FAILED, pf->state);
10820 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10828 * i40e_rebuild - rebuild using a saved config
10829 * @pf: board private structure
10830 * @reinit: if the Main VSI needs to re-initialized.
10831 * @lock_acquired: indicates whether or not the lock has been acquired
10832 * before this function was called.
10834 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10836 const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10837 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10838 struct i40e_hw *hw = &pf->hw;
10843 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10844 is_recovery_mode_reported)
10845 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10847 if (test_bit(__I40E_DOWN, pf->state) &&
10848 !test_bit(__I40E_RECOVERY_MODE, pf->state))
10849 goto clear_recovery;
10850 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10852 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10853 ret = i40e_init_adminq(&pf->hw);
10855 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %pe aq_err %s\n",
10857 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10858 goto clear_recovery;
10860 i40e_get_oem_version(&pf->hw);
10862 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10863 /* The following delay is necessary for firmware update. */
10867 /* re-verify the eeprom if we just had an EMP reset */
10868 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10869 i40e_verify_eeprom(pf);
10871 /* if we are going out of or into recovery mode we have to act
10872 * accordingly with regard to resources initialization
10873 * and deinitialization
10875 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10876 if (i40e_get_capabilities(pf,
10877 i40e_aqc_opc_list_func_capabilities))
10880 if (is_recovery_mode_reported) {
10881 /* we're staying in recovery mode so we'll reinitialize
10884 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10887 if (!lock_acquired)
10889 /* we're going out of recovery mode so we'll free
10890 * the IRQ allocated specifically for recovery mode
10891 * and restore the interrupt scheme
10893 free_irq(pf->pdev->irq, pf);
10894 i40e_clear_interrupt_scheme(pf);
10895 if (i40e_restore_interrupt_scheme(pf))
10899 /* tell the firmware that we're starting */
10900 i40e_send_version(pf);
10902 /* bail out in case recovery mode was detected, as there is
10903 * no need for further configuration.
10908 i40e_clear_pxe_mode(hw);
10909 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10911 goto end_core_reset;
10913 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10914 hw->func_caps.num_rx_qp, 0, 0);
10916 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10917 goto end_core_reset;
10919 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10921 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10922 goto end_core_reset;
10925 #ifdef CONFIG_I40E_DCB
10926 /* Enable FW to write a default DCB config on link-up
10927 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10928 * is not supported with new link speed
10930 if (i40e_is_tc_mqprio_enabled(pf)) {
10931 i40e_aq_set_dcb_parameters(hw, false, NULL);
10933 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10934 (hw->phy.link_info.link_speed &
10935 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10936 i40e_aq_set_dcb_parameters(hw, false, NULL);
10937 dev_warn(&pf->pdev->dev,
10938 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10939 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10941 i40e_aq_set_dcb_parameters(hw, true, NULL);
10942 ret = i40e_init_pf_dcb(pf);
10944 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10946 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10947 /* Continue without DCB enabled */
10952 #endif /* CONFIG_I40E_DCB */
10953 if (!lock_acquired)
10955 ret = i40e_setup_pf_switch(pf, reinit, true);
10959 /* The driver only wants link up/down and module qualification
10960 * reports from firmware. Note the negative logic.
10962 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10963 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10964 I40E_AQ_EVENT_MEDIA_NA |
10965 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10967 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
10969 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10971 /* Rebuild the VSIs and VEBs that existed before reset.
10972 * They are still in our local switch element arrays, so only
10973 * need to rebuild the switch model in the HW.
10975 * If there were VEBs but the reconstitution failed, we'll try
10976 * to recover minimal use by getting the basic PF VSI working.
10978 if (vsi->uplink_seid != pf->mac_seid) {
10979 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10980 /* find the one VEB connected to the MAC, and find orphans */
10981 for (v = 0; v < I40E_MAX_VEB; v++) {
10985 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10986 pf->veb[v]->uplink_seid == 0) {
10987 ret = i40e_reconstitute_veb(pf->veb[v]);
10992 /* If Main VEB failed, we're in deep doodoo,
10993 * so give up rebuilding the switch and set up
10994 * for minimal rebuild of PF VSI.
10995 * If orphan failed, we'll report the error
10996 * but try to keep going.
10998 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10999 dev_info(&pf->pdev->dev,
11000 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
11002 vsi->uplink_seid = pf->mac_seid;
11004 } else if (pf->veb[v]->uplink_seid == 0) {
11005 dev_info(&pf->pdev->dev,
11006 "rebuild of orphan VEB failed: %d\n",
11013 if (vsi->uplink_seid == pf->mac_seid) {
11014 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
11015 /* no VEB, so rebuild only the Main VSI */
11016 ret = i40e_add_vsi(vsi);
11018 dev_info(&pf->pdev->dev,
11019 "rebuild of Main VSI failed: %d\n", ret);
11024 if (vsi->mqprio_qopt.max_rate[0]) {
11025 u64 max_tx_rate = i40e_bw_bytes_to_mbits(vsi,
11026 vsi->mqprio_qopt.max_rate[0]);
11029 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
11033 credits = max_tx_rate;
11034 do_div(credits, I40E_BW_CREDIT_DIVISOR);
11035 dev_dbg(&vsi->back->pdev->dev,
11036 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
11042 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
11046 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
11047 * for this main VSI if they exist
11049 ret = i40e_rebuild_channels(vsi);
11053 /* Reconfigure hardware for allowing smaller MSS in the case
11054 * of TSO, so that we avoid the MDD being fired and causing
11055 * a reset in the case of small MSS+TSO.
11057 #define I40E_REG_MSS 0x000E64DC
11058 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
11059 #define I40E_64BYTE_MSS 0x400000
11060 val = rd32(hw, I40E_REG_MSS);
11061 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11062 val &= ~I40E_REG_MSS_MIN_MASK;
11063 val |= I40E_64BYTE_MSS;
11064 wr32(hw, I40E_REG_MSS, val);
11067 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
11069 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11071 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
11073 i40e_aq_str(&pf->hw,
11074 pf->hw.aq.asq_last_status));
11076 /* reinit the misc interrupt */
11077 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11078 ret = i40e_setup_misc_vector(pf);
11083 /* Add a filter to drop all Flow control frames from any VSI from being
11084 * transmitted. By doing so we stop a malicious VF from sending out
11085 * PAUSE or PFC frames and potentially controlling traffic for other
11087 * The FW can still send Flow control frames if enabled.
11089 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11090 pf->main_vsi_seid);
11092 /* restart the VSIs that were rebuilt and running before the reset */
11093 i40e_pf_unquiesce_all_vsi(pf);
11095 /* Release the RTNL lock before we start resetting VFs */
11096 if (!lock_acquired)
11099 /* Restore promiscuous settings */
11100 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
11102 dev_warn(&pf->pdev->dev,
11103 "Failed to restore promiscuous setting: %s, err %pe aq_err %s\n",
11104 pf->cur_promisc ? "on" : "off",
11106 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11108 i40e_reset_all_vfs(pf, true);
11110 /* tell the firmware that we're starting */
11111 i40e_send_version(pf);
11113 /* We've already released the lock, so don't do it again */
11114 goto end_core_reset;
11117 if (!lock_acquired)
11120 clear_bit(__I40E_RESET_FAILED, pf->state);
11122 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
11123 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
11127 * i40e_reset_and_rebuild - reset and rebuild using a saved config
11128 * @pf: board private structure
11129 * @reinit: if the Main VSI needs to re-initialized.
11130 * @lock_acquired: indicates whether or not the lock has been acquired
11131 * before this function was called.
11133 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
11134 bool lock_acquired)
11138 if (test_bit(__I40E_IN_REMOVE, pf->state))
11140 /* Now we wait for GRST to settle out.
11141 * We don't have to delete the VEBs or VSIs from the hw switch
11142 * because the reset will make them disappear.
11144 ret = i40e_reset(pf);
11146 i40e_rebuild(pf, reinit, lock_acquired);
11150 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
11151 * @pf: board private structure
11153 * Close up the VFs and other things in prep for a Core Reset,
11154 * then get ready to rebuild the world.
11155 * @lock_acquired: indicates whether or not the lock has been acquired
11156 * before this function was called.
11158 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
11160 i40e_prep_for_reset(pf);
11161 i40e_reset_and_rebuild(pf, false, lock_acquired);
11165 * i40e_handle_mdd_event
11166 * @pf: pointer to the PF structure
11168 * Called from the MDD irq handler to identify possibly malicious vfs
11170 static void i40e_handle_mdd_event(struct i40e_pf *pf)
11172 struct i40e_hw *hw = &pf->hw;
11173 bool mdd_detected = false;
11174 struct i40e_vf *vf;
11178 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
11181 /* find what triggered the MDD event */
11182 reg = rd32(hw, I40E_GL_MDET_TX);
11183 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11184 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
11185 I40E_GL_MDET_TX_PF_NUM_SHIFT;
11186 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
11187 I40E_GL_MDET_TX_VF_NUM_SHIFT;
11188 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
11189 I40E_GL_MDET_TX_EVENT_SHIFT;
11190 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
11191 I40E_GL_MDET_TX_QUEUE_SHIFT) -
11192 pf->hw.func_caps.base_queue;
11193 if (netif_msg_tx_err(pf))
11194 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11195 event, queue, pf_num, vf_num);
11196 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11197 mdd_detected = true;
11199 reg = rd32(hw, I40E_GL_MDET_RX);
11200 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11201 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
11202 I40E_GL_MDET_RX_FUNCTION_SHIFT;
11203 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
11204 I40E_GL_MDET_RX_EVENT_SHIFT;
11205 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
11206 I40E_GL_MDET_RX_QUEUE_SHIFT) -
11207 pf->hw.func_caps.base_queue;
11208 if (netif_msg_rx_err(pf))
11209 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11210 event, queue, func);
11211 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11212 mdd_detected = true;
11215 if (mdd_detected) {
11216 reg = rd32(hw, I40E_PF_MDET_TX);
11217 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11218 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11219 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11221 reg = rd32(hw, I40E_PF_MDET_RX);
11222 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11223 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11224 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11228 /* see if one of the VFs needs its hand slapped */
11229 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11231 reg = rd32(hw, I40E_VP_MDET_TX(i));
11232 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11233 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11234 vf->num_mdd_events++;
11235 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11237 dev_info(&pf->pdev->dev,
11238 "Use PF Control I/F to re-enable the VF\n");
11239 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11242 reg = rd32(hw, I40E_VP_MDET_RX(i));
11243 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11244 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11245 vf->num_mdd_events++;
11246 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11248 dev_info(&pf->pdev->dev,
11249 "Use PF Control I/F to re-enable the VF\n");
11250 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11254 /* re-enable mdd interrupt cause */
11255 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11256 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11257 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11258 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11263 * i40e_service_task - Run the driver's async subtasks
11264 * @work: pointer to work_struct containing our data
11266 static void i40e_service_task(struct work_struct *work)
11268 struct i40e_pf *pf = container_of(work,
11271 unsigned long start_time = jiffies;
11273 /* don't bother with service tasks if a reset is in progress */
11274 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11275 test_bit(__I40E_SUSPENDED, pf->state))
11278 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11281 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11282 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11283 i40e_sync_filters_subtask(pf);
11284 i40e_reset_subtask(pf);
11285 i40e_handle_mdd_event(pf);
11286 i40e_vc_process_vflr_event(pf);
11287 i40e_watchdog_subtask(pf);
11288 i40e_fdir_reinit_subtask(pf);
11289 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11290 /* Client subtask will reopen next time through. */
11291 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11294 i40e_client_subtask(pf);
11295 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11297 i40e_notify_client_of_l2_param_changes(
11298 pf->vsi[pf->lan_vsi]);
11300 i40e_sync_filters_subtask(pf);
11302 i40e_reset_subtask(pf);
11305 i40e_clean_adminq_subtask(pf);
11307 /* flush memory to make sure state is correct before next watchdog */
11308 smp_mb__before_atomic();
11309 clear_bit(__I40E_SERVICE_SCHED, pf->state);
11311 /* If the tasks have taken longer than one timer cycle or there
11312 * is more work to be done, reschedule the service task now
11313 * rather than wait for the timer to tick again.
11315 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11316 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
11317 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
11318 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11319 i40e_service_event_schedule(pf);
11323 * i40e_service_timer - timer callback
11324 * @t: timer list pointer
11326 static void i40e_service_timer(struct timer_list *t)
11328 struct i40e_pf *pf = from_timer(pf, t, service_timer);
11330 mod_timer(&pf->service_timer,
11331 round_jiffies(jiffies + pf->service_timer_period));
11332 i40e_service_event_schedule(pf);
11336 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11337 * @vsi: the VSI being configured
11339 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11341 struct i40e_pf *pf = vsi->back;
11343 switch (vsi->type) {
11344 case I40E_VSI_MAIN:
11345 vsi->alloc_queue_pairs = pf->num_lan_qps;
11346 if (!vsi->num_tx_desc)
11347 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11348 I40E_REQ_DESCRIPTOR_MULTIPLE);
11349 if (!vsi->num_rx_desc)
11350 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11351 I40E_REQ_DESCRIPTOR_MULTIPLE);
11352 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11353 vsi->num_q_vectors = pf->num_lan_msix;
11355 vsi->num_q_vectors = 1;
11359 case I40E_VSI_FDIR:
11360 vsi->alloc_queue_pairs = 1;
11361 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11362 I40E_REQ_DESCRIPTOR_MULTIPLE);
11363 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11364 I40E_REQ_DESCRIPTOR_MULTIPLE);
11365 vsi->num_q_vectors = pf->num_fdsb_msix;
11368 case I40E_VSI_VMDQ2:
11369 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11370 if (!vsi->num_tx_desc)
11371 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11372 I40E_REQ_DESCRIPTOR_MULTIPLE);
11373 if (!vsi->num_rx_desc)
11374 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11375 I40E_REQ_DESCRIPTOR_MULTIPLE);
11376 vsi->num_q_vectors = pf->num_vmdq_msix;
11379 case I40E_VSI_SRIOV:
11380 vsi->alloc_queue_pairs = pf->num_vf_qps;
11381 if (!vsi->num_tx_desc)
11382 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11383 I40E_REQ_DESCRIPTOR_MULTIPLE);
11384 if (!vsi->num_rx_desc)
11385 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11386 I40E_REQ_DESCRIPTOR_MULTIPLE);
11394 if (is_kdump_kernel()) {
11395 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11396 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11403 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11404 * @vsi: VSI pointer
11405 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11407 * On error: returns error code (negative)
11408 * On success: returns 0
11410 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11412 struct i40e_ring **next_rings;
11416 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11417 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11418 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11419 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11420 if (!vsi->tx_rings)
11422 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11423 if (i40e_enabled_xdp_vsi(vsi)) {
11424 vsi->xdp_rings = next_rings;
11425 next_rings += vsi->alloc_queue_pairs;
11427 vsi->rx_rings = next_rings;
11429 if (alloc_qvectors) {
11430 /* allocate memory for q_vector pointers */
11431 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11432 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11433 if (!vsi->q_vectors) {
11441 kfree(vsi->tx_rings);
11446 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11447 * @pf: board private structure
11448 * @type: type of VSI
11450 * On error: returns error code (negative)
11451 * On success: returns vsi index in PF (positive)
11453 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11456 struct i40e_vsi *vsi;
11460 /* Need to protect the allocation of the VSIs at the PF level */
11461 mutex_lock(&pf->switch_mutex);
11463 /* VSI list may be fragmented if VSI creation/destruction has
11464 * been happening. We can afford to do a quick scan to look
11465 * for any free VSIs in the list.
11467 * find next empty vsi slot, looping back around if necessary
11470 while (i < pf->num_alloc_vsi && pf->vsi[i])
11472 if (i >= pf->num_alloc_vsi) {
11474 while (i < pf->next_vsi && pf->vsi[i])
11478 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11479 vsi_idx = i; /* Found one! */
11482 goto unlock_pf; /* out of VSI slots! */
11484 pf->next_vsi = ++i;
11486 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11493 set_bit(__I40E_VSI_DOWN, vsi->state);
11495 vsi->idx = vsi_idx;
11496 vsi->int_rate_limit = 0;
11497 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11498 pf->rss_table_size : 64;
11499 vsi->netdev_registered = false;
11500 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11501 hash_init(vsi->mac_filter_hash);
11502 vsi->irqs_ready = false;
11504 if (type == I40E_VSI_MAIN) {
11505 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11506 if (!vsi->af_xdp_zc_qps)
11510 ret = i40e_set_num_rings_in_vsi(vsi);
11514 ret = i40e_vsi_alloc_arrays(vsi, true);
11518 /* Setup default MSIX irq handler for VSI */
11519 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11521 /* Initialize VSI lock */
11522 spin_lock_init(&vsi->mac_filter_hash_lock);
11523 pf->vsi[vsi_idx] = vsi;
11528 bitmap_free(vsi->af_xdp_zc_qps);
11529 pf->next_vsi = i - 1;
11532 mutex_unlock(&pf->switch_mutex);
11537 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11538 * @vsi: VSI pointer
11539 * @free_qvectors: a bool to specify if q_vectors need to be freed.
11541 * On error: returns error code (negative)
11542 * On success: returns 0
11544 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11546 /* free the ring and vector containers */
11547 if (free_qvectors) {
11548 kfree(vsi->q_vectors);
11549 vsi->q_vectors = NULL;
11551 kfree(vsi->tx_rings);
11552 vsi->tx_rings = NULL;
11553 vsi->rx_rings = NULL;
11554 vsi->xdp_rings = NULL;
11558 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11560 * @vsi: Pointer to VSI structure
11562 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11567 kfree(vsi->rss_hkey_user);
11568 vsi->rss_hkey_user = NULL;
11570 kfree(vsi->rss_lut_user);
11571 vsi->rss_lut_user = NULL;
11575 * i40e_vsi_clear - Deallocate the VSI provided
11576 * @vsi: the VSI being un-configured
11578 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11580 struct i40e_pf *pf;
11589 mutex_lock(&pf->switch_mutex);
11590 if (!pf->vsi[vsi->idx]) {
11591 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11592 vsi->idx, vsi->idx, vsi->type);
11596 if (pf->vsi[vsi->idx] != vsi) {
11597 dev_err(&pf->pdev->dev,
11598 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11599 pf->vsi[vsi->idx]->idx,
11600 pf->vsi[vsi->idx]->type,
11601 vsi->idx, vsi->type);
11605 /* updates the PF for this cleared vsi */
11606 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11607 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11609 bitmap_free(vsi->af_xdp_zc_qps);
11610 i40e_vsi_free_arrays(vsi, true);
11611 i40e_clear_rss_config_user(vsi);
11613 pf->vsi[vsi->idx] = NULL;
11614 if (vsi->idx < pf->next_vsi)
11615 pf->next_vsi = vsi->idx;
11618 mutex_unlock(&pf->switch_mutex);
11626 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11627 * @vsi: the VSI being cleaned
11629 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11633 if (vsi->tx_rings && vsi->tx_rings[0]) {
11634 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11635 kfree_rcu(vsi->tx_rings[i], rcu);
11636 WRITE_ONCE(vsi->tx_rings[i], NULL);
11637 WRITE_ONCE(vsi->rx_rings[i], NULL);
11638 if (vsi->xdp_rings)
11639 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11645 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11646 * @vsi: the VSI being configured
11648 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11650 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11651 struct i40e_pf *pf = vsi->back;
11652 struct i40e_ring *ring;
11654 /* Set basic values in the rings to be used later during open() */
11655 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11656 /* allocate space for both Tx and Rx in one shot */
11657 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11661 ring->queue_index = i;
11662 ring->reg_idx = vsi->base_queue + i;
11663 ring->ring_active = false;
11665 ring->netdev = vsi->netdev;
11666 ring->dev = &pf->pdev->dev;
11667 ring->count = vsi->num_tx_desc;
11670 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11671 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11672 ring->itr_setting = pf->tx_itr_default;
11673 WRITE_ONCE(vsi->tx_rings[i], ring++);
11675 if (!i40e_enabled_xdp_vsi(vsi))
11678 ring->queue_index = vsi->alloc_queue_pairs + i;
11679 ring->reg_idx = vsi->base_queue + ring->queue_index;
11680 ring->ring_active = false;
11682 ring->netdev = NULL;
11683 ring->dev = &pf->pdev->dev;
11684 ring->count = vsi->num_tx_desc;
11687 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11688 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11689 set_ring_xdp(ring);
11690 ring->itr_setting = pf->tx_itr_default;
11691 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11694 ring->queue_index = i;
11695 ring->reg_idx = vsi->base_queue + i;
11696 ring->ring_active = false;
11698 ring->netdev = vsi->netdev;
11699 ring->dev = &pf->pdev->dev;
11700 ring->count = vsi->num_rx_desc;
11703 ring->itr_setting = pf->rx_itr_default;
11704 WRITE_ONCE(vsi->rx_rings[i], ring);
11710 i40e_vsi_clear_rings(vsi);
11715 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11716 * @pf: board private structure
11717 * @vectors: the number of MSI-X vectors to request
11719 * Returns the number of vectors reserved, or error
11721 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11723 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11724 I40E_MIN_MSIX, vectors);
11726 dev_info(&pf->pdev->dev,
11727 "MSI-X vector reservation failed: %d\n", vectors);
11735 * i40e_init_msix - Setup the MSIX capability
11736 * @pf: board private structure
11738 * Work with the OS to set up the MSIX vectors needed.
11740 * Returns the number of vectors reserved or negative on failure
11742 static int i40e_init_msix(struct i40e_pf *pf)
11744 struct i40e_hw *hw = &pf->hw;
11745 int cpus, extra_vectors;
11749 int iwarp_requested = 0;
11751 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11754 /* The number of vectors we'll request will be comprised of:
11755 * - Add 1 for "other" cause for Admin Queue events, etc.
11756 * - The number of LAN queue pairs
11757 * - Queues being used for RSS.
11758 * We don't need as many as max_rss_size vectors.
11759 * use rss_size instead in the calculation since that
11760 * is governed by number of cpus in the system.
11761 * - assumes symmetric Tx/Rx pairing
11762 * - The number of VMDq pairs
11763 * - The CPU count within the NUMA node if iWARP is enabled
11764 * Once we count this up, try the request.
11766 * If we can't get what we want, we'll simplify to nearly nothing
11767 * and try again. If that still fails, we punt.
11769 vectors_left = hw->func_caps.num_msix_vectors;
11772 /* reserve one vector for miscellaneous handler */
11773 if (vectors_left) {
11778 /* reserve some vectors for the main PF traffic queues. Initially we
11779 * only reserve at most 50% of the available vectors, in the case that
11780 * the number of online CPUs is large. This ensures that we can enable
11781 * extra features as well. Once we've enabled the other features, we
11782 * will use any remaining vectors to reach as close as we can to the
11783 * number of online CPUs.
11785 cpus = num_online_cpus();
11786 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11787 vectors_left -= pf->num_lan_msix;
11789 /* reserve one vector for sideband flow director */
11790 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11791 if (vectors_left) {
11792 pf->num_fdsb_msix = 1;
11796 pf->num_fdsb_msix = 0;
11800 /* can we reserve enough for iWARP? */
11801 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11802 iwarp_requested = pf->num_iwarp_msix;
11805 pf->num_iwarp_msix = 0;
11806 else if (vectors_left < pf->num_iwarp_msix)
11807 pf->num_iwarp_msix = 1;
11808 v_budget += pf->num_iwarp_msix;
11809 vectors_left -= pf->num_iwarp_msix;
11812 /* any vectors left over go for VMDq support */
11813 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11814 if (!vectors_left) {
11815 pf->num_vmdq_msix = 0;
11816 pf->num_vmdq_qps = 0;
11818 int vmdq_vecs_wanted =
11819 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11821 min_t(int, vectors_left, vmdq_vecs_wanted);
11823 /* if we're short on vectors for what's desired, we limit
11824 * the queues per vmdq. If this is still more than are
11825 * available, the user will need to change the number of
11826 * queues/vectors used by the PF later with the ethtool
11829 if (vectors_left < vmdq_vecs_wanted) {
11830 pf->num_vmdq_qps = 1;
11831 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11832 vmdq_vecs = min_t(int,
11836 pf->num_vmdq_msix = pf->num_vmdq_qps;
11838 v_budget += vmdq_vecs;
11839 vectors_left -= vmdq_vecs;
11843 /* On systems with a large number of SMP cores, we previously limited
11844 * the number of vectors for num_lan_msix to be at most 50% of the
11845 * available vectors, to allow for other features. Now, we add back
11846 * the remaining vectors. However, we ensure that the total
11847 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11848 * calculate the number of vectors we can add without going over the
11849 * cap of CPUs. For systems with a small number of CPUs this will be
11852 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11853 pf->num_lan_msix += extra_vectors;
11854 vectors_left -= extra_vectors;
11856 WARN(vectors_left < 0,
11857 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11859 v_budget += pf->num_lan_msix;
11860 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11862 if (!pf->msix_entries)
11865 for (i = 0; i < v_budget; i++)
11866 pf->msix_entries[i].entry = i;
11867 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11869 if (v_actual < I40E_MIN_MSIX) {
11870 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11871 kfree(pf->msix_entries);
11872 pf->msix_entries = NULL;
11873 pci_disable_msix(pf->pdev);
11876 } else if (v_actual == I40E_MIN_MSIX) {
11877 /* Adjust for minimal MSIX use */
11878 pf->num_vmdq_vsis = 0;
11879 pf->num_vmdq_qps = 0;
11880 pf->num_lan_qps = 1;
11881 pf->num_lan_msix = 1;
11883 } else if (v_actual != v_budget) {
11884 /* If we have limited resources, we will start with no vectors
11885 * for the special features and then allocate vectors to some
11886 * of these features based on the policy and at the end disable
11887 * the features that did not get any vectors.
11891 dev_info(&pf->pdev->dev,
11892 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11893 v_actual, v_budget);
11894 /* reserve the misc vector */
11895 vec = v_actual - 1;
11897 /* Scale vector usage down */
11898 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11899 pf->num_vmdq_vsis = 1;
11900 pf->num_vmdq_qps = 1;
11902 /* partition out the remaining vectors */
11905 pf->num_lan_msix = 1;
11908 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11909 pf->num_lan_msix = 1;
11910 pf->num_iwarp_msix = 1;
11912 pf->num_lan_msix = 2;
11916 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11917 pf->num_iwarp_msix = min_t(int, (vec / 3),
11919 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11920 I40E_DEFAULT_NUM_VMDQ_VSI);
11922 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11923 I40E_DEFAULT_NUM_VMDQ_VSI);
11925 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11926 pf->num_fdsb_msix = 1;
11929 pf->num_lan_msix = min_t(int,
11930 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11932 pf->num_lan_qps = pf->num_lan_msix;
11937 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11938 (pf->num_fdsb_msix == 0)) {
11939 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11940 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11941 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11943 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11944 (pf->num_vmdq_msix == 0)) {
11945 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11946 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11949 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11950 (pf->num_iwarp_msix == 0)) {
11951 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11952 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11954 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11955 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11957 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11959 pf->num_iwarp_msix);
11965 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11966 * @vsi: the VSI being configured
11967 * @v_idx: index of the vector in the vsi struct
11969 * We allocate one q_vector. If allocation fails we return -ENOMEM.
11971 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11973 struct i40e_q_vector *q_vector;
11975 /* allocate q_vector */
11976 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11980 q_vector->vsi = vsi;
11981 q_vector->v_idx = v_idx;
11982 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11985 netif_napi_add(vsi->netdev, &q_vector->napi, i40e_napi_poll);
11987 /* tie q_vector and vsi together */
11988 vsi->q_vectors[v_idx] = q_vector;
11994 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11995 * @vsi: the VSI being configured
11997 * We allocate one q_vector per queue interrupt. If allocation fails we
12000 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
12002 struct i40e_pf *pf = vsi->back;
12003 int err, v_idx, num_q_vectors;
12005 /* if not MSIX, give the one vector only to the LAN VSI */
12006 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
12007 num_q_vectors = vsi->num_q_vectors;
12008 else if (vsi == pf->vsi[pf->lan_vsi])
12013 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
12014 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
12023 i40e_free_q_vector(vsi, v_idx);
12029 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
12030 * @pf: board private structure to initialize
12032 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
12037 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12038 vectors = i40e_init_msix(pf);
12040 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
12041 I40E_FLAG_IWARP_ENABLED |
12042 I40E_FLAG_RSS_ENABLED |
12043 I40E_FLAG_DCB_CAPABLE |
12044 I40E_FLAG_DCB_ENABLED |
12045 I40E_FLAG_SRIOV_ENABLED |
12046 I40E_FLAG_FD_SB_ENABLED |
12047 I40E_FLAG_FD_ATR_ENABLED |
12048 I40E_FLAG_VMDQ_ENABLED);
12049 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12051 /* rework the queue expectations without MSIX */
12052 i40e_determine_queue_usage(pf);
12056 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
12057 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
12058 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
12059 vectors = pci_enable_msi(pf->pdev);
12061 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
12063 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
12065 vectors = 1; /* one MSI or Legacy vector */
12068 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
12069 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
12071 /* set up vector assignment tracking */
12072 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
12073 pf->irq_pile = kzalloc(size, GFP_KERNEL);
12077 pf->irq_pile->num_entries = vectors;
12079 /* track first vector for misc interrupts, ignore return */
12080 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
12086 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
12087 * @pf: private board data structure
12089 * Restore the interrupt scheme that was cleared when we suspended the
12090 * device. This should be called during resume to re-allocate the q_vectors
12091 * and reacquire IRQs.
12093 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
12097 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
12098 * scheme. We need to re-enabled them here in order to attempt to
12099 * re-acquire the MSI or MSI-X vectors
12101 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
12103 err = i40e_init_interrupt_scheme(pf);
12107 /* Now that we've re-acquired IRQs, we need to remap the vectors and
12108 * rings together again.
12110 for (i = 0; i < pf->num_alloc_vsi; i++) {
12112 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
12115 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
12119 err = i40e_setup_misc_vector(pf);
12123 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
12124 i40e_client_update_msix_info(pf);
12131 i40e_vsi_free_q_vectors(pf->vsi[i]);
12138 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
12139 * non queue events in recovery mode
12140 * @pf: board private structure
12142 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
12143 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
12144 * This is handled differently than in recovery mode since no Tx/Rx resources
12145 * are being allocated.
12147 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
12151 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
12152 err = i40e_setup_misc_vector(pf);
12155 dev_info(&pf->pdev->dev,
12156 "MSI-X misc vector request failed, error %d\n",
12161 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
12163 err = request_irq(pf->pdev->irq, i40e_intr, flags,
12167 dev_info(&pf->pdev->dev,
12168 "MSI/legacy misc vector request failed, error %d\n",
12172 i40e_enable_misc_int_causes(pf);
12173 i40e_irq_dynamic_enable_icr0(pf);
12180 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
12181 * @pf: board private structure
12183 * This sets up the handler for MSIX 0, which is used to manage the
12184 * non-queue interrupts, e.g. AdminQ and errors. This is not used
12185 * when in MSI or Legacy interrupt mode.
12187 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12189 struct i40e_hw *hw = &pf->hw;
12192 /* Only request the IRQ once, the first time through. */
12193 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12194 err = request_irq(pf->msix_entries[0].vector,
12195 i40e_intr, 0, pf->int_name, pf);
12197 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12198 dev_info(&pf->pdev->dev,
12199 "request_irq for %s failed: %d\n",
12200 pf->int_name, err);
12205 i40e_enable_misc_int_causes(pf);
12207 /* associate no queues to the misc vector */
12208 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12209 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12213 i40e_irq_dynamic_enable_icr0(pf);
12219 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12220 * @vsi: Pointer to vsi structure
12221 * @seed: Buffter to store the hash keys
12222 * @lut: Buffer to store the lookup table entries
12223 * @lut_size: Size of buffer to store the lookup table entries
12225 * Return 0 on success, negative on failure
12227 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12228 u8 *lut, u16 lut_size)
12230 struct i40e_pf *pf = vsi->back;
12231 struct i40e_hw *hw = &pf->hw;
12235 ret = i40e_aq_get_rss_key(hw, vsi->id,
12236 (struct i40e_aqc_get_set_rss_key_data *)seed);
12238 dev_info(&pf->pdev->dev,
12239 "Cannot get RSS key, err %pe aq_err %s\n",
12241 i40e_aq_str(&pf->hw,
12242 pf->hw.aq.asq_last_status));
12248 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12250 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12252 dev_info(&pf->pdev->dev,
12253 "Cannot get RSS lut, err %pe aq_err %s\n",
12255 i40e_aq_str(&pf->hw,
12256 pf->hw.aq.asq_last_status));
12265 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12266 * @vsi: Pointer to vsi structure
12267 * @seed: RSS hash seed
12268 * @lut: Lookup table
12269 * @lut_size: Lookup table size
12271 * Returns 0 on success, negative on failure
12273 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12274 const u8 *lut, u16 lut_size)
12276 struct i40e_pf *pf = vsi->back;
12277 struct i40e_hw *hw = &pf->hw;
12278 u16 vf_id = vsi->vf_id;
12281 /* Fill out hash function seed */
12283 u32 *seed_dw = (u32 *)seed;
12285 if (vsi->type == I40E_VSI_MAIN) {
12286 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12287 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12288 } else if (vsi->type == I40E_VSI_SRIOV) {
12289 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12290 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12292 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12297 u32 *lut_dw = (u32 *)lut;
12299 if (vsi->type == I40E_VSI_MAIN) {
12300 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12302 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12303 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12304 } else if (vsi->type == I40E_VSI_SRIOV) {
12305 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12307 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12308 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12310 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12319 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12320 * @vsi: Pointer to VSI structure
12321 * @seed: Buffer to store the keys
12322 * @lut: Buffer to store the lookup table entries
12323 * @lut_size: Size of buffer to store the lookup table entries
12325 * Returns 0 on success, negative on failure
12327 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12328 u8 *lut, u16 lut_size)
12330 struct i40e_pf *pf = vsi->back;
12331 struct i40e_hw *hw = &pf->hw;
12335 u32 *seed_dw = (u32 *)seed;
12337 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12338 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12341 u32 *lut_dw = (u32 *)lut;
12343 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12345 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12346 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12353 * i40e_config_rss - Configure RSS keys and lut
12354 * @vsi: Pointer to VSI structure
12355 * @seed: RSS hash seed
12356 * @lut: Lookup table
12357 * @lut_size: Lookup table size
12359 * Returns 0 on success, negative on failure
12361 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12363 struct i40e_pf *pf = vsi->back;
12365 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12366 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12368 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12372 * i40e_get_rss - Get RSS keys and lut
12373 * @vsi: Pointer to VSI structure
12374 * @seed: Buffer to store the keys
12375 * @lut: Buffer to store the lookup table entries
12376 * @lut_size: Size of buffer to store the lookup table entries
12378 * Returns 0 on success, negative on failure
12380 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12382 struct i40e_pf *pf = vsi->back;
12384 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12385 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12387 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12391 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12392 * @pf: Pointer to board private structure
12393 * @lut: Lookup table
12394 * @rss_table_size: Lookup table size
12395 * @rss_size: Range of queue number for hashing
12397 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12398 u16 rss_table_size, u16 rss_size)
12402 for (i = 0; i < rss_table_size; i++)
12403 lut[i] = i % rss_size;
12407 * i40e_pf_config_rss - Prepare for RSS if used
12408 * @pf: board private structure
12410 static int i40e_pf_config_rss(struct i40e_pf *pf)
12412 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12413 u8 seed[I40E_HKEY_ARRAY_SIZE];
12415 struct i40e_hw *hw = &pf->hw;
12420 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12421 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12422 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12423 hena |= i40e_pf_get_default_rss_hena(pf);
12425 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12426 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12428 /* Determine the RSS table size based on the hardware capabilities */
12429 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12430 reg_val = (pf->rss_table_size == 512) ?
12431 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12432 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12433 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12435 /* Determine the RSS size of the VSI */
12436 if (!vsi->rss_size) {
12438 /* If the firmware does something weird during VSI init, we
12439 * could end up with zero TCs. Check for that to avoid
12440 * divide-by-zero. It probably won't pass traffic, but it also
12443 qcount = vsi->num_queue_pairs /
12444 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12445 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12447 if (!vsi->rss_size)
12450 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12454 /* Use user configured lut if there is one, otherwise use default */
12455 if (vsi->rss_lut_user)
12456 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12458 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12460 /* Use user configured hash key if there is one, otherwise
12463 if (vsi->rss_hkey_user)
12464 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12466 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12467 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12474 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12475 * @pf: board private structure
12476 * @queue_count: the requested queue count for rss.
12478 * returns 0 if rss is not enabled, if enabled returns the final rss queue
12479 * count which may be different from the requested queue count.
12480 * Note: expects to be called while under rtnl_lock()
12482 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12484 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12487 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12490 queue_count = min_t(int, queue_count, num_online_cpus());
12491 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12493 if (queue_count != vsi->num_queue_pairs) {
12496 vsi->req_queue_pairs = queue_count;
12497 i40e_prep_for_reset(pf);
12498 if (test_bit(__I40E_IN_REMOVE, pf->state))
12499 return pf->alloc_rss_size;
12501 pf->alloc_rss_size = new_rss_size;
12503 i40e_reset_and_rebuild(pf, true, true);
12505 /* Discard the user configured hash keys and lut, if less
12506 * queues are enabled.
12508 if (queue_count < vsi->rss_size) {
12509 i40e_clear_rss_config_user(vsi);
12510 dev_dbg(&pf->pdev->dev,
12511 "discard user configured hash keys and lut\n");
12514 /* Reset vsi->rss_size, as number of enabled queues changed */
12515 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12516 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12518 i40e_pf_config_rss(pf);
12520 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
12521 vsi->req_queue_pairs, pf->rss_size_max);
12522 return pf->alloc_rss_size;
12526 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12527 * @pf: board private structure
12529 int i40e_get_partition_bw_setting(struct i40e_pf *pf)
12531 bool min_valid, max_valid;
12532 u32 max_bw, min_bw;
12535 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12536 &min_valid, &max_valid);
12540 pf->min_bw = min_bw;
12542 pf->max_bw = max_bw;
12549 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12550 * @pf: board private structure
12552 int i40e_set_partition_bw_setting(struct i40e_pf *pf)
12554 struct i40e_aqc_configure_partition_bw_data bw_data;
12557 memset(&bw_data, 0, sizeof(bw_data));
12559 /* Set the valid bit for this PF */
12560 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12561 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12562 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12564 /* Set the new bandwidths */
12565 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12571 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12572 * @pf: board private structure
12574 int i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12576 /* Commit temporary BW setting to permanent NVM image */
12577 enum i40e_admin_queue_err last_aq_status;
12581 if (pf->hw.partition_id != 1) {
12582 dev_info(&pf->pdev->dev,
12583 "Commit BW only works on partition 1! This is partition %d",
12584 pf->hw.partition_id);
12586 goto bw_commit_out;
12589 /* Acquire NVM for read access */
12590 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12591 last_aq_status = pf->hw.aq.asq_last_status;
12593 dev_info(&pf->pdev->dev,
12594 "Cannot acquire NVM for read access, err %pe aq_err %s\n",
12596 i40e_aq_str(&pf->hw, last_aq_status));
12597 goto bw_commit_out;
12600 /* Read word 0x10 of NVM - SW compatibility word 1 */
12601 ret = i40e_aq_read_nvm(&pf->hw,
12602 I40E_SR_NVM_CONTROL_WORD,
12603 0x10, sizeof(nvm_word), &nvm_word,
12605 /* Save off last admin queue command status before releasing
12608 last_aq_status = pf->hw.aq.asq_last_status;
12609 i40e_release_nvm(&pf->hw);
12611 dev_info(&pf->pdev->dev, "NVM read error, err %pe aq_err %s\n",
12613 i40e_aq_str(&pf->hw, last_aq_status));
12614 goto bw_commit_out;
12617 /* Wait a bit for NVM release to complete */
12620 /* Acquire NVM for write access */
12621 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12622 last_aq_status = pf->hw.aq.asq_last_status;
12624 dev_info(&pf->pdev->dev,
12625 "Cannot acquire NVM for write access, err %pe aq_err %s\n",
12627 i40e_aq_str(&pf->hw, last_aq_status));
12628 goto bw_commit_out;
12630 /* Write it back out unchanged to initiate update NVM,
12631 * which will force a write of the shadow (alt) RAM to
12632 * the NVM - thus storing the bandwidth values permanently.
12634 ret = i40e_aq_update_nvm(&pf->hw,
12635 I40E_SR_NVM_CONTROL_WORD,
12636 0x10, sizeof(nvm_word),
12637 &nvm_word, true, 0, NULL);
12638 /* Save off last admin queue command status before releasing
12641 last_aq_status = pf->hw.aq.asq_last_status;
12642 i40e_release_nvm(&pf->hw);
12644 dev_info(&pf->pdev->dev,
12645 "BW settings NOT SAVED, err %pe aq_err %s\n",
12647 i40e_aq_str(&pf->hw, last_aq_status));
12654 * i40e_is_total_port_shutdown_enabled - read NVM and return value
12655 * if total port shutdown feature is enabled for this PF
12656 * @pf: board private structure
12658 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12660 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4)
12661 #define I40E_FEATURES_ENABLE_PTR 0x2A
12662 #define I40E_CURRENT_SETTING_PTR 0x2B
12663 #define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D
12664 #define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1
12665 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0)
12666 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4
12667 u16 sr_emp_sr_settings_ptr = 0;
12668 u16 features_enable = 0;
12669 u16 link_behavior = 0;
12670 int read_status = 0;
12673 read_status = i40e_read_nvm_word(&pf->hw,
12674 I40E_SR_EMP_SR_SETTINGS_PTR,
12675 &sr_emp_sr_settings_ptr);
12678 read_status = i40e_read_nvm_word(&pf->hw,
12679 sr_emp_sr_settings_ptr +
12680 I40E_FEATURES_ENABLE_PTR,
12684 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12685 read_status = i40e_read_nvm_module_data(&pf->hw,
12686 I40E_SR_EMP_SR_SETTINGS_PTR,
12687 I40E_CURRENT_SETTING_PTR,
12688 I40E_LINK_BEHAVIOR_WORD_OFFSET,
12689 I40E_LINK_BEHAVIOR_WORD_LENGTH,
12693 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12694 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12699 dev_warn(&pf->pdev->dev,
12700 "total-port-shutdown feature is off due to read nvm error: %pe\n",
12701 ERR_PTR(read_status));
12706 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12707 * @pf: board private structure to initialize
12709 * i40e_sw_init initializes the Adapter private data structure.
12710 * Fields are initialized based on PCI device information and
12711 * OS network device settings (MTU size).
12713 static int i40e_sw_init(struct i40e_pf *pf)
12719 /* Set default capability flags */
12720 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12721 I40E_FLAG_MSI_ENABLED |
12722 I40E_FLAG_MSIX_ENABLED;
12724 /* Set default ITR */
12725 pf->rx_itr_default = I40E_ITR_RX_DEF;
12726 pf->tx_itr_default = I40E_ITR_TX_DEF;
12728 /* Depending on PF configurations, it is possible that the RSS
12729 * maximum might end up larger than the available queues
12731 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12732 pf->alloc_rss_size = 1;
12733 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12734 pf->rss_size_max = min_t(int, pf->rss_size_max,
12735 pf->hw.func_caps.num_tx_qp);
12737 /* find the next higher power-of-2 of num cpus */
12738 pow = roundup_pow_of_two(num_online_cpus());
12739 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12741 if (pf->hw.func_caps.rss) {
12742 pf->flags |= I40E_FLAG_RSS_ENABLED;
12743 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12744 num_online_cpus());
12747 /* MFP mode enabled */
12748 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12749 pf->flags |= I40E_FLAG_MFP_ENABLED;
12750 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12751 if (i40e_get_partition_bw_setting(pf)) {
12752 dev_warn(&pf->pdev->dev,
12753 "Could not get partition bw settings\n");
12755 dev_info(&pf->pdev->dev,
12756 "Partition BW Min = %8.8x, Max = %8.8x\n",
12757 pf->min_bw, pf->max_bw);
12759 /* nudge the Tx scheduler */
12760 i40e_set_partition_bw_setting(pf);
12764 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12765 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12766 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12767 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12768 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12769 pf->hw.num_partitions > 1)
12770 dev_info(&pf->pdev->dev,
12771 "Flow Director Sideband mode Disabled in MFP mode\n");
12773 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12774 pf->fdir_pf_filter_count =
12775 pf->hw.func_caps.fd_filters_guaranteed;
12776 pf->hw.fdir_shared_filter_count =
12777 pf->hw.func_caps.fd_filters_best_effort;
12780 if (pf->hw.mac.type == I40E_MAC_X722) {
12781 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12782 I40E_HW_128_QP_RSS_CAPABLE |
12783 I40E_HW_ATR_EVICT_CAPABLE |
12784 I40E_HW_WB_ON_ITR_CAPABLE |
12785 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12786 I40E_HW_NO_PCI_LINK_CHECK |
12787 I40E_HW_USE_SET_LLDP_MIB |
12788 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12789 I40E_HW_PTP_L4_CAPABLE |
12790 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12791 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12793 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12794 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12795 I40E_FDEVICT_PCTYPE_DEFAULT) {
12796 dev_warn(&pf->pdev->dev,
12797 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12798 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12800 } else if ((pf->hw.aq.api_maj_ver > 1) ||
12801 ((pf->hw.aq.api_maj_ver == 1) &&
12802 (pf->hw.aq.api_min_ver > 4))) {
12803 /* Supported in FW API version higher than 1.4 */
12804 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12807 /* Enable HW ATR eviction if possible */
12808 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12809 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12811 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12812 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12813 (pf->hw.aq.fw_maj_ver < 4))) {
12814 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12815 /* No DCB support for FW < v4.33 */
12816 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12819 /* Disable FW LLDP if FW < v4.3 */
12820 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12821 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12822 (pf->hw.aq.fw_maj_ver < 4)))
12823 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12825 /* Use the FW Set LLDP MIB API if FW > v4.40 */
12826 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12827 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12828 (pf->hw.aq.fw_maj_ver >= 5)))
12829 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12831 /* Enable PTP L4 if FW > v6.0 */
12832 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12833 pf->hw.aq.fw_maj_ver >= 6)
12834 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12836 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12837 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12838 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12839 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12842 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12843 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12844 /* IWARP needs one extra vector for CQP just like MISC.*/
12845 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12847 /* Stopping FW LLDP engine is supported on XL710 and X722
12848 * starting from FW versions determined in i40e_init_adminq.
12849 * Stopping the FW LLDP engine is not supported on XL710
12850 * if NPAR is functioning so unset this hw flag in this case.
12852 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12853 pf->hw.func_caps.npar_enable &&
12854 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12855 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12857 #ifdef CONFIG_PCI_IOV
12858 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12859 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12860 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12861 pf->num_req_vfs = min_t(int,
12862 pf->hw.func_caps.num_vfs,
12863 I40E_MAX_VF_COUNT);
12865 #endif /* CONFIG_PCI_IOV */
12866 pf->eeprom_version = 0xDEAD;
12867 pf->lan_veb = I40E_NO_VEB;
12868 pf->lan_vsi = I40E_NO_VSI;
12870 /* By default FW has this off for performance reasons */
12871 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12873 /* set up queue assignment tracking */
12874 size = sizeof(struct i40e_lump_tracking)
12875 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12876 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12877 if (!pf->qp_pile) {
12881 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12883 pf->tx_timeout_recovery_level = 1;
12885 if (pf->hw.mac.type != I40E_MAC_X722 &&
12886 i40e_is_total_port_shutdown_enabled(pf)) {
12887 /* Link down on close must be on when total port shutdown
12888 * is enabled for a given port
12890 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12891 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12892 dev_info(&pf->pdev->dev,
12893 "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12895 mutex_init(&pf->switch_mutex);
12902 * i40e_set_ntuple - set the ntuple feature flag and take action
12903 * @pf: board private structure to initialize
12904 * @features: the feature set that the stack is suggesting
12906 * returns a bool to indicate if reset needs to happen
12908 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12910 bool need_reset = false;
12912 /* Check if Flow Director n-tuple support was enabled or disabled. If
12913 * the state changed, we need to reset.
12915 if (features & NETIF_F_NTUPLE) {
12916 /* Enable filters and mark for reset */
12917 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12919 /* enable FD_SB only if there is MSI-X vector and no cloud
12922 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12923 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12924 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12927 /* turn off filters, mark for reset and clear SW filter list */
12928 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12930 i40e_fdir_filter_exit(pf);
12932 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12933 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12934 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12936 /* reset fd counters */
12937 pf->fd_add_err = 0;
12938 pf->fd_atr_cnt = 0;
12939 /* if ATR was auto disabled it can be re-enabled. */
12940 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12941 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12942 (I40E_DEBUG_FD & pf->hw.debug_mask))
12943 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12949 * i40e_clear_rss_lut - clear the rx hash lookup table
12950 * @vsi: the VSI being configured
12952 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12954 struct i40e_pf *pf = vsi->back;
12955 struct i40e_hw *hw = &pf->hw;
12956 u16 vf_id = vsi->vf_id;
12959 if (vsi->type == I40E_VSI_MAIN) {
12960 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12961 wr32(hw, I40E_PFQF_HLUT(i), 0);
12962 } else if (vsi->type == I40E_VSI_SRIOV) {
12963 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12964 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12966 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12971 * i40e_set_loopback - turn on/off loopback mode on underlying PF
12973 * @ena: flag to indicate the on/off setting
12975 static int i40e_set_loopback(struct i40e_vsi *vsi, bool ena)
12977 bool if_running = netif_running(vsi->netdev) &&
12978 !test_and_set_bit(__I40E_VSI_DOWN, vsi->state);
12984 ret = i40e_aq_set_mac_loopback(&vsi->back->hw, ena, NULL);
12986 netdev_err(vsi->netdev, "Failed to toggle loopback state\n");
12994 * i40e_set_features - set the netdev feature flags
12995 * @netdev: ptr to the netdev being adjusted
12996 * @features: the feature set that the stack is suggesting
12997 * Note: expects to be called while under rtnl_lock()
12999 static int i40e_set_features(struct net_device *netdev,
13000 netdev_features_t features)
13002 struct i40e_netdev_priv *np = netdev_priv(netdev);
13003 struct i40e_vsi *vsi = np->vsi;
13004 struct i40e_pf *pf = vsi->back;
13007 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
13008 i40e_pf_config_rss(pf);
13009 else if (!(features & NETIF_F_RXHASH) &&
13010 netdev->features & NETIF_F_RXHASH)
13011 i40e_clear_rss_lut(vsi);
13013 if (features & NETIF_F_HW_VLAN_CTAG_RX)
13014 i40e_vlan_stripping_enable(vsi);
13016 i40e_vlan_stripping_disable(vsi);
13018 if (!(features & NETIF_F_HW_TC) &&
13019 (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
13020 dev_err(&pf->pdev->dev,
13021 "Offloaded tc filters active, can't turn hw_tc_offload off");
13025 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
13026 i40e_del_all_macvlans(vsi);
13028 need_reset = i40e_set_ntuple(pf, features);
13031 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13033 if ((features ^ netdev->features) & NETIF_F_LOOPBACK)
13034 return i40e_set_loopback(vsi, !!(features & NETIF_F_LOOPBACK));
13039 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
13040 unsigned int table, unsigned int idx,
13041 struct udp_tunnel_info *ti)
13043 struct i40e_netdev_priv *np = netdev_priv(netdev);
13044 struct i40e_hw *hw = &np->vsi->back->hw;
13045 u8 type, filter_index;
13048 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
13049 I40E_AQC_TUNNEL_TYPE_NGE;
13051 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
13054 netdev_info(netdev, "add UDP port failed, err %pe aq_err %s\n",
13056 i40e_aq_str(hw, hw->aq.asq_last_status));
13060 udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
13064 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
13065 unsigned int table, unsigned int idx,
13066 struct udp_tunnel_info *ti)
13068 struct i40e_netdev_priv *np = netdev_priv(netdev);
13069 struct i40e_hw *hw = &np->vsi->back->hw;
13072 ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
13074 netdev_info(netdev, "delete UDP port failed, err %pe aq_err %s\n",
13076 i40e_aq_str(hw, hw->aq.asq_last_status));
13083 static int i40e_get_phys_port_id(struct net_device *netdev,
13084 struct netdev_phys_item_id *ppid)
13086 struct i40e_netdev_priv *np = netdev_priv(netdev);
13087 struct i40e_pf *pf = np->vsi->back;
13088 struct i40e_hw *hw = &pf->hw;
13090 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
13091 return -EOPNOTSUPP;
13093 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
13094 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
13100 * i40e_ndo_fdb_add - add an entry to the hardware database
13101 * @ndm: the input from the stack
13102 * @tb: pointer to array of nladdr (unused)
13103 * @dev: the net device pointer
13104 * @addr: the MAC address entry being added
13106 * @flags: instructions from stack about fdb operation
13107 * @extack: netlink extended ack, unused currently
13109 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
13110 struct net_device *dev,
13111 const unsigned char *addr, u16 vid,
13113 struct netlink_ext_ack *extack)
13115 struct i40e_netdev_priv *np = netdev_priv(dev);
13116 struct i40e_pf *pf = np->vsi->back;
13119 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
13120 return -EOPNOTSUPP;
13123 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
13127 /* Hardware does not support aging addresses so if a
13128 * ndm_state is given only allow permanent addresses
13130 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
13131 netdev_info(dev, "FDB only supports static addresses\n");
13135 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
13136 err = dev_uc_add_excl(dev, addr);
13137 else if (is_multicast_ether_addr(addr))
13138 err = dev_mc_add_excl(dev, addr);
13142 /* Only return duplicate errors if NLM_F_EXCL is set */
13143 if (err == -EEXIST && !(flags & NLM_F_EXCL))
13150 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
13151 * @dev: the netdev being configured
13152 * @nlh: RTNL message
13153 * @flags: bridge flags
13154 * @extack: netlink extended ack
13156 * Inserts a new hardware bridge if not already created and
13157 * enables the bridging mode requested (VEB or VEPA). If the
13158 * hardware bridge has already been inserted and the request
13159 * is to change the mode then that requires a PF reset to
13160 * allow rebuild of the components with required hardware
13161 * bridge mode enabled.
13163 * Note: expects to be called while under rtnl_lock()
13165 static int i40e_ndo_bridge_setlink(struct net_device *dev,
13166 struct nlmsghdr *nlh,
13168 struct netlink_ext_ack *extack)
13170 struct i40e_netdev_priv *np = netdev_priv(dev);
13171 struct i40e_vsi *vsi = np->vsi;
13172 struct i40e_pf *pf = vsi->back;
13173 struct i40e_veb *veb = NULL;
13174 struct nlattr *attr, *br_spec;
13177 /* Only for PF VSI for now */
13178 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13179 return -EOPNOTSUPP;
13181 /* Find the HW bridge for PF VSI */
13182 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13183 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13187 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
13191 nla_for_each_nested(attr, br_spec, rem) {
13194 if (nla_type(attr) != IFLA_BRIDGE_MODE)
13197 mode = nla_get_u16(attr);
13198 if ((mode != BRIDGE_MODE_VEPA) &&
13199 (mode != BRIDGE_MODE_VEB))
13202 /* Insert a new HW bridge */
13204 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
13205 vsi->tc_config.enabled_tc);
13207 veb->bridge_mode = mode;
13208 i40e_config_bridge_mode(veb);
13210 /* No Bridge HW offload available */
13214 } else if (mode != veb->bridge_mode) {
13215 /* Existing HW bridge but different mode needs reset */
13216 veb->bridge_mode = mode;
13217 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13218 if (mode == BRIDGE_MODE_VEB)
13219 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13221 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13222 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13231 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13234 * @seq: RTNL message seq #
13235 * @dev: the netdev being configured
13236 * @filter_mask: unused
13237 * @nlflags: netlink flags passed in
13239 * Return the mode in which the hardware bridge is operating in
13242 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13243 struct net_device *dev,
13244 u32 __always_unused filter_mask,
13247 struct i40e_netdev_priv *np = netdev_priv(dev);
13248 struct i40e_vsi *vsi = np->vsi;
13249 struct i40e_pf *pf = vsi->back;
13250 struct i40e_veb *veb = NULL;
13253 /* Only for PF VSI for now */
13254 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13255 return -EOPNOTSUPP;
13257 /* Find the HW bridge for the PF VSI */
13258 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13259 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13266 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13267 0, 0, nlflags, filter_mask, NULL);
13271 * i40e_features_check - Validate encapsulated packet conforms to limits
13273 * @dev: This physical port's netdev
13274 * @features: Offload features that the stack believes apply
13276 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13277 struct net_device *dev,
13278 netdev_features_t features)
13282 /* No point in doing any of this if neither checksum nor GSO are
13283 * being requested for this frame. We can rule out both by just
13284 * checking for CHECKSUM_PARTIAL
13286 if (skb->ip_summed != CHECKSUM_PARTIAL)
13289 /* We cannot support GSO if the MSS is going to be less than
13290 * 64 bytes. If it is then we need to drop support for GSO.
13292 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13293 features &= ~NETIF_F_GSO_MASK;
13295 /* MACLEN can support at most 63 words */
13296 len = skb_network_header(skb) - skb->data;
13297 if (len & ~(63 * 2))
13300 /* IPLEN and EIPLEN can support at most 127 dwords */
13301 len = skb_transport_header(skb) - skb_network_header(skb);
13302 if (len & ~(127 * 4))
13305 if (skb->encapsulation) {
13306 /* L4TUNLEN can support 127 words */
13307 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13308 if (len & ~(127 * 2))
13311 /* IPLEN can support at most 127 dwords */
13312 len = skb_inner_transport_header(skb) -
13313 skb_inner_network_header(skb);
13314 if (len & ~(127 * 4))
13318 /* No need to validate L4LEN as TCP is the only protocol with a
13319 * flexible value and we support all possible values supported
13320 * by TCP, which is at most 15 dwords
13325 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13329 * i40e_xdp_setup - add/remove an XDP program
13330 * @vsi: VSI to changed
13331 * @prog: XDP program
13332 * @extack: netlink extended ack
13334 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13335 struct netlink_ext_ack *extack)
13337 int frame_size = i40e_max_vsi_frame_size(vsi, prog);
13338 struct i40e_pf *pf = vsi->back;
13339 struct bpf_prog *old_prog;
13343 /* Don't allow frames that span over multiple buffers */
13344 if (vsi->netdev->mtu > frame_size - I40E_PACKET_HDR_PAD) {
13345 NL_SET_ERR_MSG_MOD(extack, "MTU too large for linear frames and XDP prog does not support frags");
13349 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13350 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13353 i40e_prep_for_reset(pf);
13355 /* VSI shall be deleted in a moment, just return EINVAL */
13356 if (test_bit(__I40E_IN_REMOVE, pf->state))
13359 old_prog = xchg(&vsi->xdp_prog, prog);
13363 xdp_features_clear_redirect_target(vsi->netdev);
13364 /* Wait until ndo_xsk_wakeup completes. */
13367 i40e_reset_and_rebuild(pf, true, true);
13370 if (!i40e_enabled_xdp_vsi(vsi) && prog) {
13371 if (i40e_realloc_rx_bi_zc(vsi, true))
13373 } else if (i40e_enabled_xdp_vsi(vsi) && !prog) {
13374 if (i40e_realloc_rx_bi_zc(vsi, false))
13378 for (i = 0; i < vsi->num_queue_pairs; i++)
13379 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13382 bpf_prog_put(old_prog);
13384 /* Kick start the NAPI context if there is an AF_XDP socket open
13385 * on that queue id. This so that receiving will start.
13387 if (need_reset && prog) {
13388 for (i = 0; i < vsi->num_queue_pairs; i++)
13389 if (vsi->xdp_rings[i]->xsk_pool)
13390 (void)i40e_xsk_wakeup(vsi->netdev, i,
13392 xdp_features_set_redirect_target(vsi->netdev, true);
13399 * i40e_enter_busy_conf - Enters busy config state
13402 * Returns 0 on success, <0 for failure.
13404 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13406 struct i40e_pf *pf = vsi->back;
13409 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13413 usleep_range(1000, 2000);
13420 * i40e_exit_busy_conf - Exits busy config state
13423 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13425 struct i40e_pf *pf = vsi->back;
13427 clear_bit(__I40E_CONFIG_BUSY, pf->state);
13431 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13433 * @queue_pair: queue pair
13435 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13437 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13438 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13439 memset(&vsi->tx_rings[queue_pair]->stats, 0,
13440 sizeof(vsi->tx_rings[queue_pair]->stats));
13441 if (i40e_enabled_xdp_vsi(vsi)) {
13442 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13443 sizeof(vsi->xdp_rings[queue_pair]->stats));
13448 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13450 * @queue_pair: queue pair
13452 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13454 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13455 if (i40e_enabled_xdp_vsi(vsi)) {
13456 /* Make sure that in-progress ndo_xdp_xmit calls are
13460 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13462 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13466 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13468 * @queue_pair: queue pair
13469 * @enable: true for enable, false for disable
13471 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13474 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13475 struct i40e_q_vector *q_vector = rxr->q_vector;
13480 /* All rings in a qp belong to the same qvector. */
13481 if (q_vector->rx.ring || q_vector->tx.ring) {
13483 napi_enable(&q_vector->napi);
13485 napi_disable(&q_vector->napi);
13490 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13492 * @queue_pair: queue pair
13493 * @enable: true for enable, false for disable
13495 * Returns 0 on success, <0 on failure.
13497 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13500 struct i40e_pf *pf = vsi->back;
13503 pf_q = vsi->base_queue + queue_pair;
13504 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13505 false /*is xdp*/, enable);
13507 dev_info(&pf->pdev->dev,
13508 "VSI seid %d Tx ring %d %sable timeout\n",
13509 vsi->seid, pf_q, (enable ? "en" : "dis"));
13513 i40e_control_rx_q(pf, pf_q, enable);
13514 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13516 dev_info(&pf->pdev->dev,
13517 "VSI seid %d Rx ring %d %sable timeout\n",
13518 vsi->seid, pf_q, (enable ? "en" : "dis"));
13522 /* Due to HW errata, on Rx disable only, the register can
13523 * indicate done before it really is. Needs 50ms to be sure
13528 if (!i40e_enabled_xdp_vsi(vsi))
13531 ret = i40e_control_wait_tx_q(vsi->seid, pf,
13532 pf_q + vsi->alloc_queue_pairs,
13533 true /*is xdp*/, enable);
13535 dev_info(&pf->pdev->dev,
13536 "VSI seid %d XDP Tx ring %d %sable timeout\n",
13537 vsi->seid, pf_q, (enable ? "en" : "dis"));
13544 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13546 * @queue_pair: queue_pair
13548 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13550 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13551 struct i40e_pf *pf = vsi->back;
13552 struct i40e_hw *hw = &pf->hw;
13554 /* All rings in a qp belong to the same qvector. */
13555 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13556 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13558 i40e_irq_dynamic_enable_icr0(pf);
13564 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13566 * @queue_pair: queue_pair
13568 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13570 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13571 struct i40e_pf *pf = vsi->back;
13572 struct i40e_hw *hw = &pf->hw;
13574 /* For simplicity, instead of removing the qp interrupt causes
13575 * from the interrupt linked list, we simply disable the interrupt, and
13576 * leave the list intact.
13578 * All rings in a qp belong to the same qvector.
13580 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13581 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13583 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13585 synchronize_irq(pf->msix_entries[intpf].vector);
13587 /* Legacy and MSI mode - this stops all interrupt handling */
13588 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13589 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13591 synchronize_irq(pf->pdev->irq);
13596 * i40e_queue_pair_disable - Disables a queue pair
13598 * @queue_pair: queue pair
13600 * Returns 0 on success, <0 on failure.
13602 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13606 err = i40e_enter_busy_conf(vsi);
13610 i40e_queue_pair_disable_irq(vsi, queue_pair);
13611 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13612 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13613 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13614 i40e_queue_pair_clean_rings(vsi, queue_pair);
13615 i40e_queue_pair_reset_stats(vsi, queue_pair);
13621 * i40e_queue_pair_enable - Enables a queue pair
13623 * @queue_pair: queue pair
13625 * Returns 0 on success, <0 on failure.
13627 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13631 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13635 if (i40e_enabled_xdp_vsi(vsi)) {
13636 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13641 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13645 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13646 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13647 i40e_queue_pair_enable_irq(vsi, queue_pair);
13649 i40e_exit_busy_conf(vsi);
13655 * i40e_xdp - implements ndo_bpf for i40e
13657 * @xdp: XDP command
13659 static int i40e_xdp(struct net_device *dev,
13660 struct netdev_bpf *xdp)
13662 struct i40e_netdev_priv *np = netdev_priv(dev);
13663 struct i40e_vsi *vsi = np->vsi;
13665 if (vsi->type != I40E_VSI_MAIN)
13668 switch (xdp->command) {
13669 case XDP_SETUP_PROG:
13670 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13671 case XDP_SETUP_XSK_POOL:
13672 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13673 xdp->xsk.queue_id);
13679 static const struct net_device_ops i40e_netdev_ops = {
13680 .ndo_open = i40e_open,
13681 .ndo_stop = i40e_close,
13682 .ndo_start_xmit = i40e_lan_xmit_frame,
13683 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
13684 .ndo_set_rx_mode = i40e_set_rx_mode,
13685 .ndo_validate_addr = eth_validate_addr,
13686 .ndo_set_mac_address = i40e_set_mac,
13687 .ndo_change_mtu = i40e_change_mtu,
13688 .ndo_eth_ioctl = i40e_ioctl,
13689 .ndo_tx_timeout = i40e_tx_timeout,
13690 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
13691 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
13692 #ifdef CONFIG_NET_POLL_CONTROLLER
13693 .ndo_poll_controller = i40e_netpoll,
13695 .ndo_setup_tc = __i40e_setup_tc,
13696 .ndo_select_queue = i40e_lan_select_queue,
13697 .ndo_set_features = i40e_set_features,
13698 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
13699 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
13700 .ndo_get_vf_stats = i40e_get_vf_stats,
13701 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
13702 .ndo_get_vf_config = i40e_ndo_get_vf_config,
13703 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
13704 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
13705 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
13706 .ndo_get_phys_port_id = i40e_get_phys_port_id,
13707 .ndo_fdb_add = i40e_ndo_fdb_add,
13708 .ndo_features_check = i40e_features_check,
13709 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
13710 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
13711 .ndo_bpf = i40e_xdp,
13712 .ndo_xdp_xmit = i40e_xdp_xmit,
13713 .ndo_xsk_wakeup = i40e_xsk_wakeup,
13714 .ndo_dfwd_add_station = i40e_fwd_add,
13715 .ndo_dfwd_del_station = i40e_fwd_del,
13719 * i40e_config_netdev - Setup the netdev flags
13720 * @vsi: the VSI being configured
13722 * Returns 0 on success, negative value on failure
13724 static int i40e_config_netdev(struct i40e_vsi *vsi)
13726 struct i40e_pf *pf = vsi->back;
13727 struct i40e_hw *hw = &pf->hw;
13728 struct i40e_netdev_priv *np;
13729 struct net_device *netdev;
13730 u8 broadcast[ETH_ALEN];
13731 u8 mac_addr[ETH_ALEN];
13733 netdev_features_t hw_enc_features;
13734 netdev_features_t hw_features;
13736 etherdev_size = sizeof(struct i40e_netdev_priv);
13737 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13741 vsi->netdev = netdev;
13742 np = netdev_priv(netdev);
13745 hw_enc_features = NETIF_F_SG |
13748 NETIF_F_SOFT_FEATURES |
13753 NETIF_F_GSO_GRE_CSUM |
13754 NETIF_F_GSO_PARTIAL |
13755 NETIF_F_GSO_IPXIP4 |
13756 NETIF_F_GSO_IPXIP6 |
13757 NETIF_F_GSO_UDP_TUNNEL |
13758 NETIF_F_GSO_UDP_TUNNEL_CSUM |
13759 NETIF_F_GSO_UDP_L4 |
13765 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13766 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13768 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13770 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13772 netdev->hw_enc_features |= hw_enc_features;
13774 /* record features VLANs can make use of */
13775 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13777 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
13778 NETIF_F_GSO_GRE_CSUM | \
13779 NETIF_F_GSO_IPXIP4 | \
13780 NETIF_F_GSO_IPXIP6 | \
13781 NETIF_F_GSO_UDP_TUNNEL | \
13782 NETIF_F_GSO_UDP_TUNNEL_CSUM)
13784 netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13785 netdev->features |= NETIF_F_GSO_PARTIAL |
13786 I40E_GSO_PARTIAL_FEATURES;
13788 netdev->mpls_features |= NETIF_F_SG;
13789 netdev->mpls_features |= NETIF_F_HW_CSUM;
13790 netdev->mpls_features |= NETIF_F_TSO;
13791 netdev->mpls_features |= NETIF_F_TSO6;
13792 netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13794 /* enable macvlan offloads */
13795 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13797 hw_features = hw_enc_features |
13798 NETIF_F_HW_VLAN_CTAG_TX |
13799 NETIF_F_HW_VLAN_CTAG_RX;
13801 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13802 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13804 netdev->hw_features |= hw_features | NETIF_F_LOOPBACK;
13806 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13807 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13809 netdev->features &= ~NETIF_F_HW_TC;
13811 if (vsi->type == I40E_VSI_MAIN) {
13812 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13813 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13814 /* The following steps are necessary for two reasons. First,
13815 * some older NVM configurations load a default MAC-VLAN
13816 * filter that will accept any tagged packet, and we want to
13817 * replace this with a normal filter. Additionally, it is
13818 * possible our MAC address was provided by the platform using
13819 * Open Firmware or similar.
13821 * Thus, we need to remove the default filter and install one
13822 * specific to the MAC address.
13824 i40e_rm_default_mac_filter(vsi, mac_addr);
13825 spin_lock_bh(&vsi->mac_filter_hash_lock);
13826 i40e_add_mac_filter(vsi, mac_addr);
13827 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13829 netdev->xdp_features = NETDEV_XDP_ACT_BASIC |
13830 NETDEV_XDP_ACT_REDIRECT |
13831 NETDEV_XDP_ACT_XSK_ZEROCOPY |
13832 NETDEV_XDP_ACT_RX_SG;
13833 netdev->xdp_zc_max_segs = I40E_MAX_BUFFER_TXD;
13835 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13836 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13837 * the end, which is 4 bytes long, so force truncation of the
13838 * original name by IFNAMSIZ - 4
13840 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13842 pf->vsi[pf->lan_vsi]->netdev->name);
13843 eth_random_addr(mac_addr);
13845 spin_lock_bh(&vsi->mac_filter_hash_lock);
13846 i40e_add_mac_filter(vsi, mac_addr);
13847 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13850 /* Add the broadcast filter so that we initially will receive
13851 * broadcast packets. Note that when a new VLAN is first added the
13852 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13853 * specific filters as part of transitioning into "vlan" operation.
13854 * When more VLANs are added, the driver will copy each existing MAC
13855 * filter and add it for the new VLAN.
13857 * Broadcast filters are handled specially by
13858 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13859 * promiscuous bit instead of adding this directly as a MAC/VLAN
13860 * filter. The subtask will update the correct broadcast promiscuous
13861 * bits as VLANs become active or inactive.
13863 eth_broadcast_addr(broadcast);
13864 spin_lock_bh(&vsi->mac_filter_hash_lock);
13865 i40e_add_mac_filter(vsi, broadcast);
13866 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13868 eth_hw_addr_set(netdev, mac_addr);
13869 ether_addr_copy(netdev->perm_addr, mac_addr);
13871 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13872 netdev->neigh_priv_len = sizeof(u32) * 4;
13874 netdev->priv_flags |= IFF_UNICAST_FLT;
13875 netdev->priv_flags |= IFF_SUPP_NOFCS;
13876 /* Setup netdev TC information */
13877 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13879 netdev->netdev_ops = &i40e_netdev_ops;
13880 netdev->watchdog_timeo = 5 * HZ;
13881 i40e_set_ethtool_ops(netdev);
13883 /* MTU range: 68 - 9706 */
13884 netdev->min_mtu = ETH_MIN_MTU;
13885 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13891 * i40e_vsi_delete - Delete a VSI from the switch
13892 * @vsi: the VSI being removed
13894 * Returns 0 on success, negative value on failure
13896 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13898 /* remove default VSI is not allowed */
13899 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13902 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13906 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13907 * @vsi: the VSI being queried
13909 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13911 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13913 struct i40e_veb *veb;
13914 struct i40e_pf *pf = vsi->back;
13916 /* Uplink is not a bridge so default to VEB */
13917 if (vsi->veb_idx >= I40E_MAX_VEB)
13920 veb = pf->veb[vsi->veb_idx];
13922 dev_info(&pf->pdev->dev,
13923 "There is no veb associated with the bridge\n");
13927 /* Uplink is a bridge in VEPA mode */
13928 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13931 /* Uplink is a bridge in VEB mode */
13935 /* VEPA is now default bridge, so return 0 */
13940 * i40e_add_vsi - Add a VSI to the switch
13941 * @vsi: the VSI being configured
13943 * This initializes a VSI context depending on the VSI type to be added and
13944 * passes it down to the add_vsi aq command.
13946 static int i40e_add_vsi(struct i40e_vsi *vsi)
13949 struct i40e_pf *pf = vsi->back;
13950 struct i40e_hw *hw = &pf->hw;
13951 struct i40e_vsi_context ctxt;
13952 struct i40e_mac_filter *f;
13953 struct hlist_node *h;
13956 u8 enabled_tc = 0x1; /* TC0 enabled */
13959 memset(&ctxt, 0, sizeof(ctxt));
13960 switch (vsi->type) {
13961 case I40E_VSI_MAIN:
13962 /* The PF's main VSI is already setup as part of the
13963 * device initialization, so we'll not bother with
13964 * the add_vsi call, but we will retrieve the current
13967 ctxt.seid = pf->main_vsi_seid;
13968 ctxt.pf_num = pf->hw.pf_id;
13970 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13971 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13973 dev_info(&pf->pdev->dev,
13974 "couldn't get PF vsi config, err %pe aq_err %s\n",
13976 i40e_aq_str(&pf->hw,
13977 pf->hw.aq.asq_last_status));
13980 vsi->info = ctxt.info;
13981 vsi->info.valid_sections = 0;
13983 vsi->seid = ctxt.seid;
13984 vsi->id = ctxt.vsi_number;
13986 enabled_tc = i40e_pf_get_tc_map(pf);
13988 /* Source pruning is enabled by default, so the flag is
13989 * negative logic - if it's set, we need to fiddle with
13990 * the VSI to disable source pruning.
13992 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13993 memset(&ctxt, 0, sizeof(ctxt));
13994 ctxt.seid = pf->main_vsi_seid;
13995 ctxt.pf_num = pf->hw.pf_id;
13997 ctxt.info.valid_sections |=
13998 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13999 ctxt.info.switch_id =
14000 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
14001 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
14003 dev_info(&pf->pdev->dev,
14004 "update vsi failed, err %d aq_err %s\n",
14006 i40e_aq_str(&pf->hw,
14007 pf->hw.aq.asq_last_status));
14013 /* MFP mode setup queue map and update VSI */
14014 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
14015 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
14016 memset(&ctxt, 0, sizeof(ctxt));
14017 ctxt.seid = pf->main_vsi_seid;
14018 ctxt.pf_num = pf->hw.pf_id;
14020 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
14021 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
14023 dev_info(&pf->pdev->dev,
14024 "update vsi failed, err %pe aq_err %s\n",
14026 i40e_aq_str(&pf->hw,
14027 pf->hw.aq.asq_last_status));
14031 /* update the local VSI info queue map */
14032 i40e_vsi_update_queue_map(vsi, &ctxt);
14033 vsi->info.valid_sections = 0;
14035 /* Default/Main VSI is only enabled for TC0
14036 * reconfigure it to enable all TCs that are
14037 * available on the port in SFP mode.
14038 * For MFP case the iSCSI PF would use this
14039 * flow to enable LAN+iSCSI TC.
14041 ret = i40e_vsi_config_tc(vsi, enabled_tc);
14043 /* Single TC condition is not fatal,
14044 * message and continue
14046 dev_info(&pf->pdev->dev,
14047 "failed to configure TCs for main VSI tc_map 0x%08x, err %pe aq_err %s\n",
14050 i40e_aq_str(&pf->hw,
14051 pf->hw.aq.asq_last_status));
14056 case I40E_VSI_FDIR:
14057 ctxt.pf_num = hw->pf_id;
14059 ctxt.uplink_seid = vsi->uplink_seid;
14060 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14061 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
14062 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
14063 (i40e_is_vsi_uplink_mode_veb(vsi))) {
14064 ctxt.info.valid_sections |=
14065 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14066 ctxt.info.switch_id =
14067 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14069 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14072 case I40E_VSI_VMDQ2:
14073 ctxt.pf_num = hw->pf_id;
14075 ctxt.uplink_seid = vsi->uplink_seid;
14076 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14077 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
14079 /* This VSI is connected to VEB so the switch_id
14080 * should be set to zero by default.
14082 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14083 ctxt.info.valid_sections |=
14084 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14085 ctxt.info.switch_id =
14086 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14089 /* Setup the VSI tx/rx queue map for TC0 only for now */
14090 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14093 case I40E_VSI_SRIOV:
14094 ctxt.pf_num = hw->pf_id;
14095 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
14096 ctxt.uplink_seid = vsi->uplink_seid;
14097 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
14098 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
14100 /* This VSI is connected to VEB so the switch_id
14101 * should be set to zero by default.
14103 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
14104 ctxt.info.valid_sections |=
14105 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
14106 ctxt.info.switch_id =
14107 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
14110 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
14111 ctxt.info.valid_sections |=
14112 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
14113 ctxt.info.queueing_opt_flags |=
14114 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
14115 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
14118 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
14119 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
14120 if (pf->vf[vsi->vf_id].spoofchk) {
14121 ctxt.info.valid_sections |=
14122 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
14123 ctxt.info.sec_flags |=
14124 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
14125 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
14127 /* Setup the VSI tx/rx queue map for TC0 only for now */
14128 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
14131 case I40E_VSI_IWARP:
14132 /* send down message to iWARP */
14139 if (vsi->type != I40E_VSI_MAIN) {
14140 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
14142 dev_info(&vsi->back->pdev->dev,
14143 "add vsi failed, err %pe aq_err %s\n",
14145 i40e_aq_str(&pf->hw,
14146 pf->hw.aq.asq_last_status));
14150 vsi->info = ctxt.info;
14151 vsi->info.valid_sections = 0;
14152 vsi->seid = ctxt.seid;
14153 vsi->id = ctxt.vsi_number;
14156 spin_lock_bh(&vsi->mac_filter_hash_lock);
14157 vsi->active_filters = 0;
14158 /* If macvlan filters already exist, force them to get loaded */
14159 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
14160 f->state = I40E_FILTER_NEW;
14163 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14164 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
14167 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
14168 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
14171 /* Update VSI BW information */
14172 ret = i40e_vsi_get_bw_info(vsi);
14174 dev_info(&pf->pdev->dev,
14175 "couldn't get vsi bw info, err %pe aq_err %s\n",
14177 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14178 /* VSI is already added so not tearing that up */
14187 * i40e_vsi_release - Delete a VSI and free its resources
14188 * @vsi: the VSI being removed
14190 * Returns 0 on success or < 0 on error
14192 int i40e_vsi_release(struct i40e_vsi *vsi)
14194 struct i40e_mac_filter *f;
14195 struct hlist_node *h;
14196 struct i40e_veb *veb = NULL;
14197 struct i40e_pf *pf;
14203 /* release of a VEB-owner or last VSI is not allowed */
14204 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
14205 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
14206 vsi->seid, vsi->uplink_seid);
14209 if (vsi == pf->vsi[pf->lan_vsi] &&
14210 !test_bit(__I40E_DOWN, pf->state)) {
14211 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
14214 set_bit(__I40E_VSI_RELEASING, vsi->state);
14215 uplink_seid = vsi->uplink_seid;
14217 if (vsi->type != I40E_VSI_SRIOV) {
14218 if (vsi->netdev_registered) {
14219 vsi->netdev_registered = false;
14221 /* results in a call to i40e_close() */
14222 unregister_netdev(vsi->netdev);
14225 i40e_vsi_close(vsi);
14227 i40e_vsi_disable_irq(vsi);
14230 if (vsi->type == I40E_VSI_MAIN)
14231 i40e_devlink_destroy_port(pf);
14233 spin_lock_bh(&vsi->mac_filter_hash_lock);
14235 /* clear the sync flag on all filters */
14237 __dev_uc_unsync(vsi->netdev, NULL);
14238 __dev_mc_unsync(vsi->netdev, NULL);
14241 /* make sure any remaining filters are marked for deletion */
14242 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14243 __i40e_del_filter(vsi, f);
14245 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14247 i40e_sync_vsi_filters(vsi);
14249 i40e_vsi_delete(vsi);
14250 i40e_vsi_free_q_vectors(vsi);
14252 free_netdev(vsi->netdev);
14253 vsi->netdev = NULL;
14255 i40e_vsi_clear_rings(vsi);
14256 i40e_vsi_clear(vsi);
14258 /* If this was the last thing on the VEB, except for the
14259 * controlling VSI, remove the VEB, which puts the controlling
14260 * VSI onto the next level down in the switch.
14262 * Well, okay, there's one more exception here: don't remove
14263 * the orphan VEBs yet. We'll wait for an explicit remove request
14264 * from up the network stack.
14266 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14268 pf->vsi[i]->uplink_seid == uplink_seid &&
14269 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14270 n++; /* count the VSIs */
14273 for (i = 0; i < I40E_MAX_VEB; i++) {
14276 if (pf->veb[i]->uplink_seid == uplink_seid)
14277 n++; /* count the VEBs */
14278 if (pf->veb[i]->seid == uplink_seid)
14281 if (n == 0 && veb && veb->uplink_seid != 0)
14282 i40e_veb_release(veb);
14288 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14289 * @vsi: ptr to the VSI
14291 * This should only be called after i40e_vsi_mem_alloc() which allocates the
14292 * corresponding SW VSI structure and initializes num_queue_pairs for the
14293 * newly allocated VSI.
14295 * Returns 0 on success or negative on failure
14297 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14300 struct i40e_pf *pf = vsi->back;
14302 if (vsi->q_vectors[0]) {
14303 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14308 if (vsi->base_vector) {
14309 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14310 vsi->seid, vsi->base_vector);
14314 ret = i40e_vsi_alloc_q_vectors(vsi);
14316 dev_info(&pf->pdev->dev,
14317 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14318 vsi->num_q_vectors, vsi->seid, ret);
14319 vsi->num_q_vectors = 0;
14320 goto vector_setup_out;
14323 /* In Legacy mode, we do not have to get any other vector since we
14324 * piggyback on the misc/ICR0 for queue interrupts.
14326 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
14328 if (vsi->num_q_vectors)
14329 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14330 vsi->num_q_vectors, vsi->idx);
14331 if (vsi->base_vector < 0) {
14332 dev_info(&pf->pdev->dev,
14333 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14334 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14335 i40e_vsi_free_q_vectors(vsi);
14337 goto vector_setup_out;
14345 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14346 * @vsi: pointer to the vsi.
14348 * This re-allocates a vsi's queue resources.
14350 * Returns pointer to the successfully allocated and configured VSI sw struct
14351 * on success, otherwise returns NULL on failure.
14353 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14355 u16 alloc_queue_pairs;
14356 struct i40e_pf *pf;
14365 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14366 i40e_vsi_clear_rings(vsi);
14368 i40e_vsi_free_arrays(vsi, false);
14369 i40e_set_num_rings_in_vsi(vsi);
14370 ret = i40e_vsi_alloc_arrays(vsi, false);
14374 alloc_queue_pairs = vsi->alloc_queue_pairs *
14375 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14377 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14379 dev_info(&pf->pdev->dev,
14380 "failed to get tracking for %d queues for VSI %d err %d\n",
14381 alloc_queue_pairs, vsi->seid, ret);
14384 vsi->base_queue = ret;
14386 /* Update the FW view of the VSI. Force a reset of TC and queue
14387 * layout configurations.
14389 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14390 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14391 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14392 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14393 if (vsi->type == I40E_VSI_MAIN)
14394 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14396 /* assign it some queues */
14397 ret = i40e_alloc_rings(vsi);
14401 /* map all of the rings to the q_vectors */
14402 i40e_vsi_map_rings_to_vectors(vsi);
14406 i40e_vsi_free_q_vectors(vsi);
14407 if (vsi->netdev_registered) {
14408 vsi->netdev_registered = false;
14409 unregister_netdev(vsi->netdev);
14410 free_netdev(vsi->netdev);
14411 vsi->netdev = NULL;
14413 if (vsi->type == I40E_VSI_MAIN)
14414 i40e_devlink_destroy_port(pf);
14415 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14417 i40e_vsi_clear(vsi);
14422 * i40e_vsi_setup - Set up a VSI by a given type
14423 * @pf: board private structure
14425 * @uplink_seid: the switch element to link to
14426 * @param1: usage depends upon VSI type. For VF types, indicates VF id
14428 * This allocates the sw VSI structure and its queue resources, then add a VSI
14429 * to the identified VEB.
14431 * Returns pointer to the successfully allocated and configure VSI sw struct on
14432 * success, otherwise returns NULL on failure.
14434 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14435 u16 uplink_seid, u32 param1)
14437 struct i40e_vsi *vsi = NULL;
14438 struct i40e_veb *veb = NULL;
14439 u16 alloc_queue_pairs;
14443 /* The requested uplink_seid must be either
14444 * - the PF's port seid
14445 * no VEB is needed because this is the PF
14446 * or this is a Flow Director special case VSI
14447 * - seid of an existing VEB
14448 * - seid of a VSI that owns an existing VEB
14449 * - seid of a VSI that doesn't own a VEB
14450 * a new VEB is created and the VSI becomes the owner
14451 * - seid of the PF VSI, which is what creates the first VEB
14452 * this is a special case of the previous
14454 * Find which uplink_seid we were given and create a new VEB if needed
14456 for (i = 0; i < I40E_MAX_VEB; i++) {
14457 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14463 if (!veb && uplink_seid != pf->mac_seid) {
14465 for (i = 0; i < pf->num_alloc_vsi; i++) {
14466 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14472 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14477 if (vsi->uplink_seid == pf->mac_seid)
14478 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14479 vsi->tc_config.enabled_tc);
14480 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14481 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14482 vsi->tc_config.enabled_tc);
14484 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14485 dev_info(&vsi->back->pdev->dev,
14486 "New VSI creation error, uplink seid of LAN VSI expected.\n");
14489 /* We come up by default in VEPA mode if SRIOV is not
14490 * already enabled, in which case we can't force VEPA
14493 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14494 veb->bridge_mode = BRIDGE_MODE_VEPA;
14495 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14497 i40e_config_bridge_mode(veb);
14499 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14500 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14504 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14508 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14509 uplink_seid = veb->seid;
14512 /* get vsi sw struct */
14513 v_idx = i40e_vsi_mem_alloc(pf, type);
14516 vsi = pf->vsi[v_idx];
14520 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14522 if (type == I40E_VSI_MAIN)
14523 pf->lan_vsi = v_idx;
14524 else if (type == I40E_VSI_SRIOV)
14525 vsi->vf_id = param1;
14526 /* assign it some queues */
14527 alloc_queue_pairs = vsi->alloc_queue_pairs *
14528 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14530 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14532 dev_info(&pf->pdev->dev,
14533 "failed to get tracking for %d queues for VSI %d err=%d\n",
14534 alloc_queue_pairs, vsi->seid, ret);
14537 vsi->base_queue = ret;
14539 /* get a VSI from the hardware */
14540 vsi->uplink_seid = uplink_seid;
14541 ret = i40e_add_vsi(vsi);
14545 switch (vsi->type) {
14546 /* setup the netdev if needed */
14547 case I40E_VSI_MAIN:
14548 case I40E_VSI_VMDQ2:
14549 ret = i40e_config_netdev(vsi);
14552 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14555 if (vsi->type == I40E_VSI_MAIN) {
14556 ret = i40e_devlink_create_port(pf);
14559 SET_NETDEV_DEVLINK_PORT(vsi->netdev, &pf->devlink_port);
14561 ret = register_netdev(vsi->netdev);
14564 vsi->netdev_registered = true;
14565 netif_carrier_off(vsi->netdev);
14566 #ifdef CONFIG_I40E_DCB
14567 /* Setup DCB netlink interface */
14568 i40e_dcbnl_setup(vsi);
14569 #endif /* CONFIG_I40E_DCB */
14571 case I40E_VSI_FDIR:
14572 /* set up vectors and rings if needed */
14573 ret = i40e_vsi_setup_vectors(vsi);
14577 ret = i40e_alloc_rings(vsi);
14581 /* map all of the rings to the q_vectors */
14582 i40e_vsi_map_rings_to_vectors(vsi);
14584 i40e_vsi_reset_stats(vsi);
14587 /* no netdev or rings for the other VSI types */
14591 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14592 (vsi->type == I40E_VSI_VMDQ2)) {
14593 ret = i40e_vsi_config_rss(vsi);
14598 i40e_vsi_free_q_vectors(vsi);
14600 if (vsi->netdev_registered) {
14601 vsi->netdev_registered = false;
14602 unregister_netdev(vsi->netdev);
14603 free_netdev(vsi->netdev);
14604 vsi->netdev = NULL;
14607 if (vsi->type == I40E_VSI_MAIN)
14608 i40e_devlink_destroy_port(pf);
14610 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14612 i40e_vsi_clear(vsi);
14618 * i40e_veb_get_bw_info - Query VEB BW information
14619 * @veb: the veb to query
14621 * Query the Tx scheduler BW configuration data for given VEB
14623 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14625 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14626 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14627 struct i40e_pf *pf = veb->pf;
14628 struct i40e_hw *hw = &pf->hw;
14633 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14636 dev_info(&pf->pdev->dev,
14637 "query veb bw config failed, err %pe aq_err %s\n",
14639 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14643 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14646 dev_info(&pf->pdev->dev,
14647 "query veb bw ets config failed, err %pe aq_err %s\n",
14649 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14653 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14654 veb->bw_max_quanta = ets_data.tc_bw_max;
14655 veb->is_abs_credits = bw_data.absolute_credits_enable;
14656 veb->enabled_tc = ets_data.tc_valid_bits;
14657 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14658 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14659 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14660 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14661 veb->bw_tc_limit_credits[i] =
14662 le16_to_cpu(bw_data.tc_bw_limits[i]);
14663 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14671 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14672 * @pf: board private structure
14674 * On error: returns error code (negative)
14675 * On success: returns vsi index in PF (positive)
14677 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14680 struct i40e_veb *veb;
14683 /* Need to protect the allocation of switch elements at the PF level */
14684 mutex_lock(&pf->switch_mutex);
14686 /* VEB list may be fragmented if VEB creation/destruction has
14687 * been happening. We can afford to do a quick scan to look
14688 * for any free slots in the list.
14690 * find next empty veb slot, looping back around if necessary
14693 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14695 if (i >= I40E_MAX_VEB) {
14697 goto err_alloc_veb; /* out of VEB slots! */
14700 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14703 goto err_alloc_veb;
14707 veb->enabled_tc = 1;
14712 mutex_unlock(&pf->switch_mutex);
14717 * i40e_switch_branch_release - Delete a branch of the switch tree
14718 * @branch: where to start deleting
14720 * This uses recursion to find the tips of the branch to be
14721 * removed, deleting until we get back to and can delete this VEB.
14723 static void i40e_switch_branch_release(struct i40e_veb *branch)
14725 struct i40e_pf *pf = branch->pf;
14726 u16 branch_seid = branch->seid;
14727 u16 veb_idx = branch->idx;
14730 /* release any VEBs on this VEB - RECURSION */
14731 for (i = 0; i < I40E_MAX_VEB; i++) {
14734 if (pf->veb[i]->uplink_seid == branch->seid)
14735 i40e_switch_branch_release(pf->veb[i]);
14738 /* Release the VSIs on this VEB, but not the owner VSI.
14740 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14741 * the VEB itself, so don't use (*branch) after this loop.
14743 for (i = 0; i < pf->num_alloc_vsi; i++) {
14746 if (pf->vsi[i]->uplink_seid == branch_seid &&
14747 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14748 i40e_vsi_release(pf->vsi[i]);
14752 /* There's one corner case where the VEB might not have been
14753 * removed, so double check it here and remove it if needed.
14754 * This case happens if the veb was created from the debugfs
14755 * commands and no VSIs were added to it.
14757 if (pf->veb[veb_idx])
14758 i40e_veb_release(pf->veb[veb_idx]);
14762 * i40e_veb_clear - remove veb struct
14763 * @veb: the veb to remove
14765 static void i40e_veb_clear(struct i40e_veb *veb)
14771 struct i40e_pf *pf = veb->pf;
14773 mutex_lock(&pf->switch_mutex);
14774 if (pf->veb[veb->idx] == veb)
14775 pf->veb[veb->idx] = NULL;
14776 mutex_unlock(&pf->switch_mutex);
14783 * i40e_veb_release - Delete a VEB and free its resources
14784 * @veb: the VEB being removed
14786 void i40e_veb_release(struct i40e_veb *veb)
14788 struct i40e_vsi *vsi = NULL;
14789 struct i40e_pf *pf;
14794 /* find the remaining VSI and check for extras */
14795 for (i = 0; i < pf->num_alloc_vsi; i++) {
14796 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14802 dev_info(&pf->pdev->dev,
14803 "can't remove VEB %d with %d VSIs left\n",
14808 /* move the remaining VSI to uplink veb */
14809 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14810 if (veb->uplink_seid) {
14811 vsi->uplink_seid = veb->uplink_seid;
14812 if (veb->uplink_seid == pf->mac_seid)
14813 vsi->veb_idx = I40E_NO_VEB;
14815 vsi->veb_idx = veb->veb_idx;
14818 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14819 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14822 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14823 i40e_veb_clear(veb);
14827 * i40e_add_veb - create the VEB in the switch
14828 * @veb: the VEB to be instantiated
14829 * @vsi: the controlling VSI
14831 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14833 struct i40e_pf *pf = veb->pf;
14834 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14837 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14838 veb->enabled_tc, false,
14839 &veb->seid, enable_stats, NULL);
14841 /* get a VEB from the hardware */
14843 dev_info(&pf->pdev->dev,
14844 "couldn't add VEB, err %pe aq_err %s\n",
14846 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14850 /* get statistics counter */
14851 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14852 &veb->stats_idx, NULL, NULL, NULL);
14854 dev_info(&pf->pdev->dev,
14855 "couldn't get VEB statistics idx, err %pe aq_err %s\n",
14857 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14860 ret = i40e_veb_get_bw_info(veb);
14862 dev_info(&pf->pdev->dev,
14863 "couldn't get VEB bw info, err %pe aq_err %s\n",
14865 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14866 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14870 vsi->uplink_seid = veb->seid;
14871 vsi->veb_idx = veb->idx;
14872 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14878 * i40e_veb_setup - Set up a VEB
14879 * @pf: board private structure
14880 * @flags: VEB setup flags
14881 * @uplink_seid: the switch element to link to
14882 * @vsi_seid: the initial VSI seid
14883 * @enabled_tc: Enabled TC bit-map
14885 * This allocates the sw VEB structure and links it into the switch
14886 * It is possible and legal for this to be a duplicate of an already
14887 * existing VEB. It is also possible for both uplink and vsi seids
14888 * to be zero, in order to create a floating VEB.
14890 * Returns pointer to the successfully allocated VEB sw struct on
14891 * success, otherwise returns NULL on failure.
14893 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14894 u16 uplink_seid, u16 vsi_seid,
14897 struct i40e_veb *veb, *uplink_veb = NULL;
14898 int vsi_idx, veb_idx;
14901 /* if one seid is 0, the other must be 0 to create a floating relay */
14902 if ((uplink_seid == 0 || vsi_seid == 0) &&
14903 (uplink_seid + vsi_seid != 0)) {
14904 dev_info(&pf->pdev->dev,
14905 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14906 uplink_seid, vsi_seid);
14910 /* make sure there is such a vsi and uplink */
14911 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14912 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14914 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14915 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14920 if (uplink_seid && uplink_seid != pf->mac_seid) {
14921 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14922 if (pf->veb[veb_idx] &&
14923 pf->veb[veb_idx]->seid == uplink_seid) {
14924 uplink_veb = pf->veb[veb_idx];
14929 dev_info(&pf->pdev->dev,
14930 "uplink seid %d not found\n", uplink_seid);
14935 /* get veb sw struct */
14936 veb_idx = i40e_veb_mem_alloc(pf);
14939 veb = pf->veb[veb_idx];
14940 veb->flags = flags;
14941 veb->uplink_seid = uplink_seid;
14942 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14943 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14945 /* create the VEB in the switch */
14946 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14949 if (vsi_idx == pf->lan_vsi)
14950 pf->lan_veb = veb->idx;
14955 i40e_veb_clear(veb);
14961 * i40e_setup_pf_switch_element - set PF vars based on switch type
14962 * @pf: board private structure
14963 * @ele: element we are building info from
14964 * @num_reported: total number of elements
14965 * @printconfig: should we print the contents
14967 * helper function to assist in extracting a few useful SEID values.
14969 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14970 struct i40e_aqc_switch_config_element_resp *ele,
14971 u16 num_reported, bool printconfig)
14973 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14974 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14975 u8 element_type = ele->element_type;
14976 u16 seid = le16_to_cpu(ele->seid);
14979 dev_info(&pf->pdev->dev,
14980 "type=%d seid=%d uplink=%d downlink=%d\n",
14981 element_type, seid, uplink_seid, downlink_seid);
14983 switch (element_type) {
14984 case I40E_SWITCH_ELEMENT_TYPE_MAC:
14985 pf->mac_seid = seid;
14987 case I40E_SWITCH_ELEMENT_TYPE_VEB:
14989 if (uplink_seid != pf->mac_seid)
14991 if (pf->lan_veb >= I40E_MAX_VEB) {
14994 /* find existing or else empty VEB */
14995 for (v = 0; v < I40E_MAX_VEB; v++) {
14996 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
15001 if (pf->lan_veb >= I40E_MAX_VEB) {
15002 v = i40e_veb_mem_alloc(pf);
15008 if (pf->lan_veb >= I40E_MAX_VEB)
15011 pf->veb[pf->lan_veb]->seid = seid;
15012 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
15013 pf->veb[pf->lan_veb]->pf = pf;
15014 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
15016 case I40E_SWITCH_ELEMENT_TYPE_VSI:
15017 if (num_reported != 1)
15019 /* This is immediately after a reset so we can assume this is
15022 pf->mac_seid = uplink_seid;
15023 pf->pf_seid = downlink_seid;
15024 pf->main_vsi_seid = seid;
15026 dev_info(&pf->pdev->dev,
15027 "pf_seid=%d main_vsi_seid=%d\n",
15028 pf->pf_seid, pf->main_vsi_seid);
15030 case I40E_SWITCH_ELEMENT_TYPE_PF:
15031 case I40E_SWITCH_ELEMENT_TYPE_VF:
15032 case I40E_SWITCH_ELEMENT_TYPE_EMP:
15033 case I40E_SWITCH_ELEMENT_TYPE_BMC:
15034 case I40E_SWITCH_ELEMENT_TYPE_PE:
15035 case I40E_SWITCH_ELEMENT_TYPE_PA:
15036 /* ignore these for now */
15039 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
15040 element_type, seid);
15046 * i40e_fetch_switch_configuration - Get switch config from firmware
15047 * @pf: board private structure
15048 * @printconfig: should we print the contents
15050 * Get the current switch configuration from the device and
15051 * extract a few useful SEID values.
15053 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
15055 struct i40e_aqc_get_switch_config_resp *sw_config;
15061 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
15065 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
15067 u16 num_reported, num_total;
15069 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
15073 dev_info(&pf->pdev->dev,
15074 "get switch config failed err %d aq_err %s\n",
15076 i40e_aq_str(&pf->hw,
15077 pf->hw.aq.asq_last_status));
15082 num_reported = le16_to_cpu(sw_config->header.num_reported);
15083 num_total = le16_to_cpu(sw_config->header.num_total);
15086 dev_info(&pf->pdev->dev,
15087 "header: %d reported %d total\n",
15088 num_reported, num_total);
15090 for (i = 0; i < num_reported; i++) {
15091 struct i40e_aqc_switch_config_element_resp *ele =
15092 &sw_config->element[i];
15094 i40e_setup_pf_switch_element(pf, ele, num_reported,
15097 } while (next_seid != 0);
15104 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
15105 * @pf: board private structure
15106 * @reinit: if the Main VSI needs to re-initialized.
15107 * @lock_acquired: indicates whether or not the lock has been acquired
15109 * Returns 0 on success, negative value on failure
15111 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
15116 /* find out what's out there already */
15117 ret = i40e_fetch_switch_configuration(pf, false);
15119 dev_info(&pf->pdev->dev,
15120 "couldn't fetch switch config, err %pe aq_err %s\n",
15122 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15125 i40e_pf_reset_stats(pf);
15127 /* set the switch config bit for the whole device to
15128 * support limited promisc or true promisc
15129 * when user requests promisc. The default is limited
15133 if ((pf->hw.pf_id == 0) &&
15134 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
15135 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15136 pf->last_sw_conf_flags = flags;
15139 if (pf->hw.pf_id == 0) {
15142 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
15143 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
15145 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
15146 dev_info(&pf->pdev->dev,
15147 "couldn't set switch config bits, err %pe aq_err %s\n",
15149 i40e_aq_str(&pf->hw,
15150 pf->hw.aq.asq_last_status));
15151 /* not a fatal problem, just keep going */
15153 pf->last_sw_conf_valid_flags = valid_flags;
15156 /* first time setup */
15157 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
15158 struct i40e_vsi *vsi = NULL;
15161 /* Set up the PF VSI associated with the PF's main VSI
15162 * that is already in the HW switch
15164 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
15165 uplink_seid = pf->veb[pf->lan_veb]->seid;
15167 uplink_seid = pf->mac_seid;
15168 if (pf->lan_vsi == I40E_NO_VSI)
15169 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
15171 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
15173 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
15174 i40e_cloud_filter_exit(pf);
15175 i40e_fdir_teardown(pf);
15179 /* force a reset of TC and queue layout configurations */
15180 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
15182 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
15183 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
15184 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
15186 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
15188 i40e_fdir_sb_setup(pf);
15190 /* Setup static PF queue filter control settings */
15191 ret = i40e_setup_pf_filter_control(pf);
15193 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
15195 /* Failure here should not stop continuing other steps */
15198 /* enable RSS in the HW, even for only one queue, as the stack can use
15201 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
15202 i40e_pf_config_rss(pf);
15204 /* fill in link information and enable LSE reporting */
15205 i40e_link_event(pf);
15207 /* Initialize user-specific link properties */
15208 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
15209 I40E_AQ_AN_COMPLETED) ? true : false);
15213 if (!lock_acquired)
15216 /* repopulate tunnel port filters */
15217 udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
15219 if (!lock_acquired)
15226 * i40e_determine_queue_usage - Work out queue distribution
15227 * @pf: board private structure
15229 static void i40e_determine_queue_usage(struct i40e_pf *pf)
15234 pf->num_lan_qps = 0;
15236 /* Find the max queues to be put into basic use. We'll always be
15237 * using TC0, whether or not DCB is running, and TC0 will get the
15240 queues_left = pf->hw.func_caps.num_tx_qp;
15242 if ((queues_left == 1) ||
15243 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
15244 /* one qp for PF, no queues for anything else */
15246 pf->alloc_rss_size = pf->num_lan_qps = 1;
15248 /* make sure all the fancies are disabled */
15249 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15250 I40E_FLAG_IWARP_ENABLED |
15251 I40E_FLAG_FD_SB_ENABLED |
15252 I40E_FLAG_FD_ATR_ENABLED |
15253 I40E_FLAG_DCB_CAPABLE |
15254 I40E_FLAG_DCB_ENABLED |
15255 I40E_FLAG_SRIOV_ENABLED |
15256 I40E_FLAG_VMDQ_ENABLED);
15257 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15258 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
15259 I40E_FLAG_FD_SB_ENABLED |
15260 I40E_FLAG_FD_ATR_ENABLED |
15261 I40E_FLAG_DCB_CAPABLE))) {
15262 /* one qp for PF */
15263 pf->alloc_rss_size = pf->num_lan_qps = 1;
15264 queues_left -= pf->num_lan_qps;
15266 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15267 I40E_FLAG_IWARP_ENABLED |
15268 I40E_FLAG_FD_SB_ENABLED |
15269 I40E_FLAG_FD_ATR_ENABLED |
15270 I40E_FLAG_DCB_ENABLED |
15271 I40E_FLAG_VMDQ_ENABLED);
15272 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15274 /* Not enough queues for all TCs */
15275 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
15276 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
15277 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
15278 I40E_FLAG_DCB_ENABLED);
15279 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15282 /* limit lan qps to the smaller of qps, cpus or msix */
15283 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15284 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15285 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15286 pf->num_lan_qps = q_max;
15288 queues_left -= pf->num_lan_qps;
15291 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15292 if (queues_left > 1) {
15293 queues_left -= 1; /* save 1 queue for FD */
15295 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
15296 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15297 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15301 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15302 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15303 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15304 (queues_left / pf->num_vf_qps));
15305 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15308 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
15309 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15310 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15311 (queues_left / pf->num_vmdq_qps));
15312 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15315 pf->queues_left = queues_left;
15316 dev_dbg(&pf->pdev->dev,
15317 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15318 pf->hw.func_caps.num_tx_qp,
15319 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
15320 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15321 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15326 * i40e_setup_pf_filter_control - Setup PF static filter control
15327 * @pf: PF to be setup
15329 * i40e_setup_pf_filter_control sets up a PF's initial filter control
15330 * settings. If PE/FCoE are enabled then it will also set the per PF
15331 * based filter sizes required for them. It also enables Flow director,
15332 * ethertype and macvlan type filter settings for the pf.
15334 * Returns 0 on success, negative on failure
15336 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15338 struct i40e_filter_control_settings *settings = &pf->filter_settings;
15340 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15342 /* Flow Director is enabled */
15343 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
15344 settings->enable_fdir = true;
15346 /* Ethtype and MACVLAN filters enabled for PF */
15347 settings->enable_ethtype = true;
15348 settings->enable_macvlan = true;
15350 if (i40e_set_filter_control(&pf->hw, settings))
15356 #define INFO_STRING_LEN 255
15357 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
15358 static void i40e_print_features(struct i40e_pf *pf)
15360 struct i40e_hw *hw = &pf->hw;
15364 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15368 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15369 #ifdef CONFIG_PCI_IOV
15370 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15372 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15373 pf->hw.func_caps.num_vsis,
15374 pf->vsi[pf->lan_vsi]->num_queue_pairs);
15375 if (pf->flags & I40E_FLAG_RSS_ENABLED)
15376 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15377 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
15378 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15379 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15380 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15381 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15383 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
15384 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15385 i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15386 i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15387 if (pf->flags & I40E_FLAG_PTP)
15388 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15389 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
15390 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15392 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15394 dev_info(&pf->pdev->dev, "%s\n", buf);
15396 WARN_ON(i > INFO_STRING_LEN);
15400 * i40e_get_platform_mac_addr - get platform-specific MAC address
15401 * @pdev: PCI device information struct
15402 * @pf: board private structure
15404 * Look up the MAC address for the device. First we'll try
15405 * eth_platform_get_mac_address, which will check Open Firmware, or arch
15406 * specific fallback. Otherwise, we'll default to the stored value in
15409 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15411 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15412 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15416 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15417 * @fec_cfg: FEC option to set in flags
15418 * @flags: ptr to flags in which we set FEC option
15420 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
15422 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
15423 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
15424 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15425 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15426 *flags |= I40E_FLAG_RS_FEC;
15427 *flags &= ~I40E_FLAG_BASE_R_FEC;
15429 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15430 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15431 *flags |= I40E_FLAG_BASE_R_FEC;
15432 *flags &= ~I40E_FLAG_RS_FEC;
15435 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
15439 * i40e_check_recovery_mode - check if we are running transition firmware
15440 * @pf: board private structure
15442 * Check registers indicating the firmware runs in recovery mode. Sets the
15443 * appropriate driver state.
15445 * Returns true if the recovery mode was detected, false otherwise
15447 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15449 u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15451 if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15452 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15453 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15454 set_bit(__I40E_RECOVERY_MODE, pf->state);
15458 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15459 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15465 * i40e_pf_loop_reset - perform reset in a loop.
15466 * @pf: board private structure
15468 * This function is useful when a NIC is about to enter recovery mode.
15469 * When a NIC's internal data structures are corrupted the NIC's
15470 * firmware is going to enter recovery mode.
15471 * Right after a POR it takes about 7 minutes for firmware to enter
15472 * recovery mode. Until that time a NIC is in some kind of intermediate
15473 * state. After that time period the NIC almost surely enters
15474 * recovery mode. The only way for a driver to detect intermediate
15475 * state is to issue a series of pf-resets and check a return value.
15476 * If a PF reset returns success then the firmware could be in recovery
15477 * mode so the caller of this code needs to check for recovery mode
15478 * if this function returns success. There is a little chance that
15479 * firmware will hang in intermediate state forever.
15480 * Since waiting 7 minutes is quite a lot of time this function waits
15481 * 10 seconds and then gives up by returning an error.
15483 * Return 0 on success, negative on failure.
15485 static int i40e_pf_loop_reset(struct i40e_pf *pf)
15487 /* wait max 10 seconds for PF reset to succeed */
15488 const unsigned long time_end = jiffies + 10 * HZ;
15489 struct i40e_hw *hw = &pf->hw;
15492 ret = i40e_pf_reset(hw);
15493 while (ret != 0 && time_before(jiffies, time_end)) {
15494 usleep_range(10000, 20000);
15495 ret = i40e_pf_reset(hw);
15501 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15507 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15508 * @pf: board private structure
15510 * Check FW registers to determine if FW issued unexpected EMP Reset.
15511 * Every time when unexpected EMP Reset occurs the FW increments
15512 * a counter of unexpected EMP Resets. When the counter reaches 10
15513 * the FW should enter the Recovery mode
15515 * Returns true if FW issued unexpected EMP Reset
15517 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15519 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15520 I40E_GL_FWSTS_FWS1B_MASK;
15521 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15522 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15526 * i40e_handle_resets - handle EMP resets and PF resets
15527 * @pf: board private structure
15529 * Handle both EMP resets and PF resets and conclude whether there are
15530 * any issues regarding these resets. If there are any issues then
15531 * generate log entry.
15533 * Return 0 if NIC is healthy or negative value when there are issues
15536 static int i40e_handle_resets(struct i40e_pf *pf)
15538 const int pfr = i40e_pf_loop_reset(pf);
15539 const bool is_empr = i40e_check_fw_empr(pf);
15541 if (is_empr || pfr != 0)
15542 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15544 return is_empr ? -EIO : pfr;
15548 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15549 * @pf: board private structure
15550 * @hw: ptr to the hardware info
15552 * This function does a minimal setup of all subsystems needed for running
15555 * Returns 0 on success, negative on failure
15557 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15559 struct i40e_vsi *vsi;
15563 pci_set_drvdata(pf->pdev, pf);
15564 pci_save_state(pf->pdev);
15566 /* set up periodic task facility */
15567 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15568 pf->service_timer_period = HZ;
15570 INIT_WORK(&pf->service_task, i40e_service_task);
15571 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15573 err = i40e_init_interrupt_scheme(pf);
15575 goto err_switch_setup;
15577 /* The number of VSIs reported by the FW is the minimum guaranteed
15578 * to us; HW supports far more and we share the remaining pool with
15579 * the other PFs. We allocate space for more than the guarantee with
15580 * the understanding that we might not get them all later.
15582 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15583 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15585 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15587 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15588 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15592 goto err_switch_setup;
15595 /* We allocate one VSI which is needed as absolute minimum
15596 * in order to register the netdev
15598 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15601 goto err_switch_setup;
15603 pf->lan_vsi = v_idx;
15604 vsi = pf->vsi[v_idx];
15607 goto err_switch_setup;
15609 vsi->alloc_queue_pairs = 1;
15610 err = i40e_config_netdev(vsi);
15612 goto err_switch_setup;
15613 err = register_netdev(vsi->netdev);
15615 goto err_switch_setup;
15616 vsi->netdev_registered = true;
15617 i40e_dbg_pf_init(pf);
15619 err = i40e_setup_misc_vector_for_recovery_mode(pf);
15621 goto err_switch_setup;
15623 /* tell the firmware that we're starting */
15624 i40e_send_version(pf);
15626 /* since everything's happy, start the service_task timer */
15627 mod_timer(&pf->service_timer,
15628 round_jiffies(jiffies + pf->service_timer_period));
15633 i40e_reset_interrupt_capability(pf);
15634 timer_shutdown_sync(&pf->service_timer);
15635 i40e_shutdown_adminq(hw);
15636 iounmap(hw->hw_addr);
15637 pci_release_mem_regions(pf->pdev);
15638 pci_disable_device(pf->pdev);
15645 * i40e_set_subsystem_device_id - set subsystem device id
15646 * @hw: pointer to the hardware info
15648 * Set PCI subsystem device id either from a pci_dev structure or
15649 * a specific FW register.
15651 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15653 struct i40e_pf *pf = i40e_hw_to_pf(hw);
15655 hw->subsystem_device_id = pf->pdev->subsystem_device ?
15656 pf->pdev->subsystem_device :
15657 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15661 * i40e_probe - Device initialization routine
15662 * @pdev: PCI device information struct
15663 * @ent: entry in i40e_pci_tbl
15665 * i40e_probe initializes a PF identified by a pci_dev structure.
15666 * The OS initialization, configuring of the PF private structure,
15667 * and a hardware reset occur.
15669 * Returns 0 on success, negative on failure
15671 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15673 struct i40e_aq_get_phy_abilities_resp abilities;
15674 #ifdef CONFIG_I40E_DCB
15675 enum i40e_get_fw_lldp_status_resp lldp_status;
15676 #endif /* CONFIG_I40E_DCB */
15677 struct i40e_pf *pf;
15678 struct i40e_hw *hw;
15679 static u16 pfs_found;
15683 #ifdef CONFIG_I40E_DCB
15685 #endif /* CONFIG_I40E_DCB */
15690 err = pci_enable_device_mem(pdev);
15694 /* set up for high or low dma */
15695 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15697 dev_err(&pdev->dev,
15698 "DMA configuration failed: 0x%x\n", err);
15702 /* set up pci connections */
15703 err = pci_request_mem_regions(pdev, i40e_driver_name);
15705 dev_info(&pdev->dev,
15706 "pci_request_selected_regions failed %d\n", err);
15710 pci_set_master(pdev);
15712 /* Now that we have a PCI connection, we need to do the
15713 * low level device setup. This is primarily setting up
15714 * the Admin Queue structures and then querying for the
15715 * device's current profile information.
15717 pf = i40e_alloc_pf(&pdev->dev);
15724 set_bit(__I40E_DOWN, pf->state);
15728 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15729 I40E_MAX_CSR_SPACE);
15730 /* We believe that the highest register to read is
15731 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15732 * is not less than that before mapping to prevent a
15735 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15736 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15741 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15742 if (!hw->hw_addr) {
15744 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15745 (unsigned int)pci_resource_start(pdev, 0),
15746 pf->ioremap_len, err);
15749 hw->vendor_id = pdev->vendor;
15750 hw->device_id = pdev->device;
15751 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15752 hw->subsystem_vendor_id = pdev->subsystem_vendor;
15753 i40e_set_subsystem_device_id(hw);
15754 hw->bus.device = PCI_SLOT(pdev->devfn);
15755 hw->bus.func = PCI_FUNC(pdev->devfn);
15756 hw->bus.bus_id = pdev->bus->number;
15757 pf->instance = pfs_found;
15759 /* Select something other than the 802.1ad ethertype for the
15760 * switch to use internally and drop on ingress.
15762 hw->switch_tag = 0xffff;
15763 hw->first_tag = ETH_P_8021AD;
15764 hw->second_tag = ETH_P_8021Q;
15766 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15767 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15768 INIT_LIST_HEAD(&pf->ddp_old_prof);
15770 /* set up the locks for the AQ, do this only once in probe
15771 * and destroy them only once in remove
15773 mutex_init(&hw->aq.asq_mutex);
15774 mutex_init(&hw->aq.arq_mutex);
15776 pf->msg_enable = netif_msg_init(debug,
15781 pf->hw.debug_mask = debug;
15783 /* do a special CORER for clearing PXE mode once at init */
15784 if (hw->revision_id == 0 &&
15785 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15786 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15791 i40e_clear_pxe_mode(hw);
15794 /* Reset here to make sure all is clean and to define PF 'n' */
15797 err = i40e_set_mac_type(hw);
15799 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15804 err = i40e_handle_resets(pf);
15808 i40e_check_recovery_mode(pf);
15810 if (is_kdump_kernel()) {
15811 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15812 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15814 hw->aq.num_arq_entries = I40E_AQ_LEN;
15815 hw->aq.num_asq_entries = I40E_AQ_LEN;
15817 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15818 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15819 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15821 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15823 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15825 err = i40e_init_shared_code(hw);
15827 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15832 /* set up a default setting for link flow control */
15833 pf->hw.fc.requested_mode = I40E_FC_NONE;
15835 err = i40e_init_adminq(hw);
15838 dev_info(&pdev->dev,
15839 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15840 hw->aq.api_maj_ver,
15841 hw->aq.api_min_ver,
15842 I40E_FW_API_VERSION_MAJOR,
15843 I40E_FW_MINOR_VERSION(hw));
15845 dev_info(&pdev->dev,
15846 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15850 i40e_get_oem_version(hw);
15851 i40e_get_pba_string(hw);
15853 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15854 i40e_nvm_version_str(hw, nvm_ver, sizeof(nvm_ver));
15855 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15856 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15857 hw->aq.api_maj_ver, hw->aq.api_min_ver, nvm_ver,
15858 hw->vendor_id, hw->device_id, hw->subsystem_vendor_id,
15859 hw->subsystem_device_id);
15861 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15862 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15863 dev_dbg(&pdev->dev,
15864 "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15865 hw->aq.api_maj_ver,
15866 hw->aq.api_min_ver,
15867 I40E_FW_API_VERSION_MAJOR,
15868 I40E_FW_MINOR_VERSION(hw));
15869 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15870 dev_info(&pdev->dev,
15871 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15872 hw->aq.api_maj_ver,
15873 hw->aq.api_min_ver,
15874 I40E_FW_API_VERSION_MAJOR,
15875 I40E_FW_MINOR_VERSION(hw));
15877 i40e_verify_eeprom(pf);
15879 /* Rev 0 hardware was never productized */
15880 if (hw->revision_id < 1)
15881 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15883 i40e_clear_pxe_mode(hw);
15885 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15887 goto err_adminq_setup;
15889 err = i40e_sw_init(pf);
15891 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15895 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15896 return i40e_init_recovery_mode(pf, hw);
15898 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15899 hw->func_caps.num_rx_qp, 0, 0);
15901 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15902 goto err_init_lan_hmc;
15905 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15907 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15909 goto err_configure_lan_hmc;
15912 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15913 * Ignore error return codes because if it was already disabled via
15914 * hardware settings this will fail
15916 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15917 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15918 i40e_aq_stop_lldp(hw, true, false, NULL);
15921 /* allow a platform config to override the HW addr */
15922 i40e_get_platform_mac_addr(pdev, pf);
15924 if (!is_valid_ether_addr(hw->mac.addr)) {
15925 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15929 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15930 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15931 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15932 if (is_valid_ether_addr(hw->mac.port_addr))
15933 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15935 i40e_ptp_alloc_pins(pf);
15936 pci_set_drvdata(pdev, pf);
15937 pci_save_state(pdev);
15939 #ifdef CONFIG_I40E_DCB
15940 status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15942 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15943 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15944 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15945 dev_info(&pdev->dev,
15946 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15947 "FW LLDP is disabled\n" :
15948 "FW LLDP is enabled\n");
15950 /* Enable FW to write default DCB config on link-up */
15951 i40e_aq_set_dcb_parameters(hw, true, NULL);
15953 err = i40e_init_pf_dcb(pf);
15955 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15956 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15957 /* Continue without DCB enabled */
15959 #endif /* CONFIG_I40E_DCB */
15961 /* set up periodic task facility */
15962 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15963 pf->service_timer_period = HZ;
15965 INIT_WORK(&pf->service_task, i40e_service_task);
15966 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15968 /* NVM bit on means WoL disabled for the port */
15969 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15970 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15971 pf->wol_en = false;
15974 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15976 /* set up the main switch operations */
15977 i40e_determine_queue_usage(pf);
15978 err = i40e_init_interrupt_scheme(pf);
15980 goto err_switch_setup;
15982 /* Reduce Tx and Rx pairs for kdump
15983 * When MSI-X is enabled, it's not allowed to use more TC queue
15984 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15985 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15987 if (is_kdump_kernel())
15988 pf->num_lan_msix = 1;
15990 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15991 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15992 pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15993 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15994 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15995 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15996 UDP_TUNNEL_TYPE_GENEVE;
15998 /* The number of VSIs reported by the FW is the minimum guaranteed
15999 * to us; HW supports far more and we share the remaining pool with
16000 * the other PFs. We allocate space for more than the guarantee with
16001 * the understanding that we might not get them all later.
16003 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
16004 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
16006 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
16007 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
16008 dev_warn(&pf->pdev->dev,
16009 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
16010 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
16011 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
16014 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
16015 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
16019 goto err_switch_setup;
16022 #ifdef CONFIG_PCI_IOV
16023 /* prep for VF support */
16024 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
16025 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
16026 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16027 if (pci_num_vf(pdev))
16028 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
16031 err = i40e_setup_pf_switch(pf, false, false);
16033 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
16036 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
16038 /* if FDIR VSI was set up, start it now */
16039 for (i = 0; i < pf->num_alloc_vsi; i++) {
16040 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
16041 i40e_vsi_open(pf->vsi[i]);
16046 /* The driver only wants link up/down and module qualification
16047 * reports from firmware. Note the negative logic.
16049 err = i40e_aq_set_phy_int_mask(&pf->hw,
16050 ~(I40E_AQ_EVENT_LINK_UPDOWN |
16051 I40E_AQ_EVENT_MEDIA_NA |
16052 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
16054 dev_info(&pf->pdev->dev, "set phy mask fail, err %pe aq_err %s\n",
16056 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16058 /* Reconfigure hardware for allowing smaller MSS in the case
16059 * of TSO, so that we avoid the MDD being fired and causing
16060 * a reset in the case of small MSS+TSO.
16062 val = rd32(hw, I40E_REG_MSS);
16063 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
16064 val &= ~I40E_REG_MSS_MIN_MASK;
16065 val |= I40E_64BYTE_MSS;
16066 wr32(hw, I40E_REG_MSS, val);
16069 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
16071 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
16073 dev_info(&pf->pdev->dev, "link restart failed, err %pe aq_err %s\n",
16075 i40e_aq_str(&pf->hw,
16076 pf->hw.aq.asq_last_status));
16078 /* The main driver is (mostly) up and happy. We need to set this state
16079 * before setting up the misc vector or we get a race and the vector
16080 * ends up disabled forever.
16082 clear_bit(__I40E_DOWN, pf->state);
16084 /* In case of MSIX we are going to setup the misc vector right here
16085 * to handle admin queue events etc. In case of legacy and MSI
16086 * the misc functionality and queue processing is combined in
16087 * the same vector and that gets setup at open.
16089 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
16090 err = i40e_setup_misc_vector(pf);
16092 dev_info(&pdev->dev,
16093 "setup of misc vector failed: %d\n", err);
16094 i40e_cloud_filter_exit(pf);
16095 i40e_fdir_teardown(pf);
16100 #ifdef CONFIG_PCI_IOV
16101 /* prep for VF support */
16102 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
16103 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
16104 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
16105 /* disable link interrupts for VFs */
16106 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
16107 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
16108 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
16111 if (pci_num_vf(pdev)) {
16112 dev_info(&pdev->dev,
16113 "Active VFs found, allocating resources.\n");
16114 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
16116 dev_info(&pdev->dev,
16117 "Error %d allocating resources for existing VFs\n",
16121 #endif /* CONFIG_PCI_IOV */
16123 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16124 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
16125 pf->num_iwarp_msix,
16126 I40E_IWARP_IRQ_PILE_ID);
16127 if (pf->iwarp_base_vector < 0) {
16128 dev_info(&pdev->dev,
16129 "failed to get tracking for %d vectors for IWARP err=%d\n",
16130 pf->num_iwarp_msix, pf->iwarp_base_vector);
16131 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
16135 i40e_dbg_pf_init(pf);
16137 /* tell the firmware that we're starting */
16138 i40e_send_version(pf);
16140 /* since everything's happy, start the service_task timer */
16141 mod_timer(&pf->service_timer,
16142 round_jiffies(jiffies + pf->service_timer_period));
16144 /* add this PF to client device list and launch a client service task */
16145 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16146 err = i40e_lan_add_device(pf);
16148 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
16152 #define PCI_SPEED_SIZE 8
16153 #define PCI_WIDTH_SIZE 8
16154 /* Devices on the IOSF bus do not have this information
16155 * and will report PCI Gen 1 x 1 by default so don't bother
16158 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
16159 char speed[PCI_SPEED_SIZE] = "Unknown";
16160 char width[PCI_WIDTH_SIZE] = "Unknown";
16162 /* Get the negotiated link width and speed from PCI config
16165 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
16168 i40e_set_pci_config_data(hw, link_status);
16170 switch (hw->bus.speed) {
16171 case i40e_bus_speed_8000:
16172 strscpy(speed, "8.0", PCI_SPEED_SIZE); break;
16173 case i40e_bus_speed_5000:
16174 strscpy(speed, "5.0", PCI_SPEED_SIZE); break;
16175 case i40e_bus_speed_2500:
16176 strscpy(speed, "2.5", PCI_SPEED_SIZE); break;
16180 switch (hw->bus.width) {
16181 case i40e_bus_width_pcie_x8:
16182 strscpy(width, "8", PCI_WIDTH_SIZE); break;
16183 case i40e_bus_width_pcie_x4:
16184 strscpy(width, "4", PCI_WIDTH_SIZE); break;
16185 case i40e_bus_width_pcie_x2:
16186 strscpy(width, "2", PCI_WIDTH_SIZE); break;
16187 case i40e_bus_width_pcie_x1:
16188 strscpy(width, "1", PCI_WIDTH_SIZE); break;
16193 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
16196 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
16197 hw->bus.speed < i40e_bus_speed_8000) {
16198 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
16199 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
16203 /* get the requested speeds from the fw */
16204 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
16206 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %pe last_status = %s\n",
16208 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16209 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
16211 /* set the FEC config due to the board capabilities */
16212 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
16214 /* get the supported phy types from the fw */
16215 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
16217 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %pe last_status = %s\n",
16219 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
16221 /* make sure the MFS hasn't been set lower than the default */
16222 #define MAX_FRAME_SIZE_DEFAULT 0x2600
16223 val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
16224 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
16225 if (val < MAX_FRAME_SIZE_DEFAULT)
16226 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
16229 /* Add a filter to drop all Flow control frames from any VSI from being
16230 * transmitted. By doing so we stop a malicious VF from sending out
16231 * PAUSE or PFC frames and potentially controlling traffic for other
16233 * The FW can still send Flow control frames if enabled.
16235 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
16236 pf->main_vsi_seid);
16238 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
16239 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
16240 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
16241 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
16242 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
16243 /* print a string summarizing features */
16244 i40e_print_features(pf);
16246 i40e_devlink_register(pf);
16250 /* Unwind what we've done if something failed in the setup */
16252 set_bit(__I40E_DOWN, pf->state);
16253 i40e_clear_interrupt_scheme(pf);
16256 i40e_reset_interrupt_capability(pf);
16257 timer_shutdown_sync(&pf->service_timer);
16259 err_configure_lan_hmc:
16260 (void)i40e_shutdown_lan_hmc(hw);
16262 kfree(pf->qp_pile);
16266 iounmap(hw->hw_addr);
16270 pci_release_mem_regions(pdev);
16273 pci_disable_device(pdev);
16278 * i40e_remove - Device removal routine
16279 * @pdev: PCI device information struct
16281 * i40e_remove is called by the PCI subsystem to alert the driver
16282 * that is should release a PCI device. This could be caused by a
16283 * Hot-Plug event, or because the driver is going to be removed from
16286 static void i40e_remove(struct pci_dev *pdev)
16288 struct i40e_pf *pf = pci_get_drvdata(pdev);
16289 struct i40e_hw *hw = &pf->hw;
16293 i40e_devlink_unregister(pf);
16295 i40e_dbg_pf_exit(pf);
16299 /* Disable RSS in hw */
16300 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16301 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16303 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16304 * flags, once they are set, i40e_rebuild should not be called as
16305 * i40e_prep_for_reset always returns early.
16307 while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16308 usleep_range(1000, 2000);
16309 set_bit(__I40E_IN_REMOVE, pf->state);
16311 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
16312 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16314 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
16316 /* no more scheduling of any task */
16317 set_bit(__I40E_SUSPENDED, pf->state);
16318 set_bit(__I40E_DOWN, pf->state);
16319 if (pf->service_timer.function)
16320 timer_shutdown_sync(&pf->service_timer);
16321 if (pf->service_task.func)
16322 cancel_work_sync(&pf->service_task);
16324 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16325 struct i40e_vsi *vsi = pf->vsi[0];
16327 /* We know that we have allocated only one vsi for this PF,
16328 * it was just for registering netdevice, so the interface
16329 * could be visible in the 'ifconfig' output
16331 unregister_netdev(vsi->netdev);
16332 free_netdev(vsi->netdev);
16337 /* Client close must be called explicitly here because the timer
16338 * has been stopped.
16340 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16342 i40e_fdir_teardown(pf);
16344 /* If there is a switch structure or any orphans, remove them.
16345 * This will leave only the PF's VSI remaining.
16347 for (i = 0; i < I40E_MAX_VEB; i++) {
16351 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16352 pf->veb[i]->uplink_seid == 0)
16353 i40e_switch_branch_release(pf->veb[i]);
16356 /* Now we can shutdown the PF's VSIs, just before we kill
16359 for (i = pf->num_alloc_vsi; i--;)
16361 i40e_vsi_close(pf->vsi[i]);
16362 i40e_vsi_release(pf->vsi[i]);
16366 i40e_cloud_filter_exit(pf);
16368 /* remove attached clients */
16369 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16370 ret_code = i40e_lan_del_device(pf);
16372 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16376 /* shutdown and destroy the HMC */
16377 if (hw->hmc.hmc_obj) {
16378 ret_code = i40e_shutdown_lan_hmc(hw);
16380 dev_warn(&pdev->dev,
16381 "Failed to destroy the HMC resources: %d\n",
16386 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16387 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16388 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16389 free_irq(pf->pdev->irq, pf);
16391 /* shutdown the adminq */
16392 i40e_shutdown_adminq(hw);
16394 /* destroy the locks only once, here */
16395 mutex_destroy(&hw->aq.arq_mutex);
16396 mutex_destroy(&hw->aq.asq_mutex);
16398 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16400 i40e_clear_interrupt_scheme(pf);
16401 for (i = 0; i < pf->num_alloc_vsi; i++) {
16403 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16404 i40e_vsi_clear_rings(pf->vsi[i]);
16405 i40e_vsi_clear(pf->vsi[i]);
16411 for (i = 0; i < I40E_MAX_VEB; i++) {
16416 kfree(pf->qp_pile);
16419 iounmap(hw->hw_addr);
16421 pci_release_mem_regions(pdev);
16423 pci_disable_device(pdev);
16427 * i40e_pci_error_detected - warning that something funky happened in PCI land
16428 * @pdev: PCI device information struct
16429 * @error: the type of PCI error
16431 * Called to warn that something happened and the error handling steps
16432 * are in progress. Allows the driver to quiesce things, be ready for
16435 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16436 pci_channel_state_t error)
16438 struct i40e_pf *pf = pci_get_drvdata(pdev);
16440 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16443 dev_info(&pdev->dev,
16444 "Cannot recover - error happened during device probe\n");
16445 return PCI_ERS_RESULT_DISCONNECT;
16448 /* shutdown all operations */
16449 if (!test_bit(__I40E_SUSPENDED, pf->state))
16450 i40e_prep_for_reset(pf);
16452 /* Request a slot reset */
16453 return PCI_ERS_RESULT_NEED_RESET;
16457 * i40e_pci_error_slot_reset - a PCI slot reset just happened
16458 * @pdev: PCI device information struct
16460 * Called to find if the driver can work with the device now that
16461 * the pci slot has been reset. If a basic connection seems good
16462 * (registers are readable and have sane content) then return a
16463 * happy little PCI_ERS_RESULT_xxx.
16465 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16467 struct i40e_pf *pf = pci_get_drvdata(pdev);
16468 pci_ers_result_t result;
16471 dev_dbg(&pdev->dev, "%s\n", __func__);
16472 if (pci_enable_device_mem(pdev)) {
16473 dev_info(&pdev->dev,
16474 "Cannot re-enable PCI device after reset.\n");
16475 result = PCI_ERS_RESULT_DISCONNECT;
16477 pci_set_master(pdev);
16478 pci_restore_state(pdev);
16479 pci_save_state(pdev);
16480 pci_wake_from_d3(pdev, false);
16482 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16484 result = PCI_ERS_RESULT_RECOVERED;
16486 result = PCI_ERS_RESULT_DISCONNECT;
16493 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16494 * @pdev: PCI device information struct
16496 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16498 struct i40e_pf *pf = pci_get_drvdata(pdev);
16500 i40e_prep_for_reset(pf);
16504 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16505 * @pdev: PCI device information struct
16507 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16509 struct i40e_pf *pf = pci_get_drvdata(pdev);
16511 if (test_bit(__I40E_IN_REMOVE, pf->state))
16514 i40e_reset_and_rebuild(pf, false, false);
16518 * i40e_pci_error_resume - restart operations after PCI error recovery
16519 * @pdev: PCI device information struct
16521 * Called to allow the driver to bring things back up after PCI error
16522 * and/or reset recovery has finished.
16524 static void i40e_pci_error_resume(struct pci_dev *pdev)
16526 struct i40e_pf *pf = pci_get_drvdata(pdev);
16528 dev_dbg(&pdev->dev, "%s\n", __func__);
16529 if (test_bit(__I40E_SUSPENDED, pf->state))
16532 i40e_handle_reset_warning(pf, false);
16536 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16537 * using the mac_address_write admin q function
16538 * @pf: pointer to i40e_pf struct
16540 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16542 struct i40e_hw *hw = &pf->hw;
16547 /* Get current MAC address in case it's an LAA */
16548 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16549 ether_addr_copy(mac_addr,
16550 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16552 dev_err(&pf->pdev->dev,
16553 "Failed to retrieve MAC address; using default\n");
16554 ether_addr_copy(mac_addr, hw->mac.addr);
16557 /* The FW expects the mac address write cmd to first be called with
16558 * one of these flags before calling it again with the multicast
16561 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16563 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16564 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16566 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16568 dev_err(&pf->pdev->dev,
16569 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16573 flags = I40E_AQC_MC_MAG_EN
16574 | I40E_AQC_WOL_PRESERVE_ON_PFR
16575 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16576 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16578 dev_err(&pf->pdev->dev,
16579 "Failed to enable Multicast Magic Packet wake up\n");
16583 * i40e_shutdown - PCI callback for shutting down
16584 * @pdev: PCI device information struct
16586 static void i40e_shutdown(struct pci_dev *pdev)
16588 struct i40e_pf *pf = pci_get_drvdata(pdev);
16589 struct i40e_hw *hw = &pf->hw;
16591 set_bit(__I40E_SUSPENDED, pf->state);
16592 set_bit(__I40E_DOWN, pf->state);
16594 del_timer_sync(&pf->service_timer);
16595 cancel_work_sync(&pf->service_task);
16596 i40e_cloud_filter_exit(pf);
16597 i40e_fdir_teardown(pf);
16599 /* Client close must be called explicitly here because the timer
16600 * has been stopped.
16602 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16604 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16605 i40e_enable_mc_magic_wake(pf);
16607 i40e_prep_for_reset(pf);
16609 wr32(hw, I40E_PFPM_APM,
16610 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16611 wr32(hw, I40E_PFPM_WUFC,
16612 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16614 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16615 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16616 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16617 free_irq(pf->pdev->irq, pf);
16619 /* Since we're going to destroy queues during the
16620 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16624 i40e_clear_interrupt_scheme(pf);
16627 if (system_state == SYSTEM_POWER_OFF) {
16628 pci_wake_from_d3(pdev, pf->wol_en);
16629 pci_set_power_state(pdev, PCI_D3hot);
16634 * i40e_suspend - PM callback for moving to D3
16635 * @dev: generic device information structure
16637 static int __maybe_unused i40e_suspend(struct device *dev)
16639 struct i40e_pf *pf = dev_get_drvdata(dev);
16640 struct i40e_hw *hw = &pf->hw;
16642 /* If we're already suspended, then there is nothing to do */
16643 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16646 set_bit(__I40E_DOWN, pf->state);
16648 /* Ensure service task will not be running */
16649 del_timer_sync(&pf->service_timer);
16650 cancel_work_sync(&pf->service_task);
16652 /* Client close must be called explicitly here because the timer
16653 * has been stopped.
16655 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16657 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16658 i40e_enable_mc_magic_wake(pf);
16660 /* Since we're going to destroy queues during the
16661 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16666 i40e_prep_for_reset(pf);
16668 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16669 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16671 /* Clear the interrupt scheme and release our IRQs so that the system
16672 * can safely hibernate even when there are a large number of CPUs.
16673 * Otherwise hibernation might fail when mapping all the vectors back
16676 i40e_clear_interrupt_scheme(pf);
16684 * i40e_resume - PM callback for waking up from D3
16685 * @dev: generic device information structure
16687 static int __maybe_unused i40e_resume(struct device *dev)
16689 struct i40e_pf *pf = dev_get_drvdata(dev);
16692 /* If we're not suspended, then there is nothing to do */
16693 if (!test_bit(__I40E_SUSPENDED, pf->state))
16696 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16697 * since we're going to be restoring queues
16701 /* We cleared the interrupt scheme when we suspended, so we need to
16702 * restore it now to resume device functionality.
16704 err = i40e_restore_interrupt_scheme(pf);
16706 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16710 clear_bit(__I40E_DOWN, pf->state);
16711 i40e_reset_and_rebuild(pf, false, true);
16715 /* Clear suspended state last after everything is recovered */
16716 clear_bit(__I40E_SUSPENDED, pf->state);
16718 /* Restart the service task */
16719 mod_timer(&pf->service_timer,
16720 round_jiffies(jiffies + pf->service_timer_period));
16725 static const struct pci_error_handlers i40e_err_handler = {
16726 .error_detected = i40e_pci_error_detected,
16727 .slot_reset = i40e_pci_error_slot_reset,
16728 .reset_prepare = i40e_pci_error_reset_prepare,
16729 .reset_done = i40e_pci_error_reset_done,
16730 .resume = i40e_pci_error_resume,
16733 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16735 static struct pci_driver i40e_driver = {
16736 .name = i40e_driver_name,
16737 .id_table = i40e_pci_tbl,
16738 .probe = i40e_probe,
16739 .remove = i40e_remove,
16741 .pm = &i40e_pm_ops,
16743 .shutdown = i40e_shutdown,
16744 .err_handler = &i40e_err_handler,
16745 .sriov_configure = i40e_pci_sriov_configure,
16749 * i40e_init_module - Driver registration routine
16751 * i40e_init_module is the first routine called when the driver is
16752 * loaded. All it does is register with the PCI subsystem.
16754 static int __init i40e_init_module(void)
16758 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16759 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16761 /* There is no need to throttle the number of active tasks because
16762 * each device limits its own task using a state bit for scheduling
16763 * the service task, and the device tasks do not interfere with each
16764 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16765 * since we need to be able to guarantee forward progress even under
16768 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16770 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16775 err = pci_register_driver(&i40e_driver);
16777 destroy_workqueue(i40e_wq);
16784 module_init(i40e_init_module);
16787 * i40e_exit_module - Driver exit cleanup routine
16789 * i40e_exit_module is called just before the driver is removed
16792 static void __exit i40e_exit_module(void)
16794 pci_unregister_driver(&i40e_driver);
16795 destroy_workqueue(i40e_wq);
16796 ida_destroy(&i40e_client_ida);
16799 module_exit(i40e_exit_module);