drivers/net/ethernet/intel/e1000e/netdev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/pci.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/delay.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/tcp.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/ethtool.h>
  21 #include <linux/if_vlan.h>
  22 #include <linux/cpu.h>
  23 #include <linux/smp.h>
  24 #include <linux/pm_qos.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/aer.h>
  27 #include <linux/prefetch.h>
  28 #include <linux/suspend.h>
  29
  30 #include "e1000.h"
  31
  32 char e1000e_driver_name[] = "e1000e";
  33
  34 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  35 static int debug = -1;
  36 module_param(debug, int, 0);
  37 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  38
  39 static const struct e1000_info *e1000_info_tbl[] = {
  40         [board_82571]           = &e1000_82571_info,
  41         [board_82572]           = &e1000_82572_info,
  42         [board_82573]           = &e1000_82573_info,
  43         [board_82574]           = &e1000_82574_info,
  44         [board_82583]           = &e1000_82583_info,
  45         [board_80003es2lan]     = &e1000_es2_info,
  46         [board_ich8lan]         = &e1000_ich8_info,
  47         [board_ich9lan]         = &e1000_ich9_info,
  48         [board_ich10lan]        = &e1000_ich10_info,
  49         [board_pchlan]          = &e1000_pch_info,
  50         [board_pch2lan]         = &e1000_pch2_info,
  51         [board_pch_lpt]         = &e1000_pch_lpt_info,
  52         [board_pch_spt]         = &e1000_pch_spt_info,
  53         [board_pch_cnp]         = &e1000_pch_cnp_info,
  54         [board_pch_tgp]         = &e1000_pch_tgp_info,
  55 };
  56
  57 struct e1000_reg_info {
  58         u32 ofs;
  59         char *name;
  60 };
  61
  62 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  63         /* General Registers */
  64         {E1000_CTRL, "CTRL"},
  65         {E1000_STATUS, "STATUS"},
  66         {E1000_CTRL_EXT, "CTRL_EXT"},
  67
  68         /* Interrupt Registers */
  69         {E1000_ICR, "ICR"},
  70
  71         /* Rx Registers */
  72         {E1000_RCTL, "RCTL"},
  73         {E1000_RDLEN(0), "RDLEN"},
  74         {E1000_RDH(0), "RDH"},
  75         {E1000_RDT(0), "RDT"},
  76         {E1000_RDTR, "RDTR"},
  77         {E1000_RXDCTL(0), "RXDCTL"},
  78         {E1000_ERT, "ERT"},
  79         {E1000_RDBAL(0), "RDBAL"},
  80         {E1000_RDBAH(0), "RDBAH"},
  81         {E1000_RDFH, "RDFH"},
  82         {E1000_RDFT, "RDFT"},
  83         {E1000_RDFHS, "RDFHS"},
  84         {E1000_RDFTS, "RDFTS"},
  85         {E1000_RDFPC, "RDFPC"},
  86
  87         /* Tx Registers */
  88         {E1000_TCTL, "TCTL"},
  89         {E1000_TDBAL(0), "TDBAL"},
  90         {E1000_TDBAH(0), "TDBAH"},
  91         {E1000_TDLEN(0), "TDLEN"},
  92         {E1000_TDH(0), "TDH"},
  93         {E1000_TDT(0), "TDT"},
  94         {E1000_TIDV, "TIDV"},
  95         {E1000_TXDCTL(0), "TXDCTL"},
  96         {E1000_TADV, "TADV"},
  97         {E1000_TARC(0), "TARC"},
  98         {E1000_TDFH, "TDFH"},
  99         {E1000_TDFT, "TDFT"},
 100         {E1000_TDFHS, "TDFHS"},
 101         {E1000_TDFTS, "TDFTS"},
 102         {E1000_TDFPC, "TDFPC"},
 103
 104         /* List Terminator */
 105         {0, NULL}
 106 };
 107
 108 /**
 109  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 110  * @hw: pointer to the HW structure
 111  *
 112  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 113  * be accessing the registers at the same time.  Normally, this is handled in
 114  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 115  * accesses later than it should which could result in the register to have
 116  * an incorrect value.  Workaround this by checking the FWSM register which
 117  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 118  * and try again a number of times.
 119  **/
 120 static void __ew32_prepare(struct e1000_hw *hw)
 121 {
 122         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 123
 124         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 125                 udelay(50);
 126 }
 127
 128 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 129 {
 130         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 131                 __ew32_prepare(hw);
 132
 133         writel(val, hw->hw_addr + reg);
 134 }
 135
 136 /**
 137  * e1000_regdump - register printout routine
 138  * @hw: pointer to the HW structure
 139  * @reginfo: pointer to the register info table
 140  **/
 141 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 142 {
 143         int n = 0;
 144         char rname[16];
 145         u32 regs[8];
 146
 147         switch (reginfo->ofs) {
 148         case E1000_RXDCTL(0):
 149                 for (n = 0; n < 2; n++)
 150                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 151                 break;
 152         case E1000_TXDCTL(0):
 153                 for (n = 0; n < 2; n++)
 154                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 155                 break;
 156         case E1000_TARC(0):
 157                 for (n = 0; n < 2; n++)
 158                         regs[n] = __er32(hw, E1000_TARC(n));
 159                 break;
 160         default:
 161                 pr_info("%-15s %08x\n",
 162                         reginfo->name, __er32(hw, reginfo->ofs));
 163                 return;
 164         }
 165
 166         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 167         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 168 }
 169
 170 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 171                                  struct e1000_buffer *bi)
 172 {
 173         int i;
 174         struct e1000_ps_page *ps_page;
 175
 176         for (i = 0; i < adapter->rx_ps_pages; i++) {
 177                 ps_page = &bi->ps_pages[i];
 178
 179                 if (ps_page->page) {
 180                         pr_info("packet dump for ps_page %d:\n", i);
 181                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 182                                        16, 1, page_address(ps_page->page),
 183                                        PAGE_SIZE, true);
 184                 }
 185         }
 186 }
 187
 188 /**
 189  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 190  * @adapter: board private structure
 191  **/
 192 static void e1000e_dump(struct e1000_adapter *adapter)
 193 {
 194         struct net_device *netdev = adapter->netdev;
 195         struct e1000_hw *hw = &adapter->hw;
 196         struct e1000_reg_info *reginfo;
 197         struct e1000_ring *tx_ring = adapter->tx_ring;
 198         struct e1000_tx_desc *tx_desc;
 199         struct my_u0 {
 200                 __le64 a;
 201                 __le64 b;
 202         } *u0;
 203         struct e1000_buffer *buffer_info;
 204         struct e1000_ring *rx_ring = adapter->rx_ring;
 205         union e1000_rx_desc_packet_split *rx_desc_ps;
 206         union e1000_rx_desc_extended *rx_desc;
 207         struct my_u1 {
 208                 __le64 a;
 209                 __le64 b;
 210                 __le64 c;
 211                 __le64 d;
 212         } *u1;
 213         u32 staterr;
 214         int i = 0;
 215
 216         if (!netif_msg_hw(adapter))
 217                 return;
 218
 219         /* Print netdevice Info */
 220         if (netdev) {
 221                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 222                 pr_info("Device Name     state            trans_start\n");
 223                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 224                         netdev->state, dev_trans_start(netdev));
 225         }
 226
 227         /* Print Registers */
 228         dev_info(&adapter->pdev->dev, "Register Dump\n");
 229         pr_info(" Register Name   Value\n");
 230         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 231              reginfo->name; reginfo++) {
 232                 e1000_regdump(hw, reginfo);
 233         }
 234
 235         /* Print Tx Ring Summary */
 236         if (!netdev || !netif_running(netdev))
 237                 return;
 238
 239         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 240         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 241         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 242         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 243                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 244                 (unsigned long long)buffer_info->dma,
 245                 buffer_info->length,
 246                 buffer_info->next_to_watch,
 247                 (unsigned long long)buffer_info->time_stamp);
 248
 249         /* Print Tx Ring */
 250         if (!netif_msg_tx_done(adapter))
 251                 goto rx_ring_summary;
 252
 253         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 254
 255         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 256          *
 257          * Legacy Transmit Descriptor
 258          *   +--------------------------------------------------------------+
 259          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 260          *   +--------------------------------------------------------------+
 261          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 262          *   +--------------------------------------------------------------+
 263          *   63       48 47        36 35    32 31     24 23    16 15        0
 264          *
 265          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 266          *   63      48 47    40 39       32 31             16 15    8 7      0
 267          *   +----------------------------------------------------------------+
 268          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 269          *   +----------------------------------------------------------------+
 270          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 271          *   +----------------------------------------------------------------+
 272          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 273          *
 274          * Extended Data Descriptor (DTYP=0x1)
 275          *   +----------------------------------------------------------------+
 276          * 0 |                     Buffer Address [63:0]                      |
 277          *   +----------------------------------------------------------------+
 278          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 279          *   +----------------------------------------------------------------+
 280          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 281          */
 282         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 283         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 284         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 285         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 286                 const char *next_desc;
 287                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 288                 buffer_info = &tx_ring->buffer_info[i];
 289                 u0 = (struct my_u0 *)tx_desc;
 290                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 291                         next_desc = " NTC/U";
 292                 else if (i == tx_ring->next_to_use)
 293                         next_desc = " NTU";
 294                 else if (i == tx_ring->next_to_clean)
 295                         next_desc = " NTC";
 296                 else
 297                         next_desc = "";
 298                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 299                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 300                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 301                         i,
 302                         (unsigned long long)le64_to_cpu(u0->a),
 303                         (unsigned long long)le64_to_cpu(u0->b),
 304                         (unsigned long long)buffer_info->dma,
 305                         buffer_info->length, buffer_info->next_to_watch,
 306                         (unsigned long long)buffer_info->time_stamp,
 307                         buffer_info->skb, next_desc);
 308
 309                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 310                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 311                                        16, 1, buffer_info->skb->data,
 312                                        buffer_info->skb->len, true);
 313         }
 314
 315         /* Print Rx Ring Summary */
 316 rx_ring_summary:
 317         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 318         pr_info("Queue [NTU] [NTC]\n");
 319         pr_info(" %5d %5X %5X\n",
 320                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 321
 322         /* Print Rx Ring */
 323         if (!netif_msg_rx_status(adapter))
 324                 return;
 325
 326         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 327         switch (adapter->rx_ps_pages) {
 328         case 1:
 329         case 2:
 330         case 3:
 331                 /* [Extended] Packet Split Receive Descriptor Format
 332                  *
 333                  *    +-----------------------------------------------------+
 334                  *  0 |                Buffer Address 0 [63:0]              |
 335                  *    +-----------------------------------------------------+
 336                  *  8 |                Buffer Address 1 [63:0]              |
 337                  *    +-----------------------------------------------------+
 338                  * 16 |                Buffer Address 2 [63:0]              |
 339                  *    +-----------------------------------------------------+
 340                  * 24 |                Buffer Address 3 [63:0]              |
 341                  *    +-----------------------------------------------------+
 342                  */
 343                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 344                 /* [Extended] Receive Descriptor (Write-Back) Format
 345                  *
 346                  *   63       48 47    32 31     13 12    8 7    4 3        0
 347                  *   +------------------------------------------------------+
 348                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 349                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 350                  *   +------------------------------------------------------+
 351                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 352                  *   +------------------------------------------------------+
 353                  *   63       48 47    32 31            20 19               0
 354                  */
 355                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 356                 for (i = 0; i < rx_ring->count; i++) {
 357                         const char *next_desc;
 358                         buffer_info = &rx_ring->buffer_info[i];
 359                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 360                         u1 = (struct my_u1 *)rx_desc_ps;
 361                         staterr =
 362                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 363
 364                         if (i == rx_ring->next_to_use)
 365                                 next_desc = " NTU";
 366                         else if (i == rx_ring->next_to_clean)
 367                                 next_desc = " NTC";
 368                         else
 369                                 next_desc = "";
 370
 371                         if (staterr & E1000_RXD_STAT_DD) {
 372                                 /* Descriptor Done */
 373                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 374                                         "RWB", i,
 375                                         (unsigned long long)le64_to_cpu(u1->a),
 376                                         (unsigned long long)le64_to_cpu(u1->b),
 377                                         (unsigned long long)le64_to_cpu(u1->c),
 378                                         (unsigned long long)le64_to_cpu(u1->d),
 379                                         buffer_info->skb, next_desc);
 380                         } else {
 381                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 382                                         "R  ", i,
 383                                         (unsigned long long)le64_to_cpu(u1->a),
 384                                         (unsigned long long)le64_to_cpu(u1->b),
 385                                         (unsigned long long)le64_to_cpu(u1->c),
 386                                         (unsigned long long)le64_to_cpu(u1->d),
 387                                         (unsigned long long)buffer_info->dma,
 388                                         buffer_info->skb, next_desc);
 389
 390                                 if (netif_msg_pktdata(adapter))
 391                                         e1000e_dump_ps_pages(adapter,
 392                                                              buffer_info);
 393                         }
 394                 }
 395                 break;
 396         default:
 397         case 0:
 398                 /* Extended Receive Descriptor (Read) Format
 399                  *
 400                  *   +-----------------------------------------------------+
 401                  * 0 |                Buffer Address [63:0]                |
 402                  *   +-----------------------------------------------------+
 403                  * 8 |                      Reserved                       |
 404                  *   +-----------------------------------------------------+
 405                  */
 406                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 407                 /* Extended Receive Descriptor (Write-Back) Format
 408                  *
 409                  *   63       48 47    32 31    24 23            4 3        0
 410                  *   +------------------------------------------------------+
 411                  *   |     RSS Hash      |        |               |         |
 412                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 413                  *   | Packet   | IP     |        |               |  Type   |
 414                  *   | Checksum | Ident  |        |               |         |
 415                  *   +------------------------------------------------------+
 416                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 417                  *   +------------------------------------------------------+
 418                  *   63       48 47    32 31            20 19               0
 419                  */
 420                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 421
 422                 for (i = 0; i < rx_ring->count; i++) {
 423                         const char *next_desc;
 424
 425                         buffer_info = &rx_ring->buffer_info[i];
 426                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 427                         u1 = (struct my_u1 *)rx_desc;
 428                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 429
 430                         if (i == rx_ring->next_to_use)
 431                                 next_desc = " NTU";
 432                         else if (i == rx_ring->next_to_clean)
 433                                 next_desc = " NTC";
 434                         else
 435                                 next_desc = "";
 436
 437                         if (staterr & E1000_RXD_STAT_DD) {
 438                                 /* Descriptor Done */
 439                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 440                                         "RWB", i,
 441                                         (unsigned long long)le64_to_cpu(u1->a),
 442                                         (unsigned long long)le64_to_cpu(u1->b),
 443                                         buffer_info->skb, next_desc);
 444                         } else {
 445                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 446                                         "R  ", i,
 447                                         (unsigned long long)le64_to_cpu(u1->a),
 448                                         (unsigned long long)le64_to_cpu(u1->b),
 449                                         (unsigned long long)buffer_info->dma,
 450                                         buffer_info->skb, next_desc);
 451
 452                                 if (netif_msg_pktdata(adapter) &&
 453                                     buffer_info->skb)
 454                                         print_hex_dump(KERN_INFO, "",
 455                                                        DUMP_PREFIX_ADDRESS, 16,
 456                                                        1,
 457                                                        buffer_info->skb->data,
 458                                                        adapter->rx_buffer_len,
 459                                                        true);
 460                         }
 461                 }
 462         }
 463 }
 464
 465 /**
 466  * e1000_desc_unused - calculate if we have unused descriptors
 467  * @ring: pointer to ring struct to perform calculation on
 468  **/
 469 static int e1000_desc_unused(struct e1000_ring *ring)
 470 {
 471         if (ring->next_to_clean > ring->next_to_use)
 472                 return ring->next_to_clean - ring->next_to_use - 1;
 473
 474         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 475 }
 476
 477 /**
 478  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 479  * @adapter: board private structure
 480  * @hwtstamps: time stamp structure to update
 481  * @systim: unsigned 64bit system time value.
 482  *
 483  * Convert the system time value stored in the RX/TXSTMP registers into a
 484  * hwtstamp which can be used by the upper level time stamping functions.
 485  *
 486  * The 'systim_lock' spinlock is used to protect the consistency of the
 487  * system time value. This is needed because reading the 64 bit time
 488  * value involves reading two 32 bit registers. The first read latches the
 489  * value.
 490  **/
 491 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 492                                       struct skb_shared_hwtstamps *hwtstamps,
 493                                       u64 systim)
 494 {
 495         u64 ns;
 496         unsigned long flags;
 497
 498         spin_lock_irqsave(&adapter->systim_lock, flags);
 499         ns = timecounter_cyc2time(&adapter->tc, systim);
 500         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 501
 502         memset(hwtstamps, 0, sizeof(*hwtstamps));
 503         hwtstamps->hwtstamp = ns_to_ktime(ns);
 504 }
 505
 506 /**
 507  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 508  * @adapter: board private structure
 509  * @status: descriptor extended error and status field
 510  * @skb: particular skb to include time stamp
 511  *
 512  * If the time stamp is valid, convert it into the timecounter ns value
 513  * and store that result into the shhwtstamps structure which is passed
 514  * up the network stack.
 515  **/
 516 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 517                                struct sk_buff *skb)
 518 {
 519         struct e1000_hw *hw = &adapter->hw;
 520         u64 rxstmp;
 521
 522         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 523             !(status & E1000_RXDEXT_STATERR_TST) ||
 524             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 525                 return;
 526
 527         /* The Rx time stamp registers contain the time stamp.  No other
 528          * received packet will be time stamped until the Rx time stamp
 529          * registers are read.  Because only one packet can be time stamped
 530          * at a time, the register values must belong to this packet and
 531          * therefore none of the other additional attributes need to be
 532          * compared.
 533          */
 534         rxstmp = (u64)er32(RXSTMPL);
 535         rxstmp |= (u64)er32(RXSTMPH) << 32;
 536         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 537
 538         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 539 }
 540
 541 /**
 542  * e1000_receive_skb - helper function to handle Rx indications
 543  * @adapter: board private structure
 544  * @netdev: pointer to netdev struct
 545  * @staterr: descriptor extended error and status field as written by hardware
 546  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 547  * @skb: pointer to sk_buff to be indicated to stack
 548  **/
 549 static void e1000_receive_skb(struct e1000_adapter *adapter,
 550                               struct net_device *netdev, struct sk_buff *skb,
 551                               u32 staterr, __le16 vlan)
 552 {
 553         u16 tag = le16_to_cpu(vlan);
 554
 555         e1000e_rx_hwtstamp(adapter, staterr, skb);
 556
 557         skb->protocol = eth_type_trans(skb, netdev);
 558
 559         if (staterr & E1000_RXD_STAT_VP)
 560                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 561
 562         napi_gro_receive(&adapter->napi, skb);
 563 }
 564
 565 /**
 566  * e1000_rx_checksum - Receive Checksum Offload
 567  * @adapter: board private structure
 568  * @status_err: receive descriptor status and error fields
 569  * @skb: socket buffer with received data
 570  **/
 571 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 572                               struct sk_buff *skb)
 573 {
 574         u16 status = (u16)status_err;
 575         u8 errors = (u8)(status_err >> 24);
 576
 577         skb_checksum_none_assert(skb);
 578
 579         /* Rx checksum disabled */
 580         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 581                 return;
 582
 583         /* Ignore Checksum bit is set */
 584         if (status & E1000_RXD_STAT_IXSM)
 585                 return;
 586
 587         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 588         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 589                 /* let the stack verify checksum errors */
 590                 adapter->hw_csum_err++;
 591                 return;
 592         }
 593
 594         /* TCP/UDP Checksum has not been calculated */
 595         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 596                 return;
 597
 598         /* It must be a TCP or UDP packet with a valid checksum */
 599         skb->ip_summed = CHECKSUM_UNNECESSARY;
 600         adapter->hw_csum_good++;
 601 }
 602
 603 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 604 {
 605         struct e1000_adapter *adapter = rx_ring->adapter;
 606         struct e1000_hw *hw = &adapter->hw;
 607
 608         __ew32_prepare(hw);
 609         writel(i, rx_ring->tail);
 610
 611         if (unlikely(i != readl(rx_ring->tail))) {
 612                 u32 rctl = er32(RCTL);
 613
 614                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 615                 e_err("ME firmware caused invalid RDT - resetting\n");
 616                 schedule_work(&adapter->reset_task);
 617         }
 618 }
 619
 620 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 621 {
 622         struct e1000_adapter *adapter = tx_ring->adapter;
 623         struct e1000_hw *hw = &adapter->hw;
 624
 625         __ew32_prepare(hw);
 626         writel(i, tx_ring->tail);
 627
 628         if (unlikely(i != readl(tx_ring->tail))) {
 629                 u32 tctl = er32(TCTL);
 630
 631                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 632                 e_err("ME firmware caused invalid TDT - resetting\n");
 633                 schedule_work(&adapter->reset_task);
 634         }
 635 }
 636
 637 /**
 638  * e1000_alloc_rx_buffers - Replace used receive buffers
 639  * @rx_ring: Rx descriptor ring
 640  * @cleaned_count: number to reallocate
 641  * @gfp: flags for allocation
 642  **/
 643 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 644                                    int cleaned_count, gfp_t gfp)
 645 {
 646         struct e1000_adapter *adapter = rx_ring->adapter;
 647         struct net_device *netdev = adapter->netdev;
 648         struct pci_dev *pdev = adapter->pdev;
 649         union e1000_rx_desc_extended *rx_desc;
 650         struct e1000_buffer *buffer_info;
 651         struct sk_buff *skb;
 652         unsigned int i;
 653         unsigned int bufsz = adapter->rx_buffer_len;
 654
 655         i = rx_ring->next_to_use;
 656         buffer_info = &rx_ring->buffer_info[i];
 657
 658         while (cleaned_count--) {
 659                 skb = buffer_info->skb;
 660                 if (skb) {
 661                         skb_trim(skb, 0);
 662                         goto map_skb;
 663                 }
 664
 665                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 666                 if (!skb) {
 667                         /* Better luck next round */
 668                         adapter->alloc_rx_buff_failed++;
 669                         break;
 670                 }
 671
 672                 buffer_info->skb = skb;
 673 map_skb:
 674                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 675                                                   adapter->rx_buffer_len,
 676                                                   DMA_FROM_DEVICE);
 677                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 678                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 679                         adapter->rx_dma_failed++;
 680                         break;
 681                 }
 682
 683                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 684                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 685
 686                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 687                         /* Force memory writes to complete before letting h/w
 688                          * know there are new descriptors to fetch.  (Only
 689                          * applicable for weak-ordered memory model archs,
 690                          * such as IA-64).
 691                          */
 692                         wmb();
 693                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 694                                 e1000e_update_rdt_wa(rx_ring, i);
 695                         else
 696                                 writel(i, rx_ring->tail);
 697                 }
 698                 i++;
 699                 if (i == rx_ring->count)
 700                         i = 0;
 701                 buffer_info = &rx_ring->buffer_info[i];
 702         }
 703
 704         rx_ring->next_to_use = i;
 705 }
 706
 707 /**
 708  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 709  * @rx_ring: Rx descriptor ring
 710  * @cleaned_count: number to reallocate
 711  * @gfp: flags for allocation
 712  **/
 713 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 714                                       int cleaned_count, gfp_t gfp)
 715 {
 716         struct e1000_adapter *adapter = rx_ring->adapter;
 717         struct net_device *netdev = adapter->netdev;
 718         struct pci_dev *pdev = adapter->pdev;
 719         union e1000_rx_desc_packet_split *rx_desc;
 720         struct e1000_buffer *buffer_info;
 721         struct e1000_ps_page *ps_page;
 722         struct sk_buff *skb;
 723         unsigned int i, j;
 724
 725         i = rx_ring->next_to_use;
 726         buffer_info = &rx_ring->buffer_info[i];
 727
 728         while (cleaned_count--) {
 729                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 730
 731                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 732                         ps_page = &buffer_info->ps_pages[j];
 733                         if (j >= adapter->rx_ps_pages) {
 734                                 /* all unused desc entries get hw null ptr */
 735                                 rx_desc->read.buffer_addr[j + 1] =
 736                                     ~cpu_to_le64(0);
 737                                 continue;
 738                         }
 739                         if (!ps_page->page) {
 740                                 ps_page->page = alloc_page(gfp);
 741                                 if (!ps_page->page) {
 742                                         adapter->alloc_rx_buff_failed++;
 743                                         goto no_buffers;
 744                                 }
 745                                 ps_page->dma = dma_map_page(&pdev->dev,
 746                                                             ps_page->page,
 747                                                             0, PAGE_SIZE,
 748                                                             DMA_FROM_DEVICE);
 749                                 if (dma_mapping_error(&pdev->dev,
 750                                                       ps_page->dma)) {
 751                                         dev_err(&adapter->pdev->dev,
 752                                                 "Rx DMA page map failed\n");
 753                                         adapter->rx_dma_failed++;
 754                                         goto no_buffers;
 755                                 }
 756                         }
 757                         /* Refresh the desc even if buffer_addrs
 758                          * didn't change because each write-back
 759                          * erases this info.
 760                          */
 761                         rx_desc->read.buffer_addr[j + 1] =
 762                             cpu_to_le64(ps_page->dma);
 763                 }
 764
 765                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 766                                                   gfp);
 767
 768                 if (!skb) {
 769                         adapter->alloc_rx_buff_failed++;
 770                         break;
 771                 }
 772
 773                 buffer_info->skb = skb;
 774                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 775                                                   adapter->rx_ps_bsize0,
 776                                                   DMA_FROM_DEVICE);
 777                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 778                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 779                         adapter->rx_dma_failed++;
 780                         /* cleanup skb */
 781                         dev_kfree_skb_any(skb);
 782                         buffer_info->skb = NULL;
 783                         break;
 784                 }
 785
 786                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 787
 788                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 789                         /* Force memory writes to complete before letting h/w
 790                          * know there are new descriptors to fetch.  (Only
 791                          * applicable for weak-ordered memory model archs,
 792                          * such as IA-64).
 793                          */
 794                         wmb();
 795                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 796                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 797                         else
 798                                 writel(i << 1, rx_ring->tail);
 799                 }
 800
 801                 i++;
 802                 if (i == rx_ring->count)
 803                         i = 0;
 804                 buffer_info = &rx_ring->buffer_info[i];
 805         }
 806
 807 no_buffers:
 808         rx_ring->next_to_use = i;
 809 }
 810
 811 /**
 812  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 813  * @rx_ring: Rx descriptor ring
 814  * @cleaned_count: number of buffers to allocate this pass
 815  * @gfp: flags for allocation
 816  **/
 817
 818 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 819                                          int cleaned_count, gfp_t gfp)
 820 {
 821         struct e1000_adapter *adapter = rx_ring->adapter;
 822         struct net_device *netdev = adapter->netdev;
 823         struct pci_dev *pdev = adapter->pdev;
 824         union e1000_rx_desc_extended *rx_desc;
 825         struct e1000_buffer *buffer_info;
 826         struct sk_buff *skb;
 827         unsigned int i;
 828         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 829
 830         i = rx_ring->next_to_use;
 831         buffer_info = &rx_ring->buffer_info[i];
 832
 833         while (cleaned_count--) {
 834                 skb = buffer_info->skb;
 835                 if (skb) {
 836                         skb_trim(skb, 0);
 837                         goto check_page;
 838                 }
 839
 840                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 841                 if (unlikely(!skb)) {
 842                         /* Better luck next round */
 843                         adapter->alloc_rx_buff_failed++;
 844                         break;
 845                 }
 846
 847                 buffer_info->skb = skb;
 848 check_page:
 849                 /* allocate a new page if necessary */
 850                 if (!buffer_info->page) {
 851                         buffer_info->page = alloc_page(gfp);
 852                         if (unlikely(!buffer_info->page)) {
 853                                 adapter->alloc_rx_buff_failed++;
 854                                 break;
 855                         }
 856                 }
 857
 858                 if (!buffer_info->dma) {
 859                         buffer_info->dma = dma_map_page(&pdev->dev,
 860                                                         buffer_info->page, 0,
 861                                                         PAGE_SIZE,
 862                                                         DMA_FROM_DEVICE);
 863                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 864                                 adapter->alloc_rx_buff_failed++;
 865                                 break;
 866                         }
 867                 }
 868
 869                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 870                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 871
 872                 if (unlikely(++i == rx_ring->count))
 873                         i = 0;
 874                 buffer_info = &rx_ring->buffer_info[i];
 875         }
 876
 877         if (likely(rx_ring->next_to_use != i)) {
 878                 rx_ring->next_to_use = i;
 879                 if (unlikely(i-- == 0))
 880                         i = (rx_ring->count - 1);
 881
 882                 /* Force memory writes to complete before letting h/w
 883                  * know there are new descriptors to fetch.  (Only
 884                  * applicable for weak-ordered memory model archs,
 885                  * such as IA-64).
 886                  */
 887                 wmb();
 888                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 889                         e1000e_update_rdt_wa(rx_ring, i);
 890                 else
 891                         writel(i, rx_ring->tail);
 892         }
 893 }
 894
 895 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 896                                  struct sk_buff *skb)
 897 {
 898         if (netdev->features & NETIF_F_RXHASH)
 899                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 900 }
 901
 902 /**
 903  * e1000_clean_rx_irq - Send received data up the network stack
 904  * @rx_ring: Rx descriptor ring
 905  * @work_done: output parameter for indicating completed work
 906  * @work_to_do: how many packets we can clean
 907  *
 908  * the return value indicates whether actual cleaning was done, there
 909  * is no guarantee that everything was cleaned
 910  **/
 911 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 912                                int work_to_do)
 913 {
 914         struct e1000_adapter *adapter = rx_ring->adapter;
 915         struct net_device *netdev = adapter->netdev;
 916         struct pci_dev *pdev = adapter->pdev;
 917         struct e1000_hw *hw = &adapter->hw;
 918         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 919         struct e1000_buffer *buffer_info, *next_buffer;
 920         u32 length, staterr;
 921         unsigned int i;
 922         int cleaned_count = 0;
 923         bool cleaned = false;
 924         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 925
 926         i = rx_ring->next_to_clean;
 927         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 928         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 929         buffer_info = &rx_ring->buffer_info[i];
 930
 931         while (staterr & E1000_RXD_STAT_DD) {
 932                 struct sk_buff *skb;
 933
 934                 if (*work_done >= work_to_do)
 935                         break;
 936                 (*work_done)++;
 937                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 938
 939                 skb = buffer_info->skb;
 940                 buffer_info->skb = NULL;
 941
 942                 prefetch(skb->data - NET_IP_ALIGN);
 943
 944                 i++;
 945                 if (i == rx_ring->count)
 946                         i = 0;
 947                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 948                 prefetch(next_rxd);
 949
 950                 next_buffer = &rx_ring->buffer_info[i];
 951
 952                 cleaned = true;
 953                 cleaned_count++;
 954                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 955                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 956                 buffer_info->dma = 0;
 957
 958                 length = le16_to_cpu(rx_desc->wb.upper.length);
 959
 960                 /* !EOP means multiple descriptors were used to store a single
 961                  * packet, if that's the case we need to toss it.  In fact, we
 962                  * need to toss every packet with the EOP bit clear and the
 963                  * next frame that _does_ have the EOP bit set, as it is by
 964                  * definition only a frame fragment
 965                  */
 966                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
 967                         adapter->flags2 |= FLAG2_IS_DISCARDING;
 968
 969                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 970                         /* All receives must fit into a single buffer */
 971                         e_dbg("Receive packet consumed multiple buffers\n");
 972                         /* recycle */
 973                         buffer_info->skb = skb;
 974                         if (staterr & E1000_RXD_STAT_EOP)
 975                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 976                         goto next_desc;
 977                 }
 978
 979                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
 980                              !(netdev->features & NETIF_F_RXALL))) {
 981                         /* recycle */
 982                         buffer_info->skb = skb;
 983                         goto next_desc;
 984                 }
 985
 986                 /* adjust length to remove Ethernet CRC */
 987                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
 988                         /* If configured to store CRC, don't subtract FCS,
 989                          * but keep the FCS bytes out of the total_rx_bytes
 990                          * counter
 991                          */
 992                         if (netdev->features & NETIF_F_RXFCS)
 993                                 total_rx_bytes -= 4;
 994                         else
 995                                 length -= 4;
 996                 }
 997
 998                 total_rx_bytes += length;
 999                 total_rx_packets++;
1000
1001                 /* code added for copybreak, this should improve
1002                  * performance for small packets with large amounts
1003                  * of reassembly being done in the stack
1004                  */
1005                 if (length < copybreak) {
1006                         struct sk_buff *new_skb =
1007                                 napi_alloc_skb(&adapter->napi, length);
1008                         if (new_skb) {
1009                                 skb_copy_to_linear_data_offset(new_skb,
1010                                                                -NET_IP_ALIGN,
1011                                                                (skb->data -
1012                                                                 NET_IP_ALIGN),
1013                                                                (length +
1014                                                                 NET_IP_ALIGN));
1015                                 /* save the skb in buffer_info as good */
1016                                 buffer_info->skb = skb;
1017                                 skb = new_skb;
1018                         }
1019                         /* else just continue with the old one */
1020                 }
1021                 /* end copybreak code */
1022                 skb_put(skb, length);
1023
1024                 /* Receive Checksum Offload */
1025                 e1000_rx_checksum(adapter, staterr, skb);
1026
1027                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1028
1029                 e1000_receive_skb(adapter, netdev, skb, staterr,
1030                                   rx_desc->wb.upper.vlan);
1031
1032 next_desc:
1033                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1034
1035                 /* return some buffers to hardware, one at a time is too slow */
1036                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1037                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1038                                               GFP_ATOMIC);
1039                         cleaned_count = 0;
1040                 }
1041
1042                 /* use prefetched values */
1043                 rx_desc = next_rxd;
1044                 buffer_info = next_buffer;
1045
1046                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1047         }
1048         rx_ring->next_to_clean = i;
1049
1050         cleaned_count = e1000_desc_unused(rx_ring);
1051         if (cleaned_count)
1052                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1053
1054         adapter->total_rx_bytes += total_rx_bytes;
1055         adapter->total_rx_packets += total_rx_packets;
1056         return cleaned;
1057 }
1058
1059 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1060                             struct e1000_buffer *buffer_info,
1061                             bool drop)
1062 {
1063         struct e1000_adapter *adapter = tx_ring->adapter;
1064
1065         if (buffer_info->dma) {
1066                 if (buffer_info->mapped_as_page)
1067                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1068                                        buffer_info->length, DMA_TO_DEVICE);
1069                 else
1070                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1071                                          buffer_info->length, DMA_TO_DEVICE);
1072                 buffer_info->dma = 0;
1073         }
1074         if (buffer_info->skb) {
1075                 if (drop)
1076                         dev_kfree_skb_any(buffer_info->skb);
1077                 else
1078                         dev_consume_skb_any(buffer_info->skb);
1079                 buffer_info->skb = NULL;
1080         }
1081         buffer_info->time_stamp = 0;
1082 }
1083
1084 static void e1000_print_hw_hang(struct work_struct *work)
1085 {
1086         struct e1000_adapter *adapter = container_of(work,
1087                                                      struct e1000_adapter,
1088                                                      print_hang_task);
1089         struct net_device *netdev = adapter->netdev;
1090         struct e1000_ring *tx_ring = adapter->tx_ring;
1091         unsigned int i = tx_ring->next_to_clean;
1092         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1093         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1094         struct e1000_hw *hw = &adapter->hw;
1095         u16 phy_status, phy_1000t_status, phy_ext_status;
1096         u16 pci_status;
1097
1098         if (test_bit(__E1000_DOWN, &adapter->state))
1099                 return;
1100
1101         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1102                 /* May be block on write-back, flush and detect again
1103                  * flush pending descriptor writebacks to memory
1104                  */
1105                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1106                 /* execute the writes immediately */
1107                 e1e_flush();
1108                 /* Due to rare timing issues, write to TIDV again to ensure
1109                  * the write is successful
1110                  */
1111                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1112                 /* execute the writes immediately */
1113                 e1e_flush();
1114                 adapter->tx_hang_recheck = true;
1115                 return;
1116         }
1117         adapter->tx_hang_recheck = false;
1118
1119         if (er32(TDH(0)) == er32(TDT(0))) {
1120                 e_dbg("false hang detected, ignoring\n");
1121                 return;
1122         }
1123
1124         /* Real hang detected */
1125         netif_stop_queue(netdev);
1126
1127         e1e_rphy(hw, MII_BMSR, &phy_status);
1128         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1129         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1130
1131         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1132
1133         /* detected Hardware unit hang */
1134         e_err("Detected Hardware Unit Hang:\n"
1135               "  TDH                  <%x>\n"
1136               "  TDT                  <%x>\n"
1137               "  next_to_use          <%x>\n"
1138               "  next_to_clean        <%x>\n"
1139               "buffer_info[next_to_clean]:\n"
1140               "  time_stamp           <%lx>\n"
1141               "  next_to_watch        <%x>\n"
1142               "  jiffies              <%lx>\n"
1143               "  next_to_watch.status <%x>\n"
1144               "MAC Status             <%x>\n"
1145               "PHY Status             <%x>\n"
1146               "PHY 1000BASE-T Status  <%x>\n"
1147               "PHY Extended Status    <%x>\n"
1148               "PCI Status             <%x>\n",
1149               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1150               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1151               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1152               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1153
1154         e1000e_dump(adapter);
1155
1156         /* Suggest workaround for known h/w issue */
1157         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1158                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1159 }
1160
1161 /**
1162  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1163  * @work: pointer to work struct
1164  *
1165  * This work function polls the TSYNCTXCTL valid bit to determine when a
1166  * timestamp has been taken for the current stored skb.  The timestamp must
1167  * be for this skb because only one such packet is allowed in the queue.
1168  */
1169 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1170 {
1171         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1172                                                      tx_hwtstamp_work);
1173         struct e1000_hw *hw = &adapter->hw;
1174
1175         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1176                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1177                 struct skb_shared_hwtstamps shhwtstamps;
1178                 u64 txstmp;
1179
1180                 txstmp = er32(TXSTMPL);
1181                 txstmp |= (u64)er32(TXSTMPH) << 32;
1182
1183                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1184
1185                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1186                  * prior to notifying the stack of a Tx timestamp.
1187                  */
1188                 adapter->tx_hwtstamp_skb = NULL;
1189                 wmb(); /* force write prior to skb_tstamp_tx */
1190
1191                 skb_tstamp_tx(skb, &shhwtstamps);
1192                 dev_consume_skb_any(skb);
1193         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1194                               + adapter->tx_timeout_factor * HZ)) {
1195                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1196                 adapter->tx_hwtstamp_skb = NULL;
1197                 adapter->tx_hwtstamp_timeouts++;
1198                 e_warn("clearing Tx timestamp hang\n");
1199         } else {
1200                 /* reschedule to check later */
1201                 schedule_work(&adapter->tx_hwtstamp_work);
1202         }
1203 }
1204
1205 /**
1206  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1207  * @tx_ring: Tx descriptor ring
1208  *
1209  * the return value indicates whether actual cleaning was done, there
1210  * is no guarantee that everything was cleaned
1211  **/
1212 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1213 {
1214         struct e1000_adapter *adapter = tx_ring->adapter;
1215         struct net_device *netdev = adapter->netdev;
1216         struct e1000_hw *hw = &adapter->hw;
1217         struct e1000_tx_desc *tx_desc, *eop_desc;
1218         struct e1000_buffer *buffer_info;
1219         unsigned int i, eop;
1220         unsigned int count = 0;
1221         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1222         unsigned int bytes_compl = 0, pkts_compl = 0;
1223
1224         i = tx_ring->next_to_clean;
1225         eop = tx_ring->buffer_info[i].next_to_watch;
1226         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1227
1228         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1229                (count < tx_ring->count)) {
1230                 bool cleaned = false;
1231
1232                 dma_rmb();              /* read buffer_info after eop_desc */
1233                 for (; !cleaned; count++) {
1234                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1235                         buffer_info = &tx_ring->buffer_info[i];
1236                         cleaned = (i == eop);
1237
1238                         if (cleaned) {
1239                                 total_tx_packets += buffer_info->segs;
1240                                 total_tx_bytes += buffer_info->bytecount;
1241                                 if (buffer_info->skb) {
1242                                         bytes_compl += buffer_info->skb->len;
1243                                         pkts_compl++;
1244                                 }
1245                         }
1246
1247                         e1000_put_txbuf(tx_ring, buffer_info, false);
1248                         tx_desc->upper.data = 0;
1249
1250                         i++;
1251                         if (i == tx_ring->count)
1252                                 i = 0;
1253                 }
1254
1255                 if (i == tx_ring->next_to_use)
1256                         break;
1257                 eop = tx_ring->buffer_info[i].next_to_watch;
1258                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1259         }
1260
1261         tx_ring->next_to_clean = i;
1262
1263         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1264
1265 #define TX_WAKE_THRESHOLD 32
1266         if (count && netif_carrier_ok(netdev) &&
1267             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1268                 /* Make sure that anybody stopping the queue after this
1269                  * sees the new next_to_clean.
1270                  */
1271                 smp_mb();
1272
1273                 if (netif_queue_stopped(netdev) &&
1274                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1275                         netif_wake_queue(netdev);
1276                         ++adapter->restart_queue;
1277                 }
1278         }
1279
1280         if (adapter->detect_tx_hung) {
1281                 /* Detect a transmit hang in hardware, this serializes the
1282                  * check with the clearing of time_stamp and movement of i
1283                  */
1284                 adapter->detect_tx_hung = false;
1285                 if (tx_ring->buffer_info[i].time_stamp &&
1286                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1287                                + (adapter->tx_timeout_factor * HZ)) &&
1288                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1289                         schedule_work(&adapter->print_hang_task);
1290                 else
1291                         adapter->tx_hang_recheck = false;
1292         }
1293         adapter->total_tx_bytes += total_tx_bytes;
1294         adapter->total_tx_packets += total_tx_packets;
1295         return count < tx_ring->count;
1296 }
1297
1298 /**
1299  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1300  * @rx_ring: Rx descriptor ring
1301  * @work_done: output parameter for indicating completed work
1302  * @work_to_do: how many packets we can clean
1303  *
1304  * the return value indicates whether actual cleaning was done, there
1305  * is no guarantee that everything was cleaned
1306  **/
1307 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1308                                   int work_to_do)
1309 {
1310         struct e1000_adapter *adapter = rx_ring->adapter;
1311         struct e1000_hw *hw = &adapter->hw;
1312         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1313         struct net_device *netdev = adapter->netdev;
1314         struct pci_dev *pdev = adapter->pdev;
1315         struct e1000_buffer *buffer_info, *next_buffer;
1316         struct e1000_ps_page *ps_page;
1317         struct sk_buff *skb;
1318         unsigned int i, j;
1319         u32 length, staterr;
1320         int cleaned_count = 0;
1321         bool cleaned = false;
1322         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1323
1324         i = rx_ring->next_to_clean;
1325         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1326         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1327         buffer_info = &rx_ring->buffer_info[i];
1328
1329         while (staterr & E1000_RXD_STAT_DD) {
1330                 if (*work_done >= work_to_do)
1331                         break;
1332                 (*work_done)++;
1333                 skb = buffer_info->skb;
1334                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1335
1336                 /* in the packet split case this is header only */
1337                 prefetch(skb->data - NET_IP_ALIGN);
1338
1339                 i++;
1340                 if (i == rx_ring->count)
1341                         i = 0;
1342                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1343                 prefetch(next_rxd);
1344
1345                 next_buffer = &rx_ring->buffer_info[i];
1346
1347                 cleaned = true;
1348                 cleaned_count++;
1349                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1350                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1351                 buffer_info->dma = 0;
1352
1353                 /* see !EOP comment in other Rx routine */
1354                 if (!(staterr & E1000_RXD_STAT_EOP))
1355                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1356
1357                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1358                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1359                         dev_kfree_skb_irq(skb);
1360                         if (staterr & E1000_RXD_STAT_EOP)
1361                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1362                         goto next_desc;
1363                 }
1364
1365                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1366                              !(netdev->features & NETIF_F_RXALL))) {
1367                         dev_kfree_skb_irq(skb);
1368                         goto next_desc;
1369                 }
1370
1371                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1372
1373                 if (!length) {
1374                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1375                         dev_kfree_skb_irq(skb);
1376                         goto next_desc;
1377                 }
1378
1379                 /* Good Receive */
1380                 skb_put(skb, length);
1381
1382                 {
1383                         /* this looks ugly, but it seems compiler issues make
1384                          * it more efficient than reusing j
1385                          */
1386                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1387
1388                         /* page alloc/put takes too long and effects small
1389                          * packet throughput, so unsplit small packets and
1390                          * save the alloc/put only valid in softirq (napi)
1391                          * context to call kmap_*
1392                          */
1393                         if (l1 && (l1 <= copybreak) &&
1394                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1395                                 u8 *vaddr;
1396
1397                                 ps_page = &buffer_info->ps_pages[0];
1398
1399                                 /* there is no documentation about how to call
1400                                  * kmap_atomic, so we can't hold the mapping
1401                                  * very long
1402                                  */
1403                                 dma_sync_single_for_cpu(&pdev->dev,
1404                                                         ps_page->dma,
1405                                                         PAGE_SIZE,
1406                                                         DMA_FROM_DEVICE);
1407                                 vaddr = kmap_atomic(ps_page->page);
1408                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1409                                 kunmap_atomic(vaddr);
1410                                 dma_sync_single_for_device(&pdev->dev,
1411                                                            ps_page->dma,
1412                                                            PAGE_SIZE,
1413                                                            DMA_FROM_DEVICE);
1414
1415                                 /* remove the CRC */
1416                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1417                                         if (!(netdev->features & NETIF_F_RXFCS))
1418                                                 l1 -= 4;
1419                                 }
1420
1421                                 skb_put(skb, l1);
1422                                 goto copydone;
1423                         }       /* if */
1424                 }
1425
1426                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1427                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1428                         if (!length)
1429                                 break;
1430
1431                         ps_page = &buffer_info->ps_pages[j];
1432                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1433                                        DMA_FROM_DEVICE);
1434                         ps_page->dma = 0;
1435                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1436                         ps_page->page = NULL;
1437                         skb->len += length;
1438                         skb->data_len += length;
1439                         skb->truesize += PAGE_SIZE;
1440                 }
1441
1442                 /* strip the ethernet crc, problem is we're using pages now so
1443                  * this whole operation can get a little cpu intensive
1444                  */
1445                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1446                         if (!(netdev->features & NETIF_F_RXFCS))
1447                                 pskb_trim(skb, skb->len - 4);
1448                 }
1449
1450 copydone:
1451                 total_rx_bytes += skb->len;
1452                 total_rx_packets++;
1453
1454                 e1000_rx_checksum(adapter, staterr, skb);
1455
1456                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1457
1458                 if (rx_desc->wb.upper.header_status &
1459                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1460                         adapter->rx_hdr_split++;
1461
1462                 e1000_receive_skb(adapter, netdev, skb, staterr,
1463                                   rx_desc->wb.middle.vlan);
1464
1465 next_desc:
1466                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1467                 buffer_info->skb = NULL;
1468
1469                 /* return some buffers to hardware, one at a time is too slow */
1470                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1471                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1472                                               GFP_ATOMIC);
1473                         cleaned_count = 0;
1474                 }
1475
1476                 /* use prefetched values */
1477                 rx_desc = next_rxd;
1478                 buffer_info = next_buffer;
1479
1480                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1481         }
1482         rx_ring->next_to_clean = i;
1483
1484         cleaned_count = e1000_desc_unused(rx_ring);
1485         if (cleaned_count)
1486                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1487
1488         adapter->total_rx_bytes += total_rx_bytes;
1489         adapter->total_rx_packets += total_rx_packets;
1490         return cleaned;
1491 }
1492
1493 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1494                                u16 length)
1495 {
1496         bi->page = NULL;
1497         skb->len += length;
1498         skb->data_len += length;
1499         skb->truesize += PAGE_SIZE;
1500 }
1501
1502 /**
1503  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1504  * @rx_ring: Rx descriptor ring
1505  * @work_done: output parameter for indicating completed work
1506  * @work_to_do: how many packets we can clean
1507  *
1508  * the return value indicates whether actual cleaning was done, there
1509  * is no guarantee that everything was cleaned
1510  **/
1511 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1512                                      int work_to_do)
1513 {
1514         struct e1000_adapter *adapter = rx_ring->adapter;
1515         struct net_device *netdev = adapter->netdev;
1516         struct pci_dev *pdev = adapter->pdev;
1517         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1518         struct e1000_buffer *buffer_info, *next_buffer;
1519         u32 length, staterr;
1520         unsigned int i;
1521         int cleaned_count = 0;
1522         bool cleaned = false;
1523         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1524         struct skb_shared_info *shinfo;
1525
1526         i = rx_ring->next_to_clean;
1527         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1528         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1529         buffer_info = &rx_ring->buffer_info[i];
1530
1531         while (staterr & E1000_RXD_STAT_DD) {
1532                 struct sk_buff *skb;
1533
1534                 if (*work_done >= work_to_do)
1535                         break;
1536                 (*work_done)++;
1537                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1538
1539                 skb = buffer_info->skb;
1540                 buffer_info->skb = NULL;
1541
1542                 ++i;
1543                 if (i == rx_ring->count)
1544                         i = 0;
1545                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1546                 prefetch(next_rxd);
1547
1548                 next_buffer = &rx_ring->buffer_info[i];
1549
1550                 cleaned = true;
1551                 cleaned_count++;
1552                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1553                                DMA_FROM_DEVICE);
1554                 buffer_info->dma = 0;
1555
1556                 length = le16_to_cpu(rx_desc->wb.upper.length);
1557
1558                 /* errors is only valid for DD + EOP descriptors */
1559                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1560                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1561                               !(netdev->features & NETIF_F_RXALL)))) {
1562                         /* recycle both page and skb */
1563                         buffer_info->skb = skb;
1564                         /* an error means any chain goes out the window too */
1565                         if (rx_ring->rx_skb_top)
1566                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1567                         rx_ring->rx_skb_top = NULL;
1568                         goto next_desc;
1569                 }
1570 #define rxtop (rx_ring->rx_skb_top)
1571                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1572                         /* this descriptor is only the beginning (or middle) */
1573                         if (!rxtop) {
1574                                 /* this is the beginning of a chain */
1575                                 rxtop = skb;
1576                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1577                                                    0, length);
1578                         } else {
1579                                 /* this is the middle of a chain */
1580                                 shinfo = skb_shinfo(rxtop);
1581                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1582                                                    buffer_info->page, 0,
1583                                                    length);
1584                                 /* re-use the skb, only consumed the page */
1585                                 buffer_info->skb = skb;
1586                         }
1587                         e1000_consume_page(buffer_info, rxtop, length);
1588                         goto next_desc;
1589                 } else {
1590                         if (rxtop) {
1591                                 /* end of the chain */
1592                                 shinfo = skb_shinfo(rxtop);
1593                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1594                                                    buffer_info->page, 0,
1595                                                    length);
1596                                 /* re-use the current skb, we only consumed the
1597                                  * page
1598                                  */
1599                                 buffer_info->skb = skb;
1600                                 skb = rxtop;
1601                                 rxtop = NULL;
1602                                 e1000_consume_page(buffer_info, skb, length);
1603                         } else {
1604                                 /* no chain, got EOP, this buf is the packet
1605                                  * copybreak to save the put_page/alloc_page
1606                                  */
1607                                 if (length <= copybreak &&
1608                                     skb_tailroom(skb) >= length) {
1609                                         u8 *vaddr;
1610                                         vaddr = kmap_atomic(buffer_info->page);
1611                                         memcpy(skb_tail_pointer(skb), vaddr,
1612                                                length);
1613                                         kunmap_atomic(vaddr);
1614                                         /* re-use the page, so don't erase
1615                                          * buffer_info->page
1616                                          */
1617                                         skb_put(skb, length);
1618                                 } else {
1619                                         skb_fill_page_desc(skb, 0,
1620                                                            buffer_info->page, 0,
1621                                                            length);
1622                                         e1000_consume_page(buffer_info, skb,
1623                                                            length);
1624                                 }
1625                         }
1626                 }
1627
1628                 /* Receive Checksum Offload */
1629                 e1000_rx_checksum(adapter, staterr, skb);
1630
1631                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1632
1633                 /* probably a little skewed due to removing CRC */
1634                 total_rx_bytes += skb->len;
1635                 total_rx_packets++;
1636
1637                 /* eth type trans needs skb->data to point to something */
1638                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1639                         e_err("pskb_may_pull failed.\n");
1640                         dev_kfree_skb_irq(skb);
1641                         goto next_desc;
1642                 }
1643
1644                 e1000_receive_skb(adapter, netdev, skb, staterr,
1645                                   rx_desc->wb.upper.vlan);
1646
1647 next_desc:
1648                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1649
1650                 /* return some buffers to hardware, one at a time is too slow */
1651                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1652                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1653                                               GFP_ATOMIC);
1654                         cleaned_count = 0;
1655                 }
1656
1657                 /* use prefetched values */
1658                 rx_desc = next_rxd;
1659                 buffer_info = next_buffer;
1660
1661                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1662         }
1663         rx_ring->next_to_clean = i;
1664
1665         cleaned_count = e1000_desc_unused(rx_ring);
1666         if (cleaned_count)
1667                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1668
1669         adapter->total_rx_bytes += total_rx_bytes;
1670         adapter->total_rx_packets += total_rx_packets;
1671         return cleaned;
1672 }
1673
1674 /**
1675  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1676  * @rx_ring: Rx descriptor ring
1677  **/
1678 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1679 {
1680         struct e1000_adapter *adapter = rx_ring->adapter;
1681         struct e1000_buffer *buffer_info;
1682         struct e1000_ps_page *ps_page;
1683         struct pci_dev *pdev = adapter->pdev;
1684         unsigned int i, j;
1685
1686         /* Free all the Rx ring sk_buffs */
1687         for (i = 0; i < rx_ring->count; i++) {
1688                 buffer_info = &rx_ring->buffer_info[i];
1689                 if (buffer_info->dma) {
1690                         if (adapter->clean_rx == e1000_clean_rx_irq)
1691                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1692                                                  adapter->rx_buffer_len,
1693                                                  DMA_FROM_DEVICE);
1694                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1695                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1696                                                PAGE_SIZE, DMA_FROM_DEVICE);
1697                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1698                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1699                                                  adapter->rx_ps_bsize0,
1700                                                  DMA_FROM_DEVICE);
1701                         buffer_info->dma = 0;
1702                 }
1703
1704                 if (buffer_info->page) {
1705                         put_page(buffer_info->page);
1706                         buffer_info->page = NULL;
1707                 }
1708
1709                 if (buffer_info->skb) {
1710                         dev_kfree_skb(buffer_info->skb);
1711                         buffer_info->skb = NULL;
1712                 }
1713
1714                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1715                         ps_page = &buffer_info->ps_pages[j];
1716                         if (!ps_page->page)
1717                                 break;
1718                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1719                                        DMA_FROM_DEVICE);
1720                         ps_page->dma = 0;
1721                         put_page(ps_page->page);
1722                         ps_page->page = NULL;
1723                 }
1724         }
1725
1726         /* there also may be some cached data from a chained receive */
1727         if (rx_ring->rx_skb_top) {
1728                 dev_kfree_skb(rx_ring->rx_skb_top);
1729                 rx_ring->rx_skb_top = NULL;
1730         }
1731
1732         /* Zero out the descriptor ring */
1733         memset(rx_ring->desc, 0, rx_ring->size);
1734
1735         rx_ring->next_to_clean = 0;
1736         rx_ring->next_to_use = 0;
1737         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1738 }
1739
1740 static void e1000e_downshift_workaround(struct work_struct *work)
1741 {
1742         struct e1000_adapter *adapter = container_of(work,
1743                                                      struct e1000_adapter,
1744                                                      downshift_task);
1745
1746         if (test_bit(__E1000_DOWN, &adapter->state))
1747                 return;
1748
1749         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1750 }
1751
1752 /**
1753  * e1000_intr_msi - Interrupt Handler
1754  * @irq: interrupt number
1755  * @data: pointer to a network interface device structure
1756  **/
1757 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1758 {
1759         struct net_device *netdev = data;
1760         struct e1000_adapter *adapter = netdev_priv(netdev);
1761         struct e1000_hw *hw = &adapter->hw;
1762         u32 icr = er32(ICR);
1763
1764         /* read ICR disables interrupts using IAM */
1765         if (icr & E1000_ICR_LSC) {
1766                 hw->mac.get_link_status = true;
1767                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1768                  * disconnect (LSC) before accessing any PHY registers
1769                  */
1770                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1771                     (!(er32(STATUS) & E1000_STATUS_LU)))
1772                         schedule_work(&adapter->downshift_task);
1773
1774                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1775                  * link down event; disable receives here in the ISR and reset
1776                  * adapter in watchdog
1777                  */
1778                 if (netif_carrier_ok(netdev) &&
1779                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1780                         /* disable receives */
1781                         u32 rctl = er32(RCTL);
1782
1783                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1784                         adapter->flags |= FLAG_RESTART_NOW;
1785                 }
1786                 /* guard against interrupt when we're going down */
1787                 if (!test_bit(__E1000_DOWN, &adapter->state))
1788                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1789         }
1790
1791         /* Reset on uncorrectable ECC error */
1792         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1793                 u32 pbeccsts = er32(PBECCSTS);
1794
1795                 adapter->corr_errors +=
1796                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1797                 adapter->uncorr_errors +=
1798                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1799                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1800
1801                 /* Do the reset outside of interrupt context */
1802                 schedule_work(&adapter->reset_task);
1803
1804                 /* return immediately since reset is imminent */
1805                 return IRQ_HANDLED;
1806         }
1807
1808         if (napi_schedule_prep(&adapter->napi)) {
1809                 adapter->total_tx_bytes = 0;
1810                 adapter->total_tx_packets = 0;
1811                 adapter->total_rx_bytes = 0;
1812                 adapter->total_rx_packets = 0;
1813                 __napi_schedule(&adapter->napi);
1814         }
1815
1816         return IRQ_HANDLED;
1817 }
1818
1819 /**
1820  * e1000_intr - Interrupt Handler
1821  * @irq: interrupt number
1822  * @data: pointer to a network interface device structure
1823  **/
1824 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1825 {
1826         struct net_device *netdev = data;
1827         struct e1000_adapter *adapter = netdev_priv(netdev);
1828         struct e1000_hw *hw = &adapter->hw;
1829         u32 rctl, icr = er32(ICR);
1830
1831         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1832                 return IRQ_NONE;        /* Not our interrupt */
1833
1834         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1835          * not set, then the adapter didn't send an interrupt
1836          */
1837         if (!(icr & E1000_ICR_INT_ASSERTED))
1838                 return IRQ_NONE;
1839
1840         /* Interrupt Auto-Mask...upon reading ICR,
1841          * interrupts are masked.  No need for the
1842          * IMC write
1843          */
1844
1845         if (icr & E1000_ICR_LSC) {
1846                 hw->mac.get_link_status = true;
1847                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1848                  * disconnect (LSC) before accessing any PHY registers
1849                  */
1850                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1851                     (!(er32(STATUS) & E1000_STATUS_LU)))
1852                         schedule_work(&adapter->downshift_task);
1853
1854                 /* 80003ES2LAN workaround--
1855                  * For packet buffer work-around on link down event;
1856                  * disable receives here in the ISR and
1857                  * reset adapter in watchdog
1858                  */
1859                 if (netif_carrier_ok(netdev) &&
1860                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1861                         /* disable receives */
1862                         rctl = er32(RCTL);
1863                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1864                         adapter->flags |= FLAG_RESTART_NOW;
1865                 }
1866                 /* guard against interrupt when we're going down */
1867                 if (!test_bit(__E1000_DOWN, &adapter->state))
1868                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1869         }
1870
1871         /* Reset on uncorrectable ECC error */
1872         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1873                 u32 pbeccsts = er32(PBECCSTS);
1874
1875                 adapter->corr_errors +=
1876                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1877                 adapter->uncorr_errors +=
1878                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1879                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1880
1881                 /* Do the reset outside of interrupt context */
1882                 schedule_work(&adapter->reset_task);
1883
1884                 /* return immediately since reset is imminent */
1885                 return IRQ_HANDLED;
1886         }
1887
1888         if (napi_schedule_prep(&adapter->napi)) {
1889                 adapter->total_tx_bytes = 0;
1890                 adapter->total_tx_packets = 0;
1891                 adapter->total_rx_bytes = 0;
1892                 adapter->total_rx_packets = 0;
1893                 __napi_schedule(&adapter->napi);
1894         }
1895
1896         return IRQ_HANDLED;
1897 }
1898
1899 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1900 {
1901         struct net_device *netdev = data;
1902         struct e1000_adapter *adapter = netdev_priv(netdev);
1903         struct e1000_hw *hw = &adapter->hw;
1904         u32 icr = er32(ICR);
1905
1906         if (icr & adapter->eiac_mask)
1907                 ew32(ICS, (icr & adapter->eiac_mask));
1908
1909         if (icr & E1000_ICR_LSC) {
1910                 hw->mac.get_link_status = true;
1911                 /* guard against interrupt when we're going down */
1912                 if (!test_bit(__E1000_DOWN, &adapter->state))
1913                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1914         }
1915
1916         if (!test_bit(__E1000_DOWN, &adapter->state))
1917                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1918
1919         return IRQ_HANDLED;
1920 }
1921
1922 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1923 {
1924         struct net_device *netdev = data;
1925         struct e1000_adapter *adapter = netdev_priv(netdev);
1926         struct e1000_hw *hw = &adapter->hw;
1927         struct e1000_ring *tx_ring = adapter->tx_ring;
1928
1929         adapter->total_tx_bytes = 0;
1930         adapter->total_tx_packets = 0;
1931
1932         if (!e1000_clean_tx_irq(tx_ring))
1933                 /* Ring was not completely cleaned, so fire another interrupt */
1934                 ew32(ICS, tx_ring->ims_val);
1935
1936         if (!test_bit(__E1000_DOWN, &adapter->state))
1937                 ew32(IMS, adapter->tx_ring->ims_val);
1938
1939         return IRQ_HANDLED;
1940 }
1941
1942 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1943 {
1944         struct net_device *netdev = data;
1945         struct e1000_adapter *adapter = netdev_priv(netdev);
1946         struct e1000_ring *rx_ring = adapter->rx_ring;
1947
1948         /* Write the ITR value calculated at the end of the
1949          * previous interrupt.
1950          */
1951         if (rx_ring->set_itr) {
1952                 u32 itr = rx_ring->itr_val ?
1953                           1000000000 / (rx_ring->itr_val * 256) : 0;
1954
1955                 writel(itr, rx_ring->itr_register);
1956                 rx_ring->set_itr = 0;
1957         }
1958
1959         if (napi_schedule_prep(&adapter->napi)) {
1960                 adapter->total_rx_bytes = 0;
1961                 adapter->total_rx_packets = 0;
1962                 __napi_schedule(&adapter->napi);
1963         }
1964         return IRQ_HANDLED;
1965 }
1966
1967 /**
1968  * e1000_configure_msix - Configure MSI-X hardware
1969  * @adapter: board private structure
1970  *
1971  * e1000_configure_msix sets up the hardware to properly
1972  * generate MSI-X interrupts.
1973  **/
1974 static void e1000_configure_msix(struct e1000_adapter *adapter)
1975 {
1976         struct e1000_hw *hw = &adapter->hw;
1977         struct e1000_ring *rx_ring = adapter->rx_ring;
1978         struct e1000_ring *tx_ring = adapter->tx_ring;
1979         int vector = 0;
1980         u32 ctrl_ext, ivar = 0;
1981
1982         adapter->eiac_mask = 0;
1983
1984         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1985         if (hw->mac.type == e1000_82574) {
1986                 u32 rfctl = er32(RFCTL);
1987
1988                 rfctl |= E1000_RFCTL_ACK_DIS;
1989                 ew32(RFCTL, rfctl);
1990         }
1991
1992         /* Configure Rx vector */
1993         rx_ring->ims_val = E1000_IMS_RXQ0;
1994         adapter->eiac_mask |= rx_ring->ims_val;
1995         if (rx_ring->itr_val)
1996                 writel(1000000000 / (rx_ring->itr_val * 256),
1997                        rx_ring->itr_register);
1998         else
1999                 writel(1, rx_ring->itr_register);
2000         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2001
2002         /* Configure Tx vector */
2003         tx_ring->ims_val = E1000_IMS_TXQ0;
2004         vector++;
2005         if (tx_ring->itr_val)
2006                 writel(1000000000 / (tx_ring->itr_val * 256),
2007                        tx_ring->itr_register);
2008         else
2009                 writel(1, tx_ring->itr_register);
2010         adapter->eiac_mask |= tx_ring->ims_val;
2011         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2012
2013         /* set vector for Other Causes, e.g. link changes */
2014         vector++;
2015         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2016         if (rx_ring->itr_val)
2017                 writel(1000000000 / (rx_ring->itr_val * 256),
2018                        hw->hw_addr + E1000_EITR_82574(vector));
2019         else
2020                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2021
2022         /* Cause Tx interrupts on every write back */
2023         ivar |= BIT(31);
2024
2025         ew32(IVAR, ivar);
2026
2027         /* enable MSI-X PBA support */
2028         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2029         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2030         ew32(CTRL_EXT, ctrl_ext);
2031         e1e_flush();
2032 }
2033
2034 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2035 {
2036         if (adapter->msix_entries) {
2037                 pci_disable_msix(adapter->pdev);
2038                 kfree(adapter->msix_entries);
2039                 adapter->msix_entries = NULL;
2040         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2041                 pci_disable_msi(adapter->pdev);
2042                 adapter->flags &= ~FLAG_MSI_ENABLED;
2043         }
2044 }
2045
2046 /**
2047  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2048  * @adapter: board private structure
2049  *
2050  * Attempt to configure interrupts using the best available
2051  * capabilities of the hardware and kernel.
2052  **/
2053 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2054 {
2055         int err;
2056         int i;
2057
2058         switch (adapter->int_mode) {
2059         case E1000E_INT_MODE_MSIX:
2060                 if (adapter->flags & FLAG_HAS_MSIX) {
2061                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2062                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2063                                                         sizeof(struct
2064                                                                msix_entry),
2065                                                         GFP_KERNEL);
2066                         if (adapter->msix_entries) {
2067                                 struct e1000_adapter *a = adapter;
2068
2069                                 for (i = 0; i < adapter->num_vectors; i++)
2070                                         adapter->msix_entries[i].entry = i;
2071
2072                                 err = pci_enable_msix_range(a->pdev,
2073                                                             a->msix_entries,
2074                                                             a->num_vectors,
2075                                                             a->num_vectors);
2076                                 if (err > 0)
2077                                         return;
2078                         }
2079                         /* MSI-X failed, so fall through and try MSI */
2080                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2081                         e1000e_reset_interrupt_capability(adapter);
2082                 }
2083                 adapter->int_mode = E1000E_INT_MODE_MSI;
2084                 fallthrough;
2085         case E1000E_INT_MODE_MSI:
2086                 if (!pci_enable_msi(adapter->pdev)) {
2087                         adapter->flags |= FLAG_MSI_ENABLED;
2088                 } else {
2089                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2090                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2091                 }
2092                 fallthrough;
2093         case E1000E_INT_MODE_LEGACY:
2094                 /* Don't do anything; this is the system default */
2095                 break;
2096         }
2097
2098         /* store the number of vectors being used */
2099         adapter->num_vectors = 1;
2100 }
2101
2102 /**
2103  * e1000_request_msix - Initialize MSI-X interrupts
2104  * @adapter: board private structure
2105  *
2106  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2107  * kernel.
2108  **/
2109 static int e1000_request_msix(struct e1000_adapter *adapter)
2110 {
2111         struct net_device *netdev = adapter->netdev;
2112         int err = 0, vector = 0;
2113
2114         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2115                 snprintf(adapter->rx_ring->name,
2116                          sizeof(adapter->rx_ring->name) - 1,
2117                          "%.14s-rx-0", netdev->name);
2118         else
2119                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2120         err = request_irq(adapter->msix_entries[vector].vector,
2121                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2122                           netdev);
2123         if (err)
2124                 return err;
2125         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2126             E1000_EITR_82574(vector);
2127         adapter->rx_ring->itr_val = adapter->itr;
2128         vector++;
2129
2130         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2131                 snprintf(adapter->tx_ring->name,
2132                          sizeof(adapter->tx_ring->name) - 1,
2133                          "%.14s-tx-0", netdev->name);
2134         else
2135                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2136         err = request_irq(adapter->msix_entries[vector].vector,
2137                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2138                           netdev);
2139         if (err)
2140                 return err;
2141         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2142             E1000_EITR_82574(vector);
2143         adapter->tx_ring->itr_val = adapter->itr;
2144         vector++;
2145
2146         err = request_irq(adapter->msix_entries[vector].vector,
2147                           e1000_msix_other, 0, netdev->name, netdev);
2148         if (err)
2149                 return err;
2150
2151         e1000_configure_msix(adapter);
2152
2153         return 0;
2154 }
2155
2156 /**
2157  * e1000_request_irq - initialize interrupts
2158  * @adapter: board private structure
2159  *
2160  * Attempts to configure interrupts using the best available
2161  * capabilities of the hardware and kernel.
2162  **/
2163 static int e1000_request_irq(struct e1000_adapter *adapter)
2164 {
2165         struct net_device *netdev = adapter->netdev;
2166         int err;
2167
2168         if (adapter->msix_entries) {
2169                 err = e1000_request_msix(adapter);
2170                 if (!err)
2171                         return err;
2172                 /* fall back to MSI */
2173                 e1000e_reset_interrupt_capability(adapter);
2174                 adapter->int_mode = E1000E_INT_MODE_MSI;
2175                 e1000e_set_interrupt_capability(adapter);
2176         }
2177         if (adapter->flags & FLAG_MSI_ENABLED) {
2178                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2179                                   netdev->name, netdev);
2180                 if (!err)
2181                         return err;
2182
2183                 /* fall back to legacy interrupt */
2184                 e1000e_reset_interrupt_capability(adapter);
2185                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2186         }
2187
2188         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2189                           netdev->name, netdev);
2190         if (err)
2191                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2192
2193         return err;
2194 }
2195
2196 static void e1000_free_irq(struct e1000_adapter *adapter)
2197 {
2198         struct net_device *netdev = adapter->netdev;
2199
2200         if (adapter->msix_entries) {
2201                 int vector = 0;
2202
2203                 free_irq(adapter->msix_entries[vector].vector, netdev);
2204                 vector++;
2205
2206                 free_irq(adapter->msix_entries[vector].vector, netdev);
2207                 vector++;
2208
2209                 /* Other Causes interrupt vector */
2210                 free_irq(adapter->msix_entries[vector].vector, netdev);
2211                 return;
2212         }
2213
2214         free_irq(adapter->pdev->irq, netdev);
2215 }
2216
2217 /**
2218  * e1000_irq_disable - Mask off interrupt generation on the NIC
2219  * @adapter: board private structure
2220  **/
2221 static void e1000_irq_disable(struct e1000_adapter *adapter)
2222 {
2223         struct e1000_hw *hw = &adapter->hw;
2224
2225         ew32(IMC, ~0);
2226         if (adapter->msix_entries)
2227                 ew32(EIAC_82574, 0);
2228         e1e_flush();
2229
2230         if (adapter->msix_entries) {
2231                 int i;
2232
2233                 for (i = 0; i < adapter->num_vectors; i++)
2234                         synchronize_irq(adapter->msix_entries[i].vector);
2235         } else {
2236                 synchronize_irq(adapter->pdev->irq);
2237         }
2238 }
2239
2240 /**
2241  * e1000_irq_enable - Enable default interrupt generation settings
2242  * @adapter: board private structure
2243  **/
2244 static void e1000_irq_enable(struct e1000_adapter *adapter)
2245 {
2246         struct e1000_hw *hw = &adapter->hw;
2247
2248         if (adapter->msix_entries) {
2249                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2250                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2251                      IMS_OTHER_MASK);
2252         } else if (hw->mac.type >= e1000_pch_lpt) {
2253                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2254         } else {
2255                 ew32(IMS, IMS_ENABLE_MASK);
2256         }
2257         e1e_flush();
2258 }
2259
2260 /**
2261  * e1000e_get_hw_control - get control of the h/w from f/w
2262  * @adapter: address of board private structure
2263  *
2264  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2265  * For ASF and Pass Through versions of f/w this means that
2266  * the driver is loaded. For AMT version (only with 82573)
2267  * of the f/w this means that the network i/f is open.
2268  **/
2269 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2270 {
2271         struct e1000_hw *hw = &adapter->hw;
2272         u32 ctrl_ext;
2273         u32 swsm;
2274
2275         /* Let firmware know the driver has taken over */
2276         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2277                 swsm = er32(SWSM);
2278                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2279         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2280                 ctrl_ext = er32(CTRL_EXT);
2281                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2282         }
2283 }
2284
2285 /**
2286  * e1000e_release_hw_control - release control of the h/w to f/w
2287  * @adapter: address of board private structure
2288  *
2289  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2290  * For ASF and Pass Through versions of f/w this means that the
2291  * driver is no longer loaded. For AMT version (only with 82573) i
2292  * of the f/w this means that the network i/f is closed.
2293  *
2294  **/
2295 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2296 {
2297         struct e1000_hw *hw = &adapter->hw;
2298         u32 ctrl_ext;
2299         u32 swsm;
2300
2301         /* Let firmware taken over control of h/w */
2302         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2303                 swsm = er32(SWSM);
2304                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2305         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2306                 ctrl_ext = er32(CTRL_EXT);
2307                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2308         }
2309 }
2310
2311 /**
2312  * e1000_alloc_ring_dma - allocate memory for a ring structure
2313  * @adapter: board private structure
2314  * @ring: ring struct for which to allocate dma
2315  **/
2316 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2317                                 struct e1000_ring *ring)
2318 {
2319         struct pci_dev *pdev = adapter->pdev;
2320
2321         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2322                                         GFP_KERNEL);
2323         if (!ring->desc)
2324                 return -ENOMEM;
2325
2326         return 0;
2327 }
2328
2329 /**
2330  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2331  * @tx_ring: Tx descriptor ring
2332  *
2333  * Return 0 on success, negative on failure
2334  **/
2335 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2336 {
2337         struct e1000_adapter *adapter = tx_ring->adapter;
2338         int err = -ENOMEM, size;
2339
2340         size = sizeof(struct e1000_buffer) * tx_ring->count;
2341         tx_ring->buffer_info = vzalloc(size);
2342         if (!tx_ring->buffer_info)
2343                 goto err;
2344
2345         /* round up to nearest 4K */
2346         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2347         tx_ring->size = ALIGN(tx_ring->size, 4096);
2348
2349         err = e1000_alloc_ring_dma(adapter, tx_ring);
2350         if (err)
2351                 goto err;
2352
2353         tx_ring->next_to_use = 0;
2354         tx_ring->next_to_clean = 0;
2355
2356         return 0;
2357 err:
2358         vfree(tx_ring->buffer_info);
2359         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2360         return err;
2361 }
2362
2363 /**
2364  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2365  * @rx_ring: Rx descriptor ring
2366  *
2367  * Returns 0 on success, negative on failure
2368  **/
2369 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2370 {
2371         struct e1000_adapter *adapter = rx_ring->adapter;
2372         struct e1000_buffer *buffer_info;
2373         int i, size, desc_len, err = -ENOMEM;
2374
2375         size = sizeof(struct e1000_buffer) * rx_ring->count;
2376         rx_ring->buffer_info = vzalloc(size);
2377         if (!rx_ring->buffer_info)
2378                 goto err;
2379
2380         for (i = 0; i < rx_ring->count; i++) {
2381                 buffer_info = &rx_ring->buffer_info[i];
2382                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2383                                                 sizeof(struct e1000_ps_page),
2384                                                 GFP_KERNEL);
2385                 if (!buffer_info->ps_pages)
2386                         goto err_pages;
2387         }
2388
2389         desc_len = sizeof(union e1000_rx_desc_packet_split);
2390
2391         /* Round up to nearest 4K */
2392         rx_ring->size = rx_ring->count * desc_len;
2393         rx_ring->size = ALIGN(rx_ring->size, 4096);
2394
2395         err = e1000_alloc_ring_dma(adapter, rx_ring);
2396         if (err)
2397                 goto err_pages;
2398
2399         rx_ring->next_to_clean = 0;
2400         rx_ring->next_to_use = 0;
2401         rx_ring->rx_skb_top = NULL;
2402
2403         return 0;
2404
2405 err_pages:
2406         for (i = 0; i < rx_ring->count; i++) {
2407                 buffer_info = &rx_ring->buffer_info[i];
2408                 kfree(buffer_info->ps_pages);
2409         }
2410 err:
2411         vfree(rx_ring->buffer_info);
2412         e_err("Unable to allocate memory for the receive descriptor ring\n");
2413         return err;
2414 }
2415
2416 /**
2417  * e1000_clean_tx_ring - Free Tx Buffers
2418  * @tx_ring: Tx descriptor ring
2419  **/
2420 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2421 {
2422         struct e1000_adapter *adapter = tx_ring->adapter;
2423         struct e1000_buffer *buffer_info;
2424         unsigned long size;
2425         unsigned int i;
2426
2427         for (i = 0; i < tx_ring->count; i++) {
2428                 buffer_info = &tx_ring->buffer_info[i];
2429                 e1000_put_txbuf(tx_ring, buffer_info, false);
2430         }
2431
2432         netdev_reset_queue(adapter->netdev);
2433         size = sizeof(struct e1000_buffer) * tx_ring->count;
2434         memset(tx_ring->buffer_info, 0, size);
2435
2436         memset(tx_ring->desc, 0, tx_ring->size);
2437
2438         tx_ring->next_to_use = 0;
2439         tx_ring->next_to_clean = 0;
2440 }
2441
2442 /**
2443  * e1000e_free_tx_resources - Free Tx Resources per Queue
2444  * @tx_ring: Tx descriptor ring
2445  *
2446  * Free all transmit software resources
2447  **/
2448 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2449 {
2450         struct e1000_adapter *adapter = tx_ring->adapter;
2451         struct pci_dev *pdev = adapter->pdev;
2452
2453         e1000_clean_tx_ring(tx_ring);
2454
2455         vfree(tx_ring->buffer_info);
2456         tx_ring->buffer_info = NULL;
2457
2458         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2459                           tx_ring->dma);
2460         tx_ring->desc = NULL;
2461 }
2462
2463 /**
2464  * e1000e_free_rx_resources - Free Rx Resources
2465  * @rx_ring: Rx descriptor ring
2466  *
2467  * Free all receive software resources
2468  **/
2469 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2470 {
2471         struct e1000_adapter *adapter = rx_ring->adapter;
2472         struct pci_dev *pdev = adapter->pdev;
2473         int i;
2474
2475         e1000_clean_rx_ring(rx_ring);
2476
2477         for (i = 0; i < rx_ring->count; i++)
2478                 kfree(rx_ring->buffer_info[i].ps_pages);
2479
2480         vfree(rx_ring->buffer_info);
2481         rx_ring->buffer_info = NULL;
2482
2483         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2484                           rx_ring->dma);
2485         rx_ring->desc = NULL;
2486 }
2487
2488 /**
2489  * e1000_update_itr - update the dynamic ITR value based on statistics
2490  * @itr_setting: current adapter->itr
2491  * @packets: the number of packets during this measurement interval
2492  * @bytes: the number of bytes during this measurement interval
2493  *
2494  *      Stores a new ITR value based on packets and byte
2495  *      counts during the last interrupt.  The advantage of per interrupt
2496  *      computation is faster updates and more accurate ITR for the current
2497  *      traffic pattern.  Constants in this function were computed
2498  *      based on theoretical maximum wire speed and thresholds were set based
2499  *      on testing data as well as attempting to minimize response time
2500  *      while increasing bulk throughput.  This functionality is controlled
2501  *      by the InterruptThrottleRate module parameter.
2502  **/
2503 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2504 {
2505         unsigned int retval = itr_setting;
2506
2507         if (packets == 0)
2508                 return itr_setting;
2509
2510         switch (itr_setting) {
2511         case lowest_latency:
2512                 /* handle TSO and jumbo frames */
2513                 if (bytes / packets > 8000)
2514                         retval = bulk_latency;
2515                 else if ((packets < 5) && (bytes > 512))
2516                         retval = low_latency;
2517                 break;
2518         case low_latency:       /* 50 usec aka 20000 ints/s */
2519                 if (bytes > 10000) {
2520                         /* this if handles the TSO accounting */
2521                         if (bytes / packets > 8000)
2522                                 retval = bulk_latency;
2523                         else if ((packets < 10) || ((bytes / packets) > 1200))
2524                                 retval = bulk_latency;
2525                         else if ((packets > 35))
2526                                 retval = lowest_latency;
2527                 } else if (bytes / packets > 2000) {
2528                         retval = bulk_latency;
2529                 } else if (packets <= 2 && bytes < 512) {
2530                         retval = lowest_latency;
2531                 }
2532                 break;
2533         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2534                 if (bytes > 25000) {
2535                         if (packets > 35)
2536                                 retval = low_latency;
2537                 } else if (bytes < 6000) {
2538                         retval = low_latency;
2539                 }
2540                 break;
2541         }
2542
2543         return retval;
2544 }
2545
2546 static void e1000_set_itr(struct e1000_adapter *adapter)
2547 {
2548         u16 current_itr;
2549         u32 new_itr = adapter->itr;
2550
2551         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2552         if (adapter->link_speed != SPEED_1000) {
2553                 new_itr = 4000;
2554                 goto set_itr_now;
2555         }
2556
2557         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2558                 new_itr = 0;
2559                 goto set_itr_now;
2560         }
2561
2562         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2563                                            adapter->total_tx_packets,
2564                                            adapter->total_tx_bytes);
2565         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2566         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2567                 adapter->tx_itr = low_latency;
2568
2569         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2570                                            adapter->total_rx_packets,
2571                                            adapter->total_rx_bytes);
2572         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2573         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2574                 adapter->rx_itr = low_latency;
2575
2576         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2577
2578         /* counts and packets in update_itr are dependent on these numbers */
2579         switch (current_itr) {
2580         case lowest_latency:
2581                 new_itr = 70000;
2582                 break;
2583         case low_latency:
2584                 new_itr = 20000;        /* aka hwitr = ~200 */
2585                 break;
2586         case bulk_latency:
2587                 new_itr = 4000;
2588                 break;
2589         default:
2590                 break;
2591         }
2592
2593 set_itr_now:
2594         if (new_itr != adapter->itr) {
2595                 /* this attempts to bias the interrupt rate towards Bulk
2596                  * by adding intermediate steps when interrupt rate is
2597                  * increasing
2598                  */
2599                 new_itr = new_itr > adapter->itr ?
2600                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2601                 adapter->itr = new_itr;
2602                 adapter->rx_ring->itr_val = new_itr;
2603                 if (adapter->msix_entries)
2604                         adapter->rx_ring->set_itr = 1;
2605                 else
2606                         e1000e_write_itr(adapter, new_itr);
2607         }
2608 }
2609
2610 /**
2611  * e1000e_write_itr - write the ITR value to the appropriate registers
2612  * @adapter: address of board private structure
2613  * @itr: new ITR value to program
2614  *
2615  * e1000e_write_itr determines if the adapter is in MSI-X mode
2616  * and, if so, writes the EITR registers with the ITR value.
2617  * Otherwise, it writes the ITR value into the ITR register.
2618  **/
2619 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2620 {
2621         struct e1000_hw *hw = &adapter->hw;
2622         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2623
2624         if (adapter->msix_entries) {
2625                 int vector;
2626
2627                 for (vector = 0; vector < adapter->num_vectors; vector++)
2628                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2629         } else {
2630                 ew32(ITR, new_itr);
2631         }
2632 }
2633
2634 /**
2635  * e1000_alloc_queues - Allocate memory for all rings
2636  * @adapter: board private structure to initialize
2637  **/
2638 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2639 {
2640         int size = sizeof(struct e1000_ring);
2641
2642         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2643         if (!adapter->tx_ring)
2644                 goto err;
2645         adapter->tx_ring->count = adapter->tx_ring_count;
2646         adapter->tx_ring->adapter = adapter;
2647
2648         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2649         if (!adapter->rx_ring)
2650                 goto err;
2651         adapter->rx_ring->count = adapter->rx_ring_count;
2652         adapter->rx_ring->adapter = adapter;
2653
2654         return 0;
2655 err:
2656         e_err("Unable to allocate memory for queues\n");
2657         kfree(adapter->rx_ring);
2658         kfree(adapter->tx_ring);
2659         return -ENOMEM;
2660 }
2661
2662 /**
2663  * e1000e_poll - NAPI Rx polling callback
2664  * @napi: struct associated with this polling callback
2665  * @budget: number of packets driver is allowed to process this poll
2666  **/
2667 static int e1000e_poll(struct napi_struct *napi, int budget)
2668 {
2669         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2670                                                      napi);
2671         struct e1000_hw *hw = &adapter->hw;
2672         struct net_device *poll_dev = adapter->netdev;
2673         int tx_cleaned = 1, work_done = 0;
2674
2675         adapter = netdev_priv(poll_dev);
2676
2677         if (!adapter->msix_entries ||
2678             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2679                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2680
2681         adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2682
2683         if (!tx_cleaned || work_done == budget)
2684                 return budget;
2685
2686         /* Exit the polling mode, but don't re-enable interrupts if stack might
2687          * poll us due to busy-polling
2688          */
2689         if (likely(napi_complete_done(napi, work_done))) {
2690                 if (adapter->itr_setting & 3)
2691                         e1000_set_itr(adapter);
2692                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2693                         if (adapter->msix_entries)
2694                                 ew32(IMS, adapter->rx_ring->ims_val);
2695                         else
2696                                 e1000_irq_enable(adapter);
2697                 }
2698         }
2699
2700         return work_done;
2701 }
2702
2703 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2704                                  __always_unused __be16 proto, u16 vid)
2705 {
2706         struct e1000_adapter *adapter = netdev_priv(netdev);
2707         struct e1000_hw *hw = &adapter->hw;
2708         u32 vfta, index;
2709
2710         /* don't update vlan cookie if already programmed */
2711         if ((adapter->hw.mng_cookie.status &
2712              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2713             (vid == adapter->mng_vlan_id))
2714                 return 0;
2715
2716         /* add VID to filter table */
2717         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2718                 index = (vid >> 5) & 0x7F;
2719                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2720                 vfta |= BIT((vid & 0x1F));
2721                 hw->mac.ops.write_vfta(hw, index, vfta);
2722         }
2723
2724         set_bit(vid, adapter->active_vlans);
2725
2726         return 0;
2727 }
2728
2729 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2730                                   __always_unused __be16 proto, u16 vid)
2731 {
2732         struct e1000_adapter *adapter = netdev_priv(netdev);
2733         struct e1000_hw *hw = &adapter->hw;
2734         u32 vfta, index;
2735
2736         if ((adapter->hw.mng_cookie.status &
2737              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2738             (vid == adapter->mng_vlan_id)) {
2739                 /* release control to f/w */
2740                 e1000e_release_hw_control(adapter);
2741                 return 0;
2742         }
2743
2744         /* remove VID from filter table */
2745         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2746                 index = (vid >> 5) & 0x7F;
2747                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2748                 vfta &= ~BIT((vid & 0x1F));
2749                 hw->mac.ops.write_vfta(hw, index, vfta);
2750         }
2751
2752         clear_bit(vid, adapter->active_vlans);
2753
2754         return 0;
2755 }
2756
2757 /**
2758  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2759  * @adapter: board private structure to initialize
2760  **/
2761 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2762 {
2763         struct net_device *netdev = adapter->netdev;
2764         struct e1000_hw *hw = &adapter->hw;
2765         u32 rctl;
2766
2767         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2768                 /* disable VLAN receive filtering */
2769                 rctl = er32(RCTL);
2770                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2771                 ew32(RCTL, rctl);
2772
2773                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2774                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2775                                                adapter->mng_vlan_id);
2776                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2777                 }
2778         }
2779 }
2780
2781 /**
2782  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2783  * @adapter: board private structure to initialize
2784  **/
2785 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2786 {
2787         struct e1000_hw *hw = &adapter->hw;
2788         u32 rctl;
2789
2790         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2791                 /* enable VLAN receive filtering */
2792                 rctl = er32(RCTL);
2793                 rctl |= E1000_RCTL_VFE;
2794                 rctl &= ~E1000_RCTL_CFIEN;
2795                 ew32(RCTL, rctl);
2796         }
2797 }
2798
2799 /**
2800  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2801  * @adapter: board private structure to initialize
2802  **/
2803 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2804 {
2805         struct e1000_hw *hw = &adapter->hw;
2806         u32 ctrl;
2807
2808         /* disable VLAN tag insert/strip */
2809         ctrl = er32(CTRL);
2810         ctrl &= ~E1000_CTRL_VME;
2811         ew32(CTRL, ctrl);
2812 }
2813
2814 /**
2815  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2816  * @adapter: board private structure to initialize
2817  **/
2818 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2819 {
2820         struct e1000_hw *hw = &adapter->hw;
2821         u32 ctrl;
2822
2823         /* enable VLAN tag insert/strip */
2824         ctrl = er32(CTRL);
2825         ctrl |= E1000_CTRL_VME;
2826         ew32(CTRL, ctrl);
2827 }
2828
2829 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2830 {
2831         struct net_device *netdev = adapter->netdev;
2832         u16 vid = adapter->hw.mng_cookie.vlan_id;
2833         u16 old_vid = adapter->mng_vlan_id;
2834
2835         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2836                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2837                 adapter->mng_vlan_id = vid;
2838         }
2839
2840         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2841                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2842 }
2843
2844 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2845 {
2846         u16 vid;
2847
2848         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2849
2850         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2851             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2852 }
2853
2854 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2855 {
2856         struct e1000_hw *hw = &adapter->hw;
2857         u32 manc, manc2h, mdef, i, j;
2858
2859         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2860                 return;
2861
2862         manc = er32(MANC);
2863
2864         /* enable receiving management packets to the host. this will probably
2865          * generate destination unreachable messages from the host OS, but
2866          * the packets will be handled on SMBUS
2867          */
2868         manc |= E1000_MANC_EN_MNG2HOST;
2869         manc2h = er32(MANC2H);
2870
2871         switch (hw->mac.type) {
2872         default:
2873                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2874                 break;
2875         case e1000_82574:
2876         case e1000_82583:
2877                 /* Check if IPMI pass-through decision filter already exists;
2878                  * if so, enable it.
2879                  */
2880                 for (i = 0, j = 0; i < 8; i++) {
2881                         mdef = er32(MDEF(i));
2882
2883                         /* Ignore filters with anything other than IPMI ports */
2884                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2885                                 continue;
2886
2887                         /* Enable this decision filter in MANC2H */
2888                         if (mdef)
2889                                 manc2h |= BIT(i);
2890
2891                         j |= mdef;
2892                 }
2893
2894                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2895                         break;
2896
2897                 /* Create new decision filter in an empty filter */
2898                 for (i = 0, j = 0; i < 8; i++)
2899                         if (er32(MDEF(i)) == 0) {
2900                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2901                                                E1000_MDEF_PORT_664));
2902                                 manc2h |= BIT(1);
2903                                 j++;
2904                                 break;
2905                         }
2906
2907                 if (!j)
2908                         e_warn("Unable to create IPMI pass-through filter\n");
2909                 break;
2910         }
2911
2912         ew32(MANC2H, manc2h);
2913         ew32(MANC, manc);
2914 }
2915
2916 /**
2917  * e1000_configure_tx - Configure Transmit Unit after Reset
2918  * @adapter: board private structure
2919  *
2920  * Configure the Tx unit of the MAC after a reset.
2921  **/
2922 static void e1000_configure_tx(struct e1000_adapter *adapter)
2923 {
2924         struct e1000_hw *hw = &adapter->hw;
2925         struct e1000_ring *tx_ring = adapter->tx_ring;
2926         u64 tdba;
2927         u32 tdlen, tctl, tarc;
2928
2929         /* Setup the HW Tx Head and Tail descriptor pointers */
2930         tdba = tx_ring->dma;
2931         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2932         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2933         ew32(TDBAH(0), (tdba >> 32));
2934         ew32(TDLEN(0), tdlen);
2935         ew32(TDH(0), 0);
2936         ew32(TDT(0), 0);
2937         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2938         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2939
2940         writel(0, tx_ring->head);
2941         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2942                 e1000e_update_tdt_wa(tx_ring, 0);
2943         else
2944                 writel(0, tx_ring->tail);
2945
2946         /* Set the Tx Interrupt Delay register */
2947         ew32(TIDV, adapter->tx_int_delay);
2948         /* Tx irq moderation */
2949         ew32(TADV, adapter->tx_abs_int_delay);
2950
2951         if (adapter->flags2 & FLAG2_DMA_BURST) {
2952                 u32 txdctl = er32(TXDCTL(0));
2953
2954                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2955                             E1000_TXDCTL_WTHRESH);
2956                 /* set up some performance related parameters to encourage the
2957                  * hardware to use the bus more efficiently in bursts, depends
2958                  * on the tx_int_delay to be enabled,
2959                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2960                  * hthresh = 1 ==> prefetch when one or more available
2961                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2962                  * BEWARE: this seems to work but should be considered first if
2963                  * there are Tx hangs or other Tx related bugs
2964                  */
2965                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2966                 ew32(TXDCTL(0), txdctl);
2967         }
2968         /* erratum work around: set txdctl the same for both queues */
2969         ew32(TXDCTL(1), er32(TXDCTL(0)));
2970
2971         /* Program the Transmit Control Register */
2972         tctl = er32(TCTL);
2973         tctl &= ~E1000_TCTL_CT;
2974         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2975                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2976
2977         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2978                 tarc = er32(TARC(0));
2979                 /* set the speed mode bit, we'll clear it if we're not at
2980                  * gigabit link later
2981                  */
2982 #define SPEED_MODE_BIT BIT(21)
2983                 tarc |= SPEED_MODE_BIT;
2984                 ew32(TARC(0), tarc);
2985         }
2986
2987         /* errata: program both queues to unweighted RR */
2988         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2989                 tarc = er32(TARC(0));
2990                 tarc |= 1;
2991                 ew32(TARC(0), tarc);
2992                 tarc = er32(TARC(1));
2993                 tarc |= 1;
2994                 ew32(TARC(1), tarc);
2995         }
2996
2997         /* Setup Transmit Descriptor Settings for eop descriptor */
2998         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2999
3000         /* only set IDE if we are delaying interrupts using the timers */
3001         if (adapter->tx_int_delay)
3002                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3003
3004         /* enable Report Status bit */
3005         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3006
3007         ew32(TCTL, tctl);
3008
3009         hw->mac.ops.config_collision_dist(hw);
3010
3011         /* SPT and KBL Si errata workaround to avoid data corruption */
3012         if (hw->mac.type == e1000_pch_spt) {
3013                 u32 reg_val;
3014
3015                 reg_val = er32(IOSFPC);
3016                 reg_val |= E1000_RCTL_RDMTS_HEX;
3017                 ew32(IOSFPC, reg_val);
3018
3019                 reg_val = er32(TARC(0));
3020                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3021                  * Dropping the number of outstanding requests from
3022                  * 3 to 2 in order to avoid a buffer overrun.
3023                  */
3024                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3025                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3026                 ew32(TARC(0), reg_val);
3027         }
3028 }
3029
3030 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3031                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3032
3033 /**
3034  * e1000_setup_rctl - configure the receive control registers
3035  * @adapter: Board private structure
3036  **/
3037 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3038 {
3039         struct e1000_hw *hw = &adapter->hw;
3040         u32 rctl, rfctl;
3041         u32 pages = 0;
3042
3043         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3044          * If jumbo frames not set, program related MAC/PHY registers
3045          * to h/w defaults
3046          */
3047         if (hw->mac.type >= e1000_pch2lan) {
3048                 s32 ret_val;
3049
3050                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3051                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3052                 else
3053                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3054
3055                 if (ret_val)
3056                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3057         }
3058
3059         /* Program MC offset vector base */
3060         rctl = er32(RCTL);
3061         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3062         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3063             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3064             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3065
3066         /* Do not Store bad packets */
3067         rctl &= ~E1000_RCTL_SBP;
3068
3069         /* Enable Long Packet receive */
3070         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3071                 rctl &= ~E1000_RCTL_LPE;
3072         else
3073                 rctl |= E1000_RCTL_LPE;
3074
3075         /* Some systems expect that the CRC is included in SMBUS traffic. The
3076          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3077          * host memory when this is enabled
3078          */
3079         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3080                 rctl |= E1000_RCTL_SECRC;
3081
3082         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3083         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3084                 u16 phy_data;
3085
3086                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3087                 phy_data &= 0xfff8;
3088                 phy_data |= BIT(2);
3089                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3090
3091                 e1e_rphy(hw, 22, &phy_data);
3092                 phy_data &= 0x0fff;
3093                 phy_data |= BIT(14);
3094                 e1e_wphy(hw, 0x10, 0x2823);
3095                 e1e_wphy(hw, 0x11, 0x0003);
3096                 e1e_wphy(hw, 22, phy_data);
3097         }
3098
3099         /* Setup buffer sizes */
3100         rctl &= ~E1000_RCTL_SZ_4096;
3101         rctl |= E1000_RCTL_BSEX;
3102         switch (adapter->rx_buffer_len) {
3103         case 2048:
3104         default:
3105                 rctl |= E1000_RCTL_SZ_2048;
3106                 rctl &= ~E1000_RCTL_BSEX;
3107                 break;
3108         case 4096:
3109                 rctl |= E1000_RCTL_SZ_4096;
3110                 break;
3111         case 8192:
3112                 rctl |= E1000_RCTL_SZ_8192;
3113                 break;
3114         case 16384:
3115                 rctl |= E1000_RCTL_SZ_16384;
3116                 break;
3117         }
3118
3119         /* Enable Extended Status in all Receive Descriptors */
3120         rfctl = er32(RFCTL);
3121         rfctl |= E1000_RFCTL_EXTEN;
3122         ew32(RFCTL, rfctl);
3123
3124         /* 82571 and greater support packet-split where the protocol
3125          * header is placed in skb->data and the packet data is
3126          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3127          * In the case of a non-split, skb->data is linearly filled,
3128          * followed by the page buffers.  Therefore, skb->data is
3129          * sized to hold the largest protocol header.
3130          *
3131          * allocations using alloc_page take too long for regular MTU
3132          * so only enable packet split for jumbo frames
3133          *
3134          * Using pages when the page size is greater than 16k wastes
3135          * a lot of memory, since we allocate 3 pages at all times
3136          * per packet.
3137          */
3138         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3139         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3140                 adapter->rx_ps_pages = pages;
3141         else
3142                 adapter->rx_ps_pages = 0;
3143
3144         if (adapter->rx_ps_pages) {
3145                 u32 psrctl = 0;
3146
3147                 /* Enable Packet split descriptors */
3148                 rctl |= E1000_RCTL_DTYP_PS;
3149
3150                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3151
3152                 switch (adapter->rx_ps_pages) {
3153                 case 3:
3154                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3155                         fallthrough;
3156                 case 2:
3157                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3158                         fallthrough;
3159                 case 1:
3160                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3161                         break;
3162                 }
3163
3164                 ew32(PSRCTL, psrctl);
3165         }
3166
3167         /* This is useful for sniffing bad packets. */
3168         if (adapter->netdev->features & NETIF_F_RXALL) {
3169                 /* UPE and MPE will be handled by normal PROMISC logic
3170                  * in e1000e_set_rx_mode
3171                  */
3172                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3173                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3174                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3175
3176                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3177                           E1000_RCTL_DPF |      /* Allow filtered pause */
3178                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3179                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3180                  * and that breaks VLANs.
3181                  */
3182         }
3183
3184         ew32(RCTL, rctl);
3185         /* just started the receive unit, no need to restart */
3186         adapter->flags &= ~FLAG_RESTART_NOW;
3187 }
3188
3189 /**
3190  * e1000_configure_rx - Configure Receive Unit after Reset
3191  * @adapter: board private structure
3192  *
3193  * Configure the Rx unit of the MAC after a reset.
3194  **/
3195 static void e1000_configure_rx(struct e1000_adapter *adapter)
3196 {
3197         struct e1000_hw *hw = &adapter->hw;
3198         struct e1000_ring *rx_ring = adapter->rx_ring;
3199         u64 rdba;
3200         u32 rdlen, rctl, rxcsum, ctrl_ext;
3201
3202         if (adapter->rx_ps_pages) {
3203                 /* this is a 32 byte descriptor */
3204                 rdlen = rx_ring->count *
3205                     sizeof(union e1000_rx_desc_packet_split);
3206                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3207                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3208         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3209                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3210                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3211                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3212         } else {
3213                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3214                 adapter->clean_rx = e1000_clean_rx_irq;
3215                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3216         }
3217
3218         /* disable receives while setting up the descriptors */
3219         rctl = er32(RCTL);
3220         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3221                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3222         e1e_flush();
3223         usleep_range(10000, 11000);
3224
3225         if (adapter->flags2 & FLAG2_DMA_BURST) {
3226                 /* set the writeback threshold (only takes effect if the RDTR
3227                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3228                  * enable prefetching of 0x20 Rx descriptors
3229                  * granularity = 01
3230                  * wthresh = 04,
3231                  * hthresh = 04,
3232                  * pthresh = 0x20
3233                  */
3234                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3235                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3236         }
3237
3238         /* set the Receive Delay Timer Register */
3239         ew32(RDTR, adapter->rx_int_delay);
3240
3241         /* irq moderation */
3242         ew32(RADV, adapter->rx_abs_int_delay);
3243         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3244                 e1000e_write_itr(adapter, adapter->itr);
3245
3246         ctrl_ext = er32(CTRL_EXT);
3247         /* Auto-Mask interrupts upon ICR access */
3248         ctrl_ext |= E1000_CTRL_EXT_IAME;
3249         ew32(IAM, 0xffffffff);
3250         ew32(CTRL_EXT, ctrl_ext);
3251         e1e_flush();
3252
3253         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3254          * the Base and Length of the Rx Descriptor Ring
3255          */
3256         rdba = rx_ring->dma;
3257         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3258         ew32(RDBAH(0), (rdba >> 32));
3259         ew32(RDLEN(0), rdlen);
3260         ew32(RDH(0), 0);
3261         ew32(RDT(0), 0);
3262         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3263         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3264
3265         writel(0, rx_ring->head);
3266         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3267                 e1000e_update_rdt_wa(rx_ring, 0);
3268         else
3269                 writel(0, rx_ring->tail);
3270
3271         /* Enable Receive Checksum Offload for TCP and UDP */
3272         rxcsum = er32(RXCSUM);
3273         if (adapter->netdev->features & NETIF_F_RXCSUM)
3274                 rxcsum |= E1000_RXCSUM_TUOFL;
3275         else
3276                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3277         ew32(RXCSUM, rxcsum);
3278
3279         /* With jumbo frames, excessive C-state transition latencies result
3280          * in dropped transactions.
3281          */
3282         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3283                 u32 lat =
3284                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3285                      adapter->max_frame_size) * 8 / 1000;
3286
3287                 if (adapter->flags & FLAG_IS_ICH) {
3288                         u32 rxdctl = er32(RXDCTL(0));
3289
3290                         ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3291                 }
3292
3293                 dev_info(&adapter->pdev->dev,
3294                          "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3295                 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3296         } else {
3297                 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3298                                                PM_QOS_DEFAULT_VALUE);
3299         }
3300
3301         /* Enable Receives */
3302         ew32(RCTL, rctl);
3303 }
3304
3305 /**
3306  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3307  * @netdev: network interface device structure
3308  *
3309  * Writes multicast address list to the MTA hash table.
3310  * Returns: -ENOMEM on failure
3311  *                0 on no addresses written
3312  *                X on writing X addresses to MTA
3313  */
3314 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3315 {
3316         struct e1000_adapter *adapter = netdev_priv(netdev);
3317         struct e1000_hw *hw = &adapter->hw;
3318         struct netdev_hw_addr *ha;
3319         u8 *mta_list;
3320         int i;
3321
3322         if (netdev_mc_empty(netdev)) {
3323                 /* nothing to program, so clear mc list */
3324                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3325                 return 0;
3326         }
3327
3328         mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3329         if (!mta_list)
3330                 return -ENOMEM;
3331
3332         /* update_mc_addr_list expects a packed array of only addresses. */
3333         i = 0;
3334         netdev_for_each_mc_addr(ha, netdev)
3335             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3336
3337         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3338         kfree(mta_list);
3339
3340         return netdev_mc_count(netdev);
3341 }
3342
3343 /**
3344  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3345  * @netdev: network interface device structure
3346  *
3347  * Writes unicast address list to the RAR table.
3348  * Returns: -ENOMEM on failure/insufficient address space
3349  *                0 on no addresses written
3350  *                X on writing X addresses to the RAR table
3351  **/
3352 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3353 {
3354         struct e1000_adapter *adapter = netdev_priv(netdev);
3355         struct e1000_hw *hw = &adapter->hw;
3356         unsigned int rar_entries;
3357         int count = 0;
3358
3359         rar_entries = hw->mac.ops.rar_get_count(hw);
3360
3361         /* save a rar entry for our hardware address */
3362         rar_entries--;
3363
3364         /* save a rar entry for the LAA workaround */
3365         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3366                 rar_entries--;
3367
3368         /* return ENOMEM indicating insufficient memory for addresses */
3369         if (netdev_uc_count(netdev) > rar_entries)
3370                 return -ENOMEM;
3371
3372         if (!netdev_uc_empty(netdev) && rar_entries) {
3373                 struct netdev_hw_addr *ha;
3374
3375                 /* write the addresses in reverse order to avoid write
3376                  * combining
3377                  */
3378                 netdev_for_each_uc_addr(ha, netdev) {
3379                         int ret_val;
3380
3381                         if (!rar_entries)
3382                                 break;
3383                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3384                         if (ret_val < 0)
3385                                 return -ENOMEM;
3386                         count++;
3387                 }
3388         }
3389
3390         /* zero out the remaining RAR entries not used above */
3391         for (; rar_entries > 0; rar_entries--) {
3392                 ew32(RAH(rar_entries), 0);
3393                 ew32(RAL(rar_entries), 0);
3394         }
3395         e1e_flush();
3396
3397         return count;
3398 }
3399
3400 /**
3401  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3402  * @netdev: network interface device structure
3403  *
3404  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3405  * address list or the network interface flags are updated.  This routine is
3406  * responsible for configuring the hardware for proper unicast, multicast,
3407  * promiscuous mode, and all-multi behavior.
3408  **/
3409 static void e1000e_set_rx_mode(struct net_device *netdev)
3410 {
3411         struct e1000_adapter *adapter = netdev_priv(netdev);
3412         struct e1000_hw *hw = &adapter->hw;
3413         u32 rctl;
3414
3415         if (pm_runtime_suspended(netdev->dev.parent))
3416                 return;
3417
3418         /* Check for Promiscuous and All Multicast modes */
3419         rctl = er32(RCTL);
3420
3421         /* clear the affected bits */
3422         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3423
3424         if (netdev->flags & IFF_PROMISC) {
3425                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3426                 /* Do not hardware filter VLANs in promisc mode */
3427                 e1000e_vlan_filter_disable(adapter);
3428         } else {
3429                 int count;
3430
3431                 if (netdev->flags & IFF_ALLMULTI) {
3432                         rctl |= E1000_RCTL_MPE;
3433                 } else {
3434                         /* Write addresses to the MTA, if the attempt fails
3435                          * then we should just turn on promiscuous mode so
3436                          * that we can at least receive multicast traffic
3437                          */
3438                         count = e1000e_write_mc_addr_list(netdev);
3439                         if (count < 0)
3440                                 rctl |= E1000_RCTL_MPE;
3441                 }
3442                 e1000e_vlan_filter_enable(adapter);
3443                 /* Write addresses to available RAR registers, if there is not
3444                  * sufficient space to store all the addresses then enable
3445                  * unicast promiscuous mode
3446                  */
3447                 count = e1000e_write_uc_addr_list(netdev);
3448                 if (count < 0)
3449                         rctl |= E1000_RCTL_UPE;
3450         }
3451
3452         ew32(RCTL, rctl);
3453
3454         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3455                 e1000e_vlan_strip_enable(adapter);
3456         else
3457                 e1000e_vlan_strip_disable(adapter);
3458 }
3459
3460 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3461 {
3462         struct e1000_hw *hw = &adapter->hw;
3463         u32 mrqc, rxcsum;
3464         u32 rss_key[10];
3465         int i;
3466
3467         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3468         for (i = 0; i < 10; i++)
3469                 ew32(RSSRK(i), rss_key[i]);
3470
3471         /* Direct all traffic to queue 0 */
3472         for (i = 0; i < 32; i++)
3473                 ew32(RETA(i), 0);
3474
3475         /* Disable raw packet checksumming so that RSS hash is placed in
3476          * descriptor on writeback.
3477          */
3478         rxcsum = er32(RXCSUM);
3479         rxcsum |= E1000_RXCSUM_PCSD;
3480
3481         ew32(RXCSUM, rxcsum);
3482
3483         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3484                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3485                 E1000_MRQC_RSS_FIELD_IPV6 |
3486                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3487                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3488
3489         ew32(MRQC, mrqc);
3490 }
3491
3492 /**
3493  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3494  * @adapter: board private structure
3495  * @timinca: pointer to returned time increment attributes
3496  *
3497  * Get attributes for incrementing the System Time Register SYSTIML/H at
3498  * the default base frequency, and set the cyclecounter shift value.
3499  **/
3500 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3501 {
3502         struct e1000_hw *hw = &adapter->hw;
3503         u32 incvalue, incperiod, shift;
3504
3505         /* Make sure clock is enabled on I217/I218/I219  before checking
3506          * the frequency
3507          */
3508         if ((hw->mac.type >= e1000_pch_lpt) &&
3509             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3510             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3511                 u32 fextnvm7 = er32(FEXTNVM7);
3512
3513                 if (!(fextnvm7 & BIT(0))) {
3514                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3515                         e1e_flush();
3516                 }
3517         }
3518
3519         switch (hw->mac.type) {
3520         case e1000_pch2lan:
3521                 /* Stable 96MHz frequency */
3522                 incperiod = INCPERIOD_96MHZ;
3523                 incvalue = INCVALUE_96MHZ;
3524                 shift = INCVALUE_SHIFT_96MHZ;
3525                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3526                 break;
3527         case e1000_pch_lpt:
3528                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3529                         /* Stable 96MHz frequency */
3530                         incperiod = INCPERIOD_96MHZ;
3531                         incvalue = INCVALUE_96MHZ;
3532                         shift = INCVALUE_SHIFT_96MHZ;
3533                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3534                 } else {
3535                         /* Stable 25MHz frequency */
3536                         incperiod = INCPERIOD_25MHZ;
3537                         incvalue = INCVALUE_25MHZ;
3538                         shift = INCVALUE_SHIFT_25MHZ;
3539                         adapter->cc.shift = shift;
3540                 }
3541                 break;
3542         case e1000_pch_spt:
3543                 /* Stable 24MHz frequency */
3544                 incperiod = INCPERIOD_24MHZ;
3545                 incvalue = INCVALUE_24MHZ;
3546                 shift = INCVALUE_SHIFT_24MHZ;
3547                 adapter->cc.shift = shift;
3548                 break;
3549         case e1000_pch_cnp:
3550         case e1000_pch_tgp:
3551         case e1000_pch_adp:
3552         case e1000_pch_mtp:
3553         case e1000_pch_lnp:
3554                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3555                         /* Stable 24MHz frequency */
3556                         incperiod = INCPERIOD_24MHZ;
3557                         incvalue = INCVALUE_24MHZ;
3558                         shift = INCVALUE_SHIFT_24MHZ;
3559                         adapter->cc.shift = shift;
3560                 } else {
3561                         /* Stable 38400KHz frequency */
3562                         incperiod = INCPERIOD_38400KHZ;
3563                         incvalue = INCVALUE_38400KHZ;
3564                         shift = INCVALUE_SHIFT_38400KHZ;
3565                         adapter->cc.shift = shift;
3566                 }
3567                 break;
3568         case e1000_82574:
3569         case e1000_82583:
3570                 /* Stable 25MHz frequency */
3571                 incperiod = INCPERIOD_25MHZ;
3572                 incvalue = INCVALUE_25MHZ;
3573                 shift = INCVALUE_SHIFT_25MHZ;
3574                 adapter->cc.shift = shift;
3575                 break;
3576         default:
3577                 return -EINVAL;
3578         }
3579
3580         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3581                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3582
3583         return 0;
3584 }
3585
3586 /**
3587  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3588  * @adapter: board private structure
3589  * @config: timestamp configuration
3590  *
3591  * Outgoing time stamping can be enabled and disabled. Play nice and
3592  * disable it when requested, although it shouldn't cause any overhead
3593  * when no packet needs it. At most one packet in the queue may be
3594  * marked for time stamping, otherwise it would be impossible to tell
3595  * for sure to which packet the hardware time stamp belongs.
3596  *
3597  * Incoming time stamping has to be configured via the hardware filters.
3598  * Not all combinations are supported, in particular event type has to be
3599  * specified. Matching the kind of event packet is not supported, with the
3600  * exception of "all V2 events regardless of level 2 or 4".
3601  **/
3602 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3603                                   struct hwtstamp_config *config)
3604 {
3605         struct e1000_hw *hw = &adapter->hw;
3606         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3607         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3608         u32 rxmtrl = 0;
3609         u16 rxudp = 0;
3610         bool is_l4 = false;
3611         bool is_l2 = false;
3612         u32 regval;
3613
3614         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3615                 return -EINVAL;
3616
3617         switch (config->tx_type) {
3618         case HWTSTAMP_TX_OFF:
3619                 tsync_tx_ctl = 0;
3620                 break;
3621         case HWTSTAMP_TX_ON:
3622                 break;
3623         default:
3624                 return -ERANGE;
3625         }
3626
3627         switch (config->rx_filter) {
3628         case HWTSTAMP_FILTER_NONE:
3629                 tsync_rx_ctl = 0;
3630                 break;
3631         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3632                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3633                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3634                 is_l4 = true;
3635                 break;
3636         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3637                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3638                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3639                 is_l4 = true;
3640                 break;
3641         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3642                 /* Also time stamps V2 L2 Path Delay Request/Response */
3643                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3644                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3645                 is_l2 = true;
3646                 break;
3647         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3648                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3649                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3650                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3651                 is_l2 = true;
3652                 break;
3653         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3654                 /* Hardware cannot filter just V2 L4 Sync messages */
3655                 fallthrough;
3656         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3657                 /* Also time stamps V2 Path Delay Request/Response. */
3658                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3659                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3660                 is_l2 = true;
3661                 is_l4 = true;
3662                 break;
3663         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3664                 /* Hardware cannot filter just V2 L4 Delay Request messages */
3665                 fallthrough;
3666         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3667                 /* Also time stamps V2 Path Delay Request/Response. */
3668                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3669                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3670                 is_l2 = true;
3671                 is_l4 = true;
3672                 break;
3673         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3674         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3675                 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3676                 fallthrough;
3677         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3678                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3679                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3680                 is_l2 = true;
3681                 is_l4 = true;
3682                 break;
3683         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3684                 /* For V1, the hardware can only filter Sync messages or
3685                  * Delay Request messages but not both so fall-through to
3686                  * time stamp all packets.
3687                  */
3688                 fallthrough;
3689         case HWTSTAMP_FILTER_NTP_ALL:
3690         case HWTSTAMP_FILTER_ALL:
3691                 is_l2 = true;
3692                 is_l4 = true;
3693                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3694                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3695                 break;
3696         default:
3697                 return -ERANGE;
3698         }
3699
3700         adapter->hwtstamp_config = *config;
3701
3702         /* enable/disable Tx h/w time stamping */
3703         regval = er32(TSYNCTXCTL);
3704         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3705         regval |= tsync_tx_ctl;
3706         ew32(TSYNCTXCTL, regval);
3707         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3708             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3709                 e_err("Timesync Tx Control register not set as expected\n");
3710                 return -EAGAIN;
3711         }
3712
3713         /* enable/disable Rx h/w time stamping */
3714         regval = er32(TSYNCRXCTL);
3715         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3716         regval |= tsync_rx_ctl;
3717         ew32(TSYNCRXCTL, regval);
3718         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3719                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3720             (regval & (E1000_TSYNCRXCTL_ENABLED |
3721                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3722                 e_err("Timesync Rx Control register not set as expected\n");
3723                 return -EAGAIN;
3724         }
3725
3726         /* L2: define ethertype filter for time stamped packets */
3727         if (is_l2)
3728                 rxmtrl |= ETH_P_1588;
3729
3730         /* define which PTP packets get time stamped */
3731         ew32(RXMTRL, rxmtrl);
3732
3733         /* Filter by destination port */
3734         if (is_l4) {
3735                 rxudp = PTP_EV_PORT;
3736                 cpu_to_be16s(&rxudp);
3737         }
3738         ew32(RXUDP, rxudp);
3739
3740         e1e_flush();
3741
3742         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3743         er32(RXSTMPH);
3744         er32(TXSTMPH);
3745
3746         return 0;
3747 }
3748
3749 /**
3750  * e1000_configure - configure the hardware for Rx and Tx
3751  * @adapter: private board structure
3752  **/
3753 static void e1000_configure(struct e1000_adapter *adapter)
3754 {
3755         struct e1000_ring *rx_ring = adapter->rx_ring;
3756
3757         e1000e_set_rx_mode(adapter->netdev);
3758
3759         e1000_restore_vlan(adapter);
3760         e1000_init_manageability_pt(adapter);
3761
3762         e1000_configure_tx(adapter);
3763
3764         if (adapter->netdev->features & NETIF_F_RXHASH)
3765                 e1000e_setup_rss_hash(adapter);
3766         e1000_setup_rctl(adapter);
3767         e1000_configure_rx(adapter);
3768         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3769 }
3770
3771 /**
3772  * e1000e_power_up_phy - restore link in case the phy was powered down
3773  * @adapter: address of board private structure
3774  *
3775  * The phy may be powered down to save power and turn off link when the
3776  * driver is unloaded and wake on lan is not enabled (among others)
3777  * *** this routine MUST be followed by a call to e1000e_reset ***
3778  **/
3779 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3780 {
3781         if (adapter->hw.phy.ops.power_up)
3782                 adapter->hw.phy.ops.power_up(&adapter->hw);
3783
3784         adapter->hw.mac.ops.setup_link(&adapter->hw);
3785 }
3786
3787 /**
3788  * e1000_power_down_phy - Power down the PHY
3789  * @adapter: board private structure
3790  *
3791  * Power down the PHY so no link is implied when interface is down.
3792  * The PHY cannot be powered down if management or WoL is active.
3793  */
3794 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3795 {
3796         if (adapter->hw.phy.ops.power_down)
3797                 adapter->hw.phy.ops.power_down(&adapter->hw);
3798 }
3799
3800 /**
3801  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3802  * @adapter: board private structure
3803  *
3804  * We want to clear all pending descriptors from the TX ring.
3805  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3806  * the data of the next descriptor. We don't care about the data we are about
3807  * to reset the HW.
3808  */
3809 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3810 {
3811         struct e1000_hw *hw = &adapter->hw;
3812         struct e1000_ring *tx_ring = adapter->tx_ring;
3813         struct e1000_tx_desc *tx_desc = NULL;
3814         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3815         u16 size = 512;
3816
3817         tctl = er32(TCTL);
3818         ew32(TCTL, tctl | E1000_TCTL_EN);
3819         tdt = er32(TDT(0));
3820         BUG_ON(tdt != tx_ring->next_to_use);
3821         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3822         tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3823
3824         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3825         tx_desc->upper.data = 0;
3826         /* flush descriptors to memory before notifying the HW */
3827         wmb();
3828         tx_ring->next_to_use++;
3829         if (tx_ring->next_to_use == tx_ring->count)
3830                 tx_ring->next_to_use = 0;
3831         ew32(TDT(0), tx_ring->next_to_use);
3832         usleep_range(200, 250);
3833 }
3834
3835 /**
3836  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3837  * @adapter: board private structure
3838  *
3839  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3840  */
3841 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3842 {
3843         u32 rctl, rxdctl;
3844         struct e1000_hw *hw = &adapter->hw;
3845
3846         rctl = er32(RCTL);
3847         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3848         e1e_flush();
3849         usleep_range(100, 150);
3850
3851         rxdctl = er32(RXDCTL(0));
3852         /* zero the lower 14 bits (prefetch and host thresholds) */
3853         rxdctl &= 0xffffc000;
3854
3855         /* update thresholds: prefetch threshold to 31, host threshold to 1
3856          * and make sure the granularity is "descriptors" and not "cache lines"
3857          */
3858         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3859
3860         ew32(RXDCTL(0), rxdctl);
3861         /* momentarily enable the RX ring for the changes to take effect */
3862         ew32(RCTL, rctl | E1000_RCTL_EN);
3863         e1e_flush();
3864         usleep_range(100, 150);
3865         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3866 }
3867
3868 /**
3869  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3870  * @adapter: board private structure
3871  *
3872  * In i219, the descriptor rings must be emptied before resetting the HW
3873  * or before changing the device state to D3 during runtime (runtime PM).
3874  *
3875  * Failure to do this will cause the HW to enter a unit hang state which can
3876  * only be released by PCI reset on the device
3877  *
3878  */
3879
3880 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3881 {
3882         u16 hang_state;
3883         u32 fext_nvm11, tdlen;
3884         struct e1000_hw *hw = &adapter->hw;
3885
3886         /* First, disable MULR fix in FEXTNVM11 */
3887         fext_nvm11 = er32(FEXTNVM11);
3888         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3889         ew32(FEXTNVM11, fext_nvm11);
3890         /* do nothing if we're not in faulty state, or if the queue is empty */
3891         tdlen = er32(TDLEN(0));
3892         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3893                              &hang_state);
3894         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3895                 return;
3896         e1000_flush_tx_ring(adapter);
3897         /* recheck, maybe the fault is caused by the rx ring */
3898         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3899                              &hang_state);
3900         if (hang_state & FLUSH_DESC_REQUIRED)
3901                 e1000_flush_rx_ring(adapter);
3902 }
3903
3904 /**
3905  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3906  * @adapter: board private structure
3907  *
3908  * When the MAC is reset, all hardware bits for timesync will be reset to the
3909  * default values. This function will restore the settings last in place.
3910  * Since the clock SYSTIME registers are reset, we will simply restore the
3911  * cyclecounter to the kernel real clock time.
3912  **/
3913 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3914 {
3915         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3916         struct e1000_hw *hw = &adapter->hw;
3917         unsigned long flags;
3918         u32 timinca;
3919         s32 ret_val;
3920
3921         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3922                 return;
3923
3924         if (info->adjfreq) {
3925                 /* restore the previous ptp frequency delta */
3926                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3927         } else {
3928                 /* set the default base frequency if no adjustment possible */
3929                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3930                 if (!ret_val)
3931                         ew32(TIMINCA, timinca);
3932         }
3933
3934         if (ret_val) {
3935                 dev_warn(&adapter->pdev->dev,
3936                          "Failed to restore TIMINCA clock rate delta: %d\n",
3937                          ret_val);
3938                 return;
3939         }
3940
3941         /* reset the systim ns time counter */
3942         spin_lock_irqsave(&adapter->systim_lock, flags);
3943         timecounter_init(&adapter->tc, &adapter->cc,
3944                          ktime_to_ns(ktime_get_real()));
3945         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3946
3947         /* restore the previous hwtstamp configuration settings */
3948         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3949 }
3950
3951 /**
3952  * e1000e_reset - bring the hardware into a known good state
3953  * @adapter: board private structure
3954  *
3955  * This function boots the hardware and enables some settings that
3956  * require a configuration cycle of the hardware - those cannot be
3957  * set/changed during runtime. After reset the device needs to be
3958  * properly configured for Rx, Tx etc.
3959  */
3960 void e1000e_reset(struct e1000_adapter *adapter)
3961 {
3962         struct e1000_mac_info *mac = &adapter->hw.mac;
3963         struct e1000_fc_info *fc = &adapter->hw.fc;
3964         struct e1000_hw *hw = &adapter->hw;
3965         u32 tx_space, min_tx_space, min_rx_space;
3966         u32 pba = adapter->pba;
3967         u16 hwm;
3968
3969         /* reset Packet Buffer Allocation to default */
3970         ew32(PBA, pba);
3971
3972         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3973                 /* To maintain wire speed transmits, the Tx FIFO should be
3974                  * large enough to accommodate two full transmit packets,
3975                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3976                  * the Rx FIFO should be large enough to accommodate at least
3977                  * one full receive packet and is similarly rounded up and
3978                  * expressed in KB.
3979                  */
3980                 pba = er32(PBA);
3981                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3982                 tx_space = pba >> 16;
3983                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3984                 pba &= 0xffff;
3985                 /* the Tx fifo also stores 16 bytes of information about the Tx
3986                  * but don't include ethernet FCS because hardware appends it
3987                  */
3988                 min_tx_space = (adapter->max_frame_size +
3989                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3990                 min_tx_space = ALIGN(min_tx_space, 1024);
3991                 min_tx_space >>= 10;
3992                 /* software strips receive CRC, so leave room for it */
3993                 min_rx_space = adapter->max_frame_size;
3994                 min_rx_space = ALIGN(min_rx_space, 1024);
3995                 min_rx_space >>= 10;
3996
3997                 /* If current Tx allocation is less than the min Tx FIFO size,
3998                  * and the min Tx FIFO size is less than the current Rx FIFO
3999                  * allocation, take space away from current Rx allocation
4000                  */
4001                 if ((tx_space < min_tx_space) &&
4002                     ((min_tx_space - tx_space) < pba)) {
4003                         pba -= min_tx_space - tx_space;
4004
4005                         /* if short on Rx space, Rx wins and must trump Tx
4006                          * adjustment
4007                          */
4008                         if (pba < min_rx_space)
4009                                 pba = min_rx_space;
4010                 }
4011
4012                 ew32(PBA, pba);
4013         }
4014
4015         /* flow control settings
4016          *
4017          * The high water mark must be low enough to fit one full frame
4018          * (or the size used for early receive) above it in the Rx FIFO.
4019          * Set it to the lower of:
4020          * - 90% of the Rx FIFO size, and
4021          * - the full Rx FIFO size minus one full frame
4022          */
4023         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4024                 fc->pause_time = 0xFFFF;
4025         else
4026                 fc->pause_time = E1000_FC_PAUSE_TIME;
4027         fc->send_xon = true;
4028         fc->current_mode = fc->requested_mode;
4029
4030         switch (hw->mac.type) {
4031         case e1000_ich9lan:
4032         case e1000_ich10lan:
4033                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4034                         pba = 14;
4035                         ew32(PBA, pba);
4036                         fc->high_water = 0x2800;
4037                         fc->low_water = fc->high_water - 8;
4038                         break;
4039                 }
4040                 fallthrough;
4041         default:
4042                 hwm = min(((pba << 10) * 9 / 10),
4043                           ((pba << 10) - adapter->max_frame_size));
4044
4045                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4046                 fc->low_water = fc->high_water - 8;
4047                 break;
4048         case e1000_pchlan:
4049                 /* Workaround PCH LOM adapter hangs with certain network
4050                  * loads.  If hangs persist, try disabling Tx flow control.
4051                  */
4052                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4053                         fc->high_water = 0x3500;
4054                         fc->low_water = 0x1500;
4055                 } else {
4056                         fc->high_water = 0x5000;
4057                         fc->low_water = 0x3000;
4058                 }
4059                 fc->refresh_time = 0x1000;
4060                 break;
4061         case e1000_pch2lan:
4062         case e1000_pch_lpt:
4063         case e1000_pch_spt:
4064         case e1000_pch_cnp:
4065         case e1000_pch_tgp:
4066         case e1000_pch_adp:
4067         case e1000_pch_mtp:
4068         case e1000_pch_lnp:
4069                 fc->refresh_time = 0xFFFF;
4070                 fc->pause_time = 0xFFFF;
4071
4072                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4073                         fc->high_water = 0x05C20;
4074                         fc->low_water = 0x05048;
4075                         break;
4076                 }
4077
4078                 pba = 14;
4079                 ew32(PBA, pba);
4080                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4081                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4082                 break;
4083         }
4084
4085         /* Alignment of Tx data is on an arbitrary byte boundary with the
4086          * maximum size per Tx descriptor limited only to the transmit
4087          * allocation of the packet buffer minus 96 bytes with an upper
4088          * limit of 24KB due to receive synchronization limitations.
4089          */
4090         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4091                                        24 << 10);
4092
4093         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4094          * fit in receive buffer.
4095          */
4096         if (adapter->itr_setting & 0x3) {
4097                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4098                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4099                                 dev_info(&adapter->pdev->dev,
4100                                          "Interrupt Throttle Rate off\n");
4101                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4102                                 e1000e_write_itr(adapter, 0);
4103                         }
4104                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4105                         dev_info(&adapter->pdev->dev,
4106                                  "Interrupt Throttle Rate on\n");
4107                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4108                         adapter->itr = 20000;
4109                         e1000e_write_itr(adapter, adapter->itr);
4110                 }
4111         }
4112
4113         if (hw->mac.type >= e1000_pch_spt)
4114                 e1000_flush_desc_rings(adapter);
4115         /* Allow time for pending master requests to run */
4116         mac->ops.reset_hw(hw);
4117
4118         /* For parts with AMT enabled, let the firmware know
4119          * that the network interface is in control
4120          */
4121         if (adapter->flags & FLAG_HAS_AMT)
4122                 e1000e_get_hw_control(adapter);
4123
4124         ew32(WUC, 0);
4125
4126         if (mac->ops.init_hw(hw))
4127                 e_err("Hardware Error\n");
4128
4129         e1000_update_mng_vlan(adapter);
4130
4131         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4132         ew32(VET, ETH_P_8021Q);
4133
4134         e1000e_reset_adaptive(hw);
4135
4136         /* restore systim and hwtstamp settings */
4137         e1000e_systim_reset(adapter);
4138
4139         /* Set EEE advertisement as appropriate */
4140         if (adapter->flags2 & FLAG2_HAS_EEE) {
4141                 s32 ret_val;
4142                 u16 adv_addr;
4143
4144                 switch (hw->phy.type) {
4145                 case e1000_phy_82579:
4146                         adv_addr = I82579_EEE_ADVERTISEMENT;
4147                         break;
4148                 case e1000_phy_i217:
4149                         adv_addr = I217_EEE_ADVERTISEMENT;
4150                         break;
4151                 default:
4152                         dev_err(&adapter->pdev->dev,
4153                                 "Invalid PHY type setting EEE advertisement\n");
4154                         return;
4155                 }
4156
4157                 ret_val = hw->phy.ops.acquire(hw);
4158                 if (ret_val) {
4159                         dev_err(&adapter->pdev->dev,
4160                                 "EEE advertisement - unable to acquire PHY\n");
4161                         return;
4162                 }
4163
4164                 e1000_write_emi_reg_locked(hw, adv_addr,
4165                                            hw->dev_spec.ich8lan.eee_disable ?
4166                                            0 : adapter->eee_advert);
4167
4168                 hw->phy.ops.release(hw);
4169         }
4170
4171         if (!netif_running(adapter->netdev) &&
4172             !test_bit(__E1000_TESTING, &adapter->state))
4173                 e1000_power_down_phy(adapter);
4174
4175         e1000_get_phy_info(hw);
4176
4177         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4178             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4179                 u16 phy_data = 0;
4180                 /* speed up time to link by disabling smart power down, ignore
4181                  * the return value of this function because there is nothing
4182                  * different we would do if it failed
4183                  */
4184                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4185                 phy_data &= ~IGP02E1000_PM_SPD;
4186                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4187         }
4188         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4189                 u32 reg;
4190
4191                 /* Fextnvm7 @ 0xe4[2] = 1 */
4192                 reg = er32(FEXTNVM7);
4193                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4194                 ew32(FEXTNVM7, reg);
4195                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4196                 reg = er32(FEXTNVM9);
4197                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4198                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4199                 ew32(FEXTNVM9, reg);
4200         }
4201
4202 }
4203
4204 /**
4205  * e1000e_trigger_lsc - trigger an LSC interrupt
4206  * @adapter:
4207  *
4208  * Fire a link status change interrupt to start the watchdog.
4209  **/
4210 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4211 {
4212         struct e1000_hw *hw = &adapter->hw;
4213
4214         if (adapter->msix_entries)
4215                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4216         else
4217                 ew32(ICS, E1000_ICS_LSC);
4218 }
4219
4220 void e1000e_up(struct e1000_adapter *adapter)
4221 {
4222         /* hardware has been reset, we need to reload some things */
4223         e1000_configure(adapter);
4224
4225         clear_bit(__E1000_DOWN, &adapter->state);
4226
4227         if (adapter->msix_entries)
4228                 e1000_configure_msix(adapter);
4229         e1000_irq_enable(adapter);
4230
4231         /* Tx queue started by watchdog timer when link is up */
4232
4233         e1000e_trigger_lsc(adapter);
4234 }
4235
4236 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4237 {
4238         struct e1000_hw *hw = &adapter->hw;
4239
4240         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4241                 return;
4242
4243         /* flush pending descriptor writebacks to memory */
4244         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4245         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4246
4247         /* execute the writes immediately */
4248         e1e_flush();
4249
4250         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4251          * write is successful
4252          */
4253         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4254         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4255
4256         /* execute the writes immediately */
4257         e1e_flush();
4258 }
4259
4260 static void e1000e_update_stats(struct e1000_adapter *adapter);
4261
4262 /**
4263  * e1000e_down - quiesce the device and optionally reset the hardware
4264  * @adapter: board private structure
4265  * @reset: boolean flag to reset the hardware or not
4266  */
4267 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4268 {
4269         struct net_device *netdev = adapter->netdev;
4270         struct e1000_hw *hw = &adapter->hw;
4271         u32 tctl, rctl;
4272
4273         /* signal that we're down so the interrupt handler does not
4274          * reschedule our watchdog timer
4275          */
4276         set_bit(__E1000_DOWN, &adapter->state);
4277
4278         netif_carrier_off(netdev);
4279
4280         /* disable receives in the hardware */
4281         rctl = er32(RCTL);
4282         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4283                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4284         /* flush and sleep below */
4285
4286         netif_stop_queue(netdev);
4287
4288         /* disable transmits in the hardware */
4289         tctl = er32(TCTL);
4290         tctl &= ~E1000_TCTL_EN;
4291         ew32(TCTL, tctl);
4292
4293         /* flush both disables and wait for them to finish */
4294         e1e_flush();
4295         usleep_range(10000, 11000);
4296
4297         e1000_irq_disable(adapter);
4298
4299         napi_synchronize(&adapter->napi);
4300
4301         del_timer_sync(&adapter->watchdog_timer);
4302         del_timer_sync(&adapter->phy_info_timer);
4303
4304         spin_lock(&adapter->stats64_lock);
4305         e1000e_update_stats(adapter);
4306         spin_unlock(&adapter->stats64_lock);
4307
4308         e1000e_flush_descriptors(adapter);
4309
4310         adapter->link_speed = 0;
4311         adapter->link_duplex = 0;
4312
4313         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4314         if ((hw->mac.type >= e1000_pch2lan) &&
4315             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4316             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4317                 e_dbg("failed to disable jumbo frame workaround mode\n");
4318
4319         if (!pci_channel_offline(adapter->pdev)) {
4320                 if (reset)
4321                         e1000e_reset(adapter);
4322                 else if (hw->mac.type >= e1000_pch_spt)
4323                         e1000_flush_desc_rings(adapter);
4324         }
4325         e1000_clean_tx_ring(adapter->tx_ring);
4326         e1000_clean_rx_ring(adapter->rx_ring);
4327 }
4328
4329 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4330 {
4331         might_sleep();
4332         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4333                 usleep_range(1000, 1100);
4334         e1000e_down(adapter, true);
4335         e1000e_up(adapter);
4336         clear_bit(__E1000_RESETTING, &adapter->state);
4337 }
4338
4339 /**
4340  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4341  * @hw: pointer to the HW structure
4342  * @systim: PHC time value read, sanitized and returned
4343  * @sts: structure to hold system time before and after reading SYSTIML,
4344  * may be NULL
4345  *
4346  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4347  * check to see that the time is incrementing at a reasonable
4348  * rate and is a multiple of incvalue.
4349  **/
4350 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4351                                   struct ptp_system_timestamp *sts)
4352 {
4353         u64 time_delta, rem, temp;
4354         u64 systim_next;
4355         u32 incvalue;
4356         int i;
4357
4358         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4359         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4360                 /* latch SYSTIMH on read of SYSTIML */
4361                 ptp_read_system_prets(sts);
4362                 systim_next = (u64)er32(SYSTIML);
4363                 ptp_read_system_postts(sts);
4364                 systim_next |= (u64)er32(SYSTIMH) << 32;
4365
4366                 time_delta = systim_next - systim;
4367                 temp = time_delta;
4368                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4369                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4370
4371                 systim = systim_next;
4372
4373                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4374                         break;
4375         }
4376
4377         return systim;
4378 }
4379
4380 /**
4381  * e1000e_read_systim - read SYSTIM register
4382  * @adapter: board private structure
4383  * @sts: structure which will contain system time before and after reading
4384  * SYSTIML, may be NULL
4385  **/
4386 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4387                        struct ptp_system_timestamp *sts)
4388 {
4389         struct e1000_hw *hw = &adapter->hw;
4390         u32 systimel, systimel_2, systimeh;
4391         u64 systim;
4392         /* SYSTIMH latching upon SYSTIML read does not work well.
4393          * This means that if SYSTIML overflows after we read it but before
4394          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4395          * will experience a huge non linear increment in the systime value
4396          * to fix that we test for overflow and if true, we re-read systime.
4397          */
4398         ptp_read_system_prets(sts);
4399         systimel = er32(SYSTIML);
4400         ptp_read_system_postts(sts);
4401         systimeh = er32(SYSTIMH);
4402         /* Is systimel is so large that overflow is possible? */
4403         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4404                 ptp_read_system_prets(sts);
4405                 systimel_2 = er32(SYSTIML);
4406                 ptp_read_system_postts(sts);
4407                 if (systimel > systimel_2) {
4408                         /* There was an overflow, read again SYSTIMH, and use
4409                          * systimel_2
4410                          */
4411                         systimeh = er32(SYSTIMH);
4412                         systimel = systimel_2;
4413                 }
4414         }
4415         systim = (u64)systimel;
4416         systim |= (u64)systimeh << 32;
4417
4418         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4419                 systim = e1000e_sanitize_systim(hw, systim, sts);
4420
4421         return systim;
4422 }
4423
4424 /**
4425  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4426  * @cc: cyclecounter structure
4427  **/
4428 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4429 {
4430         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4431                                                      cc);
4432
4433         return e1000e_read_systim(adapter, NULL);
4434 }
4435
4436 /**
4437  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4438  * @adapter: board private structure to initialize
4439  *
4440  * e1000_sw_init initializes the Adapter private data structure.
4441  * Fields are initialized based on PCI device information and
4442  * OS network device settings (MTU size).
4443  **/
4444 static int e1000_sw_init(struct e1000_adapter *adapter)
4445 {
4446         struct net_device *netdev = adapter->netdev;
4447
4448         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4449         adapter->rx_ps_bsize0 = 128;
4450         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4451         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4452         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4453         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4454
4455         spin_lock_init(&adapter->stats64_lock);
4456
4457         e1000e_set_interrupt_capability(adapter);
4458
4459         if (e1000_alloc_queues(adapter))
4460                 return -ENOMEM;
4461
4462         /* Setup hardware time stamping cyclecounter */
4463         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4464                 adapter->cc.read = e1000e_cyclecounter_read;
4465                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4466                 adapter->cc.mult = 1;
4467                 /* cc.shift set in e1000e_get_base_tininca() */
4468
4469                 spin_lock_init(&adapter->systim_lock);
4470                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4471         }
4472
4473         /* Explicitly disable IRQ since the NIC can be in any state. */
4474         e1000_irq_disable(adapter);
4475
4476         set_bit(__E1000_DOWN, &adapter->state);
4477         return 0;
4478 }
4479
4480 /**
4481  * e1000_intr_msi_test - Interrupt Handler
4482  * @irq: interrupt number
4483  * @data: pointer to a network interface device structure
4484  **/
4485 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4486 {
4487         struct net_device *netdev = data;
4488         struct e1000_adapter *adapter = netdev_priv(netdev);
4489         struct e1000_hw *hw = &adapter->hw;
4490         u32 icr = er32(ICR);
4491
4492         e_dbg("icr is %08X\n", icr);
4493         if (icr & E1000_ICR_RXSEQ) {
4494                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4495                 /* Force memory writes to complete before acknowledging the
4496                  * interrupt is handled.
4497                  */
4498                 wmb();
4499         }
4500
4501         return IRQ_HANDLED;
4502 }
4503
4504 /**
4505  * e1000_test_msi_interrupt - Returns 0 for successful test
4506  * @adapter: board private struct
4507  *
4508  * code flow taken from tg3.c
4509  **/
4510 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4511 {
4512         struct net_device *netdev = adapter->netdev;
4513         struct e1000_hw *hw = &adapter->hw;
4514         int err;
4515
4516         /* poll_enable hasn't been called yet, so don't need disable */
4517         /* clear any pending events */
4518         er32(ICR);
4519
4520         /* free the real vector and request a test handler */
4521         e1000_free_irq(adapter);
4522         e1000e_reset_interrupt_capability(adapter);
4523
4524         /* Assume that the test fails, if it succeeds then the test
4525          * MSI irq handler will unset this flag
4526          */
4527         adapter->flags |= FLAG_MSI_TEST_FAILED;
4528
4529         err = pci_enable_msi(adapter->pdev);
4530         if (err)
4531                 goto msi_test_failed;
4532
4533         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4534                           netdev->name, netdev);
4535         if (err) {
4536                 pci_disable_msi(adapter->pdev);
4537                 goto msi_test_failed;
4538         }
4539
4540         /* Force memory writes to complete before enabling and firing an
4541          * interrupt.
4542          */
4543         wmb();
4544
4545         e1000_irq_enable(adapter);
4546
4547         /* fire an unusual interrupt on the test handler */
4548         ew32(ICS, E1000_ICS_RXSEQ);
4549         e1e_flush();
4550         msleep(100);
4551
4552         e1000_irq_disable(adapter);
4553
4554         rmb();                  /* read flags after interrupt has been fired */
4555
4556         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4557                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4558                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4559         } else {
4560                 e_dbg("MSI interrupt test succeeded!\n");
4561         }
4562
4563         free_irq(adapter->pdev->irq, netdev);
4564         pci_disable_msi(adapter->pdev);
4565
4566 msi_test_failed:
4567         e1000e_set_interrupt_capability(adapter);
4568         return e1000_request_irq(adapter);
4569 }
4570
4571 /**
4572  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4573  * @adapter: board private struct
4574  *
4575  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4576  **/
4577 static int e1000_test_msi(struct e1000_adapter *adapter)
4578 {
4579         int err;
4580         u16 pci_cmd;
4581
4582         if (!(adapter->flags & FLAG_MSI_ENABLED))
4583                 return 0;
4584
4585         /* disable SERR in case the MSI write causes a master abort */
4586         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4587         if (pci_cmd & PCI_COMMAND_SERR)
4588                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4589                                       pci_cmd & ~PCI_COMMAND_SERR);
4590
4591         err = e1000_test_msi_interrupt(adapter);
4592
4593         /* re-enable SERR */
4594         if (pci_cmd & PCI_COMMAND_SERR) {
4595                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4596                 pci_cmd |= PCI_COMMAND_SERR;
4597                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4598         }
4599
4600         return err;
4601 }
4602
4603 /**
4604  * e1000e_open - Called when a network interface is made active
4605  * @netdev: network interface device structure
4606  *
4607  * Returns 0 on success, negative value on failure
4608  *
4609  * The open entry point is called when a network interface is made
4610  * active by the system (IFF_UP).  At this point all resources needed
4611  * for transmit and receive operations are allocated, the interrupt
4612  * handler is registered with the OS, the watchdog timer is started,
4613  * and the stack is notified that the interface is ready.
4614  **/
4615 int e1000e_open(struct net_device *netdev)
4616 {
4617         struct e1000_adapter *adapter = netdev_priv(netdev);
4618         struct e1000_hw *hw = &adapter->hw;
4619         struct pci_dev *pdev = adapter->pdev;
4620         int err;
4621
4622         /* disallow open during test */
4623         if (test_bit(__E1000_TESTING, &adapter->state))
4624                 return -EBUSY;
4625
4626         pm_runtime_get_sync(&pdev->dev);
4627
4628         netif_carrier_off(netdev);
4629         netif_stop_queue(netdev);
4630
4631         /* allocate transmit descriptors */
4632         err = e1000e_setup_tx_resources(adapter->tx_ring);
4633         if (err)
4634                 goto err_setup_tx;
4635
4636         /* allocate receive descriptors */
4637         err = e1000e_setup_rx_resources(adapter->rx_ring);
4638         if (err)
4639                 goto err_setup_rx;
4640
4641         /* If AMT is enabled, let the firmware know that the network
4642          * interface is now open and reset the part to a known state.
4643          */
4644         if (adapter->flags & FLAG_HAS_AMT) {
4645                 e1000e_get_hw_control(adapter);
4646                 e1000e_reset(adapter);
4647         }
4648
4649         e1000e_power_up_phy(adapter);
4650
4651         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4652         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4653                 e1000_update_mng_vlan(adapter);
4654
4655         /* DMA latency requirement to workaround jumbo issue */
4656         cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4657
4658         /* before we allocate an interrupt, we must be ready to handle it.
4659          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4660          * as soon as we call pci_request_irq, so we have to setup our
4661          * clean_rx handler before we do so.
4662          */
4663         e1000_configure(adapter);
4664
4665         err = e1000_request_irq(adapter);
4666         if (err)
4667                 goto err_req_irq;
4668
4669         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4670          * ignore e1000e MSI messages, which means we need to test our MSI
4671          * interrupt now
4672          */
4673         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4674                 err = e1000_test_msi(adapter);
4675                 if (err) {
4676                         e_err("Interrupt allocation failed\n");
4677                         goto err_req_irq;
4678                 }
4679         }
4680
4681         /* From here on the code is the same as e1000e_up() */
4682         clear_bit(__E1000_DOWN, &adapter->state);
4683
4684         napi_enable(&adapter->napi);
4685
4686         e1000_irq_enable(adapter);
4687
4688         adapter->tx_hang_recheck = false;
4689
4690         hw->mac.get_link_status = true;
4691         pm_runtime_put(&pdev->dev);
4692
4693         e1000e_trigger_lsc(adapter);
4694
4695         return 0;
4696
4697 err_req_irq:
4698         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4699         e1000e_release_hw_control(adapter);
4700         e1000_power_down_phy(adapter);
4701         e1000e_free_rx_resources(adapter->rx_ring);
4702 err_setup_rx:
4703         e1000e_free_tx_resources(adapter->tx_ring);
4704 err_setup_tx:
4705         e1000e_reset(adapter);
4706         pm_runtime_put_sync(&pdev->dev);
4707
4708         return err;
4709 }
4710
4711 /**
4712  * e1000e_close - Disables a network interface
4713  * @netdev: network interface device structure
4714  *
4715  * Returns 0, this is not allowed to fail
4716  *
4717  * The close entry point is called when an interface is de-activated
4718  * by the OS.  The hardware is still under the drivers control, but
4719  * needs to be disabled.  A global MAC reset is issued to stop the
4720  * hardware, and all transmit and receive resources are freed.
4721  **/
4722 int e1000e_close(struct net_device *netdev)
4723 {
4724         struct e1000_adapter *adapter = netdev_priv(netdev);
4725         struct pci_dev *pdev = adapter->pdev;
4726         int count = E1000_CHECK_RESET_COUNT;
4727
4728         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4729                 usleep_range(10000, 11000);
4730
4731         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4732
4733         pm_runtime_get_sync(&pdev->dev);
4734
4735         if (netif_device_present(netdev)) {
4736                 e1000e_down(adapter, true);
4737                 e1000_free_irq(adapter);
4738
4739                 /* Link status message must follow this format */
4740                 netdev_info(netdev, "NIC Link is Down\n");
4741         }
4742
4743         napi_disable(&adapter->napi);
4744
4745         e1000e_free_tx_resources(adapter->tx_ring);
4746         e1000e_free_rx_resources(adapter->rx_ring);
4747
4748         /* kill manageability vlan ID if supported, but not if a vlan with
4749          * the same ID is registered on the host OS (let 8021q kill it)
4750          */
4751         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4752                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4753                                        adapter->mng_vlan_id);
4754
4755         /* If AMT is enabled, let the firmware know that the network
4756          * interface is now closed
4757          */
4758         if ((adapter->flags & FLAG_HAS_AMT) &&
4759             !test_bit(__E1000_TESTING, &adapter->state))
4760                 e1000e_release_hw_control(adapter);
4761
4762         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4763
4764         pm_runtime_put_sync(&pdev->dev);
4765
4766         return 0;
4767 }
4768
4769 /**
4770  * e1000_set_mac - Change the Ethernet Address of the NIC
4771  * @netdev: network interface device structure
4772  * @p: pointer to an address structure
4773  *
4774  * Returns 0 on success, negative on failure
4775  **/
4776 static int e1000_set_mac(struct net_device *netdev, void *p)
4777 {
4778         struct e1000_adapter *adapter = netdev_priv(netdev);
4779         struct e1000_hw *hw = &adapter->hw;
4780         struct sockaddr *addr = p;
4781
4782         if (!is_valid_ether_addr(addr->sa_data))
4783                 return -EADDRNOTAVAIL;
4784
4785         eth_hw_addr_set(netdev, addr->sa_data);
4786         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4787
4788         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4789
4790         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4791                 /* activate the work around */
4792                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4793
4794                 /* Hold a copy of the LAA in RAR[14] This is done so that
4795                  * between the time RAR[0] gets clobbered  and the time it
4796                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4797                  * of the RARs and no incoming packets directed to this port
4798                  * are dropped. Eventually the LAA will be in RAR[0] and
4799                  * RAR[14]
4800                  */
4801                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4802                                     adapter->hw.mac.rar_entry_count - 1);
4803         }
4804
4805         return 0;
4806 }
4807
4808 /**
4809  * e1000e_update_phy_task - work thread to update phy
4810  * @work: pointer to our work struct
4811  *
4812  * this worker thread exists because we must acquire a
4813  * semaphore to read the phy, which we could msleep while
4814  * waiting for it, and we can't msleep in a timer.
4815  **/
4816 static void e1000e_update_phy_task(struct work_struct *work)
4817 {
4818         struct e1000_adapter *adapter = container_of(work,
4819                                                      struct e1000_adapter,
4820                                                      update_phy_task);
4821         struct e1000_hw *hw = &adapter->hw;
4822
4823         if (test_bit(__E1000_DOWN, &adapter->state))
4824                 return;
4825
4826         e1000_get_phy_info(hw);
4827
4828         /* Enable EEE on 82579 after link up */
4829         if (hw->phy.type >= e1000_phy_82579)
4830                 e1000_set_eee_pchlan(hw);
4831 }
4832
4833 /**
4834  * e1000_update_phy_info - timre call-back to update PHY info
4835  * @t: pointer to timer_list containing private info adapter
4836  *
4837  * Need to wait a few seconds after link up to get diagnostic information from
4838  * the phy
4839  **/
4840 static void e1000_update_phy_info(struct timer_list *t)
4841 {
4842         struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4843
4844         if (test_bit(__E1000_DOWN, &adapter->state))
4845                 return;
4846
4847         schedule_work(&adapter->update_phy_task);
4848 }
4849
4850 /**
4851  * e1000e_update_phy_stats - Update the PHY statistics counters
4852  * @adapter: board private structure
4853  *
4854  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4855  **/
4856 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4857 {
4858         struct e1000_hw *hw = &adapter->hw;
4859         s32 ret_val;
4860         u16 phy_data;
4861
4862         ret_val = hw->phy.ops.acquire(hw);
4863         if (ret_val)
4864                 return;
4865
4866         /* A page set is expensive so check if already on desired page.
4867          * If not, set to the page with the PHY status registers.
4868          */
4869         hw->phy.addr = 1;
4870         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4871                                            &phy_data);
4872         if (ret_val)
4873                 goto release;
4874         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4875                 ret_val = hw->phy.ops.set_page(hw,
4876                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4877                 if (ret_val)
4878                         goto release;
4879         }
4880
4881         /* Single Collision Count */
4882         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4883         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4884         if (!ret_val)
4885                 adapter->stats.scc += phy_data;
4886
4887         /* Excessive Collision Count */
4888         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4889         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4890         if (!ret_val)
4891                 adapter->stats.ecol += phy_data;
4892
4893         /* Multiple Collision Count */
4894         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4895         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4896         if (!ret_val)
4897                 adapter->stats.mcc += phy_data;
4898
4899         /* Late Collision Count */
4900         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4901         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4902         if (!ret_val)
4903                 adapter->stats.latecol += phy_data;
4904
4905         /* Collision Count - also used for adaptive IFS */
4906         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4907         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4908         if (!ret_val)
4909                 hw->mac.collision_delta = phy_data;
4910
4911         /* Defer Count */
4912         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4913         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4914         if (!ret_val)
4915                 adapter->stats.dc += phy_data;
4916
4917         /* Transmit with no CRS */
4918         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4919         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4920         if (!ret_val)
4921                 adapter->stats.tncrs += phy_data;
4922
4923 release:
4924         hw->phy.ops.release(hw);
4925 }
4926
4927 /**
4928  * e1000e_update_stats - Update the board statistics counters
4929  * @adapter: board private structure
4930  **/
4931 static void e1000e_update_stats(struct e1000_adapter *adapter)
4932 {
4933         struct net_device *netdev = adapter->netdev;
4934         struct e1000_hw *hw = &adapter->hw;
4935         struct pci_dev *pdev = adapter->pdev;
4936
4937         /* Prevent stats update while adapter is being reset, or if the pci
4938          * connection is down.
4939          */
4940         if (adapter->link_speed == 0)
4941                 return;
4942         if (pci_channel_offline(pdev))
4943                 return;
4944
4945         adapter->stats.crcerrs += er32(CRCERRS);
4946         adapter->stats.gprc += er32(GPRC);
4947         adapter->stats.gorc += er32(GORCL);
4948         er32(GORCH);            /* Clear gorc */
4949         adapter->stats.bprc += er32(BPRC);
4950         adapter->stats.mprc += er32(MPRC);
4951         adapter->stats.roc += er32(ROC);
4952
4953         adapter->stats.mpc += er32(MPC);
4954
4955         /* Half-duplex statistics */
4956         if (adapter->link_duplex == HALF_DUPLEX) {
4957                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4958                         e1000e_update_phy_stats(adapter);
4959                 } else {
4960                         adapter->stats.scc += er32(SCC);
4961                         adapter->stats.ecol += er32(ECOL);
4962                         adapter->stats.mcc += er32(MCC);
4963                         adapter->stats.latecol += er32(LATECOL);
4964                         adapter->stats.dc += er32(DC);
4965
4966                         hw->mac.collision_delta = er32(COLC);
4967
4968                         if ((hw->mac.type != e1000_82574) &&
4969                             (hw->mac.type != e1000_82583))
4970                                 adapter->stats.tncrs += er32(TNCRS);
4971                 }
4972                 adapter->stats.colc += hw->mac.collision_delta;
4973         }
4974
4975         adapter->stats.xonrxc += er32(XONRXC);
4976         adapter->stats.xontxc += er32(XONTXC);
4977         adapter->stats.xoffrxc += er32(XOFFRXC);
4978         adapter->stats.xofftxc += er32(XOFFTXC);
4979         adapter->stats.gptc += er32(GPTC);
4980         adapter->stats.gotc += er32(GOTCL);
4981         er32(GOTCH);            /* Clear gotc */
4982         adapter->stats.rnbc += er32(RNBC);
4983         adapter->stats.ruc += er32(RUC);
4984
4985         adapter->stats.mptc += er32(MPTC);
4986         adapter->stats.bptc += er32(BPTC);
4987
4988         /* used for adaptive IFS */
4989
4990         hw->mac.tx_packet_delta = er32(TPT);
4991         adapter->stats.tpt += hw->mac.tx_packet_delta;
4992
4993         adapter->stats.algnerrc += er32(ALGNERRC);
4994         adapter->stats.rxerrc += er32(RXERRC);
4995         adapter->stats.cexterr += er32(CEXTERR);
4996         adapter->stats.tsctc += er32(TSCTC);
4997         adapter->stats.tsctfc += er32(TSCTFC);
4998
4999         /* Fill out the OS statistics structure */
5000         netdev->stats.multicast = adapter->stats.mprc;
5001         netdev->stats.collisions = adapter->stats.colc;
5002
5003         /* Rx Errors */
5004
5005         /* RLEC on some newer hardware can be incorrect so build
5006          * our own version based on RUC and ROC
5007          */
5008         netdev->stats.rx_errors = adapter->stats.rxerrc +
5009             adapter->stats.crcerrs + adapter->stats.algnerrc +
5010             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5011         netdev->stats.rx_length_errors = adapter->stats.ruc +
5012             adapter->stats.roc;
5013         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5014         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5015         netdev->stats.rx_missed_errors = adapter->stats.mpc;
5016
5017         /* Tx Errors */
5018         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5019         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5020         netdev->stats.tx_window_errors = adapter->stats.latecol;
5021         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5022
5023         /* Tx Dropped needs to be maintained elsewhere */
5024
5025         /* Management Stats */
5026         adapter->stats.mgptc += er32(MGTPTC);
5027         adapter->stats.mgprc += er32(MGTPRC);
5028         adapter->stats.mgpdc += er32(MGTPDC);
5029
5030         /* Correctable ECC Errors */
5031         if (hw->mac.type >= e1000_pch_lpt) {
5032                 u32 pbeccsts = er32(PBECCSTS);
5033
5034                 adapter->corr_errors +=
5035                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5036                 adapter->uncorr_errors +=
5037                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5038                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5039         }
5040 }
5041
5042 /**
5043  * e1000_phy_read_status - Update the PHY register status snapshot
5044  * @adapter: board private structure
5045  **/
5046 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5047 {
5048         struct e1000_hw *hw = &adapter->hw;
5049         struct e1000_phy_regs *phy = &adapter->phy_regs;
5050
5051         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5052             (er32(STATUS) & E1000_STATUS_LU) &&
5053             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5054                 int ret_val;
5055
5056                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5057                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5058                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5059                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5060                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5061                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5062                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5063                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5064                 if (ret_val)
5065                         e_warn("Error reading PHY register\n");
5066         } else {
5067                 /* Do not read PHY registers if link is not up
5068                  * Set values to typical power-on defaults
5069                  */
5070                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5071                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5072                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5073                              BMSR_ERCAP);
5074                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5075                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5076                 phy->lpa = 0;
5077                 phy->expansion = EXPANSION_ENABLENPAGE;
5078                 phy->ctrl1000 = ADVERTISE_1000FULL;
5079                 phy->stat1000 = 0;
5080                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5081         }
5082 }
5083
5084 static void e1000_print_link_info(struct e1000_adapter *adapter)
5085 {
5086         struct e1000_hw *hw = &adapter->hw;
5087         u32 ctrl = er32(CTRL);
5088
5089         /* Link status message must follow this format for user tools */
5090         netdev_info(adapter->netdev,
5091                     "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5092                     adapter->link_speed,
5093                     adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5094                     (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5095                     (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5096                     (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5097 }
5098
5099 static bool e1000e_has_link(struct e1000_adapter *adapter)
5100 {
5101         struct e1000_hw *hw = &adapter->hw;
5102         bool link_active = false;
5103         s32 ret_val = 0;
5104
5105         /* get_link_status is set on LSC (link status) interrupt or
5106          * Rx sequence error interrupt.  get_link_status will stay
5107          * true until the check_for_link establishes link
5108          * for copper adapters ONLY
5109          */
5110         switch (hw->phy.media_type) {
5111         case e1000_media_type_copper:
5112                 if (hw->mac.get_link_status) {
5113                         ret_val = hw->mac.ops.check_for_link(hw);
5114                         link_active = !hw->mac.get_link_status;
5115                 } else {
5116                         link_active = true;
5117                 }
5118                 break;
5119         case e1000_media_type_fiber:
5120                 ret_val = hw->mac.ops.check_for_link(hw);
5121                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5122                 break;
5123         case e1000_media_type_internal_serdes:
5124                 ret_val = hw->mac.ops.check_for_link(hw);
5125                 link_active = hw->mac.serdes_has_link;
5126                 break;
5127         default:
5128         case e1000_media_type_unknown:
5129                 break;
5130         }
5131
5132         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5133             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5134                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5135                 e_info("Gigabit has been disabled, downgrading speed\n");
5136         }
5137
5138         return link_active;
5139 }
5140
5141 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5142 {
5143         /* make sure the receive unit is started */
5144         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5145             (adapter->flags & FLAG_RESTART_NOW)) {
5146                 struct e1000_hw *hw = &adapter->hw;
5147                 u32 rctl = er32(RCTL);
5148
5149                 ew32(RCTL, rctl | E1000_RCTL_EN);
5150                 adapter->flags &= ~FLAG_RESTART_NOW;
5151         }
5152 }
5153
5154 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5155 {
5156         struct e1000_hw *hw = &adapter->hw;
5157
5158         /* With 82574 controllers, PHY needs to be checked periodically
5159          * for hung state and reset, if two calls return true
5160          */
5161         if (e1000_check_phy_82574(hw))
5162                 adapter->phy_hang_count++;
5163         else
5164                 adapter->phy_hang_count = 0;
5165
5166         if (adapter->phy_hang_count > 1) {
5167                 adapter->phy_hang_count = 0;
5168                 e_dbg("PHY appears hung - resetting\n");
5169                 schedule_work(&adapter->reset_task);
5170         }
5171 }
5172
5173 /**
5174  * e1000_watchdog - Timer Call-back
5175  * @t: pointer to timer_list containing private info adapter
5176  **/
5177 static void e1000_watchdog(struct timer_list *t)
5178 {
5179         struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5180
5181         /* Do the rest outside of interrupt context */
5182         schedule_work(&adapter->watchdog_task);
5183
5184         /* TODO: make this use queue_delayed_work() */
5185 }
5186
5187 static void e1000_watchdog_task(struct work_struct *work)
5188 {
5189         struct e1000_adapter *adapter = container_of(work,
5190                                                      struct e1000_adapter,
5191                                                      watchdog_task);
5192         struct net_device *netdev = adapter->netdev;
5193         struct e1000_mac_info *mac = &adapter->hw.mac;
5194         struct e1000_phy_info *phy = &adapter->hw.phy;
5195         struct e1000_ring *tx_ring = adapter->tx_ring;
5196         u32 dmoff_exit_timeout = 100, tries = 0;
5197         struct e1000_hw *hw = &adapter->hw;
5198         u32 link, tctl, pcim_state;
5199
5200         if (test_bit(__E1000_DOWN, &adapter->state))
5201                 return;
5202
5203         link = e1000e_has_link(adapter);
5204         if ((netif_carrier_ok(netdev)) && link) {
5205                 /* Cancel scheduled suspend requests. */
5206                 pm_runtime_resume(netdev->dev.parent);
5207
5208                 e1000e_enable_receives(adapter);
5209                 goto link_up;
5210         }
5211
5212         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5213             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5214                 e1000_update_mng_vlan(adapter);
5215
5216         if (link) {
5217                 if (!netif_carrier_ok(netdev)) {
5218                         bool txb2b = true;
5219
5220                         /* Cancel scheduled suspend requests. */
5221                         pm_runtime_resume(netdev->dev.parent);
5222
5223                         /* Checking if MAC is in DMoff state*/
5224                         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
5225                                 pcim_state = er32(STATUS);
5226                                 while (pcim_state & E1000_STATUS_PCIM_STATE) {
5227                                         if (tries++ == dmoff_exit_timeout) {
5228                                                 e_dbg("Error in exiting dmoff\n");
5229                                                 break;
5230                                         }
5231                                         usleep_range(10000, 20000);
5232                                         pcim_state = er32(STATUS);
5233
5234                                         /* Checking if MAC exited DMoff state */
5235                                         if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5236                                                 e1000_phy_hw_reset(&adapter->hw);
5237                                 }
5238                         }
5239
5240                         /* update snapshot of PHY registers on LSC */
5241                         e1000_phy_read_status(adapter);
5242                         mac->ops.get_link_up_info(&adapter->hw,
5243                                                   &adapter->link_speed,
5244                                                   &adapter->link_duplex);
5245                         e1000_print_link_info(adapter);
5246
5247                         /* check if SmartSpeed worked */
5248                         e1000e_check_downshift(hw);
5249                         if (phy->speed_downgraded)
5250                                 netdev_warn(netdev,
5251                                             "Link Speed was downgraded by SmartSpeed\n");
5252
5253                         /* On supported PHYs, check for duplex mismatch only
5254                          * if link has autonegotiated at 10/100 half
5255                          */
5256                         if ((hw->phy.type == e1000_phy_igp_3 ||
5257                              hw->phy.type == e1000_phy_bm) &&
5258                             hw->mac.autoneg &&
5259                             (adapter->link_speed == SPEED_10 ||
5260                              adapter->link_speed == SPEED_100) &&
5261                             (adapter->link_duplex == HALF_DUPLEX)) {
5262                                 u16 autoneg_exp;
5263
5264                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5265
5266                                 if (!(autoneg_exp & EXPANSION_NWAY))
5267                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5268                         }
5269
5270                         /* adjust timeout factor according to speed/duplex */
5271                         adapter->tx_timeout_factor = 1;
5272                         switch (adapter->link_speed) {
5273                         case SPEED_10:
5274                                 txb2b = false;
5275                                 adapter->tx_timeout_factor = 16;
5276                                 break;
5277                         case SPEED_100:
5278                                 txb2b = false;
5279                                 adapter->tx_timeout_factor = 10;
5280                                 break;
5281                         }
5282
5283                         /* workaround: re-program speed mode bit after
5284                          * link-up event
5285                          */
5286                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5287                             !txb2b) {
5288                                 u32 tarc0;
5289
5290                                 tarc0 = er32(TARC(0));
5291                                 tarc0 &= ~SPEED_MODE_BIT;
5292                                 ew32(TARC(0), tarc0);
5293                         }
5294
5295                         /* disable TSO for pcie and 10/100 speeds, to avoid
5296                          * some hardware issues
5297                          */
5298                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5299                                 switch (adapter->link_speed) {
5300                                 case SPEED_10:
5301                                 case SPEED_100:
5302                                         e_info("10/100 speed: disabling TSO\n");
5303                                         netdev->features &= ~NETIF_F_TSO;
5304                                         netdev->features &= ~NETIF_F_TSO6;
5305                                         break;
5306                                 case SPEED_1000:
5307                                         netdev->features |= NETIF_F_TSO;
5308                                         netdev->features |= NETIF_F_TSO6;
5309                                         break;
5310                                 default:
5311                                         /* oops */
5312                                         break;
5313                                 }
5314                                 if (hw->mac.type == e1000_pch_spt) {
5315                                         netdev->features &= ~NETIF_F_TSO;
5316                                         netdev->features &= ~NETIF_F_TSO6;
5317                                 }
5318                         }
5319
5320                         /* enable transmits in the hardware, need to do this
5321                          * after setting TARC(0)
5322                          */
5323                         tctl = er32(TCTL);
5324                         tctl |= E1000_TCTL_EN;
5325                         ew32(TCTL, tctl);
5326
5327                         /* Perform any post-link-up configuration before
5328                          * reporting link up.
5329                          */
5330                         if (phy->ops.cfg_on_link_up)
5331                                 phy->ops.cfg_on_link_up(hw);
5332
5333                         netif_wake_queue(netdev);
5334                         netif_carrier_on(netdev);
5335
5336                         if (!test_bit(__E1000_DOWN, &adapter->state))
5337                                 mod_timer(&adapter->phy_info_timer,
5338                                           round_jiffies(jiffies + 2 * HZ));
5339                 }
5340         } else {
5341                 if (netif_carrier_ok(netdev)) {
5342                         adapter->link_speed = 0;
5343                         adapter->link_duplex = 0;
5344                         /* Link status message must follow this format */
5345                         netdev_info(netdev, "NIC Link is Down\n");
5346                         netif_carrier_off(netdev);
5347                         netif_stop_queue(netdev);
5348                         if (!test_bit(__E1000_DOWN, &adapter->state))
5349                                 mod_timer(&adapter->phy_info_timer,
5350                                           round_jiffies(jiffies + 2 * HZ));
5351
5352                         /* 8000ES2LAN requires a Rx packet buffer work-around
5353                          * on link down event; reset the controller to flush
5354                          * the Rx packet buffer.
5355                          */
5356                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5357                                 adapter->flags |= FLAG_RESTART_NOW;
5358                         else
5359                                 pm_schedule_suspend(netdev->dev.parent,
5360                                                     LINK_TIMEOUT);
5361                 }
5362         }
5363
5364 link_up:
5365         spin_lock(&adapter->stats64_lock);
5366         e1000e_update_stats(adapter);
5367
5368         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5369         adapter->tpt_old = adapter->stats.tpt;
5370         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5371         adapter->colc_old = adapter->stats.colc;
5372
5373         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5374         adapter->gorc_old = adapter->stats.gorc;
5375         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5376         adapter->gotc_old = adapter->stats.gotc;
5377         spin_unlock(&adapter->stats64_lock);
5378
5379         /* If the link is lost the controller stops DMA, but
5380          * if there is queued Tx work it cannot be done.  So
5381          * reset the controller to flush the Tx packet buffers.
5382          */
5383         if (!netif_carrier_ok(netdev) &&
5384             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5385                 adapter->flags |= FLAG_RESTART_NOW;
5386
5387         /* If reset is necessary, do it outside of interrupt context. */
5388         if (adapter->flags & FLAG_RESTART_NOW) {
5389                 schedule_work(&adapter->reset_task);
5390                 /* return immediately since reset is imminent */
5391                 return;
5392         }
5393
5394         e1000e_update_adaptive(&adapter->hw);
5395
5396         /* Simple mode for Interrupt Throttle Rate (ITR) */
5397         if (adapter->itr_setting == 4) {
5398                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5399                  * Total asymmetrical Tx or Rx gets ITR=8000;
5400                  * everyone else is between 2000-8000.
5401                  */
5402                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5403                 u32 dif = (adapter->gotc > adapter->gorc ?
5404                            adapter->gotc - adapter->gorc :
5405                            adapter->gorc - adapter->gotc) / 10000;
5406                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5407
5408                 e1000e_write_itr(adapter, itr);
5409         }
5410
5411         /* Cause software interrupt to ensure Rx ring is cleaned */
5412         if (adapter->msix_entries)
5413                 ew32(ICS, adapter->rx_ring->ims_val);
5414         else
5415                 ew32(ICS, E1000_ICS_RXDMT0);
5416
5417         /* flush pending descriptors to memory before detecting Tx hang */
5418         e1000e_flush_descriptors(adapter);
5419
5420         /* Force detection of hung controller every watchdog period */
5421         adapter->detect_tx_hung = true;
5422
5423         /* With 82571 controllers, LAA may be overwritten due to controller
5424          * reset from the other port. Set the appropriate LAA in RAR[0]
5425          */
5426         if (e1000e_get_laa_state_82571(hw))
5427                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5428
5429         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5430                 e1000e_check_82574_phy_workaround(adapter);
5431
5432         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5433         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5434                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5435                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5436                         er32(RXSTMPH);
5437                         adapter->rx_hwtstamp_cleared++;
5438                 } else {
5439                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5440                 }
5441         }
5442
5443         /* Reset the timer */
5444         if (!test_bit(__E1000_DOWN, &adapter->state))
5445                 mod_timer(&adapter->watchdog_timer,
5446                           round_jiffies(jiffies + 2 * HZ));
5447 }
5448
5449 #define E1000_TX_FLAGS_CSUM             0x00000001
5450 #define E1000_TX_FLAGS_VLAN             0x00000002
5451 #define E1000_TX_FLAGS_TSO              0x00000004
5452 #define E1000_TX_FLAGS_IPV4             0x00000008
5453 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5454 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5455 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5456 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5457
5458 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5459                      __be16 protocol)
5460 {
5461         struct e1000_context_desc *context_desc;
5462         struct e1000_buffer *buffer_info;
5463         unsigned int i;
5464         u32 cmd_length = 0;
5465         u16 ipcse = 0, mss;
5466         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5467         int err;
5468
5469         if (!skb_is_gso(skb))
5470                 return 0;
5471
5472         err = skb_cow_head(skb, 0);
5473         if (err < 0)
5474                 return err;
5475
5476         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5477         mss = skb_shinfo(skb)->gso_size;
5478         if (protocol == htons(ETH_P_IP)) {
5479                 struct iphdr *iph = ip_hdr(skb);
5480                 iph->tot_len = 0;
5481                 iph->check = 0;
5482                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5483                                                          0, IPPROTO_TCP, 0);
5484                 cmd_length = E1000_TXD_CMD_IP;
5485                 ipcse = skb_transport_offset(skb) - 1;
5486         } else if (skb_is_gso_v6(skb)) {
5487                 tcp_v6_gso_csum_prep(skb);
5488                 ipcse = 0;
5489         }
5490         ipcss = skb_network_offset(skb);
5491         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5492         tucss = skb_transport_offset(skb);
5493         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5494
5495         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5496                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5497
5498         i = tx_ring->next_to_use;
5499         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5500         buffer_info = &tx_ring->buffer_info[i];
5501
5502         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5503         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5504         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5505         context_desc->upper_setup.tcp_fields.tucss = tucss;
5506         context_desc->upper_setup.tcp_fields.tucso = tucso;
5507         context_desc->upper_setup.tcp_fields.tucse = 0;
5508         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5509         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5510         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5511
5512         buffer_info->time_stamp = jiffies;
5513         buffer_info->next_to_watch = i;
5514
5515         i++;
5516         if (i == tx_ring->count)
5517                 i = 0;
5518         tx_ring->next_to_use = i;
5519
5520         return 1;
5521 }
5522
5523 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5524                           __be16 protocol)
5525 {
5526         struct e1000_adapter *adapter = tx_ring->adapter;
5527         struct e1000_context_desc *context_desc;
5528         struct e1000_buffer *buffer_info;
5529         unsigned int i;
5530         u8 css;
5531         u32 cmd_len = E1000_TXD_CMD_DEXT;
5532
5533         if (skb->ip_summed != CHECKSUM_PARTIAL)
5534                 return false;
5535
5536         switch (protocol) {
5537         case cpu_to_be16(ETH_P_IP):
5538                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5539                         cmd_len |= E1000_TXD_CMD_TCP;
5540                 break;
5541         case cpu_to_be16(ETH_P_IPV6):
5542                 /* XXX not handling all IPV6 headers */
5543                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5544                         cmd_len |= E1000_TXD_CMD_TCP;
5545                 break;
5546         default:
5547                 if (unlikely(net_ratelimit()))
5548                         e_warn("checksum_partial proto=%x!\n",
5549                                be16_to_cpu(protocol));
5550                 break;
5551         }
5552
5553         css = skb_checksum_start_offset(skb);
5554
5555         i = tx_ring->next_to_use;
5556         buffer_info = &tx_ring->buffer_info[i];
5557         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5558
5559         context_desc->lower_setup.ip_config = 0;
5560         context_desc->upper_setup.tcp_fields.tucss = css;
5561         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5562         context_desc->upper_setup.tcp_fields.tucse = 0;
5563         context_desc->tcp_seg_setup.data = 0;
5564         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5565
5566         buffer_info->time_stamp = jiffies;
5567         buffer_info->next_to_watch = i;
5568
5569         i++;
5570         if (i == tx_ring->count)
5571                 i = 0;
5572         tx_ring->next_to_use = i;
5573
5574         return true;
5575 }
5576
5577 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5578                         unsigned int first, unsigned int max_per_txd,
5579                         unsigned int nr_frags)
5580 {
5581         struct e1000_adapter *adapter = tx_ring->adapter;
5582         struct pci_dev *pdev = adapter->pdev;
5583         struct e1000_buffer *buffer_info;
5584         unsigned int len = skb_headlen(skb);
5585         unsigned int offset = 0, size, count = 0, i;
5586         unsigned int f, bytecount, segs;
5587
5588         i = tx_ring->next_to_use;
5589
5590         while (len) {
5591                 buffer_info = &tx_ring->buffer_info[i];
5592                 size = min(len, max_per_txd);
5593
5594                 buffer_info->length = size;
5595                 buffer_info->time_stamp = jiffies;
5596                 buffer_info->next_to_watch = i;
5597                 buffer_info->dma = dma_map_single(&pdev->dev,
5598                                                   skb->data + offset,
5599                                                   size, DMA_TO_DEVICE);
5600                 buffer_info->mapped_as_page = false;
5601                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5602                         goto dma_error;
5603
5604                 len -= size;
5605                 offset += size;
5606                 count++;
5607
5608                 if (len) {
5609                         i++;
5610                         if (i == tx_ring->count)
5611                                 i = 0;
5612                 }
5613         }
5614
5615         for (f = 0; f < nr_frags; f++) {
5616                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5617
5618                 len = skb_frag_size(frag);
5619                 offset = 0;
5620
5621                 while (len) {
5622                         i++;
5623                         if (i == tx_ring->count)
5624                                 i = 0;
5625
5626                         buffer_info = &tx_ring->buffer_info[i];
5627                         size = min(len, max_per_txd);
5628
5629                         buffer_info->length = size;
5630                         buffer_info->time_stamp = jiffies;
5631                         buffer_info->next_to_watch = i;
5632                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5633                                                             offset, size,
5634                                                             DMA_TO_DEVICE);
5635                         buffer_info->mapped_as_page = true;
5636                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5637                                 goto dma_error;
5638
5639                         len -= size;
5640                         offset += size;
5641                         count++;
5642                 }
5643         }
5644
5645         segs = skb_shinfo(skb)->gso_segs ? : 1;
5646         /* multiply data chunks by size of headers */
5647         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5648
5649         tx_ring->buffer_info[i].skb = skb;
5650         tx_ring->buffer_info[i].segs = segs;
5651         tx_ring->buffer_info[i].bytecount = bytecount;
5652         tx_ring->buffer_info[first].next_to_watch = i;
5653
5654         return count;
5655
5656 dma_error:
5657         dev_err(&pdev->dev, "Tx DMA map failed\n");
5658         buffer_info->dma = 0;
5659         if (count)
5660                 count--;
5661
5662         while (count--) {
5663                 if (i == 0)
5664                         i += tx_ring->count;
5665                 i--;
5666                 buffer_info = &tx_ring->buffer_info[i];
5667                 e1000_put_txbuf(tx_ring, buffer_info, true);
5668         }
5669
5670         return 0;
5671 }
5672
5673 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5674 {
5675         struct e1000_adapter *adapter = tx_ring->adapter;
5676         struct e1000_tx_desc *tx_desc = NULL;
5677         struct e1000_buffer *buffer_info;
5678         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5679         unsigned int i;
5680
5681         if (tx_flags & E1000_TX_FLAGS_TSO) {
5682                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5683                     E1000_TXD_CMD_TSE;
5684                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5685
5686                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5687                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5688         }
5689
5690         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5691                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5692                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5693         }
5694
5695         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5696                 txd_lower |= E1000_TXD_CMD_VLE;
5697                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5698         }
5699
5700         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5701                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5702
5703         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5704                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5705                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5706         }
5707
5708         i = tx_ring->next_to_use;
5709
5710         do {
5711                 buffer_info = &tx_ring->buffer_info[i];
5712                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5713                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5714                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5715                                                   buffer_info->length);
5716                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5717
5718                 i++;
5719                 if (i == tx_ring->count)
5720                         i = 0;
5721         } while (--count > 0);
5722
5723         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5724
5725         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5726         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5727                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5728
5729         /* Force memory writes to complete before letting h/w
5730          * know there are new descriptors to fetch.  (Only
5731          * applicable for weak-ordered memory model archs,
5732          * such as IA-64).
5733          */
5734         wmb();
5735
5736         tx_ring->next_to_use = i;
5737 }
5738
5739 #define MINIMUM_DHCP_PACKET_SIZE 282
5740 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5741                                     struct sk_buff *skb)
5742 {
5743         struct e1000_hw *hw = &adapter->hw;
5744         u16 length, offset;
5745
5746         if (skb_vlan_tag_present(skb) &&
5747             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5748               (adapter->hw.mng_cookie.status &
5749                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5750                 return 0;
5751
5752         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5753                 return 0;
5754
5755         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5756                 return 0;
5757
5758         {
5759                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5760                 struct udphdr *udp;
5761
5762                 if (ip->protocol != IPPROTO_UDP)
5763                         return 0;
5764
5765                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5766                 if (ntohs(udp->dest) != 67)
5767                         return 0;
5768
5769                 offset = (u8 *)udp + 8 - skb->data;
5770                 length = skb->len - offset;
5771                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5772         }
5773
5774         return 0;
5775 }
5776
5777 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5778 {
5779         struct e1000_adapter *adapter = tx_ring->adapter;
5780
5781         netif_stop_queue(adapter->netdev);
5782         /* Herbert's original patch had:
5783          *  smp_mb__after_netif_stop_queue();
5784          * but since that doesn't exist yet, just open code it.
5785          */
5786         smp_mb();
5787
5788         /* We need to check again in a case another CPU has just
5789          * made room available.
5790          */
5791         if (e1000_desc_unused(tx_ring) < size)
5792                 return -EBUSY;
5793
5794         /* A reprieve! */
5795         netif_start_queue(adapter->netdev);
5796         ++adapter->restart_queue;
5797         return 0;
5798 }
5799
5800 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5801 {
5802         BUG_ON(size > tx_ring->count);
5803
5804         if (e1000_desc_unused(tx_ring) >= size)
5805                 return 0;
5806         return __e1000_maybe_stop_tx(tx_ring, size);
5807 }
5808
5809 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5810                                     struct net_device *netdev)
5811 {
5812         struct e1000_adapter *adapter = netdev_priv(netdev);
5813         struct e1000_ring *tx_ring = adapter->tx_ring;
5814         unsigned int first;
5815         unsigned int tx_flags = 0;
5816         unsigned int len = skb_headlen(skb);
5817         unsigned int nr_frags;
5818         unsigned int mss;
5819         int count = 0;
5820         int tso;
5821         unsigned int f;
5822         __be16 protocol = vlan_get_protocol(skb);
5823
5824         if (test_bit(__E1000_DOWN, &adapter->state)) {
5825                 dev_kfree_skb_any(skb);
5826                 return NETDEV_TX_OK;
5827         }
5828
5829         if (skb->len <= 0) {
5830                 dev_kfree_skb_any(skb);
5831                 return NETDEV_TX_OK;
5832         }
5833
5834         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5835          * pad skb in order to meet this minimum size requirement
5836          */
5837         if (skb_put_padto(skb, 17))
5838                 return NETDEV_TX_OK;
5839
5840         mss = skb_shinfo(skb)->gso_size;
5841         if (mss) {
5842                 u8 hdr_len;
5843
5844                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5845                  * points to just header, pull a few bytes of payload from
5846                  * frags into skb->data
5847                  */
5848                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5849                 /* we do this workaround for ES2LAN, but it is un-necessary,
5850                  * avoiding it could save a lot of cycles
5851                  */
5852                 if (skb->data_len && (hdr_len == len)) {
5853                         unsigned int pull_size;
5854
5855                         pull_size = min_t(unsigned int, 4, skb->data_len);
5856                         if (!__pskb_pull_tail(skb, pull_size)) {
5857                                 e_err("__pskb_pull_tail failed.\n");
5858                                 dev_kfree_skb_any(skb);
5859                                 return NETDEV_TX_OK;
5860                         }
5861                         len = skb_headlen(skb);
5862                 }
5863         }
5864
5865         /* reserve a descriptor for the offload context */
5866         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5867                 count++;
5868         count++;
5869
5870         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5871
5872         nr_frags = skb_shinfo(skb)->nr_frags;
5873         for (f = 0; f < nr_frags; f++)
5874                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5875                                       adapter->tx_fifo_limit);
5876
5877         if (adapter->hw.mac.tx_pkt_filtering)
5878                 e1000_transfer_dhcp_info(adapter, skb);
5879
5880         /* need: count + 2 desc gap to keep tail from touching
5881          * head, otherwise try next time
5882          */
5883         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5884                 return NETDEV_TX_BUSY;
5885
5886         if (skb_vlan_tag_present(skb)) {
5887                 tx_flags |= E1000_TX_FLAGS_VLAN;
5888                 tx_flags |= (skb_vlan_tag_get(skb) <<
5889                              E1000_TX_FLAGS_VLAN_SHIFT);
5890         }
5891
5892         first = tx_ring->next_to_use;
5893
5894         tso = e1000_tso(tx_ring, skb, protocol);
5895         if (tso < 0) {
5896                 dev_kfree_skb_any(skb);
5897                 return NETDEV_TX_OK;
5898         }
5899
5900         if (tso)
5901                 tx_flags |= E1000_TX_FLAGS_TSO;
5902         else if (e1000_tx_csum(tx_ring, skb, protocol))
5903                 tx_flags |= E1000_TX_FLAGS_CSUM;
5904
5905         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5906          * 82571 hardware supports TSO capabilities for IPv6 as well...
5907          * no longer assume, we must.
5908          */
5909         if (protocol == htons(ETH_P_IP))
5910                 tx_flags |= E1000_TX_FLAGS_IPV4;
5911
5912         if (unlikely(skb->no_fcs))
5913                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5914
5915         /* if count is 0 then mapping error has occurred */
5916         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5917                              nr_frags);
5918         if (count) {
5919                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5920                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5921                         if (!adapter->tx_hwtstamp_skb) {
5922                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5923                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5924                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5925                                 adapter->tx_hwtstamp_start = jiffies;
5926                                 schedule_work(&adapter->tx_hwtstamp_work);
5927                         } else {
5928                                 adapter->tx_hwtstamp_skipped++;
5929                         }
5930                 }
5931
5932                 skb_tx_timestamp(skb);
5933
5934                 netdev_sent_queue(netdev, skb->len);
5935                 e1000_tx_queue(tx_ring, tx_flags, count);
5936                 /* Make sure there is space in the ring for the next send. */
5937                 e1000_maybe_stop_tx(tx_ring,
5938                                     (MAX_SKB_FRAGS *
5939                                      DIV_ROUND_UP(PAGE_SIZE,
5940                                                   adapter->tx_fifo_limit) + 2));
5941
5942                 if (!netdev_xmit_more() ||
5943                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5944                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5945                                 e1000e_update_tdt_wa(tx_ring,
5946                                                      tx_ring->next_to_use);
5947                         else
5948                                 writel(tx_ring->next_to_use, tx_ring->tail);
5949                 }
5950         } else {
5951                 dev_kfree_skb_any(skb);
5952                 tx_ring->buffer_info[first].time_stamp = 0;
5953                 tx_ring->next_to_use = first;
5954         }
5955
5956         return NETDEV_TX_OK;
5957 }
5958
5959 /**
5960  * e1000_tx_timeout - Respond to a Tx Hang
5961  * @netdev: network interface device structure
5962  * @txqueue: index of the hung queue (unused)
5963  **/
5964 static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
5965 {
5966         struct e1000_adapter *adapter = netdev_priv(netdev);
5967
5968         /* Do the reset outside of interrupt context */
5969         adapter->tx_timeout_count++;
5970         schedule_work(&adapter->reset_task);
5971 }
5972
5973 static void e1000_reset_task(struct work_struct *work)
5974 {
5975         struct e1000_adapter *adapter;
5976         adapter = container_of(work, struct e1000_adapter, reset_task);
5977
5978         rtnl_lock();
5979         /* don't run the task if already down */
5980         if (test_bit(__E1000_DOWN, &adapter->state)) {
5981                 rtnl_unlock();
5982                 return;
5983         }
5984
5985         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5986                 e1000e_dump(adapter);
5987                 e_err("Reset adapter unexpectedly\n");
5988         }
5989         e1000e_reinit_locked(adapter);
5990         rtnl_unlock();
5991 }
5992
5993 /**
5994  * e1000e_get_stats64 - Get System Network Statistics
5995  * @netdev: network interface device structure
5996  * @stats: rtnl_link_stats64 pointer
5997  *
5998  * Returns the address of the device statistics structure.
5999  **/
6000 void e1000e_get_stats64(struct net_device *netdev,
6001                         struct rtnl_link_stats64 *stats)
6002 {
6003         struct e1000_adapter *adapter = netdev_priv(netdev);
6004
6005         spin_lock(&adapter->stats64_lock);
6006         e1000e_update_stats(adapter);
6007         /* Fill out the OS statistics structure */
6008         stats->rx_bytes = adapter->stats.gorc;
6009         stats->rx_packets = adapter->stats.gprc;
6010         stats->tx_bytes = adapter->stats.gotc;
6011         stats->tx_packets = adapter->stats.gptc;
6012         stats->multicast = adapter->stats.mprc;
6013         stats->collisions = adapter->stats.colc;
6014
6015         /* Rx Errors */
6016
6017         /* RLEC on some newer hardware can be incorrect so build
6018          * our own version based on RUC and ROC
6019          */
6020         stats->rx_errors = adapter->stats.rxerrc +
6021             adapter->stats.crcerrs + adapter->stats.algnerrc +
6022             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6023         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6024         stats->rx_crc_errors = adapter->stats.crcerrs;
6025         stats->rx_frame_errors = adapter->stats.algnerrc;
6026         stats->rx_missed_errors = adapter->stats.mpc;
6027
6028         /* Tx Errors */
6029         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6030         stats->tx_aborted_errors = adapter->stats.ecol;
6031         stats->tx_window_errors = adapter->stats.latecol;
6032         stats->tx_carrier_errors = adapter->stats.tncrs;
6033
6034         /* Tx Dropped needs to be maintained elsewhere */
6035
6036         spin_unlock(&adapter->stats64_lock);
6037 }
6038
6039 /**
6040  * e1000_change_mtu - Change the Maximum Transfer Unit
6041  * @netdev: network interface device structure
6042  * @new_mtu: new value for maximum frame size
6043  *
6044  * Returns 0 on success, negative on failure
6045  **/
6046 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6047 {
6048         struct e1000_adapter *adapter = netdev_priv(netdev);
6049         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6050
6051         /* Jumbo frame support */
6052         if ((new_mtu > ETH_DATA_LEN) &&
6053             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6054                 e_err("Jumbo Frames not supported.\n");
6055                 return -EINVAL;
6056         }
6057
6058         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6059         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6060             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6061             (new_mtu > ETH_DATA_LEN)) {
6062                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6063                 return -EINVAL;
6064         }
6065
6066         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6067                 usleep_range(1000, 1100);
6068         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6069         adapter->max_frame_size = max_frame;
6070         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6071                    netdev->mtu, new_mtu);
6072         netdev->mtu = new_mtu;
6073
6074         pm_runtime_get_sync(netdev->dev.parent);
6075
6076         if (netif_running(netdev))
6077                 e1000e_down(adapter, true);
6078
6079         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6080          * means we reserve 2 more, this pushes us to allocate from the next
6081          * larger slab size.
6082          * i.e. RXBUFFER_2048 --> size-4096 slab
6083          * However with the new *_jumbo_rx* routines, jumbo receives will use
6084          * fragmented skbs
6085          */
6086
6087         if (max_frame <= 2048)
6088                 adapter->rx_buffer_len = 2048;
6089         else
6090                 adapter->rx_buffer_len = 4096;
6091
6092         /* adjust allocation if LPE protects us, and we aren't using SBP */
6093         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6094                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6095
6096         if (netif_running(netdev))
6097                 e1000e_up(adapter);
6098         else
6099                 e1000e_reset(adapter);
6100
6101         pm_runtime_put_sync(netdev->dev.parent);
6102
6103         clear_bit(__E1000_RESETTING, &adapter->state);
6104
6105         return 0;
6106 }
6107
6108 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6109                            int cmd)
6110 {
6111         struct e1000_adapter *adapter = netdev_priv(netdev);
6112         struct mii_ioctl_data *data = if_mii(ifr);
6113
6114         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6115                 return -EOPNOTSUPP;
6116
6117         switch (cmd) {
6118         case SIOCGMIIPHY:
6119                 data->phy_id = adapter->hw.phy.addr;
6120                 break;
6121         case SIOCGMIIREG:
6122                 e1000_phy_read_status(adapter);
6123
6124                 switch (data->reg_num & 0x1F) {
6125                 case MII_BMCR:
6126                         data->val_out = adapter->phy_regs.bmcr;
6127                         break;
6128                 case MII_BMSR:
6129                         data->val_out = adapter->phy_regs.bmsr;
6130                         break;
6131                 case MII_PHYSID1:
6132                         data->val_out = (adapter->hw.phy.id >> 16);
6133                         break;
6134                 case MII_PHYSID2:
6135                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6136                         break;
6137                 case MII_ADVERTISE:
6138                         data->val_out = adapter->phy_regs.advertise;
6139                         break;
6140                 case MII_LPA:
6141                         data->val_out = adapter->phy_regs.lpa;
6142                         break;
6143                 case MII_EXPANSION:
6144                         data->val_out = adapter->phy_regs.expansion;
6145                         break;
6146                 case MII_CTRL1000:
6147                         data->val_out = adapter->phy_regs.ctrl1000;
6148                         break;
6149                 case MII_STAT1000:
6150                         data->val_out = adapter->phy_regs.stat1000;
6151                         break;
6152                 case MII_ESTATUS:
6153                         data->val_out = adapter->phy_regs.estatus;
6154                         break;
6155                 default:
6156                         return -EIO;
6157                 }
6158                 break;
6159         case SIOCSMIIREG:
6160         default:
6161                 return -EOPNOTSUPP;
6162         }
6163         return 0;
6164 }
6165
6166 /**
6167  * e1000e_hwtstamp_set - control hardware time stamping
6168  * @netdev: network interface device structure
6169  * @ifr: interface request
6170  *
6171  * Outgoing time stamping can be enabled and disabled. Play nice and
6172  * disable it when requested, although it shouldn't cause any overhead
6173  * when no packet needs it. At most one packet in the queue may be
6174  * marked for time stamping, otherwise it would be impossible to tell
6175  * for sure to which packet the hardware time stamp belongs.
6176  *
6177  * Incoming time stamping has to be configured via the hardware filters.
6178  * Not all combinations are supported, in particular event type has to be
6179  * specified. Matching the kind of event packet is not supported, with the
6180  * exception of "all V2 events regardless of level 2 or 4".
6181  **/
6182 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6183 {
6184         struct e1000_adapter *adapter = netdev_priv(netdev);
6185         struct hwtstamp_config config;
6186         int ret_val;
6187
6188         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6189                 return -EFAULT;
6190
6191         ret_val = e1000e_config_hwtstamp(adapter, &config);
6192         if (ret_val)
6193                 return ret_val;
6194
6195         switch (config.rx_filter) {
6196         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6197         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6198         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6199         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6200         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6201         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6202                 /* With V2 type filters which specify a Sync or Delay Request,
6203                  * Path Delay Request/Response messages are also time stamped
6204                  * by hardware so notify the caller the requested packets plus
6205                  * some others are time stamped.
6206                  */
6207                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6208                 break;
6209         default:
6210                 break;
6211         }
6212
6213         return copy_to_user(ifr->ifr_data, &config,
6214                             sizeof(config)) ? -EFAULT : 0;
6215 }
6216
6217 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6218 {
6219         struct e1000_adapter *adapter = netdev_priv(netdev);
6220
6221         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6222                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6223 }
6224
6225 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6226 {
6227         switch (cmd) {
6228         case SIOCGMIIPHY:
6229         case SIOCGMIIREG:
6230         case SIOCSMIIREG:
6231                 return e1000_mii_ioctl(netdev, ifr, cmd);
6232         case SIOCSHWTSTAMP:
6233                 return e1000e_hwtstamp_set(netdev, ifr);
6234         case SIOCGHWTSTAMP:
6235                 return e1000e_hwtstamp_get(netdev, ifr);
6236         default:
6237                 return -EOPNOTSUPP;
6238         }
6239 }
6240
6241 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6242 {
6243         struct e1000_hw *hw = &adapter->hw;
6244         u32 i, mac_reg, wuc;
6245         u16 phy_reg, wuc_enable;
6246         int retval;
6247
6248         /* copy MAC RARs to PHY RARs */
6249         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6250
6251         retval = hw->phy.ops.acquire(hw);
6252         if (retval) {
6253                 e_err("Could not acquire PHY\n");
6254                 return retval;
6255         }
6256
6257         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6258         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6259         if (retval)
6260                 goto release;
6261
6262         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6263         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6264                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6265                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6266                                            (u16)(mac_reg & 0xFFFF));
6267                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6268                                            (u16)((mac_reg >> 16) & 0xFFFF));
6269         }
6270
6271         /* configure PHY Rx Control register */
6272         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6273         mac_reg = er32(RCTL);
6274         if (mac_reg & E1000_RCTL_UPE)
6275                 phy_reg |= BM_RCTL_UPE;
6276         if (mac_reg & E1000_RCTL_MPE)
6277                 phy_reg |= BM_RCTL_MPE;
6278         phy_reg &= ~(BM_RCTL_MO_MASK);
6279         if (mac_reg & E1000_RCTL_MO_3)
6280                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6281                             << BM_RCTL_MO_SHIFT);
6282         if (mac_reg & E1000_RCTL_BAM)
6283                 phy_reg |= BM_RCTL_BAM;
6284         if (mac_reg & E1000_RCTL_PMCF)
6285                 phy_reg |= BM_RCTL_PMCF;
6286         mac_reg = er32(CTRL);
6287         if (mac_reg & E1000_CTRL_RFCE)
6288                 phy_reg |= BM_RCTL_RFCE;
6289         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6290
6291         wuc = E1000_WUC_PME_EN;
6292         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6293                 wuc |= E1000_WUC_APME;
6294
6295         /* enable PHY wakeup in MAC register */
6296         ew32(WUFC, wufc);
6297         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6298                    E1000_WUC_PME_STATUS | wuc));
6299
6300         /* configure and enable PHY wakeup in PHY registers */
6301         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6302         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6303
6304         /* activate PHY wakeup */
6305         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6306         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6307         if (retval)
6308                 e_err("Could not set PHY Host Wakeup bit\n");
6309 release:
6310         hw->phy.ops.release(hw);
6311
6312         return retval;
6313 }
6314
6315 static void e1000e_flush_lpic(struct pci_dev *pdev)
6316 {
6317         struct net_device *netdev = pci_get_drvdata(pdev);
6318         struct e1000_adapter *adapter = netdev_priv(netdev);
6319         struct e1000_hw *hw = &adapter->hw;
6320         u32 ret_val;
6321
6322         pm_runtime_get_sync(netdev->dev.parent);
6323
6324         ret_val = hw->phy.ops.acquire(hw);
6325         if (ret_val)
6326                 goto fl_out;
6327
6328         pr_info("EEE TX LPI TIMER: %08X\n",
6329                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6330
6331         hw->phy.ops.release(hw);
6332
6333 fl_out:
6334         pm_runtime_put_sync(netdev->dev.parent);
6335 }
6336
6337 /* S0ix implementation */
6338 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6339 {
6340         struct e1000_hw *hw = &adapter->hw;
6341         u32 mac_data;
6342         u16 phy_data;
6343
6344         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
6345                 /* Request ME configure the device for S0ix */
6346                 mac_data = er32(H2ME);
6347                 mac_data |= E1000_H2ME_START_DPG;
6348                 mac_data &= ~E1000_H2ME_EXIT_DPG;
6349                 ew32(H2ME, mac_data);
6350         } else {
6351                 /* Request driver configure the device to S0ix */
6352                 /* Disable the periodic inband message,
6353                  * don't request PCIe clock in K1 page770_17[10:9] = 10b
6354                  */
6355                 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6356                 phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6357                 phy_data |= BIT(10);
6358                 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6359
6360                 /* Make sure we don't exit K1 every time a new packet arrives
6361                  * 772_29[5] = 1 CS_Mode_Stay_In_K1
6362                  */
6363                 e1e_rphy(hw, I217_CGFREG, &phy_data);
6364                 phy_data |= BIT(5);
6365                 e1e_wphy(hw, I217_CGFREG, phy_data);
6366
6367                 /* Change the MAC/PHY interface to SMBus
6368                  * Force the SMBus in PHY page769_23[0] = 1
6369                  * Force the SMBus in MAC CTRL_EXT[11] = 1
6370                  */
6371                 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6372                 phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6373                 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6374                 mac_data = er32(CTRL_EXT);
6375                 mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6376                 ew32(CTRL_EXT, mac_data);
6377
6378                 /* DFT control: PHY bit: page769_20[0] = 1
6379                  * page769_20[7] - PHY PLL stop
6380                  * page769_20[8] - PHY go to the electrical idle
6381                  * page769_20[9] - PHY serdes disable
6382                  * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6383                  */
6384                 e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6385                 phy_data |= BIT(0);
6386                 phy_data |= BIT(7);
6387                 phy_data |= BIT(8);
6388                 phy_data |= BIT(9);
6389                 e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6390
6391                 mac_data = er32(EXTCNF_CTRL);
6392                 mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6393                 ew32(EXTCNF_CTRL, mac_data);
6394
6395                 /* Enable the Dynamic Power Gating in the MAC */
6396                 mac_data = er32(FEXTNVM7);
6397                 mac_data |= BIT(22);
6398                 ew32(FEXTNVM7, mac_data);
6399
6400                 /* Disable disconnected cable conditioning for Power Gating */
6401                 mac_data = er32(DPGFR);
6402                 mac_data |= BIT(2);
6403                 ew32(DPGFR, mac_data);
6404
6405                 /* Don't wake from dynamic Power Gating with clock request */
6406                 mac_data = er32(FEXTNVM12);
6407                 mac_data |= BIT(12);
6408                 ew32(FEXTNVM12, mac_data);
6409
6410                 /* Ungate PGCB clock */
6411                 mac_data = er32(FEXTNVM9);
6412                 mac_data &= ~BIT(28);
6413                 ew32(FEXTNVM9, mac_data);
6414
6415                 /* Enable K1 off to enable mPHY Power Gating */
6416                 mac_data = er32(FEXTNVM6);
6417                 mac_data |= BIT(31);
6418                 ew32(FEXTNVM6, mac_data);
6419
6420                 /* Enable mPHY power gating for any link and speed */
6421                 mac_data = er32(FEXTNVM8);
6422                 mac_data |= BIT(9);
6423                 ew32(FEXTNVM8, mac_data);
6424
6425                 /* Enable the Dynamic Clock Gating in the DMA and MAC */
6426                 mac_data = er32(CTRL_EXT);
6427                 mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6428                 ew32(CTRL_EXT, mac_data);
6429
6430                 /* No MAC DPG gating SLP_S0 in modern standby
6431                  * Switch the logic of the lanphypc to use PMC counter
6432                  */
6433                 mac_data = er32(FEXTNVM5);
6434                 mac_data |= BIT(7);
6435                 ew32(FEXTNVM5, mac_data);
6436         }
6437
6438         /* Disable the time synchronization clock */
6439         mac_data = er32(FEXTNVM7);
6440         mac_data |= BIT(31);
6441         mac_data &= ~BIT(0);
6442         ew32(FEXTNVM7, mac_data);
6443
6444         /* Dynamic Power Gating Enable */
6445         mac_data = er32(CTRL_EXT);
6446         mac_data |= BIT(3);
6447         ew32(CTRL_EXT, mac_data);
6448
6449         /* Check MAC Tx/Rx packet buffer pointers.
6450          * Reset MAC Tx/Rx packet buffer pointers to suppress any
6451          * pending traffic indication that would prevent power gating.
6452          */
6453         mac_data = er32(TDFH);
6454         if (mac_data)
6455                 ew32(TDFH, 0);
6456         mac_data = er32(TDFT);
6457         if (mac_data)
6458                 ew32(TDFT, 0);
6459         mac_data = er32(TDFHS);
6460         if (mac_data)
6461                 ew32(TDFHS, 0);
6462         mac_data = er32(TDFTS);
6463         if (mac_data)
6464                 ew32(TDFTS, 0);
6465         mac_data = er32(TDFPC);
6466         if (mac_data)
6467                 ew32(TDFPC, 0);
6468         mac_data = er32(RDFH);
6469         if (mac_data)
6470                 ew32(RDFH, 0);
6471         mac_data = er32(RDFT);
6472         if (mac_data)
6473                 ew32(RDFT, 0);
6474         mac_data = er32(RDFHS);
6475         if (mac_data)
6476                 ew32(RDFHS, 0);
6477         mac_data = er32(RDFTS);
6478         if (mac_data)
6479                 ew32(RDFTS, 0);
6480         mac_data = er32(RDFPC);
6481         if (mac_data)
6482                 ew32(RDFPC, 0);
6483 }
6484
6485 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6486 {
6487         struct e1000_hw *hw = &adapter->hw;
6488         bool firmware_bug = false;
6489         u32 mac_data;
6490         u16 phy_data;
6491         u32 i = 0;
6492
6493         if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
6494                 /* Request ME unconfigure the device from S0ix */
6495                 mac_data = er32(H2ME);
6496                 mac_data &= ~E1000_H2ME_START_DPG;
6497                 mac_data |= E1000_H2ME_EXIT_DPG;
6498                 ew32(H2ME, mac_data);
6499
6500                 /* Poll up to 2.5 seconds for ME to unconfigure DPG.
6501                  * If this takes more than 1 second, show a warning indicating a
6502                  * firmware bug
6503                  */
6504                 while (!(er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE)) {
6505                         if (i > 100 && !firmware_bug)
6506                                 firmware_bug = true;
6507
6508                         if (i++ == 250) {
6509                                 e_dbg("Timeout (firmware bug): %d msec\n",
6510                                       i * 10);
6511                                 break;
6512                         }
6513
6514                         usleep_range(10000, 11000);
6515                 }
6516                 if (firmware_bug)
6517                         e_warn("DPG_EXIT_DONE took %d msec. This is a firmware bug\n",
6518                                i * 10);
6519                 else
6520                         e_dbg("DPG_EXIT_DONE cleared after %d msec\n", i * 10);
6521         } else {
6522                 /* Request driver unconfigure the device from S0ix */
6523
6524                 /* Disable the Dynamic Power Gating in the MAC */
6525                 mac_data = er32(FEXTNVM7);
6526                 mac_data &= 0xFFBFFFFF;
6527                 ew32(FEXTNVM7, mac_data);
6528
6529                 /* Disable mPHY power gating for any link and speed */
6530                 mac_data = er32(FEXTNVM8);
6531                 mac_data &= ~BIT(9);
6532                 ew32(FEXTNVM8, mac_data);
6533
6534                 /* Disable K1 off */
6535                 mac_data = er32(FEXTNVM6);
6536                 mac_data &= ~BIT(31);
6537                 ew32(FEXTNVM6, mac_data);
6538
6539                 /* Disable Ungate PGCB clock */
6540                 mac_data = er32(FEXTNVM9);
6541                 mac_data |= BIT(28);
6542                 ew32(FEXTNVM9, mac_data);
6543
6544                 /* Cancel not waking from dynamic
6545                  * Power Gating with clock request
6546                  */
6547                 mac_data = er32(FEXTNVM12);
6548                 mac_data &= ~BIT(12);
6549                 ew32(FEXTNVM12, mac_data);
6550
6551                 /* Cancel disable disconnected cable conditioning
6552                  * for Power Gating
6553                  */
6554                 mac_data = er32(DPGFR);
6555                 mac_data &= ~BIT(2);
6556                 ew32(DPGFR, mac_data);
6557
6558                 /* Disable the Dynamic Clock Gating in the DMA and MAC */
6559                 mac_data = er32(CTRL_EXT);
6560                 mac_data &= 0xFFF7FFFF;
6561                 ew32(CTRL_EXT, mac_data);
6562
6563                 /* Revert the lanphypc logic to use the internal Gbe counter
6564                  * and not the PMC counter
6565                  */
6566                 mac_data = er32(FEXTNVM5);
6567                 mac_data &= 0xFFFFFF7F;
6568                 ew32(FEXTNVM5, mac_data);
6569
6570                 /* Enable the periodic inband message,
6571                  * Request PCIe clock in K1 page770_17[10:9] =01b
6572                  */
6573                 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6574                 phy_data &= 0xFBFF;
6575                 phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6576                 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6577
6578                 /* Return back configuration
6579                  * 772_29[5] = 0 CS_Mode_Stay_In_K1
6580                  */
6581                 e1e_rphy(hw, I217_CGFREG, &phy_data);
6582                 phy_data &= 0xFFDF;
6583                 e1e_wphy(hw, I217_CGFREG, phy_data);
6584
6585                 /* Change the MAC/PHY interface to Kumeran
6586                  * Unforce the SMBus in PHY page769_23[0] = 0
6587                  * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6588                  */
6589                 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6590                 phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6591                 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6592                 mac_data = er32(CTRL_EXT);
6593                 mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6594                 ew32(CTRL_EXT, mac_data);
6595         }
6596
6597         /* Disable Dynamic Power Gating */
6598         mac_data = er32(CTRL_EXT);
6599         mac_data &= 0xFFFFFFF7;
6600         ew32(CTRL_EXT, mac_data);
6601
6602         /* Enable the time synchronization clock */
6603         mac_data = er32(FEXTNVM7);
6604         mac_data &= ~BIT(31);
6605         mac_data |= BIT(0);
6606         ew32(FEXTNVM7, mac_data);
6607 }
6608
6609 static int e1000e_pm_freeze(struct device *dev)
6610 {
6611         struct net_device *netdev = dev_get_drvdata(dev);
6612         struct e1000_adapter *adapter = netdev_priv(netdev);
6613         bool present;
6614
6615         rtnl_lock();
6616
6617         present = netif_device_present(netdev);
6618         netif_device_detach(netdev);
6619
6620         if (present && netif_running(netdev)) {
6621                 int count = E1000_CHECK_RESET_COUNT;
6622
6623                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6624                         usleep_range(10000, 11000);
6625
6626                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6627
6628                 /* Quiesce the device without resetting the hardware */
6629                 e1000e_down(adapter, false);
6630                 e1000_free_irq(adapter);
6631         }
6632         rtnl_unlock();
6633
6634         e1000e_reset_interrupt_capability(adapter);
6635
6636         /* Allow time for pending master requests to run */
6637         e1000e_disable_pcie_master(&adapter->hw);
6638
6639         return 0;
6640 }
6641
6642 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6643 {
6644         struct net_device *netdev = pci_get_drvdata(pdev);
6645         struct e1000_adapter *adapter = netdev_priv(netdev);
6646         struct e1000_hw *hw = &adapter->hw;
6647         u32 ctrl, ctrl_ext, rctl, status, wufc;
6648         int retval = 0;
6649
6650         /* Runtime suspend should only enable wakeup for link changes */
6651         if (runtime)
6652                 wufc = E1000_WUFC_LNKC;
6653         else if (device_may_wakeup(&pdev->dev))
6654                 wufc = adapter->wol;
6655         else
6656                 wufc = 0;
6657
6658         status = er32(STATUS);
6659         if (status & E1000_STATUS_LU)
6660                 wufc &= ~E1000_WUFC_LNKC;
6661
6662         if (wufc) {
6663                 e1000_setup_rctl(adapter);
6664                 e1000e_set_rx_mode(netdev);
6665
6666                 /* turn on all-multi mode if wake on multicast is enabled */
6667                 if (wufc & E1000_WUFC_MC) {
6668                         rctl = er32(RCTL);
6669                         rctl |= E1000_RCTL_MPE;
6670                         ew32(RCTL, rctl);
6671                 }
6672
6673                 ctrl = er32(CTRL);
6674                 ctrl |= E1000_CTRL_ADVD3WUC;
6675                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6676                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6677                 ew32(CTRL, ctrl);
6678
6679                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6680                     adapter->hw.phy.media_type ==
6681                     e1000_media_type_internal_serdes) {
6682                         /* keep the laser running in D3 */
6683                         ctrl_ext = er32(CTRL_EXT);
6684                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6685                         ew32(CTRL_EXT, ctrl_ext);
6686                 }
6687
6688                 if (!runtime)
6689                         e1000e_power_up_phy(adapter);
6690
6691                 if (adapter->flags & FLAG_IS_ICH)
6692                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6693
6694                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6695                         /* enable wakeup by the PHY */
6696                         retval = e1000_init_phy_wakeup(adapter, wufc);
6697                         if (retval)
6698                                 return retval;
6699                 } else {
6700                         /* enable wakeup by the MAC */
6701                         ew32(WUFC, wufc);
6702                         ew32(WUC, E1000_WUC_PME_EN);
6703                 }
6704         } else {
6705                 ew32(WUC, 0);
6706                 ew32(WUFC, 0);
6707
6708                 e1000_power_down_phy(adapter);
6709         }
6710
6711         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6712                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6713         } else if (hw->mac.type >= e1000_pch_lpt) {
6714                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6715                         /* ULP does not support wake from unicast, multicast
6716                          * or broadcast.
6717                          */
6718                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6719
6720                 if (retval)
6721                         return retval;
6722         }
6723
6724         /* Ensure that the appropriate bits are set in LPI_CTRL
6725          * for EEE in Sx
6726          */
6727         if ((hw->phy.type >= e1000_phy_i217) &&
6728             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6729                 u16 lpi_ctrl = 0;
6730
6731                 retval = hw->phy.ops.acquire(hw);
6732                 if (!retval) {
6733                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6734                                                  &lpi_ctrl);
6735                         if (!retval) {
6736                                 if (adapter->eee_advert &
6737                                     hw->dev_spec.ich8lan.eee_lp_ability &
6738                                     I82579_EEE_100_SUPPORTED)
6739                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6740                                 if (adapter->eee_advert &
6741                                     hw->dev_spec.ich8lan.eee_lp_ability &
6742                                     I82579_EEE_1000_SUPPORTED)
6743                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6744
6745                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6746                                                          lpi_ctrl);
6747                         }
6748                 }
6749                 hw->phy.ops.release(hw);
6750         }
6751
6752         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6753          * would have already happened in close and is redundant.
6754          */
6755         e1000e_release_hw_control(adapter);
6756
6757         pci_clear_master(pdev);
6758
6759         /* The pci-e switch on some quad port adapters will report a
6760          * correctable error when the MAC transitions from D0 to D3.  To
6761          * prevent this we need to mask off the correctable errors on the
6762          * downstream port of the pci-e switch.
6763          *
6764          * We don't have the associated upstream bridge while assigning
6765          * the PCI device into guest. For example, the KVM on power is
6766          * one of the cases.
6767          */
6768         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6769                 struct pci_dev *us_dev = pdev->bus->self;
6770                 u16 devctl;
6771
6772                 if (!us_dev)
6773                         return 0;
6774
6775                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6776                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6777                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6778
6779                 pci_save_state(pdev);
6780                 pci_prepare_to_sleep(pdev);
6781
6782                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6783         }
6784
6785         return 0;
6786 }
6787
6788 /**
6789  * __e1000e_disable_aspm - Disable ASPM states
6790  * @pdev: pointer to PCI device struct
6791  * @state: bit-mask of ASPM states to disable
6792  * @locked: indication if this context holds pci_bus_sem locked.
6793  *
6794  * Some devices *must* have certain ASPM states disabled per hardware errata.
6795  **/
6796 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6797 {
6798         struct pci_dev *parent = pdev->bus->self;
6799         u16 aspm_dis_mask = 0;
6800         u16 pdev_aspmc, parent_aspmc;
6801
6802         switch (state) {
6803         case PCIE_LINK_STATE_L0S:
6804         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6805                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6806                 fallthrough; /* can't have L1 without L0s */
6807         case PCIE_LINK_STATE_L1:
6808                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6809                 break;
6810         default:
6811                 return;
6812         }
6813
6814         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6815         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6816
6817         if (parent) {
6818                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6819                                           &parent_aspmc);
6820                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6821         }
6822
6823         /* Nothing to do if the ASPM states to be disabled already are */
6824         if (!(pdev_aspmc & aspm_dis_mask) &&
6825             (!parent || !(parent_aspmc & aspm_dis_mask)))
6826                 return;
6827
6828         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6829                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6830                  "L0s" : "",
6831                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6832                  "L1" : "");
6833
6834 #ifdef CONFIG_PCIEASPM
6835         if (locked)
6836                 pci_disable_link_state_locked(pdev, state);
6837         else
6838                 pci_disable_link_state(pdev, state);
6839
6840         /* Double-check ASPM control.  If not disabled by the above, the
6841          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6842          * not enabled); override by writing PCI config space directly.
6843          */
6844         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6845         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6846
6847         if (!(aspm_dis_mask & pdev_aspmc))
6848                 return;
6849 #endif
6850
6851         /* Both device and parent should have the same ASPM setting.
6852          * Disable ASPM in downstream component first and then upstream.
6853          */
6854         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6855
6856         if (parent)
6857                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6858                                            aspm_dis_mask);
6859 }
6860
6861 /**
6862  * e1000e_disable_aspm - Disable ASPM states.
6863  * @pdev: pointer to PCI device struct
6864  * @state: bit-mask of ASPM states to disable
6865  *
6866  * This function acquires the pci_bus_sem!
6867  * Some devices *must* have certain ASPM states disabled per hardware errata.
6868  **/
6869 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6870 {
6871         __e1000e_disable_aspm(pdev, state, 0);
6872 }
6873
6874 /**
6875  * e1000e_disable_aspm_locked - Disable ASPM states.
6876  * @pdev: pointer to PCI device struct
6877  * @state: bit-mask of ASPM states to disable
6878  *
6879  * This function must be called with pci_bus_sem acquired!
6880  * Some devices *must* have certain ASPM states disabled per hardware errata.
6881  **/
6882 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6883 {
6884         __e1000e_disable_aspm(pdev, state, 1);
6885 }
6886
6887 static int e1000e_pm_thaw(struct device *dev)
6888 {
6889         struct net_device *netdev = dev_get_drvdata(dev);
6890         struct e1000_adapter *adapter = netdev_priv(netdev);
6891         int rc = 0;
6892
6893         e1000e_set_interrupt_capability(adapter);
6894
6895         rtnl_lock();
6896         if (netif_running(netdev)) {
6897                 rc = e1000_request_irq(adapter);
6898                 if (rc)
6899                         goto err_irq;
6900
6901                 e1000e_up(adapter);
6902         }
6903
6904         netif_device_attach(netdev);
6905 err_irq:
6906         rtnl_unlock();
6907
6908         return rc;
6909 }
6910
6911 static int __e1000_resume(struct pci_dev *pdev)
6912 {
6913         struct net_device *netdev = pci_get_drvdata(pdev);
6914         struct e1000_adapter *adapter = netdev_priv(netdev);
6915         struct e1000_hw *hw = &adapter->hw;
6916         u16 aspm_disable_flag = 0;
6917
6918         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6919                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6920         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6921                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6922         if (aspm_disable_flag)
6923                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6924
6925         pci_set_master(pdev);
6926
6927         if (hw->mac.type >= e1000_pch2lan)
6928                 e1000_resume_workarounds_pchlan(&adapter->hw);
6929
6930         e1000e_power_up_phy(adapter);
6931
6932         /* report the system wakeup cause from S3/S4 */
6933         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6934                 u16 phy_data;
6935
6936                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6937                 if (phy_data) {
6938                         e_info("PHY Wakeup cause - %s\n",
6939                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6940                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6941                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6942                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6943                                phy_data & E1000_WUS_LNKC ?
6944                                "Link Status Change" : "other");
6945                 }
6946                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6947         } else {
6948                 u32 wus = er32(WUS);
6949
6950                 if (wus) {
6951                         e_info("MAC Wakeup cause - %s\n",
6952                                wus & E1000_WUS_EX ? "Unicast Packet" :
6953                                wus & E1000_WUS_MC ? "Multicast Packet" :
6954                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6955                                wus & E1000_WUS_MAG ? "Magic Packet" :
6956                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6957                                "other");
6958                 }
6959                 ew32(WUS, ~0);
6960         }
6961
6962         e1000e_reset(adapter);
6963
6964         e1000_init_manageability_pt(adapter);
6965
6966         /* If the controller has AMT, do not set DRV_LOAD until the interface
6967          * is up.  For all other cases, let the f/w know that the h/w is now
6968          * under the control of the driver.
6969          */
6970         if (!(adapter->flags & FLAG_HAS_AMT))
6971                 e1000e_get_hw_control(adapter);
6972
6973         return 0;
6974 }
6975
6976 static __maybe_unused int e1000e_pm_prepare(struct device *dev)
6977 {
6978         return pm_runtime_suspended(dev) &&
6979                 pm_suspend_via_firmware();
6980 }
6981
6982 static __maybe_unused int e1000e_pm_suspend(struct device *dev)
6983 {
6984         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6985         struct e1000_adapter *adapter = netdev_priv(netdev);
6986         struct pci_dev *pdev = to_pci_dev(dev);
6987         int rc;
6988
6989         e1000e_flush_lpic(pdev);
6990
6991         e1000e_pm_freeze(dev);
6992
6993         rc = __e1000_shutdown(pdev, false);
6994         if (rc) {
6995                 e1000e_pm_thaw(dev);
6996         } else {
6997                 /* Introduce S0ix implementation */
6998                 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6999                         e1000e_s0ix_entry_flow(adapter);
7000         }
7001
7002         return rc;
7003 }
7004
7005 static __maybe_unused int e1000e_pm_resume(struct device *dev)
7006 {
7007         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
7008         struct e1000_adapter *adapter = netdev_priv(netdev);
7009         struct pci_dev *pdev = to_pci_dev(dev);
7010         int rc;
7011
7012         /* Introduce S0ix implementation */
7013         if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
7014                 e1000e_s0ix_exit_flow(adapter);
7015
7016         rc = __e1000_resume(pdev);
7017         if (rc)
7018                 return rc;
7019
7020         return e1000e_pm_thaw(dev);
7021 }
7022
7023 static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
7024 {
7025         struct net_device *netdev = dev_get_drvdata(dev);
7026         struct e1000_adapter *adapter = netdev_priv(netdev);
7027         u16 eee_lp;
7028
7029         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
7030
7031         if (!e1000e_has_link(adapter)) {
7032                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
7033                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
7034         }
7035
7036         return -EBUSY;
7037 }
7038
7039 static __maybe_unused int e1000e_pm_runtime_resume(struct device *dev)
7040 {
7041         struct pci_dev *pdev = to_pci_dev(dev);
7042         struct net_device *netdev = pci_get_drvdata(pdev);
7043         struct e1000_adapter *adapter = netdev_priv(netdev);
7044         int rc;
7045
7046         rc = __e1000_resume(pdev);
7047         if (rc)
7048                 return rc;
7049
7050         if (netdev->flags & IFF_UP)
7051                 e1000e_up(adapter);
7052
7053         return rc;
7054 }
7055
7056 static __maybe_unused int e1000e_pm_runtime_suspend(struct device *dev)
7057 {
7058         struct pci_dev *pdev = to_pci_dev(dev);
7059         struct net_device *netdev = pci_get_drvdata(pdev);
7060         struct e1000_adapter *adapter = netdev_priv(netdev);
7061
7062         if (netdev->flags & IFF_UP) {
7063                 int count = E1000_CHECK_RESET_COUNT;
7064
7065                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7066                         usleep_range(10000, 11000);
7067
7068                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7069
7070                 /* Down the device without resetting the hardware */
7071                 e1000e_down(adapter, false);
7072         }
7073
7074         if (__e1000_shutdown(pdev, true)) {
7075                 e1000e_pm_runtime_resume(dev);
7076                 return -EBUSY;
7077         }
7078
7079         return 0;
7080 }
7081
7082 static void e1000_shutdown(struct pci_dev *pdev)
7083 {
7084         e1000e_flush_lpic(pdev);
7085
7086         e1000e_pm_freeze(&pdev->dev);
7087
7088         __e1000_shutdown(pdev, false);
7089 }
7090
7091 #ifdef CONFIG_NET_POLL_CONTROLLER
7092
7093 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7094 {
7095         struct net_device *netdev = data;
7096         struct e1000_adapter *adapter = netdev_priv(netdev);
7097
7098         if (adapter->msix_entries) {
7099                 int vector, msix_irq;
7100
7101                 vector = 0;
7102                 msix_irq = adapter->msix_entries[vector].vector;
7103                 if (disable_hardirq(msix_irq))
7104                         e1000_intr_msix_rx(msix_irq, netdev);
7105                 enable_irq(msix_irq);
7106
7107                 vector++;
7108                 msix_irq = adapter->msix_entries[vector].vector;
7109                 if (disable_hardirq(msix_irq))
7110                         e1000_intr_msix_tx(msix_irq, netdev);
7111                 enable_irq(msix_irq);
7112
7113                 vector++;
7114                 msix_irq = adapter->msix_entries[vector].vector;
7115                 if (disable_hardirq(msix_irq))
7116                         e1000_msix_other(msix_irq, netdev);
7117                 enable_irq(msix_irq);
7118         }
7119
7120         return IRQ_HANDLED;
7121 }
7122
7123 /**
7124  * e1000_netpoll
7125  * @netdev: network interface device structure
7126  *
7127  * Polling 'interrupt' - used by things like netconsole to send skbs
7128  * without having to re-enable interrupts. It's not called while
7129  * the interrupt routine is executing.
7130  */
7131 static void e1000_netpoll(struct net_device *netdev)
7132 {
7133         struct e1000_adapter *adapter = netdev_priv(netdev);
7134
7135         switch (adapter->int_mode) {
7136         case E1000E_INT_MODE_MSIX:
7137                 e1000_intr_msix(adapter->pdev->irq, netdev);
7138                 break;
7139         case E1000E_INT_MODE_MSI:
7140                 if (disable_hardirq(adapter->pdev->irq))
7141                         e1000_intr_msi(adapter->pdev->irq, netdev);
7142                 enable_irq(adapter->pdev->irq);
7143                 break;
7144         default:                /* E1000E_INT_MODE_LEGACY */
7145                 if (disable_hardirq(adapter->pdev->irq))
7146                         e1000_intr(adapter->pdev->irq, netdev);
7147                 enable_irq(adapter->pdev->irq);
7148                 break;
7149         }
7150 }
7151 #endif
7152
7153 /**
7154  * e1000_io_error_detected - called when PCI error is detected
7155  * @pdev: Pointer to PCI device
7156  * @state: The current pci connection state
7157  *
7158  * This function is called after a PCI bus error affecting
7159  * this device has been detected.
7160  */
7161 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7162                                                 pci_channel_state_t state)
7163 {
7164         e1000e_pm_freeze(&pdev->dev);
7165
7166         if (state == pci_channel_io_perm_failure)
7167                 return PCI_ERS_RESULT_DISCONNECT;
7168
7169         pci_disable_device(pdev);
7170
7171         /* Request a slot reset. */
7172         return PCI_ERS_RESULT_NEED_RESET;
7173 }
7174
7175 /**
7176  * e1000_io_slot_reset - called after the pci bus has been reset.
7177  * @pdev: Pointer to PCI device
7178  *
7179  * Restart the card from scratch, as if from a cold-boot. Implementation
7180  * resembles the first-half of the e1000e_pm_resume routine.
7181  */
7182 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7183 {
7184         struct net_device *netdev = pci_get_drvdata(pdev);
7185         struct e1000_adapter *adapter = netdev_priv(netdev);
7186         struct e1000_hw *hw = &adapter->hw;
7187         u16 aspm_disable_flag = 0;
7188         int err;
7189         pci_ers_result_t result;
7190
7191         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7192                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7193         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7194                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7195         if (aspm_disable_flag)
7196                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7197
7198         err = pci_enable_device_mem(pdev);
7199         if (err) {
7200                 dev_err(&pdev->dev,
7201                         "Cannot re-enable PCI device after reset.\n");
7202                 result = PCI_ERS_RESULT_DISCONNECT;
7203         } else {
7204                 pdev->state_saved = true;
7205                 pci_restore_state(pdev);
7206                 pci_set_master(pdev);
7207
7208                 pci_enable_wake(pdev, PCI_D3hot, 0);
7209                 pci_enable_wake(pdev, PCI_D3cold, 0);
7210
7211                 e1000e_reset(adapter);
7212                 ew32(WUS, ~0);
7213                 result = PCI_ERS_RESULT_RECOVERED;
7214         }
7215
7216         return result;
7217 }
7218
7219 /**
7220  * e1000_io_resume - called when traffic can start flowing again.
7221  * @pdev: Pointer to PCI device
7222  *
7223  * This callback is called when the error recovery driver tells us that
7224  * its OK to resume normal operation. Implementation resembles the
7225  * second-half of the e1000e_pm_resume routine.
7226  */
7227 static void e1000_io_resume(struct pci_dev *pdev)
7228 {
7229         struct net_device *netdev = pci_get_drvdata(pdev);
7230         struct e1000_adapter *adapter = netdev_priv(netdev);
7231
7232         e1000_init_manageability_pt(adapter);
7233
7234         e1000e_pm_thaw(&pdev->dev);
7235
7236         /* If the controller has AMT, do not set DRV_LOAD until the interface
7237          * is up.  For all other cases, let the f/w know that the h/w is now
7238          * under the control of the driver.
7239          */
7240         if (!(adapter->flags & FLAG_HAS_AMT))
7241                 e1000e_get_hw_control(adapter);
7242 }
7243
7244 static void e1000_print_device_info(struct e1000_adapter *adapter)
7245 {
7246         struct e1000_hw *hw = &adapter->hw;
7247         struct net_device *netdev = adapter->netdev;
7248         u32 ret_val;
7249         u8 pba_str[E1000_PBANUM_LENGTH];
7250
7251         /* print bus type/speed/width info */
7252         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7253                /* bus width */
7254                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7255                 "Width x1"),
7256                /* MAC address */
7257                netdev->dev_addr);
7258         e_info("Intel(R) PRO/%s Network Connection\n",
7259                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7260         ret_val = e1000_read_pba_string_generic(hw, pba_str,
7261                                                 E1000_PBANUM_LENGTH);
7262         if (ret_val)
7263                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
7264         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7265                hw->mac.type, hw->phy.type, pba_str);
7266 }
7267
7268 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7269 {
7270         struct e1000_hw *hw = &adapter->hw;
7271         int ret_val;
7272         u16 buf = 0;
7273
7274         if (hw->mac.type != e1000_82573)
7275                 return;
7276
7277         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7278         le16_to_cpus(&buf);
7279         if (!ret_val && (!(buf & BIT(0)))) {
7280                 /* Deep Smart Power Down (DSPD) */
7281                 dev_warn(&adapter->pdev->dev,
7282                          "Warning: detected DSPD enabled in EEPROM\n");
7283         }
7284 }
7285
7286 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7287                                             netdev_features_t features)
7288 {
7289         struct e1000_adapter *adapter = netdev_priv(netdev);
7290         struct e1000_hw *hw = &adapter->hw;
7291
7292         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7293         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7294                 features &= ~NETIF_F_RXFCS;
7295
7296         /* Since there is no support for separate Rx/Tx vlan accel
7297          * enable/disable make sure Tx flag is always in same state as Rx.
7298          */
7299         if (features & NETIF_F_HW_VLAN_CTAG_RX)
7300                 features |= NETIF_F_HW_VLAN_CTAG_TX;
7301         else
7302                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7303
7304         return features;
7305 }
7306
7307 static int e1000_set_features(struct net_device *netdev,
7308                               netdev_features_t features)
7309 {
7310         struct e1000_adapter *adapter = netdev_priv(netdev);
7311         netdev_features_t changed = features ^ netdev->features;
7312
7313         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7314                 adapter->flags |= FLAG_TSO_FORCE;
7315
7316         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7317                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7318                          NETIF_F_RXALL)))
7319                 return 0;
7320
7321         if (changed & NETIF_F_RXFCS) {
7322                 if (features & NETIF_F_RXFCS) {
7323                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7324                 } else {
7325                         /* We need to take it back to defaults, which might mean
7326                          * stripping is still disabled at the adapter level.
7327                          */
7328                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7329                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7330                         else
7331                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7332                 }
7333         }
7334
7335         netdev->features = features;
7336
7337         if (netif_running(netdev))
7338                 e1000e_reinit_locked(adapter);
7339         else
7340                 e1000e_reset(adapter);
7341
7342         return 1;
7343 }
7344
7345 static const struct net_device_ops e1000e_netdev_ops = {
7346         .ndo_open               = e1000e_open,
7347         .ndo_stop               = e1000e_close,
7348         .ndo_start_xmit         = e1000_xmit_frame,
7349         .ndo_get_stats64        = e1000e_get_stats64,
7350         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7351         .ndo_set_mac_address    = e1000_set_mac,
7352         .ndo_change_mtu         = e1000_change_mtu,
7353         .ndo_eth_ioctl          = e1000_ioctl,
7354         .ndo_tx_timeout         = e1000_tx_timeout,
7355         .ndo_validate_addr      = eth_validate_addr,
7356
7357         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7358         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7359 #ifdef CONFIG_NET_POLL_CONTROLLER
7360         .ndo_poll_controller    = e1000_netpoll,
7361 #endif
7362         .ndo_set_features = e1000_set_features,
7363         .ndo_fix_features = e1000_fix_features,
7364         .ndo_features_check     = passthru_features_check,
7365 };
7366
7367 /**
7368  * e1000_probe - Device Initialization Routine
7369  * @pdev: PCI device information struct
7370  * @ent: entry in e1000_pci_tbl
7371  *
7372  * Returns 0 on success, negative on failure
7373  *
7374  * e1000_probe initializes an adapter identified by a pci_dev structure.
7375  * The OS initialization, configuring of the adapter private structure,
7376  * and a hardware reset occur.
7377  **/
7378 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7379 {
7380         struct net_device *netdev;
7381         struct e1000_adapter *adapter;
7382         struct e1000_hw *hw;
7383         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7384         resource_size_t mmio_start, mmio_len;
7385         resource_size_t flash_start, flash_len;
7386         static int cards_found;
7387         u16 aspm_disable_flag = 0;
7388         int bars, i, err, pci_using_dac;
7389         u16 eeprom_data = 0;
7390         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7391         s32 ret_val = 0;
7392
7393         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7394                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7395         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7396                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7397         if (aspm_disable_flag)
7398                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7399
7400         err = pci_enable_device_mem(pdev);
7401         if (err)
7402                 return err;
7403
7404         pci_using_dac = 0;
7405         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7406         if (!err) {
7407                 pci_using_dac = 1;
7408         } else {
7409                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7410                 if (err) {
7411                         dev_err(&pdev->dev,
7412                                 "No usable DMA configuration, aborting\n");
7413                         goto err_dma;
7414                 }
7415         }
7416
7417         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7418         err = pci_request_selected_regions_exclusive(pdev, bars,
7419                                                      e1000e_driver_name);
7420         if (err)
7421                 goto err_pci_reg;
7422
7423         /* AER (Advanced Error Reporting) hooks */
7424         pci_enable_pcie_error_reporting(pdev);
7425
7426         pci_set_master(pdev);
7427         /* PCI config space info */
7428         err = pci_save_state(pdev);
7429         if (err)
7430                 goto err_alloc_etherdev;
7431
7432         err = -ENOMEM;
7433         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7434         if (!netdev)
7435                 goto err_alloc_etherdev;
7436
7437         SET_NETDEV_DEV(netdev, &pdev->dev);
7438
7439         netdev->irq = pdev->irq;
7440
7441         pci_set_drvdata(pdev, netdev);
7442         adapter = netdev_priv(netdev);
7443         hw = &adapter->hw;
7444         adapter->netdev = netdev;
7445         adapter->pdev = pdev;
7446         adapter->ei = ei;
7447         adapter->pba = ei->pba;
7448         adapter->flags = ei->flags;
7449         adapter->flags2 = ei->flags2;
7450         adapter->hw.adapter = adapter;
7451         adapter->hw.mac.type = ei->mac;
7452         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7453         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7454
7455         mmio_start = pci_resource_start(pdev, 0);
7456         mmio_len = pci_resource_len(pdev, 0);
7457
7458         err = -EIO;
7459         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7460         if (!adapter->hw.hw_addr)
7461                 goto err_ioremap;
7462
7463         if ((adapter->flags & FLAG_HAS_FLASH) &&
7464             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7465             (hw->mac.type < e1000_pch_spt)) {
7466                 flash_start = pci_resource_start(pdev, 1);
7467                 flash_len = pci_resource_len(pdev, 1);
7468                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7469                 if (!adapter->hw.flash_address)
7470                         goto err_flashmap;
7471         }
7472
7473         /* Set default EEE advertisement */
7474         if (adapter->flags2 & FLAG2_HAS_EEE)
7475                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7476
7477         /* construct the net_device struct */
7478         netdev->netdev_ops = &e1000e_netdev_ops;
7479         e1000e_set_ethtool_ops(netdev);
7480         netdev->watchdog_timeo = 5 * HZ;
7481         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7482         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7483
7484         netdev->mem_start = mmio_start;
7485         netdev->mem_end = mmio_start + mmio_len;
7486
7487         adapter->bd_number = cards_found++;
7488
7489         e1000e_check_options(adapter);
7490
7491         /* setup adapter struct */
7492         err = e1000_sw_init(adapter);
7493         if (err)
7494                 goto err_sw_init;
7495
7496         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7497         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7498         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7499
7500         err = ei->get_variants(adapter);
7501         if (err)
7502                 goto err_hw_init;
7503
7504         if ((adapter->flags & FLAG_IS_ICH) &&
7505             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7506             (hw->mac.type < e1000_pch_spt))
7507                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7508
7509         hw->mac.ops.get_bus_info(&adapter->hw);
7510
7511         adapter->hw.phy.autoneg_wait_to_complete = 0;
7512
7513         /* Copper options */
7514         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7515                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7516                 adapter->hw.phy.disable_polarity_correction = 0;
7517                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7518         }
7519
7520         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7521                 dev_info(&pdev->dev,
7522                          "PHY reset is blocked due to SOL/IDER session.\n");
7523
7524         /* Set initial default active device features */
7525         netdev->features = (NETIF_F_SG |
7526                             NETIF_F_HW_VLAN_CTAG_RX |
7527                             NETIF_F_HW_VLAN_CTAG_TX |
7528                             NETIF_F_TSO |
7529                             NETIF_F_TSO6 |
7530                             NETIF_F_RXHASH |
7531                             NETIF_F_RXCSUM |
7532                             NETIF_F_HW_CSUM);
7533
7534         /* Set user-changeable features (subset of all device features) */
7535         netdev->hw_features = netdev->features;
7536         netdev->hw_features |= NETIF_F_RXFCS;
7537         netdev->priv_flags |= IFF_SUPP_NOFCS;
7538         netdev->hw_features |= NETIF_F_RXALL;
7539
7540         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7541                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7542
7543         netdev->vlan_features |= (NETIF_F_SG |
7544                                   NETIF_F_TSO |
7545                                   NETIF_F_TSO6 |
7546                                   NETIF_F_HW_CSUM);
7547
7548         netdev->priv_flags |= IFF_UNICAST_FLT;
7549
7550         if (pci_using_dac) {
7551                 netdev->features |= NETIF_F_HIGHDMA;
7552                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7553         }
7554
7555         /* MTU range: 68 - max_hw_frame_size */
7556         netdev->min_mtu = ETH_MIN_MTU;
7557         netdev->max_mtu = adapter->max_hw_frame_size -
7558                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7559
7560         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7561                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7562
7563         /* before reading the NVM, reset the controller to
7564          * put the device in a known good starting state
7565          */
7566         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7567
7568         /* systems with ASPM and others may see the checksum fail on the first
7569          * attempt. Let's give it a few tries
7570          */
7571         for (i = 0;; i++) {
7572                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7573                         break;
7574                 if (i == 2) {
7575                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7576                         err = -EIO;
7577                         goto err_eeprom;
7578                 }
7579         }
7580
7581         e1000_eeprom_checks(adapter);
7582
7583         /* copy the MAC address */
7584         if (e1000e_read_mac_addr(&adapter->hw))
7585                 dev_err(&pdev->dev,
7586                         "NVM Read Error while reading MAC address\n");
7587
7588         eth_hw_addr_set(netdev, adapter->hw.mac.addr);
7589
7590         if (!is_valid_ether_addr(netdev->dev_addr)) {
7591                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7592                         netdev->dev_addr);
7593                 err = -EIO;
7594                 goto err_eeprom;
7595         }
7596
7597         timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7598         timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7599
7600         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7601         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7602         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7603         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7604         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7605
7606         /* Initialize link parameters. User can change them with ethtool */
7607         adapter->hw.mac.autoneg = 1;
7608         adapter->fc_autoneg = true;
7609         adapter->hw.fc.requested_mode = e1000_fc_default;
7610         adapter->hw.fc.current_mode = e1000_fc_default;
7611         adapter->hw.phy.autoneg_advertised = 0x2f;
7612
7613         /* Initial Wake on LAN setting - If APM wake is enabled in
7614          * the EEPROM, enable the ACPI Magic Packet filter
7615          */
7616         if (adapter->flags & FLAG_APME_IN_WUC) {
7617                 /* APME bit in EEPROM is mapped to WUC.APME */
7618                 eeprom_data = er32(WUC);
7619                 eeprom_apme_mask = E1000_WUC_APME;
7620                 if ((hw->mac.type > e1000_ich10lan) &&
7621                     (eeprom_data & E1000_WUC_PHY_WAKE))
7622                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7623         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7624                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7625                     (adapter->hw.bus.func == 1))
7626                         ret_val = e1000_read_nvm(&adapter->hw,
7627                                               NVM_INIT_CONTROL3_PORT_B,
7628                                               1, &eeprom_data);
7629                 else
7630                         ret_val = e1000_read_nvm(&adapter->hw,
7631                                               NVM_INIT_CONTROL3_PORT_A,
7632                                               1, &eeprom_data);
7633         }
7634
7635         /* fetch WoL from EEPROM */
7636         if (ret_val)
7637                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7638         else if (eeprom_data & eeprom_apme_mask)
7639                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7640
7641         /* now that we have the eeprom settings, apply the special cases
7642          * where the eeprom may be wrong or the board simply won't support
7643          * wake on lan on a particular port
7644          */
7645         if (!(adapter->flags & FLAG_HAS_WOL))
7646                 adapter->eeprom_wol = 0;
7647
7648         /* initialize the wol settings based on the eeprom settings */
7649         adapter->wol = adapter->eeprom_wol;
7650
7651         /* make sure adapter isn't asleep if manageability is enabled */
7652         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7653             (hw->mac.ops.check_mng_mode(hw)))
7654                 device_wakeup_enable(&pdev->dev);
7655
7656         /* save off EEPROM version number */
7657         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7658
7659         if (ret_val) {
7660                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7661                 adapter->eeprom_vers = 0;
7662         }
7663
7664         /* init PTP hardware clock */
7665         e1000e_ptp_init(adapter);
7666
7667         /* reset the hardware with the new settings */
7668         e1000e_reset(adapter);
7669
7670         /* If the controller has AMT, do not set DRV_LOAD until the interface
7671          * is up.  For all other cases, let the f/w know that the h/w is now
7672          * under the control of the driver.
7673          */
7674         if (!(adapter->flags & FLAG_HAS_AMT))
7675                 e1000e_get_hw_control(adapter);
7676
7677         if (hw->mac.type >= e1000_pch_cnp)
7678                 adapter->flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
7679
7680         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7681         err = register_netdev(netdev);
7682         if (err)
7683                 goto err_register;
7684
7685         /* carrier off reporting is important to ethtool even BEFORE open */
7686         netif_carrier_off(netdev);
7687
7688         e1000_print_device_info(adapter);
7689
7690         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_SMART_PREPARE);
7691
7692         if (pci_dev_run_wake(pdev) && hw->mac.type != e1000_pch_cnp)
7693                 pm_runtime_put_noidle(&pdev->dev);
7694
7695         return 0;
7696
7697 err_register:
7698         if (!(adapter->flags & FLAG_HAS_AMT))
7699                 e1000e_release_hw_control(adapter);
7700 err_eeprom:
7701         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7702                 e1000_phy_hw_reset(&adapter->hw);
7703 err_hw_init:
7704         kfree(adapter->tx_ring);
7705         kfree(adapter->rx_ring);
7706 err_sw_init:
7707         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7708                 iounmap(adapter->hw.flash_address);
7709         e1000e_reset_interrupt_capability(adapter);
7710 err_flashmap:
7711         iounmap(adapter->hw.hw_addr);
7712 err_ioremap:
7713         free_netdev(netdev);
7714 err_alloc_etherdev:
7715         pci_disable_pcie_error_reporting(pdev);
7716         pci_release_mem_regions(pdev);
7717 err_pci_reg:
7718 err_dma:
7719         pci_disable_device(pdev);
7720         return err;
7721 }
7722
7723 /**
7724  * e1000_remove - Device Removal Routine
7725  * @pdev: PCI device information struct
7726  *
7727  * e1000_remove is called by the PCI subsystem to alert the driver
7728  * that it should release a PCI device.  This could be caused by a
7729  * Hot-Plug event, or because the driver is going to be removed from
7730  * memory.
7731  **/
7732 static void e1000_remove(struct pci_dev *pdev)
7733 {
7734         struct net_device *netdev = pci_get_drvdata(pdev);
7735         struct e1000_adapter *adapter = netdev_priv(netdev);
7736
7737         e1000e_ptp_remove(adapter);
7738
7739         /* The timers may be rescheduled, so explicitly disable them
7740          * from being rescheduled.
7741          */
7742         set_bit(__E1000_DOWN, &adapter->state);
7743         del_timer_sync(&adapter->watchdog_timer);
7744         del_timer_sync(&adapter->phy_info_timer);
7745
7746         cancel_work_sync(&adapter->reset_task);
7747         cancel_work_sync(&adapter->watchdog_task);
7748         cancel_work_sync(&adapter->downshift_task);
7749         cancel_work_sync(&adapter->update_phy_task);
7750         cancel_work_sync(&adapter->print_hang_task);
7751
7752         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7753                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7754                 if (adapter->tx_hwtstamp_skb) {
7755                         dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7756                         adapter->tx_hwtstamp_skb = NULL;
7757                 }
7758         }
7759
7760         unregister_netdev(netdev);
7761
7762         if (pci_dev_run_wake(pdev))
7763                 pm_runtime_get_noresume(&pdev->dev);
7764
7765         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7766          * would have already happened in close and is redundant.
7767          */
7768         e1000e_release_hw_control(adapter);
7769
7770         e1000e_reset_interrupt_capability(adapter);
7771         kfree(adapter->tx_ring);
7772         kfree(adapter->rx_ring);
7773
7774         iounmap(adapter->hw.hw_addr);
7775         if ((adapter->hw.flash_address) &&
7776             (adapter->hw.mac.type < e1000_pch_spt))
7777                 iounmap(adapter->hw.flash_address);
7778         pci_release_mem_regions(pdev);
7779
7780         free_netdev(netdev);
7781
7782         /* AER disable */
7783         pci_disable_pcie_error_reporting(pdev);
7784
7785         pci_disable_device(pdev);
7786 }
7787
7788 /* PCI Error Recovery (ERS) */
7789 static const struct pci_error_handlers e1000_err_handler = {
7790         .error_detected = e1000_io_error_detected,
7791         .slot_reset = e1000_io_slot_reset,
7792         .resume = e1000_io_resume,
7793 };
7794
7795 static const struct pci_device_id e1000_pci_tbl[] = {
7796         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7797         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7798         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7799         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7800           board_82571 },
7801         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7802         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7803         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7804         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7805         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7806
7807         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7808         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7809         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7810         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7811
7812         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7813         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7814         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7815
7816         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7817         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7818         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7819
7820         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7821           board_80003es2lan },
7822         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7823           board_80003es2lan },
7824         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7825           board_80003es2lan },
7826         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7827           board_80003es2lan },
7828
7829         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7830         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7831         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7832         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7833         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7834         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7835         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7836         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7837
7838         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7839         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7840         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7841         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7842         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7843         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7844         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7845         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7846         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7847
7848         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7849         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7850         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7851
7852         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7853         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7854         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7855
7856         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7857         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7858         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7859         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7860
7861         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7862         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7863
7864         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7865         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7866         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7867         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7868         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7869         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7870         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7871         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7872         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7873         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7874         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7875         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7876         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7877         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7878         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7879         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7880         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7881         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7882         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7883         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7884         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7885         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7886         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7887         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7888         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7889         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7890         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7891         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7892         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7893         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7894         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7895         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_tgp },
7896         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_tgp },
7897         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_tgp },
7898         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },
7899         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },
7900         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },
7901         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_tgp },
7902         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_tgp },
7903         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_tgp },
7904         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_tgp },
7905         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_tgp },
7906         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_tgp },
7907         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_tgp },
7908         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_tgp },
7909         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_tgp },
7910         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_tgp },
7911         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_tgp },
7912         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_tgp },
7913         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_tgp },
7914         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_tgp },
7915         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_tgp },
7916         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_tgp },
7917
7918         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7919 };
7920 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7921
7922 static const struct dev_pm_ops e1000_pm_ops = {
7923 #ifdef CONFIG_PM_SLEEP
7924         .prepare        = e1000e_pm_prepare,
7925         .suspend        = e1000e_pm_suspend,
7926         .resume         = e1000e_pm_resume,
7927         .freeze         = e1000e_pm_freeze,
7928         .thaw           = e1000e_pm_thaw,
7929         .poweroff       = e1000e_pm_suspend,
7930         .restore        = e1000e_pm_resume,
7931 #endif
7932         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7933                            e1000e_pm_runtime_idle)
7934 };
7935
7936 /* PCI Device API Driver */
7937 static struct pci_driver e1000_driver = {
7938         .name     = e1000e_driver_name,
7939         .id_table = e1000_pci_tbl,
7940         .probe    = e1000_probe,
7941         .remove   = e1000_remove,
7942         .driver   = {
7943                 .pm = &e1000_pm_ops,
7944         },
7945         .shutdown = e1000_shutdown,
7946         .err_handler = &e1000_err_handler
7947 };
7948
7949 /**
7950  * e1000_init_module - Driver Registration Routine
7951  *
7952  * e1000_init_module is the first routine called when the driver is
7953  * loaded. All it does is register with the PCI subsystem.
7954  **/
7955 static int __init e1000_init_module(void)
7956 {
7957         pr_info("Intel(R) PRO/1000 Network Driver\n");
7958         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7959
7960         return pci_register_driver(&e1000_driver);
7961 }
7962 module_init(e1000_init_module);
7963
7964 /**
7965  * e1000_exit_module - Driver Exit Cleanup Routine
7966  *
7967  * e1000_exit_module is called just before the driver is removed
7968  * from memory.
7969  **/
7970 static void __exit e1000_exit_module(void)
7971 {
7972         pci_unregister_driver(&e1000_driver);
7973 }
7974 module_exit(e1000_exit_module);
7975
7976 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7977 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7978 MODULE_LICENSE("GPL v2");
7979
7980 /* netdev.c */