drivers/net/ethernet/intel/e1000e/netdev.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
   3
   4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   5
   6 #include <linux/module.h>
   7 #include <linux/types.h>
   8 #include <linux/init.h>
   9 #include <linux/pci.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/pagemap.h>
  12 #include <linux/delay.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/tcp.h>
  16 #include <linux/ipv6.h>
  17 #include <linux/slab.h>
  18 #include <net/checksum.h>
  19 #include <net/ip6_checksum.h>
  20 #include <linux/ethtool.h>
  21 #include <linux/if_vlan.h>
  22 #include <linux/cpu.h>
  23 #include <linux/smp.h>
  24 #include <linux/pm_qos.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/aer.h>
  27 #include <linux/prefetch.h>
  28
  29 #include "e1000.h"
  30
  31 char e1000e_driver_name[] = "e1000e";
  32
  33 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  34 static int debug = -1;
  35 module_param(debug, int, 0);
  36 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  37
  38 static const struct e1000_info *e1000_info_tbl[] = {
  39         [board_82571]           = &e1000_82571_info,
  40         [board_82572]           = &e1000_82572_info,
  41         [board_82573]           = &e1000_82573_info,
  42         [board_82574]           = &e1000_82574_info,
  43         [board_82583]           = &e1000_82583_info,
  44         [board_80003es2lan]     = &e1000_es2_info,
  45         [board_ich8lan]         = &e1000_ich8_info,
  46         [board_ich9lan]         = &e1000_ich9_info,
  47         [board_ich10lan]        = &e1000_ich10_info,
  48         [board_pchlan]          = &e1000_pch_info,
  49         [board_pch2lan]         = &e1000_pch2_info,
  50         [board_pch_lpt]         = &e1000_pch_lpt_info,
  51         [board_pch_spt]         = &e1000_pch_spt_info,
  52         [board_pch_cnp]         = &e1000_pch_cnp_info,
  53 };
  54
  55 struct e1000_reg_info {
  56         u32 ofs;
  57         char *name;
  58 };
  59
  60 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  61         /* General Registers */
  62         {E1000_CTRL, "CTRL"},
  63         {E1000_STATUS, "STATUS"},
  64         {E1000_CTRL_EXT, "CTRL_EXT"},
  65
  66         /* Interrupt Registers */
  67         {E1000_ICR, "ICR"},
  68
  69         /* Rx Registers */
  70         {E1000_RCTL, "RCTL"},
  71         {E1000_RDLEN(0), "RDLEN"},
  72         {E1000_RDH(0), "RDH"},
  73         {E1000_RDT(0), "RDT"},
  74         {E1000_RDTR, "RDTR"},
  75         {E1000_RXDCTL(0), "RXDCTL"},
  76         {E1000_ERT, "ERT"},
  77         {E1000_RDBAL(0), "RDBAL"},
  78         {E1000_RDBAH(0), "RDBAH"},
  79         {E1000_RDFH, "RDFH"},
  80         {E1000_RDFT, "RDFT"},
  81         {E1000_RDFHS, "RDFHS"},
  82         {E1000_RDFTS, "RDFTS"},
  83         {E1000_RDFPC, "RDFPC"},
  84
  85         /* Tx Registers */
  86         {E1000_TCTL, "TCTL"},
  87         {E1000_TDBAL(0), "TDBAL"},
  88         {E1000_TDBAH(0), "TDBAH"},
  89         {E1000_TDLEN(0), "TDLEN"},
  90         {E1000_TDH(0), "TDH"},
  91         {E1000_TDT(0), "TDT"},
  92         {E1000_TIDV, "TIDV"},
  93         {E1000_TXDCTL(0), "TXDCTL"},
  94         {E1000_TADV, "TADV"},
  95         {E1000_TARC(0), "TARC"},
  96         {E1000_TDFH, "TDFH"},
  97         {E1000_TDFT, "TDFT"},
  98         {E1000_TDFHS, "TDFHS"},
  99         {E1000_TDFTS, "TDFTS"},
 100         {E1000_TDFPC, "TDFPC"},
 101
 102         /* List Terminator */
 103         {0, NULL}
 104 };
 105
 106 struct e1000e_me_supported {
 107         u16 device_id;          /* supported device ID */
 108 };
 109
 110 static const struct e1000e_me_supported me_supported[] = {
 111         {E1000_DEV_ID_PCH_LPT_I217_LM},
 112         {E1000_DEV_ID_PCH_LPTLP_I218_LM},
 113         {E1000_DEV_ID_PCH_I218_LM2},
 114         {E1000_DEV_ID_PCH_I218_LM3},
 115         {E1000_DEV_ID_PCH_SPT_I219_LM},
 116         {E1000_DEV_ID_PCH_SPT_I219_LM2},
 117         {E1000_DEV_ID_PCH_LBG_I219_LM3},
 118         {E1000_DEV_ID_PCH_SPT_I219_LM4},
 119         {E1000_DEV_ID_PCH_SPT_I219_LM5},
 120         {E1000_DEV_ID_PCH_CNP_I219_LM6},
 121         {E1000_DEV_ID_PCH_CNP_I219_LM7},
 122         {E1000_DEV_ID_PCH_ICP_I219_LM8},
 123         {E1000_DEV_ID_PCH_ICP_I219_LM9},
 124         {E1000_DEV_ID_PCH_CMP_I219_LM10},
 125         {E1000_DEV_ID_PCH_CMP_I219_LM11},
 126         {E1000_DEV_ID_PCH_CMP_I219_LM12},
 127         {E1000_DEV_ID_PCH_TGP_I219_LM13},
 128         {E1000_DEV_ID_PCH_TGP_I219_LM14},
 129         {E1000_DEV_ID_PCH_TGP_I219_LM15},
 130         {0}
 131 };
 132
 133 static bool e1000e_check_me(u16 device_id)
 134 {
 135         struct e1000e_me_supported *id;
 136
 137         for (id = (struct e1000e_me_supported *)me_supported;
 138              id->device_id; id++)
 139                 if (device_id == id->device_id)
 140                         return true;
 141
 142         return false;
 143 }
 144
 145 /**
 146  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
 147  * @hw: pointer to the HW structure
 148  *
 149  * When updating the MAC CSR registers, the Manageability Engine (ME) could
 150  * be accessing the registers at the same time.  Normally, this is handled in
 151  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
 152  * accesses later than it should which could result in the register to have
 153  * an incorrect value.  Workaround this by checking the FWSM register which
 154  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
 155  * and try again a number of times.
 156  **/
 157 static void __ew32_prepare(struct e1000_hw *hw)
 158 {
 159         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
 160
 161         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
 162                 udelay(50);
 163 }
 164
 165 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
 166 {
 167         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 168                 __ew32_prepare(hw);
 169
 170         writel(val, hw->hw_addr + reg);
 171 }
 172
 173 /**
 174  * e1000_regdump - register printout routine
 175  * @hw: pointer to the HW structure
 176  * @reginfo: pointer to the register info table
 177  **/
 178 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 179 {
 180         int n = 0;
 181         char rname[16];
 182         u32 regs[8];
 183
 184         switch (reginfo->ofs) {
 185         case E1000_RXDCTL(0):
 186                 for (n = 0; n < 2; n++)
 187                         regs[n] = __er32(hw, E1000_RXDCTL(n));
 188                 break;
 189         case E1000_TXDCTL(0):
 190                 for (n = 0; n < 2; n++)
 191                         regs[n] = __er32(hw, E1000_TXDCTL(n));
 192                 break;
 193         case E1000_TARC(0):
 194                 for (n = 0; n < 2; n++)
 195                         regs[n] = __er32(hw, E1000_TARC(n));
 196                 break;
 197         default:
 198                 pr_info("%-15s %08x\n",
 199                         reginfo->name, __er32(hw, reginfo->ofs));
 200                 return;
 201         }
 202
 203         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 204         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
 205 }
 206
 207 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
 208                                  struct e1000_buffer *bi)
 209 {
 210         int i;
 211         struct e1000_ps_page *ps_page;
 212
 213         for (i = 0; i < adapter->rx_ps_pages; i++) {
 214                 ps_page = &bi->ps_pages[i];
 215
 216                 if (ps_page->page) {
 217                         pr_info("packet dump for ps_page %d:\n", i);
 218                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 219                                        16, 1, page_address(ps_page->page),
 220                                        PAGE_SIZE, true);
 221                 }
 222         }
 223 }
 224
 225 /**
 226  * e1000e_dump - Print registers, Tx-ring and Rx-ring
 227  * @adapter: board private structure
 228  **/
 229 static void e1000e_dump(struct e1000_adapter *adapter)
 230 {
 231         struct net_device *netdev = adapter->netdev;
 232         struct e1000_hw *hw = &adapter->hw;
 233         struct e1000_reg_info *reginfo;
 234         struct e1000_ring *tx_ring = adapter->tx_ring;
 235         struct e1000_tx_desc *tx_desc;
 236         struct my_u0 {
 237                 __le64 a;
 238                 __le64 b;
 239         } *u0;
 240         struct e1000_buffer *buffer_info;
 241         struct e1000_ring *rx_ring = adapter->rx_ring;
 242         union e1000_rx_desc_packet_split *rx_desc_ps;
 243         union e1000_rx_desc_extended *rx_desc;
 244         struct my_u1 {
 245                 __le64 a;
 246                 __le64 b;
 247                 __le64 c;
 248                 __le64 d;
 249         } *u1;
 250         u32 staterr;
 251         int i = 0;
 252
 253         if (!netif_msg_hw(adapter))
 254                 return;
 255
 256         /* Print netdevice Info */
 257         if (netdev) {
 258                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 259                 pr_info("Device Name     state            trans_start\n");
 260                 pr_info("%-15s %016lX %016lX\n", netdev->name,
 261                         netdev->state, dev_trans_start(netdev));
 262         }
 263
 264         /* Print Registers */
 265         dev_info(&adapter->pdev->dev, "Register Dump\n");
 266         pr_info(" Register Name   Value\n");
 267         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 268              reginfo->name; reginfo++) {
 269                 e1000_regdump(hw, reginfo);
 270         }
 271
 272         /* Print Tx Ring Summary */
 273         if (!netdev || !netif_running(netdev))
 274                 return;
 275
 276         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 277         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 278         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 279         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
 280                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
 281                 (unsigned long long)buffer_info->dma,
 282                 buffer_info->length,
 283                 buffer_info->next_to_watch,
 284                 (unsigned long long)buffer_info->time_stamp);
 285
 286         /* Print Tx Ring */
 287         if (!netif_msg_tx_done(adapter))
 288                 goto rx_ring_summary;
 289
 290         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 291
 292         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 293          *
 294          * Legacy Transmit Descriptor
 295          *   +--------------------------------------------------------------+
 296          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 297          *   +--------------------------------------------------------------+
 298          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 299          *   +--------------------------------------------------------------+
 300          *   63       48 47        36 35    32 31     24 23    16 15        0
 301          *
 302          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 303          *   63      48 47    40 39       32 31             16 15    8 7      0
 304          *   +----------------------------------------------------------------+
 305          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 306          *   +----------------------------------------------------------------+
 307          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 308          *   +----------------------------------------------------------------+
 309          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 310          *
 311          * Extended Data Descriptor (DTYP=0x1)
 312          *   +----------------------------------------------------------------+
 313          * 0 |                     Buffer Address [63:0]                      |
 314          *   +----------------------------------------------------------------+
 315          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 316          *   +----------------------------------------------------------------+
 317          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 318          */
 319         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
 320         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
 321         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
 322         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 323                 const char *next_desc;
 324                 tx_desc = E1000_TX_DESC(*tx_ring, i);
 325                 buffer_info = &tx_ring->buffer_info[i];
 326                 u0 = (struct my_u0 *)tx_desc;
 327                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 328                         next_desc = " NTC/U";
 329                 else if (i == tx_ring->next_to_use)
 330                         next_desc = " NTU";
 331                 else if (i == tx_ring->next_to_clean)
 332                         next_desc = " NTC";
 333                 else
 334                         next_desc = "";
 335                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
 336                         (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
 337                          ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
 338                         i,
 339                         (unsigned long long)le64_to_cpu(u0->a),
 340                         (unsigned long long)le64_to_cpu(u0->b),
 341                         (unsigned long long)buffer_info->dma,
 342                         buffer_info->length, buffer_info->next_to_watch,
 343                         (unsigned long long)buffer_info->time_stamp,
 344                         buffer_info->skb, next_desc);
 345
 346                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
 347                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 348                                        16, 1, buffer_info->skb->data,
 349                                        buffer_info->skb->len, true);
 350         }
 351
 352         /* Print Rx Ring Summary */
 353 rx_ring_summary:
 354         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 355         pr_info("Queue [NTU] [NTC]\n");
 356         pr_info(" %5d %5X %5X\n",
 357                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
 358
 359         /* Print Rx Ring */
 360         if (!netif_msg_rx_status(adapter))
 361                 return;
 362
 363         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 364         switch (adapter->rx_ps_pages) {
 365         case 1:
 366         case 2:
 367         case 3:
 368                 /* [Extended] Packet Split Receive Descriptor Format
 369                  *
 370                  *    +-----------------------------------------------------+
 371                  *  0 |                Buffer Address 0 [63:0]              |
 372                  *    +-----------------------------------------------------+
 373                  *  8 |                Buffer Address 1 [63:0]              |
 374                  *    +-----------------------------------------------------+
 375                  * 16 |                Buffer Address 2 [63:0]              |
 376                  *    +-----------------------------------------------------+
 377                  * 24 |                Buffer Address 3 [63:0]              |
 378                  *    +-----------------------------------------------------+
 379                  */
 380                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
 381                 /* [Extended] Receive Descriptor (Write-Back) Format
 382                  *
 383                  *   63       48 47    32 31     13 12    8 7    4 3        0
 384                  *   +------------------------------------------------------+
 385                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 386                  *   | Checksum | Ident  |         | Queue |      |  Type   |
 387                  *   +------------------------------------------------------+
 388                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 389                  *   +------------------------------------------------------+
 390                  *   63       48 47    32 31            20 19               0
 391                  */
 392                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
 393                 for (i = 0; i < rx_ring->count; i++) {
 394                         const char *next_desc;
 395                         buffer_info = &rx_ring->buffer_info[i];
 396                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 397                         u1 = (struct my_u1 *)rx_desc_ps;
 398                         staterr =
 399                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 400
 401                         if (i == rx_ring->next_to_use)
 402                                 next_desc = " NTU";
 403                         else if (i == rx_ring->next_to_clean)
 404                                 next_desc = " NTC";
 405                         else
 406                                 next_desc = "";
 407
 408                         if (staterr & E1000_RXD_STAT_DD) {
 409                                 /* Descriptor Done */
 410                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
 411                                         "RWB", i,
 412                                         (unsigned long long)le64_to_cpu(u1->a),
 413                                         (unsigned long long)le64_to_cpu(u1->b),
 414                                         (unsigned long long)le64_to_cpu(u1->c),
 415                                         (unsigned long long)le64_to_cpu(u1->d),
 416                                         buffer_info->skb, next_desc);
 417                         } else {
 418                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
 419                                         "R  ", i,
 420                                         (unsigned long long)le64_to_cpu(u1->a),
 421                                         (unsigned long long)le64_to_cpu(u1->b),
 422                                         (unsigned long long)le64_to_cpu(u1->c),
 423                                         (unsigned long long)le64_to_cpu(u1->d),
 424                                         (unsigned long long)buffer_info->dma,
 425                                         buffer_info->skb, next_desc);
 426
 427                                 if (netif_msg_pktdata(adapter))
 428                                         e1000e_dump_ps_pages(adapter,
 429                                                              buffer_info);
 430                         }
 431                 }
 432                 break;
 433         default:
 434         case 0:
 435                 /* Extended Receive Descriptor (Read) Format
 436                  *
 437                  *   +-----------------------------------------------------+
 438                  * 0 |                Buffer Address [63:0]                |
 439                  *   +-----------------------------------------------------+
 440                  * 8 |                      Reserved                       |
 441                  *   +-----------------------------------------------------+
 442                  */
 443                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
 444                 /* Extended Receive Descriptor (Write-Back) Format
 445                  *
 446                  *   63       48 47    32 31    24 23            4 3        0
 447                  *   +------------------------------------------------------+
 448                  *   |     RSS Hash      |        |               |         |
 449                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
 450                  *   | Packet   | IP     |        |               |  Type   |
 451                  *   | Checksum | Ident  |        |               |         |
 452                  *   +------------------------------------------------------+
 453                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 454                  *   +------------------------------------------------------+
 455                  *   63       48 47    32 31            20 19               0
 456                  */
 457                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
 458
 459                 for (i = 0; i < rx_ring->count; i++) {
 460                         const char *next_desc;
 461
 462                         buffer_info = &rx_ring->buffer_info[i];
 463                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 464                         u1 = (struct my_u1 *)rx_desc;
 465                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 466
 467                         if (i == rx_ring->next_to_use)
 468                                 next_desc = " NTU";
 469                         else if (i == rx_ring->next_to_clean)
 470                                 next_desc = " NTC";
 471                         else
 472                                 next_desc = "";
 473
 474                         if (staterr & E1000_RXD_STAT_DD) {
 475                                 /* Descriptor Done */
 476                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
 477                                         "RWB", i,
 478                                         (unsigned long long)le64_to_cpu(u1->a),
 479                                         (unsigned long long)le64_to_cpu(u1->b),
 480                                         buffer_info->skb, next_desc);
 481                         } else {
 482                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
 483                                         "R  ", i,
 484                                         (unsigned long long)le64_to_cpu(u1->a),
 485                                         (unsigned long long)le64_to_cpu(u1->b),
 486                                         (unsigned long long)buffer_info->dma,
 487                                         buffer_info->skb, next_desc);
 488
 489                                 if (netif_msg_pktdata(adapter) &&
 490                                     buffer_info->skb)
 491                                         print_hex_dump(KERN_INFO, "",
 492                                                        DUMP_PREFIX_ADDRESS, 16,
 493                                                        1,
 494                                                        buffer_info->skb->data,
 495                                                        adapter->rx_buffer_len,
 496                                                        true);
 497                         }
 498                 }
 499         }
 500 }
 501
 502 /**
 503  * e1000_desc_unused - calculate if we have unused descriptors
 504  * @ring: pointer to ring struct to perform calculation on
 505  **/
 506 static int e1000_desc_unused(struct e1000_ring *ring)
 507 {
 508         if (ring->next_to_clean > ring->next_to_use)
 509                 return ring->next_to_clean - ring->next_to_use - 1;
 510
 511         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 512 }
 513
 514 /**
 515  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
 516  * @adapter: board private structure
 517  * @hwtstamps: time stamp structure to update
 518  * @systim: unsigned 64bit system time value.
 519  *
 520  * Convert the system time value stored in the RX/TXSTMP registers into a
 521  * hwtstamp which can be used by the upper level time stamping functions.
 522  *
 523  * The 'systim_lock' spinlock is used to protect the consistency of the
 524  * system time value. This is needed because reading the 64 bit time
 525  * value involves reading two 32 bit registers. The first read latches the
 526  * value.
 527  **/
 528 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
 529                                       struct skb_shared_hwtstamps *hwtstamps,
 530                                       u64 systim)
 531 {
 532         u64 ns;
 533         unsigned long flags;
 534
 535         spin_lock_irqsave(&adapter->systim_lock, flags);
 536         ns = timecounter_cyc2time(&adapter->tc, systim);
 537         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 538
 539         memset(hwtstamps, 0, sizeof(*hwtstamps));
 540         hwtstamps->hwtstamp = ns_to_ktime(ns);
 541 }
 542
 543 /**
 544  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
 545  * @adapter: board private structure
 546  * @status: descriptor extended error and status field
 547  * @skb: particular skb to include time stamp
 548  *
 549  * If the time stamp is valid, convert it into the timecounter ns value
 550  * and store that result into the shhwtstamps structure which is passed
 551  * up the network stack.
 552  **/
 553 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
 554                                struct sk_buff *skb)
 555 {
 556         struct e1000_hw *hw = &adapter->hw;
 557         u64 rxstmp;
 558
 559         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
 560             !(status & E1000_RXDEXT_STATERR_TST) ||
 561             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 562                 return;
 563
 564         /* The Rx time stamp registers contain the time stamp.  No other
 565          * received packet will be time stamped until the Rx time stamp
 566          * registers are read.  Because only one packet can be time stamped
 567          * at a time, the register values must belong to this packet and
 568          * therefore none of the other additional attributes need to be
 569          * compared.
 570          */
 571         rxstmp = (u64)er32(RXSTMPL);
 572         rxstmp |= (u64)er32(RXSTMPH) << 32;
 573         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
 574
 575         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
 576 }
 577
 578 /**
 579  * e1000_receive_skb - helper function to handle Rx indications
 580  * @adapter: board private structure
 581  * @netdev: pointer to netdev struct
 582  * @staterr: descriptor extended error and status field as written by hardware
 583  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 584  * @skb: pointer to sk_buff to be indicated to stack
 585  **/
 586 static void e1000_receive_skb(struct e1000_adapter *adapter,
 587                               struct net_device *netdev, struct sk_buff *skb,
 588                               u32 staterr, __le16 vlan)
 589 {
 590         u16 tag = le16_to_cpu(vlan);
 591
 592         e1000e_rx_hwtstamp(adapter, staterr, skb);
 593
 594         skb->protocol = eth_type_trans(skb, netdev);
 595
 596         if (staterr & E1000_RXD_STAT_VP)
 597                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
 598
 599         napi_gro_receive(&adapter->napi, skb);
 600 }
 601
 602 /**
 603  * e1000_rx_checksum - Receive Checksum Offload
 604  * @adapter: board private structure
 605  * @status_err: receive descriptor status and error fields
 606  * @skb: socket buffer with received data
 607  **/
 608 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 609                               struct sk_buff *skb)
 610 {
 611         u16 status = (u16)status_err;
 612         u8 errors = (u8)(status_err >> 24);
 613
 614         skb_checksum_none_assert(skb);
 615
 616         /* Rx checksum disabled */
 617         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
 618                 return;
 619
 620         /* Ignore Checksum bit is set */
 621         if (status & E1000_RXD_STAT_IXSM)
 622                 return;
 623
 624         /* TCP/UDP checksum error bit or IP checksum error bit is set */
 625         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
 626                 /* let the stack verify checksum errors */
 627                 adapter->hw_csum_err++;
 628                 return;
 629         }
 630
 631         /* TCP/UDP Checksum has not been calculated */
 632         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 633                 return;
 634
 635         /* It must be a TCP or UDP packet with a valid checksum */
 636         skb->ip_summed = CHECKSUM_UNNECESSARY;
 637         adapter->hw_csum_good++;
 638 }
 639
 640 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
 641 {
 642         struct e1000_adapter *adapter = rx_ring->adapter;
 643         struct e1000_hw *hw = &adapter->hw;
 644
 645         __ew32_prepare(hw);
 646         writel(i, rx_ring->tail);
 647
 648         if (unlikely(i != readl(rx_ring->tail))) {
 649                 u32 rctl = er32(RCTL);
 650
 651                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
 652                 e_err("ME firmware caused invalid RDT - resetting\n");
 653                 schedule_work(&adapter->reset_task);
 654         }
 655 }
 656
 657 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
 658 {
 659         struct e1000_adapter *adapter = tx_ring->adapter;
 660         struct e1000_hw *hw = &adapter->hw;
 661
 662         __ew32_prepare(hw);
 663         writel(i, tx_ring->tail);
 664
 665         if (unlikely(i != readl(tx_ring->tail))) {
 666                 u32 tctl = er32(TCTL);
 667
 668                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
 669                 e_err("ME firmware caused invalid TDT - resetting\n");
 670                 schedule_work(&adapter->reset_task);
 671         }
 672 }
 673
 674 /**
 675  * e1000_alloc_rx_buffers - Replace used receive buffers
 676  * @rx_ring: Rx descriptor ring
 677  * @cleaned_count: number to reallocate
 678  * @gfp: flags for allocation
 679  **/
 680 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
 681                                    int cleaned_count, gfp_t gfp)
 682 {
 683         struct e1000_adapter *adapter = rx_ring->adapter;
 684         struct net_device *netdev = adapter->netdev;
 685         struct pci_dev *pdev = adapter->pdev;
 686         union e1000_rx_desc_extended *rx_desc;
 687         struct e1000_buffer *buffer_info;
 688         struct sk_buff *skb;
 689         unsigned int i;
 690         unsigned int bufsz = adapter->rx_buffer_len;
 691
 692         i = rx_ring->next_to_use;
 693         buffer_info = &rx_ring->buffer_info[i];
 694
 695         while (cleaned_count--) {
 696                 skb = buffer_info->skb;
 697                 if (skb) {
 698                         skb_trim(skb, 0);
 699                         goto map_skb;
 700                 }
 701
 702                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 703                 if (!skb) {
 704                         /* Better luck next round */
 705                         adapter->alloc_rx_buff_failed++;
 706                         break;
 707                 }
 708
 709                 buffer_info->skb = skb;
 710 map_skb:
 711                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 712                                                   adapter->rx_buffer_len,
 713                                                   DMA_FROM_DEVICE);
 714                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 715                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 716                         adapter->rx_dma_failed++;
 717                         break;
 718                 }
 719
 720                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 721                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 722
 723                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 724                         /* Force memory writes to complete before letting h/w
 725                          * know there are new descriptors to fetch.  (Only
 726                          * applicable for weak-ordered memory model archs,
 727                          * such as IA-64).
 728                          */
 729                         wmb();
 730                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 731                                 e1000e_update_rdt_wa(rx_ring, i);
 732                         else
 733                                 writel(i, rx_ring->tail);
 734                 }
 735                 i++;
 736                 if (i == rx_ring->count)
 737                         i = 0;
 738                 buffer_info = &rx_ring->buffer_info[i];
 739         }
 740
 741         rx_ring->next_to_use = i;
 742 }
 743
 744 /**
 745  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 746  * @rx_ring: Rx descriptor ring
 747  * @cleaned_count: number to reallocate
 748  * @gfp: flags for allocation
 749  **/
 750 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
 751                                       int cleaned_count, gfp_t gfp)
 752 {
 753         struct e1000_adapter *adapter = rx_ring->adapter;
 754         struct net_device *netdev = adapter->netdev;
 755         struct pci_dev *pdev = adapter->pdev;
 756         union e1000_rx_desc_packet_split *rx_desc;
 757         struct e1000_buffer *buffer_info;
 758         struct e1000_ps_page *ps_page;
 759         struct sk_buff *skb;
 760         unsigned int i, j;
 761
 762         i = rx_ring->next_to_use;
 763         buffer_info = &rx_ring->buffer_info[i];
 764
 765         while (cleaned_count--) {
 766                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 767
 768                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 769                         ps_page = &buffer_info->ps_pages[j];
 770                         if (j >= adapter->rx_ps_pages) {
 771                                 /* all unused desc entries get hw null ptr */
 772                                 rx_desc->read.buffer_addr[j + 1] =
 773                                     ~cpu_to_le64(0);
 774                                 continue;
 775                         }
 776                         if (!ps_page->page) {
 777                                 ps_page->page = alloc_page(gfp);
 778                                 if (!ps_page->page) {
 779                                         adapter->alloc_rx_buff_failed++;
 780                                         goto no_buffers;
 781                                 }
 782                                 ps_page->dma = dma_map_page(&pdev->dev,
 783                                                             ps_page->page,
 784                                                             0, PAGE_SIZE,
 785                                                             DMA_FROM_DEVICE);
 786                                 if (dma_mapping_error(&pdev->dev,
 787                                                       ps_page->dma)) {
 788                                         dev_err(&adapter->pdev->dev,
 789                                                 "Rx DMA page map failed\n");
 790                                         adapter->rx_dma_failed++;
 791                                         goto no_buffers;
 792                                 }
 793                         }
 794                         /* Refresh the desc even if buffer_addrs
 795                          * didn't change because each write-back
 796                          * erases this info.
 797                          */
 798                         rx_desc->read.buffer_addr[j + 1] =
 799                             cpu_to_le64(ps_page->dma);
 800                 }
 801
 802                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
 803                                                   gfp);
 804
 805                 if (!skb) {
 806                         adapter->alloc_rx_buff_failed++;
 807                         break;
 808                 }
 809
 810                 buffer_info->skb = skb;
 811                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 812                                                   adapter->rx_ps_bsize0,
 813                                                   DMA_FROM_DEVICE);
 814                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 815                         dev_err(&pdev->dev, "Rx DMA map failed\n");
 816                         adapter->rx_dma_failed++;
 817                         /* cleanup skb */
 818                         dev_kfree_skb_any(skb);
 819                         buffer_info->skb = NULL;
 820                         break;
 821                 }
 822
 823                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 824
 825                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 826                         /* Force memory writes to complete before letting h/w
 827                          * know there are new descriptors to fetch.  (Only
 828                          * applicable for weak-ordered memory model archs,
 829                          * such as IA-64).
 830                          */
 831                         wmb();
 832                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 833                                 e1000e_update_rdt_wa(rx_ring, i << 1);
 834                         else
 835                                 writel(i << 1, rx_ring->tail);
 836                 }
 837
 838                 i++;
 839                 if (i == rx_ring->count)
 840                         i = 0;
 841                 buffer_info = &rx_ring->buffer_info[i];
 842         }
 843
 844 no_buffers:
 845         rx_ring->next_to_use = i;
 846 }
 847
 848 /**
 849  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 850  * @rx_ring: Rx descriptor ring
 851  * @cleaned_count: number of buffers to allocate this pass
 852  * @gfp: flags for allocation
 853  **/
 854
 855 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
 856                                          int cleaned_count, gfp_t gfp)
 857 {
 858         struct e1000_adapter *adapter = rx_ring->adapter;
 859         struct net_device *netdev = adapter->netdev;
 860         struct pci_dev *pdev = adapter->pdev;
 861         union e1000_rx_desc_extended *rx_desc;
 862         struct e1000_buffer *buffer_info;
 863         struct sk_buff *skb;
 864         unsigned int i;
 865         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
 866
 867         i = rx_ring->next_to_use;
 868         buffer_info = &rx_ring->buffer_info[i];
 869
 870         while (cleaned_count--) {
 871                 skb = buffer_info->skb;
 872                 if (skb) {
 873                         skb_trim(skb, 0);
 874                         goto check_page;
 875                 }
 876
 877                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 878                 if (unlikely(!skb)) {
 879                         /* Better luck next round */
 880                         adapter->alloc_rx_buff_failed++;
 881                         break;
 882                 }
 883
 884                 buffer_info->skb = skb;
 885 check_page:
 886                 /* allocate a new page if necessary */
 887                 if (!buffer_info->page) {
 888                         buffer_info->page = alloc_page(gfp);
 889                         if (unlikely(!buffer_info->page)) {
 890                                 adapter->alloc_rx_buff_failed++;
 891                                 break;
 892                         }
 893                 }
 894
 895                 if (!buffer_info->dma) {
 896                         buffer_info->dma = dma_map_page(&pdev->dev,
 897                                                         buffer_info->page, 0,
 898                                                         PAGE_SIZE,
 899                                                         DMA_FROM_DEVICE);
 900                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 901                                 adapter->alloc_rx_buff_failed++;
 902                                 break;
 903                         }
 904                 }
 905
 906                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 907                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
 908
 909                 if (unlikely(++i == rx_ring->count))
 910                         i = 0;
 911                 buffer_info = &rx_ring->buffer_info[i];
 912         }
 913
 914         if (likely(rx_ring->next_to_use != i)) {
 915                 rx_ring->next_to_use = i;
 916                 if (unlikely(i-- == 0))
 917                         i = (rx_ring->count - 1);
 918
 919                 /* Force memory writes to complete before letting h/w
 920                  * know there are new descriptors to fetch.  (Only
 921                  * applicable for weak-ordered memory model archs,
 922                  * such as IA-64).
 923                  */
 924                 wmb();
 925                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 926                         e1000e_update_rdt_wa(rx_ring, i);
 927                 else
 928                         writel(i, rx_ring->tail);
 929         }
 930 }
 931
 932 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
 933                                  struct sk_buff *skb)
 934 {
 935         if (netdev->features & NETIF_F_RXHASH)
 936                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
 937 }
 938
 939 /**
 940  * e1000_clean_rx_irq - Send received data up the network stack
 941  * @rx_ring: Rx descriptor ring
 942  * @work_done: output parameter for indicating completed work
 943  * @work_to_do: how many packets we can clean
 944  *
 945  * the return value indicates whether actual cleaning was done, there
 946  * is no guarantee that everything was cleaned
 947  **/
 948 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
 949                                int work_to_do)
 950 {
 951         struct e1000_adapter *adapter = rx_ring->adapter;
 952         struct net_device *netdev = adapter->netdev;
 953         struct pci_dev *pdev = adapter->pdev;
 954         struct e1000_hw *hw = &adapter->hw;
 955         union e1000_rx_desc_extended *rx_desc, *next_rxd;
 956         struct e1000_buffer *buffer_info, *next_buffer;
 957         u32 length, staterr;
 958         unsigned int i;
 959         int cleaned_count = 0;
 960         bool cleaned = false;
 961         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 962
 963         i = rx_ring->next_to_clean;
 964         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
 965         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 966         buffer_info = &rx_ring->buffer_info[i];
 967
 968         while (staterr & E1000_RXD_STAT_DD) {
 969                 struct sk_buff *skb;
 970
 971                 if (*work_done >= work_to_do)
 972                         break;
 973                 (*work_done)++;
 974                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
 975
 976                 skb = buffer_info->skb;
 977                 buffer_info->skb = NULL;
 978
 979                 prefetch(skb->data - NET_IP_ALIGN);
 980
 981                 i++;
 982                 if (i == rx_ring->count)
 983                         i = 0;
 984                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
 985                 prefetch(next_rxd);
 986
 987                 next_buffer = &rx_ring->buffer_info[i];
 988
 989                 cleaned = true;
 990                 cleaned_count++;
 991                 dma_unmap_single(&pdev->dev, buffer_info->dma,
 992                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
 993                 buffer_info->dma = 0;
 994
 995                 length = le16_to_cpu(rx_desc->wb.upper.length);
 996
 997                 /* !EOP means multiple descriptors were used to store a single
 998                  * packet, if that's the case we need to toss it.  In fact, we
 999                  * need to toss every packet with the EOP bit clear and the
1000                  * next frame that _does_ have the EOP bit set, as it is by
1001                  * definition only a frame fragment
1002                  */
1003                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
1004                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1005
1006                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1007                         /* All receives must fit into a single buffer */
1008                         e_dbg("Receive packet consumed multiple buffers\n");
1009                         /* recycle */
1010                         buffer_info->skb = skb;
1011                         if (staterr & E1000_RXD_STAT_EOP)
1012                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1013                         goto next_desc;
1014                 }
1015
1016                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1017                              !(netdev->features & NETIF_F_RXALL))) {
1018                         /* recycle */
1019                         buffer_info->skb = skb;
1020                         goto next_desc;
1021                 }
1022
1023                 /* adjust length to remove Ethernet CRC */
1024                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1025                         /* If configured to store CRC, don't subtract FCS,
1026                          * but keep the FCS bytes out of the total_rx_bytes
1027                          * counter
1028                          */
1029                         if (netdev->features & NETIF_F_RXFCS)
1030                                 total_rx_bytes -= 4;
1031                         else
1032                                 length -= 4;
1033                 }
1034
1035                 total_rx_bytes += length;
1036                 total_rx_packets++;
1037
1038                 /* code added for copybreak, this should improve
1039                  * performance for small packets with large amounts
1040                  * of reassembly being done in the stack
1041                  */
1042                 if (length < copybreak) {
1043                         struct sk_buff *new_skb =
1044                                 napi_alloc_skb(&adapter->napi, length);
1045                         if (new_skb) {
1046                                 skb_copy_to_linear_data_offset(new_skb,
1047                                                                -NET_IP_ALIGN,
1048                                                                (skb->data -
1049                                                                 NET_IP_ALIGN),
1050                                                                (length +
1051                                                                 NET_IP_ALIGN));
1052                                 /* save the skb in buffer_info as good */
1053                                 buffer_info->skb = skb;
1054                                 skb = new_skb;
1055                         }
1056                         /* else just continue with the old one */
1057                 }
1058                 /* end copybreak code */
1059                 skb_put(skb, length);
1060
1061                 /* Receive Checksum Offload */
1062                 e1000_rx_checksum(adapter, staterr, skb);
1063
1064                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1065
1066                 e1000_receive_skb(adapter, netdev, skb, staterr,
1067                                   rx_desc->wb.upper.vlan);
1068
1069 next_desc:
1070                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1071
1072                 /* return some buffers to hardware, one at a time is too slow */
1073                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1074                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1075                                               GFP_ATOMIC);
1076                         cleaned_count = 0;
1077                 }
1078
1079                 /* use prefetched values */
1080                 rx_desc = next_rxd;
1081                 buffer_info = next_buffer;
1082
1083                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1084         }
1085         rx_ring->next_to_clean = i;
1086
1087         cleaned_count = e1000_desc_unused(rx_ring);
1088         if (cleaned_count)
1089                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1090
1091         adapter->total_rx_bytes += total_rx_bytes;
1092         adapter->total_rx_packets += total_rx_packets;
1093         return cleaned;
1094 }
1095
1096 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1097                             struct e1000_buffer *buffer_info,
1098                             bool drop)
1099 {
1100         struct e1000_adapter *adapter = tx_ring->adapter;
1101
1102         if (buffer_info->dma) {
1103                 if (buffer_info->mapped_as_page)
1104                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1105                                        buffer_info->length, DMA_TO_DEVICE);
1106                 else
1107                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1108                                          buffer_info->length, DMA_TO_DEVICE);
1109                 buffer_info->dma = 0;
1110         }
1111         if (buffer_info->skb) {
1112                 if (drop)
1113                         dev_kfree_skb_any(buffer_info->skb);
1114                 else
1115                         dev_consume_skb_any(buffer_info->skb);
1116                 buffer_info->skb = NULL;
1117         }
1118         buffer_info->time_stamp = 0;
1119 }
1120
1121 static void e1000_print_hw_hang(struct work_struct *work)
1122 {
1123         struct e1000_adapter *adapter = container_of(work,
1124                                                      struct e1000_adapter,
1125                                                      print_hang_task);
1126         struct net_device *netdev = adapter->netdev;
1127         struct e1000_ring *tx_ring = adapter->tx_ring;
1128         unsigned int i = tx_ring->next_to_clean;
1129         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1130         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1131         struct e1000_hw *hw = &adapter->hw;
1132         u16 phy_status, phy_1000t_status, phy_ext_status;
1133         u16 pci_status;
1134
1135         if (test_bit(__E1000_DOWN, &adapter->state))
1136                 return;
1137
1138         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1139                 /* May be block on write-back, flush and detect again
1140                  * flush pending descriptor writebacks to memory
1141                  */
1142                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1143                 /* execute the writes immediately */
1144                 e1e_flush();
1145                 /* Due to rare timing issues, write to TIDV again to ensure
1146                  * the write is successful
1147                  */
1148                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1149                 /* execute the writes immediately */
1150                 e1e_flush();
1151                 adapter->tx_hang_recheck = true;
1152                 return;
1153         }
1154         adapter->tx_hang_recheck = false;
1155
1156         if (er32(TDH(0)) == er32(TDT(0))) {
1157                 e_dbg("false hang detected, ignoring\n");
1158                 return;
1159         }
1160
1161         /* Real hang detected */
1162         netif_stop_queue(netdev);
1163
1164         e1e_rphy(hw, MII_BMSR, &phy_status);
1165         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1166         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1167
1168         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1169
1170         /* detected Hardware unit hang */
1171         e_err("Detected Hardware Unit Hang:\n"
1172               "  TDH                  <%x>\n"
1173               "  TDT                  <%x>\n"
1174               "  next_to_use          <%x>\n"
1175               "  next_to_clean        <%x>\n"
1176               "buffer_info[next_to_clean]:\n"
1177               "  time_stamp           <%lx>\n"
1178               "  next_to_watch        <%x>\n"
1179               "  jiffies              <%lx>\n"
1180               "  next_to_watch.status <%x>\n"
1181               "MAC Status             <%x>\n"
1182               "PHY Status             <%x>\n"
1183               "PHY 1000BASE-T Status  <%x>\n"
1184               "PHY Extended Status    <%x>\n"
1185               "PCI Status             <%x>\n",
1186               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1187               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1188               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1189               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1190
1191         e1000e_dump(adapter);
1192
1193         /* Suggest workaround for known h/w issue */
1194         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1195                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1196 }
1197
1198 /**
1199  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1200  * @work: pointer to work struct
1201  *
1202  * This work function polls the TSYNCTXCTL valid bit to determine when a
1203  * timestamp has been taken for the current stored skb.  The timestamp must
1204  * be for this skb because only one such packet is allowed in the queue.
1205  */
1206 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1207 {
1208         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1209                                                      tx_hwtstamp_work);
1210         struct e1000_hw *hw = &adapter->hw;
1211
1212         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1213                 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1214                 struct skb_shared_hwtstamps shhwtstamps;
1215                 u64 txstmp;
1216
1217                 txstmp = er32(TXSTMPL);
1218                 txstmp |= (u64)er32(TXSTMPH) << 32;
1219
1220                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1221
1222                 /* Clear the global tx_hwtstamp_skb pointer and force writes
1223                  * prior to notifying the stack of a Tx timestamp.
1224                  */
1225                 adapter->tx_hwtstamp_skb = NULL;
1226                 wmb(); /* force write prior to skb_tstamp_tx */
1227
1228                 skb_tstamp_tx(skb, &shhwtstamps);
1229                 dev_consume_skb_any(skb);
1230         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1231                               + adapter->tx_timeout_factor * HZ)) {
1232                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1233                 adapter->tx_hwtstamp_skb = NULL;
1234                 adapter->tx_hwtstamp_timeouts++;
1235                 e_warn("clearing Tx timestamp hang\n");
1236         } else {
1237                 /* reschedule to check later */
1238                 schedule_work(&adapter->tx_hwtstamp_work);
1239         }
1240 }
1241
1242 /**
1243  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1244  * @tx_ring: Tx descriptor ring
1245  *
1246  * the return value indicates whether actual cleaning was done, there
1247  * is no guarantee that everything was cleaned
1248  **/
1249 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1250 {
1251         struct e1000_adapter *adapter = tx_ring->adapter;
1252         struct net_device *netdev = adapter->netdev;
1253         struct e1000_hw *hw = &adapter->hw;
1254         struct e1000_tx_desc *tx_desc, *eop_desc;
1255         struct e1000_buffer *buffer_info;
1256         unsigned int i, eop;
1257         unsigned int count = 0;
1258         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1259         unsigned int bytes_compl = 0, pkts_compl = 0;
1260
1261         i = tx_ring->next_to_clean;
1262         eop = tx_ring->buffer_info[i].next_to_watch;
1263         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1264
1265         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1266                (count < tx_ring->count)) {
1267                 bool cleaned = false;
1268
1269                 dma_rmb();              /* read buffer_info after eop_desc */
1270                 for (; !cleaned; count++) {
1271                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1272                         buffer_info = &tx_ring->buffer_info[i];
1273                         cleaned = (i == eop);
1274
1275                         if (cleaned) {
1276                                 total_tx_packets += buffer_info->segs;
1277                                 total_tx_bytes += buffer_info->bytecount;
1278                                 if (buffer_info->skb) {
1279                                         bytes_compl += buffer_info->skb->len;
1280                                         pkts_compl++;
1281                                 }
1282                         }
1283
1284                         e1000_put_txbuf(tx_ring, buffer_info, false);
1285                         tx_desc->upper.data = 0;
1286
1287                         i++;
1288                         if (i == tx_ring->count)
1289                                 i = 0;
1290                 }
1291
1292                 if (i == tx_ring->next_to_use)
1293                         break;
1294                 eop = tx_ring->buffer_info[i].next_to_watch;
1295                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1296         }
1297
1298         tx_ring->next_to_clean = i;
1299
1300         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1301
1302 #define TX_WAKE_THRESHOLD 32
1303         if (count && netif_carrier_ok(netdev) &&
1304             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1305                 /* Make sure that anybody stopping the queue after this
1306                  * sees the new next_to_clean.
1307                  */
1308                 smp_mb();
1309
1310                 if (netif_queue_stopped(netdev) &&
1311                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1312                         netif_wake_queue(netdev);
1313                         ++adapter->restart_queue;
1314                 }
1315         }
1316
1317         if (adapter->detect_tx_hung) {
1318                 /* Detect a transmit hang in hardware, this serializes the
1319                  * check with the clearing of time_stamp and movement of i
1320                  */
1321                 adapter->detect_tx_hung = false;
1322                 if (tx_ring->buffer_info[i].time_stamp &&
1323                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1324                                + (adapter->tx_timeout_factor * HZ)) &&
1325                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1326                         schedule_work(&adapter->print_hang_task);
1327                 else
1328                         adapter->tx_hang_recheck = false;
1329         }
1330         adapter->total_tx_bytes += total_tx_bytes;
1331         adapter->total_tx_packets += total_tx_packets;
1332         return count < tx_ring->count;
1333 }
1334
1335 /**
1336  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1337  * @rx_ring: Rx descriptor ring
1338  * @work_done: output parameter for indicating completed work
1339  * @work_to_do: how many packets we can clean
1340  *
1341  * the return value indicates whether actual cleaning was done, there
1342  * is no guarantee that everything was cleaned
1343  **/
1344 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1345                                   int work_to_do)
1346 {
1347         struct e1000_adapter *adapter = rx_ring->adapter;
1348         struct e1000_hw *hw = &adapter->hw;
1349         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1350         struct net_device *netdev = adapter->netdev;
1351         struct pci_dev *pdev = adapter->pdev;
1352         struct e1000_buffer *buffer_info, *next_buffer;
1353         struct e1000_ps_page *ps_page;
1354         struct sk_buff *skb;
1355         unsigned int i, j;
1356         u32 length, staterr;
1357         int cleaned_count = 0;
1358         bool cleaned = false;
1359         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1360
1361         i = rx_ring->next_to_clean;
1362         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1363         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1364         buffer_info = &rx_ring->buffer_info[i];
1365
1366         while (staterr & E1000_RXD_STAT_DD) {
1367                 if (*work_done >= work_to_do)
1368                         break;
1369                 (*work_done)++;
1370                 skb = buffer_info->skb;
1371                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1372
1373                 /* in the packet split case this is header only */
1374                 prefetch(skb->data - NET_IP_ALIGN);
1375
1376                 i++;
1377                 if (i == rx_ring->count)
1378                         i = 0;
1379                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1380                 prefetch(next_rxd);
1381
1382                 next_buffer = &rx_ring->buffer_info[i];
1383
1384                 cleaned = true;
1385                 cleaned_count++;
1386                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1387                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1388                 buffer_info->dma = 0;
1389
1390                 /* see !EOP comment in other Rx routine */
1391                 if (!(staterr & E1000_RXD_STAT_EOP))
1392                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1393
1394                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1395                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1396                         dev_kfree_skb_irq(skb);
1397                         if (staterr & E1000_RXD_STAT_EOP)
1398                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1399                         goto next_desc;
1400                 }
1401
1402                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1403                              !(netdev->features & NETIF_F_RXALL))) {
1404                         dev_kfree_skb_irq(skb);
1405                         goto next_desc;
1406                 }
1407
1408                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1409
1410                 if (!length) {
1411                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1412                         dev_kfree_skb_irq(skb);
1413                         goto next_desc;
1414                 }
1415
1416                 /* Good Receive */
1417                 skb_put(skb, length);
1418
1419                 {
1420                         /* this looks ugly, but it seems compiler issues make
1421                          * it more efficient than reusing j
1422                          */
1423                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1424
1425                         /* page alloc/put takes too long and effects small
1426                          * packet throughput, so unsplit small packets and
1427                          * save the alloc/put only valid in softirq (napi)
1428                          * context to call kmap_*
1429                          */
1430                         if (l1 && (l1 <= copybreak) &&
1431                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1432                                 u8 *vaddr;
1433
1434                                 ps_page = &buffer_info->ps_pages[0];
1435
1436                                 /* there is no documentation about how to call
1437                                  * kmap_atomic, so we can't hold the mapping
1438                                  * very long
1439                                  */
1440                                 dma_sync_single_for_cpu(&pdev->dev,
1441                                                         ps_page->dma,
1442                                                         PAGE_SIZE,
1443                                                         DMA_FROM_DEVICE);
1444                                 vaddr = kmap_atomic(ps_page->page);
1445                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1446                                 kunmap_atomic(vaddr);
1447                                 dma_sync_single_for_device(&pdev->dev,
1448                                                            ps_page->dma,
1449                                                            PAGE_SIZE,
1450                                                            DMA_FROM_DEVICE);
1451
1452                                 /* remove the CRC */
1453                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1454                                         if (!(netdev->features & NETIF_F_RXFCS))
1455                                                 l1 -= 4;
1456                                 }
1457
1458                                 skb_put(skb, l1);
1459                                 goto copydone;
1460                         }       /* if */
1461                 }
1462
1463                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1464                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1465                         if (!length)
1466                                 break;
1467
1468                         ps_page = &buffer_info->ps_pages[j];
1469                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1470                                        DMA_FROM_DEVICE);
1471                         ps_page->dma = 0;
1472                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1473                         ps_page->page = NULL;
1474                         skb->len += length;
1475                         skb->data_len += length;
1476                         skb->truesize += PAGE_SIZE;
1477                 }
1478
1479                 /* strip the ethernet crc, problem is we're using pages now so
1480                  * this whole operation can get a little cpu intensive
1481                  */
1482                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1483                         if (!(netdev->features & NETIF_F_RXFCS))
1484                                 pskb_trim(skb, skb->len - 4);
1485                 }
1486
1487 copydone:
1488                 total_rx_bytes += skb->len;
1489                 total_rx_packets++;
1490
1491                 e1000_rx_checksum(adapter, staterr, skb);
1492
1493                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1494
1495                 if (rx_desc->wb.upper.header_status &
1496                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1497                         adapter->rx_hdr_split++;
1498
1499                 e1000_receive_skb(adapter, netdev, skb, staterr,
1500                                   rx_desc->wb.middle.vlan);
1501
1502 next_desc:
1503                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1504                 buffer_info->skb = NULL;
1505
1506                 /* return some buffers to hardware, one at a time is too slow */
1507                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1508                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1509                                               GFP_ATOMIC);
1510                         cleaned_count = 0;
1511                 }
1512
1513                 /* use prefetched values */
1514                 rx_desc = next_rxd;
1515                 buffer_info = next_buffer;
1516
1517                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1518         }
1519         rx_ring->next_to_clean = i;
1520
1521         cleaned_count = e1000_desc_unused(rx_ring);
1522         if (cleaned_count)
1523                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1524
1525         adapter->total_rx_bytes += total_rx_bytes;
1526         adapter->total_rx_packets += total_rx_packets;
1527         return cleaned;
1528 }
1529
1530 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1531                                u16 length)
1532 {
1533         bi->page = NULL;
1534         skb->len += length;
1535         skb->data_len += length;
1536         skb->truesize += PAGE_SIZE;
1537 }
1538
1539 /**
1540  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1541  * @rx_ring: Rx descriptor ring
1542  * @work_done: output parameter for indicating completed work
1543  * @work_to_do: how many packets we can clean
1544  *
1545  * the return value indicates whether actual cleaning was done, there
1546  * is no guarantee that everything was cleaned
1547  **/
1548 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1549                                      int work_to_do)
1550 {
1551         struct e1000_adapter *adapter = rx_ring->adapter;
1552         struct net_device *netdev = adapter->netdev;
1553         struct pci_dev *pdev = adapter->pdev;
1554         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1555         struct e1000_buffer *buffer_info, *next_buffer;
1556         u32 length, staterr;
1557         unsigned int i;
1558         int cleaned_count = 0;
1559         bool cleaned = false;
1560         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1561         struct skb_shared_info *shinfo;
1562
1563         i = rx_ring->next_to_clean;
1564         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1565         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1566         buffer_info = &rx_ring->buffer_info[i];
1567
1568         while (staterr & E1000_RXD_STAT_DD) {
1569                 struct sk_buff *skb;
1570
1571                 if (*work_done >= work_to_do)
1572                         break;
1573                 (*work_done)++;
1574                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1575
1576                 skb = buffer_info->skb;
1577                 buffer_info->skb = NULL;
1578
1579                 ++i;
1580                 if (i == rx_ring->count)
1581                         i = 0;
1582                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1583                 prefetch(next_rxd);
1584
1585                 next_buffer = &rx_ring->buffer_info[i];
1586
1587                 cleaned = true;
1588                 cleaned_count++;
1589                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1590                                DMA_FROM_DEVICE);
1591                 buffer_info->dma = 0;
1592
1593                 length = le16_to_cpu(rx_desc->wb.upper.length);
1594
1595                 /* errors is only valid for DD + EOP descriptors */
1596                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1597                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1598                               !(netdev->features & NETIF_F_RXALL)))) {
1599                         /* recycle both page and skb */
1600                         buffer_info->skb = skb;
1601                         /* an error means any chain goes out the window too */
1602                         if (rx_ring->rx_skb_top)
1603                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1604                         rx_ring->rx_skb_top = NULL;
1605                         goto next_desc;
1606                 }
1607 #define rxtop (rx_ring->rx_skb_top)
1608                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1609                         /* this descriptor is only the beginning (or middle) */
1610                         if (!rxtop) {
1611                                 /* this is the beginning of a chain */
1612                                 rxtop = skb;
1613                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1614                                                    0, length);
1615                         } else {
1616                                 /* this is the middle of a chain */
1617                                 shinfo = skb_shinfo(rxtop);
1618                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1619                                                    buffer_info->page, 0,
1620                                                    length);
1621                                 /* re-use the skb, only consumed the page */
1622                                 buffer_info->skb = skb;
1623                         }
1624                         e1000_consume_page(buffer_info, rxtop, length);
1625                         goto next_desc;
1626                 } else {
1627                         if (rxtop) {
1628                                 /* end of the chain */
1629                                 shinfo = skb_shinfo(rxtop);
1630                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1631                                                    buffer_info->page, 0,
1632                                                    length);
1633                                 /* re-use the current skb, we only consumed the
1634                                  * page
1635                                  */
1636                                 buffer_info->skb = skb;
1637                                 skb = rxtop;
1638                                 rxtop = NULL;
1639                                 e1000_consume_page(buffer_info, skb, length);
1640                         } else {
1641                                 /* no chain, got EOP, this buf is the packet
1642                                  * copybreak to save the put_page/alloc_page
1643                                  */
1644                                 if (length <= copybreak &&
1645                                     skb_tailroom(skb) >= length) {
1646                                         u8 *vaddr;
1647                                         vaddr = kmap_atomic(buffer_info->page);
1648                                         memcpy(skb_tail_pointer(skb), vaddr,
1649                                                length);
1650                                         kunmap_atomic(vaddr);
1651                                         /* re-use the page, so don't erase
1652                                          * buffer_info->page
1653                                          */
1654                                         skb_put(skb, length);
1655                                 } else {
1656                                         skb_fill_page_desc(skb, 0,
1657                                                            buffer_info->page, 0,
1658                                                            length);
1659                                         e1000_consume_page(buffer_info, skb,
1660                                                            length);
1661                                 }
1662                         }
1663                 }
1664
1665                 /* Receive Checksum Offload */
1666                 e1000_rx_checksum(adapter, staterr, skb);
1667
1668                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1669
1670                 /* probably a little skewed due to removing CRC */
1671                 total_rx_bytes += skb->len;
1672                 total_rx_packets++;
1673
1674                 /* eth type trans needs skb->data to point to something */
1675                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1676                         e_err("pskb_may_pull failed.\n");
1677                         dev_kfree_skb_irq(skb);
1678                         goto next_desc;
1679                 }
1680
1681                 e1000_receive_skb(adapter, netdev, skb, staterr,
1682                                   rx_desc->wb.upper.vlan);
1683
1684 next_desc:
1685                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1686
1687                 /* return some buffers to hardware, one at a time is too slow */
1688                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1689                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1690                                               GFP_ATOMIC);
1691                         cleaned_count = 0;
1692                 }
1693
1694                 /* use prefetched values */
1695                 rx_desc = next_rxd;
1696                 buffer_info = next_buffer;
1697
1698                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1699         }
1700         rx_ring->next_to_clean = i;
1701
1702         cleaned_count = e1000_desc_unused(rx_ring);
1703         if (cleaned_count)
1704                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1705
1706         adapter->total_rx_bytes += total_rx_bytes;
1707         adapter->total_rx_packets += total_rx_packets;
1708         return cleaned;
1709 }
1710
1711 /**
1712  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1713  * @rx_ring: Rx descriptor ring
1714  **/
1715 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1716 {
1717         struct e1000_adapter *adapter = rx_ring->adapter;
1718         struct e1000_buffer *buffer_info;
1719         struct e1000_ps_page *ps_page;
1720         struct pci_dev *pdev = adapter->pdev;
1721         unsigned int i, j;
1722
1723         /* Free all the Rx ring sk_buffs */
1724         for (i = 0; i < rx_ring->count; i++) {
1725                 buffer_info = &rx_ring->buffer_info[i];
1726                 if (buffer_info->dma) {
1727                         if (adapter->clean_rx == e1000_clean_rx_irq)
1728                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1729                                                  adapter->rx_buffer_len,
1730                                                  DMA_FROM_DEVICE);
1731                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1732                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1733                                                PAGE_SIZE, DMA_FROM_DEVICE);
1734                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1735                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1736                                                  adapter->rx_ps_bsize0,
1737                                                  DMA_FROM_DEVICE);
1738                         buffer_info->dma = 0;
1739                 }
1740
1741                 if (buffer_info->page) {
1742                         put_page(buffer_info->page);
1743                         buffer_info->page = NULL;
1744                 }
1745
1746                 if (buffer_info->skb) {
1747                         dev_kfree_skb(buffer_info->skb);
1748                         buffer_info->skb = NULL;
1749                 }
1750
1751                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1752                         ps_page = &buffer_info->ps_pages[j];
1753                         if (!ps_page->page)
1754                                 break;
1755                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1756                                        DMA_FROM_DEVICE);
1757                         ps_page->dma = 0;
1758                         put_page(ps_page->page);
1759                         ps_page->page = NULL;
1760                 }
1761         }
1762
1763         /* there also may be some cached data from a chained receive */
1764         if (rx_ring->rx_skb_top) {
1765                 dev_kfree_skb(rx_ring->rx_skb_top);
1766                 rx_ring->rx_skb_top = NULL;
1767         }
1768
1769         /* Zero out the descriptor ring */
1770         memset(rx_ring->desc, 0, rx_ring->size);
1771
1772         rx_ring->next_to_clean = 0;
1773         rx_ring->next_to_use = 0;
1774         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1775 }
1776
1777 static void e1000e_downshift_workaround(struct work_struct *work)
1778 {
1779         struct e1000_adapter *adapter = container_of(work,
1780                                                      struct e1000_adapter,
1781                                                      downshift_task);
1782
1783         if (test_bit(__E1000_DOWN, &adapter->state))
1784                 return;
1785
1786         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1787 }
1788
1789 /**
1790  * e1000_intr_msi - Interrupt Handler
1791  * @irq: interrupt number
1792  * @data: pointer to a network interface device structure
1793  **/
1794 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1795 {
1796         struct net_device *netdev = data;
1797         struct e1000_adapter *adapter = netdev_priv(netdev);
1798         struct e1000_hw *hw = &adapter->hw;
1799         u32 icr = er32(ICR);
1800
1801         /* read ICR disables interrupts using IAM */
1802         if (icr & E1000_ICR_LSC) {
1803                 hw->mac.get_link_status = true;
1804                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1805                  * disconnect (LSC) before accessing any PHY registers
1806                  */
1807                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1808                     (!(er32(STATUS) & E1000_STATUS_LU)))
1809                         schedule_work(&adapter->downshift_task);
1810
1811                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1812                  * link down event; disable receives here in the ISR and reset
1813                  * adapter in watchdog
1814                  */
1815                 if (netif_carrier_ok(netdev) &&
1816                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1817                         /* disable receives */
1818                         u32 rctl = er32(RCTL);
1819
1820                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1821                         adapter->flags |= FLAG_RESTART_NOW;
1822                 }
1823                 /* guard against interrupt when we're going down */
1824                 if (!test_bit(__E1000_DOWN, &adapter->state))
1825                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1826         }
1827
1828         /* Reset on uncorrectable ECC error */
1829         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1830                 u32 pbeccsts = er32(PBECCSTS);
1831
1832                 adapter->corr_errors +=
1833                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1834                 adapter->uncorr_errors +=
1835                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1836                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1837
1838                 /* Do the reset outside of interrupt context */
1839                 schedule_work(&adapter->reset_task);
1840
1841                 /* return immediately since reset is imminent */
1842                 return IRQ_HANDLED;
1843         }
1844
1845         if (napi_schedule_prep(&adapter->napi)) {
1846                 adapter->total_tx_bytes = 0;
1847                 adapter->total_tx_packets = 0;
1848                 adapter->total_rx_bytes = 0;
1849                 adapter->total_rx_packets = 0;
1850                 __napi_schedule(&adapter->napi);
1851         }
1852
1853         return IRQ_HANDLED;
1854 }
1855
1856 /**
1857  * e1000_intr - Interrupt Handler
1858  * @irq: interrupt number
1859  * @data: pointer to a network interface device structure
1860  **/
1861 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1862 {
1863         struct net_device *netdev = data;
1864         struct e1000_adapter *adapter = netdev_priv(netdev);
1865         struct e1000_hw *hw = &adapter->hw;
1866         u32 rctl, icr = er32(ICR);
1867
1868         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1869                 return IRQ_NONE;        /* Not our interrupt */
1870
1871         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1872          * not set, then the adapter didn't send an interrupt
1873          */
1874         if (!(icr & E1000_ICR_INT_ASSERTED))
1875                 return IRQ_NONE;
1876
1877         /* Interrupt Auto-Mask...upon reading ICR,
1878          * interrupts are masked.  No need for the
1879          * IMC write
1880          */
1881
1882         if (icr & E1000_ICR_LSC) {
1883                 hw->mac.get_link_status = true;
1884                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1885                  * disconnect (LSC) before accessing any PHY registers
1886                  */
1887                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1888                     (!(er32(STATUS) & E1000_STATUS_LU)))
1889                         schedule_work(&adapter->downshift_task);
1890
1891                 /* 80003ES2LAN workaround--
1892                  * For packet buffer work-around on link down event;
1893                  * disable receives here in the ISR and
1894                  * reset adapter in watchdog
1895                  */
1896                 if (netif_carrier_ok(netdev) &&
1897                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1898                         /* disable receives */
1899                         rctl = er32(RCTL);
1900                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1901                         adapter->flags |= FLAG_RESTART_NOW;
1902                 }
1903                 /* guard against interrupt when we're going down */
1904                 if (!test_bit(__E1000_DOWN, &adapter->state))
1905                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1906         }
1907
1908         /* Reset on uncorrectable ECC error */
1909         if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1910                 u32 pbeccsts = er32(PBECCSTS);
1911
1912                 adapter->corr_errors +=
1913                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1914                 adapter->uncorr_errors +=
1915                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1916                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1917
1918                 /* Do the reset outside of interrupt context */
1919                 schedule_work(&adapter->reset_task);
1920
1921                 /* return immediately since reset is imminent */
1922                 return IRQ_HANDLED;
1923         }
1924
1925         if (napi_schedule_prep(&adapter->napi)) {
1926                 adapter->total_tx_bytes = 0;
1927                 adapter->total_tx_packets = 0;
1928                 adapter->total_rx_bytes = 0;
1929                 adapter->total_rx_packets = 0;
1930                 __napi_schedule(&adapter->napi);
1931         }
1932
1933         return IRQ_HANDLED;
1934 }
1935
1936 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1937 {
1938         struct net_device *netdev = data;
1939         struct e1000_adapter *adapter = netdev_priv(netdev);
1940         struct e1000_hw *hw = &adapter->hw;
1941         u32 icr = er32(ICR);
1942
1943         if (icr & adapter->eiac_mask)
1944                 ew32(ICS, (icr & adapter->eiac_mask));
1945
1946         if (icr & E1000_ICR_LSC) {
1947                 hw->mac.get_link_status = true;
1948                 /* guard against interrupt when we're going down */
1949                 if (!test_bit(__E1000_DOWN, &adapter->state))
1950                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1951         }
1952
1953         if (!test_bit(__E1000_DOWN, &adapter->state))
1954                 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1955
1956         return IRQ_HANDLED;
1957 }
1958
1959 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1960 {
1961         struct net_device *netdev = data;
1962         struct e1000_adapter *adapter = netdev_priv(netdev);
1963         struct e1000_hw *hw = &adapter->hw;
1964         struct e1000_ring *tx_ring = adapter->tx_ring;
1965
1966         adapter->total_tx_bytes = 0;
1967         adapter->total_tx_packets = 0;
1968
1969         if (!e1000_clean_tx_irq(tx_ring))
1970                 /* Ring was not completely cleaned, so fire another interrupt */
1971                 ew32(ICS, tx_ring->ims_val);
1972
1973         if (!test_bit(__E1000_DOWN, &adapter->state))
1974                 ew32(IMS, adapter->tx_ring->ims_val);
1975
1976         return IRQ_HANDLED;
1977 }
1978
1979 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1980 {
1981         struct net_device *netdev = data;
1982         struct e1000_adapter *adapter = netdev_priv(netdev);
1983         struct e1000_ring *rx_ring = adapter->rx_ring;
1984
1985         /* Write the ITR value calculated at the end of the
1986          * previous interrupt.
1987          */
1988         if (rx_ring->set_itr) {
1989                 u32 itr = rx_ring->itr_val ?
1990                           1000000000 / (rx_ring->itr_val * 256) : 0;
1991
1992                 writel(itr, rx_ring->itr_register);
1993                 rx_ring->set_itr = 0;
1994         }
1995
1996         if (napi_schedule_prep(&adapter->napi)) {
1997                 adapter->total_rx_bytes = 0;
1998                 adapter->total_rx_packets = 0;
1999                 __napi_schedule(&adapter->napi);
2000         }
2001         return IRQ_HANDLED;
2002 }
2003
2004 /**
2005  * e1000_configure_msix - Configure MSI-X hardware
2006  * @adapter: board private structure
2007  *
2008  * e1000_configure_msix sets up the hardware to properly
2009  * generate MSI-X interrupts.
2010  **/
2011 static void e1000_configure_msix(struct e1000_adapter *adapter)
2012 {
2013         struct e1000_hw *hw = &adapter->hw;
2014         struct e1000_ring *rx_ring = adapter->rx_ring;
2015         struct e1000_ring *tx_ring = adapter->tx_ring;
2016         int vector = 0;
2017         u32 ctrl_ext, ivar = 0;
2018
2019         adapter->eiac_mask = 0;
2020
2021         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
2022         if (hw->mac.type == e1000_82574) {
2023                 u32 rfctl = er32(RFCTL);
2024
2025                 rfctl |= E1000_RFCTL_ACK_DIS;
2026                 ew32(RFCTL, rfctl);
2027         }
2028
2029         /* Configure Rx vector */
2030         rx_ring->ims_val = E1000_IMS_RXQ0;
2031         adapter->eiac_mask |= rx_ring->ims_val;
2032         if (rx_ring->itr_val)
2033                 writel(1000000000 / (rx_ring->itr_val * 256),
2034                        rx_ring->itr_register);
2035         else
2036                 writel(1, rx_ring->itr_register);
2037         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2038
2039         /* Configure Tx vector */
2040         tx_ring->ims_val = E1000_IMS_TXQ0;
2041         vector++;
2042         if (tx_ring->itr_val)
2043                 writel(1000000000 / (tx_ring->itr_val * 256),
2044                        tx_ring->itr_register);
2045         else
2046                 writel(1, tx_ring->itr_register);
2047         adapter->eiac_mask |= tx_ring->ims_val;
2048         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2049
2050         /* set vector for Other Causes, e.g. link changes */
2051         vector++;
2052         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2053         if (rx_ring->itr_val)
2054                 writel(1000000000 / (rx_ring->itr_val * 256),
2055                        hw->hw_addr + E1000_EITR_82574(vector));
2056         else
2057                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2058
2059         /* Cause Tx interrupts on every write back */
2060         ivar |= BIT(31);
2061
2062         ew32(IVAR, ivar);
2063
2064         /* enable MSI-X PBA support */
2065         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2066         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2067         ew32(CTRL_EXT, ctrl_ext);
2068         e1e_flush();
2069 }
2070
2071 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2072 {
2073         if (adapter->msix_entries) {
2074                 pci_disable_msix(adapter->pdev);
2075                 kfree(adapter->msix_entries);
2076                 adapter->msix_entries = NULL;
2077         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2078                 pci_disable_msi(adapter->pdev);
2079                 adapter->flags &= ~FLAG_MSI_ENABLED;
2080         }
2081 }
2082
2083 /**
2084  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2085  * @adapter: board private structure
2086  *
2087  * Attempt to configure interrupts using the best available
2088  * capabilities of the hardware and kernel.
2089  **/
2090 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2091 {
2092         int err;
2093         int i;
2094
2095         switch (adapter->int_mode) {
2096         case E1000E_INT_MODE_MSIX:
2097                 if (adapter->flags & FLAG_HAS_MSIX) {
2098                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2099                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2100                                                         sizeof(struct
2101                                                                msix_entry),
2102                                                         GFP_KERNEL);
2103                         if (adapter->msix_entries) {
2104                                 struct e1000_adapter *a = adapter;
2105
2106                                 for (i = 0; i < adapter->num_vectors; i++)
2107                                         adapter->msix_entries[i].entry = i;
2108
2109                                 err = pci_enable_msix_range(a->pdev,
2110                                                             a->msix_entries,
2111                                                             a->num_vectors,
2112                                                             a->num_vectors);
2113                                 if (err > 0)
2114                                         return;
2115                         }
2116                         /* MSI-X failed, so fall through and try MSI */
2117                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2118                         e1000e_reset_interrupt_capability(adapter);
2119                 }
2120                 adapter->int_mode = E1000E_INT_MODE_MSI;
2121                 fallthrough;
2122         case E1000E_INT_MODE_MSI:
2123                 if (!pci_enable_msi(adapter->pdev)) {
2124                         adapter->flags |= FLAG_MSI_ENABLED;
2125                 } else {
2126                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2127                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2128                 }
2129                 fallthrough;
2130         case E1000E_INT_MODE_LEGACY:
2131                 /* Don't do anything; this is the system default */
2132                 break;
2133         }
2134
2135         /* store the number of vectors being used */
2136         adapter->num_vectors = 1;
2137 }
2138
2139 /**
2140  * e1000_request_msix - Initialize MSI-X interrupts
2141  * @adapter: board private structure
2142  *
2143  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2144  * kernel.
2145  **/
2146 static int e1000_request_msix(struct e1000_adapter *adapter)
2147 {
2148         struct net_device *netdev = adapter->netdev;
2149         int err = 0, vector = 0;
2150
2151         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2152                 snprintf(adapter->rx_ring->name,
2153                          sizeof(adapter->rx_ring->name) - 1,
2154                          "%.14s-rx-0", netdev->name);
2155         else
2156                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2157         err = request_irq(adapter->msix_entries[vector].vector,
2158                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2159                           netdev);
2160         if (err)
2161                 return err;
2162         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2163             E1000_EITR_82574(vector);
2164         adapter->rx_ring->itr_val = adapter->itr;
2165         vector++;
2166
2167         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2168                 snprintf(adapter->tx_ring->name,
2169                          sizeof(adapter->tx_ring->name) - 1,
2170                          "%.14s-tx-0", netdev->name);
2171         else
2172                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2173         err = request_irq(adapter->msix_entries[vector].vector,
2174                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2175                           netdev);
2176         if (err)
2177                 return err;
2178         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2179             E1000_EITR_82574(vector);
2180         adapter->tx_ring->itr_val = adapter->itr;
2181         vector++;
2182
2183         err = request_irq(adapter->msix_entries[vector].vector,
2184                           e1000_msix_other, 0, netdev->name, netdev);
2185         if (err)
2186                 return err;
2187
2188         e1000_configure_msix(adapter);
2189
2190         return 0;
2191 }
2192
2193 /**
2194  * e1000_request_irq - initialize interrupts
2195  * @adapter: board private structure
2196  *
2197  * Attempts to configure interrupts using the best available
2198  * capabilities of the hardware and kernel.
2199  **/
2200 static int e1000_request_irq(struct e1000_adapter *adapter)
2201 {
2202         struct net_device *netdev = adapter->netdev;
2203         int err;
2204
2205         if (adapter->msix_entries) {
2206                 err = e1000_request_msix(adapter);
2207                 if (!err)
2208                         return err;
2209                 /* fall back to MSI */
2210                 e1000e_reset_interrupt_capability(adapter);
2211                 adapter->int_mode = E1000E_INT_MODE_MSI;
2212                 e1000e_set_interrupt_capability(adapter);
2213         }
2214         if (adapter->flags & FLAG_MSI_ENABLED) {
2215                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2216                                   netdev->name, netdev);
2217                 if (!err)
2218                         return err;
2219
2220                 /* fall back to legacy interrupt */
2221                 e1000e_reset_interrupt_capability(adapter);
2222                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2223         }
2224
2225         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2226                           netdev->name, netdev);
2227         if (err)
2228                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2229
2230         return err;
2231 }
2232
2233 static void e1000_free_irq(struct e1000_adapter *adapter)
2234 {
2235         struct net_device *netdev = adapter->netdev;
2236
2237         if (adapter->msix_entries) {
2238                 int vector = 0;
2239
2240                 free_irq(adapter->msix_entries[vector].vector, netdev);
2241                 vector++;
2242
2243                 free_irq(adapter->msix_entries[vector].vector, netdev);
2244                 vector++;
2245
2246                 /* Other Causes interrupt vector */
2247                 free_irq(adapter->msix_entries[vector].vector, netdev);
2248                 return;
2249         }
2250
2251         free_irq(adapter->pdev->irq, netdev);
2252 }
2253
2254 /**
2255  * e1000_irq_disable - Mask off interrupt generation on the NIC
2256  * @adapter: board private structure
2257  **/
2258 static void e1000_irq_disable(struct e1000_adapter *adapter)
2259 {
2260         struct e1000_hw *hw = &adapter->hw;
2261
2262         ew32(IMC, ~0);
2263         if (adapter->msix_entries)
2264                 ew32(EIAC_82574, 0);
2265         e1e_flush();
2266
2267         if (adapter->msix_entries) {
2268                 int i;
2269
2270                 for (i = 0; i < adapter->num_vectors; i++)
2271                         synchronize_irq(adapter->msix_entries[i].vector);
2272         } else {
2273                 synchronize_irq(adapter->pdev->irq);
2274         }
2275 }
2276
2277 /**
2278  * e1000_irq_enable - Enable default interrupt generation settings
2279  * @adapter: board private structure
2280  **/
2281 static void e1000_irq_enable(struct e1000_adapter *adapter)
2282 {
2283         struct e1000_hw *hw = &adapter->hw;
2284
2285         if (adapter->msix_entries) {
2286                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2287                 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2288                      IMS_OTHER_MASK);
2289         } else if (hw->mac.type >= e1000_pch_lpt) {
2290                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2291         } else {
2292                 ew32(IMS, IMS_ENABLE_MASK);
2293         }
2294         e1e_flush();
2295 }
2296
2297 /**
2298  * e1000e_get_hw_control - get control of the h/w from f/w
2299  * @adapter: address of board private structure
2300  *
2301  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2302  * For ASF and Pass Through versions of f/w this means that
2303  * the driver is loaded. For AMT version (only with 82573)
2304  * of the f/w this means that the network i/f is open.
2305  **/
2306 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2307 {
2308         struct e1000_hw *hw = &adapter->hw;
2309         u32 ctrl_ext;
2310         u32 swsm;
2311
2312         /* Let firmware know the driver has taken over */
2313         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2314                 swsm = er32(SWSM);
2315                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2316         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2317                 ctrl_ext = er32(CTRL_EXT);
2318                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2319         }
2320 }
2321
2322 /**
2323  * e1000e_release_hw_control - release control of the h/w to f/w
2324  * @adapter: address of board private structure
2325  *
2326  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2327  * For ASF and Pass Through versions of f/w this means that the
2328  * driver is no longer loaded. For AMT version (only with 82573) i
2329  * of the f/w this means that the network i/f is closed.
2330  *
2331  **/
2332 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2333 {
2334         struct e1000_hw *hw = &adapter->hw;
2335         u32 ctrl_ext;
2336         u32 swsm;
2337
2338         /* Let firmware taken over control of h/w */
2339         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2340                 swsm = er32(SWSM);
2341                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2342         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2343                 ctrl_ext = er32(CTRL_EXT);
2344                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2345         }
2346 }
2347
2348 /**
2349  * e1000_alloc_ring_dma - allocate memory for a ring structure
2350  * @adapter: board private structure
2351  * @ring: ring struct for which to allocate dma
2352  **/
2353 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2354                                 struct e1000_ring *ring)
2355 {
2356         struct pci_dev *pdev = adapter->pdev;
2357
2358         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2359                                         GFP_KERNEL);
2360         if (!ring->desc)
2361                 return -ENOMEM;
2362
2363         return 0;
2364 }
2365
2366 /**
2367  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2368  * @tx_ring: Tx descriptor ring
2369  *
2370  * Return 0 on success, negative on failure
2371  **/
2372 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2373 {
2374         struct e1000_adapter *adapter = tx_ring->adapter;
2375         int err = -ENOMEM, size;
2376
2377         size = sizeof(struct e1000_buffer) * tx_ring->count;
2378         tx_ring->buffer_info = vzalloc(size);
2379         if (!tx_ring->buffer_info)
2380                 goto err;
2381
2382         /* round up to nearest 4K */
2383         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2384         tx_ring->size = ALIGN(tx_ring->size, 4096);
2385
2386         err = e1000_alloc_ring_dma(adapter, tx_ring);
2387         if (err)
2388                 goto err;
2389
2390         tx_ring->next_to_use = 0;
2391         tx_ring->next_to_clean = 0;
2392
2393         return 0;
2394 err:
2395         vfree(tx_ring->buffer_info);
2396         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2397         return err;
2398 }
2399
2400 /**
2401  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2402  * @rx_ring: Rx descriptor ring
2403  *
2404  * Returns 0 on success, negative on failure
2405  **/
2406 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2407 {
2408         struct e1000_adapter *adapter = rx_ring->adapter;
2409         struct e1000_buffer *buffer_info;
2410         int i, size, desc_len, err = -ENOMEM;
2411
2412         size = sizeof(struct e1000_buffer) * rx_ring->count;
2413         rx_ring->buffer_info = vzalloc(size);
2414         if (!rx_ring->buffer_info)
2415                 goto err;
2416
2417         for (i = 0; i < rx_ring->count; i++) {
2418                 buffer_info = &rx_ring->buffer_info[i];
2419                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2420                                                 sizeof(struct e1000_ps_page),
2421                                                 GFP_KERNEL);
2422                 if (!buffer_info->ps_pages)
2423                         goto err_pages;
2424         }
2425
2426         desc_len = sizeof(union e1000_rx_desc_packet_split);
2427
2428         /* Round up to nearest 4K */
2429         rx_ring->size = rx_ring->count * desc_len;
2430         rx_ring->size = ALIGN(rx_ring->size, 4096);
2431
2432         err = e1000_alloc_ring_dma(adapter, rx_ring);
2433         if (err)
2434                 goto err_pages;
2435
2436         rx_ring->next_to_clean = 0;
2437         rx_ring->next_to_use = 0;
2438         rx_ring->rx_skb_top = NULL;
2439
2440         return 0;
2441
2442 err_pages:
2443         for (i = 0; i < rx_ring->count; i++) {
2444                 buffer_info = &rx_ring->buffer_info[i];
2445                 kfree(buffer_info->ps_pages);
2446         }
2447 err:
2448         vfree(rx_ring->buffer_info);
2449         e_err("Unable to allocate memory for the receive descriptor ring\n");
2450         return err;
2451 }
2452
2453 /**
2454  * e1000_clean_tx_ring - Free Tx Buffers
2455  * @tx_ring: Tx descriptor ring
2456  **/
2457 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2458 {
2459         struct e1000_adapter *adapter = tx_ring->adapter;
2460         struct e1000_buffer *buffer_info;
2461         unsigned long size;
2462         unsigned int i;
2463
2464         for (i = 0; i < tx_ring->count; i++) {
2465                 buffer_info = &tx_ring->buffer_info[i];
2466                 e1000_put_txbuf(tx_ring, buffer_info, false);
2467         }
2468
2469         netdev_reset_queue(adapter->netdev);
2470         size = sizeof(struct e1000_buffer) * tx_ring->count;
2471         memset(tx_ring->buffer_info, 0, size);
2472
2473         memset(tx_ring->desc, 0, tx_ring->size);
2474
2475         tx_ring->next_to_use = 0;
2476         tx_ring->next_to_clean = 0;
2477 }
2478
2479 /**
2480  * e1000e_free_tx_resources - Free Tx Resources per Queue
2481  * @tx_ring: Tx descriptor ring
2482  *
2483  * Free all transmit software resources
2484  **/
2485 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2486 {
2487         struct e1000_adapter *adapter = tx_ring->adapter;
2488         struct pci_dev *pdev = adapter->pdev;
2489
2490         e1000_clean_tx_ring(tx_ring);
2491
2492         vfree(tx_ring->buffer_info);
2493         tx_ring->buffer_info = NULL;
2494
2495         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2496                           tx_ring->dma);
2497         tx_ring->desc = NULL;
2498 }
2499
2500 /**
2501  * e1000e_free_rx_resources - Free Rx Resources
2502  * @rx_ring: Rx descriptor ring
2503  *
2504  * Free all receive software resources
2505  **/
2506 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2507 {
2508         struct e1000_adapter *adapter = rx_ring->adapter;
2509         struct pci_dev *pdev = adapter->pdev;
2510         int i;
2511
2512         e1000_clean_rx_ring(rx_ring);
2513
2514         for (i = 0; i < rx_ring->count; i++)
2515                 kfree(rx_ring->buffer_info[i].ps_pages);
2516
2517         vfree(rx_ring->buffer_info);
2518         rx_ring->buffer_info = NULL;
2519
2520         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2521                           rx_ring->dma);
2522         rx_ring->desc = NULL;
2523 }
2524
2525 /**
2526  * e1000_update_itr - update the dynamic ITR value based on statistics
2527  * @itr_setting: current adapter->itr
2528  * @packets: the number of packets during this measurement interval
2529  * @bytes: the number of bytes during this measurement interval
2530  *
2531  *      Stores a new ITR value based on packets and byte
2532  *      counts during the last interrupt.  The advantage of per interrupt
2533  *      computation is faster updates and more accurate ITR for the current
2534  *      traffic pattern.  Constants in this function were computed
2535  *      based on theoretical maximum wire speed and thresholds were set based
2536  *      on testing data as well as attempting to minimize response time
2537  *      while increasing bulk throughput.  This functionality is controlled
2538  *      by the InterruptThrottleRate module parameter.
2539  **/
2540 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2541 {
2542         unsigned int retval = itr_setting;
2543
2544         if (packets == 0)
2545                 return itr_setting;
2546
2547         switch (itr_setting) {
2548         case lowest_latency:
2549                 /* handle TSO and jumbo frames */
2550                 if (bytes / packets > 8000)
2551                         retval = bulk_latency;
2552                 else if ((packets < 5) && (bytes > 512))
2553                         retval = low_latency;
2554                 break;
2555         case low_latency:       /* 50 usec aka 20000 ints/s */
2556                 if (bytes > 10000) {
2557                         /* this if handles the TSO accounting */
2558                         if (bytes / packets > 8000)
2559                                 retval = bulk_latency;
2560                         else if ((packets < 10) || ((bytes / packets) > 1200))
2561                                 retval = bulk_latency;
2562                         else if ((packets > 35))
2563                                 retval = lowest_latency;
2564                 } else if (bytes / packets > 2000) {
2565                         retval = bulk_latency;
2566                 } else if (packets <= 2 && bytes < 512) {
2567                         retval = lowest_latency;
2568                 }
2569                 break;
2570         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2571                 if (bytes > 25000) {
2572                         if (packets > 35)
2573                                 retval = low_latency;
2574                 } else if (bytes < 6000) {
2575                         retval = low_latency;
2576                 }
2577                 break;
2578         }
2579
2580         return retval;
2581 }
2582
2583 static void e1000_set_itr(struct e1000_adapter *adapter)
2584 {
2585         u16 current_itr;
2586         u32 new_itr = adapter->itr;
2587
2588         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2589         if (adapter->link_speed != SPEED_1000) {
2590                 current_itr = 0;
2591                 new_itr = 4000;
2592                 goto set_itr_now;
2593         }
2594
2595         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2596                 new_itr = 0;
2597                 goto set_itr_now;
2598         }
2599
2600         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2601                                            adapter->total_tx_packets,
2602                                            adapter->total_tx_bytes);
2603         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2604         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2605                 adapter->tx_itr = low_latency;
2606
2607         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2608                                            adapter->total_rx_packets,
2609                                            adapter->total_rx_bytes);
2610         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2611         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2612                 adapter->rx_itr = low_latency;
2613
2614         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2615
2616         /* counts and packets in update_itr are dependent on these numbers */
2617         switch (current_itr) {
2618         case lowest_latency:
2619                 new_itr = 70000;
2620                 break;
2621         case low_latency:
2622                 new_itr = 20000;        /* aka hwitr = ~200 */
2623                 break;
2624         case bulk_latency:
2625                 new_itr = 4000;
2626                 break;
2627         default:
2628                 break;
2629         }
2630
2631 set_itr_now:
2632         if (new_itr != adapter->itr) {
2633                 /* this attempts to bias the interrupt rate towards Bulk
2634                  * by adding intermediate steps when interrupt rate is
2635                  * increasing
2636                  */
2637                 new_itr = new_itr > adapter->itr ?
2638                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2639                 adapter->itr = new_itr;
2640                 adapter->rx_ring->itr_val = new_itr;
2641                 if (adapter->msix_entries)
2642                         adapter->rx_ring->set_itr = 1;
2643                 else
2644                         e1000e_write_itr(adapter, new_itr);
2645         }
2646 }
2647
2648 /**
2649  * e1000e_write_itr - write the ITR value to the appropriate registers
2650  * @adapter: address of board private structure
2651  * @itr: new ITR value to program
2652  *
2653  * e1000e_write_itr determines if the adapter is in MSI-X mode
2654  * and, if so, writes the EITR registers with the ITR value.
2655  * Otherwise, it writes the ITR value into the ITR register.
2656  **/
2657 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2658 {
2659         struct e1000_hw *hw = &adapter->hw;
2660         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2661
2662         if (adapter->msix_entries) {
2663                 int vector;
2664
2665                 for (vector = 0; vector < adapter->num_vectors; vector++)
2666                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2667         } else {
2668                 ew32(ITR, new_itr);
2669         }
2670 }
2671
2672 /**
2673  * e1000_alloc_queues - Allocate memory for all rings
2674  * @adapter: board private structure to initialize
2675  **/
2676 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2677 {
2678         int size = sizeof(struct e1000_ring);
2679
2680         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2681         if (!adapter->tx_ring)
2682                 goto err;
2683         adapter->tx_ring->count = adapter->tx_ring_count;
2684         adapter->tx_ring->adapter = adapter;
2685
2686         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2687         if (!adapter->rx_ring)
2688                 goto err;
2689         adapter->rx_ring->count = adapter->rx_ring_count;
2690         adapter->rx_ring->adapter = adapter;
2691
2692         return 0;
2693 err:
2694         e_err("Unable to allocate memory for queues\n");
2695         kfree(adapter->rx_ring);
2696         kfree(adapter->tx_ring);
2697         return -ENOMEM;
2698 }
2699
2700 /**
2701  * e1000e_poll - NAPI Rx polling callback
2702  * @napi: struct associated with this polling callback
2703  * @budget: number of packets driver is allowed to process this poll
2704  **/
2705 static int e1000e_poll(struct napi_struct *napi, int budget)
2706 {
2707         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2708                                                      napi);
2709         struct e1000_hw *hw = &adapter->hw;
2710         struct net_device *poll_dev = adapter->netdev;
2711         int tx_cleaned = 1, work_done = 0;
2712
2713         adapter = netdev_priv(poll_dev);
2714
2715         if (!adapter->msix_entries ||
2716             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2717                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2718
2719         adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2720
2721         if (!tx_cleaned || work_done == budget)
2722                 return budget;
2723
2724         /* Exit the polling mode, but don't re-enable interrupts if stack might
2725          * poll us due to busy-polling
2726          */
2727         if (likely(napi_complete_done(napi, work_done))) {
2728                 if (adapter->itr_setting & 3)
2729                         e1000_set_itr(adapter);
2730                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2731                         if (adapter->msix_entries)
2732                                 ew32(IMS, adapter->rx_ring->ims_val);
2733                         else
2734                                 e1000_irq_enable(adapter);
2735                 }
2736         }
2737
2738         return work_done;
2739 }
2740
2741 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2742                                  __always_unused __be16 proto, u16 vid)
2743 {
2744         struct e1000_adapter *adapter = netdev_priv(netdev);
2745         struct e1000_hw *hw = &adapter->hw;
2746         u32 vfta, index;
2747
2748         /* don't update vlan cookie if already programmed */
2749         if ((adapter->hw.mng_cookie.status &
2750              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2751             (vid == adapter->mng_vlan_id))
2752                 return 0;
2753
2754         /* add VID to filter table */
2755         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2756                 index = (vid >> 5) & 0x7F;
2757                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2758                 vfta |= BIT((vid & 0x1F));
2759                 hw->mac.ops.write_vfta(hw, index, vfta);
2760         }
2761
2762         set_bit(vid, adapter->active_vlans);
2763
2764         return 0;
2765 }
2766
2767 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2768                                   __always_unused __be16 proto, u16 vid)
2769 {
2770         struct e1000_adapter *adapter = netdev_priv(netdev);
2771         struct e1000_hw *hw = &adapter->hw;
2772         u32 vfta, index;
2773
2774         if ((adapter->hw.mng_cookie.status &
2775              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2776             (vid == adapter->mng_vlan_id)) {
2777                 /* release control to f/w */
2778                 e1000e_release_hw_control(adapter);
2779                 return 0;
2780         }
2781
2782         /* remove VID from filter table */
2783         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2784                 index = (vid >> 5) & 0x7F;
2785                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2786                 vfta &= ~BIT((vid & 0x1F));
2787                 hw->mac.ops.write_vfta(hw, index, vfta);
2788         }
2789
2790         clear_bit(vid, adapter->active_vlans);
2791
2792         return 0;
2793 }
2794
2795 /**
2796  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2797  * @adapter: board private structure to initialize
2798  **/
2799 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2800 {
2801         struct net_device *netdev = adapter->netdev;
2802         struct e1000_hw *hw = &adapter->hw;
2803         u32 rctl;
2804
2805         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2806                 /* disable VLAN receive filtering */
2807                 rctl = er32(RCTL);
2808                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2809                 ew32(RCTL, rctl);
2810
2811                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2812                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2813                                                adapter->mng_vlan_id);
2814                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2815                 }
2816         }
2817 }
2818
2819 /**
2820  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2821  * @adapter: board private structure to initialize
2822  **/
2823 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2824 {
2825         struct e1000_hw *hw = &adapter->hw;
2826         u32 rctl;
2827
2828         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2829                 /* enable VLAN receive filtering */
2830                 rctl = er32(RCTL);
2831                 rctl |= E1000_RCTL_VFE;
2832                 rctl &= ~E1000_RCTL_CFIEN;
2833                 ew32(RCTL, rctl);
2834         }
2835 }
2836
2837 /**
2838  * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2839  * @adapter: board private structure to initialize
2840  **/
2841 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2842 {
2843         struct e1000_hw *hw = &adapter->hw;
2844         u32 ctrl;
2845
2846         /* disable VLAN tag insert/strip */
2847         ctrl = er32(CTRL);
2848         ctrl &= ~E1000_CTRL_VME;
2849         ew32(CTRL, ctrl);
2850 }
2851
2852 /**
2853  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2854  * @adapter: board private structure to initialize
2855  **/
2856 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2857 {
2858         struct e1000_hw *hw = &adapter->hw;
2859         u32 ctrl;
2860
2861         /* enable VLAN tag insert/strip */
2862         ctrl = er32(CTRL);
2863         ctrl |= E1000_CTRL_VME;
2864         ew32(CTRL, ctrl);
2865 }
2866
2867 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2868 {
2869         struct net_device *netdev = adapter->netdev;
2870         u16 vid = adapter->hw.mng_cookie.vlan_id;
2871         u16 old_vid = adapter->mng_vlan_id;
2872
2873         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2874                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2875                 adapter->mng_vlan_id = vid;
2876         }
2877
2878         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2879                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2880 }
2881
2882 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2883 {
2884         u16 vid;
2885
2886         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2887
2888         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2889             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2890 }
2891
2892 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2893 {
2894         struct e1000_hw *hw = &adapter->hw;
2895         u32 manc, manc2h, mdef, i, j;
2896
2897         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2898                 return;
2899
2900         manc = er32(MANC);
2901
2902         /* enable receiving management packets to the host. this will probably
2903          * generate destination unreachable messages from the host OS, but
2904          * the packets will be handled on SMBUS
2905          */
2906         manc |= E1000_MANC_EN_MNG2HOST;
2907         manc2h = er32(MANC2H);
2908
2909         switch (hw->mac.type) {
2910         default:
2911                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2912                 break;
2913         case e1000_82574:
2914         case e1000_82583:
2915                 /* Check if IPMI pass-through decision filter already exists;
2916                  * if so, enable it.
2917                  */
2918                 for (i = 0, j = 0; i < 8; i++) {
2919                         mdef = er32(MDEF(i));
2920
2921                         /* Ignore filters with anything other than IPMI ports */
2922                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2923                                 continue;
2924
2925                         /* Enable this decision filter in MANC2H */
2926                         if (mdef)
2927                                 manc2h |= BIT(i);
2928
2929                         j |= mdef;
2930                 }
2931
2932                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2933                         break;
2934
2935                 /* Create new decision filter in an empty filter */
2936                 for (i = 0, j = 0; i < 8; i++)
2937                         if (er32(MDEF(i)) == 0) {
2938                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2939                                                E1000_MDEF_PORT_664));
2940                                 manc2h |= BIT(1);
2941                                 j++;
2942                                 break;
2943                         }
2944
2945                 if (!j)
2946                         e_warn("Unable to create IPMI pass-through filter\n");
2947                 break;
2948         }
2949
2950         ew32(MANC2H, manc2h);
2951         ew32(MANC, manc);
2952 }
2953
2954 /**
2955  * e1000_configure_tx - Configure Transmit Unit after Reset
2956  * @adapter: board private structure
2957  *
2958  * Configure the Tx unit of the MAC after a reset.
2959  **/
2960 static void e1000_configure_tx(struct e1000_adapter *adapter)
2961 {
2962         struct e1000_hw *hw = &adapter->hw;
2963         struct e1000_ring *tx_ring = adapter->tx_ring;
2964         u64 tdba;
2965         u32 tdlen, tctl, tarc;
2966
2967         /* Setup the HW Tx Head and Tail descriptor pointers */
2968         tdba = tx_ring->dma;
2969         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2970         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2971         ew32(TDBAH(0), (tdba >> 32));
2972         ew32(TDLEN(0), tdlen);
2973         ew32(TDH(0), 0);
2974         ew32(TDT(0), 0);
2975         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2976         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2977
2978         writel(0, tx_ring->head);
2979         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2980                 e1000e_update_tdt_wa(tx_ring, 0);
2981         else
2982                 writel(0, tx_ring->tail);
2983
2984         /* Set the Tx Interrupt Delay register */
2985         ew32(TIDV, adapter->tx_int_delay);
2986         /* Tx irq moderation */
2987         ew32(TADV, adapter->tx_abs_int_delay);
2988
2989         if (adapter->flags2 & FLAG2_DMA_BURST) {
2990                 u32 txdctl = er32(TXDCTL(0));
2991
2992                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2993                             E1000_TXDCTL_WTHRESH);
2994                 /* set up some performance related parameters to encourage the
2995                  * hardware to use the bus more efficiently in bursts, depends
2996                  * on the tx_int_delay to be enabled,
2997                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2998                  * hthresh = 1 ==> prefetch when one or more available
2999                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
3000                  * BEWARE: this seems to work but should be considered first if
3001                  * there are Tx hangs or other Tx related bugs
3002                  */
3003                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
3004                 ew32(TXDCTL(0), txdctl);
3005         }
3006         /* erratum work around: set txdctl the same for both queues */
3007         ew32(TXDCTL(1), er32(TXDCTL(0)));
3008
3009         /* Program the Transmit Control Register */
3010         tctl = er32(TCTL);
3011         tctl &= ~E1000_TCTL_CT;
3012         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3013                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3014
3015         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
3016                 tarc = er32(TARC(0));
3017                 /* set the speed mode bit, we'll clear it if we're not at
3018                  * gigabit link later
3019                  */
3020 #define SPEED_MODE_BIT BIT(21)
3021                 tarc |= SPEED_MODE_BIT;
3022                 ew32(TARC(0), tarc);
3023         }
3024
3025         /* errata: program both queues to unweighted RR */
3026         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
3027                 tarc = er32(TARC(0));
3028                 tarc |= 1;
3029                 ew32(TARC(0), tarc);
3030                 tarc = er32(TARC(1));
3031                 tarc |= 1;
3032                 ew32(TARC(1), tarc);
3033         }
3034
3035         /* Setup Transmit Descriptor Settings for eop descriptor */
3036         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3037
3038         /* only set IDE if we are delaying interrupts using the timers */
3039         if (adapter->tx_int_delay)
3040                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3041
3042         /* enable Report Status bit */
3043         adapter->txd_cmd |= E1000_TXD_CMD_RS;
3044
3045         ew32(TCTL, tctl);
3046
3047         hw->mac.ops.config_collision_dist(hw);
3048
3049         /* SPT and KBL Si errata workaround to avoid data corruption */
3050         if (hw->mac.type == e1000_pch_spt) {
3051                 u32 reg_val;
3052
3053                 reg_val = er32(IOSFPC);
3054                 reg_val |= E1000_RCTL_RDMTS_HEX;
3055                 ew32(IOSFPC, reg_val);
3056
3057                 reg_val = er32(TARC(0));
3058                 /* SPT and KBL Si errata workaround to avoid Tx hang.
3059                  * Dropping the number of outstanding requests from
3060                  * 3 to 2 in order to avoid a buffer overrun.
3061                  */
3062                 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3063                 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3064                 ew32(TARC(0), reg_val);
3065         }
3066 }
3067
3068 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3069                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3070
3071 /**
3072  * e1000_setup_rctl - configure the receive control registers
3073  * @adapter: Board private structure
3074  **/
3075 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3076 {
3077         struct e1000_hw *hw = &adapter->hw;
3078         u32 rctl, rfctl;
3079         u32 pages = 0;
3080
3081         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3082          * If jumbo frames not set, program related MAC/PHY registers
3083          * to h/w defaults
3084          */
3085         if (hw->mac.type >= e1000_pch2lan) {
3086                 s32 ret_val;
3087
3088                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3089                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3090                 else
3091                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3092
3093                 if (ret_val)
3094                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3095         }
3096
3097         /* Program MC offset vector base */
3098         rctl = er32(RCTL);
3099         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3100         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3101             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3102             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3103
3104         /* Do not Store bad packets */
3105         rctl &= ~E1000_RCTL_SBP;
3106
3107         /* Enable Long Packet receive */
3108         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3109                 rctl &= ~E1000_RCTL_LPE;
3110         else
3111                 rctl |= E1000_RCTL_LPE;
3112
3113         /* Some systems expect that the CRC is included in SMBUS traffic. The
3114          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3115          * host memory when this is enabled
3116          */
3117         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3118                 rctl |= E1000_RCTL_SECRC;
3119
3120         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3121         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3122                 u16 phy_data;
3123
3124                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3125                 phy_data &= 0xfff8;
3126                 phy_data |= BIT(2);
3127                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3128
3129                 e1e_rphy(hw, 22, &phy_data);
3130                 phy_data &= 0x0fff;
3131                 phy_data |= BIT(14);
3132                 e1e_wphy(hw, 0x10, 0x2823);
3133                 e1e_wphy(hw, 0x11, 0x0003);
3134                 e1e_wphy(hw, 22, phy_data);
3135         }
3136
3137         /* Setup buffer sizes */
3138         rctl &= ~E1000_RCTL_SZ_4096;
3139         rctl |= E1000_RCTL_BSEX;
3140         switch (adapter->rx_buffer_len) {
3141         case 2048:
3142         default:
3143                 rctl |= E1000_RCTL_SZ_2048;
3144                 rctl &= ~E1000_RCTL_BSEX;
3145                 break;
3146         case 4096:
3147                 rctl |= E1000_RCTL_SZ_4096;
3148                 break;
3149         case 8192:
3150                 rctl |= E1000_RCTL_SZ_8192;
3151                 break;
3152         case 16384:
3153                 rctl |= E1000_RCTL_SZ_16384;
3154                 break;
3155         }
3156
3157         /* Enable Extended Status in all Receive Descriptors */
3158         rfctl = er32(RFCTL);
3159         rfctl |= E1000_RFCTL_EXTEN;
3160         ew32(RFCTL, rfctl);
3161
3162         /* 82571 and greater support packet-split where the protocol
3163          * header is placed in skb->data and the packet data is
3164          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3165          * In the case of a non-split, skb->data is linearly filled,
3166          * followed by the page buffers.  Therefore, skb->data is
3167          * sized to hold the largest protocol header.
3168          *
3169          * allocations using alloc_page take too long for regular MTU
3170          * so only enable packet split for jumbo frames
3171          *
3172          * Using pages when the page size is greater than 16k wastes
3173          * a lot of memory, since we allocate 3 pages at all times
3174          * per packet.
3175          */
3176         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3177         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3178                 adapter->rx_ps_pages = pages;
3179         else
3180                 adapter->rx_ps_pages = 0;
3181
3182         if (adapter->rx_ps_pages) {
3183                 u32 psrctl = 0;
3184
3185                 /* Enable Packet split descriptors */
3186                 rctl |= E1000_RCTL_DTYP_PS;
3187
3188                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3189
3190                 switch (adapter->rx_ps_pages) {
3191                 case 3:
3192                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3193                         fallthrough;
3194                 case 2:
3195                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3196                         fallthrough;
3197                 case 1:
3198                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3199                         break;
3200                 }
3201
3202                 ew32(PSRCTL, psrctl);
3203         }
3204
3205         /* This is useful for sniffing bad packets. */
3206         if (adapter->netdev->features & NETIF_F_RXALL) {
3207                 /* UPE and MPE will be handled by normal PROMISC logic
3208                  * in e1000e_set_rx_mode
3209                  */
3210                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3211                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3212                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3213
3214                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3215                           E1000_RCTL_DPF |      /* Allow filtered pause */
3216                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3217                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3218                  * and that breaks VLANs.
3219                  */
3220         }
3221
3222         ew32(RCTL, rctl);
3223         /* just started the receive unit, no need to restart */
3224         adapter->flags &= ~FLAG_RESTART_NOW;
3225 }
3226
3227 /**
3228  * e1000_configure_rx - Configure Receive Unit after Reset
3229  * @adapter: board private structure
3230  *
3231  * Configure the Rx unit of the MAC after a reset.
3232  **/
3233 static void e1000_configure_rx(struct e1000_adapter *adapter)
3234 {
3235         struct e1000_hw *hw = &adapter->hw;
3236         struct e1000_ring *rx_ring = adapter->rx_ring;
3237         u64 rdba;
3238         u32 rdlen, rctl, rxcsum, ctrl_ext;
3239
3240         if (adapter->rx_ps_pages) {
3241                 /* this is a 32 byte descriptor */
3242                 rdlen = rx_ring->count *
3243                     sizeof(union e1000_rx_desc_packet_split);
3244                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3245                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3246         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3247                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3248                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3249                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3250         } else {
3251                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3252                 adapter->clean_rx = e1000_clean_rx_irq;
3253                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3254         }
3255
3256         /* disable receives while setting up the descriptors */
3257         rctl = er32(RCTL);
3258         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3259                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3260         e1e_flush();
3261         usleep_range(10000, 11000);
3262
3263         if (adapter->flags2 & FLAG2_DMA_BURST) {
3264                 /* set the writeback threshold (only takes effect if the RDTR
3265                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3266                  * enable prefetching of 0x20 Rx descriptors
3267                  * granularity = 01
3268                  * wthresh = 04,
3269                  * hthresh = 04,
3270                  * pthresh = 0x20
3271                  */
3272                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3273                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3274         }
3275
3276         /* set the Receive Delay Timer Register */
3277         ew32(RDTR, adapter->rx_int_delay);
3278
3279         /* irq moderation */
3280         ew32(RADV, adapter->rx_abs_int_delay);
3281         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3282                 e1000e_write_itr(adapter, adapter->itr);
3283
3284         ctrl_ext = er32(CTRL_EXT);
3285         /* Auto-Mask interrupts upon ICR access */
3286         ctrl_ext |= E1000_CTRL_EXT_IAME;
3287         ew32(IAM, 0xffffffff);
3288         ew32(CTRL_EXT, ctrl_ext);
3289         e1e_flush();
3290
3291         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3292          * the Base and Length of the Rx Descriptor Ring
3293          */
3294         rdba = rx_ring->dma;
3295         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3296         ew32(RDBAH(0), (rdba >> 32));
3297         ew32(RDLEN(0), rdlen);
3298         ew32(RDH(0), 0);
3299         ew32(RDT(0), 0);
3300         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3301         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3302
3303         writel(0, rx_ring->head);
3304         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3305                 e1000e_update_rdt_wa(rx_ring, 0);
3306         else
3307                 writel(0, rx_ring->tail);
3308
3309         /* Enable Receive Checksum Offload for TCP and UDP */
3310         rxcsum = er32(RXCSUM);
3311         if (adapter->netdev->features & NETIF_F_RXCSUM)
3312                 rxcsum |= E1000_RXCSUM_TUOFL;
3313         else
3314                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3315         ew32(RXCSUM, rxcsum);
3316
3317         /* With jumbo frames, excessive C-state transition latencies result
3318          * in dropped transactions.
3319          */
3320         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3321                 u32 lat =
3322                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3323                      adapter->max_frame_size) * 8 / 1000;
3324
3325                 if (adapter->flags & FLAG_IS_ICH) {
3326                         u32 rxdctl = er32(RXDCTL(0));
3327
3328                         ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3329                 }
3330
3331                 dev_info(&adapter->pdev->dev,
3332                          "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3333                 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3334         } else {
3335                 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3336                                                PM_QOS_DEFAULT_VALUE);
3337         }
3338
3339         /* Enable Receives */
3340         ew32(RCTL, rctl);
3341 }
3342
3343 /**
3344  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3345  * @netdev: network interface device structure
3346  *
3347  * Writes multicast address list to the MTA hash table.
3348  * Returns: -ENOMEM on failure
3349  *                0 on no addresses written
3350  *                X on writing X addresses to MTA
3351  */
3352 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3353 {
3354         struct e1000_adapter *adapter = netdev_priv(netdev);
3355         struct e1000_hw *hw = &adapter->hw;
3356         struct netdev_hw_addr *ha;
3357         u8 *mta_list;
3358         int i;
3359
3360         if (netdev_mc_empty(netdev)) {
3361                 /* nothing to program, so clear mc list */
3362                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3363                 return 0;
3364         }
3365
3366         mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3367         if (!mta_list)
3368                 return -ENOMEM;
3369
3370         /* update_mc_addr_list expects a packed array of only addresses. */
3371         i = 0;
3372         netdev_for_each_mc_addr(ha, netdev)
3373             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3374
3375         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3376         kfree(mta_list);
3377
3378         return netdev_mc_count(netdev);
3379 }
3380
3381 /**
3382  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3383  * @netdev: network interface device structure
3384  *
3385  * Writes unicast address list to the RAR table.
3386  * Returns: -ENOMEM on failure/insufficient address space
3387  *                0 on no addresses written
3388  *                X on writing X addresses to the RAR table
3389  **/
3390 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3391 {
3392         struct e1000_adapter *adapter = netdev_priv(netdev);
3393         struct e1000_hw *hw = &adapter->hw;
3394         unsigned int rar_entries;
3395         int count = 0;
3396
3397         rar_entries = hw->mac.ops.rar_get_count(hw);
3398
3399         /* save a rar entry for our hardware address */
3400         rar_entries--;
3401
3402         /* save a rar entry for the LAA workaround */
3403         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3404                 rar_entries--;
3405
3406         /* return ENOMEM indicating insufficient memory for addresses */
3407         if (netdev_uc_count(netdev) > rar_entries)
3408                 return -ENOMEM;
3409
3410         if (!netdev_uc_empty(netdev) && rar_entries) {
3411                 struct netdev_hw_addr *ha;
3412
3413                 /* write the addresses in reverse order to avoid write
3414                  * combining
3415                  */
3416                 netdev_for_each_uc_addr(ha, netdev) {
3417                         int ret_val;
3418
3419                         if (!rar_entries)
3420                                 break;
3421                         ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3422                         if (ret_val < 0)
3423                                 return -ENOMEM;
3424                         count++;
3425                 }
3426         }
3427
3428         /* zero out the remaining RAR entries not used above */
3429         for (; rar_entries > 0; rar_entries--) {
3430                 ew32(RAH(rar_entries), 0);
3431                 ew32(RAL(rar_entries), 0);
3432         }
3433         e1e_flush();
3434
3435         return count;
3436 }
3437
3438 /**
3439  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3440  * @netdev: network interface device structure
3441  *
3442  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3443  * address list or the network interface flags are updated.  This routine is
3444  * responsible for configuring the hardware for proper unicast, multicast,
3445  * promiscuous mode, and all-multi behavior.
3446  **/
3447 static void e1000e_set_rx_mode(struct net_device *netdev)
3448 {
3449         struct e1000_adapter *adapter = netdev_priv(netdev);
3450         struct e1000_hw *hw = &adapter->hw;
3451         u32 rctl;
3452
3453         if (pm_runtime_suspended(netdev->dev.parent))
3454                 return;
3455
3456         /* Check for Promiscuous and All Multicast modes */
3457         rctl = er32(RCTL);
3458
3459         /* clear the affected bits */
3460         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3461
3462         if (netdev->flags & IFF_PROMISC) {
3463                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3464                 /* Do not hardware filter VLANs in promisc mode */
3465                 e1000e_vlan_filter_disable(adapter);
3466         } else {
3467                 int count;
3468
3469                 if (netdev->flags & IFF_ALLMULTI) {
3470                         rctl |= E1000_RCTL_MPE;
3471                 } else {
3472                         /* Write addresses to the MTA, if the attempt fails
3473                          * then we should just turn on promiscuous mode so
3474                          * that we can at least receive multicast traffic
3475                          */
3476                         count = e1000e_write_mc_addr_list(netdev);
3477                         if (count < 0)
3478                                 rctl |= E1000_RCTL_MPE;
3479                 }
3480                 e1000e_vlan_filter_enable(adapter);
3481                 /* Write addresses to available RAR registers, if there is not
3482                  * sufficient space to store all the addresses then enable
3483                  * unicast promiscuous mode
3484                  */
3485                 count = e1000e_write_uc_addr_list(netdev);
3486                 if (count < 0)
3487                         rctl |= E1000_RCTL_UPE;
3488         }
3489
3490         ew32(RCTL, rctl);
3491
3492         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3493                 e1000e_vlan_strip_enable(adapter);
3494         else
3495                 e1000e_vlan_strip_disable(adapter);
3496 }
3497
3498 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3499 {
3500         struct e1000_hw *hw = &adapter->hw;
3501         u32 mrqc, rxcsum;
3502         u32 rss_key[10];
3503         int i;
3504
3505         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3506         for (i = 0; i < 10; i++)
3507                 ew32(RSSRK(i), rss_key[i]);
3508
3509         /* Direct all traffic to queue 0 */
3510         for (i = 0; i < 32; i++)
3511                 ew32(RETA(i), 0);
3512
3513         /* Disable raw packet checksumming so that RSS hash is placed in
3514          * descriptor on writeback.
3515          */
3516         rxcsum = er32(RXCSUM);
3517         rxcsum |= E1000_RXCSUM_PCSD;
3518
3519         ew32(RXCSUM, rxcsum);
3520
3521         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3522                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3523                 E1000_MRQC_RSS_FIELD_IPV6 |
3524                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3525                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3526
3527         ew32(MRQC, mrqc);
3528 }
3529
3530 /**
3531  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3532  * @adapter: board private structure
3533  * @timinca: pointer to returned time increment attributes
3534  *
3535  * Get attributes for incrementing the System Time Register SYSTIML/H at
3536  * the default base frequency, and set the cyclecounter shift value.
3537  **/
3538 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3539 {
3540         struct e1000_hw *hw = &adapter->hw;
3541         u32 incvalue, incperiod, shift;
3542
3543         /* Make sure clock is enabled on I217/I218/I219  before checking
3544          * the frequency
3545          */
3546         if ((hw->mac.type >= e1000_pch_lpt) &&
3547             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3548             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3549                 u32 fextnvm7 = er32(FEXTNVM7);
3550
3551                 if (!(fextnvm7 & BIT(0))) {
3552                         ew32(FEXTNVM7, fextnvm7 | BIT(0));
3553                         e1e_flush();
3554                 }
3555         }
3556
3557         switch (hw->mac.type) {
3558         case e1000_pch2lan:
3559                 /* Stable 96MHz frequency */
3560                 incperiod = INCPERIOD_96MHZ;
3561                 incvalue = INCVALUE_96MHZ;
3562                 shift = INCVALUE_SHIFT_96MHZ;
3563                 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3564                 break;
3565         case e1000_pch_lpt:
3566                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3567                         /* Stable 96MHz frequency */
3568                         incperiod = INCPERIOD_96MHZ;
3569                         incvalue = INCVALUE_96MHZ;
3570                         shift = INCVALUE_SHIFT_96MHZ;
3571                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3572                 } else {
3573                         /* Stable 25MHz frequency */
3574                         incperiod = INCPERIOD_25MHZ;
3575                         incvalue = INCVALUE_25MHZ;
3576                         shift = INCVALUE_SHIFT_25MHZ;
3577                         adapter->cc.shift = shift;
3578                 }
3579                 break;
3580         case e1000_pch_spt:
3581                 /* Stable 24MHz frequency */
3582                 incperiod = INCPERIOD_24MHZ;
3583                 incvalue = INCVALUE_24MHZ;
3584                 shift = INCVALUE_SHIFT_24MHZ;
3585                 adapter->cc.shift = shift;
3586                 break;
3587         case e1000_pch_cnp:
3588         case e1000_pch_tgp:
3589         case e1000_pch_adp:
3590         case e1000_pch_mtp:
3591                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3592                         /* Stable 24MHz frequency */
3593                         incperiod = INCPERIOD_24MHZ;
3594                         incvalue = INCVALUE_24MHZ;
3595                         shift = INCVALUE_SHIFT_24MHZ;
3596                         adapter->cc.shift = shift;
3597                 } else {
3598                         /* Stable 38400KHz frequency */
3599                         incperiod = INCPERIOD_38400KHZ;
3600                         incvalue = INCVALUE_38400KHZ;
3601                         shift = INCVALUE_SHIFT_38400KHZ;
3602                         adapter->cc.shift = shift;
3603                 }
3604                 break;
3605         case e1000_82574:
3606         case e1000_82583:
3607                 /* Stable 25MHz frequency */
3608                 incperiod = INCPERIOD_25MHZ;
3609                 incvalue = INCVALUE_25MHZ;
3610                 shift = INCVALUE_SHIFT_25MHZ;
3611                 adapter->cc.shift = shift;
3612                 break;
3613         default:
3614                 return -EINVAL;
3615         }
3616
3617         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3618                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3619
3620         return 0;
3621 }
3622
3623 /**
3624  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3625  * @adapter: board private structure
3626  * @config: timestamp configuration
3627  *
3628  * Outgoing time stamping can be enabled and disabled. Play nice and
3629  * disable it when requested, although it shouldn't cause any overhead
3630  * when no packet needs it. At most one packet in the queue may be
3631  * marked for time stamping, otherwise it would be impossible to tell
3632  * for sure to which packet the hardware time stamp belongs.
3633  *
3634  * Incoming time stamping has to be configured via the hardware filters.
3635  * Not all combinations are supported, in particular event type has to be
3636  * specified. Matching the kind of event packet is not supported, with the
3637  * exception of "all V2 events regardless of level 2 or 4".
3638  **/
3639 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3640                                   struct hwtstamp_config *config)
3641 {
3642         struct e1000_hw *hw = &adapter->hw;
3643         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3644         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3645         u32 rxmtrl = 0;
3646         u16 rxudp = 0;
3647         bool is_l4 = false;
3648         bool is_l2 = false;
3649         u32 regval;
3650
3651         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3652                 return -EINVAL;
3653
3654         /* flags reserved for future extensions - must be zero */
3655         if (config->flags)
3656                 return -EINVAL;
3657
3658         switch (config->tx_type) {
3659         case HWTSTAMP_TX_OFF:
3660                 tsync_tx_ctl = 0;
3661                 break;
3662         case HWTSTAMP_TX_ON:
3663                 break;
3664         default:
3665                 return -ERANGE;
3666         }
3667
3668         switch (config->rx_filter) {
3669         case HWTSTAMP_FILTER_NONE:
3670                 tsync_rx_ctl = 0;
3671                 break;
3672         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3673                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3674                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3675                 is_l4 = true;
3676                 break;
3677         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3678                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3679                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3680                 is_l4 = true;
3681                 break;
3682         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3683                 /* Also time stamps V2 L2 Path Delay Request/Response */
3684                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3685                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3686                 is_l2 = true;
3687                 break;
3688         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3689                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3690                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3691                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3692                 is_l2 = true;
3693                 break;
3694         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3695                 /* Hardware cannot filter just V2 L4 Sync messages */
3696                 fallthrough;
3697         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3698                 /* Also time stamps V2 Path Delay Request/Response. */
3699                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3700                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3701                 is_l2 = true;
3702                 is_l4 = true;
3703                 break;
3704         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3705                 /* Hardware cannot filter just V2 L4 Delay Request messages */
3706                 fallthrough;
3707         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3708                 /* Also time stamps V2 Path Delay Request/Response. */
3709                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3710                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3711                 is_l2 = true;
3712                 is_l4 = true;
3713                 break;
3714         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3715         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3716                 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3717                 fallthrough;
3718         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3719                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3720                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3721                 is_l2 = true;
3722                 is_l4 = true;
3723                 break;
3724         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3725                 /* For V1, the hardware can only filter Sync messages or
3726                  * Delay Request messages but not both so fall-through to
3727                  * time stamp all packets.
3728                  */
3729                 fallthrough;
3730         case HWTSTAMP_FILTER_NTP_ALL:
3731         case HWTSTAMP_FILTER_ALL:
3732                 is_l2 = true;
3733                 is_l4 = true;
3734                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3735                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3736                 break;
3737         default:
3738                 return -ERANGE;
3739         }
3740
3741         adapter->hwtstamp_config = *config;
3742
3743         /* enable/disable Tx h/w time stamping */
3744         regval = er32(TSYNCTXCTL);
3745         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3746         regval |= tsync_tx_ctl;
3747         ew32(TSYNCTXCTL, regval);
3748         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3749             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3750                 e_err("Timesync Tx Control register not set as expected\n");
3751                 return -EAGAIN;
3752         }
3753
3754         /* enable/disable Rx h/w time stamping */
3755         regval = er32(TSYNCRXCTL);
3756         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3757         regval |= tsync_rx_ctl;
3758         ew32(TSYNCRXCTL, regval);
3759         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3760                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3761             (regval & (E1000_TSYNCRXCTL_ENABLED |
3762                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3763                 e_err("Timesync Rx Control register not set as expected\n");
3764                 return -EAGAIN;
3765         }
3766
3767         /* L2: define ethertype filter for time stamped packets */
3768         if (is_l2)
3769                 rxmtrl |= ETH_P_1588;
3770
3771         /* define which PTP packets get time stamped */
3772         ew32(RXMTRL, rxmtrl);
3773
3774         /* Filter by destination port */
3775         if (is_l4) {
3776                 rxudp = PTP_EV_PORT;
3777                 cpu_to_be16s(&rxudp);
3778         }
3779         ew32(RXUDP, rxudp);
3780
3781         e1e_flush();
3782
3783         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3784         er32(RXSTMPH);
3785         er32(TXSTMPH);
3786
3787         return 0;
3788 }
3789
3790 /**
3791  * e1000_configure - configure the hardware for Rx and Tx
3792  * @adapter: private board structure
3793  **/
3794 static void e1000_configure(struct e1000_adapter *adapter)
3795 {
3796         struct e1000_ring *rx_ring = adapter->rx_ring;
3797
3798         e1000e_set_rx_mode(adapter->netdev);
3799
3800         e1000_restore_vlan(adapter);
3801         e1000_init_manageability_pt(adapter);
3802
3803         e1000_configure_tx(adapter);
3804
3805         if (adapter->netdev->features & NETIF_F_RXHASH)
3806                 e1000e_setup_rss_hash(adapter);
3807         e1000_setup_rctl(adapter);
3808         e1000_configure_rx(adapter);
3809         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3810 }
3811
3812 /**
3813  * e1000e_power_up_phy - restore link in case the phy was powered down
3814  * @adapter: address of board private structure
3815  *
3816  * The phy may be powered down to save power and turn off link when the
3817  * driver is unloaded and wake on lan is not enabled (among others)
3818  * *** this routine MUST be followed by a call to e1000e_reset ***
3819  **/
3820 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3821 {
3822         if (adapter->hw.phy.ops.power_up)
3823                 adapter->hw.phy.ops.power_up(&adapter->hw);
3824
3825         adapter->hw.mac.ops.setup_link(&adapter->hw);
3826 }
3827
3828 /**
3829  * e1000_power_down_phy - Power down the PHY
3830  * @adapter: board private structure
3831  *
3832  * Power down the PHY so no link is implied when interface is down.
3833  * The PHY cannot be powered down if management or WoL is active.
3834  */
3835 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3836 {
3837         if (adapter->hw.phy.ops.power_down)
3838                 adapter->hw.phy.ops.power_down(&adapter->hw);
3839 }
3840
3841 /**
3842  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3843  * @adapter: board private structure
3844  *
3845  * We want to clear all pending descriptors from the TX ring.
3846  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3847  * the data of the next descriptor. We don't care about the data we are about
3848  * to reset the HW.
3849  */
3850 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3851 {
3852         struct e1000_hw *hw = &adapter->hw;
3853         struct e1000_ring *tx_ring = adapter->tx_ring;
3854         struct e1000_tx_desc *tx_desc = NULL;
3855         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3856         u16 size = 512;
3857
3858         tctl = er32(TCTL);
3859         ew32(TCTL, tctl | E1000_TCTL_EN);
3860         tdt = er32(TDT(0));
3861         BUG_ON(tdt != tx_ring->next_to_use);
3862         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3863         tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3864
3865         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3866         tx_desc->upper.data = 0;
3867         /* flush descriptors to memory before notifying the HW */
3868         wmb();
3869         tx_ring->next_to_use++;
3870         if (tx_ring->next_to_use == tx_ring->count)
3871                 tx_ring->next_to_use = 0;
3872         ew32(TDT(0), tx_ring->next_to_use);
3873         usleep_range(200, 250);
3874 }
3875
3876 /**
3877  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3878  * @adapter: board private structure
3879  *
3880  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3881  */
3882 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3883 {
3884         u32 rctl, rxdctl;
3885         struct e1000_hw *hw = &adapter->hw;
3886
3887         rctl = er32(RCTL);
3888         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3889         e1e_flush();
3890         usleep_range(100, 150);
3891
3892         rxdctl = er32(RXDCTL(0));
3893         /* zero the lower 14 bits (prefetch and host thresholds) */
3894         rxdctl &= 0xffffc000;
3895
3896         /* update thresholds: prefetch threshold to 31, host threshold to 1
3897          * and make sure the granularity is "descriptors" and not "cache lines"
3898          */
3899         rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3900
3901         ew32(RXDCTL(0), rxdctl);
3902         /* momentarily enable the RX ring for the changes to take effect */
3903         ew32(RCTL, rctl | E1000_RCTL_EN);
3904         e1e_flush();
3905         usleep_range(100, 150);
3906         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3907 }
3908
3909 /**
3910  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3911  * @adapter: board private structure
3912  *
3913  * In i219, the descriptor rings must be emptied before resetting the HW
3914  * or before changing the device state to D3 during runtime (runtime PM).
3915  *
3916  * Failure to do this will cause the HW to enter a unit hang state which can
3917  * only be released by PCI reset on the device
3918  *
3919  */
3920
3921 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3922 {
3923         u16 hang_state;
3924         u32 fext_nvm11, tdlen;
3925         struct e1000_hw *hw = &adapter->hw;
3926
3927         /* First, disable MULR fix in FEXTNVM11 */
3928         fext_nvm11 = er32(FEXTNVM11);
3929         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3930         ew32(FEXTNVM11, fext_nvm11);
3931         /* do nothing if we're not in faulty state, or if the queue is empty */
3932         tdlen = er32(TDLEN(0));
3933         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3934                              &hang_state);
3935         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3936                 return;
3937         e1000_flush_tx_ring(adapter);
3938         /* recheck, maybe the fault is caused by the rx ring */
3939         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3940                              &hang_state);
3941         if (hang_state & FLUSH_DESC_REQUIRED)
3942                 e1000_flush_rx_ring(adapter);
3943 }
3944
3945 /**
3946  * e1000e_systim_reset - reset the timesync registers after a hardware reset
3947  * @adapter: board private structure
3948  *
3949  * When the MAC is reset, all hardware bits for timesync will be reset to the
3950  * default values. This function will restore the settings last in place.
3951  * Since the clock SYSTIME registers are reset, we will simply restore the
3952  * cyclecounter to the kernel real clock time.
3953  **/
3954 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3955 {
3956         struct ptp_clock_info *info = &adapter->ptp_clock_info;
3957         struct e1000_hw *hw = &adapter->hw;
3958         unsigned long flags;
3959         u32 timinca;
3960         s32 ret_val;
3961
3962         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3963                 return;
3964
3965         if (info->adjfreq) {
3966                 /* restore the previous ptp frequency delta */
3967                 ret_val = info->adjfreq(info, adapter->ptp_delta);
3968         } else {
3969                 /* set the default base frequency if no adjustment possible */
3970                 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3971                 if (!ret_val)
3972                         ew32(TIMINCA, timinca);
3973         }
3974
3975         if (ret_val) {
3976                 dev_warn(&adapter->pdev->dev,
3977                          "Failed to restore TIMINCA clock rate delta: %d\n",
3978                          ret_val);
3979                 return;
3980         }
3981
3982         /* reset the systim ns time counter */
3983         spin_lock_irqsave(&adapter->systim_lock, flags);
3984         timecounter_init(&adapter->tc, &adapter->cc,
3985                          ktime_to_ns(ktime_get_real()));
3986         spin_unlock_irqrestore(&adapter->systim_lock, flags);
3987
3988         /* restore the previous hwtstamp configuration settings */
3989         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3990 }
3991
3992 /**
3993  * e1000e_reset - bring the hardware into a known good state
3994  * @adapter: board private structure
3995  *
3996  * This function boots the hardware and enables some settings that
3997  * require a configuration cycle of the hardware - those cannot be
3998  * set/changed during runtime. After reset the device needs to be
3999  * properly configured for Rx, Tx etc.
4000  */
4001 void e1000e_reset(struct e1000_adapter *adapter)
4002 {
4003         struct e1000_mac_info *mac = &adapter->hw.mac;
4004         struct e1000_fc_info *fc = &adapter->hw.fc;
4005         struct e1000_hw *hw = &adapter->hw;
4006         u32 tx_space, min_tx_space, min_rx_space;
4007         u32 pba = adapter->pba;
4008         u16 hwm;
4009
4010         /* reset Packet Buffer Allocation to default */
4011         ew32(PBA, pba);
4012
4013         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
4014                 /* To maintain wire speed transmits, the Tx FIFO should be
4015                  * large enough to accommodate two full transmit packets,
4016                  * rounded up to the next 1KB and expressed in KB.  Likewise,
4017                  * the Rx FIFO should be large enough to accommodate at least
4018                  * one full receive packet and is similarly rounded up and
4019                  * expressed in KB.
4020                  */
4021                 pba = er32(PBA);
4022                 /* upper 16 bits has Tx packet buffer allocation size in KB */
4023                 tx_space = pba >> 16;
4024                 /* lower 16 bits has Rx packet buffer allocation size in KB */
4025                 pba &= 0xffff;
4026                 /* the Tx fifo also stores 16 bytes of information about the Tx
4027                  * but don't include ethernet FCS because hardware appends it
4028                  */
4029                 min_tx_space = (adapter->max_frame_size +
4030                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
4031                 min_tx_space = ALIGN(min_tx_space, 1024);
4032                 min_tx_space >>= 10;
4033                 /* software strips receive CRC, so leave room for it */
4034                 min_rx_space = adapter->max_frame_size;
4035                 min_rx_space = ALIGN(min_rx_space, 1024);
4036                 min_rx_space >>= 10;
4037
4038                 /* If current Tx allocation is less than the min Tx FIFO size,
4039                  * and the min Tx FIFO size is less than the current Rx FIFO
4040                  * allocation, take space away from current Rx allocation
4041                  */
4042                 if ((tx_space < min_tx_space) &&
4043                     ((min_tx_space - tx_space) < pba)) {
4044                         pba -= min_tx_space - tx_space;
4045
4046                         /* if short on Rx space, Rx wins and must trump Tx
4047                          * adjustment
4048                          */
4049                         if (pba < min_rx_space)
4050                                 pba = min_rx_space;
4051                 }
4052
4053                 ew32(PBA, pba);
4054         }
4055
4056         /* flow control settings
4057          *
4058          * The high water mark must be low enough to fit one full frame
4059          * (or the size used for early receive) above it in the Rx FIFO.
4060          * Set it to the lower of:
4061          * - 90% of the Rx FIFO size, and
4062          * - the full Rx FIFO size minus one full frame
4063          */
4064         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4065                 fc->pause_time = 0xFFFF;
4066         else
4067                 fc->pause_time = E1000_FC_PAUSE_TIME;
4068         fc->send_xon = true;
4069         fc->current_mode = fc->requested_mode;
4070
4071         switch (hw->mac.type) {
4072         case e1000_ich9lan:
4073         case e1000_ich10lan:
4074                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4075                         pba = 14;
4076                         ew32(PBA, pba);
4077                         fc->high_water = 0x2800;
4078                         fc->low_water = fc->high_water - 8;
4079                         break;
4080                 }
4081                 fallthrough;
4082         default:
4083                 hwm = min(((pba << 10) * 9 / 10),
4084                           ((pba << 10) - adapter->max_frame_size));
4085
4086                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4087                 fc->low_water = fc->high_water - 8;
4088                 break;
4089         case e1000_pchlan:
4090                 /* Workaround PCH LOM adapter hangs with certain network
4091                  * loads.  If hangs persist, try disabling Tx flow control.
4092                  */
4093                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4094                         fc->high_water = 0x3500;
4095                         fc->low_water = 0x1500;
4096                 } else {
4097                         fc->high_water = 0x5000;
4098                         fc->low_water = 0x3000;
4099                 }
4100                 fc->refresh_time = 0x1000;
4101                 break;
4102         case e1000_pch2lan:
4103         case e1000_pch_lpt:
4104         case e1000_pch_spt:
4105         case e1000_pch_cnp:
4106         case e1000_pch_tgp:
4107         case e1000_pch_adp:
4108         case e1000_pch_mtp:
4109                 fc->refresh_time = 0xFFFF;
4110                 fc->pause_time = 0xFFFF;
4111
4112                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4113                         fc->high_water = 0x05C20;
4114                         fc->low_water = 0x05048;
4115                         break;
4116                 }
4117
4118                 pba = 14;
4119                 ew32(PBA, pba);
4120                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4121                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4122                 break;
4123         }
4124
4125         /* Alignment of Tx data is on an arbitrary byte boundary with the
4126          * maximum size per Tx descriptor limited only to the transmit
4127          * allocation of the packet buffer minus 96 bytes with an upper
4128          * limit of 24KB due to receive synchronization limitations.
4129          */
4130         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4131                                        24 << 10);
4132
4133         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4134          * fit in receive buffer.
4135          */
4136         if (adapter->itr_setting & 0x3) {
4137                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4138                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4139                                 dev_info(&adapter->pdev->dev,
4140                                          "Interrupt Throttle Rate off\n");
4141                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4142                                 e1000e_write_itr(adapter, 0);
4143                         }
4144                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4145                         dev_info(&adapter->pdev->dev,
4146                                  "Interrupt Throttle Rate on\n");
4147                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4148                         adapter->itr = 20000;
4149                         e1000e_write_itr(adapter, adapter->itr);
4150                 }
4151         }
4152
4153         if (hw->mac.type >= e1000_pch_spt)
4154                 e1000_flush_desc_rings(adapter);
4155         /* Allow time for pending master requests to run */
4156         mac->ops.reset_hw(hw);
4157
4158         /* For parts with AMT enabled, let the firmware know
4159          * that the network interface is in control
4160          */
4161         if (adapter->flags & FLAG_HAS_AMT)
4162                 e1000e_get_hw_control(adapter);
4163
4164         ew32(WUC, 0);
4165
4166         if (mac->ops.init_hw(hw))
4167                 e_err("Hardware Error\n");
4168
4169         e1000_update_mng_vlan(adapter);
4170
4171         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4172         ew32(VET, ETH_P_8021Q);
4173
4174         e1000e_reset_adaptive(hw);
4175
4176         /* restore systim and hwtstamp settings */
4177         e1000e_systim_reset(adapter);
4178
4179         /* Set EEE advertisement as appropriate */
4180         if (adapter->flags2 & FLAG2_HAS_EEE) {
4181                 s32 ret_val;
4182                 u16 adv_addr;
4183
4184                 switch (hw->phy.type) {
4185                 case e1000_phy_82579:
4186                         adv_addr = I82579_EEE_ADVERTISEMENT;
4187                         break;
4188                 case e1000_phy_i217:
4189                         adv_addr = I217_EEE_ADVERTISEMENT;
4190                         break;
4191                 default:
4192                         dev_err(&adapter->pdev->dev,
4193                                 "Invalid PHY type setting EEE advertisement\n");
4194                         return;
4195                 }
4196
4197                 ret_val = hw->phy.ops.acquire(hw);
4198                 if (ret_val) {
4199                         dev_err(&adapter->pdev->dev,
4200                                 "EEE advertisement - unable to acquire PHY\n");
4201                         return;
4202                 }
4203
4204                 e1000_write_emi_reg_locked(hw, adv_addr,
4205                                            hw->dev_spec.ich8lan.eee_disable ?
4206                                            0 : adapter->eee_advert);
4207
4208                 hw->phy.ops.release(hw);
4209         }
4210
4211         if (!netif_running(adapter->netdev) &&
4212             !test_bit(__E1000_TESTING, &adapter->state))
4213                 e1000_power_down_phy(adapter);
4214
4215         e1000_get_phy_info(hw);
4216
4217         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4218             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4219                 u16 phy_data = 0;
4220                 /* speed up time to link by disabling smart power down, ignore
4221                  * the return value of this function because there is nothing
4222                  * different we would do if it failed
4223                  */
4224                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4225                 phy_data &= ~IGP02E1000_PM_SPD;
4226                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4227         }
4228         if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4229                 u32 reg;
4230
4231                 /* Fextnvm7 @ 0xe4[2] = 1 */
4232                 reg = er32(FEXTNVM7);
4233                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4234                 ew32(FEXTNVM7, reg);
4235                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4236                 reg = er32(FEXTNVM9);
4237                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4238                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4239                 ew32(FEXTNVM9, reg);
4240         }
4241
4242 }
4243
4244 /**
4245  * e1000e_trigger_lsc - trigger an LSC interrupt
4246  * @adapter:
4247  *
4248  * Fire a link status change interrupt to start the watchdog.
4249  **/
4250 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4251 {
4252         struct e1000_hw *hw = &adapter->hw;
4253
4254         if (adapter->msix_entries)
4255                 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4256         else
4257                 ew32(ICS, E1000_ICS_LSC);
4258 }
4259
4260 void e1000e_up(struct e1000_adapter *adapter)
4261 {
4262         /* hardware has been reset, we need to reload some things */
4263         e1000_configure(adapter);
4264
4265         clear_bit(__E1000_DOWN, &adapter->state);
4266
4267         if (adapter->msix_entries)
4268                 e1000_configure_msix(adapter);
4269         e1000_irq_enable(adapter);
4270
4271         /* Tx queue started by watchdog timer when link is up */
4272
4273         e1000e_trigger_lsc(adapter);
4274 }
4275
4276 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4277 {
4278         struct e1000_hw *hw = &adapter->hw;
4279
4280         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4281                 return;
4282
4283         /* flush pending descriptor writebacks to memory */
4284         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4285         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4286
4287         /* execute the writes immediately */
4288         e1e_flush();
4289
4290         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4291          * write is successful
4292          */
4293         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4294         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4295
4296         /* execute the writes immediately */
4297         e1e_flush();
4298 }
4299
4300 static void e1000e_update_stats(struct e1000_adapter *adapter);
4301
4302 /**
4303  * e1000e_down - quiesce the device and optionally reset the hardware
4304  * @adapter: board private structure
4305  * @reset: boolean flag to reset the hardware or not
4306  */
4307 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4308 {
4309         struct net_device *netdev = adapter->netdev;
4310         struct e1000_hw *hw = &adapter->hw;
4311         u32 tctl, rctl;
4312
4313         /* signal that we're down so the interrupt handler does not
4314          * reschedule our watchdog timer
4315          */
4316         set_bit(__E1000_DOWN, &adapter->state);
4317
4318         netif_carrier_off(netdev);
4319
4320         /* disable receives in the hardware */
4321         rctl = er32(RCTL);
4322         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4323                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4324         /* flush and sleep below */
4325
4326         netif_stop_queue(netdev);
4327
4328         /* disable transmits in the hardware */
4329         tctl = er32(TCTL);
4330         tctl &= ~E1000_TCTL_EN;
4331         ew32(TCTL, tctl);
4332
4333         /* flush both disables and wait for them to finish */
4334         e1e_flush();
4335         usleep_range(10000, 11000);
4336
4337         e1000_irq_disable(adapter);
4338
4339         napi_synchronize(&adapter->napi);
4340
4341         del_timer_sync(&adapter->watchdog_timer);
4342         del_timer_sync(&adapter->phy_info_timer);
4343
4344         spin_lock(&adapter->stats64_lock);
4345         e1000e_update_stats(adapter);
4346         spin_unlock(&adapter->stats64_lock);
4347
4348         e1000e_flush_descriptors(adapter);
4349
4350         adapter->link_speed = 0;
4351         adapter->link_duplex = 0;
4352
4353         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4354         if ((hw->mac.type >= e1000_pch2lan) &&
4355             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4356             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4357                 e_dbg("failed to disable jumbo frame workaround mode\n");
4358
4359         if (!pci_channel_offline(adapter->pdev)) {
4360                 if (reset)
4361                         e1000e_reset(adapter);
4362                 else if (hw->mac.type >= e1000_pch_spt)
4363                         e1000_flush_desc_rings(adapter);
4364         }
4365         e1000_clean_tx_ring(adapter->tx_ring);
4366         e1000_clean_rx_ring(adapter->rx_ring);
4367 }
4368
4369 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4370 {
4371         might_sleep();
4372         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4373                 usleep_range(1000, 1100);
4374         e1000e_down(adapter, true);
4375         e1000e_up(adapter);
4376         clear_bit(__E1000_RESETTING, &adapter->state);
4377 }
4378
4379 /**
4380  * e1000e_sanitize_systim - sanitize raw cycle counter reads
4381  * @hw: pointer to the HW structure
4382  * @systim: PHC time value read, sanitized and returned
4383  * @sts: structure to hold system time before and after reading SYSTIML,
4384  * may be NULL
4385  *
4386  * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4387  * check to see that the time is incrementing at a reasonable
4388  * rate and is a multiple of incvalue.
4389  **/
4390 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4391                                   struct ptp_system_timestamp *sts)
4392 {
4393         u64 time_delta, rem, temp;
4394         u64 systim_next;
4395         u32 incvalue;
4396         int i;
4397
4398         incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4399         for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4400                 /* latch SYSTIMH on read of SYSTIML */
4401                 ptp_read_system_prets(sts);
4402                 systim_next = (u64)er32(SYSTIML);
4403                 ptp_read_system_postts(sts);
4404                 systim_next |= (u64)er32(SYSTIMH) << 32;
4405
4406                 time_delta = systim_next - systim;
4407                 temp = time_delta;
4408                 /* VMWare users have seen incvalue of zero, don't div / 0 */
4409                 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4410
4411                 systim = systim_next;
4412
4413                 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4414                         break;
4415         }
4416
4417         return systim;
4418 }
4419
4420 /**
4421  * e1000e_read_systim - read SYSTIM register
4422  * @adapter: board private structure
4423  * @sts: structure which will contain system time before and after reading
4424  * SYSTIML, may be NULL
4425  **/
4426 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4427                        struct ptp_system_timestamp *sts)
4428 {
4429         struct e1000_hw *hw = &adapter->hw;
4430         u32 systimel, systimel_2, systimeh;
4431         u64 systim;
4432         /* SYSTIMH latching upon SYSTIML read does not work well.
4433          * This means that if SYSTIML overflows after we read it but before
4434          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4435          * will experience a huge non linear increment in the systime value
4436          * to fix that we test for overflow and if true, we re-read systime.
4437          */
4438         ptp_read_system_prets(sts);
4439         systimel = er32(SYSTIML);
4440         ptp_read_system_postts(sts);
4441         systimeh = er32(SYSTIMH);
4442         /* Is systimel is so large that overflow is possible? */
4443         if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4444                 ptp_read_system_prets(sts);
4445                 systimel_2 = er32(SYSTIML);
4446                 ptp_read_system_postts(sts);
4447                 if (systimel > systimel_2) {
4448                         /* There was an overflow, read again SYSTIMH, and use
4449                          * systimel_2
4450                          */
4451                         systimeh = er32(SYSTIMH);
4452                         systimel = systimel_2;
4453                 }
4454         }
4455         systim = (u64)systimel;
4456         systim |= (u64)systimeh << 32;
4457
4458         if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4459                 systim = e1000e_sanitize_systim(hw, systim, sts);
4460
4461         return systim;
4462 }
4463
4464 /**
4465  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4466  * @cc: cyclecounter structure
4467  **/
4468 static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4469 {
4470         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4471                                                      cc);
4472
4473         return e1000e_read_systim(adapter, NULL);
4474 }
4475
4476 /**
4477  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4478  * @adapter: board private structure to initialize
4479  *
4480  * e1000_sw_init initializes the Adapter private data structure.
4481  * Fields are initialized based on PCI device information and
4482  * OS network device settings (MTU size).
4483  **/
4484 static int e1000_sw_init(struct e1000_adapter *adapter)
4485 {
4486         struct net_device *netdev = adapter->netdev;
4487
4488         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4489         adapter->rx_ps_bsize0 = 128;
4490         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4491         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4492         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4493         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4494
4495         spin_lock_init(&adapter->stats64_lock);
4496
4497         e1000e_set_interrupt_capability(adapter);
4498
4499         if (e1000_alloc_queues(adapter))
4500                 return -ENOMEM;
4501
4502         /* Setup hardware time stamping cyclecounter */
4503         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4504                 adapter->cc.read = e1000e_cyclecounter_read;
4505                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4506                 adapter->cc.mult = 1;
4507                 /* cc.shift set in e1000e_get_base_tininca() */
4508
4509                 spin_lock_init(&adapter->systim_lock);
4510                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4511         }
4512
4513         /* Explicitly disable IRQ since the NIC can be in any state. */
4514         e1000_irq_disable(adapter);
4515
4516         set_bit(__E1000_DOWN, &adapter->state);
4517         return 0;
4518 }
4519
4520 /**
4521  * e1000_intr_msi_test - Interrupt Handler
4522  * @irq: interrupt number
4523  * @data: pointer to a network interface device structure
4524  **/
4525 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4526 {
4527         struct net_device *netdev = data;
4528         struct e1000_adapter *adapter = netdev_priv(netdev);
4529         struct e1000_hw *hw = &adapter->hw;
4530         u32 icr = er32(ICR);
4531
4532         e_dbg("icr is %08X\n", icr);
4533         if (icr & E1000_ICR_RXSEQ) {
4534                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4535                 /* Force memory writes to complete before acknowledging the
4536                  * interrupt is handled.
4537                  */
4538                 wmb();
4539         }
4540
4541         return IRQ_HANDLED;
4542 }
4543
4544 /**
4545  * e1000_test_msi_interrupt - Returns 0 for successful test
4546  * @adapter: board private struct
4547  *
4548  * code flow taken from tg3.c
4549  **/
4550 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4551 {
4552         struct net_device *netdev = adapter->netdev;
4553         struct e1000_hw *hw = &adapter->hw;
4554         int err;
4555
4556         /* poll_enable hasn't been called yet, so don't need disable */
4557         /* clear any pending events */
4558         er32(ICR);
4559
4560         /* free the real vector and request a test handler */
4561         e1000_free_irq(adapter);
4562         e1000e_reset_interrupt_capability(adapter);
4563
4564         /* Assume that the test fails, if it succeeds then the test
4565          * MSI irq handler will unset this flag
4566          */
4567         adapter->flags |= FLAG_MSI_TEST_FAILED;
4568
4569         err = pci_enable_msi(adapter->pdev);
4570         if (err)
4571                 goto msi_test_failed;
4572
4573         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4574                           netdev->name, netdev);
4575         if (err) {
4576                 pci_disable_msi(adapter->pdev);
4577                 goto msi_test_failed;
4578         }
4579
4580         /* Force memory writes to complete before enabling and firing an
4581          * interrupt.
4582          */
4583         wmb();
4584
4585         e1000_irq_enable(adapter);
4586
4587         /* fire an unusual interrupt on the test handler */
4588         ew32(ICS, E1000_ICS_RXSEQ);
4589         e1e_flush();
4590         msleep(100);
4591
4592         e1000_irq_disable(adapter);
4593
4594         rmb();                  /* read flags after interrupt has been fired */
4595
4596         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4597                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4598                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4599         } else {
4600                 e_dbg("MSI interrupt test succeeded!\n");
4601         }
4602
4603         free_irq(adapter->pdev->irq, netdev);
4604         pci_disable_msi(adapter->pdev);
4605
4606 msi_test_failed:
4607         e1000e_set_interrupt_capability(adapter);
4608         return e1000_request_irq(adapter);
4609 }
4610
4611 /**
4612  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4613  * @adapter: board private struct
4614  *
4615  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4616  **/
4617 static int e1000_test_msi(struct e1000_adapter *adapter)
4618 {
4619         int err;
4620         u16 pci_cmd;
4621
4622         if (!(adapter->flags & FLAG_MSI_ENABLED))
4623                 return 0;
4624
4625         /* disable SERR in case the MSI write causes a master abort */
4626         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4627         if (pci_cmd & PCI_COMMAND_SERR)
4628                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4629                                       pci_cmd & ~PCI_COMMAND_SERR);
4630
4631         err = e1000_test_msi_interrupt(adapter);
4632
4633         /* re-enable SERR */
4634         if (pci_cmd & PCI_COMMAND_SERR) {
4635                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4636                 pci_cmd |= PCI_COMMAND_SERR;
4637                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4638         }
4639
4640         return err;
4641 }
4642
4643 /**
4644  * e1000e_open - Called when a network interface is made active
4645  * @netdev: network interface device structure
4646  *
4647  * Returns 0 on success, negative value on failure
4648  *
4649  * The open entry point is called when a network interface is made
4650  * active by the system (IFF_UP).  At this point all resources needed
4651  * for transmit and receive operations are allocated, the interrupt
4652  * handler is registered with the OS, the watchdog timer is started,
4653  * and the stack is notified that the interface is ready.
4654  **/
4655 int e1000e_open(struct net_device *netdev)
4656 {
4657         struct e1000_adapter *adapter = netdev_priv(netdev);
4658         struct e1000_hw *hw = &adapter->hw;
4659         struct pci_dev *pdev = adapter->pdev;
4660         int err;
4661
4662         /* disallow open during test */
4663         if (test_bit(__E1000_TESTING, &adapter->state))
4664                 return -EBUSY;
4665
4666         pm_runtime_get_sync(&pdev->dev);
4667
4668         netif_carrier_off(netdev);
4669         netif_stop_queue(netdev);
4670
4671         /* allocate transmit descriptors */
4672         err = e1000e_setup_tx_resources(adapter->tx_ring);
4673         if (err)
4674                 goto err_setup_tx;
4675
4676         /* allocate receive descriptors */
4677         err = e1000e_setup_rx_resources(adapter->rx_ring);
4678         if (err)
4679                 goto err_setup_rx;
4680
4681         /* If AMT is enabled, let the firmware know that the network
4682          * interface is now open and reset the part to a known state.
4683          */
4684         if (adapter->flags & FLAG_HAS_AMT) {
4685                 e1000e_get_hw_control(adapter);
4686                 e1000e_reset(adapter);
4687         }
4688
4689         e1000e_power_up_phy(adapter);
4690
4691         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4692         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4693                 e1000_update_mng_vlan(adapter);
4694
4695         /* DMA latency requirement to workaround jumbo issue */
4696         cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4697
4698         /* before we allocate an interrupt, we must be ready to handle it.
4699          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4700          * as soon as we call pci_request_irq, so we have to setup our
4701          * clean_rx handler before we do so.
4702          */
4703         e1000_configure(adapter);
4704
4705         err = e1000_request_irq(adapter);
4706         if (err)
4707                 goto err_req_irq;
4708
4709         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4710          * ignore e1000e MSI messages, which means we need to test our MSI
4711          * interrupt now
4712          */
4713         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4714                 err = e1000_test_msi(adapter);
4715                 if (err) {
4716                         e_err("Interrupt allocation failed\n");
4717                         goto err_req_irq;
4718                 }
4719         }
4720
4721         /* From here on the code is the same as e1000e_up() */
4722         clear_bit(__E1000_DOWN, &adapter->state);
4723
4724         napi_enable(&adapter->napi);
4725
4726         e1000_irq_enable(adapter);
4727
4728         adapter->tx_hang_recheck = false;
4729
4730         hw->mac.get_link_status = true;
4731         pm_runtime_put(&pdev->dev);
4732
4733         e1000e_trigger_lsc(adapter);
4734
4735         return 0;
4736
4737 err_req_irq:
4738         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4739         e1000e_release_hw_control(adapter);
4740         e1000_power_down_phy(adapter);
4741         e1000e_free_rx_resources(adapter->rx_ring);
4742 err_setup_rx:
4743         e1000e_free_tx_resources(adapter->tx_ring);
4744 err_setup_tx:
4745         e1000e_reset(adapter);
4746         pm_runtime_put_sync(&pdev->dev);
4747
4748         return err;
4749 }
4750
4751 /**
4752  * e1000e_close - Disables a network interface
4753  * @netdev: network interface device structure
4754  *
4755  * Returns 0, this is not allowed to fail
4756  *
4757  * The close entry point is called when an interface is de-activated
4758  * by the OS.  The hardware is still under the drivers control, but
4759  * needs to be disabled.  A global MAC reset is issued to stop the
4760  * hardware, and all transmit and receive resources are freed.
4761  **/
4762 int e1000e_close(struct net_device *netdev)
4763 {
4764         struct e1000_adapter *adapter = netdev_priv(netdev);
4765         struct pci_dev *pdev = adapter->pdev;
4766         int count = E1000_CHECK_RESET_COUNT;
4767
4768         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4769                 usleep_range(10000, 11000);
4770
4771         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4772
4773         pm_runtime_get_sync(&pdev->dev);
4774
4775         if (netif_device_present(netdev)) {
4776                 e1000e_down(adapter, true);
4777                 e1000_free_irq(adapter);
4778
4779                 /* Link status message must follow this format */
4780                 netdev_info(netdev, "NIC Link is Down\n");
4781         }
4782
4783         napi_disable(&adapter->napi);
4784
4785         e1000e_free_tx_resources(adapter->tx_ring);
4786         e1000e_free_rx_resources(adapter->rx_ring);
4787
4788         /* kill manageability vlan ID if supported, but not if a vlan with
4789          * the same ID is registered on the host OS (let 8021q kill it)
4790          */
4791         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4792                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4793                                        adapter->mng_vlan_id);
4794
4795         /* If AMT is enabled, let the firmware know that the network
4796          * interface is now closed
4797          */
4798         if ((adapter->flags & FLAG_HAS_AMT) &&
4799             !test_bit(__E1000_TESTING, &adapter->state))
4800                 e1000e_release_hw_control(adapter);
4801
4802         cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4803
4804         pm_runtime_put_sync(&pdev->dev);
4805
4806         return 0;
4807 }
4808
4809 /**
4810  * e1000_set_mac - Change the Ethernet Address of the NIC
4811  * @netdev: network interface device structure
4812  * @p: pointer to an address structure
4813  *
4814  * Returns 0 on success, negative on failure
4815  **/
4816 static int e1000_set_mac(struct net_device *netdev, void *p)
4817 {
4818         struct e1000_adapter *adapter = netdev_priv(netdev);
4819         struct e1000_hw *hw = &adapter->hw;
4820         struct sockaddr *addr = p;
4821
4822         if (!is_valid_ether_addr(addr->sa_data))
4823                 return -EADDRNOTAVAIL;
4824
4825         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4826         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4827
4828         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4829
4830         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4831                 /* activate the work around */
4832                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4833
4834                 /* Hold a copy of the LAA in RAR[14] This is done so that
4835                  * between the time RAR[0] gets clobbered  and the time it
4836                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4837                  * of the RARs and no incoming packets directed to this port
4838                  * are dropped. Eventually the LAA will be in RAR[0] and
4839                  * RAR[14]
4840                  */
4841                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4842                                     adapter->hw.mac.rar_entry_count - 1);
4843         }
4844
4845         return 0;
4846 }
4847
4848 /**
4849  * e1000e_update_phy_task - work thread to update phy
4850  * @work: pointer to our work struct
4851  *
4852  * this worker thread exists because we must acquire a
4853  * semaphore to read the phy, which we could msleep while
4854  * waiting for it, and we can't msleep in a timer.
4855  **/
4856 static void e1000e_update_phy_task(struct work_struct *work)
4857 {
4858         struct e1000_adapter *adapter = container_of(work,
4859                                                      struct e1000_adapter,
4860                                                      update_phy_task);
4861         struct e1000_hw *hw = &adapter->hw;
4862
4863         if (test_bit(__E1000_DOWN, &adapter->state))
4864                 return;
4865
4866         e1000_get_phy_info(hw);
4867
4868         /* Enable EEE on 82579 after link up */
4869         if (hw->phy.type >= e1000_phy_82579)
4870                 e1000_set_eee_pchlan(hw);
4871 }
4872
4873 /**
4874  * e1000_update_phy_info - timre call-back to update PHY info
4875  * @t: pointer to timer_list containing private info adapter
4876  *
4877  * Need to wait a few seconds after link up to get diagnostic information from
4878  * the phy
4879  **/
4880 static void e1000_update_phy_info(struct timer_list *t)
4881 {
4882         struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4883
4884         if (test_bit(__E1000_DOWN, &adapter->state))
4885                 return;
4886
4887         schedule_work(&adapter->update_phy_task);
4888 }
4889
4890 /**
4891  * e1000e_update_phy_stats - Update the PHY statistics counters
4892  * @adapter: board private structure
4893  *
4894  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4895  **/
4896 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4897 {
4898         struct e1000_hw *hw = &adapter->hw;
4899         s32 ret_val;
4900         u16 phy_data;
4901
4902         ret_val = hw->phy.ops.acquire(hw);
4903         if (ret_val)
4904                 return;
4905
4906         /* A page set is expensive so check if already on desired page.
4907          * If not, set to the page with the PHY status registers.
4908          */
4909         hw->phy.addr = 1;
4910         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4911                                            &phy_data);
4912         if (ret_val)
4913                 goto release;
4914         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4915                 ret_val = hw->phy.ops.set_page(hw,
4916                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4917                 if (ret_val)
4918                         goto release;
4919         }
4920
4921         /* Single Collision Count */
4922         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4923         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4924         if (!ret_val)
4925                 adapter->stats.scc += phy_data;
4926
4927         /* Excessive Collision Count */
4928         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4929         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4930         if (!ret_val)
4931                 adapter->stats.ecol += phy_data;
4932
4933         /* Multiple Collision Count */
4934         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4935         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4936         if (!ret_val)
4937                 adapter->stats.mcc += phy_data;
4938
4939         /* Late Collision Count */
4940         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4941         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4942         if (!ret_val)
4943                 adapter->stats.latecol += phy_data;
4944
4945         /* Collision Count - also used for adaptive IFS */
4946         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4947         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4948         if (!ret_val)
4949                 hw->mac.collision_delta = phy_data;
4950
4951         /* Defer Count */
4952         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4953         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4954         if (!ret_val)
4955                 adapter->stats.dc += phy_data;
4956
4957         /* Transmit with no CRS */
4958         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4959         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4960         if (!ret_val)
4961                 adapter->stats.tncrs += phy_data;
4962
4963 release:
4964         hw->phy.ops.release(hw);
4965 }
4966
4967 /**
4968  * e1000e_update_stats - Update the board statistics counters
4969  * @adapter: board private structure
4970  **/
4971 static void e1000e_update_stats(struct e1000_adapter *adapter)
4972 {
4973         struct net_device *netdev = adapter->netdev;
4974         struct e1000_hw *hw = &adapter->hw;
4975         struct pci_dev *pdev = adapter->pdev;
4976
4977         /* Prevent stats update while adapter is being reset, or if the pci
4978          * connection is down.
4979          */
4980         if (adapter->link_speed == 0)
4981                 return;
4982         if (pci_channel_offline(pdev))
4983                 return;
4984
4985         adapter->stats.crcerrs += er32(CRCERRS);
4986         adapter->stats.gprc += er32(GPRC);
4987         adapter->stats.gorc += er32(GORCL);
4988         er32(GORCH);            /* Clear gorc */
4989         adapter->stats.bprc += er32(BPRC);
4990         adapter->stats.mprc += er32(MPRC);
4991         adapter->stats.roc += er32(ROC);
4992
4993         adapter->stats.mpc += er32(MPC);
4994
4995         /* Half-duplex statistics */
4996         if (adapter->link_duplex == HALF_DUPLEX) {
4997                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4998                         e1000e_update_phy_stats(adapter);
4999                 } else {
5000                         adapter->stats.scc += er32(SCC);
5001                         adapter->stats.ecol += er32(ECOL);
5002                         adapter->stats.mcc += er32(MCC);
5003                         adapter->stats.latecol += er32(LATECOL);
5004                         adapter->stats.dc += er32(DC);
5005
5006                         hw->mac.collision_delta = er32(COLC);
5007
5008                         if ((hw->mac.type != e1000_82574) &&
5009                             (hw->mac.type != e1000_82583))
5010                                 adapter->stats.tncrs += er32(TNCRS);
5011                 }
5012                 adapter->stats.colc += hw->mac.collision_delta;
5013         }
5014
5015         adapter->stats.xonrxc += er32(XONRXC);
5016         adapter->stats.xontxc += er32(XONTXC);
5017         adapter->stats.xoffrxc += er32(XOFFRXC);
5018         adapter->stats.xofftxc += er32(XOFFTXC);
5019         adapter->stats.gptc += er32(GPTC);
5020         adapter->stats.gotc += er32(GOTCL);
5021         er32(GOTCH);            /* Clear gotc */
5022         adapter->stats.rnbc += er32(RNBC);
5023         adapter->stats.ruc += er32(RUC);
5024
5025         adapter->stats.mptc += er32(MPTC);
5026         adapter->stats.bptc += er32(BPTC);
5027
5028         /* used for adaptive IFS */
5029
5030         hw->mac.tx_packet_delta = er32(TPT);
5031         adapter->stats.tpt += hw->mac.tx_packet_delta;
5032
5033         adapter->stats.algnerrc += er32(ALGNERRC);
5034         adapter->stats.rxerrc += er32(RXERRC);
5035         adapter->stats.cexterr += er32(CEXTERR);
5036         adapter->stats.tsctc += er32(TSCTC);
5037         adapter->stats.tsctfc += er32(TSCTFC);
5038
5039         /* Fill out the OS statistics structure */
5040         netdev->stats.multicast = adapter->stats.mprc;
5041         netdev->stats.collisions = adapter->stats.colc;
5042
5043         /* Rx Errors */
5044
5045         /* RLEC on some newer hardware can be incorrect so build
5046          * our own version based on RUC and ROC
5047          */
5048         netdev->stats.rx_errors = adapter->stats.rxerrc +
5049             adapter->stats.crcerrs + adapter->stats.algnerrc +
5050             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5051         netdev->stats.rx_length_errors = adapter->stats.ruc +
5052             adapter->stats.roc;
5053         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5054         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5055         netdev->stats.rx_missed_errors = adapter->stats.mpc;
5056
5057         /* Tx Errors */
5058         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5059         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5060         netdev->stats.tx_window_errors = adapter->stats.latecol;
5061         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5062
5063         /* Tx Dropped needs to be maintained elsewhere */
5064
5065         /* Management Stats */
5066         adapter->stats.mgptc += er32(MGTPTC);
5067         adapter->stats.mgprc += er32(MGTPRC);
5068         adapter->stats.mgpdc += er32(MGTPDC);
5069
5070         /* Correctable ECC Errors */
5071         if (hw->mac.type >= e1000_pch_lpt) {
5072                 u32 pbeccsts = er32(PBECCSTS);
5073
5074                 adapter->corr_errors +=
5075                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5076                 adapter->uncorr_errors +=
5077                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5078                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5079         }
5080 }
5081
5082 /**
5083  * e1000_phy_read_status - Update the PHY register status snapshot
5084  * @adapter: board private structure
5085  **/
5086 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5087 {
5088         struct e1000_hw *hw = &adapter->hw;
5089         struct e1000_phy_regs *phy = &adapter->phy_regs;
5090
5091         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5092             (er32(STATUS) & E1000_STATUS_LU) &&
5093             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5094                 int ret_val;
5095
5096                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5097                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5098                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5099                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5100                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5101                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5102                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5103                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5104                 if (ret_val)
5105                         e_warn("Error reading PHY register\n");
5106         } else {
5107                 /* Do not read PHY registers if link is not up
5108                  * Set values to typical power-on defaults
5109                  */
5110                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5111                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5112                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5113                              BMSR_ERCAP);
5114                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5115                                   ADVERTISE_ALL | ADVERTISE_CSMA);
5116                 phy->lpa = 0;
5117                 phy->expansion = EXPANSION_ENABLENPAGE;
5118                 phy->ctrl1000 = ADVERTISE_1000FULL;
5119                 phy->stat1000 = 0;
5120                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5121         }
5122 }
5123
5124 static void e1000_print_link_info(struct e1000_adapter *adapter)
5125 {
5126         struct e1000_hw *hw = &adapter->hw;
5127         u32 ctrl = er32(CTRL);
5128
5129         /* Link status message must follow this format for user tools */
5130         netdev_info(adapter->netdev,
5131                     "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5132                     adapter->link_speed,
5133                     adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5134                     (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5135                     (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5136                     (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5137 }
5138
5139 static bool e1000e_has_link(struct e1000_adapter *adapter)
5140 {
5141         struct e1000_hw *hw = &adapter->hw;
5142         bool link_active = false;
5143         s32 ret_val = 0;
5144
5145         /* get_link_status is set on LSC (link status) interrupt or
5146          * Rx sequence error interrupt.  get_link_status will stay
5147          * true until the check_for_link establishes link
5148          * for copper adapters ONLY
5149          */
5150         switch (hw->phy.media_type) {
5151         case e1000_media_type_copper:
5152                 if (hw->mac.get_link_status) {
5153                         ret_val = hw->mac.ops.check_for_link(hw);
5154                         link_active = !hw->mac.get_link_status;
5155                 } else {
5156                         link_active = true;
5157                 }
5158                 break;
5159         case e1000_media_type_fiber:
5160                 ret_val = hw->mac.ops.check_for_link(hw);
5161                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5162                 break;
5163         case e1000_media_type_internal_serdes:
5164                 ret_val = hw->mac.ops.check_for_link(hw);
5165                 link_active = hw->mac.serdes_has_link;
5166                 break;
5167         default:
5168         case e1000_media_type_unknown:
5169                 break;
5170         }
5171
5172         if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5173             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5174                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5175                 e_info("Gigabit has been disabled, downgrading speed\n");
5176         }
5177
5178         return link_active;
5179 }
5180
5181 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5182 {
5183         /* make sure the receive unit is started */
5184         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5185             (adapter->flags & FLAG_RESTART_NOW)) {
5186                 struct e1000_hw *hw = &adapter->hw;
5187                 u32 rctl = er32(RCTL);
5188
5189                 ew32(RCTL, rctl | E1000_RCTL_EN);
5190                 adapter->flags &= ~FLAG_RESTART_NOW;
5191         }
5192 }
5193
5194 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5195 {
5196         struct e1000_hw *hw = &adapter->hw;
5197
5198         /* With 82574 controllers, PHY needs to be checked periodically
5199          * for hung state and reset, if two calls return true
5200          */
5201         if (e1000_check_phy_82574(hw))
5202                 adapter->phy_hang_count++;
5203         else
5204                 adapter->phy_hang_count = 0;
5205
5206         if (adapter->phy_hang_count > 1) {
5207                 adapter->phy_hang_count = 0;
5208                 e_dbg("PHY appears hung - resetting\n");
5209                 schedule_work(&adapter->reset_task);
5210         }
5211 }
5212
5213 /**
5214  * e1000_watchdog - Timer Call-back
5215  * @t: pointer to timer_list containing private info adapter
5216  **/
5217 static void e1000_watchdog(struct timer_list *t)
5218 {
5219         struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5220
5221         /* Do the rest outside of interrupt context */
5222         schedule_work(&adapter->watchdog_task);
5223
5224         /* TODO: make this use queue_delayed_work() */
5225 }
5226
5227 static void e1000_watchdog_task(struct work_struct *work)
5228 {
5229         struct e1000_adapter *adapter = container_of(work,
5230                                                      struct e1000_adapter,
5231                                                      watchdog_task);
5232         struct net_device *netdev = adapter->netdev;
5233         struct e1000_mac_info *mac = &adapter->hw.mac;
5234         struct e1000_phy_info *phy = &adapter->hw.phy;
5235         struct e1000_ring *tx_ring = adapter->tx_ring;
5236         u32 dmoff_exit_timeout = 100, tries = 0;
5237         struct e1000_hw *hw = &adapter->hw;
5238         u32 link, tctl, pcim_state;
5239
5240         if (test_bit(__E1000_DOWN, &adapter->state))
5241                 return;
5242
5243         link = e1000e_has_link(adapter);
5244         if ((netif_carrier_ok(netdev)) && link) {
5245                 /* Cancel scheduled suspend requests. */
5246                 pm_runtime_resume(netdev->dev.parent);
5247
5248                 e1000e_enable_receives(adapter);
5249                 goto link_up;
5250         }
5251
5252         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5253             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5254                 e1000_update_mng_vlan(adapter);
5255
5256         if (link) {
5257                 if (!netif_carrier_ok(netdev)) {
5258                         bool txb2b = true;
5259
5260                         /* Cancel scheduled suspend requests. */
5261                         pm_runtime_resume(netdev->dev.parent);
5262
5263                         /* Checking if MAC is in DMoff state*/
5264                         pcim_state = er32(STATUS);
5265                         while (pcim_state & E1000_STATUS_PCIM_STATE) {
5266                                 if (tries++ == dmoff_exit_timeout) {
5267                                         e_dbg("Error in exiting dmoff\n");
5268                                         break;
5269                                 }
5270                                 usleep_range(10000, 20000);
5271                                 pcim_state = er32(STATUS);
5272
5273                                 /* Checking if MAC exited DMoff state */
5274                                 if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5275                                         e1000_phy_hw_reset(&adapter->hw);
5276                         }
5277
5278                         /* update snapshot of PHY registers on LSC */
5279                         e1000_phy_read_status(adapter);
5280                         mac->ops.get_link_up_info(&adapter->hw,
5281                                                   &adapter->link_speed,
5282                                                   &adapter->link_duplex);
5283                         e1000_print_link_info(adapter);
5284
5285                         /* check if SmartSpeed worked */
5286                         e1000e_check_downshift(hw);
5287                         if (phy->speed_downgraded)
5288                                 netdev_warn(netdev,
5289                                             "Link Speed was downgraded by SmartSpeed\n");
5290
5291                         /* On supported PHYs, check for duplex mismatch only
5292                          * if link has autonegotiated at 10/100 half
5293                          */
5294                         if ((hw->phy.type == e1000_phy_igp_3 ||
5295                              hw->phy.type == e1000_phy_bm) &&
5296                             hw->mac.autoneg &&
5297                             (adapter->link_speed == SPEED_10 ||
5298                              adapter->link_speed == SPEED_100) &&
5299                             (adapter->link_duplex == HALF_DUPLEX)) {
5300                                 u16 autoneg_exp;
5301
5302                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5303
5304                                 if (!(autoneg_exp & EXPANSION_NWAY))
5305                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5306                         }
5307
5308                         /* adjust timeout factor according to speed/duplex */
5309                         adapter->tx_timeout_factor = 1;
5310                         switch (adapter->link_speed) {
5311                         case SPEED_10:
5312                                 txb2b = false;
5313                                 adapter->tx_timeout_factor = 16;
5314                                 break;
5315                         case SPEED_100:
5316                                 txb2b = false;
5317                                 adapter->tx_timeout_factor = 10;
5318                                 break;
5319                         }
5320
5321                         /* workaround: re-program speed mode bit after
5322                          * link-up event
5323                          */
5324                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5325                             !txb2b) {
5326                                 u32 tarc0;
5327
5328                                 tarc0 = er32(TARC(0));
5329                                 tarc0 &= ~SPEED_MODE_BIT;
5330                                 ew32(TARC(0), tarc0);
5331                         }
5332
5333                         /* disable TSO for pcie and 10/100 speeds, to avoid
5334                          * some hardware issues
5335                          */
5336                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5337                                 switch (adapter->link_speed) {
5338                                 case SPEED_10:
5339                                 case SPEED_100:
5340                                         e_info("10/100 speed: disabling TSO\n");
5341                                         netdev->features &= ~NETIF_F_TSO;
5342                                         netdev->features &= ~NETIF_F_TSO6;
5343                                         break;
5344                                 case SPEED_1000:
5345                                         netdev->features |= NETIF_F_TSO;
5346                                         netdev->features |= NETIF_F_TSO6;
5347                                         break;
5348                                 default:
5349                                         /* oops */
5350                                         break;
5351                                 }
5352                                 if (hw->mac.type == e1000_pch_spt) {
5353                                         netdev->features &= ~NETIF_F_TSO;
5354                                         netdev->features &= ~NETIF_F_TSO6;
5355                                 }
5356                         }
5357
5358                         /* enable transmits in the hardware, need to do this
5359                          * after setting TARC(0)
5360                          */
5361                         tctl = er32(TCTL);
5362                         tctl |= E1000_TCTL_EN;
5363                         ew32(TCTL, tctl);
5364
5365                         /* Perform any post-link-up configuration before
5366                          * reporting link up.
5367                          */
5368                         if (phy->ops.cfg_on_link_up)
5369                                 phy->ops.cfg_on_link_up(hw);
5370
5371                         netif_wake_queue(netdev);
5372                         netif_carrier_on(netdev);
5373
5374                         if (!test_bit(__E1000_DOWN, &adapter->state))
5375                                 mod_timer(&adapter->phy_info_timer,
5376                                           round_jiffies(jiffies + 2 * HZ));
5377                 }
5378         } else {
5379                 if (netif_carrier_ok(netdev)) {
5380                         adapter->link_speed = 0;
5381                         adapter->link_duplex = 0;
5382                         /* Link status message must follow this format */
5383                         netdev_info(netdev, "NIC Link is Down\n");
5384                         netif_carrier_off(netdev);
5385                         netif_stop_queue(netdev);
5386                         if (!test_bit(__E1000_DOWN, &adapter->state))
5387                                 mod_timer(&adapter->phy_info_timer,
5388                                           round_jiffies(jiffies + 2 * HZ));
5389
5390                         /* 8000ES2LAN requires a Rx packet buffer work-around
5391                          * on link down event; reset the controller to flush
5392                          * the Rx packet buffer.
5393                          */
5394                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5395                                 adapter->flags |= FLAG_RESTART_NOW;
5396                         else
5397                                 pm_schedule_suspend(netdev->dev.parent,
5398                                                     LINK_TIMEOUT);
5399                 }
5400         }
5401
5402 link_up:
5403         spin_lock(&adapter->stats64_lock);
5404         e1000e_update_stats(adapter);
5405
5406         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5407         adapter->tpt_old = adapter->stats.tpt;
5408         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5409         adapter->colc_old = adapter->stats.colc;
5410
5411         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5412         adapter->gorc_old = adapter->stats.gorc;
5413         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5414         adapter->gotc_old = adapter->stats.gotc;
5415         spin_unlock(&adapter->stats64_lock);
5416
5417         /* If the link is lost the controller stops DMA, but
5418          * if there is queued Tx work it cannot be done.  So
5419          * reset the controller to flush the Tx packet buffers.
5420          */
5421         if (!netif_carrier_ok(netdev) &&
5422             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5423                 adapter->flags |= FLAG_RESTART_NOW;
5424
5425         /* If reset is necessary, do it outside of interrupt context. */
5426         if (adapter->flags & FLAG_RESTART_NOW) {
5427                 schedule_work(&adapter->reset_task);
5428                 /* return immediately since reset is imminent */
5429                 return;
5430         }
5431
5432         e1000e_update_adaptive(&adapter->hw);
5433
5434         /* Simple mode for Interrupt Throttle Rate (ITR) */
5435         if (adapter->itr_setting == 4) {
5436                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5437                  * Total asymmetrical Tx or Rx gets ITR=8000;
5438                  * everyone else is between 2000-8000.
5439                  */
5440                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5441                 u32 dif = (adapter->gotc > adapter->gorc ?
5442                            adapter->gotc - adapter->gorc :
5443                            adapter->gorc - adapter->gotc) / 10000;
5444                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5445
5446                 e1000e_write_itr(adapter, itr);
5447         }
5448
5449         /* Cause software interrupt to ensure Rx ring is cleaned */
5450         if (adapter->msix_entries)
5451                 ew32(ICS, adapter->rx_ring->ims_val);
5452         else
5453                 ew32(ICS, E1000_ICS_RXDMT0);
5454
5455         /* flush pending descriptors to memory before detecting Tx hang */
5456         e1000e_flush_descriptors(adapter);
5457
5458         /* Force detection of hung controller every watchdog period */
5459         adapter->detect_tx_hung = true;
5460
5461         /* With 82571 controllers, LAA may be overwritten due to controller
5462          * reset from the other port. Set the appropriate LAA in RAR[0]
5463          */
5464         if (e1000e_get_laa_state_82571(hw))
5465                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5466
5467         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5468                 e1000e_check_82574_phy_workaround(adapter);
5469
5470         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5471         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5472                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5473                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5474                         er32(RXSTMPH);
5475                         adapter->rx_hwtstamp_cleared++;
5476                 } else {
5477                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5478                 }
5479         }
5480
5481         /* Reset the timer */
5482         if (!test_bit(__E1000_DOWN, &adapter->state))
5483                 mod_timer(&adapter->watchdog_timer,
5484                           round_jiffies(jiffies + 2 * HZ));
5485 }
5486
5487 #define E1000_TX_FLAGS_CSUM             0x00000001
5488 #define E1000_TX_FLAGS_VLAN             0x00000002
5489 #define E1000_TX_FLAGS_TSO              0x00000004
5490 #define E1000_TX_FLAGS_IPV4             0x00000008
5491 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5492 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5493 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5494 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5495
5496 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5497                      __be16 protocol)
5498 {
5499         struct e1000_context_desc *context_desc;
5500         struct e1000_buffer *buffer_info;
5501         unsigned int i;
5502         u32 cmd_length = 0;
5503         u16 ipcse = 0, mss;
5504         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5505         int err;
5506
5507         if (!skb_is_gso(skb))
5508                 return 0;
5509
5510         err = skb_cow_head(skb, 0);
5511         if (err < 0)
5512                 return err;
5513
5514         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5515         mss = skb_shinfo(skb)->gso_size;
5516         if (protocol == htons(ETH_P_IP)) {
5517                 struct iphdr *iph = ip_hdr(skb);
5518                 iph->tot_len = 0;
5519                 iph->check = 0;
5520                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5521                                                          0, IPPROTO_TCP, 0);
5522                 cmd_length = E1000_TXD_CMD_IP;
5523                 ipcse = skb_transport_offset(skb) - 1;
5524         } else if (skb_is_gso_v6(skb)) {
5525                 tcp_v6_gso_csum_prep(skb);
5526                 ipcse = 0;
5527         }
5528         ipcss = skb_network_offset(skb);
5529         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5530         tucss = skb_transport_offset(skb);
5531         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5532
5533         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5534                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5535
5536         i = tx_ring->next_to_use;
5537         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5538         buffer_info = &tx_ring->buffer_info[i];
5539
5540         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5541         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5542         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5543         context_desc->upper_setup.tcp_fields.tucss = tucss;
5544         context_desc->upper_setup.tcp_fields.tucso = tucso;
5545         context_desc->upper_setup.tcp_fields.tucse = 0;
5546         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5547         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5548         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5549
5550         buffer_info->time_stamp = jiffies;
5551         buffer_info->next_to_watch = i;
5552
5553         i++;
5554         if (i == tx_ring->count)
5555                 i = 0;
5556         tx_ring->next_to_use = i;
5557
5558         return 1;
5559 }
5560
5561 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5562                           __be16 protocol)
5563 {
5564         struct e1000_adapter *adapter = tx_ring->adapter;
5565         struct e1000_context_desc *context_desc;
5566         struct e1000_buffer *buffer_info;
5567         unsigned int i;
5568         u8 css;
5569         u32 cmd_len = E1000_TXD_CMD_DEXT;
5570
5571         if (skb->ip_summed != CHECKSUM_PARTIAL)
5572                 return false;
5573
5574         switch (protocol) {
5575         case cpu_to_be16(ETH_P_IP):
5576                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5577                         cmd_len |= E1000_TXD_CMD_TCP;
5578                 break;
5579         case cpu_to_be16(ETH_P_IPV6):
5580                 /* XXX not handling all IPV6 headers */
5581                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5582                         cmd_len |= E1000_TXD_CMD_TCP;
5583                 break;
5584         default:
5585                 if (unlikely(net_ratelimit()))
5586                         e_warn("checksum_partial proto=%x!\n",
5587                                be16_to_cpu(protocol));
5588                 break;
5589         }
5590
5591         css = skb_checksum_start_offset(skb);
5592
5593         i = tx_ring->next_to_use;
5594         buffer_info = &tx_ring->buffer_info[i];
5595         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5596
5597         context_desc->lower_setup.ip_config = 0;
5598         context_desc->upper_setup.tcp_fields.tucss = css;
5599         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5600         context_desc->upper_setup.tcp_fields.tucse = 0;
5601         context_desc->tcp_seg_setup.data = 0;
5602         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5603
5604         buffer_info->time_stamp = jiffies;
5605         buffer_info->next_to_watch = i;
5606
5607         i++;
5608         if (i == tx_ring->count)
5609                 i = 0;
5610         tx_ring->next_to_use = i;
5611
5612         return true;
5613 }
5614
5615 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5616                         unsigned int first, unsigned int max_per_txd,
5617                         unsigned int nr_frags)
5618 {
5619         struct e1000_adapter *adapter = tx_ring->adapter;
5620         struct pci_dev *pdev = adapter->pdev;
5621         struct e1000_buffer *buffer_info;
5622         unsigned int len = skb_headlen(skb);
5623         unsigned int offset = 0, size, count = 0, i;
5624         unsigned int f, bytecount, segs;
5625
5626         i = tx_ring->next_to_use;
5627
5628         while (len) {
5629                 buffer_info = &tx_ring->buffer_info[i];
5630                 size = min(len, max_per_txd);
5631
5632                 buffer_info->length = size;
5633                 buffer_info->time_stamp = jiffies;
5634                 buffer_info->next_to_watch = i;
5635                 buffer_info->dma = dma_map_single(&pdev->dev,
5636                                                   skb->data + offset,
5637                                                   size, DMA_TO_DEVICE);
5638                 buffer_info->mapped_as_page = false;
5639                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5640                         goto dma_error;
5641
5642                 len -= size;
5643                 offset += size;
5644                 count++;
5645
5646                 if (len) {
5647                         i++;
5648                         if (i == tx_ring->count)
5649                                 i = 0;
5650                 }
5651         }
5652
5653         for (f = 0; f < nr_frags; f++) {
5654                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5655
5656                 len = skb_frag_size(frag);
5657                 offset = 0;
5658
5659                 while (len) {
5660                         i++;
5661                         if (i == tx_ring->count)
5662                                 i = 0;
5663
5664                         buffer_info = &tx_ring->buffer_info[i];
5665                         size = min(len, max_per_txd);
5666
5667                         buffer_info->length = size;
5668                         buffer_info->time_stamp = jiffies;
5669                         buffer_info->next_to_watch = i;
5670                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5671                                                             offset, size,
5672                                                             DMA_TO_DEVICE);
5673                         buffer_info->mapped_as_page = true;
5674                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5675                                 goto dma_error;
5676
5677                         len -= size;
5678                         offset += size;
5679                         count++;
5680                 }
5681         }
5682
5683         segs = skb_shinfo(skb)->gso_segs ? : 1;
5684         /* multiply data chunks by size of headers */
5685         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5686
5687         tx_ring->buffer_info[i].skb = skb;
5688         tx_ring->buffer_info[i].segs = segs;
5689         tx_ring->buffer_info[i].bytecount = bytecount;
5690         tx_ring->buffer_info[first].next_to_watch = i;
5691
5692         return count;
5693
5694 dma_error:
5695         dev_err(&pdev->dev, "Tx DMA map failed\n");
5696         buffer_info->dma = 0;
5697         if (count)
5698                 count--;
5699
5700         while (count--) {
5701                 if (i == 0)
5702                         i += tx_ring->count;
5703                 i--;
5704                 buffer_info = &tx_ring->buffer_info[i];
5705                 e1000_put_txbuf(tx_ring, buffer_info, true);
5706         }
5707
5708         return 0;
5709 }
5710
5711 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5712 {
5713         struct e1000_adapter *adapter = tx_ring->adapter;
5714         struct e1000_tx_desc *tx_desc = NULL;
5715         struct e1000_buffer *buffer_info;
5716         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5717         unsigned int i;
5718
5719         if (tx_flags & E1000_TX_FLAGS_TSO) {
5720                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5721                     E1000_TXD_CMD_TSE;
5722                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5723
5724                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5725                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5726         }
5727
5728         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5729                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5730                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5731         }
5732
5733         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5734                 txd_lower |= E1000_TXD_CMD_VLE;
5735                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5736         }
5737
5738         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5739                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5740
5741         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5742                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5743                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5744         }
5745
5746         i = tx_ring->next_to_use;
5747
5748         do {
5749                 buffer_info = &tx_ring->buffer_info[i];
5750                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5751                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5752                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5753                                                   buffer_info->length);
5754                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5755
5756                 i++;
5757                 if (i == tx_ring->count)
5758                         i = 0;
5759         } while (--count > 0);
5760
5761         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5762
5763         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5764         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5765                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5766
5767         /* Force memory writes to complete before letting h/w
5768          * know there are new descriptors to fetch.  (Only
5769          * applicable for weak-ordered memory model archs,
5770          * such as IA-64).
5771          */
5772         wmb();
5773
5774         tx_ring->next_to_use = i;
5775 }
5776
5777 #define MINIMUM_DHCP_PACKET_SIZE 282
5778 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5779                                     struct sk_buff *skb)
5780 {
5781         struct e1000_hw *hw = &adapter->hw;
5782         u16 length, offset;
5783
5784         if (skb_vlan_tag_present(skb) &&
5785             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5786               (adapter->hw.mng_cookie.status &
5787                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5788                 return 0;
5789
5790         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5791                 return 0;
5792
5793         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5794                 return 0;
5795
5796         {
5797                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5798                 struct udphdr *udp;
5799
5800                 if (ip->protocol != IPPROTO_UDP)
5801                         return 0;
5802
5803                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5804                 if (ntohs(udp->dest) != 67)
5805                         return 0;
5806
5807                 offset = (u8 *)udp + 8 - skb->data;
5808                 length = skb->len - offset;
5809                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5810         }
5811
5812         return 0;
5813 }
5814
5815 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5816 {
5817         struct e1000_adapter *adapter = tx_ring->adapter;
5818
5819         netif_stop_queue(adapter->netdev);
5820         /* Herbert's original patch had:
5821          *  smp_mb__after_netif_stop_queue();
5822          * but since that doesn't exist yet, just open code it.
5823          */
5824         smp_mb();
5825
5826         /* We need to check again in a case another CPU has just
5827          * made room available.
5828          */
5829         if (e1000_desc_unused(tx_ring) < size)
5830                 return -EBUSY;
5831
5832         /* A reprieve! */
5833         netif_start_queue(adapter->netdev);
5834         ++adapter->restart_queue;
5835         return 0;
5836 }
5837
5838 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5839 {
5840         BUG_ON(size > tx_ring->count);
5841
5842         if (e1000_desc_unused(tx_ring) >= size)
5843                 return 0;
5844         return __e1000_maybe_stop_tx(tx_ring, size);
5845 }
5846
5847 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5848                                     struct net_device *netdev)
5849 {
5850         struct e1000_adapter *adapter = netdev_priv(netdev);
5851         struct e1000_ring *tx_ring = adapter->tx_ring;
5852         unsigned int first;
5853         unsigned int tx_flags = 0;
5854         unsigned int len = skb_headlen(skb);
5855         unsigned int nr_frags;
5856         unsigned int mss;
5857         int count = 0;
5858         int tso;
5859         unsigned int f;
5860         __be16 protocol = vlan_get_protocol(skb);
5861
5862         if (test_bit(__E1000_DOWN, &adapter->state)) {
5863                 dev_kfree_skb_any(skb);
5864                 return NETDEV_TX_OK;
5865         }
5866
5867         if (skb->len <= 0) {
5868                 dev_kfree_skb_any(skb);
5869                 return NETDEV_TX_OK;
5870         }
5871
5872         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5873          * pad skb in order to meet this minimum size requirement
5874          */
5875         if (skb_put_padto(skb, 17))
5876                 return NETDEV_TX_OK;
5877
5878         mss = skb_shinfo(skb)->gso_size;
5879         if (mss) {
5880                 u8 hdr_len;
5881
5882                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5883                  * points to just header, pull a few bytes of payload from
5884                  * frags into skb->data
5885                  */
5886                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5887                 /* we do this workaround for ES2LAN, but it is un-necessary,
5888                  * avoiding it could save a lot of cycles
5889                  */
5890                 if (skb->data_len && (hdr_len == len)) {
5891                         unsigned int pull_size;
5892
5893                         pull_size = min_t(unsigned int, 4, skb->data_len);
5894                         if (!__pskb_pull_tail(skb, pull_size)) {
5895                                 e_err("__pskb_pull_tail failed.\n");
5896                                 dev_kfree_skb_any(skb);
5897                                 return NETDEV_TX_OK;
5898                         }
5899                         len = skb_headlen(skb);
5900                 }
5901         }
5902
5903         /* reserve a descriptor for the offload context */
5904         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5905                 count++;
5906         count++;
5907
5908         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5909
5910         nr_frags = skb_shinfo(skb)->nr_frags;
5911         for (f = 0; f < nr_frags; f++)
5912                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5913                                       adapter->tx_fifo_limit);
5914
5915         if (adapter->hw.mac.tx_pkt_filtering)
5916                 e1000_transfer_dhcp_info(adapter, skb);
5917
5918         /* need: count + 2 desc gap to keep tail from touching
5919          * head, otherwise try next time
5920          */
5921         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5922                 return NETDEV_TX_BUSY;
5923
5924         if (skb_vlan_tag_present(skb)) {
5925                 tx_flags |= E1000_TX_FLAGS_VLAN;
5926                 tx_flags |= (skb_vlan_tag_get(skb) <<
5927                              E1000_TX_FLAGS_VLAN_SHIFT);
5928         }
5929
5930         first = tx_ring->next_to_use;
5931
5932         tso = e1000_tso(tx_ring, skb, protocol);
5933         if (tso < 0) {
5934                 dev_kfree_skb_any(skb);
5935                 return NETDEV_TX_OK;
5936         }
5937
5938         if (tso)
5939                 tx_flags |= E1000_TX_FLAGS_TSO;
5940         else if (e1000_tx_csum(tx_ring, skb, protocol))
5941                 tx_flags |= E1000_TX_FLAGS_CSUM;
5942
5943         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5944          * 82571 hardware supports TSO capabilities for IPv6 as well...
5945          * no longer assume, we must.
5946          */
5947         if (protocol == htons(ETH_P_IP))
5948                 tx_flags |= E1000_TX_FLAGS_IPV4;
5949
5950         if (unlikely(skb->no_fcs))
5951                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5952
5953         /* if count is 0 then mapping error has occurred */
5954         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5955                              nr_frags);
5956         if (count) {
5957                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5958                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5959                         if (!adapter->tx_hwtstamp_skb) {
5960                                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5961                                 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5962                                 adapter->tx_hwtstamp_skb = skb_get(skb);
5963                                 adapter->tx_hwtstamp_start = jiffies;
5964                                 schedule_work(&adapter->tx_hwtstamp_work);
5965                         } else {
5966                                 adapter->tx_hwtstamp_skipped++;
5967                         }
5968                 }
5969
5970                 skb_tx_timestamp(skb);
5971
5972                 netdev_sent_queue(netdev, skb->len);
5973                 e1000_tx_queue(tx_ring, tx_flags, count);
5974                 /* Make sure there is space in the ring for the next send. */
5975                 e1000_maybe_stop_tx(tx_ring,
5976                                     (MAX_SKB_FRAGS *
5977                                      DIV_ROUND_UP(PAGE_SIZE,
5978                                                   adapter->tx_fifo_limit) + 2));
5979
5980                 if (!netdev_xmit_more() ||
5981                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5982                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5983                                 e1000e_update_tdt_wa(tx_ring,
5984                                                      tx_ring->next_to_use);
5985                         else
5986                                 writel(tx_ring->next_to_use, tx_ring->tail);
5987                 }
5988         } else {
5989                 dev_kfree_skb_any(skb);
5990                 tx_ring->buffer_info[first].time_stamp = 0;
5991                 tx_ring->next_to_use = first;
5992         }
5993
5994         return NETDEV_TX_OK;
5995 }
5996
5997 /**
5998  * e1000_tx_timeout - Respond to a Tx Hang
5999  * @netdev: network interface device structure
6000  * @txqueue: index of the hung queue (unused)
6001  **/
6002 static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6003 {
6004         struct e1000_adapter *adapter = netdev_priv(netdev);
6005
6006         /* Do the reset outside of interrupt context */
6007         adapter->tx_timeout_count++;
6008         schedule_work(&adapter->reset_task);
6009 }
6010
6011 static void e1000_reset_task(struct work_struct *work)
6012 {
6013         struct e1000_adapter *adapter;
6014         adapter = container_of(work, struct e1000_adapter, reset_task);
6015
6016         /* don't run the task if already down */
6017         if (test_bit(__E1000_DOWN, &adapter->state))
6018                 return;
6019
6020         if (!(adapter->flags & FLAG_RESTART_NOW)) {
6021                 e1000e_dump(adapter);
6022                 e_err("Reset adapter unexpectedly\n");
6023         }
6024         e1000e_reinit_locked(adapter);
6025 }
6026
6027 /**
6028  * e1000_get_stats64 - Get System Network Statistics
6029  * @netdev: network interface device structure
6030  * @stats: rtnl_link_stats64 pointer
6031  *
6032  * Returns the address of the device statistics structure.
6033  **/
6034 void e1000e_get_stats64(struct net_device *netdev,
6035                         struct rtnl_link_stats64 *stats)
6036 {
6037         struct e1000_adapter *adapter = netdev_priv(netdev);
6038
6039         spin_lock(&adapter->stats64_lock);
6040         e1000e_update_stats(adapter);
6041         /* Fill out the OS statistics structure */
6042         stats->rx_bytes = adapter->stats.gorc;
6043         stats->rx_packets = adapter->stats.gprc;
6044         stats->tx_bytes = adapter->stats.gotc;
6045         stats->tx_packets = adapter->stats.gptc;
6046         stats->multicast = adapter->stats.mprc;
6047         stats->collisions = adapter->stats.colc;
6048
6049         /* Rx Errors */
6050
6051         /* RLEC on some newer hardware can be incorrect so build
6052          * our own version based on RUC and ROC
6053          */
6054         stats->rx_errors = adapter->stats.rxerrc +
6055             adapter->stats.crcerrs + adapter->stats.algnerrc +
6056             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6057         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6058         stats->rx_crc_errors = adapter->stats.crcerrs;
6059         stats->rx_frame_errors = adapter->stats.algnerrc;
6060         stats->rx_missed_errors = adapter->stats.mpc;
6061
6062         /* Tx Errors */
6063         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6064         stats->tx_aborted_errors = adapter->stats.ecol;
6065         stats->tx_window_errors = adapter->stats.latecol;
6066         stats->tx_carrier_errors = adapter->stats.tncrs;
6067
6068         /* Tx Dropped needs to be maintained elsewhere */
6069
6070         spin_unlock(&adapter->stats64_lock);
6071 }
6072
6073 /**
6074  * e1000_change_mtu - Change the Maximum Transfer Unit
6075  * @netdev: network interface device structure
6076  * @new_mtu: new value for maximum frame size
6077  *
6078  * Returns 0 on success, negative on failure
6079  **/
6080 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6081 {
6082         struct e1000_adapter *adapter = netdev_priv(netdev);
6083         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6084
6085         /* Jumbo frame support */
6086         if ((new_mtu > ETH_DATA_LEN) &&
6087             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6088                 e_err("Jumbo Frames not supported.\n");
6089                 return -EINVAL;
6090         }
6091
6092         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6093         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6094             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6095             (new_mtu > ETH_DATA_LEN)) {
6096                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6097                 return -EINVAL;
6098         }
6099
6100         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6101                 usleep_range(1000, 1100);
6102         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6103         adapter->max_frame_size = max_frame;
6104         netdev_dbg(netdev, "changing MTU from %d to %d\n",
6105                    netdev->mtu, new_mtu);
6106         netdev->mtu = new_mtu;
6107
6108         pm_runtime_get_sync(netdev->dev.parent);
6109
6110         if (netif_running(netdev))
6111                 e1000e_down(adapter, true);
6112
6113         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6114          * means we reserve 2 more, this pushes us to allocate from the next
6115          * larger slab size.
6116          * i.e. RXBUFFER_2048 --> size-4096 slab
6117          * However with the new *_jumbo_rx* routines, jumbo receives will use
6118          * fragmented skbs
6119          */
6120
6121         if (max_frame <= 2048)
6122                 adapter->rx_buffer_len = 2048;
6123         else
6124                 adapter->rx_buffer_len = 4096;
6125
6126         /* adjust allocation if LPE protects us, and we aren't using SBP */
6127         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6128                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6129
6130         if (netif_running(netdev))
6131                 e1000e_up(adapter);
6132         else
6133                 e1000e_reset(adapter);
6134
6135         pm_runtime_put_sync(netdev->dev.parent);
6136
6137         clear_bit(__E1000_RESETTING, &adapter->state);
6138
6139         return 0;
6140 }
6141
6142 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6143                            int cmd)
6144 {
6145         struct e1000_adapter *adapter = netdev_priv(netdev);
6146         struct mii_ioctl_data *data = if_mii(ifr);
6147
6148         if (adapter->hw.phy.media_type != e1000_media_type_copper)
6149                 return -EOPNOTSUPP;
6150
6151         switch (cmd) {
6152         case SIOCGMIIPHY:
6153                 data->phy_id = adapter->hw.phy.addr;
6154                 break;
6155         case SIOCGMIIREG:
6156                 e1000_phy_read_status(adapter);
6157
6158                 switch (data->reg_num & 0x1F) {
6159                 case MII_BMCR:
6160                         data->val_out = adapter->phy_regs.bmcr;
6161                         break;
6162                 case MII_BMSR:
6163                         data->val_out = adapter->phy_regs.bmsr;
6164                         break;
6165                 case MII_PHYSID1:
6166                         data->val_out = (adapter->hw.phy.id >> 16);
6167                         break;
6168                 case MII_PHYSID2:
6169                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6170                         break;
6171                 case MII_ADVERTISE:
6172                         data->val_out = adapter->phy_regs.advertise;
6173                         break;
6174                 case MII_LPA:
6175                         data->val_out = adapter->phy_regs.lpa;
6176                         break;
6177                 case MII_EXPANSION:
6178                         data->val_out = adapter->phy_regs.expansion;
6179                         break;
6180                 case MII_CTRL1000:
6181                         data->val_out = adapter->phy_regs.ctrl1000;
6182                         break;
6183                 case MII_STAT1000:
6184                         data->val_out = adapter->phy_regs.stat1000;
6185                         break;
6186                 case MII_ESTATUS:
6187                         data->val_out = adapter->phy_regs.estatus;
6188                         break;
6189                 default:
6190                         return -EIO;
6191                 }
6192                 break;
6193         case SIOCSMIIREG:
6194         default:
6195                 return -EOPNOTSUPP;
6196         }
6197         return 0;
6198 }
6199
6200 /**
6201  * e1000e_hwtstamp_ioctl - control hardware time stamping
6202  * @netdev: network interface device structure
6203  * @ifr: interface request
6204  *
6205  * Outgoing time stamping can be enabled and disabled. Play nice and
6206  * disable it when requested, although it shouldn't cause any overhead
6207  * when no packet needs it. At most one packet in the queue may be
6208  * marked for time stamping, otherwise it would be impossible to tell
6209  * for sure to which packet the hardware time stamp belongs.
6210  *
6211  * Incoming time stamping has to be configured via the hardware filters.
6212  * Not all combinations are supported, in particular event type has to be
6213  * specified. Matching the kind of event packet is not supported, with the
6214  * exception of "all V2 events regardless of level 2 or 4".
6215  **/
6216 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6217 {
6218         struct e1000_adapter *adapter = netdev_priv(netdev);
6219         struct hwtstamp_config config;
6220         int ret_val;
6221
6222         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6223                 return -EFAULT;
6224
6225         ret_val = e1000e_config_hwtstamp(adapter, &config);
6226         if (ret_val)
6227                 return ret_val;
6228
6229         switch (config.rx_filter) {
6230         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6231         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6232         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6233         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6234         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6235         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6236                 /* With V2 type filters which specify a Sync or Delay Request,
6237                  * Path Delay Request/Response messages are also time stamped
6238                  * by hardware so notify the caller the requested packets plus
6239                  * some others are time stamped.
6240                  */
6241                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6242                 break;
6243         default:
6244                 break;
6245         }
6246
6247         return copy_to_user(ifr->ifr_data, &config,
6248                             sizeof(config)) ? -EFAULT : 0;
6249 }
6250
6251 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6252 {
6253         struct e1000_adapter *adapter = netdev_priv(netdev);
6254
6255         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6256                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6257 }
6258
6259 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6260 {
6261         switch (cmd) {
6262         case SIOCGMIIPHY:
6263         case SIOCGMIIREG:
6264         case SIOCSMIIREG:
6265                 return e1000_mii_ioctl(netdev, ifr, cmd);
6266         case SIOCSHWTSTAMP:
6267                 return e1000e_hwtstamp_set(netdev, ifr);
6268         case SIOCGHWTSTAMP:
6269                 return e1000e_hwtstamp_get(netdev, ifr);
6270         default:
6271                 return -EOPNOTSUPP;
6272         }
6273 }
6274
6275 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6276 {
6277         struct e1000_hw *hw = &adapter->hw;
6278         u32 i, mac_reg, wuc;
6279         u16 phy_reg, wuc_enable;
6280         int retval;
6281
6282         /* copy MAC RARs to PHY RARs */
6283         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6284
6285         retval = hw->phy.ops.acquire(hw);
6286         if (retval) {
6287                 e_err("Could not acquire PHY\n");
6288                 return retval;
6289         }
6290
6291         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6292         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6293         if (retval)
6294                 goto release;
6295
6296         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6297         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6298                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6299                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6300                                            (u16)(mac_reg & 0xFFFF));
6301                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6302                                            (u16)((mac_reg >> 16) & 0xFFFF));
6303         }
6304
6305         /* configure PHY Rx Control register */
6306         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6307         mac_reg = er32(RCTL);
6308         if (mac_reg & E1000_RCTL_UPE)
6309                 phy_reg |= BM_RCTL_UPE;
6310         if (mac_reg & E1000_RCTL_MPE)
6311                 phy_reg |= BM_RCTL_MPE;
6312         phy_reg &= ~(BM_RCTL_MO_MASK);
6313         if (mac_reg & E1000_RCTL_MO_3)
6314                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6315                             << BM_RCTL_MO_SHIFT);
6316         if (mac_reg & E1000_RCTL_BAM)
6317                 phy_reg |= BM_RCTL_BAM;
6318         if (mac_reg & E1000_RCTL_PMCF)
6319                 phy_reg |= BM_RCTL_PMCF;
6320         mac_reg = er32(CTRL);
6321         if (mac_reg & E1000_CTRL_RFCE)
6322                 phy_reg |= BM_RCTL_RFCE;
6323         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6324
6325         wuc = E1000_WUC_PME_EN;
6326         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6327                 wuc |= E1000_WUC_APME;
6328
6329         /* enable PHY wakeup in MAC register */
6330         ew32(WUFC, wufc);
6331         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6332                    E1000_WUC_PME_STATUS | wuc));
6333
6334         /* configure and enable PHY wakeup in PHY registers */
6335         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6336         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6337
6338         /* activate PHY wakeup */
6339         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6340         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6341         if (retval)
6342                 e_err("Could not set PHY Host Wakeup bit\n");
6343 release:
6344         hw->phy.ops.release(hw);
6345
6346         return retval;
6347 }
6348
6349 static void e1000e_flush_lpic(struct pci_dev *pdev)
6350 {
6351         struct net_device *netdev = pci_get_drvdata(pdev);
6352         struct e1000_adapter *adapter = netdev_priv(netdev);
6353         struct e1000_hw *hw = &adapter->hw;
6354         u32 ret_val;
6355
6356         pm_runtime_get_sync(netdev->dev.parent);
6357
6358         ret_val = hw->phy.ops.acquire(hw);
6359         if (ret_val)
6360                 goto fl_out;
6361
6362         pr_info("EEE TX LPI TIMER: %08X\n",
6363                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6364
6365         hw->phy.ops.release(hw);
6366
6367 fl_out:
6368         pm_runtime_put_sync(netdev->dev.parent);
6369 }
6370
6371 /* S0ix implementation */
6372 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6373 {
6374         struct e1000_hw *hw = &adapter->hw;
6375         u32 mac_data;
6376         u16 phy_data;
6377
6378         /* Disable the periodic inband message,
6379          * don't request PCIe clock in K1 page770_17[10:9] = 10b
6380          */
6381         e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6382         phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6383         phy_data |= BIT(10);
6384         e1e_wphy(hw, HV_PM_CTRL, phy_data);
6385
6386         /* Make sure we don't exit K1 every time a new packet arrives
6387          * 772_29[5] = 1 CS_Mode_Stay_In_K1
6388          */
6389         e1e_rphy(hw, I217_CGFREG, &phy_data);
6390         phy_data |= BIT(5);
6391         e1e_wphy(hw, I217_CGFREG, phy_data);
6392
6393         /* Change the MAC/PHY interface to SMBus
6394          * Force the SMBus in PHY page769_23[0] = 1
6395          * Force the SMBus in MAC CTRL_EXT[11] = 1
6396          */
6397         e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6398         phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6399         e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6400         mac_data = er32(CTRL_EXT);
6401         mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6402         ew32(CTRL_EXT, mac_data);
6403
6404         /* DFT control: PHY bit: page769_20[0] = 1
6405          * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6406          */
6407         e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6408         phy_data |= BIT(0);
6409         e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6410
6411         mac_data = er32(EXTCNF_CTRL);
6412         mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6413         ew32(EXTCNF_CTRL, mac_data);
6414
6415         /* Check MAC Tx/Rx packet buffer pointers.
6416          * Reset MAC Tx/Rx packet buffer pointers to suppress any
6417          * pending traffic indication that would prevent power gating.
6418          */
6419         mac_data = er32(TDFH);
6420         if (mac_data)
6421                 ew32(TDFH, 0);
6422         mac_data = er32(TDFT);
6423         if (mac_data)
6424                 ew32(TDFT, 0);
6425         mac_data = er32(TDFHS);
6426         if (mac_data)
6427                 ew32(TDFHS, 0);
6428         mac_data = er32(TDFTS);
6429         if (mac_data)
6430                 ew32(TDFTS, 0);
6431         mac_data = er32(TDFPC);
6432         if (mac_data)
6433                 ew32(TDFPC, 0);
6434         mac_data = er32(RDFH);
6435         if (mac_data)
6436                 ew32(RDFH, 0);
6437         mac_data = er32(RDFT);
6438         if (mac_data)
6439                 ew32(RDFT, 0);
6440         mac_data = er32(RDFHS);
6441         if (mac_data)
6442                 ew32(RDFHS, 0);
6443         mac_data = er32(RDFTS);
6444         if (mac_data)
6445                 ew32(RDFTS, 0);
6446         mac_data = er32(RDFPC);
6447         if (mac_data)
6448                 ew32(RDFPC, 0);
6449
6450         /* Enable the Dynamic Power Gating in the MAC */
6451         mac_data = er32(FEXTNVM7);
6452         mac_data |= BIT(22);
6453         ew32(FEXTNVM7, mac_data);
6454
6455         /* Disable the time synchronization clock */
6456         mac_data = er32(FEXTNVM7);
6457         mac_data |= BIT(31);
6458         mac_data &= ~BIT(0);
6459         ew32(FEXTNVM7, mac_data);
6460
6461         /* Dynamic Power Gating Enable */
6462         mac_data = er32(CTRL_EXT);
6463         mac_data |= BIT(3);
6464         ew32(CTRL_EXT, mac_data);
6465
6466         /* Disable disconnected cable conditioning for Power Gating */
6467         mac_data = er32(DPGFR);
6468         mac_data |= BIT(2);
6469         ew32(DPGFR, mac_data);
6470
6471         /* Don't wake from dynamic Power Gating with clock request */
6472         mac_data = er32(FEXTNVM12);
6473         mac_data |= BIT(12);
6474         ew32(FEXTNVM12, mac_data);
6475
6476         /* Ungate PGCB clock */
6477         mac_data = er32(FEXTNVM9);
6478         mac_data &= ~BIT(28);
6479         ew32(FEXTNVM9, mac_data);
6480
6481         /* Enable K1 off to enable mPHY Power Gating */
6482         mac_data = er32(FEXTNVM6);
6483         mac_data |= BIT(31);
6484         ew32(FEXTNVM6, mac_data);
6485
6486         /* Enable mPHY power gating for any link and speed */
6487         mac_data = er32(FEXTNVM8);
6488         mac_data |= BIT(9);
6489         ew32(FEXTNVM8, mac_data);
6490
6491         /* Enable the Dynamic Clock Gating in the DMA and MAC */
6492         mac_data = er32(CTRL_EXT);
6493         mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6494         ew32(CTRL_EXT, mac_data);
6495
6496         /* No MAC DPG gating SLP_S0 in modern standby
6497          * Switch the logic of the lanphypc to use PMC counter
6498          */
6499         mac_data = er32(FEXTNVM5);
6500         mac_data |= BIT(7);
6501         ew32(FEXTNVM5, mac_data);
6502 }
6503
6504 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6505 {
6506         struct e1000_hw *hw = &adapter->hw;
6507         u32 mac_data;
6508         u16 phy_data;
6509
6510         /* Disable the Dynamic Power Gating in the MAC */
6511         mac_data = er32(FEXTNVM7);
6512         mac_data &= 0xFFBFFFFF;
6513         ew32(FEXTNVM7, mac_data);
6514
6515         /* Enable the time synchronization clock */
6516         mac_data = er32(FEXTNVM7);
6517         mac_data |= BIT(0);
6518         ew32(FEXTNVM7, mac_data);
6519
6520         /* Disable mPHY power gating for any link and speed */
6521         mac_data = er32(FEXTNVM8);
6522         mac_data &= ~BIT(9);
6523         ew32(FEXTNVM8, mac_data);
6524
6525         /* Disable K1 off */
6526         mac_data = er32(FEXTNVM6);
6527         mac_data &= ~BIT(31);
6528         ew32(FEXTNVM6, mac_data);
6529
6530         /* Disable Ungate PGCB clock */
6531         mac_data = er32(FEXTNVM9);
6532         mac_data |= BIT(28);
6533         ew32(FEXTNVM9, mac_data);
6534
6535         /* Cancel not waking from dynamic
6536          * Power Gating with clock request
6537          */
6538         mac_data = er32(FEXTNVM12);
6539         mac_data &= ~BIT(12);
6540         ew32(FEXTNVM12, mac_data);
6541
6542         /* Cancel disable disconnected cable conditioning
6543          * for Power Gating
6544          */
6545         mac_data = er32(DPGFR);
6546         mac_data &= ~BIT(2);
6547         ew32(DPGFR, mac_data);
6548
6549         /* Disable Dynamic Power Gating */
6550         mac_data = er32(CTRL_EXT);
6551         mac_data &= 0xFFFFFFF7;
6552         ew32(CTRL_EXT, mac_data);
6553
6554         /* Disable the Dynamic Clock Gating in the DMA and MAC */
6555         mac_data = er32(CTRL_EXT);
6556         mac_data &= 0xFFF7FFFF;
6557         ew32(CTRL_EXT, mac_data);
6558
6559         /* Revert the lanphypc logic to use the internal Gbe counter
6560          * and not the PMC counter
6561          */
6562         mac_data = er32(FEXTNVM5);
6563         mac_data &= 0xFFFFFF7F;
6564         ew32(FEXTNVM5, mac_data);
6565
6566         /* Enable the periodic inband message,
6567          * Request PCIe clock in K1 page770_17[10:9] =01b
6568          */
6569         e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6570         phy_data &= 0xFBFF;
6571         phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6572         e1e_wphy(hw, HV_PM_CTRL, phy_data);
6573
6574         /* Return back configuration
6575          * 772_29[5] = 0 CS_Mode_Stay_In_K1
6576          */
6577         e1e_rphy(hw, I217_CGFREG, &phy_data);
6578         phy_data &= 0xFFDF;
6579         e1e_wphy(hw, I217_CGFREG, phy_data);
6580
6581         /* Change the MAC/PHY interface to Kumeran
6582          * Unforce the SMBus in PHY page769_23[0] = 0
6583          * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6584          */
6585         e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6586         phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6587         e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6588         mac_data = er32(CTRL_EXT);
6589         mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6590         ew32(CTRL_EXT, mac_data);
6591 }
6592
6593 static int e1000e_pm_freeze(struct device *dev)
6594 {
6595         struct net_device *netdev = dev_get_drvdata(dev);
6596         struct e1000_adapter *adapter = netdev_priv(netdev);
6597         bool present;
6598
6599         rtnl_lock();
6600
6601         present = netif_device_present(netdev);
6602         netif_device_detach(netdev);
6603
6604         if (present && netif_running(netdev)) {
6605                 int count = E1000_CHECK_RESET_COUNT;
6606
6607                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6608                         usleep_range(10000, 11000);
6609
6610                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6611
6612                 /* Quiesce the device without resetting the hardware */
6613                 e1000e_down(adapter, false);
6614                 e1000_free_irq(adapter);
6615         }
6616         rtnl_unlock();
6617
6618         e1000e_reset_interrupt_capability(adapter);
6619
6620         /* Allow time for pending master requests to run */
6621         e1000e_disable_pcie_master(&adapter->hw);
6622
6623         return 0;
6624 }
6625
6626 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6627 {
6628         struct net_device *netdev = pci_get_drvdata(pdev);
6629         struct e1000_adapter *adapter = netdev_priv(netdev);
6630         struct e1000_hw *hw = &adapter->hw;
6631         u32 ctrl, ctrl_ext, rctl, status, wufc;
6632         int retval = 0;
6633
6634         /* Runtime suspend should only enable wakeup for link changes */
6635         if (runtime)
6636                 wufc = E1000_WUFC_LNKC;
6637         else if (device_may_wakeup(&pdev->dev))
6638                 wufc = adapter->wol;
6639         else
6640                 wufc = 0;
6641
6642         status = er32(STATUS);
6643         if (status & E1000_STATUS_LU)
6644                 wufc &= ~E1000_WUFC_LNKC;
6645
6646         if (wufc) {
6647                 e1000_setup_rctl(adapter);
6648                 e1000e_set_rx_mode(netdev);
6649
6650                 /* turn on all-multi mode if wake on multicast is enabled */
6651                 if (wufc & E1000_WUFC_MC) {
6652                         rctl = er32(RCTL);
6653                         rctl |= E1000_RCTL_MPE;
6654                         ew32(RCTL, rctl);
6655                 }
6656
6657                 ctrl = er32(CTRL);
6658                 ctrl |= E1000_CTRL_ADVD3WUC;
6659                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6660                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6661                 ew32(CTRL, ctrl);
6662
6663                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6664                     adapter->hw.phy.media_type ==
6665                     e1000_media_type_internal_serdes) {
6666                         /* keep the laser running in D3 */
6667                         ctrl_ext = er32(CTRL_EXT);
6668                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6669                         ew32(CTRL_EXT, ctrl_ext);
6670                 }
6671
6672                 if (!runtime)
6673                         e1000e_power_up_phy(adapter);
6674
6675                 if (adapter->flags & FLAG_IS_ICH)
6676                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6677
6678                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6679                         /* enable wakeup by the PHY */
6680                         retval = e1000_init_phy_wakeup(adapter, wufc);
6681                         if (retval)
6682                                 return retval;
6683                 } else {
6684                         /* enable wakeup by the MAC */
6685                         ew32(WUFC, wufc);
6686                         ew32(WUC, E1000_WUC_PME_EN);
6687                 }
6688         } else {
6689                 ew32(WUC, 0);
6690                 ew32(WUFC, 0);
6691
6692                 e1000_power_down_phy(adapter);
6693         }
6694
6695         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6696                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6697         } else if (hw->mac.type >= e1000_pch_lpt) {
6698                 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6699                         /* ULP does not support wake from unicast, multicast
6700                          * or broadcast.
6701                          */
6702                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6703
6704                 if (retval)
6705                         return retval;
6706         }
6707
6708         /* Ensure that the appropriate bits are set in LPI_CTRL
6709          * for EEE in Sx
6710          */
6711         if ((hw->phy.type >= e1000_phy_i217) &&
6712             adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6713                 u16 lpi_ctrl = 0;
6714
6715                 retval = hw->phy.ops.acquire(hw);
6716                 if (!retval) {
6717                         retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6718                                                  &lpi_ctrl);
6719                         if (!retval) {
6720                                 if (adapter->eee_advert &
6721                                     hw->dev_spec.ich8lan.eee_lp_ability &
6722                                     I82579_EEE_100_SUPPORTED)
6723                                         lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6724                                 if (adapter->eee_advert &
6725                                     hw->dev_spec.ich8lan.eee_lp_ability &
6726                                     I82579_EEE_1000_SUPPORTED)
6727                                         lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6728
6729                                 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6730                                                          lpi_ctrl);
6731                         }
6732                 }
6733                 hw->phy.ops.release(hw);
6734         }
6735
6736         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
6737          * would have already happened in close and is redundant.
6738          */
6739         e1000e_release_hw_control(adapter);
6740
6741         pci_clear_master(pdev);
6742
6743         /* The pci-e switch on some quad port adapters will report a
6744          * correctable error when the MAC transitions from D0 to D3.  To
6745          * prevent this we need to mask off the correctable errors on the
6746          * downstream port of the pci-e switch.
6747          *
6748          * We don't have the associated upstream bridge while assigning
6749          * the PCI device into guest. For example, the KVM on power is
6750          * one of the cases.
6751          */
6752         if (adapter->flags & FLAG_IS_QUAD_PORT) {
6753                 struct pci_dev *us_dev = pdev->bus->self;
6754                 u16 devctl;
6755
6756                 if (!us_dev)
6757                         return 0;
6758
6759                 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6760                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6761                                            (devctl & ~PCI_EXP_DEVCTL_CERE));
6762
6763                 pci_save_state(pdev);
6764                 pci_prepare_to_sleep(pdev);
6765
6766                 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6767         }
6768
6769         return 0;
6770 }
6771
6772 /**
6773  * __e1000e_disable_aspm - Disable ASPM states
6774  * @pdev: pointer to PCI device struct
6775  * @state: bit-mask of ASPM states to disable
6776  * @locked: indication if this context holds pci_bus_sem locked.
6777  *
6778  * Some devices *must* have certain ASPM states disabled per hardware errata.
6779  **/
6780 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6781 {
6782         struct pci_dev *parent = pdev->bus->self;
6783         u16 aspm_dis_mask = 0;
6784         u16 pdev_aspmc, parent_aspmc;
6785
6786         switch (state) {
6787         case PCIE_LINK_STATE_L0S:
6788         case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6789                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6790                 fallthrough; /* can't have L1 without L0s */
6791         case PCIE_LINK_STATE_L1:
6792                 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6793                 break;
6794         default:
6795                 return;
6796         }
6797
6798         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6799         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6800
6801         if (parent) {
6802                 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6803                                           &parent_aspmc);
6804                 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6805         }
6806
6807         /* Nothing to do if the ASPM states to be disabled already are */
6808         if (!(pdev_aspmc & aspm_dis_mask) &&
6809             (!parent || !(parent_aspmc & aspm_dis_mask)))
6810                 return;
6811
6812         dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6813                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6814                  "L0s" : "",
6815                  (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6816                  "L1" : "");
6817
6818 #ifdef CONFIG_PCIEASPM
6819         if (locked)
6820                 pci_disable_link_state_locked(pdev, state);
6821         else
6822                 pci_disable_link_state(pdev, state);
6823
6824         /* Double-check ASPM control.  If not disabled by the above, the
6825          * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6826          * not enabled); override by writing PCI config space directly.
6827          */
6828         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6829         pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6830
6831         if (!(aspm_dis_mask & pdev_aspmc))
6832                 return;
6833 #endif
6834
6835         /* Both device and parent should have the same ASPM setting.
6836          * Disable ASPM in downstream component first and then upstream.
6837          */
6838         pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6839
6840         if (parent)
6841                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6842                                            aspm_dis_mask);
6843 }
6844
6845 /**
6846  * e1000e_disable_aspm - Disable ASPM states.
6847  * @pdev: pointer to PCI device struct
6848  * @state: bit-mask of ASPM states to disable
6849  *
6850  * This function acquires the pci_bus_sem!
6851  * Some devices *must* have certain ASPM states disabled per hardware errata.
6852  **/
6853 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6854 {
6855         __e1000e_disable_aspm(pdev, state, 0);
6856 }
6857
6858 /**
6859  * e1000e_disable_aspm_locked   Disable ASPM states.
6860  * @pdev: pointer to PCI device struct
6861  * @state: bit-mask of ASPM states to disable
6862  *
6863  * This function must be called with pci_bus_sem acquired!
6864  * Some devices *must* have certain ASPM states disabled per hardware errata.
6865  **/
6866 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6867 {
6868         __e1000e_disable_aspm(pdev, state, 1);
6869 }
6870
6871 static int e1000e_pm_thaw(struct device *dev)
6872 {
6873         struct net_device *netdev = dev_get_drvdata(dev);
6874         struct e1000_adapter *adapter = netdev_priv(netdev);
6875         int rc = 0;
6876
6877         e1000e_set_interrupt_capability(adapter);
6878
6879         rtnl_lock();
6880         if (netif_running(netdev)) {
6881                 rc = e1000_request_irq(adapter);
6882                 if (rc)
6883                         goto err_irq;
6884
6885                 e1000e_up(adapter);
6886         }
6887
6888         netif_device_attach(netdev);
6889 err_irq:
6890         rtnl_unlock();
6891
6892         return rc;
6893 }
6894
6895 static int __e1000_resume(struct pci_dev *pdev)
6896 {
6897         struct net_device *netdev = pci_get_drvdata(pdev);
6898         struct e1000_adapter *adapter = netdev_priv(netdev);
6899         struct e1000_hw *hw = &adapter->hw;
6900         u16 aspm_disable_flag = 0;
6901
6902         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6903                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6904         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6905                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6906         if (aspm_disable_flag)
6907                 e1000e_disable_aspm(pdev, aspm_disable_flag);
6908
6909         pci_set_master(pdev);
6910
6911         if (hw->mac.type >= e1000_pch2lan)
6912                 e1000_resume_workarounds_pchlan(&adapter->hw);
6913
6914         e1000e_power_up_phy(adapter);
6915
6916         /* report the system wakeup cause from S3/S4 */
6917         if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6918                 u16 phy_data;
6919
6920                 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6921                 if (phy_data) {
6922                         e_info("PHY Wakeup cause - %s\n",
6923                                phy_data & E1000_WUS_EX ? "Unicast Packet" :
6924                                phy_data & E1000_WUS_MC ? "Multicast Packet" :
6925                                phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6926                                phy_data & E1000_WUS_MAG ? "Magic Packet" :
6927                                phy_data & E1000_WUS_LNKC ?
6928                                "Link Status Change" : "other");
6929                 }
6930                 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6931         } else {
6932                 u32 wus = er32(WUS);
6933
6934                 if (wus) {
6935                         e_info("MAC Wakeup cause - %s\n",
6936                                wus & E1000_WUS_EX ? "Unicast Packet" :
6937                                wus & E1000_WUS_MC ? "Multicast Packet" :
6938                                wus & E1000_WUS_BC ? "Broadcast Packet" :
6939                                wus & E1000_WUS_MAG ? "Magic Packet" :
6940                                wus & E1000_WUS_LNKC ? "Link Status Change" :
6941                                "other");
6942                 }
6943                 ew32(WUS, ~0);
6944         }
6945
6946         e1000e_reset(adapter);
6947
6948         e1000_init_manageability_pt(adapter);
6949
6950         /* If the controller has AMT, do not set DRV_LOAD until the interface
6951          * is up.  For all other cases, let the f/w know that the h/w is now
6952          * under the control of the driver.
6953          */
6954         if (!(adapter->flags & FLAG_HAS_AMT))
6955                 e1000e_get_hw_control(adapter);
6956
6957         return 0;
6958 }
6959
6960 static __maybe_unused int e1000e_pm_suspend(struct device *dev)
6961 {
6962         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6963         struct e1000_adapter *adapter = netdev_priv(netdev);
6964         struct pci_dev *pdev = to_pci_dev(dev);
6965         struct e1000_hw *hw = &adapter->hw;
6966         int rc;
6967
6968         e1000e_flush_lpic(pdev);
6969
6970         e1000e_pm_freeze(dev);
6971
6972         rc = __e1000_shutdown(pdev, false);
6973         if (rc)
6974                 e1000e_pm_thaw(dev);
6975
6976         /* Introduce S0ix implementation */
6977         if (hw->mac.type >= e1000_pch_cnp &&
6978             !e1000e_check_me(hw->adapter->pdev->device))
6979                 e1000e_s0ix_entry_flow(adapter);
6980
6981         return rc;
6982 }
6983
6984 static __maybe_unused int e1000e_pm_resume(struct device *dev)
6985 {
6986         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6987         struct e1000_adapter *adapter = netdev_priv(netdev);
6988         struct pci_dev *pdev = to_pci_dev(dev);
6989         struct e1000_hw *hw = &adapter->hw;
6990         int rc;
6991
6992         /* Introduce S0ix implementation */
6993         if (hw->mac.type >= e1000_pch_cnp &&
6994             !e1000e_check_me(hw->adapter->pdev->device))
6995                 e1000e_s0ix_exit_flow(adapter);
6996
6997         rc = __e1000_resume(pdev);
6998         if (rc)
6999                 return rc;
7000
7001         return e1000e_pm_thaw(dev);
7002 }
7003
7004 static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
7005 {
7006         struct net_device *netdev = dev_get_drvdata(dev);
7007         struct e1000_adapter *adapter = netdev_priv(netdev);
7008         u16 eee_lp;
7009
7010         eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
7011
7012         if (!e1000e_has_link(adapter)) {
7013                 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
7014                 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
7015         }
7016
7017         return -EBUSY;
7018 }
7019
7020 static __maybe_unused int e1000e_pm_runtime_resume(struct device *dev)
7021 {
7022         struct pci_dev *pdev = to_pci_dev(dev);
7023         struct net_device *netdev = pci_get_drvdata(pdev);
7024         struct e1000_adapter *adapter = netdev_priv(netdev);
7025         int rc;
7026
7027         rc = __e1000_resume(pdev);
7028         if (rc)
7029                 return rc;
7030
7031         if (netdev->flags & IFF_UP)
7032                 e1000e_up(adapter);
7033
7034         return rc;
7035 }
7036
7037 static __maybe_unused int e1000e_pm_runtime_suspend(struct device *dev)
7038 {
7039         struct pci_dev *pdev = to_pci_dev(dev);
7040         struct net_device *netdev = pci_get_drvdata(pdev);
7041         struct e1000_adapter *adapter = netdev_priv(netdev);
7042
7043         if (netdev->flags & IFF_UP) {
7044                 int count = E1000_CHECK_RESET_COUNT;
7045
7046                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7047                         usleep_range(10000, 11000);
7048
7049                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7050
7051                 /* Down the device without resetting the hardware */
7052                 e1000e_down(adapter, false);
7053         }
7054
7055         if (__e1000_shutdown(pdev, true)) {
7056                 e1000e_pm_runtime_resume(dev);
7057                 return -EBUSY;
7058         }
7059
7060         return 0;
7061 }
7062
7063 static void e1000_shutdown(struct pci_dev *pdev)
7064 {
7065         e1000e_flush_lpic(pdev);
7066
7067         e1000e_pm_freeze(&pdev->dev);
7068
7069         __e1000_shutdown(pdev, false);
7070 }
7071
7072 #ifdef CONFIG_NET_POLL_CONTROLLER
7073
7074 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7075 {
7076         struct net_device *netdev = data;
7077         struct e1000_adapter *adapter = netdev_priv(netdev);
7078
7079         if (adapter->msix_entries) {
7080                 int vector, msix_irq;
7081
7082                 vector = 0;
7083                 msix_irq = adapter->msix_entries[vector].vector;
7084                 if (disable_hardirq(msix_irq))
7085                         e1000_intr_msix_rx(msix_irq, netdev);
7086                 enable_irq(msix_irq);
7087
7088                 vector++;
7089                 msix_irq = adapter->msix_entries[vector].vector;
7090                 if (disable_hardirq(msix_irq))
7091                         e1000_intr_msix_tx(msix_irq, netdev);
7092                 enable_irq(msix_irq);
7093
7094                 vector++;
7095                 msix_irq = adapter->msix_entries[vector].vector;
7096                 if (disable_hardirq(msix_irq))
7097                         e1000_msix_other(msix_irq, netdev);
7098                 enable_irq(msix_irq);
7099         }
7100
7101         return IRQ_HANDLED;
7102 }
7103
7104 /**
7105  * e1000_netpoll
7106  * @netdev: network interface device structure
7107  *
7108  * Polling 'interrupt' - used by things like netconsole to send skbs
7109  * without having to re-enable interrupts. It's not called while
7110  * the interrupt routine is executing.
7111  */
7112 static void e1000_netpoll(struct net_device *netdev)
7113 {
7114         struct e1000_adapter *adapter = netdev_priv(netdev);
7115
7116         switch (adapter->int_mode) {
7117         case E1000E_INT_MODE_MSIX:
7118                 e1000_intr_msix(adapter->pdev->irq, netdev);
7119                 break;
7120         case E1000E_INT_MODE_MSI:
7121                 if (disable_hardirq(adapter->pdev->irq))
7122                         e1000_intr_msi(adapter->pdev->irq, netdev);
7123                 enable_irq(adapter->pdev->irq);
7124                 break;
7125         default:                /* E1000E_INT_MODE_LEGACY */
7126                 if (disable_hardirq(adapter->pdev->irq))
7127                         e1000_intr(adapter->pdev->irq, netdev);
7128                 enable_irq(adapter->pdev->irq);
7129                 break;
7130         }
7131 }
7132 #endif
7133
7134 /**
7135  * e1000_io_error_detected - called when PCI error is detected
7136  * @pdev: Pointer to PCI device
7137  * @state: The current pci connection state
7138  *
7139  * This function is called after a PCI bus error affecting
7140  * this device has been detected.
7141  */
7142 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7143                                                 pci_channel_state_t state)
7144 {
7145         e1000e_pm_freeze(&pdev->dev);
7146
7147         if (state == pci_channel_io_perm_failure)
7148                 return PCI_ERS_RESULT_DISCONNECT;
7149
7150         pci_disable_device(pdev);
7151
7152         /* Request a slot slot reset. */
7153         return PCI_ERS_RESULT_NEED_RESET;
7154 }
7155
7156 /**
7157  * e1000_io_slot_reset - called after the pci bus has been reset.
7158  * @pdev: Pointer to PCI device
7159  *
7160  * Restart the card from scratch, as if from a cold-boot. Implementation
7161  * resembles the first-half of the e1000e_pm_resume routine.
7162  */
7163 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7164 {
7165         struct net_device *netdev = pci_get_drvdata(pdev);
7166         struct e1000_adapter *adapter = netdev_priv(netdev);
7167         struct e1000_hw *hw = &adapter->hw;
7168         u16 aspm_disable_flag = 0;
7169         int err;
7170         pci_ers_result_t result;
7171
7172         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7173                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7174         if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7175                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7176         if (aspm_disable_flag)
7177                 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7178
7179         err = pci_enable_device_mem(pdev);
7180         if (err) {
7181                 dev_err(&pdev->dev,
7182                         "Cannot re-enable PCI device after reset.\n");
7183                 result = PCI_ERS_RESULT_DISCONNECT;
7184         } else {
7185                 pdev->state_saved = true;
7186                 pci_restore_state(pdev);
7187                 pci_set_master(pdev);
7188
7189                 pci_enable_wake(pdev, PCI_D3hot, 0);
7190                 pci_enable_wake(pdev, PCI_D3cold, 0);
7191
7192                 e1000e_reset(adapter);
7193                 ew32(WUS, ~0);
7194                 result = PCI_ERS_RESULT_RECOVERED;
7195         }
7196
7197         return result;
7198 }
7199
7200 /**
7201  * e1000_io_resume - called when traffic can start flowing again.
7202  * @pdev: Pointer to PCI device
7203  *
7204  * This callback is called when the error recovery driver tells us that
7205  * its OK to resume normal operation. Implementation resembles the
7206  * second-half of the e1000e_pm_resume routine.
7207  */
7208 static void e1000_io_resume(struct pci_dev *pdev)
7209 {
7210         struct net_device *netdev = pci_get_drvdata(pdev);
7211         struct e1000_adapter *adapter = netdev_priv(netdev);
7212
7213         e1000_init_manageability_pt(adapter);
7214
7215         e1000e_pm_thaw(&pdev->dev);
7216
7217         /* If the controller has AMT, do not set DRV_LOAD until the interface
7218          * is up.  For all other cases, let the f/w know that the h/w is now
7219          * under the control of the driver.
7220          */
7221         if (!(adapter->flags & FLAG_HAS_AMT))
7222                 e1000e_get_hw_control(adapter);
7223 }
7224
7225 static void e1000_print_device_info(struct e1000_adapter *adapter)
7226 {
7227         struct e1000_hw *hw = &adapter->hw;
7228         struct net_device *netdev = adapter->netdev;
7229         u32 ret_val;
7230         u8 pba_str[E1000_PBANUM_LENGTH];
7231
7232         /* print bus type/speed/width info */
7233         e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7234                /* bus width */
7235                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7236                 "Width x1"),
7237                /* MAC address */
7238                netdev->dev_addr);
7239         e_info("Intel(R) PRO/%s Network Connection\n",
7240                (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7241         ret_val = e1000_read_pba_string_generic(hw, pba_str,
7242                                                 E1000_PBANUM_LENGTH);
7243         if (ret_val)
7244                 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
7245         e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7246                hw->mac.type, hw->phy.type, pba_str);
7247 }
7248
7249 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7250 {
7251         struct e1000_hw *hw = &adapter->hw;
7252         int ret_val;
7253         u16 buf = 0;
7254
7255         if (hw->mac.type != e1000_82573)
7256                 return;
7257
7258         ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7259         le16_to_cpus(&buf);
7260         if (!ret_val && (!(buf & BIT(0)))) {
7261                 /* Deep Smart Power Down (DSPD) */
7262                 dev_warn(&adapter->pdev->dev,
7263                          "Warning: detected DSPD enabled in EEPROM\n");
7264         }
7265 }
7266
7267 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7268                                             netdev_features_t features)
7269 {
7270         struct e1000_adapter *adapter = netdev_priv(netdev);
7271         struct e1000_hw *hw = &adapter->hw;
7272
7273         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7274         if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7275                 features &= ~NETIF_F_RXFCS;
7276
7277         /* Since there is no support for separate Rx/Tx vlan accel
7278          * enable/disable make sure Tx flag is always in same state as Rx.
7279          */
7280         if (features & NETIF_F_HW_VLAN_CTAG_RX)
7281                 features |= NETIF_F_HW_VLAN_CTAG_TX;
7282         else
7283                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7284
7285         return features;
7286 }
7287
7288 static int e1000_set_features(struct net_device *netdev,
7289                               netdev_features_t features)
7290 {
7291         struct e1000_adapter *adapter = netdev_priv(netdev);
7292         netdev_features_t changed = features ^ netdev->features;
7293
7294         if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7295                 adapter->flags |= FLAG_TSO_FORCE;
7296
7297         if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7298                          NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7299                          NETIF_F_RXALL)))
7300                 return 0;
7301
7302         if (changed & NETIF_F_RXFCS) {
7303                 if (features & NETIF_F_RXFCS) {
7304                         adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7305                 } else {
7306                         /* We need to take it back to defaults, which might mean
7307                          * stripping is still disabled at the adapter level.
7308                          */
7309                         if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7310                                 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7311                         else
7312                                 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7313                 }
7314         }
7315
7316         netdev->features = features;
7317
7318         if (netif_running(netdev))
7319                 e1000e_reinit_locked(adapter);
7320         else
7321                 e1000e_reset(adapter);
7322
7323         return 1;
7324 }
7325
7326 static const struct net_device_ops e1000e_netdev_ops = {
7327         .ndo_open               = e1000e_open,
7328         .ndo_stop               = e1000e_close,
7329         .ndo_start_xmit         = e1000_xmit_frame,
7330         .ndo_get_stats64        = e1000e_get_stats64,
7331         .ndo_set_rx_mode        = e1000e_set_rx_mode,
7332         .ndo_set_mac_address    = e1000_set_mac,
7333         .ndo_change_mtu         = e1000_change_mtu,
7334         .ndo_do_ioctl           = e1000_ioctl,
7335         .ndo_tx_timeout         = e1000_tx_timeout,
7336         .ndo_validate_addr      = eth_validate_addr,
7337
7338         .ndo_vlan_rx_add_vid    = e1000_vlan_rx_add_vid,
7339         .ndo_vlan_rx_kill_vid   = e1000_vlan_rx_kill_vid,
7340 #ifdef CONFIG_NET_POLL_CONTROLLER
7341         .ndo_poll_controller    = e1000_netpoll,
7342 #endif
7343         .ndo_set_features = e1000_set_features,
7344         .ndo_fix_features = e1000_fix_features,
7345         .ndo_features_check     = passthru_features_check,
7346 };
7347
7348 /**
7349  * e1000_probe - Device Initialization Routine
7350  * @pdev: PCI device information struct
7351  * @ent: entry in e1000_pci_tbl
7352  *
7353  * Returns 0 on success, negative on failure
7354  *
7355  * e1000_probe initializes an adapter identified by a pci_dev structure.
7356  * The OS initialization, configuring of the adapter private structure,
7357  * and a hardware reset occur.
7358  **/
7359 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7360 {
7361         struct net_device *netdev;
7362         struct e1000_adapter *adapter;
7363         struct e1000_hw *hw;
7364         const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7365         resource_size_t mmio_start, mmio_len;
7366         resource_size_t flash_start, flash_len;
7367         static int cards_found;
7368         u16 aspm_disable_flag = 0;
7369         int bars, i, err, pci_using_dac;
7370         u16 eeprom_data = 0;
7371         u16 eeprom_apme_mask = E1000_EEPROM_APME;
7372         s32 ret_val = 0;
7373
7374         if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7375                 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7376         if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7377                 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7378         if (aspm_disable_flag)
7379                 e1000e_disable_aspm(pdev, aspm_disable_flag);
7380
7381         err = pci_enable_device_mem(pdev);
7382         if (err)
7383                 return err;
7384
7385         pci_using_dac = 0;
7386         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7387         if (!err) {
7388                 pci_using_dac = 1;
7389         } else {
7390                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7391                 if (err) {
7392                         dev_err(&pdev->dev,
7393                                 "No usable DMA configuration, aborting\n");
7394                         goto err_dma;
7395                 }
7396         }
7397
7398         bars = pci_select_bars(pdev, IORESOURCE_MEM);
7399         err = pci_request_selected_regions_exclusive(pdev, bars,
7400                                                      e1000e_driver_name);
7401         if (err)
7402                 goto err_pci_reg;
7403
7404         /* AER (Advanced Error Reporting) hooks */
7405         pci_enable_pcie_error_reporting(pdev);
7406
7407         pci_set_master(pdev);
7408         /* PCI config space info */
7409         err = pci_save_state(pdev);
7410         if (err)
7411                 goto err_alloc_etherdev;
7412
7413         err = -ENOMEM;
7414         netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7415         if (!netdev)
7416                 goto err_alloc_etherdev;
7417
7418         SET_NETDEV_DEV(netdev, &pdev->dev);
7419
7420         netdev->irq = pdev->irq;
7421
7422         pci_set_drvdata(pdev, netdev);
7423         adapter = netdev_priv(netdev);
7424         hw = &adapter->hw;
7425         adapter->netdev = netdev;
7426         adapter->pdev = pdev;
7427         adapter->ei = ei;
7428         adapter->pba = ei->pba;
7429         adapter->flags = ei->flags;
7430         adapter->flags2 = ei->flags2;
7431         adapter->hw.adapter = adapter;
7432         adapter->hw.mac.type = ei->mac;
7433         adapter->max_hw_frame_size = ei->max_hw_frame_size;
7434         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7435
7436         mmio_start = pci_resource_start(pdev, 0);
7437         mmio_len = pci_resource_len(pdev, 0);
7438
7439         err = -EIO;
7440         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7441         if (!adapter->hw.hw_addr)
7442                 goto err_ioremap;
7443
7444         if ((adapter->flags & FLAG_HAS_FLASH) &&
7445             (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7446             (hw->mac.type < e1000_pch_spt)) {
7447                 flash_start = pci_resource_start(pdev, 1);
7448                 flash_len = pci_resource_len(pdev, 1);
7449                 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7450                 if (!adapter->hw.flash_address)
7451                         goto err_flashmap;
7452         }
7453
7454         /* Set default EEE advertisement */
7455         if (adapter->flags2 & FLAG2_HAS_EEE)
7456                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7457
7458         /* construct the net_device struct */
7459         netdev->netdev_ops = &e1000e_netdev_ops;
7460         e1000e_set_ethtool_ops(netdev);
7461         netdev->watchdog_timeo = 5 * HZ;
7462         netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7463         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7464
7465         netdev->mem_start = mmio_start;
7466         netdev->mem_end = mmio_start + mmio_len;
7467
7468         adapter->bd_number = cards_found++;
7469
7470         e1000e_check_options(adapter);
7471
7472         /* setup adapter struct */
7473         err = e1000_sw_init(adapter);
7474         if (err)
7475                 goto err_sw_init;
7476
7477         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7478         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7479         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7480
7481         err = ei->get_variants(adapter);
7482         if (err)
7483                 goto err_hw_init;
7484
7485         if ((adapter->flags & FLAG_IS_ICH) &&
7486             (adapter->flags & FLAG_READ_ONLY_NVM) &&
7487             (hw->mac.type < e1000_pch_spt))
7488                 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7489
7490         hw->mac.ops.get_bus_info(&adapter->hw);
7491
7492         adapter->hw.phy.autoneg_wait_to_complete = 0;
7493
7494         /* Copper options */
7495         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7496                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7497                 adapter->hw.phy.disable_polarity_correction = 0;
7498                 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7499         }
7500
7501         if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7502                 dev_info(&pdev->dev,
7503                          "PHY reset is blocked due to SOL/IDER session.\n");
7504
7505         /* Set initial default active device features */
7506         netdev->features = (NETIF_F_SG |
7507                             NETIF_F_HW_VLAN_CTAG_RX |
7508                             NETIF_F_HW_VLAN_CTAG_TX |
7509                             NETIF_F_TSO |
7510                             NETIF_F_TSO6 |
7511                             NETIF_F_RXHASH |
7512                             NETIF_F_RXCSUM |
7513                             NETIF_F_HW_CSUM);
7514
7515         /* Set user-changeable features (subset of all device features) */
7516         netdev->hw_features = netdev->features;
7517         netdev->hw_features |= NETIF_F_RXFCS;
7518         netdev->priv_flags |= IFF_SUPP_NOFCS;
7519         netdev->hw_features |= NETIF_F_RXALL;
7520
7521         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7522                 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7523
7524         netdev->vlan_features |= (NETIF_F_SG |
7525                                   NETIF_F_TSO |
7526                                   NETIF_F_TSO6 |
7527                                   NETIF_F_HW_CSUM);
7528
7529         netdev->priv_flags |= IFF_UNICAST_FLT;
7530
7531         if (pci_using_dac) {
7532                 netdev->features |= NETIF_F_HIGHDMA;
7533                 netdev->vlan_features |= NETIF_F_HIGHDMA;
7534         }
7535
7536         /* MTU range: 68 - max_hw_frame_size */
7537         netdev->min_mtu = ETH_MIN_MTU;
7538         netdev->max_mtu = adapter->max_hw_frame_size -
7539                           (VLAN_ETH_HLEN + ETH_FCS_LEN);
7540
7541         if (e1000e_enable_mng_pass_thru(&adapter->hw))
7542                 adapter->flags |= FLAG_MNG_PT_ENABLED;
7543
7544         /* before reading the NVM, reset the controller to
7545          * put the device in a known good starting state
7546          */
7547         adapter->hw.mac.ops.reset_hw(&adapter->hw);
7548
7549         /* systems with ASPM and others may see the checksum fail on the first
7550          * attempt. Let's give it a few tries
7551          */
7552         for (i = 0;; i++) {
7553                 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7554                         break;
7555                 if (i == 2) {
7556                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7557                         err = -EIO;
7558                         goto err_eeprom;
7559                 }
7560         }
7561
7562         e1000_eeprom_checks(adapter);
7563
7564         /* copy the MAC address */
7565         if (e1000e_read_mac_addr(&adapter->hw))
7566                 dev_err(&pdev->dev,
7567                         "NVM Read Error while reading MAC address\n");
7568
7569         memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7570
7571         if (!is_valid_ether_addr(netdev->dev_addr)) {
7572                 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7573                         netdev->dev_addr);
7574                 err = -EIO;
7575                 goto err_eeprom;
7576         }
7577
7578         timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7579         timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7580
7581         INIT_WORK(&adapter->reset_task, e1000_reset_task);
7582         INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7583         INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7584         INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7585         INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7586
7587         /* Initialize link parameters. User can change them with ethtool */
7588         adapter->hw.mac.autoneg = 1;
7589         adapter->fc_autoneg = true;
7590         adapter->hw.fc.requested_mode = e1000_fc_default;
7591         adapter->hw.fc.current_mode = e1000_fc_default;
7592         adapter->hw.phy.autoneg_advertised = 0x2f;
7593
7594         /* Initial Wake on LAN setting - If APM wake is enabled in
7595          * the EEPROM, enable the ACPI Magic Packet filter
7596          */
7597         if (adapter->flags & FLAG_APME_IN_WUC) {
7598                 /* APME bit in EEPROM is mapped to WUC.APME */
7599                 eeprom_data = er32(WUC);
7600                 eeprom_apme_mask = E1000_WUC_APME;
7601                 if ((hw->mac.type > e1000_ich10lan) &&
7602                     (eeprom_data & E1000_WUC_PHY_WAKE))
7603                         adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7604         } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7605                 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7606                     (adapter->hw.bus.func == 1))
7607                         ret_val = e1000_read_nvm(&adapter->hw,
7608                                               NVM_INIT_CONTROL3_PORT_B,
7609                                               1, &eeprom_data);
7610                 else
7611                         ret_val = e1000_read_nvm(&adapter->hw,
7612                                               NVM_INIT_CONTROL3_PORT_A,
7613                                               1, &eeprom_data);
7614         }
7615
7616         /* fetch WoL from EEPROM */
7617         if (ret_val)
7618                 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7619         else if (eeprom_data & eeprom_apme_mask)
7620                 adapter->eeprom_wol |= E1000_WUFC_MAG;
7621
7622         /* now that we have the eeprom settings, apply the special cases
7623          * where the eeprom may be wrong or the board simply won't support
7624          * wake on lan on a particular port
7625          */
7626         if (!(adapter->flags & FLAG_HAS_WOL))
7627                 adapter->eeprom_wol = 0;
7628
7629         /* initialize the wol settings based on the eeprom settings */
7630         adapter->wol = adapter->eeprom_wol;
7631
7632         /* make sure adapter isn't asleep if manageability is enabled */
7633         if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7634             (hw->mac.ops.check_mng_mode(hw)))
7635                 device_wakeup_enable(&pdev->dev);
7636
7637         /* save off EEPROM version number */
7638         ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7639
7640         if (ret_val) {
7641                 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7642                 adapter->eeprom_vers = 0;
7643         }
7644
7645         /* init PTP hardware clock */
7646         e1000e_ptp_init(adapter);
7647
7648         /* reset the hardware with the new settings */
7649         e1000e_reset(adapter);
7650
7651         /* If the controller has AMT, do not set DRV_LOAD until the interface
7652          * is up.  For all other cases, let the f/w know that the h/w is now
7653          * under the control of the driver.
7654          */
7655         if (!(adapter->flags & FLAG_HAS_AMT))
7656                 e1000e_get_hw_control(adapter);
7657
7658         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7659         err = register_netdev(netdev);
7660         if (err)
7661                 goto err_register;
7662
7663         /* carrier off reporting is important to ethtool even BEFORE open */
7664         netif_carrier_off(netdev);
7665
7666         e1000_print_device_info(adapter);
7667
7668         dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
7669
7670         if (pci_dev_run_wake(pdev) && hw->mac.type < e1000_pch_cnp)
7671                 pm_runtime_put_noidle(&pdev->dev);
7672
7673         return 0;
7674
7675 err_register:
7676         if (!(adapter->flags & FLAG_HAS_AMT))
7677                 e1000e_release_hw_control(adapter);
7678 err_eeprom:
7679         if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7680                 e1000_phy_hw_reset(&adapter->hw);
7681 err_hw_init:
7682         kfree(adapter->tx_ring);
7683         kfree(adapter->rx_ring);
7684 err_sw_init:
7685         if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7686                 iounmap(adapter->hw.flash_address);
7687         e1000e_reset_interrupt_capability(adapter);
7688 err_flashmap:
7689         iounmap(adapter->hw.hw_addr);
7690 err_ioremap:
7691         free_netdev(netdev);
7692 err_alloc_etherdev:
7693         pci_release_mem_regions(pdev);
7694 err_pci_reg:
7695 err_dma:
7696         pci_disable_device(pdev);
7697         return err;
7698 }
7699
7700 /**
7701  * e1000_remove - Device Removal Routine
7702  * @pdev: PCI device information struct
7703  *
7704  * e1000_remove is called by the PCI subsystem to alert the driver
7705  * that it should release a PCI device.  The could be caused by a
7706  * Hot-Plug event, or because the driver is going to be removed from
7707  * memory.
7708  **/
7709 static void e1000_remove(struct pci_dev *pdev)
7710 {
7711         struct net_device *netdev = pci_get_drvdata(pdev);
7712         struct e1000_adapter *adapter = netdev_priv(netdev);
7713
7714         e1000e_ptp_remove(adapter);
7715
7716         /* The timers may be rescheduled, so explicitly disable them
7717          * from being rescheduled.
7718          */
7719         set_bit(__E1000_DOWN, &adapter->state);
7720         del_timer_sync(&adapter->watchdog_timer);
7721         del_timer_sync(&adapter->phy_info_timer);
7722
7723         cancel_work_sync(&adapter->reset_task);
7724         cancel_work_sync(&adapter->watchdog_task);
7725         cancel_work_sync(&adapter->downshift_task);
7726         cancel_work_sync(&adapter->update_phy_task);
7727         cancel_work_sync(&adapter->print_hang_task);
7728
7729         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7730                 cancel_work_sync(&adapter->tx_hwtstamp_work);
7731                 if (adapter->tx_hwtstamp_skb) {
7732                         dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7733                         adapter->tx_hwtstamp_skb = NULL;
7734                 }
7735         }
7736
7737         unregister_netdev(netdev);
7738
7739         if (pci_dev_run_wake(pdev))
7740                 pm_runtime_get_noresume(&pdev->dev);
7741
7742         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7743          * would have already happened in close and is redundant.
7744          */
7745         e1000e_release_hw_control(adapter);
7746
7747         e1000e_reset_interrupt_capability(adapter);
7748         kfree(adapter->tx_ring);
7749         kfree(adapter->rx_ring);
7750
7751         iounmap(adapter->hw.hw_addr);
7752         if ((adapter->hw.flash_address) &&
7753             (adapter->hw.mac.type < e1000_pch_spt))
7754                 iounmap(adapter->hw.flash_address);
7755         pci_release_mem_regions(pdev);
7756
7757         free_netdev(netdev);
7758
7759         /* AER disable */
7760         pci_disable_pcie_error_reporting(pdev);
7761
7762         pci_disable_device(pdev);
7763 }
7764
7765 /* PCI Error Recovery (ERS) */
7766 static const struct pci_error_handlers e1000_err_handler = {
7767         .error_detected = e1000_io_error_detected,
7768         .slot_reset = e1000_io_slot_reset,
7769         .resume = e1000_io_resume,
7770 };
7771
7772 static const struct pci_device_id e1000_pci_tbl[] = {
7773         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7774         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7775         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7776         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7777           board_82571 },
7778         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7779         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7780         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7781         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7782         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7783
7784         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7785         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7786         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7787         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7788
7789         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7790         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7791         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7792
7793         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7794         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7795         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7796
7797         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7798           board_80003es2lan },
7799         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7800           board_80003es2lan },
7801         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7802           board_80003es2lan },
7803         { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7804           board_80003es2lan },
7805
7806         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7807         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7808         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7809         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7810         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7811         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7812         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7813         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7814
7815         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7816         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7817         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7818         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7819         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7820         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7821         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7822         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7823         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7824
7825         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7826         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7827         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7828
7829         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7830         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7831         { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7832
7833         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7834         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7835         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7836         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7837
7838         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7839         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7840
7841         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7842         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7843         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7844         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7845         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7846         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7847         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7848         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7849         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7850         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7851         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7852         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7853         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7854         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7855         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7856         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7857         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7858         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7859         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7860         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7861         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7862         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7863         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7864         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7865         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7866         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7867         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7868         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7869         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7870         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7871         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7872         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_cnp },
7873         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_cnp },
7874         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_cnp },
7875         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_cnp },
7876         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_cnp },
7877         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_cnp },
7878         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_cnp },
7879         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_cnp },
7880         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_cnp },
7881         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_cnp },
7882         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_cnp },
7883         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_cnp },
7884         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_cnp },
7885         { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_cnp },
7886
7887         { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7888 };
7889 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7890
7891 static const struct dev_pm_ops e1000_pm_ops = {
7892 #ifdef CONFIG_PM_SLEEP
7893         .suspend        = e1000e_pm_suspend,
7894         .resume         = e1000e_pm_resume,
7895         .freeze         = e1000e_pm_freeze,
7896         .thaw           = e1000e_pm_thaw,
7897         .poweroff       = e1000e_pm_suspend,
7898         .restore        = e1000e_pm_resume,
7899 #endif
7900         SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7901                            e1000e_pm_runtime_idle)
7902 };
7903
7904 /* PCI Device API Driver */
7905 static struct pci_driver e1000_driver = {
7906         .name     = e1000e_driver_name,
7907         .id_table = e1000_pci_tbl,
7908         .probe    = e1000_probe,
7909         .remove   = e1000_remove,
7910         .driver   = {
7911                 .pm = &e1000_pm_ops,
7912         },
7913         .shutdown = e1000_shutdown,
7914         .err_handler = &e1000_err_handler
7915 };
7916
7917 /**
7918  * e1000_init_module - Driver Registration Routine
7919  *
7920  * e1000_init_module is the first routine called when the driver is
7921  * loaded. All it does is register with the PCI subsystem.
7922  **/
7923 static int __init e1000_init_module(void)
7924 {
7925         pr_info("Intel(R) PRO/1000 Network Driver\n");
7926         pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7927
7928         return pci_register_driver(&e1000_driver);
7929 }
7930 module_init(e1000_init_module);
7931
7932 /**
7933  * e1000_exit_module - Driver Exit Cleanup Routine
7934  *
7935  * e1000_exit_module is called just before the driver is removed
7936  * from memory.
7937  **/
7938 static void __exit e1000_exit_module(void)
7939 {
7940         pci_unregister_driver(&e1000_driver);
7941 }
7942 module_exit(e1000_exit_module);
7943
7944 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7945 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7946 MODULE_LICENSE("GPL v2");
7947
7948 /* netdev.c */