2 * Copyright (c) 2016~2017 Hisilicon Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include <linux/dma-mapping.h>
11 #include <linux/etherdevice.h>
12 #include <linux/interrupt.h>
13 #include <linux/if_vlan.h>
15 #include <linux/ipv6.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/skbuff.h>
19 #include <linux/sctp.h>
20 #include <linux/vermagic.h>
22 #include <net/vxlan.h>
25 #include "hns3_enet.h"
27 const char hns3_driver_name[] = "hns3";
28 const char hns3_driver_version[] = VERMAGIC_STRING;
29 static const char hns3_driver_string[] =
30 "Hisilicon Ethernet Network Driver for Hip08 Family";
31 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
32 static struct hnae3_client client;
34 /* hns3_pci_tbl - PCI Device ID Table
36 * Last entry must be all 0s
38 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
39 * Class, Class Mask, private data (not used) }
41 static const struct pci_device_id hns3_pci_tbl[] = {
42 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},
45 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},
46 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},
47 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},
48 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},
49 /* required last entry */
52 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
54 static irqreturn_t hns3_irq_handle(int irq, void *dev)
56 struct hns3_enet_tqp_vector *tqp_vector = dev;
58 napi_schedule(&tqp_vector->napi);
63 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
65 struct hns3_enet_tqp_vector *tqp_vectors;
68 for (i = 0; i < priv->vector_num; i++) {
69 tqp_vectors = &priv->tqp_vector[i];
71 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
74 /* release the irq resource */
75 free_irq(tqp_vectors->vector_irq, tqp_vectors);
76 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
80 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
82 struct hns3_enet_tqp_vector *tqp_vectors;
89 for (i = 0; i < priv->vector_num; i++) {
90 tqp_vectors = &priv->tqp_vector[i];
92 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
95 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
96 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
97 "%s-%s-%d", priv->netdev->name, "TxRx",
100 } else if (tqp_vectors->rx_group.ring) {
101 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
102 "%s-%s-%d", priv->netdev->name, "Rx",
104 } else if (tqp_vectors->tx_group.ring) {
105 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
106 "%s-%s-%d", priv->netdev->name, "Tx",
109 /* Skip this unused q_vector */
113 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
115 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
119 netdev_err(priv->netdev, "request irq(%d) fail\n",
120 tqp_vectors->vector_irq);
124 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
130 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
133 writel(mask_en, tqp_vector->mask_addr);
136 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
138 napi_enable(&tqp_vector->napi);
141 hns3_mask_vector_irq(tqp_vector, 1);
144 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
147 hns3_mask_vector_irq(tqp_vector, 0);
149 disable_irq(tqp_vector->vector_irq);
150 napi_disable(&tqp_vector->napi);
153 static void hns3_set_vector_coalesc_gl(struct hns3_enet_tqp_vector *tqp_vector,
156 /* this defines the configuration for GL (Interrupt Gap Limiter)
157 * GL defines inter interrupt gap.
158 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
160 writel(gl_value, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
161 writel(gl_value, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
162 writel(gl_value, tqp_vector->mask_addr + HNS3_VECTOR_GL2_OFFSET);
165 static void hns3_set_vector_coalesc_rl(struct hns3_enet_tqp_vector *tqp_vector,
168 /* this defines the configuration for RL (Interrupt Rate Limiter).
169 * Rl defines rate of interrupts i.e. number of interrupts-per-second
170 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
172 writel(rl_value, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
175 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector)
177 /* initialize the configuration for interrupt coalescing.
178 * 1. GL (Interrupt Gap Limiter)
179 * 2. RL (Interrupt Rate Limiter)
182 /* Default :enable interrupt coalesce */
183 tqp_vector->rx_group.int_gl = HNS3_INT_GL_50K;
184 tqp_vector->tx_group.int_gl = HNS3_INT_GL_50K;
185 hns3_set_vector_coalesc_gl(tqp_vector, HNS3_INT_GL_50K);
186 /* for now we are disabling Interrupt RL - we
187 * will re-enable later
189 hns3_set_vector_coalesc_rl(tqp_vector, 0);
190 tqp_vector->rx_group.flow_level = HNS3_FLOW_LOW;
191 tqp_vector->tx_group.flow_level = HNS3_FLOW_LOW;
194 static int hns3_nic_net_up(struct net_device *netdev)
196 struct hns3_nic_priv *priv = netdev_priv(netdev);
197 struct hnae3_handle *h = priv->ae_handle;
201 /* get irq resource for all vectors */
202 ret = hns3_nic_init_irq(priv);
204 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
208 /* enable the vectors */
209 for (i = 0; i < priv->vector_num; i++)
210 hns3_vector_enable(&priv->tqp_vector[i]);
212 /* start the ae_dev */
213 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
220 for (j = i - 1; j >= 0; j--)
221 hns3_vector_disable(&priv->tqp_vector[j]);
223 hns3_nic_uninit_irq(priv);
228 static int hns3_nic_net_open(struct net_device *netdev)
230 struct hns3_nic_priv *priv = netdev_priv(netdev);
231 struct hnae3_handle *h = priv->ae_handle;
234 netif_carrier_off(netdev);
236 ret = netif_set_real_num_tx_queues(netdev, h->kinfo.num_tqps);
239 "netif_set_real_num_tx_queues fail, ret=%d!\n",
244 ret = netif_set_real_num_rx_queues(netdev, h->kinfo.num_tqps);
247 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
251 ret = hns3_nic_net_up(netdev);
254 "hns net up fail, ret=%d!\n", ret);
261 static void hns3_nic_net_down(struct net_device *netdev)
263 struct hns3_nic_priv *priv = netdev_priv(netdev);
264 const struct hnae3_ae_ops *ops;
268 ops = priv->ae_handle->ae_algo->ops;
270 ops->stop(priv->ae_handle);
272 /* disable vectors */
273 for (i = 0; i < priv->vector_num; i++)
274 hns3_vector_disable(&priv->tqp_vector[i]);
276 /* free irq resources */
277 hns3_nic_uninit_irq(priv);
280 static int hns3_nic_net_stop(struct net_device *netdev)
282 netif_tx_stop_all_queues(netdev);
283 netif_carrier_off(netdev);
285 hns3_nic_net_down(netdev);
290 void hns3_set_multicast_list(struct net_device *netdev)
292 struct hns3_nic_priv *priv = netdev_priv(netdev);
293 struct hnae3_handle *h = priv->ae_handle;
294 struct netdev_hw_addr *ha = NULL;
296 if (h->ae_algo->ops->set_mc_addr) {
297 netdev_for_each_mc_addr(ha, netdev)
298 if (h->ae_algo->ops->set_mc_addr(h, ha->addr))
299 netdev_err(netdev, "set multicast fail\n");
303 static int hns3_nic_uc_sync(struct net_device *netdev,
304 const unsigned char *addr)
306 struct hns3_nic_priv *priv = netdev_priv(netdev);
307 struct hnae3_handle *h = priv->ae_handle;
309 if (h->ae_algo->ops->add_uc_addr)
310 return h->ae_algo->ops->add_uc_addr(h, addr);
315 static int hns3_nic_uc_unsync(struct net_device *netdev,
316 const unsigned char *addr)
318 struct hns3_nic_priv *priv = netdev_priv(netdev);
319 struct hnae3_handle *h = priv->ae_handle;
321 if (h->ae_algo->ops->rm_uc_addr)
322 return h->ae_algo->ops->rm_uc_addr(h, addr);
327 static int hns3_nic_mc_sync(struct net_device *netdev,
328 const unsigned char *addr)
330 struct hns3_nic_priv *priv = netdev_priv(netdev);
331 struct hnae3_handle *h = priv->ae_handle;
333 if (h->ae_algo->ops->add_mc_addr)
334 return h->ae_algo->ops->add_mc_addr(h, addr);
339 static int hns3_nic_mc_unsync(struct net_device *netdev,
340 const unsigned char *addr)
342 struct hns3_nic_priv *priv = netdev_priv(netdev);
343 struct hnae3_handle *h = priv->ae_handle;
345 if (h->ae_algo->ops->rm_mc_addr)
346 return h->ae_algo->ops->rm_mc_addr(h, addr);
351 void hns3_nic_set_rx_mode(struct net_device *netdev)
353 struct hns3_nic_priv *priv = netdev_priv(netdev);
354 struct hnae3_handle *h = priv->ae_handle;
356 if (h->ae_algo->ops->set_promisc_mode) {
357 if (netdev->flags & IFF_PROMISC)
358 h->ae_algo->ops->set_promisc_mode(h, 1);
360 h->ae_algo->ops->set_promisc_mode(h, 0);
362 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
363 netdev_err(netdev, "sync uc address fail\n");
364 if (netdev->flags & IFF_MULTICAST)
365 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
366 netdev_err(netdev, "sync mc address fail\n");
369 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
370 u16 *mss, u32 *type_cs_vlan_tso)
372 u32 l4_offset, hdr_len;
373 union l3_hdr_info l3;
374 union l4_hdr_info l4;
378 if (!skb_is_gso(skb))
381 ret = skb_cow_head(skb, 0);
385 l3.hdr = skb_network_header(skb);
386 l4.hdr = skb_transport_header(skb);
388 /* Software should clear the IPv4's checksum field when tso is
391 if (l3.v4->version == 4)
395 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
398 SKB_GSO_UDP_TUNNEL_CSUM)) {
399 if ((!(skb_shinfo(skb)->gso_type &
401 (skb_shinfo(skb)->gso_type &
402 SKB_GSO_UDP_TUNNEL_CSUM)) {
403 /* Software should clear the udp's checksum
404 * field when tso is needed.
408 /* reset l3&l4 pointers from outer to inner headers */
409 l3.hdr = skb_inner_network_header(skb);
410 l4.hdr = skb_inner_transport_header(skb);
412 /* Software should clear the IPv4's checksum field when
415 if (l3.v4->version == 4)
419 /* normal or tunnel packet*/
420 l4_offset = l4.hdr - skb->data;
421 hdr_len = (l4.tcp->doff * 4) + l4_offset;
423 /* remove payload length from inner pseudo checksum when tso*/
424 l4_paylen = skb->len - l4_offset;
425 csum_replace_by_diff(&l4.tcp->check,
426 (__force __wsum)htonl(l4_paylen));
428 /* find the txbd field values */
429 *paylen = skb->len - hdr_len;
430 hnae_set_bit(*type_cs_vlan_tso,
433 /* get MSS for TSO */
434 *mss = skb_shinfo(skb)->gso_size;
439 static void hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
447 unsigned char *l4_hdr;
448 unsigned char *exthdr;
452 /* find outer header point */
453 l3.hdr = skb_network_header(skb);
454 l4_hdr = skb_inner_transport_header(skb);
456 if (skb->protocol == htons(ETH_P_IPV6)) {
457 exthdr = l3.hdr + sizeof(*l3.v6);
458 l4_proto_tmp = l3.v6->nexthdr;
459 if (l4_hdr != exthdr)
460 ipv6_skip_exthdr(skb, exthdr - skb->data,
461 &l4_proto_tmp, &frag_off);
462 } else if (skb->protocol == htons(ETH_P_IP)) {
463 l4_proto_tmp = l3.v4->protocol;
466 *ol4_proto = l4_proto_tmp;
469 if (!skb->encapsulation) {
474 /* find inner header point */
475 l3.hdr = skb_inner_network_header(skb);
476 l4_hdr = skb_inner_transport_header(skb);
478 if (l3.v6->version == 6) {
479 exthdr = l3.hdr + sizeof(*l3.v6);
480 l4_proto_tmp = l3.v6->nexthdr;
481 if (l4_hdr != exthdr)
482 ipv6_skip_exthdr(skb, exthdr - skb->data,
483 &l4_proto_tmp, &frag_off);
484 } else if (l3.v4->version == 4) {
485 l4_proto_tmp = l3.v4->protocol;
488 *il4_proto = l4_proto_tmp;
491 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
492 u8 il4_proto, u32 *type_cs_vlan_tso,
493 u32 *ol_type_vlan_len_msec)
503 struct gre_base_hdr *gre;
506 unsigned char *l2_hdr;
507 u8 l4_proto = ol4_proto;
514 l3.hdr = skb_network_header(skb);
515 l4.hdr = skb_transport_header(skb);
517 /* compute L2 header size for normal packet, defined in 2 Bytes */
518 l2_len = l3.hdr - skb->data;
519 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
520 HNS3_TXD_L2LEN_S, l2_len >> 1);
523 if (skb->encapsulation) {
524 /* compute OL2 header size, defined in 2 Bytes */
526 hnae_set_field(*ol_type_vlan_len_msec,
528 HNS3_TXD_L2LEN_S, ol2_len >> 1);
530 /* compute OL3 header size, defined in 4 Bytes */
531 ol3_len = l4.hdr - l3.hdr;
532 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
533 HNS3_TXD_L3LEN_S, ol3_len >> 2);
535 /* MAC in UDP, MAC in GRE (0x6558)*/
536 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
537 /* switch MAC header ptr from outer to inner header.*/
538 l2_hdr = skb_inner_mac_header(skb);
540 /* compute OL4 header size, defined in 4 Bytes. */
541 ol4_len = l2_hdr - l4.hdr;
542 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
543 HNS3_TXD_L4LEN_S, ol4_len >> 2);
545 /* switch IP header ptr from outer to inner header */
546 l3.hdr = skb_inner_network_header(skb);
548 /* compute inner l2 header size, defined in 2 Bytes. */
549 l2_len = l3.hdr - l2_hdr;
550 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
551 HNS3_TXD_L2LEN_S, l2_len >> 1);
553 /* skb packet types not supported by hardware,
554 * txbd len fild doesn't be filled.
559 /* switch L4 header pointer from outer to inner */
560 l4.hdr = skb_inner_transport_header(skb);
562 l4_proto = il4_proto;
565 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
566 l3_len = l4.hdr - l3.hdr;
567 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
568 HNS3_TXD_L3LEN_S, l3_len >> 2);
570 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
573 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
574 HNS3_TXD_L4LEN_S, l4.tcp->doff);
577 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
578 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
581 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
582 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
585 /* skb packet types not supported by hardware,
586 * txbd len fild doesn't be filled.
592 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
593 u8 il4_proto, u32 *type_cs_vlan_tso,
594 u32 *ol_type_vlan_len_msec)
601 u32 l4_proto = ol4_proto;
603 l3.hdr = skb_network_header(skb);
605 /* define OL3 type and tunnel type(OL4).*/
606 if (skb->encapsulation) {
607 /* define outer network header type.*/
608 if (skb->protocol == htons(ETH_P_IP)) {
610 hnae_set_field(*ol_type_vlan_len_msec,
611 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
612 HNS3_OL3T_IPV4_CSUM);
614 hnae_set_field(*ol_type_vlan_len_msec,
615 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
616 HNS3_OL3T_IPV4_NO_CSUM);
618 } else if (skb->protocol == htons(ETH_P_IPV6)) {
619 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
620 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
623 /* define tunnel type(OL4).*/
626 hnae_set_field(*ol_type_vlan_len_msec,
629 HNS3_TUN_MAC_IN_UDP);
632 hnae_set_field(*ol_type_vlan_len_msec,
638 /* drop the skb tunnel packet if hardware don't support,
639 * because hardware can't calculate csum when TSO.
644 /* the stack computes the IP header already,
645 * driver calculate l4 checksum when not TSO.
647 skb_checksum_help(skb);
651 l3.hdr = skb_inner_network_header(skb);
652 l4_proto = il4_proto;
655 if (l3.v4->version == 4) {
656 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
657 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
659 /* the stack computes the IP header already, the only time we
660 * need the hardware to recompute it is in the case of TSO.
663 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
665 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
666 } else if (l3.v6->version == 6) {
667 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
668 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
669 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
674 hnae_set_field(*type_cs_vlan_tso,
680 hnae_set_field(*type_cs_vlan_tso,
686 hnae_set_field(*type_cs_vlan_tso,
692 /* drop the skb tunnel packet if hardware don't support,
693 * because hardware can't calculate csum when TSO.
698 /* the stack computes the IP header already,
699 * driver calculate l4 checksum when not TSO.
701 skb_checksum_help(skb);
708 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
710 /* Config bd buffer end */
711 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
712 HNS3_TXD_BDTYPE_M, 0);
713 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
714 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
715 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 1);
718 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
719 int size, dma_addr_t dma, int frag_end,
720 enum hns_desc_type type)
722 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
723 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
724 u32 ol_type_vlan_len_msec = 0;
725 u16 bdtp_fe_sc_vld_ra_ri = 0;
726 u32 type_cs_vlan_tso = 0;
735 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
736 desc_cb->priv = priv;
737 desc_cb->length = size;
739 desc_cb->type = type;
741 /* now, fill the descriptor */
742 desc->addr = cpu_to_le64(dma);
743 desc->tx.send_size = cpu_to_le16((u16)size);
744 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
745 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
747 if (type == DESC_TYPE_SKB) {
748 skb = (struct sk_buff *)priv;
749 paylen = cpu_to_le16(skb->len);
751 if (skb->ip_summed == CHECKSUM_PARTIAL) {
752 skb_reset_mac_len(skb);
753 protocol = skb->protocol;
756 if (protocol == htons(ETH_P_8021Q)) {
757 protocol = vlan_get_protocol(skb);
758 skb->protocol = protocol;
760 hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
761 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
763 &ol_type_vlan_len_msec);
764 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
766 &ol_type_vlan_len_msec);
770 ret = hns3_set_tso(skb, &paylen, &mss,
777 desc->tx.ol_type_vlan_len_msec =
778 cpu_to_le32(ol_type_vlan_len_msec);
779 desc->tx.type_cs_vlan_tso_len =
780 cpu_to_le32(type_cs_vlan_tso);
781 desc->tx.paylen = cpu_to_le16(paylen);
782 desc->tx.mss = cpu_to_le16(mss);
785 /* move ring pointer to next.*/
786 ring_ptr_move_fw(ring, next_to_use);
791 static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
792 int size, dma_addr_t dma, int frag_end,
793 enum hns_desc_type type)
795 unsigned int frag_buf_num;
800 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
801 sizeoflast = size % HNS3_MAX_BD_SIZE;
802 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
804 /* When the frag size is bigger than hardware, split this frag */
805 for (k = 0; k < frag_buf_num; k++) {
806 ret = hns3_fill_desc(ring, priv,
807 (k == frag_buf_num - 1) ?
808 sizeoflast : HNS3_MAX_BD_SIZE,
809 dma + HNS3_MAX_BD_SIZE * k,
810 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
811 (type == DESC_TYPE_SKB && !k) ?
812 DESC_TYPE_SKB : DESC_TYPE_PAGE);
820 static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
821 struct hns3_enet_ring *ring)
823 struct sk_buff *skb = *out_skb;
824 struct skb_frag_struct *frag;
831 size = skb_headlen(skb);
832 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
834 frag_num = skb_shinfo(skb)->nr_frags;
835 for (i = 0; i < frag_num; i++) {
836 frag = &skb_shinfo(skb)->frags[i];
837 size = skb_frag_size(frag);
839 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
840 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
843 buf_num += bdnum_for_frag;
846 if (buf_num > ring_space(ring))
853 static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
854 struct hns3_enet_ring *ring)
856 struct sk_buff *skb = *out_skb;
859 /* No. of segments (plus a header) */
860 buf_num = skb_shinfo(skb)->nr_frags + 1;
862 if (buf_num > ring_space(ring))
870 static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
872 struct device *dev = ring_to_dev(ring);
875 for (i = 0; i < ring->desc_num; i++) {
876 /* check if this is where we started */
877 if (ring->next_to_use == next_to_use_orig)
880 /* unmap the descriptor dma address */
881 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
882 dma_unmap_single(dev,
883 ring->desc_cb[ring->next_to_use].dma,
884 ring->desc_cb[ring->next_to_use].length,
888 ring->desc_cb[ring->next_to_use].dma,
889 ring->desc_cb[ring->next_to_use].length,
893 ring_ptr_move_bw(ring, next_to_use);
897 static netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb,
898 struct net_device *netdev)
900 struct hns3_nic_priv *priv = netdev_priv(netdev);
901 struct hns3_nic_ring_data *ring_data =
902 &tx_ring_data(priv, skb->queue_mapping);
903 struct hns3_enet_ring *ring = ring_data->ring;
904 struct device *dev = priv->dev;
905 struct netdev_queue *dev_queue;
906 struct skb_frag_struct *frag;
907 int next_to_use_head;
908 int next_to_use_frag;
916 /* Prefetch the data used later */
919 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
921 u64_stats_update_begin(&ring->syncp);
922 ring->stats.tx_busy++;
923 u64_stats_update_end(&ring->syncp);
925 goto out_net_tx_busy;
927 u64_stats_update_begin(&ring->syncp);
928 ring->stats.sw_err_cnt++;
929 u64_stats_update_end(&ring->syncp);
930 netdev_err(netdev, "no memory to xmit!\n");
937 /* No. of segments (plus a header) */
938 seg_num = skb_shinfo(skb)->nr_frags + 1;
939 /* Fill the first part */
940 size = skb_headlen(skb);
942 next_to_use_head = ring->next_to_use;
944 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
945 if (dma_mapping_error(dev, dma)) {
946 netdev_err(netdev, "TX head DMA map failed\n");
947 ring->stats.sw_err_cnt++;
951 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
954 goto head_dma_map_err;
956 next_to_use_frag = ring->next_to_use;
957 /* Fill the fragments */
958 for (i = 1; i < seg_num; i++) {
959 frag = &skb_shinfo(skb)->frags[i - 1];
960 size = skb_frag_size(frag);
961 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
962 if (dma_mapping_error(dev, dma)) {
963 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
964 ring->stats.sw_err_cnt++;
965 goto frag_dma_map_err;
967 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
968 seg_num - 1 == i ? 1 : 0,
972 goto frag_dma_map_err;
975 /* Complete translate all packets */
976 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
977 netdev_tx_sent_queue(dev_queue, skb->len);
979 wmb(); /* Commit all data before submit */
981 hnae_queue_xmit(ring->tqp, buf_num);
986 hns_nic_dma_unmap(ring, next_to_use_frag);
989 hns_nic_dma_unmap(ring, next_to_use_head);
992 dev_kfree_skb_any(skb);
996 netif_stop_subqueue(netdev, ring_data->queue_index);
997 smp_mb(); /* Commit all data before submit */
999 return NETDEV_TX_BUSY;
1002 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1004 struct hns3_nic_priv *priv = netdev_priv(netdev);
1005 struct hnae3_handle *h = priv->ae_handle;
1006 struct sockaddr *mac_addr = p;
1009 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1010 return -EADDRNOTAVAIL;
1012 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data);
1014 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1018 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1023 static int hns3_nic_set_features(struct net_device *netdev,
1024 netdev_features_t features)
1026 struct hns3_nic_priv *priv = netdev_priv(netdev);
1028 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1029 priv->ops.fill_desc = hns3_fill_desc_tso;
1030 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1032 priv->ops.fill_desc = hns3_fill_desc;
1033 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1036 netdev->features = features;
1041 hns3_nic_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
1043 struct hns3_nic_priv *priv = netdev_priv(netdev);
1044 int queue_num = priv->ae_handle->kinfo.num_tqps;
1045 struct hns3_enet_ring *ring;
1053 for (idx = 0; idx < queue_num; idx++) {
1054 /* fetch the tx stats */
1055 ring = priv->ring_data[idx].ring;
1057 start = u64_stats_fetch_begin_irq(&ring->syncp);
1058 tx_bytes += ring->stats.tx_bytes;
1059 tx_pkts += ring->stats.tx_pkts;
1060 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1062 /* fetch the rx stats */
1063 ring = priv->ring_data[idx + queue_num].ring;
1065 start = u64_stats_fetch_begin_irq(&ring->syncp);
1066 rx_bytes += ring->stats.rx_bytes;
1067 rx_pkts += ring->stats.rx_pkts;
1068 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1071 stats->tx_bytes = tx_bytes;
1072 stats->tx_packets = tx_pkts;
1073 stats->rx_bytes = rx_bytes;
1074 stats->rx_packets = rx_pkts;
1076 stats->rx_errors = netdev->stats.rx_errors;
1077 stats->multicast = netdev->stats.multicast;
1078 stats->rx_length_errors = netdev->stats.rx_length_errors;
1079 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1080 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1082 stats->tx_errors = netdev->stats.tx_errors;
1083 stats->rx_dropped = netdev->stats.rx_dropped;
1084 stats->tx_dropped = netdev->stats.tx_dropped;
1085 stats->collisions = netdev->stats.collisions;
1086 stats->rx_over_errors = netdev->stats.rx_over_errors;
1087 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1088 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1089 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1090 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1091 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1092 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1093 stats->tx_window_errors = netdev->stats.tx_window_errors;
1094 stats->rx_compressed = netdev->stats.rx_compressed;
1095 stats->tx_compressed = netdev->stats.tx_compressed;
1098 static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1099 enum hns3_udp_tnl_type type)
1101 struct hns3_nic_priv *priv = netdev_priv(netdev);
1102 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1103 struct hnae3_handle *h = priv->ae_handle;
1105 if (udp_tnl->used && udp_tnl->dst_port == port) {
1110 if (udp_tnl->used) {
1112 "UDP tunnel [%d], port [%d] offload\n", type, port);
1116 udp_tnl->dst_port = port;
1118 /* TBD send command to hardware to add port */
1119 if (h->ae_algo->ops->add_tunnel_udp)
1120 h->ae_algo->ops->add_tunnel_udp(h, port);
1123 static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1124 enum hns3_udp_tnl_type type)
1126 struct hns3_nic_priv *priv = netdev_priv(netdev);
1127 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1128 struct hnae3_handle *h = priv->ae_handle;
1130 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1132 "Invalid UDP tunnel port %d\n", port);
1140 udp_tnl->dst_port = 0;
1141 /* TBD send command to hardware to del port */
1142 if (h->ae_algo->ops->del_tunnel_udp)
1143 h->ae_algo->ops->del_tunnel_udp(h, port);
1146 /* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1147 * @netdev: This physical ports's netdev
1148 * @ti: Tunnel information
1150 static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1151 struct udp_tunnel_info *ti)
1153 u16 port_n = ntohs(ti->port);
1156 case UDP_TUNNEL_TYPE_VXLAN:
1157 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1159 case UDP_TUNNEL_TYPE_GENEVE:
1160 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1163 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1168 static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1169 struct udp_tunnel_info *ti)
1171 u16 port_n = ntohs(ti->port);
1174 case UDP_TUNNEL_TYPE_VXLAN:
1175 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1177 case UDP_TUNNEL_TYPE_GENEVE:
1178 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1185 static int hns3_setup_tc(struct net_device *netdev, u8 tc)
1187 struct hns3_nic_priv *priv = netdev_priv(netdev);
1188 struct hnae3_handle *h = priv->ae_handle;
1189 struct hnae3_knic_private_info *kinfo = &h->kinfo;
1193 if (tc > HNAE3_MAX_TC)
1196 if (kinfo->num_tc == tc)
1203 netdev_reset_tc(netdev);
1207 /* Set num_tc for netdev */
1208 ret = netdev_set_num_tc(netdev, tc);
1212 /* Set per TC queues for the VSI */
1213 for (i = 0; i < HNAE3_MAX_TC; i++) {
1214 if (kinfo->tc_info[i].enable)
1215 netdev_set_tc_queue(netdev,
1216 kinfo->tc_info[i].tc,
1217 kinfo->tc_info[i].tqp_count,
1218 kinfo->tc_info[i].tqp_offset);
1224 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1227 struct tc_mqprio_qopt *mqprio = type_data;
1229 if (type != TC_SETUP_MQPRIO)
1232 return hns3_setup_tc(dev, mqprio->num_tc);
1235 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1236 __be16 proto, u16 vid)
1238 struct hns3_nic_priv *priv = netdev_priv(netdev);
1239 struct hnae3_handle *h = priv->ae_handle;
1242 if (h->ae_algo->ops->set_vlan_filter)
1243 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1248 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1249 __be16 proto, u16 vid)
1251 struct hns3_nic_priv *priv = netdev_priv(netdev);
1252 struct hnae3_handle *h = priv->ae_handle;
1255 if (h->ae_algo->ops->set_vlan_filter)
1256 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1261 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1262 u8 qos, __be16 vlan_proto)
1264 struct hns3_nic_priv *priv = netdev_priv(netdev);
1265 struct hnae3_handle *h = priv->ae_handle;
1268 if (h->ae_algo->ops->set_vf_vlan_filter)
1269 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1275 static const struct net_device_ops hns3_nic_netdev_ops = {
1276 .ndo_open = hns3_nic_net_open,
1277 .ndo_stop = hns3_nic_net_stop,
1278 .ndo_start_xmit = hns3_nic_net_xmit,
1279 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
1280 .ndo_set_features = hns3_nic_set_features,
1281 .ndo_get_stats64 = hns3_nic_get_stats64,
1282 .ndo_setup_tc = hns3_nic_setup_tc,
1283 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1284 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1285 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1286 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1287 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1288 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1291 /* hns3_probe - Device initialization routine
1292 * @pdev: PCI device information struct
1293 * @ent: entry in hns3_pci_tbl
1295 * hns3_probe initializes a PF identified by a pci_dev structure.
1296 * The OS initialization, configuring of the PF private structure,
1297 * and a hardware reset occur.
1299 * Returns 0 on success, negative on failure
1301 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1303 struct hnae3_ae_dev *ae_dev;
1306 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1313 ae_dev->pdev = pdev;
1314 ae_dev->dev_type = HNAE3_DEV_KNIC;
1315 pci_set_drvdata(pdev, ae_dev);
1317 return hnae3_register_ae_dev(ae_dev);
1320 /* hns3_remove - Device removal routine
1321 * @pdev: PCI device information struct
1323 static void hns3_remove(struct pci_dev *pdev)
1325 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1327 hnae3_unregister_ae_dev(ae_dev);
1329 devm_kfree(&pdev->dev, ae_dev);
1331 pci_set_drvdata(pdev, NULL);
1334 static struct pci_driver hns3_driver = {
1335 .name = hns3_driver_name,
1336 .id_table = hns3_pci_tbl,
1337 .probe = hns3_probe,
1338 .remove = hns3_remove,
1341 /* set default feature to hns3 */
1342 static void hns3_set_default_feature(struct net_device *netdev)
1344 netdev->priv_flags |= IFF_UNICAST_FLT;
1346 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1347 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1348 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1349 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1350 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1352 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1354 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1356 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1357 NETIF_F_HW_VLAN_CTAG_FILTER |
1358 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1359 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1360 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1361 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1363 netdev->vlan_features |=
1364 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1365 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1366 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1367 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1368 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1370 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1371 NETIF_F_HW_VLAN_CTAG_FILTER |
1372 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1373 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1374 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1375 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1378 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1379 struct hns3_desc_cb *cb)
1381 unsigned int order = hnae_page_order(ring);
1384 p = dev_alloc_pages(order);
1389 cb->page_offset = 0;
1391 cb->buf = page_address(p);
1392 cb->length = hnae_page_size(ring);
1393 cb->type = DESC_TYPE_PAGE;
1395 memset(cb->buf, 0, cb->length);
1400 static void hns3_free_buffer(struct hns3_enet_ring *ring,
1401 struct hns3_desc_cb *cb)
1403 if (cb->type == DESC_TYPE_SKB)
1404 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1405 else if (!HNAE3_IS_TX_RING(ring))
1406 put_page((struct page *)cb->priv);
1407 memset(cb, 0, sizeof(*cb));
1410 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1412 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1413 cb->length, ring_to_dma_dir(ring));
1415 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1421 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1422 struct hns3_desc_cb *cb)
1424 if (cb->type == DESC_TYPE_SKB)
1425 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1426 ring_to_dma_dir(ring));
1428 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1429 ring_to_dma_dir(ring));
1432 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1434 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1435 ring->desc[i].addr = 0;
1438 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1440 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1442 if (!ring->desc_cb[i].dma)
1445 hns3_buffer_detach(ring, i);
1446 hns3_free_buffer(ring, cb);
1449 static void hns3_free_buffers(struct hns3_enet_ring *ring)
1453 for (i = 0; i < ring->desc_num; i++)
1454 hns3_free_buffer_detach(ring, i);
1457 /* free desc along with its attached buffer */
1458 static void hns3_free_desc(struct hns3_enet_ring *ring)
1460 hns3_free_buffers(ring);
1462 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1463 ring->desc_num * sizeof(ring->desc[0]),
1465 ring->desc_dma_addr = 0;
1470 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1472 int size = ring->desc_num * sizeof(ring->desc[0]);
1474 ring->desc = kzalloc(size, GFP_KERNEL);
1478 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1479 size, DMA_BIDIRECTIONAL);
1480 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1481 ring->desc_dma_addr = 0;
1490 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1491 struct hns3_desc_cb *cb)
1495 ret = hns3_alloc_buffer(ring, cb);
1499 ret = hns3_map_buffer(ring, cb);
1506 hns3_free_buffers(ring);
1511 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1513 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1518 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1523 /* Allocate memory for raw pkg, and map with dma */
1524 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1528 for (i = 0; i < ring->desc_num; i++) {
1529 ret = hns3_alloc_buffer_attach(ring, i);
1531 goto out_buffer_fail;
1537 for (j = i - 1; j >= 0; j--)
1538 hns3_free_buffer_detach(ring, j);
1542 /* detach a in-used buffer and replace with a reserved one */
1543 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1544 struct hns3_desc_cb *res_cb)
1546 hns3_map_buffer(ring, &ring->desc_cb[i]);
1547 ring->desc_cb[i] = *res_cb;
1548 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1551 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1553 ring->desc_cb[i].reuse_flag = 0;
1554 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1555 + ring->desc_cb[i].page_offset);
1558 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1561 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1563 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1564 (*bytes) += desc_cb->length;
1565 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1566 hns3_free_buffer_detach(ring, ring->next_to_clean);
1568 ring_ptr_move_fw(ring, next_to_clean);
1571 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1573 int u = ring->next_to_use;
1574 int c = ring->next_to_clean;
1576 if (unlikely(h > ring->desc_num))
1579 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1582 int hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
1584 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1585 struct netdev_queue *dev_queue;
1589 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1590 rmb(); /* Make sure head is ready before touch any data */
1592 if (is_ring_empty(ring) || head == ring->next_to_clean)
1593 return 0; /* no data to poll */
1595 if (!is_valid_clean_head(ring, head)) {
1596 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1597 ring->next_to_use, ring->next_to_clean);
1599 u64_stats_update_begin(&ring->syncp);
1600 ring->stats.io_err_cnt++;
1601 u64_stats_update_end(&ring->syncp);
1607 while (head != ring->next_to_clean && budget) {
1608 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1609 /* Issue prefetch for next Tx descriptor */
1610 prefetch(&ring->desc_cb[ring->next_to_clean]);
1614 ring->tqp_vector->tx_group.total_bytes += bytes;
1615 ring->tqp_vector->tx_group.total_packets += pkts;
1617 u64_stats_update_begin(&ring->syncp);
1618 ring->stats.tx_bytes += bytes;
1619 ring->stats.tx_pkts += pkts;
1620 u64_stats_update_end(&ring->syncp);
1622 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1623 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1625 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1626 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1627 /* Make sure that anybody stopping the queue after this
1628 * sees the new next_to_clean.
1631 if (netif_tx_queue_stopped(dev_queue)) {
1632 netif_tx_wake_queue(dev_queue);
1633 ring->stats.restart_queue++;
1640 static int hns3_desc_unused(struct hns3_enet_ring *ring)
1642 int ntc = ring->next_to_clean;
1643 int ntu = ring->next_to_use;
1645 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1649 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1651 struct hns3_desc_cb *desc_cb;
1652 struct hns3_desc_cb res_cbs;
1655 for (i = 0; i < cleand_count; i++) {
1656 desc_cb = &ring->desc_cb[ring->next_to_use];
1657 if (desc_cb->reuse_flag) {
1658 u64_stats_update_begin(&ring->syncp);
1659 ring->stats.reuse_pg_cnt++;
1660 u64_stats_update_end(&ring->syncp);
1662 hns3_reuse_buffer(ring, ring->next_to_use);
1664 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1666 u64_stats_update_begin(&ring->syncp);
1667 ring->stats.sw_err_cnt++;
1668 u64_stats_update_end(&ring->syncp);
1670 netdev_err(ring->tqp->handle->kinfo.netdev,
1671 "hnae reserve buffer map failed.\n");
1674 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1677 ring_ptr_move_fw(ring, next_to_use);
1680 wmb(); /* Make all data has been write before submit */
1681 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1684 /* hns3_nic_get_headlen - determine size of header for LRO/GRO
1685 * @data: pointer to the start of the headers
1686 * @max: total length of section to find headers in
1688 * This function is meant to determine the length of headers that will
1689 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1690 * motivation of doing this is to only perform one pull for IPv4 TCP
1691 * packets so that we can do basic things like calculating the gso_size
1692 * based on the average data per packet.
1694 static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
1695 unsigned int max_size)
1697 unsigned char *network;
1700 /* This should never happen, but better safe than sorry */
1701 if (max_size < ETH_HLEN)
1704 /* Initialize network frame pointer */
1707 /* Set first protocol and move network header forward */
1708 network += ETH_HLEN;
1710 /* Handle any vlan tag if present */
1711 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
1712 == HNS3_RX_FLAG_VLAN_PRESENT) {
1713 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
1716 network += VLAN_HLEN;
1719 /* Handle L3 protocols */
1720 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
1721 == HNS3_RX_FLAG_L3ID_IPV4) {
1722 if ((typeof(max_size))(network - data) >
1723 (max_size - sizeof(struct iphdr)))
1726 /* Access ihl as a u8 to avoid unaligned access on ia64 */
1727 hlen = (network[0] & 0x0F) << 2;
1729 /* Verify hlen meets minimum size requirements */
1730 if (hlen < sizeof(struct iphdr))
1731 return network - data;
1733 /* Record next protocol if header is present */
1734 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
1735 == HNS3_RX_FLAG_L3ID_IPV6) {
1736 if ((typeof(max_size))(network - data) >
1737 (max_size - sizeof(struct ipv6hdr)))
1740 /* Record next protocol */
1741 hlen = sizeof(struct ipv6hdr);
1743 return network - data;
1746 /* Relocate pointer to start of L4 header */
1749 /* Finally sort out TCP/UDP */
1750 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
1751 == HNS3_RX_FLAG_L4ID_TCP) {
1752 if ((typeof(max_size))(network - data) >
1753 (max_size - sizeof(struct tcphdr)))
1756 /* Access doff as a u8 to avoid unaligned access on ia64 */
1757 hlen = (network[12] & 0xF0) >> 2;
1759 /* Verify hlen meets minimum size requirements */
1760 if (hlen < sizeof(struct tcphdr))
1761 return network - data;
1764 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
1765 == HNS3_RX_FLAG_L4ID_UDP) {
1766 if ((typeof(max_size))(network - data) >
1767 (max_size - sizeof(struct udphdr)))
1770 network += sizeof(struct udphdr);
1773 /* If everything has gone correctly network should be the
1774 * data section of the packet and will be the end of the header.
1775 * If not then it probably represents the end of the last recognized
1778 if ((typeof(max_size))(network - data) < max_size)
1779 return network - data;
1784 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
1785 struct hns3_enet_ring *ring, int pull_len,
1786 struct hns3_desc_cb *desc_cb)
1788 struct hns3_desc *desc;
1793 twobufs = ((PAGE_SIZE < 8192) &&
1794 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
1796 desc = &ring->desc[ring->next_to_clean];
1797 size = le16_to_cpu(desc->rx.size);
1800 truesize = hnae_buf_size(ring);
1802 truesize = ALIGN(size, L1_CACHE_BYTES);
1803 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
1806 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
1807 size - pull_len, truesize - pull_len);
1809 /* Avoid re-using remote pages,flag default unreuse */
1810 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
1814 /* If we are only owner of page we can reuse it */
1815 if (likely(page_count(desc_cb->priv) == 1)) {
1816 /* Flip page offset to other buffer */
1817 desc_cb->page_offset ^= truesize;
1819 desc_cb->reuse_flag = 1;
1820 /* bump ref count on page before it is given*/
1821 get_page(desc_cb->priv);
1826 /* Move offset up to the next cache line */
1827 desc_cb->page_offset += truesize;
1829 if (desc_cb->page_offset <= last_offset) {
1830 desc_cb->reuse_flag = 1;
1831 /* Bump ref count on page before it is given*/
1832 get_page(desc_cb->priv);
1836 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
1837 struct hns3_desc *desc)
1839 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1840 int l3_type, l4_type;
1845 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
1846 l234info = le32_to_cpu(desc->rx.l234_info);
1848 skb->ip_summed = CHECKSUM_NONE;
1850 skb_checksum_none_assert(skb);
1852 if (!(netdev->features & NETIF_F_RXCSUM))
1855 /* check if hardware has done checksum */
1856 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
1859 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
1860 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
1861 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
1862 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
1863 netdev_err(netdev, "L3/L4 error pkt\n");
1864 u64_stats_update_begin(&ring->syncp);
1865 ring->stats.l3l4_csum_err++;
1866 u64_stats_update_end(&ring->syncp);
1871 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
1873 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
1876 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
1878 case HNS3_OL4_TYPE_MAC_IN_UDP:
1879 case HNS3_OL4_TYPE_NVGRE:
1880 skb->csum_level = 1;
1881 case HNS3_OL4_TYPE_NO_TUN:
1882 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
1883 if (l3_type == HNS3_L3_TYPE_IPV4 ||
1884 (l3_type == HNS3_L3_TYPE_IPV6 &&
1885 (l4_type == HNS3_L4_TYPE_UDP ||
1886 l4_type == HNS3_L4_TYPE_TCP ||
1887 l4_type == HNS3_L4_TYPE_SCTP)))
1888 skb->ip_summed = CHECKSUM_UNNECESSARY;
1893 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
1894 struct sk_buff **out_skb, int *out_bnum)
1896 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1897 struct hns3_desc_cb *desc_cb;
1898 struct hns3_desc *desc;
1899 struct sk_buff *skb;
1907 desc = &ring->desc[ring->next_to_clean];
1908 desc_cb = &ring->desc_cb[ring->next_to_clean];
1912 length = le16_to_cpu(desc->rx.pkt_len);
1913 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
1914 l234info = le32_to_cpu(desc->rx.l234_info);
1916 /* Check valid BD */
1917 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
1920 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
1922 /* Prefetch first cache line of first page
1923 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
1924 * line size is 64B so need to prefetch twice to make it 128B. But in
1925 * actual we can have greater size of caches with 128B Level 1 cache
1926 * lines. In such a case, single fetch would suffice to cache in the
1927 * relevant part of the header.
1930 #if L1_CACHE_BYTES < 128
1931 prefetch(va + L1_CACHE_BYTES);
1934 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
1936 if (unlikely(!skb)) {
1937 netdev_err(netdev, "alloc rx skb fail\n");
1939 u64_stats_update_begin(&ring->syncp);
1940 ring->stats.sw_err_cnt++;
1941 u64_stats_update_end(&ring->syncp);
1946 prefetchw(skb->data);
1949 if (length <= HNS3_RX_HEAD_SIZE) {
1950 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
1952 /* We can reuse buffer as-is, just make sure it is local */
1953 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
1954 desc_cb->reuse_flag = 1;
1955 else /* This page cannot be reused so discard it */
1956 put_page(desc_cb->priv);
1958 ring_ptr_move_fw(ring, next_to_clean);
1960 u64_stats_update_begin(&ring->syncp);
1961 ring->stats.seg_pkt_cnt++;
1962 u64_stats_update_end(&ring->syncp);
1964 pull_len = hns3_nic_get_headlen(va, l234info,
1966 memcpy(__skb_put(skb, pull_len), va,
1967 ALIGN(pull_len, sizeof(long)));
1969 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
1970 ring_ptr_move_fw(ring, next_to_clean);
1972 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
1973 desc = &ring->desc[ring->next_to_clean];
1974 desc_cb = &ring->desc_cb[ring->next_to_clean];
1975 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
1976 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
1977 ring_ptr_move_fw(ring, next_to_clean);
1984 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
1985 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
1986 ((u64 *)desc)[0], ((u64 *)desc)[1]);
1987 u64_stats_update_begin(&ring->syncp);
1988 ring->stats.non_vld_descs++;
1989 u64_stats_update_end(&ring->syncp);
1991 dev_kfree_skb_any(skb);
1995 if (unlikely((!desc->rx.pkt_len) ||
1996 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
1997 netdev_err(netdev, "truncated pkt\n");
1998 u64_stats_update_begin(&ring->syncp);
1999 ring->stats.err_pkt_len++;
2000 u64_stats_update_end(&ring->syncp);
2002 dev_kfree_skb_any(skb);
2006 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2007 netdev_err(netdev, "L2 error pkt\n");
2008 u64_stats_update_begin(&ring->syncp);
2009 ring->stats.l2_err++;
2010 u64_stats_update_end(&ring->syncp);
2012 dev_kfree_skb_any(skb);
2016 u64_stats_update_begin(&ring->syncp);
2017 ring->stats.rx_pkts++;
2018 ring->stats.rx_bytes += skb->len;
2019 u64_stats_update_end(&ring->syncp);
2021 ring->tqp_vector->rx_group.total_bytes += skb->len;
2023 hns3_rx_checksum(ring, skb, desc);
2027 static int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget)
2029 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2030 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2031 int recv_pkts, recv_bds, clean_count, err;
2032 int unused_count = hns3_desc_unused(ring);
2033 struct sk_buff *skb = NULL;
2036 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2037 rmb(); /* Make sure num taken effect before the other data is touched */
2039 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2040 num -= unused_count;
2042 while (recv_pkts < budget && recv_bds < num) {
2043 /* Reuse or realloc buffers */
2044 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2045 hns3_nic_alloc_rx_buffers(ring,
2046 clean_count + unused_count);
2048 unused_count = hns3_desc_unused(ring);
2052 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2053 if (unlikely(!skb)) /* This fault cannot be repaired */
2057 clean_count += bnum;
2058 if (unlikely(err)) { /* Do jump the err */
2063 /* Do update ip stack process */
2064 skb->protocol = eth_type_trans(skb, netdev);
2065 (void)napi_gro_receive(&ring->tqp_vector->napi, skb);
2071 /* Make all data has been write before submit */
2072 if (clean_count + unused_count > 0)
2073 hns3_nic_alloc_rx_buffers(ring,
2074 clean_count + unused_count);
2079 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2081 #define HNS3_RX_ULTRA_PACKET_RATE 40000
2082 enum hns3_flow_level_range new_flow_level;
2083 struct hns3_enet_tqp_vector *tqp_vector;
2084 int packets_per_secs;
2085 int bytes_per_usecs;
2089 if (!ring_group->int_gl)
2092 if (ring_group->total_packets == 0) {
2093 ring_group->int_gl = HNS3_INT_GL_50K;
2094 ring_group->flow_level = HNS3_FLOW_LOW;
2098 /* Simple throttlerate management
2099 * 0-10MB/s lower (50000 ints/s)
2100 * 10-20MB/s middle (20000 ints/s)
2101 * 20-1249MB/s high (18000 ints/s)
2102 * > 40000pps ultra (8000 ints/s)
2104 new_flow_level = ring_group->flow_level;
2105 new_int_gl = ring_group->int_gl;
2106 tqp_vector = ring_group->ring->tqp_vector;
2107 usecs = (ring_group->int_gl << 1);
2108 bytes_per_usecs = ring_group->total_bytes / usecs;
2109 /* 1000000 microseconds */
2110 packets_per_secs = ring_group->total_packets * 1000000 / usecs;
2112 switch (new_flow_level) {
2114 if (bytes_per_usecs > 10)
2115 new_flow_level = HNS3_FLOW_MID;
2118 if (bytes_per_usecs > 20)
2119 new_flow_level = HNS3_FLOW_HIGH;
2120 else if (bytes_per_usecs <= 10)
2121 new_flow_level = HNS3_FLOW_LOW;
2123 case HNS3_FLOW_HIGH:
2124 case HNS3_FLOW_ULTRA:
2126 if (bytes_per_usecs <= 20)
2127 new_flow_level = HNS3_FLOW_MID;
2131 if ((packets_per_secs > HNS3_RX_ULTRA_PACKET_RATE) &&
2132 (&tqp_vector->rx_group == ring_group))
2133 new_flow_level = HNS3_FLOW_ULTRA;
2135 switch (new_flow_level) {
2137 new_int_gl = HNS3_INT_GL_50K;
2140 new_int_gl = HNS3_INT_GL_20K;
2142 case HNS3_FLOW_HIGH:
2143 new_int_gl = HNS3_INT_GL_18K;
2145 case HNS3_FLOW_ULTRA:
2146 new_int_gl = HNS3_INT_GL_8K;
2152 ring_group->total_bytes = 0;
2153 ring_group->total_packets = 0;
2154 ring_group->flow_level = new_flow_level;
2155 if (new_int_gl != ring_group->int_gl) {
2156 ring_group->int_gl = new_int_gl;
2162 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2164 u16 rx_int_gl, tx_int_gl;
2167 rx = hns3_get_new_int_gl(&tqp_vector->rx_group);
2168 tx = hns3_get_new_int_gl(&tqp_vector->tx_group);
2169 rx_int_gl = tqp_vector->rx_group.int_gl;
2170 tx_int_gl = tqp_vector->tx_group.int_gl;
2172 if (rx_int_gl > tx_int_gl) {
2173 tqp_vector->tx_group.int_gl = rx_int_gl;
2174 tqp_vector->tx_group.flow_level =
2175 tqp_vector->rx_group.flow_level;
2176 hns3_set_vector_coalesc_gl(tqp_vector, rx_int_gl);
2178 tqp_vector->rx_group.int_gl = tx_int_gl;
2179 tqp_vector->rx_group.flow_level =
2180 tqp_vector->tx_group.flow_level;
2181 hns3_set_vector_coalesc_gl(tqp_vector, tx_int_gl);
2186 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2188 struct hns3_enet_ring *ring;
2189 int rx_pkt_total = 0;
2191 struct hns3_enet_tqp_vector *tqp_vector =
2192 container_of(napi, struct hns3_enet_tqp_vector, napi);
2193 bool clean_complete = true;
2196 /* Since the actual Tx work is minimal, we can give the Tx a larger
2197 * budget and be more aggressive about cleaning up the Tx descriptors.
2199 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2200 if (!hns3_clean_tx_ring(ring, budget))
2201 clean_complete = false;
2204 /* make sure rx ring budget not smaller than 1 */
2205 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2207 hns3_for_each_ring(ring, tqp_vector->rx_group) {
2208 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget);
2210 if (rx_cleaned >= rx_budget)
2211 clean_complete = false;
2213 rx_pkt_total += rx_cleaned;
2216 tqp_vector->rx_group.total_packets += rx_pkt_total;
2218 if (!clean_complete)
2221 napi_complete(napi);
2222 hns3_update_new_int_gl(tqp_vector);
2223 hns3_mask_vector_irq(tqp_vector, 1);
2225 return rx_pkt_total;
2228 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2229 struct hnae3_ring_chain_node *head)
2231 struct pci_dev *pdev = tqp_vector->handle->pdev;
2232 struct hnae3_ring_chain_node *cur_chain = head;
2233 struct hnae3_ring_chain_node *chain;
2234 struct hns3_enet_ring *tx_ring;
2235 struct hns3_enet_ring *rx_ring;
2237 tx_ring = tqp_vector->tx_group.ring;
2239 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2240 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2241 HNAE3_RING_TYPE_TX);
2243 cur_chain->next = NULL;
2245 while (tx_ring->next) {
2246 tx_ring = tx_ring->next;
2248 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2253 cur_chain->next = chain;
2254 chain->tqp_index = tx_ring->tqp->tqp_index;
2255 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2256 HNAE3_RING_TYPE_TX);
2262 rx_ring = tqp_vector->rx_group.ring;
2263 if (!tx_ring && rx_ring) {
2264 cur_chain->next = NULL;
2265 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2266 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2267 HNAE3_RING_TYPE_RX);
2269 rx_ring = rx_ring->next;
2273 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2277 cur_chain->next = chain;
2278 chain->tqp_index = rx_ring->tqp->tqp_index;
2279 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2280 HNAE3_RING_TYPE_RX);
2283 rx_ring = rx_ring->next;
2289 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2290 struct hnae3_ring_chain_node *head)
2292 struct pci_dev *pdev = tqp_vector->handle->pdev;
2293 struct hnae3_ring_chain_node *chain_tmp, *chain;
2298 chain_tmp = chain->next;
2299 devm_kfree(&pdev->dev, chain);
2304 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2305 struct hns3_enet_ring *ring)
2307 ring->next = group->ring;
2313 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2315 struct hnae3_ring_chain_node vector_ring_chain;
2316 struct hnae3_handle *h = priv->ae_handle;
2317 struct hns3_enet_tqp_vector *tqp_vector;
2318 struct hnae3_vector_info *vector;
2319 struct pci_dev *pdev = h->pdev;
2320 u16 tqp_num = h->kinfo.num_tqps;
2325 /* RSS size, cpu online and vector_num should be the same */
2326 /* Should consider 2p/4p later */
2327 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2328 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2333 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2335 priv->vector_num = vector_num;
2336 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2337 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2339 if (!priv->tqp_vector)
2342 for (i = 0; i < tqp_num; i++) {
2343 u16 vector_i = i % vector_num;
2345 tqp_vector = &priv->tqp_vector[vector_i];
2347 hns3_add_ring_to_group(&tqp_vector->tx_group,
2348 priv->ring_data[i].ring);
2350 hns3_add_ring_to_group(&tqp_vector->rx_group,
2351 priv->ring_data[i + tqp_num].ring);
2353 tqp_vector->idx = vector_i;
2354 tqp_vector->mask_addr = vector[vector_i].io_addr;
2355 tqp_vector->vector_irq = vector[vector_i].vector;
2356 tqp_vector->num_tqps++;
2358 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2359 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2362 for (i = 0; i < vector_num; i++) {
2363 tqp_vector = &priv->tqp_vector[i];
2365 tqp_vector->rx_group.total_bytes = 0;
2366 tqp_vector->rx_group.total_packets = 0;
2367 tqp_vector->tx_group.total_bytes = 0;
2368 tqp_vector->tx_group.total_packets = 0;
2369 hns3_vector_gl_rl_init(tqp_vector);
2370 tqp_vector->handle = h;
2372 ret = hns3_get_vector_ring_chain(tqp_vector,
2373 &vector_ring_chain);
2377 ret = h->ae_algo->ops->map_ring_to_vector(h,
2378 tqp_vector->vector_irq, &vector_ring_chain);
2382 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2384 netif_napi_add(priv->netdev, &tqp_vector->napi,
2385 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2389 devm_kfree(&pdev->dev, vector);
2393 static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2395 struct hnae3_ring_chain_node vector_ring_chain;
2396 struct hnae3_handle *h = priv->ae_handle;
2397 struct hns3_enet_tqp_vector *tqp_vector;
2398 struct pci_dev *pdev = h->pdev;
2401 for (i = 0; i < priv->vector_num; i++) {
2402 tqp_vector = &priv->tqp_vector[i];
2404 ret = hns3_get_vector_ring_chain(tqp_vector,
2405 &vector_ring_chain);
2409 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2410 tqp_vector->vector_irq, &vector_ring_chain);
2414 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2416 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2417 (void)irq_set_affinity_hint(
2418 priv->tqp_vector[i].vector_irq,
2420 devm_free_irq(&pdev->dev,
2421 priv->tqp_vector[i].vector_irq,
2422 &priv->tqp_vector[i]);
2425 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
2427 netif_napi_del(&priv->tqp_vector[i].napi);
2430 devm_kfree(&pdev->dev, priv->tqp_vector);
2435 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2438 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2439 int queue_num = priv->ae_handle->kinfo.num_tqps;
2440 struct pci_dev *pdev = priv->ae_handle->pdev;
2441 struct hns3_enet_ring *ring;
2443 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2447 if (ring_type == HNAE3_RING_TYPE_TX) {
2448 ring_data[q->tqp_index].ring = ring;
2449 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2451 ring_data[q->tqp_index + queue_num].ring = ring;
2452 ring->io_base = q->io_base;
2455 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2457 ring_data[q->tqp_index].queue_index = q->tqp_index;
2461 ring->desc_cb = NULL;
2462 ring->dev = priv->dev;
2463 ring->desc_dma_addr = 0;
2464 ring->buf_size = q->buf_size;
2465 ring->desc_num = q->desc_num;
2466 ring->next_to_use = 0;
2467 ring->next_to_clean = 0;
2472 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2473 struct hns3_nic_priv *priv)
2477 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2481 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2488 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2490 struct hnae3_handle *h = priv->ae_handle;
2491 struct pci_dev *pdev = h->pdev;
2494 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2495 sizeof(*priv->ring_data) * 2,
2497 if (!priv->ring_data)
2500 for (i = 0; i < h->kinfo.num_tqps; i++) {
2501 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2508 devm_kfree(&pdev->dev, priv->ring_data);
2512 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2516 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2519 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2521 if (!ring->desc_cb) {
2526 ret = hns3_alloc_desc(ring);
2528 goto out_with_desc_cb;
2530 if (!HNAE3_IS_TX_RING(ring)) {
2531 ret = hns3_alloc_ring_buffers(ring);
2539 hns3_free_desc(ring);
2541 kfree(ring->desc_cb);
2542 ring->desc_cb = NULL;
2547 static void hns3_fini_ring(struct hns3_enet_ring *ring)
2549 hns3_free_desc(ring);
2550 kfree(ring->desc_cb);
2551 ring->desc_cb = NULL;
2552 ring->next_to_clean = 0;
2553 ring->next_to_use = 0;
2556 int hns3_buf_size2type(u32 buf_size)
2562 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2565 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2568 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2571 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2574 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2577 return bd_size_type;
2580 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2582 dma_addr_t dma = ring->desc_dma_addr;
2583 struct hnae3_queue *q = ring->tqp;
2585 if (!HNAE3_IS_TX_RING(ring)) {
2586 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
2588 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
2589 (u32)((dma >> 31) >> 1));
2591 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
2592 hns3_buf_size2type(ring->buf_size));
2593 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
2594 ring->desc_num / 8 - 1);
2597 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
2599 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
2600 (u32)((dma >> 31) >> 1));
2602 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
2603 hns3_buf_size2type(ring->buf_size));
2604 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
2605 ring->desc_num / 8 - 1);
2609 static int hns3_init_all_ring(struct hns3_nic_priv *priv)
2611 struct hnae3_handle *h = priv->ae_handle;
2612 int ring_num = h->kinfo.num_tqps * 2;
2616 for (i = 0; i < ring_num; i++) {
2617 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
2620 "Alloc ring memory fail! ret=%d\n", ret);
2621 goto out_when_alloc_ring_memory;
2624 hns3_init_ring_hw(priv->ring_data[i].ring);
2626 u64_stats_init(&priv->ring_data[i].ring->syncp);
2631 out_when_alloc_ring_memory:
2632 for (j = i - 1; j >= 0; j--)
2633 hns3_fini_ring(priv->ring_data[i].ring);
2638 static int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
2640 struct hnae3_handle *h = priv->ae_handle;
2643 for (i = 0; i < h->kinfo.num_tqps; i++) {
2644 if (h->ae_algo->ops->reset_queue)
2645 h->ae_algo->ops->reset_queue(h, i);
2647 hns3_fini_ring(priv->ring_data[i].ring);
2648 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
2654 /* Set mac addr if it is configured. or leave it to the AE driver */
2655 static void hns3_init_mac_addr(struct net_device *netdev)
2657 struct hns3_nic_priv *priv = netdev_priv(netdev);
2658 struct hnae3_handle *h = priv->ae_handle;
2659 u8 mac_addr_temp[ETH_ALEN];
2661 if (h->ae_algo->ops->get_mac_addr) {
2662 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
2663 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
2666 /* Check if the MAC address is valid, if not get a random one */
2667 if (!is_valid_ether_addr(netdev->dev_addr)) {
2668 eth_hw_addr_random(netdev);
2669 dev_warn(priv->dev, "using random MAC address %pM\n",
2671 /* Also copy this new MAC address into hdev */
2672 if (h->ae_algo->ops->set_mac_addr)
2673 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr);
2677 static void hns3_nic_set_priv_ops(struct net_device *netdev)
2679 struct hns3_nic_priv *priv = netdev_priv(netdev);
2681 if ((netdev->features & NETIF_F_TSO) ||
2682 (netdev->features & NETIF_F_TSO6)) {
2683 priv->ops.fill_desc = hns3_fill_desc_tso;
2684 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
2686 priv->ops.fill_desc = hns3_fill_desc;
2687 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
2691 static int hns3_client_init(struct hnae3_handle *handle)
2693 struct pci_dev *pdev = handle->pdev;
2694 struct hns3_nic_priv *priv;
2695 struct net_device *netdev;
2698 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
2699 handle->kinfo.num_tqps);
2703 priv = netdev_priv(netdev);
2704 priv->dev = &pdev->dev;
2705 priv->netdev = netdev;
2706 priv->ae_handle = handle;
2708 handle->kinfo.netdev = netdev;
2709 handle->priv = (void *)priv;
2711 hns3_init_mac_addr(netdev);
2713 hns3_set_default_feature(netdev);
2715 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
2716 netdev->priv_flags |= IFF_UNICAST_FLT;
2717 netdev->netdev_ops = &hns3_nic_netdev_ops;
2718 SET_NETDEV_DEV(netdev, &pdev->dev);
2719 hns3_ethtool_set_ops(netdev);
2720 hns3_nic_set_priv_ops(netdev);
2722 /* Carrier off reporting is important to ethtool even BEFORE open */
2723 netif_carrier_off(netdev);
2725 ret = hns3_get_ring_config(priv);
2728 goto out_get_ring_cfg;
2731 ret = hns3_nic_init_vector_data(priv);
2734 goto out_init_vector_data;
2737 ret = hns3_init_all_ring(priv);
2740 goto out_init_ring_data;
2743 ret = register_netdev(netdev);
2745 dev_err(priv->dev, "probe register netdev fail!\n");
2746 goto out_reg_netdev_fail;
2751 out_reg_netdev_fail:
2753 (void)hns3_nic_uninit_vector_data(priv);
2754 priv->ring_data = NULL;
2755 out_init_vector_data:
2757 priv->ae_handle = NULL;
2758 free_netdev(netdev);
2762 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
2764 struct net_device *netdev = handle->kinfo.netdev;
2765 struct hns3_nic_priv *priv = netdev_priv(netdev);
2768 if (netdev->reg_state != NETREG_UNINITIALIZED)
2769 unregister_netdev(netdev);
2771 ret = hns3_nic_uninit_vector_data(priv);
2773 netdev_err(netdev, "uninit vector error\n");
2775 ret = hns3_uninit_all_ring(priv);
2777 netdev_err(netdev, "uninit ring error\n");
2779 priv->ring_data = NULL;
2781 free_netdev(netdev);
2784 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
2786 struct net_device *netdev = handle->kinfo.netdev;
2792 netif_carrier_on(netdev);
2793 netif_tx_wake_all_queues(netdev);
2794 netdev_info(netdev, "link up\n");
2796 netif_carrier_off(netdev);
2797 netif_tx_stop_all_queues(netdev);
2798 netdev_info(netdev, "link down\n");
2802 const struct hnae3_client_ops client_ops = {
2803 .init_instance = hns3_client_init,
2804 .uninit_instance = hns3_client_uninit,
2805 .link_status_change = hns3_link_status_change,
2808 /* hns3_init_module - Driver registration routine
2809 * hns3_init_module is the first routine called when the driver is
2810 * loaded. All it does is register with the PCI subsystem.
2812 static int __init hns3_init_module(void)
2816 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
2817 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
2819 client.type = HNAE3_CLIENT_KNIC;
2820 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
2823 client.ops = &client_ops;
2825 ret = hnae3_register_client(&client);
2829 ret = pci_register_driver(&hns3_driver);
2831 hnae3_unregister_client(&client);
2835 module_init(hns3_init_module);
2837 /* hns3_exit_module - Driver exit cleanup routine
2838 * hns3_exit_module is called just before the driver is removed
2841 static void __exit hns3_exit_module(void)
2843 pci_unregister_driver(&hns3_driver);
2844 hnae3_unregister_client(&client);
2846 module_exit(hns3_exit_module);
2848 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
2849 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2850 MODULE_LICENSE("GPL");
2851 MODULE_ALIAS("pci:hns-nic");