drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/if_vlan.h>
   8 #include <linux/ip.h>
   9 #include <linux/ipv6.h>
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/aer.h>
  13 #include <linux/skbuff.h>
  14 #include <linux/sctp.h>
  15 #include <linux/vermagic.h>
  16 #include <net/gre.h>
  17 #include <net/pkt_cls.h>
  18 #include <net/tcp.h>
  19 #include <net/vxlan.h>
  20
  21 #include "hnae3.h"
  22 #include "hns3_enet.h"
  23
  24 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  25 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  26
  27 static void hns3_clear_all_ring(struct hnae3_handle *h);
  28 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h);
  29 static void hns3_remove_hw_addr(struct net_device *netdev);
  30
  31 static const char hns3_driver_name[] = "hns3";
  32 const char hns3_driver_version[] = VERMAGIC_STRING;
  33 static const char hns3_driver_string[] =
  34                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  35 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  36 static struct hnae3_client client;
  37
  38 /* hns3_pci_tbl - PCI Device ID Table
  39  *
  40  * Last entry must be all 0s
  41  *
  42  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  43  *   Class, Class Mask, private data (not used) }
  44  */
  45 static const struct pci_device_id hns3_pci_tbl[] = {
  46         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  47         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  48         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  49          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  50         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  51          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  52         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  53          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  54         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  55          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  56         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  57          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  58         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  59         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  60          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  61         /* required last entry */
  62         {0, }
  63 };
  64 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  65
  66 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  67 {
  68         struct hns3_enet_tqp_vector *tqp_vector = vector;
  69
  70         napi_schedule(&tqp_vector->napi);
  71
  72         return IRQ_HANDLED;
  73 }
  74
  75 /* This callback function is used to set affinity changes to the irq affinity
  76  * masks when the irq_set_affinity_notifier function is used.
  77  */
  78 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify *notify,
  79                                          const cpumask_t *mask)
  80 {
  81         struct hns3_enet_tqp_vector *tqp_vectors =
  82                 container_of(notify, struct hns3_enet_tqp_vector,
  83                              affinity_notify);
  84
  85         tqp_vectors->affinity_mask = *mask;
  86 }
  87
  88 static void hns3_nic_irq_affinity_release(struct kref *ref)
  89 {
  90 }
  91
  92 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
  93 {
  94         struct hns3_enet_tqp_vector *tqp_vectors;
  95         unsigned int i;
  96
  97         for (i = 0; i < priv->vector_num; i++) {
  98                 tqp_vectors = &priv->tqp_vector[i];
  99
 100                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 101                         continue;
 102
 103                 /* clear the affinity notifier and affinity mask */
 104                 irq_set_affinity_notifier(tqp_vectors->vector_irq, NULL);
 105                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 106
 107                 /* release the irq resource */
 108                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 109                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 110         }
 111 }
 112
 113 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 114 {
 115         struct hns3_enet_tqp_vector *tqp_vectors;
 116         int txrx_int_idx = 0;
 117         int rx_int_idx = 0;
 118         int tx_int_idx = 0;
 119         unsigned int i;
 120         int ret;
 121
 122         for (i = 0; i < priv->vector_num; i++) {
 123                 tqp_vectors = &priv->tqp_vector[i];
 124
 125                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 126                         continue;
 127
 128                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 129                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 130                                  "%s-%s-%d", priv->netdev->name, "TxRx",
 131                                  txrx_int_idx++);
 132                         txrx_int_idx++;
 133                 } else if (tqp_vectors->rx_group.ring) {
 134                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 135                                  "%s-%s-%d", priv->netdev->name, "Rx",
 136                                  rx_int_idx++);
 137                 } else if (tqp_vectors->tx_group.ring) {
 138                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
 139                                  "%s-%s-%d", priv->netdev->name, "Tx",
 140                                  tx_int_idx++);
 141                 } else {
 142                         /* Skip this unused q_vector */
 143                         continue;
 144                 }
 145
 146                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 147
 148                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 149                                   tqp_vectors->name,
 150                                        tqp_vectors);
 151                 if (ret) {
 152                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 153                                    tqp_vectors->vector_irq);
 154                         return ret;
 155                 }
 156
 157                 tqp_vectors->affinity_notify.notify =
 158                                         hns3_nic_irq_affinity_notify;
 159                 tqp_vectors->affinity_notify.release =
 160                                         hns3_nic_irq_affinity_release;
 161                 irq_set_affinity_notifier(tqp_vectors->vector_irq,
 162                                           &tqp_vectors->affinity_notify);
 163                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 164                                       &tqp_vectors->affinity_mask);
 165
 166                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 167         }
 168
 169         return 0;
 170 }
 171
 172 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 173                                  u32 mask_en)
 174 {
 175         writel(mask_en, tqp_vector->mask_addr);
 176 }
 177
 178 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 179 {
 180         napi_enable(&tqp_vector->napi);
 181
 182         /* enable vector */
 183         hns3_mask_vector_irq(tqp_vector, 1);
 184 }
 185
 186 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 187 {
 188         /* disable vector */
 189         hns3_mask_vector_irq(tqp_vector, 0);
 190
 191         disable_irq(tqp_vector->vector_irq);
 192         napi_disable(&tqp_vector->napi);
 193 }
 194
 195 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 196                                  u32 rl_value)
 197 {
 198         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 199
 200         /* this defines the configuration for RL (Interrupt Rate Limiter).
 201          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 202          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 203          */
 204
 205         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 206             !tqp_vector->rx_group.coal.gl_adapt_enable)
 207                 /* According to the hardware, the range of rl_reg is
 208                  * 0-59 and the unit is 4.
 209                  */
 210                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 211
 212         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 213 }
 214
 215 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 216                                     u32 gl_value)
 217 {
 218         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 219
 220         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 221 }
 222
 223 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 224                                     u32 gl_value)
 225 {
 226         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 227
 228         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 229 }
 230
 231 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 232                                    struct hns3_nic_priv *priv)
 233 {
 234         /* initialize the configuration for interrupt coalescing.
 235          * 1. GL (Interrupt Gap Limiter)
 236          * 2. RL (Interrupt Rate Limiter)
 237          */
 238
 239         /* Default: enable interrupt coalescing self-adaptive and GL */
 240         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 241         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 242
 243         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 244         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 245
 246         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 247         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 248 }
 249
 250 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 251                                       struct hns3_nic_priv *priv)
 252 {
 253         struct hnae3_handle *h = priv->ae_handle;
 254
 255         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 256                                        tqp_vector->tx_group.coal.int_gl);
 257         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 258                                        tqp_vector->rx_group.coal.int_gl);
 259         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 260 }
 261
 262 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 263 {
 264         struct hnae3_handle *h = hns3_get_handle(netdev);
 265         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 266         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 267         int i, ret;
 268
 269         if (kinfo->num_tc <= 1) {
 270                 netdev_reset_tc(netdev);
 271         } else {
 272                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 273                 if (ret) {
 274                         netdev_err(netdev,
 275                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 276                         return ret;
 277                 }
 278
 279                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 280                         if (!kinfo->tc_info[i].enable)
 281                                 continue;
 282
 283                         netdev_set_tc_queue(netdev,
 284                                             kinfo->tc_info[i].tc,
 285                                             kinfo->tc_info[i].tqp_count,
 286                                             kinfo->tc_info[i].tqp_offset);
 287                 }
 288         }
 289
 290         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 291         if (ret) {
 292                 netdev_err(netdev,
 293                            "netif_set_real_num_tx_queues fail, ret=%d!\n",
 294                            ret);
 295                 return ret;
 296         }
 297
 298         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 299         if (ret) {
 300                 netdev_err(netdev,
 301                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 302                 return ret;
 303         }
 304
 305         return 0;
 306 }
 307
 308 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 309 {
 310         u16 alloc_tqps, max_rss_size, rss_size;
 311
 312         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 313         rss_size = alloc_tqps / h->kinfo.num_tc;
 314
 315         return min_t(u16, rss_size, max_rss_size);
 316 }
 317
 318 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 319 {
 320         u32 rcb_reg;
 321
 322         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 323         rcb_reg |= BIT(HNS3_RING_EN_B);
 324         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 325 }
 326
 327 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 328 {
 329         u32 rcb_reg;
 330
 331         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 332         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 333         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 334 }
 335
 336 static int hns3_nic_net_up(struct net_device *netdev)
 337 {
 338         struct hns3_nic_priv *priv = netdev_priv(netdev);
 339         struct hnae3_handle *h = priv->ae_handle;
 340         int i, j;
 341         int ret;
 342
 343         ret = hns3_nic_reset_all_ring(h);
 344         if (ret)
 345                 return ret;
 346
 347         /* get irq resource for all vectors */
 348         ret = hns3_nic_init_irq(priv);
 349         if (ret) {
 350                 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
 351                 return ret;
 352         }
 353
 354         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 355
 356         /* enable the vectors */
 357         for (i = 0; i < priv->vector_num; i++)
 358                 hns3_vector_enable(&priv->tqp_vector[i]);
 359
 360         /* enable rcb */
 361         for (j = 0; j < h->kinfo.num_tqps; j++)
 362                 hns3_tqp_enable(h->kinfo.tqp[j]);
 363
 364         /* start the ae_dev */
 365         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 366         if (ret)
 367                 goto out_start_err;
 368
 369         return 0;
 370
 371 out_start_err:
 372         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 373         while (j--)
 374                 hns3_tqp_disable(h->kinfo.tqp[j]);
 375
 376         for (j = i - 1; j >= 0; j--)
 377                 hns3_vector_disable(&priv->tqp_vector[j]);
 378
 379         hns3_nic_uninit_irq(priv);
 380
 381         return ret;
 382 }
 383
 384 static void hns3_config_xps(struct hns3_nic_priv *priv)
 385 {
 386         int i;
 387
 388         for (i = 0; i < priv->vector_num; i++) {
 389                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 390                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 391
 392                 while (ring) {
 393                         int ret;
 394
 395                         ret = netif_set_xps_queue(priv->netdev,
 396                                                   &tqp_vector->affinity_mask,
 397                                                   ring->tqp->tqp_index);
 398                         if (ret)
 399                                 netdev_warn(priv->netdev,
 400                                             "set xps queue failed: %d", ret);
 401
 402                         ring = ring->next;
 403                 }
 404         }
 405 }
 406
 407 static int hns3_nic_net_open(struct net_device *netdev)
 408 {
 409         struct hns3_nic_priv *priv = netdev_priv(netdev);
 410         struct hnae3_handle *h = hns3_get_handle(netdev);
 411         struct hnae3_knic_private_info *kinfo;
 412         int i, ret;
 413
 414         if (hns3_nic_resetting(netdev))
 415                 return -EBUSY;
 416
 417         netif_carrier_off(netdev);
 418
 419         ret = hns3_nic_set_real_num_queue(netdev);
 420         if (ret)
 421                 return ret;
 422
 423         ret = hns3_nic_net_up(netdev);
 424         if (ret) {
 425                 netdev_err(netdev,
 426                            "hns net up fail, ret=%d!\n", ret);
 427                 return ret;
 428         }
 429
 430         kinfo = &h->kinfo;
 431         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
 432                 netdev_set_prio_tc_map(netdev, i,
 433                                        kinfo->prio_tc[i]);
 434         }
 435
 436         if (h->ae_algo->ops->set_timer_task)
 437                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 438
 439         hns3_config_xps(priv);
 440         return 0;
 441 }
 442
 443 static void hns3_nic_net_down(struct net_device *netdev)
 444 {
 445         struct hns3_nic_priv *priv = netdev_priv(netdev);
 446         struct hnae3_handle *h = hns3_get_handle(netdev);
 447         const struct hnae3_ae_ops *ops;
 448         int i;
 449
 450         /* disable vectors */
 451         for (i = 0; i < priv->vector_num; i++)
 452                 hns3_vector_disable(&priv->tqp_vector[i]);
 453
 454         /* disable rcb */
 455         for (i = 0; i < h->kinfo.num_tqps; i++)
 456                 hns3_tqp_disable(h->kinfo.tqp[i]);
 457
 458         /* stop ae_dev */
 459         ops = priv->ae_handle->ae_algo->ops;
 460         if (ops->stop)
 461                 ops->stop(priv->ae_handle);
 462
 463         /* free irq resources */
 464         hns3_nic_uninit_irq(priv);
 465
 466         hns3_clear_all_ring(priv->ae_handle);
 467 }
 468
 469 static int hns3_nic_net_stop(struct net_device *netdev)
 470 {
 471         struct hns3_nic_priv *priv = netdev_priv(netdev);
 472         struct hnae3_handle *h = hns3_get_handle(netdev);
 473
 474         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 475                 return 0;
 476
 477         if (h->ae_algo->ops->set_timer_task)
 478                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 479
 480         netif_tx_stop_all_queues(netdev);
 481         netif_carrier_off(netdev);
 482
 483         hns3_nic_net_down(netdev);
 484
 485         return 0;
 486 }
 487
 488 static int hns3_nic_uc_sync(struct net_device *netdev,
 489                             const unsigned char *addr)
 490 {
 491         struct hnae3_handle *h = hns3_get_handle(netdev);
 492
 493         if (h->ae_algo->ops->add_uc_addr)
 494                 return h->ae_algo->ops->add_uc_addr(h, addr);
 495
 496         return 0;
 497 }
 498
 499 static int hns3_nic_uc_unsync(struct net_device *netdev,
 500                               const unsigned char *addr)
 501 {
 502         struct hnae3_handle *h = hns3_get_handle(netdev);
 503
 504         if (h->ae_algo->ops->rm_uc_addr)
 505                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 506
 507         return 0;
 508 }
 509
 510 static int hns3_nic_mc_sync(struct net_device *netdev,
 511                             const unsigned char *addr)
 512 {
 513         struct hnae3_handle *h = hns3_get_handle(netdev);
 514
 515         if (h->ae_algo->ops->add_mc_addr)
 516                 return h->ae_algo->ops->add_mc_addr(h, addr);
 517
 518         return 0;
 519 }
 520
 521 static int hns3_nic_mc_unsync(struct net_device *netdev,
 522                               const unsigned char *addr)
 523 {
 524         struct hnae3_handle *h = hns3_get_handle(netdev);
 525
 526         if (h->ae_algo->ops->rm_mc_addr)
 527                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 528
 529         return 0;
 530 }
 531
 532 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 533 {
 534         u8 flags = 0;
 535
 536         if (netdev->flags & IFF_PROMISC) {
 537                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 538         } else {
 539                 flags |= HNAE3_VLAN_FLTR;
 540                 if (netdev->flags & IFF_ALLMULTI)
 541                         flags |= HNAE3_USER_MPE;
 542         }
 543
 544         return flags;
 545 }
 546
 547 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 548 {
 549         struct hnae3_handle *h = hns3_get_handle(netdev);
 550         u8 new_flags;
 551         int ret;
 552
 553         new_flags = hns3_get_netdev_flags(netdev);
 554
 555         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 556         if (ret) {
 557                 netdev_err(netdev, "sync uc address fail\n");
 558                 if (ret == -ENOSPC)
 559                         new_flags |= HNAE3_OVERFLOW_UPE;
 560         }
 561
 562         if (netdev->flags & IFF_MULTICAST) {
 563                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 564                                     hns3_nic_mc_unsync);
 565                 if (ret) {
 566                         netdev_err(netdev, "sync mc address fail\n");
 567                         if (ret == -ENOSPC)
 568                                 new_flags |= HNAE3_OVERFLOW_MPE;
 569                 }
 570         }
 571
 572         /* User mode Promisc mode enable and vlan filtering is disabled to
 573          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 574          * vlan fitering is enabled
 575          */
 576         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 577         h->netdev_flags = new_flags;
 578         hns3_update_promisc_mode(netdev, new_flags);
 579 }
 580
 581 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 582 {
 583         struct hns3_nic_priv *priv = netdev_priv(netdev);
 584         struct hnae3_handle *h = priv->ae_handle;
 585
 586         if (h->ae_algo->ops->set_promisc_mode) {
 587                 return h->ae_algo->ops->set_promisc_mode(h,
 588                                                 promisc_flags & HNAE3_UPE,
 589                                                 promisc_flags & HNAE3_MPE);
 590         }
 591
 592         return 0;
 593 }
 594
 595 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 596 {
 597         struct hns3_nic_priv *priv = netdev_priv(netdev);
 598         struct hnae3_handle *h = priv->ae_handle;
 599         bool last_state;
 600
 601         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 602                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 603                 if (enable != last_state) {
 604                         netdev_info(netdev,
 605                                     "%s vlan filter\n",
 606                                     enable ? "enable" : "disable");
 607                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 608                 }
 609         }
 610 }
 611
 612 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 613                         u16 *mss, u32 *type_cs_vlan_tso)
 614 {
 615         u32 l4_offset, hdr_len;
 616         union l3_hdr_info l3;
 617         union l4_hdr_info l4;
 618         u32 l4_paylen;
 619         int ret;
 620
 621         if (!skb_is_gso(skb))
 622                 return 0;
 623
 624         ret = skb_cow_head(skb, 0);
 625         if (unlikely(ret))
 626                 return ret;
 627
 628         l3.hdr = skb_network_header(skb);
 629         l4.hdr = skb_transport_header(skb);
 630
 631         /* Software should clear the IPv4's checksum field when tso is
 632          * needed.
 633          */
 634         if (l3.v4->version == 4)
 635                 l3.v4->check = 0;
 636
 637         /* tunnel packet.*/
 638         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 639                                          SKB_GSO_GRE_CSUM |
 640                                          SKB_GSO_UDP_TUNNEL |
 641                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 642                 if ((!(skb_shinfo(skb)->gso_type &
 643                     SKB_GSO_PARTIAL)) &&
 644                     (skb_shinfo(skb)->gso_type &
 645                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 646                         /* Software should clear the udp's checksum
 647                          * field when tso is needed.
 648                          */
 649                         l4.udp->check = 0;
 650                 }
 651                 /* reset l3&l4 pointers from outer to inner headers */
 652                 l3.hdr = skb_inner_network_header(skb);
 653                 l4.hdr = skb_inner_transport_header(skb);
 654
 655                 /* Software should clear the IPv4's checksum field when
 656                  * tso is needed.
 657                  */
 658                 if (l3.v4->version == 4)
 659                         l3.v4->check = 0;
 660         }
 661
 662         /* normal or tunnel packet*/
 663         l4_offset = l4.hdr - skb->data;
 664         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 665
 666         /* remove payload length from inner pseudo checksum when tso*/
 667         l4_paylen = skb->len - l4_offset;
 668         csum_replace_by_diff(&l4.tcp->check,
 669                              (__force __wsum)htonl(l4_paylen));
 670
 671         /* find the txbd field values */
 672         *paylen = skb->len - hdr_len;
 673         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 674
 675         /* get MSS for TSO */
 676         *mss = skb_shinfo(skb)->gso_size;
 677
 678         return 0;
 679 }
 680
 681 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 682                                 u8 *il4_proto)
 683 {
 684         union l3_hdr_info l3;
 685         unsigned char *l4_hdr;
 686         unsigned char *exthdr;
 687         u8 l4_proto_tmp;
 688         __be16 frag_off;
 689
 690         /* find outer header point */
 691         l3.hdr = skb_network_header(skb);
 692         l4_hdr = skb_transport_header(skb);
 693
 694         if (skb->protocol == htons(ETH_P_IPV6)) {
 695                 exthdr = l3.hdr + sizeof(*l3.v6);
 696                 l4_proto_tmp = l3.v6->nexthdr;
 697                 if (l4_hdr != exthdr)
 698                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 699                                          &l4_proto_tmp, &frag_off);
 700         } else if (skb->protocol == htons(ETH_P_IP)) {
 701                 l4_proto_tmp = l3.v4->protocol;
 702         } else {
 703                 return -EINVAL;
 704         }
 705
 706         *ol4_proto = l4_proto_tmp;
 707
 708         /* tunnel packet */
 709         if (!skb->encapsulation) {
 710                 *il4_proto = 0;
 711                 return 0;
 712         }
 713
 714         /* find inner header point */
 715         l3.hdr = skb_inner_network_header(skb);
 716         l4_hdr = skb_inner_transport_header(skb);
 717
 718         if (l3.v6->version == 6) {
 719                 exthdr = l3.hdr + sizeof(*l3.v6);
 720                 l4_proto_tmp = l3.v6->nexthdr;
 721                 if (l4_hdr != exthdr)
 722                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 723                                          &l4_proto_tmp, &frag_off);
 724         } else if (l3.v4->version == 4) {
 725                 l4_proto_tmp = l3.v4->protocol;
 726         }
 727
 728         *il4_proto = l4_proto_tmp;
 729
 730         return 0;
 731 }
 732
 733 static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
 734                                 u8 il4_proto, u32 *type_cs_vlan_tso,
 735                                 u32 *ol_type_vlan_len_msec)
 736 {
 737         union l3_hdr_info l3;
 738         union l4_hdr_info l4;
 739         unsigned char *l2_hdr;
 740         u8 l4_proto = ol4_proto;
 741         u32 ol2_len;
 742         u32 ol3_len;
 743         u32 ol4_len;
 744         u32 l2_len;
 745         u32 l3_len;
 746
 747         l3.hdr = skb_network_header(skb);
 748         l4.hdr = skb_transport_header(skb);
 749
 750         /* compute L2 header size for normal packet, defined in 2 Bytes */
 751         l2_len = l3.hdr - skb->data;
 752         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 753
 754         /* tunnel packet*/
 755         if (skb->encapsulation) {
 756                 /* compute OL2 header size, defined in 2 Bytes */
 757                 ol2_len = l2_len;
 758                 hns3_set_field(*ol_type_vlan_len_msec,
 759                                HNS3_TXD_L2LEN_S, ol2_len >> 1);
 760
 761                 /* compute OL3 header size, defined in 4 Bytes */
 762                 ol3_len = l4.hdr - l3.hdr;
 763                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S,
 764                                ol3_len >> 2);
 765
 766                 /* MAC in UDP, MAC in GRE (0x6558)*/
 767                 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
 768                         /* switch MAC header ptr from outer to inner header.*/
 769                         l2_hdr = skb_inner_mac_header(skb);
 770
 771                         /* compute OL4 header size, defined in 4 Bytes. */
 772                         ol4_len = l2_hdr - l4.hdr;
 773                         hns3_set_field(*ol_type_vlan_len_msec,
 774                                        HNS3_TXD_L4LEN_S, ol4_len >> 2);
 775
 776                         /* switch IP header ptr from outer to inner header */
 777                         l3.hdr = skb_inner_network_header(skb);
 778
 779                         /* compute inner l2 header size, defined in 2 Bytes. */
 780                         l2_len = l3.hdr - l2_hdr;
 781                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S,
 782                                        l2_len >> 1);
 783                 } else {
 784                         /* skb packet types not supported by hardware,
 785                          * txbd len fild doesn't be filled.
 786                          */
 787                         return;
 788                 }
 789
 790                 /* switch L4 header pointer from outer to inner */
 791                 l4.hdr = skb_inner_transport_header(skb);
 792
 793                 l4_proto = il4_proto;
 794         }
 795
 796         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 797         l3_len = l4.hdr - l3.hdr;
 798         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 799
 800         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 801         switch (l4_proto) {
 802         case IPPROTO_TCP:
 803                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 804                                l4.tcp->doff);
 805                 break;
 806         case IPPROTO_SCTP:
 807                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 808                                (sizeof(struct sctphdr) >> 2));
 809                 break;
 810         case IPPROTO_UDP:
 811                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 812                                (sizeof(struct udphdr) >> 2));
 813                 break;
 814         default:
 815                 /* skb packet types not supported by hardware,
 816                  * txbd len fild doesn't be filled.
 817                  */
 818                 return;
 819         }
 820 }
 821
 822 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 823  * and it is udp packet, which has a dest port as the IANA assigned.
 824  * the hardware is expected to do the checksum offload, but the
 825  * hardware will not do the checksum offload when udp dest port is
 826  * 4789.
 827  */
 828 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 829 {
 830         union l4_hdr_info l4;
 831
 832         l4.hdr = skb_transport_header(skb);
 833
 834         if (!(!skb->encapsulation &&
 835               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 836                 return false;
 837
 838         skb_checksum_help(skb);
 839
 840         return true;
 841 }
 842
 843 static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
 844                                    u8 il4_proto, u32 *type_cs_vlan_tso,
 845                                    u32 *ol_type_vlan_len_msec)
 846 {
 847         union l3_hdr_info l3;
 848         u32 l4_proto = ol4_proto;
 849
 850         l3.hdr = skb_network_header(skb);
 851
 852         /* define OL3 type and tunnel type(OL4).*/
 853         if (skb->encapsulation) {
 854                 /* define outer network header type.*/
 855                 if (skb->protocol == htons(ETH_P_IP)) {
 856                         if (skb_is_gso(skb))
 857                                 hns3_set_field(*ol_type_vlan_len_msec,
 858                                                HNS3_TXD_OL3T_S,
 859                                                HNS3_OL3T_IPV4_CSUM);
 860                         else
 861                                 hns3_set_field(*ol_type_vlan_len_msec,
 862                                                HNS3_TXD_OL3T_S,
 863                                                HNS3_OL3T_IPV4_NO_CSUM);
 864
 865                 } else if (skb->protocol == htons(ETH_P_IPV6)) {
 866                         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 867                                        HNS3_OL3T_IPV6);
 868                 }
 869
 870                 /* define tunnel type(OL4).*/
 871                 switch (l4_proto) {
 872                 case IPPROTO_UDP:
 873                         hns3_set_field(*ol_type_vlan_len_msec,
 874                                        HNS3_TXD_TUNTYPE_S,
 875                                        HNS3_TUN_MAC_IN_UDP);
 876                         break;
 877                 case IPPROTO_GRE:
 878                         hns3_set_field(*ol_type_vlan_len_msec,
 879                                        HNS3_TXD_TUNTYPE_S,
 880                                        HNS3_TUN_NVGRE);
 881                         break;
 882                 default:
 883                         /* drop the skb tunnel packet if hardware don't support,
 884                          * because hardware can't calculate csum when TSO.
 885                          */
 886                         if (skb_is_gso(skb))
 887                                 return -EDOM;
 888
 889                         /* the stack computes the IP header already,
 890                          * driver calculate l4 checksum when not TSO.
 891                          */
 892                         skb_checksum_help(skb);
 893                         return 0;
 894                 }
 895
 896                 l3.hdr = skb_inner_network_header(skb);
 897                 l4_proto = il4_proto;
 898         }
 899
 900         if (l3.v4->version == 4) {
 901                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 902                                HNS3_L3T_IPV4);
 903
 904                 /* the stack computes the IP header already, the only time we
 905                  * need the hardware to recompute it is in the case of TSO.
 906                  */
 907                 if (skb_is_gso(skb))
 908                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 909         } else if (l3.v6->version == 6) {
 910                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 911                                HNS3_L3T_IPV6);
 912         }
 913
 914         switch (l4_proto) {
 915         case IPPROTO_TCP:
 916                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 917                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 918                                HNS3_L4T_TCP);
 919                 break;
 920         case IPPROTO_UDP:
 921                 if (hns3_tunnel_csum_bug(skb))
 922                         break;
 923
 924                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 925                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 926                                HNS3_L4T_UDP);
 927                 break;
 928         case IPPROTO_SCTP:
 929                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 930                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 931                                HNS3_L4T_SCTP);
 932                 break;
 933         default:
 934                 /* drop the skb tunnel packet if hardware don't support,
 935                  * because hardware can't calculate csum when TSO.
 936                  */
 937                 if (skb_is_gso(skb))
 938                         return -EDOM;
 939
 940                 /* the stack computes the IP header already,
 941                  * driver calculate l4 checksum when not TSO.
 942                  */
 943                 skb_checksum_help(skb);
 944                 return 0;
 945         }
 946
 947         return 0;
 948 }
 949
 950 static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
 951 {
 952         /* Config bd buffer end */
 953         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
 954         hns3_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
 955 }
 956
 957 static int hns3_fill_desc_vtags(struct sk_buff *skb,
 958                                 struct hns3_enet_ring *tx_ring,
 959                                 u32 *inner_vlan_flag,
 960                                 u32 *out_vlan_flag,
 961                                 u16 *inner_vtag,
 962                                 u16 *out_vtag)
 963 {
 964 #define HNS3_TX_VLAN_PRIO_SHIFT 13
 965
 966         if (skb->protocol == htons(ETH_P_8021Q) &&
 967             !(tx_ring->tqp->handle->kinfo.netdev->features &
 968             NETIF_F_HW_VLAN_CTAG_TX)) {
 969                 /* When HW VLAN acceleration is turned off, and the stack
 970                  * sets the protocol to 802.1q, the driver just need to
 971                  * set the protocol to the encapsulated ethertype.
 972                  */
 973                 skb->protocol = vlan_get_protocol(skb);
 974                 return 0;
 975         }
 976
 977         if (skb_vlan_tag_present(skb)) {
 978                 u16 vlan_tag;
 979
 980                 vlan_tag = skb_vlan_tag_get(skb);
 981                 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
 982
 983                 /* Based on hw strategy, use out_vtag in two layer tag case,
 984                  * and use inner_vtag in one tag case.
 985                  */
 986                 if (skb->protocol == htons(ETH_P_8021Q)) {
 987                         hns3_set_field(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
 988                         *out_vtag = vlan_tag;
 989                 } else {
 990                         hns3_set_field(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
 991                         *inner_vtag = vlan_tag;
 992                 }
 993         } else if (skb->protocol == htons(ETH_P_8021Q)) {
 994                 struct vlan_ethhdr *vhdr;
 995                 int rc;
 996
 997                 rc = skb_cow_head(skb, 0);
 998                 if (unlikely(rc < 0))
 999                         return rc;
1000                 vhdr = (struct vlan_ethhdr *)skb->data;
1001                 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
1002                                         << HNS3_TX_VLAN_PRIO_SHIFT);
1003         }
1004
1005         skb->protocol = vlan_get_protocol(skb);
1006         return 0;
1007 }
1008
1009 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1010                           int size, int frag_end, enum hns_desc_type type)
1011 {
1012         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1013         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1014         struct device *dev = ring_to_dev(ring);
1015         struct skb_frag_struct *frag;
1016         unsigned int frag_buf_num;
1017         int k, sizeoflast;
1018         dma_addr_t dma;
1019
1020         if (type == DESC_TYPE_SKB) {
1021                 struct sk_buff *skb = (struct sk_buff *)priv;
1022                 u32 ol_type_vlan_len_msec = 0;
1023                 u32 type_cs_vlan_tso = 0;
1024                 u32 paylen = skb->len;
1025                 u16 inner_vtag = 0;
1026                 u16 out_vtag = 0;
1027                 u16 mss = 0;
1028                 int ret;
1029
1030                 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
1031                                            &ol_type_vlan_len_msec,
1032                                            &inner_vtag, &out_vtag);
1033                 if (unlikely(ret))
1034                         return ret;
1035
1036                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1037                         u8 ol4_proto, il4_proto;
1038
1039                         skb_reset_mac_len(skb);
1040
1041                         ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1042                         if (unlikely(ret))
1043                                 return ret;
1044                         hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
1045                                             &type_cs_vlan_tso,
1046                                             &ol_type_vlan_len_msec);
1047                         ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
1048                                                       &type_cs_vlan_tso,
1049                                                       &ol_type_vlan_len_msec);
1050                         if (unlikely(ret))
1051                                 return ret;
1052
1053                         ret = hns3_set_tso(skb, &paylen, &mss,
1054                                            &type_cs_vlan_tso);
1055                         if (unlikely(ret))
1056                                 return ret;
1057                 }
1058
1059                 /* Set txbd */
1060                 desc->tx.ol_type_vlan_len_msec =
1061                         cpu_to_le32(ol_type_vlan_len_msec);
1062                 desc->tx.type_cs_vlan_tso_len =
1063                         cpu_to_le32(type_cs_vlan_tso);
1064                 desc->tx.paylen = cpu_to_le32(paylen);
1065                 desc->tx.mss = cpu_to_le16(mss);
1066                 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1067                 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1068
1069                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1070         } else {
1071                 frag = (struct skb_frag_struct *)priv;
1072                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1073         }
1074
1075         if (unlikely(dma_mapping_error(ring->dev, dma))) {
1076                 ring->stats.sw_err_cnt++;
1077                 return -ENOMEM;
1078         }
1079
1080         desc_cb->length = size;
1081
1082         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1083                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1084
1085                 desc_cb->priv = priv;
1086                 desc_cb->dma = dma;
1087                 desc_cb->type = type;
1088                 desc->addr = cpu_to_le64(dma);
1089                 desc->tx.send_size = cpu_to_le16(size);
1090                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
1091                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1092                         cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1093
1094                 ring_ptr_move_fw(ring, next_to_use);
1095                 return 0;
1096         }
1097
1098         frag_buf_num = hns3_tx_bd_count(size);
1099         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1100         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1101
1102         /* When frag size is bigger than hardware limit, split this frag */
1103         for (k = 0; k < frag_buf_num; k++) {
1104                 u16 bdtp_fe_sc_vld_ra_ri = 0;
1105
1106                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1107                 desc_cb->priv = priv;
1108                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1109                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1110                                         DESC_TYPE_SKB : DESC_TYPE_PAGE;
1111
1112                 /* now, fill the descriptor */
1113                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1114                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1115                                 (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1116                 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri,
1117                                        frag_end && (k == frag_buf_num - 1) ?
1118                                                 1 : 0);
1119                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1120                                 cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
1121
1122                 /* move ring pointer to next.*/
1123                 ring_ptr_move_fw(ring, next_to_use);
1124
1125                 desc_cb = &ring->desc_cb[ring->next_to_use];
1126                 desc = &ring->desc[ring->next_to_use];
1127         }
1128
1129         return 0;
1130 }
1131
1132 static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
1133                                    struct hns3_enet_ring *ring)
1134 {
1135         struct sk_buff *skb = *out_skb;
1136         struct sk_buff *new_skb = NULL;
1137         struct skb_frag_struct *frag;
1138         int bdnum_for_frag;
1139         int frag_num;
1140         int buf_num;
1141         int size;
1142         int i;
1143
1144         size = skb_headlen(skb);
1145         buf_num = hns3_tx_bd_count(size);
1146
1147         frag_num = skb_shinfo(skb)->nr_frags;
1148         for (i = 0; i < frag_num; i++) {
1149                 frag = &skb_shinfo(skb)->frags[i];
1150                 size = skb_frag_size(frag);
1151                 bdnum_for_frag = hns3_tx_bd_count(size);
1152                 if (unlikely(bdnum_for_frag > HNS3_MAX_BD_PER_FRAG))
1153                         return -ENOMEM;
1154
1155                 buf_num += bdnum_for_frag;
1156         }
1157
1158         if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) {
1159                 buf_num = hns3_tx_bd_count(skb->len);
1160                 if (ring_space(ring) < buf_num)
1161                         return -EBUSY;
1162                 /* manual split the send packet */
1163                 new_skb = skb_copy(skb, GFP_ATOMIC);
1164                 if (!new_skb)
1165                         return -ENOMEM;
1166                 dev_kfree_skb_any(skb);
1167                 *out_skb = new_skb;
1168         }
1169
1170         if (unlikely(ring_space(ring) < buf_num))
1171                 return -EBUSY;
1172
1173         *bnum = buf_num;
1174         return 0;
1175 }
1176
1177 static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
1178                                   struct hns3_enet_ring *ring)
1179 {
1180         struct sk_buff *skb = *out_skb;
1181         struct sk_buff *new_skb = NULL;
1182         int buf_num;
1183
1184         /* No. of segments (plus a header) */
1185         buf_num = skb_shinfo(skb)->nr_frags + 1;
1186
1187         if (unlikely(buf_num > HNS3_MAX_BD_PER_FRAG)) {
1188                 buf_num = hns3_tx_bd_count(skb->len);
1189                 if (ring_space(ring) < buf_num)
1190                         return -EBUSY;
1191                 /* manual split the send packet */
1192                 new_skb = skb_copy(skb, GFP_ATOMIC);
1193                 if (!new_skb)
1194                         return -ENOMEM;
1195                 dev_kfree_skb_any(skb);
1196                 *out_skb = new_skb;
1197         }
1198
1199         if (unlikely(ring_space(ring) < buf_num))
1200                 return -EBUSY;
1201
1202         *bnum = buf_num;
1203
1204         return 0;
1205 }
1206
1207 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1208 {
1209         struct device *dev = ring_to_dev(ring);
1210         unsigned int i;
1211
1212         for (i = 0; i < ring->desc_num; i++) {
1213                 /* check if this is where we started */
1214                 if (ring->next_to_use == next_to_use_orig)
1215                         break;
1216
1217                 /* unmap the descriptor dma address */
1218                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1219                         dma_unmap_single(dev,
1220                                          ring->desc_cb[ring->next_to_use].dma,
1221                                         ring->desc_cb[ring->next_to_use].length,
1222                                         DMA_TO_DEVICE);
1223                 else if (ring->desc_cb[ring->next_to_use].length)
1224                         dma_unmap_page(dev,
1225                                        ring->desc_cb[ring->next_to_use].dma,
1226                                        ring->desc_cb[ring->next_to_use].length,
1227                                        DMA_TO_DEVICE);
1228
1229                 ring->desc_cb[ring->next_to_use].length = 0;
1230
1231                 /* rollback one */
1232                 ring_ptr_move_bw(ring, next_to_use);
1233         }
1234 }
1235
1236 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1237 {
1238         struct hns3_nic_priv *priv = netdev_priv(netdev);
1239         struct hns3_nic_ring_data *ring_data =
1240                 &tx_ring_data(priv, skb->queue_mapping);
1241         struct hns3_enet_ring *ring = ring_data->ring;
1242         struct netdev_queue *dev_queue;
1243         struct skb_frag_struct *frag;
1244         int next_to_use_head;
1245         int next_to_use_frag;
1246         int buf_num;
1247         int seg_num;
1248         int size;
1249         int ret;
1250         int i;
1251
1252         /* Prefetch the data used later */
1253         prefetch(skb->data);
1254
1255         switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1256         case -EBUSY:
1257                 u64_stats_update_begin(&ring->syncp);
1258                 ring->stats.tx_busy++;
1259                 u64_stats_update_end(&ring->syncp);
1260
1261                 goto out_net_tx_busy;
1262         case -ENOMEM:
1263                 u64_stats_update_begin(&ring->syncp);
1264                 ring->stats.sw_err_cnt++;
1265                 u64_stats_update_end(&ring->syncp);
1266                 netdev_err(netdev, "no memory to xmit!\n");
1267
1268                 goto out_err_tx_ok;
1269         default:
1270                 break;
1271         }
1272
1273         /* No. of segments (plus a header) */
1274         seg_num = skb_shinfo(skb)->nr_frags + 1;
1275         /* Fill the first part */
1276         size = skb_headlen(skb);
1277
1278         next_to_use_head = ring->next_to_use;
1279
1280         ret = hns3_fill_desc(ring, skb, size, seg_num == 1 ? 1 : 0,
1281                              DESC_TYPE_SKB);
1282         if (unlikely(ret))
1283                 goto head_fill_err;
1284
1285         next_to_use_frag = ring->next_to_use;
1286         /* Fill the fragments */
1287         for (i = 1; i < seg_num; i++) {
1288                 frag = &skb_shinfo(skb)->frags[i - 1];
1289                 size = skb_frag_size(frag);
1290
1291                 ret = hns3_fill_desc(ring, frag, size,
1292                                      seg_num - 1 == i ? 1 : 0,
1293                                      DESC_TYPE_PAGE);
1294
1295                 if (unlikely(ret))
1296                         goto frag_fill_err;
1297         }
1298
1299         /* Complete translate all packets */
1300         dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1301         netdev_tx_sent_queue(dev_queue, skb->len);
1302
1303         wmb(); /* Commit all data before submit */
1304
1305         hnae3_queue_xmit(ring->tqp, buf_num);
1306
1307         return NETDEV_TX_OK;
1308
1309 frag_fill_err:
1310         hns3_clear_desc(ring, next_to_use_frag);
1311
1312 head_fill_err:
1313         hns3_clear_desc(ring, next_to_use_head);
1314
1315 out_err_tx_ok:
1316         dev_kfree_skb_any(skb);
1317         return NETDEV_TX_OK;
1318
1319 out_net_tx_busy:
1320         netif_stop_subqueue(netdev, ring_data->queue_index);
1321         smp_mb(); /* Commit all data before submit */
1322
1323         return NETDEV_TX_BUSY;
1324 }
1325
1326 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1327 {
1328         struct hnae3_handle *h = hns3_get_handle(netdev);
1329         struct sockaddr *mac_addr = p;
1330         int ret;
1331
1332         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1333                 return -EADDRNOTAVAIL;
1334
1335         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1336                 netdev_info(netdev, "already using mac address %pM\n",
1337                             mac_addr->sa_data);
1338                 return 0;
1339         }
1340
1341         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1342         if (ret) {
1343                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1344                 return ret;
1345         }
1346
1347         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1348
1349         return 0;
1350 }
1351
1352 static int hns3_nic_do_ioctl(struct net_device *netdev,
1353                              struct ifreq *ifr, int cmd)
1354 {
1355         struct hnae3_handle *h = hns3_get_handle(netdev);
1356
1357         if (!netif_running(netdev))
1358                 return -EINVAL;
1359
1360         if (!h->ae_algo->ops->do_ioctl)
1361                 return -EOPNOTSUPP;
1362
1363         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1364 }
1365
1366 static int hns3_nic_set_features(struct net_device *netdev,
1367                                  netdev_features_t features)
1368 {
1369         netdev_features_t changed = netdev->features ^ features;
1370         struct hns3_nic_priv *priv = netdev_priv(netdev);
1371         struct hnae3_handle *h = priv->ae_handle;
1372         bool enable;
1373         int ret;
1374
1375         if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1376                 if (features & (NETIF_F_TSO | NETIF_F_TSO6))
1377                         priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1378                 else
1379                         priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1380         }
1381
1382         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1383                 enable = !!(features & NETIF_F_GRO_HW);
1384                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1385                 if (ret)
1386                         return ret;
1387         }
1388
1389         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1390             h->ae_algo->ops->enable_vlan_filter) {
1391                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1392                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1393         }
1394
1395         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1396             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1397                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1398                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1399                 if (ret)
1400                         return ret;
1401         }
1402
1403         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1404                 enable = !!(features & NETIF_F_NTUPLE);
1405                 h->ae_algo->ops->enable_fd(h, enable);
1406         }
1407
1408         netdev->features = features;
1409         return 0;
1410 }
1411
1412 static void hns3_nic_get_stats64(struct net_device *netdev,
1413                                  struct rtnl_link_stats64 *stats)
1414 {
1415         struct hns3_nic_priv *priv = netdev_priv(netdev);
1416         int queue_num = priv->ae_handle->kinfo.num_tqps;
1417         struct hnae3_handle *handle = priv->ae_handle;
1418         struct hns3_enet_ring *ring;
1419         u64 rx_length_errors = 0;
1420         u64 rx_crc_errors = 0;
1421         u64 rx_multicast = 0;
1422         unsigned int start;
1423         u64 tx_errors = 0;
1424         u64 rx_errors = 0;
1425         unsigned int idx;
1426         u64 tx_bytes = 0;
1427         u64 rx_bytes = 0;
1428         u64 tx_pkts = 0;
1429         u64 rx_pkts = 0;
1430         u64 tx_drop = 0;
1431         u64 rx_drop = 0;
1432
1433         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1434                 return;
1435
1436         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1437
1438         for (idx = 0; idx < queue_num; idx++) {
1439                 /* fetch the tx stats */
1440                 ring = priv->ring_data[idx].ring;
1441                 do {
1442                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1443                         tx_bytes += ring->stats.tx_bytes;
1444                         tx_pkts += ring->stats.tx_pkts;
1445                         tx_drop += ring->stats.sw_err_cnt;
1446                         tx_errors += ring->stats.sw_err_cnt;
1447                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1448
1449                 /* fetch the rx stats */
1450                 ring = priv->ring_data[idx + queue_num].ring;
1451                 do {
1452                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1453                         rx_bytes += ring->stats.rx_bytes;
1454                         rx_pkts += ring->stats.rx_pkts;
1455                         rx_drop += ring->stats.non_vld_descs;
1456                         rx_drop += ring->stats.l2_err;
1457                         rx_errors += ring->stats.non_vld_descs;
1458                         rx_errors += ring->stats.l2_err;
1459                         rx_crc_errors += ring->stats.l2_err;
1460                         rx_crc_errors += ring->stats.l3l4_csum_err;
1461                         rx_multicast += ring->stats.rx_multicast;
1462                         rx_length_errors += ring->stats.err_pkt_len;
1463                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1464         }
1465
1466         stats->tx_bytes = tx_bytes;
1467         stats->tx_packets = tx_pkts;
1468         stats->rx_bytes = rx_bytes;
1469         stats->rx_packets = rx_pkts;
1470
1471         stats->rx_errors = rx_errors;
1472         stats->multicast = rx_multicast;
1473         stats->rx_length_errors = rx_length_errors;
1474         stats->rx_crc_errors = rx_crc_errors;
1475         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1476
1477         stats->tx_errors = tx_errors;
1478         stats->rx_dropped = rx_drop;
1479         stats->tx_dropped = tx_drop;
1480         stats->collisions = netdev->stats.collisions;
1481         stats->rx_over_errors = netdev->stats.rx_over_errors;
1482         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1483         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1484         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1485         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1486         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1487         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1488         stats->tx_window_errors = netdev->stats.tx_window_errors;
1489         stats->rx_compressed = netdev->stats.rx_compressed;
1490         stats->tx_compressed = netdev->stats.tx_compressed;
1491 }
1492
1493 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1494 {
1495         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1496         struct hnae3_handle *h = hns3_get_handle(netdev);
1497         struct hnae3_knic_private_info *kinfo = &h->kinfo;
1498         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1499         u8 tc = mqprio_qopt->qopt.num_tc;
1500         u16 mode = mqprio_qopt->mode;
1501         u8 hw = mqprio_qopt->qopt.hw;
1502
1503         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1504                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1505                 return -EOPNOTSUPP;
1506
1507         if (tc > HNAE3_MAX_TC)
1508                 return -EINVAL;
1509
1510         if (!netdev)
1511                 return -EINVAL;
1512
1513         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1514                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1515 }
1516
1517 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1518                              void *type_data)
1519 {
1520         if (type != TC_SETUP_QDISC_MQPRIO)
1521                 return -EOPNOTSUPP;
1522
1523         return hns3_setup_tc(dev, type_data);
1524 }
1525
1526 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1527                                 __be16 proto, u16 vid)
1528 {
1529         struct hnae3_handle *h = hns3_get_handle(netdev);
1530         struct hns3_nic_priv *priv = netdev_priv(netdev);
1531         int ret = -EIO;
1532
1533         if (h->ae_algo->ops->set_vlan_filter)
1534                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1535
1536         if (!ret)
1537                 set_bit(vid, priv->active_vlans);
1538
1539         return ret;
1540 }
1541
1542 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1543                                  __be16 proto, u16 vid)
1544 {
1545         struct hnae3_handle *h = hns3_get_handle(netdev);
1546         struct hns3_nic_priv *priv = netdev_priv(netdev);
1547         int ret = -EIO;
1548
1549         if (h->ae_algo->ops->set_vlan_filter)
1550                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1551
1552         if (!ret)
1553                 clear_bit(vid, priv->active_vlans);
1554
1555         return ret;
1556 }
1557
1558 static int hns3_restore_vlan(struct net_device *netdev)
1559 {
1560         struct hns3_nic_priv *priv = netdev_priv(netdev);
1561         int ret = 0;
1562         u16 vid;
1563
1564         for_each_set_bit(vid, priv->active_vlans, VLAN_N_VID) {
1565                 ret = hns3_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
1566                 if (ret) {
1567                         netdev_err(netdev, "Restore vlan: %d filter, ret:%d\n",
1568                                    vid, ret);
1569                         return ret;
1570                 }
1571         }
1572
1573         return ret;
1574 }
1575
1576 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1577                                 u8 qos, __be16 vlan_proto)
1578 {
1579         struct hnae3_handle *h = hns3_get_handle(netdev);
1580         int ret = -EIO;
1581
1582         if (h->ae_algo->ops->set_vf_vlan_filter)
1583                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1584                                                    qos, vlan_proto);
1585
1586         return ret;
1587 }
1588
1589 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1590 {
1591         struct hnae3_handle *h = hns3_get_handle(netdev);
1592         int ret;
1593
1594         if (hns3_nic_resetting(netdev))
1595                 return -EBUSY;
1596
1597         if (!h->ae_algo->ops->set_mtu)
1598                 return -EOPNOTSUPP;
1599
1600         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1601         if (ret)
1602                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1603                            ret);
1604         else
1605                 netdev->mtu = new_mtu;
1606
1607         return ret;
1608 }
1609
1610 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1611 {
1612         struct hns3_nic_priv *priv = netdev_priv(ndev);
1613         struct hns3_enet_ring *tx_ring = NULL;
1614         int timeout_queue = 0;
1615         int hw_head, hw_tail;
1616         int i;
1617
1618         /* Find the stopped queue the same way the stack does */
1619         for (i = 0; i < ndev->real_num_tx_queues; i++) {
1620                 struct netdev_queue *q;
1621                 unsigned long trans_start;
1622
1623                 q = netdev_get_tx_queue(ndev, i);
1624                 trans_start = q->trans_start;
1625                 if (netif_xmit_stopped(q) &&
1626                     time_after(jiffies,
1627                                (trans_start + ndev->watchdog_timeo))) {
1628                         timeout_queue = i;
1629                         break;
1630                 }
1631         }
1632
1633         if (i == ndev->num_tx_queues) {
1634                 netdev_info(ndev,
1635                             "no netdev TX timeout queue found, timeout count: %llu\n",
1636                             priv->tx_timeout_count);
1637                 return false;
1638         }
1639
1640         tx_ring = priv->ring_data[timeout_queue].ring;
1641
1642         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1643                                 HNS3_RING_TX_RING_HEAD_REG);
1644         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1645                                 HNS3_RING_TX_RING_TAIL_REG);
1646         netdev_info(ndev,
1647                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1648                     priv->tx_timeout_count,
1649                     timeout_queue,
1650                     tx_ring->next_to_use,
1651                     tx_ring->next_to_clean,
1652                     hw_head,
1653                     hw_tail,
1654                     readl(tx_ring->tqp_vector->mask_addr));
1655
1656         return true;
1657 }
1658
1659 static void hns3_nic_net_timeout(struct net_device *ndev)
1660 {
1661         struct hns3_nic_priv *priv = netdev_priv(ndev);
1662         struct hnae3_handle *h = priv->ae_handle;
1663
1664         if (!hns3_get_tx_timeo_queue_info(ndev))
1665                 return;
1666
1667         priv->tx_timeout_count++;
1668
1669         /* request the reset, and let the hclge to determine
1670          * which reset level should be done
1671          */
1672         if (h->ae_algo->ops->reset_event)
1673                 h->ae_algo->ops->reset_event(h->pdev, h);
1674 }
1675
1676 static const struct net_device_ops hns3_nic_netdev_ops = {
1677         .ndo_open               = hns3_nic_net_open,
1678         .ndo_stop               = hns3_nic_net_stop,
1679         .ndo_start_xmit         = hns3_nic_net_xmit,
1680         .ndo_tx_timeout         = hns3_nic_net_timeout,
1681         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
1682         .ndo_do_ioctl           = hns3_nic_do_ioctl,
1683         .ndo_change_mtu         = hns3_nic_change_mtu,
1684         .ndo_set_features       = hns3_nic_set_features,
1685         .ndo_get_stats64        = hns3_nic_get_stats64,
1686         .ndo_setup_tc           = hns3_nic_setup_tc,
1687         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
1688         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
1689         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
1690         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
1691 };
1692
1693 static bool hns3_is_phys_func(struct pci_dev *pdev)
1694 {
1695         u32 dev_id = pdev->device;
1696
1697         switch (dev_id) {
1698         case HNAE3_DEV_ID_GE:
1699         case HNAE3_DEV_ID_25GE:
1700         case HNAE3_DEV_ID_25GE_RDMA:
1701         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
1702         case HNAE3_DEV_ID_50GE_RDMA:
1703         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
1704         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
1705                 return true;
1706         case HNAE3_DEV_ID_100G_VF:
1707         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
1708                 return false;
1709         default:
1710                 dev_warn(&pdev->dev, "un-recognized pci device-id %d",
1711                          dev_id);
1712         }
1713
1714         return false;
1715 }
1716
1717 static void hns3_disable_sriov(struct pci_dev *pdev)
1718 {
1719         /* If our VFs are assigned we cannot shut down SR-IOV
1720          * without causing issues, so just leave the hardware
1721          * available but disabled
1722          */
1723         if (pci_vfs_assigned(pdev)) {
1724                 dev_warn(&pdev->dev,
1725                          "disabling driver while VFs are assigned\n");
1726                 return;
1727         }
1728
1729         pci_disable_sriov(pdev);
1730 }
1731
1732 static void hns3_get_dev_capability(struct pci_dev *pdev,
1733                                     struct hnae3_ae_dev *ae_dev)
1734 {
1735         if (pdev->revision >= 0x21) {
1736                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
1737                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
1738         }
1739 }
1740
1741 /* hns3_probe - Device initialization routine
1742  * @pdev: PCI device information struct
1743  * @ent: entry in hns3_pci_tbl
1744  *
1745  * hns3_probe initializes a PF identified by a pci_dev structure.
1746  * The OS initialization, configuring of the PF private structure,
1747  * and a hardware reset occur.
1748  *
1749  * Returns 0 on success, negative on failure
1750  */
1751 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1752 {
1753         struct hnae3_ae_dev *ae_dev;
1754         int ret;
1755
1756         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1757                               GFP_KERNEL);
1758         if (!ae_dev) {
1759                 ret = -ENOMEM;
1760                 return ret;
1761         }
1762
1763         ae_dev->pdev = pdev;
1764         ae_dev->flag = ent->driver_data;
1765         ae_dev->dev_type = HNAE3_DEV_KNIC;
1766         ae_dev->reset_type = HNAE3_NONE_RESET;
1767         hns3_get_dev_capability(pdev, ae_dev);
1768         pci_set_drvdata(pdev, ae_dev);
1769
1770         ret = hnae3_register_ae_dev(ae_dev);
1771         if (ret) {
1772                 devm_kfree(&pdev->dev, ae_dev);
1773                 pci_set_drvdata(pdev, NULL);
1774         }
1775
1776         return ret;
1777 }
1778
1779 /* hns3_remove - Device removal routine
1780  * @pdev: PCI device information struct
1781  */
1782 static void hns3_remove(struct pci_dev *pdev)
1783 {
1784         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1785
1786         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
1787                 hns3_disable_sriov(pdev);
1788
1789         hnae3_unregister_ae_dev(ae_dev);
1790         pci_set_drvdata(pdev, NULL);
1791 }
1792
1793 /**
1794  * hns3_pci_sriov_configure
1795  * @pdev: pointer to a pci_dev structure
1796  * @num_vfs: number of VFs to allocate
1797  *
1798  * Enable or change the number of VFs. Called when the user updates the number
1799  * of VFs in sysfs.
1800  **/
1801 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1802 {
1803         int ret;
1804
1805         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
1806                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
1807                 return -EINVAL;
1808         }
1809
1810         if (num_vfs) {
1811                 ret = pci_enable_sriov(pdev, num_vfs);
1812                 if (ret)
1813                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
1814                 else
1815                         return num_vfs;
1816         } else if (!pci_vfs_assigned(pdev)) {
1817                 pci_disable_sriov(pdev);
1818         } else {
1819                 dev_warn(&pdev->dev,
1820                          "Unable to free VFs because some are assigned to VMs.\n");
1821         }
1822
1823         return 0;
1824 }
1825
1826 static void hns3_shutdown(struct pci_dev *pdev)
1827 {
1828         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1829
1830         hnae3_unregister_ae_dev(ae_dev);
1831         devm_kfree(&pdev->dev, ae_dev);
1832         pci_set_drvdata(pdev, NULL);
1833
1834         if (system_state == SYSTEM_POWER_OFF)
1835                 pci_set_power_state(pdev, PCI_D3hot);
1836 }
1837
1838 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
1839                                             pci_channel_state_t state)
1840 {
1841         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1842         pci_ers_result_t ret;
1843
1844         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
1845
1846         if (state == pci_channel_io_perm_failure)
1847                 return PCI_ERS_RESULT_DISCONNECT;
1848
1849         if (!ae_dev) {
1850                 dev_err(&pdev->dev,
1851                         "Can't recover - error happened during device init\n");
1852                 return PCI_ERS_RESULT_NONE;
1853         }
1854
1855         if (ae_dev->ops->handle_hw_ras_error)
1856                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
1857         else
1858                 return PCI_ERS_RESULT_NONE;
1859
1860         return ret;
1861 }
1862
1863 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
1864 {
1865         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1866         struct device *dev = &pdev->dev;
1867
1868         dev_info(dev, "requesting reset due to PCI error\n");
1869
1870         /* request the reset */
1871         if (ae_dev->ops->reset_event) {
1872                 if (!ae_dev->override_pci_need_reset)
1873                         ae_dev->ops->reset_event(pdev, NULL);
1874
1875                 return PCI_ERS_RESULT_RECOVERED;
1876         }
1877
1878         return PCI_ERS_RESULT_DISCONNECT;
1879 }
1880
1881 static void hns3_reset_prepare(struct pci_dev *pdev)
1882 {
1883         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1884
1885         dev_info(&pdev->dev, "hns3 flr prepare\n");
1886         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
1887                 ae_dev->ops->flr_prepare(ae_dev);
1888 }
1889
1890 static void hns3_reset_done(struct pci_dev *pdev)
1891 {
1892         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1893
1894         dev_info(&pdev->dev, "hns3 flr done\n");
1895         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
1896                 ae_dev->ops->flr_done(ae_dev);
1897 }
1898
1899 static const struct pci_error_handlers hns3_err_handler = {
1900         .error_detected = hns3_error_detected,
1901         .slot_reset     = hns3_slot_reset,
1902         .reset_prepare  = hns3_reset_prepare,
1903         .reset_done     = hns3_reset_done,
1904 };
1905
1906 static struct pci_driver hns3_driver = {
1907         .name     = hns3_driver_name,
1908         .id_table = hns3_pci_tbl,
1909         .probe    = hns3_probe,
1910         .remove   = hns3_remove,
1911         .shutdown = hns3_shutdown,
1912         .sriov_configure = hns3_pci_sriov_configure,
1913         .err_handler    = &hns3_err_handler,
1914 };
1915
1916 /* set default feature to hns3 */
1917 static void hns3_set_default_feature(struct net_device *netdev)
1918 {
1919         struct hnae3_handle *h = hns3_get_handle(netdev);
1920         struct pci_dev *pdev = h->pdev;
1921
1922         netdev->priv_flags |= IFF_UNICAST_FLT;
1923
1924         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1925                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1926                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1927                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1928                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1929
1930         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1931
1932         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1933
1934         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1935                 NETIF_F_HW_VLAN_CTAG_FILTER |
1936                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1937                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1938                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1939                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1940                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1941
1942         netdev->vlan_features |=
1943                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1944                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1945                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1946                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1947                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1948
1949         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1950                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
1951                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1952                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1953                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1954                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC;
1955
1956         if (pdev->revision >= 0x21) {
1957                 netdev->hw_features |= NETIF_F_GRO_HW;
1958                 netdev->features |= NETIF_F_GRO_HW;
1959
1960                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
1961                         netdev->hw_features |= NETIF_F_NTUPLE;
1962                         netdev->features |= NETIF_F_NTUPLE;
1963                 }
1964         }
1965 }
1966
1967 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1968                              struct hns3_desc_cb *cb)
1969 {
1970         unsigned int order = hnae3_page_order(ring);
1971         struct page *p;
1972
1973         p = dev_alloc_pages(order);
1974         if (!p)
1975                 return -ENOMEM;
1976
1977         cb->priv = p;
1978         cb->page_offset = 0;
1979         cb->reuse_flag = 0;
1980         cb->buf  = page_address(p);
1981         cb->length = hnae3_page_size(ring);
1982         cb->type = DESC_TYPE_PAGE;
1983
1984         return 0;
1985 }
1986
1987 static void hns3_free_buffer(struct hns3_enet_ring *ring,
1988                              struct hns3_desc_cb *cb)
1989 {
1990         if (cb->type == DESC_TYPE_SKB)
1991                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1992         else if (!HNAE3_IS_TX_RING(ring))
1993                 put_page((struct page *)cb->priv);
1994         memset(cb, 0, sizeof(*cb));
1995 }
1996
1997 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1998 {
1999         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2000                                cb->length, ring_to_dma_dir(ring));
2001
2002         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2003                 return -EIO;
2004
2005         return 0;
2006 }
2007
2008 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2009                               struct hns3_desc_cb *cb)
2010 {
2011         if (cb->type == DESC_TYPE_SKB)
2012                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2013                                  ring_to_dma_dir(ring));
2014         else if (cb->length)
2015                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2016                                ring_to_dma_dir(ring));
2017 }
2018
2019 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2020 {
2021         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2022         ring->desc[i].addr = 0;
2023 }
2024
2025 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2026 {
2027         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2028
2029         if (!ring->desc_cb[i].dma)
2030                 return;
2031
2032         hns3_buffer_detach(ring, i);
2033         hns3_free_buffer(ring, cb);
2034 }
2035
2036 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2037 {
2038         int i;
2039
2040         for (i = 0; i < ring->desc_num; i++)
2041                 hns3_free_buffer_detach(ring, i);
2042 }
2043
2044 /* free desc along with its attached buffer */
2045 static void hns3_free_desc(struct hns3_enet_ring *ring)
2046 {
2047         int size = ring->desc_num * sizeof(ring->desc[0]);
2048
2049         hns3_free_buffers(ring);
2050
2051         if (ring->desc) {
2052                 dma_free_coherent(ring_to_dev(ring), size,
2053                                   ring->desc, ring->desc_dma_addr);
2054                 ring->desc = NULL;
2055         }
2056 }
2057
2058 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2059 {
2060         int size = ring->desc_num * sizeof(ring->desc[0]);
2061
2062         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2063                                         &ring->desc_dma_addr, GFP_KERNEL);
2064         if (!ring->desc)
2065                 return -ENOMEM;
2066
2067         return 0;
2068 }
2069
2070 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2071                                    struct hns3_desc_cb *cb)
2072 {
2073         int ret;
2074
2075         ret = hns3_alloc_buffer(ring, cb);
2076         if (ret)
2077                 goto out;
2078
2079         ret = hns3_map_buffer(ring, cb);
2080         if (ret)
2081                 goto out_with_buf;
2082
2083         return 0;
2084
2085 out_with_buf:
2086         hns3_free_buffer(ring, cb);
2087 out:
2088         return ret;
2089 }
2090
2091 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2092 {
2093         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2094
2095         if (ret)
2096                 return ret;
2097
2098         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2099
2100         return 0;
2101 }
2102
2103 /* Allocate memory for raw pkg, and map with dma */
2104 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2105 {
2106         int i, j, ret;
2107
2108         for (i = 0; i < ring->desc_num; i++) {
2109                 ret = hns3_alloc_buffer_attach(ring, i);
2110                 if (ret)
2111                         goto out_buffer_fail;
2112         }
2113
2114         return 0;
2115
2116 out_buffer_fail:
2117         for (j = i - 1; j >= 0; j--)
2118                 hns3_free_buffer_detach(ring, j);
2119         return ret;
2120 }
2121
2122 /* detach a in-used buffer and replace with a reserved one  */
2123 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2124                                 struct hns3_desc_cb *res_cb)
2125 {
2126         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2127         ring->desc_cb[i] = *res_cb;
2128         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2129         ring->desc[i].rx.bd_base_info = 0;
2130 }
2131
2132 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2133 {
2134         ring->desc_cb[i].reuse_flag = 0;
2135         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
2136                 + ring->desc_cb[i].page_offset);
2137         ring->desc[i].rx.bd_base_info = 0;
2138 }
2139
2140 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
2141                                       int *pkts)
2142 {
2143         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2144
2145         (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2146         (*bytes) += desc_cb->length;
2147         /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
2148         hns3_free_buffer_detach(ring, ring->next_to_clean);
2149
2150         ring_ptr_move_fw(ring, next_to_clean);
2151 }
2152
2153 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2154 {
2155         int u = ring->next_to_use;
2156         int c = ring->next_to_clean;
2157
2158         if (unlikely(h > ring->desc_num))
2159                 return 0;
2160
2161         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2162 }
2163
2164 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2165 {
2166         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2167         struct hns3_nic_priv *priv = netdev_priv(netdev);
2168         struct netdev_queue *dev_queue;
2169         int bytes, pkts;
2170         int head;
2171
2172         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2173         rmb(); /* Make sure head is ready before touch any data */
2174
2175         if (is_ring_empty(ring) || head == ring->next_to_clean)
2176                 return; /* no data to poll */
2177
2178         if (unlikely(!is_valid_clean_head(ring, head))) {
2179                 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
2180                            ring->next_to_use, ring->next_to_clean);
2181
2182                 u64_stats_update_begin(&ring->syncp);
2183                 ring->stats.io_err_cnt++;
2184                 u64_stats_update_end(&ring->syncp);
2185                 return;
2186         }
2187
2188         bytes = 0;
2189         pkts = 0;
2190         while (head != ring->next_to_clean) {
2191                 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
2192                 /* Issue prefetch for next Tx descriptor */
2193                 prefetch(&ring->desc_cb[ring->next_to_clean]);
2194         }
2195
2196         ring->tqp_vector->tx_group.total_bytes += bytes;
2197         ring->tqp_vector->tx_group.total_packets += pkts;
2198
2199         u64_stats_update_begin(&ring->syncp);
2200         ring->stats.tx_bytes += bytes;
2201         ring->stats.tx_pkts += pkts;
2202         u64_stats_update_end(&ring->syncp);
2203
2204         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2205         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2206
2207         if (unlikely(pkts && netif_carrier_ok(netdev) &&
2208                      (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
2209                 /* Make sure that anybody stopping the queue after this
2210                  * sees the new next_to_clean.
2211                  */
2212                 smp_mb();
2213                 if (netif_tx_queue_stopped(dev_queue) &&
2214                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2215                         netif_tx_wake_queue(dev_queue);
2216                         ring->stats.restart_queue++;
2217                 }
2218         }
2219 }
2220
2221 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2222 {
2223         int ntc = ring->next_to_clean;
2224         int ntu = ring->next_to_use;
2225
2226         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2227 }
2228
2229 static void
2230 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
2231 {
2232         struct hns3_desc_cb *desc_cb;
2233         struct hns3_desc_cb res_cbs;
2234         int i, ret;
2235
2236         for (i = 0; i < cleand_count; i++) {
2237                 desc_cb = &ring->desc_cb[ring->next_to_use];
2238                 if (desc_cb->reuse_flag) {
2239                         u64_stats_update_begin(&ring->syncp);
2240                         ring->stats.reuse_pg_cnt++;
2241                         u64_stats_update_end(&ring->syncp);
2242
2243                         hns3_reuse_buffer(ring, ring->next_to_use);
2244                 } else {
2245                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2246                         if (ret) {
2247                                 u64_stats_update_begin(&ring->syncp);
2248                                 ring->stats.sw_err_cnt++;
2249                                 u64_stats_update_end(&ring->syncp);
2250
2251                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2252                                            "hnae reserve buffer map failed.\n");
2253                                 break;
2254                         }
2255                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2256                 }
2257
2258                 ring_ptr_move_fw(ring, next_to_use);
2259         }
2260
2261         wmb(); /* Make all data has been write before submit */
2262         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2263 }
2264
2265 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2266                                 struct hns3_enet_ring *ring, int pull_len,
2267                                 struct hns3_desc_cb *desc_cb)
2268 {
2269         struct hns3_desc *desc;
2270         u32 truesize;
2271         int size;
2272         int last_offset;
2273         bool twobufs;
2274
2275         twobufs = ((PAGE_SIZE < 8192) &&
2276                 hnae3_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2277
2278         desc = &ring->desc[ring->next_to_clean];
2279         size = le16_to_cpu(desc->rx.size);
2280
2281         truesize = hnae3_buf_size(ring);
2282
2283         if (!twobufs)
2284                 last_offset = hnae3_page_size(ring) - hnae3_buf_size(ring);
2285
2286         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2287                         size - pull_len, truesize);
2288
2289          /* Avoid re-using remote pages,flag default unreuse */
2290         if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2291                 return;
2292
2293         if (twobufs) {
2294                 /* If we are only owner of page we can reuse it */
2295                 if (likely(page_count(desc_cb->priv) == 1)) {
2296                         /* Flip page offset to other buffer */
2297                         desc_cb->page_offset ^= truesize;
2298
2299                         desc_cb->reuse_flag = 1;
2300                         /* bump ref count on page before it is given*/
2301                         get_page(desc_cb->priv);
2302                 }
2303                 return;
2304         }
2305
2306         /* Move offset up to the next cache line */
2307         desc_cb->page_offset += truesize;
2308
2309         if (desc_cb->page_offset <= last_offset) {
2310                 desc_cb->reuse_flag = 1;
2311                 /* Bump ref count on page before it is given*/
2312                 get_page(desc_cb->priv);
2313         }
2314 }
2315
2316 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2317                              struct hns3_desc *desc)
2318 {
2319         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2320         int l3_type, l4_type;
2321         u32 bd_base_info;
2322         int ol4_type;
2323         u32 l234info;
2324
2325         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2326         l234info = le32_to_cpu(desc->rx.l234_info);
2327
2328         skb->ip_summed = CHECKSUM_NONE;
2329
2330         skb_checksum_none_assert(skb);
2331
2332         if (!(netdev->features & NETIF_F_RXCSUM))
2333                 return;
2334
2335         /* We MUST enable hardware checksum before enabling hardware GRO */
2336         if (skb_shinfo(skb)->gso_size) {
2337                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2338                 return;
2339         }
2340
2341         /* check if hardware has done checksum */
2342         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2343                 return;
2344
2345         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2346                                  BIT(HNS3_RXD_OL3E_B) |
2347                                  BIT(HNS3_RXD_OL4E_B)))) {
2348                 u64_stats_update_begin(&ring->syncp);
2349                 ring->stats.l3l4_csum_err++;
2350                 u64_stats_update_end(&ring->syncp);
2351
2352                 return;
2353         }
2354
2355         ol4_type = hnae3_get_field(l234info, HNS3_RXD_OL4ID_M,
2356                                    HNS3_RXD_OL4ID_S);
2357         switch (ol4_type) {
2358         case HNS3_OL4_TYPE_MAC_IN_UDP:
2359         case HNS3_OL4_TYPE_NVGRE:
2360                 skb->csum_level = 1;
2361                 /* fall through */
2362         case HNS3_OL4_TYPE_NO_TUN:
2363                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2364                                           HNS3_RXD_L3ID_S);
2365                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2366                                           HNS3_RXD_L4ID_S);
2367
2368                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2369                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2370                      l3_type == HNS3_L3_TYPE_IPV6) &&
2371                     (l4_type == HNS3_L4_TYPE_UDP ||
2372                      l4_type == HNS3_L4_TYPE_TCP ||
2373                      l4_type == HNS3_L4_TYPE_SCTP))
2374                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2375                 break;
2376         default:
2377                 break;
2378         }
2379 }
2380
2381 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2382 {
2383         if (skb_has_frag_list(skb))
2384                 napi_gro_flush(&ring->tqp_vector->napi, false);
2385
2386         napi_gro_receive(&ring->tqp_vector->napi, skb);
2387 }
2388
2389 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2390                                 struct hns3_desc *desc, u32 l234info,
2391                                 u16 *vlan_tag)
2392 {
2393         struct pci_dev *pdev = ring->tqp->handle->pdev;
2394
2395         if (pdev->revision == 0x20) {
2396                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2397                 if (!(*vlan_tag & VLAN_VID_MASK))
2398                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2399
2400                 return (*vlan_tag != 0);
2401         }
2402
2403 #define HNS3_STRP_OUTER_VLAN    0x1
2404 #define HNS3_STRP_INNER_VLAN    0x2
2405
2406         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2407                                 HNS3_RXD_STRP_TAGP_S)) {
2408         case HNS3_STRP_OUTER_VLAN:
2409                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2410                 return true;
2411         case HNS3_STRP_INNER_VLAN:
2412                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2413                 return true;
2414         default:
2415                 return false;
2416         }
2417 }
2418
2419 static int hns3_alloc_skb(struct hns3_enet_ring *ring, int length,
2420                           unsigned char *va)
2421 {
2422 #define HNS3_NEED_ADD_FRAG      1
2423         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2424         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2425         struct sk_buff *skb;
2426
2427         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2428         skb = ring->skb;
2429         if (unlikely(!skb)) {
2430                 netdev_err(netdev, "alloc rx skb fail\n");
2431
2432                 u64_stats_update_begin(&ring->syncp);
2433                 ring->stats.sw_err_cnt++;
2434                 u64_stats_update_end(&ring->syncp);
2435
2436                 return -ENOMEM;
2437         }
2438
2439         prefetchw(skb->data);
2440
2441         ring->pending_buf = 1;
2442         ring->frag_num = 0;
2443         ring->tail_skb = NULL;
2444         if (length <= HNS3_RX_HEAD_SIZE) {
2445                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2446
2447                 /* We can reuse buffer as-is, just make sure it is local */
2448                 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2449                         desc_cb->reuse_flag = 1;
2450                 else /* This page cannot be reused so discard it */
2451                         put_page(desc_cb->priv);
2452
2453                 ring_ptr_move_fw(ring, next_to_clean);
2454                 return 0;
2455         }
2456         u64_stats_update_begin(&ring->syncp);
2457         ring->stats.seg_pkt_cnt++;
2458         u64_stats_update_end(&ring->syncp);
2459
2460         ring->pull_len = eth_get_headlen(va, HNS3_RX_HEAD_SIZE);
2461         __skb_put(skb, ring->pull_len);
2462         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2463                             desc_cb);
2464         ring_ptr_move_fw(ring, next_to_clean);
2465
2466         return HNS3_NEED_ADD_FRAG;
2467 }
2468
2469 static int hns3_add_frag(struct hns3_enet_ring *ring, struct hns3_desc *desc,
2470                          struct sk_buff **out_skb, bool pending)
2471 {
2472         struct sk_buff *skb = *out_skb;
2473         struct sk_buff *head_skb = *out_skb;
2474         struct sk_buff *new_skb;
2475         struct hns3_desc_cb *desc_cb;
2476         struct hns3_desc *pre_desc;
2477         u32 bd_base_info;
2478         int pre_bd;
2479
2480         /* if there is pending bd, the SW param next_to_clean has moved
2481          * to next and the next is NULL
2482          */
2483         if (pending) {
2484                 pre_bd = (ring->next_to_clean - 1 + ring->desc_num) %
2485                         ring->desc_num;
2486                 pre_desc = &ring->desc[pre_bd];
2487                 bd_base_info = le32_to_cpu(pre_desc->rx.bd_base_info);
2488         } else {
2489                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2490         }
2491
2492         while (!(bd_base_info & BIT(HNS3_RXD_FE_B))) {
2493                 desc = &ring->desc[ring->next_to_clean];
2494                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2495                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2496                 /* make sure HW write desc complete */
2497                 dma_rmb();
2498                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2499                         return -ENXIO;
2500
2501                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2502                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2503                                                  HNS3_RX_HEAD_SIZE);
2504                         if (unlikely(!new_skb)) {
2505                                 netdev_err(ring->tqp->handle->kinfo.netdev,
2506                                            "alloc rx skb frag fail\n");
2507                                 return -ENXIO;
2508                         }
2509                         ring->frag_num = 0;
2510
2511                         if (ring->tail_skb) {
2512                                 ring->tail_skb->next = new_skb;
2513                                 ring->tail_skb = new_skb;
2514                         } else {
2515                                 skb_shinfo(skb)->frag_list = new_skb;
2516                                 ring->tail_skb = new_skb;
2517                         }
2518                 }
2519
2520                 if (ring->tail_skb) {
2521                         head_skb->truesize += hnae3_buf_size(ring);
2522                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2523                         head_skb->len += le16_to_cpu(desc->rx.size);
2524                         skb = ring->tail_skb;
2525                 }
2526
2527                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2528                 ring_ptr_move_fw(ring, next_to_clean);
2529                 ring->pending_buf++;
2530         }
2531
2532         return 0;
2533 }
2534
2535 static void hns3_set_gro_param(struct sk_buff *skb, u32 l234info,
2536                                u32 bd_base_info)
2537 {
2538         u16 gro_count;
2539         u32 l3_type;
2540
2541         gro_count = hnae3_get_field(l234info, HNS3_RXD_GRO_COUNT_M,
2542                                     HNS3_RXD_GRO_COUNT_S);
2543         /* if there is no HW GRO, do not set gro params */
2544         if (!gro_count)
2545                 return;
2546
2547         /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
2548          * to skb_shinfo(skb)->gso_segs
2549          */
2550         NAPI_GRO_CB(skb)->count = gro_count;
2551
2552         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2553                                   HNS3_RXD_L3ID_S);
2554         if (l3_type == HNS3_L3_TYPE_IPV4)
2555                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2556         else if (l3_type == HNS3_L3_TYPE_IPV6)
2557                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2558         else
2559                 return;
2560
2561         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2562                                                     HNS3_RXD_GRO_SIZE_M,
2563                                                     HNS3_RXD_GRO_SIZE_S);
2564         if (skb_shinfo(skb)->gso_size)
2565                 tcp_gro_complete(skb);
2566 }
2567
2568 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2569                                      struct sk_buff *skb)
2570 {
2571         struct hnae3_handle *handle = ring->tqp->handle;
2572         enum pkt_hash_types rss_type;
2573         struct hns3_desc *desc;
2574         int last_bd;
2575
2576         /* When driver handle the rss type, ring->next_to_clean indicates the
2577          * first descriptor of next packet, need -1 here.
2578          */
2579         last_bd = (ring->next_to_clean - 1 + ring->desc_num) % ring->desc_num;
2580         desc = &ring->desc[last_bd];
2581
2582         if (le32_to_cpu(desc->rx.rss_hash))
2583                 rss_type = handle->kinfo.rss_type;
2584         else
2585                 rss_type = PKT_HASH_TYPE_NONE;
2586
2587         skb_set_hash(skb, le32_to_cpu(desc->rx.rss_hash), rss_type);
2588 }
2589
2590 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2591                              struct sk_buff **out_skb)
2592 {
2593         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2594         enum hns3_pkt_l2t_type l2_frame_type;
2595         struct sk_buff *skb = ring->skb;
2596         struct hns3_desc_cb *desc_cb;
2597         struct hns3_desc *desc;
2598         u32 bd_base_info;
2599         u32 l234info;
2600         int length;
2601         int ret;
2602
2603         desc = &ring->desc[ring->next_to_clean];
2604         desc_cb = &ring->desc_cb[ring->next_to_clean];
2605
2606         prefetch(desc);
2607
2608         length = le16_to_cpu(desc->rx.size);
2609         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2610
2611         /* Check valid BD */
2612         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
2613                 return -ENXIO;
2614
2615         if (!skb)
2616                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2617
2618         /* Prefetch first cache line of first page
2619          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2620          * line size is 64B so need to prefetch twice to make it 128B. But in
2621          * actual we can have greater size of caches with 128B Level 1 cache
2622          * lines. In such a case, single fetch would suffice to cache in the
2623          * relevant part of the header.
2624          */
2625         prefetch(ring->va);
2626 #if L1_CACHE_BYTES < 128
2627         prefetch(ring->va + L1_CACHE_BYTES);
2628 #endif
2629
2630         if (!skb) {
2631                 ret = hns3_alloc_skb(ring, length, ring->va);
2632                 *out_skb = skb = ring->skb;
2633
2634                 if (ret < 0) /* alloc buffer fail */
2635                         return ret;
2636                 if (ret > 0) { /* need add frag */
2637                         ret = hns3_add_frag(ring, desc, &skb, false);
2638                         if (ret)
2639                                 return ret;
2640
2641                         /* As the head data may be changed when GRO enable, copy
2642                          * the head data in after other data rx completed
2643                          */
2644                         memcpy(skb->data, ring->va,
2645                                ALIGN(ring->pull_len, sizeof(long)));
2646                 }
2647         } else {
2648                 ret = hns3_add_frag(ring, desc, &skb, true);
2649                 if (ret)
2650                         return ret;
2651
2652                 /* As the head data may be changed when GRO enable, copy
2653                  * the head data in after other data rx completed
2654                  */
2655                 memcpy(skb->data, ring->va,
2656                        ALIGN(ring->pull_len, sizeof(long)));
2657         }
2658
2659         l234info = le32_to_cpu(desc->rx.l234_info);
2660         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2661
2662         /* Based on hw strategy, the tag offloaded will be stored at
2663          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2664          * in one layer tag case.
2665          */
2666         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2667                 u16 vlan_tag;
2668
2669                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
2670                         __vlan_hwaccel_put_tag(skb,
2671                                                htons(ETH_P_8021Q),
2672                                                vlan_tag);
2673         }
2674
2675         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B)))) {
2676                 u64_stats_update_begin(&ring->syncp);
2677                 ring->stats.non_vld_descs++;
2678                 u64_stats_update_end(&ring->syncp);
2679
2680                 dev_kfree_skb_any(skb);
2681                 return -EINVAL;
2682         }
2683
2684         if (unlikely((!desc->rx.pkt_len) ||
2685                      (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
2686                                   BIT(HNS3_RXD_L2E_B))))) {
2687                 u64_stats_update_begin(&ring->syncp);
2688                 if (l234info & BIT(HNS3_RXD_L2E_B))
2689                         ring->stats.l2_err++;
2690                 else
2691                         ring->stats.err_pkt_len++;
2692                 u64_stats_update_end(&ring->syncp);
2693
2694                 dev_kfree_skb_any(skb);
2695                 return -EFAULT;
2696         }
2697
2698
2699         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
2700                                         HNS3_RXD_DMAC_S);
2701         u64_stats_update_begin(&ring->syncp);
2702         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
2703                 ring->stats.rx_multicast++;
2704
2705         ring->stats.rx_pkts++;
2706         ring->stats.rx_bytes += skb->len;
2707         u64_stats_update_end(&ring->syncp);
2708
2709         ring->tqp_vector->rx_group.total_bytes += skb->len;
2710
2711         /* This is needed in order to enable forwarding support */
2712         hns3_set_gro_param(skb, l234info, bd_base_info);
2713
2714         hns3_rx_checksum(ring, skb, desc);
2715         *out_skb = skb;
2716         hns3_set_rx_skb_rss_type(ring, skb);
2717
2718         return 0;
2719 }
2720
2721 int hns3_clean_rx_ring(
2722                 struct hns3_enet_ring *ring, int budget,
2723                 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
2724 {
2725 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2726         struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2727         int recv_pkts, recv_bds, clean_count, err;
2728         int unused_count = hns3_desc_unused(ring) - ring->pending_buf;
2729         struct sk_buff *skb = ring->skb;
2730         int num;
2731
2732         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2733         rmb(); /* Make sure num taken effect before the other data is touched */
2734
2735         recv_pkts = 0, recv_bds = 0, clean_count = 0;
2736         num -= unused_count;
2737
2738         while (recv_pkts < budget && recv_bds < num) {
2739                 /* Reuse or realloc buffers */
2740                 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2741                         hns3_nic_alloc_rx_buffers(ring,
2742                                                   clean_count + unused_count);
2743                         clean_count = 0;
2744                         unused_count = hns3_desc_unused(ring) -
2745                                         ring->pending_buf;
2746                 }
2747
2748                 /* Poll one pkt */
2749                 err = hns3_handle_rx_bd(ring, &skb);
2750                 if (unlikely(!skb)) /* This fault cannot be repaired */
2751                         goto out;
2752
2753                 if (err == -ENXIO) { /* Do not get FE for the packet */
2754                         goto out;
2755                 } else if (unlikely(err)) {  /* Do jump the err */
2756                         recv_bds += ring->pending_buf;
2757                         clean_count += ring->pending_buf;
2758                         ring->skb = NULL;
2759                         ring->pending_buf = 0;
2760                         continue;
2761                 }
2762
2763                 /* Do update ip stack process */
2764                 skb->protocol = eth_type_trans(skb, netdev);
2765                 rx_fn(ring, skb);
2766                 recv_bds += ring->pending_buf;
2767                 clean_count += ring->pending_buf;
2768                 ring->skb = NULL;
2769                 ring->pending_buf = 0;
2770
2771                 recv_pkts++;
2772         }
2773
2774 out:
2775         /* Make all data has been write before submit */
2776         if (clean_count + unused_count > 0)
2777                 hns3_nic_alloc_rx_buffers(ring,
2778                                           clean_count + unused_count);
2779
2780         return recv_pkts;
2781 }
2782
2783 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2784 {
2785         struct hns3_enet_tqp_vector *tqp_vector =
2786                                         ring_group->ring->tqp_vector;
2787         enum hns3_flow_level_range new_flow_level;
2788         int packets_per_msecs;
2789         int bytes_per_msecs;
2790         u32 time_passed_ms;
2791         u16 new_int_gl;
2792
2793         if (!tqp_vector->last_jiffies)
2794                 return false;
2795
2796         if (ring_group->total_packets == 0) {
2797                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
2798                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
2799                 return true;
2800         }
2801
2802         /* Simple throttlerate management
2803          * 0-10MB/s   lower     (50000 ints/s)
2804          * 10-20MB/s   middle    (20000 ints/s)
2805          * 20-1249MB/s high      (18000 ints/s)
2806          * > 40000pps  ultra     (8000 ints/s)
2807          */
2808         new_flow_level = ring_group->coal.flow_level;
2809         new_int_gl = ring_group->coal.int_gl;
2810         time_passed_ms =
2811                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
2812
2813         if (!time_passed_ms)
2814                 return false;
2815
2816         do_div(ring_group->total_packets, time_passed_ms);
2817         packets_per_msecs = ring_group->total_packets;
2818
2819         do_div(ring_group->total_bytes, time_passed_ms);
2820         bytes_per_msecs = ring_group->total_bytes;
2821
2822 #define HNS3_RX_LOW_BYTE_RATE 10000
2823 #define HNS3_RX_MID_BYTE_RATE 20000
2824
2825         switch (new_flow_level) {
2826         case HNS3_FLOW_LOW:
2827                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
2828                         new_flow_level = HNS3_FLOW_MID;
2829                 break;
2830         case HNS3_FLOW_MID:
2831                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
2832                         new_flow_level = HNS3_FLOW_HIGH;
2833                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
2834                         new_flow_level = HNS3_FLOW_LOW;
2835                 break;
2836         case HNS3_FLOW_HIGH:
2837         case HNS3_FLOW_ULTRA:
2838         default:
2839                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
2840                         new_flow_level = HNS3_FLOW_MID;
2841                 break;
2842         }
2843
2844 #define HNS3_RX_ULTRA_PACKET_RATE 40
2845
2846         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
2847             &tqp_vector->rx_group == ring_group)
2848                 new_flow_level = HNS3_FLOW_ULTRA;
2849
2850         switch (new_flow_level) {
2851         case HNS3_FLOW_LOW:
2852                 new_int_gl = HNS3_INT_GL_50K;
2853                 break;
2854         case HNS3_FLOW_MID:
2855                 new_int_gl = HNS3_INT_GL_20K;
2856                 break;
2857         case HNS3_FLOW_HIGH:
2858                 new_int_gl = HNS3_INT_GL_18K;
2859                 break;
2860         case HNS3_FLOW_ULTRA:
2861                 new_int_gl = HNS3_INT_GL_8K;
2862                 break;
2863         default:
2864                 break;
2865         }
2866
2867         ring_group->total_bytes = 0;
2868         ring_group->total_packets = 0;
2869         ring_group->coal.flow_level = new_flow_level;
2870         if (new_int_gl != ring_group->coal.int_gl) {
2871                 ring_group->coal.int_gl = new_int_gl;
2872                 return true;
2873         }
2874         return false;
2875 }
2876
2877 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2878 {
2879         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2880         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2881         bool rx_update, tx_update;
2882
2883         /* update param every 1000ms */
2884         if (time_before(jiffies,
2885                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
2886                 return;
2887
2888         if (rx_group->coal.gl_adapt_enable) {
2889                 rx_update = hns3_get_new_int_gl(rx_group);
2890                 if (rx_update)
2891                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
2892                                                        rx_group->coal.int_gl);
2893         }
2894
2895         if (tx_group->coal.gl_adapt_enable) {
2896                 tx_update = hns3_get_new_int_gl(tx_group);
2897                 if (tx_update)
2898                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
2899                                                        tx_group->coal.int_gl);
2900         }
2901
2902         tqp_vector->last_jiffies = jiffies;
2903 }
2904
2905 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2906 {
2907         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
2908         struct hns3_enet_ring *ring;
2909         int rx_pkt_total = 0;
2910
2911         struct hns3_enet_tqp_vector *tqp_vector =
2912                 container_of(napi, struct hns3_enet_tqp_vector, napi);
2913         bool clean_complete = true;
2914         int rx_budget = budget;
2915
2916         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
2917                 napi_complete(napi);
2918                 return 0;
2919         }
2920
2921         /* Since the actual Tx work is minimal, we can give the Tx a larger
2922          * budget and be more aggressive about cleaning up the Tx descriptors.
2923          */
2924         hns3_for_each_ring(ring, tqp_vector->tx_group)
2925                 hns3_clean_tx_ring(ring);
2926
2927         /* make sure rx ring budget not smaller than 1 */
2928         if (tqp_vector->num_tqps > 1)
2929                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2930
2931         hns3_for_each_ring(ring, tqp_vector->rx_group) {
2932                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2933                                                     hns3_rx_skb);
2934
2935                 if (rx_cleaned >= rx_budget)
2936                         clean_complete = false;
2937
2938                 rx_pkt_total += rx_cleaned;
2939         }
2940
2941         tqp_vector->rx_group.total_packets += rx_pkt_total;
2942
2943         if (!clean_complete)
2944                 return budget;
2945
2946         if (napi_complete(napi) &&
2947             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
2948                 hns3_update_new_int_gl(tqp_vector);
2949                 hns3_mask_vector_irq(tqp_vector, 1);
2950         }
2951
2952         return rx_pkt_total;
2953 }
2954
2955 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2956                                       struct hnae3_ring_chain_node *head)
2957 {
2958         struct pci_dev *pdev = tqp_vector->handle->pdev;
2959         struct hnae3_ring_chain_node *cur_chain = head;
2960         struct hnae3_ring_chain_node *chain;
2961         struct hns3_enet_ring *tx_ring;
2962         struct hns3_enet_ring *rx_ring;
2963
2964         tx_ring = tqp_vector->tx_group.ring;
2965         if (tx_ring) {
2966                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2967                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2968                               HNAE3_RING_TYPE_TX);
2969                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2970                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
2971
2972                 cur_chain->next = NULL;
2973
2974                 while (tx_ring->next) {
2975                         tx_ring = tx_ring->next;
2976
2977                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2978                                              GFP_KERNEL);
2979                         if (!chain)
2980                                 goto err_free_chain;
2981
2982                         cur_chain->next = chain;
2983                         chain->tqp_index = tx_ring->tqp->tqp_index;
2984                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2985                                       HNAE3_RING_TYPE_TX);
2986                         hnae3_set_field(chain->int_gl_idx,
2987                                         HNAE3_RING_GL_IDX_M,
2988                                         HNAE3_RING_GL_IDX_S,
2989                                         HNAE3_RING_GL_TX);
2990
2991                         cur_chain = chain;
2992                 }
2993         }
2994
2995         rx_ring = tqp_vector->rx_group.ring;
2996         if (!tx_ring && rx_ring) {
2997                 cur_chain->next = NULL;
2998                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2999                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3000                               HNAE3_RING_TYPE_RX);
3001                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3002                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3003
3004                 rx_ring = rx_ring->next;
3005         }
3006
3007         while (rx_ring) {
3008                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3009                 if (!chain)
3010                         goto err_free_chain;
3011
3012                 cur_chain->next = chain;
3013                 chain->tqp_index = rx_ring->tqp->tqp_index;
3014                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3015                               HNAE3_RING_TYPE_RX);
3016                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3017                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3018
3019                 cur_chain = chain;
3020
3021                 rx_ring = rx_ring->next;
3022         }
3023
3024         return 0;
3025
3026 err_free_chain:
3027         cur_chain = head->next;
3028         while (cur_chain) {
3029                 chain = cur_chain->next;
3030                 devm_kfree(&pdev->dev, cur_chain);
3031                 cur_chain = chain;
3032         }
3033         head->next = NULL;
3034
3035         return -ENOMEM;
3036 }
3037
3038 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3039                                         struct hnae3_ring_chain_node *head)
3040 {
3041         struct pci_dev *pdev = tqp_vector->handle->pdev;
3042         struct hnae3_ring_chain_node *chain_tmp, *chain;
3043
3044         chain = head->next;
3045
3046         while (chain) {
3047                 chain_tmp = chain->next;
3048                 devm_kfree(&pdev->dev, chain);
3049                 chain = chain_tmp;
3050         }
3051 }
3052
3053 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3054                                    struct hns3_enet_ring *ring)
3055 {
3056         ring->next = group->ring;
3057         group->ring = ring;
3058
3059         group->count++;
3060 }
3061
3062 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3063 {
3064         struct pci_dev *pdev = priv->ae_handle->pdev;
3065         struct hns3_enet_tqp_vector *tqp_vector;
3066         int num_vectors = priv->vector_num;
3067         int numa_node;
3068         int vector_i;
3069
3070         numa_node = dev_to_node(&pdev->dev);
3071
3072         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3073                 tqp_vector = &priv->tqp_vector[vector_i];
3074                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3075                                 &tqp_vector->affinity_mask);
3076         }
3077 }
3078
3079 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3080 {
3081         struct hnae3_ring_chain_node vector_ring_chain;
3082         struct hnae3_handle *h = priv->ae_handle;
3083         struct hns3_enet_tqp_vector *tqp_vector;
3084         int ret = 0;
3085         int i;
3086
3087         hns3_nic_set_cpumask(priv);
3088
3089         for (i = 0; i < priv->vector_num; i++) {
3090                 tqp_vector = &priv->tqp_vector[i];
3091                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3092                 tqp_vector->num_tqps = 0;
3093         }
3094
3095         for (i = 0; i < h->kinfo.num_tqps; i++) {
3096                 u16 vector_i = i % priv->vector_num;
3097                 u16 tqp_num = h->kinfo.num_tqps;
3098
3099                 tqp_vector = &priv->tqp_vector[vector_i];
3100
3101                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3102                                        priv->ring_data[i].ring);
3103
3104                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3105                                        priv->ring_data[i + tqp_num].ring);
3106
3107                 priv->ring_data[i].ring->tqp_vector = tqp_vector;
3108                 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
3109                 tqp_vector->num_tqps++;
3110         }
3111
3112         for (i = 0; i < priv->vector_num; i++) {
3113                 tqp_vector = &priv->tqp_vector[i];
3114
3115                 tqp_vector->rx_group.total_bytes = 0;
3116                 tqp_vector->rx_group.total_packets = 0;
3117                 tqp_vector->tx_group.total_bytes = 0;
3118                 tqp_vector->tx_group.total_packets = 0;
3119                 tqp_vector->handle = h;
3120
3121                 ret = hns3_get_vector_ring_chain(tqp_vector,
3122                                                  &vector_ring_chain);
3123                 if (ret)
3124                         goto map_ring_fail;
3125
3126                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3127                         tqp_vector->vector_irq, &vector_ring_chain);
3128
3129                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3130
3131                 if (ret)
3132                         goto map_ring_fail;
3133
3134                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3135                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3136         }
3137
3138         return 0;
3139
3140 map_ring_fail:
3141         while (i--)
3142                 netif_napi_del(&priv->tqp_vector[i].napi);
3143
3144         return ret;
3145 }
3146
3147 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3148 {
3149 #define HNS3_VECTOR_PF_MAX_NUM          64
3150
3151         struct hnae3_handle *h = priv->ae_handle;
3152         struct hns3_enet_tqp_vector *tqp_vector;
3153         struct hnae3_vector_info *vector;
3154         struct pci_dev *pdev = h->pdev;
3155         u16 tqp_num = h->kinfo.num_tqps;
3156         u16 vector_num;
3157         int ret = 0;
3158         u16 i;
3159
3160         /* RSS size, cpu online and vector_num should be the same */
3161         /* Should consider 2p/4p later */
3162         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3163         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3164
3165         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3166                               GFP_KERNEL);
3167         if (!vector)
3168                 return -ENOMEM;
3169
3170         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3171
3172         priv->vector_num = vector_num;
3173         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3174                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3175                              GFP_KERNEL);
3176         if (!priv->tqp_vector) {
3177                 ret = -ENOMEM;
3178                 goto out;
3179         }
3180
3181         for (i = 0; i < priv->vector_num; i++) {
3182                 tqp_vector = &priv->tqp_vector[i];
3183                 tqp_vector->idx = i;
3184                 tqp_vector->mask_addr = vector[i].io_addr;
3185                 tqp_vector->vector_irq = vector[i].vector;
3186                 hns3_vector_gl_rl_init(tqp_vector, priv);
3187         }
3188
3189 out:
3190         devm_kfree(&pdev->dev, vector);
3191         return ret;
3192 }
3193
3194 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3195 {
3196         group->ring = NULL;
3197         group->count = 0;
3198 }
3199
3200 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3201 {
3202         struct hnae3_ring_chain_node vector_ring_chain;
3203         struct hnae3_handle *h = priv->ae_handle;
3204         struct hns3_enet_tqp_vector *tqp_vector;
3205         int i;
3206
3207         for (i = 0; i < priv->vector_num; i++) {
3208                 tqp_vector = &priv->tqp_vector[i];
3209
3210                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3211                         continue;
3212
3213                 hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain);
3214
3215                 h->ae_algo->ops->unmap_ring_from_vector(h,
3216                         tqp_vector->vector_irq, &vector_ring_chain);
3217
3218                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3219
3220                 if (tqp_vector->irq_init_flag == HNS3_VECTOR_INITED) {
3221                         irq_set_affinity_notifier(tqp_vector->vector_irq,
3222                                                   NULL);
3223                         irq_set_affinity_hint(tqp_vector->vector_irq, NULL);
3224                         free_irq(tqp_vector->vector_irq, tqp_vector);
3225                         tqp_vector->irq_init_flag = HNS3_VECTOR_NOT_INITED;
3226                 }
3227
3228                 hns3_clear_ring_group(&tqp_vector->rx_group);
3229                 hns3_clear_ring_group(&tqp_vector->tx_group);
3230                 netif_napi_del(&priv->tqp_vector[i].napi);
3231         }
3232 }
3233
3234 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3235 {
3236         struct hnae3_handle *h = priv->ae_handle;
3237         struct pci_dev *pdev = h->pdev;
3238         int i, ret;
3239
3240         for (i = 0; i < priv->vector_num; i++) {
3241                 struct hns3_enet_tqp_vector *tqp_vector;
3242
3243                 tqp_vector = &priv->tqp_vector[i];
3244                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3245                 if (ret)
3246                         return ret;
3247         }
3248
3249         devm_kfree(&pdev->dev, priv->tqp_vector);
3250         return 0;
3251 }
3252
3253 static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3254                              int ring_type)
3255 {
3256         struct hns3_nic_ring_data *ring_data = priv->ring_data;
3257         int queue_num = priv->ae_handle->kinfo.num_tqps;
3258         struct pci_dev *pdev = priv->ae_handle->pdev;
3259         struct hns3_enet_ring *ring;
3260         int desc_num;
3261
3262         ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
3263         if (!ring)
3264                 return -ENOMEM;
3265
3266         if (ring_type == HNAE3_RING_TYPE_TX) {
3267                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3268                 ring_data[q->tqp_index].ring = ring;
3269                 ring_data[q->tqp_index].queue_index = q->tqp_index;
3270                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3271         } else {
3272                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3273                 ring_data[q->tqp_index + queue_num].ring = ring;
3274                 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
3275                 ring->io_base = q->io_base;
3276         }
3277
3278         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3279
3280         ring->tqp = q;
3281         ring->desc = NULL;
3282         ring->desc_cb = NULL;
3283         ring->dev = priv->dev;
3284         ring->desc_dma_addr = 0;
3285         ring->buf_size = q->buf_size;
3286         ring->desc_num = desc_num;
3287         ring->next_to_use = 0;
3288         ring->next_to_clean = 0;
3289
3290         return 0;
3291 }
3292
3293 static int hns3_queue_to_ring(struct hnae3_queue *tqp,
3294                               struct hns3_nic_priv *priv)
3295 {
3296         int ret;
3297
3298         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3299         if (ret)
3300                 return ret;
3301
3302         ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3303         if (ret) {
3304                 devm_kfree(priv->dev, priv->ring_data[tqp->tqp_index].ring);
3305                 return ret;
3306         }
3307
3308         return 0;
3309 }
3310
3311 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3312 {
3313         struct hnae3_handle *h = priv->ae_handle;
3314         struct pci_dev *pdev = h->pdev;
3315         int i, ret;
3316
3317         priv->ring_data =  devm_kzalloc(&pdev->dev,
3318                                         array3_size(h->kinfo.num_tqps,
3319                                                     sizeof(*priv->ring_data),
3320                                                     2),
3321                                         GFP_KERNEL);
3322         if (!priv->ring_data)
3323                 return -ENOMEM;
3324
3325         for (i = 0; i < h->kinfo.num_tqps; i++) {
3326                 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3327                 if (ret)
3328                         goto err;
3329         }
3330
3331         return 0;
3332 err:
3333         while (i--) {
3334                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3335                 devm_kfree(priv->dev,
3336                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3337         }
3338
3339         devm_kfree(&pdev->dev, priv->ring_data);
3340         return ret;
3341 }
3342
3343 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3344 {
3345         struct hnae3_handle *h = priv->ae_handle;
3346         int i;
3347
3348         for (i = 0; i < h->kinfo.num_tqps; i++) {
3349                 devm_kfree(priv->dev, priv->ring_data[i].ring);
3350                 devm_kfree(priv->dev,
3351                            priv->ring_data[i + h->kinfo.num_tqps].ring);
3352         }
3353         devm_kfree(priv->dev, priv->ring_data);
3354 }
3355
3356 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3357 {
3358         int ret;
3359
3360         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3361                 return -EINVAL;
3362
3363         ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
3364                                 GFP_KERNEL);
3365         if (!ring->desc_cb) {
3366                 ret = -ENOMEM;
3367                 goto out;
3368         }
3369
3370         ret = hns3_alloc_desc(ring);
3371         if (ret)
3372                 goto out_with_desc_cb;
3373
3374         if (!HNAE3_IS_TX_RING(ring)) {
3375                 ret = hns3_alloc_ring_buffers(ring);
3376                 if (ret)
3377                         goto out_with_desc;
3378         }
3379
3380         return 0;
3381
3382 out_with_desc:
3383         hns3_free_desc(ring);
3384 out_with_desc_cb:
3385         kfree(ring->desc_cb);
3386         ring->desc_cb = NULL;
3387 out:
3388         return ret;
3389 }
3390
3391 static void hns3_fini_ring(struct hns3_enet_ring *ring)
3392 {
3393         hns3_free_desc(ring);
3394         kfree(ring->desc_cb);
3395         ring->desc_cb = NULL;
3396         ring->next_to_clean = 0;
3397         ring->next_to_use = 0;
3398         ring->pending_buf = 0;
3399         if (ring->skb) {
3400                 dev_kfree_skb_any(ring->skb);
3401                 ring->skb = NULL;
3402         }
3403 }
3404
3405 static int hns3_buf_size2type(u32 buf_size)
3406 {
3407         int bd_size_type;
3408
3409         switch (buf_size) {
3410         case 512:
3411                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3412                 break;
3413         case 1024:
3414                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3415                 break;
3416         case 2048:
3417                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3418                 break;
3419         case 4096:
3420                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3421                 break;
3422         default:
3423                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3424         }
3425
3426         return bd_size_type;
3427 }
3428
3429 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3430 {
3431         dma_addr_t dma = ring->desc_dma_addr;
3432         struct hnae3_queue *q = ring->tqp;
3433
3434         if (!HNAE3_IS_TX_RING(ring)) {
3435                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
3436                                (u32)dma);
3437                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3438                                (u32)((dma >> 31) >> 1));
3439
3440                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3441                                hns3_buf_size2type(ring->buf_size));
3442                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3443                                ring->desc_num / 8 - 1);
3444
3445         } else {
3446                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3447                                (u32)dma);
3448                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3449                                (u32)((dma >> 31) >> 1));
3450
3451                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3452                                ring->desc_num / 8 - 1);
3453         }
3454 }
3455
3456 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3457 {
3458         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3459         int i;
3460
3461         for (i = 0; i < HNAE3_MAX_TC; i++) {
3462                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3463                 int j;
3464
3465                 if (!tc_info->enable)
3466                         continue;
3467
3468                 for (j = 0; j < tc_info->tqp_count; j++) {
3469                         struct hnae3_queue *q;
3470
3471                         q = priv->ring_data[tc_info->tqp_offset + j].ring->tqp;
3472                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3473                                        tc_info->tc);
3474                 }
3475         }
3476 }
3477
3478 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3479 {
3480         struct hnae3_handle *h = priv->ae_handle;
3481         int ring_num = h->kinfo.num_tqps * 2;
3482         int i, j;
3483         int ret;
3484
3485         for (i = 0; i < ring_num; i++) {
3486                 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
3487                 if (ret) {
3488                         dev_err(priv->dev,
3489                                 "Alloc ring memory fail! ret=%d\n", ret);
3490                         goto out_when_alloc_ring_memory;
3491                 }
3492
3493                 u64_stats_init(&priv->ring_data[i].ring->syncp);
3494         }
3495
3496         return 0;
3497
3498 out_when_alloc_ring_memory:
3499         for (j = i - 1; j >= 0; j--)
3500                 hns3_fini_ring(priv->ring_data[j].ring);
3501
3502         return -ENOMEM;
3503 }
3504
3505 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3506 {
3507         struct hnae3_handle *h = priv->ae_handle;
3508         int i;
3509
3510         for (i = 0; i < h->kinfo.num_tqps; i++) {
3511                 hns3_fini_ring(priv->ring_data[i].ring);
3512                 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
3513         }
3514         return 0;
3515 }
3516
3517 /* Set mac addr if it is configured. or leave it to the AE driver */
3518 static int hns3_init_mac_addr(struct net_device *netdev, bool init)
3519 {
3520         struct hns3_nic_priv *priv = netdev_priv(netdev);
3521         struct hnae3_handle *h = priv->ae_handle;
3522         u8 mac_addr_temp[ETH_ALEN];
3523         int ret = 0;
3524
3525         if (h->ae_algo->ops->get_mac_addr && init) {
3526                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3527                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3528         }
3529
3530         /* Check if the MAC address is valid, if not get a random one */
3531         if (!is_valid_ether_addr(netdev->dev_addr)) {
3532                 eth_hw_addr_random(netdev);
3533                 dev_warn(priv->dev, "using random MAC address %pM\n",
3534                          netdev->dev_addr);
3535         }
3536
3537         if (h->ae_algo->ops->set_mac_addr)
3538                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3539
3540         return ret;
3541 }
3542
3543 static int hns3_init_phy(struct net_device *netdev)
3544 {
3545         struct hnae3_handle *h = hns3_get_handle(netdev);
3546         int ret = 0;
3547
3548         if (h->ae_algo->ops->mac_connect_phy)
3549                 ret = h->ae_algo->ops->mac_connect_phy(h);
3550
3551         return ret;
3552 }
3553
3554 static void hns3_uninit_phy(struct net_device *netdev)
3555 {
3556         struct hnae3_handle *h = hns3_get_handle(netdev);
3557
3558         if (h->ae_algo->ops->mac_disconnect_phy)
3559                 h->ae_algo->ops->mac_disconnect_phy(h);
3560 }
3561
3562 static int hns3_restore_fd_rules(struct net_device *netdev)
3563 {
3564         struct hnae3_handle *h = hns3_get_handle(netdev);
3565         int ret = 0;
3566
3567         if (h->ae_algo->ops->restore_fd_rules)
3568                 ret = h->ae_algo->ops->restore_fd_rules(h);
3569
3570         return ret;
3571 }
3572
3573 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3574 {
3575         struct hnae3_handle *h = hns3_get_handle(netdev);
3576
3577         if (h->ae_algo->ops->del_all_fd_entries)
3578                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3579 }
3580
3581 static void hns3_nic_set_priv_ops(struct net_device *netdev)
3582 {
3583         struct hns3_nic_priv *priv = netdev_priv(netdev);
3584
3585         if ((netdev->features & NETIF_F_TSO) ||
3586             (netdev->features & NETIF_F_TSO6))
3587                 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3588         else
3589                 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3590 }
3591
3592 static int hns3_client_start(struct hnae3_handle *handle)
3593 {
3594         if (!handle->ae_algo->ops->client_start)
3595                 return 0;
3596
3597         return handle->ae_algo->ops->client_start(handle);
3598 }
3599
3600 static void hns3_client_stop(struct hnae3_handle *handle)
3601 {
3602         if (!handle->ae_algo->ops->client_stop)
3603                 return;
3604
3605         handle->ae_algo->ops->client_stop(handle);
3606 }
3607
3608 static int hns3_client_init(struct hnae3_handle *handle)
3609 {
3610         struct pci_dev *pdev = handle->pdev;
3611         u16 alloc_tqps, max_rss_size;
3612         struct hns3_nic_priv *priv;
3613         struct net_device *netdev;
3614         int ret;
3615
3616         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3617                                                     &max_rss_size);
3618         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3619         if (!netdev)
3620                 return -ENOMEM;
3621
3622         priv = netdev_priv(netdev);
3623         priv->dev = &pdev->dev;
3624         priv->netdev = netdev;
3625         priv->ae_handle = handle;
3626         priv->tx_timeout_count = 0;
3627         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3628
3629         handle->kinfo.netdev = netdev;
3630         handle->priv = (void *)priv;
3631
3632         hns3_init_mac_addr(netdev, true);
3633
3634         hns3_set_default_feature(netdev);
3635
3636         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3637         netdev->priv_flags |= IFF_UNICAST_FLT;
3638         netdev->netdev_ops = &hns3_nic_netdev_ops;
3639         SET_NETDEV_DEV(netdev, &pdev->dev);
3640         hns3_ethtool_set_ops(netdev);
3641         hns3_nic_set_priv_ops(netdev);
3642
3643         /* Carrier off reporting is important to ethtool even BEFORE open */
3644         netif_carrier_off(netdev);
3645
3646         ret = hns3_get_ring_config(priv);
3647         if (ret) {
3648                 ret = -ENOMEM;
3649                 goto out_get_ring_cfg;
3650         }
3651
3652         ret = hns3_nic_alloc_vector_data(priv);
3653         if (ret) {
3654                 ret = -ENOMEM;
3655                 goto out_alloc_vector_data;
3656         }
3657
3658         ret = hns3_nic_init_vector_data(priv);
3659         if (ret) {
3660                 ret = -ENOMEM;
3661                 goto out_init_vector_data;
3662         }
3663
3664         ret = hns3_init_all_ring(priv);
3665         if (ret) {
3666                 ret = -ENOMEM;
3667                 goto out_init_ring_data;
3668         }
3669
3670         ret = hns3_init_phy(netdev);
3671         if (ret)
3672                 goto out_init_phy;
3673
3674         ret = register_netdev(netdev);
3675         if (ret) {
3676                 dev_err(priv->dev, "probe register netdev fail!\n");
3677                 goto out_reg_netdev_fail;
3678         }
3679
3680         ret = hns3_client_start(handle);
3681         if (ret) {
3682                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
3683                         goto out_client_start;
3684         }
3685
3686         hns3_dcbnl_setup(handle);
3687
3688         hns3_dbg_init(handle);
3689
3690         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
3691         netdev->max_mtu = HNS3_MAX_MTU;
3692
3693         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
3694
3695         return ret;
3696
3697 out_client_start:
3698         unregister_netdev(netdev);
3699 out_reg_netdev_fail:
3700         hns3_uninit_phy(netdev);
3701 out_init_phy:
3702         hns3_uninit_all_ring(priv);
3703 out_init_ring_data:
3704         hns3_nic_uninit_vector_data(priv);
3705 out_init_vector_data:
3706         hns3_nic_dealloc_vector_data(priv);
3707 out_alloc_vector_data:
3708         priv->ring_data = NULL;
3709 out_get_ring_cfg:
3710         priv->ae_handle = NULL;
3711         free_netdev(netdev);
3712         return ret;
3713 }
3714
3715 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3716 {
3717         struct net_device *netdev = handle->kinfo.netdev;
3718         struct hns3_nic_priv *priv = netdev_priv(netdev);
3719         int ret;
3720
3721         hns3_remove_hw_addr(netdev);
3722
3723         if (netdev->reg_state != NETREG_UNINITIALIZED)
3724                 unregister_netdev(netdev);
3725
3726         hns3_client_stop(handle);
3727
3728         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
3729                 netdev_warn(netdev, "already uninitialized\n");
3730                 goto out_netdev_free;
3731         }
3732
3733         hns3_del_all_fd_rules(netdev, true);
3734
3735         hns3_force_clear_all_rx_ring(handle);
3736
3737         hns3_uninit_phy(netdev);
3738
3739         hns3_nic_uninit_vector_data(priv);
3740
3741         ret = hns3_nic_dealloc_vector_data(priv);
3742         if (ret)
3743                 netdev_err(netdev, "dealloc vector error\n");
3744
3745         ret = hns3_uninit_all_ring(priv);
3746         if (ret)
3747                 netdev_err(netdev, "uninit ring error\n");
3748
3749         hns3_put_ring_config(priv);
3750
3751         hns3_dbg_uninit(handle);
3752
3753         priv->ring_data = NULL;
3754
3755 out_netdev_free:
3756         free_netdev(netdev);
3757 }
3758
3759 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3760 {
3761         struct net_device *netdev = handle->kinfo.netdev;
3762
3763         if (!netdev)
3764                 return;
3765
3766         if (linkup) {
3767                 netif_carrier_on(netdev);
3768                 netif_tx_wake_all_queues(netdev);
3769                 netdev_info(netdev, "link up\n");
3770         } else {
3771                 netif_carrier_off(netdev);
3772                 netif_tx_stop_all_queues(netdev);
3773                 netdev_info(netdev, "link down\n");
3774         }
3775 }
3776
3777 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3778 {
3779         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3780         struct net_device *ndev = kinfo->netdev;
3781
3782         if (tc > HNAE3_MAX_TC)
3783                 return -EINVAL;
3784
3785         if (!ndev)
3786                 return -ENODEV;
3787
3788         return hns3_nic_set_real_num_queue(ndev);
3789 }
3790
3791 static int hns3_recover_hw_addr(struct net_device *ndev)
3792 {
3793         struct netdev_hw_addr_list *list;
3794         struct netdev_hw_addr *ha, *tmp;
3795         int ret = 0;
3796
3797         netif_addr_lock_bh(ndev);
3798         /* go through and sync uc_addr entries to the device */
3799         list = &ndev->uc;
3800         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3801                 ret = hns3_nic_uc_sync(ndev, ha->addr);
3802                 if (ret)
3803                         goto out;
3804         }
3805
3806         /* go through and sync mc_addr entries to the device */
3807         list = &ndev->mc;
3808         list_for_each_entry_safe(ha, tmp, &list->list, list) {
3809                 ret = hns3_nic_mc_sync(ndev, ha->addr);
3810                 if (ret)
3811                         goto out;
3812         }
3813
3814 out:
3815         netif_addr_unlock_bh(ndev);
3816         return ret;
3817 }
3818
3819 static void hns3_remove_hw_addr(struct net_device *netdev)
3820 {
3821         struct netdev_hw_addr_list *list;
3822         struct netdev_hw_addr *ha, *tmp;
3823
3824         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
3825
3826         netif_addr_lock_bh(netdev);
3827         /* go through and unsync uc_addr entries to the device */
3828         list = &netdev->uc;
3829         list_for_each_entry_safe(ha, tmp, &list->list, list)
3830                 hns3_nic_uc_unsync(netdev, ha->addr);
3831
3832         /* go through and unsync mc_addr entries to the device */
3833         list = &netdev->mc;
3834         list_for_each_entry_safe(ha, tmp, &list->list, list)
3835                 if (ha->refcount > 1)
3836                         hns3_nic_mc_unsync(netdev, ha->addr);
3837
3838         netif_addr_unlock_bh(netdev);
3839 }
3840
3841 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
3842 {
3843         while (ring->next_to_clean != ring->next_to_use) {
3844                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
3845                 hns3_free_buffer_detach(ring, ring->next_to_clean);
3846                 ring_ptr_move_fw(ring, next_to_clean);
3847         }
3848 }
3849
3850 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
3851 {
3852         struct hns3_desc_cb res_cbs;
3853         int ret;
3854
3855         while (ring->next_to_use != ring->next_to_clean) {
3856                 /* When a buffer is not reused, it's memory has been
3857                  * freed in hns3_handle_rx_bd or will be freed by
3858                  * stack, so we need to replace the buffer here.
3859                  */
3860                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3861                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
3862                         if (ret) {
3863                                 u64_stats_update_begin(&ring->syncp);
3864                                 ring->stats.sw_err_cnt++;
3865                                 u64_stats_update_end(&ring->syncp);
3866                                 /* if alloc new buffer fail, exit directly
3867                                  * and reclear in up flow.
3868                                  */
3869                                 netdev_warn(ring->tqp->handle->kinfo.netdev,
3870                                             "reserve buffer map failed, ret = %d\n",
3871                                             ret);
3872                                 return ret;
3873                         }
3874                         hns3_replace_buffer(ring, ring->next_to_use,
3875                                             &res_cbs);
3876                 }
3877                 ring_ptr_move_fw(ring, next_to_use);
3878         }
3879
3880         return 0;
3881 }
3882
3883 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
3884 {
3885         while (ring->next_to_use != ring->next_to_clean) {
3886                 /* When a buffer is not reused, it's memory has been
3887                  * freed in hns3_handle_rx_bd or will be freed by
3888                  * stack, so only need to unmap the buffer here.
3889                  */
3890                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
3891                         hns3_unmap_buffer(ring,
3892                                           &ring->desc_cb[ring->next_to_use]);
3893                         ring->desc_cb[ring->next_to_use].dma = 0;
3894                 }
3895
3896                 ring_ptr_move_fw(ring, next_to_use);
3897         }
3898 }
3899
3900 static void hns3_force_clear_all_rx_ring(struct hnae3_handle *h)
3901 {
3902         struct net_device *ndev = h->kinfo.netdev;
3903         struct hns3_nic_priv *priv = netdev_priv(ndev);
3904         struct hns3_enet_ring *ring;
3905         u32 i;
3906
3907         for (i = 0; i < h->kinfo.num_tqps; i++) {
3908                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3909                 hns3_force_clear_rx_ring(ring);
3910         }
3911 }
3912
3913 static void hns3_clear_all_ring(struct hnae3_handle *h)
3914 {
3915         struct net_device *ndev = h->kinfo.netdev;
3916         struct hns3_nic_priv *priv = netdev_priv(ndev);
3917         u32 i;
3918
3919         for (i = 0; i < h->kinfo.num_tqps; i++) {
3920                 struct netdev_queue *dev_queue;
3921                 struct hns3_enet_ring *ring;
3922
3923                 ring = priv->ring_data[i].ring;
3924                 hns3_clear_tx_ring(ring);
3925                 dev_queue = netdev_get_tx_queue(ndev,
3926                                                 priv->ring_data[i].queue_index);
3927                 netdev_tx_reset_queue(dev_queue);
3928
3929                 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3930                 /* Continue to clear other rings even if clearing some
3931                  * rings failed.
3932                  */
3933                 hns3_clear_rx_ring(ring);
3934         }
3935 }
3936
3937 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
3938 {
3939         struct net_device *ndev = h->kinfo.netdev;
3940         struct hns3_nic_priv *priv = netdev_priv(ndev);
3941         struct hns3_enet_ring *rx_ring;
3942         int i, j;
3943         int ret;
3944
3945         for (i = 0; i < h->kinfo.num_tqps; i++) {
3946                 ret = h->ae_algo->ops->reset_queue(h, i);
3947                 if (ret)
3948                         return ret;
3949
3950                 hns3_init_ring_hw(priv->ring_data[i].ring);
3951
3952                 /* We need to clear tx ring here because self test will
3953                  * use the ring and will not run down before up
3954                  */
3955                 hns3_clear_tx_ring(priv->ring_data[i].ring);
3956                 priv->ring_data[i].ring->next_to_clean = 0;
3957                 priv->ring_data[i].ring->next_to_use = 0;
3958
3959                 rx_ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3960                 hns3_init_ring_hw(rx_ring);
3961                 ret = hns3_clear_rx_ring(rx_ring);
3962                 if (ret)
3963                         return ret;
3964
3965                 /* We can not know the hardware head and tail when this
3966                  * function is called in reset flow, so we reuse all desc.
3967                  */
3968                 for (j = 0; j < rx_ring->desc_num; j++)
3969                         hns3_reuse_buffer(rx_ring, j);
3970
3971                 rx_ring->next_to_clean = 0;
3972                 rx_ring->next_to_use = 0;
3973         }
3974
3975         hns3_init_tx_ring_tc(priv);
3976
3977         return 0;
3978 }
3979
3980 static void hns3_store_coal(struct hns3_nic_priv *priv)
3981 {
3982         /* ethtool only support setting and querying one coal
3983          * configuation for now, so save the vector 0' coal
3984          * configuation here in order to restore it.
3985          */
3986         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
3987                sizeof(struct hns3_enet_coalesce));
3988         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
3989                sizeof(struct hns3_enet_coalesce));
3990 }
3991
3992 static void hns3_restore_coal(struct hns3_nic_priv *priv)
3993 {
3994         u16 vector_num = priv->vector_num;
3995         int i;
3996
3997         for (i = 0; i < vector_num; i++) {
3998                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
3999                        sizeof(struct hns3_enet_coalesce));
4000                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4001                        sizeof(struct hns3_enet_coalesce));
4002         }
4003 }
4004
4005 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4006 {
4007         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4008         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4009         struct net_device *ndev = kinfo->netdev;
4010         struct hns3_nic_priv *priv = netdev_priv(ndev);
4011
4012         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4013                 return 0;
4014
4015         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4016          * from table space. Hence, for function reset software intervention is
4017          * required to delete the entries
4018          */
4019         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4020                 hns3_remove_hw_addr(ndev);
4021                 hns3_del_all_fd_rules(ndev, false);
4022         }
4023
4024         if (!netif_running(ndev))
4025                 return 0;
4026
4027         return hns3_nic_net_stop(ndev);
4028 }
4029
4030 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4031 {
4032         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4033         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4034         int ret = 0;
4035
4036         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4037
4038         if (netif_running(kinfo->netdev)) {
4039                 ret = hns3_nic_net_open(kinfo->netdev);
4040                 if (ret) {
4041                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4042                         netdev_err(kinfo->netdev,
4043                                    "hns net up fail, ret=%d!\n", ret);
4044                         return ret;
4045                 }
4046         }
4047
4048         return ret;
4049 }
4050
4051 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4052 {
4053         struct net_device *netdev = handle->kinfo.netdev;
4054         struct hns3_nic_priv *priv = netdev_priv(netdev);
4055         int ret;
4056
4057         /* Carrier off reporting is important to ethtool even BEFORE open */
4058         netif_carrier_off(netdev);
4059
4060         ret = hns3_get_ring_config(priv);
4061         if (ret)
4062                 return ret;
4063
4064         ret = hns3_nic_alloc_vector_data(priv);
4065         if (ret)
4066                 goto err_put_ring;
4067
4068         hns3_restore_coal(priv);
4069
4070         ret = hns3_nic_init_vector_data(priv);
4071         if (ret)
4072                 goto err_dealloc_vector;
4073
4074         ret = hns3_init_all_ring(priv);
4075         if (ret)
4076                 goto err_uninit_vector;
4077
4078         ret = hns3_client_start(handle);
4079         if (ret) {
4080                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4081                 goto err_uninit_ring;
4082         }
4083
4084         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4085
4086         return ret;
4087
4088 err_uninit_ring:
4089         hns3_uninit_all_ring(priv);
4090 err_uninit_vector:
4091         hns3_nic_uninit_vector_data(priv);
4092         priv->ring_data = NULL;
4093 err_dealloc_vector:
4094         hns3_nic_dealloc_vector_data(priv);
4095 err_put_ring:
4096         hns3_put_ring_config(priv);
4097         priv->ring_data = NULL;
4098
4099         return ret;
4100 }
4101
4102 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4103 {
4104         struct net_device *netdev = handle->kinfo.netdev;
4105         bool vlan_filter_enable;
4106         int ret;
4107
4108         ret = hns3_init_mac_addr(netdev, false);
4109         if (ret)
4110                 return ret;
4111
4112         ret = hns3_recover_hw_addr(netdev);
4113         if (ret)
4114                 return ret;
4115
4116         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4117         if (ret)
4118                 return ret;
4119
4120         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4121         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4122
4123         /* Hardware table is only clear when pf resets */
4124         if (!(handle->flags & HNAE3_SUPPORT_VF)) {
4125                 ret = hns3_restore_vlan(netdev);
4126                 if (ret)
4127                         return ret;
4128         }
4129
4130         return hns3_restore_fd_rules(netdev);
4131 }
4132
4133 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4134 {
4135         struct net_device *netdev = handle->kinfo.netdev;
4136         struct hns3_nic_priv *priv = netdev_priv(netdev);
4137         int ret;
4138
4139         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4140                 netdev_warn(netdev, "already uninitialized\n");
4141                 return 0;
4142         }
4143
4144         hns3_force_clear_all_rx_ring(handle);
4145
4146         hns3_nic_uninit_vector_data(priv);
4147
4148         hns3_store_coal(priv);
4149
4150         ret = hns3_nic_dealloc_vector_data(priv);
4151         if (ret)
4152                 netdev_err(netdev, "dealloc vector error\n");
4153
4154         ret = hns3_uninit_all_ring(priv);
4155         if (ret)
4156                 netdev_err(netdev, "uninit ring error\n");
4157
4158         hns3_put_ring_config(priv);
4159         priv->ring_data = NULL;
4160
4161         return ret;
4162 }
4163
4164 static int hns3_reset_notify(struct hnae3_handle *handle,
4165                              enum hnae3_reset_notify_type type)
4166 {
4167         int ret = 0;
4168
4169         switch (type) {
4170         case HNAE3_UP_CLIENT:
4171                 ret = hns3_reset_notify_up_enet(handle);
4172                 break;
4173         case HNAE3_DOWN_CLIENT:
4174                 ret = hns3_reset_notify_down_enet(handle);
4175                 break;
4176         case HNAE3_INIT_CLIENT:
4177                 ret = hns3_reset_notify_init_enet(handle);
4178                 break;
4179         case HNAE3_UNINIT_CLIENT:
4180                 ret = hns3_reset_notify_uninit_enet(handle);
4181                 break;
4182         case HNAE3_RESTORE_CLIENT:
4183                 ret = hns3_reset_notify_restore_enet(handle);
4184                 break;
4185         default:
4186                 break;
4187         }
4188
4189         return ret;
4190 }
4191
4192 int hns3_set_channels(struct net_device *netdev,
4193                       struct ethtool_channels *ch)
4194 {
4195         struct hnae3_handle *h = hns3_get_handle(netdev);
4196         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4197         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4198         u32 new_tqp_num = ch->combined_count;
4199         u16 org_tqp_num;
4200         int ret;
4201
4202         if (ch->rx_count || ch->tx_count)
4203                 return -EINVAL;
4204
4205         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4206             new_tqp_num < 1) {
4207                 dev_err(&netdev->dev,
4208                         "Change tqps fail, the tqp range is from 1 to %d",
4209                         hns3_get_max_available_channels(h));
4210                 return -EINVAL;
4211         }
4212
4213         if (kinfo->rss_size == new_tqp_num)
4214                 return 0;
4215
4216         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4217         if (ret)
4218                 return ret;
4219
4220         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4221         if (ret)
4222                 return ret;
4223
4224         org_tqp_num = h->kinfo.num_tqps;
4225         ret = h->ae_algo->ops->set_channels(h, new_tqp_num, rxfh_configured);
4226         if (ret) {
4227                 ret = h->ae_algo->ops->set_channels(h, org_tqp_num,
4228                                                     rxfh_configured);
4229                 if (ret) {
4230                         /* If revert to old tqp failed, fatal error occurred */
4231                         dev_err(&netdev->dev,
4232                                 "Revert to old tqp num fail, ret=%d", ret);
4233                         return ret;
4234                 }
4235                 dev_info(&netdev->dev,
4236                          "Change tqp num fail, Revert to old tqp num");
4237         }
4238         ret = hns3_reset_notify(h, HNAE3_INIT_CLIENT);
4239         if (ret)
4240                 return ret;
4241
4242         return hns3_reset_notify(h, HNAE3_UP_CLIENT);
4243 }
4244
4245 static const struct hnae3_client_ops client_ops = {
4246         .init_instance = hns3_client_init,
4247         .uninit_instance = hns3_client_uninit,
4248         .link_status_change = hns3_link_status_change,
4249         .setup_tc = hns3_client_setup_tc,
4250         .reset_notify = hns3_reset_notify,
4251 };
4252
4253 /* hns3_init_module - Driver registration routine
4254  * hns3_init_module is the first routine called when the driver is
4255  * loaded. All it does is register with the PCI subsystem.
4256  */
4257 static int __init hns3_init_module(void)
4258 {
4259         int ret;
4260
4261         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4262         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4263
4264         client.type = HNAE3_CLIENT_KNIC;
4265         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
4266                  hns3_driver_name);
4267
4268         client.ops = &client_ops;
4269
4270         INIT_LIST_HEAD(&client.node);
4271
4272         hns3_dbg_register_debugfs(hns3_driver_name);
4273
4274         ret = hnae3_register_client(&client);
4275         if (ret)
4276                 goto err_reg_client;
4277
4278         ret = pci_register_driver(&hns3_driver);
4279         if (ret)
4280                 goto err_reg_driver;
4281
4282         return ret;
4283
4284 err_reg_driver:
4285         hnae3_unregister_client(&client);
4286 err_reg_client:
4287         hns3_dbg_unregister_debugfs();
4288         return ret;
4289 }
4290 module_init(hns3_init_module);
4291
4292 /* hns3_exit_module - Driver exit cleanup routine
4293  * hns3_exit_module is called just before the driver is removed
4294  * from memory.
4295  */
4296 static void __exit hns3_exit_module(void)
4297 {
4298         pci_unregister_driver(&hns3_driver);
4299         hnae3_unregister_client(&client);
4300         hns3_dbg_unregister_debugfs();
4301 }
4302 module_exit(hns3_exit_module);
4303
4304 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4305 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4306 MODULE_LICENSE("GPL");
4307 MODULE_ALIAS("pci:hns-nic");
4308 MODULE_VERSION(HNS3_MOD_VERSION);