drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/ip.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/aer.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/sctp.h>
  18 #include <net/gre.h>
  19 #include <net/ip6_checksum.h>
  20 #include <net/pkt_cls.h>
  21 #include <net/tcp.h>
  22 #include <net/vxlan.h>
  23
  24 #include "hnae3.h"
  25 #include "hns3_enet.h"
  26 /* All hns3 tracepoints are defined by the include below, which
  27  * must be included exactly once across the whole kernel with
  28  * CREATE_TRACE_POINTS defined
  29  */
  30 #define CREATE_TRACE_POINTS
  31 #include "hns3_trace.h"
  32
  33 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  34 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  35
  36 #define hns3_rl_err(fmt, ...)                                           \
  37         do {                                                            \
  38                 if (net_ratelimit())                                    \
  39                         netdev_err(fmt, ##__VA_ARGS__);                 \
  40         } while (0)
  41
  42 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
  43
  44 static const char hns3_driver_name[] = "hns3";
  45 static const char hns3_driver_string[] =
  46                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  47 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  48 static struct hnae3_client client;
  49
  50 static int debug = -1;
  51 module_param(debug, int, 0);
  52 MODULE_PARM_DESC(debug, " Network interface message level setting");
  53
  54 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  55                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  56
  57 #define HNS3_INNER_VLAN_TAG     1
  58 #define HNS3_OUTER_VLAN_TAG     2
  59
  60 #define HNS3_MIN_TX_LEN         33U
  61
  62 /* hns3_pci_tbl - PCI Device ID Table
  63  *
  64  * Last entry must be all 0s
  65  *
  66  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  67  *   Class, Class Mask, private data (not used) }
  68  */
  69 static const struct pci_device_id hns3_pci_tbl[] = {
  70         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  71         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  72         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  73          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  74         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  75          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  76         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  77          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  78         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  79          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  80         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  81          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  82         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  83         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  84          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  85         /* required last entry */
  86         {0, }
  87 };
  88 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  89
  90 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  91 {
  92         struct hns3_enet_tqp_vector *tqp_vector = vector;
  93
  94         napi_schedule_irqoff(&tqp_vector->napi);
  95
  96         return IRQ_HANDLED;
  97 }
  98
  99 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
 100 {
 101         struct hns3_enet_tqp_vector *tqp_vectors;
 102         unsigned int i;
 103
 104         for (i = 0; i < priv->vector_num; i++) {
 105                 tqp_vectors = &priv->tqp_vector[i];
 106
 107                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 108                         continue;
 109
 110                 /* clear the affinity mask */
 111                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 112
 113                 /* release the irq resource */
 114                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 115                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 116         }
 117 }
 118
 119 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 120 {
 121         struct hns3_enet_tqp_vector *tqp_vectors;
 122         int txrx_int_idx = 0;
 123         int rx_int_idx = 0;
 124         int tx_int_idx = 0;
 125         unsigned int i;
 126         int ret;
 127
 128         for (i = 0; i < priv->vector_num; i++) {
 129                 tqp_vectors = &priv->tqp_vector[i];
 130
 131                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 132                         continue;
 133
 134                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 135                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 136                                  "%s-%s-%s-%d", hns3_driver_name,
 137                                  pci_name(priv->ae_handle->pdev),
 138                                  "TxRx", txrx_int_idx++);
 139                         txrx_int_idx++;
 140                 } else if (tqp_vectors->rx_group.ring) {
 141                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 142                                  "%s-%s-%s-%d", hns3_driver_name,
 143                                  pci_name(priv->ae_handle->pdev),
 144                                  "Rx", rx_int_idx++);
 145                 } else if (tqp_vectors->tx_group.ring) {
 146                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 147                                  "%s-%s-%s-%d", hns3_driver_name,
 148                                  pci_name(priv->ae_handle->pdev),
 149                                  "Tx", tx_int_idx++);
 150                 } else {
 151                         /* Skip this unused q_vector */
 152                         continue;
 153                 }
 154
 155                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 156
 157                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 158                                   tqp_vectors->name, tqp_vectors);
 159                 if (ret) {
 160                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 161                                    tqp_vectors->vector_irq);
 162                         hns3_nic_uninit_irq(priv);
 163                         return ret;
 164                 }
 165
 166                 disable_irq(tqp_vectors->vector_irq);
 167
 168                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 169                                       &tqp_vectors->affinity_mask);
 170
 171                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 172         }
 173
 174         return 0;
 175 }
 176
 177 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 178                                  u32 mask_en)
 179 {
 180         writel(mask_en, tqp_vector->mask_addr);
 181 }
 182
 183 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 184 {
 185         napi_enable(&tqp_vector->napi);
 186         enable_irq(tqp_vector->vector_irq);
 187
 188         /* enable vector */
 189         hns3_mask_vector_irq(tqp_vector, 1);
 190 }
 191
 192 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 193 {
 194         /* disable vector */
 195         hns3_mask_vector_irq(tqp_vector, 0);
 196
 197         disable_irq(tqp_vector->vector_irq);
 198         napi_disable(&tqp_vector->napi);
 199 }
 200
 201 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 202                                  u32 rl_value)
 203 {
 204         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 205
 206         /* this defines the configuration for RL (Interrupt Rate Limiter).
 207          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 208          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 209          */
 210
 211         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 212             !tqp_vector->rx_group.coal.gl_adapt_enable)
 213                 /* According to the hardware, the range of rl_reg is
 214                  * 0-59 and the unit is 4.
 215                  */
 216                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 217
 218         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 219 }
 220
 221 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 222                                     u32 gl_value)
 223 {
 224         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 225
 226         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 227 }
 228
 229 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 230                                     u32 gl_value)
 231 {
 232         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 233
 234         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 235 }
 236
 237 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 238                                    struct hns3_nic_priv *priv)
 239 {
 240         /* initialize the configuration for interrupt coalescing.
 241          * 1. GL (Interrupt Gap Limiter)
 242          * 2. RL (Interrupt Rate Limiter)
 243          *
 244          * Default: enable interrupt coalescing self-adaptive and GL
 245          */
 246         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 247         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 248
 249         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 250         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 251
 252         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 253         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 254 }
 255
 256 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 257                                       struct hns3_nic_priv *priv)
 258 {
 259         struct hnae3_handle *h = priv->ae_handle;
 260
 261         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 262                                        tqp_vector->tx_group.coal.int_gl);
 263         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 264                                        tqp_vector->rx_group.coal.int_gl);
 265         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 266 }
 267
 268 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 269 {
 270         struct hnae3_handle *h = hns3_get_handle(netdev);
 271         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 272         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 273         int i, ret;
 274
 275         if (kinfo->num_tc <= 1) {
 276                 netdev_reset_tc(netdev);
 277         } else {
 278                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 279                 if (ret) {
 280                         netdev_err(netdev,
 281                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 282                         return ret;
 283                 }
 284
 285                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 286                         if (!kinfo->tc_info[i].enable)
 287                                 continue;
 288
 289                         netdev_set_tc_queue(netdev,
 290                                             kinfo->tc_info[i].tc,
 291                                             kinfo->tc_info[i].tqp_count,
 292                                             kinfo->tc_info[i].tqp_offset);
 293                 }
 294         }
 295
 296         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 297         if (ret) {
 298                 netdev_err(netdev,
 299                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 300                 return ret;
 301         }
 302
 303         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 304         if (ret) {
 305                 netdev_err(netdev,
 306                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 307                 return ret;
 308         }
 309
 310         return 0;
 311 }
 312
 313 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 314 {
 315         u16 alloc_tqps, max_rss_size, rss_size;
 316
 317         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 318         rss_size = alloc_tqps / h->kinfo.num_tc;
 319
 320         return min_t(u16, rss_size, max_rss_size);
 321 }
 322
 323 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 324 {
 325         u32 rcb_reg;
 326
 327         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 328         rcb_reg |= BIT(HNS3_RING_EN_B);
 329         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 330 }
 331
 332 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 333 {
 334         u32 rcb_reg;
 335
 336         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 337         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 338         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 339 }
 340
 341 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 342 {
 343 #ifdef CONFIG_RFS_ACCEL
 344         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 345         netdev->rx_cpu_rmap = NULL;
 346 #endif
 347 }
 348
 349 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 350 {
 351 #ifdef CONFIG_RFS_ACCEL
 352         struct hns3_nic_priv *priv = netdev_priv(netdev);
 353         struct hns3_enet_tqp_vector *tqp_vector;
 354         int i, ret;
 355
 356         if (!netdev->rx_cpu_rmap) {
 357                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 358                 if (!netdev->rx_cpu_rmap)
 359                         return -ENOMEM;
 360         }
 361
 362         for (i = 0; i < priv->vector_num; i++) {
 363                 tqp_vector = &priv->tqp_vector[i];
 364                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 365                                        tqp_vector->vector_irq);
 366                 if (ret) {
 367                         hns3_free_rx_cpu_rmap(netdev);
 368                         return ret;
 369                 }
 370         }
 371 #endif
 372         return 0;
 373 }
 374
 375 static int hns3_nic_net_up(struct net_device *netdev)
 376 {
 377         struct hns3_nic_priv *priv = netdev_priv(netdev);
 378         struct hnae3_handle *h = priv->ae_handle;
 379         int i, j;
 380         int ret;
 381
 382         ret = hns3_nic_reset_all_ring(h);
 383         if (ret)
 384                 return ret;
 385
 386         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 387
 388         /* enable the vectors */
 389         for (i = 0; i < priv->vector_num; i++)
 390                 hns3_vector_enable(&priv->tqp_vector[i]);
 391
 392         /* enable rcb */
 393         for (j = 0; j < h->kinfo.num_tqps; j++)
 394                 hns3_tqp_enable(h->kinfo.tqp[j]);
 395
 396         /* start the ae_dev */
 397         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 398         if (ret) {
 399                 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 400                 while (j--)
 401                         hns3_tqp_disable(h->kinfo.tqp[j]);
 402
 403                 for (j = i - 1; j >= 0; j--)
 404                         hns3_vector_disable(&priv->tqp_vector[j]);
 405         }
 406
 407         return ret;
 408 }
 409
 410 static void hns3_config_xps(struct hns3_nic_priv *priv)
 411 {
 412         int i;
 413
 414         for (i = 0; i < priv->vector_num; i++) {
 415                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 416                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 417
 418                 while (ring) {
 419                         int ret;
 420
 421                         ret = netif_set_xps_queue(priv->netdev,
 422                                                   &tqp_vector->affinity_mask,
 423                                                   ring->tqp->tqp_index);
 424                         if (ret)
 425                                 netdev_warn(priv->netdev,
 426                                             "set xps queue failed: %d", ret);
 427
 428                         ring = ring->next;
 429                 }
 430         }
 431 }
 432
 433 static int hns3_nic_net_open(struct net_device *netdev)
 434 {
 435         struct hns3_nic_priv *priv = netdev_priv(netdev);
 436         struct hnae3_handle *h = hns3_get_handle(netdev);
 437         struct hnae3_knic_private_info *kinfo;
 438         int i, ret;
 439
 440         if (hns3_nic_resetting(netdev))
 441                 return -EBUSY;
 442
 443         netif_carrier_off(netdev);
 444
 445         ret = hns3_nic_set_real_num_queue(netdev);
 446         if (ret)
 447                 return ret;
 448
 449         ret = hns3_nic_net_up(netdev);
 450         if (ret) {
 451                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 452                 return ret;
 453         }
 454
 455         kinfo = &h->kinfo;
 456         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 457                 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
 458
 459         if (h->ae_algo->ops->set_timer_task)
 460                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 461
 462         hns3_config_xps(priv);
 463
 464         netif_dbg(h, drv, netdev, "net open\n");
 465
 466         return 0;
 467 }
 468
 469 static void hns3_reset_tx_queue(struct hnae3_handle *h)
 470 {
 471         struct net_device *ndev = h->kinfo.netdev;
 472         struct hns3_nic_priv *priv = netdev_priv(ndev);
 473         struct netdev_queue *dev_queue;
 474         u32 i;
 475
 476         for (i = 0; i < h->kinfo.num_tqps; i++) {
 477                 dev_queue = netdev_get_tx_queue(ndev,
 478                                                 priv->ring[i].queue_index);
 479                 netdev_tx_reset_queue(dev_queue);
 480         }
 481 }
 482
 483 static void hns3_nic_net_down(struct net_device *netdev)
 484 {
 485         struct hns3_nic_priv *priv = netdev_priv(netdev);
 486         struct hnae3_handle *h = hns3_get_handle(netdev);
 487         const struct hnae3_ae_ops *ops;
 488         int i;
 489
 490         /* disable vectors */
 491         for (i = 0; i < priv->vector_num; i++)
 492                 hns3_vector_disable(&priv->tqp_vector[i]);
 493
 494         /* disable rcb */
 495         for (i = 0; i < h->kinfo.num_tqps; i++)
 496                 hns3_tqp_disable(h->kinfo.tqp[i]);
 497
 498         /* stop ae_dev */
 499         ops = priv->ae_handle->ae_algo->ops;
 500         if (ops->stop)
 501                 ops->stop(priv->ae_handle);
 502
 503         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 504          * during reset process, because driver may not be able
 505          * to disable the ring through firmware when downing the netdev.
 506          */
 507         if (!hns3_nic_resetting(netdev))
 508                 hns3_clear_all_ring(priv->ae_handle, false);
 509
 510         hns3_reset_tx_queue(priv->ae_handle);
 511 }
 512
 513 static int hns3_nic_net_stop(struct net_device *netdev)
 514 {
 515         struct hns3_nic_priv *priv = netdev_priv(netdev);
 516         struct hnae3_handle *h = hns3_get_handle(netdev);
 517
 518         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 519                 return 0;
 520
 521         netif_dbg(h, drv, netdev, "net stop\n");
 522
 523         if (h->ae_algo->ops->set_timer_task)
 524                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 525
 526         netif_tx_stop_all_queues(netdev);
 527         netif_carrier_off(netdev);
 528
 529         hns3_nic_net_down(netdev);
 530
 531         return 0;
 532 }
 533
 534 static int hns3_nic_uc_sync(struct net_device *netdev,
 535                             const unsigned char *addr)
 536 {
 537         struct hnae3_handle *h = hns3_get_handle(netdev);
 538
 539         if (h->ae_algo->ops->add_uc_addr)
 540                 return h->ae_algo->ops->add_uc_addr(h, addr);
 541
 542         return 0;
 543 }
 544
 545 static int hns3_nic_uc_unsync(struct net_device *netdev,
 546                               const unsigned char *addr)
 547 {
 548         struct hnae3_handle *h = hns3_get_handle(netdev);
 549
 550         /* need ignore the request of removing device address, because
 551          * we store the device address and other addresses of uc list
 552          * in the function's mac filter list.
 553          */
 554         if (ether_addr_equal(addr, netdev->dev_addr))
 555                 return 0;
 556
 557         if (h->ae_algo->ops->rm_uc_addr)
 558                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 559
 560         return 0;
 561 }
 562
 563 static int hns3_nic_mc_sync(struct net_device *netdev,
 564                             const unsigned char *addr)
 565 {
 566         struct hnae3_handle *h = hns3_get_handle(netdev);
 567
 568         if (h->ae_algo->ops->add_mc_addr)
 569                 return h->ae_algo->ops->add_mc_addr(h, addr);
 570
 571         return 0;
 572 }
 573
 574 static int hns3_nic_mc_unsync(struct net_device *netdev,
 575                               const unsigned char *addr)
 576 {
 577         struct hnae3_handle *h = hns3_get_handle(netdev);
 578
 579         if (h->ae_algo->ops->rm_mc_addr)
 580                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 581
 582         return 0;
 583 }
 584
 585 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 586 {
 587         u8 flags = 0;
 588
 589         if (netdev->flags & IFF_PROMISC) {
 590                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 591         } else {
 592                 flags |= HNAE3_VLAN_FLTR;
 593                 if (netdev->flags & IFF_ALLMULTI)
 594                         flags |= HNAE3_USER_MPE;
 595         }
 596
 597         return flags;
 598 }
 599
 600 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 601 {
 602         struct hnae3_handle *h = hns3_get_handle(netdev);
 603         u8 new_flags;
 604
 605         new_flags = hns3_get_netdev_flags(netdev);
 606
 607         __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 608         __dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync);
 609
 610         /* User mode Promisc mode enable and vlan filtering is disabled to
 611          * let all packets in.
 612          */
 613         h->netdev_flags = new_flags;
 614         hns3_request_update_promisc_mode(h);
 615 }
 616
 617 void hns3_request_update_promisc_mode(struct hnae3_handle *handle)
 618 {
 619         const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
 620
 621         if (ops->request_update_promisc_mode)
 622                 ops->request_update_promisc_mode(handle);
 623 }
 624
 625 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 626 {
 627         struct hns3_nic_priv *priv = netdev_priv(netdev);
 628         struct hnae3_handle *h = priv->ae_handle;
 629
 630         if (h->ae_algo->ops->set_promisc_mode) {
 631                 return h->ae_algo->ops->set_promisc_mode(h,
 632                                                 promisc_flags & HNAE3_UPE,
 633                                                 promisc_flags & HNAE3_MPE);
 634         }
 635
 636         return 0;
 637 }
 638
 639 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 640 {
 641         struct hns3_nic_priv *priv = netdev_priv(netdev);
 642         struct hnae3_handle *h = priv->ae_handle;
 643         bool last_state;
 644
 645         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 646                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 647                 if (enable != last_state) {
 648                         netdev_info(netdev,
 649                                     "%s vlan filter\n",
 650                                     enable ? "enable" : "disable");
 651                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 652                 }
 653         }
 654 }
 655
 656 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 657                         u16 *mss, u32 *type_cs_vlan_tso)
 658 {
 659         u32 l4_offset, hdr_len;
 660         union l3_hdr_info l3;
 661         union l4_hdr_info l4;
 662         u32 l4_paylen;
 663         int ret;
 664
 665         if (!skb_is_gso(skb))
 666                 return 0;
 667
 668         ret = skb_cow_head(skb, 0);
 669         if (unlikely(ret < 0))
 670                 return ret;
 671
 672         l3.hdr = skb_network_header(skb);
 673         l4.hdr = skb_transport_header(skb);
 674
 675         /* Software should clear the IPv4's checksum field when tso is
 676          * needed.
 677          */
 678         if (l3.v4->version == 4)
 679                 l3.v4->check = 0;
 680
 681         /* tunnel packet */
 682         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 683                                          SKB_GSO_GRE_CSUM |
 684                                          SKB_GSO_UDP_TUNNEL |
 685                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 686                 if ((!(skb_shinfo(skb)->gso_type &
 687                     SKB_GSO_PARTIAL)) &&
 688                     (skb_shinfo(skb)->gso_type &
 689                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 690                         /* Software should clear the udp's checksum
 691                          * field when tso is needed.
 692                          */
 693                         l4.udp->check = 0;
 694                 }
 695                 /* reset l3&l4 pointers from outer to inner headers */
 696                 l3.hdr = skb_inner_network_header(skb);
 697                 l4.hdr = skb_inner_transport_header(skb);
 698
 699                 /* Software should clear the IPv4's checksum field when
 700                  * tso is needed.
 701                  */
 702                 if (l3.v4->version == 4)
 703                         l3.v4->check = 0;
 704         }
 705
 706         /* normal or tunnel packet */
 707         l4_offset = l4.hdr - skb->data;
 708         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 709
 710         /* remove payload length from inner pseudo checksum when tso */
 711         l4_paylen = skb->len - l4_offset;
 712         csum_replace_by_diff(&l4.tcp->check,
 713                              (__force __wsum)htonl(l4_paylen));
 714
 715         /* find the txbd field values */
 716         *paylen = skb->len - hdr_len;
 717         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 718
 719         /* get MSS for TSO */
 720         *mss = skb_shinfo(skb)->gso_size;
 721
 722         trace_hns3_tso(skb);
 723
 724         return 0;
 725 }
 726
 727 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 728                                 u8 *il4_proto)
 729 {
 730         union l3_hdr_info l3;
 731         unsigned char *l4_hdr;
 732         unsigned char *exthdr;
 733         u8 l4_proto_tmp;
 734         __be16 frag_off;
 735
 736         /* find outer header point */
 737         l3.hdr = skb_network_header(skb);
 738         l4_hdr = skb_transport_header(skb);
 739
 740         if (skb->protocol == htons(ETH_P_IPV6)) {
 741                 exthdr = l3.hdr + sizeof(*l3.v6);
 742                 l4_proto_tmp = l3.v6->nexthdr;
 743                 if (l4_hdr != exthdr)
 744                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 745                                          &l4_proto_tmp, &frag_off);
 746         } else if (skb->protocol == htons(ETH_P_IP)) {
 747                 l4_proto_tmp = l3.v4->protocol;
 748         } else {
 749                 return -EINVAL;
 750         }
 751
 752         *ol4_proto = l4_proto_tmp;
 753
 754         /* tunnel packet */
 755         if (!skb->encapsulation) {
 756                 *il4_proto = 0;
 757                 return 0;
 758         }
 759
 760         /* find inner header point */
 761         l3.hdr = skb_inner_network_header(skb);
 762         l4_hdr = skb_inner_transport_header(skb);
 763
 764         if (l3.v6->version == 6) {
 765                 exthdr = l3.hdr + sizeof(*l3.v6);
 766                 l4_proto_tmp = l3.v6->nexthdr;
 767                 if (l4_hdr != exthdr)
 768                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 769                                          &l4_proto_tmp, &frag_off);
 770         } else if (l3.v4->version == 4) {
 771                 l4_proto_tmp = l3.v4->protocol;
 772         }
 773
 774         *il4_proto = l4_proto_tmp;
 775
 776         return 0;
 777 }
 778
 779 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 780  * and it is udp packet, which has a dest port as the IANA assigned.
 781  * the hardware is expected to do the checksum offload, but the
 782  * hardware will not do the checksum offload when udp dest port is
 783  * 4789.
 784  */
 785 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 786 {
 787         union l4_hdr_info l4;
 788
 789         l4.hdr = skb_transport_header(skb);
 790
 791         if (!(!skb->encapsulation &&
 792               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 793                 return false;
 794
 795         skb_checksum_help(skb);
 796
 797         return true;
 798 }
 799
 800 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 801                                   u32 *ol_type_vlan_len_msec)
 802 {
 803         u32 l2_len, l3_len, l4_len;
 804         unsigned char *il2_hdr;
 805         union l3_hdr_info l3;
 806         union l4_hdr_info l4;
 807
 808         l3.hdr = skb_network_header(skb);
 809         l4.hdr = skb_transport_header(skb);
 810
 811         /* compute OL2 header size, defined in 2 Bytes */
 812         l2_len = l3.hdr - skb->data;
 813         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 814
 815         /* compute OL3 header size, defined in 4 Bytes */
 816         l3_len = l4.hdr - l3.hdr;
 817         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 818
 819         il2_hdr = skb_inner_mac_header(skb);
 820         /* compute OL4 header size, defined in 4 Bytes */
 821         l4_len = il2_hdr - l4.hdr;
 822         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 823
 824         /* define outer network header type */
 825         if (skb->protocol == htons(ETH_P_IP)) {
 826                 if (skb_is_gso(skb))
 827                         hns3_set_field(*ol_type_vlan_len_msec,
 828                                        HNS3_TXD_OL3T_S,
 829                                        HNS3_OL3T_IPV4_CSUM);
 830                 else
 831                         hns3_set_field(*ol_type_vlan_len_msec,
 832                                        HNS3_TXD_OL3T_S,
 833                                        HNS3_OL3T_IPV4_NO_CSUM);
 834
 835         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 836                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 837                                HNS3_OL3T_IPV6);
 838         }
 839
 840         if (ol4_proto == IPPROTO_UDP)
 841                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 842                                HNS3_TUN_MAC_IN_UDP);
 843         else if (ol4_proto == IPPROTO_GRE)
 844                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 845                                HNS3_TUN_NVGRE);
 846 }
 847
 848 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 849                            u8 il4_proto, u32 *type_cs_vlan_tso,
 850                            u32 *ol_type_vlan_len_msec)
 851 {
 852         unsigned char *l2_hdr = skb->data;
 853         u32 l4_proto = ol4_proto;
 854         union l4_hdr_info l4;
 855         union l3_hdr_info l3;
 856         u32 l2_len, l3_len;
 857
 858         l4.hdr = skb_transport_header(skb);
 859         l3.hdr = skb_network_header(skb);
 860
 861         /* handle encapsulation skb */
 862         if (skb->encapsulation) {
 863                 /* If this is a not UDP/GRE encapsulation skb */
 864                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 865                         /* drop the skb tunnel packet if hardware don't support,
 866                          * because hardware can't calculate csum when TSO.
 867                          */
 868                         if (skb_is_gso(skb))
 869                                 return -EDOM;
 870
 871                         /* the stack computes the IP header already,
 872                          * driver calculate l4 checksum when not TSO.
 873                          */
 874                         skb_checksum_help(skb);
 875                         return 0;
 876                 }
 877
 878                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 879
 880                 /* switch to inner header */
 881                 l2_hdr = skb_inner_mac_header(skb);
 882                 l3.hdr = skb_inner_network_header(skb);
 883                 l4.hdr = skb_inner_transport_header(skb);
 884                 l4_proto = il4_proto;
 885         }
 886
 887         if (l3.v4->version == 4) {
 888                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 889                                HNS3_L3T_IPV4);
 890
 891                 /* the stack computes the IP header already, the only time we
 892                  * need the hardware to recompute it is in the case of TSO.
 893                  */
 894                 if (skb_is_gso(skb))
 895                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 896         } else if (l3.v6->version == 6) {
 897                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 898                                HNS3_L3T_IPV6);
 899         }
 900
 901         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 902         l2_len = l3.hdr - l2_hdr;
 903         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 904
 905         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 906         l3_len = l4.hdr - l3.hdr;
 907         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 908
 909         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 910         switch (l4_proto) {
 911         case IPPROTO_TCP:
 912                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 913                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 914                                HNS3_L4T_TCP);
 915                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 916                                l4.tcp->doff);
 917                 break;
 918         case IPPROTO_UDP:
 919                 if (hns3_tunnel_csum_bug(skb))
 920                         break;
 921
 922                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 923                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 924                                HNS3_L4T_UDP);
 925                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 926                                (sizeof(struct udphdr) >> 2));
 927                 break;
 928         case IPPROTO_SCTP:
 929                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 930                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 931                                HNS3_L4T_SCTP);
 932                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 933                                (sizeof(struct sctphdr) >> 2));
 934                 break;
 935         default:
 936                 /* drop the skb tunnel packet if hardware don't support,
 937                  * because hardware can't calculate csum when TSO.
 938                  */
 939                 if (skb_is_gso(skb))
 940                         return -EDOM;
 941
 942                 /* the stack computes the IP header already,
 943                  * driver calculate l4 checksum when not TSO.
 944                  */
 945                 skb_checksum_help(skb);
 946                 return 0;
 947         }
 948
 949         return 0;
 950 }
 951
 952 static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,
 953                              struct sk_buff *skb)
 954 {
 955         struct hnae3_handle *handle = tx_ring->tqp->handle;
 956         struct vlan_ethhdr *vhdr;
 957         int rc;
 958
 959         if (!(skb->protocol == htons(ETH_P_8021Q) ||
 960               skb_vlan_tag_present(skb)))
 961                 return 0;
 962
 963         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 964          * header is allowed in skb, otherwise it will cause RAS error.
 965          */
 966         if (unlikely(skb_vlan_tagged_multi(skb) &&
 967                      handle->port_base_vlan_state ==
 968                      HNAE3_PORT_BASE_VLAN_ENABLE))
 969                 return -EINVAL;
 970
 971         if (skb->protocol == htons(ETH_P_8021Q) &&
 972             !(handle->kinfo.netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
 973                 /* When HW VLAN acceleration is turned off, and the stack
 974                  * sets the protocol to 802.1q, the driver just need to
 975                  * set the protocol to the encapsulated ethertype.
 976                  */
 977                 skb->protocol = vlan_get_protocol(skb);
 978                 return 0;
 979         }
 980
 981         if (skb_vlan_tag_present(skb)) {
 982                 /* Based on hw strategy, use out_vtag in two layer tag case,
 983                  * and use inner_vtag in one tag case.
 984                  */
 985                 if (skb->protocol == htons(ETH_P_8021Q) &&
 986                     handle->port_base_vlan_state ==
 987                     HNAE3_PORT_BASE_VLAN_DISABLE)
 988                         rc = HNS3_OUTER_VLAN_TAG;
 989                 else
 990                         rc = HNS3_INNER_VLAN_TAG;
 991
 992                 skb->protocol = vlan_get_protocol(skb);
 993                 return rc;
 994         }
 995
 996         rc = skb_cow_head(skb, 0);
 997         if (unlikely(rc < 0))
 998                 return rc;
 999
1000         vhdr = (struct vlan_ethhdr *)skb->data;
1001         vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority << VLAN_PRIO_SHIFT)
1002                                          & VLAN_PRIO_MASK);
1003
1004         skb->protocol = vlan_get_protocol(skb);
1005         return 0;
1006 }
1007
1008 static int hns3_fill_skb_desc(struct hns3_enet_ring *ring,
1009                               struct sk_buff *skb, struct hns3_desc *desc)
1010 {
1011         u32 ol_type_vlan_len_msec = 0;
1012         u32 type_cs_vlan_tso = 0;
1013         u32 paylen = skb->len;
1014         u16 inner_vtag = 0;
1015         u16 out_vtag = 0;
1016         u16 mss = 0;
1017         int ret;
1018
1019         ret = hns3_handle_vtags(ring, skb);
1020         if (unlikely(ret < 0)) {
1021                 u64_stats_update_begin(&ring->syncp);
1022                 ring->stats.tx_vlan_err++;
1023                 u64_stats_update_end(&ring->syncp);
1024                 return ret;
1025         } else if (ret == HNS3_INNER_VLAN_TAG) {
1026                 inner_vtag = skb_vlan_tag_get(skb);
1027                 inner_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1028                                 VLAN_PRIO_MASK;
1029                 hns3_set_field(type_cs_vlan_tso, HNS3_TXD_VLAN_B, 1);
1030         } else if (ret == HNS3_OUTER_VLAN_TAG) {
1031                 out_vtag = skb_vlan_tag_get(skb);
1032                 out_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1033                                 VLAN_PRIO_MASK;
1034                 hns3_set_field(ol_type_vlan_len_msec, HNS3_TXD_OVLAN_B,
1035                                1);
1036         }
1037
1038         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1039                 u8 ol4_proto, il4_proto;
1040
1041                 skb_reset_mac_len(skb);
1042
1043                 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1044                 if (unlikely(ret < 0)) {
1045                         u64_stats_update_begin(&ring->syncp);
1046                         ring->stats.tx_l4_proto_err++;
1047                         u64_stats_update_end(&ring->syncp);
1048                         return ret;
1049                 }
1050
1051                 ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1052                                       &type_cs_vlan_tso,
1053                                       &ol_type_vlan_len_msec);
1054                 if (unlikely(ret < 0)) {
1055                         u64_stats_update_begin(&ring->syncp);
1056                         ring->stats.tx_l2l3l4_err++;
1057                         u64_stats_update_end(&ring->syncp);
1058                         return ret;
1059                 }
1060
1061                 ret = hns3_set_tso(skb, &paylen, &mss,
1062                                    &type_cs_vlan_tso);
1063                 if (unlikely(ret < 0)) {
1064                         u64_stats_update_begin(&ring->syncp);
1065                         ring->stats.tx_tso_err++;
1066                         u64_stats_update_end(&ring->syncp);
1067                         return ret;
1068                 }
1069         }
1070
1071         /* Set txbd */
1072         desc->tx.ol_type_vlan_len_msec =
1073                 cpu_to_le32(ol_type_vlan_len_msec);
1074         desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1075         desc->tx.paylen = cpu_to_le32(paylen);
1076         desc->tx.mss = cpu_to_le16(mss);
1077         desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1078         desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1079
1080         return 0;
1081 }
1082
1083 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1084                           unsigned int size, enum hns_desc_type type)
1085 {
1086 #define HNS3_LIKELY_BD_NUM      1
1087
1088         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1089         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1090         struct device *dev = ring_to_dev(ring);
1091         skb_frag_t *frag;
1092         unsigned int frag_buf_num;
1093         int k, sizeoflast;
1094         dma_addr_t dma;
1095
1096         if (type == DESC_TYPE_SKB) {
1097                 struct sk_buff *skb = (struct sk_buff *)priv;
1098                 int ret;
1099
1100                 ret = hns3_fill_skb_desc(ring, skb, desc);
1101                 if (unlikely(ret < 0))
1102                         return ret;
1103
1104                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1105         } else if (type == DESC_TYPE_FRAGLIST_SKB) {
1106                 struct sk_buff *skb = (struct sk_buff *)priv;
1107
1108                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1109         } else {
1110                 frag = (skb_frag_t *)priv;
1111                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1112         }
1113
1114         if (unlikely(dma_mapping_error(dev, dma))) {
1115                 u64_stats_update_begin(&ring->syncp);
1116                 ring->stats.sw_err_cnt++;
1117                 u64_stats_update_end(&ring->syncp);
1118                 return -ENOMEM;
1119         }
1120
1121         desc_cb->length = size;
1122
1123         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1124                 desc_cb->priv = priv;
1125                 desc_cb->dma = dma;
1126                 desc_cb->type = type;
1127                 desc->addr = cpu_to_le64(dma);
1128                 desc->tx.send_size = cpu_to_le16(size);
1129                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1130                         cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1131
1132                 trace_hns3_tx_desc(ring, ring->next_to_use);
1133                 ring_ptr_move_fw(ring, next_to_use);
1134                 return HNS3_LIKELY_BD_NUM;
1135         }
1136
1137         frag_buf_num = hns3_tx_bd_count(size);
1138         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1139         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1140
1141         /* When frag size is bigger than hardware limit, split this frag */
1142         for (k = 0; k < frag_buf_num; k++) {
1143                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1144                 desc_cb->priv = priv;
1145                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1146                 desc_cb->type = ((type == DESC_TYPE_FRAGLIST_SKB ||
1147                                   type == DESC_TYPE_SKB) && !k) ?
1148                                 type : DESC_TYPE_PAGE;
1149
1150                 /* now, fill the descriptor */
1151                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1152                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1153                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1154                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1155                                 cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1156
1157                 trace_hns3_tx_desc(ring, ring->next_to_use);
1158                 /* move ring pointer to next */
1159                 ring_ptr_move_fw(ring, next_to_use);
1160
1161                 desc_cb = &ring->desc_cb[ring->next_to_use];
1162                 desc = &ring->desc[ring->next_to_use];
1163         }
1164
1165         return frag_buf_num;
1166 }
1167
1168 static unsigned int hns3_skb_bd_num(struct sk_buff *skb, unsigned int *bd_size,
1169                                     unsigned int bd_num)
1170 {
1171         unsigned int size;
1172         int i;
1173
1174         size = skb_headlen(skb);
1175         while (size > HNS3_MAX_BD_SIZE) {
1176                 bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1177                 size -= HNS3_MAX_BD_SIZE;
1178
1179                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1180                         return bd_num;
1181         }
1182
1183         if (size) {
1184                 bd_size[bd_num++] = size;
1185                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1186                         return bd_num;
1187         }
1188
1189         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1190                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1191                 size = skb_frag_size(frag);
1192                 if (!size)
1193                         continue;
1194
1195                 while (size > HNS3_MAX_BD_SIZE) {
1196                         bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1197                         size -= HNS3_MAX_BD_SIZE;
1198
1199                         if (bd_num > HNS3_MAX_TSO_BD_NUM)
1200                                 return bd_num;
1201                 }
1202
1203                 bd_size[bd_num++] = size;
1204                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1205                         return bd_num;
1206         }
1207
1208         return bd_num;
1209 }
1210
1211 static unsigned int hns3_tx_bd_num(struct sk_buff *skb, unsigned int *bd_size)
1212 {
1213         struct sk_buff *frag_skb;
1214         unsigned int bd_num = 0;
1215
1216         /* If the total len is within the max bd limit */
1217         if (likely(skb->len <= HNS3_MAX_BD_SIZE && !skb_has_frag_list(skb) &&
1218                    skb_shinfo(skb)->nr_frags < HNS3_MAX_NON_TSO_BD_NUM))
1219                 return skb_shinfo(skb)->nr_frags + 1U;
1220
1221         /* The below case will always be linearized, return
1222          * HNS3_MAX_BD_NUM_TSO + 1U to make sure it is linearized.
1223          */
1224         if (unlikely(skb->len > HNS3_MAX_TSO_SIZE ||
1225                      (!skb_is_gso(skb) && skb->len > HNS3_MAX_NON_TSO_SIZE)))
1226                 return HNS3_MAX_TSO_BD_NUM + 1U;
1227
1228         bd_num = hns3_skb_bd_num(skb, bd_size, bd_num);
1229
1230         if (!skb_has_frag_list(skb) || bd_num > HNS3_MAX_TSO_BD_NUM)
1231                 return bd_num;
1232
1233         skb_walk_frags(skb, frag_skb) {
1234                 bd_num = hns3_skb_bd_num(frag_skb, bd_size, bd_num);
1235                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1236                         return bd_num;
1237         }
1238
1239         return bd_num;
1240 }
1241
1242 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1243 {
1244         if (!skb->encapsulation)
1245                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1246
1247         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1248 }
1249
1250 /* HW need every continuous 8 buffer data to be larger than MSS,
1251  * we simplify it by ensuring skb_headlen + the first continuous
1252  * 7 frags to to be larger than gso header len + mss, and the remaining
1253  * continuous 7 frags to be larger than MSS except the last 7 frags.
1254  */
1255 static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,
1256                                      unsigned int bd_num)
1257 {
1258         unsigned int tot_len = 0;
1259         int i;
1260
1261         for (i = 0; i < HNS3_MAX_NON_TSO_BD_NUM - 1U; i++)
1262                 tot_len += bd_size[i];
1263
1264         /* ensure the first 8 frags is greater than mss + header */
1265         if (tot_len + bd_size[HNS3_MAX_NON_TSO_BD_NUM - 1U] <
1266             skb_shinfo(skb)->gso_size + hns3_gso_hdr_len(skb))
1267                 return true;
1268
1269         /* ensure every continuous 7 buffer is greater than mss
1270          * except the last one.
1271          */
1272         for (i = 0; i < bd_num - HNS3_MAX_NON_TSO_BD_NUM; i++) {
1273                 tot_len -= bd_size[i];
1274                 tot_len += bd_size[i + HNS3_MAX_NON_TSO_BD_NUM - 1U];
1275
1276                 if (tot_len < skb_shinfo(skb)->gso_size)
1277                         return true;
1278         }
1279
1280         return false;
1281 }
1282
1283 void hns3_shinfo_pack(struct skb_shared_info *shinfo, __u32 *size)
1284 {
1285         int i = 0;
1286
1287         for (i = 0; i < MAX_SKB_FRAGS; i++)
1288                 size[i] = skb_frag_size(&shinfo->frags[i]);
1289 }
1290
1291 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1292                                   struct net_device *netdev,
1293                                   struct sk_buff *skb)
1294 {
1295         struct hns3_nic_priv *priv = netdev_priv(netdev);
1296         unsigned int bd_size[HNS3_MAX_TSO_BD_NUM + 1U];
1297         unsigned int bd_num;
1298
1299         bd_num = hns3_tx_bd_num(skb, bd_size);
1300         if (unlikely(bd_num > HNS3_MAX_NON_TSO_BD_NUM)) {
1301                 if (bd_num <= HNS3_MAX_TSO_BD_NUM && skb_is_gso(skb) &&
1302                     !hns3_skb_need_linearized(skb, bd_size, bd_num)) {
1303                         trace_hns3_over_8bd(skb);
1304                         goto out;
1305                 }
1306
1307                 if (__skb_linearize(skb))
1308                         return -ENOMEM;
1309
1310                 bd_num = hns3_tx_bd_count(skb->len);
1311                 if ((skb_is_gso(skb) && bd_num > HNS3_MAX_TSO_BD_NUM) ||
1312                     (!skb_is_gso(skb) &&
1313                      bd_num > HNS3_MAX_NON_TSO_BD_NUM)) {
1314                         trace_hns3_over_8bd(skb);
1315                         return -ENOMEM;
1316                 }
1317
1318                 u64_stats_update_begin(&ring->syncp);
1319                 ring->stats.tx_copy++;
1320                 u64_stats_update_end(&ring->syncp);
1321         }
1322
1323 out:
1324         if (likely(ring_space(ring) >= bd_num))
1325                 return bd_num;
1326
1327         netif_stop_subqueue(netdev, ring->queue_index);
1328         smp_mb(); /* Memory barrier before checking ring_space */
1329
1330         /* Start queue in case hns3_clean_tx_ring has just made room
1331          * available and has not seen the queue stopped state performed
1332          * by netif_stop_subqueue above.
1333          */
1334         if (ring_space(ring) >= bd_num && netif_carrier_ok(netdev) &&
1335             !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
1336                 netif_start_subqueue(netdev, ring->queue_index);
1337                 return bd_num;
1338         }
1339
1340         return -EBUSY;
1341 }
1342
1343 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1344 {
1345         struct device *dev = ring_to_dev(ring);
1346         unsigned int i;
1347
1348         for (i = 0; i < ring->desc_num; i++) {
1349                 /* check if this is where we started */
1350                 if (ring->next_to_use == next_to_use_orig)
1351                         break;
1352
1353                 /* rollback one */
1354                 ring_ptr_move_bw(ring, next_to_use);
1355
1356                 /* unmap the descriptor dma address */
1357                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB ||
1358                     ring->desc_cb[ring->next_to_use].type ==
1359                     DESC_TYPE_FRAGLIST_SKB)
1360                         dma_unmap_single(dev,
1361                                          ring->desc_cb[ring->next_to_use].dma,
1362                                         ring->desc_cb[ring->next_to_use].length,
1363                                         DMA_TO_DEVICE);
1364                 else if (ring->desc_cb[ring->next_to_use].length)
1365                         dma_unmap_page(dev,
1366                                        ring->desc_cb[ring->next_to_use].dma,
1367                                        ring->desc_cb[ring->next_to_use].length,
1368                                        DMA_TO_DEVICE);
1369
1370                 ring->desc_cb[ring->next_to_use].length = 0;
1371                 ring->desc_cb[ring->next_to_use].dma = 0;
1372         }
1373 }
1374
1375 static int hns3_fill_skb_to_desc(struct hns3_enet_ring *ring,
1376                                  struct sk_buff *skb, enum hns_desc_type type)
1377 {
1378         unsigned int size = skb_headlen(skb);
1379         int i, ret, bd_num = 0;
1380
1381         if (size) {
1382                 ret = hns3_fill_desc(ring, skb, size, type);
1383                 if (unlikely(ret < 0))
1384                         return ret;
1385
1386                 bd_num += ret;
1387         }
1388
1389         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1390                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1391
1392                 size = skb_frag_size(frag);
1393                 if (!size)
1394                         continue;
1395
1396                 ret = hns3_fill_desc(ring, frag, size, DESC_TYPE_PAGE);
1397                 if (unlikely(ret < 0))
1398                         return ret;
1399
1400                 bd_num += ret;
1401         }
1402
1403         return bd_num;
1404 }
1405
1406 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1407 {
1408         struct hns3_nic_priv *priv = netdev_priv(netdev);
1409         struct hns3_enet_ring *ring = &priv->ring[skb->queue_mapping];
1410         struct netdev_queue *dev_queue;
1411         int pre_ntu, next_to_use_head;
1412         struct sk_buff *frag_skb;
1413         int bd_num = 0;
1414         int ret;
1415
1416         /* Hardware can only handle short frames above 32 bytes */
1417         if (skb_put_padto(skb, HNS3_MIN_TX_LEN))
1418                 return NETDEV_TX_OK;
1419
1420         /* Prefetch the data used later */
1421         prefetch(skb->data);
1422
1423         ret = hns3_nic_maybe_stop_tx(ring, netdev, skb);
1424         if (unlikely(ret <= 0)) {
1425                 if (ret == -EBUSY) {
1426                         u64_stats_update_begin(&ring->syncp);
1427                         ring->stats.tx_busy++;
1428                         u64_stats_update_end(&ring->syncp);
1429                         return NETDEV_TX_BUSY;
1430                 } else if (ret == -ENOMEM) {
1431                         u64_stats_update_begin(&ring->syncp);
1432                         ring->stats.sw_err_cnt++;
1433                         u64_stats_update_end(&ring->syncp);
1434                 }
1435
1436                 hns3_rl_err(netdev, "xmit error: %d!\n", ret);
1437                 goto out_err_tx_ok;
1438         }
1439
1440         next_to_use_head = ring->next_to_use;
1441
1442         ret = hns3_fill_skb_to_desc(ring, skb, DESC_TYPE_SKB);
1443         if (unlikely(ret < 0))
1444                 goto fill_err;
1445
1446         bd_num += ret;
1447
1448         skb_walk_frags(skb, frag_skb) {
1449                 ret = hns3_fill_skb_to_desc(ring, frag_skb,
1450                                             DESC_TYPE_FRAGLIST_SKB);
1451                 if (unlikely(ret < 0))
1452                         goto fill_err;
1453
1454                 bd_num += ret;
1455         }
1456
1457         pre_ntu = ring->next_to_use ? (ring->next_to_use - 1) :
1458                                         (ring->desc_num - 1);
1459         ring->desc[pre_ntu].tx.bdtp_fe_sc_vld_ra_ri |=
1460                                 cpu_to_le16(BIT(HNS3_TXD_FE_B));
1461         trace_hns3_tx_desc(ring, pre_ntu);
1462
1463         /* Complete translate all packets */
1464         dev_queue = netdev_get_tx_queue(netdev, ring->queue_index);
1465         netdev_tx_sent_queue(dev_queue, skb->len);
1466
1467         wmb(); /* Commit all data before submit */
1468
1469         hnae3_queue_xmit(ring->tqp, bd_num);
1470
1471         return NETDEV_TX_OK;
1472
1473 fill_err:
1474         hns3_clear_desc(ring, next_to_use_head);
1475
1476 out_err_tx_ok:
1477         dev_kfree_skb_any(skb);
1478         return NETDEV_TX_OK;
1479 }
1480
1481 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1482 {
1483         struct hnae3_handle *h = hns3_get_handle(netdev);
1484         struct sockaddr *mac_addr = p;
1485         int ret;
1486
1487         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1488                 return -EADDRNOTAVAIL;
1489
1490         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1491                 netdev_info(netdev, "already using mac address %pM\n",
1492                             mac_addr->sa_data);
1493                 return 0;
1494         }
1495
1496         /* For VF device, if there is a perm_addr, then the user will not
1497          * be allowed to change the address.
1498          */
1499         if (!hns3_is_phys_func(h->pdev) &&
1500             !is_zero_ether_addr(netdev->perm_addr)) {
1501                 netdev_err(netdev, "has permanent MAC %pM, user MAC %pM not allow\n",
1502                            netdev->perm_addr, mac_addr->sa_data);
1503                 return -EPERM;
1504         }
1505
1506         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1507         if (ret) {
1508                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1509                 return ret;
1510         }
1511
1512         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1513
1514         return 0;
1515 }
1516
1517 static int hns3_nic_do_ioctl(struct net_device *netdev,
1518                              struct ifreq *ifr, int cmd)
1519 {
1520         struct hnae3_handle *h = hns3_get_handle(netdev);
1521
1522         if (!netif_running(netdev))
1523                 return -EINVAL;
1524
1525         if (!h->ae_algo->ops->do_ioctl)
1526                 return -EOPNOTSUPP;
1527
1528         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1529 }
1530
1531 static int hns3_nic_set_features(struct net_device *netdev,
1532                                  netdev_features_t features)
1533 {
1534         netdev_features_t changed = netdev->features ^ features;
1535         struct hns3_nic_priv *priv = netdev_priv(netdev);
1536         struct hnae3_handle *h = priv->ae_handle;
1537         bool enable;
1538         int ret;
1539
1540         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1541                 enable = !!(features & NETIF_F_GRO_HW);
1542                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1543                 if (ret)
1544                         return ret;
1545         }
1546
1547         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1548             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1549                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1550                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1551                 if (ret)
1552                         return ret;
1553         }
1554
1555         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1556                 enable = !!(features & NETIF_F_NTUPLE);
1557                 h->ae_algo->ops->enable_fd(h, enable);
1558         }
1559
1560         netdev->features = features;
1561         return 0;
1562 }
1563
1564 static netdev_features_t hns3_features_check(struct sk_buff *skb,
1565                                              struct net_device *dev,
1566                                              netdev_features_t features)
1567 {
1568 #define HNS3_MAX_HDR_LEN        480U
1569 #define HNS3_MAX_L4_HDR_LEN     60U
1570
1571         size_t len;
1572
1573         if (skb->ip_summed != CHECKSUM_PARTIAL)
1574                 return features;
1575
1576         if (skb->encapsulation)
1577                 len = skb_inner_transport_header(skb) - skb->data;
1578         else
1579                 len = skb_transport_header(skb) - skb->data;
1580
1581         /* Assume L4 is 60 byte as TCP is the only protocol with a
1582          * a flexible value, and it's max len is 60 bytes.
1583          */
1584         len += HNS3_MAX_L4_HDR_LEN;
1585
1586         /* Hardware only supports checksum on the skb with a max header
1587          * len of 480 bytes.
1588          */
1589         if (len > HNS3_MAX_HDR_LEN)
1590                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1591
1592         return features;
1593 }
1594
1595 static void hns3_nic_get_stats64(struct net_device *netdev,
1596                                  struct rtnl_link_stats64 *stats)
1597 {
1598         struct hns3_nic_priv *priv = netdev_priv(netdev);
1599         int queue_num = priv->ae_handle->kinfo.num_tqps;
1600         struct hnae3_handle *handle = priv->ae_handle;
1601         struct hns3_enet_ring *ring;
1602         u64 rx_length_errors = 0;
1603         u64 rx_crc_errors = 0;
1604         u64 rx_multicast = 0;
1605         unsigned int start;
1606         u64 tx_errors = 0;
1607         u64 rx_errors = 0;
1608         unsigned int idx;
1609         u64 tx_bytes = 0;
1610         u64 rx_bytes = 0;
1611         u64 tx_pkts = 0;
1612         u64 rx_pkts = 0;
1613         u64 tx_drop = 0;
1614         u64 rx_drop = 0;
1615
1616         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1617                 return;
1618
1619         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1620
1621         for (idx = 0; idx < queue_num; idx++) {
1622                 /* fetch the tx stats */
1623                 ring = &priv->ring[idx];
1624                 do {
1625                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1626                         tx_bytes += ring->stats.tx_bytes;
1627                         tx_pkts += ring->stats.tx_pkts;
1628                         tx_drop += ring->stats.sw_err_cnt;
1629                         tx_drop += ring->stats.tx_vlan_err;
1630                         tx_drop += ring->stats.tx_l4_proto_err;
1631                         tx_drop += ring->stats.tx_l2l3l4_err;
1632                         tx_drop += ring->stats.tx_tso_err;
1633                         tx_errors += ring->stats.sw_err_cnt;
1634                         tx_errors += ring->stats.tx_vlan_err;
1635                         tx_errors += ring->stats.tx_l4_proto_err;
1636                         tx_errors += ring->stats.tx_l2l3l4_err;
1637                         tx_errors += ring->stats.tx_tso_err;
1638                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1639
1640                 /* fetch the rx stats */
1641                 ring = &priv->ring[idx + queue_num];
1642                 do {
1643                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1644                         rx_bytes += ring->stats.rx_bytes;
1645                         rx_pkts += ring->stats.rx_pkts;
1646                         rx_drop += ring->stats.l2_err;
1647                         rx_errors += ring->stats.l2_err;
1648                         rx_errors += ring->stats.l3l4_csum_err;
1649                         rx_crc_errors += ring->stats.l2_err;
1650                         rx_multicast += ring->stats.rx_multicast;
1651                         rx_length_errors += ring->stats.err_pkt_len;
1652                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1653         }
1654
1655         stats->tx_bytes = tx_bytes;
1656         stats->tx_packets = tx_pkts;
1657         stats->rx_bytes = rx_bytes;
1658         stats->rx_packets = rx_pkts;
1659
1660         stats->rx_errors = rx_errors;
1661         stats->multicast = rx_multicast;
1662         stats->rx_length_errors = rx_length_errors;
1663         stats->rx_crc_errors = rx_crc_errors;
1664         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1665
1666         stats->tx_errors = tx_errors;
1667         stats->rx_dropped = rx_drop;
1668         stats->tx_dropped = tx_drop;
1669         stats->collisions = netdev->stats.collisions;
1670         stats->rx_over_errors = netdev->stats.rx_over_errors;
1671         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1672         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1673         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1674         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1675         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1676         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1677         stats->tx_window_errors = netdev->stats.tx_window_errors;
1678         stats->rx_compressed = netdev->stats.rx_compressed;
1679         stats->tx_compressed = netdev->stats.tx_compressed;
1680 }
1681
1682 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1683 {
1684         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1685         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1686         struct hnae3_knic_private_info *kinfo;
1687         u8 tc = mqprio_qopt->qopt.num_tc;
1688         u16 mode = mqprio_qopt->mode;
1689         u8 hw = mqprio_qopt->qopt.hw;
1690         struct hnae3_handle *h;
1691
1692         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1693                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1694                 return -EOPNOTSUPP;
1695
1696         if (tc > HNAE3_MAX_TC)
1697                 return -EINVAL;
1698
1699         if (!netdev)
1700                 return -EINVAL;
1701
1702         h = hns3_get_handle(netdev);
1703         kinfo = &h->kinfo;
1704
1705         netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1706
1707         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1708                 kinfo->dcb_ops->setup_tc(h, tc ? tc : 1, prio_tc) : -EOPNOTSUPP;
1709 }
1710
1711 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1712                              void *type_data)
1713 {
1714         if (type != TC_SETUP_QDISC_MQPRIO)
1715                 return -EOPNOTSUPP;
1716
1717         return hns3_setup_tc(dev, type_data);
1718 }
1719
1720 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1721                                 __be16 proto, u16 vid)
1722 {
1723         struct hnae3_handle *h = hns3_get_handle(netdev);
1724         int ret = -EIO;
1725
1726         if (h->ae_algo->ops->set_vlan_filter)
1727                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1728
1729         return ret;
1730 }
1731
1732 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1733                                  __be16 proto, u16 vid)
1734 {
1735         struct hnae3_handle *h = hns3_get_handle(netdev);
1736         int ret = -EIO;
1737
1738         if (h->ae_algo->ops->set_vlan_filter)
1739                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1740
1741         return ret;
1742 }
1743
1744 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1745                                 u8 qos, __be16 vlan_proto)
1746 {
1747         struct hnae3_handle *h = hns3_get_handle(netdev);
1748         int ret = -EIO;
1749
1750         netif_dbg(h, drv, netdev,
1751                   "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=0x%x\n",
1752                   vf, vlan, qos, ntohs(vlan_proto));
1753
1754         if (h->ae_algo->ops->set_vf_vlan_filter)
1755                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1756                                                           qos, vlan_proto);
1757
1758         return ret;
1759 }
1760
1761 static int hns3_set_vf_spoofchk(struct net_device *netdev, int vf, bool enable)
1762 {
1763         struct hnae3_handle *handle = hns3_get_handle(netdev);
1764
1765         if (hns3_nic_resetting(netdev))
1766                 return -EBUSY;
1767
1768         if (!handle->ae_algo->ops->set_vf_spoofchk)
1769                 return -EOPNOTSUPP;
1770
1771         return handle->ae_algo->ops->set_vf_spoofchk(handle, vf, enable);
1772 }
1773
1774 static int hns3_set_vf_trust(struct net_device *netdev, int vf, bool enable)
1775 {
1776         struct hnae3_handle *handle = hns3_get_handle(netdev);
1777
1778         if (!handle->ae_algo->ops->set_vf_trust)
1779                 return -EOPNOTSUPP;
1780
1781         return handle->ae_algo->ops->set_vf_trust(handle, vf, enable);
1782 }
1783
1784 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1785 {
1786         struct hnae3_handle *h = hns3_get_handle(netdev);
1787         int ret;
1788
1789         if (hns3_nic_resetting(netdev))
1790                 return -EBUSY;
1791
1792         if (!h->ae_algo->ops->set_mtu)
1793                 return -EOPNOTSUPP;
1794
1795         netif_dbg(h, drv, netdev,
1796                   "change mtu from %u to %d\n", netdev->mtu, new_mtu);
1797
1798         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1799         if (ret)
1800                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1801                            ret);
1802         else
1803                 netdev->mtu = new_mtu;
1804
1805         return ret;
1806 }
1807
1808 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1809 {
1810         struct hns3_nic_priv *priv = netdev_priv(ndev);
1811         struct hnae3_handle *h = hns3_get_handle(ndev);
1812         struct hns3_enet_ring *tx_ring;
1813         struct napi_struct *napi;
1814         int timeout_queue = 0;
1815         int hw_head, hw_tail;
1816         int fbd_num, fbd_oft;
1817         int ebd_num, ebd_oft;
1818         int bd_num, bd_err;
1819         int ring_en, tc;
1820         int i;
1821
1822         /* Find the stopped queue the same way the stack does */
1823         for (i = 0; i < ndev->num_tx_queues; i++) {
1824                 struct netdev_queue *q;
1825                 unsigned long trans_start;
1826
1827                 q = netdev_get_tx_queue(ndev, i);
1828                 trans_start = q->trans_start;
1829                 if (netif_xmit_stopped(q) &&
1830                     time_after(jiffies,
1831                                (trans_start + ndev->watchdog_timeo))) {
1832                         timeout_queue = i;
1833                         netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n",
1834                                     q->state,
1835                                     jiffies_to_msecs(jiffies - trans_start));
1836                         break;
1837                 }
1838         }
1839
1840         if (i == ndev->num_tx_queues) {
1841                 netdev_info(ndev,
1842                             "no netdev TX timeout queue found, timeout count: %llu\n",
1843                             priv->tx_timeout_count);
1844                 return false;
1845         }
1846
1847         priv->tx_timeout_count++;
1848
1849         tx_ring = &priv->ring[timeout_queue];
1850         napi = &tx_ring->tqp_vector->napi;
1851
1852         netdev_info(ndev,
1853                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1854                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1855                     tx_ring->next_to_clean, napi->state);
1856
1857         netdev_info(ndev,
1858                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1859                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1860                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1861
1862         netdev_info(ndev,
1863                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1864                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1865                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1866
1867         /* When mac received many pause frames continuous, it's unable to send
1868          * packets, which may cause tx timeout
1869          */
1870         if (h->ae_algo->ops->get_mac_stats) {
1871                 struct hns3_mac_stats mac_stats;
1872
1873                 h->ae_algo->ops->get_mac_stats(h, &mac_stats);
1874                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1875                             mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
1876         }
1877
1878         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1879                                 HNS3_RING_TX_RING_HEAD_REG);
1880         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1881                                 HNS3_RING_TX_RING_TAIL_REG);
1882         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1883                                 HNS3_RING_TX_RING_FBDNUM_REG);
1884         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1885                                 HNS3_RING_TX_RING_OFFSET_REG);
1886         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1887                                 HNS3_RING_TX_RING_EBDNUM_REG);
1888         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1889                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1890         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1891                                HNS3_RING_TX_RING_BD_NUM_REG);
1892         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1893                                HNS3_RING_TX_RING_BD_ERR_REG);
1894         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1895         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1896
1897         netdev_info(ndev,
1898                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1899                     bd_num, hw_head, hw_tail, bd_err,
1900                     readl(tx_ring->tqp_vector->mask_addr));
1901         netdev_info(ndev,
1902                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1903                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1904
1905         return true;
1906 }
1907
1908 static void hns3_nic_net_timeout(struct net_device *ndev, unsigned int txqueue)
1909 {
1910         struct hns3_nic_priv *priv = netdev_priv(ndev);
1911         struct hnae3_handle *h = priv->ae_handle;
1912
1913         if (!hns3_get_tx_timeo_queue_info(ndev))
1914                 return;
1915
1916         /* request the reset, and let the hclge to determine
1917          * which reset level should be done
1918          */
1919         if (h->ae_algo->ops->reset_event)
1920                 h->ae_algo->ops->reset_event(h->pdev, h);
1921 }
1922
1923 #ifdef CONFIG_RFS_ACCEL
1924 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1925                               u16 rxq_index, u32 flow_id)
1926 {
1927         struct hnae3_handle *h = hns3_get_handle(dev);
1928         struct flow_keys fkeys;
1929
1930         if (!h->ae_algo->ops->add_arfs_entry)
1931                 return -EOPNOTSUPP;
1932
1933         if (skb->encapsulation)
1934                 return -EPROTONOSUPPORT;
1935
1936         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1937                 return -EPROTONOSUPPORT;
1938
1939         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1940              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1941             (fkeys.basic.ip_proto != IPPROTO_TCP &&
1942              fkeys.basic.ip_proto != IPPROTO_UDP))
1943                 return -EPROTONOSUPPORT;
1944
1945         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1946 }
1947 #endif
1948
1949 static int hns3_nic_get_vf_config(struct net_device *ndev, int vf,
1950                                   struct ifla_vf_info *ivf)
1951 {
1952         struct hnae3_handle *h = hns3_get_handle(ndev);
1953
1954         if (!h->ae_algo->ops->get_vf_config)
1955                 return -EOPNOTSUPP;
1956
1957         return h->ae_algo->ops->get_vf_config(h, vf, ivf);
1958 }
1959
1960 static int hns3_nic_set_vf_link_state(struct net_device *ndev, int vf,
1961                                       int link_state)
1962 {
1963         struct hnae3_handle *h = hns3_get_handle(ndev);
1964
1965         if (!h->ae_algo->ops->set_vf_link_state)
1966                 return -EOPNOTSUPP;
1967
1968         return h->ae_algo->ops->set_vf_link_state(h, vf, link_state);
1969 }
1970
1971 static int hns3_nic_set_vf_rate(struct net_device *ndev, int vf,
1972                                 int min_tx_rate, int max_tx_rate)
1973 {
1974         struct hnae3_handle *h = hns3_get_handle(ndev);
1975
1976         if (!h->ae_algo->ops->set_vf_rate)
1977                 return -EOPNOTSUPP;
1978
1979         return h->ae_algo->ops->set_vf_rate(h, vf, min_tx_rate, max_tx_rate,
1980                                             false);
1981 }
1982
1983 static int hns3_nic_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1984 {
1985         struct hnae3_handle *h = hns3_get_handle(netdev);
1986
1987         if (!h->ae_algo->ops->set_vf_mac)
1988                 return -EOPNOTSUPP;
1989
1990         if (is_multicast_ether_addr(mac)) {
1991                 netdev_err(netdev,
1992                            "Invalid MAC:%pM specified. Could not set MAC\n",
1993                            mac);
1994                 return -EINVAL;
1995         }
1996
1997         return h->ae_algo->ops->set_vf_mac(h, vf_id, mac);
1998 }
1999
2000 static const struct net_device_ops hns3_nic_netdev_ops = {
2001         .ndo_open               = hns3_nic_net_open,
2002         .ndo_stop               = hns3_nic_net_stop,
2003         .ndo_start_xmit         = hns3_nic_net_xmit,
2004         .ndo_tx_timeout         = hns3_nic_net_timeout,
2005         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
2006         .ndo_do_ioctl           = hns3_nic_do_ioctl,
2007         .ndo_change_mtu         = hns3_nic_change_mtu,
2008         .ndo_set_features       = hns3_nic_set_features,
2009         .ndo_features_check     = hns3_features_check,
2010         .ndo_get_stats64        = hns3_nic_get_stats64,
2011         .ndo_setup_tc           = hns3_nic_setup_tc,
2012         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
2013         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
2014         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
2015         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
2016         .ndo_set_vf_spoofchk    = hns3_set_vf_spoofchk,
2017         .ndo_set_vf_trust       = hns3_set_vf_trust,
2018 #ifdef CONFIG_RFS_ACCEL
2019         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
2020 #endif
2021         .ndo_get_vf_config      = hns3_nic_get_vf_config,
2022         .ndo_set_vf_link_state  = hns3_nic_set_vf_link_state,
2023         .ndo_set_vf_rate        = hns3_nic_set_vf_rate,
2024         .ndo_set_vf_mac         = hns3_nic_set_vf_mac,
2025 };
2026
2027 bool hns3_is_phys_func(struct pci_dev *pdev)
2028 {
2029         u32 dev_id = pdev->device;
2030
2031         switch (dev_id) {
2032         case HNAE3_DEV_ID_GE:
2033         case HNAE3_DEV_ID_25GE:
2034         case HNAE3_DEV_ID_25GE_RDMA:
2035         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
2036         case HNAE3_DEV_ID_50GE_RDMA:
2037         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
2038         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
2039                 return true;
2040         case HNAE3_DEV_ID_100G_VF:
2041         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
2042                 return false;
2043         default:
2044                 dev_warn(&pdev->dev, "un-recognized pci device-id %u",
2045                          dev_id);
2046         }
2047
2048         return false;
2049 }
2050
2051 static void hns3_disable_sriov(struct pci_dev *pdev)
2052 {
2053         /* If our VFs are assigned we cannot shut down SR-IOV
2054          * without causing issues, so just leave the hardware
2055          * available but disabled
2056          */
2057         if (pci_vfs_assigned(pdev)) {
2058                 dev_warn(&pdev->dev,
2059                          "disabling driver while VFs are assigned\n");
2060                 return;
2061         }
2062
2063         pci_disable_sriov(pdev);
2064 }
2065
2066 static void hns3_get_dev_capability(struct pci_dev *pdev,
2067                                     struct hnae3_ae_dev *ae_dev)
2068 {
2069         if (pdev->revision >= 0x21) {
2070                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
2071                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
2072         }
2073 }
2074
2075 /* hns3_probe - Device initialization routine
2076  * @pdev: PCI device information struct
2077  * @ent: entry in hns3_pci_tbl
2078  *
2079  * hns3_probe initializes a PF identified by a pci_dev structure.
2080  * The OS initialization, configuring of the PF private structure,
2081  * and a hardware reset occur.
2082  *
2083  * Returns 0 on success, negative on failure
2084  */
2085 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2086 {
2087         struct hnae3_ae_dev *ae_dev;
2088         int ret;
2089
2090         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
2091         if (!ae_dev)
2092                 return -ENOMEM;
2093
2094         ae_dev->pdev = pdev;
2095         ae_dev->flag = ent->driver_data;
2096         hns3_get_dev_capability(pdev, ae_dev);
2097         pci_set_drvdata(pdev, ae_dev);
2098
2099         ret = hnae3_register_ae_dev(ae_dev);
2100         if (ret)
2101                 pci_set_drvdata(pdev, NULL);
2102
2103         return ret;
2104 }
2105
2106 /* hns3_remove - Device removal routine
2107  * @pdev: PCI device information struct
2108  */
2109 static void hns3_remove(struct pci_dev *pdev)
2110 {
2111         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2112
2113         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
2114                 hns3_disable_sriov(pdev);
2115
2116         hnae3_unregister_ae_dev(ae_dev);
2117         pci_set_drvdata(pdev, NULL);
2118 }
2119
2120 /**
2121  * hns3_pci_sriov_configure
2122  * @pdev: pointer to a pci_dev structure
2123  * @num_vfs: number of VFs to allocate
2124  *
2125  * Enable or change the number of VFs. Called when the user updates the number
2126  * of VFs in sysfs.
2127  **/
2128 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
2129 {
2130         int ret;
2131
2132         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
2133                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
2134                 return -EINVAL;
2135         }
2136
2137         if (num_vfs) {
2138                 ret = pci_enable_sriov(pdev, num_vfs);
2139                 if (ret)
2140                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
2141                 else
2142                         return num_vfs;
2143         } else if (!pci_vfs_assigned(pdev)) {
2144                 pci_disable_sriov(pdev);
2145         } else {
2146                 dev_warn(&pdev->dev,
2147                          "Unable to free VFs because some are assigned to VMs.\n");
2148         }
2149
2150         return 0;
2151 }
2152
2153 static void hns3_shutdown(struct pci_dev *pdev)
2154 {
2155         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2156
2157         hnae3_unregister_ae_dev(ae_dev);
2158         pci_set_drvdata(pdev, NULL);
2159
2160         if (system_state == SYSTEM_POWER_OFF)
2161                 pci_set_power_state(pdev, PCI_D3hot);
2162 }
2163
2164 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
2165                                             pci_channel_state_t state)
2166 {
2167         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2168         pci_ers_result_t ret;
2169
2170         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
2171
2172         if (state == pci_channel_io_perm_failure)
2173                 return PCI_ERS_RESULT_DISCONNECT;
2174
2175         if (!ae_dev || !ae_dev->ops) {
2176                 dev_err(&pdev->dev,
2177                         "Can't recover - error happened before device initialized\n");
2178                 return PCI_ERS_RESULT_NONE;
2179         }
2180
2181         if (ae_dev->ops->handle_hw_ras_error)
2182                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
2183         else
2184                 return PCI_ERS_RESULT_NONE;
2185
2186         return ret;
2187 }
2188
2189 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
2190 {
2191         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2192         const struct hnae3_ae_ops *ops;
2193         enum hnae3_reset_type reset_type;
2194         struct device *dev = &pdev->dev;
2195
2196         if (!ae_dev || !ae_dev->ops)
2197                 return PCI_ERS_RESULT_NONE;
2198
2199         ops = ae_dev->ops;
2200         /* request the reset */
2201         if (ops->reset_event && ops->get_reset_level &&
2202             ops->set_default_reset_request) {
2203                 if (ae_dev->hw_err_reset_req) {
2204                         reset_type = ops->get_reset_level(ae_dev,
2205                                                 &ae_dev->hw_err_reset_req);
2206                         ops->set_default_reset_request(ae_dev, reset_type);
2207                         dev_info(dev, "requesting reset due to PCI error\n");
2208                         ops->reset_event(pdev, NULL);
2209                 }
2210
2211                 return PCI_ERS_RESULT_RECOVERED;
2212         }
2213
2214         return PCI_ERS_RESULT_DISCONNECT;
2215 }
2216
2217 static void hns3_reset_prepare(struct pci_dev *pdev)
2218 {
2219         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2220
2221         dev_info(&pdev->dev, "FLR prepare\n");
2222         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
2223                 ae_dev->ops->flr_prepare(ae_dev);
2224 }
2225
2226 static void hns3_reset_done(struct pci_dev *pdev)
2227 {
2228         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2229
2230         dev_info(&pdev->dev, "FLR done\n");
2231         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
2232                 ae_dev->ops->flr_done(ae_dev);
2233 }
2234
2235 static const struct pci_error_handlers hns3_err_handler = {
2236         .error_detected = hns3_error_detected,
2237         .slot_reset     = hns3_slot_reset,
2238         .reset_prepare  = hns3_reset_prepare,
2239         .reset_done     = hns3_reset_done,
2240 };
2241
2242 static struct pci_driver hns3_driver = {
2243         .name     = hns3_driver_name,
2244         .id_table = hns3_pci_tbl,
2245         .probe    = hns3_probe,
2246         .remove   = hns3_remove,
2247         .shutdown = hns3_shutdown,
2248         .sriov_configure = hns3_pci_sriov_configure,
2249         .err_handler    = &hns3_err_handler,
2250 };
2251
2252 /* set default feature to hns3 */
2253 static void hns3_set_default_feature(struct net_device *netdev)
2254 {
2255         struct hnae3_handle *h = hns3_get_handle(netdev);
2256         struct pci_dev *pdev = h->pdev;
2257
2258         netdev->priv_flags |= IFF_UNICAST_FLT;
2259
2260         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2261                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2262                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2263                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2264                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2265                 NETIF_F_TSO_MANGLEID | NETIF_F_FRAGLIST;
2266
2267         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2268
2269         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2270                 NETIF_F_HW_VLAN_CTAG_FILTER |
2271                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2272                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2273                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2274                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2275                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2276                 NETIF_F_FRAGLIST;
2277
2278         netdev->vlan_features |=
2279                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2280                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2281                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2282                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2283                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2284                 NETIF_F_FRAGLIST;
2285
2286         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2287                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2288                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2289                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2290                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2291                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2292                 NETIF_F_FRAGLIST;
2293
2294         if (pdev->revision >= 0x21) {
2295                 netdev->hw_features |= NETIF_F_GRO_HW;
2296                 netdev->features |= NETIF_F_GRO_HW;
2297
2298                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2299                         netdev->hw_features |= NETIF_F_NTUPLE;
2300                         netdev->features |= NETIF_F_NTUPLE;
2301                 }
2302         }
2303 }
2304
2305 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2306                              struct hns3_desc_cb *cb)
2307 {
2308         unsigned int order = hns3_page_order(ring);
2309         struct page *p;
2310
2311         p = dev_alloc_pages(order);
2312         if (!p)
2313                 return -ENOMEM;
2314
2315         cb->priv = p;
2316         cb->page_offset = 0;
2317         cb->reuse_flag = 0;
2318         cb->buf  = page_address(p);
2319         cb->length = hns3_page_size(ring);
2320         cb->type = DESC_TYPE_PAGE;
2321
2322         return 0;
2323 }
2324
2325 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2326                              struct hns3_desc_cb *cb)
2327 {
2328         if (cb->type == DESC_TYPE_SKB)
2329                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2330         else if (!HNAE3_IS_TX_RING(ring))
2331                 put_page((struct page *)cb->priv);
2332         memset(cb, 0, sizeof(*cb));
2333 }
2334
2335 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2336 {
2337         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2338                                cb->length, ring_to_dma_dir(ring));
2339
2340         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2341                 return -EIO;
2342
2343         return 0;
2344 }
2345
2346 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2347                               struct hns3_desc_cb *cb)
2348 {
2349         if (cb->type == DESC_TYPE_SKB || cb->type == DESC_TYPE_FRAGLIST_SKB)
2350                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2351                                  ring_to_dma_dir(ring));
2352         else if (cb->length)
2353                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2354                                ring_to_dma_dir(ring));
2355 }
2356
2357 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2358 {
2359         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2360         ring->desc[i].addr = 0;
2361 }
2362
2363 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2364 {
2365         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2366
2367         if (!ring->desc_cb[i].dma)
2368                 return;
2369
2370         hns3_buffer_detach(ring, i);
2371         hns3_free_buffer(ring, cb);
2372 }
2373
2374 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2375 {
2376         int i;
2377
2378         for (i = 0; i < ring->desc_num; i++)
2379                 hns3_free_buffer_detach(ring, i);
2380 }
2381
2382 /* free desc along with its attached buffer */
2383 static void hns3_free_desc(struct hns3_enet_ring *ring)
2384 {
2385         int size = ring->desc_num * sizeof(ring->desc[0]);
2386
2387         hns3_free_buffers(ring);
2388
2389         if (ring->desc) {
2390                 dma_free_coherent(ring_to_dev(ring), size,
2391                                   ring->desc, ring->desc_dma_addr);
2392                 ring->desc = NULL;
2393         }
2394 }
2395
2396 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2397 {
2398         int size = ring->desc_num * sizeof(ring->desc[0]);
2399
2400         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2401                                         &ring->desc_dma_addr, GFP_KERNEL);
2402         if (!ring->desc)
2403                 return -ENOMEM;
2404
2405         return 0;
2406 }
2407
2408 static int hns3_alloc_and_map_buffer(struct hns3_enet_ring *ring,
2409                                    struct hns3_desc_cb *cb)
2410 {
2411         int ret;
2412
2413         ret = hns3_alloc_buffer(ring, cb);
2414         if (ret)
2415                 goto out;
2416
2417         ret = hns3_map_buffer(ring, cb);
2418         if (ret)
2419                 goto out_with_buf;
2420
2421         return 0;
2422
2423 out_with_buf:
2424         hns3_free_buffer(ring, cb);
2425 out:
2426         return ret;
2427 }
2428
2429 static int hns3_alloc_and_attach_buffer(struct hns3_enet_ring *ring, int i)
2430 {
2431         int ret = hns3_alloc_and_map_buffer(ring, &ring->desc_cb[i]);
2432
2433         if (ret)
2434                 return ret;
2435
2436         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2437
2438         return 0;
2439 }
2440
2441 /* Allocate memory for raw pkg, and map with dma */
2442 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2443 {
2444         int i, j, ret;
2445
2446         for (i = 0; i < ring->desc_num; i++) {
2447                 ret = hns3_alloc_and_attach_buffer(ring, i);
2448                 if (ret)
2449                         goto out_buffer_fail;
2450         }
2451
2452         return 0;
2453
2454 out_buffer_fail:
2455         for (j = i - 1; j >= 0; j--)
2456                 hns3_free_buffer_detach(ring, j);
2457         return ret;
2458 }
2459
2460 /* detach a in-used buffer and replace with a reserved one */
2461 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2462                                 struct hns3_desc_cb *res_cb)
2463 {
2464         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2465         ring->desc_cb[i] = *res_cb;
2466         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2467         ring->desc[i].rx.bd_base_info = 0;
2468 }
2469
2470 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2471 {
2472         ring->desc_cb[i].reuse_flag = 0;
2473         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2474                                          ring->desc_cb[i].page_offset);
2475         ring->desc[i].rx.bd_base_info = 0;
2476 }
2477
2478 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2479                                   int *bytes, int *pkts)
2480 {
2481         int ntc = ring->next_to_clean;
2482         struct hns3_desc_cb *desc_cb;
2483
2484         while (head != ntc) {
2485                 desc_cb = &ring->desc_cb[ntc];
2486                 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2487                 (*bytes) += desc_cb->length;
2488                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2489                 hns3_free_buffer_detach(ring, ntc);
2490
2491                 if (++ntc == ring->desc_num)
2492                         ntc = 0;
2493
2494                 /* Issue prefetch for next Tx descriptor */
2495                 prefetch(&ring->desc_cb[ntc]);
2496         }
2497
2498         /* This smp_store_release() pairs with smp_load_acquire() in
2499          * ring_space called by hns3_nic_net_xmit.
2500          */
2501         smp_store_release(&ring->next_to_clean, ntc);
2502 }
2503
2504 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2505 {
2506         int u = ring->next_to_use;
2507         int c = ring->next_to_clean;
2508
2509         if (unlikely(h > ring->desc_num))
2510                 return 0;
2511
2512         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2513 }
2514
2515 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2516 {
2517         struct net_device *netdev = ring_to_netdev(ring);
2518         struct hns3_nic_priv *priv = netdev_priv(netdev);
2519         struct netdev_queue *dev_queue;
2520         int bytes, pkts;
2521         int head;
2522
2523         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2524
2525         if (is_ring_empty(ring) || head == ring->next_to_clean)
2526                 return; /* no data to poll */
2527
2528         rmb(); /* Make sure head is ready before touch any data */
2529
2530         if (unlikely(!is_valid_clean_head(ring, head))) {
2531                 hns3_rl_err(netdev, "wrong head (%d, %d-%d)\n", head,
2532                             ring->next_to_use, ring->next_to_clean);
2533
2534                 u64_stats_update_begin(&ring->syncp);
2535                 ring->stats.io_err_cnt++;
2536                 u64_stats_update_end(&ring->syncp);
2537                 return;
2538         }
2539
2540         bytes = 0;
2541         pkts = 0;
2542         hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2543
2544         ring->tqp_vector->tx_group.total_bytes += bytes;
2545         ring->tqp_vector->tx_group.total_packets += pkts;
2546
2547         u64_stats_update_begin(&ring->syncp);
2548         ring->stats.tx_bytes += bytes;
2549         ring->stats.tx_pkts += pkts;
2550         u64_stats_update_end(&ring->syncp);
2551
2552         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2553         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2554
2555         if (unlikely(netif_carrier_ok(netdev) &&
2556                      ring_space(ring) > HNS3_MAX_TSO_BD_NUM)) {
2557                 /* Make sure that anybody stopping the queue after this
2558                  * sees the new next_to_clean.
2559                  */
2560                 smp_mb();
2561                 if (netif_tx_queue_stopped(dev_queue) &&
2562                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2563                         netif_tx_wake_queue(dev_queue);
2564                         ring->stats.restart_queue++;
2565                 }
2566         }
2567 }
2568
2569 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2570 {
2571         int ntc = ring->next_to_clean;
2572         int ntu = ring->next_to_use;
2573
2574         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2575 }
2576
2577 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2578                                       int cleand_count)
2579 {
2580         struct hns3_desc_cb *desc_cb;
2581         struct hns3_desc_cb res_cbs;
2582         int i, ret;
2583
2584         for (i = 0; i < cleand_count; i++) {
2585                 desc_cb = &ring->desc_cb[ring->next_to_use];
2586                 if (desc_cb->reuse_flag) {
2587                         u64_stats_update_begin(&ring->syncp);
2588                         ring->stats.reuse_pg_cnt++;
2589                         u64_stats_update_end(&ring->syncp);
2590
2591                         hns3_reuse_buffer(ring, ring->next_to_use);
2592                 } else {
2593                         ret = hns3_alloc_and_map_buffer(ring, &res_cbs);
2594                         if (ret) {
2595                                 u64_stats_update_begin(&ring->syncp);
2596                                 ring->stats.sw_err_cnt++;
2597                                 u64_stats_update_end(&ring->syncp);
2598
2599                                 hns3_rl_err(ring_to_netdev(ring),
2600                                             "alloc rx buffer failed: %d\n",
2601                                             ret);
2602                                 break;
2603                         }
2604                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2605
2606                         u64_stats_update_begin(&ring->syncp);
2607                         ring->stats.non_reuse_pg++;
2608                         u64_stats_update_end(&ring->syncp);
2609                 }
2610
2611                 ring_ptr_move_fw(ring, next_to_use);
2612         }
2613
2614         wmb(); /* Make all data has been write before submit */
2615         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2616 }
2617
2618 static bool hns3_page_is_reusable(struct page *page)
2619 {
2620         return page_to_nid(page) == numa_mem_id() &&
2621                 !page_is_pfmemalloc(page);
2622 }
2623
2624 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2625                                 struct hns3_enet_ring *ring, int pull_len,
2626                                 struct hns3_desc_cb *desc_cb)
2627 {
2628         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2629         int size = le16_to_cpu(desc->rx.size);
2630         u32 truesize = hns3_buf_size(ring);
2631
2632         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2633                         size - pull_len, truesize);
2634
2635         /* Avoid re-using remote pages, or the stack is still using the page
2636          * when page_offset rollback to zero, flag default unreuse
2637          */
2638         if (unlikely(!hns3_page_is_reusable(desc_cb->priv)) ||
2639             (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2640                 return;
2641
2642         /* Move offset up to the next cache line */
2643         desc_cb->page_offset += truesize;
2644
2645         if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2646                 desc_cb->reuse_flag = 1;
2647                 /* Bump ref count on page before it is given */
2648                 get_page(desc_cb->priv);
2649         } else if (page_count(desc_cb->priv) == 1) {
2650                 desc_cb->reuse_flag = 1;
2651                 desc_cb->page_offset = 0;
2652                 get_page(desc_cb->priv);
2653         }
2654 }
2655
2656 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2657 {
2658         __be16 type = skb->protocol;
2659         struct tcphdr *th;
2660         int depth = 0;
2661
2662         while (eth_type_vlan(type)) {
2663                 struct vlan_hdr *vh;
2664
2665                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2666                         return -EFAULT;
2667
2668                 vh = (struct vlan_hdr *)(skb->data + depth);
2669                 type = vh->h_vlan_encapsulated_proto;
2670                 depth += VLAN_HLEN;
2671         }
2672
2673         skb_set_network_header(skb, depth);
2674
2675         if (type == htons(ETH_P_IP)) {
2676                 const struct iphdr *iph = ip_hdr(skb);
2677
2678                 depth += sizeof(struct iphdr);
2679                 skb_set_transport_header(skb, depth);
2680                 th = tcp_hdr(skb);
2681                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2682                                           iph->daddr, 0);
2683         } else if (type == htons(ETH_P_IPV6)) {
2684                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2685
2686                 depth += sizeof(struct ipv6hdr);
2687                 skb_set_transport_header(skb, depth);
2688                 th = tcp_hdr(skb);
2689                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2690                                           &iph->daddr, 0);
2691         } else {
2692                 hns3_rl_err(skb->dev,
2693                             "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2694                             be16_to_cpu(type), depth);
2695                 return -EFAULT;
2696         }
2697
2698         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2699         if (th->cwr)
2700                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2701
2702         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2703                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2704
2705         skb->csum_start = (unsigned char *)th - skb->head;
2706         skb->csum_offset = offsetof(struct tcphdr, check);
2707         skb->ip_summed = CHECKSUM_PARTIAL;
2708
2709         trace_hns3_gro(skb);
2710
2711         return 0;
2712 }
2713
2714 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2715                              u32 l234info, u32 bd_base_info, u32 ol_info)
2716 {
2717         struct net_device *netdev = ring_to_netdev(ring);
2718         int l3_type, l4_type;
2719         int ol4_type;
2720
2721         skb->ip_summed = CHECKSUM_NONE;
2722
2723         skb_checksum_none_assert(skb);
2724
2725         if (!(netdev->features & NETIF_F_RXCSUM))
2726                 return;
2727
2728         /* check if hardware has done checksum */
2729         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2730                 return;
2731
2732         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2733                                  BIT(HNS3_RXD_OL3E_B) |
2734                                  BIT(HNS3_RXD_OL4E_B)))) {
2735                 u64_stats_update_begin(&ring->syncp);
2736                 ring->stats.l3l4_csum_err++;
2737                 u64_stats_update_end(&ring->syncp);
2738
2739                 return;
2740         }
2741
2742         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2743                                    HNS3_RXD_OL4ID_S);
2744         switch (ol4_type) {
2745         case HNS3_OL4_TYPE_MAC_IN_UDP:
2746         case HNS3_OL4_TYPE_NVGRE:
2747                 skb->csum_level = 1;
2748                 /* fall through */
2749         case HNS3_OL4_TYPE_NO_TUN:
2750                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2751                                           HNS3_RXD_L3ID_S);
2752                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2753                                           HNS3_RXD_L4ID_S);
2754
2755                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2756                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2757                      l3_type == HNS3_L3_TYPE_IPV6) &&
2758                     (l4_type == HNS3_L4_TYPE_UDP ||
2759                      l4_type == HNS3_L4_TYPE_TCP ||
2760                      l4_type == HNS3_L4_TYPE_SCTP))
2761                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2762                 break;
2763         default:
2764                 break;
2765         }
2766 }
2767
2768 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2769 {
2770         if (skb_has_frag_list(skb))
2771                 napi_gro_flush(&ring->tqp_vector->napi, false);
2772
2773         napi_gro_receive(&ring->tqp_vector->napi, skb);
2774 }
2775
2776 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2777                                 struct hns3_desc *desc, u32 l234info,
2778                                 u16 *vlan_tag)
2779 {
2780         struct hnae3_handle *handle = ring->tqp->handle;
2781         struct pci_dev *pdev = ring->tqp->handle->pdev;
2782
2783         if (pdev->revision == 0x20) {
2784                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2785                 if (!(*vlan_tag & VLAN_VID_MASK))
2786                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2787
2788                 return (*vlan_tag != 0);
2789         }
2790
2791 #define HNS3_STRP_OUTER_VLAN    0x1
2792 #define HNS3_STRP_INNER_VLAN    0x2
2793 #define HNS3_STRP_BOTH          0x3
2794
2795         /* Hardware always insert VLAN tag into RX descriptor when
2796          * remove the tag from packet, driver needs to determine
2797          * reporting which tag to stack.
2798          */
2799         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2800                                 HNS3_RXD_STRP_TAGP_S)) {
2801         case HNS3_STRP_OUTER_VLAN:
2802                 if (handle->port_base_vlan_state !=
2803                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2804                         return false;
2805
2806                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2807                 return true;
2808         case HNS3_STRP_INNER_VLAN:
2809                 if (handle->port_base_vlan_state !=
2810                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2811                         return false;
2812
2813                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2814                 return true;
2815         case HNS3_STRP_BOTH:
2816                 if (handle->port_base_vlan_state ==
2817                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2818                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2819                 else
2820                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2821
2822                 return true;
2823         default:
2824                 return false;
2825         }
2826 }
2827
2828 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
2829                           unsigned char *va)
2830 {
2831         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2832         struct net_device *netdev = ring_to_netdev(ring);
2833         struct sk_buff *skb;
2834
2835         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2836         skb = ring->skb;
2837         if (unlikely(!skb)) {
2838                 hns3_rl_err(netdev, "alloc rx skb fail\n");
2839
2840                 u64_stats_update_begin(&ring->syncp);
2841                 ring->stats.sw_err_cnt++;
2842                 u64_stats_update_end(&ring->syncp);
2843
2844                 return -ENOMEM;
2845         }
2846
2847         trace_hns3_rx_desc(ring);
2848         prefetchw(skb->data);
2849
2850         ring->pending_buf = 1;
2851         ring->frag_num = 0;
2852         ring->tail_skb = NULL;
2853         if (length <= HNS3_RX_HEAD_SIZE) {
2854                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2855
2856                 /* We can reuse buffer as-is, just make sure it is local */
2857                 if (likely(hns3_page_is_reusable(desc_cb->priv)))
2858                         desc_cb->reuse_flag = 1;
2859                 else /* This page cannot be reused so discard it */
2860                         put_page(desc_cb->priv);
2861
2862                 ring_ptr_move_fw(ring, next_to_clean);
2863                 return 0;
2864         }
2865         u64_stats_update_begin(&ring->syncp);
2866         ring->stats.seg_pkt_cnt++;
2867         u64_stats_update_end(&ring->syncp);
2868
2869         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2870         __skb_put(skb, ring->pull_len);
2871         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2872                             desc_cb);
2873         ring_ptr_move_fw(ring, next_to_clean);
2874
2875         return 0;
2876 }
2877
2878 static int hns3_add_frag(struct hns3_enet_ring *ring)
2879 {
2880         struct sk_buff *skb = ring->skb;
2881         struct sk_buff *head_skb = skb;
2882         struct sk_buff *new_skb;
2883         struct hns3_desc_cb *desc_cb;
2884         struct hns3_desc *desc;
2885         u32 bd_base_info;
2886
2887         do {
2888                 desc = &ring->desc[ring->next_to_clean];
2889                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2890                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2891                 /* make sure HW write desc complete */
2892                 dma_rmb();
2893                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2894                         return -ENXIO;
2895
2896                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2897                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi, 0);
2898                         if (unlikely(!new_skb)) {
2899                                 hns3_rl_err(ring_to_netdev(ring),
2900                                             "alloc rx fraglist skb fail\n");
2901                                 return -ENXIO;
2902                         }
2903                         ring->frag_num = 0;
2904
2905                         if (ring->tail_skb) {
2906                                 ring->tail_skb->next = new_skb;
2907                                 ring->tail_skb = new_skb;
2908                         } else {
2909                                 skb_shinfo(skb)->frag_list = new_skb;
2910                                 ring->tail_skb = new_skb;
2911                         }
2912                 }
2913
2914                 if (ring->tail_skb) {
2915                         head_skb->truesize += hns3_buf_size(ring);
2916                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2917                         head_skb->len += le16_to_cpu(desc->rx.size);
2918                         skb = ring->tail_skb;
2919                 }
2920
2921                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2922                 trace_hns3_rx_desc(ring);
2923                 ring_ptr_move_fw(ring, next_to_clean);
2924                 ring->pending_buf++;
2925         } while (!(bd_base_info & BIT(HNS3_RXD_FE_B)));
2926
2927         return 0;
2928 }
2929
2930 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2931                                      struct sk_buff *skb, u32 l234info,
2932                                      u32 bd_base_info, u32 ol_info)
2933 {
2934         u32 l3_type;
2935
2936         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2937                                                     HNS3_RXD_GRO_SIZE_M,
2938                                                     HNS3_RXD_GRO_SIZE_S);
2939         /* if there is no HW GRO, do not set gro params */
2940         if (!skb_shinfo(skb)->gso_size) {
2941                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2942                 return 0;
2943         }
2944
2945         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2946                                                   HNS3_RXD_GRO_COUNT_M,
2947                                                   HNS3_RXD_GRO_COUNT_S);
2948
2949         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2950         if (l3_type == HNS3_L3_TYPE_IPV4)
2951                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2952         else if (l3_type == HNS3_L3_TYPE_IPV6)
2953                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2954         else
2955                 return -EFAULT;
2956
2957         return  hns3_gro_complete(skb, l234info);
2958 }
2959
2960 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2961                                      struct sk_buff *skb, u32 rss_hash)
2962 {
2963         struct hnae3_handle *handle = ring->tqp->handle;
2964         enum pkt_hash_types rss_type;
2965
2966         if (rss_hash)
2967                 rss_type = handle->kinfo.rss_type;
2968         else
2969                 rss_type = PKT_HASH_TYPE_NONE;
2970
2971         skb_set_hash(skb, rss_hash, rss_type);
2972 }
2973
2974 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2975 {
2976         struct net_device *netdev = ring_to_netdev(ring);
2977         enum hns3_pkt_l2t_type l2_frame_type;
2978         u32 bd_base_info, l234info, ol_info;
2979         struct hns3_desc *desc;
2980         unsigned int len;
2981         int pre_ntc, ret;
2982
2983         /* bdinfo handled below is only valid on the last BD of the
2984          * current packet, and ring->next_to_clean indicates the first
2985          * descriptor of next packet, so need - 1 below.
2986          */
2987         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2988                                         (ring->desc_num - 1);
2989         desc = &ring->desc[pre_ntc];
2990         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2991         l234info = le32_to_cpu(desc->rx.l234_info);
2992         ol_info = le32_to_cpu(desc->rx.ol_info);
2993
2994         /* Based on hw strategy, the tag offloaded will be stored at
2995          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2996          * in one layer tag case.
2997          */
2998         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2999                 u16 vlan_tag;
3000
3001                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
3002                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3003                                                vlan_tag);
3004         }
3005
3006         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
3007                                   BIT(HNS3_RXD_L2E_B))))) {
3008                 u64_stats_update_begin(&ring->syncp);
3009                 if (l234info & BIT(HNS3_RXD_L2E_B))
3010                         ring->stats.l2_err++;
3011                 else
3012                         ring->stats.err_pkt_len++;
3013                 u64_stats_update_end(&ring->syncp);
3014
3015                 return -EFAULT;
3016         }
3017
3018         len = skb->len;
3019
3020         /* Do update ip stack process */
3021         skb->protocol = eth_type_trans(skb, netdev);
3022
3023         /* This is needed in order to enable forwarding support */
3024         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
3025                                         bd_base_info, ol_info);
3026         if (unlikely(ret)) {
3027                 u64_stats_update_begin(&ring->syncp);
3028                 ring->stats.rx_err_cnt++;
3029                 u64_stats_update_end(&ring->syncp);
3030                 return ret;
3031         }
3032
3033         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
3034                                         HNS3_RXD_DMAC_S);
3035
3036         u64_stats_update_begin(&ring->syncp);
3037         ring->stats.rx_pkts++;
3038         ring->stats.rx_bytes += len;
3039
3040         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
3041                 ring->stats.rx_multicast++;
3042
3043         u64_stats_update_end(&ring->syncp);
3044
3045         ring->tqp_vector->rx_group.total_bytes += len;
3046
3047         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
3048         return 0;
3049 }
3050
3051 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring)
3052 {
3053         struct sk_buff *skb = ring->skb;
3054         struct hns3_desc_cb *desc_cb;
3055         struct hns3_desc *desc;
3056         unsigned int length;
3057         u32 bd_base_info;
3058         int ret;
3059
3060         desc = &ring->desc[ring->next_to_clean];
3061         desc_cb = &ring->desc_cb[ring->next_to_clean];
3062
3063         prefetch(desc);
3064
3065         length = le16_to_cpu(desc->rx.size);
3066         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3067
3068         /* Check valid BD */
3069         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
3070                 return -ENXIO;
3071
3072         if (!skb)
3073                 ring->va = desc_cb->buf + desc_cb->page_offset;
3074
3075         /* Prefetch first cache line of first page
3076          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
3077          * line size is 64B so need to prefetch twice to make it 128B. But in
3078          * actual we can have greater size of caches with 128B Level 1 cache
3079          * lines. In such a case, single fetch would suffice to cache in the
3080          * relevant part of the header.
3081          */
3082         prefetch(ring->va);
3083 #if L1_CACHE_BYTES < 128
3084         prefetch(ring->va + L1_CACHE_BYTES);
3085 #endif
3086
3087         if (!skb) {
3088                 ret = hns3_alloc_skb(ring, length, ring->va);
3089                 skb = ring->skb;
3090
3091                 if (ret < 0) /* alloc buffer fail */
3092                         return ret;
3093                 if (!(bd_base_info & BIT(HNS3_RXD_FE_B))) { /* need add frag */
3094                         ret = hns3_add_frag(ring);
3095                         if (ret)
3096                                 return ret;
3097                 }
3098         } else {
3099                 ret = hns3_add_frag(ring);
3100                 if (ret)
3101                         return ret;
3102         }
3103
3104         /* As the head data may be changed when GRO enable, copy
3105          * the head data in after other data rx completed
3106          */
3107         if (skb->len > HNS3_RX_HEAD_SIZE)
3108                 memcpy(skb->data, ring->va,
3109                        ALIGN(ring->pull_len, sizeof(long)));
3110
3111         ret = hns3_handle_bdinfo(ring, skb);
3112         if (unlikely(ret)) {
3113                 dev_kfree_skb_any(skb);
3114                 return ret;
3115         }
3116
3117         skb_record_rx_queue(skb, ring->tqp->tqp_index);
3118         return 0;
3119 }
3120
3121 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
3122                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
3123 {
3124 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
3125         int unused_count = hns3_desc_unused(ring);
3126         int recv_pkts = 0;
3127         int recv_bds = 0;
3128         int err, num;
3129
3130         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
3131         num -= unused_count;
3132         unused_count -= ring->pending_buf;
3133
3134         if (num <= 0)
3135                 goto out;
3136
3137         rmb(); /* Make sure num taken effect before the other data is touched */
3138
3139         while (recv_pkts < budget && recv_bds < num) {
3140                 /* Reuse or realloc buffers */
3141                 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
3142                         hns3_nic_alloc_rx_buffers(ring, unused_count);
3143                         unused_count = hns3_desc_unused(ring) -
3144                                         ring->pending_buf;
3145                 }
3146
3147                 /* Poll one pkt */
3148                 err = hns3_handle_rx_bd(ring);
3149                 /* Do not get FE for the packet or failed to alloc skb */
3150                 if (unlikely(!ring->skb || err == -ENXIO)) {
3151                         goto out;
3152                 } else if (likely(!err)) {
3153                         rx_fn(ring, ring->skb);
3154                         recv_pkts++;
3155                 }
3156
3157                 recv_bds += ring->pending_buf;
3158                 unused_count += ring->pending_buf;
3159                 ring->skb = NULL;
3160                 ring->pending_buf = 0;
3161         }
3162
3163 out:
3164         /* Make all data has been write before submit */
3165         if (unused_count > 0)
3166                 hns3_nic_alloc_rx_buffers(ring, unused_count);
3167
3168         return recv_pkts;
3169 }
3170
3171 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
3172 {
3173 #define HNS3_RX_LOW_BYTE_RATE 10000
3174 #define HNS3_RX_MID_BYTE_RATE 20000
3175 #define HNS3_RX_ULTRA_PACKET_RATE 40
3176
3177         enum hns3_flow_level_range new_flow_level;
3178         struct hns3_enet_tqp_vector *tqp_vector;
3179         int packets_per_msecs, bytes_per_msecs;
3180         u32 time_passed_ms;
3181
3182         tqp_vector = ring_group->ring->tqp_vector;
3183         time_passed_ms =
3184                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
3185         if (!time_passed_ms)
3186                 return false;
3187
3188         do_div(ring_group->total_packets, time_passed_ms);
3189         packets_per_msecs = ring_group->total_packets;
3190
3191         do_div(ring_group->total_bytes, time_passed_ms);
3192         bytes_per_msecs = ring_group->total_bytes;
3193
3194         new_flow_level = ring_group->coal.flow_level;
3195
3196         /* Simple throttlerate management
3197          * 0-10MB/s   lower     (50000 ints/s)
3198          * 10-20MB/s   middle    (20000 ints/s)
3199          * 20-1249MB/s high      (18000 ints/s)
3200          * > 40000pps  ultra     (8000 ints/s)
3201          */
3202         switch (new_flow_level) {
3203         case HNS3_FLOW_LOW:
3204                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3205                         new_flow_level = HNS3_FLOW_MID;
3206                 break;
3207         case HNS3_FLOW_MID:
3208                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3209                         new_flow_level = HNS3_FLOW_HIGH;
3210                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3211                         new_flow_level = HNS3_FLOW_LOW;
3212                 break;
3213         case HNS3_FLOW_HIGH:
3214         case HNS3_FLOW_ULTRA:
3215         default:
3216                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3217                         new_flow_level = HNS3_FLOW_MID;
3218                 break;
3219         }
3220
3221         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3222             &tqp_vector->rx_group == ring_group)
3223                 new_flow_level = HNS3_FLOW_ULTRA;
3224
3225         ring_group->total_bytes = 0;
3226         ring_group->total_packets = 0;
3227         ring_group->coal.flow_level = new_flow_level;
3228
3229         return true;
3230 }
3231
3232 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3233 {
3234         struct hns3_enet_tqp_vector *tqp_vector;
3235         u16 new_int_gl;
3236
3237         if (!ring_group->ring)
3238                 return false;
3239
3240         tqp_vector = ring_group->ring->tqp_vector;
3241         if (!tqp_vector->last_jiffies)
3242                 return false;
3243
3244         if (ring_group->total_packets == 0) {
3245                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3246                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3247                 return true;
3248         }
3249
3250         if (!hns3_get_new_flow_lvl(ring_group))
3251                 return false;
3252
3253         new_int_gl = ring_group->coal.int_gl;
3254         switch (ring_group->coal.flow_level) {
3255         case HNS3_FLOW_LOW:
3256                 new_int_gl = HNS3_INT_GL_50K;
3257                 break;
3258         case HNS3_FLOW_MID:
3259                 new_int_gl = HNS3_INT_GL_20K;
3260                 break;
3261         case HNS3_FLOW_HIGH:
3262                 new_int_gl = HNS3_INT_GL_18K;
3263                 break;
3264         case HNS3_FLOW_ULTRA:
3265                 new_int_gl = HNS3_INT_GL_8K;
3266                 break;
3267         default:
3268                 break;
3269         }
3270
3271         if (new_int_gl != ring_group->coal.int_gl) {
3272                 ring_group->coal.int_gl = new_int_gl;
3273                 return true;
3274         }
3275         return false;
3276 }
3277
3278 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3279 {
3280         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3281         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3282         bool rx_update, tx_update;
3283
3284         /* update param every 1000ms */
3285         if (time_before(jiffies,
3286                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3287                 return;
3288
3289         if (rx_group->coal.gl_adapt_enable) {
3290                 rx_update = hns3_get_new_int_gl(rx_group);
3291                 if (rx_update)
3292                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3293                                                        rx_group->coal.int_gl);
3294         }
3295
3296         if (tx_group->coal.gl_adapt_enable) {
3297                 tx_update = hns3_get_new_int_gl(tx_group);
3298                 if (tx_update)
3299                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3300                                                        tx_group->coal.int_gl);
3301         }
3302
3303         tqp_vector->last_jiffies = jiffies;
3304 }
3305
3306 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3307 {
3308         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3309         struct hns3_enet_ring *ring;
3310         int rx_pkt_total = 0;
3311
3312         struct hns3_enet_tqp_vector *tqp_vector =
3313                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3314         bool clean_complete = true;
3315         int rx_budget = budget;
3316
3317         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3318                 napi_complete(napi);
3319                 return 0;
3320         }
3321
3322         /* Since the actual Tx work is minimal, we can give the Tx a larger
3323          * budget and be more aggressive about cleaning up the Tx descriptors.
3324          */
3325         hns3_for_each_ring(ring, tqp_vector->tx_group)
3326                 hns3_clean_tx_ring(ring);
3327
3328         /* make sure rx ring budget not smaller than 1 */
3329         if (tqp_vector->num_tqps > 1)
3330                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3331
3332         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3333                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3334                                                     hns3_rx_skb);
3335
3336                 if (rx_cleaned >= rx_budget)
3337                         clean_complete = false;
3338
3339                 rx_pkt_total += rx_cleaned;
3340         }
3341
3342         tqp_vector->rx_group.total_packets += rx_pkt_total;
3343
3344         if (!clean_complete)
3345                 return budget;
3346
3347         if (napi_complete(napi) &&
3348             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3349                 hns3_update_new_int_gl(tqp_vector);
3350                 hns3_mask_vector_irq(tqp_vector, 1);
3351         }
3352
3353         return rx_pkt_total;
3354 }
3355
3356 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3357                                       struct hnae3_ring_chain_node *head)
3358 {
3359         struct pci_dev *pdev = tqp_vector->handle->pdev;
3360         struct hnae3_ring_chain_node *cur_chain = head;
3361         struct hnae3_ring_chain_node *chain;
3362         struct hns3_enet_ring *tx_ring;
3363         struct hns3_enet_ring *rx_ring;
3364
3365         tx_ring = tqp_vector->tx_group.ring;
3366         if (tx_ring) {
3367                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3368                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3369                               HNAE3_RING_TYPE_TX);
3370                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3371                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3372
3373                 cur_chain->next = NULL;
3374
3375                 while (tx_ring->next) {
3376                         tx_ring = tx_ring->next;
3377
3378                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3379                                              GFP_KERNEL);
3380                         if (!chain)
3381                                 goto err_free_chain;
3382
3383                         cur_chain->next = chain;
3384                         chain->tqp_index = tx_ring->tqp->tqp_index;
3385                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3386                                       HNAE3_RING_TYPE_TX);
3387                         hnae3_set_field(chain->int_gl_idx,
3388                                         HNAE3_RING_GL_IDX_M,
3389                                         HNAE3_RING_GL_IDX_S,
3390                                         HNAE3_RING_GL_TX);
3391
3392                         cur_chain = chain;
3393                 }
3394         }
3395
3396         rx_ring = tqp_vector->rx_group.ring;
3397         if (!tx_ring && rx_ring) {
3398                 cur_chain->next = NULL;
3399                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3400                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3401                               HNAE3_RING_TYPE_RX);
3402                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3403                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3404
3405                 rx_ring = rx_ring->next;
3406         }
3407
3408         while (rx_ring) {
3409                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3410                 if (!chain)
3411                         goto err_free_chain;
3412
3413                 cur_chain->next = chain;
3414                 chain->tqp_index = rx_ring->tqp->tqp_index;
3415                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3416                               HNAE3_RING_TYPE_RX);
3417                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3418                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3419
3420                 cur_chain = chain;
3421
3422                 rx_ring = rx_ring->next;
3423         }
3424
3425         return 0;
3426
3427 err_free_chain:
3428         cur_chain = head->next;
3429         while (cur_chain) {
3430                 chain = cur_chain->next;
3431                 devm_kfree(&pdev->dev, cur_chain);
3432                 cur_chain = chain;
3433         }
3434         head->next = NULL;
3435
3436         return -ENOMEM;
3437 }
3438
3439 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3440                                         struct hnae3_ring_chain_node *head)
3441 {
3442         struct pci_dev *pdev = tqp_vector->handle->pdev;
3443         struct hnae3_ring_chain_node *chain_tmp, *chain;
3444
3445         chain = head->next;
3446
3447         while (chain) {
3448                 chain_tmp = chain->next;
3449                 devm_kfree(&pdev->dev, chain);
3450                 chain = chain_tmp;
3451         }
3452 }
3453
3454 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3455                                    struct hns3_enet_ring *ring)
3456 {
3457         ring->next = group->ring;
3458         group->ring = ring;
3459
3460         group->count++;
3461 }
3462
3463 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3464 {
3465         struct pci_dev *pdev = priv->ae_handle->pdev;
3466         struct hns3_enet_tqp_vector *tqp_vector;
3467         int num_vectors = priv->vector_num;
3468         int numa_node;
3469         int vector_i;
3470
3471         numa_node = dev_to_node(&pdev->dev);
3472
3473         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3474                 tqp_vector = &priv->tqp_vector[vector_i];
3475                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3476                                 &tqp_vector->affinity_mask);
3477         }
3478 }
3479
3480 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3481 {
3482         struct hnae3_ring_chain_node vector_ring_chain;
3483         struct hnae3_handle *h = priv->ae_handle;
3484         struct hns3_enet_tqp_vector *tqp_vector;
3485         int ret = 0;
3486         int i;
3487
3488         hns3_nic_set_cpumask(priv);
3489
3490         for (i = 0; i < priv->vector_num; i++) {
3491                 tqp_vector = &priv->tqp_vector[i];
3492                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3493                 tqp_vector->num_tqps = 0;
3494         }
3495
3496         for (i = 0; i < h->kinfo.num_tqps; i++) {
3497                 u16 vector_i = i % priv->vector_num;
3498                 u16 tqp_num = h->kinfo.num_tqps;
3499
3500                 tqp_vector = &priv->tqp_vector[vector_i];
3501
3502                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3503                                        &priv->ring[i]);
3504
3505                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3506                                        &priv->ring[i + tqp_num]);
3507
3508                 priv->ring[i].tqp_vector = tqp_vector;
3509                 priv->ring[i + tqp_num].tqp_vector = tqp_vector;
3510                 tqp_vector->num_tqps++;
3511         }
3512
3513         for (i = 0; i < priv->vector_num; i++) {
3514                 tqp_vector = &priv->tqp_vector[i];
3515
3516                 tqp_vector->rx_group.total_bytes = 0;
3517                 tqp_vector->rx_group.total_packets = 0;
3518                 tqp_vector->tx_group.total_bytes = 0;
3519                 tqp_vector->tx_group.total_packets = 0;
3520                 tqp_vector->handle = h;
3521
3522                 ret = hns3_get_vector_ring_chain(tqp_vector,
3523                                                  &vector_ring_chain);
3524                 if (ret)
3525                         goto map_ring_fail;
3526
3527                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3528                         tqp_vector->vector_irq, &vector_ring_chain);
3529
3530                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3531
3532                 if (ret)
3533                         goto map_ring_fail;
3534
3535                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3536                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3537         }
3538
3539         return 0;
3540
3541 map_ring_fail:
3542         while (i--)
3543                 netif_napi_del(&priv->tqp_vector[i].napi);
3544
3545         return ret;
3546 }
3547
3548 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3549 {
3550 #define HNS3_VECTOR_PF_MAX_NUM          64
3551
3552         struct hnae3_handle *h = priv->ae_handle;
3553         struct hns3_enet_tqp_vector *tqp_vector;
3554         struct hnae3_vector_info *vector;
3555         struct pci_dev *pdev = h->pdev;
3556         u16 tqp_num = h->kinfo.num_tqps;
3557         u16 vector_num;
3558         int ret = 0;
3559         u16 i;
3560
3561         /* RSS size, cpu online and vector_num should be the same */
3562         /* Should consider 2p/4p later */
3563         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3564         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3565
3566         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3567                               GFP_KERNEL);
3568         if (!vector)
3569                 return -ENOMEM;
3570
3571         /* save the actual available vector number */
3572         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3573
3574         priv->vector_num = vector_num;
3575         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3576                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3577                              GFP_KERNEL);
3578         if (!priv->tqp_vector) {
3579                 ret = -ENOMEM;
3580                 goto out;
3581         }
3582
3583         for (i = 0; i < priv->vector_num; i++) {
3584                 tqp_vector = &priv->tqp_vector[i];
3585                 tqp_vector->idx = i;
3586                 tqp_vector->mask_addr = vector[i].io_addr;
3587                 tqp_vector->vector_irq = vector[i].vector;
3588                 hns3_vector_gl_rl_init(tqp_vector, priv);
3589         }
3590
3591 out:
3592         devm_kfree(&pdev->dev, vector);
3593         return ret;
3594 }
3595
3596 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3597 {
3598         group->ring = NULL;
3599         group->count = 0;
3600 }
3601
3602 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3603 {
3604         struct hnae3_ring_chain_node vector_ring_chain;
3605         struct hnae3_handle *h = priv->ae_handle;
3606         struct hns3_enet_tqp_vector *tqp_vector;
3607         int i;
3608
3609         for (i = 0; i < priv->vector_num; i++) {
3610                 tqp_vector = &priv->tqp_vector[i];
3611
3612                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3613                         continue;
3614
3615                 /* Since the mapping can be overwritten, when fail to get the
3616                  * chain between vector and ring, we should go on to deal with
3617                  * the remaining options.
3618                  */
3619                 if (hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain))
3620                         dev_warn(priv->dev, "failed to get ring chain\n");
3621
3622                 h->ae_algo->ops->unmap_ring_from_vector(h,
3623                         tqp_vector->vector_irq, &vector_ring_chain);
3624
3625                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3626
3627                 hns3_clear_ring_group(&tqp_vector->rx_group);
3628                 hns3_clear_ring_group(&tqp_vector->tx_group);
3629                 netif_napi_del(&priv->tqp_vector[i].napi);
3630         }
3631 }
3632
3633 static void hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3634 {
3635         struct hnae3_handle *h = priv->ae_handle;
3636         struct pci_dev *pdev = h->pdev;
3637         int i, ret;
3638
3639         for (i = 0; i < priv->vector_num; i++) {
3640                 struct hns3_enet_tqp_vector *tqp_vector;
3641
3642                 tqp_vector = &priv->tqp_vector[i];
3643                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3644                 if (ret)
3645                         return;
3646         }
3647
3648         devm_kfree(&pdev->dev, priv->tqp_vector);
3649 }
3650
3651 static void hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3652                               unsigned int ring_type)
3653 {
3654         int queue_num = priv->ae_handle->kinfo.num_tqps;
3655         struct hns3_enet_ring *ring;
3656         int desc_num;
3657
3658         if (ring_type == HNAE3_RING_TYPE_TX) {
3659                 ring = &priv->ring[q->tqp_index];
3660                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3661                 ring->queue_index = q->tqp_index;
3662                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3663         } else {
3664                 ring = &priv->ring[q->tqp_index + queue_num];
3665                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3666                 ring->queue_index = q->tqp_index;
3667                 ring->io_base = q->io_base;
3668         }
3669
3670         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3671
3672         ring->tqp = q;
3673         ring->desc = NULL;
3674         ring->desc_cb = NULL;
3675         ring->dev = priv->dev;
3676         ring->desc_dma_addr = 0;
3677         ring->buf_size = q->buf_size;
3678         ring->desc_num = desc_num;
3679         ring->next_to_use = 0;
3680         ring->next_to_clean = 0;
3681 }
3682
3683 static void hns3_queue_to_ring(struct hnae3_queue *tqp,
3684                                struct hns3_nic_priv *priv)
3685 {
3686         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3687         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3688 }
3689
3690 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3691 {
3692         struct hnae3_handle *h = priv->ae_handle;
3693         struct pci_dev *pdev = h->pdev;
3694         int i;
3695
3696         priv->ring = devm_kzalloc(&pdev->dev,
3697                                   array3_size(h->kinfo.num_tqps,
3698                                               sizeof(*priv->ring), 2),
3699                                   GFP_KERNEL);
3700         if (!priv->ring)
3701                 return -ENOMEM;
3702
3703         for (i = 0; i < h->kinfo.num_tqps; i++)
3704                 hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3705
3706         return 0;
3707 }
3708
3709 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3710 {
3711         if (!priv->ring)
3712                 return;
3713
3714         devm_kfree(priv->dev, priv->ring);
3715         priv->ring = NULL;
3716 }
3717
3718 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3719 {
3720         int ret;
3721
3722         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3723                 return -EINVAL;
3724
3725         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3726                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
3727         if (!ring->desc_cb) {
3728                 ret = -ENOMEM;
3729                 goto out;
3730         }
3731
3732         ret = hns3_alloc_desc(ring);
3733         if (ret)
3734                 goto out_with_desc_cb;
3735
3736         if (!HNAE3_IS_TX_RING(ring)) {
3737                 ret = hns3_alloc_ring_buffers(ring);
3738                 if (ret)
3739                         goto out_with_desc;
3740         }
3741
3742         return 0;
3743
3744 out_with_desc:
3745         hns3_free_desc(ring);
3746 out_with_desc_cb:
3747         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3748         ring->desc_cb = NULL;
3749 out:
3750         return ret;
3751 }
3752
3753 void hns3_fini_ring(struct hns3_enet_ring *ring)
3754 {
3755         hns3_free_desc(ring);
3756         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3757         ring->desc_cb = NULL;
3758         ring->next_to_clean = 0;
3759         ring->next_to_use = 0;
3760         ring->pending_buf = 0;
3761         if (ring->skb) {
3762                 dev_kfree_skb_any(ring->skb);
3763                 ring->skb = NULL;
3764         }
3765 }
3766
3767 static int hns3_buf_size2type(u32 buf_size)
3768 {
3769         int bd_size_type;
3770
3771         switch (buf_size) {
3772         case 512:
3773                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3774                 break;
3775         case 1024:
3776                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3777                 break;
3778         case 2048:
3779                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3780                 break;
3781         case 4096:
3782                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3783                 break;
3784         default:
3785                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3786         }
3787
3788         return bd_size_type;
3789 }
3790
3791 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3792 {
3793         dma_addr_t dma = ring->desc_dma_addr;
3794         struct hnae3_queue *q = ring->tqp;
3795
3796         if (!HNAE3_IS_TX_RING(ring)) {
3797                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3798                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3799                                (u32)((dma >> 31) >> 1));
3800
3801                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3802                                hns3_buf_size2type(ring->buf_size));
3803                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3804                                ring->desc_num / 8 - 1);
3805
3806         } else {
3807                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3808                                (u32)dma);
3809                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3810                                (u32)((dma >> 31) >> 1));
3811
3812                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3813                                ring->desc_num / 8 - 1);
3814         }
3815 }
3816
3817 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3818 {
3819         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3820         int i;
3821
3822         for (i = 0; i < HNAE3_MAX_TC; i++) {
3823                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3824                 int j;
3825
3826                 if (!tc_info->enable)
3827                         continue;
3828
3829                 for (j = 0; j < tc_info->tqp_count; j++) {
3830                         struct hnae3_queue *q;
3831
3832                         q = priv->ring[tc_info->tqp_offset + j].tqp;
3833                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3834                                        tc_info->tc);
3835                 }
3836         }
3837 }
3838
3839 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3840 {
3841         struct hnae3_handle *h = priv->ae_handle;
3842         int ring_num = h->kinfo.num_tqps * 2;
3843         int i, j;
3844         int ret;
3845
3846         for (i = 0; i < ring_num; i++) {
3847                 ret = hns3_alloc_ring_memory(&priv->ring[i]);
3848                 if (ret) {
3849                         dev_err(priv->dev,
3850                                 "Alloc ring memory fail! ret=%d\n", ret);
3851                         goto out_when_alloc_ring_memory;
3852                 }
3853
3854                 u64_stats_init(&priv->ring[i].syncp);
3855         }
3856
3857         return 0;
3858
3859 out_when_alloc_ring_memory:
3860         for (j = i - 1; j >= 0; j--)
3861                 hns3_fini_ring(&priv->ring[j]);
3862
3863         return -ENOMEM;
3864 }
3865
3866 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3867 {
3868         struct hnae3_handle *h = priv->ae_handle;
3869         int i;
3870
3871         for (i = 0; i < h->kinfo.num_tqps; i++) {
3872                 hns3_fini_ring(&priv->ring[i]);
3873                 hns3_fini_ring(&priv->ring[i + h->kinfo.num_tqps]);
3874         }
3875         return 0;
3876 }
3877
3878 /* Set mac addr if it is configured. or leave it to the AE driver */
3879 static int hns3_init_mac_addr(struct net_device *netdev)
3880 {
3881         struct hns3_nic_priv *priv = netdev_priv(netdev);
3882         struct hnae3_handle *h = priv->ae_handle;
3883         u8 mac_addr_temp[ETH_ALEN];
3884         int ret = 0;
3885
3886         if (h->ae_algo->ops->get_mac_addr)
3887                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3888
3889         /* Check if the MAC address is valid, if not get a random one */
3890         if (!is_valid_ether_addr(mac_addr_temp)) {
3891                 eth_hw_addr_random(netdev);
3892                 dev_warn(priv->dev, "using random MAC address %pM\n",
3893                          netdev->dev_addr);
3894         } else if (!ether_addr_equal(netdev->dev_addr, mac_addr_temp)) {
3895                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3896                 ether_addr_copy(netdev->perm_addr, mac_addr_temp);
3897         } else {
3898                 return 0;
3899         }
3900
3901         if (h->ae_algo->ops->set_mac_addr)
3902                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3903
3904         return ret;
3905 }
3906
3907 static int hns3_init_phy(struct net_device *netdev)
3908 {
3909         struct hnae3_handle *h = hns3_get_handle(netdev);
3910         int ret = 0;
3911
3912         if (h->ae_algo->ops->mac_connect_phy)
3913                 ret = h->ae_algo->ops->mac_connect_phy(h);
3914
3915         return ret;
3916 }
3917
3918 static void hns3_uninit_phy(struct net_device *netdev)
3919 {
3920         struct hnae3_handle *h = hns3_get_handle(netdev);
3921
3922         if (h->ae_algo->ops->mac_disconnect_phy)
3923                 h->ae_algo->ops->mac_disconnect_phy(h);
3924 }
3925
3926 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3927 {
3928         struct hnae3_handle *h = hns3_get_handle(netdev);
3929
3930         if (h->ae_algo->ops->del_all_fd_entries)
3931                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3932 }
3933
3934 static int hns3_client_start(struct hnae3_handle *handle)
3935 {
3936         if (!handle->ae_algo->ops->client_start)
3937                 return 0;
3938
3939         return handle->ae_algo->ops->client_start(handle);
3940 }
3941
3942 static void hns3_client_stop(struct hnae3_handle *handle)
3943 {
3944         if (!handle->ae_algo->ops->client_stop)
3945                 return;
3946
3947         handle->ae_algo->ops->client_stop(handle);
3948 }
3949
3950 static void hns3_info_show(struct hns3_nic_priv *priv)
3951 {
3952         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3953
3954         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3955         dev_info(priv->dev, "Task queue pairs numbers: %u\n", kinfo->num_tqps);
3956         dev_info(priv->dev, "RSS size: %u\n", kinfo->rss_size);
3957         dev_info(priv->dev, "Allocated RSS size: %u\n", kinfo->req_rss_size);
3958         dev_info(priv->dev, "RX buffer length: %u\n", kinfo->rx_buf_len);
3959         dev_info(priv->dev, "Desc num per TX queue: %u\n", kinfo->num_tx_desc);
3960         dev_info(priv->dev, "Desc num per RX queue: %u\n", kinfo->num_rx_desc);
3961         dev_info(priv->dev, "Total number of enabled TCs: %u\n", kinfo->num_tc);
3962         dev_info(priv->dev, "Max mtu size: %u\n", priv->netdev->max_mtu);
3963 }
3964
3965 static int hns3_client_init(struct hnae3_handle *handle)
3966 {
3967         struct pci_dev *pdev = handle->pdev;
3968         u16 alloc_tqps, max_rss_size;
3969         struct hns3_nic_priv *priv;
3970         struct net_device *netdev;
3971         int ret;
3972
3973         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3974                                                     &max_rss_size);
3975         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3976         if (!netdev)
3977                 return -ENOMEM;
3978
3979         priv = netdev_priv(netdev);
3980         priv->dev = &pdev->dev;
3981         priv->netdev = netdev;
3982         priv->ae_handle = handle;
3983         priv->tx_timeout_count = 0;
3984         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
3985
3986         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
3987
3988         handle->kinfo.netdev = netdev;
3989         handle->priv = (void *)priv;
3990
3991         hns3_init_mac_addr(netdev);
3992
3993         hns3_set_default_feature(netdev);
3994
3995         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3996         netdev->priv_flags |= IFF_UNICAST_FLT;
3997         netdev->netdev_ops = &hns3_nic_netdev_ops;
3998         SET_NETDEV_DEV(netdev, &pdev->dev);
3999         hns3_ethtool_set_ops(netdev);
4000
4001         /* Carrier off reporting is important to ethtool even BEFORE open */
4002         netif_carrier_off(netdev);
4003
4004         ret = hns3_get_ring_config(priv);
4005         if (ret) {
4006                 ret = -ENOMEM;
4007                 goto out_get_ring_cfg;
4008         }
4009
4010         ret = hns3_nic_alloc_vector_data(priv);
4011         if (ret) {
4012                 ret = -ENOMEM;
4013                 goto out_alloc_vector_data;
4014         }
4015
4016         ret = hns3_nic_init_vector_data(priv);
4017         if (ret) {
4018                 ret = -ENOMEM;
4019                 goto out_init_vector_data;
4020         }
4021
4022         ret = hns3_init_all_ring(priv);
4023         if (ret) {
4024                 ret = -ENOMEM;
4025                 goto out_init_ring;
4026         }
4027
4028         ret = hns3_init_phy(netdev);
4029         if (ret)
4030                 goto out_init_phy;
4031
4032         ret = register_netdev(netdev);
4033         if (ret) {
4034                 dev_err(priv->dev, "probe register netdev fail!\n");
4035                 goto out_reg_netdev_fail;
4036         }
4037
4038         /* the device can work without cpu rmap, only aRFS needs it */
4039         ret = hns3_set_rx_cpu_rmap(netdev);
4040         if (ret)
4041                 dev_warn(priv->dev, "set rx cpu rmap fail, ret=%d\n", ret);
4042
4043         ret = hns3_nic_init_irq(priv);
4044         if (ret) {
4045                 dev_err(priv->dev, "init irq failed! ret=%d\n", ret);
4046                 hns3_free_rx_cpu_rmap(netdev);
4047                 goto out_init_irq_fail;
4048         }
4049
4050         ret = hns3_client_start(handle);
4051         if (ret) {
4052                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4053                 goto out_client_start;
4054         }
4055
4056         hns3_dcbnl_setup(handle);
4057
4058         hns3_dbg_init(handle);
4059
4060         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
4061         netdev->max_mtu = HNS3_MAX_MTU;
4062
4063         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4064
4065         if (netif_msg_drv(handle))
4066                 hns3_info_show(priv);
4067
4068         return ret;
4069
4070 out_client_start:
4071         hns3_free_rx_cpu_rmap(netdev);
4072         hns3_nic_uninit_irq(priv);
4073 out_init_irq_fail:
4074         unregister_netdev(netdev);
4075 out_reg_netdev_fail:
4076         hns3_uninit_phy(netdev);
4077 out_init_phy:
4078         hns3_uninit_all_ring(priv);
4079 out_init_ring:
4080         hns3_nic_uninit_vector_data(priv);
4081 out_init_vector_data:
4082         hns3_nic_dealloc_vector_data(priv);
4083 out_alloc_vector_data:
4084         priv->ring = NULL;
4085 out_get_ring_cfg:
4086         priv->ae_handle = NULL;
4087         free_netdev(netdev);
4088         return ret;
4089 }
4090
4091 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
4092 {
4093         struct net_device *netdev = handle->kinfo.netdev;
4094         struct hns3_nic_priv *priv = netdev_priv(netdev);
4095         int ret;
4096
4097         if (netdev->reg_state != NETREG_UNINITIALIZED)
4098                 unregister_netdev(netdev);
4099
4100         hns3_client_stop(handle);
4101
4102         hns3_uninit_phy(netdev);
4103
4104         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4105                 netdev_warn(netdev, "already uninitialized\n");
4106                 goto out_netdev_free;
4107         }
4108
4109         hns3_free_rx_cpu_rmap(netdev);
4110
4111         hns3_nic_uninit_irq(priv);
4112
4113         hns3_del_all_fd_rules(netdev, true);
4114
4115         hns3_clear_all_ring(handle, true);
4116
4117         hns3_nic_uninit_vector_data(priv);
4118
4119         hns3_nic_dealloc_vector_data(priv);
4120
4121         ret = hns3_uninit_all_ring(priv);
4122         if (ret)
4123                 netdev_err(netdev, "uninit ring error\n");
4124
4125         hns3_put_ring_config(priv);
4126
4127         hns3_dbg_uninit(handle);
4128
4129 out_netdev_free:
4130         free_netdev(netdev);
4131 }
4132
4133 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
4134 {
4135         struct net_device *netdev = handle->kinfo.netdev;
4136
4137         if (!netdev)
4138                 return;
4139
4140         if (linkup) {
4141                 netif_carrier_on(netdev);
4142                 netif_tx_wake_all_queues(netdev);
4143                 if (netif_msg_link(handle))
4144                         netdev_info(netdev, "link up\n");
4145         } else {
4146                 netif_carrier_off(netdev);
4147                 netif_tx_stop_all_queues(netdev);
4148                 if (netif_msg_link(handle))
4149                         netdev_info(netdev, "link down\n");
4150         }
4151 }
4152
4153 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
4154 {
4155         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4156         struct net_device *ndev = kinfo->netdev;
4157
4158         if (tc > HNAE3_MAX_TC)
4159                 return -EINVAL;
4160
4161         if (!ndev)
4162                 return -ENODEV;
4163
4164         return hns3_nic_set_real_num_queue(ndev);
4165 }
4166
4167 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4168 {
4169         while (ring->next_to_clean != ring->next_to_use) {
4170                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4171                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4172                 ring_ptr_move_fw(ring, next_to_clean);
4173         }
4174 }
4175
4176 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4177 {
4178         struct hns3_desc_cb res_cbs;
4179         int ret;
4180
4181         while (ring->next_to_use != ring->next_to_clean) {
4182                 /* When a buffer is not reused, it's memory has been
4183                  * freed in hns3_handle_rx_bd or will be freed by
4184                  * stack, so we need to replace the buffer here.
4185                  */
4186                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4187                         ret = hns3_alloc_and_map_buffer(ring, &res_cbs);
4188                         if (ret) {
4189                                 u64_stats_update_begin(&ring->syncp);
4190                                 ring->stats.sw_err_cnt++;
4191                                 u64_stats_update_end(&ring->syncp);
4192                                 /* if alloc new buffer fail, exit directly
4193                                  * and reclear in up flow.
4194                                  */
4195                                 netdev_warn(ring_to_netdev(ring),
4196                                             "reserve buffer map failed, ret = %d\n",
4197                                             ret);
4198                                 return ret;
4199                         }
4200                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4201                 }
4202                 ring_ptr_move_fw(ring, next_to_use);
4203         }
4204
4205         /* Free the pending skb in rx ring */
4206         if (ring->skb) {
4207                 dev_kfree_skb_any(ring->skb);
4208                 ring->skb = NULL;
4209                 ring->pending_buf = 0;
4210         }
4211
4212         return 0;
4213 }
4214
4215 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4216 {
4217         while (ring->next_to_use != ring->next_to_clean) {
4218                 /* When a buffer is not reused, it's memory has been
4219                  * freed in hns3_handle_rx_bd or will be freed by
4220                  * stack, so only need to unmap the buffer here.
4221                  */
4222                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4223                         hns3_unmap_buffer(ring,
4224                                           &ring->desc_cb[ring->next_to_use]);
4225                         ring->desc_cb[ring->next_to_use].dma = 0;
4226                 }
4227
4228                 ring_ptr_move_fw(ring, next_to_use);
4229         }
4230 }
4231
4232 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4233 {
4234         struct net_device *ndev = h->kinfo.netdev;
4235         struct hns3_nic_priv *priv = netdev_priv(ndev);
4236         u32 i;
4237
4238         for (i = 0; i < h->kinfo.num_tqps; i++) {
4239                 struct hns3_enet_ring *ring;
4240
4241                 ring = &priv->ring[i];
4242                 hns3_clear_tx_ring(ring);
4243
4244                 ring = &priv->ring[i + h->kinfo.num_tqps];
4245                 /* Continue to clear other rings even if clearing some
4246                  * rings failed.
4247                  */
4248                 if (force)
4249                         hns3_force_clear_rx_ring(ring);
4250                 else
4251                         hns3_clear_rx_ring(ring);
4252         }
4253 }
4254
4255 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4256 {
4257         struct net_device *ndev = h->kinfo.netdev;
4258         struct hns3_nic_priv *priv = netdev_priv(ndev);
4259         struct hns3_enet_ring *rx_ring;
4260         int i, j;
4261         int ret;
4262
4263         for (i = 0; i < h->kinfo.num_tqps; i++) {
4264                 ret = h->ae_algo->ops->reset_queue(h, i);
4265                 if (ret)
4266                         return ret;
4267
4268                 hns3_init_ring_hw(&priv->ring[i]);
4269
4270                 /* We need to clear tx ring here because self test will
4271                  * use the ring and will not run down before up
4272                  */
4273                 hns3_clear_tx_ring(&priv->ring[i]);
4274                 priv->ring[i].next_to_clean = 0;
4275                 priv->ring[i].next_to_use = 0;
4276
4277                 rx_ring = &priv->ring[i + h->kinfo.num_tqps];
4278                 hns3_init_ring_hw(rx_ring);
4279                 ret = hns3_clear_rx_ring(rx_ring);
4280                 if (ret)
4281                         return ret;
4282
4283                 /* We can not know the hardware head and tail when this
4284                  * function is called in reset flow, so we reuse all desc.
4285                  */
4286                 for (j = 0; j < rx_ring->desc_num; j++)
4287                         hns3_reuse_buffer(rx_ring, j);
4288
4289                 rx_ring->next_to_clean = 0;
4290                 rx_ring->next_to_use = 0;
4291         }
4292
4293         hns3_init_tx_ring_tc(priv);
4294
4295         return 0;
4296 }
4297
4298 static void hns3_store_coal(struct hns3_nic_priv *priv)
4299 {
4300         /* ethtool only support setting and querying one coal
4301          * configuration for now, so save the vector 0' coal
4302          * configuration here in order to restore it.
4303          */
4304         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4305                sizeof(struct hns3_enet_coalesce));
4306         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4307                sizeof(struct hns3_enet_coalesce));
4308 }
4309
4310 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4311 {
4312         u16 vector_num = priv->vector_num;
4313         int i;
4314
4315         for (i = 0; i < vector_num; i++) {
4316                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4317                        sizeof(struct hns3_enet_coalesce));
4318                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4319                        sizeof(struct hns3_enet_coalesce));
4320         }
4321 }
4322
4323 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4324 {
4325         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4326         struct net_device *ndev = kinfo->netdev;
4327         struct hns3_nic_priv *priv = netdev_priv(ndev);
4328
4329         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4330                 return 0;
4331
4332         if (!netif_running(ndev))
4333                 return 0;
4334
4335         return hns3_nic_net_stop(ndev);
4336 }
4337
4338 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4339 {
4340         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4341         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4342         int ret = 0;
4343
4344         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4345
4346         if (netif_running(kinfo->netdev)) {
4347                 ret = hns3_nic_net_open(kinfo->netdev);
4348                 if (ret) {
4349                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4350                         netdev_err(kinfo->netdev,
4351                                    "net up fail, ret=%d!\n", ret);
4352                         return ret;
4353                 }
4354         }
4355
4356         return ret;
4357 }
4358
4359 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4360 {
4361         struct net_device *netdev = handle->kinfo.netdev;
4362         struct hns3_nic_priv *priv = netdev_priv(netdev);
4363         int ret;
4364
4365         /* Carrier off reporting is important to ethtool even BEFORE open */
4366         netif_carrier_off(netdev);
4367
4368         ret = hns3_get_ring_config(priv);
4369         if (ret)
4370                 return ret;
4371
4372         ret = hns3_nic_alloc_vector_data(priv);
4373         if (ret)
4374                 goto err_put_ring;
4375
4376         hns3_restore_coal(priv);
4377
4378         ret = hns3_nic_init_vector_data(priv);
4379         if (ret)
4380                 goto err_dealloc_vector;
4381
4382         ret = hns3_init_all_ring(priv);
4383         if (ret)
4384                 goto err_uninit_vector;
4385
4386         /* the device can work without cpu rmap, only aRFS needs it */
4387         ret = hns3_set_rx_cpu_rmap(netdev);
4388         if (ret)
4389                 dev_warn(priv->dev, "set rx cpu rmap fail, ret=%d\n", ret);
4390
4391         ret = hns3_nic_init_irq(priv);
4392         if (ret) {
4393                 dev_err(priv->dev, "init irq failed! ret=%d\n", ret);
4394                 hns3_free_rx_cpu_rmap(netdev);
4395                 goto err_init_irq_fail;
4396         }
4397
4398         if (!hns3_is_phys_func(handle->pdev))
4399                 hns3_init_mac_addr(netdev);
4400
4401         ret = hns3_client_start(handle);
4402         if (ret) {
4403                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4404                 goto err_client_start_fail;
4405         }
4406
4407         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4408
4409         return ret;
4410
4411 err_client_start_fail:
4412         hns3_free_rx_cpu_rmap(netdev);
4413         hns3_nic_uninit_irq(priv);
4414 err_init_irq_fail:
4415         hns3_uninit_all_ring(priv);
4416 err_uninit_vector:
4417         hns3_nic_uninit_vector_data(priv);
4418 err_dealloc_vector:
4419         hns3_nic_dealloc_vector_data(priv);
4420 err_put_ring:
4421         hns3_put_ring_config(priv);
4422
4423         return ret;
4424 }
4425
4426 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4427 {
4428         struct net_device *netdev = handle->kinfo.netdev;
4429         struct hns3_nic_priv *priv = netdev_priv(netdev);
4430         int ret;
4431
4432         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4433                 netdev_warn(netdev, "already uninitialized\n");
4434                 return 0;
4435         }
4436
4437         hns3_free_rx_cpu_rmap(netdev);
4438         hns3_nic_uninit_irq(priv);
4439         hns3_clear_all_ring(handle, true);
4440         hns3_reset_tx_queue(priv->ae_handle);
4441
4442         hns3_nic_uninit_vector_data(priv);
4443
4444         hns3_store_coal(priv);
4445
4446         hns3_nic_dealloc_vector_data(priv);
4447
4448         ret = hns3_uninit_all_ring(priv);
4449         if (ret)
4450                 netdev_err(netdev, "uninit ring error\n");
4451
4452         hns3_put_ring_config(priv);
4453
4454         return ret;
4455 }
4456
4457 static int hns3_reset_notify(struct hnae3_handle *handle,
4458                              enum hnae3_reset_notify_type type)
4459 {
4460         int ret = 0;
4461
4462         switch (type) {
4463         case HNAE3_UP_CLIENT:
4464                 ret = hns3_reset_notify_up_enet(handle);
4465                 break;
4466         case HNAE3_DOWN_CLIENT:
4467                 ret = hns3_reset_notify_down_enet(handle);
4468                 break;
4469         case HNAE3_INIT_CLIENT:
4470                 ret = hns3_reset_notify_init_enet(handle);
4471                 break;
4472         case HNAE3_UNINIT_CLIENT:
4473                 ret = hns3_reset_notify_uninit_enet(handle);
4474                 break;
4475         default:
4476                 break;
4477         }
4478
4479         return ret;
4480 }
4481
4482 static int hns3_change_channels(struct hnae3_handle *handle, u32 new_tqp_num,
4483                                 bool rxfh_configured)
4484 {
4485         int ret;
4486
4487         ret = handle->ae_algo->ops->set_channels(handle, new_tqp_num,
4488                                                  rxfh_configured);
4489         if (ret) {
4490                 dev_err(&handle->pdev->dev,
4491                         "Change tqp num(%u) fail.\n", new_tqp_num);
4492                 return ret;
4493         }
4494
4495         ret = hns3_reset_notify(handle, HNAE3_INIT_CLIENT);
4496         if (ret)
4497                 return ret;
4498
4499         ret =  hns3_reset_notify(handle, HNAE3_UP_CLIENT);
4500         if (ret)
4501                 hns3_reset_notify(handle, HNAE3_UNINIT_CLIENT);
4502
4503         return ret;
4504 }
4505
4506 int hns3_set_channels(struct net_device *netdev,
4507                       struct ethtool_channels *ch)
4508 {
4509         struct hnae3_handle *h = hns3_get_handle(netdev);
4510         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4511         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4512         u32 new_tqp_num = ch->combined_count;
4513         u16 org_tqp_num;
4514         int ret;
4515
4516         if (hns3_nic_resetting(netdev))
4517                 return -EBUSY;
4518
4519         if (ch->rx_count || ch->tx_count)
4520                 return -EINVAL;
4521
4522         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4523             new_tqp_num < 1) {
4524                 dev_err(&netdev->dev,
4525                         "Change tqps fail, the tqp range is from 1 to %u",
4526                         hns3_get_max_available_channels(h));
4527                 return -EINVAL;
4528         }
4529
4530         if (kinfo->rss_size == new_tqp_num)
4531                 return 0;
4532
4533         netif_dbg(h, drv, netdev,
4534                   "set channels: tqp_num=%u, rxfh=%d\n",
4535                   new_tqp_num, rxfh_configured);
4536
4537         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4538         if (ret)
4539                 return ret;
4540
4541         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4542         if (ret)
4543                 return ret;
4544
4545         org_tqp_num = h->kinfo.num_tqps;
4546         ret = hns3_change_channels(h, new_tqp_num, rxfh_configured);
4547         if (ret) {
4548                 int ret1;
4549
4550                 netdev_warn(netdev,
4551                             "Change channels fail, revert to old value\n");
4552                 ret1 = hns3_change_channels(h, org_tqp_num, rxfh_configured);
4553                 if (ret1) {
4554                         netdev_err(netdev,
4555                                    "revert to old channel fail\n");
4556                         return ret1;
4557                 }
4558
4559                 return ret;
4560         }
4561
4562         return 0;
4563 }
4564
4565 static const struct hns3_hw_error_info hns3_hw_err[] = {
4566         { .type = HNAE3_PPU_POISON_ERROR,
4567           .msg = "PPU poison" },
4568         { .type = HNAE3_CMDQ_ECC_ERROR,
4569           .msg = "IMP CMDQ error" },
4570         { .type = HNAE3_IMP_RD_POISON_ERROR,
4571           .msg = "IMP RD poison" },
4572 };
4573
4574 static void hns3_process_hw_error(struct hnae3_handle *handle,
4575                                   enum hnae3_hw_error_type type)
4576 {
4577         int i;
4578
4579         for (i = 0; i < ARRAY_SIZE(hns3_hw_err); i++) {
4580                 if (hns3_hw_err[i].type == type) {
4581                         dev_err(&handle->pdev->dev, "Detected %s!\n",
4582                                 hns3_hw_err[i].msg);
4583                         break;
4584                 }
4585         }
4586 }
4587
4588 static const struct hnae3_client_ops client_ops = {
4589         .init_instance = hns3_client_init,
4590         .uninit_instance = hns3_client_uninit,
4591         .link_status_change = hns3_link_status_change,
4592         .setup_tc = hns3_client_setup_tc,
4593         .reset_notify = hns3_reset_notify,
4594         .process_hw_error = hns3_process_hw_error,
4595 };
4596
4597 /* hns3_init_module - Driver registration routine
4598  * hns3_init_module is the first routine called when the driver is
4599  * loaded. All it does is register with the PCI subsystem.
4600  */
4601 static int __init hns3_init_module(void)
4602 {
4603         int ret;
4604
4605         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4606         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4607
4608         client.type = HNAE3_CLIENT_KNIC;
4609         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH, "%s",
4610                  hns3_driver_name);
4611
4612         client.ops = &client_ops;
4613
4614         INIT_LIST_HEAD(&client.node);
4615
4616         hns3_dbg_register_debugfs(hns3_driver_name);
4617
4618         ret = hnae3_register_client(&client);
4619         if (ret)
4620                 goto err_reg_client;
4621
4622         ret = pci_register_driver(&hns3_driver);
4623         if (ret)
4624                 goto err_reg_driver;
4625
4626         return ret;
4627
4628 err_reg_driver:
4629         hnae3_unregister_client(&client);
4630 err_reg_client:
4631         hns3_dbg_unregister_debugfs();
4632         return ret;
4633 }
4634 module_init(hns3_init_module);
4635
4636 /* hns3_exit_module - Driver exit cleanup routine
4637  * hns3_exit_module is called just before the driver is removed
4638  * from memory.
4639  */
4640 static void __exit hns3_exit_module(void)
4641 {
4642         pci_unregister_driver(&hns3_driver);
4643         hnae3_unregister_client(&client);
4644         hns3_dbg_unregister_debugfs();
4645 }
4646 module_exit(hns3_exit_module);
4647
4648 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4649 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4650 MODULE_LICENSE("GPL");
4651 MODULE_ALIAS("pci:hns-nic");