drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/netdevice.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/of.h>
  17 #include <linux/of_address.h>
  18 #include <linux/of_irq.h>
  19 #include <linux/device.h>
  20 #include <linux/vmalloc.h>
  21
  22 #include "hns_dsaf_main.h"
  23 #include "hns_dsaf_rcb.h"
  24 #include "hns_dsaf_ppe.h"
  25 #include "hns_dsaf_mac.h"
  26
  27 const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
  28         [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
  29         [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
  30         [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
  31         [DSAF_MODE_DISABLE_SP] = "single-port",
  32 };
  33
  34 int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
  35 {
  36         int ret, i;
  37         u32 desc_num;
  38         u32 buf_size;
  39         const char *mode_str;
  40         struct device_node *np = dsaf_dev->dev->of_node;
  41
  42         if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
  43                 dsaf_dev->dsaf_ver = AE_VERSION_1;
  44         else
  45                 dsaf_dev->dsaf_ver = AE_VERSION_2;
  46
  47         ret = of_property_read_string(np, "mode", &mode_str);
  48         if (ret) {
  49                 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
  50                 return ret;
  51         }
  52         for (i = 0; i < DSAF_MODE_MAX; i++) {
  53                 if (g_dsaf_mode_match[i] &&
  54                     !strcmp(mode_str, g_dsaf_mode_match[i]))
  55                         break;
  56         }
  57         if (i >= DSAF_MODE_MAX ||
  58             i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
  59                 dev_err(dsaf_dev->dev,
  60                         "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
  61                 return -EINVAL;
  62         }
  63         dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
  64
  65         if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
  66                 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
  67         else
  68                 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
  69
  70         if ((i == DSAF_MODE_ENABLE_16VM) ||
  71             (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
  72             (i == DSAF_MODE_DISABLE_6PORT_2VM))
  73                 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
  74         else
  75                 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
  76
  77         dsaf_dev->sc_base = of_iomap(np, 0);
  78         if (!dsaf_dev->sc_base) {
  79                 dev_err(dsaf_dev->dev,
  80                         "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name);
  81                 ret = -ENOMEM;
  82                 goto unmap_base_addr;
  83         }
  84
  85         dsaf_dev->sds_base = of_iomap(np, 1);
  86         if (!dsaf_dev->sds_base) {
  87                 dev_err(dsaf_dev->dev,
  88                         "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name);
  89                 ret = -ENOMEM;
  90                 goto unmap_base_addr;
  91         }
  92
  93         dsaf_dev->ppe_base = of_iomap(np, 2);
  94         if (!dsaf_dev->ppe_base) {
  95                 dev_err(dsaf_dev->dev,
  96                         "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name);
  97                 ret = -ENOMEM;
  98                 goto unmap_base_addr;
  99         }
 100
 101         dsaf_dev->io_base = of_iomap(np, 3);
 102         if (!dsaf_dev->io_base) {
 103                 dev_err(dsaf_dev->dev,
 104                         "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name);
 105                 ret = -ENOMEM;
 106                 goto unmap_base_addr;
 107         }
 108
 109         dsaf_dev->cpld_base = of_iomap(np, 4);
 110         if (!dsaf_dev->cpld_base)
 111                 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR");
 112
 113         ret = of_property_read_u32(np, "desc-num", &desc_num);
 114         if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
 115             desc_num > HNS_DSAF_MAX_DESC_CNT) {
 116                 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
 117                         desc_num, ret);
 118                 goto unmap_base_addr;
 119         }
 120         dsaf_dev->desc_num = desc_num;
 121
 122         ret = of_property_read_u32(np, "buf-size", &buf_size);
 123         if (ret < 0) {
 124                 dev_err(dsaf_dev->dev,
 125                         "get buf-size fail, ret=%d!\r\n", ret);
 126                 goto unmap_base_addr;
 127         }
 128         dsaf_dev->buf_size = buf_size;
 129
 130         dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
 131         if (dsaf_dev->buf_size_type < 0) {
 132                 dev_err(dsaf_dev->dev,
 133                         "buf_size(%d) is wrong!\n", buf_size);
 134                 goto unmap_base_addr;
 135         }
 136
 137         if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
 138                 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
 139         else
 140                 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
 141
 142         return 0;
 143
 144 unmap_base_addr:
 145         if (dsaf_dev->io_base)
 146                 iounmap(dsaf_dev->io_base);
 147         if (dsaf_dev->ppe_base)
 148                 iounmap(dsaf_dev->ppe_base);
 149         if (dsaf_dev->sds_base)
 150                 iounmap(dsaf_dev->sds_base);
 151         if (dsaf_dev->sc_base)
 152                 iounmap(dsaf_dev->sc_base);
 153         if (dsaf_dev->cpld_base)
 154                 iounmap(dsaf_dev->cpld_base);
 155         return ret;
 156 }
 157
 158 static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
 159 {
 160         if (dsaf_dev->io_base)
 161                 iounmap(dsaf_dev->io_base);
 162
 163         if (dsaf_dev->ppe_base)
 164                 iounmap(dsaf_dev->ppe_base);
 165
 166         if (dsaf_dev->sds_base)
 167                 iounmap(dsaf_dev->sds_base);
 168
 169         if (dsaf_dev->sc_base)
 170                 iounmap(dsaf_dev->sc_base);
 171
 172         if (dsaf_dev->cpld_base)
 173                 iounmap(dsaf_dev->cpld_base);
 174 }
 175
 176 /**
 177  * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
 178  * @dsaf_id: dsa fabric id
 179  */
 180 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
 181 {
 182         dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
 183 }
 184
 185 /**
 186  * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
 187  * @dsaf_id: dsa fabric id
 188  * @hns_dsaf_reg_cnt_clr_ce: config value
 189  */
 190 static void
 191 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
 192 {
 193         dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
 194                          DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
 195 }
 196
 197 /**
 198  * hns_ppe_qid_cfg - config ppe qid
 199  * @dsaf_id: dsa fabric id
 200  * @pppe_qid_cfg: value array
 201  */
 202 static void
 203 hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
 204 {
 205         u32 i;
 206
 207         for (i = 0; i < DSAF_COMM_CHN; i++) {
 208                 dsaf_set_dev_field(dsaf_dev,
 209                                    DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
 210                                    DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
 211                                    qid_cfg);
 212         }
 213 }
 214
 215 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
 216 {
 217         u16 max_q_per_vf, max_vfn;
 218         u32 q_id, q_num_per_port;
 219         u32 i;
 220
 221         hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
 222         q_num_per_port = max_vfn * max_q_per_vf;
 223
 224         for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
 225                 dsaf_set_dev_field(dsaf_dev,
 226                                    DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
 227                                    0xff, 0, q_id);
 228                 q_id += q_num_per_port;
 229         }
 230 }
 231
 232 static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
 233 {
 234         u16 max_q_per_vf, max_vfn;
 235         u32 q_id, q_num_per_port;
 236         u32 mac_id;
 237
 238         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 239                 return;
 240
 241         hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
 242         q_num_per_port = max_vfn * max_q_per_vf;
 243
 244         for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
 245                 dsaf_set_dev_field(dsaf_dev,
 246                                    DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
 247                                    DSAFV2_SERDES_LBK_QID_M,
 248                                    DSAFV2_SERDES_LBK_QID_S,
 249                                    q_id);
 250                 q_id += q_num_per_port;
 251         }
 252 }
 253
 254 /**
 255  * hns_dsaf_sw_port_type_cfg - cfg sw type
 256  * @dsaf_id: dsa fabric id
 257  * @psw_port_type: array
 258  */
 259 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
 260                                       enum dsaf_sw_port_type port_type)
 261 {
 262         u32 i;
 263
 264         for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
 265                 dsaf_set_dev_field(dsaf_dev,
 266                                    DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
 267                                    DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
 268                                    port_type);
 269         }
 270 }
 271
 272 /**
 273  * hns_dsaf_stp_port_type_cfg - cfg stp type
 274  * @dsaf_id: dsa fabric id
 275  * @pstp_port_type: array
 276  */
 277 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
 278                                        enum dsaf_stp_port_type port_type)
 279 {
 280         u32 i;
 281
 282         for (i = 0; i < DSAF_COMM_CHN; i++) {
 283                 dsaf_set_dev_field(dsaf_dev,
 284                                    DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
 285                                    DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
 286                                    port_type);
 287         }
 288 }
 289
 290 #define HNS_DSAF_SBM_NUM(dev) \
 291         (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
 292 /**
 293  * hns_dsaf_sbm_cfg - config sbm
 294  * @dsaf_id: dsa fabric id
 295  */
 296 static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
 297 {
 298         u32 o_sbm_cfg;
 299         u32 i;
 300
 301         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 302                 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
 303                                           DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
 304                 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
 305                 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
 306                 dsaf_write_dev(dsaf_dev,
 307                                DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
 308         }
 309 }
 310
 311 /**
 312  * hns_dsaf_sbm_cfg_mib_en - config sbm
 313  * @dsaf_id: dsa fabric id
 314  */
 315 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
 316 {
 317         u32 sbm_cfg_mib_en;
 318         u32 i;
 319         u32 reg;
 320         u32 read_cnt;
 321
 322         /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
 323         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 324                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 325                 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
 326         }
 327
 328         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 329                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 330                 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
 331         }
 332
 333         /* waitint for all sbm enable finished */
 334         for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
 335                 read_cnt = 0;
 336                 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
 337                 do {
 338                         udelay(1);
 339                         sbm_cfg_mib_en = dsaf_get_dev_bit(
 340                                         dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
 341                         read_cnt++;
 342                 } while (sbm_cfg_mib_en == 0 &&
 343                         read_cnt < DSAF_CFG_READ_CNT);
 344
 345                 if (sbm_cfg_mib_en == 0) {
 346                         dev_err(dsaf_dev->dev,
 347                                 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
 348                                 dsaf_dev->ae_dev.name, i);
 349                         return -ENODEV;
 350                 }
 351         }
 352
 353         return 0;
 354 }
 355
 356 /**
 357  * hns_dsaf_sbm_bp_wl_cfg - config sbm
 358  * @dsaf_id: dsa fabric id
 359  */
 360 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
 361 {
 362         u32 o_sbm_bp_cfg;
 363         u32 reg;
 364         u32 i;
 365
 366         /* XGE */
 367         for (i = 0; i < DSAF_XGE_NUM; i++) {
 368                 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
 369                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 370                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
 371                                DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
 372                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
 373                                DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
 374                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
 375                                DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
 376                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 377
 378                 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
 379                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 380                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
 381                                DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
 382                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
 383                                DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
 384                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 385
 386                 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
 387                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 388                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 389                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
 390                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 391                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
 392                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 393
 394                 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
 395                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 396                 dsaf_set_field(o_sbm_bp_cfg,
 397                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 398                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
 399                 dsaf_set_field(o_sbm_bp_cfg,
 400                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 401                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
 402                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 403
 404                 /* for no enable pfc mode */
 405                 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
 406                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 407                 dsaf_set_field(o_sbm_bp_cfg,
 408                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 409                                DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
 410                 dsaf_set_field(o_sbm_bp_cfg,
 411                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 412                                DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
 413                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 414         }
 415
 416         /* PPE */
 417         for (i = 0; i < DSAF_COMM_CHN; i++) {
 418                 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
 419                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 420                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 421                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
 422                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 423                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
 424                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 425         }
 426
 427         /* RoCEE */
 428         for (i = 0; i < DSAF_COMM_CHN; i++) {
 429                 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
 430                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 431                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
 432                                DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
 433                 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
 434                                DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
 435                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 436         }
 437 }
 438
 439 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
 440 {
 441         u32 o_sbm_bp_cfg;
 442         u32 reg;
 443         u32 i;
 444
 445         /* XGE */
 446         for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
 447                 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
 448                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 449                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
 450                                DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
 451                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
 452                                DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
 453                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
 454                                DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
 455                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 456
 457                 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
 458                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 459                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
 460                                DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
 461                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
 462                                DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
 463                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 464
 465                 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
 466                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 467                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 468                                DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
 469                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 470                                DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
 471                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 472
 473                 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
 474                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 475                 dsaf_set_field(o_sbm_bp_cfg,
 476                                DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
 477                                DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
 478                 dsaf_set_field(o_sbm_bp_cfg,
 479                                DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
 480                                DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
 481                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 482
 483                 /* for no enable pfc mode */
 484                 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
 485                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 486                 dsaf_set_field(o_sbm_bp_cfg,
 487                                DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
 488                                DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
 489                 dsaf_set_field(o_sbm_bp_cfg,
 490                                DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
 491                                DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
 492                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 493         }
 494
 495         /* PPE */
 496         reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
 497         o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 498         dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 499                        DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
 500         dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 501                        DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
 502         dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 503         /* RoCEE */
 504         for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
 505                 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
 506                 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
 507                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
 508                                DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
 509                 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
 510                                DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
 511                 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
 512         }
 513 }
 514
 515 /**
 516  * hns_dsaf_voq_bp_all_thrd_cfg -  voq
 517  * @dsaf_id: dsa fabric id
 518  */
 519 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
 520 {
 521         u32 voq_bp_all_thrd;
 522         u32 i;
 523
 524         for (i = 0; i < DSAF_VOQ_NUM; i++) {
 525                 voq_bp_all_thrd = dsaf_read_dev(
 526                         dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
 527                 if (i < DSAF_XGE_NUM) {
 528                         dsaf_set_field(voq_bp_all_thrd,
 529                                        DSAF_VOQ_BP_ALL_DOWNTHRD_M,
 530                                        DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
 531                         dsaf_set_field(voq_bp_all_thrd,
 532                                        DSAF_VOQ_BP_ALL_UPTHRD_M,
 533                                        DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
 534                 } else {
 535                         dsaf_set_field(voq_bp_all_thrd,
 536                                        DSAF_VOQ_BP_ALL_DOWNTHRD_M,
 537                                        DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
 538                         dsaf_set_field(voq_bp_all_thrd,
 539                                        DSAF_VOQ_BP_ALL_UPTHRD_M,
 540                                        DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
 541                 }
 542                 dsaf_write_dev(
 543                         dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
 544                         voq_bp_all_thrd);
 545         }
 546 }
 547
 548 /**
 549  * hns_dsaf_tbl_tcam_data_cfg - tbl
 550  * @dsaf_id: dsa fabric id
 551  * @ptbl_tcam_data: addr
 552  */
 553 static void hns_dsaf_tbl_tcam_data_cfg(
 554         struct dsaf_device *dsaf_dev,
 555         struct dsaf_tbl_tcam_data *ptbl_tcam_data)
 556 {
 557         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
 558                        ptbl_tcam_data->tbl_tcam_data_low);
 559         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
 560                        ptbl_tcam_data->tbl_tcam_data_high);
 561 }
 562
 563 /**
 564  * dsaf_tbl_tcam_mcast_cfg - tbl
 565  * @dsaf_id: dsa fabric id
 566  * @ptbl_tcam_mcast: addr
 567  */
 568 static void hns_dsaf_tbl_tcam_mcast_cfg(
 569         struct dsaf_device *dsaf_dev,
 570         struct dsaf_tbl_tcam_mcast_cfg *mcast)
 571 {
 572         u32 mcast_cfg4;
 573
 574         mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
 575         dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
 576                      mcast->tbl_mcast_item_vld);
 577         dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
 578                      mcast->tbl_mcast_old_en);
 579         dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
 580                        DSAF_TBL_MCAST_CFG4_VM128_112_S,
 581                        mcast->tbl_mcast_port_msk[4]);
 582         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
 583
 584         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
 585                        mcast->tbl_mcast_port_msk[3]);
 586
 587         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
 588                        mcast->tbl_mcast_port_msk[2]);
 589
 590         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
 591                        mcast->tbl_mcast_port_msk[1]);
 592
 593         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
 594                        mcast->tbl_mcast_port_msk[0]);
 595 }
 596
 597 /**
 598  * hns_dsaf_tbl_tcam_ucast_cfg - tbl
 599  * @dsaf_id: dsa fabric id
 600  * @ptbl_tcam_ucast: addr
 601  */
 602 static void hns_dsaf_tbl_tcam_ucast_cfg(
 603         struct dsaf_device *dsaf_dev,
 604         struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
 605 {
 606         u32 ucast_cfg1;
 607
 608         ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
 609         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
 610                      tbl_tcam_ucast->tbl_ucast_mac_discard);
 611         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
 612                      tbl_tcam_ucast->tbl_ucast_item_vld);
 613         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
 614                      tbl_tcam_ucast->tbl_ucast_old_en);
 615         dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
 616                      tbl_tcam_ucast->tbl_ucast_dvc);
 617         dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
 618                        DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
 619                        tbl_tcam_ucast->tbl_ucast_out_port);
 620         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
 621 }
 622
 623 /**
 624  * hns_dsaf_tbl_line_cfg - tbl
 625  * @dsaf_id: dsa fabric id
 626  * @ptbl_lin: addr
 627  */
 628 static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
 629                                   struct dsaf_tbl_line_cfg *tbl_lin)
 630 {
 631         u32 tbl_line;
 632
 633         tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
 634         dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
 635                      tbl_lin->tbl_line_mac_discard);
 636         dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
 637                      tbl_lin->tbl_line_dvc);
 638         dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
 639                        DSAF_TBL_LINE_CFG_OUT_PORT_S,
 640                        tbl_lin->tbl_line_out_port);
 641         dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
 642 }
 643
 644 /**
 645  * hns_dsaf_tbl_tcam_mcast_pul - tbl
 646  * @dsaf_id: dsa fabric id
 647  */
 648 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
 649 {
 650         u32 o_tbl_pul;
 651
 652         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 653         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
 654         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 655         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
 656         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 657 }
 658
 659 /**
 660  * hns_dsaf_tbl_line_pul - tbl
 661  * @dsaf_id: dsa fabric id
 662  */
 663 static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
 664 {
 665         u32 tbl_pul;
 666
 667         tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 668         dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
 669         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
 670         dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
 671         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
 672 }
 673
 674 /**
 675  * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
 676  * @dsaf_id: dsa fabric id
 677  */
 678 static void hns_dsaf_tbl_tcam_data_mcast_pul(
 679         struct dsaf_device *dsaf_dev)
 680 {
 681         u32 o_tbl_pul;
 682
 683         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 684         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
 685         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
 686         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 687         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
 688         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
 689         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 690 }
 691
 692 /**
 693  * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
 694  * @dsaf_id: dsa fabric id
 695  */
 696 static void hns_dsaf_tbl_tcam_data_ucast_pul(
 697         struct dsaf_device *dsaf_dev)
 698 {
 699         u32 o_tbl_pul;
 700
 701         o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
 702         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
 703         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
 704         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 705         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
 706         dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
 707         dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
 708 }
 709
 710 void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
 711 {
 712         if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
 713                 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
 714                                  DSAF_CFG_MIX_MODE_S, !!en);
 715 }
 716
 717 void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
 718 {
 719         if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
 720             dsaf_dev->mac_cb[mac_id].mac_type == HNAE_PORT_DEBUG)
 721                 return;
 722
 723         dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
 724                          DSAFV2_SERDES_LBK_EN_B, !!en);
 725 }
 726
 727 /**
 728  * hns_dsaf_tbl_stat_en - tbl
 729  * @dsaf_id: dsa fabric id
 730  * @ptbl_stat_en: addr
 731  */
 732 static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
 733 {
 734         u32 o_tbl_ctrl;
 735
 736         o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
 737         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
 738         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
 739         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
 740         dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
 741         dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
 742 }
 743
 744 /**
 745  * hns_dsaf_rocee_bp_en - rocee back press enable
 746  * @dsaf_id: dsa fabric id
 747  */
 748 static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
 749 {
 750         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
 751                 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
 752                                  DSAF_FC_XGE_TX_PAUSE_S, 1);
 753 }
 754
 755 /* set msk for dsaf exception irq*/
 756 static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
 757                                      u32 chnn_num, u32 mask_set)
 758 {
 759         dsaf_write_dev(dsaf_dev,
 760                        DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
 761 }
 762
 763 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
 764                                      u32 chnn_num, u32 msk_set)
 765 {
 766         dsaf_write_dev(dsaf_dev,
 767                        DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
 768 }
 769
 770 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
 771                                        u32 chnn, u32 msk_set)
 772 {
 773         dsaf_write_dev(dsaf_dev,
 774                        DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
 775 }
 776
 777 static void
 778 hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
 779 {
 780         dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
 781 }
 782
 783 /* clr dsaf exception irq*/
 784 static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
 785                                      u32 chnn_num, u32 int_src)
 786 {
 787         dsaf_write_dev(dsaf_dev,
 788                        DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
 789 }
 790
 791 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
 792                                      u32 chnn, u32 int_src)
 793 {
 794         dsaf_write_dev(dsaf_dev,
 795                        DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
 796 }
 797
 798 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
 799                                        u32 chnn, u32 int_src)
 800 {
 801         dsaf_write_dev(dsaf_dev,
 802                        DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
 803 }
 804
 805 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
 806                                      u32 int_src)
 807 {
 808         dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
 809 }
 810
 811 /**
 812  * hns_dsaf_single_line_tbl_cfg - INT
 813  * @dsaf_id: dsa fabric id
 814  * @address:
 815  * @ptbl_line:
 816  */
 817 static void hns_dsaf_single_line_tbl_cfg(
 818         struct dsaf_device *dsaf_dev,
 819         u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
 820 {
 821         /*Write Addr*/
 822         hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
 823
 824         /*Write Line*/
 825         hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
 826
 827         /*Write Plus*/
 828         hns_dsaf_tbl_line_pul(dsaf_dev);
 829 }
 830
 831 /**
 832  * hns_dsaf_tcam_uc_cfg - INT
 833  * @dsaf_id: dsa fabric id
 834  * @address,
 835  * @ptbl_tcam_data,
 836  */
 837 static void hns_dsaf_tcam_uc_cfg(
 838         struct dsaf_device *dsaf_dev, u32 address,
 839         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 840         struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
 841 {
 842         /*Write Addr*/
 843         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 844         /*Write Tcam Data*/
 845         hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
 846         /*Write Tcam Ucast*/
 847         hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
 848         /*Write Plus*/
 849         hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
 850 }
 851
 852 /**
 853  * hns_dsaf_tcam_mc_cfg - INT
 854  * @dsaf_id: dsa fabric id
 855  * @address,
 856  * @ptbl_tcam_data,
 857  * @ptbl_tcam_mcast,
 858  */
 859 static void hns_dsaf_tcam_mc_cfg(
 860         struct dsaf_device *dsaf_dev, u32 address,
 861         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 862         struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
 863 {
 864         /*Write Addr*/
 865         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 866         /*Write Tcam Data*/
 867         hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
 868         /*Write Tcam Mcast*/
 869         hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
 870         /*Write Plus*/
 871         hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
 872 }
 873
 874 /**
 875  * hns_dsaf_tcam_mc_invld - INT
 876  * @dsaf_id: dsa fabric id
 877  * @address
 878  */
 879 static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
 880 {
 881         /*Write Addr*/
 882         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 883
 884         /*write tcam mcast*/
 885         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
 886         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
 887         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
 888         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
 889         dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
 890
 891         /*Write Plus*/
 892         hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
 893 }
 894
 895 /**
 896  * hns_dsaf_tcam_uc_get - INT
 897  * @dsaf_id: dsa fabric id
 898  * @address
 899  * @ptbl_tcam_data
 900  * @ptbl_tcam_ucast
 901  */
 902 static void hns_dsaf_tcam_uc_get(
 903         struct dsaf_device *dsaf_dev, u32 address,
 904         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 905         struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
 906 {
 907         u32 tcam_read_data0;
 908         u32 tcam_read_data4;
 909
 910         /*Write Addr*/
 911         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 912
 913         /*read tcam item puls*/
 914         hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
 915
 916         /*read tcam data*/
 917         ptbl_tcam_data->tbl_tcam_data_high
 918                 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
 919         ptbl_tcam_data->tbl_tcam_data_low
 920                 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
 921
 922         /*read tcam mcast*/
 923         tcam_read_data0 = dsaf_read_dev(dsaf_dev,
 924                                         DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
 925         tcam_read_data4 = dsaf_read_dev(dsaf_dev,
 926                                         DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
 927
 928         ptbl_tcam_ucast->tbl_ucast_item_vld
 929                 = dsaf_get_bit(tcam_read_data4,
 930                                DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
 931         ptbl_tcam_ucast->tbl_ucast_old_en
 932                 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
 933         ptbl_tcam_ucast->tbl_ucast_mac_discard
 934                 = dsaf_get_bit(tcam_read_data0,
 935                                DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
 936         ptbl_tcam_ucast->tbl_ucast_out_port
 937                 = dsaf_get_field(tcam_read_data0,
 938                                  DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
 939                                  DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
 940         ptbl_tcam_ucast->tbl_ucast_dvc
 941                 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
 942 }
 943
 944 /**
 945  * hns_dsaf_tcam_mc_get - INT
 946  * @dsaf_id: dsa fabric id
 947  * @address
 948  * @ptbl_tcam_data
 949  * @ptbl_tcam_ucast
 950  */
 951 static void hns_dsaf_tcam_mc_get(
 952         struct dsaf_device *dsaf_dev, u32 address,
 953         struct dsaf_tbl_tcam_data *ptbl_tcam_data,
 954         struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
 955 {
 956         u32 data_tmp;
 957
 958         /*Write Addr*/
 959         hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
 960
 961         /*read tcam item puls*/
 962         hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
 963
 964         /*read tcam data*/
 965         ptbl_tcam_data->tbl_tcam_data_high =
 966                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
 967         ptbl_tcam_data->tbl_tcam_data_low =
 968                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
 969
 970         /*read tcam mcast*/
 971         ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
 972                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
 973         ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
 974                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
 975         ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
 976                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
 977         ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
 978                 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
 979
 980         data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
 981         ptbl_tcam_mcast->tbl_mcast_item_vld =
 982                 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
 983         ptbl_tcam_mcast->tbl_mcast_old_en =
 984                 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
 985         ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
 986                 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
 987                                DSAF_TBL_MCAST_CFG4_VM128_112_S);
 988 }
 989
 990 /**
 991  * hns_dsaf_tbl_line_init - INT
 992  * @dsaf_id: dsa fabric id
 993  */
 994 static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
 995 {
 996         u32 i;
 997         /* defaultly set all lineal mac table entry resulting discard */
 998         struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
 999
1000         for (i = 0; i < DSAF_LINE_SUM; i++)
1001                 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1002 }
1003
1004 /**
1005  * hns_dsaf_tbl_tcam_init - INT
1006  * @dsaf_id: dsa fabric id
1007  */
1008 static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1009 {
1010         u32 i;
1011         struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1012         struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1013
1014         /*tcam tbl*/
1015         for (i = 0; i < DSAF_TCAM_SUM; i++)
1016                 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1017 }
1018
1019 /**
1020  * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1021  * @mac_cb: mac contrl block
1022  */
1023 static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
1024                                 int mac_id, int tc_en)
1025 {
1026         dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1027 }
1028
1029 static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1030                                    int mac_id, int tx_en, int rx_en)
1031 {
1032         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1033                 if (!tx_en || !rx_en)
1034                         dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1035
1036                 return;
1037         }
1038
1039         dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1040                          DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1041         dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1042                          DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1043 }
1044
1045 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1046                                  u32 en)
1047 {
1048         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1049                 if (!en)
1050                         dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1051
1052                 return -EINVAL;
1053         }
1054
1055         dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1056                          DSAF_MAC_PAUSE_RX_EN_B, !!en);
1057
1058         return 0;
1059 }
1060
1061 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1062                                   u32 *en)
1063 {
1064         if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1065                 *en = 1;
1066         else
1067                 *en = dsaf_get_dev_bit(dsaf_dev,
1068                                        DSAF_PAUSE_CFG_REG + mac_id * 4,
1069                                        DSAF_MAC_PAUSE_RX_EN_B);
1070 }
1071
1072 /**
1073  * hns_dsaf_tbl_tcam_init - INT
1074  * @dsaf_id: dsa fabric id
1075  * @dsaf_mode
1076  */
1077 static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1078 {
1079         u32 i;
1080         u32 o_dsaf_cfg;
1081         bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
1082
1083         o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1084         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1085         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1086         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1087         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1088         dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1089         dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1090
1091         hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1092         hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1093
1094         /* set 22 queue per tx ppe engine, only used in switch mode */
1095         hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1096
1097         /* set promisc def queue id */
1098         hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1099
1100         /* set inner loopback queue id */
1101         hns_dsaf_inner_qid_cfg(dsaf_dev);
1102
1103         /* in non switch mode, set all port to access mode */
1104         hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1105
1106         /*set dsaf pfc  to 0 for parseing rx pause*/
1107         for (i = 0; i < DSAF_COMM_CHN; i++) {
1108                 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
1109                 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1110         }
1111
1112         /*msk and  clr exception irqs */
1113         for (i = 0; i < DSAF_COMM_CHN; i++) {
1114                 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1115                 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1116                 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1117
1118                 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1119                 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1120                 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1121         }
1122         hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1123         hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1124 }
1125
1126 /**
1127  * hns_dsaf_inode_init - INT
1128  * @dsaf_id: dsa fabric id
1129  */
1130 static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1131 {
1132         u32 reg;
1133         u32 tc_cfg;
1134         u32 i;
1135
1136         if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1137                 tc_cfg = HNS_DSAF_I4TC_CFG;
1138         else
1139                 tc_cfg = HNS_DSAF_I8TC_CFG;
1140
1141         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1142                 for (i = 0; i < DSAF_INODE_NUM; i++) {
1143                         reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1144                         dsaf_set_dev_field(dsaf_dev, reg,
1145                                            DSAF_INODE_IN_PORT_NUM_M,
1146                                            DSAF_INODE_IN_PORT_NUM_S,
1147                                            i % DSAF_XGE_NUM);
1148                 }
1149         } else {
1150                 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1151                         reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1152                         dsaf_set_dev_field(dsaf_dev, reg,
1153                                            DSAF_INODE_IN_PORT_NUM_M,
1154                                            DSAF_INODE_IN_PORT_NUM_S, 0);
1155                         dsaf_set_dev_field(dsaf_dev, reg,
1156                                            DSAFV2_INODE_IN_PORT1_NUM_M,
1157                                            DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1158                         dsaf_set_dev_field(dsaf_dev, reg,
1159                                            DSAFV2_INODE_IN_PORT2_NUM_M,
1160                                            DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1161                         dsaf_set_dev_field(dsaf_dev, reg,
1162                                            DSAFV2_INODE_IN_PORT3_NUM_M,
1163                                            DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1164                         dsaf_set_dev_field(dsaf_dev, reg,
1165                                            DSAFV2_INODE_IN_PORT4_NUM_M,
1166                                            DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1167                         dsaf_set_dev_field(dsaf_dev, reg,
1168                                            DSAFV2_INODE_IN_PORT5_NUM_M,
1169                                            DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1170                 }
1171         }
1172         for (i = 0; i < DSAF_INODE_NUM; i++) {
1173                 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1174                 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1175         }
1176 }
1177
1178 /**
1179  * hns_dsaf_sbm_init - INT
1180  * @dsaf_id: dsa fabric id
1181  */
1182 static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1183 {
1184         u32 flag;
1185         u32 finish_msk;
1186         u32 cnt = 0;
1187         int ret;
1188
1189         if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1190                 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1191                 finish_msk = DSAF_SRAM_INIT_OVER_M;
1192         } else {
1193                 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1194                 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1195         }
1196
1197         /* enable sbm chanel, disable sbm chanel shcut function*/
1198         hns_dsaf_sbm_cfg(dsaf_dev);
1199
1200         /* enable sbm mib */
1201         ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1202         if (ret) {
1203                 dev_err(dsaf_dev->dev,
1204                         "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1205                         dsaf_dev->ae_dev.name, ret);
1206                 return ret;
1207         }
1208
1209         /* enable sbm initial link sram */
1210         hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1211
1212         do {
1213                 usleep_range(200, 210);/*udelay(200);*/
1214                 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1215                                           finish_msk, DSAF_SRAM_INIT_OVER_S);
1216                 cnt++;
1217         } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1218                  cnt < DSAF_CFG_READ_CNT);
1219
1220         if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
1221                 dev_err(dsaf_dev->dev,
1222                         "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1223                         dsaf_dev->ae_dev.name, flag, cnt);
1224                 return -ENODEV;
1225         }
1226
1227         hns_dsaf_rocee_bp_en(dsaf_dev);
1228
1229         return 0;
1230 }
1231
1232 /**
1233  * hns_dsaf_tbl_init - INT
1234  * @dsaf_id: dsa fabric id
1235  */
1236 static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1237 {
1238         hns_dsaf_tbl_stat_en(dsaf_dev);
1239
1240         hns_dsaf_tbl_tcam_init(dsaf_dev);
1241         hns_dsaf_tbl_line_init(dsaf_dev);
1242 }
1243
1244 /**
1245  * hns_dsaf_voq_init - INT
1246  * @dsaf_id: dsa fabric id
1247  */
1248 static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1249 {
1250         hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1251 }
1252
1253 /**
1254  * hns_dsaf_init_hw - init dsa fabric hardware
1255  * @dsaf_dev: dsa fabric device struct pointer
1256  */
1257 static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1258 {
1259         int ret;
1260
1261         dev_dbg(dsaf_dev->dev,
1262                 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1263
1264         hns_dsaf_rst(dsaf_dev, 0);
1265         mdelay(10);
1266         hns_dsaf_rst(dsaf_dev, 1);
1267
1268         hns_dsaf_comm_init(dsaf_dev);
1269
1270         /*init XBAR_INODE*/
1271         hns_dsaf_inode_init(dsaf_dev);
1272
1273         /*init SBM*/
1274         ret = hns_dsaf_sbm_init(dsaf_dev);
1275         if (ret)
1276                 return ret;
1277
1278         /*init TBL*/
1279         hns_dsaf_tbl_init(dsaf_dev);
1280
1281         /*init VOQ*/
1282         hns_dsaf_voq_init(dsaf_dev);
1283
1284         return 0;
1285 }
1286
1287 /**
1288  * hns_dsaf_remove_hw - uninit dsa fabric hardware
1289  * @dsaf_dev: dsa fabric device struct pointer
1290  */
1291 static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1292 {
1293         /*reset*/
1294         hns_dsaf_rst(dsaf_dev, 0);
1295 }
1296
1297 /**
1298  * hns_dsaf_init - init dsa fabric
1299  * @dsaf_dev: dsa fabric device struct pointer
1300  * retuen 0 - success , negative --fail
1301  */
1302 static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1303 {
1304         struct dsaf_drv_priv *priv =
1305             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1306         u32 i;
1307         int ret;
1308
1309         if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1310                 return 0;
1311
1312         ret = hns_dsaf_init_hw(dsaf_dev);
1313         if (ret)
1314                 return ret;
1315
1316         /* malloc mem for tcam mac key(vlan+mac) */
1317         priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1318                   * DSAF_TCAM_SUM);
1319         if (!priv->soft_mac_tbl) {
1320                 ret = -ENOMEM;
1321                 goto remove_hw;
1322         }
1323
1324         /*all entry invall */
1325         for (i = 0; i < DSAF_TCAM_SUM; i++)
1326                 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1327
1328         return 0;
1329
1330 remove_hw:
1331         hns_dsaf_remove_hw(dsaf_dev);
1332         return ret;
1333 }
1334
1335 /**
1336  * hns_dsaf_free - free dsa fabric
1337  * @dsaf_dev: dsa fabric device struct pointer
1338  */
1339 static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1340 {
1341         struct dsaf_drv_priv *priv =
1342             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1343
1344         hns_dsaf_remove_hw(dsaf_dev);
1345
1346         /* free all mac mem */
1347         vfree(priv->soft_mac_tbl);
1348         priv->soft_mac_tbl = NULL;
1349 }
1350
1351 /**
1352  * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1353  * @dsaf_dev: dsa fabric device struct pointer
1354  * @mac_key: mac entry struct pointer
1355  */
1356 static u16 hns_dsaf_find_soft_mac_entry(
1357         struct dsaf_device *dsaf_dev,
1358         struct dsaf_drv_tbl_tcam_key *mac_key)
1359 {
1360         struct dsaf_drv_priv *priv =
1361             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1362         struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1363         u32 i;
1364
1365         soft_mac_entry = priv->soft_mac_tbl;
1366         for (i = 0; i < DSAF_TCAM_SUM; i++) {
1367                 /* invall tab entry */
1368                 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1369                     (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1370                     (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1371                         /* return find result --soft index */
1372                         return soft_mac_entry->index;
1373
1374                 soft_mac_entry++;
1375         }
1376         return DSAF_INVALID_ENTRY_IDX;
1377 }
1378
1379 /**
1380  * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1381  * @dsaf_dev: dsa fabric device struct pointer
1382  */
1383 static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1384 {
1385         struct dsaf_drv_priv *priv =
1386             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1387         struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1388         u32 i;
1389
1390         soft_mac_entry = priv->soft_mac_tbl;
1391         for (i = 0; i < DSAF_TCAM_SUM; i++) {
1392                 /* inv all entry */
1393                 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1394                         /* return find result --soft index */
1395                         return i;
1396
1397                 soft_mac_entry++;
1398         }
1399         return DSAF_INVALID_ENTRY_IDX;
1400 }
1401
1402 /**
1403  * hns_dsaf_set_mac_key - set mac key
1404  * @dsaf_dev: dsa fabric device struct pointer
1405  * @mac_key: tcam key pointer
1406  * @vlan_id: vlan id
1407  * @in_port_num: input port num
1408  * @addr: mac addr
1409  */
1410 static void hns_dsaf_set_mac_key(
1411         struct dsaf_device *dsaf_dev,
1412         struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1413         u8 *addr)
1414 {
1415         u8 port;
1416
1417         if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1418                 /*DSAF mode : in port id fixed 0*/
1419                 port = 0;
1420         else
1421                 /*non-dsaf mode*/
1422                 port = in_port_num;
1423
1424         mac_key->high.bits.mac_0 = addr[0];
1425         mac_key->high.bits.mac_1 = addr[1];
1426         mac_key->high.bits.mac_2 = addr[2];
1427         mac_key->high.bits.mac_3 = addr[3];
1428         mac_key->low.bits.mac_4 = addr[4];
1429         mac_key->low.bits.mac_5 = addr[5];
1430         mac_key->low.bits.vlan = vlan_id;
1431         mac_key->low.bits.port = port;
1432 }
1433
1434 /**
1435  * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1436  * @dsaf_dev: dsa fabric device struct pointer
1437  * @mac_entry: uc-mac entry
1438  */
1439 int hns_dsaf_set_mac_uc_entry(
1440         struct dsaf_device *dsaf_dev,
1441         struct dsaf_drv_mac_single_dest_entry *mac_entry)
1442 {
1443         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1444         struct dsaf_drv_tbl_tcam_key mac_key;
1445         struct dsaf_tbl_tcam_ucast_cfg mac_data;
1446         struct dsaf_drv_priv *priv =
1447             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1448         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1449
1450         /* mac addr check */
1451         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1452             MAC_IS_BROADCAST(mac_entry->addr) ||
1453             MAC_IS_MULTICAST(mac_entry->addr)) {
1454                 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1455                         dsaf_dev->ae_dev.name, mac_entry->addr);
1456                 return -EINVAL;
1457         }
1458
1459         /* config key */
1460         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1461                              mac_entry->in_port_num, mac_entry->addr);
1462
1463         /* entry ie exist? */
1464         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1465         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1466                 /*if has not inv entry,find a empty entry */
1467                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1468                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1469                         /* has not empty,return error */
1470                         dev_err(dsaf_dev->dev,
1471                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1472                                 dsaf_dev->ae_dev.name,
1473                                 mac_key.high.val, mac_key.low.val);
1474                         return -EINVAL;
1475                 }
1476         }
1477
1478         dev_dbg(dsaf_dev->dev,
1479                 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1480                 dsaf_dev->ae_dev.name, mac_key.high.val,
1481                 mac_key.low.val, entry_index);
1482
1483         /* config hardware entry */
1484         mac_data.tbl_ucast_item_vld = 1;
1485         mac_data.tbl_ucast_mac_discard = 0;
1486         mac_data.tbl_ucast_old_en = 0;
1487         /* default config dvc to 0 */
1488         mac_data.tbl_ucast_dvc = 0;
1489         mac_data.tbl_ucast_out_port = mac_entry->port_num;
1490         hns_dsaf_tcam_uc_cfg(
1491                 dsaf_dev, entry_index,
1492                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1493
1494         /* config software entry */
1495         soft_mac_entry += entry_index;
1496         soft_mac_entry->index = entry_index;
1497         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1498         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1499
1500         return 0;
1501 }
1502
1503 /**
1504  * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1505  * @dsaf_dev: dsa fabric device struct pointer
1506  * @mac_entry: mc-mac entry
1507  */
1508 int hns_dsaf_set_mac_mc_entry(
1509         struct dsaf_device *dsaf_dev,
1510         struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1511 {
1512         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1513         struct dsaf_drv_tbl_tcam_key mac_key;
1514         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1515         struct dsaf_drv_priv *priv =
1516             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1517         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1518         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1519
1520         /* mac addr check */
1521         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1522                 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1523                         dsaf_dev->ae_dev.name, mac_entry->addr);
1524                 return -EINVAL;
1525         }
1526
1527         /*config key */
1528         hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1529                              mac_entry->in_vlan_id,
1530                              mac_entry->in_port_num, mac_entry->addr);
1531
1532         /* entry ie exist? */
1533         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1534         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1535                 /*if hasnot, find enpty entry*/
1536                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1537                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1538                         /*if hasnot empty, error*/
1539                         dev_err(dsaf_dev->dev,
1540                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1541                                 dsaf_dev->ae_dev.name,
1542                                 mac_key.high.val, mac_key.low.val);
1543                         return -EINVAL;
1544                 }
1545
1546                 /* config hardware entry */
1547                 memset(mac_data.tbl_mcast_port_msk,
1548                        0, sizeof(mac_data.tbl_mcast_port_msk));
1549         } else {
1550                 /* config hardware entry */
1551                 hns_dsaf_tcam_mc_get(
1552                         dsaf_dev, entry_index,
1553                         (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1554         }
1555         mac_data.tbl_mcast_old_en = 0;
1556         mac_data.tbl_mcast_item_vld = 1;
1557         dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1558                        0x3F, 0, mac_entry->port_mask[0]);
1559
1560         dev_dbg(dsaf_dev->dev,
1561                 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1562                 dsaf_dev->ae_dev.name, mac_key.high.val,
1563                 mac_key.low.val, entry_index);
1564
1565         hns_dsaf_tcam_mc_cfg(
1566                 dsaf_dev, entry_index,
1567                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1568
1569         /* config software entry */
1570         soft_mac_entry += entry_index;
1571         soft_mac_entry->index = entry_index;
1572         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1573         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1574
1575         return 0;
1576 }
1577
1578 /**
1579  * hns_dsaf_add_mac_mc_port - add mac mc-port
1580  * @dsaf_dev: dsa fabric device struct pointer
1581  * @mac_entry: mc-mac entry
1582  */
1583 int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1584                              struct dsaf_drv_mac_single_dest_entry *mac_entry)
1585 {
1586         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1587         struct dsaf_drv_tbl_tcam_key mac_key;
1588         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1589         struct dsaf_drv_priv *priv =
1590             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1591         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1592         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1593         int mskid;
1594
1595         /*chechk mac addr */
1596         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1597                 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1598                         mac_entry->addr);
1599                 return -EINVAL;
1600         }
1601
1602         /*config key */
1603         hns_dsaf_set_mac_key(
1604                 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1605                 mac_entry->in_port_num, mac_entry->addr);
1606
1607         memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1608
1609         /*check exist? */
1610         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1611         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1612                 /*if hasnot , find a empty*/
1613                 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1614                 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1615                         /*if hasnot empty, error*/
1616                         dev_err(dsaf_dev->dev,
1617                                 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1618                                 dsaf_dev->ae_dev.name, mac_key.high.val,
1619                                 mac_key.low.val);
1620                         return -EINVAL;
1621                 }
1622         } else {
1623                 /*if exist, add in */
1624                 hns_dsaf_tcam_mc_get(
1625                         dsaf_dev, entry_index,
1626                         (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1627         }
1628         /* config hardware entry */
1629         if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1630                 mskid = mac_entry->port_num;
1631         } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1632                 mskid = mac_entry->port_num -
1633                         DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1634         } else {
1635                 dev_err(dsaf_dev->dev,
1636                         "%s,pnum(%d)error,key(%#x:%#x)\n",
1637                         dsaf_dev->ae_dev.name, mac_entry->port_num,
1638                         mac_key.high.val, mac_key.low.val);
1639                 return -EINVAL;
1640         }
1641         dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1642         mac_data.tbl_mcast_old_en = 0;
1643         mac_data.tbl_mcast_item_vld = 1;
1644
1645         dev_dbg(dsaf_dev->dev,
1646                 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1647                 dsaf_dev->ae_dev.name, mac_key.high.val,
1648                 mac_key.low.val, entry_index);
1649
1650         hns_dsaf_tcam_mc_cfg(
1651                 dsaf_dev, entry_index,
1652                 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1653
1654         /*config software entry */
1655         soft_mac_entry += entry_index;
1656         soft_mac_entry->index = entry_index;
1657         soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1658         soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1659
1660         return 0;
1661 }
1662
1663 /**
1664  * hns_dsaf_del_mac_entry - del mac mc-port
1665  * @dsaf_dev: dsa fabric device struct pointer
1666  * @vlan_id: vlian id
1667  * @in_port_num: input port num
1668  * @addr : mac addr
1669  */
1670 int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1671                            u8 in_port_num, u8 *addr)
1672 {
1673         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1674         struct dsaf_drv_tbl_tcam_key mac_key;
1675         struct dsaf_drv_priv *priv =
1676             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1677         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1678
1679         /*check mac addr */
1680         if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
1681                 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1682                         addr);
1683                 return -EINVAL;
1684         }
1685
1686         /*config key */
1687         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1688
1689         /*exist ?*/
1690         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1691         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1692                 /*not exist, error */
1693                 dev_err(dsaf_dev->dev,
1694                         "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1695                         dsaf_dev->ae_dev.name,
1696                         mac_key.high.val, mac_key.low.val);
1697                 return -EINVAL;
1698         }
1699         dev_dbg(dsaf_dev->dev,
1700                 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1701                 dsaf_dev->ae_dev.name, mac_key.high.val,
1702                 mac_key.low.val, entry_index);
1703
1704         /*do del opt*/
1705         hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1706
1707         /*del soft emtry */
1708         soft_mac_entry += entry_index;
1709         soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1710
1711         return 0;
1712 }
1713
1714 /**
1715  * hns_dsaf_del_mac_mc_port - del mac mc- port
1716  * @dsaf_dev: dsa fabric device struct pointer
1717  * @mac_entry: mac entry
1718  */
1719 int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1720                              struct dsaf_drv_mac_single_dest_entry *mac_entry)
1721 {
1722         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1723         struct dsaf_drv_tbl_tcam_key mac_key;
1724         struct dsaf_drv_priv *priv =
1725             (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1726         struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1727         u16 vlan_id;
1728         u8 in_port_num;
1729         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1730         struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1731         int mskid;
1732         const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1733
1734         if (!(void *)mac_entry) {
1735                 dev_err(dsaf_dev->dev,
1736                         "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1737                 return -EINVAL;
1738         }
1739
1740         /*get key info*/
1741         vlan_id = mac_entry->in_vlan_id;
1742         in_port_num = mac_entry->in_port_num;
1743
1744         /*check mac addr */
1745         if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
1746                 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1747                         mac_entry->addr);
1748                 return -EINVAL;
1749         }
1750
1751         /*config key */
1752         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1753                              mac_entry->addr);
1754
1755         /*check is exist? */
1756         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1757         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1758                 /*find none */
1759                 dev_err(dsaf_dev->dev,
1760                         "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1761                         dsaf_dev->ae_dev.name,
1762                         mac_key.high.val, mac_key.low.val);
1763                 return -EINVAL;
1764         }
1765
1766         dev_dbg(dsaf_dev->dev,
1767                 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1768                 dsaf_dev->ae_dev.name, mac_key.high.val,
1769                 mac_key.low.val, entry_index);
1770
1771         /*read entry*/
1772         hns_dsaf_tcam_mc_get(
1773                 dsaf_dev, entry_index,
1774                 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1775
1776         /*del the port*/
1777         if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1778                 mskid = mac_entry->port_num;
1779         } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1780                 mskid = mac_entry->port_num -
1781                         DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1782         } else {
1783                 dev_err(dsaf_dev->dev,
1784                         "%s,pnum(%d)error,key(%#x:%#x)\n",
1785                         dsaf_dev->ae_dev.name, mac_entry->port_num,
1786                         mac_key.high.val, mac_key.low.val);
1787                 return -EINVAL;
1788         }
1789         dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1790
1791         /*check non port, do del entry */
1792         if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1793                     sizeof(mac_data.tbl_mcast_port_msk))) {
1794                 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1795
1796                 /* del soft entry */
1797                 soft_mac_entry += entry_index;
1798                 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1799         } else { /* not zer, just del port, updata*/
1800                 hns_dsaf_tcam_mc_cfg(
1801                         dsaf_dev, entry_index,
1802                         (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1803         }
1804
1805         return 0;
1806 }
1807
1808 /**
1809  * hns_dsaf_get_mac_uc_entry - get mac uc entry
1810  * @dsaf_dev: dsa fabric device struct pointer
1811  * @mac_entry: mac entry
1812  */
1813 int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1814                               struct dsaf_drv_mac_single_dest_entry *mac_entry)
1815 {
1816         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1817         struct dsaf_drv_tbl_tcam_key mac_key;
1818
1819         struct dsaf_tbl_tcam_ucast_cfg mac_data;
1820
1821         /* check macaddr */
1822         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1823             MAC_IS_BROADCAST(mac_entry->addr)) {
1824                 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1825                         mac_entry->addr);
1826                 return -EINVAL;
1827         }
1828
1829         /*config key */
1830         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1831                              mac_entry->in_port_num, mac_entry->addr);
1832
1833         /*check exist? */
1834         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1835         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1836                 /*find none, error */
1837                 dev_err(dsaf_dev->dev,
1838                         "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1839                         dsaf_dev->ae_dev.name,
1840                         mac_key.high.val, mac_key.low.val);
1841                 return -EINVAL;
1842         }
1843         dev_dbg(dsaf_dev->dev,
1844                 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1845                 dsaf_dev->ae_dev.name, mac_key.high.val,
1846                 mac_key.low.val, entry_index);
1847
1848         /*read entry*/
1849         hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1850                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1851         mac_entry->port_num = mac_data.tbl_ucast_out_port;
1852
1853         return 0;
1854 }
1855
1856 /**
1857  * hns_dsaf_get_mac_mc_entry - get mac mc entry
1858  * @dsaf_dev: dsa fabric device struct pointer
1859  * @mac_entry: mac entry
1860  */
1861 int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1862                               struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1863 {
1864         u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1865         struct dsaf_drv_tbl_tcam_key mac_key;
1866
1867         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1868
1869         /*check mac addr */
1870         if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1871             MAC_IS_BROADCAST(mac_entry->addr)) {
1872                 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1873                         mac_entry->addr);
1874                 return -EINVAL;
1875         }
1876
1877         /*config key */
1878         hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1879                              mac_entry->in_port_num, mac_entry->addr);
1880
1881         /*check exist? */
1882         entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1883         if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1884                 /* find none, error */
1885                 dev_err(dsaf_dev->dev,
1886                         "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1887                         dsaf_dev->ae_dev.name, mac_key.high.val,
1888                         mac_key.low.val);
1889                 return -EINVAL;
1890         }
1891         dev_dbg(dsaf_dev->dev,
1892                 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1893                 dsaf_dev->ae_dev.name, mac_key.high.val,
1894                 mac_key.low.val, entry_index);
1895
1896         /*read entry */
1897         hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1898                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1899
1900         mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1901         return 0;
1902 }
1903
1904 /**
1905  * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1906  * @dsaf_dev: dsa fabric device struct pointer
1907  * @entry_index: tab entry index
1908  * @mac_entry: mac entry
1909  */
1910 int hns_dsaf_get_mac_entry_by_index(
1911         struct dsaf_device *dsaf_dev,
1912         u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1913 {
1914         struct dsaf_drv_tbl_tcam_key mac_key;
1915
1916         struct dsaf_tbl_tcam_mcast_cfg mac_data;
1917         struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1918         char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1919
1920         if (entry_index >= DSAF_TCAM_SUM) {
1921                 /* find none, del error */
1922                 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1923                         dsaf_dev->ae_dev.name);
1924                 return -EINVAL;
1925         }
1926
1927         /* mc entry, do read opt */
1928         hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1929                              (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1930
1931         mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1932
1933         /***get mac addr*/
1934         mac_addr[0] = mac_key.high.bits.mac_0;
1935         mac_addr[1] = mac_key.high.bits.mac_1;
1936         mac_addr[2] = mac_key.high.bits.mac_2;
1937         mac_addr[3] = mac_key.high.bits.mac_3;
1938         mac_addr[4] = mac_key.low.bits.mac_4;
1939         mac_addr[5] = mac_key.low.bits.mac_5;
1940         /**is mc or uc*/
1941         if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1942             MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1943                 /**mc donot do*/
1944         } else {
1945                 /*is not mc, just uc... */
1946                 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1947                                      (struct dsaf_tbl_tcam_data *)&mac_key,
1948                                      &mac_uc_data);
1949                 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1950         }
1951
1952         return 0;
1953 }
1954
1955 static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1956                                               size_t sizeof_priv)
1957 {
1958         struct dsaf_device *dsaf_dev;
1959
1960         dsaf_dev = devm_kzalloc(dev,
1961                                 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1962         if (unlikely(!dsaf_dev)) {
1963                 dsaf_dev = ERR_PTR(-ENOMEM);
1964         } else {
1965                 dsaf_dev->dev = dev;
1966                 dev_set_drvdata(dev, dsaf_dev);
1967         }
1968
1969         return dsaf_dev;
1970 }
1971
1972 /**
1973  * hns_dsaf_free_dev - free dev mem
1974  * @dev: struct device pointer
1975  */
1976 static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
1977 {
1978         (void)dev_set_drvdata(dsaf_dev->dev, NULL);
1979 }
1980
1981 /**
1982  * dsaf_pfc_unit_cnt - set pfc unit count
1983  * @dsaf_id: dsa fabric id
1984  * @pport_rate:  value array
1985  * @pdsaf_pfc_unit_cnt:  value array
1986  */
1987 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int  mac_id,
1988                                   enum dsaf_port_rate_mode rate)
1989 {
1990         u32 unit_cnt;
1991
1992         switch (rate) {
1993         case DSAF_PORT_RATE_10000:
1994                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1995                 break;
1996         case DSAF_PORT_RATE_1000:
1997                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1998                 break;
1999         case DSAF_PORT_RATE_2500:
2000                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2001                 break;
2002         default:
2003                 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2004         }
2005
2006         dsaf_set_dev_field(dsaf_dev,
2007                            (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2008                            DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2009                            unit_cnt);
2010 }
2011
2012 /**
2013  * dsaf_port_work_rate_cfg - fifo
2014  * @dsaf_id: dsa fabric id
2015  * @xge_ge_work_mode
2016  */
2017 void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2018                                  enum dsaf_port_rate_mode rate_mode)
2019 {
2020         u32 port_work_mode;
2021
2022         port_work_mode = dsaf_read_dev(
2023                 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2024
2025         if (rate_mode == DSAF_PORT_RATE_10000)
2026                 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2027         else
2028                 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2029
2030         dsaf_write_dev(dsaf_dev,
2031                        DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2032                        port_work_mode);
2033
2034         hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2035 }
2036
2037 /**
2038  * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2039  * @mac_cb: mac contrl block
2040  */
2041 void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2042 {
2043         enum dsaf_port_rate_mode mode;
2044         struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2045         int mac_id = mac_cb->mac_id;
2046
2047         if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2048                 return;
2049         if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2050                 mode = DSAF_PORT_RATE_10000;
2051         else
2052                 mode = DSAF_PORT_RATE_1000;
2053
2054         hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2055 }
2056
2057 void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2058 {
2059         struct dsaf_hw_stats *hw_stats
2060                 = &dsaf_dev->hw_stats[node_num];
2061         bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2062         u32 reg_tmp;
2063
2064         hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2065                 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2066         hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2067                 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2068         hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2069                 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2070         hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2071                 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
2072
2073         reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2074                             DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2075         hw_stats->rx_pause_frame +=
2076                 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2077
2078         hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2079                 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2080         hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2081                 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2082         hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2083                 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2084         hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2085                 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2086         hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2087                 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2088         hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2089                 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2090
2091         hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2092                 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2093         hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2094                 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2095
2096         hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2097                 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2098 }
2099
2100 /**
2101  *hns_dsaf_get_regs - dump dsaf regs
2102  *@dsaf_dev: dsaf device
2103  *@data:data for value of regs
2104  */
2105 void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2106 {
2107         u32 i = 0;
2108         u32 j;
2109         u32 *p = data;
2110         u32 reg_tmp;
2111         bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
2112
2113         /* dsaf common registers */
2114         p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2115         p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2116         p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2117         p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2118         p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2119         p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2120         p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2121         p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2122         p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2123
2124         p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2125         p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2126         p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2127         p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2128         p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2129         p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2130         p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2131         p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2132         p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2133         p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2134         p[19] =  dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2135         p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2136         p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2137         p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2138         p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2139
2140         for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2141                 p[24 + i] = dsaf_read_dev(ddev,
2142                                 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2143
2144         p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2145
2146         for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2147                 p[33 + i] = dsaf_read_dev(ddev,
2148                                 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2149
2150         for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2151                 p[41 + i] = dsaf_read_dev(ddev,
2152                                 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2153
2154         /* dsaf inode registers */
2155         p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2156
2157         p[171] = dsaf_read_dev(ddev,
2158                         DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2159
2160         for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2161                 j = i * DSAF_COMM_CHN + port;
2162                 p[172 + i] = dsaf_read_dev(ddev,
2163                                 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2164                 p[175 + i] = dsaf_read_dev(ddev,
2165                                 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2166                 p[178 + i] = dsaf_read_dev(ddev,
2167                                 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2168                 p[181 + i] = dsaf_read_dev(ddev,
2169                                 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2170                 p[184 + i] = dsaf_read_dev(ddev,
2171                                 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2172                 p[187 + i] = dsaf_read_dev(ddev,
2173                                 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2174                 p[190 + i] = dsaf_read_dev(ddev,
2175                                 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
2176                 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2177                                     DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2178                 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
2179                 p[196 + i] = dsaf_read_dev(ddev,
2180                                 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2181                 p[199 + i] = dsaf_read_dev(ddev,
2182                                 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2183                 p[202 + i] = dsaf_read_dev(ddev,
2184                                 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2185                 p[205 + i] = dsaf_read_dev(ddev,
2186                                 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2187                 p[208 + i] = dsaf_read_dev(ddev,
2188                                 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2189                 p[211 + i] = dsaf_read_dev(ddev,
2190                         DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2191                 p[214 + i] = dsaf_read_dev(ddev,
2192                                 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2193                 p[217 + i] = dsaf_read_dev(ddev,
2194                                 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2195                 p[220 + i] = dsaf_read_dev(ddev,
2196                                 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2197                 p[223 + i] = dsaf_read_dev(ddev,
2198                                 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2199                 p[224 + i] = dsaf_read_dev(ddev,
2200                                 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2201         }
2202
2203         p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2204
2205         for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2206                 j = i * DSAF_COMM_CHN + port;
2207                 p[228 + i] = dsaf_read_dev(ddev,
2208                                 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2209         }
2210
2211         p[231] = dsaf_read_dev(ddev,
2212                 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2213
2214         /* dsaf inode registers */
2215         for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
2216                 j = i * DSAF_COMM_CHN + port;
2217                 p[232 + i] = dsaf_read_dev(ddev,
2218                                 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2219                 p[235 + i] = dsaf_read_dev(ddev,
2220                                 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2221                 p[238 + i] = dsaf_read_dev(ddev,
2222                                 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2223                 p[241 + i] = dsaf_read_dev(ddev,
2224                                 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2225                 p[244 + i] = dsaf_read_dev(ddev,
2226                                 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2227                 p[245 + i] = dsaf_read_dev(ddev,
2228                                 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2229                 p[248 + i] = dsaf_read_dev(ddev,
2230                                 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2231                 p[251 + i] = dsaf_read_dev(ddev,
2232                                 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2233                 p[254 + i] = dsaf_read_dev(ddev,
2234                                 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2235                 p[257 + i] = dsaf_read_dev(ddev,
2236                                 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2237                 p[260 + i] = dsaf_read_dev(ddev,
2238                                 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2239                 p[263 + i] = dsaf_read_dev(ddev,
2240                                 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2241                 p[266 + i] = dsaf_read_dev(ddev,
2242                                 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2243                 p[269 + i] = dsaf_read_dev(ddev,
2244                                 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2245                 p[272 + i] = dsaf_read_dev(ddev,
2246                                 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2247                 p[275 + i] = dsaf_read_dev(ddev,
2248                                 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2249                 p[278 + i] = dsaf_read_dev(ddev,
2250                                 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2251                 p[281 + i] = dsaf_read_dev(ddev,
2252                                 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2253                 p[284 + i] = dsaf_read_dev(ddev,
2254                                 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2255                 p[287 + i] = dsaf_read_dev(ddev,
2256                                 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2257                 p[290 + i] = dsaf_read_dev(ddev,
2258                                 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2259                 p[293 + i] = dsaf_read_dev(ddev,
2260                                 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2261                 p[296 + i] = dsaf_read_dev(ddev,
2262                                 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2263                 p[299 + i] = dsaf_read_dev(ddev,
2264                                 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2265                 p[302 + i] = dsaf_read_dev(ddev,
2266                                 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2267                 p[305 + i] = dsaf_read_dev(ddev,
2268                                 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2269                 p[308 + i] = dsaf_read_dev(ddev,
2270                                 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2271         }
2272
2273         /* dsaf onode registers */
2274         for (i = 0; i < DSAF_XOD_NUM; i++) {
2275                 p[311 + i] = dsaf_read_dev(ddev,
2276                                 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
2277                 p[319 + i] = dsaf_read_dev(ddev,
2278                                 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
2279                 p[327 + i] = dsaf_read_dev(ddev,
2280                                 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
2281                 p[335 + i] = dsaf_read_dev(ddev,
2282                                 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
2283                 p[343 + i] = dsaf_read_dev(ddev,
2284                                 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
2285                 p[351 + i] = dsaf_read_dev(ddev,
2286                                 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
2287         }
2288
2289         p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2290         p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2291         p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2292
2293         for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2294                 j = i * DSAF_COMM_CHN + port;
2295                 p[362 + i] = dsaf_read_dev(ddev,
2296                                 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2297                 p[365 + i] = dsaf_read_dev(ddev,
2298                                 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2299                 p[368 + i] = dsaf_read_dev(ddev,
2300                                 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2301                 p[371 + i] = dsaf_read_dev(ddev,
2302                                 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2303                 p[374 + i] = dsaf_read_dev(ddev,
2304                                 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2305                 p[377 + i] = dsaf_read_dev(ddev,
2306                                 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2307                 p[380 + i] = dsaf_read_dev(ddev,
2308                                 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2309                 p[383 + i] = dsaf_read_dev(ddev,
2310                                 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2311                 p[386 + i] = dsaf_read_dev(ddev,
2312                                 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2313                 p[389 + i] = dsaf_read_dev(ddev,
2314                                 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2315         }
2316
2317         p[392] = dsaf_read_dev(ddev,
2318                 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2319         p[393] = dsaf_read_dev(ddev,
2320                 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2321         p[394] = dsaf_read_dev(ddev,
2322                 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2323         p[395] = dsaf_read_dev(ddev,
2324                 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2325         p[396] = dsaf_read_dev(ddev,
2326                 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2327         p[397] = dsaf_read_dev(ddev,
2328                 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2329         p[398] = dsaf_read_dev(ddev,
2330                 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2331         p[399] = dsaf_read_dev(ddev,
2332                 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2333         p[400] = dsaf_read_dev(ddev,
2334                 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2335         p[401] = dsaf_read_dev(ddev,
2336                 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2337         p[402] = dsaf_read_dev(ddev,
2338                 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2339         p[403] = dsaf_read_dev(ddev,
2340                 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2341         p[404] = dsaf_read_dev(ddev,
2342                 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2343
2344         /* dsaf voq registers */
2345         for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2346                 j = (i * DSAF_COMM_CHN + port) * 0x90;
2347                 p[405 + i] = dsaf_read_dev(ddev,
2348                         DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2349                 p[408 + i] = dsaf_read_dev(ddev,
2350                         DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2351                 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2352                 p[414 + i] = dsaf_read_dev(ddev,
2353                         DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2354                 p[417 + i] = dsaf_read_dev(ddev,
2355                         DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2356                 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2357                 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2358                 p[426 + i] = dsaf_read_dev(ddev,
2359                         DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2360                 p[429 + i] = dsaf_read_dev(ddev,
2361                         DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2362                 p[432 + i] = dsaf_read_dev(ddev,
2363                         DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2364                 p[435 + i] = dsaf_read_dev(ddev,
2365                         DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2366                 p[438 + i] = dsaf_read_dev(ddev,
2367                         DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2368         }
2369
2370         /* dsaf tbl registers */
2371         p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2372         p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2373         p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2374         p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2375         p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2376         p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2377         p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2378         p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2379         p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2380         p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2381         p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2382         p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2383         p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2384         p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2385         p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2386         p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2387         p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2388         p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2389         p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2390         p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2391         p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2392         p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2393         p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2394
2395         for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2396                 j = i * 0x8;
2397                 p[464 + 2 * i] = dsaf_read_dev(ddev,
2398                         DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2399                 p[465 + 2 * i] = dsaf_read_dev(ddev,
2400                         DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2401         }
2402
2403         p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2404         p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2405         p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2406         p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2407         p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2408         p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2409         p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2410         p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2411         p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2412         p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2413         p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2414         p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2415
2416         /* dsaf other registers */
2417         p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2418         p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2419         p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2420         p[495] = dsaf_read_dev(ddev,
2421                 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2422         p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2423         p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2424
2425         if (!is_ver1)
2426                 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2427
2428         /* mark end of dsaf regs */
2429         for (i = 499; i < 504; i++)
2430                 p[i] = 0xdddddddd;
2431 }
2432
2433 static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2434 {
2435         char *buff = data;
2436
2437         snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2438         buff = buff + ETH_GSTRING_LEN;
2439         snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2440         buff = buff + ETH_GSTRING_LEN;
2441         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2442         buff = buff + ETH_GSTRING_LEN;
2443         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2444         buff = buff + ETH_GSTRING_LEN;
2445         snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2446         buff = buff + ETH_GSTRING_LEN;
2447         snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2448         buff = buff + ETH_GSTRING_LEN;
2449         snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2450         buff = buff + ETH_GSTRING_LEN;
2451         snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2452         buff = buff + ETH_GSTRING_LEN;
2453         snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2454         buff = buff + ETH_GSTRING_LEN;
2455         snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2456         buff = buff + ETH_GSTRING_LEN;
2457         snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2458         buff = buff + ETH_GSTRING_LEN;
2459         snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2460         buff = buff + ETH_GSTRING_LEN;
2461         snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2462         buff = buff + ETH_GSTRING_LEN;
2463         snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2464         buff = buff + ETH_GSTRING_LEN;
2465
2466         return buff;
2467 }
2468
2469 static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2470                                     int node_num)
2471 {
2472         u64 *p = data;
2473         struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2474
2475         p[0] = hw_stats->pad_drop;
2476         p[1] = hw_stats->man_pkts;
2477         p[2] = hw_stats->rx_pkts;
2478         p[3] = hw_stats->rx_pkt_id;
2479         p[4] = hw_stats->rx_pause_frame;
2480         p[5] = hw_stats->release_buf_num;
2481         p[6] = hw_stats->sbm_drop;
2482         p[7] = hw_stats->crc_false;
2483         p[8] = hw_stats->bp_drop;
2484         p[9] = hw_stats->rslt_drop;
2485         p[10] = hw_stats->local_addr_false;
2486         p[11] = hw_stats->vlan_drop;
2487         p[12] = hw_stats->stp_drop;
2488         p[13] = hw_stats->tx_pkts;
2489
2490         return &p[14];
2491 }
2492
2493 /**
2494  *hns_dsaf_get_stats - get dsaf statistic
2495  *@ddev: dsaf device
2496  *@data:statistic value
2497  *@port: port num
2498  */
2499 void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2500 {
2501         u64 *p = data;
2502         int node_num = port;
2503
2504         /* for ge/xge node info */
2505         p = hns_dsaf_get_node_stats(ddev, p, node_num);
2506
2507         /* for ppe node info */
2508         node_num = port + DSAF_PPE_INODE_BASE;
2509         (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2510 }
2511
2512 /**
2513  *hns_dsaf_get_sset_count - get dsaf string set count
2514  *@stringset: type of values in data
2515  *return dsaf string name count
2516  */
2517 int hns_dsaf_get_sset_count(int stringset)
2518 {
2519         if (stringset == ETH_SS_STATS)
2520                 return DSAF_STATIC_NUM;
2521
2522         return 0;
2523 }
2524
2525 /**
2526  *hns_dsaf_get_strings - get dsaf string set
2527  *@stringset:srting set index
2528  *@data:strings name value
2529  *@port:port index
2530  */
2531 void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2532 {
2533         char *buff = (char *)data;
2534         int node = port;
2535
2536         if (stringset != ETH_SS_STATS)
2537                 return;
2538
2539         /* for ge/xge node info */
2540         buff = hns_dsaf_get_node_stats_strings(buff, node);
2541
2542         /* for ppe node info */
2543         node = port + DSAF_PPE_INODE_BASE;
2544         (void)hns_dsaf_get_node_stats_strings(buff, node);
2545 }
2546
2547 /**
2548  *hns_dsaf_get_sset_count - get dsaf regs count
2549  *return dsaf regs count
2550  */
2551 int hns_dsaf_get_regs_count(void)
2552 {
2553         return DSAF_DUMP_REGS_NUM;
2554 }
2555
2556 /**
2557  * dsaf_probe - probo dsaf dev
2558  * @pdev: dasf platform device
2559  * retuen 0 - success , negative --fail
2560  */
2561 static int hns_dsaf_probe(struct platform_device *pdev)
2562 {
2563         struct dsaf_device *dsaf_dev;
2564         int ret;
2565
2566         dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2567         if (IS_ERR(dsaf_dev)) {
2568                 ret = PTR_ERR(dsaf_dev);
2569                 dev_err(&pdev->dev,
2570                         "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2571                 return ret;
2572         }
2573
2574         ret = hns_dsaf_get_cfg(dsaf_dev);
2575         if (ret)
2576                 goto free_dev;
2577
2578         ret = hns_dsaf_init(dsaf_dev);
2579         if (ret)
2580                 goto free_cfg;
2581
2582         ret = hns_mac_init(dsaf_dev);
2583         if (ret)
2584                 goto uninit_dsaf;
2585
2586         ret = hns_ppe_init(dsaf_dev);
2587         if (ret)
2588                 goto uninit_mac;
2589
2590         ret = hns_dsaf_ae_init(dsaf_dev);
2591         if (ret)
2592                 goto uninit_ppe;
2593
2594         return 0;
2595
2596 uninit_ppe:
2597         hns_ppe_uninit(dsaf_dev);
2598
2599 uninit_mac:
2600         hns_mac_uninit(dsaf_dev);
2601
2602 uninit_dsaf:
2603         hns_dsaf_free(dsaf_dev);
2604
2605 free_cfg:
2606         hns_dsaf_free_cfg(dsaf_dev);
2607
2608 free_dev:
2609         hns_dsaf_free_dev(dsaf_dev);
2610
2611         return ret;
2612 }
2613
2614 /**
2615  * dsaf_remove - remove dsaf dev
2616  * @pdev: dasf platform device
2617  */
2618 static int hns_dsaf_remove(struct platform_device *pdev)
2619 {
2620         struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2621
2622         hns_dsaf_ae_uninit(dsaf_dev);
2623
2624         hns_ppe_uninit(dsaf_dev);
2625
2626         hns_mac_uninit(dsaf_dev);
2627
2628         hns_dsaf_free(dsaf_dev);
2629
2630         hns_dsaf_free_cfg(dsaf_dev);
2631
2632         hns_dsaf_free_dev(dsaf_dev);
2633
2634         return 0;
2635 }
2636
2637 static const struct of_device_id g_dsaf_match[] = {
2638         {.compatible = "hisilicon,hns-dsaf-v1"},
2639         {.compatible = "hisilicon,hns-dsaf-v2"},
2640         {}
2641 };
2642
2643 static struct platform_driver g_dsaf_driver = {
2644         .probe = hns_dsaf_probe,
2645         .remove = hns_dsaf_remove,
2646         .driver = {
2647                 .name = DSAF_DRV_NAME,
2648                 .of_match_table = g_dsaf_match,
2649         },
2650 };
2651
2652 module_platform_driver(g_dsaf_driver);
2653
2654 MODULE_LICENSE("GPL");
2655 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2656 MODULE_DESCRIPTION("HNS DSAF driver");
2657 MODULE_VERSION(DSAF_MOD_VERSION);