1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
4 #include <linux/mdio.h>
5 #include <linux/module.h>
6 #include <linux/fsl/enetc_mdio.h>
7 #include <linux/of_mdio.h>
8 #include <linux/of_net.h>
11 #define ENETC_DRV_NAME_STR "ENETC PF driver"
13 static void enetc_pf_get_primary_mac_addr(struct enetc_hw *hw, int si, u8 *addr)
15 u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si));
16 u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si));
19 *(u16 *)(addr + 4) = lower;
22 static void enetc_pf_set_primary_mac_addr(struct enetc_hw *hw, int si,
25 u32 upper = *(const u32 *)addr;
26 u16 lower = *(const u16 *)(addr + 4);
28 __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si));
29 __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si));
32 static int enetc_pf_set_mac_addr(struct net_device *ndev, void *addr)
34 struct enetc_ndev_priv *priv = netdev_priv(ndev);
35 struct sockaddr *saddr = addr;
37 if (!is_valid_ether_addr(saddr->sa_data))
38 return -EADDRNOTAVAIL;
40 memcpy(ndev->dev_addr, saddr->sa_data, ndev->addr_len);
41 enetc_pf_set_primary_mac_addr(&priv->si->hw, 0, saddr->sa_data);
46 static void enetc_set_vlan_promisc(struct enetc_hw *hw, char si_map)
48 u32 val = enetc_port_rd(hw, ENETC_PSIPVMR);
50 val &= ~ENETC_PSIPVMR_SET_VP(ENETC_VLAN_PROMISC_MAP_ALL);
51 enetc_port_wr(hw, ENETC_PSIPVMR, ENETC_PSIPVMR_SET_VP(si_map) | val);
54 static void enetc_enable_si_vlan_promisc(struct enetc_pf *pf, int si_idx)
56 pf->vlan_promisc_simap |= BIT(si_idx);
57 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap);
60 static void enetc_disable_si_vlan_promisc(struct enetc_pf *pf, int si_idx)
62 pf->vlan_promisc_simap &= ~BIT(si_idx);
63 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap);
66 static void enetc_set_isol_vlan(struct enetc_hw *hw, int si, u16 vlan, u8 qos)
71 val = ENETC_PSIVLAN_EN | ENETC_PSIVLAN_SET_QOS(qos) | vlan;
73 enetc_port_wr(hw, ENETC_PSIVLANR(si), val);
76 static int enetc_mac_addr_hash_idx(const u8 *addr)
78 u64 fold = __swab64(ether_addr_to_u64(addr)) >> 16;
83 for (i = 0; i < 8; i++)
84 mask |= BIT_ULL(i * 6);
86 for (i = 0; i < 6; i++)
87 res |= (hweight64(fold & (mask << i)) & 0x1) << i;
92 static void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter)
94 filter->mac_addr_cnt = 0;
96 bitmap_zero(filter->mac_hash_table,
97 ENETC_MADDR_HASH_TBL_SZ);
100 static void enetc_add_mac_addr_em_filter(struct enetc_mac_filter *filter,
101 const unsigned char *addr)
103 /* add exact match addr */
104 ether_addr_copy(filter->mac_addr, addr);
105 filter->mac_addr_cnt++;
108 static void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
109 const unsigned char *addr)
111 int idx = enetc_mac_addr_hash_idx(addr);
113 /* add hash table entry */
114 __set_bit(idx, filter->mac_hash_table);
115 filter->mac_addr_cnt++;
118 static void enetc_clear_mac_ht_flt(struct enetc_si *si, int si_idx, int type)
120 bool err = si->errata & ENETC_ERR_UCMCSWP;
123 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), 0);
124 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), 0);
126 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), 0);
127 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), 0);
131 static void enetc_set_mac_ht_flt(struct enetc_si *si, int si_idx, int type,
134 bool err = si->errata & ENETC_ERR_UCMCSWP;
137 enetc_port_wr(&si->hw, ENETC_PSIUMHFR0(si_idx, err), *hash);
138 enetc_port_wr(&si->hw, ENETC_PSIUMHFR1(si_idx), *(hash + 1));
140 enetc_port_wr(&si->hw, ENETC_PSIMMHFR0(si_idx, err), *hash);
141 enetc_port_wr(&si->hw, ENETC_PSIMMHFR1(si_idx), *(hash + 1));
145 static void enetc_sync_mac_filters(struct enetc_pf *pf)
147 struct enetc_mac_filter *f = pf->mac_filter;
148 struct enetc_si *si = pf->si;
151 pos = EMETC_MAC_ADDR_FILT_RES;
153 for (i = 0; i < MADDR_TYPE; i++, f++) {
154 bool em = (f->mac_addr_cnt == 1) && (i == UC);
155 bool clear = !f->mac_addr_cnt;
159 enetc_clear_mac_flt_entry(si, pos);
161 enetc_clear_mac_ht_flt(si, 0, i);
165 /* exact match filter */
169 enetc_clear_mac_ht_flt(si, 0, UC);
171 err = enetc_set_mac_flt_entry(si, pos, f->mac_addr,
176 /* fallback to HT filtering */
177 dev_warn(&si->pdev->dev, "fallback to HT filt (%d)\n",
181 /* hash table filter, clear EM filter for UC entries */
183 enetc_clear_mac_flt_entry(si, pos);
185 enetc_set_mac_ht_flt(si, 0, i, (u32 *)f->mac_hash_table);
189 static void enetc_pf_set_rx_mode(struct net_device *ndev)
191 struct enetc_ndev_priv *priv = netdev_priv(ndev);
192 struct enetc_pf *pf = enetc_si_priv(priv->si);
193 struct enetc_hw *hw = &priv->si->hw;
194 bool uprom = false, mprom = false;
195 struct enetc_mac_filter *filter;
196 struct netdev_hw_addr *ha;
200 if (ndev->flags & IFF_PROMISC) {
201 /* enable promisc mode for SI0 (PF) */
202 psipmr = ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
205 } else if (ndev->flags & IFF_ALLMULTI) {
206 /* enable multi cast promisc mode for SI0 (PF) */
207 psipmr = ENETC_PSIPMR_SET_MP(0);
211 /* first 2 filter entries belong to PF */
213 /* Update unicast filters */
214 filter = &pf->mac_filter[UC];
215 enetc_reset_mac_addr_filter(filter);
217 em = (netdev_uc_count(ndev) == 1);
218 netdev_for_each_uc_addr(ha, ndev) {
220 enetc_add_mac_addr_em_filter(filter, ha->addr);
224 enetc_add_mac_addr_ht_filter(filter, ha->addr);
229 /* Update multicast filters */
230 filter = &pf->mac_filter[MC];
231 enetc_reset_mac_addr_filter(filter);
233 netdev_for_each_mc_addr(ha, ndev) {
234 if (!is_multicast_ether_addr(ha->addr))
237 enetc_add_mac_addr_ht_filter(filter, ha->addr);
241 if (!uprom || !mprom)
242 /* update PF entries */
243 enetc_sync_mac_filters(pf);
245 psipmr |= enetc_port_rd(hw, ENETC_PSIPMR) &
246 ~(ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0));
247 enetc_port_wr(hw, ENETC_PSIPMR, psipmr);
250 static void enetc_set_vlan_ht_filter(struct enetc_hw *hw, int si_idx,
253 enetc_port_wr(hw, ENETC_PSIVHFR0(si_idx), *hash);
254 enetc_port_wr(hw, ENETC_PSIVHFR1(si_idx), *(hash + 1));
257 static int enetc_vid_hash_idx(unsigned int vid)
262 for (i = 0; i < 6; i++)
263 res |= (hweight8(vid & (BIT(i) | BIT(i + 6))) & 0x1) << i;
268 static void enetc_sync_vlan_ht_filter(struct enetc_pf *pf, bool rehash)
273 bitmap_zero(pf->vlan_ht_filter, ENETC_VLAN_HT_SIZE);
275 for_each_set_bit(i, pf->active_vlans, VLAN_N_VID) {
276 int hidx = enetc_vid_hash_idx(i);
278 __set_bit(hidx, pf->vlan_ht_filter);
282 enetc_set_vlan_ht_filter(&pf->si->hw, 0, (u32 *)pf->vlan_ht_filter);
285 static int enetc_vlan_rx_add_vid(struct net_device *ndev, __be16 prot, u16 vid)
287 struct enetc_ndev_priv *priv = netdev_priv(ndev);
288 struct enetc_pf *pf = enetc_si_priv(priv->si);
291 __set_bit(vid, pf->active_vlans);
293 idx = enetc_vid_hash_idx(vid);
294 if (!__test_and_set_bit(idx, pf->vlan_ht_filter))
295 enetc_sync_vlan_ht_filter(pf, false);
300 static int enetc_vlan_rx_del_vid(struct net_device *ndev, __be16 prot, u16 vid)
302 struct enetc_ndev_priv *priv = netdev_priv(ndev);
303 struct enetc_pf *pf = enetc_si_priv(priv->si);
305 __clear_bit(vid, pf->active_vlans);
306 enetc_sync_vlan_ht_filter(pf, true);
311 static void enetc_set_loopback(struct net_device *ndev, bool en)
313 struct enetc_ndev_priv *priv = netdev_priv(ndev);
314 struct enetc_hw *hw = &priv->si->hw;
317 reg = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
318 if (reg & ENETC_PM0_IFM_RG) {
320 reg = (reg & ~ENETC_PM0_IFM_RLP) |
321 (en ? ENETC_PM0_IFM_RLP : 0);
322 enetc_port_wr(hw, ENETC_PM0_IF_MODE, reg);
324 /* assume SGMII mode */
325 reg = enetc_port_rd(hw, ENETC_PM0_CMD_CFG);
326 reg = (reg & ~ENETC_PM0_CMD_XGLP) |
327 (en ? ENETC_PM0_CMD_XGLP : 0);
328 reg = (reg & ~ENETC_PM0_CMD_PHY_TX_EN) |
329 (en ? ENETC_PM0_CMD_PHY_TX_EN : 0);
330 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, reg);
331 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, reg);
335 static int enetc_pf_set_vf_mac(struct net_device *ndev, int vf, u8 *mac)
337 struct enetc_ndev_priv *priv = netdev_priv(ndev);
338 struct enetc_pf *pf = enetc_si_priv(priv->si);
339 struct enetc_vf_state *vf_state;
341 if (vf >= pf->total_vfs)
344 if (!is_valid_ether_addr(mac))
345 return -EADDRNOTAVAIL;
347 vf_state = &pf->vf_state[vf];
348 vf_state->flags |= ENETC_VF_FLAG_PF_SET_MAC;
349 enetc_pf_set_primary_mac_addr(&priv->si->hw, vf + 1, mac);
353 static int enetc_pf_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan,
354 u8 qos, __be16 proto)
356 struct enetc_ndev_priv *priv = netdev_priv(ndev);
357 struct enetc_pf *pf = enetc_si_priv(priv->si);
359 if (priv->si->errata & ENETC_ERR_VLAN_ISOL)
362 if (vf >= pf->total_vfs)
365 if (proto != htons(ETH_P_8021Q))
366 /* only C-tags supported for now */
367 return -EPROTONOSUPPORT;
369 enetc_set_isol_vlan(&priv->si->hw, vf + 1, vlan, qos);
373 static int enetc_pf_set_vf_spoofchk(struct net_device *ndev, int vf, bool en)
375 struct enetc_ndev_priv *priv = netdev_priv(ndev);
376 struct enetc_pf *pf = enetc_si_priv(priv->si);
379 if (vf >= pf->total_vfs)
382 cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1));
383 cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0);
384 enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr);
389 static void enetc_port_setup_primary_mac_address(struct enetc_si *si)
391 unsigned char mac_addr[MAX_ADDR_LEN];
392 struct enetc_pf *pf = enetc_si_priv(si);
393 struct enetc_hw *hw = &si->hw;
396 /* check MAC addresses for PF and all VFs, if any is 0 set it ro rand */
397 for (i = 0; i < pf->total_vfs + 1; i++) {
398 enetc_pf_get_primary_mac_addr(hw, i, mac_addr);
399 if (!is_zero_ether_addr(mac_addr))
401 eth_random_addr(mac_addr);
402 dev_info(&si->pdev->dev, "no MAC address specified for SI%d, using %pM\n",
404 enetc_pf_set_primary_mac_addr(hw, i, mac_addr);
408 static void enetc_port_assign_rfs_entries(struct enetc_si *si)
410 struct enetc_pf *pf = enetc_si_priv(si);
411 struct enetc_hw *hw = &si->hw;
412 int num_entries, vf_entries, i;
415 /* split RFS entries between functions */
416 val = enetc_port_rd(hw, ENETC_PRFSCAPR);
417 num_entries = ENETC_PRFSCAPR_GET_NUM_RFS(val);
418 vf_entries = num_entries / (pf->total_vfs + 1);
420 for (i = 0; i < pf->total_vfs; i++)
421 enetc_port_wr(hw, ENETC_PSIRFSCFGR(i + 1), vf_entries);
422 enetc_port_wr(hw, ENETC_PSIRFSCFGR(0),
423 num_entries - vf_entries * pf->total_vfs);
425 /* enable RFS on port */
426 enetc_port_wr(hw, ENETC_PRFSMR, ENETC_PRFSMR_RFSE);
429 static void enetc_port_si_configure(struct enetc_si *si)
431 struct enetc_pf *pf = enetc_si_priv(si);
432 struct enetc_hw *hw = &si->hw;
436 val = enetc_port_rd(hw, ENETC_PCAPR0);
437 num_rings = min(ENETC_PCAPR0_RXBDR(val), ENETC_PCAPR0_TXBDR(val));
439 val = ENETC_PSICFGR0_SET_TXBDR(ENETC_PF_NUM_RINGS);
440 val |= ENETC_PSICFGR0_SET_RXBDR(ENETC_PF_NUM_RINGS);
442 if (unlikely(num_rings < ENETC_PF_NUM_RINGS)) {
443 val = ENETC_PSICFGR0_SET_TXBDR(num_rings);
444 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings);
446 dev_warn(&si->pdev->dev, "Found %d rings, expected %d!\n",
447 num_rings, ENETC_PF_NUM_RINGS);
452 /* Add default one-time settings for SI0 (PF) */
453 val |= ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
455 enetc_port_wr(hw, ENETC_PSICFGR0(0), val);
458 num_rings -= ENETC_PF_NUM_RINGS;
460 /* Configure the SIs for each available VF */
461 val = ENETC_PSICFGR0_SIVC(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
462 val |= ENETC_PSICFGR0_VTE | ENETC_PSICFGR0_SIVIE;
465 num_rings /= pf->total_vfs;
466 val |= ENETC_PSICFGR0_SET_TXBDR(num_rings);
467 val |= ENETC_PSICFGR0_SET_RXBDR(num_rings);
470 for (i = 0; i < pf->total_vfs; i++)
471 enetc_port_wr(hw, ENETC_PSICFGR0(i + 1), val);
473 /* Port level VLAN settings */
474 val = ENETC_PVCLCTR_OVTPIDL(ENETC_VLAN_TYPE_C | ENETC_VLAN_TYPE_S);
475 enetc_port_wr(hw, ENETC_PVCLCTR, val);
476 /* use outer tag for VLAN filtering */
477 enetc_port_wr(hw, ENETC_PSIVLANFMR, ENETC_PSIVLANFMR_VS);
480 static void enetc_configure_port_mac(struct enetc_hw *hw)
482 enetc_port_wr(hw, ENETC_PM0_MAXFRM,
483 ENETC_SET_MAXFRM(ENETC_RX_MAXFRM_SIZE));
485 enetc_port_wr(hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE);
486 enetc_port_wr(hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE);
488 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN |
489 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC);
491 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN |
492 ENETC_PM0_CMD_TXP | ENETC_PM0_PROMISC);
495 static void enetc_mac_config(struct enetc_hw *hw, phy_interface_t phy_mode)
499 if (phy_interface_mode_is_rgmii(phy_mode)) {
500 val = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
501 val &= ~ENETC_PM0_IFM_EN_AUTO;
502 val &= ENETC_PM0_IFM_IFMODE_MASK;
503 val |= ENETC_PM0_IFM_IFMODE_GMII | ENETC_PM0_IFM_RG;
504 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
507 if (phy_mode == PHY_INTERFACE_MODE_USXGMII) {
508 val = ENETC_PM0_IFM_FULL_DPX | ENETC_PM0_IFM_IFMODE_XGMII;
509 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
513 static void enetc_mac_enable(struct enetc_hw *hw, bool en)
515 u32 val = enetc_port_rd(hw, ENETC_PM0_CMD_CFG);
517 val &= ~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
518 val |= en ? (ENETC_PM0_TX_EN | ENETC_PM0_RX_EN) : 0;
520 enetc_port_wr(hw, ENETC_PM0_CMD_CFG, val);
521 enetc_port_wr(hw, ENETC_PM1_CMD_CFG, val);
524 static void enetc_configure_port_pmac(struct enetc_hw *hw)
528 /* Set pMAC step lock */
529 temp = enetc_port_rd(hw, ENETC_PFPMR);
530 enetc_port_wr(hw, ENETC_PFPMR,
531 temp | ENETC_PFPMR_PMACE | ENETC_PFPMR_MWLM);
533 temp = enetc_port_rd(hw, ENETC_MMCSR);
534 enetc_port_wr(hw, ENETC_MMCSR, temp | ENETC_MMCSR_ME);
537 static void enetc_configure_port(struct enetc_pf *pf)
539 u8 hash_key[ENETC_RSSHASH_KEY_SIZE];
540 struct enetc_hw *hw = &pf->si->hw;
542 enetc_configure_port_pmac(hw);
544 enetc_configure_port_mac(hw);
546 enetc_port_si_configure(pf->si);
548 /* set up hash key */
549 get_random_bytes(hash_key, ENETC_RSSHASH_KEY_SIZE);
550 enetc_set_rss_key(hw, hash_key);
552 /* split up RFS entries */
553 enetc_port_assign_rfs_entries(pf->si);
555 /* fix-up primary MAC addresses, if not set already */
556 enetc_port_setup_primary_mac_address(pf->si);
558 /* enforce VLAN promisc mode for all SIs */
559 pf->vlan_promisc_simap = ENETC_VLAN_PROMISC_MAP_ALL;
560 enetc_set_vlan_promisc(hw, pf->vlan_promisc_simap);
562 enetc_port_wr(hw, ENETC_PSIPMR, 0);
565 enetc_port_wr(hw, ENETC_PMR, ENETC_PMR_EN);
569 static u16 enetc_msg_pf_set_vf_primary_mac_addr(struct enetc_pf *pf,
572 struct enetc_vf_state *vf_state = &pf->vf_state[vf_id];
573 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id];
574 struct enetc_msg_cmd_set_primary_mac *cmd;
575 struct device *dev = &pf->si->pdev->dev;
579 cmd = (struct enetc_msg_cmd_set_primary_mac *)msg->vaddr;
580 cmd_id = cmd->header.id;
581 if (cmd_id != ENETC_MSG_CMD_MNG_ADD)
582 return ENETC_MSG_CMD_STATUS_FAIL;
584 addr = cmd->mac.sa_data;
585 if (vf_state->flags & ENETC_VF_FLAG_PF_SET_MAC)
586 dev_warn(dev, "Attempt to override PF set mac addr for VF%d\n",
589 enetc_pf_set_primary_mac_addr(&pf->si->hw, vf_id + 1, addr);
591 return ENETC_MSG_CMD_STATUS_OK;
594 void enetc_msg_handle_rxmsg(struct enetc_pf *pf, int vf_id, u16 *status)
596 struct enetc_msg_swbd *msg = &pf->rxmsg[vf_id];
597 struct device *dev = &pf->si->pdev->dev;
598 struct enetc_msg_cmd_header *cmd_hdr;
601 *status = ENETC_MSG_CMD_STATUS_OK;
602 cmd_hdr = (struct enetc_msg_cmd_header *)msg->vaddr;
603 cmd_type = cmd_hdr->type;
606 case ENETC_MSG_CMD_MNG_MAC:
607 *status = enetc_msg_pf_set_vf_primary_mac_addr(pf, vf_id);
610 dev_err(dev, "command not supported (cmd_type: 0x%x)\n",
615 #ifdef CONFIG_PCI_IOV
616 static int enetc_sriov_configure(struct pci_dev *pdev, int num_vfs)
618 struct enetc_si *si = pci_get_drvdata(pdev);
619 struct enetc_pf *pf = enetc_si_priv(si);
623 enetc_msg_psi_free(pf);
626 pci_disable_sriov(pdev);
628 pf->num_vfs = num_vfs;
630 pf->vf_state = kcalloc(num_vfs, sizeof(struct enetc_vf_state),
637 err = enetc_msg_psi_init(pf);
639 dev_err(&pdev->dev, "enetc_msg_psi_init (%d)\n", err);
643 err = pci_enable_sriov(pdev, num_vfs);
645 dev_err(&pdev->dev, "pci_enable_sriov err %d\n", err);
653 enetc_msg_psi_free(pf);
661 #define enetc_sriov_configure(pdev, num_vfs) (void)0
664 static int enetc_pf_set_features(struct net_device *ndev,
665 netdev_features_t features)
667 netdev_features_t changed = ndev->features ^ features;
668 struct enetc_ndev_priv *priv = netdev_priv(ndev);
670 if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) {
671 struct enetc_pf *pf = enetc_si_priv(priv->si);
673 if (!!(features & NETIF_F_HW_VLAN_CTAG_FILTER))
674 enetc_disable_si_vlan_promisc(pf, 0);
676 enetc_enable_si_vlan_promisc(pf, 0);
679 if (changed & NETIF_F_LOOPBACK)
680 enetc_set_loopback(ndev, !!(features & NETIF_F_LOOPBACK));
682 return enetc_set_features(ndev, features);
685 static const struct net_device_ops enetc_ndev_ops = {
686 .ndo_open = enetc_open,
687 .ndo_stop = enetc_close,
688 .ndo_start_xmit = enetc_xmit,
689 .ndo_get_stats = enetc_get_stats,
690 .ndo_set_mac_address = enetc_pf_set_mac_addr,
691 .ndo_set_rx_mode = enetc_pf_set_rx_mode,
692 .ndo_vlan_rx_add_vid = enetc_vlan_rx_add_vid,
693 .ndo_vlan_rx_kill_vid = enetc_vlan_rx_del_vid,
694 .ndo_set_vf_mac = enetc_pf_set_vf_mac,
695 .ndo_set_vf_vlan = enetc_pf_set_vf_vlan,
696 .ndo_set_vf_spoofchk = enetc_pf_set_vf_spoofchk,
697 .ndo_set_features = enetc_pf_set_features,
698 .ndo_do_ioctl = enetc_ioctl,
699 .ndo_setup_tc = enetc_setup_tc,
702 static void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
703 const struct net_device_ops *ndev_ops)
705 struct enetc_ndev_priv *priv = netdev_priv(ndev);
707 SET_NETDEV_DEV(ndev, &si->pdev->dev);
710 priv->dev = &si->pdev->dev;
713 priv->msg_enable = (NETIF_MSG_WOL << 1) - 1;
714 ndev->netdev_ops = ndev_ops;
715 enetc_set_ethtool_ops(ndev);
716 ndev->watchdog_timeo = 5 * HZ;
717 ndev->max_mtu = ENETC_MAX_MTU;
719 ndev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
720 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
721 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_LOOPBACK;
722 ndev->features = NETIF_F_HIGHDMA | NETIF_F_SG | NETIF_F_RXCSUM |
723 NETIF_F_HW_VLAN_CTAG_TX |
724 NETIF_F_HW_VLAN_CTAG_RX;
727 ndev->hw_features |= NETIF_F_RXHASH;
729 ndev->priv_flags |= IFF_UNICAST_FLT;
731 if (si->hw_features & ENETC_SI_F_QBV)
732 priv->active_offloads |= ENETC_F_QBV;
734 if (si->hw_features & ENETC_SI_F_PSFP && !enetc_psfp_enable(priv)) {
735 priv->active_offloads |= ENETC_F_QCI;
736 ndev->features |= NETIF_F_HW_TC;
737 ndev->hw_features |= NETIF_F_HW_TC;
740 /* pick up primary MAC address from SI */
741 enetc_get_primary_mac_addr(&si->hw, ndev->dev_addr);
744 static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
746 struct device *dev = &pf->si->pdev->dev;
747 struct enetc_mdio_priv *mdio_priv;
751 bus = devm_mdiobus_alloc_size(dev, sizeof(*mdio_priv));
755 bus->name = "Freescale ENETC MDIO Bus";
756 bus->read = enetc_mdio_read;
757 bus->write = enetc_mdio_write;
759 mdio_priv = bus->priv;
760 mdio_priv->hw = &pf->si->hw;
761 mdio_priv->mdio_base = ENETC_EMDIO_BASE;
762 snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
764 err = of_mdiobus_register(bus, np);
766 dev_err(dev, "cannot register MDIO bus\n");
775 static void enetc_mdio_remove(struct enetc_pf *pf)
778 mdiobus_unregister(pf->mdio);
781 static int enetc_imdio_create(struct enetc_pf *pf)
783 struct device *dev = &pf->si->pdev->dev;
784 struct enetc_mdio_priv *mdio_priv;
785 struct lynx_pcs *pcs_lynx;
786 struct mdio_device *pcs;
790 bus = mdiobus_alloc_size(sizeof(*mdio_priv));
794 bus->name = "Freescale ENETC internal MDIO Bus";
795 bus->read = enetc_mdio_read;
796 bus->write = enetc_mdio_write;
799 mdio_priv = bus->priv;
800 mdio_priv->hw = &pf->si->hw;
801 mdio_priv->mdio_base = ENETC_PM_IMDIO_BASE;
802 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-imdio", dev_name(dev));
804 err = mdiobus_register(bus);
806 dev_err(dev, "cannot register internal MDIO bus (%d)\n", err);
810 pcs = mdio_device_create(bus, 0);
813 dev_err(dev, "cannot create pcs (%d)\n", err);
814 goto unregister_mdiobus;
817 pcs_lynx = lynx_pcs_create(pcs);
819 mdio_device_free(pcs);
821 dev_err(dev, "cannot create lynx pcs (%d)\n", err);
822 goto unregister_mdiobus;
831 mdiobus_unregister(bus);
837 static void enetc_imdio_remove(struct enetc_pf *pf)
840 mdio_device_free(pf->pcs->mdio);
841 lynx_pcs_destroy(pf->pcs);
844 mdiobus_unregister(pf->imdio);
845 mdiobus_free(pf->imdio);
849 static bool enetc_port_has_pcs(struct enetc_pf *pf)
851 return (pf->if_mode == PHY_INTERFACE_MODE_SGMII ||
852 pf->if_mode == PHY_INTERFACE_MODE_2500BASEX ||
853 pf->if_mode == PHY_INTERFACE_MODE_USXGMII);
856 static int enetc_mdiobus_create(struct enetc_pf *pf, struct device_node *node)
858 struct device_node *mdio_np;
861 mdio_np = of_get_child_by_name(node, "mdio");
863 err = enetc_mdio_probe(pf, mdio_np);
865 of_node_put(mdio_np);
870 if (enetc_port_has_pcs(pf)) {
871 err = enetc_imdio_create(pf);
873 enetc_mdio_remove(pf);
881 static void enetc_mdiobus_destroy(struct enetc_pf *pf)
883 enetc_mdio_remove(pf);
884 enetc_imdio_remove(pf);
887 static void enetc_pl_mac_validate(struct phylink_config *config,
888 unsigned long *supported,
889 struct phylink_link_state *state)
891 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
893 if (state->interface != PHY_INTERFACE_MODE_NA &&
894 state->interface != PHY_INTERFACE_MODE_INTERNAL &&
895 state->interface != PHY_INTERFACE_MODE_SGMII &&
896 state->interface != PHY_INTERFACE_MODE_2500BASEX &&
897 state->interface != PHY_INTERFACE_MODE_USXGMII &&
898 !phy_interface_mode_is_rgmii(state->interface)) {
899 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
903 phylink_set_port_modes(mask);
904 phylink_set(mask, Autoneg);
905 phylink_set(mask, Pause);
906 phylink_set(mask, Asym_Pause);
907 phylink_set(mask, 10baseT_Half);
908 phylink_set(mask, 10baseT_Full);
909 phylink_set(mask, 100baseT_Half);
910 phylink_set(mask, 100baseT_Full);
911 phylink_set(mask, 100baseT_Half);
912 phylink_set(mask, 1000baseT_Half);
913 phylink_set(mask, 1000baseT_Full);
915 if (state->interface == PHY_INTERFACE_MODE_INTERNAL ||
916 state->interface == PHY_INTERFACE_MODE_2500BASEX ||
917 state->interface == PHY_INTERFACE_MODE_USXGMII) {
918 phylink_set(mask, 2500baseT_Full);
919 phylink_set(mask, 2500baseX_Full);
922 bitmap_and(supported, supported, mask,
923 __ETHTOOL_LINK_MODE_MASK_NBITS);
924 bitmap_and(state->advertising, state->advertising, mask,
925 __ETHTOOL_LINK_MODE_MASK_NBITS);
928 static void enetc_pl_mac_config(struct phylink_config *config,
930 const struct phylink_link_state *state)
932 struct enetc_pf *pf = phylink_to_enetc_pf(config);
933 struct enetc_ndev_priv *priv;
935 enetc_mac_config(&pf->si->hw, state->interface);
937 priv = netdev_priv(pf->si->ndev);
939 phylink_set_pcs(priv->phylink, &pf->pcs->pcs);
942 static void enetc_force_rgmii_mac(struct enetc_hw *hw, int speed, int duplex)
946 old_val = val = enetc_port_rd(hw, ENETC_PM0_IF_MODE);
948 if (speed == SPEED_1000) {
949 val &= ~ENETC_PM0_IFM_SSP_MASK;
950 val |= ENETC_PM0_IFM_SSP_1000;
951 } else if (speed == SPEED_100) {
952 val &= ~ENETC_PM0_IFM_SSP_MASK;
953 val |= ENETC_PM0_IFM_SSP_100;
954 } else if (speed == SPEED_10) {
955 val &= ~ENETC_PM0_IFM_SSP_MASK;
956 val |= ENETC_PM0_IFM_SSP_10;
959 if (duplex == DUPLEX_FULL)
960 val |= ENETC_PM0_IFM_FULL_DPX;
962 val &= ~ENETC_PM0_IFM_FULL_DPX;
967 enetc_port_wr(hw, ENETC_PM0_IF_MODE, val);
970 static void enetc_pl_mac_link_up(struct phylink_config *config,
971 struct phy_device *phy, unsigned int mode,
972 phy_interface_t interface, int speed,
973 int duplex, bool tx_pause, bool rx_pause)
975 struct enetc_pf *pf = phylink_to_enetc_pf(config);
976 struct enetc_ndev_priv *priv;
978 priv = netdev_priv(pf->si->ndev);
979 if (priv->active_offloads & ENETC_F_QBV)
980 enetc_sched_speed_set(priv, speed);
982 if (!phylink_autoneg_inband(mode) &&
983 phy_interface_mode_is_rgmii(interface))
984 enetc_force_rgmii_mac(&pf->si->hw, speed, duplex);
986 enetc_mac_enable(&pf->si->hw, true);
989 static void enetc_pl_mac_link_down(struct phylink_config *config,
991 phy_interface_t interface)
993 struct enetc_pf *pf = phylink_to_enetc_pf(config);
995 enetc_mac_enable(&pf->si->hw, false);
998 static const struct phylink_mac_ops enetc_mac_phylink_ops = {
999 .validate = enetc_pl_mac_validate,
1000 .mac_config = enetc_pl_mac_config,
1001 .mac_link_up = enetc_pl_mac_link_up,
1002 .mac_link_down = enetc_pl_mac_link_down,
1005 static int enetc_phylink_create(struct enetc_ndev_priv *priv,
1006 struct device_node *node)
1008 struct enetc_pf *pf = enetc_si_priv(priv->si);
1009 struct phylink *phylink;
1012 pf->phylink_config.dev = &priv->ndev->dev;
1013 pf->phylink_config.type = PHYLINK_NETDEV;
1015 phylink = phylink_create(&pf->phylink_config, of_fwnode_handle(node),
1016 pf->if_mode, &enetc_mac_phylink_ops);
1017 if (IS_ERR(phylink)) {
1018 err = PTR_ERR(phylink);
1022 priv->phylink = phylink;
1027 static void enetc_phylink_destroy(struct enetc_ndev_priv *priv)
1030 phylink_destroy(priv->phylink);
1033 /* Initialize the entire shared memory for the flow steering entries
1034 * of this port (PF + VFs)
1036 static int enetc_init_port_rfs_memory(struct enetc_si *si)
1038 struct enetc_cmd_rfse rfse = {0};
1039 struct enetc_hw *hw = &si->hw;
1040 int num_rfs, i, err = 0;
1043 val = enetc_port_rd(hw, ENETC_PRFSCAPR);
1044 num_rfs = ENETC_PRFSCAPR_GET_NUM_RFS(val);
1046 for (i = 0; i < num_rfs; i++) {
1047 err = enetc_set_fs_entry(si, &rfse, i);
1055 static int enetc_init_port_rss_memory(struct enetc_si *si)
1057 struct enetc_hw *hw = &si->hw;
1062 val = enetc_port_rd(hw, ENETC_PRSSCAPR);
1063 num_rss = ENETC_PRSSCAPR_GET_NUM_RSS(val);
1067 rss_table = kcalloc(num_rss, sizeof(*rss_table), GFP_KERNEL);
1071 err = enetc_set_rss_table(si, rss_table, num_rss);
1078 static void enetc_init_unused_port(struct enetc_si *si)
1080 struct device *dev = &si->pdev->dev;
1081 struct enetc_hw *hw = &si->hw;
1084 si->cbd_ring.bd_count = ENETC_CBDR_DEFAULT_SIZE;
1085 err = enetc_alloc_cbdr(dev, &si->cbd_ring);
1089 enetc_setup_cbdr(hw, &si->cbd_ring);
1091 enetc_init_port_rfs_memory(si);
1092 enetc_init_port_rss_memory(si);
1094 enetc_clear_cbdr(hw);
1095 enetc_free_cbdr(dev, &si->cbd_ring);
1098 static int enetc_pf_probe(struct pci_dev *pdev,
1099 const struct pci_device_id *ent)
1101 struct device_node *node = pdev->dev.of_node;
1102 struct enetc_ndev_priv *priv;
1103 struct net_device *ndev;
1104 struct enetc_si *si;
1105 struct enetc_pf *pf;
1108 err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf));
1110 dev_err(&pdev->dev, "PCI probing failed\n");
1114 si = pci_get_drvdata(pdev);
1115 if (!si->hw.port || !si->hw.global) {
1117 dev_err(&pdev->dev, "could not map PF space, probing a VF?\n");
1118 goto err_map_pf_space;
1121 if (node && !of_device_is_available(node)) {
1122 enetc_init_unused_port(si);
1123 dev_info(&pdev->dev, "device is disabled, skipping\n");
1125 goto err_device_disabled;
1128 pf = enetc_si_priv(si);
1130 pf->total_vfs = pci_sriov_get_totalvfs(pdev);
1132 enetc_configure_port(pf);
1134 enetc_get_si_caps(si);
1136 ndev = alloc_etherdev_mq(sizeof(*priv), ENETC_MAX_NUM_TXQS);
1139 dev_err(&pdev->dev, "netdev creation failed\n");
1140 goto err_alloc_netdev;
1143 enetc_pf_netdev_setup(si, ndev, &enetc_ndev_ops);
1145 priv = netdev_priv(ndev);
1147 enetc_init_si_rings_params(priv);
1149 err = enetc_alloc_si_resources(priv);
1151 dev_err(&pdev->dev, "SI resource alloc failed\n");
1152 goto err_alloc_si_res;
1155 err = enetc_init_port_rfs_memory(si);
1157 dev_err(&pdev->dev, "Failed to initialize RFS memory\n");
1158 goto err_init_port_rfs;
1161 err = enetc_init_port_rss_memory(si);
1163 dev_err(&pdev->dev, "Failed to initialize RSS memory\n");
1164 goto err_init_port_rss;
1167 err = enetc_configure_si(priv);
1169 dev_err(&pdev->dev, "Failed to configure SI\n");
1173 err = enetc_alloc_msix(priv);
1175 dev_err(&pdev->dev, "MSIX alloc failed\n");
1176 goto err_alloc_msix;
1179 if (!of_get_phy_mode(node, &pf->if_mode)) {
1180 err = enetc_mdiobus_create(pf, node);
1182 goto err_mdiobus_create;
1184 err = enetc_phylink_create(priv, node);
1186 goto err_phylink_create;
1189 err = register_netdev(ndev);
1191 goto err_reg_netdev;
1196 enetc_phylink_destroy(priv);
1198 enetc_mdiobus_destroy(pf);
1200 enetc_free_msix(priv);
1205 enetc_free_si_resources(priv);
1210 err_device_disabled:
1212 enetc_pci_remove(pdev);
1217 static void enetc_pf_remove(struct pci_dev *pdev)
1219 struct enetc_si *si = pci_get_drvdata(pdev);
1220 struct enetc_pf *pf = enetc_si_priv(si);
1221 struct enetc_ndev_priv *priv;
1223 priv = netdev_priv(si->ndev);
1226 enetc_sriov_configure(pdev, 0);
1228 unregister_netdev(si->ndev);
1230 enetc_phylink_destroy(priv);
1231 enetc_mdiobus_destroy(pf);
1233 enetc_free_msix(priv);
1235 enetc_free_si_resources(priv);
1237 free_netdev(si->ndev);
1239 enetc_pci_remove(pdev);
1242 static const struct pci_device_id enetc_pf_id_table[] = {
1243 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) },
1244 { 0, } /* End of table. */
1246 MODULE_DEVICE_TABLE(pci, enetc_pf_id_table);
1248 static struct pci_driver enetc_pf_driver = {
1249 .name = KBUILD_MODNAME,
1250 .id_table = enetc_pf_id_table,
1251 .probe = enetc_pf_probe,
1252 .remove = enetc_pf_remove,
1253 #ifdef CONFIG_PCI_IOV
1254 .sriov_configure = enetc_sriov_configure,
1257 module_pci_driver(enetc_pf_driver);
1259 MODULE_DESCRIPTION(ENETC_DRV_NAME_STR);
1260 MODULE_LICENSE("Dual BSD/GPL");