drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c

   1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
   2 /* Copyright 2014-2016 Freescale Semiconductor Inc.
   3  * Copyright 2016-2020 NXP
   4  */
   5 #include <linux/init.h>
   6 #include <linux/module.h>
   7 #include <linux/platform_device.h>
   8 #include <linux/etherdevice.h>
   9 #include <linux/of_net.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/msi.h>
  12 #include <linux/kthread.h>
  13 #include <linux/iommu.h>
  14 #include <linux/net_tstamp.h>
  15 #include <linux/fsl/mc.h>
  16 #include <linux/bpf.h>
  17 #include <linux/bpf_trace.h>
  18 #include <net/sock.h>
  19
  20 #include "dpaa2-eth.h"
  21
  22 /* CREATE_TRACE_POINTS only needs to be defined once. Other dpa files
  23  * using trace events only need to #include <trace/events/sched.h>
  24  */
  25 #define CREATE_TRACE_POINTS
  26 #include "dpaa2-eth-trace.h"
  27
  28 MODULE_LICENSE("Dual BSD/GPL");
  29 MODULE_AUTHOR("Freescale Semiconductor, Inc");
  30 MODULE_DESCRIPTION("Freescale DPAA2 Ethernet Driver");
  31
  32 static void *dpaa2_iova_to_virt(struct iommu_domain *domain,
  33                                 dma_addr_t iova_addr)
  34 {
  35         phys_addr_t phys_addr;
  36
  37         phys_addr = domain ? iommu_iova_to_phys(domain, iova_addr) : iova_addr;
  38
  39         return phys_to_virt(phys_addr);
  40 }
  41
  42 static void validate_rx_csum(struct dpaa2_eth_priv *priv,
  43                              u32 fd_status,
  44                              struct sk_buff *skb)
  45 {
  46         skb_checksum_none_assert(skb);
  47
  48         /* HW checksum validation is disabled, nothing to do here */
  49         if (!(priv->net_dev->features & NETIF_F_RXCSUM))
  50                 return;
  51
  52         /* Read checksum validation bits */
  53         if (!((fd_status & DPAA2_FAS_L3CV) &&
  54               (fd_status & DPAA2_FAS_L4CV)))
  55                 return;
  56
  57         /* Inform the stack there's no need to compute L3/L4 csum anymore */
  58         skb->ip_summed = CHECKSUM_UNNECESSARY;
  59 }
  60
  61 /* Free a received FD.
  62  * Not to be used for Tx conf FDs or on any other paths.
  63  */
  64 static void free_rx_fd(struct dpaa2_eth_priv *priv,
  65                        const struct dpaa2_fd *fd,
  66                        void *vaddr)
  67 {
  68         struct device *dev = priv->net_dev->dev.parent;
  69         dma_addr_t addr = dpaa2_fd_get_addr(fd);
  70         u8 fd_format = dpaa2_fd_get_format(fd);
  71         struct dpaa2_sg_entry *sgt;
  72         void *sg_vaddr;
  73         int i;
  74
  75         /* If single buffer frame, just free the data buffer */
  76         if (fd_format == dpaa2_fd_single)
  77                 goto free_buf;
  78         else if (fd_format != dpaa2_fd_sg)
  79                 /* We don't support any other format */
  80                 return;
  81
  82         /* For S/G frames, we first need to free all SG entries
  83          * except the first one, which was taken care of already
  84          */
  85         sgt = vaddr + dpaa2_fd_get_offset(fd);
  86         for (i = 1; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
  87                 addr = dpaa2_sg_get_addr(&sgt[i]);
  88                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
  89                 dma_unmap_page(dev, addr, priv->rx_buf_size,
  90                                DMA_BIDIRECTIONAL);
  91
  92                 free_pages((unsigned long)sg_vaddr, 0);
  93                 if (dpaa2_sg_is_final(&sgt[i]))
  94                         break;
  95         }
  96
  97 free_buf:
  98         free_pages((unsigned long)vaddr, 0);
  99 }
 100
 101 /* Build a linear skb based on a single-buffer frame descriptor */
 102 static struct sk_buff *build_linear_skb(struct dpaa2_eth_channel *ch,
 103                                         const struct dpaa2_fd *fd,
 104                                         void *fd_vaddr)
 105 {
 106         struct sk_buff *skb = NULL;
 107         u16 fd_offset = dpaa2_fd_get_offset(fd);
 108         u32 fd_length = dpaa2_fd_get_len(fd);
 109
 110         ch->buf_count--;
 111
 112         skb = build_skb(fd_vaddr, DPAA2_ETH_RX_BUF_RAW_SIZE);
 113         if (unlikely(!skb))
 114                 return NULL;
 115
 116         skb_reserve(skb, fd_offset);
 117         skb_put(skb, fd_length);
 118
 119         return skb;
 120 }
 121
 122 /* Build a non linear (fragmented) skb based on a S/G table */
 123 static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv,
 124                                       struct dpaa2_eth_channel *ch,
 125                                       struct dpaa2_sg_entry *sgt)
 126 {
 127         struct sk_buff *skb = NULL;
 128         struct device *dev = priv->net_dev->dev.parent;
 129         void *sg_vaddr;
 130         dma_addr_t sg_addr;
 131         u16 sg_offset;
 132         u32 sg_length;
 133         struct page *page, *head_page;
 134         int page_offset;
 135         int i;
 136
 137         for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) {
 138                 struct dpaa2_sg_entry *sge = &sgt[i];
 139
 140                 /* NOTE: We only support SG entries in dpaa2_sg_single format,
 141                  * but this is the only format we may receive from HW anyway
 142                  */
 143
 144                 /* Get the address and length from the S/G entry */
 145                 sg_addr = dpaa2_sg_get_addr(sge);
 146                 sg_vaddr = dpaa2_iova_to_virt(priv->iommu_domain, sg_addr);
 147                 dma_unmap_page(dev, sg_addr, priv->rx_buf_size,
 148                                DMA_BIDIRECTIONAL);
 149
 150                 sg_length = dpaa2_sg_get_len(sge);
 151
 152                 if (i == 0) {
 153                         /* We build the skb around the first data buffer */
 154                         skb = build_skb(sg_vaddr, DPAA2_ETH_RX_BUF_RAW_SIZE);
 155                         if (unlikely(!skb)) {
 156                                 /* Free the first SG entry now, since we already
 157                                  * unmapped it and obtained the virtual address
 158                                  */
 159                                 free_pages((unsigned long)sg_vaddr, 0);
 160
 161                                 /* We still need to subtract the buffers used
 162                                  * by this FD from our software counter
 163                                  */
 164                                 while (!dpaa2_sg_is_final(&sgt[i]) &&
 165                                        i < DPAA2_ETH_MAX_SG_ENTRIES)
 166                                         i++;
 167                                 break;
 168                         }
 169
 170                         sg_offset = dpaa2_sg_get_offset(sge);
 171                         skb_reserve(skb, sg_offset);
 172                         skb_put(skb, sg_length);
 173                 } else {
 174                         /* Rest of the data buffers are stored as skb frags */
 175                         page = virt_to_page(sg_vaddr);
 176                         head_page = virt_to_head_page(sg_vaddr);
 177
 178                         /* Offset in page (which may be compound).
 179                          * Data in subsequent SG entries is stored from the
 180                          * beginning of the buffer, so we don't need to add the
 181                          * sg_offset.
 182                          */
 183                         page_offset = ((unsigned long)sg_vaddr &
 184                                 (PAGE_SIZE - 1)) +
 185                                 (page_address(page) - page_address(head_page));
 186
 187                         skb_add_rx_frag(skb, i - 1, head_page, page_offset,
 188                                         sg_length, priv->rx_buf_size);
 189                 }
 190
 191                 if (dpaa2_sg_is_final(sge))
 192                         break;
 193         }
 194
 195         WARN_ONCE(i == DPAA2_ETH_MAX_SG_ENTRIES, "Final bit not set in SGT");
 196
 197         /* Count all data buffers + SG table buffer */
 198         ch->buf_count -= i + 2;
 199
 200         return skb;
 201 }
 202
 203 /* Free buffers acquired from the buffer pool or which were meant to
 204  * be released in the pool
 205  */
 206 static void free_bufs(struct dpaa2_eth_priv *priv, u64 *buf_array, int count)
 207 {
 208         struct device *dev = priv->net_dev->dev.parent;
 209         void *vaddr;
 210         int i;
 211
 212         for (i = 0; i < count; i++) {
 213                 vaddr = dpaa2_iova_to_virt(priv->iommu_domain, buf_array[i]);
 214                 dma_unmap_page(dev, buf_array[i], priv->rx_buf_size,
 215                                DMA_BIDIRECTIONAL);
 216                 free_pages((unsigned long)vaddr, 0);
 217         }
 218 }
 219
 220 static void xdp_release_buf(struct dpaa2_eth_priv *priv,
 221                             struct dpaa2_eth_channel *ch,
 222                             dma_addr_t addr)
 223 {
 224         int retries = 0;
 225         int err;
 226
 227         ch->xdp.drop_bufs[ch->xdp.drop_cnt++] = addr;
 228         if (ch->xdp.drop_cnt < DPAA2_ETH_BUFS_PER_CMD)
 229                 return;
 230
 231         while ((err = dpaa2_io_service_release(ch->dpio, priv->bpid,
 232                                                ch->xdp.drop_bufs,
 233                                                ch->xdp.drop_cnt)) == -EBUSY) {
 234                 if (retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES)
 235                         break;
 236                 cpu_relax();
 237         }
 238
 239         if (err) {
 240                 free_bufs(priv, ch->xdp.drop_bufs, ch->xdp.drop_cnt);
 241                 ch->buf_count -= ch->xdp.drop_cnt;
 242         }
 243
 244         ch->xdp.drop_cnt = 0;
 245 }
 246
 247 static int dpaa2_eth_xdp_flush(struct dpaa2_eth_priv *priv,
 248                                struct dpaa2_eth_fq *fq,
 249                                struct dpaa2_eth_xdp_fds *xdp_fds)
 250 {
 251         int total_enqueued = 0, retries = 0, enqueued;
 252         struct dpaa2_eth_drv_stats *percpu_extras;
 253         int num_fds, err, max_retries;
 254         struct dpaa2_fd *fds;
 255
 256         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 257
 258         /* try to enqueue all the FDs until the max number of retries is hit */
 259         fds = xdp_fds->fds;
 260         num_fds = xdp_fds->num;
 261         max_retries = num_fds * DPAA2_ETH_ENQUEUE_RETRIES;
 262         while (total_enqueued < num_fds && retries < max_retries) {
 263                 err = priv->enqueue(priv, fq, &fds[total_enqueued],
 264                                     0, num_fds - total_enqueued, &enqueued);
 265                 if (err == -EBUSY) {
 266                         percpu_extras->tx_portal_busy += ++retries;
 267                         continue;
 268                 }
 269                 total_enqueued += enqueued;
 270         }
 271         xdp_fds->num = 0;
 272
 273         return total_enqueued;
 274 }
 275
 276 static void xdp_tx_flush(struct dpaa2_eth_priv *priv,
 277                          struct dpaa2_eth_channel *ch,
 278                          struct dpaa2_eth_fq *fq)
 279 {
 280         struct rtnl_link_stats64 *percpu_stats;
 281         struct dpaa2_fd *fds;
 282         int enqueued, i;
 283
 284         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 285
 286         // enqueue the array of XDP_TX frames
 287         enqueued = dpaa2_eth_xdp_flush(priv, fq, &fq->xdp_tx_fds);
 288
 289         /* update statistics */
 290         percpu_stats->tx_packets += enqueued;
 291         fds = fq->xdp_tx_fds.fds;
 292         for (i = 0; i < enqueued; i++) {
 293                 percpu_stats->tx_bytes += dpaa2_fd_get_len(&fds[i]);
 294                 ch->stats.xdp_tx++;
 295         }
 296         for (i = enqueued; i < fq->xdp_tx_fds.num; i++) {
 297                 xdp_release_buf(priv, ch, dpaa2_fd_get_addr(&fds[i]));
 298                 percpu_stats->tx_errors++;
 299                 ch->stats.xdp_tx_err++;
 300         }
 301         fq->xdp_tx_fds.num = 0;
 302 }
 303
 304 static void xdp_enqueue(struct dpaa2_eth_priv *priv,
 305                         struct dpaa2_eth_channel *ch,
 306                         struct dpaa2_fd *fd,
 307                         void *buf_start, u16 queue_id)
 308 {
 309         struct dpaa2_faead *faead;
 310         struct dpaa2_fd *dest_fd;
 311         struct dpaa2_eth_fq *fq;
 312         u32 ctrl, frc;
 313
 314         /* Mark the egress frame hardware annotation area as valid */
 315         frc = dpaa2_fd_get_frc(fd);
 316         dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
 317         dpaa2_fd_set_ctrl(fd, DPAA2_FD_CTRL_ASAL);
 318
 319         /* Instruct hardware to release the FD buffer directly into
 320          * the buffer pool once transmission is completed, instead of
 321          * sending a Tx confirmation frame to us
 322          */
 323         ctrl = DPAA2_FAEAD_A4V | DPAA2_FAEAD_A2V | DPAA2_FAEAD_EBDDV;
 324         faead = dpaa2_get_faead(buf_start, false);
 325         faead->ctrl = cpu_to_le32(ctrl);
 326         faead->conf_fqid = 0;
 327
 328         fq = &priv->fq[queue_id];
 329         dest_fd = &fq->xdp_tx_fds.fds[fq->xdp_tx_fds.num++];
 330         memcpy(dest_fd, fd, sizeof(*dest_fd));
 331
 332         if (fq->xdp_tx_fds.num < DEV_MAP_BULK_SIZE)
 333                 return;
 334
 335         xdp_tx_flush(priv, ch, fq);
 336 }
 337
 338 static u32 run_xdp(struct dpaa2_eth_priv *priv,
 339                    struct dpaa2_eth_channel *ch,
 340                    struct dpaa2_eth_fq *rx_fq,
 341                    struct dpaa2_fd *fd, void *vaddr)
 342 {
 343         dma_addr_t addr = dpaa2_fd_get_addr(fd);
 344         struct bpf_prog *xdp_prog;
 345         struct xdp_buff xdp;
 346         u32 xdp_act = XDP_PASS;
 347         int err;
 348
 349         rcu_read_lock();
 350
 351         xdp_prog = READ_ONCE(ch->xdp.prog);
 352         if (!xdp_prog)
 353                 goto out;
 354
 355         xdp.data = vaddr + dpaa2_fd_get_offset(fd);
 356         xdp.data_end = xdp.data + dpaa2_fd_get_len(fd);
 357         xdp.data_hard_start = xdp.data - XDP_PACKET_HEADROOM;
 358         xdp_set_data_meta_invalid(&xdp);
 359         xdp.rxq = &ch->xdp_rxq;
 360
 361         xdp.frame_sz = DPAA2_ETH_RX_BUF_RAW_SIZE -
 362                 (dpaa2_fd_get_offset(fd) - XDP_PACKET_HEADROOM);
 363
 364         xdp_act = bpf_prog_run_xdp(xdp_prog, &xdp);
 365
 366         /* xdp.data pointer may have changed */
 367         dpaa2_fd_set_offset(fd, xdp.data - vaddr);
 368         dpaa2_fd_set_len(fd, xdp.data_end - xdp.data);
 369
 370         switch (xdp_act) {
 371         case XDP_PASS:
 372                 break;
 373         case XDP_TX:
 374                 xdp_enqueue(priv, ch, fd, vaddr, rx_fq->flowid);
 375                 break;
 376         default:
 377                 bpf_warn_invalid_xdp_action(xdp_act);
 378                 /* fall through */
 379         case XDP_ABORTED:
 380                 trace_xdp_exception(priv->net_dev, xdp_prog, xdp_act);
 381                 /* fall through */
 382         case XDP_DROP:
 383                 xdp_release_buf(priv, ch, addr);
 384                 ch->stats.xdp_drop++;
 385                 break;
 386         case XDP_REDIRECT:
 387                 dma_unmap_page(priv->net_dev->dev.parent, addr,
 388                                priv->rx_buf_size, DMA_BIDIRECTIONAL);
 389                 ch->buf_count--;
 390
 391                 /* Allow redirect use of full headroom */
 392                 xdp.data_hard_start = vaddr;
 393                 xdp.frame_sz = DPAA2_ETH_RX_BUF_RAW_SIZE;
 394
 395                 err = xdp_do_redirect(priv->net_dev, &xdp, xdp_prog);
 396                 if (unlikely(err))
 397                         ch->stats.xdp_drop++;
 398                 else
 399                         ch->stats.xdp_redirect++;
 400                 break;
 401         }
 402
 403         ch->xdp.res |= xdp_act;
 404 out:
 405         rcu_read_unlock();
 406         return xdp_act;
 407 }
 408
 409 /* Main Rx frame processing routine */
 410 static void dpaa2_eth_rx(struct dpaa2_eth_priv *priv,
 411                          struct dpaa2_eth_channel *ch,
 412                          const struct dpaa2_fd *fd,
 413                          struct dpaa2_eth_fq *fq)
 414 {
 415         dma_addr_t addr = dpaa2_fd_get_addr(fd);
 416         u8 fd_format = dpaa2_fd_get_format(fd);
 417         void *vaddr;
 418         struct sk_buff *skb;
 419         struct rtnl_link_stats64 *percpu_stats;
 420         struct dpaa2_eth_drv_stats *percpu_extras;
 421         struct device *dev = priv->net_dev->dev.parent;
 422         struct dpaa2_fas *fas;
 423         void *buf_data;
 424         u32 status = 0;
 425         u32 xdp_act;
 426
 427         /* Tracing point */
 428         trace_dpaa2_rx_fd(priv->net_dev, fd);
 429
 430         vaddr = dpaa2_iova_to_virt(priv->iommu_domain, addr);
 431         dma_sync_single_for_cpu(dev, addr, priv->rx_buf_size,
 432                                 DMA_BIDIRECTIONAL);
 433
 434         fas = dpaa2_get_fas(vaddr, false);
 435         prefetch(fas);
 436         buf_data = vaddr + dpaa2_fd_get_offset(fd);
 437         prefetch(buf_data);
 438
 439         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 440         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 441
 442         if (fd_format == dpaa2_fd_single) {
 443                 xdp_act = run_xdp(priv, ch, fq, (struct dpaa2_fd *)fd, vaddr);
 444                 if (xdp_act != XDP_PASS) {
 445                         percpu_stats->rx_packets++;
 446                         percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
 447                         return;
 448                 }
 449
 450                 dma_unmap_page(dev, addr, priv->rx_buf_size,
 451                                DMA_BIDIRECTIONAL);
 452                 skb = build_linear_skb(ch, fd, vaddr);
 453         } else if (fd_format == dpaa2_fd_sg) {
 454                 WARN_ON(priv->xdp_prog);
 455
 456                 dma_unmap_page(dev, addr, priv->rx_buf_size,
 457                                DMA_BIDIRECTIONAL);
 458                 skb = build_frag_skb(priv, ch, buf_data);
 459                 free_pages((unsigned long)vaddr, 0);
 460                 percpu_extras->rx_sg_frames++;
 461                 percpu_extras->rx_sg_bytes += dpaa2_fd_get_len(fd);
 462         } else {
 463                 /* We don't support any other format */
 464                 goto err_frame_format;
 465         }
 466
 467         if (unlikely(!skb))
 468                 goto err_build_skb;
 469
 470         prefetch(skb->data);
 471
 472         /* Get the timestamp value */
 473         if (priv->rx_tstamp) {
 474                 struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
 475                 __le64 *ts = dpaa2_get_ts(vaddr, false);
 476                 u64 ns;
 477
 478                 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
 479
 480                 ns = DPAA2_PTP_CLK_PERIOD_NS * le64_to_cpup(ts);
 481                 shhwtstamps->hwtstamp = ns_to_ktime(ns);
 482         }
 483
 484         /* Check if we need to validate the L4 csum */
 485         if (likely(dpaa2_fd_get_frc(fd) & DPAA2_FD_FRC_FASV)) {
 486                 status = le32_to_cpu(fas->status);
 487                 validate_rx_csum(priv, status, skb);
 488         }
 489
 490         skb->protocol = eth_type_trans(skb, priv->net_dev);
 491         skb_record_rx_queue(skb, fq->flowid);
 492
 493         percpu_stats->rx_packets++;
 494         percpu_stats->rx_bytes += dpaa2_fd_get_len(fd);
 495
 496         list_add_tail(&skb->list, ch->rx_list);
 497
 498         return;
 499
 500 err_build_skb:
 501         free_rx_fd(priv, fd, vaddr);
 502 err_frame_format:
 503         percpu_stats->rx_dropped++;
 504 }
 505
 506 /* Consume all frames pull-dequeued into the store. This is the simplest way to
 507  * make sure we don't accidentally issue another volatile dequeue which would
 508  * overwrite (leak) frames already in the store.
 509  *
 510  * Observance of NAPI budget is not our concern, leaving that to the caller.
 511  */
 512 static int consume_frames(struct dpaa2_eth_channel *ch,
 513                           struct dpaa2_eth_fq **src)
 514 {
 515         struct dpaa2_eth_priv *priv = ch->priv;
 516         struct dpaa2_eth_fq *fq = NULL;
 517         struct dpaa2_dq *dq;
 518         const struct dpaa2_fd *fd;
 519         int cleaned = 0, retries = 0;
 520         int is_last;
 521
 522         do {
 523                 dq = dpaa2_io_store_next(ch->store, &is_last);
 524                 if (unlikely(!dq)) {
 525                         /* If we're here, we *must* have placed a
 526                          * volatile dequeue comnmand, so keep reading through
 527                          * the store until we get some sort of valid response
 528                          * token (either a valid frame or an "empty dequeue")
 529                          */
 530                         if (retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES) {
 531                                 netdev_err_once(priv->net_dev,
 532                                                 "Unable to read a valid dequeue response\n");
 533                                 return -ETIMEDOUT;
 534                         }
 535                         continue;
 536                 }
 537
 538                 fd = dpaa2_dq_fd(dq);
 539                 fq = (struct dpaa2_eth_fq *)(uintptr_t)dpaa2_dq_fqd_ctx(dq);
 540
 541                 fq->consume(priv, ch, fd, fq);
 542                 cleaned++;
 543                 retries = 0;
 544         } while (!is_last);
 545
 546         if (!cleaned)
 547                 return 0;
 548
 549         fq->stats.frames += cleaned;
 550         ch->stats.frames += cleaned;
 551
 552         /* A dequeue operation only pulls frames from a single queue
 553          * into the store. Return the frame queue as an out param.
 554          */
 555         if (src)
 556                 *src = fq;
 557
 558         return cleaned;
 559 }
 560
 561 /* Configure the egress frame annotation for timestamp update */
 562 static void enable_tx_tstamp(struct dpaa2_fd *fd, void *buf_start)
 563 {
 564         struct dpaa2_faead *faead;
 565         u32 ctrl, frc;
 566
 567         /* Mark the egress frame annotation area as valid */
 568         frc = dpaa2_fd_get_frc(fd);
 569         dpaa2_fd_set_frc(fd, frc | DPAA2_FD_FRC_FAEADV);
 570
 571         /* Set hardware annotation size */
 572         ctrl = dpaa2_fd_get_ctrl(fd);
 573         dpaa2_fd_set_ctrl(fd, ctrl | DPAA2_FD_CTRL_ASAL);
 574
 575         /* enable UPD (update prepanded data) bit in FAEAD field of
 576          * hardware frame annotation area
 577          */
 578         ctrl = DPAA2_FAEAD_A2V | DPAA2_FAEAD_UPDV | DPAA2_FAEAD_UPD;
 579         faead = dpaa2_get_faead(buf_start, true);
 580         faead->ctrl = cpu_to_le32(ctrl);
 581 }
 582
 583 /* Create a frame descriptor based on a fragmented skb */
 584 static int build_sg_fd(struct dpaa2_eth_priv *priv,
 585                        struct sk_buff *skb,
 586                        struct dpaa2_fd *fd)
 587 {
 588         struct device *dev = priv->net_dev->dev.parent;
 589         void *sgt_buf = NULL;
 590         dma_addr_t addr;
 591         int nr_frags = skb_shinfo(skb)->nr_frags;
 592         struct dpaa2_sg_entry *sgt;
 593         int i, err;
 594         int sgt_buf_size;
 595         struct scatterlist *scl, *crt_scl;
 596         int num_sg;
 597         int num_dma_bufs;
 598         struct dpaa2_eth_swa *swa;
 599
 600         /* Create and map scatterlist.
 601          * We don't advertise NETIF_F_FRAGLIST, so skb_to_sgvec() will not have
 602          * to go beyond nr_frags+1.
 603          * Note: We don't support chained scatterlists
 604          */
 605         if (unlikely(PAGE_SIZE / sizeof(struct scatterlist) < nr_frags + 1))
 606                 return -EINVAL;
 607
 608         scl = kcalloc(nr_frags + 1, sizeof(struct scatterlist), GFP_ATOMIC);
 609         if (unlikely(!scl))
 610                 return -ENOMEM;
 611
 612         sg_init_table(scl, nr_frags + 1);
 613         num_sg = skb_to_sgvec(skb, scl, 0, skb->len);
 614         num_dma_bufs = dma_map_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 615         if (unlikely(!num_dma_bufs)) {
 616                 err = -ENOMEM;
 617                 goto dma_map_sg_failed;
 618         }
 619
 620         /* Prepare the HW SGT structure */
 621         sgt_buf_size = priv->tx_data_offset +
 622                        sizeof(struct dpaa2_sg_entry) *  num_dma_bufs;
 623         sgt_buf = napi_alloc_frag(sgt_buf_size + DPAA2_ETH_TX_BUF_ALIGN);
 624         if (unlikely(!sgt_buf)) {
 625                 err = -ENOMEM;
 626                 goto sgt_buf_alloc_failed;
 627         }
 628         sgt_buf = PTR_ALIGN(sgt_buf, DPAA2_ETH_TX_BUF_ALIGN);
 629         memset(sgt_buf, 0, sgt_buf_size);
 630
 631         sgt = (struct dpaa2_sg_entry *)(sgt_buf + priv->tx_data_offset);
 632
 633         /* Fill in the HW SGT structure.
 634          *
 635          * sgt_buf is zeroed out, so the following fields are implicit
 636          * in all sgt entries:
 637          *   - offset is 0
 638          *   - format is 'dpaa2_sg_single'
 639          */
 640         for_each_sg(scl, crt_scl, num_dma_bufs, i) {
 641                 dpaa2_sg_set_addr(&sgt[i], sg_dma_address(crt_scl));
 642                 dpaa2_sg_set_len(&sgt[i], sg_dma_len(crt_scl));
 643         }
 644         dpaa2_sg_set_final(&sgt[i - 1], true);
 645
 646         /* Store the skb backpointer in the SGT buffer.
 647          * Fit the scatterlist and the number of buffers alongside the
 648          * skb backpointer in the software annotation area. We'll need
 649          * all of them on Tx Conf.
 650          */
 651         swa = (struct dpaa2_eth_swa *)sgt_buf;
 652         swa->type = DPAA2_ETH_SWA_SG;
 653         swa->sg.skb = skb;
 654         swa->sg.scl = scl;
 655         swa->sg.num_sg = num_sg;
 656         swa->sg.sgt_size = sgt_buf_size;
 657
 658         /* Separately map the SGT buffer */
 659         addr = dma_map_single(dev, sgt_buf, sgt_buf_size, DMA_BIDIRECTIONAL);
 660         if (unlikely(dma_mapping_error(dev, addr))) {
 661                 err = -ENOMEM;
 662                 goto dma_map_single_failed;
 663         }
 664         dpaa2_fd_set_offset(fd, priv->tx_data_offset);
 665         dpaa2_fd_set_format(fd, dpaa2_fd_sg);
 666         dpaa2_fd_set_addr(fd, addr);
 667         dpaa2_fd_set_len(fd, skb->len);
 668         dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
 669
 670         if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
 671                 enable_tx_tstamp(fd, sgt_buf);
 672
 673         return 0;
 674
 675 dma_map_single_failed:
 676         skb_free_frag(sgt_buf);
 677 sgt_buf_alloc_failed:
 678         dma_unmap_sg(dev, scl, num_sg, DMA_BIDIRECTIONAL);
 679 dma_map_sg_failed:
 680         kfree(scl);
 681         return err;
 682 }
 683
 684 /* Create a frame descriptor based on a linear skb */
 685 static int build_single_fd(struct dpaa2_eth_priv *priv,
 686                            struct sk_buff *skb,
 687                            struct dpaa2_fd *fd)
 688 {
 689         struct device *dev = priv->net_dev->dev.parent;
 690         u8 *buffer_start, *aligned_start;
 691         struct dpaa2_eth_swa *swa;
 692         dma_addr_t addr;
 693
 694         buffer_start = skb->data - dpaa2_eth_needed_headroom(priv, skb);
 695
 696         /* If there's enough room to align the FD address, do it.
 697          * It will help hardware optimize accesses.
 698          */
 699         aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
 700                                   DPAA2_ETH_TX_BUF_ALIGN);
 701         if (aligned_start >= skb->head)
 702                 buffer_start = aligned_start;
 703
 704         /* Store a backpointer to the skb at the beginning of the buffer
 705          * (in the private data area) such that we can release it
 706          * on Tx confirm
 707          */
 708         swa = (struct dpaa2_eth_swa *)buffer_start;
 709         swa->type = DPAA2_ETH_SWA_SINGLE;
 710         swa->single.skb = skb;
 711
 712         addr = dma_map_single(dev, buffer_start,
 713                               skb_tail_pointer(skb) - buffer_start,
 714                               DMA_BIDIRECTIONAL);
 715         if (unlikely(dma_mapping_error(dev, addr)))
 716                 return -ENOMEM;
 717
 718         dpaa2_fd_set_addr(fd, addr);
 719         dpaa2_fd_set_offset(fd, (u16)(skb->data - buffer_start));
 720         dpaa2_fd_set_len(fd, skb->len);
 721         dpaa2_fd_set_format(fd, dpaa2_fd_single);
 722         dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
 723
 724         if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)
 725                 enable_tx_tstamp(fd, buffer_start);
 726
 727         return 0;
 728 }
 729
 730 /* FD freeing routine on the Tx path
 731  *
 732  * DMA-unmap and free FD and possibly SGT buffer allocated on Tx. The skb
 733  * back-pointed to is also freed.
 734  * This can be called either from dpaa2_eth_tx_conf() or on the error path of
 735  * dpaa2_eth_tx().
 736  */
 737 static void free_tx_fd(const struct dpaa2_eth_priv *priv,
 738                        struct dpaa2_eth_fq *fq,
 739                        const struct dpaa2_fd *fd, bool in_napi)
 740 {
 741         struct device *dev = priv->net_dev->dev.parent;
 742         dma_addr_t fd_addr;
 743         struct sk_buff *skb = NULL;
 744         unsigned char *buffer_start;
 745         struct dpaa2_eth_swa *swa;
 746         u8 fd_format = dpaa2_fd_get_format(fd);
 747         u32 fd_len = dpaa2_fd_get_len(fd);
 748
 749         fd_addr = dpaa2_fd_get_addr(fd);
 750         buffer_start = dpaa2_iova_to_virt(priv->iommu_domain, fd_addr);
 751         swa = (struct dpaa2_eth_swa *)buffer_start;
 752
 753         if (fd_format == dpaa2_fd_single) {
 754                 if (swa->type == DPAA2_ETH_SWA_SINGLE) {
 755                         skb = swa->single.skb;
 756                         /* Accessing the skb buffer is safe before dma unmap,
 757                          * because we didn't map the actual skb shell.
 758                          */
 759                         dma_unmap_single(dev, fd_addr,
 760                                          skb_tail_pointer(skb) - buffer_start,
 761                                          DMA_BIDIRECTIONAL);
 762                 } else {
 763                         WARN_ONCE(swa->type != DPAA2_ETH_SWA_XDP, "Wrong SWA type");
 764                         dma_unmap_single(dev, fd_addr, swa->xdp.dma_size,
 765                                          DMA_BIDIRECTIONAL);
 766                 }
 767         } else if (fd_format == dpaa2_fd_sg) {
 768                 skb = swa->sg.skb;
 769
 770                 /* Unmap the scatterlist */
 771                 dma_unmap_sg(dev, swa->sg.scl, swa->sg.num_sg,
 772                              DMA_BIDIRECTIONAL);
 773                 kfree(swa->sg.scl);
 774
 775                 /* Unmap the SGT buffer */
 776                 dma_unmap_single(dev, fd_addr, swa->sg.sgt_size,
 777                                  DMA_BIDIRECTIONAL);
 778         } else {
 779                 netdev_dbg(priv->net_dev, "Invalid FD format\n");
 780                 return;
 781         }
 782
 783         if (swa->type != DPAA2_ETH_SWA_XDP && in_napi) {
 784                 fq->dq_frames++;
 785                 fq->dq_bytes += fd_len;
 786         }
 787
 788         if (swa->type == DPAA2_ETH_SWA_XDP) {
 789                 xdp_return_frame(swa->xdp.xdpf);
 790                 return;
 791         }
 792
 793         /* Get the timestamp value */
 794         if (priv->tx_tstamp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
 795                 struct skb_shared_hwtstamps shhwtstamps;
 796                 __le64 *ts = dpaa2_get_ts(buffer_start, true);
 797                 u64 ns;
 798
 799                 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
 800
 801                 ns = DPAA2_PTP_CLK_PERIOD_NS * le64_to_cpup(ts);
 802                 shhwtstamps.hwtstamp = ns_to_ktime(ns);
 803                 skb_tstamp_tx(skb, &shhwtstamps);
 804         }
 805
 806         /* Free SGT buffer allocated on tx */
 807         if (fd_format != dpaa2_fd_single)
 808                 skb_free_frag(buffer_start);
 809
 810         /* Move on with skb release */
 811         napi_consume_skb(skb, in_napi);
 812 }
 813
 814 static netdev_tx_t dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev)
 815 {
 816         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
 817         struct dpaa2_fd fd;
 818         struct rtnl_link_stats64 *percpu_stats;
 819         struct dpaa2_eth_drv_stats *percpu_extras;
 820         struct dpaa2_eth_fq *fq;
 821         struct netdev_queue *nq;
 822         u16 queue_mapping;
 823         unsigned int needed_headroom;
 824         u32 fd_len;
 825         u8 prio = 0;
 826         int err, i;
 827
 828         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 829         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 830
 831         needed_headroom = dpaa2_eth_needed_headroom(priv, skb);
 832         if (skb_headroom(skb) < needed_headroom) {
 833                 struct sk_buff *ns;
 834
 835                 ns = skb_realloc_headroom(skb, needed_headroom);
 836                 if (unlikely(!ns)) {
 837                         percpu_stats->tx_dropped++;
 838                         goto err_alloc_headroom;
 839                 }
 840                 percpu_extras->tx_reallocs++;
 841
 842                 if (skb->sk)
 843                         skb_set_owner_w(ns, skb->sk);
 844
 845                 dev_kfree_skb(skb);
 846                 skb = ns;
 847         }
 848
 849         /* We'll be holding a back-reference to the skb until Tx Confirmation;
 850          * we don't want that overwritten by a concurrent Tx with a cloned skb.
 851          */
 852         skb = skb_unshare(skb, GFP_ATOMIC);
 853         if (unlikely(!skb)) {
 854                 /* skb_unshare() has already freed the skb */
 855                 percpu_stats->tx_dropped++;
 856                 return NETDEV_TX_OK;
 857         }
 858
 859         /* Setup the FD fields */
 860         memset(&fd, 0, sizeof(fd));
 861
 862         if (skb_is_nonlinear(skb)) {
 863                 err = build_sg_fd(priv, skb, &fd);
 864                 percpu_extras->tx_sg_frames++;
 865                 percpu_extras->tx_sg_bytes += skb->len;
 866         } else {
 867                 err = build_single_fd(priv, skb, &fd);
 868         }
 869
 870         if (unlikely(err)) {
 871                 percpu_stats->tx_dropped++;
 872                 goto err_build_fd;
 873         }
 874
 875         /* Tracing point */
 876         trace_dpaa2_tx_fd(net_dev, &fd);
 877
 878         /* TxConf FQ selection relies on queue id from the stack.
 879          * In case of a forwarded frame from another DPNI interface, we choose
 880          * a queue affined to the same core that processed the Rx frame
 881          */
 882         queue_mapping = skb_get_queue_mapping(skb);
 883
 884         if (net_dev->num_tc) {
 885                 prio = netdev_txq_to_tc(net_dev, queue_mapping);
 886                 /* Hardware interprets priority level 0 as being the highest,
 887                  * so we need to do a reverse mapping to the netdev tc index
 888                  */
 889                 prio = net_dev->num_tc - prio - 1;
 890                 /* We have only one FQ array entry for all Tx hardware queues
 891                  * with the same flow id (but different priority levels)
 892                  */
 893                 queue_mapping %= dpaa2_eth_queue_count(priv);
 894         }
 895         fq = &priv->fq[queue_mapping];
 896
 897         fd_len = dpaa2_fd_get_len(&fd);
 898         nq = netdev_get_tx_queue(net_dev, queue_mapping);
 899         netdev_tx_sent_queue(nq, fd_len);
 900
 901         /* Everything that happens after this enqueues might race with
 902          * the Tx confirmation callback for this frame
 903          */
 904         for (i = 0; i < DPAA2_ETH_ENQUEUE_RETRIES; i++) {
 905                 err = priv->enqueue(priv, fq, &fd, prio, 1, NULL);
 906                 if (err != -EBUSY)
 907                         break;
 908         }
 909         percpu_extras->tx_portal_busy += i;
 910         if (unlikely(err < 0)) {
 911                 percpu_stats->tx_errors++;
 912                 /* Clean up everything, including freeing the skb */
 913                 free_tx_fd(priv, fq, &fd, false);
 914                 netdev_tx_completed_queue(nq, 1, fd_len);
 915         } else {
 916                 percpu_stats->tx_packets++;
 917                 percpu_stats->tx_bytes += fd_len;
 918         }
 919
 920         return NETDEV_TX_OK;
 921
 922 err_build_fd:
 923 err_alloc_headroom:
 924         dev_kfree_skb(skb);
 925
 926         return NETDEV_TX_OK;
 927 }
 928
 929 /* Tx confirmation frame processing routine */
 930 static void dpaa2_eth_tx_conf(struct dpaa2_eth_priv *priv,
 931                               struct dpaa2_eth_channel *ch __always_unused,
 932                               const struct dpaa2_fd *fd,
 933                               struct dpaa2_eth_fq *fq)
 934 {
 935         struct rtnl_link_stats64 *percpu_stats;
 936         struct dpaa2_eth_drv_stats *percpu_extras;
 937         u32 fd_len = dpaa2_fd_get_len(fd);
 938         u32 fd_errors;
 939
 940         /* Tracing point */
 941         trace_dpaa2_tx_conf_fd(priv->net_dev, fd);
 942
 943         percpu_extras = this_cpu_ptr(priv->percpu_extras);
 944         percpu_extras->tx_conf_frames++;
 945         percpu_extras->tx_conf_bytes += fd_len;
 946
 947         /* Check frame errors in the FD field */
 948         fd_errors = dpaa2_fd_get_ctrl(fd) & DPAA2_FD_TX_ERR_MASK;
 949         free_tx_fd(priv, fq, fd, true);
 950
 951         if (likely(!fd_errors))
 952                 return;
 953
 954         if (net_ratelimit())
 955                 netdev_dbg(priv->net_dev, "TX frame FD error: 0x%08x\n",
 956                            fd_errors);
 957
 958         percpu_stats = this_cpu_ptr(priv->percpu_stats);
 959         /* Tx-conf logically pertains to the egress path. */
 960         percpu_stats->tx_errors++;
 961 }
 962
 963 static int set_rx_csum(struct dpaa2_eth_priv *priv, bool enable)
 964 {
 965         int err;
 966
 967         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 968                                DPNI_OFF_RX_L3_CSUM, enable);
 969         if (err) {
 970                 netdev_err(priv->net_dev,
 971                            "dpni_set_offload(RX_L3_CSUM) failed\n");
 972                 return err;
 973         }
 974
 975         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 976                                DPNI_OFF_RX_L4_CSUM, enable);
 977         if (err) {
 978                 netdev_err(priv->net_dev,
 979                            "dpni_set_offload(RX_L4_CSUM) failed\n");
 980                 return err;
 981         }
 982
 983         return 0;
 984 }
 985
 986 static int set_tx_csum(struct dpaa2_eth_priv *priv, bool enable)
 987 {
 988         int err;
 989
 990         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 991                                DPNI_OFF_TX_L3_CSUM, enable);
 992         if (err) {
 993                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L3_CSUM) failed\n");
 994                 return err;
 995         }
 996
 997         err = dpni_set_offload(priv->mc_io, 0, priv->mc_token,
 998                                DPNI_OFF_TX_L4_CSUM, enable);
 999         if (err) {
1000                 netdev_err(priv->net_dev, "dpni_set_offload(TX_L4_CSUM) failed\n");
1001                 return err;
1002         }
1003
1004         return 0;
1005 }
1006
1007 /* Perform a single release command to add buffers
1008  * to the specified buffer pool
1009  */
1010 static int add_bufs(struct dpaa2_eth_priv *priv,
1011                     struct dpaa2_eth_channel *ch, u16 bpid)
1012 {
1013         struct device *dev = priv->net_dev->dev.parent;
1014         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
1015         struct page *page;
1016         dma_addr_t addr;
1017         int retries = 0;
1018         int i, err;
1019
1020         for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) {
1021                 /* Allocate buffer visible to WRIOP + skb shared info +
1022                  * alignment padding
1023                  */
1024                 /* allocate one page for each Rx buffer. WRIOP sees
1025                  * the entire page except for a tailroom reserved for
1026                  * skb shared info
1027                  */
1028                 page = dev_alloc_pages(0);
1029                 if (!page)
1030                         goto err_alloc;
1031
1032                 addr = dma_map_page(dev, page, 0, priv->rx_buf_size,
1033                                     DMA_BIDIRECTIONAL);
1034                 if (unlikely(dma_mapping_error(dev, addr)))
1035                         goto err_map;
1036
1037                 buf_array[i] = addr;
1038
1039                 /* tracing point */
1040                 trace_dpaa2_eth_buf_seed(priv->net_dev,
1041                                          page, DPAA2_ETH_RX_BUF_RAW_SIZE,
1042                                          addr, priv->rx_buf_size,
1043                                          bpid);
1044         }
1045
1046 release_bufs:
1047         /* In case the portal is busy, retry until successful */
1048         while ((err = dpaa2_io_service_release(ch->dpio, bpid,
1049                                                buf_array, i)) == -EBUSY) {
1050                 if (retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES)
1051                         break;
1052                 cpu_relax();
1053         }
1054
1055         /* If release command failed, clean up and bail out;
1056          * not much else we can do about it
1057          */
1058         if (err) {
1059                 free_bufs(priv, buf_array, i);
1060                 return 0;
1061         }
1062
1063         return i;
1064
1065 err_map:
1066         __free_pages(page, 0);
1067 err_alloc:
1068         /* If we managed to allocate at least some buffers,
1069          * release them to hardware
1070          */
1071         if (i)
1072                 goto release_bufs;
1073
1074         return 0;
1075 }
1076
1077 static int seed_pool(struct dpaa2_eth_priv *priv, u16 bpid)
1078 {
1079         int i, j;
1080         int new_count;
1081
1082         for (j = 0; j < priv->num_channels; j++) {
1083                 for (i = 0; i < DPAA2_ETH_NUM_BUFS;
1084                      i += DPAA2_ETH_BUFS_PER_CMD) {
1085                         new_count = add_bufs(priv, priv->channel[j], bpid);
1086                         priv->channel[j]->buf_count += new_count;
1087
1088                         if (new_count < DPAA2_ETH_BUFS_PER_CMD) {
1089                                 return -ENOMEM;
1090                         }
1091                 }
1092         }
1093
1094         return 0;
1095 }
1096
1097 /**
1098  * Drain the specified number of buffers from the DPNI's private buffer pool.
1099  * @count must not exceeed DPAA2_ETH_BUFS_PER_CMD
1100  */
1101 static void drain_bufs(struct dpaa2_eth_priv *priv, int count)
1102 {
1103         u64 buf_array[DPAA2_ETH_BUFS_PER_CMD];
1104         int retries = 0;
1105         int ret;
1106
1107         do {
1108                 ret = dpaa2_io_service_acquire(NULL, priv->bpid,
1109                                                buf_array, count);
1110                 if (ret < 0) {
1111                         if (ret == -EBUSY &&
1112                             retries++ >= DPAA2_ETH_SWP_BUSY_RETRIES)
1113                                 continue;
1114                         netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n");
1115                         return;
1116                 }
1117                 free_bufs(priv, buf_array, ret);
1118                 retries = 0;
1119         } while (ret);
1120 }
1121
1122 static void drain_pool(struct dpaa2_eth_priv *priv)
1123 {
1124         int i;
1125
1126         drain_bufs(priv, DPAA2_ETH_BUFS_PER_CMD);
1127         drain_bufs(priv, 1);
1128
1129         for (i = 0; i < priv->num_channels; i++)
1130                 priv->channel[i]->buf_count = 0;
1131 }
1132
1133 /* Function is called from softirq context only, so we don't need to guard
1134  * the access to percpu count
1135  */
1136 static int refill_pool(struct dpaa2_eth_priv *priv,
1137                        struct dpaa2_eth_channel *ch,
1138                        u16 bpid)
1139 {
1140         int new_count;
1141
1142         if (likely(ch->buf_count >= DPAA2_ETH_REFILL_THRESH))
1143                 return 0;
1144
1145         do {
1146                 new_count = add_bufs(priv, ch, bpid);
1147                 if (unlikely(!new_count)) {
1148                         /* Out of memory; abort for now, we'll try later on */
1149                         break;
1150                 }
1151                 ch->buf_count += new_count;
1152         } while (ch->buf_count < DPAA2_ETH_NUM_BUFS);
1153
1154         if (unlikely(ch->buf_count < DPAA2_ETH_NUM_BUFS))
1155                 return -ENOMEM;
1156
1157         return 0;
1158 }
1159
1160 static int pull_channel(struct dpaa2_eth_channel *ch)
1161 {
1162         int err;
1163         int dequeues = -1;
1164
1165         /* Retry while portal is busy */
1166         do {
1167                 err = dpaa2_io_service_pull_channel(ch->dpio, ch->ch_id,
1168                                                     ch->store);
1169                 dequeues++;
1170                 cpu_relax();
1171         } while (err == -EBUSY && dequeues < DPAA2_ETH_SWP_BUSY_RETRIES);
1172
1173         ch->stats.dequeue_portal_busy += dequeues;
1174         if (unlikely(err))
1175                 ch->stats.pull_err++;
1176
1177         return err;
1178 }
1179
1180 /* NAPI poll routine
1181  *
1182  * Frames are dequeued from the QMan channel associated with this NAPI context.
1183  * Rx, Tx confirmation and (if configured) Rx error frames all count
1184  * towards the NAPI budget.
1185  */
1186 static int dpaa2_eth_poll(struct napi_struct *napi, int budget)
1187 {
1188         struct dpaa2_eth_channel *ch;
1189         struct dpaa2_eth_priv *priv;
1190         int rx_cleaned = 0, txconf_cleaned = 0;
1191         struct dpaa2_eth_fq *fq, *txc_fq = NULL;
1192         struct netdev_queue *nq;
1193         int store_cleaned, work_done;
1194         struct list_head rx_list;
1195         int retries = 0;
1196         u16 flowid;
1197         int err;
1198
1199         ch = container_of(napi, struct dpaa2_eth_channel, napi);
1200         ch->xdp.res = 0;
1201         priv = ch->priv;
1202
1203         INIT_LIST_HEAD(&rx_list);
1204         ch->rx_list = &rx_list;
1205
1206         do {
1207                 err = pull_channel(ch);
1208                 if (unlikely(err))
1209                         break;
1210
1211                 /* Refill pool if appropriate */
1212                 refill_pool(priv, ch, priv->bpid);
1213
1214                 store_cleaned = consume_frames(ch, &fq);
1215                 if (store_cleaned <= 0)
1216                         break;
1217                 if (fq->type == DPAA2_RX_FQ) {
1218                         rx_cleaned += store_cleaned;
1219                         flowid = fq->flowid;
1220                 } else {
1221                         txconf_cleaned += store_cleaned;
1222                         /* We have a single Tx conf FQ on this channel */
1223                         txc_fq = fq;
1224                 }
1225
1226                 /* If we either consumed the whole NAPI budget with Rx frames
1227                  * or we reached the Tx confirmations threshold, we're done.
1228                  */
1229                 if (rx_cleaned >= budget ||
1230                     txconf_cleaned >= DPAA2_ETH_TXCONF_PER_NAPI) {
1231                         work_done = budget;
1232                         goto out;
1233                 }
1234         } while (store_cleaned);
1235
1236         /* We didn't consume the entire budget, so finish napi and
1237          * re-enable data availability notifications
1238          */
1239         napi_complete_done(napi, rx_cleaned);
1240         do {
1241                 err = dpaa2_io_service_rearm(ch->dpio, &ch->nctx);
1242                 cpu_relax();
1243         } while (err == -EBUSY && retries++ < DPAA2_ETH_SWP_BUSY_RETRIES);
1244         WARN_ONCE(err, "CDAN notifications rearm failed on core %d",
1245                   ch->nctx.desired_cpu);
1246
1247         work_done = max(rx_cleaned, 1);
1248
1249 out:
1250         netif_receive_skb_list(ch->rx_list);
1251
1252         if (txc_fq && txc_fq->dq_frames) {
1253                 nq = netdev_get_tx_queue(priv->net_dev, txc_fq->flowid);
1254                 netdev_tx_completed_queue(nq, txc_fq->dq_frames,
1255                                           txc_fq->dq_bytes);
1256                 txc_fq->dq_frames = 0;
1257                 txc_fq->dq_bytes = 0;
1258         }
1259
1260         if (ch->xdp.res & XDP_REDIRECT)
1261                 xdp_do_flush_map();
1262         else if (rx_cleaned && ch->xdp.res & XDP_TX)
1263                 xdp_tx_flush(priv, ch, &priv->fq[flowid]);
1264
1265         return work_done;
1266 }
1267
1268 static void enable_ch_napi(struct dpaa2_eth_priv *priv)
1269 {
1270         struct dpaa2_eth_channel *ch;
1271         int i;
1272
1273         for (i = 0; i < priv->num_channels; i++) {
1274                 ch = priv->channel[i];
1275                 napi_enable(&ch->napi);
1276         }
1277 }
1278
1279 static void disable_ch_napi(struct dpaa2_eth_priv *priv)
1280 {
1281         struct dpaa2_eth_channel *ch;
1282         int i;
1283
1284         for (i = 0; i < priv->num_channels; i++) {
1285                 ch = priv->channel[i];
1286                 napi_disable(&ch->napi);
1287         }
1288 }
1289
1290 static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv, bool enable)
1291 {
1292         struct dpni_taildrop td = {0};
1293         struct dpaa2_eth_fq *fq;
1294         int i, err;
1295
1296         if (priv->rx_td_enabled == enable)
1297                 return;
1298
1299         td.enable = enable;
1300         td.threshold = DPAA2_ETH_TAILDROP_THRESH;
1301
1302         for (i = 0; i < priv->num_fqs; i++) {
1303                 fq = &priv->fq[i];
1304                 if (fq->type != DPAA2_RX_FQ)
1305                         continue;
1306                 err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token,
1307                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
1308                                         fq->tc, fq->flowid, &td);
1309                 if (err) {
1310                         netdev_err(priv->net_dev,
1311                                    "dpni_set_taildrop() failed\n");
1312                         break;
1313                 }
1314         }
1315
1316         priv->rx_td_enabled = enable;
1317 }
1318
1319 static int link_state_update(struct dpaa2_eth_priv *priv)
1320 {
1321         struct dpni_link_state state = {0};
1322         bool tx_pause;
1323         int err;
1324
1325         err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state);
1326         if (unlikely(err)) {
1327                 netdev_err(priv->net_dev,
1328                            "dpni_get_link_state() failed\n");
1329                 return err;
1330         }
1331
1332         /* If Tx pause frame settings have changed, we need to update
1333          * Rx FQ taildrop configuration as well. We configure taildrop
1334          * only when pause frame generation is disabled.
1335          */
1336         tx_pause = dpaa2_eth_tx_pause_enabled(state.options);
1337         dpaa2_eth_set_rx_taildrop(priv, !tx_pause);
1338
1339         /* When we manage the MAC/PHY using phylink there is no need
1340          * to manually update the netif_carrier.
1341          */
1342         if (priv->mac)
1343                 goto out;
1344
1345         /* Chech link state; speed / duplex changes are not treated yet */
1346         if (priv->link_state.up == state.up)
1347                 goto out;
1348
1349         if (state.up) {
1350                 netif_carrier_on(priv->net_dev);
1351                 netif_tx_start_all_queues(priv->net_dev);
1352         } else {
1353                 netif_tx_stop_all_queues(priv->net_dev);
1354                 netif_carrier_off(priv->net_dev);
1355         }
1356
1357         netdev_info(priv->net_dev, "Link Event: state %s\n",
1358                     state.up ? "up" : "down");
1359
1360 out:
1361         priv->link_state = state;
1362
1363         return 0;
1364 }
1365
1366 static int dpaa2_eth_open(struct net_device *net_dev)
1367 {
1368         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1369         int err;
1370
1371         err = seed_pool(priv, priv->bpid);
1372         if (err) {
1373                 /* Not much to do; the buffer pool, though not filled up,
1374                  * may still contain some buffers which would enable us
1375                  * to limp on.
1376                  */
1377                 netdev_err(net_dev, "Buffer seeding failed for DPBP %d (bpid=%d)\n",
1378                            priv->dpbp_dev->obj_desc.id, priv->bpid);
1379         }
1380
1381         if (!priv->mac) {
1382                 /* We'll only start the txqs when the link is actually ready;
1383                  * make sure we don't race against the link up notification,
1384                  * which may come immediately after dpni_enable();
1385                  */
1386                 netif_tx_stop_all_queues(net_dev);
1387
1388                 /* Also, explicitly set carrier off, otherwise
1389                  * netif_carrier_ok() will return true and cause 'ip link show'
1390                  * to report the LOWER_UP flag, even though the link
1391                  * notification wasn't even received.
1392                  */
1393                 netif_carrier_off(net_dev);
1394         }
1395         enable_ch_napi(priv);
1396
1397         err = dpni_enable(priv->mc_io, 0, priv->mc_token);
1398         if (err < 0) {
1399                 netdev_err(net_dev, "dpni_enable() failed\n");
1400                 goto enable_err;
1401         }
1402
1403         if (!priv->mac) {
1404                 /* If the DPMAC object has already processed the link up
1405                  * interrupt, we have to learn the link state ourselves.
1406                  */
1407                 err = link_state_update(priv);
1408                 if (err < 0) {
1409                         netdev_err(net_dev, "Can't update link state\n");
1410                         goto link_state_err;
1411                 }
1412         } else {
1413                 phylink_start(priv->mac->phylink);
1414         }
1415
1416         return 0;
1417
1418 link_state_err:
1419 enable_err:
1420         disable_ch_napi(priv);
1421         drain_pool(priv);
1422         return err;
1423 }
1424
1425 /* Total number of in-flight frames on ingress queues */
1426 static u32 ingress_fq_count(struct dpaa2_eth_priv *priv)
1427 {
1428         struct dpaa2_eth_fq *fq;
1429         u32 fcnt = 0, bcnt = 0, total = 0;
1430         int i, err;
1431
1432         for (i = 0; i < priv->num_fqs; i++) {
1433                 fq = &priv->fq[i];
1434                 err = dpaa2_io_query_fq_count(NULL, fq->fqid, &fcnt, &bcnt);
1435                 if (err) {
1436                         netdev_warn(priv->net_dev, "query_fq_count failed");
1437                         break;
1438                 }
1439                 total += fcnt;
1440         }
1441
1442         return total;
1443 }
1444
1445 static void wait_for_ingress_fq_empty(struct dpaa2_eth_priv *priv)
1446 {
1447         int retries = 10;
1448         u32 pending;
1449
1450         do {
1451                 pending = ingress_fq_count(priv);
1452                 if (pending)
1453                         msleep(100);
1454         } while (pending && --retries);
1455 }
1456
1457 #define DPNI_TX_PENDING_VER_MAJOR       7
1458 #define DPNI_TX_PENDING_VER_MINOR       13
1459 static void wait_for_egress_fq_empty(struct dpaa2_eth_priv *priv)
1460 {
1461         union dpni_statistics stats;
1462         int retries = 10;
1463         int err;
1464
1465         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_TX_PENDING_VER_MAJOR,
1466                                    DPNI_TX_PENDING_VER_MINOR) < 0)
1467                 goto out;
1468
1469         do {
1470                 err = dpni_get_statistics(priv->mc_io, 0, priv->mc_token, 6,
1471                                           &stats);
1472                 if (err)
1473                         goto out;
1474                 if (stats.page_6.tx_pending_frames == 0)
1475                         return;
1476         } while (--retries);
1477
1478 out:
1479         msleep(500);
1480 }
1481
1482 static int dpaa2_eth_stop(struct net_device *net_dev)
1483 {
1484         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1485         int dpni_enabled = 0;
1486         int retries = 10;
1487
1488         if (!priv->mac) {
1489                 netif_tx_stop_all_queues(net_dev);
1490                 netif_carrier_off(net_dev);
1491         } else {
1492                 phylink_stop(priv->mac->phylink);
1493         }
1494
1495         /* On dpni_disable(), the MC firmware will:
1496          * - stop MAC Rx and wait for all Rx frames to be enqueued to software
1497          * - cut off WRIOP dequeues from egress FQs and wait until transmission
1498          * of all in flight Tx frames is finished (and corresponding Tx conf
1499          * frames are enqueued back to software)
1500          *
1501          * Before calling dpni_disable(), we wait for all Tx frames to arrive
1502          * on WRIOP. After it finishes, wait until all remaining frames on Rx
1503          * and Tx conf queues are consumed on NAPI poll.
1504          */
1505         wait_for_egress_fq_empty(priv);
1506
1507         do {
1508                 dpni_disable(priv->mc_io, 0, priv->mc_token);
1509                 dpni_is_enabled(priv->mc_io, 0, priv->mc_token, &dpni_enabled);
1510                 if (dpni_enabled)
1511                         /* Allow the hardware some slack */
1512                         msleep(100);
1513         } while (dpni_enabled && --retries);
1514         if (!retries) {
1515                 netdev_warn(net_dev, "Retry count exceeded disabling DPNI\n");
1516                 /* Must go on and disable NAPI nonetheless, so we don't crash at
1517                  * the next "ifconfig up"
1518                  */
1519         }
1520
1521         wait_for_ingress_fq_empty(priv);
1522         disable_ch_napi(priv);
1523
1524         /* Empty the buffer pool */
1525         drain_pool(priv);
1526
1527         return 0;
1528 }
1529
1530 static int dpaa2_eth_set_addr(struct net_device *net_dev, void *addr)
1531 {
1532         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1533         struct device *dev = net_dev->dev.parent;
1534         int err;
1535
1536         err = eth_mac_addr(net_dev, addr);
1537         if (err < 0) {
1538                 dev_err(dev, "eth_mac_addr() failed (%d)\n", err);
1539                 return err;
1540         }
1541
1542         err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
1543                                         net_dev->dev_addr);
1544         if (err) {
1545                 dev_err(dev, "dpni_set_primary_mac_addr() failed (%d)\n", err);
1546                 return err;
1547         }
1548
1549         return 0;
1550 }
1551
1552 /** Fill in counters maintained by the GPP driver. These may be different from
1553  * the hardware counters obtained by ethtool.
1554  */
1555 static void dpaa2_eth_get_stats(struct net_device *net_dev,
1556                                 struct rtnl_link_stats64 *stats)
1557 {
1558         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1559         struct rtnl_link_stats64 *percpu_stats;
1560         u64 *cpustats;
1561         u64 *netstats = (u64 *)stats;
1562         int i, j;
1563         int num = sizeof(struct rtnl_link_stats64) / sizeof(u64);
1564
1565         for_each_possible_cpu(i) {
1566                 percpu_stats = per_cpu_ptr(priv->percpu_stats, i);
1567                 cpustats = (u64 *)percpu_stats;
1568                 for (j = 0; j < num; j++)
1569                         netstats[j] += cpustats[j];
1570         }
1571 }
1572
1573 /* Copy mac unicast addresses from @net_dev to @priv.
1574  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1575  */
1576 static void add_uc_hw_addr(const struct net_device *net_dev,
1577                            struct dpaa2_eth_priv *priv)
1578 {
1579         struct netdev_hw_addr *ha;
1580         int err;
1581
1582         netdev_for_each_uc_addr(ha, net_dev) {
1583                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1584                                         ha->addr);
1585                 if (err)
1586                         netdev_warn(priv->net_dev,
1587                                     "Could not add ucast MAC %pM to the filtering table (err %d)\n",
1588                                     ha->addr, err);
1589         }
1590 }
1591
1592 /* Copy mac multicast addresses from @net_dev to @priv
1593  * Its sole purpose is to make dpaa2_eth_set_rx_mode() more readable.
1594  */
1595 static void add_mc_hw_addr(const struct net_device *net_dev,
1596                            struct dpaa2_eth_priv *priv)
1597 {
1598         struct netdev_hw_addr *ha;
1599         int err;
1600
1601         netdev_for_each_mc_addr(ha, net_dev) {
1602                 err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token,
1603                                         ha->addr);
1604                 if (err)
1605                         netdev_warn(priv->net_dev,
1606                                     "Could not add mcast MAC %pM to the filtering table (err %d)\n",
1607                                     ha->addr, err);
1608         }
1609 }
1610
1611 static void dpaa2_eth_set_rx_mode(struct net_device *net_dev)
1612 {
1613         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1614         int uc_count = netdev_uc_count(net_dev);
1615         int mc_count = netdev_mc_count(net_dev);
1616         u8 max_mac = priv->dpni_attrs.mac_filter_entries;
1617         u32 options = priv->dpni_attrs.options;
1618         u16 mc_token = priv->mc_token;
1619         struct fsl_mc_io *mc_io = priv->mc_io;
1620         int err;
1621
1622         /* Basic sanity checks; these probably indicate a misconfiguration */
1623         if (options & DPNI_OPT_NO_MAC_FILTER && max_mac != 0)
1624                 netdev_info(net_dev,
1625                             "mac_filter_entries=%d, DPNI_OPT_NO_MAC_FILTER option must be disabled\n",
1626                             max_mac);
1627
1628         /* Force promiscuous if the uc or mc counts exceed our capabilities. */
1629         if (uc_count > max_mac) {
1630                 netdev_info(net_dev,
1631                             "Unicast addr count reached %d, max allowed is %d; forcing promisc\n",
1632                             uc_count, max_mac);
1633                 goto force_promisc;
1634         }
1635         if (mc_count + uc_count > max_mac) {
1636                 netdev_info(net_dev,
1637                             "Unicast + multicast addr count reached %d, max allowed is %d; forcing promisc\n",
1638                             uc_count + mc_count, max_mac);
1639                 goto force_mc_promisc;
1640         }
1641
1642         /* Adjust promisc settings due to flag combinations */
1643         if (net_dev->flags & IFF_PROMISC)
1644                 goto force_promisc;
1645         if (net_dev->flags & IFF_ALLMULTI) {
1646                 /* First, rebuild unicast filtering table. This should be done
1647                  * in promisc mode, in order to avoid frame loss while we
1648                  * progressively add entries to the table.
1649                  * We don't know whether we had been in promisc already, and
1650                  * making an MC call to find out is expensive; so set uc promisc
1651                  * nonetheless.
1652                  */
1653                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1654                 if (err)
1655                         netdev_warn(net_dev, "Can't set uc promisc\n");
1656
1657                 /* Actual uc table reconstruction. */
1658                 err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 0);
1659                 if (err)
1660                         netdev_warn(net_dev, "Can't clear uc filters\n");
1661                 add_uc_hw_addr(net_dev, priv);
1662
1663                 /* Finally, clear uc promisc and set mc promisc as requested. */
1664                 err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1665                 if (err)
1666                         netdev_warn(net_dev, "Can't clear uc promisc\n");
1667                 goto force_mc_promisc;
1668         }
1669
1670         /* Neither unicast, nor multicast promisc will be on... eventually.
1671          * For now, rebuild mac filtering tables while forcing both of them on.
1672          */
1673         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1674         if (err)
1675                 netdev_warn(net_dev, "Can't set uc promisc (%d)\n", err);
1676         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1677         if (err)
1678                 netdev_warn(net_dev, "Can't set mc promisc (%d)\n", err);
1679
1680         /* Actual mac filtering tables reconstruction */
1681         err = dpni_clear_mac_filters(mc_io, 0, mc_token, 1, 1);
1682         if (err)
1683                 netdev_warn(net_dev, "Can't clear mac filters\n");
1684         add_mc_hw_addr(net_dev, priv);
1685         add_uc_hw_addr(net_dev, priv);
1686
1687         /* Now we can clear both ucast and mcast promisc, without risking
1688          * to drop legitimate frames anymore.
1689          */
1690         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 0);
1691         if (err)
1692                 netdev_warn(net_dev, "Can't clear ucast promisc\n");
1693         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 0);
1694         if (err)
1695                 netdev_warn(net_dev, "Can't clear mcast promisc\n");
1696
1697         return;
1698
1699 force_promisc:
1700         err = dpni_set_unicast_promisc(mc_io, 0, mc_token, 1);
1701         if (err)
1702                 netdev_warn(net_dev, "Can't set ucast promisc\n");
1703 force_mc_promisc:
1704         err = dpni_set_multicast_promisc(mc_io, 0, mc_token, 1);
1705         if (err)
1706                 netdev_warn(net_dev, "Can't set mcast promisc\n");
1707 }
1708
1709 static int dpaa2_eth_set_features(struct net_device *net_dev,
1710                                   netdev_features_t features)
1711 {
1712         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1713         netdev_features_t changed = features ^ net_dev->features;
1714         bool enable;
1715         int err;
1716
1717         if (changed & NETIF_F_RXCSUM) {
1718                 enable = !!(features & NETIF_F_RXCSUM);
1719                 err = set_rx_csum(priv, enable);
1720                 if (err)
1721                         return err;
1722         }
1723
1724         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
1725                 enable = !!(features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
1726                 err = set_tx_csum(priv, enable);
1727                 if (err)
1728                         return err;
1729         }
1730
1731         return 0;
1732 }
1733
1734 static int dpaa2_eth_ts_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1735 {
1736         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1737         struct hwtstamp_config config;
1738
1739         if (copy_from_user(&config, rq->ifr_data, sizeof(config)))
1740                 return -EFAULT;
1741
1742         switch (config.tx_type) {
1743         case HWTSTAMP_TX_OFF:
1744                 priv->tx_tstamp = false;
1745                 break;
1746         case HWTSTAMP_TX_ON:
1747                 priv->tx_tstamp = true;
1748                 break;
1749         default:
1750                 return -ERANGE;
1751         }
1752
1753         if (config.rx_filter == HWTSTAMP_FILTER_NONE) {
1754                 priv->rx_tstamp = false;
1755         } else {
1756                 priv->rx_tstamp = true;
1757                 /* TS is set for all frame types, not only those requested */
1758                 config.rx_filter = HWTSTAMP_FILTER_ALL;
1759         }
1760
1761         return copy_to_user(rq->ifr_data, &config, sizeof(config)) ?
1762                         -EFAULT : 0;
1763 }
1764
1765 static int dpaa2_eth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1766 {
1767         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1768
1769         if (cmd == SIOCSHWTSTAMP)
1770                 return dpaa2_eth_ts_ioctl(dev, rq, cmd);
1771
1772         if (priv->mac)
1773                 return phylink_mii_ioctl(priv->mac->phylink, rq, cmd);
1774
1775         return -EOPNOTSUPP;
1776 }
1777
1778 static bool xdp_mtu_valid(struct dpaa2_eth_priv *priv, int mtu)
1779 {
1780         int mfl, linear_mfl;
1781
1782         mfl = DPAA2_ETH_L2_MAX_FRM(mtu);
1783         linear_mfl = priv->rx_buf_size - DPAA2_ETH_RX_HWA_SIZE -
1784                      dpaa2_eth_rx_head_room(priv) - XDP_PACKET_HEADROOM;
1785
1786         if (mfl > linear_mfl) {
1787                 netdev_warn(priv->net_dev, "Maximum MTU for XDP is %d\n",
1788                             linear_mfl - VLAN_ETH_HLEN);
1789                 return false;
1790         }
1791
1792         return true;
1793 }
1794
1795 static int set_rx_mfl(struct dpaa2_eth_priv *priv, int mtu, bool has_xdp)
1796 {
1797         int mfl, err;
1798
1799         /* We enforce a maximum Rx frame length based on MTU only if we have
1800          * an XDP program attached (in order to avoid Rx S/G frames).
1801          * Otherwise, we accept all incoming frames as long as they are not
1802          * larger than maximum size supported in hardware
1803          */
1804         if (has_xdp)
1805                 mfl = DPAA2_ETH_L2_MAX_FRM(mtu);
1806         else
1807                 mfl = DPAA2_ETH_MFL;
1808
1809         err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token, mfl);
1810         if (err) {
1811                 netdev_err(priv->net_dev, "dpni_set_max_frame_length failed\n");
1812                 return err;
1813         }
1814
1815         return 0;
1816 }
1817
1818 static int dpaa2_eth_change_mtu(struct net_device *dev, int new_mtu)
1819 {
1820         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1821         int err;
1822
1823         if (!priv->xdp_prog)
1824                 goto out;
1825
1826         if (!xdp_mtu_valid(priv, new_mtu))
1827                 return -EINVAL;
1828
1829         err = set_rx_mfl(priv, new_mtu, true);
1830         if (err)
1831                 return err;
1832
1833 out:
1834         dev->mtu = new_mtu;
1835         return 0;
1836 }
1837
1838 static int update_rx_buffer_headroom(struct dpaa2_eth_priv *priv, bool has_xdp)
1839 {
1840         struct dpni_buffer_layout buf_layout = {0};
1841         int err;
1842
1843         err = dpni_get_buffer_layout(priv->mc_io, 0, priv->mc_token,
1844                                      DPNI_QUEUE_RX, &buf_layout);
1845         if (err) {
1846                 netdev_err(priv->net_dev, "dpni_get_buffer_layout failed\n");
1847                 return err;
1848         }
1849
1850         /* Reserve extra headroom for XDP header size changes */
1851         buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv) +
1852                                     (has_xdp ? XDP_PACKET_HEADROOM : 0);
1853         buf_layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM;
1854         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
1855                                      DPNI_QUEUE_RX, &buf_layout);
1856         if (err) {
1857                 netdev_err(priv->net_dev, "dpni_set_buffer_layout failed\n");
1858                 return err;
1859         }
1860
1861         return 0;
1862 }
1863
1864 static int setup_xdp(struct net_device *dev, struct bpf_prog *prog)
1865 {
1866         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1867         struct dpaa2_eth_channel *ch;
1868         struct bpf_prog *old;
1869         bool up, need_update;
1870         int i, err;
1871
1872         if (prog && !xdp_mtu_valid(priv, dev->mtu))
1873                 return -EINVAL;
1874
1875         if (prog)
1876                 bpf_prog_add(prog, priv->num_channels);
1877
1878         up = netif_running(dev);
1879         need_update = (!!priv->xdp_prog != !!prog);
1880
1881         if (up)
1882                 dpaa2_eth_stop(dev);
1883
1884         /* While in xdp mode, enforce a maximum Rx frame size based on MTU.
1885          * Also, when switching between xdp/non-xdp modes we need to reconfigure
1886          * our Rx buffer layout. Buffer pool was drained on dpaa2_eth_stop,
1887          * so we are sure no old format buffers will be used from now on.
1888          */
1889         if (need_update) {
1890                 err = set_rx_mfl(priv, dev->mtu, !!prog);
1891                 if (err)
1892                         goto out_err;
1893                 err = update_rx_buffer_headroom(priv, !!prog);
1894                 if (err)
1895                         goto out_err;
1896         }
1897
1898         old = xchg(&priv->xdp_prog, prog);
1899         if (old)
1900                 bpf_prog_put(old);
1901
1902         for (i = 0; i < priv->num_channels; i++) {
1903                 ch = priv->channel[i];
1904                 old = xchg(&ch->xdp.prog, prog);
1905                 if (old)
1906                         bpf_prog_put(old);
1907         }
1908
1909         if (up) {
1910                 err = dpaa2_eth_open(dev);
1911                 if (err)
1912                         return err;
1913         }
1914
1915         return 0;
1916
1917 out_err:
1918         if (prog)
1919                 bpf_prog_sub(prog, priv->num_channels);
1920         if (up)
1921                 dpaa2_eth_open(dev);
1922
1923         return err;
1924 }
1925
1926 static int dpaa2_eth_xdp(struct net_device *dev, struct netdev_bpf *xdp)
1927 {
1928         struct dpaa2_eth_priv *priv = netdev_priv(dev);
1929
1930         switch (xdp->command) {
1931         case XDP_SETUP_PROG:
1932                 return setup_xdp(dev, xdp->prog);
1933         case XDP_QUERY_PROG:
1934                 xdp->prog_id = priv->xdp_prog ? priv->xdp_prog->aux->id : 0;
1935                 break;
1936         default:
1937                 return -EINVAL;
1938         }
1939
1940         return 0;
1941 }
1942
1943 static int dpaa2_eth_xdp_create_fd(struct net_device *net_dev,
1944                                    struct xdp_frame *xdpf,
1945                                    struct dpaa2_fd *fd)
1946 {
1947         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1948         struct device *dev = net_dev->dev.parent;
1949         unsigned int needed_headroom;
1950         struct dpaa2_eth_swa *swa;
1951         void *buffer_start, *aligned_start;
1952         dma_addr_t addr;
1953
1954         /* We require a minimum headroom to be able to transmit the frame.
1955          * Otherwise return an error and let the original net_device handle it
1956          */
1957         needed_headroom = dpaa2_eth_needed_headroom(priv, NULL);
1958         if (xdpf->headroom < needed_headroom)
1959                 return -EINVAL;
1960
1961         /* Setup the FD fields */
1962         memset(fd, 0, sizeof(*fd));
1963
1964         /* Align FD address, if possible */
1965         buffer_start = xdpf->data - needed_headroom;
1966         aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
1967                                   DPAA2_ETH_TX_BUF_ALIGN);
1968         if (aligned_start >= xdpf->data - xdpf->headroom)
1969                 buffer_start = aligned_start;
1970
1971         swa = (struct dpaa2_eth_swa *)buffer_start;
1972         /* fill in necessary fields here */
1973         swa->type = DPAA2_ETH_SWA_XDP;
1974         swa->xdp.dma_size = xdpf->data + xdpf->len - buffer_start;
1975         swa->xdp.xdpf = xdpf;
1976
1977         addr = dma_map_single(dev, buffer_start,
1978                               swa->xdp.dma_size,
1979                               DMA_BIDIRECTIONAL);
1980         if (unlikely(dma_mapping_error(dev, addr)))
1981                 return -ENOMEM;
1982
1983         dpaa2_fd_set_addr(fd, addr);
1984         dpaa2_fd_set_offset(fd, xdpf->data - buffer_start);
1985         dpaa2_fd_set_len(fd, xdpf->len);
1986         dpaa2_fd_set_format(fd, dpaa2_fd_single);
1987         dpaa2_fd_set_ctrl(fd, FD_CTRL_PTA);
1988
1989         return 0;
1990 }
1991
1992 static int dpaa2_eth_xdp_xmit(struct net_device *net_dev, int n,
1993                               struct xdp_frame **frames, u32 flags)
1994 {
1995         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
1996         struct dpaa2_eth_xdp_fds *xdp_redirect_fds;
1997         struct rtnl_link_stats64 *percpu_stats;
1998         struct dpaa2_eth_fq *fq;
1999         struct dpaa2_fd *fds;
2000         int enqueued, i, err;
2001
2002         if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
2003                 return -EINVAL;
2004
2005         if (!netif_running(net_dev))
2006                 return -ENETDOWN;
2007
2008         fq = &priv->fq[smp_processor_id()];
2009         xdp_redirect_fds = &fq->xdp_redirect_fds;
2010         fds = xdp_redirect_fds->fds;
2011
2012         percpu_stats = this_cpu_ptr(priv->percpu_stats);
2013
2014         /* create a FD for each xdp_frame in the list received */
2015         for (i = 0; i < n; i++) {
2016                 err = dpaa2_eth_xdp_create_fd(net_dev, frames[i], &fds[i]);
2017                 if (err)
2018                         break;
2019         }
2020         xdp_redirect_fds->num = i;
2021
2022         /* enqueue all the frame descriptors */
2023         enqueued = dpaa2_eth_xdp_flush(priv, fq, xdp_redirect_fds);
2024
2025         /* update statistics */
2026         percpu_stats->tx_packets += enqueued;
2027         for (i = 0; i < enqueued; i++)
2028                 percpu_stats->tx_bytes += dpaa2_fd_get_len(&fds[i]);
2029         for (i = enqueued; i < n; i++)
2030                 xdp_return_frame_rx_napi(frames[i]);
2031
2032         return enqueued;
2033 }
2034
2035 static int update_xps(struct dpaa2_eth_priv *priv)
2036 {
2037         struct net_device *net_dev = priv->net_dev;
2038         struct cpumask xps_mask;
2039         struct dpaa2_eth_fq *fq;
2040         int i, num_queues, netdev_queues;
2041         int err = 0;
2042
2043         num_queues = dpaa2_eth_queue_count(priv);
2044         netdev_queues = (net_dev->num_tc ? : 1) * num_queues;
2045
2046         /* The first <num_queues> entries in priv->fq array are Tx/Tx conf
2047          * queues, so only process those
2048          */
2049         for (i = 0; i < netdev_queues; i++) {
2050                 fq = &priv->fq[i % num_queues];
2051
2052                 cpumask_clear(&xps_mask);
2053                 cpumask_set_cpu(fq->target_cpu, &xps_mask);
2054
2055                 err = netif_set_xps_queue(net_dev, &xps_mask, i);
2056                 if (err) {
2057                         netdev_warn_once(net_dev, "Error setting XPS queue\n");
2058                         break;
2059                 }
2060         }
2061
2062         return err;
2063 }
2064
2065 static int dpaa2_eth_setup_tc(struct net_device *net_dev,
2066                               enum tc_setup_type type, void *type_data)
2067 {
2068         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
2069         struct tc_mqprio_qopt *mqprio = type_data;
2070         u8 num_tc, num_queues;
2071         int i;
2072
2073         if (type != TC_SETUP_QDISC_MQPRIO)
2074                 return -EOPNOTSUPP;
2075
2076         mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
2077         num_queues = dpaa2_eth_queue_count(priv);
2078         num_tc = mqprio->num_tc;
2079
2080         if (num_tc == net_dev->num_tc)
2081                 return 0;
2082
2083         if (num_tc  > dpaa2_eth_tc_count(priv)) {
2084                 netdev_err(net_dev, "Max %d traffic classes supported\n",
2085                            dpaa2_eth_tc_count(priv));
2086                 return -EOPNOTSUPP;
2087         }
2088
2089         if (!num_tc) {
2090                 netdev_reset_tc(net_dev);
2091                 netif_set_real_num_tx_queues(net_dev, num_queues);
2092                 goto out;
2093         }
2094
2095         netdev_set_num_tc(net_dev, num_tc);
2096         netif_set_real_num_tx_queues(net_dev, num_tc * num_queues);
2097
2098         for (i = 0; i < num_tc; i++)
2099                 netdev_set_tc_queue(net_dev, i, num_queues, i * num_queues);
2100
2101 out:
2102         update_xps(priv);
2103
2104         return 0;
2105 }
2106
2107 static const struct net_device_ops dpaa2_eth_ops = {
2108         .ndo_open = dpaa2_eth_open,
2109         .ndo_start_xmit = dpaa2_eth_tx,
2110         .ndo_stop = dpaa2_eth_stop,
2111         .ndo_set_mac_address = dpaa2_eth_set_addr,
2112         .ndo_get_stats64 = dpaa2_eth_get_stats,
2113         .ndo_set_rx_mode = dpaa2_eth_set_rx_mode,
2114         .ndo_set_features = dpaa2_eth_set_features,
2115         .ndo_do_ioctl = dpaa2_eth_ioctl,
2116         .ndo_change_mtu = dpaa2_eth_change_mtu,
2117         .ndo_bpf = dpaa2_eth_xdp,
2118         .ndo_xdp_xmit = dpaa2_eth_xdp_xmit,
2119         .ndo_setup_tc = dpaa2_eth_setup_tc,
2120 };
2121
2122 static void cdan_cb(struct dpaa2_io_notification_ctx *ctx)
2123 {
2124         struct dpaa2_eth_channel *ch;
2125
2126         ch = container_of(ctx, struct dpaa2_eth_channel, nctx);
2127
2128         /* Update NAPI statistics */
2129         ch->stats.cdan++;
2130
2131         napi_schedule_irqoff(&ch->napi);
2132 }
2133
2134 /* Allocate and configure a DPCON object */
2135 static struct fsl_mc_device *setup_dpcon(struct dpaa2_eth_priv *priv)
2136 {
2137         struct fsl_mc_device *dpcon;
2138         struct device *dev = priv->net_dev->dev.parent;
2139         int err;
2140
2141         err = fsl_mc_object_allocate(to_fsl_mc_device(dev),
2142                                      FSL_MC_POOL_DPCON, &dpcon);
2143         if (err) {
2144                 if (err == -ENXIO)
2145                         err = -EPROBE_DEFER;
2146                 else
2147                         dev_info(dev, "Not enough DPCONs, will go on as-is\n");
2148                 return ERR_PTR(err);
2149         }
2150
2151         err = dpcon_open(priv->mc_io, 0, dpcon->obj_desc.id, &dpcon->mc_handle);
2152         if (err) {
2153                 dev_err(dev, "dpcon_open() failed\n");
2154                 goto free;
2155         }
2156
2157         err = dpcon_reset(priv->mc_io, 0, dpcon->mc_handle);
2158         if (err) {
2159                 dev_err(dev, "dpcon_reset() failed\n");
2160                 goto close;
2161         }
2162
2163         err = dpcon_enable(priv->mc_io, 0, dpcon->mc_handle);
2164         if (err) {
2165                 dev_err(dev, "dpcon_enable() failed\n");
2166                 goto close;
2167         }
2168
2169         return dpcon;
2170
2171 close:
2172         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
2173 free:
2174         fsl_mc_object_free(dpcon);
2175
2176         return NULL;
2177 }
2178
2179 static void free_dpcon(struct dpaa2_eth_priv *priv,
2180                        struct fsl_mc_device *dpcon)
2181 {
2182         dpcon_disable(priv->mc_io, 0, dpcon->mc_handle);
2183         dpcon_close(priv->mc_io, 0, dpcon->mc_handle);
2184         fsl_mc_object_free(dpcon);
2185 }
2186
2187 static struct dpaa2_eth_channel *
2188 alloc_channel(struct dpaa2_eth_priv *priv)
2189 {
2190         struct dpaa2_eth_channel *channel;
2191         struct dpcon_attr attr;
2192         struct device *dev = priv->net_dev->dev.parent;
2193         int err;
2194
2195         channel = kzalloc(sizeof(*channel), GFP_KERNEL);
2196         if (!channel)
2197                 return NULL;
2198
2199         channel->dpcon = setup_dpcon(priv);
2200         if (IS_ERR_OR_NULL(channel->dpcon)) {
2201                 err = PTR_ERR_OR_ZERO(channel->dpcon);
2202                 goto err_setup;
2203         }
2204
2205         err = dpcon_get_attributes(priv->mc_io, 0, channel->dpcon->mc_handle,
2206                                    &attr);
2207         if (err) {
2208                 dev_err(dev, "dpcon_get_attributes() failed\n");
2209                 goto err_get_attr;
2210         }
2211
2212         channel->dpcon_id = attr.id;
2213         channel->ch_id = attr.qbman_ch_id;
2214         channel->priv = priv;
2215
2216         return channel;
2217
2218 err_get_attr:
2219         free_dpcon(priv, channel->dpcon);
2220 err_setup:
2221         kfree(channel);
2222         return ERR_PTR(err);
2223 }
2224
2225 static void free_channel(struct dpaa2_eth_priv *priv,
2226                          struct dpaa2_eth_channel *channel)
2227 {
2228         free_dpcon(priv, channel->dpcon);
2229         kfree(channel);
2230 }
2231
2232 /* DPIO setup: allocate and configure QBMan channels, setup core affinity
2233  * and register data availability notifications
2234  */
2235 static int setup_dpio(struct dpaa2_eth_priv *priv)
2236 {
2237         struct dpaa2_io_notification_ctx *nctx;
2238         struct dpaa2_eth_channel *channel;
2239         struct dpcon_notification_cfg dpcon_notif_cfg;
2240         struct device *dev = priv->net_dev->dev.parent;
2241         int i, err;
2242
2243         /* We want the ability to spread ingress traffic (RX, TX conf) to as
2244          * many cores as possible, so we need one channel for each core
2245          * (unless there's fewer queues than cores, in which case the extra
2246          * channels would be wasted).
2247          * Allocate one channel per core and register it to the core's
2248          * affine DPIO. If not enough channels are available for all cores
2249          * or if some cores don't have an affine DPIO, there will be no
2250          * ingress frame processing on those cores.
2251          */
2252         cpumask_clear(&priv->dpio_cpumask);
2253         for_each_online_cpu(i) {
2254                 /* Try to allocate a channel */
2255                 channel = alloc_channel(priv);
2256                 if (IS_ERR_OR_NULL(channel)) {
2257                         err = PTR_ERR_OR_ZERO(channel);
2258                         if (err != -EPROBE_DEFER)
2259                                 dev_info(dev,
2260                                          "No affine channel for cpu %d and above\n", i);
2261                         goto err_alloc_ch;
2262                 }
2263
2264                 priv->channel[priv->num_channels] = channel;
2265
2266                 nctx = &channel->nctx;
2267                 nctx->is_cdan = 1;
2268                 nctx->cb = cdan_cb;
2269                 nctx->id = channel->ch_id;
2270                 nctx->desired_cpu = i;
2271
2272                 /* Register the new context */
2273                 channel->dpio = dpaa2_io_service_select(i);
2274                 err = dpaa2_io_service_register(channel->dpio, nctx, dev);
2275                 if (err) {
2276                         dev_dbg(dev, "No affine DPIO for cpu %d\n", i);
2277                         /* If no affine DPIO for this core, there's probably
2278                          * none available for next cores either. Signal we want
2279                          * to retry later, in case the DPIO devices weren't
2280                          * probed yet.
2281                          */
2282                         err = -EPROBE_DEFER;
2283                         goto err_service_reg;
2284                 }
2285
2286                 /* Register DPCON notification with MC */
2287                 dpcon_notif_cfg.dpio_id = nctx->dpio_id;
2288                 dpcon_notif_cfg.priority = 0;
2289                 dpcon_notif_cfg.user_ctx = nctx->qman64;
2290                 err = dpcon_set_notification(priv->mc_io, 0,
2291                                              channel->dpcon->mc_handle,
2292                                              &dpcon_notif_cfg);
2293                 if (err) {
2294                         dev_err(dev, "dpcon_set_notification failed()\n");
2295                         goto err_set_cdan;
2296                 }
2297
2298                 /* If we managed to allocate a channel and also found an affine
2299                  * DPIO for this core, add it to the final mask
2300                  */
2301                 cpumask_set_cpu(i, &priv->dpio_cpumask);
2302                 priv->num_channels++;
2303
2304                 /* Stop if we already have enough channels to accommodate all
2305                  * RX and TX conf queues
2306                  */
2307                 if (priv->num_channels == priv->dpni_attrs.num_queues)
2308                         break;
2309         }
2310
2311         return 0;
2312
2313 err_set_cdan:
2314         dpaa2_io_service_deregister(channel->dpio, nctx, dev);
2315 err_service_reg:
2316         free_channel(priv, channel);
2317 err_alloc_ch:
2318         if (err == -EPROBE_DEFER) {
2319                 for (i = 0; i < priv->num_channels; i++) {
2320                         channel = priv->channel[i];
2321                         nctx = &channel->nctx;
2322                         dpaa2_io_service_deregister(channel->dpio, nctx, dev);
2323                         free_channel(priv, channel);
2324                 }
2325                 priv->num_channels = 0;
2326                 return err;
2327         }
2328
2329         if (cpumask_empty(&priv->dpio_cpumask)) {
2330                 dev_err(dev, "No cpu with an affine DPIO/DPCON\n");
2331                 return -ENODEV;
2332         }
2333
2334         dev_info(dev, "Cores %*pbl available for processing ingress traffic\n",
2335                  cpumask_pr_args(&priv->dpio_cpumask));
2336
2337         return 0;
2338 }
2339
2340 static void free_dpio(struct dpaa2_eth_priv *priv)
2341 {
2342         struct device *dev = priv->net_dev->dev.parent;
2343         struct dpaa2_eth_channel *ch;
2344         int i;
2345
2346         /* deregister CDAN notifications and free channels */
2347         for (i = 0; i < priv->num_channels; i++) {
2348                 ch = priv->channel[i];
2349                 dpaa2_io_service_deregister(ch->dpio, &ch->nctx, dev);
2350                 free_channel(priv, ch);
2351         }
2352 }
2353
2354 static struct dpaa2_eth_channel *get_affine_channel(struct dpaa2_eth_priv *priv,
2355                                                     int cpu)
2356 {
2357         struct device *dev = priv->net_dev->dev.parent;
2358         int i;
2359
2360         for (i = 0; i < priv->num_channels; i++)
2361                 if (priv->channel[i]->nctx.desired_cpu == cpu)
2362                         return priv->channel[i];
2363
2364         /* We should never get here. Issue a warning and return
2365          * the first channel, because it's still better than nothing
2366          */
2367         dev_warn(dev, "No affine channel found for cpu %d\n", cpu);
2368
2369         return priv->channel[0];
2370 }
2371
2372 static void set_fq_affinity(struct dpaa2_eth_priv *priv)
2373 {
2374         struct device *dev = priv->net_dev->dev.parent;
2375         struct dpaa2_eth_fq *fq;
2376         int rx_cpu, txc_cpu;
2377         int i;
2378
2379         /* For each FQ, pick one channel/CPU to deliver frames to.
2380          * This may well change at runtime, either through irqbalance or
2381          * through direct user intervention.
2382          */
2383         rx_cpu = txc_cpu = cpumask_first(&priv->dpio_cpumask);
2384
2385         for (i = 0; i < priv->num_fqs; i++) {
2386                 fq = &priv->fq[i];
2387                 switch (fq->type) {
2388                 case DPAA2_RX_FQ:
2389                         fq->target_cpu = rx_cpu;
2390                         rx_cpu = cpumask_next(rx_cpu, &priv->dpio_cpumask);
2391                         if (rx_cpu >= nr_cpu_ids)
2392                                 rx_cpu = cpumask_first(&priv->dpio_cpumask);
2393                         break;
2394                 case DPAA2_TX_CONF_FQ:
2395                         fq->target_cpu = txc_cpu;
2396                         txc_cpu = cpumask_next(txc_cpu, &priv->dpio_cpumask);
2397                         if (txc_cpu >= nr_cpu_ids)
2398                                 txc_cpu = cpumask_first(&priv->dpio_cpumask);
2399                         break;
2400                 default:
2401                         dev_err(dev, "Unknown FQ type: %d\n", fq->type);
2402                 }
2403                 fq->channel = get_affine_channel(priv, fq->target_cpu);
2404         }
2405
2406         update_xps(priv);
2407 }
2408
2409 static void setup_fqs(struct dpaa2_eth_priv *priv)
2410 {
2411         int i, j;
2412
2413         /* We have one TxConf FQ per Tx flow.
2414          * The number of Tx and Rx queues is the same.
2415          * Tx queues come first in the fq array.
2416          */
2417         for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
2418                 priv->fq[priv->num_fqs].type = DPAA2_TX_CONF_FQ;
2419                 priv->fq[priv->num_fqs].consume = dpaa2_eth_tx_conf;
2420                 priv->fq[priv->num_fqs++].flowid = (u16)i;
2421         }
2422
2423         for (j = 0; j < dpaa2_eth_tc_count(priv); j++) {
2424                 for (i = 0; i < dpaa2_eth_queue_count(priv); i++) {
2425                         priv->fq[priv->num_fqs].type = DPAA2_RX_FQ;
2426                         priv->fq[priv->num_fqs].consume = dpaa2_eth_rx;
2427                         priv->fq[priv->num_fqs].tc = (u8)j;
2428                         priv->fq[priv->num_fqs++].flowid = (u16)i;
2429                 }
2430         }
2431
2432         /* For each FQ, decide on which core to process incoming frames */
2433         set_fq_affinity(priv);
2434 }
2435
2436 /* Allocate and configure one buffer pool for each interface */
2437 static int setup_dpbp(struct dpaa2_eth_priv *priv)
2438 {
2439         int err;
2440         struct fsl_mc_device *dpbp_dev;
2441         struct device *dev = priv->net_dev->dev.parent;
2442         struct dpbp_attr dpbp_attrs;
2443
2444         err = fsl_mc_object_allocate(to_fsl_mc_device(dev), FSL_MC_POOL_DPBP,
2445                                      &dpbp_dev);
2446         if (err) {
2447                 if (err == -ENXIO)
2448                         err = -EPROBE_DEFER;
2449                 else
2450                         dev_err(dev, "DPBP device allocation failed\n");
2451                 return err;
2452         }
2453
2454         priv->dpbp_dev = dpbp_dev;
2455
2456         err = dpbp_open(priv->mc_io, 0, priv->dpbp_dev->obj_desc.id,
2457                         &dpbp_dev->mc_handle);
2458         if (err) {
2459                 dev_err(dev, "dpbp_open() failed\n");
2460                 goto err_open;
2461         }
2462
2463         err = dpbp_reset(priv->mc_io, 0, dpbp_dev->mc_handle);
2464         if (err) {
2465                 dev_err(dev, "dpbp_reset() failed\n");
2466                 goto err_reset;
2467         }
2468
2469         err = dpbp_enable(priv->mc_io, 0, dpbp_dev->mc_handle);
2470         if (err) {
2471                 dev_err(dev, "dpbp_enable() failed\n");
2472                 goto err_enable;
2473         }
2474
2475         err = dpbp_get_attributes(priv->mc_io, 0, dpbp_dev->mc_handle,
2476                                   &dpbp_attrs);
2477         if (err) {
2478                 dev_err(dev, "dpbp_get_attributes() failed\n");
2479                 goto err_get_attr;
2480         }
2481         priv->bpid = dpbp_attrs.bpid;
2482
2483         return 0;
2484
2485 err_get_attr:
2486         dpbp_disable(priv->mc_io, 0, dpbp_dev->mc_handle);
2487 err_enable:
2488 err_reset:
2489         dpbp_close(priv->mc_io, 0, dpbp_dev->mc_handle);
2490 err_open:
2491         fsl_mc_object_free(dpbp_dev);
2492
2493         return err;
2494 }
2495
2496 static void free_dpbp(struct dpaa2_eth_priv *priv)
2497 {
2498         drain_pool(priv);
2499         dpbp_disable(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
2500         dpbp_close(priv->mc_io, 0, priv->dpbp_dev->mc_handle);
2501         fsl_mc_object_free(priv->dpbp_dev);
2502 }
2503
2504 static int set_buffer_layout(struct dpaa2_eth_priv *priv)
2505 {
2506         struct device *dev = priv->net_dev->dev.parent;
2507         struct dpni_buffer_layout buf_layout = {0};
2508         u16 rx_buf_align;
2509         int err;
2510
2511         /* We need to check for WRIOP version 1.0.0, but depending on the MC
2512          * version, this number is not always provided correctly on rev1.
2513          * We need to check for both alternatives in this situation.
2514          */
2515         if (priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(0, 0, 0) ||
2516             priv->dpni_attrs.wriop_version == DPAA2_WRIOP_VERSION(1, 0, 0))
2517                 rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN_REV1;
2518         else
2519                 rx_buf_align = DPAA2_ETH_RX_BUF_ALIGN;
2520
2521         /* We need to ensure that the buffer size seen by WRIOP is a multiple
2522          * of 64 or 256 bytes depending on the WRIOP version.
2523          */
2524         priv->rx_buf_size = ALIGN_DOWN(DPAA2_ETH_RX_BUF_SIZE, rx_buf_align);
2525
2526         /* tx buffer */
2527         buf_layout.private_data_size = DPAA2_ETH_SWA_SIZE;
2528         buf_layout.pass_timestamp = true;
2529         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PRIVATE_DATA_SIZE |
2530                              DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2531         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2532                                      DPNI_QUEUE_TX, &buf_layout);
2533         if (err) {
2534                 dev_err(dev, "dpni_set_buffer_layout(TX) failed\n");
2535                 return err;
2536         }
2537
2538         /* tx-confirm buffer */
2539         buf_layout.options = DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2540         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2541                                      DPNI_QUEUE_TX_CONFIRM, &buf_layout);
2542         if (err) {
2543                 dev_err(dev, "dpni_set_buffer_layout(TX_CONF) failed\n");
2544                 return err;
2545         }
2546
2547         /* Now that we've set our tx buffer layout, retrieve the minimum
2548          * required tx data offset.
2549          */
2550         err = dpni_get_tx_data_offset(priv->mc_io, 0, priv->mc_token,
2551                                       &priv->tx_data_offset);
2552         if (err) {
2553                 dev_err(dev, "dpni_get_tx_data_offset() failed\n");
2554                 return err;
2555         }
2556
2557         if ((priv->tx_data_offset % 64) != 0)
2558                 dev_warn(dev, "Tx data offset (%d) not a multiple of 64B\n",
2559                          priv->tx_data_offset);
2560
2561         /* rx buffer */
2562         buf_layout.pass_frame_status = true;
2563         buf_layout.pass_parser_result = true;
2564         buf_layout.data_align = rx_buf_align;
2565         buf_layout.data_head_room = dpaa2_eth_rx_head_room(priv);
2566         buf_layout.private_data_size = 0;
2567         buf_layout.options = DPNI_BUF_LAYOUT_OPT_PARSER_RESULT |
2568                              DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2569                              DPNI_BUF_LAYOUT_OPT_DATA_ALIGN |
2570                              DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM |
2571                              DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2572         err = dpni_set_buffer_layout(priv->mc_io, 0, priv->mc_token,
2573                                      DPNI_QUEUE_RX, &buf_layout);
2574         if (err) {
2575                 dev_err(dev, "dpni_set_buffer_layout(RX) failed\n");
2576                 return err;
2577         }
2578
2579         return 0;
2580 }
2581
2582 #define DPNI_ENQUEUE_FQID_VER_MAJOR     7
2583 #define DPNI_ENQUEUE_FQID_VER_MINOR     9
2584
2585 static inline int dpaa2_eth_enqueue_qd(struct dpaa2_eth_priv *priv,
2586                                        struct dpaa2_eth_fq *fq,
2587                                        struct dpaa2_fd *fd, u8 prio,
2588                                        u32 num_frames __always_unused,
2589                                        int *frames_enqueued)
2590 {
2591         int err;
2592
2593         err = dpaa2_io_service_enqueue_qd(fq->channel->dpio,
2594                                           priv->tx_qdid, prio,
2595                                           fq->tx_qdbin, fd);
2596         if (!err && frames_enqueued)
2597                 *frames_enqueued = 1;
2598         return err;
2599 }
2600
2601 static inline int dpaa2_eth_enqueue_fq_multiple(struct dpaa2_eth_priv *priv,
2602                                                 struct dpaa2_eth_fq *fq,
2603                                                 struct dpaa2_fd *fd,
2604                                                 u8 prio, u32 num_frames,
2605                                                 int *frames_enqueued)
2606 {
2607         int err;
2608
2609         err = dpaa2_io_service_enqueue_multiple_fq(fq->channel->dpio,
2610                                                    fq->tx_fqid[prio],
2611                                                    fd, num_frames);
2612
2613         if (err == 0)
2614                 return -EBUSY;
2615
2616         if (frames_enqueued)
2617                 *frames_enqueued = err;
2618         return 0;
2619 }
2620
2621 static void set_enqueue_mode(struct dpaa2_eth_priv *priv)
2622 {
2623         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR,
2624                                    DPNI_ENQUEUE_FQID_VER_MINOR) < 0)
2625                 priv->enqueue = dpaa2_eth_enqueue_qd;
2626         else
2627                 priv->enqueue = dpaa2_eth_enqueue_fq_multiple;
2628 }
2629
2630 static int set_pause(struct dpaa2_eth_priv *priv)
2631 {
2632         struct device *dev = priv->net_dev->dev.parent;
2633         struct dpni_link_cfg link_cfg = {0};
2634         int err;
2635
2636         /* Get the default link options so we don't override other flags */
2637         err = dpni_get_link_cfg(priv->mc_io, 0, priv->mc_token, &link_cfg);
2638         if (err) {
2639                 dev_err(dev, "dpni_get_link_cfg() failed\n");
2640                 return err;
2641         }
2642
2643         /* By default, enable both Rx and Tx pause frames */
2644         link_cfg.options |= DPNI_LINK_OPT_PAUSE;
2645         link_cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
2646         err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &link_cfg);
2647         if (err) {
2648                 dev_err(dev, "dpni_set_link_cfg() failed\n");
2649                 return err;
2650         }
2651
2652         priv->link_state.options = link_cfg.options;
2653
2654         return 0;
2655 }
2656
2657 static void update_tx_fqids(struct dpaa2_eth_priv *priv)
2658 {
2659         struct dpni_queue_id qid = {0};
2660         struct dpaa2_eth_fq *fq;
2661         struct dpni_queue queue;
2662         int i, j, err;
2663
2664         /* We only use Tx FQIDs for FQID-based enqueue, so check
2665          * if DPNI version supports it before updating FQIDs
2666          */
2667         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR,
2668                                    DPNI_ENQUEUE_FQID_VER_MINOR) < 0)
2669                 return;
2670
2671         for (i = 0; i < priv->num_fqs; i++) {
2672                 fq = &priv->fq[i];
2673                 if (fq->type != DPAA2_TX_CONF_FQ)
2674                         continue;
2675                 for (j = 0; j < dpaa2_eth_tc_count(priv); j++) {
2676                         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2677                                              DPNI_QUEUE_TX, j, fq->flowid,
2678                                              &queue, &qid);
2679                         if (err)
2680                                 goto out_err;
2681
2682                         fq->tx_fqid[j] = qid.fqid;
2683                         if (fq->tx_fqid[j] == 0)
2684                                 goto out_err;
2685                 }
2686         }
2687
2688         priv->enqueue = dpaa2_eth_enqueue_fq_multiple;
2689
2690         return;
2691
2692 out_err:
2693         netdev_info(priv->net_dev,
2694                     "Error reading Tx FQID, fallback to QDID-based enqueue\n");
2695         priv->enqueue = dpaa2_eth_enqueue_qd;
2696 }
2697
2698 /* Configure ingress classification based on VLAN PCP */
2699 static int set_vlan_qos(struct dpaa2_eth_priv *priv)
2700 {
2701         struct device *dev = priv->net_dev->dev.parent;
2702         struct dpkg_profile_cfg kg_cfg = {0};
2703         struct dpni_qos_tbl_cfg qos_cfg = {0};
2704         struct dpni_rule_cfg key_params;
2705         void *dma_mem, *key, *mask;
2706         u8 key_size = 2;        /* VLAN TCI field */
2707         int i, pcp, err;
2708
2709         /* VLAN-based classification only makes sense if we have multiple
2710          * traffic classes.
2711          * Also, we need to extract just the 3-bit PCP field from the VLAN
2712          * header and we can only do that by using a mask
2713          */
2714         if (dpaa2_eth_tc_count(priv) == 1 || !dpaa2_eth_fs_mask_enabled(priv)) {
2715                 dev_dbg(dev, "VLAN-based QoS classification not supported\n");
2716                 return -EOPNOTSUPP;
2717         }
2718
2719         dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
2720         if (!dma_mem)
2721                 return -ENOMEM;
2722
2723         kg_cfg.num_extracts = 1;
2724         kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
2725         kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_VLAN;
2726         kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
2727         kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_VLAN_TCI;
2728
2729         err = dpni_prepare_key_cfg(&kg_cfg, dma_mem);
2730         if (err) {
2731                 dev_err(dev, "dpni_prepare_key_cfg failed\n");
2732                 goto out_free_tbl;
2733         }
2734
2735         /* set QoS table */
2736         qos_cfg.default_tc = 0;
2737         qos_cfg.discard_on_miss = 0;
2738         qos_cfg.key_cfg_iova = dma_map_single(dev, dma_mem,
2739                                               DPAA2_CLASSIFIER_DMA_SIZE,
2740                                               DMA_TO_DEVICE);
2741         if (dma_mapping_error(dev, qos_cfg.key_cfg_iova)) {
2742                 dev_err(dev, "QoS table DMA mapping failed\n");
2743                 err = -ENOMEM;
2744                 goto out_free_tbl;
2745         }
2746
2747         err = dpni_set_qos_table(priv->mc_io, 0, priv->mc_token, &qos_cfg);
2748         if (err) {
2749                 dev_err(dev, "dpni_set_qos_table failed\n");
2750                 goto out_unmap_tbl;
2751         }
2752
2753         /* Add QoS table entries */
2754         key = kzalloc(key_size * 2, GFP_KERNEL);
2755         if (!key) {
2756                 err = -ENOMEM;
2757                 goto out_unmap_tbl;
2758         }
2759         mask = key + key_size;
2760         *(__be16 *)mask = cpu_to_be16(VLAN_PRIO_MASK);
2761
2762         key_params.key_iova = dma_map_single(dev, key, key_size * 2,
2763                                              DMA_TO_DEVICE);
2764         if (dma_mapping_error(dev, key_params.key_iova)) {
2765                 dev_err(dev, "Qos table entry DMA mapping failed\n");
2766                 err = -ENOMEM;
2767                 goto out_free_key;
2768         }
2769
2770         key_params.mask_iova = key_params.key_iova + key_size;
2771         key_params.key_size = key_size;
2772
2773         /* We add rules for PCP-based distribution starting with highest
2774          * priority (VLAN PCP = 7). If this DPNI doesn't have enough traffic
2775          * classes to accommodate all priority levels, the lowest ones end up
2776          * on TC 0 which was configured as default
2777          */
2778         for (i = dpaa2_eth_tc_count(priv) - 1, pcp = 7; i >= 0; i--, pcp--) {
2779                 *(__be16 *)key = cpu_to_be16(pcp << VLAN_PRIO_SHIFT);
2780                 dma_sync_single_for_device(dev, key_params.key_iova,
2781                                            key_size * 2, DMA_TO_DEVICE);
2782
2783                 err = dpni_add_qos_entry(priv->mc_io, 0, priv->mc_token,
2784                                          &key_params, i, i);
2785                 if (err) {
2786                         dev_err(dev, "dpni_add_qos_entry failed\n");
2787                         dpni_clear_qos_table(priv->mc_io, 0, priv->mc_token);
2788                         goto out_unmap_key;
2789                 }
2790         }
2791
2792         priv->vlan_cls_enabled = true;
2793
2794         /* Table and key memory is not persistent, clean everything up after
2795          * configuration is finished
2796          */
2797 out_unmap_key:
2798         dma_unmap_single(dev, key_params.key_iova, key_size * 2, DMA_TO_DEVICE);
2799 out_free_key:
2800         kfree(key);
2801 out_unmap_tbl:
2802         dma_unmap_single(dev, qos_cfg.key_cfg_iova, DPAA2_CLASSIFIER_DMA_SIZE,
2803                          DMA_TO_DEVICE);
2804 out_free_tbl:
2805         kfree(dma_mem);
2806
2807         return err;
2808 }
2809
2810 /* Configure the DPNI object this interface is associated with */
2811 static int setup_dpni(struct fsl_mc_device *ls_dev)
2812 {
2813         struct device *dev = &ls_dev->dev;
2814         struct dpaa2_eth_priv *priv;
2815         struct net_device *net_dev;
2816         int err;
2817
2818         net_dev = dev_get_drvdata(dev);
2819         priv = netdev_priv(net_dev);
2820
2821         /* get a handle for the DPNI object */
2822         err = dpni_open(priv->mc_io, 0, ls_dev->obj_desc.id, &priv->mc_token);
2823         if (err) {
2824                 dev_err(dev, "dpni_open() failed\n");
2825                 return err;
2826         }
2827
2828         /* Check if we can work with this DPNI object */
2829         err = dpni_get_api_version(priv->mc_io, 0, &priv->dpni_ver_major,
2830                                    &priv->dpni_ver_minor);
2831         if (err) {
2832                 dev_err(dev, "dpni_get_api_version() failed\n");
2833                 goto close;
2834         }
2835         if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_VER_MAJOR, DPNI_VER_MINOR) < 0) {
2836                 dev_err(dev, "DPNI version %u.%u not supported, need >= %u.%u\n",
2837                         priv->dpni_ver_major, priv->dpni_ver_minor,
2838                         DPNI_VER_MAJOR, DPNI_VER_MINOR);
2839                 err = -ENOTSUPP;
2840                 goto close;
2841         }
2842
2843         ls_dev->mc_io = priv->mc_io;
2844         ls_dev->mc_handle = priv->mc_token;
2845
2846         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
2847         if (err) {
2848                 dev_err(dev, "dpni_reset() failed\n");
2849                 goto close;
2850         }
2851
2852         err = dpni_get_attributes(priv->mc_io, 0, priv->mc_token,
2853                                   &priv->dpni_attrs);
2854         if (err) {
2855                 dev_err(dev, "dpni_get_attributes() failed (err=%d)\n", err);
2856                 goto close;
2857         }
2858
2859         err = set_buffer_layout(priv);
2860         if (err)
2861                 goto close;
2862
2863         set_enqueue_mode(priv);
2864
2865         /* Enable pause frame support */
2866         if (dpaa2_eth_has_pause_support(priv)) {
2867                 err = set_pause(priv);
2868                 if (err)
2869                         goto close;
2870         }
2871
2872         err = set_vlan_qos(priv);
2873         if (err && err != -EOPNOTSUPP)
2874                 goto close;
2875
2876         priv->cls_rules = devm_kzalloc(dev, sizeof(struct dpaa2_eth_cls_rule) *
2877                                        dpaa2_eth_fs_count(priv), GFP_KERNEL);
2878         if (!priv->cls_rules) {
2879                 err = -ENOMEM;
2880                 goto close;
2881         }
2882
2883         return 0;
2884
2885 close:
2886         dpni_close(priv->mc_io, 0, priv->mc_token);
2887
2888         return err;
2889 }
2890
2891 static void free_dpni(struct dpaa2_eth_priv *priv)
2892 {
2893         int err;
2894
2895         err = dpni_reset(priv->mc_io, 0, priv->mc_token);
2896         if (err)
2897                 netdev_warn(priv->net_dev, "dpni_reset() failed (err %d)\n",
2898                             err);
2899
2900         dpni_close(priv->mc_io, 0, priv->mc_token);
2901 }
2902
2903 static int setup_rx_flow(struct dpaa2_eth_priv *priv,
2904                          struct dpaa2_eth_fq *fq)
2905 {
2906         struct device *dev = priv->net_dev->dev.parent;
2907         struct dpni_queue queue;
2908         struct dpni_queue_id qid;
2909         int err;
2910
2911         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2912                              DPNI_QUEUE_RX, fq->tc, fq->flowid, &queue, &qid);
2913         if (err) {
2914                 dev_err(dev, "dpni_get_queue(RX) failed\n");
2915                 return err;
2916         }
2917
2918         fq->fqid = qid.fqid;
2919
2920         queue.destination.id = fq->channel->dpcon_id;
2921         queue.destination.type = DPNI_DEST_DPCON;
2922         queue.destination.priority = 1;
2923         queue.user_context = (u64)(uintptr_t)fq;
2924         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
2925                              DPNI_QUEUE_RX, fq->tc, fq->flowid,
2926                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
2927                              &queue);
2928         if (err) {
2929                 dev_err(dev, "dpni_set_queue(RX) failed\n");
2930                 return err;
2931         }
2932
2933         /* xdp_rxq setup */
2934         /* only once for each channel */
2935         if (fq->tc > 0)
2936                 return 0;
2937
2938         err = xdp_rxq_info_reg(&fq->channel->xdp_rxq, priv->net_dev,
2939                                fq->flowid);
2940         if (err) {
2941                 dev_err(dev, "xdp_rxq_info_reg failed\n");
2942                 return err;
2943         }
2944
2945         err = xdp_rxq_info_reg_mem_model(&fq->channel->xdp_rxq,
2946                                          MEM_TYPE_PAGE_ORDER0, NULL);
2947         if (err) {
2948                 dev_err(dev, "xdp_rxq_info_reg_mem_model failed\n");
2949                 return err;
2950         }
2951
2952         return 0;
2953 }
2954
2955 static int setup_tx_flow(struct dpaa2_eth_priv *priv,
2956                          struct dpaa2_eth_fq *fq)
2957 {
2958         struct device *dev = priv->net_dev->dev.parent;
2959         struct dpni_queue queue;
2960         struct dpni_queue_id qid;
2961         int i, err;
2962
2963         for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
2964                 err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2965                                      DPNI_QUEUE_TX, i, fq->flowid,
2966                                      &queue, &qid);
2967                 if (err) {
2968                         dev_err(dev, "dpni_get_queue(TX) failed\n");
2969                         return err;
2970                 }
2971                 fq->tx_fqid[i] = qid.fqid;
2972         }
2973
2974         /* All Tx queues belonging to the same flowid have the same qdbin */
2975         fq->tx_qdbin = qid.qdbin;
2976
2977         err = dpni_get_queue(priv->mc_io, 0, priv->mc_token,
2978                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
2979                              &queue, &qid);
2980         if (err) {
2981                 dev_err(dev, "dpni_get_queue(TX_CONF) failed\n");
2982                 return err;
2983         }
2984
2985         fq->fqid = qid.fqid;
2986
2987         queue.destination.id = fq->channel->dpcon_id;
2988         queue.destination.type = DPNI_DEST_DPCON;
2989         queue.destination.priority = 0;
2990         queue.user_context = (u64)(uintptr_t)fq;
2991         err = dpni_set_queue(priv->mc_io, 0, priv->mc_token,
2992                              DPNI_QUEUE_TX_CONFIRM, 0, fq->flowid,
2993                              DPNI_QUEUE_OPT_USER_CTX | DPNI_QUEUE_OPT_DEST,
2994                              &queue);
2995         if (err) {
2996                 dev_err(dev, "dpni_set_queue(TX_CONF) failed\n");
2997                 return err;
2998         }
2999
3000         return 0;
3001 }
3002
3003 /* Supported header fields for Rx hash distribution key */
3004 static const struct dpaa2_eth_dist_fields dist_fields[] = {
3005         {
3006                 /* L2 header */
3007                 .rxnfc_field = RXH_L2DA,
3008                 .cls_prot = NET_PROT_ETH,
3009                 .cls_field = NH_FLD_ETH_DA,
3010                 .id = DPAA2_ETH_DIST_ETHDST,
3011                 .size = 6,
3012         }, {
3013                 .cls_prot = NET_PROT_ETH,
3014                 .cls_field = NH_FLD_ETH_SA,
3015                 .id = DPAA2_ETH_DIST_ETHSRC,
3016                 .size = 6,
3017         }, {
3018                 /* This is the last ethertype field parsed:
3019                  * depending on frame format, it can be the MAC ethertype
3020                  * or the VLAN etype.
3021                  */
3022                 .cls_prot = NET_PROT_ETH,
3023                 .cls_field = NH_FLD_ETH_TYPE,
3024                 .id = DPAA2_ETH_DIST_ETHTYPE,
3025                 .size = 2,
3026         }, {
3027                 /* VLAN header */
3028                 .rxnfc_field = RXH_VLAN,
3029                 .cls_prot = NET_PROT_VLAN,
3030                 .cls_field = NH_FLD_VLAN_TCI,
3031                 .id = DPAA2_ETH_DIST_VLAN,
3032                 .size = 2,
3033         }, {
3034                 /* IP header */
3035                 .rxnfc_field = RXH_IP_SRC,
3036                 .cls_prot = NET_PROT_IP,
3037                 .cls_field = NH_FLD_IP_SRC,
3038                 .id = DPAA2_ETH_DIST_IPSRC,
3039                 .size = 4,
3040         }, {
3041                 .rxnfc_field = RXH_IP_DST,
3042                 .cls_prot = NET_PROT_IP,
3043                 .cls_field = NH_FLD_IP_DST,
3044                 .id = DPAA2_ETH_DIST_IPDST,
3045                 .size = 4,
3046         }, {
3047                 .rxnfc_field = RXH_L3_PROTO,
3048                 .cls_prot = NET_PROT_IP,
3049                 .cls_field = NH_FLD_IP_PROTO,
3050                 .id = DPAA2_ETH_DIST_IPPROTO,
3051                 .size = 1,
3052         }, {
3053                 /* Using UDP ports, this is functionally equivalent to raw
3054                  * byte pairs from L4 header.
3055                  */
3056                 .rxnfc_field = RXH_L4_B_0_1,
3057                 .cls_prot = NET_PROT_UDP,
3058                 .cls_field = NH_FLD_UDP_PORT_SRC,
3059                 .id = DPAA2_ETH_DIST_L4SRC,
3060                 .size = 2,
3061         }, {
3062                 .rxnfc_field = RXH_L4_B_2_3,
3063                 .cls_prot = NET_PROT_UDP,
3064                 .cls_field = NH_FLD_UDP_PORT_DST,
3065                 .id = DPAA2_ETH_DIST_L4DST,
3066                 .size = 2,
3067         },
3068 };
3069
3070 /* Configure the Rx hash key using the legacy API */
3071 static int config_legacy_hash_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
3072 {
3073         struct device *dev = priv->net_dev->dev.parent;
3074         struct dpni_rx_tc_dist_cfg dist_cfg;
3075         int i, err = 0;
3076
3077         memset(&dist_cfg, 0, sizeof(dist_cfg));
3078
3079         dist_cfg.key_cfg_iova = key;
3080         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3081         dist_cfg.dist_mode = DPNI_DIST_MODE_HASH;
3082
3083         for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3084                 err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token,
3085                                           i, &dist_cfg);
3086                 if (err) {
3087                         dev_err(dev, "dpni_set_rx_tc_dist failed\n");
3088                         break;
3089                 }
3090         }
3091
3092         return err;
3093 }
3094
3095 /* Configure the Rx hash key using the new API */
3096 static int config_hash_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
3097 {
3098         struct device *dev = priv->net_dev->dev.parent;
3099         struct dpni_rx_dist_cfg dist_cfg;
3100         int i, err = 0;
3101
3102         memset(&dist_cfg, 0, sizeof(dist_cfg));
3103
3104         dist_cfg.key_cfg_iova = key;
3105         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3106         dist_cfg.enable = 1;
3107
3108         for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3109                 dist_cfg.tc = i;
3110                 err = dpni_set_rx_hash_dist(priv->mc_io, 0, priv->mc_token,
3111                                             &dist_cfg);
3112                 if (err) {
3113                         dev_err(dev, "dpni_set_rx_hash_dist failed\n");
3114                         break;
3115                 }
3116         }
3117
3118         return err;
3119 }
3120
3121 /* Configure the Rx flow classification key */
3122 static int config_cls_key(struct dpaa2_eth_priv *priv, dma_addr_t key)
3123 {
3124         struct device *dev = priv->net_dev->dev.parent;
3125         struct dpni_rx_dist_cfg dist_cfg;
3126         int i, err = 0;
3127
3128         memset(&dist_cfg, 0, sizeof(dist_cfg));
3129
3130         dist_cfg.key_cfg_iova = key;
3131         dist_cfg.dist_size = dpaa2_eth_queue_count(priv);
3132         dist_cfg.enable = 1;
3133
3134         for (i = 0; i < dpaa2_eth_tc_count(priv); i++) {
3135                 dist_cfg.tc = i;
3136                 err = dpni_set_rx_fs_dist(priv->mc_io, 0, priv->mc_token,
3137                                           &dist_cfg);
3138                 if (err) {
3139                         dev_err(dev, "dpni_set_rx_fs_dist failed\n");
3140                         break;
3141                 }
3142         }
3143
3144         return err;
3145 }
3146
3147 /* Size of the Rx flow classification key */
3148 int dpaa2_eth_cls_key_size(u64 fields)
3149 {
3150         int i, size = 0;
3151
3152         for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3153                 if (!(fields & dist_fields[i].id))
3154                         continue;
3155                 size += dist_fields[i].size;
3156         }
3157
3158         return size;
3159 }
3160
3161 /* Offset of header field in Rx classification key */
3162 int dpaa2_eth_cls_fld_off(int prot, int field)
3163 {
3164         int i, off = 0;
3165
3166         for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3167                 if (dist_fields[i].cls_prot == prot &&
3168                     dist_fields[i].cls_field == field)
3169                         return off;
3170                 off += dist_fields[i].size;
3171         }
3172
3173         WARN_ONCE(1, "Unsupported header field used for Rx flow cls\n");
3174         return 0;
3175 }
3176
3177 /* Prune unused fields from the classification rule.
3178  * Used when masking is not supported
3179  */
3180 void dpaa2_eth_cls_trim_rule(void *key_mem, u64 fields)
3181 {
3182         int off = 0, new_off = 0;
3183         int i, size;
3184
3185         for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3186                 size = dist_fields[i].size;
3187                 if (dist_fields[i].id & fields) {
3188                         memcpy(key_mem + new_off, key_mem + off, size);
3189                         new_off += size;
3190                 }
3191                 off += size;
3192         }
3193 }
3194
3195 /* Set Rx distribution (hash or flow classification) key
3196  * flags is a combination of RXH_ bits
3197  */
3198 static int dpaa2_eth_set_dist_key(struct net_device *net_dev,
3199                                   enum dpaa2_eth_rx_dist type, u64 flags)
3200 {
3201         struct device *dev = net_dev->dev.parent;
3202         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
3203         struct dpkg_profile_cfg cls_cfg;
3204         u32 rx_hash_fields = 0;
3205         dma_addr_t key_iova;
3206         u8 *dma_mem;
3207         int i;
3208         int err = 0;
3209
3210         memset(&cls_cfg, 0, sizeof(cls_cfg));
3211
3212         for (i = 0; i < ARRAY_SIZE(dist_fields); i++) {
3213                 struct dpkg_extract *key =
3214                         &cls_cfg.extracts[cls_cfg.num_extracts];
3215
3216                 /* For both Rx hashing and classification keys
3217                  * we set only the selected fields.
3218                  */
3219                 if (!(flags & dist_fields[i].id))
3220                         continue;
3221                 if (type == DPAA2_ETH_RX_DIST_HASH)
3222                         rx_hash_fields |= dist_fields[i].rxnfc_field;
3223
3224                 if (cls_cfg.num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS) {
3225                         dev_err(dev, "error adding key extraction rule, too many rules?\n");
3226                         return -E2BIG;
3227                 }
3228
3229                 key->type = DPKG_EXTRACT_FROM_HDR;
3230                 key->extract.from_hdr.prot = dist_fields[i].cls_prot;
3231                 key->extract.from_hdr.type = DPKG_FULL_FIELD;
3232                 key->extract.from_hdr.field = dist_fields[i].cls_field;
3233                 cls_cfg.num_extracts++;
3234         }
3235
3236         dma_mem = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL);
3237         if (!dma_mem)
3238                 return -ENOMEM;
3239
3240         err = dpni_prepare_key_cfg(&cls_cfg, dma_mem);
3241         if (err) {
3242                 dev_err(dev, "dpni_prepare_key_cfg error %d\n", err);
3243                 goto free_key;
3244         }
3245
3246         /* Prepare for setting the rx dist */
3247         key_iova = dma_map_single(dev, dma_mem, DPAA2_CLASSIFIER_DMA_SIZE,
3248                                   DMA_TO_DEVICE);
3249         if (dma_mapping_error(dev, key_iova)) {
3250                 dev_err(dev, "DMA mapping failed\n");
3251                 err = -ENOMEM;
3252                 goto free_key;
3253         }
3254
3255         if (type == DPAA2_ETH_RX_DIST_HASH) {
3256                 if (dpaa2_eth_has_legacy_dist(priv))
3257                         err = config_legacy_hash_key(priv, key_iova);
3258                 else
3259                         err = config_hash_key(priv, key_iova);
3260         } else {
3261                 err = config_cls_key(priv, key_iova);
3262         }
3263
3264         dma_unmap_single(dev, key_iova, DPAA2_CLASSIFIER_DMA_SIZE,
3265                          DMA_TO_DEVICE);
3266         if (!err && type == DPAA2_ETH_RX_DIST_HASH)
3267                 priv->rx_hash_fields = rx_hash_fields;
3268
3269 free_key:
3270         kfree(dma_mem);
3271         return err;
3272 }
3273
3274 int dpaa2_eth_set_hash(struct net_device *net_dev, u64 flags)
3275 {
3276         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
3277         u64 key = 0;
3278         int i;
3279
3280         if (!dpaa2_eth_hash_enabled(priv))
3281                 return -EOPNOTSUPP;
3282
3283         for (i = 0; i < ARRAY_SIZE(dist_fields); i++)
3284                 if (dist_fields[i].rxnfc_field & flags)
3285                         key |= dist_fields[i].id;
3286
3287         return dpaa2_eth_set_dist_key(net_dev, DPAA2_ETH_RX_DIST_HASH, key);
3288 }
3289
3290 int dpaa2_eth_set_cls(struct net_device *net_dev, u64 flags)
3291 {
3292         return dpaa2_eth_set_dist_key(net_dev, DPAA2_ETH_RX_DIST_CLS, flags);
3293 }
3294
3295 static int dpaa2_eth_set_default_cls(struct dpaa2_eth_priv *priv)
3296 {
3297         struct device *dev = priv->net_dev->dev.parent;
3298         int err;
3299
3300         /* Check if we actually support Rx flow classification */
3301         if (dpaa2_eth_has_legacy_dist(priv)) {
3302                 dev_dbg(dev, "Rx cls not supported by current MC version\n");
3303                 return -EOPNOTSUPP;
3304         }
3305
3306         if (!dpaa2_eth_fs_enabled(priv)) {
3307                 dev_dbg(dev, "Rx cls disabled in DPNI options\n");
3308                 return -EOPNOTSUPP;
3309         }
3310
3311         if (!dpaa2_eth_hash_enabled(priv)) {
3312                 dev_dbg(dev, "Rx cls disabled for single queue DPNIs\n");
3313                 return -EOPNOTSUPP;
3314         }
3315
3316         /* If there is no support for masking in the classification table,
3317          * we don't set a default key, as it will depend on the rules
3318          * added by the user at runtime.
3319          */
3320         if (!dpaa2_eth_fs_mask_enabled(priv))
3321                 goto out;
3322
3323         err = dpaa2_eth_set_cls(priv->net_dev, DPAA2_ETH_DIST_ALL);
3324         if (err)
3325                 return err;
3326
3327 out:
3328         priv->rx_cls_enabled = 1;
3329
3330         return 0;
3331 }
3332
3333 /* Bind the DPNI to its needed objects and resources: buffer pool, DPIOs,
3334  * frame queues and channels
3335  */
3336 static int bind_dpni(struct dpaa2_eth_priv *priv)
3337 {
3338         struct net_device *net_dev = priv->net_dev;
3339         struct device *dev = net_dev->dev.parent;
3340         struct dpni_pools_cfg pools_params;
3341         struct dpni_error_cfg err_cfg;
3342         int err = 0;
3343         int i;
3344
3345         pools_params.num_dpbp = 1;
3346         pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id;
3347         pools_params.pools[0].backup_pool = 0;
3348         pools_params.pools[0].buffer_size = priv->rx_buf_size;
3349         err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params);
3350         if (err) {
3351                 dev_err(dev, "dpni_set_pools() failed\n");
3352                 return err;
3353         }
3354
3355         /* have the interface implicitly distribute traffic based on
3356          * the default hash key
3357          */
3358         err = dpaa2_eth_set_hash(net_dev, DPAA2_RXH_DEFAULT);
3359         if (err && err != -EOPNOTSUPP)
3360                 dev_err(dev, "Failed to configure hashing\n");
3361
3362         /* Configure the flow classification key; it includes all
3363          * supported header fields and cannot be modified at runtime
3364          */
3365         err = dpaa2_eth_set_default_cls(priv);
3366         if (err && err != -EOPNOTSUPP)
3367                 dev_err(dev, "Failed to configure Rx classification key\n");
3368
3369         /* Configure handling of error frames */
3370         err_cfg.errors = DPAA2_FAS_RX_ERR_MASK;
3371         err_cfg.set_frame_annotation = 1;
3372         err_cfg.error_action = DPNI_ERROR_ACTION_DISCARD;
3373         err = dpni_set_errors_behavior(priv->mc_io, 0, priv->mc_token,
3374                                        &err_cfg);
3375         if (err) {
3376                 dev_err(dev, "dpni_set_errors_behavior failed\n");
3377                 return err;
3378         }
3379
3380         /* Configure Rx and Tx conf queues to generate CDANs */
3381         for (i = 0; i < priv->num_fqs; i++) {
3382                 switch (priv->fq[i].type) {
3383                 case DPAA2_RX_FQ:
3384                         err = setup_rx_flow(priv, &priv->fq[i]);
3385                         break;
3386                 case DPAA2_TX_CONF_FQ:
3387                         err = setup_tx_flow(priv, &priv->fq[i]);
3388                         break;
3389                 default:
3390                         dev_err(dev, "Invalid FQ type %d\n", priv->fq[i].type);
3391                         return -EINVAL;
3392                 }
3393                 if (err)
3394                         return err;
3395         }
3396
3397         err = dpni_get_qdid(priv->mc_io, 0, priv->mc_token,
3398                             DPNI_QUEUE_TX, &priv->tx_qdid);
3399         if (err) {
3400                 dev_err(dev, "dpni_get_qdid() failed\n");
3401                 return err;
3402         }
3403
3404         return 0;
3405 }
3406
3407 /* Allocate rings for storing incoming frame descriptors */
3408 static int alloc_rings(struct dpaa2_eth_priv *priv)
3409 {
3410         struct net_device *net_dev = priv->net_dev;
3411         struct device *dev = net_dev->dev.parent;
3412         int i;
3413
3414         for (i = 0; i < priv->num_channels; i++) {
3415                 priv->channel[i]->store =
3416                         dpaa2_io_store_create(DPAA2_ETH_STORE_SIZE, dev);
3417                 if (!priv->channel[i]->store) {
3418                         netdev_err(net_dev, "dpaa2_io_store_create() failed\n");
3419                         goto err_ring;
3420                 }
3421         }
3422
3423         return 0;
3424
3425 err_ring:
3426         for (i = 0; i < priv->num_channels; i++) {
3427                 if (!priv->channel[i]->store)
3428                         break;
3429                 dpaa2_io_store_destroy(priv->channel[i]->store);
3430         }
3431
3432         return -ENOMEM;
3433 }
3434
3435 static void free_rings(struct dpaa2_eth_priv *priv)
3436 {
3437         int i;
3438
3439         for (i = 0; i < priv->num_channels; i++)
3440                 dpaa2_io_store_destroy(priv->channel[i]->store);
3441 }
3442
3443 static int set_mac_addr(struct dpaa2_eth_priv *priv)
3444 {
3445         struct net_device *net_dev = priv->net_dev;
3446         struct device *dev = net_dev->dev.parent;
3447         u8 mac_addr[ETH_ALEN], dpni_mac_addr[ETH_ALEN];
3448         int err;
3449
3450         /* Get firmware address, if any */
3451         err = dpni_get_port_mac_addr(priv->mc_io, 0, priv->mc_token, mac_addr);
3452         if (err) {
3453                 dev_err(dev, "dpni_get_port_mac_addr() failed\n");
3454                 return err;
3455         }
3456
3457         /* Get DPNI attributes address, if any */
3458         err = dpni_get_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
3459                                         dpni_mac_addr);
3460         if (err) {
3461                 dev_err(dev, "dpni_get_primary_mac_addr() failed\n");
3462                 return err;
3463         }
3464
3465         /* First check if firmware has any address configured by bootloader */
3466         if (!is_zero_ether_addr(mac_addr)) {
3467                 /* If the DPMAC addr != DPNI addr, update it */
3468                 if (!ether_addr_equal(mac_addr, dpni_mac_addr)) {
3469                         err = dpni_set_primary_mac_addr(priv->mc_io, 0,
3470                                                         priv->mc_token,
3471                                                         mac_addr);
3472                         if (err) {
3473                                 dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
3474                                 return err;
3475                         }
3476                 }
3477                 memcpy(net_dev->dev_addr, mac_addr, net_dev->addr_len);
3478         } else if (is_zero_ether_addr(dpni_mac_addr)) {
3479                 /* No MAC address configured, fill in net_dev->dev_addr
3480                  * with a random one
3481                  */
3482                 eth_hw_addr_random(net_dev);
3483                 dev_dbg_once(dev, "device(s) have all-zero hwaddr, replaced with random\n");
3484
3485                 err = dpni_set_primary_mac_addr(priv->mc_io, 0, priv->mc_token,
3486                                                 net_dev->dev_addr);
3487                 if (err) {
3488                         dev_err(dev, "dpni_set_primary_mac_addr() failed\n");
3489                         return err;
3490                 }
3491
3492                 /* Override NET_ADDR_RANDOM set by eth_hw_addr_random(); for all
3493                  * practical purposes, this will be our "permanent" mac address,
3494                  * at least until the next reboot. This move will also permit
3495                  * register_netdevice() to properly fill up net_dev->perm_addr.
3496                  */
3497                 net_dev->addr_assign_type = NET_ADDR_PERM;
3498         } else {
3499                 /* NET_ADDR_PERM is default, all we have to do is
3500                  * fill in the device addr.
3501                  */
3502                 memcpy(net_dev->dev_addr, dpni_mac_addr, net_dev->addr_len);
3503         }
3504
3505         return 0;
3506 }
3507
3508 static int netdev_init(struct net_device *net_dev)
3509 {
3510         struct device *dev = net_dev->dev.parent;
3511         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
3512         u32 options = priv->dpni_attrs.options;
3513         u64 supported = 0, not_supported = 0;
3514         u8 bcast_addr[ETH_ALEN];
3515         u8 num_queues;
3516         int err;
3517
3518         net_dev->netdev_ops = &dpaa2_eth_ops;
3519         net_dev->ethtool_ops = &dpaa2_ethtool_ops;
3520
3521         err = set_mac_addr(priv);
3522         if (err)
3523                 return err;
3524
3525         /* Explicitly add the broadcast address to the MAC filtering table */
3526         eth_broadcast_addr(bcast_addr);
3527         err = dpni_add_mac_addr(priv->mc_io, 0, priv->mc_token, bcast_addr);
3528         if (err) {
3529                 dev_err(dev, "dpni_add_mac_addr() failed\n");
3530                 return err;
3531         }
3532
3533         /* Set MTU upper limit; lower limit is 68B (default value) */
3534         net_dev->max_mtu = DPAA2_ETH_MAX_MTU;
3535         err = dpni_set_max_frame_length(priv->mc_io, 0, priv->mc_token,
3536                                         DPAA2_ETH_MFL);
3537         if (err) {
3538                 dev_err(dev, "dpni_set_max_frame_length() failed\n");
3539                 return err;
3540         }
3541
3542         /* Set actual number of queues in the net device */
3543         num_queues = dpaa2_eth_queue_count(priv);
3544         err = netif_set_real_num_tx_queues(net_dev, num_queues);
3545         if (err) {
3546                 dev_err(dev, "netif_set_real_num_tx_queues() failed\n");
3547                 return err;
3548         }
3549         err = netif_set_real_num_rx_queues(net_dev, num_queues);
3550         if (err) {
3551                 dev_err(dev, "netif_set_real_num_rx_queues() failed\n");
3552                 return err;
3553         }
3554
3555         /* Capabilities listing */
3556         supported |= IFF_LIVE_ADDR_CHANGE;
3557
3558         if (options & DPNI_OPT_NO_MAC_FILTER)
3559                 not_supported |= IFF_UNICAST_FLT;
3560         else
3561                 supported |= IFF_UNICAST_FLT;
3562
3563         net_dev->priv_flags |= supported;
3564         net_dev->priv_flags &= ~not_supported;
3565
3566         /* Features */
3567         net_dev->features = NETIF_F_RXCSUM |
3568                             NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3569                             NETIF_F_SG | NETIF_F_HIGHDMA |
3570                             NETIF_F_LLTX;
3571         net_dev->hw_features = net_dev->features;
3572
3573         return 0;
3574 }
3575
3576 static int poll_link_state(void *arg)
3577 {
3578         struct dpaa2_eth_priv *priv = (struct dpaa2_eth_priv *)arg;
3579         int err;
3580
3581         while (!kthread_should_stop()) {
3582                 err = link_state_update(priv);
3583                 if (unlikely(err))
3584                         return err;
3585
3586                 msleep(DPAA2_ETH_LINK_STATE_REFRESH);
3587         }
3588
3589         return 0;
3590 }
3591
3592 static int dpaa2_eth_connect_mac(struct dpaa2_eth_priv *priv)
3593 {
3594         struct fsl_mc_device *dpni_dev, *dpmac_dev;
3595         struct dpaa2_mac *mac;
3596         int err;
3597
3598         dpni_dev = to_fsl_mc_device(priv->net_dev->dev.parent);
3599         dpmac_dev = fsl_mc_get_endpoint(dpni_dev);
3600         if (IS_ERR(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
3601                 return 0;
3602
3603         if (dpaa2_mac_is_type_fixed(dpmac_dev, priv->mc_io))
3604                 return 0;
3605
3606         mac = kzalloc(sizeof(struct dpaa2_mac), GFP_KERNEL);
3607         if (!mac)
3608                 return -ENOMEM;
3609
3610         mac->mc_dev = dpmac_dev;
3611         mac->mc_io = priv->mc_io;
3612         mac->net_dev = priv->net_dev;
3613
3614         err = dpaa2_mac_connect(mac);
3615         if (err) {
3616                 netdev_err(priv->net_dev, "Error connecting to the MAC endpoint\n");
3617                 kfree(mac);
3618                 return err;
3619         }
3620         priv->mac = mac;
3621
3622         return 0;
3623 }
3624
3625 static void dpaa2_eth_disconnect_mac(struct dpaa2_eth_priv *priv)
3626 {
3627         if (!priv->mac)
3628                 return;
3629
3630         dpaa2_mac_disconnect(priv->mac);
3631         kfree(priv->mac);
3632         priv->mac = NULL;
3633 }
3634
3635 static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg)
3636 {
3637         u32 status = ~0;
3638         struct device *dev = (struct device *)arg;
3639         struct fsl_mc_device *dpni_dev = to_fsl_mc_device(dev);
3640         struct net_device *net_dev = dev_get_drvdata(dev);
3641         struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
3642         int err;
3643
3644         err = dpni_get_irq_status(dpni_dev->mc_io, 0, dpni_dev->mc_handle,
3645                                   DPNI_IRQ_INDEX, &status);
3646         if (unlikely(err)) {
3647                 netdev_err(net_dev, "Can't get irq status (err %d)\n", err);
3648                 return IRQ_HANDLED;
3649         }
3650
3651         if (status & DPNI_IRQ_EVENT_LINK_CHANGED)
3652                 link_state_update(netdev_priv(net_dev));
3653
3654         if (status & DPNI_IRQ_EVENT_ENDPOINT_CHANGED) {
3655                 set_mac_addr(netdev_priv(net_dev));
3656                 update_tx_fqids(priv);
3657
3658                 rtnl_lock();
3659                 if (priv->mac)
3660                         dpaa2_eth_disconnect_mac(priv);
3661                 else
3662                         dpaa2_eth_connect_mac(priv);
3663                 rtnl_unlock();
3664         }
3665
3666         return IRQ_HANDLED;
3667 }
3668
3669 static int setup_irqs(struct fsl_mc_device *ls_dev)
3670 {
3671         int err = 0;
3672         struct fsl_mc_device_irq *irq;
3673
3674         err = fsl_mc_allocate_irqs(ls_dev);
3675         if (err) {
3676                 dev_err(&ls_dev->dev, "MC irqs allocation failed\n");
3677                 return err;
3678         }
3679
3680         irq = ls_dev->irqs[0];
3681         err = devm_request_threaded_irq(&ls_dev->dev, irq->msi_desc->irq,
3682                                         NULL, dpni_irq0_handler_thread,
3683                                         IRQF_NO_SUSPEND | IRQF_ONESHOT,
3684                                         dev_name(&ls_dev->dev), &ls_dev->dev);
3685         if (err < 0) {
3686                 dev_err(&ls_dev->dev, "devm_request_threaded_irq(): %d\n", err);
3687                 goto free_mc_irq;
3688         }
3689
3690         err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle,
3691                                 DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED |
3692                                 DPNI_IRQ_EVENT_ENDPOINT_CHANGED);
3693         if (err < 0) {
3694                 dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err);
3695                 goto free_irq;
3696         }
3697
3698         err = dpni_set_irq_enable(ls_dev->mc_io, 0, ls_dev->mc_handle,
3699                                   DPNI_IRQ_INDEX, 1);
3700         if (err < 0) {
3701                 dev_err(&ls_dev->dev, "dpni_set_irq_enable(): %d\n", err);
3702                 goto free_irq;
3703         }
3704
3705         return 0;
3706
3707 free_irq:
3708         devm_free_irq(&ls_dev->dev, irq->msi_desc->irq, &ls_dev->dev);
3709 free_mc_irq:
3710         fsl_mc_free_irqs(ls_dev);
3711
3712         return err;
3713 }
3714
3715 static void add_ch_napi(struct dpaa2_eth_priv *priv)
3716 {
3717         int i;
3718         struct dpaa2_eth_channel *ch;
3719
3720         for (i = 0; i < priv->num_channels; i++) {
3721                 ch = priv->channel[i];
3722                 /* NAPI weight *MUST* be a multiple of DPAA2_ETH_STORE_SIZE */
3723                 netif_napi_add(priv->net_dev, &ch->napi, dpaa2_eth_poll,
3724                                NAPI_POLL_WEIGHT);
3725         }
3726 }
3727
3728 static void del_ch_napi(struct dpaa2_eth_priv *priv)
3729 {
3730         int i;
3731         struct dpaa2_eth_channel *ch;
3732
3733         for (i = 0; i < priv->num_channels; i++) {
3734                 ch = priv->channel[i];
3735                 netif_napi_del(&ch->napi);
3736         }
3737 }
3738
3739 static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
3740 {
3741         struct device *dev;
3742         struct net_device *net_dev = NULL;
3743         struct dpaa2_eth_priv *priv = NULL;
3744         int err = 0;
3745
3746         dev = &dpni_dev->dev;
3747
3748         /* Net device */
3749         net_dev = alloc_etherdev_mq(sizeof(*priv), DPAA2_ETH_MAX_NETDEV_QUEUES);
3750         if (!net_dev) {
3751                 dev_err(dev, "alloc_etherdev_mq() failed\n");
3752                 return -ENOMEM;
3753         }
3754
3755         SET_NETDEV_DEV(net_dev, dev);
3756         dev_set_drvdata(dev, net_dev);
3757
3758         priv = netdev_priv(net_dev);
3759         priv->net_dev = net_dev;
3760
3761         priv->iommu_domain = iommu_get_domain_for_dev(dev);
3762
3763         /* Obtain a MC portal */
3764         err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL,
3765                                      &priv->mc_io);
3766         if (err) {
3767                 if (err == -ENXIO)
3768                         err = -EPROBE_DEFER;
3769                 else
3770                         dev_err(dev, "MC portal allocation failed\n");
3771                 goto err_portal_alloc;
3772         }
3773
3774         /* MC objects initialization and configuration */
3775         err = setup_dpni(dpni_dev);
3776         if (err)
3777                 goto err_dpni_setup;
3778
3779         err = setup_dpio(priv);
3780         if (err)
3781                 goto err_dpio_setup;
3782
3783         setup_fqs(priv);
3784
3785         err = setup_dpbp(priv);
3786         if (err)
3787                 goto err_dpbp_setup;
3788
3789         err = bind_dpni(priv);
3790         if (err)
3791                 goto err_bind;
3792
3793         /* Add a NAPI context for each channel */
3794         add_ch_napi(priv);
3795
3796         /* Percpu statistics */
3797         priv->percpu_stats = alloc_percpu(*priv->percpu_stats);
3798         if (!priv->percpu_stats) {
3799                 dev_err(dev, "alloc_percpu(percpu_stats) failed\n");
3800                 err = -ENOMEM;
3801                 goto err_alloc_percpu_stats;
3802         }
3803         priv->percpu_extras = alloc_percpu(*priv->percpu_extras);
3804         if (!priv->percpu_extras) {
3805                 dev_err(dev, "alloc_percpu(percpu_extras) failed\n");
3806                 err = -ENOMEM;
3807                 goto err_alloc_percpu_extras;
3808         }
3809
3810         err = netdev_init(net_dev);
3811         if (err)
3812                 goto err_netdev_init;
3813
3814         /* Configure checksum offload based on current interface flags */
3815         err = set_rx_csum(priv, !!(net_dev->features & NETIF_F_RXCSUM));
3816         if (err)
3817                 goto err_csum;
3818
3819         err = set_tx_csum(priv, !!(net_dev->features &
3820                                    (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)));
3821         if (err)
3822                 goto err_csum;
3823
3824         err = alloc_rings(priv);
3825         if (err)
3826                 goto err_alloc_rings;
3827
3828         err = setup_irqs(dpni_dev);
3829         if (err) {
3830                 netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
3831                 priv->poll_thread = kthread_run(poll_link_state, priv,
3832                                                 "%s_poll_link", net_dev->name);
3833                 if (IS_ERR(priv->poll_thread)) {
3834                         dev_err(dev, "Error starting polling thread\n");
3835                         goto err_poll_thread;
3836                 }
3837                 priv->do_link_poll = true;
3838         }
3839
3840         err = dpaa2_eth_connect_mac(priv);
3841         if (err)
3842                 goto err_connect_mac;
3843
3844         err = register_netdev(net_dev);
3845         if (err < 0) {
3846                 dev_err(dev, "register_netdev() failed\n");
3847                 goto err_netdev_reg;
3848         }
3849
3850 #ifdef CONFIG_DEBUG_FS
3851         dpaa2_dbg_add(priv);
3852 #endif
3853
3854         dev_info(dev, "Probed interface %s\n", net_dev->name);
3855         return 0;
3856
3857 err_netdev_reg:
3858         dpaa2_eth_disconnect_mac(priv);
3859 err_connect_mac:
3860         if (priv->do_link_poll)
3861                 kthread_stop(priv->poll_thread);
3862         else
3863                 fsl_mc_free_irqs(dpni_dev);
3864 err_poll_thread:
3865         free_rings(priv);
3866 err_alloc_rings:
3867 err_csum:
3868 err_netdev_init:
3869         free_percpu(priv->percpu_extras);
3870 err_alloc_percpu_extras:
3871         free_percpu(priv->percpu_stats);
3872 err_alloc_percpu_stats:
3873         del_ch_napi(priv);
3874 err_bind:
3875         free_dpbp(priv);
3876 err_dpbp_setup:
3877         free_dpio(priv);
3878 err_dpio_setup:
3879         free_dpni(priv);
3880 err_dpni_setup:
3881         fsl_mc_portal_free(priv->mc_io);
3882 err_portal_alloc:
3883         dev_set_drvdata(dev, NULL);
3884         free_netdev(net_dev);
3885
3886         return err;
3887 }
3888
3889 static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
3890 {
3891         struct device *dev;
3892         struct net_device *net_dev;
3893         struct dpaa2_eth_priv *priv;
3894
3895         dev = &ls_dev->dev;
3896         net_dev = dev_get_drvdata(dev);
3897         priv = netdev_priv(net_dev);
3898
3899 #ifdef CONFIG_DEBUG_FS
3900         dpaa2_dbg_remove(priv);
3901 #endif
3902         rtnl_lock();
3903         dpaa2_eth_disconnect_mac(priv);
3904         rtnl_unlock();
3905
3906         unregister_netdev(net_dev);
3907
3908         if (priv->do_link_poll)
3909                 kthread_stop(priv->poll_thread);
3910         else
3911                 fsl_mc_free_irqs(ls_dev);
3912
3913         free_rings(priv);
3914         free_percpu(priv->percpu_stats);
3915         free_percpu(priv->percpu_extras);
3916
3917         del_ch_napi(priv);
3918         free_dpbp(priv);
3919         free_dpio(priv);
3920         free_dpni(priv);
3921
3922         fsl_mc_portal_free(priv->mc_io);
3923
3924         free_netdev(net_dev);
3925
3926         dev_dbg(net_dev->dev.parent, "Removed interface %s\n", net_dev->name);
3927
3928         return 0;
3929 }
3930
3931 static const struct fsl_mc_device_id dpaa2_eth_match_id_table[] = {
3932         {
3933                 .vendor = FSL_MC_VENDOR_FREESCALE,
3934                 .obj_type = "dpni",
3935         },
3936         { .vendor = 0x0 }
3937 };
3938 MODULE_DEVICE_TABLE(fslmc, dpaa2_eth_match_id_table);
3939
3940 static struct fsl_mc_driver dpaa2_eth_driver = {
3941         .driver = {
3942                 .name = KBUILD_MODNAME,
3943                 .owner = THIS_MODULE,
3944         },
3945         .probe = dpaa2_eth_probe,
3946         .remove = dpaa2_eth_remove,
3947         .match_id_table = dpaa2_eth_match_id_table
3948 };
3949
3950 static int __init dpaa2_eth_driver_init(void)
3951 {
3952         int err;
3953
3954         dpaa2_eth_dbg_init();
3955         err = fsl_mc_driver_register(&dpaa2_eth_driver);
3956         if (err) {
3957                 dpaa2_eth_dbg_exit();
3958                 return err;
3959         }
3960
3961         return 0;
3962 }
3963
3964 static void __exit dpaa2_eth_driver_exit(void)
3965 {
3966         dpaa2_eth_dbg_exit();
3967         fsl_mc_driver_unregister(&dpaa2_eth_driver);
3968 }
3969
3970 module_init(dpaa2_eth_driver_init);
3971 module_exit(dpaa2_eth_driver_exit);